| Document | Document Title |
|---|---|
| US11388304B2 |
Information processing apparatus and method of notifying verification result of program
An information processing apparatus includes a control unit, a storage unit configured to store a program to be executed by the control unit, a verification unit configured to read the program from the storage unit and to verify the read program, and a light-emitting unit configured to be changed to a predetermined light-emitting state or to be changed from the predetermined light-emitting state based on a result of the verification of the program by the verification unit. |
| US11388300B2 |
Appliance setting apparatus and non-transitory computer-readable recording medium storing appliance setting program
Provided is an appliance setting apparatus. If generating layout information indicating a layout of a screen of a client application program for providing, by an image forming apparatus, a function of a document processing flow execution system, when a flow execution button for executing a document processing flow is arranged in the layout, the appliance setting apparatus acquires a list of document processing flows from the document processing flow execution system, displays at least a part of the document processing flows included in the acquired list onto the display unit, associates the document processing flow selected via an operating unit from among the displayed workflows, with the flow execution button, and installs the generated layout information on the image forming apparatus. |
| US11388299B2 |
Non-transitory storage medium storing plurality of instructions readable by information processing apparatus and scan system
A non-transitory storage medium stores a plurality of instructions readable by a computer of an information processing apparatus. The information processing apparatus comprises a display, an operation unit, and a communication interface. The information processing apparatus stores a first execution program and a second execution program. The information processing apparatus displays a setting screen including a first particular setting capable of being designated in scan processing executed by the first execution program and incapable of being designated in scan processing executed by the second execution program, and determines to adopt the first execution program as the execution program that executes the scan processing in a case where the first particular setting is designated on the setting screen by an operation to the operation unit. |
| US11388295B2 |
Operation input device and image forming apparatus
An operation input device includes: an operation panel unit which receives an operation input by a user touching a displayed operation key; a vibrating element installed at a specified position of the operation panel unit to vibrate the unit at least in one direction; and a vibration control section which causes the element to vibrate according to an operation input receiving condition on the panel unit. On the panel unit, operation keys are arranged more densely in a first region near the installed vibrating element than in a second region remote from the vibrating element, or keys which are more frequently used are arranged in the first region than in the second region. Alternatively, an operation key for user interfacing to set display of keys is arranged in the first region. |
| US11388294B2 |
Image forming apparatus, control method for image forming apparatus, and control program for image forming apparatus
An image forming apparatus may include: a storage that stores information in which a job type is associated with speech patterns for processings related to the job type; and a hardware processor that may: be inputted with a speech; acquire a job type; use speech patterns associated with a job type, which is acquired by the hardware processor and is being executed, to analyze a speech inputted during execution of the job; and execute the processings based on an analysis result by the hardware processor. |
| US11388291B2 |
System and method for processing voicemail
In one example, a recorded voicemail is first converted from speech to text, and a proposed action to be performed by the user is extracted from the voice message. For example, in the voicemail “this is John, call me at 650.987.0987 at 9 am tomorrow,” the action is to call John. At least one action parameter for undertaking the action is determined. For example, the action parameters may include the 650.987.0987 telephone number and the 9 am time the following morning. The at least one action parameter may be extracted from the voicemail message or it may be determined by other means, e.g., from a user's contact book. Finally, the user is presented with a prompt to facilitate undertaking the action using the at least one the parameter. For example, the user may be given the option to set a reminder to call John the following morning at 9 am. |
| US11388288B2 |
Systems and methods for parallel recording of events on a screen of a computer
Systems and methods for parallel recording of events on a screen receive start recording requests to start recording the events, each start recording request having an associated interaction identifier; capture the events on the screen in a series of video fragment files until a stop recording request with a corresponding associated interaction identifier has been received for each start recording request; update for each video fragment file, a metadata manifest with information about each interaction having events captured in the given video fragment file; and send the video fragment files, along with the updated metadata manifest to a server as each video fragment file is completed; wherein the video fragment files are forked to interaction files based on the updated metadata manifest, each interaction file associated with a different interaction; and wherein, upon receipt of a stop recording request, the files are merged into a single video recording file. |
| US11388278B2 |
Display device
A display device includes: a display panel configured to display an image; a sound element on a rear side of the display panel; and a rear chassis configured to receive the display panel and protect the rear side of the display panel, and including a protruding portion protruding away from the rear side of the display panel and corresponding to the sound element. The sound element includes a pair of electrodes, and a vibration material layer between the electrodes. |
| US11388268B1 |
Network systems and methods for CXL standard
A first processing unit for a computer server apparatus includes a first circuit configured to process a first type of data to be transmitted and received over a communication channel in accordance with a peripheral component interconnect express (PCIe) protocol, a second circuit configured to process a second type of data to be transmitted and received over the communication channel in accordance with a compute express link (CXL) protocol, and an optical communication interface configured to modulate the first type of data and the second type of data into a first signal in a PAM format to be transmitted over the communication channel to a second processing unit and receive, from the second processing unit over the communication channel, a second signal including either one of the first type of data and the second type of data modulated in the PAM format. |
| US11388266B2 |
Universal protocol translator
In one implementation, a universal translator device for translating protocols, the device includes one or more peripheral device interfaces through which communication from one or more peripheral devices is received using any of a plurality of protocols; a protocol translator that is (i) preconfigured with translation mappings to translate between each possible permutation of the plurality of protocols and (ii) programmed to translate, using the translation mappings, signals received from the peripheral devices into at least one target protocol; and a wireless interface that is configured to transmit wireless signals in the target protocol, the wireless signals having been translated into the target protocol by the protocol translator. |
| US11388265B2 |
Machine-to-machine protocol indication and negotiation
Network entities may indicate and negotiate one or more new protocols for communications using a current protocol. Indications may include one or more protocols which are supported, one or more protocols which are preferred, and the level of desire of preferences. Indications may further include schedules of times during which certain protocols are supported and/or schedules of functions for which certain protocols are preferred. Indications may be evaluated and acted upon immediately or stored for future reference. Evaluation may include comparison of relative desire levels and needs of various entities. Protocols may be messaging protocols, transport protocols, or combinations thereof. |
| US11388262B2 |
Compression context setup for data transmission for IOT devices
A method or enabling compression context setup for Internet-of-Thing, IoT, devices in a communication network is presented. The method is performed in an application server node for IoT devices, and includes sending a get context message to a gateway node, the get context message requesting a compression context setup includes compression details for an IoT device, receiving an indication of the requested compression context setup for the IoT device from the gateway node, and compressing and decompressing messages sent to and from the IoT device based on the received indication. An IoT device, a gateway node, an application node, a computer program and a computer program product thereof are also presented. |
| US11388256B2 |
System and method of reciprocal data sharing
Systems and methods are provided for implementing reciprocal data sharing in a data exchange system. Limitations may be placed on the amount of data an exchange member may access based on the amount of data that exchange member has contributed. The system may include determining a data contribution associated with a first member of the data exchange, determining a data access limit for the first member based on the data contribution, and providing data to the first member when the first member has not exceeded the data access limit. In some embodiments, there may be separate data access limits for each member of the data exchange, so that a first member may have different access limits when accessing data from a second member, data from a third member, and data from a fourth member. Further, the system may limit a requester to a type of data that corresponds to the type of data contributed. |
| US11388254B2 |
Dynamic application content analysis
Methods, systems, and apparatus, including an apparatus for analyzing content that is displayed within an application (e.g., a native application) on a client device and making decisions regarding the presentation of content within the application. In one aspect, a process includes identifying an event occurring within the application. The event can be indicative of a display of content by the application. The content to be displayed is received from the application. Information representative of the content is sent to a server. A response is received from the server. The response is indicative of the suitability of the content for display within the application. |
| US11388251B2 |
Providing access to managed content
A method for providing local access to managed content is disclosed. The method comprises receiving from a remote host a request to perform an operation with respect to content associated with a set of managed content and obtaining information required to respond to the request. The method further comprises providing in response to the request a content locator usable to perform the requested operation through direct communication with a content system through which the content is accessible. |
| US11388239B2 |
Previewing impacted entities in automated device definitions
Various examples are described for defining automations for client devices enrolled with a management service. A computing environment can cause one or more user interfaces to be shown in a display of an administrator device that include at least one field for generating an automation that includes a trigger, a condition, and an action to automatically be performed when the condition is satisfied. The trigger defines a time at which the management service compares the condition to device profiles generated for client devices enrolled with the management service. The user interface can forecast a number of client devices that will be affected or subject to an automation, and can display results of the automation as it is executed in real time. |
| US11388237B1 |
Logical upstream preprocessing at edge node of data to be stored in a data lake
Preprocessing of data destined for storage in a data lake is accomplished upstream, such as at edge nodes. The preprocessing includes filtering data that is deemed to be unnecessary for subsequent analytical use purposes. An initial intelligent determination is performed on whether a data feed is to be preprocessed at (i) the data lake, or (ii) upstream of the data lake, such as at an edge node. Once upstream preprocessing has been determined, an intelligent determination of which edge node is to be chosen for preprocessing is performed. The determination on which edge node is to be chosen for preprocessing is based on response times between the application server and the edge nodes and network bandwidth usage encountered by the network transmitting the data feed. |
| US11388232B2 |
Replication of content to one or more servers
An approach is provided to automatically replicate content to certain servers in a networking environment based on, amongst other metrics, location of third parties accessing information in a social networking environment. The approach includes obtaining content from a user within a networked environment and analyzing information of one or more third parties that have access to the networked environment and who have an association with the user. The approach further includes replicating the content to one or more servers within the networked environment based on the analyzed information of the one or more third parties. |
| US11388231B1 |
Multi-substrate fault tolerant continuous delivery of datacenter builds on cloud computing platforms
Computing systems, for example, multi-tenant systems deploy software artifacts in data centers created in a cloud platform using a cloud platform infrastructure language that is cloud platform independent. The system uses a control datacenter with a set of service groups used for configuring other datacenters, for example, for performing continuous delivery of software artifacts for other datacenters. The system uses a primary control datacenter and a secondary control datacenter. The primary control datacenter configures infrastructure of the tenant datacenter, for example, by configuring computing resources in the cloud platform for the tenant datacenter according to a declarative specification of the tenant datacenter. The secondary control datacenter efficiently takes control of the process of configuring the tenant datacenter, for example, if there is a failure of the primary control datacenter. |
| US11388225B1 |
Load balancing based on security parameter index values
Techniques for load balancing encrypted traffic based on security parameter index (SPI) values of packet headers and sets of 5-tuple values of the packet headers are described herein. Additionally, techniques for including quality of service (QoS)-type information in SPI value fields of packet headers are also described herein. The QoS-type information may indicate a particular traffic class according to which the packet is to be handled. Further, techniques for pre-configuring a backend host such that encrypted traffic may be migrated to the backend host from another backend host without causing temporary service disruptions are also described herein. |
| US11388224B2 |
Method for managing user information of application, device, and system
Example methods and apparatus for managing user information of an application are described. One example method is applied to a user management device of a cloud platform, where the cloud platform is configured to bear an application registered by a user with the cloud platform. The method includes receiving a user management registration request of a first application, where the first application is one of applications registered with the cloud platform, and the user management registration request of the first application carries an identifier of the first application. A user management instance is created for the first application according to the user management registration request and the identifier of the first application, where the user management instance is used to manage user information of the first application. The user management instance is invoked to process a service that is in the first application and related to the user information. |
| US11388222B2 |
Mobile edge computing
A wireless network device can receive, at a traffic director in a kernel space, a data packet from a client device and determine whether the data packet is intended for an application cloud server operating in a cloud environment. The wireless network device can provide, based on determining that the data packet is intended for the application cloud server, the data packet to an application server instance executing on the wireless network device. The application server instance can be implemented in a virtualized software container in a user space, and can be configured to perform one or more operations associated with the application cloud server. The wireless network device can receive, at the traffic director and from the application server instance, a result of the application server instance performing the one or more operations on the data packet, and transmit the result to the application cloud server. |
| US11388218B2 |
Cloud file transfers using cloud file descriptors
A method and system method for reading a file from a cloud storage service are provided. The method includes receiving, from a client device, a request to read at least a portion of a file from a cloud storage service, wherein the cloud storage service is associated with at least one object storage system; and sending a cloud file descriptor to the client device, wherein the cloud file descriptor includes a plurality of download tokens utilized to retrieve objects constituting the requested at least a portion of the file from the at least one object storage system. |
| US11388213B2 |
Managing data transmissions over a network connection
In various example embodiments, a system and method for managing media bandwidth usage are disclosed. One disclosed method includes determining a network connection state of a computing device, receiving a request that requests media content, altering the request to request a synthetic representation of the media content instead of the media content in response to the network connection state being one of a set of predefined network connection states and the media content violating one or more restrictions of the network connection state, and requesting the media content in response to a user selecting the synthetic representation. |
| US11388211B1 |
Filter generation for real-time data stream
A data stream processing system can receive a stream of data and display a portion of the stream to a user. The displayed streaming data can change over time as additional data is received as part of the stream. The data stream processing system can extract one or more field values rom data in the stream and generate filters based on the extracted information. The generated filters can be displayed to a user, and in response to an interaction with a generated filter, the data stream processing system can apply the selected filter to data in the data stream. |
| US11388210B1 |
Streaming analytics using a serverless compute system
Systems and methods are described implementing streaming analytics on a serverless compute system. A user can specify a data stream against which analytics should be conducted, serverless functions to be used to conduct the analysis, and criteria for the analytics, such as windowing criteria and aggregation criteria. The windowing criteria can specify windows of items within the stream that should be collectively analyzed. The aggregation criteria can specify how to group items within each window during analysis. A poller device can read data items from the stream, window and group the items according to the windowing and aggregation criteria, and invoke serverless functions to conduct streaming analytics on the data items. The poller device can further maintain state between invocations. |
| US11388205B2 |
Systems and methods for establishing a shared augmented reality session
Methods and systems of establishing a shared augmented reality session between a first computing device and a second computing device are disclosed. The first and second computing devices perform proximity device discovery using a first data communication technology. The first and second computing devices then perform real-time network communication using a second data communication technology. Once the real-time network communication is established, the first and second computing devices perform coordinate space synchronization using the second data communication technology. |
| US11388202B2 |
Network entity selection
There are disclosed measures of network entity selection, for example including furnishing an identity of a network entity being pre-selected by a first network apparatus, and providing verification information for said pre-selected network entity identity, enabling to verify whether the pre-selected network entity identity is applicable for network entity selection at a second network apparatus. |
| US11388200B2 |
Scalable network security detection and prevention platform
This disclosure provides a network security architecture that permits installation of different software security products as virtual machines (VMs). By relying on a common data format and standardized communication structure (e.g., using pre-established, cross-platform messaging), a general architecture can be created and used to dynamically build and reconfigure interaction between both similar and dissimilar security products. Examples are provided where an intrusion monitoring system (IMS) can be used to detect network threats based on distributed threat analytics, passing detected threats to other security products (e.g., products with different capabilities from different vendors) to trigger automatic, dynamically configured communication and reaction. A network security provider using this infrastructure can provide hosted or managed boundary security to a diverse set of clients, each on a customized basis. |
| US11388198B2 |
Collaborative database and reputation management in adversarial information environments
A system and method for the contextualization and management of collaborative databases in an adversarial information environment. The system and method feature the ability to scan for, ingest and process, and then use relational, wide column, and graph stores for capturing entity data, their relationships, and actions associated with them. Furthermore, meta-data is gathered and linked to the ingested data, which provides a broader contextual view of the environment leading up to and during an event of interest. The gathered data and meta-data is used to manage the reputation of the contributing data sources. The system links each successive data set, algorithm, or meta-data which might pertain to its unique identification and to its ultimate reputation, utility, or fitness for purpose. |
| US11388197B2 |
I2NSF NSF monitoring YANG data model
An information model for monitoring Network Security Functions (NSF) in an Interface to Network Security Functions (I2NSF) framework is disclosed. |
| US11388195B1 |
Information security compliance platform
A computer-implemented system and method are disclosed that monitor and determine vendor compliance with at least some aspects of information and security criteria. At least one computing device is configured by executing code to access information and security criteria respectively associated with a vendor that provides a good and/or service. At least some aspects of the information and security criteria are provided by an organization considering the vendor and, further, the information and security criteria include at least one of cybersecurity criteria, regulatory criteria, intellectual property criteria, data management criteria, and policy criteria. |
| US11388194B2 |
Identity verification and verifying device
An identity verification method and a verifying device, where the verifying device receives an account for requesting password reset. When the account is invalid, the verifying device sends a fake identification and a first verification request to a requesting device. The verification request mentioned requests a user to determine whether to send verification information to a first communication address. The fake identification and the first communication address are associated with the first account. |
| US11388193B2 |
Systems and methods for detecting online fraud
Described systems and methods enable a swift and efficient detection of fraudulent Internet domains, i.e., domains used to host or distribute fraudulent electronic documents such as fraudulent webpages and electronic messages. Some embodiments use a reverse IP analysis to select a set of fraud candidates from among a set of domains hosted at the same IP address as a known fraudulent domain. The candidate set is further filtered according to domain registration data. Online content hosted at each filtered candidate domain is further analyzed to identify truly fraudulent domains. A security module may then prevent users from accessing a content of such domains. |
| US11388192B2 |
Managing third party URL distribution
A verification server comprising a memory and a processor programmed to execute instructions stored in the memory. The instructions include receiving a link registration request including a third-party link to a third-party server, validating the third-party server as a result of receiving the link registration request, generating a unique code as a result of validating the third-party server, and generating a custom link that includes the unique code. |
| US11388191B1 |
Mitigation of cyber attack by a moving object navigation and protection system using a signature
The rise of the connected objects known as the “Internet of Things” (IoT) will rival past technological marvels. This application discloses a novel cyber-attack mitigation technique for navigation and protection system of moving vehicles in cities, towns, country roads and freeways. The mitigation technique uses a signature stablished from all information data that received by navigation and protection system. The signature is based on a database table of fixed and variable data received by navigation and protection system (NPS). The NPS uses this signature database table to detect if a received data is valid and ignore it if identified as a cyber-attack. |
| US11388190B2 |
Anti-replay device based on memory space interchange
Disclosed herein are methods, systems, and apparatus, including computer programs encoded on computer storage media, for detecting and disabling replay attacks. One of the methods includes receiving a transaction to be completed in a blockchain. A current working section of memory storing transaction information that is designated for use in identifying past transactions already processed is determined, where the memory also stores a backup section providing, when used in combination with the current working section, an alternating memory section storage scheme for the transaction information. From the current working section, whether the transaction has previously been processed is determined. When it is determined that the transaction has previously been processed, the transaction is bypassed. When it is determined that the transaction has not previously been processed the transaction is processed and transaction information for the transaction is written into the current working section. |
| US11388185B1 |
Methods, systems and computing platforms for evaluating and implementing regulatory and compliance standards
A method of performing an online assessment of compliance with cyber-security risk and information security risk standards, comprising the steps of providing access to a user to a compliance navigator software tool, the compliance navigator software tool comprising a content management system an assessment module, an access control module, an audit module, and an automated testing module, presenting a plurality of assessment questions to the user by executing the assessment module, assessing answers to the plurality of assessment questions using the assessment module, the assessment module comprising machine-readable instructions stored on the non-transitory machine-readable storage medium, and displaying results of the assessment to the user. |
| US11388183B2 |
Systems and methods for tracking risk on data maintained in computer networked environments
Provided herein are systems and methods for risk tracking. A tracker engine executable on servers may provide, in a user interface, a plurality of categories of locations for files in a networked environment. The tracker engine may identify in the user interface risk categories of the files in each of the categories of the locations. The tracker engine may provide, in the user interface, types of egress points for the files. The tracker engine may generate links between the categories of the locations of the files, the risk categories of the files and the types of egress points for the files. Details about each of the files may be navigable from the user interface via a corresponding category of a location of the file, a corresponding risk category of the file or a corresponding type of egress point for the file. |
| US11388176B2 |
Visualization tool for real-time network risk assessment
The present disclosure relates to methods and apparatus that collect data regarding malware threats, that organizes this collected malware threat data, and that provides this data to computers or people such that damage associated with these software threats can be quantified and reduced. The present disclosure is also directed to preventing the spread of malware before that malware can damage computers or steal computer data. Methods consistent with the present disclosure may optimize tests performed at different levels of a multi-level threat detection and prevention system. As such, methods consistent with the present disclosure may collect data from various sources that may include endpoint computing devices, firewalls/gateways, or isolated (e.g. “sandbox”) computers. Once this information is collected, it may then be organized, displayed, and analyzed in ways that were not previously possible. |
| US11388175B2 |
Threat detection of application traffic flows
The present technology pertains to a system that routes application flows. The system can receive an application flow from a device by an active threat detection agent; analyze the application flow for user context, device context, and application context; classify the application flow based on the analysis of the application flow; and direct the application flow according to the classification of the application flow and an application access policy. |
| US11388171B2 |
Method, apparatus, and computer program product for installing and updating third party applications requiring variable host address identification in a group-based communication system
Embodiments of the present disclosure provide methods, systems, apparatuses, and computer program products that enable client devices to install integrations of a third party application that supports variable host address identification. |
| US11388170B2 |
Systems and methods for objective-based scoring using machine learning techniques
Certain aspects and features of the present disclosure relate to systems and methods that generate machine-learning models to predict whether user devices are likely to meet defined objectives. For example, a machine-learning model can be generated to predict whether or not a user device is likely to access a resource. In some implementations, a semi-supervised model can be used to determine to what extent user devices are predicted to satisfy the defined objective(s). For example, a resource-affinity parameter can be generated as a result of inputting various data points into a semi-supervised model. The various data points can be access from a plurality of data sources, and can represent one or more activities or attributes associated with a user. The value of the resource-affinity parameter can be evaluated to determine the extent to which the user is likely to meet an objective. |
| US11388159B2 |
Variable-step authentication for communications in controlled environment
A variable-step authentication system and a method for operating for performing variable-step authentication for communications in a controlled environment is disclosed. The variable-step authentication system may include a communication device and a server. The variable-step method includes steps for determining an authentication process that involves a number of authentication steps. The number of authentication steps is variable and dependent on a trust level associated with each participant in the communication. |
| US11388157B2 |
Multi-factor authentication of internet of things devices
A computer-implemented method, system and computer program product for utilizing multi-factor authentication to authenticate an Internet of Things (IoT) device. The identity credentials of neighboring IoT device(s) are obtained by the IoT device to be authenticated. Upon providing a request to the authentication system to prove its identity, the IoT device provides the authentication system a first factor credential, such as a username and password. The authentication system, upon confirming the accuracy of the first factor credential, challenges the IoT device to provide the second factor credential. After receiving the challenge from the authentication system to provide the second factor credential, the IoT device returns the second factor credential that was generated based on the obtained identity credentials from the neighboring IoT device(s). Upon determining that the received second factor credential includes the identity credentials from the minimum number of required neighboring IoT devices, the authentication system approves authentication. |
| US11388149B2 |
Method and apparatus for obtaining input of secure multiparty computation protocol
Privacy protection methods, systems, and apparatus, including computer programs encoded on computer storage media, are provided. One of the methods is performed by a first computing device and includes: obtaining a plurality of object IDs, wherein the plurality of object IDs include a target object ID; sending the plurality of object IDs to a second computing device storing a plurality of pieces of data respectively associated with the plurality of object IDs for the second computing device to generate a plurality of ciphertexts respectively based on the plurality of pieces of data; and executing a cryptography protocol with the second computing device to obtain a ciphertext corresponding to the target object ID from the plurality of ciphertexts generated by the second computing device, wherein the target object ID is unknown to the second computing device. |
| US11388148B2 |
System and method of anonymous sending of data from a user device to a recipient device
Disclosed herein are systems and methods for anonymous sending of data from a source device to a recipient device. In one aspect, an exemplary method comprises, by the source device: receiving a request to send data to the recipient device, processing the data such that an identifier of the user and identification data are not linked to the data to be sent to the recipient, and determining whether the identifier of the user is absent in the source device, when the identifier of the user is absent, generating the identifier of the user, sending the identifier of the user to a token generator, wherein the sent identifier comprises either the generated identifier or an existing identifier found during the determination of whether the identifier is absent in the source device, and sending, to the recipient device, a combination of a random token received from the token generator and the data. |
| US11388146B2 |
Secure low-latency trapdoor proxy
A proxy system is installed on a computing device that is in the network path between the device and the Internet. The proxy system, residing on the computing device, decrypts and inspects all traffic going in and out of the computing device. |
| US11388142B2 |
Detecting homographs of domain names
Various techniques for detecting homographs of domain names are disclosed. In some embodiments, a system, process, and/or computer program product for detecting homographs of domain names includes receiving a DNS data stream, wherein the DNS data stream includes a DNS query and a DNS response for resolution of the DNS query; applying a homograph detector for each domain in the DNS data stream; and detecting a homograph of a domain name in the DNS data stream using the homograph detector. |
| US11388139B2 |
Migrating firewall connection state for a firewall service virtual machine
For a host that executes one or more guest virtual machines (GVMs), some embodiments provide a novel virtualization architecture for utilizing a firewall service virtual machine (SVM) on the host to check the packets sent by and/or received for the GVMs. In some embodiments, the GVMs connect to a software forwarding element (e.g., a software switch) that executes on the host to connect to each other and to other devices operating outside of the host. Instead of connecting the firewall SVM to the host's software forwarding element that connects its GVMs, the virtualization architecture of some embodiments provides an SVM interface (SVMI) through which the firewall SVM can be accessed to check the packets sent by and/or received for the GVMs. |
| US11388137B1 |
Derivation of basic service set identifiers for access points
An access point of a network configured to derive basic service set identifiers (BSSIDs). The access point determines a base media access control (MAC) address associated with an access point. The access point computes an offset for at least one radio of the access point. The access point determines a radio-specific MAC address for the at least one radio of the access point by incrementing the base MAC address by the offset. The access point then derives a plurality of BSSIDs for the at least one radio of the access point based on the radio-specific MAC address. In some cases, the access point determines a radio from which a BSSID is provided based on the BSSID. |
| US11388135B2 |
Automated management server discovery
A host device comprises a processor coupled to a memory. Upon installation or update of a software program configured to execute on the host device and wherein a management operation is to be performed for the software program in conjunction with a management server, the host device is configured to send a query to a given system with which the host device interacts with respect to one or more operations different than the management operation. The host device is further configured to obtain from the given system, in response to the query, a reply with management server information previously stored on the given system, and then utilize the management server information obtained from the given system to communicate with the management server to perform the management operation. |
| US11388131B2 |
System and method for assessing the sensitivity of social network user populations to response time delays
A contact center is operated by reference to response time statistics and social media analytics. A method for identifying a user population's sensitivity to response time delay comprises monitoring social network messaging activity to identify user messages associated with the user population. In some embodiments, the activity relates to at least one of an entity or a product or service associated with the entity. The user population may be selected on the basis of a socio-demographic characteristic or on the basis of observable social networking behavior and/or sentiment over a prior selection phase. The method further includes selecting a loyalty transition boundary identified by detecting a difference in aggregate sentiment between a first group of users receiving a response delayed by a first time period and a second group of users receiving a response delayed by a second time period greater than the first time period. |
| US11388130B2 |
Notifications of action items in messages
In some implementations, a method includes extracting completion criteria of an action item and parameters of the completion criteria from a message portion of a user message between users. In response to determining, from sensor data provided by one or more sensors associated with a user, the user practices a routine; a routine-related aspect is generated from a user routine model of the user for the routine. In is inferred at least one of the extracted completion criteria of the action item is unsatisfied based on the extracted parameters and the identified routine-related aspect. Based on the inferring, a notification is provided to at least one user associated with the action item. |
| US11388127B1 |
Communication of messages of an application in an unlaunched state
In some implementations, a device of a user may receive user input indicative of a selection of an application implemented by the device. The user input may be received via a graphical user interface presented by the device. The user input may be received while the application is in an unlaunched state in which the user is unauthenticated for use of the application. The device may obtain, while the application is in the unlaunched state, one or more messages of the application. The device may cause, while the application is in the unlaunched state, information indicative of at least one message, of the one or more messages, to be displayed in the graphical user interface. |
| US11388126B2 |
Displaying customized electronic messaging graphics
A system according to various exemplary embodiments includes a processor and a user interface coupled to the processor, the user interface comprising an input device and a display screen. The system further comprises memory coupled to the processor and storing instructions that, when executed by the processor, cause the system to perform operations comprising: receiving, via the input device of the user interface, an electronic message comprising a scene identifier for a graphic; retrieving a user identifier for a user associated with the system; generating a customized graphic based on the scene identifier and the user identifier; and presenting the customized graphic within the electronic message via the display screen of the user interface. |
| US11388120B2 |
Parallel messaging apparatus and method thereof
An apparatus is for providing display of exchanged messages wherein the apparatus comprises a memory for storing the messages; and at least one processor for providing display of messages exchanged between a plurality of participants, the messages are exchanged within channels, wherein each of said participants exchanges messages with others of the participants in one or more channels in which message exchange between the plurality of participants is authorized; and any of the participants are prevented from exchanging messages in one or more channels when message exchange between the plurality of participants is not authorized; and allowing one of the participants sending one of the messages in one of the channels to send the one of the messages in parallel to another one of the channels. |
| US11388116B2 |
Augmented reality enabled communication response
The exemplary embodiments disclose a method, a computer program product, and a computer system for responding to communications based on context. The exemplary embodiments may include a user receiving a contextual communication, collecting data relating to an environment of the user, extracting one or more features from the collected data, and generating one or more responses to the received contextual communication based on the extracted one or more features and one or more models. |
| US11388114B2 |
Packet processing method and apparatus, communications device, and switching circuit
A packet processing method includes: a first device receives a packet from a second device; the first device determines a first queue buffer used to store the packet, and determines a first upper limit value of the first queue buffer based on an available value of a first port buffer and an available value of a global buffer, where the global buffer includes at least one port buffer, the first port buffer is one of the at least one port buffer, the first port buffer includes at least one queue buffer, and the first queue buffer is one of the at least one queue buffer. The first device processes the packet based on the first upper limit value of the first queue buffer, an occupation value of the first queue buffer, and a size of the packet. |
| US11388107B2 |
Method, apparatus, and system for locating root cause of network anomaly, and computer storage medium
A method, an apparatus, and a system for locating a root cause of a network anomaly in the field of network technologies comprises, when a PFC deadlock occurs in a first egress port queue in a network device, the network device determines an abnormal data flow in the first egress port queue based on an access control list, where both an egress port and an ingress port of the abnormal data flow are uplink ports of the network device. The first egress port queue is any egress port queue in the network device. The network device sends anomaly information to a network management device, where the anomaly information includes an identifier of the abnormal data flow. The network management device transmits the identifier of the abnormal data flow to a display device for display by the display device. |
| US11388103B2 |
Multi-chip system and data transmission method thereof
A multi-chip system and a data transmission method thereof are provided. The multi-chip system includes a first chip, a link unit, and a second chip. The first chip includes multiple transmitter (TX) channels and a first data processing module. The TX channels are configured to provide at least one transaction information. The first data processing module converts the at least one transaction information into at least one first data packet according to a general packet format and packs the at least one first data packet according to a specific packet format to generate a second data packet. The first data processing module merges two sets of second data packets into a third data packet and transmits the third data packet to the link unit. The second chip receives the third data packet through the link unit. |
| US11388101B2 |
Bit block processing method and node
Embodiments of the present invention provide a bit block processing method. The method includes: sequentially receiving a first tag bit block and N data bit blocks through a first port, where the first tag bit block includes a first length field; sequentially sending the first tag bit block and M data bit blocks in the N data bit blocks through a second port; and sequentially sending a second tag bit block and L data bit blocks in the remaining N−M data bit blocks of the N data bit blocks through the second port, where the second tag bit block includes a second length field, a value of the first length field is greater than a value of the second length field by M, and M, N, and L are all integers greater than or equal to 0. |
| US11388097B2 |
Setting device, parameter setting method, and storage medium storing program
A setting device to set a parameter for transmission queues at an Ethernet switch, the setting device including a processor. The processor is configured to assign associations between an attribute associated with a transmission frame and a plurality of the queues having different priorities, set a parameter for a high priority queue having a priority equal to or higher than a threshold based on an adverse condition transmission schedule having transmission timings less desirable than those of a preset transmission schedule, and set a parameter for a low priority queue having a priority of less than the threshold using processing that is different from processing for setting the parameter for the high priority queue. |
| US11388095B2 |
Service processing method, apparatus, and system
Embodiments of the present disclosure disclose a service processing method, an apparatus, and a system that relate to the field of communications technologies and are used to reduce resource waste. The method includes: controlling, by a controller, a first node to send a received packet to a processing network; and controlling, by the controller, the processing network to process the packet and then send a processed packet to a second node. The first node is a base station or a network element connected to the base station, and the second node is a routing function entity; or the first node is the routing function entity, and the second node is the base station or a network element connected to the base station. The routing function entity is an anchor point of an Internet Protocol IP address of a user. |
| US11388094B2 |
Uplink multi-user multiple-input and multiple-output (UL MU-MIMO) transmission request method in UL MU-MIMO communication
Provided is a method of transmitting and receiving a frame for a multi-user multiple-input and multiple-output (MU-MIMO) communication in an access point (AP), the method including transmitting, to each of a plurality of stations (STAs), an uplink multi-user request (UL MU request) frame requesting transmission of a data frame, and receiving, from each of the plurality of STAs, the data frame during an identical period of time based on an identical reception intensity, wherein the UL MU request frame includes at least one of information on a transmission time of the data frame and information on a reception intensity of the data frame in the AP. |
| US11388091B2 |
Small form factor pluggable unit with wireless capabilities and methods, systems and devices utilizing same
The present subject matter relates to one or more devices, systems and/or methods for providing wireless telecommunication services. A Small Form Factor Pluggable Unit (SFP) incorporates wireless capabilities, and includes an integrated or an external antenna. The SFP comprises wireless circuitry for transmitting and receive multiple and distinct wireless signals, including Wi-Fi and Bluetooth for communicating with various equipment, devices and/or networks. |
| US11388086B1 |
On demand routing mesh for dynamically adjusting SD-WAN edge forwarding node roles to facilitate routing through an SD-WAN
Some embodiments of the invention provide a method of facilitating routing through a software-defined wide area network (SD-WAN) defined for an entity. A first edge forwarding node located at a first multi-machine site of the entity, the first multi-machine site at a first physical location and including a first set of machines, serves as an edge forwarding node for the first set of machines by forwarding packets between the first set of machines and other machines associated with the entity via other forwarding nodes in the SD-WAN. The first edge forwarding node receives configuration data specifying for the first edge forwarding node to serve as a hub forwarding node for forwarding a set of packets from a second set of machines associated with the entity and operating at a second multi-machine site at a second physical location to a third set of machines associated with the entity and operating at a third multi-machine site at a third physical location. The first edge forwarding node serves as a hub forwarding node to forward the set of packets from the second set of machines to the third set of machines. |
| US11388084B2 |
Ethernet virtual private network attachment circuit aware virtual local area network bundle service
Techniques for routing traffic across different virtual local area networks (VLANs) within a single bridge domain are described. One technique includes receiving at a first network device a packet from a second network device on a first interface of multiple interfaces within a bridge domain at the first network device. Attachment circuit information associated with the packet is determined. An information element that includes an indication of the attachment circuit information is generated. The information element is transmitted to the third network device. |
| US11388080B2 |
Detecting false linkup states in Ethernet communication links
A system for detecting a false linkup state in an Ethernet communication link includes at least one processor programmed or configured to determine a block type of a block of bits received from a serializer/deserializer (SerDes), increment a first counter based on determining that the block type of the block of bits corresponds to a data block type or an error block type, determine whether the first counter satisfies a first threshold, enable a flag indicating that there is a false linkup state in an Ethernet communication link, and transmit a message indicating that there is a false linkup state for the Ethernet communication link to an Ethernet network device that is a link partner of the Ethernet communication link. A method and a computer program product are also provided. |
| US11388079B1 |
Testing forwarding states of network devices
A monitoring solution allows for testing of forwarding states on network devices. In a particular example, an agent on a router A directs a probe packet to a first neighbor device. The first neighbor device reflects the probe back to the router A. The reflected probe packet undergoes a forwarding state lookup similar to other network traffic and is routed to a second neighbor network device. The second neighbor network device reflects the probe back to router A, which can then intercept the packet and redirect it to an agent on router A for verification whether the lookup was performed correctly. |
| US11388076B2 |
Relay device and relay method
Monitoring for preventative maintenance using Simple Network Management Protocol (SNMP) polling suitable for a large scale network is realized. A controller of the present invention for use in a system that monitors a plurality of monitored apparatuses by SNMP polling includes a request duplication unit that duplicates an SNMP request from an operator terminal, and a request transmission unit that transmits the duplicated SNMP requests to the monitored apparatuses all at once. The controller includes a response calculation unit that calculates an operator response value from a response value of the monitored apparatus which is retained in an apparatus information database (DB) according to a monitoring policy retained in a monitoring policy DB. |
| US11388075B2 |
Per service microburst monitoring systems and methods for ethernet
Systems and methods in a node in an Ethernet network include, responsive to enabling burst monitoring between the node and a peer node in the Ethernet network, obtaining rate and burst size information from the peer node; configuring a counter at a traffic disaggregation point based on the rate and the burst size information, wherein the counter is based on a dual token bucket that is used to count out-of-profile frames in excess of a Committed Information Rate (CIR); and detecting a burst based on the out-of-profile frames during a monitored time interval. |
| US11388074B2 |
Technologies for performance monitoring and management with empty polling
Technologies for performance monitoring include a computing device having multiple processor cores. The computing device performs a training workload with a processor core by continuously polling an empty input queue. The computing device determines empty polling thresholds based on the empty polling workload. The computing device performs a packet processing workload with one or more processor cores by continuously polling input queues associated with network traffic. The computing device compares a measured number of empty polls performed by the packet processing workload against the empty polling thresholds. The computing device configures power management of one or more processor cores in response to the comparison. The computing device may determine empty polling trends and compare the measured number of empty polls and the empty polling trends to the empty polling thresholds. Other embodiments are described and claimed. |
| US11388071B2 |
Cloud launch wizard
One example method includes receiving an input that indicates selection of a cloud storage provider, receiving one or more product selection inputs, each of the product selection inputs indicating selection of a respective data protection product, receiving an input indicating an instance size, assembling the inputs together to define a data protection configuration, and automatically generating a script which, when executed by one or more hardware processors, deploys the data protection configuration in a cloud storage environment of the selected cloud storage provider. |
| US11388070B2 |
Method and system for providing service experience analysis based on network data analysis
A method and system for providing service experience analysis based on network data analysis is disclosed. According to the method, the NWDAF device can provide the service experience statistics or service experience prediction for an application or a network slice. |
| US11388067B2 |
Systems and methods for network-based media processing (NBMP) for describing capabilities
Systems and methods for media processing and streaming is provided, a method is performed by at least one processor that implements a workflow manager of a media system. The method includes obtaining a description that includes at least one descriptor that indicates capabilities of an entity of the media system, the entity being a media processing entity, a media source, or a media sink, and the entity including at least one processor; determining the capabilities of the entity based on the at least one descriptor; and managing a media processing workflow based on the determining. |
| US11388066B2 |
Adaptable real-time communications plugin for virtual desktop infrastructure solutions
A plugin works with a remote desktop client that is executing on a client computing device to present a user interface of a communications application that is executing in a cloud computing environment. The plugin enables the remote desktop client to conduct audio and/or video communication with a remote computing device in a peer-to-peer manner rather than via the communications application. The plugin also enables the remote desktop client to determine a hardware-based media processing capability of the client computing device and leverage such capability in conducting the peer-to-peer audio and/or video communication with the remote computing device. Such hardware-based media processing capability may be used, for example, to process media received from the remote computing device, to process media captured from a media source of the client computing device, or as a basis for negotiating a media communication parameter with the remote computing device. |
| US11388061B2 |
Automated OS networking configuration system
An automated operating system networking configuration system includes a plurality of switch computing devices, a server computing device, and a management subsystem that is coupled to the plurality of switch computing devices and the server computing device. The management subsystem determines that the server computing device is connected to a plurality of switch ports, identifies that the plurality of switch computing devices include the plurality of switch ports and, in response, retrieves switch port configuration information for the plurality of switch ports from the plurality of switch devices. Based on a physical topology provided by the plurality of switch computing devices connected to the server computing device via the plurality of switch ports and the switch port configuration information for the plurality of switch ports, the management subsystem determines an operating system networking configuration and transmits the operating system networking configuration to the server computing device. |
| US11388059B2 |
Connection device and connection method using priority level information for a plurality of processes
Provided is a technology for enabling smooth execution of a plurality of pieces of application software which perform communication via a communication path. A connection device includes: a storage unit which stores type priority level information for specifying a priority level assigned in advance for each type of a process, usable communication system information for specifying a usable communication system for each process, and sharing propriety information for specifying whether or not the communication system is sharable among a plurality of processes during the same period of time; a plurality of communication units which communicate to and from another device with use of the communication systems different from one another; and a communication system allocation control unit configured to identify the usable communication system and allocate, when the identified communication system is not sharable, the process to use the communication system based on the priority levels. |
| US11388058B2 |
System and method for a distributed computing cluster architecture
A system and method for managing a system topology of a distributed computing system comprising: providing a network of clusters with at least a first cluster and a second cluster; configuring the first cluster with an external gateway configuration of the second cluster; distributing the external gateway configuration across at least a subset of nodes of the first cluster; establishing a connection between all clusters from the network of clusters, which for the first and second cluster comprises: for each node of the first cluster, establishing a single outbound connection to a select node of the second cluster; and managing communication over the system topology comprising: at a receiver node of the second cluster, propagating a subscription interest, and at an origin node of the first cluster, transmitting communications over the connection according to the subscription interest. |
| US11388055B2 |
Data analytics on internal state
Various embodiments are described herein to track and/or update the state of components within a network element. One embodiment provides for a network management system comprising a collector node including an ingest gateway to receive configuration and status data of a set of network elements coupled to the collector node via the network, the collector node further to store the configuration and status data from the set of network elements in a distributed database; a search engine to locate and retrieve the configuration and status data of a specified subset of the network elements at a specified time period; and an interface server to receive a request for the configuration and status data from an external requester, the interface server to facilitate provision of the configuration and status data in response to the request. |
| US11388054B2 |
Modular I/O configurations for edge computing using disaggregated chiplets
Various approaches for deployment and use of configurable edge computing platforms are described. In an edge computing system, an edge computing device includes hardware resources that can be composed from a configuration of chiplets, as the chiplets are disaggregated for selective use and deployment (for compute, acceleration, memory, storage, or other resources). In an example, configuration operations are performed to: identify a condition for use of the hardware resource, based on an edge computing workload received at the edge computing device; obtain, determine, or identify properties of a configuration for the hardware resource that are available to be implemented with the chiplets, with the configuration enabling the hardware resource to satisfy the condition for use of the hardware resource; and compose the chiplets into the configuration, according to the properties of the configuration, to enable the use of the hardware resource for the edge computing workload. |
| US11388053B2 |
Programmable protocol parser for NIC classification and queue assignments
Technologies for controlling operation of a compute node coupled to a computer network via a computing device that includes communications for communicating with the computer network and persistent instructions such as firmware for providing control functions to the computing device, wherein the control functions being defined at least in part by protocol data. An update control module of the computing device may receive update data from a remote node in the computer network via the communications, wherein the update data comprising new protocol data for the persistent instructions. A protocol parser module may parse the update data and generate metadata relating to the update data. A classifier module may receive rules for the control functions, wherein the rules are based at least in part on the update data and metadata. A compiler may compile the parsed update data to the persistent instructions for providing new control functions to the computing device based at least in part on the received rules. |
| US11388052B2 |
Gateway device for monitoring deployed equipment
A system that provides for managing deployed resource interaction devices/equipment through a gateway device that is capable of monitoring the performance of the resource interaction devices/equipment to determine a need for revisions/updates to the resource interaction event application, additional services and/or different resource interaction devices types. |
| US11388049B2 |
Resource configuration method and apparatus, and computer storage medium
Disclosed are a resource configuration method and apparatus, and a computer storage medium, being used for enabling, when a remaining minimum system information control resource set and an associated synchronization information block are in a time division multiplexing mode, the configuration of the remaining minimum system information control resource set to be more flexible, being applicable to more application scenarios. The resource configuration method comprises: determining that a remaining minimum system information control resource set (RMSI CORESET) and an associated synchronization information block (SS Block) occupy different symbols for transmission in a time division multiplexing mode; and determining the configuration parameters of the RMSI CORESET and the associated SS Block, the remaining minimum system information control resource sets associated with the SS Blocks in each SS Block burst set having identical configuration parameters. |
| US11388047B1 |
Stateless control planes
The techniques disclosed herein improve existing systems by receiving, by a packet processor from a control node of the communications network, a request to program operations for processing data packets, the request received with opaque data comprising a state of the control node. The packet processor stores the operations and the opaque data in a data store of the packet processor. The packet processor receives from the control node a subsequent request to retrieve the opaque data. The packet processor sends to the control node the operations and the opaque data that were stored in the data store of the packet processor. The opaque data is not stored in the control node. |
| US11388046B2 |
Port configuration for cloud migration readiness
A method comprising discovering workload attributes and identify dependencies, receiving utilization performance measurements including memory utilization measurements of at least a subset of workloads, grouping workloads based on the workload attributes, the dependencies, and the utilization performance measurements into affinity groups, determining at least one representative synthetic workload for each affinity group, each representative synthetic workload including a time slice of a predetermined period of time when there are maximum performance values for any number of utilization performance measurements among virtual machines of that particular affinity group, determining at least one cloud service provider (CSP)'s cloud services based on performance of the representative synthetic workloads, and generating a report for at least one of the representative synthetic workloads, the report identifying the at least one of the representative synthetic workloads and the at least one CSP's cloud services including cloud workload cost. |
| US11388045B2 |
Virtual network element provisioning
A wireless communication network comprises network circuitry which hosts a Virtual Network Function (VNF). A VNF controller instantiates the VNF in the network circuitry and transfers instantiation information for the VNF to provisioning circuitry. The provisioning circuitry receives the instantiation information for the VNF and establishes a provisioning data link to the VNF. The provisioning circuitry transfers network provisioning data to the VNF over the provisioning data link. The VNF controller de-instantiates the VNF in the network circuitry and responsively transfers de-instantiation information for the VNF to the provisioning circuitry. The provisioning circuitry receives the de-instantiation information for the VNF and terminates the provisioning data link to the VNF. The VNF controller may comprise a Network Function Virtualization Management and Orchestration (NFV MANO) computer. |
| US11388044B1 |
Independent situational awareness for a network
A computer-program product, a system, and a computer-implemented method include a processor(s) obtaining a configuration of a network including configurations of multiple network nodes and configurations of the network communication devices. The program code automatically models the network to generate a system model. The program code derives, from the system model, a loop-free Bayesian inference model, by generating a loop-free Bayesian network from the network. |
| US11388040B2 |
Automatic root cause diagnosis in networks
An embodiment may involve: (i) obtaining a set of data records that include respective pluralities of tuples characterizing operation of communication sessions in a network and that identify hardware or software components related to the network that were involved in the communication sessions, (ii) determining degrees to which signatures in the pluralities of tuples are associated with communication problems in the network; (iii) identifying, from the degrees, a subset of the signatures most associated with the communication problems; (iv) grouping specific pairs from the subset of the signatures into equivalence classes based on co-occurrence of signatures of the specific pairs within the data records; (v) generating and pruning a dependency graph between the equivalence classes; (vi) from the equivalence classes remaining in the dependency graph, selecting a subset of the hardware or software components related to the network that are candidates for involvement with the communication problems. |
| US11388037B2 |
Systems and methods for providing managed services
Embodiments improve application gateway architecture by pushing secure managed service boundaries. Managed services that were previously available directly in application gateway code are separated from application gateway code and exposed to service clients in a controlled, secured manner via a RESTful API layer dedicated to the management and interaction of deployed managed services. The separation can be realized in management agents. A management agent receives a service request from an application and makes an API call to the dedicated management API layer of the managing application gateway. The application may run within a managed container on a user device. Responsive to the API call, the application gateway sends a control or configuration message to the management agent over HTTP. The management agent controls or configures the managed service to function or behave as dictated by the application gateway. |
| US11388032B1 |
Apparatuses and methods for pre-emphasis control
Apparatuses and methods for pre-emphasis control are described. An example apparatus includes a pull-up circuit and a pull-down circuit. The pull-up circuit is configured to receive a pull-up data activation signal and drive a data terminal to a pull-up voltage responsive to an active pull-up data activation signal. The pull-down circuit is configured to receive a pull-down activation signal and drive a data terminal to a pull-down voltage responsive to an active pull-down data activation signal. The example apparatus further includes a pre-emphasis circuit that includes a pre-emphasis timing control circuit configured to provide a timing control signal, and further includes a logic circuit. A pre-emphasis control signal based on at least one of the pull-up and pull-down data activation signals is provided to control providing pre-emphasis having a timing based on a mode of operation. |
| US11388026B2 |
Method and apparatus for sounding reference signal transmission on sidelink
Methods and apparatus for SL SRS transmission are disclosed. One method of a relay/remote UE comprises transmitting a SRS on a SL. The SRS is based on a SL SRS configuration which configures location information of the SRS in time-frequency domain. The transmission of SRS can be either periodic or aperiodic. Further, the SRS is a single SRS or a set of SRS. |
| US11388025B2 |
Search space set hashing under channel estimation capability
Methods, systems, and devices for wireless communications are described. A network device such as a next generation (gNB) may identify control information for transmission on a downlink control channel e.g., a physical downlink control channel (PDCCH). The network device may identify a candidate set of decoding candidates to which the control information is able to be mapped. In some examples, each decoding candidate may include one or more control channel elements (CCEs). The network device may select, from the candidate set of decoding candidates, an actual set of decoding candidates to which the control information is to actually be mapped, and map the control information into the actual set of decoding candidates. Upon decoding the control information, the network device may transmit the control information within a search space including the actual set of decoding candidates to a user equipment (UE). |
| US11388024B2 |
Communication network system
A communication network system includes a cloud server device connectable with an external device via a global network, and a gateway device. The gateway device includes a first communication section which communicates with the cloud server device via the global network; a second communication section which communicates with an internal device via a local area network; first and second communication controlling sections which respectively control the first and second communication sections; and a communication history storage section. After establishment of a session between the external device and the internal device under the control of the first and second communication sections by the first and second communication controlling sections, the communication history storage section stores communication history information about a history of the communication between the external device and the internal device. |
| US11388019B2 |
Function management apparatus, function management method and communication system
A function management device that manages, in a communication system including a plurality of pieces of customer premises communication equipment and a server capable of providing a function to the plurality of pieces of customer premises communication equipment, the function provided by the server, and includes a resource management unit configured to collect resource information from the plurality of pieces of customer premises communication equipment, a network management unit configured to collect, from the server, network band information of each of the functions, the network band being between the plurality of pieces of customer premises communication equipment and the server, and a function processing unit configured to activate a virtual machine on one of the plurality of pieces of customer premises communication equipment on the basis of the resource information and the network band information to cause a first function selected on the basis of a band occupancy ratio from among the functions provided by the server to be executed. |
| US11388017B2 |
Communication optimization systems of blockchain network, registration methods and message forwarding methods
Methods, systems, and apparatus for optimizing communication in a blockchain network. An example method includes establishing, by a first relay node in the blockchain network, a connection with a first blockchain node in the blockchain network in response to a connection request of the first blockchain node; receiving, by the first relay node, a registration request transmitted by the first blockchain node; generating, by the first relay node, a registration event based on the registration request; updating, by the first relay node, a local routing table based on the registration event; and forwarding, by the first relay node, a message of the first blockchain node to another relay node or another blockchain node in the blockchain network that is connected to the first relay node based on the local routing table. |
| US11388016B2 |
Information processing system, information processing device, information processing method, and recording medium
To provide an information processing system, an information processing device, an information processing method, and a recording medium capable of distributing special content for relieving a user's negative circumstances.According to the present disclosure, there is provided an information processing system including: a communication unit configured to receive at least current position information regarding a user; and a control unit configured to cause the communication unit, if the control unit determines that a predetermined area containing a position indicated by the current position information is an area that makes people staying in the predetermined area feel unpleasant, to distribute specific content to the user. |
| US11388015B2 |
Information processing device and method of controlling information processing device
A controller of an information processing device receives a packet via the network interface and performs a process corresponding to the received packet when the information processing device operates in the first power mode. The network interface performs a process of transmitting the received packet to the controller when the information processing device operates in the first power mode, and performs a process of discarding the received packet or the process of transmitting the received packet to the controller when the information processing device operates in the second power mode. The network interface has a storage area in which a discarding determination pattern is stored. The controller performs a process of updating a list of the discarding determination pattern to be stored in the network interface based on determination of whether a process on the received packet in the controller is a discarding process. |
| US11388006B2 |
Systems and methods for authenticated control of content delivery
The present disclosure provides systems and methods for authenticated control of content delivery. The method includes receiving a request for an item of content from a computing device, the request comprising a security token associated with the computing device and an identifier of a group of domains, identifying the group of domains from the identifier, and retrieving a security key associated with the group of domains. The method further includes decrypting a signature of the security token, identifying an authentication string, determining that the authentication string matches a server authentication string, and identifying characteristics of the security token. The characteristics of the security token include a confidence score. The method further includes comparing the confidence score of the security token to a threshold, determining that the confidence score does not exceed the threshold, and preventing transmission of content to the computing device. |
| US11388005B2 |
Connected gateway server system for real-time vehicle control service
Provided is a connected gateway server system for real-time vehicle control service that includes a vehicle terminal mounted on at least one vehicle; a gateway server relaying communication with the vehicle terminal; a connected gateway server for controlling a vehicle and acquiring a vehicle information in the form of REST API for each user through communication with the vehicle terminal, delivering a control command, a response information, and the vehicle information to the user's platform that has been validated as an API form, storing a terminal connection state information, an API authentication information, the vehicle information, and a user information, and performing a confirmation of update state and an update request of vehicle terminal; and an user platform for verifying validity in an API token manner through communication with the connected gateway server, fetching a necessary vehicle information in the API form or issuing the control command of vehicle. |
| US11388004B2 |
Systems and methods for preventing excess user authentication token utilization conditions in an enterprise computer environment
A system for preventing an excess user authentication token utilization condition in an enterprise computer environment, the system including an excess user authentication token utilization condition predictor operable for calculating a number of additional group memberships of each of the enterprise users that can be expected to result in an excess user authentication token utilization condition, a group membership estimator operable, for each the enterprise user, for estimating a number of additional group memberships of the enterprise user that will be created by an anticipated activity, and an anticipated excess user authentication token utilization condition alerter operable, before initiation of the anticipated activity, for providing an alert if the anticipated activity can be expected to result in an excess user authentication token utilization condition. |
| US11388001B2 |
Encrypted communication device, encrypted communication system, encrypted communication method, and program
An encrypted communication is correctly decrypted even when key exchange completion notification is delayed. A key storage (10) stores at least one common key which is shared with another encrypted communication device. A key selecting unit (11) selects an encryption key from the at least one common key stored in the key storage (10). An encrypting unit (12) generates encrypted data by encrypting, by using the encryption key, data to be transmitted to the other encrypted communication device. A transmitting unit (13) transmits, to the other encrypted communication device, the encrypted data with a key index, by which the encryption key is uniquely identified, added thereto. A receiving unit (14) receives the encrypted data with the key index added thereto from the other encrypted communication device. A key obtaining unit (15) obtains, from the at least one common key stored in the key storage (10), a decryption key corresponding to the key index added to the encrypted data. A decrypting unit (16) decrypts the encrypted data by using the decryption key. |
| US11387986B1 |
Systems and methods for encryption and provision of information security using platform services
Systems and methods are discussed for performing multi-key cryptographic operations. Policies can be received that define whether to perform a cryptographic operation with respect to various data items generated by one or more computing devices. The data items can be identified and compared to the policies to determine whether to perform the cryptographic operation on subsets of data items. The cryptographic operation can be performed with respect to a first subset of the data items using a first key, while the cryptographic operation can be performed with respect to a second subset of the data items using a second key. |
| US11387985B2 |
Transport occupant data delivery
An example operation includes one or more of receiving, by a transport, first data from an occupant device proximate the transport, modifying, by the transport, a location-based level of trust related to a type and an interaction of the received first data with the occupant device, and receiving, by the transport, second data based on the modified location-based level of trust and a proximity of the occupant device to the transport. |
| US11387984B1 |
Sharing grouped data in an organized storage system
A method including determining, by a first device, a sharing encryption key based at least in part on a group access private key associated with a group and an assigned public key associated with a second device; encrypting, by the first device, the group access private key associated with the group utilizing the sharing encryption key; and transmitting, by the first device, the encrypted group access private key to enable the second device to access the group. Various other aspects are contemplated. |
| US11387975B2 |
System and method for distributed coordination of duplex directions in a NR system
According to certain embodiments, a method in a first network node scheduling time-division-duplexing (TDD) transmission for a first cell is provided. The method includes receiving transmission direction planning information from a plurality of other network nodes scheduling TDD transmissions for other cells. At least one transmission direction plan of the first network node is adapted based on the transmission direction planning information received from the plurality of other network nodes. |
| US11387971B2 |
Method for determining system information of cell and terminal
Implementations of the present disclosure relate to a wireless communication method and a terminal device. The method includes: detecting, by a terminal device, a first type of Synchronous Signal Block (SSB) at a frequency on an asynchronous raster; determining, by the terminal device, a frequency domain position of a Control Resource Set (CORESET) of Remaining Minimum System Information (RMSI) associated with the first type of SSB based on the first type of SSB. |
| US11387970B2 |
Efficient BWP operation for sidelink operation
Apparatuses, methods, and systems are disclosed for selectively deactivating a bandwidth part. One apparatus 600 includes a transceiver 625 that receives 805 one or more UL BWP configurations and receives 810 a SL BWP configuration. Here, the one or more UL BWP configurations includes an active UL BWP and the SL BWP is associated with a first numerology. The apparatus 600 also includes a processor 605 that identifies 815 a second numerology of an active UL BWP and determines 820 whether the first numerology matches the second numerology. If the first numerology does not match the second numerology, the processor 605 selectively deactivates 825 one of the SL BWP and the active UL BWP. |
| US11387961B2 |
Short-form demodulation reference for improved reception in 5G and 6G
Short-form demodulation references disclosed herein may enable low-cost receivers to demodulate wireless messages while avoiding complex 5G and 6G protocols, thereby enabling a multitude of cost-constrained applications. Despite their small footprint, the short-form demodulation references enable the receiver to determine all of the amplitude and phase levels of the modulation scheme. In addition, noise and interference can be mitigated by embedding short-form demodulation references within longer messages, thereby providing an immediate refresh of the modulation calibrations, enhancing communication reliability, and avoiding costly message faults despite high background interference. Short-form demodulation references disclosed herein can be used as a default standard demodulation reference in 5G and 6G wireless messages. |
| US11387953B2 |
Method and apparatus for allocating HARQ-ACK channel resources supporting transmit diversity and channel selection
Examples of the present invention provide a method for allocating Hybrid Automatic Repeat Request Acknowledgement (HARQ-ACK) channel resources supporting transmit diversity and channel selection. The method includes: receiving, by a UE, Physical Downlink Control Channel (PDCCH) information and Physical Downlink Shared Channel (PDSCH) data from a base station through two Carrier Components (CCs); obtaining, by the UE according to specific indication information, Physical Uplink Control Channel (PUCCH) channel resources required for transmitting HARQ-ACK feedback information using a transmit diversity technique; and transmitting, by the UE, the HARQ-ACK feedback information on the obtained PUCCH channel resources adopting the transmit diversity technique. According to the method provided by the examples of the present invention, it is possible to allocate HARQ-ACK channel resources to the UE reasonably and avoid waste of channel resources in the premise that channel selection and SORTD technique are supported. |
| US11387940B2 |
Transmitting fragments of ethernet frame with indicating error occurring in ethernet frame
A method including a network device receives a plurality of fragments of an Ethernet frame, where the plurality of fragments include an initial fragment and a first fragment, and the initial fragment includes a destination media access control (MAC) address field, in response to an error that occurs in the Ethernet frame, changes the first fragment to a second fragment, where the second fragment includes second type indication information (TII) and second to-be-transmitted data (TBTD), the second TII indicates that a type of the second TBTD is a control character, a value of first TBTD is different from a value of the second TBTD, and the second TBTD indicates that an error occurs in the Ethernet frame, and the network device sends the second fragment to a destination device. |
| US11387937B2 |
Preamble with detectable WLAN version identification
Systems and methods for generating a control signal for automatic wireless network version detection of a transmission. The control signal enables a receiver to detect the wireless network version detection of the transmission, so that the proper wireless network version is used for interpreting signaling information and decoding of the payload of the transmission. In some examples, the control signal is within a preamble of the transmission. The wireless network version can be an IEEE 802.11 version, such as proposed IEEE 802.11be. The control signal is compatible with legacy systems and can indicate the legacy signaling information by way of a Legacy Signal (SIG) (L-SIG) symbol. In some examples, the control signal can indicate the wireless network version by using an identifier symbol which is generated from at least part of, but is not identical to, the L-SIG symbol. |
| US11387933B2 |
Dynamic transmission front end and digital-to-analog converter in modem
Methods, systems, and devices for wireless communications are described. A user equipment (UE) may receive a downlink control message from a base station indicating a modulation and coding scheme (MCS) associated with an uplink transmission, a number of layers associated with the uplink transmission, or both. The UE may determine to adjust (for example, reduce) a first number of bits based on the MCS, the number of layers, or both. The first number of bits may include an effective number of bits (ENOB) supported at a digital-to-analog converter (DAC) of the UE, a number of bits (NOB) supported at a transmission front end (TxFE) component of the UE, or both. The UE may transmit the uplink transmission to the base station according to the adjusted first number of bits. |
| US11387932B2 |
Systematic bit priority mapping interleaving for layers with different modulation orders
Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a transmitter may determine a first modulation order for a first layer of a communication and a second modulation order for a second layer of the communication, wherein the first modulation order and the second modulation order are different; interleave bits for one or more of the first layer or the second layer based at least in part on the first modulation order and the second modulation order; and transmit the interleaved bits via the one or more of the first layer or the second layer. Numerous other aspects are provided. |
| US11387929B1 |
Systems and methods for carrier phase recovery
A digital receiver is configured to process a polarization multiplexed carrier from a communication network. The polarization multiplexed carrier includes a first polarization and a second polarization. The receiver includes a first lane for transporting a first input signal of the first polarization, a second lane for transporting a second input signal of the second polarization, a dynamic phase noise estimation unit disposed within the first lane and configured to determine a phase noise estimate of the first input signal, a first carrier phase recovery portion configured to remove carrier phase noise from the first polarization based on a combination of the first input signal and a function of the determined phase noise estimate, and a second carrier phase recovery portion configured to remove carrier phase noise from the second polarization based on a combination of the second input signal and the function of the determined phase noise estimate. |
| US11387926B2 |
Efficient transfer of sensor data on dynamic software defined network (SDN) controlled optical network
Aspects of the present disclosure describe a computer implemented method for the transfer of sensor data on dynamic software defined network (SDN) controlled optical network. |
| US11387920B2 |
Methods and apparatuses for measuring the distance to a passive intermodulation source
According to methods of performing measurements to determine a distance to a passive-intermodulation (“PIM”) source, a first RF signal comprising a first frequency and a second RF signal comprising a second frequency may be applied to a device under test. A reference signal comprising a higher-order intermodulation-product of the first frequency and the second frequency may also be generated. An output signal from the device under test and the reference signal may be digitized and a calibration measurement may be applied. A phase difference between the device under test output and the reference signal may be determined. A plurality of phase differences may be determined for multiple first frequencies, and from the plurality of phase differences, a delay may be calculated, which may be multiplied by the velocity of propagation on the medium connecting the device under test to the test equipment to determine a distance to the PIM source. |
| US11387919B2 |
High frequency CMOS ultrasonic transducer
In described examples of a CMOS IC, an ultrasonic transducer having terminals is formed on a substrate of the IC. CMOS circuitry having ultrasonic signal terminals is formed on the substrate. At least one metal interconnect layer overlies the ultrasonic transducer and the CMOS circuitry. The at least one metal interconnect layer connects the CMOS circuitry ultrasonic signal terminals to the terminals of the ultrasonic transducer. |
| US11387918B2 |
Multi-tone communication system, multi-tone signal demodulation device thereof, and method thereof
A multi-tone communication system, a multi-tone signal demodulation device and a method thereof are provided. The multi-tone communication system includes a modulation device and a demodulation device. The modulation device can generate and broadcast a multi-tone audio signal corresponding to a control command. The demodulation device includes a sound receiving module, a data processor and a controller. The sound receiving module can receive the multi-tone audio signal. The data processor can process the multi-tone audio signal to obtain at least two tones carried on the multi-tone audio signal, and determine whether frequency drifts of the at least two tones are consistent, and if yes, the data processor decodes the at least two tones to generate an execution command. The controller executes the execution command. |
| US11387914B2 |
Two-way optical time transfer using a photonic chip
Embodiments herein describe sub-picosecond accurate two-way clock synchronization by optically combining received optical pulses with optical pulses generated locally in a photonic chip before the optical signals are then detected by a photodetector to obtain an interference measurement. That is, the optical pulses can be combined to result in different interference measurements. Optically combining the pulses in the photonic chip avoids much of the jitter introduced by the electronics. Further, the sites can obtain multiple interference measurements which can be evaluated to accurately determine when the optical pulses arrive at the site with femtosecond accuracy. |
| US11387906B1 |
Devices, systems, and methods for underwater laser communications
Systems, devices, and methods for underwater communications are disclosed. In particular, the present invention relates to laser-mediated underwater communications, in which one or more laser signals transmit encoded information from a transmitter to a receiver. Accordingly, at least one embodiment of the invention includes an underwater transmitter node that sends information to an underwater receiver node using one or more lasers. The one or more lasers may be focused on to the underwater receiver node using a lens, telescope, or the like. The one or more lasers may additionally have a wavelength in the blue-green portion of the visible spectrum, including specifically, for instance, 450 nm, thereby enabling the one or more lasers to transmit effectively underwater. In additional embodiments of the invention, the information transmitted between the underwater transmitter node and the underwater receiver node is an encoded digital transmission. The present invention also includes underwater systems having one or more communications nodes, one or more laser hubs, and one or more communications buoys, all of which can be linked together in a chain. |
| US11387904B2 |
Powered device and power sourcing equipment of optical power supply system, and optical power supply system
A powered device of an optical power supply system includes a photoelectric conversion element, a semiconductor laser for feedback and a control device. The photoelectric conversion element converts feed light into electric power, wherein the feed light is from a power sourcing equipment. The semiconductor laser oscillates with a portion of the electric power, thereby outputting feed light to a power supplying side. The control device monitors a power supply amount of the electric power to a load, and according to the power supply amount, controls an electricity-light conversion amount of conversion that is performed by the semiconductor laser. |
| US11387900B2 |
Optical wireless communication
An optical wireless communication (OWC) transmitter comprising a baseband chip comprises: a media access control (MAC) layer configured to receive data from a network; a first physical (PHY) layer associated with a first light source; and a second physical (PHY) layer associated with a second light source; wherein the first PHY layer is configured to receive first data from the MAC layer and provide a first signal to the first light source, so as to drive the first light source to emit first modulated light that comprises or is representative of the first data; and the second PHY layer is configured to receive second data from the MAC layer and provide a second signal to the second light source, so as to drive the second light source to emit second modulated light that comprises or is representative of the second data. |
| US11387894B2 |
Satellite receiver and satellite communication system
A satellite receiver includes: N reception antenna elements; N demultiplexing units; a correlation detection unit configured to perform correlation processing on each of reception signals demultiplexed by the N demultiplexing units with a reception antenna element that receives the highest power being set as a reference element so as to calculate a relative phase difference, and calculate an excitation coefficient for cancelling a phase difference between the N reception antenna elements for each of sub-channels based on the calculated relative phase difference; N phase compensation units configured to multiply the reception signals demultiplexed by the N demultiplexing units, respectively, by the excitation coefficient for each of the sub-channels; and a combiner configured to combine multiplication results from the N phase compensation units for each of the sub-channels to generate output signals. |
| US11387888B2 |
Precoding and feedback channel information in wireless communication system
The present invention relates to precoding and feedback channel information in wireless communication system. A method includes receiving a first Precoding Matrix Index (PMI) and a second PMI from a terminal; mapping one or two codewords into layers; precoding symbols mapped into the layers using a first precoding matrix derived from the first PMI and a second precoding matrix derived from the second PMI; and transmitting the precoded symbols to the terminal, wherein the reception of the first PMI is less frequent than the reception of the second PMI. |
| US11387887B2 |
Method and apparatus for generating a channel state information report
A method and apparatus are provided for generating a channel state information report having information corresponding to a set of layers. The method includes receiving a set of reference signals transmitted from a network including at least one base station. A set of beams are identified based on the set of reference signals. A pair of amplitude and phase coefficient vectors are obtained by transforming the received set of reference signals, wherein each pair of the amplitude and phase coefficient vectors corresponds to a beam in the set of beams in each layer of the set of layers. The layers from the set of layers are partitioned into a set of layer-groups. A beam bitmap vector is generated for each layer-group indicating a subset of a selected set of beams within the layer-group. A coefficient bitmap vector is generated for each of the selected set of beams in each layer indicating the coefficients with non-zero amplitude values, based on the beam bit map vector. The channel state information report is transmitted to the network, the channel state information report including at least the beam bitmap vector and the coefficient bitmap vector. |
| US11387886B2 |
Electronic device, method for same and information processing device
Provided are an electronic device for a network control terminal and a network node, and a method for the electronic device. The electronic device for a network control terminal comprises processing circuitry configured to set a first condition concerning a beam-forming capacity of a network node for determining the network node capable of serving as a relay node, and to generate control signaling of indication information comprising the first condition for indicating the network node served by the network control terminal. |
| US11387883B2 |
Estimator for determining updates to an estimated local state vector
An estimator that is part of a communication network including a plurality of nodes is disclosed. A centralized portion of the estimator includes one or more processors in wireless communication with the plurality of nodes that are part of the communication network, where the communication network includes one or more pairs of collaborating nodes, and a memory coupled to the one or more processors, the memory storing data into a database and program code that, when executed by the one or more processors, causes the centralized portion of the estimator to determine a local update and a collaborative update. The collaborative update is applied to the respective estimated local state vector for both nodes of the pair of collaborating nodes. |
| US11387879B2 |
PUCCH secondary cell deactivation in a wireless device
A wireless device receives a configuration of a physical uplink control channel (PUCCH) group. The PUCCH group comprises a PUCCH secondary cell with a secondary PUCCH and a secondary cell. A command indicating deactivation of the PUCCH secondary cell is received in a first subframe. In response to the deactivation of the PUCCH secondary cell, transmission of channel state information for the secondary cell in a second subframe that is eight subframes after the first subframe is stopped. Thee stopping does not occur before the second subframe. |
| US11387877B2 |
Device and method using adaptive codebook for dual beamforming feedback and wireless communication system including the same
A beamformee device includes a channel estimator, first and second beamforming matrix providers and a dimension reduction unit. The channel estimator receives a NDP through a channel, and obtains channel information of the channel based on the NDP. The first beamforming matrix provider provides wideband beamforming matrices based on the channel information. The dimension reduction unit generates equivalent channel information based on the wideband beamforming matrices. The second beamforming matrix provider provides beamforming matrices based on the equivalent channel information. The wideband beamforming matrices and the subcarrier beamforming matrices are fed back to the beamformer device. Any one or any combination of the plurality of wideband beamforming matrices and the plurality of subcarrier beamforming matrices are selected from codebooks. |
| US11387876B2 |
Communication devices and methods with beamforming training
A communication device (1) for RF-based communication with another communication device (2) comprises an antenna circuitry (10) configured to transmit and receive RF signals and beamforming circuitry (11) configured to perform beamforming and to control the antenna circuitry in a beamforming training phase to transmit and/or receive RF signals using one or more selected directive beams. The beamforming circuitry (11) is configured to perform beamforming training by controlling the antenna circuitry i) to transmit data using at least one first directive transmit beam, wherein the other communication device (2) is configured to listen using a first directive receive beam, said data including a second transmit beam information, and ii) to subsequently listen using a predetermined second directive receive beam for a response from the other communication device (2), which is configured to transmit, if the data transmitted in step i) have been received, a response using a second directive transmit beam indicated by the second transmit beam information. |
| US11387873B2 |
Reference resource indication techniques in wireless communications
Methods, systems, and devices for wireless communications are described. One or more reference signals may be transmitted by a user equipment (UE) that may be used by a base station for channel estimation and determination of one or more parameters to be used for subsequent uplink transmission of the UE. The base station may transmit an indication of uplink transmission parameters in an uplink grant that is transmitted to the UE. The UE may modify one or more subsequent reference signal transmissions based on the uplink grant received from the base station and a timing of the uplink grant relative to the one or more subsequent reference signal transmissions. The base station may determine a timing for the uplink grant based on a timing associated with the reference signal transmissions from the UE. |
| US11387871B2 |
Regularization of covariance matrix and eigenvalue decomposition in a MIMO system
A technique is provided including at least obtaining a noise and interference covariance matrix, performing scaling of the noise and interference covariance matrix, determining a sum of diagonal elements of the scaled noise and interference covariance matrix, performing a first spectral shift by the sum to the scaled noise and interference covariance matrix to obtain a first spectral shifted matrix, performing eigenvalue decomposition to the first spectral shifted matrix to obtain an eigenvalue matrix, performing a second spectral shift by the sum to the eigenvalue matrix, limiting the eigenvalue matrix to a diagonal matrix, and obtaining a new noise and interference covariance matrix adding the scaled noise and interference covariance matrix and eigenvalue pairs that are obtained based, at least partly, on the performed eigenvalue decomposition. |
| US11387867B2 |
Distributed microcontroller
A microcontroller includes a plurality of electronic functional circuits comprising a read-only memory (ROM) and a central processing unit (CPU) and an interconnection circuit. The CPU and the interconnection circuit are disposed in a mobile electronic device and the ROM is disposed outside the mobile electronic device. The interconnection circuit is configured to communicate with the plurality of electronic functional circuits. The communication with the ROM is wireless communication. |
| US11387862B2 |
Base station and communication method
A wireless communication terminal apparatus wherein CoMP communication can normally be performed without increasing the overhead of an upstream line control channel. In this apparatus, a spreading unit (214) primarily spreads a response signal by use of a ZAC sequence established by a control unit (209). A spreading unit (217) secondarily spreads the response signal, to which CP has been added, by use of a block-wise spread code sequence established by the control unit (209). The control unit (209) controls, in accordance with sequence numbers and a hopping pattern established therein, the circular shift amount of the ZAC sequence to be used for the primary spread in the spreading unit (214) and the block-wise spread code sequence to be used for the secondary spread in the spreading unit (217). The hopping pattern established in the control unit (209) is a hopping pattern common to a plurality of base stations that CoMP-receive the response signal. |
| US11387861B2 |
Method and apparatus for providing regulatory information in UWB system
In an embodiment, a method for providing regulatory information by a first device in an ultra-wide band (UWB) system is provided. The method includes indicating availability of the regulatory information to a second device; and providing the regulatory information to the second device based on the availability of the regulatory information, wherein the regulatory information includes at least one of a confidence level indicating a source of the regulatory information, a country code, a time stamp. |
| US11387859B2 |
Method and apparatus for mitigating image interference in a receiver
An improved superheterodyne receiver for a portable radio is provided. The receiver includes a frequency controller that applies pulse-shaped modulation to first and second LO signals in a synchronized manner. The frequency controller is steered by Artificial Intelligence (AI) based machine learning (ML) to determine first and second LOs that minimize image interference in the baseband signal. |
| US11387857B2 |
Dynamically reconfigurable frequency selective attenuator for radio frequency receiver front end
A wireless device including a receiver circuit coupled to a radio frequency receiver node, a frequency selective attenuator including an inductor and a first capacitor coupled in series to the radio frequency receiver node, and a second capacitor coupled in parallel with the first capacitor. The first capacitor has a first capacitance based on a blocker frequency and the second capacitor has a second capacitance that linearizes the frequency selective attenuator. A method of linearizing a frequency selective attenuator including detecting presence of a blocker signal, activating and programming a capacitor of the frequency selective attenuator to reduce a strength of the blocker signal, determining a frequency difference between the blocker signal and a receive frequency, and coupling a second capacitor to the frequency selective attenuator to linearize the frequency selective attenuator when the frequency difference is no more than an attenuation threshold. |
| US11387854B2 |
Human body communication interference rejection system
A communication interference rejection system, comprising a dual data rate (DDR) receiver operatively connected to a device connected to a body of a user. The DDR receiver is configured to receive a signal transmitted through the body of the user, with the signal comprising a relatively substantially small constant amplitude component and a relatively large sinusoidal or modulated interference component, said interference component due to human body antenna effect. The receiver integrates the signal and sample at a sampling time, with the sampling time defined as Ts=n/Finterference, wherein Finterference is the frequency of the modulated interference component and n is an integer. |
| US11387853B2 |
Radio frequency module and communication device
A radio frequency module includes: a module substrate; a first circuit component disposed on a first principal surface of the module substrate; and a second circuit component stacked on the first circuit component. Here, one of the first circuit component and the second circuit component includes a reception filter, the other of the first circuit component and the second circuit component includes a switch connected between an antenna connection terminal and the reception filter, and the second circuit component is connected to the first circuit component via a via electrode in the first circuit component or a side wiring on a side surface of the first circuit component. |
| US11387851B2 |
Radio frequency module and communication device
A module board including a first principal surface and a second principal surface on opposite sides of the module board, the first principal surface and the second principal surface each having at least one circuit component mounted thereon; a plurality of external-connection terminals; a first switching integrated circuit (IC) connected to an antenna connection terminal that is one of the plurality of external-connection terminals; and a second switching IC connected to the antenna connection terminal, the second switching IC being different from the first switching IC. In the above-described module board, the plurality of external-connection terminals are disposed on the second principal surface, and at least one of the first switching IC or the second switching IC is disposed on the second principal surface. |
| US11387850B2 |
Systems and methods for a multiband sensing platform
A multiband sensing system includes an active multiband sensing unit configured to transmit a radio frequency (RF) signal in multiple bands and communicate with a network. The active multiband sensing unit includes at least one transmitting antenna configured to transmit the RF signal. The multiband sensing system includes a passive multiband sensing unit including at least one receiving antenna configured to receive the RF signal, an acoustic actuator powered by the received RF signal including an actuating sensor element configured to actuate in response to receiving extracted modulated information of the RF signal, and an acoustic detector. The acoustic detector includes a detector transmitting antenna configured to backscatter a new frequency band signal to the active multiband sensing unit and a detector sensor element configured to sense data. The sensed data is modulated over the received RF signal to produce the new frequency band signal. |
| US11387847B2 |
Apparatus for time interleaving and method using the same
An apparatus and method for time interleaving corresponding to hybrid time interleaving mode are disclosed. An apparatus for time interleaving according to an embodiment of the present invention includes a twisted block interleaver configured to perform intra-subframe interleaving corresponding to time interleaving blocks; and a convolutional delay line configured to perform inter-subframe interleaving using an output of the twisted block interleaver. |
| US11387844B2 |
Data compression method, data compression apparatus, data decompression method, data decompression apparatus and data storage system
One aspect of the present disclosure relates to a data compression method. The method includes generating, by one or more processors, compressed data from data, wherein the compressed data includes one or more unduplicated values of the data and generating, by the one or more processors, index data from the data, wherein the index data includes indices indicative of storage locations for the unduplicated values. |
| US11387843B1 |
Method and apparatus for encoding and decoding of floating-point number
A method and apparatus for encoding and decoding of floating-point number is provided. The method for encoding is used to convert at least one original floating-point number to at least one encoded floating-point number. The method for encoding includes: determining a number of exponent bits of the at least one encoded floating-point number and calculating an exponent bias according to at least one original exponent value of the at least one original floating-point number; and converting an original exponent value of a current original floating-point number of the at least one original floating-point number to an encoded exponent value of a current encoded floating-point number of the at least one encoded floating-point number according to the exponent bias. |
| US11387842B1 |
System AMD method for a self-calibrating pipelined dynamic preamplifier for high speed comparators in a time-interpolating flash ADC
A system including a circuit, including a first preamplifier, a sampling switch, a regenerative latch, and a second preamplifier aligned in a pipelined sequence with the first preamplifier, wherein the first and second preamplifier are associated with dynamic comparator and configured to gain signal utilizing multiple cascaded gains and sample-and-hold stages including a plurality of phases. |
| US11387838B1 |
SAR analog-to-digital converter calibration
Embodiments of the present disclosure include techniques for calibrating analog-to-digital converters (ADCs), such as successive approximation register SAR ADCs. In one embodiment, a pattern is applied to the input of an ADC to produce digital output codes. Counts of the digital output codes are used detect errors and adjust a clock delay of a comparator in the ADC. In other embodiments, an ADC calibration circuit is coupled to a calibration algorithm executing on a remote server to calibrate one or more ADCs. |
| US11387836B2 |
Method for compensating electrical device variabilities in configurable-output circuit and device
A method has been disclosed that relates to electrical variability compensation technique for configurable-output circuits. The compensation technique can be applied to a generality of circuits whose output has to vary between two electrical limits spanning the range in between them according to a specific code given as input. A switching sequence that is process gradient-direction agnostic has been disclosed which limits variability. An electric device comprising a processing gradient-direction agnostic configurable-output circuit has been also disclosed. |
| US11387835B1 |
Phase-locked loop capable of compensating power noise
A phase-locked loop includes a bias circuit controlling a first bias current between a first power source and a first node according to a bias control signal; an oscillation circuit coupled between the first node and a second power source and generating an oscillation signal according to a current from the first node; a duplicate bias circuit controlling a second bias current between the first power source and a second node according to the bias control signal; an equivalent impedance circuit coupled between the second node and the second power source; a comparator circuit comparing voltages of the first node and the second node; a first variable current circuit controlling a current between the first node and the second power source; and a second variable current circuit controlling a current between the second node and the second power source. |
| US11387833B1 |
Differential digital-to-time converter for even-order INL cancellation and supply noise/disturbance rejection
A method of quantization noise cancellation in a phase-locked loop (PLL) is provided according to certain aspects. The PLL includes a phase detector having a first input configured to receive a reference signal and a second input configured to receive a feedback signal. The method includes delaying the reference signal by a first time delay, delaying the feedback signal by a second time delay, receiving a delta-sigma modulator (DSM) error signal, and adjusting the first time delay and the second time delay in opposite directions based on the DSM error signal. |
| US11387832B2 |
Circuit for eliminating clock jitter based on reconfigurable multi-phase-locked loops
A circuit for eliminating clock jitter based on reconfigurable multi-phase-locked loops includes multiple phase-locked loops, a data selector and a signal synthesizer. In a case of generating a clock signal with low jitter, output signals of two phase-locked loops are adjusted to be the same in frequency and phase, and output signals of other phase-locked loops are adjusted to be different from each other in frequency. The data selector selects output signals, and the signal synthesizer is enabled to superimpose and then average the first and second selected output signals, so as to obtain a clock signal with jitter eliminated. In a case of generating multiple clock signals with different frequencies, output signals of the multiple phase-locked loops are adjusted to be different from each other in frequency, to obtain multiple clock signals with different frequencies through the data selector without enabling the signal synthesizer. |
| US11387829B2 |
Integrated circuit and signal transmission method thereof
An integrated circuit and a signal transmission method thereof are provided. The integrated circuit includes a first power domain, a second power domain, and a weakly pull circuit. The first power domain is powered by a first power source, the second power domain is powered by a second power source, and the second power domain transmits a signal to the first power domain through a transmission path. The weakly pull circuit is signally connected to the transmission path. When the second power domain is in a power-off mode, the weakly pull circuit maintains the transmission path stably at a logic level to prevent unknown signals from entering the first power domain from the second power domain and disturbing the normal operation of the first power domain. |
| US11387828B2 |
Spin qubit quantum device read by impedance measurement
A spin qubit quantum device including: a data qubit and a measurement qubit made in a semiconducting layer and coupled to each other by a tunnel junction made in the semiconducting layer, each of which comprising a quantum dot and a control gate; an inductor coupled to the gate of one of the qubits or to another gate capacitively coupled to one of the qubits, the inductor, and a capacitor formed by said gate forming an LC circuit; a first input terminal coupled to the LC circuit and receiving a periodic control voltage of frequency fr substantially equal to the resonant frequency of the LC circuit; a voltage amplifier comprising an input coupled to the gate to which the inductor is coupled; an output terminal coupled to an output of the amplifier. |
| US11387824B1 |
Voltage-controlled varied frequency pulse width modulator
A voltage-controlled varied frequency pulse width modulator is provided, including a frequency-regulating voltage output device which receives a determining voltage, decides a resonant frequency according to the determining voltage and outputs an oscillation signal having the resonant frequency. A duty-ratio-regulating voltage output device receives the oscillation signal and a reference signal to determine a duty ratio through an inverting closed loop, so as to adjust the oscillation signal to have the duty ratio. By employing the proposed voltage-controlled modulator circuit with tunable frequency and varied pulse width of the present invention, a modulation signal having the determined resonant frequency and duty ratio is obtained. Moreover, the present invention can be further combined with gate drive waveform trend feedback designs to achieve superior power transmission efficiency of a wireless power transmission system to optimize the inventive effect of the present invention. |
| US11387817B2 |
Latch circuit, flip-flop circuit including the same
A master latch circuit, including a first p-type transistor, a first n-type transistor, and a second n-type transistor connected in series; a first node connected to the first p-type transistor and the first n-type transistor, and a NAND circuit configured to receive a signal of the first node and a clock signal and output a result of a NAND operation to a second node, wherein a gate of the first p-type transistor is connected to the second node. |
| US11387812B2 |
Drive circuit of electronic-switch series structure
This invention relates to a driving circuit with electronic switches in serial connection structure, and this driving circuit includes: electronic switch module and active drive module, electronic switch module includes: n pcs electronic switches in serial connection, and n pcs electronic switches D and S terminal connected in series in turn; active drive modules includes: n pcs active drive circuits; and in this invention, the power supply and the driving pulse signal of the electronic switch K2 to Kn are obtained successively from electronic switch K1, and the electronic switch K1 to Kn is on and off in turn; The n pcs electronic switches have nanosecond level of the switching performance of the active circuit, which are suitable for the high frequency high power gate drive circuit when n pcs electronic switches series structure is used. |
| US11387810B2 |
High-frequency module
A high-frequency module includes a substrate having a mounting surface, a laminated component disposed on the mounting surface, and a wiring, in which the laminated component includes a lower stage component, and an upper stage component disposed on the lower stage component, the lower stage component includes a lower surface 31 facing the mounting surface, an upper surface facing the lower surface 31 back to back, and a connection terminal 33 provided on the lower surface 31, the upper stage component includes a lower surface 41 facing the upper surface, and a connection terminal 43 provided on the lower surface 41, and the wiring is provided on the upper surface, and is connected with the connection terminal 43. |
| US11387802B1 |
Hybrid piezoelectric microresonator
A hybrid ferroelectric/non-ferroelectric piezoelectric microresonator is disclosed. The hybrid microresonator uses a ferroelectric layer as the actuator as ferroelectric materials typically have higher actuation coefficients than non-ferroelectric piezoelectric materials. The hybrid microresonator uses a non-ferroelectric piezoelectric layer as the sensor layer as non-ferroelectric piezoelectric materials typically have higher sensing coefficients than ferroelectric materials. This hybrid microresonator design allows the independent optimization of actuator and sensor materials. This hybrid microresonator design may be used for bulk acoustic wave contour mode resonators, bulk acoustic wave solidly mounted resonators, free-standing bulk acoustic resonators, and piezoelectric transformers. |
| US11387800B1 |
Method for dynamically adjusting weighting values to equalize input signal to generate equalizer output signal and associated parametric equalizer
A parametric equalizer includes a first parametric equalizer circuit, a second parametric equalizer circuit, a first multiplication circuit, a second multiplication circuit, an addition circuit, and a weighting control circuit. The first parametric equalizer circuit processes an input signal to output a first output signal. The second parametric equalizer circuit processes the input signal to output a second output signal. The first multiplication circuit multiplies the first output signal and a first weighting value to generate a first adjusted output signal. The second multiplication circuit multiplies the second output signal and a second weighting value to generate a second adjusted output signal. The addition circuit combines the first adjusted output signal and the second adjusted output signal to generate an equalizer output signal. The weighting control circuit dynamically adjusts the first weighting value and the second weighting value according to the equalizer output signal. |
| US11387797B2 |
Envelope tracking systems for power amplifiers
Envelope tracking systems for power amplifiers are provided herein. In certain embodiments, an envelope tracker is provided for a power amplifier that amplifies an RF signal. The envelope tracker includes an error amplifier that controls a voltage level of a power amplifier supply voltage of the power amplifier based on amplifying a difference between a reference signal and an envelope signal indicating an envelope of the RF signal. The envelope tracker further includes a multi-level switching circuit that generates an error amplifier supply voltage based on sensing a current of the error amplifier, and uses the error amplifier supply voltage to power the error amplifier. |
| US11387790B2 |
Power semiconductor device with charge trapping compensation
The disclosed technology relates generally to semiconductor devices, and more particularly to power semiconductor devices in which effects of charge trapping are compensated. A radio frequency (RF) power transmitter system comprises a RF power semiconductor device that outputs a time-varying gain characteristic from a RF signal input waveform originating from a digital input, wherein the time-varying gain characteristic includes a gain error associated with charge-trapping events having a memory effect on the RF power semiconductor device lasting longer than 1 microsecond. The RF power transmitter system further comprises circuitry configured to apply an analog gate bias waveform to the RF power semiconductor device based on the time-varying gain characteristic to reduce the gain error. |
| US11387788B2 |
Amplifier-embedded video surveillance IP speaker system
An amplifier-embedded video surveillance IP speaker system is disclosed. The present disclosure includes an IP video device, an IP audio device, and a sensor, wherein audio data of a monitor agent using a remote user terminal is transmitted to an amplifier-embedded IP speaker having an assigned IP address to then be output, or wherein a remote control command is transmitted to an amplifier-embedded IP speaker, thereby outputting a warning sound. |
| US11387787B2 |
Signal amplifier circuit, voltage converter and system
The invention relates to a signal amplifier circuit for amplifying a signal, in particular an audio amplifier circuit, includes at least one first amplifier transistor (Q1) and at least one second amplifier transistor (Q2), wherein the first amplifier transistor (Q1) and the second amplifier transistor (Q2) are connected to one another in a push-pull circuit and are fed by an amplifier voltage source (V+, V−); and one or more bias diodes (D1, D2) thermally coupled in each case to an associated amplifier transistor (Q1, Q2), wherein the bias diodes (D1, D2) are arranged in a parallel connection with respect to the amplifying transistors (Q1, Q2) to reduce or avoid a crossover distortion, wherein the bias diodes (D1, D2) are fed at least partly by a voltage source (UA) which is independent of the amplifier voltage source (V+, V−). The invention furthermore relates to a system and a voltage converter for providing an output-side DC voltage, including a first transformer (T1) and a second transformer (T2) connected to the first transformer (T1). |
| US11387784B2 |
Power amplification module
A power amplification module includes: a first bipolar transistor in which a radio frequency signal is input to a base and an amplified signal is output from a collector; a second bipolar transistor that is thermally coupled with the first bipolar transistor and that imitates operation of the first bipolar transistor; a third bipolar transistor in which a first control voltage is supplied to a base and a first bias current is output from an emitter; a first resistor that generates a third control voltage corresponding to a collector current of the second bipolar transistor at a second terminal; and a fourth bipolar transistor in which a power supply voltage is supplied to a collector, the third control voltage is supplied to a base, and a second bias current is output from an emitter. |
| US11387780B1 |
Oscillator device
An oscillator device includes a touchpad, and an oscillator that includes an oscillation core having a second terminal configured to output an oscillation signal generated by the oscillation core based on an input to a first terminal of the oscillation core, a first capacitor connected between the first terminal and a ground, and a second capacitor connected between the second terminal and the ground, where the first capacitor is connected to the touchpad, and where a total capacitance of the first capacitor is different from a total capacitance of the second capacitor. |
| US11387779B2 |
System and method for testing photosensitive device degradation
The performance of photosensitive devices over time may be tested by configuring a photosensitive device test system that includes a light source plate that exposes photosensitive devices within a container to a specified light intensity. The light intensity may be adjusted by a programmable power source according to one or more thresholds. A test may last for a set duration with performance measurements being taken at predetermined intervals throughout the duration. Feedback from the photosensitive device test system may be recorded to determine whether to increase light intensity, to stop testing, to continue testing, and whether one or more environmental conditions should be altered. Measurements may be sent to a client for analysis and display to a user. |
| US11387769B2 |
Power tool
A power tool includes a brushless motor including several windings, a drive circuit for driving the brushless motor, a detection device for detecting the brushless motor so as to obtain a load parameter corresponding to a load of the brushless motor, and a controller for outputting a first control signal to reduce current of the brushless motor in a first slope when the load parameter exceeds a first preset range. |
| US11387768B2 |
Direct-current power supply device, motor drive device, blower, compressor, and air conditioner
A direct-current power supply device includes a reactor, a bridge circuit that converts alternating-current voltage output from an alternating-current power supply, which is connected to the reactor, into direct-current voltage, a capacitor that smoothes the output voltage of the bridge circuit, a current detector that detects a first current flowing as an alternating current between the alternating-current power supply and the bridge circuit, a current detector that detects a second current flowing as a direct current between the bridge circuit and the capacitor, an overcurrent determination unit that determines on the basis of a detected first current value whether or not the first current is an overcurrent, and an overcurrent determination unit that determines on the basis of a detected second current value whether or not the second current is an overcurrent. The bridge circuit stops operating when a determination result of either the overcurrent determination unit or the overcurrent determination unit indicates an overcurrent. |
| US11387761B2 |
System and method for sinusoidal output and integrated EMC filtering in a motor drive
A motor drive that outputs a sinusoidal waveform utilizes power switching devices operable at high switching frequencies. The switching devices may be operated, for example, between twenty kilohertz and one megahertz. A first filter is included at the output of the motor drive which has a bandwidth selected to attenuate voltage components at the output which are at the switching frequency or multiples thereof such that the output voltage waveform is generally sinusoidal. Additional filtering is included within the motor drive to establish a circulation path for common mode currents within the motor drive. Further, a shield is provided adjacent to those components within the motor drive that may experience voltage or current waveforms at the switching frequency or multiples thereof to cause radiated emissions to establish eddy currents within the EMI shield rather than passing through the shield into the environment. |
| US11387758B2 |
Motor controller and image forming apparatus
A motor controller estimates an initial position of a magnetic pole of a rotor of a brushless DC motor in an inductive sensing scheme. The motor controller controls a drive circuit to apply an AC voltage to a stator winding at a first energization angle, and subsequently to apply an AC voltage to the stator winding at a second energization angle before a residual current flowing through the stator winding returns to zero. At each energization angle, the motor controller corrects a peak value of a current in the stator winding based on the residual current detected immediately before a voltage is applied to the stator winding or at a time when voltage application to the stator winding is started. Based on the corrected peak value, the control circuit estimates the initial position of the magnetic pole of the rotor. |
| US11387756B1 |
Motor controller with stall detection
A motor control system for controlling operation of a motor having a plurality of windings includes a gate driver to provide a control signal to one or more switching elements controlling a voltage applied to the plurality of windings and a Field Oriented Control (FOC) controller configured to generate a PWM signal for coupling to the gate driver, wherein the FOC controller comprises a d-axis control loop configured to generate an applied d-axis voltage and a q-axis control loop configured to generate an applied q-axis voltage. A stall detector is configured to calculate an estimate of the q-axis voltage and compare the applied q-axis voltage to a threshold based on the estimate in order to detect a stall condition of the motor. |
| US11387754B2 |
Control device and motor drive system
According to one embodiment, there is provided a control device including a determination unit, a correction unit and a drive controller. The determination unit determines whether a phase of a rotor of a stepping motor is ahead of or behind a target phase. The correction unit selects a correction value for a control value of a drive current of the stepping motor from among a plurality of correction values based on a determination result. The drive controller corrects the control value of the drive current with the selected correction value to drive the stepping motor. |
| US11387752B2 |
Washing machine for washing articles equipped with an electric drive unit to operate electric motors
A washing machine having a first single phase electric motor, a second single phase electric motor and an electric drive unit for the electric motors. The electric drive unit is connected to power supply lines and comprises three first legs, each leg comprising a pair of switches. Electrical terminals of the first electric motor are connected to the first and second legs of the electric drive unit and electrical terminals of the second electric motor are connected to the second and third legs of the electric drive unit. |
| US11387749B2 |
Vibration energy harvester
A vibration energy harvester includes: a fixed electrode unit having a plurality of comb-tooth electrodes; a movable electrode unit having a plurality of comb-tooth electrodes; a weight fixed to the movable electrode unit; and an adjusting weight mounting structure capable of mounting an adjusting weight for additionally adjusting a mass of the weight. |
| US11387748B2 |
Self-aligned dielectric liner structure for protection in MEMS comb actuator
In some embodiments, the present disclosure relates to a microelectromechanical system (MEMS) comb actuator including a comb structure. The comb structure includes a support layer having a first material and a plurality of protrusions extending away from a first surface of the support layer in a first direction. The plurality of protrusions are also made of the first material. The plurality of protrusions are separated along a second direction parallel to the first surface of the support layer. The MEMS comb actuator may further include a dielectric liner structure that continuously and completely covers the first surface of the support layer and outer surfaces of the plurality of protrusions. The dielectric liner structure includes a connective portion that continuously connects topmost surfaces of at least two of the plurality of protrusions. |
| US11387742B2 |
Full-bridge resonant conversion circuit
A full-bridge resonant conversion circuit comprises a full-bridge rectification unit, a resonant unit, a first transformer, a second transformer and a synchronous rectification unit, wherein the full-bridge rectification unit comprises a first connection end and a second connection end, the resonant unit comprises a first resonant inductor, a resonant capacitor and a second resonant inductor, the resonant capacitor is connected in series with the first resonant inductor or the second resonant inductor. The first transformer comprises a first primary winding connected in series with the first resonant inductor, and a first secondary winding. Also, the second transformer comprises a second primary winding connected in series with the first primary winding and connected with the second resonant inductor, and a second secondary winding connected in parallel with the first secondary winding, and the synchronous rectification unit is connected with the first secondary winding and the second secondary winding. |
| US11387740B1 |
Energy recycle circuit for flyback circuit and method thereof
An energy recycle circuit for a flyback circuit, the flyback circuit has a primary winding of a transformer a primary switch. The energy recycle circuit has an energy recycle branch coupled in parallel with the primary winding, and an integrated circuit having a plurality of pins. The energy recycle branch has an auxiliary switch and a clamp capacitor connected in series. Among the plurality of pins, a first pin receives an external supply voltage. A second pin is used as a power ground that is different from a primary power ground. A third pin is used to sense a branch current flowing through the energy recycle branch. A fourth pin is used to control an operation of the auxiliary switch. A fifth pin that is connected to an external resistor for setting a maximum ON-time threshold of the auxiliary switch. |
| US11387735B2 |
Half-bridge circuit with slew rate control
First and second n-channel FETs are connected in series between first and second terminals with an intermediate switching node. First and second driver circuits drive gates of the first and second n-channel FETs, respectively, in response to drive signals. The first driver circuit does not implement slew-rate control. A first resistor and capacitor are connected in series between the output of the first driver circuit and an intermediate node. A first electronic switch is connected between the intermediate node and the first terminal. A second electronic switch is connected between the intermediate node and the gate terminal of the first n-channel FET. A second resistor and a third electronic switch are connected in series between the gate terminal of the first n-channel FET and the switching node. A control circuit generates the drive signals and a first, second and third control signal for the first, second and third electronic switch. |
| US11387732B2 |
Efficient use of energy in a switching power converter
A system may include a power converter having a maximum allowable input power drawn from a power source, an energy storage element coupled to an output of the power converter at a top plate of the energy storage element, wherein the energy storage element is configured to store excess energy, and control circuity configured to, when an input power of the power converter exceeds the maximum allowable input power, cause excess energy stored in the energy storage element to be consumed by circuitry coupled to the output of the power converter, and in order to maintain positive voltage headroom for the circuitry coupled to the output of the power converter, selectively couple a bottom plate of the energy storage element to the power source such that excess energy stored by the circuitry coupled to the output of the power converter is consumed from the energy storage device when the input power of the power converter exceeds the maximum allowable input power. |
| US11387728B2 |
Linear motor and transport system using the same
A linear motor is provided. The linear motor according to an embodiment of the present disclosure may comprise: a primary member including a plurality of armature modules, each armature module including a magnet core including two or more protruding portions and a coil; and a secondary member including at least one magnet module. The primary member may be fixed and a movable member composed of the secondary member moves by generated thrust. And, along the moving direction, a first interval between first armature modules disposed in a first section may be different from a second interval between second armature modules disposed in a second section after the first section. |
| US11387727B2 |
Linear motors and wire bonding machines including the same
A linear motor is provided, including a moving magnet assembly including (i) a magnet track, (ii) a first plurality of permanent magnets coupled to the magnet track, and (iii) a second plurality of permanent magnets coupled to the magnet track and arranged below the first plurality of permanent magnets. The linear motor also includes a first coil assembly arranged above the moving magnet assembly. The first coil assembly includes a first plurality of teeth having first slots therebetween and a first plurality of coils at least partially disposed in at least a portion of the first slots. The linear motor also includes a second coil assembly arranged below the moving magnet assembly. The second coil assembly includes a second plurality of teeth having second slots therebetween and a second plurality of coils at least partially disposed in at least a portion of the second slots. |
| US11387726B2 |
Rotary table device
Disclosed is a rotary table device which accurately detects the position of a table rotating in relation to a bed over the entire circumference and whose assembly is facilitated by covering an armature assembly with an insulating layer for insulation between the bed and the table. In the rotary table device, a ring member having a ring scale extending over the entire circumference of the ring member is disposed around a lower part of the table having a field magnet extending over the entire circumference of the table. A sensor for reading the ring scale is disposed on the bed on which armature coils of the armature assembly are arranged in the circumferential direction to face the field magnet. |
| US11387723B2 |
Hot drop fastening of coated machine components
A method of hot drop fastening components and a product thereby made is described. Machine components are provided. A first machine component defines a passageway and carries a coating. The first machine component is caused to expand by delivering a predetermined amount of energy to the first machine component, wherein the predetermined amount of energy is based on a property of the coating. A second machine component is inserted into the passageway of the expanded first machine component. Thereafter, the first machine component is permitted to cool with the first machine component inserted in the passageway thereby fastening the first machine component with the second machine component by the first machine component contracting as it cools. Properties such as adhesion and/or rust prevention properties of a primer coating in a motor manufactured using a hot drop process are preserved during the hot drop process in the manufactured product. |
| US11387722B2 |
Method for manufacturing a rotary electric machine
A manufacturing method for a rotary electric machine is equipped with an insertion roller having an outer circumferential surface configured to contact a coil lead line in such a manner that the coil lead line is inserted into accommodating grooves of an insulator, a roller support section that rotatably supports the insertion roller, and a bending unit that performs a bending process to bend the coil lead line by coming into contact with the coil lead line so as to form a terminal part. |
| US11387720B2 |
Retaining apparatus, retaining method and insert method of wave winding coil
A wave winding coil (9) has a first linear part (11a), second linear part (11b), arm part (12) and turn part (13). A retaining apparatus (1) retains the first linear part (11a) along the axis line direction between middle pins (3b, 3b) of a middle body part (3), and retains the second linear part (11b) between upper pins (2b, 2b), middle pins (3b, 3b), and lower pins (4b, 4b), in a state where sections of both ends of the second linear part (11b) in the axis line direction deviate to each other in circumferential opposite sides of the wave winding coil (9) to the axis line direction of the wave winding coil (9) and in a state where a bent angle θb′ between the second linear part (11b) and the connecting part is smaller than a bent angle θa′ between the first linear part (11a) and the connecting part. |
| US11387719B2 |
Method of manufacturing rotary electric machine
An object of the present invention is to suppress reduction of insulation reliability between stator coils. A method of manufacturing a rotary electric machine according to the present invention is a method of manufacturing a stator including an insulating member intervening between a plurality of coil end portions each protruding from a stator core, the method including: a first step of disposing an interposed member to cover part of the insulating member between the plurality of coil end portions; and a second step of welding part of each of the plurality of coil end portions. |
| US11387717B2 |
Series wound direct-current motor driving device and equipment
The invention provides a series wound DC motor driving device and electrical equipment. The series wound DC motor driving device provided by the invention comprises a series wound DC motor, a DC power supply and a chopper, wherein the chopper comprises m chopping units; control signals comprise m unit control signals formed according to preset phase stagger rules and corresponding to the m chopping units separately, and each unit control signal comprises w switch control signals corresponding to w switch control ends in the corresponding chopping units; m pairs of power output terminals are formed at m first power output ends and m second power output ends of the chopping units correspondingly, and m pairs of external terminals of the series wound DC motor are connected with m pairs of power output terminals correspondingly one by one; m is a positive integer not smaller than 2, and w is 1, 2 or 4. |
| US11387711B2 |
Vehicle main electric motor
An air intake port has an opening part and an air intake port cover forming an air flow channel from the opening part to the air intake port. The air intake port cover has a guide plate to block the opening part and the air intake port from each other and leave an air flow path between the guide plate and an outer perimeter surface facing a vehicle body, a discharge port formed in the outer perimeter surface, a discharge port cover separating the discharge port and the air intake port from each other, and leaving an air flow path from the opening part to the discharge port, and a pair of cylindrical members, one end of each being connected to two holes formed in the discharge port cover, and the other ends facing each other in a travel direction, and tapering in cross-sectional area. |
| US11387709B2 |
Cooling module with axial fan and flow deflection region for vehicles
The invention relates to a cooling module including an axial fan for vehicles, in particular for electric vehicles, which is characterized in that a cooling module casing encloses the axial fan and a flow deflection region and a cooling airflow enters the cooling module through an intake plane and leaves the cooling module through an outflow plane, wherein the intake plane and the outflow plane are aligned at an angle alpha in relation to one another and the angle alpha as the inclination of the intake plane in relation to the outflow plane is formed greater than or equal to 55° and the cooling module casing has a rear wall, wherein the rear wall is arranged at an angle beta of at most 90° in relation to the outflow plane, so that a flow deflection region is formed in the cooling module casing between the intake plane and the outflow plane and the rear wall. |
| US11387706B2 |
Generator having a disconnect mechanism
A generator for comprising a rotor, an inner shaft, an outer shaft, and an actuation means. The inner shaft is at least partially disposed inside the outer shaft. The inner shaft is coupled to the outer shaft by means of a translatable drive connection. The actuation means is configured to actuate the second shaft towards a retracted position. The translatable drive connection is configured to allow a transfer of torque between the first and second shafts, and enables movement of the second shaft, relative to the first shaft, along its axis of rotation from an extended position to a retracted position, such that an input portion of the second shaft can be at least partially retracted in a retraction direction towards the rotor upon activation of the actuation mechanism. A disconnect mechanism disposed on the second shaft can therefore be disconnected upon retraction of the second shaft. |
| US11387705B2 |
Torsional mass tuned damper
A mass tuned damper for electric machines, particularly those with an external rotor and an internal stator in cantilever arrangement. The mass tuned damper includes a body with a predetermined mass and a mounting mechanism with a predetermined rigidity configured to couple the body onto a mounting surface of the stator. The mass tuned damper is configured, by varying the mass of body and/or the rigidity of the mounting mechanism, to oscillate at a first frequency equal to, but at least partially out of phase with, a resonance frequency of the stator. |
| US11387703B2 |
Stator of a waterproof motor and method for manufacturing the same
A method for manufacturing a stator of a waterproof motor includes disposing a first assembly in a mold where the first assembly includes a coil unit wound around an iron core assembly, and filling the mold with a thermosetting plastic which forms a housing after curing. The housing houses the coil unit and the iron core assembly. A recess is formed at one end of the housing. The method further includes disposing a second assembly in the recess of the housing where the second assembly includes a circuit unit, and filling the recess of the housing with a waterproof glue which envelopes the circuit unit after curing. According to the above, the stator of the waterproof motor is formed. |
| US11387701B2 |
Rotating electric machine having coils insulated by paper sheets with semi-conductive layers
A highly reliable rotating electric machine is provided in which the amount of charge discharged by partial discharge can be reduced while the machine is downsized by decreasing the thickness of insulation for coils, and it is possible to prevent paper flapping in coil end portions because of rotating wind produced by rotation of the rotor. The foregoing machine includes a stator coil including a coil conductor and a main insulation layer covering the coil conductor surface, a slot core which encloses the stator coil, and a first insulating paper sheet which is wound around the stator coil, adjoining the slot core, and a second insulating paper sheet which is wound around the stator coil, adjoining the main insulation layer, both the insulation paper sheets being placed between the stator coil and the slot core, wherein the first insulating paper sheet has a semiconductive layer abutting on the slot core and the second insulating paper sheet has a semiconductive layer located abutting on the stator coil, and an end portion of the second insulating paper sheet is exposed in an opening portion of the slot core. |
| US11387700B2 |
Electric conductor for use in electric machines
The invention relates to an electric conductor for use in electric machines, more particularly for producing windings for stators or rotors of electric machines, such as electric motors or generators. The conductor comprises an electrically conductive conductor core having a substantially rectangular cross-section and comprises two longitudinal end faces arranged opposite one another and two transverse end faces arranged opposite one another as well as a total longitudinal extension between a first end and a second end. The conductor further comprises at least one insulation layer, which is arranged around the full circumference of the conductor core at least over a predominant part of the total longitudinal extension of the conductor core. The at least one insulation layer predominantly consists of an extrudable, polymer, thermoplastic material selected from the group of aromatic polysulfones (PAES) or mixtures of aromatic polysulfones (PAES). |
| US11387698B2 |
Rotating-electrical-machine stator, and rotating electrical machine provided with same
A stator of a rotating electric machine includes a stator and a stator coil. The stator core has a plurality of slots. The stator coil is inserted into the plurality of slots. The stator coil includes two or more conductors. The two or more conductors are arranged such that a gap is generated between adjacent crossing conductors, the gap having a shape of a parallelogram. |
| US11387696B2 |
Tangential motor, tangential motor rotor and rotor core of tangential motor rotor
A tangential motor, a tangential motor rotor and a rotor core thereof are provided. The rotor core includes a rotor body and magnetic steel grooves provided on the rotor body. 2N magnetic isolation holes are provided in a rotor magnetic pole between every two adjacent magnetic steel grooves. The 2N magnetic isolation holes are symmetrically provided at two sides of a magnetic pole center line of the rotor magnetic pole. A width of each of the magnetic isolation holes increases from a circle center of the rotor body to an outer side of the rotor body. Outer side hole surfaces, close to the outer side of the rotor body, of the magnetic isolation holes are arc-shaped surfaces which are concentrically arranged with the rotor body. The rotor core is able to reduce the vibration noise of the motor and increase the efficiency of the motor. |
| US11387688B2 |
System and method for coded communication signals regulating inductive power transmissions
An inductive power outlet for wirelessly powering a power receiver is presented that comprises a voltage peak detector that is configured to detect voltage changes that are indicative of increase in a system resonant frequency. The inductive power outlet is configured to respond to detected voltage changes by shutting down or issuing a warning, and the voltage peak detector is further used to detect communication signals initiated by the power receiver to the power outlet. |
| US11387683B2 |
Composite integrated circuits and methods for wireless interactions therewith
An integrated circuit (IC) includes a first circuit layer that includes a first wireless power transfer (WPT) device, a first chip electrically connected to the first circuit layer, and a first tracking circuit disposed in the first chip. The first WPT device may be configured to extract energy from an electromagnetic signal and provide an output voltage. The first tracking circuit may be powered by the output voltage of the first WPT device and may output tracking data in response to an instruction extracted from the electromagnetic signal. |
| US11387682B1 |
Wireless charging antenna arrays with enhanced coil uniformity and methods of producing the same
Antenna array comprising: (i) a first conductive trace having a first cross-sectional area; (ii) a second conductive trace having a second cross-sectional area; (iii) an interposing insulating member having a first surface and an opposing second surface; and (iv) wherein the second cross-sectional area is less than the first cross-sectional area. Methods comprising: (i) providing a first insulating member; (ii) patterning a first conductive trace on the first insulating member; (iii) providing a second insulating member; (iv) patterning a second conductive trace on the second insulating member; (v) stacking and compressing the first insulating member, the second insulating member and a third insulating member; and (vi) where the first conductive trace has a cross-sectional area that is greater than a cross-sectional area of the second conductive trace. |
| US11387681B2 |
Charging station for mobile device with solar panel
A charging device configured to charge a mobile device through the solar cells integrated on the mobile device. The charging device converts wall power to light energy which can be absorbed by the solar cells and then converted to electricity for storage in the rechargeable battery of the mobile device. The charging device includes a light source configured to emit a light beam having a spectrum tuned to the spectral response of the solar cells. The charging device includes a proximity sensor for detecting the presence of a mobile device within the charging device housing and responsively signaling the activation of the light source. The charging device includes logic for wirelessly communicating with the mobile device as well as controlling the charging process in various stages and aspects. The light source may be LEDs that also serve to transmit light communication signals to the mobile device. |
| US11387679B2 |
Enclosure wireless charging
A system and method for wireless charging a wireless earbud. The wireless earbud having a body that includes a passive magnetic shield and a coil. The coil is wound around a portion of the body comprising the passive magnetic shielding. The wireless earbud receiving wireless energy in response to the placement of the body within an electromagnetic field, which results in the charging of a battery of the wireless earbud. |
| US11387672B2 |
Energy management system
Smart electricity monitors with unique identities placed at individual power outlets within a building communicate frequent power measurements to a service which determines, from this power usage data, which outlets are associated with occupied seats within the building. This occupancy information can be used to update an occupancy model for the building that is used to forecast the building's occupancy. Based on present occupancy, projected occupancy, and other data, in some instances, the building's thermostats can be controlled and unoccupied seats can be assigned dynamically. |
| US11387671B2 |
Load control system having a broadcast controller with a diverse wireless communication system
A load control system for controlling the amount of power delivered from an AC power source to a plurality of electrical load includes a plurality of energy controllers. Each energy controller is operable to control at least one of the electrical loads. The load control system also includes a first broadcast controller that has a first antenna and a second antenna. The first antenna is arranged in a first position and the second antenna is arranged in a second position that is orthogonal to the first position. The broadcast controller is operable to transmit a first wireless signal via the first antenna and a second wireless signal via the second antenna. Each of the energy controllers is operable to receive at least one of the first and second wireless signals, and to control the respective load in response to the received wireless signal. |
| US11387668B2 |
Dual drive electric vehicle with unlimited range drive capabilities
A system describing Unlimited Range Drive capabilities of electric vehicles using machine learning techniques, assisted by intelligent battery modules and high voltage continuous variable power plant, the intelligent battery and power plant modules work in harmony and continuously provide feedback to each other, causing a battery to recharge while the other is in use to drive, this charging/recharging process and dynamically switching battery in use is continued until physical life of batteries is exhausted approximately 10 to 15 years, dynamic coordination of modules with dynamic switching of batteries, achieves unlimited range drive capabilities which may exceed 1 million mile drive on a single high voltage battery charge, this platform can be implemented in larger chassis, light duty trucks, vans, heavy duty cargo tractor trailer, race cars, two/three wheelers and commercial public transportation buses, the system provides clean environment and reduces power drain from residential power grids. |
| US11387665B2 |
Component throttling power backup device charging system
A component throttling power backup charging system includes a chassis defining a chassis housing and a chassis air inlet to the chassis housing, at least one component located in the chassis housing and adjacent the chassis air inlet, and a power backup device located opposite the at least one component from the chassis air inlet. The power backup device determines that a charging condition has been satisfied. The power backup device then determines that a temperature of air being provided to the power backup device exceeds a threshold temperature and, in response, transmits a throttling instruction that is configured to cause throttling of the at least one component. The power backup device subsequently determines that the temperature of the air being provided to the power backup device no longer exceeds the threshold temperature and, in response, performs charging operations. |
| US11387662B2 |
Headset charging and data transmission system
The present disclosure provides a headset charging and data transmission system, which includes a headset and a charging device. The charging device includes a first controller, a first connector, a first switching device, and a second switching device. The first switching device is electrically connected to the first controller and the first connector, and the second switching device is electrically connected to the first controller and the first switching device. The first controller controls the second switching device to switch between the first and second voltages to provide a first data signal for the first switching device, so that the first data signal is output to the headphones via the first connector. |
| US11387660B2 |
Automatic charger
A sorting mechanism includes a flap that selects a first path connecting from a battery outlet of a charging section to a battery inlet of a first compartment section as a path to introduce a first battery to the first compartment section in a case of housing the first battery in the first compartment section, and that selects a second path connecting from the battery outlet of the charging section to a battery inlet of a second compartment section as a path to introduce a second battery to the second compartment section in a case of housing the second battery in the second compartment section. |
| US11387658B2 |
System and method for power distribution
A power distribution system including a first power module and a second power module. The first power module including a first power input receiving an input power, a first transformer receiving the input power and outputting a transformed power, a first power output configured to output the input power, a second power output configured to output the transformed power, and a pass-through output configured to output input power. The second power module including a third power input receiving the input power, from the pass-through output of the first power module, a fourth transformer receiving the input power and outputting the transformed power, a first power output configured to output the input power, and a second power output configured to output the transformed power. |
| US11387657B2 |
Method for controlling power ramps with prediction in intermittent power generation plants
The present invention relates to a method for controlling power ramps with prediction in intermittent power generation plants, such as, for example, a photovoltaic solar plant, which minimizes the storage capacity required for compliance with the maximum ramp requirements for power fluctuation as well as the cycling of said storage systems, thus extending its lifespan and also reducing associated energy losses, thus reducing investment costs in the plant, such that, in order to achieve the same maximum fluctuation ramp, a minor use is made of the energy storage system. |
| US11387656B2 |
Power generation amount prediction apparatus, power generation amount prediction method, system stabilization apparatus, and system stabilization method
To calculate the prediction of the power generation amount with high accuracy even when the amount of the track record data of the Generator power generation amount is insufficient or the amount of the weather track record data similar to the weather prediction result is small. A power generation amount prediction apparatus for predicting a power generation amount at a power plant that performs power generation by use of renewable energy, including: a model generation unit that generates a mathematical model of the power generation amount of the power plant in regard to each model generation time based on a weather track record and an output power track record in regard to the power plant; a similar track record data extraction unit that obtains a weather track record similar to weather prediction data and a corresponding output power track record as similar track record data; a model accuracy calculation unit that calculates accuracy of each of a plurality of mathematical models of the model generation unit in a weather condition similar to the weather prediction data; a model selection unit that selects a mathematical model to be used for the prediction by using the accuracy of each of the models; and a model output power prediction unit that predicts the power generation amount of the power plant by using the selected mathematical model. |
| US11387655B2 |
Battery energy storage system
A battery energy storage system for use in providing balancing services to an electrical power distribution network is set to monitor the state of charge (SoC) of a storage battery (26). If the SoC is within an optimal range (48), the balancing service is provided solely by charging and discharging the battery. If the battery SoC falls below a predetermined low threshold (52), a first non-battery asset is operated to increase power supplied to the network. Similarly, if the battery SoC rises above a predetermined high threshold (50), a second non-battery asset is operated to provide the balancing service. With this arrangement, requirements on the energy storage capacity of the battery are reduced. For the system to meet balancing service regulatory requirements, the battery need only remain capable of charging or discharging beyond each threshold (50, 52) for a period of time that covers that taken for the respective asset to reach operational capacity. |
| US11387652B2 |
Systems and methods for enhanced reactive power management in a hybrid environment
A system for controlling a hybrid power generation plant is provided. The system is programmed to receive current conditions at the plurality of power generating assets including a first asset type and a second asset type, determine a forecast for a period of time based at least in part on the current conditions, determine that a first asset of the first asset type of the plurality of power generating assets has an available uprate margin for production of a first amount of active power, determine that a second asset of the second asset type of the plurality of power generating assets has capacity to generate a second amount of reactive power, instruct the first asset to reduce production of reactive power by the second amount and increase production of active power by the first amount, and instruct the second asset to increase production of reactive power by the second amount. |
| US11387649B2 |
Operating circuit having ESD protection function
An operating circuit is provided. A first N-type transistor determines whether to create an open circuit between a core circuit and a ground terminal according to the voltage level of a specific node. An electrostatic discharge (ESD) protection circuit is coupled between an input/output pad and the core circuit to prevent an ESD current from passing through the core circuit. The ESD protection circuit includes a detection circuit and a releasing element. The detection circuit determines whether there is an ESD event at the input/output pad and generates a first detection signal according to the detection of the ESD event at the input/output pad. The releasing element provides a release path according to the first detection signal to release the ESD current. A control circuit controls the voltage level of the specific node according to the first detection signal. |
| US11387648B2 |
Electrical overstress protection with low leakage current for high voltage tolerant high speed interfaces
High voltage tolerant electrical overstress protection with low leakage current and low capacitance is provided. In one embodiment, a semiconductor die includes a signal pad, an internal circuit electrically connected to the signal pad, a power clamp electrically connected to an isolated node, and one or more isolation blocking voltage devices electrically connected between the signal pad and the isolated node. The one or more isolation blocking voltage devices are operable to isolate the signal pad from a capacitance of the power clamp. In another embodiment, a semiconductor die includes a signal pad, a ground pad, a high voltage/high speed internal circuit electrically connected to the signal pad, and a first thyristor and a second thyristor between the signal pad and the ground pad. |
| US11387647B2 |
Continuous cascode voltage control for protection of low voltage devices
Methods and apparatuses for protecting a low voltage (LV) circuit implemented with LV transistors are presented. Protection is provided via a protection circuit operating in a high voltage domain defined by a varying supply voltage and a reference ground. The protection circuit generates high side, VH, and low side, VL, voltages to the LV circuit, while protecting the LV circuits from high voltage and maintaining a minimum difference voltage, VH−VL. The protection circuit generates the difference voltage based on a voltage across a resistor of a resistor ladder that is coupled between the varying supply voltage and the reference ground. The protection circuit includes a clamp circuit that limits the minimum difference voltage for low values of the supply voltage. The protection circuit generates the difference voltage according to a nonlinear transfer function of the supply voltage that includes two linear segments having different slopes and a nonlinear segment that provides a continuous and smooth transition between the two linear segments. |
| US11387645B2 |
Apparatus and method for adaptive active current limit protection
An apparatus and method for providing a selectively reduced voltage to a portable electronic device are disclosed. When a determination is made that an output voltage from a voltage source exceeds a predefined maximum permitted voltage, a plurality of circuitries, including an adaptive active current limiting circuitry, are enabled in order to derive the reduced voltage from the output voltage. The reduced voltage is at least at or below the predefined maximum permitted voltage and is supplied to the portable electronic device by battery circuitry that includes the active current limiting circuitry. |
| US11387644B2 |
Magnetically saturable components and circuits
Embodiments described herein are directed to inrush current limiters having a transformer. In one embodiment, an inrush current limiter includes a transformer including a primary winding, a secondary winding and a saturable magnetic core shared therebetween, a resistor connected in parallel with the secondary winding, wherein an impedance of the resistor is reflected across the transformer when a voltage is applied across the primary winding and the saturable magnetic core is not saturated, and a diode connected between the primary winding and ground. |
| US11387642B2 |
Overcurrent sense control of semiconductor device
A control device includes a current detecting section that detects a sense current for a current flowing through a semiconductor element; a transient sensing period detecting section that detects a transient sensing period from a transient rising to a transient falling of a detection signal of the sense current, in response to the semiconductor element being turned ON; and a control section that controls the semiconductor element according to a detection result of the transient sensing period, based on the sense current detection signal. By detecting the transient sensing period with the transient sensing period detecting section and controlling the semiconductor element with the control section according to the transient sensing period detection result, based on the sense current detection signal, it is possible to identify overcurrent according to the transient response detection result of the sense current during the transient sensing period, and to actively protect the semiconductor element. |
| US11387639B2 |
Electrical box cable connector
An electrical box assembly having an electrical box and a cable connector is provided. The cable connector includes a mounting bracket cable retaining member and a cable stop. The mounting bracket is secured to or integral with a side wall of the electrical box. The cable retaining member is secured to the mounting bracket and has a cable gripping portion extending into a cable receiving zone of the box. The cable stop extends from a bottom wall of the electrical box into the cable receiving zone. The cable stop permits one or more electrical wires from an electrical cable to pass through the cable stop while blocking sheathing of the electrical cable from passing through the cable stop. The cable gripping portion can engage the electrical cable inserted into the cable receiving zone from an exterior of the electrical box so that the cable retaining member is able to flex while the electrical cable passes into the cable receiving zone imparting little resistance to the forward advancement or movement of the electrical cable within the cable receiving zone, while imparting sufficient resistance to rearward movement of the electrical cable to prevent withdrawal of the electrical cable from the cable receiving zone. |
| US11387637B2 |
Modular hybrid closure
A hybrid cable distribution system wherein a feeder cable is received by a box. The feeder cable can be a hybrid cable including optical fibers and copper wire (coax). The box may be used only for copper signal handling (such as coaxial signal handling), and then at a later date, the box may be used for receiving fiber signals. Customers can directly connect to the feeder fan out device by connecting a tail of a drop splice module that is spliced to an individual distribution cable to the feeder fan out device. This connection creates a point-to-point connection. The number of fan out devices in the system can be increased or decreased as needed. Alternatively, a splitter input can be connected to the feeder fan out device, such as through a pigtail extending from the splitter, wherein the splitter splits the signal as desired into a plurality of outputs. The outputs of the splitters can be in the form of connectors or adapters. The connectors or adapters are then connected to tails of drop splice modules that are spliced to individual distribution cables so that customers can receive a split signal. The cable distribution system allows for mixing of connection types to the customer(s) such as a direct connection (point-to-point), or a split signal connection. Further, the types of splitters can be mixed and varied as desired. Further, the types of fan out devices can be mixed and varied as desired. |
| US11387634B2 |
Portable hand tool
Tools for operating on an object, such as a wire or cable are provided. The tool includes a housing and a working head assembly. The working head assembly has a movable section and fixed section secured to the housing. The movable section has a first end movably secured to a first end of the fixed section. The movable section has a second end that is releasably secured to a second end of the fixed section using a latch pin. The working head assembly also includes a latch pin stop that is positioned in the second end of the movable section. The latch pin stop is configured to prevent the latch pin from releasably securing the movable section to the fixed section until the movable section is properly aligned with the fixed section. |
| US11387625B2 |
Pulse width check circuit for laser diode pulse generator
A pulsed signal generator generates a pulsed signal having a pulse width intended to be equal to a given fraction of a pulse width of a reference clock. A reference current source outputs current having a reference magnitude, and a comparison current source outputs current having a magnitude that is a function of the reference magnitude and the given fraction. A comparison circuit compares a total current output by one of the reference current source and the comparison current source during pulses of the reference clock to a total current output by the other of the reference current source and the comparison current source during pulses of the pulsed signal equal in number to the pulses of the reference clock in order to determine whether the pulse width of the pulse signal is less than or equal to the given fraction of the pulse width of the reference clock. |
| US11387624B2 |
Resonant laser driver
A laser emitter circuit comprises a laser diode; a driver circuit configured to generate a drive signal; and a resonant circuit coupled to the driver circuit and the laser diode, wherein the resonant circuit is configured to use the drive signal of the driver circuit to generate a continuous wave sinusoidal drive signal to drive the laser diode. |
| US11387621B2 |
Methods and devices for laser beam parameters sensing and control with fiber-tip integrated systems
A sensing method for in-situ non-perturbing measurement of characteristics of laser beams at the exit of the laser beam delivery fiber tips include measuring power of a laser beam transmitted through delivery fiber tip in fiber-optics systems. A sensing devices for in-situ non-perturbing sensing and control of multiple characteristics of laser light transmitted through light delivery fiber tips includes a fiber-tip coupler comprised of a shell with enclosed delivery fiber having a specially designed angle-cleaved endcap and one or several tap fibers that are specially arranged and assembled at back side of the endcap and other variations. Methods and system architectures for in-situ non-perturbing control of characteristics of laser beams at the exit of the laser beam delivery fiber tips include fiber-tip couplers and sensing modules that receive laser light from tap fibers, and systems for optical processing to enhance light characteristics suitable for in-situ measurement. |
| US11387620B2 |
Compact Raman laser capable of efficient operation at low peak powers with good beam quality
An apparatus includes at least one Raman medium configured to receive a pump beam and shift at least a portion of the pump beam into a Stokes-shifted output beam. The apparatus also includes a first lens configured to receive and focus the pump beam into the at least one Raman medium. The apparatus further includes first and second retro-lens assemblies, each including at least one prism configured to reflect beams from the at least one Raman medium back into the at least one Raman medium and multiple second lenses configured to control optical propagation of the beams entering and exiting the at least one Raman medium. Multiple pairs of lenses form multiple confocal arrangements of lenses. The pairs of lenses include the first lens and the second lenses of the retro-lens assemblies. The at least one Raman medium is optically positioned between the lenses in the confocal arrangements of lenses. |
| US11387615B2 |
Helical cable assembly tooling and method
Aspects of the technology relate to rotational electromechanical systems, in which data and or power are supplied to components while one part of the system is rotating relative to another part of the system. Repeated rotation may create strain on or otherwise cause the cables to intermittently or permanently fail. A helical cable management system is provided that enables full rotation to the extent permitted. One or more cables are wound in a helical shape around the axis of rotation, which distributes the deformation of the cable along the helical length. Rotation in one direction causes the helix diameter to increase, while rotation in the other direction causes the helix diameter to decrease. A structure is used to maintain the distance between helical turns, while permitting the increase and decrease of the helix diameter. This reduces the overall strain on the cables, which can significantly extend their useful lifetime. |
| US11387610B2 |
Mechanical interlock with enhanced features
A mechanical interlock including one or more features to facilitate easier assembly and/or manufacturing. Additionally, and/or alternatively, the mechanical interlock may include one ore more features to provided increased protection. The mechanical interlock may include a baseplate arranged and configured to receive one or more components thereon so that the components can be coupled and wired as a sub-assembly prior to inserting into the enclosure. The mechanical interlock may include an adapter positioned between a connector and a contact carrier bracket to enable variously sized connectors to be coupled to a common contract carrier bracket. The adapter may include one ore more keys to prevent improper coupling of the adapter. The contact carrier bracket may be arranged and configured to receive one or more PCBs to provide an increased level of protection for the PCB. |
| US11387598B2 |
Electrical connector assembly with modular cooling features
An electrical connector assembly includes a connector housing defining a cavity in which at least two electrical terminals are interconnected. The connector housing defines an opening configured to receive a cover that is configured to protect the at least two electrical terminals and thermally manage heat within the cavity. The connector housing may be configured to receive one cover configuration of a plurality of different cover configurations. A first cover configuration in the plurality of different cover configurations provides different mechanism to thermally manage heat within the cavity electrical connector assembly than a second cover configuration in this plurality of different cover configurations. |
| US11387596B1 |
Outdoor electrical outlet cover
An outlet enclosure for enclosing an electrical outlet including a door to cover the electrical outlet. The outlet enclosure includes a base plate and an outlet cover which wraps partially around the electrical outlet to allow access to the door. The outlet cover includes tracks extending in a vertical direction along an outer surface of the outlet cover. An outer cylindrical cover wraps completely around the outlet cover. The outer cylindrical cover slides vertically via the tracks over the outlet cover from a lowered position fully enclosing the outlet cover to a raised position exposing the outlet cover and the door to allow access to the electrical outlet so that a plug can be inserted into a socket of the electrical outlet. When the outer cylindrical cover is lowered, it protects the electrical outlet from exposure to the elements. |
| US11387595B2 |
Connector arrangement with environmental and electrical protection
A system for making an autonomous connection between a first electrical contact and a second electrical contact includes a first receiver with the first contact therein and a second receiver with a second contact therein. The receivers are at least partially disposed within respective first and second housings. A first cover is disposed over an opening of the first housing and a second cover is disposed over an opening of the second housing. The covers seal the ends of the housings and the ends of the receivers, providing a double seal to the contacts. As the receivers are moved toward each other, the covers are automatically moved out of engagement with the receivers and housing. As the receivers are moved away from each other, the covers are automatically moved back into engagement with the housings and receivers. |
| US11387591B2 |
Plug connector module for an industrial plug connector
A plug connector module is provided for a modular industrial plug connector, wherein the plug connector module is formed from at least two independent functional units. In order to fit a holding frame with a plug connector module, a first functional unit is first of all combined with at least one second functional unit so as to form a plug connector module, and the plug connector module is then inserted into the holding frame. |
| US11387586B2 |
High voltage (HV) terminal frame and method of manufacturing the same
A single-piece high voltage (HV) terminal frame includes a top wall, a bottom wall, and a side wall extending between the top wall and the bottom wall. The top wall includes a first top wall layer and an adjacently located second top wall layer. The side wall includes a first side wall layer and an adjacently located second side wall layer. The bottom wall includes a first bottom wall layer and an adjacently located second bottom wall layer. A single-layer contact spring extends from the first top wall layer, wherein the single-layer contact spring is bent to extend into a space located between the top wall and the bottom wall. |
| US11387584B1 |
Contact pin for testing semiconductor IC for high speed signal, spring contact including same, and socket device
A contact pin, a spring contact including the same, and a socket device are proposed, in which the contact pin has a minimum length suitable for testing a semiconductor IC for a high speed signal and allows the spring contact to secure a maximum compression distance. The contact pin (100) includes: a plate-shaped body part (110) having a width and a thickness; a head part (120) configured to be integrated with an upper end of the body part (110); and a leg part (130) formed by extending from a lower end of the body part (110) to be integrated therewith, wherein the head part (120) is a plate-shaped strip (122) provided on the upper end of the body part (110). |
| US11387579B1 |
Wire connection bracket assembly
The invention relates to a method of connecting electrical wires, conductors, or connections together by rotating the connector ends in an enclosure to tightly twist the wire ends together and also includes a clamping mechanism to prevent the wires from untwisting, becoming loose, or falling out of the enclosure. The present invention increases the holding ability of current rotating tools for electrical wires and connections. |
| US11387574B2 |
Vertically and horizontally polarized omnidirectional antennas and related methods
An omni-directional antenna module includes a plurality of vertically and horizontally polarized antenna elements arranged to provide 360° coverage around an antenna, and to eliminate nulls below the antenna. The antenna elements are arranged in parallel with respective orthogonal axes of a three-dimensional Cartesian coordinate system, with the centers of the antenna elements being arranged collinearly along the vertical or “Z” axis so that the radiation patterns of the individual orthogonally polarized dipoles do not interfere. |
| US11387572B2 |
Antenna element, array antenna, communication unit, mobile object, and base station
Provided are an improved antenna element, array antenna, communication unit, mobile object, and base station. The antenna element includes a first conductor, a second conductor, a third conductor, a fourth conductor, a feeding line electrically connected to the third conductor, and a filter connected to the feeding line. The first conductor and the second conductor extend along a second plane and are positioned away from each other along a first axis that intersects the second plane. The third conductor extends along a first plane including the first axis and is positioned between the first conductor and the second conductor. The fourth conductor extends along the first plane, is electrically connected to the first conductor and the second conductor, and is positioned away from the third conductor. The filter is positioned in such a manner as to overlap the fourth conductor. |
| US11387569B2 |
Dual band antenna and electronic device including the same
An electronic device is provided. The electronic devices includes a housing at least partially including a conductive portion, an antenna structure including a printed circuit board including a plurality of insulating layers, at least one first conductive patch including a first feeding point, and a second feeding point, and at least one second conductive patch including a third feeding point, and a fourth feeding point, and an antenna module including a wireless communication circuit configured to transmit or receive a first signal through the at least one first conductive patch and to transmit or receive a second signal of a second frequency band through the at least one second conductive patch. |
| US11387567B1 |
Multiband antenna with dipole resonant structures
An antenna for cellular communications is provided having a reflector and at least a first array of dipole antenna elements on the reflector operating at a first frequency ban. The dipole antenna elements of the first array having a printed circuit construction and composed of a balun feed and dipole arms. At least a second array of dipole antenna elements is provided on the reflector operating at a second frequency band the dipole antenna elements of the first array having a printed circuit construction and composed of a balun feed and dipole arms. The dipole antenna elements of the first array include one or more resonant structures causing a substantially closed circuit at the first frequency band and a substantially open circuit at the second frequency band. The resonant structures on the dipole antenna elements of the first array are located at least in part on the balun feed of the dipole antenna elements. |
| US11387564B2 |
Cavity filter and antenna module including the same
The present disclosure relates to a communication method and system for converging a 5th-Generation (5G) communication system for supporting higher data rates beyond a 4th-Generation (4G) system with a technology for Internet of Things (IoT). The present disclosure may be applied to intelligent services based on the 5G communication technology and the IoT-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. A cavity filter is provided. The cavity filter includes a plate of the cavity filter and including a feeder part for supplying an electrical signal, a housing forming an exterior of the cavity filter and coupled to the plate to form a shielded space inside the cavity filter, and a metal structure having a first end coupled to an inside of the housing and a second end that extends toward the feeder part and resonates to filter frequencies in the shielded space. |
| US11387559B2 |
Coupled antenna system for multiband operation
A radiating system configured to operate electromagnetic wave signals from first and second frequency regions, wherein the lowest frequency of the second frequency region is above the highest frequency of the first frequency region: the radiating system comprising a radiating structure, a radiofrequency system, and an external port. The radiating structure comprises a first boosting element electrically connected to a first conductive element, a second boosting element electrically connected to a second conductive element, and a ground plane layer. The radiofrequency system comprises a first matching network connected to the first conductive element and the external port, and a second matching network connected to the second conductive element and a ground port. The first and second matching networks are configured to modify the impedance of the radiating structure providing impedance matching to the radiating system, at the external port, in the first and second frequency regions. |
| US11387557B2 |
Antenna for multi-broadband and multi-polarization communication
The invention provides an antenna for multi-broadband and multi-polarization communication, which may include a plurality of radiators configured to jointly function as one or more dipoles, and a plurality of parasitic elements. Each radiator may be configured to contribute to resonances at two or more nonoverlapping bands, and may comprise an arm and a ground wall connecting the arm and a ground plane. The arm may comprise an arm plate and a folded arm. The ground wall may comprise a meandering portion causing a distance between the arm and the ground plane to be shorter than a length of a current conduction path along the ground wall between the arm and the ground plane. On a geometric reference surface, a projection of each parasitic element may extend between two gaps which clamp a projection of an associated one of the radiators. |
| US11387555B2 |
Multiband patch antenna
A multiband patch antenna, a method for receiving radio frequency signals in multiple bands by a multiband patch antenna and a method of producing a patch element are disclosed. The antenna comprises a substrate layer having a first surface and a second surface and a base element on the first surface. A multi-resonance patch element comprising a pattern of outward extending resonance formations is provided on the second surface. At least two proximity feed elements configured for connection to a multiband hybrid coupler circuit and extending within the substrate layer from the first surface to the second surface are also provided. The multi-resonance patch element is configured to leave areas where the proximity feed elements extend to the second surface uncovered by the multi-resonance patch element. |
| US11387554B2 |
Methods circuits devices assemblies and systems for providing an active antenna
Disclosed herein are methods, circuits, devices, assemblies and systems for facilitating wireless communication, both satellite and terrestrial. According to embodiments, there may be provided a integrated bidirectional phased array including multiple antenna element clusters, wherein each antenna cluster may be comprised of a set of antenna elements disposed in proximity to one another and connected to one another through an intra-cluster signal distribution line. Antenna element clusters may be connected to one another and to a main signal line through a network of inter-cluster signal distribution lines as least some of which may include electrically controllable signal phase shifters. A first set of antenna element clusters may be connected to a transmission signal line, forming a TX antenna and a second set of antenna elements clusters may be connected to a receive signal line. Antenna elements may be disposed on a common surface, or parallel surfaces, in an interlaced manner. |
| US11387551B2 |
Triple-resonant null frequency scanning antenna
The present invention discloses a triple-resonant null frequency scanning antenna, which belongs to the technical fields of the Internet of Things and microwave. The triple-resonant null frequency scanning antenna comprises a circular sector magnetic dipole arranged on a medium substrate, and rectangular notches are symmetrically arranged on a sector patch of the circular sector magnetic dipole. The circular sector magnetic dipole is fixed on the medium substrate by a second shorting pin and third shorting pins, an flared angle of the circular sector magnetic dipole is a first central angle, and two third shorting pins are present and are symmetrically arranged on both sides of the angular bisector of the first central angle. |
| US11387549B2 |
Glazing panel having an electrically conductive connector
A glazing panel comprising (i) a pane of glass, (ii) an antenna, (iii) an electrically conductive connector joined to the antenna by a solder material, and (iv) a coaxial cable joined to the electrically conductive connector. The electrically conductive connector is a flat connector comprising first and a second electrically conductive portions laminated between two films of a resilient material. |
| US11387547B2 |
Antenna, array antenna, radar apparatus, and in-vehicle system
The present invention provides an antenna comprising: a radiation unit that is formed on a substrate; a waveguide that propagates therein radio waves radiated from the radiation unit and radiates the radio waves as a beam; and a dielectric lens that is arranged in an opening of the waveguide and has an incident plane facing the radiation unit and a radiation plane radiating radio waves entered from the incident plane. The radiation plane of the dielectric lens has a plane orientation different from a flat plane perpendicular to the radiation direction of the beam. |
| US11387545B2 |
Radiator support, radiator and base station antenna
The present invention relates to a radiator support for a base station antenna. The radiator support includes a first support part and a second support part that are separate from each other. The first support part is configured to be mounted to extend upwardly from a reflector plate, to extend in part of a height of the feeding stalk, and to bear radially the feeding stalk so as to prevent roll-over of the feeding stalk. The second support part is configured to be mounted adjacent a distal end of the feeding stalk facing away from the reflector plate, and to receive a radiating element. The present invention also relates to a radiator having such radiator support, and a base station antenna having such a radiator. The radiator support according to the present invention has a simple structure, occupies a small structural space and has a favorable versatility. |
| US11387544B2 |
Signal transmission device and smart tv
Disclosed are a signal transmission device and a smart TV including a wireless signal module. The signal transmission device includes: a main antenna having a first signal input port, the first signal input port being connected with the wireless signal module; a transmission antenna adjacent to and spaced from the main antenna, the transmission antenna having a signal output port; and a dead-zone compensating antenna having a second signal input port. The second signal input port is connected with the signal output port through a signal transmission line, and the main antenna receives signals input by the wireless signal module and transmits the signals, the transmission antenna receives a part of the signals and transmits the part of the signals to a dead-zone compensating antenna through the signal transmission line; the dead-zone compensating antenna transmits the received signals and compensates a signal dead zone of the main antenna. |
| US11387534B2 |
Converter and antenna device
A converter includes an electrical opening which is a loop pattern, at one end of a conductor pattern located immediately above one end of a waveguide with a dielectric substrate interposed therebetween. |
| US11387532B2 |
Methods for integrated microstrip and substrate integrated waveguide circulators/isolators formed with co-fired magnetic-dielectric composites
Disclosed are embodiments of microstrip and substrate integrated waveguide circulators/isolators which can be integrated with a substrate. This composite structure can serve as a platform for other components, allowing for improved miniaturization of components. Embodiments of the disclosure can be particular advantageous in the high frequency ranges, such as above 1.8 GHz or above 3 GHz, which allows devices to be used in the 5G space. |
| US11387528B2 |
Secondary battery
A secondary battery includes an electrode assembly having a current collector tab, a case accommodating the electrode assembly, a cap plate coupled to the case, and a lead tab positioned between the electrode assembly and the cap plate and electrically connecting the current collector tab and the cap plate. The lead tab includes fuse opening, a fixing hole spaced apart from the fuse opening and a protection member surrounding the fuse opening and the fixing hole. |
| US11387527B2 |
Battery passivation management system
Described is a battery de-passivation circuit that generally comprises a battery having a de-passivation circuit attached across its positive and negative terminals. The de-passivation circuit includes a switch that can open or close the de-passivation circuit, a resistor that can regulate the amount of current drawn from the battery and a clock and timer controller system that controls the switch. The controller system controls closing the circuit long enough to bring the passivation level build-up within the battery to an acceptable lower level and controls opening the circuit long enough to allow passivation levels to build-up to an acceptable upper level. |
| US11387522B2 |
Multilayer separator and device using the same
The present application relates to a multilayer separator and a device using the same. Specifically, the present application provides a multilayer separator comprising at least one first porous substrate and at least one second porous substrate, wherein the peeling strength between the first porous substrate and the second porous substrate is in a range of 2 N/m to 50 N/m, and the first porous substrate has an obturator temperature of lower than 135° C. The multilayer separator provided by the present application can effectively guarantee the safety and electrochemical performance of the electrochemical device. |
| US11387521B2 |
Nanoporous composite separators with increased thermal conductivity
Nanoporous composite separators are disclosed for use in batteries and capacitors comprising a nanoporous inorganic material and an organic polymer material. The inorganic material may comprise Al2O3, AlO(OH) or boehmite, AlN, BN, SiN, ZnO, ZrO2, SiO2, or combinations thereof. The nanoporous composite separator may have a porosity of between 35-50%. The average pore size of the nanoporous composite separator may be between 10-90 nm. The separator may be formed by coating a substrate with a dispersion including the inorganic material, organic material, and a solvent. Once dried, the coating may be removed from the substrate, thus forming the nanoporous composite separator. A nanoporous composite separator may provide increased thermal conductivity and dimensional stability at temperatures above 200° C. compared to polyolefin separators. |
| US11387520B2 |
Silanated silica-ceramic materials, and methods of making and using the same
The invention provides a novel ceramic-metal oxide-polymer composite material. A functionalized metal oxide nanolayer coating can be bonded between LICGCs and polymers/oligomers, which protects the LICGC from corrosion, has a low interfacial resistance to Li+ migration, and can be a SIC. Hybrid ceramic-polymer electrolytes were formed by engineering the interface between a LICGC and a polymer, polyethylene oxide (PEO), by sputter coating a 200 nm thick SiO2 layer onto a lithium ion conducting glass ceramic (LICGC) and silanating the SiO2 with a functionalized PEG in the presence of LiTFSI. A low interfacial resistance (Rinterfacial) was measured, the same as that obtained for a SiO2 interface soaked with liquid tetraglyme/LiTFSI. The pegylated SiO2 interface (unlike the tetraglyme/LiTFSI interface) protected the LICGC from corrosion by Li0 metal. The (PEG-LiTFSI)—SiO2-LICGC could be bonded with polyethylene oxide/LiTFSI. This procedure provides a general method to bond other LICGCs to PEO-based polymers, and to incorporate other functionalities such as single ion conductivity into the interface via the incorporation of coupling agents with pendant anions. |
| US11387518B2 |
Battery housing part
A housing part for a multi-part housing of a battery unit may include a bottom portion and a side wall structure arranged circumferentially on the outside along the bottom portion in the circumferential direction. The side wall structure may form at least one side wall portion along the circumferential direction. The side wall portion may have an inner wall facing the bottom portion and an outer wall, which may be spaced apart from the inner wall and may face away from the bottom portion. The inner wall may be connected to the bottom portion. The inner and outer walls may be connected to one another via a framework-like cavity structure having several webs, which may be adjacent to one another in the circumferential direction and which, in the cavity structure, may form several cavities adjacent in the circumferential direction and connecting the inner wall to the outer wall. |
| US11387516B2 |
Battery module
A battery module includes a secondary battery including an electrode assembly formed by alternately stacking an electrode and a separator and a pouch type battery case which accommodates the electrode assembly therein and in which an upper case and a lower case are integrated with each other, a housing which includes at least one opening and into which the secondary battery is inserted through an opening of the at least one opening, and a cooling unit formed in the housing and disposed at one side of the secondary battery. The battery case includes a folding edge part formed at an area on a side of the secondary battery at which the upper case and the lower case are folded at an edge where the upper case and the lower case are connected, and the folding edge part of the secondary battery directly contacts the cooling unit. |
| US11387514B2 |
Power supply device and load monitor
Aspects of the disclosure relate to making it easy to move a power supply device having a large capacity battery. A power supply device includes a carriage, an inverter, a battery and a battery mounting portion. The carriage has wheels. The inverter is supported by the carriage. The battery has a power output terminal at the lower part thereof. The battery mounting portion has a power input terminal which is connected to the inverter and contacts with the output terminal when the battery is mounted. The battery can be mounted and detached by moving vertically. |
| US11387513B2 |
Protective cover
According to various embodiments of the present invention, a protective cover for protecting an electronic device comprises: a cover part; and a coupling part extending from the cover part, rotatably connected to the cover part, and detachably coupled to a part of the electronic device, wherein the coupling part rotates the cover part while being coupled to a part of the electronic device, so as to enable the cover part to cover at least one of a first and a second surface of the electronic device. In addition, various embodiments are possible. |
| US11387512B2 |
Cell structure of solid state battery
The disclosure provides a cell structure of a solid state battery capable of uniformly holding a solid state battery cell in a battery case and a manufacturing method of a solid state battery. In a process of manufacturing a can cell of the solid state battery, a shock absorber is disposed in the battery case after the solid state battery cell is inserted into the battery case and before a can lid is welded. Then, the lid is provided to seal the case. At the time of sealing, the solid state cell and a terminal are fastened by using an engaging member, and the airtightness is improved. |
| US11387511B1 |
Electric cell potting compound and method of making
A battery module comprising an electric cell and a potting compound associated with the electric cell. The potting compound is formed of a flame retardant component; a first component having an isocyanate reactive compound and water; and a second component having an isocyanate compound. The potting compound is a foam. |
| US11387510B2 |
Non-aqueous electrolyte secondary battery
A non-aqueous electrolyte secondary battery in which a potential of a metal layer in an exterior body is kept noble, and corrosion can be suppressed, including: a power generation element wherein a positive electrode and a negative electrode are opposed to each other with a separator interposed therebetween, and the negative electrode is disposed on an outer side than the positive electrode; and an exterior body which covers the power generation element, and has a metal layer and a resin layer which covers both surfaces of the metal layer, and an average thickness t1 of a first part of the exterior body which covers upper and lower surfaces of the power generation element in a lamination direction of the power generation element and an average thickness t2 of a second part of the exterior body which covers side surfaces of the power generation element satisfy a relationship of t2/t1<0.995. |
| US11387508B2 |
Secondary battery
A secondary battery includes an electrode assembly, a case accommodating the electrode assembly, and a cap assembly coupled to the case to seal the case, and the case includes a bottom portion, long side portions bent and extended from the bottom portion, a first short side portion bent and extended from the bottom portion, and second short side portions bent and extended from the long side portions, the first short side portion and the second short side portions connected to each other to define a short side portion, and curvatures located between the first short side portion and the second short side portions. |
| US11387500B2 |
Multi-tab battery cycle life extension through alternating electrode charging
Systems, methods, and apparatus for a multi-tab battery cycle life extension through alternating electrode charging are disclosed. In one or more embodiments, a battery comprises a plurality of battery cells. The battery further comprises a plurality of anode electrodes and a plurality of cathode electrodes, of each of the battery cells, arranged around a perimeter of the battery. Further, the battery comprises a controller to apply, for each of the battery cells, a load or a charge from the anode electrodes to the cathode electrodes in a pattern such that charge is uniformly distributed across each of the battery cells. In one or more embodiments, the controller is located external or internal to the battery. In some embodiments, the battery further comprises a processor to determine the pattern for applying the load or the charge from the anode electrodes to the cathode electrodes for each of the battery cells. |
| US11387490B2 |
Additive for nonaqueous electrolyte solutions, nonaqueous electrolyte solution, and electricity storage device
Disclosed is an additive for nonaqueous electrolyte solutions, which includes a compound represented by the following formula (1): in the formula (1), Q represents an optionally substituted alkenylene group having 4 to 7 carbon atoms and forming a cyclic group together with the sulfur atom of the sulfonyl group, X represents a sulfonyl group, a phosphoryl group, or a carbonyl group, R1 represents an optionally substituted alkyl group having 1 to 4 carbon atoms or the like, and n represents 1 or 2. |
| US11387486B2 |
Sulfide solid electrolyte
A sulfide solid electrolyte comprising lithium, phosphorus and sulfur, wherein the sulfide solid electrolyte has a diffraction peak A at 2θ=25.2±0.5 deg and a diffraction peak B at 29.7±0.5 deg in powder X-ray diffraction using CuKα rays, an area ratio of a peak derived from PS43− glass to the total area of peaks derived from glass observed in solid 31P-NMR measurement is 90% or more and 100% or less, and an area ratio of peaks derived from glass to the total area of all peaks at 60 to 120 ppm observed in solid 31P-NMR measurement is 1% or more and 45% or less. |
| US11387484B2 |
Method for producing lithium fluorosulfonate, lithium fluorosulfonate, nonaqueous electrolytic solution, and nonaqueous electrolytic solution secondary battery
A nonaqueous electrolytic solution that includes lithium fluorosulfonate and a sulfate ion in an amount of from 1.0×10−7 mol/L to 1.0×10−2 mol/L. |
| US11387481B2 |
Fuel cell stack and method of producing fuel cell stack
In a fuel cell stack and a method of producing the fuel cell stack, a first thickness of a first rubber seal member in a stacking direction before a tightening load is applied to a stack body is set such that, when the tightening load is applied to the stack body, a first amount of deformation of the first rubber seal member in the stacking direction is larger than a second amount of deformation of a top part of a first seal bead in the stacking direction. |
| US11387477B2 |
Method for the production of a membrane electrode assembly for a fuel cell
A method for providing a catalyst-coated polymer electrolyte membrane for a membrane electrode assembly of a fuel cell with at least one functional coating made of a material includes printing directly the material onto the catalyst-coated polymer electrolyte membrane by a non-contact printing method. |
| US11387472B2 |
Energy management system
The present disclosure provides an energy management system capable of improving energy efficiency. The energy management system includes: a fuel cell configured to supply energy used in a facility; a first hydrogen supply unit configured to supply hydrogen to the fuel cell by causing a power generation apparatus that uses renewable energy to perform water electrolysis; a second hydrogen supply unit configured to supply hydrogen to the fuel cell by reforming natural gas supplied via a pipeline; and a control unit configured to determine a ratio between hydrogen supplied from the first hydrogen supply unit to the fuel cell and hydrogen supplied from the second hydrogen supply unit to the fuel cell. The control unit determines the ratio in accordance with a percentage of heat energy and energy other than the heat energy with respect to the energy used in the facility. |
| US11387471B2 |
Method for increasing the safety and/or the reliability of the operation of a fuel cell stack
A method increases the safety and/or the reliability of the operation of a fuel cell stack. The method determines that the fuel cell stack is in a space with a reduced air exchange rate. The method determines consumption information with respect to an oxygen consumption of the fuel cell stack within an interval of time. The method determines, on the basis of the air exchange rate, inflow information with respect to an amount of oxygen which was supplied to the space within the interval of time. The method determines an estimated value for an oxygen content of air in the space on the basis of the consumption information and on the basis of the inflow information. |
| US11387468B2 |
Separator plate having spacer element and fuel cell system
A separator plate for at least one fuel cell of a fuel cell system is provided. The separator plate includes at least one seal, wherein the seal is designed to seal at least one media-conducting inner region from a non-media-conducting outer region. The separator plate additionally includes at least one spacer element, which is preferably arranged in the outer region. The separator plate can be contacted by an evaluating device in a contacting region, this region being located such that it lies, in part, between the seal and spacer element. According, a deformation of the separator plate in the contacting region within a fuel cell stack is thus prevented. |
| US11387466B2 |
Carbon catalyst, battery electrode, and battery
A carbon catalyst has a carbon structure with a crystallite size Lc falling within 0.90 nm or more and 1.20 nm or less calculated through use of a Bragg angle of a diffraction peak fbroad at a diffraction angle 2θ of 24.0°±4.0° obtained by separating a diffraction peak in the vicinity of a diffraction angle 2θ of 26° in an X-ray diffraction pattern obtained by powder X-ray diffraction using a CuKα ray, and a carbon dioxide desorption amount from 650° C. to 1,200° C. of 97 μmol/g or less, a total of a carbon monoxide desorption amount and a carbon dioxide desorption amount from 650° C. to 1,200° C. of 647 μmol/g or less, or a carbon monoxide desorption amount from 650° C. to 1,200° C. of 549 μmol/g or less in a temperature programmed desorption method including measuring a carbon dioxide desorption amount from 25° C. to 1,200° C. |
| US11387462B2 |
Lithium ion battery
An object of this disclosure is to provide a lithium ion battery in which generation of heat can be suitably suppressed. Provided is a lithium ion battery including a positive electrode and a negative electrode. The positive electrode includes a positive electrode collector, a positive electrode active material layer, and an insulating layer provided on another part of the surface of the positive electrode collector, so as to be adjacent to the positive electrode active material layer. The insulating layer contains an inorganic filler and a binder. At least part of the surface of the inorganic filler is covered with LPO. |
| US11387453B2 |
Nickel-manganese composite hydroxide, method for producing the same, positive electrode active material for nonaqueous electrolyte secondary battery, method for producing the same, and nonaqueous electrolyte secondary battery
Provided are a positive electrode active material that can provide a secondary battery extremely excellent in output characteristics and having sufficient volume energy density, a nickel-manganese composite hydroxide as a precursor thereof, and methods for producing these. A nickel-manganese composite hydroxide is represented by General Formula (1): NixMnyMz(OH)2+α, and contains a secondary particle formed of a plurality of flocculated primary particles. The nickel-manganese composite hydroxide has a half width of a (001) plane of at least 0.40° and has an average degree of sparsity/density represented by [(a void area within the secondary particle/a cross section of the secondary particle)×100] (%) falling within a range of greater than 22% and up to 40%. |
| US11387451B2 |
Method for preparing metal oxide nanosheets
The present invention generally relates to a method for preparing metal oxide nanosheets. In a preferred embodiment, graphene oxide (GO) or graphite oxide is employed as a template or structure directing agent for the formation of the metal oxide nanosheets, wherein the template is mixed with metal oxide precursor to form a metal oxide precursor-bonded template. Subsequently, the metal oxide precursor-bonded template is calcined to form the metal oxide nanosheets. The present invention also relates to a lithium-ion battery anode comprising the metal oxide nanosheets. In a further preferred embodiment, the battery anode may comprising reduced template, which is reduced graphene oxide (rGO) or reduced graphite oxide. |
| US11387450B2 |
Electrolytes for lithium metal electrodes and rechargeable batteries using same
The present invention is generally related to separators for use in lithium metal batteries, and associated systems and products. Certain embodiments are related to separators that form or are repaired when an electrode is held at a voltage. In some embodiments, an electrochemical cell may comprise an electrolyte that comprises a precursor for the separator. |
| US11387445B2 |
Positive electrode for lithium-ion rechargeable battery, lithium-ion rechargeable battery, and method for producing positive electrode for lithium-ion rechargeable battery
There is provided a positive electrode for a lithium-ion rechargeable battery in which it is possible to achieve both exceptional electrical conductivity and adhesion of an electrode active material to a current collector and it is possible to dramatically improve battery characteristics compared to those in the related art. A positive electrode for a lithium-ion rechargeable battery includes a current collector; and an electrode active material-containing layer provided on the current collector, wherein the electrode active material-containing layer contains active material particles and a conductive material that connects the active material particles to each other; wherein the mass ratio of the active material particles:the conductive material:other components in the electrode active material-containing layer is 95 to 99.7:0.3 to 5:0 to 1, wherein the conductive material includes a first elongated carbon material having a first length and a second elongated carbon material having a second length larger than the first length, and wherein the ratio of the second length to the first length is 2 or more and 50 or less. |
| US11387432B2 |
Display device with groove overlapped by metal layer
A display panel includes: a substrate comprising a first area, a second area, and a third area between the first area and the second area; a stack structure in the second area and comprising a pixel electrode, an opposite electrode, and an intermediate layer between the pixel electrode and the opposite electrode; a groove in the third area and separating at least one organic material layer included in the intermediate layer; and at least one metal layer in the third area and comprising a first opening overlapping the groove, wherein the groove is defined in a multi-layered film including an organic layer and an inorganic layer on the organic layer, and the at least one metal layer is between the substrate and the multi-layered film. |
| US11387429B2 |
Display substrate having a buffer structure, manufacturing method thereof and display apparatus
A display substrate, a manufacturing method thereof, and a display apparatus are provided. The display substrate includes a display region and a non-display region surrounding the display region, and the non-display region includes a bending region and a buffer structure. The bending region is coated with a rheological material, and the buffer structure is arranged in the bending region and configured to block the rheological material from flowing out of the bending region. |
| US11387424B2 |
Organic light emitting diode display device with cathode layer
An organic light emitting diode display device includes a substrate, a first defined area disposed on the substrate, a second defined area including a metal layer disposed on the substrate, a bank layer disposed on the substrate, an electron transport layer disposed above the first defined area and the second defined area, and a cathode layer disposed on the electron transport layer. The first defined area includes an anode layer, a hole injection layer, a hole transport layer, and an organic light emitting layer disposed on the substrate in sequentially. The bank layer is disposed at an edge of the first defined area and in the second defined area, and electrically isolates the first defined area and the second defined area. The electron transport layer includes a cathode contact hole used as an auxiliary cathode, which solves uneven light emission of a large-sized panel and improves display effect. |
| US11387422B2 |
Light-emitting element, light-emitting device, electronic device, and lighting device
Emission efficiency of a light-emitting element is improved. The light-emitting element has a pair of electrodes and an EL layer between the pair of electrodes. The EL layer includes a first light-emitting layer and a second light-emitting layer. The first light-emitting layer includes a fluorescent material and a host material. The second light-emitting layer includes a phosphorescent material, a first organic compound, and a second organic compound. An emission spectrum of the second light-emitting layer has a peak in a yellow wavelength region. The first organic compound and the second organic compound form an exciplex. |
| US11387417B2 |
Organic electroluminescent device
The present disclosure relates to an organic electroluminescent device comprising a light-emitting layer and a hole transport zone. By comprising a specific combination of a light-emitting layer and a hole transport zone, it is possible to provide an organic electroluminescent device having low driving voltage, high luminous efficiency and/or long lifespan properties. |
| US11387416B2 |
Organic light emitting material, preparation method thereof, and organic light emitting device
An organic light emitting material, a preparation method thereof, and an organic light emitting device are provided. The organic light emitting material includes oxadiazole-p-benzodioxazoles. The oxadiazole-p-benzodioxazoles has a large π-conjugated system, that is, it has good planarity and strong visible π-π* absorption. Also, it has high fluorescence quantum yield. Therefore, the oxadiazole-p-benzodioxazoles with a large π-conjugated system has a high-efficiency electron transport property, and it has a high-efficiency electron-withdrawing group to increase electron transport efficiency and improves its luminous efficiency. |
| US11387411B2 |
Logic compatible RRAM structure and process
A memory cell and method including a first electrode formed through a first opening in a first dielectric layer, a resistive layer formed on the first electrode, a spacing layer formed on the resistive layer, a second electrode formed on the resistive layer, and a second dielectric layer formed on the second electrode, the second dielectric layer including a second opening. The first dielectric layer formed on a substrate including a first metal layer. The first electrode and the resistive layer collectively include a first lip region that extends a first distance beyond the first opening. The second electrode and the second dielectric layer collectively include a second lip region that extends a second distance beyond the first opening. The spacing layer extends from the second distance to the first distance. The second electrode is coupled to a second metal layer using a via that extends through the second opening. |
| US11387408B2 |
Magnetoresistive random access memory and method of manufacturing the same
A magnetoresistive random access memory (MRAM), including a bottom electrode layer on a substrate, a magnetic tunnel junction stack on the bottom electrode layer, and a top electrode layer on the magnetic tunnel junction stack, wherein the material of top electrode layer is titanium nitride, and the percentage of nitrogen in the titanium nitride gradually decreases from the top surface of top electrode layer to the bottom surface of top electrode layer. |
| US11387406B2 |
Magnetic of forming magnetic tunnel junction device using protective mask
In an embodiment, a method includes: forming a first inter-metal dielectric (IMD) layer over a semiconductor substrate; forming a bottom electrode layer over the first IMD layer; forming a magnetic tunnel junction (MTJ) film stack over the bottom electrode layer; forming a first top electrode layer over the MTJ film stack; forming a protective mask covering a first region of the first top electrode layer, a second region of the first top electrode layer being uncovered by the protective mask; forming a second top electrode layer over the protective mask and the first top electrode layer; and patterning the second top electrode layer, the first top electrode layer, the MTJ film stack, the bottom electrode layer, and the first IMD layer with an ion beam etching (IBE) process to form a MRAM cell, where the protective mask is etched during the IBE process. |
| US11387405B2 |
Resonance rotating spin-transfer torque memory device
A memory device includes a plurality of layers forming a stack. The plurality of layers include a spin polarization layer having a magnetic anisotropy approximately perpendicular to a plane of the spin polarization layer, an antiferromagnetic layer having an antiferromagnetic material, a ferromagnetic layer that is exchange coupled to the antiferromagnetic layer, where the antiferromagnetic layer is between the ferromagnetic layer and the spin polarization layer, and a storage layer having a magnetization direction that indicates a memory state of the storage layer. The memory state is switched by an amount of current through the stack. The spin polarization layer, the ferromagnetic layer, and the antiferromagnetic layer are configured to reduce the amount of current through the stack for switching the magnetization direction of the storage layer relative to an amount of current through a memory device without the spin polarization layer, the ferromagnetic layer, and the antiferromagnetic layer. |
| US11387400B2 |
Electronic module with sealing resin
An electronic module includes a substrate that includes a first main surface and a second main surface, at least one first electronic component that includes electrodes on a mounting surface thereof on the substrate and that includes a hollow portion, at least one second electronic component that includes electrodes on a mounting surface thereof on the substrate and that includes no hollow portion, and a sealing resin. The at least one first electronic component is mounted on the first main surface of the substrate and sealed with the sealing resin. The at least one second electronic component is mounted on the second main surface of the substrate and is not sealed with the sealing resin. |
| US11387397B2 |
Method for making light emitting device (LED) arrays using a temporary substrate and a carrier substrate
A method for making light emitting device LED arrays includes the steps of providing a plurality of LEDs having a desired configuration (e.g., VLED, FCLED, PLED); attaching the LEDs to a carrier substrate and to a temporary substrate; forming one or more metal layers and one or more insulator layers configured to electrically connect the LEDs to form a desired circuitry; and separating the LEDs along with the layered metal layers and insulator layers that form the desired circuitry from the carrier substrate and the temporary substrate. |
| US11387393B2 |
LED light source with fluoride phosphor
The invention provides alighting device (1) comprising a solid state light source (10) configured to generate light source light (11) and a converter element (100) configured to convert at least part of the light source light (11) into converter element light (101), wherein the converter element (100) comprises a polymeric host matrix element (120) hosting a particulate first luminescent material (110) of the type M2AX6 doped with tetravalent manganese, wherein M comprises an alkaline cation, wherein A comprises a tetravalent cation, and wherein X comprises a monovalent anion, at least comprising fluorine (F), wherein the particulate first luminescent material (110) is available in the polymeric host matrix element (120) with an average weight percentage x averaged over the polymeric host matrix element (120), wherein the polymeric host matrix element (120) has a first outer face (121), wherein an outer layer volume defined by at least part of the first outer face (121) and a first distance (d1) from said first outer face (121) hosts the particulate first luminescent material (110) with a first local weight percentage y averaged over the outer layer volume with a ratio of the first local weight percentage y over the averaged weight percentage x of y/x≤0.1, and wherein the first distance (d1) is at least 10 μm. |
| US11387392B2 |
Light-emitting device and display device
A light-emitting device includes: a semiconductor stacked body comprising a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer stacked in this order; a first insulating film that covers the active layer and the second conductive semiconductor layer; a first conductive layer that continuously surrounds a lateral surface of the first conductive semiconductor layer that is exposed from the first insulating film; a second insulating film that covers the first conductive layer, the active layer, and the second conductive semiconductor layer and that has a hole disposed above the second conductive semiconductor layer; and a second conductive layer that continuously covers, via the second insulating film, an end portion of the first conductive layer located in proximity to an end portion of the second conductive semiconductor layer, wherein the second conductive layer is connected to an upper surface of the second conductive semiconductor layer through the hole. |
| US11387385B2 |
Semiconductor light-emitting element and method of manufacturing semiconductor light-emitting element
A semiconductor light-emitting element includes: an n-type semiconductor layer made of an n-type AlGaN-based semiconductor material; an active layer made of an AlGaN-based semiconductor material provided on the n-type semiconductor layer; a p-type semiconductor layer provided on the active layer; a p-side contact electrode made of Rh and in contact with the p-type semiconductor layer; a p-side electrode covering layer made of TiN that covers the p-side contact electrode; a dielectric protective layer that covers the n-type semiconductor layer, the active layer, the p-type semiconductor layer, and the p-side electrode covering layer; and a p-side pad electrode in contact with the p-side electrode covering layer in a p-side opening that extends through the dielectric protective layer on the p-side contact electrode. |
| US11387382B2 |
Bifacial photovoltaic cell
The invention provides a bifacial photovoltaic cell comprising: a semiconductor substrate, the substrate comprising an n+ layer on a first surface, and a p+ layer on a second surface. The n+ layer comprises an n-dopant and the p+ layer comprises a p-dopant. The cell further comprises a passivating and/or antireflective coating on the doped first and second surfaces. The cell is characterized in that the second surface of the semiconductor substrate has an area substantially devoid of the p-dopant on an edge of the second surface having a width in the range of 0.1-0.5 mm; wherein the area is formed by etching the semiconductor substrate. |
| US11387379B2 |
Single photon avalanche gate sensor device
A semiconductor layer is doped with a first doping type and has an upper surface. A first electrode insulated from the semiconductor layer extending through the semiconductor layer from the upper surface. A second electrode insulated from the semiconductor layer extends through the semiconductor layer from the upper surface. The first and second electrodes are biased by a voltage to produce an electrostatic field within the semiconductor layer causing the formation of a depletion region. The depletion region responds to absorption of a photon with an avalanche multiplication that produces charges that are collected at first and second oppositely doped regions within the semiconductor substrate. |
| US11387378B2 |
P-ohmic contact structure and photodetector using the same
A photodetector includes an UV transparent n-type structure, an UV transparent p-type structure, and a photon absorbing region sandwiched between the n-type structure and the p-type structure; a p-contact layer formed on the p-type structure; and a p-ohmic contact of a thickness in the range of 0.2-100 nm formed on the p-contact layer, wherein the p-ohmic contact comprises one or more layer of metal oxide. |
| US11387377B2 |
Multijunction solar cell assembly for space applications
A multijunction solar cell assembly and its method of manufacture including first and second discrete and different semiconductor solar cells which are electrically interconnected to form a four or five junction solar cell assembly. |
| US11387372B2 |
Semiconductor device
A semiconductor device includes; a schottky diode; a semiconductor substrate that includes a first surface and a second surface opposite to the first surface; a schottky electrode that is placed on the first surface and schottky-contacts to the semiconductor substrate; a first electrode placed on the schottky electrode; and a second electrode that is placed on the second surface and is connected to the semiconductor substrate. The schottky electrode is made of a metal material that is a columnar crystal; and a content of carbon on the schottky electrode is less than 6×1019 cm−3 in at least a part of an area of the schottky electrode. |
| US11387368B2 |
Method for driving semiconductor device
To provide a method for driving a semiconductor device, by which influence of variation in threshold voltage and mobility of transistors can be reduced. The semiconductor device includes an n-channel transistor, a switch for controlling electrical connection between a gate and a first terminal of the transistor, a capacitor electrically connected between the gate and a second terminal of the transistor, and a display element. The method has a first period for holding the sum of a voltage corresponding to the threshold voltage of the transistor and an image signal voltage in the capacitor; a second period for turning on the switch so that electric charge held in the capacitor in accordance with the sum of the image signal voltage and the threshold voltage is discharged through the transistor; and a third period for supplying a current to the display element through the transistor after the second period. |
| US11387363B2 |
Source/drain junction formation
A method includes forming a first channel region and a first gate structure formed over the first channel region. A first source/drain region is formed adjacent the first channel region and the first source/drain region includes a crystalline structure doped with a first dopant. A first silicide is formed over the first source/drain region. The first source/drain region includes a first concentration of the first dopant between 2.0×1021 atoms per centimeter cubed and 4.0×1021 atoms per centimeter cubed at a depth of 8 to 10 nanometers. |
| US11387361B2 |
Semiconductor structure and method for forming the same
A method for forming a semiconductor structure includes: forming a first gate structure in a predetermined low-potential region of a substrate and a second gate structure in a predetermined high-potential region of the substrate; sequentially forming a first dielectric layer and a second dielectric layer covering the first gate structure and the second gate structure; forming a portion of a third dielectric layer along sidewalls of the second gate structure and on the second dielectric layer; and etching the first dielectric layer and the second dielectric layer with the portion of the third dielectric layer as an etching hard mask to form a first composite spacer covering sidewalls of the first gate structure, and a second composite spacer covering the sidewalls of the second gate structure, wherein a width of the first composite spacer is less than a width of the second composite spacer. |
| US11387360B2 |
Transistor with a negative capacitance and a method of creating the same
The various described embodiments provide a transistor with a negative capacitance, and a method of creating the same. The transistor includes a gate structure having a ferroelectric layer. The ferroelectric layer is formed by forming a thick ferroelectric film, annealing the ferroelectric film to have a desired phase, and thinning the ferroelectric film to a desired thickness of the ferroelectric layer. This process ensures that the ferroelectric layer will have ferroelectric properties regardless of its thickness. |
| US11387359B2 |
Ppower semiconductor device with anticorrosive edge termination structure
A power semiconductor device having a power semiconductor transistor configuration includes: a semiconductor body having a front side coupled to a first load terminal structure, a backside coupled to a second load terminal structure, and a lateral chip edge; an active region for conducting a load current in a conducting state; and an edge termination region separating the active region and lateral chip edge. At the front-side, the edge termination region includes a protection region devoid of any metallic structure, unless the metallic structure is electrically shielded from below by a polysilicon layer that extends further towards the lateral chip edge than the metallic structure by a lateral distance of at least 20 μm. In a blocking state, the protection region accommodates a voltage change of at least 90% of a blocking voltage inside the semiconductor body in a lateral direction from the active region towards the lateral chip edge. |
| US11387358B2 |
Semiconductor structure, transistor including the same, and method of manufacturing transistor
A semiconductor structure includes a substrate; at least one mask layer spaced apart from the substrate in a first direction; a first semiconductor region of a first conductivity type between the substrate and the at least one mask layer; a second semiconductor region of a second conductivity type on the at least one mask layer; and a third semiconductor region of the first conductivity type on the first semiconductor region. The third semiconductor region may contact the second semiconductor region to form a PN-junction structure in a second direction different from the first direction. The semiconductor structure may be applied to vertical power devices and may be capable of increasing withstand voltage performance and lowering an on-resistance. |
| US11387357B2 |
Compound semiconductor device, method for manufacturing the same and amplifier
A compound semiconductor device includes: a semiconductor laminate structure including an electron transit layer and an electron supply layer that are formed from a compound semiconductor; a gate electrode, a source electrode, and a drain electrode that are provided above the electron supply layer; and an insulating layer that is provided between the source electrode and the drain electrode, over the semiconductor laminate structure, and with a gate recess formed therein, wherein the gate electrode includes: a first portion in the gate recess; and a second portion that is coupled to the first portion and is provided over the insulating layer at a position further on the drain electrode side than the gate recess, wherein the insulating layer includes an aluminum oxide film in direct contact with the semiconductor laminate structure. |
| US11387356B2 |
Semiconductor structure and high-electron mobility transistor device having the same
A semiconductor structure includes a seed layer on a substrate and an epitaxial stack on the seed layer. The epitaxial stack includes a first superlattice part and a second superlattice part on the first superlattice part. The first superlattice part includes first units repetitively stacked M1 times on the seed layer. Each first unit includes a first sub-layer that is an Aly1Ga1-y1N layer, and a second sub-layer that is an Alx1Ga1-x1N layer, wherein y1 |
| US11387350B2 |
Semiconductor fin structure and method of fabricating the same
According to one aspect, a method of fabricating a semiconductor structure includes cutting a semiconductor fin extending along a substrate. Cutting the semiconductor fin can comprise forming a fin cut mask. The fin cut mask can define a number of masked regions and a number of cut regions. The method can include cutting the fin into a number of fin parts by etching the fin in the cut regions. The method can further comprise forming an epitaxial semiconductor capping layer on the fin prior to forming the fin cut mask or on the fin parts subsequent to cutting the fin. A capping layer material and a fin material can be lattice mismatched. According to another aspect, a corresponding semiconductor structure comprises fin parts. |
| US11387349B2 |
Trench gate depletion mode VDMOS device and method for manufacturing the same
A trench gate depletion-type VDMOS device and a method for manufacturing the same are disclosed. The device comprises a drain region; a trench gate including a gate insulating layer on an inner wall of a trench and a gate electrode filled in the trench and surrounded by the gate insulating layer; a channel region located around the gate insulating layer; a well region located on both sides of the trench gate; a source regions located within the well region; a drift region located between the well region and the drain region; a second conductive-type doped region located between the channel region and the drain region; and a first conductive-type doped region located on both sides of the second conductive-type doped region and located between the drift region and the drain region. |
| US11387348B2 |
Transistor formed with spacer
Disclosed herein is a transistor structure that is formed by forming a sidewall spacer along a first vertical component sidewall of a trench wherein no sidewall spacer is formed along a second vertical component sidewall of the trench. During an etching of a dielectric layer in the trench, the sidewall spacer protects a first portion of the dielectric layer from being etched while a second portion of the dielectric layer along the second sidewall is etched. A portion of a control terminal can be formed in the space where the second portion is removed. |
| US11387344B2 |
Method of manufacturing a semiconductor device having a doped work-function layer
A semiconductor device and method of manufacture are provided. In some embodiments a treatment process is utilized to treat a work function layer. The treatment prevents excessive oxidation of the work function layer during subsequent processing steps, such as application of a subsequent photoresist material, thereby allowing the work function layer to be thinner than otherwise. |
| US11387343B2 |
Stack and semiconductor device
A stack with excellent electrical characteristics and reliability is provided. The stack includes an insulator, a conductor, and a first oxide between the insulator and the conductor; the first oxide includes a first c-axis-aligned crystal region; and a c-axis of the first crystal region is substantially perpendicular to a plane of the first oxide on the insulator side. Alternatively, the stack includes an insulator, a conductor, a first oxide between the insulator and the conductor, and a second oxide facing the first oxide with the insulator therebetween; the first oxide includes a first c-axis-aligned crystal region; a c-axis of the first crystal region is substantially perpendicular to a plane of the first oxide on the insulator side; the second oxide includes a second c-axis-aligned crystal region; and a c-axis of the second crystal region is substantially perpendicular to a plane of the second oxide on the insulator side. |
| US11387331B2 |
Source/drain contact structure
A method according to the present disclosure includes receiving a workpiece that includes a gate structure, a first gate spacer feature, a second gate spacer feature, a gate-top dielectric feature over the gate structure, the first gate spacer feature and the second gate spacer feature, a first source/drain feature over a first source/drain region, a second source/drain feature over a second source/drain region, a first dielectric layer over the first source/drain feature, and a second dielectric layer over the second source/drain feature. The method further includes replacing a top portion of the first dielectric layer with a first hard mask layer, forming a second hard mask layer over the first hard mask layer while the second dielectric layer is exposed, etching the second dielectric layer to form a source/drain contact opening and to expose the second source/drain feature, and forming a source/drain contact over the second source/drain feature. |
| US11387329B2 |
Tri-gate architecture multi-nanowire confined transistor
Transistor structures including a fin structure having multiple graded III-N material layers with polarization layers therebetween, integrated circuits including such transistor structures, and methods for forming the transistor structures are discussed. The transistor structures further include a source, a drain, and a gate coupled to the fin structure. The fin structure provides a multi-gate multi-nanowire confined transistor architecture. |
| US11387327B2 |
Silicide for group III-Nitride devices and methods of fabrication
A transistor includes a polarization layer above a channel layer including a first III-Nitride (III-N) material, a gate electrode above the polarization layer, a source structure and a drain structure on opposite sides of the gate electrode, where the source structure and a drain structure each include a second III-N material. The transistor further includes a silicide on at least a portion of the source structure or the drain structure. A contact is coupled through the silicide to the source or drain structure. |
| US11387324B1 |
Connectivity in quantum dot devices
Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack including a quantum well layer; and a plurality of gates above the quantum well stack, wherein the gates are arranged in a ladder arrangement including two rails having at least N gates each and at least one active rung, and a number of active rungs in the ladder arrangement is less than N. |
| US11387323B2 |
Extended drain MOS with dual well isolation
An integrated circuit includes an extended drain MOS transistor. The substrate of the integrated circuit has a lower layer with a first conductivity type. A drain well of the extended drain MOS transistor has the first conductivity type. The drain well is separated from the lower layer by a drain isolation well having a second, opposite, conductivity type. A source region of the extended drain MOS transistor is separated from the lower layer by a body well having the second conductivity type. Both the drain isolation well and the body well contact the lower layer. An average dopant density of the second conductivity type in the drain isolation well is less than an average dopant density of the second conductivity type in the body well. |
| US11387322B2 |
Semiconductor device having nanosheet transistor and methods of fabrication thereof
Embodiments of the present disclosure provide semiconductor device structures having at least one T-shaped stacked nanosheet transistor to provide increased effective conductive area across the channel regions. In one embodiment, the semiconductor device structure includes a first channel layer formed of a first material, wherein the first channel layer has a first width, and a second channel layer formed of a second material different from the first material, wherein the second channel layer has a second width less than the first width, and the second channel layer is in contact with the first channel layer. The structure also includes a gate dielectric layer conformally disposed on the first channel layer and the second channel layer, and a gate electrode layer disposed on the gate dielectric layer. |
| US11387316B2 |
Monolithic back-to-back isolation elements with floating top plate
Isolators having a back-to-back configuration for providing electrical isolation between two circuits are described, in which multiple isolators formed on a single monolithic substrate are connect in series to achieve a higher amount of electrical isolation for a single substrate than for one of the isolators alone. A pair of isolators in the back-to-back configuration have top and bottom isolator components where the top isolator components are connected together and electrically isolated from the underlying substrate, resulting in floating top isolator components. The back-to-back isolator may provide one or more communication channels for transfer of information and/or power between different circuits. |
| US11387315B2 |
Patterned shielding structure and integrated inductor
A patterned shielding structure is disposed between an inductor structure and a substrate. The patterned shielding structure includes a shielding layer. The shielding layer includes a first main portion and a plurality of branch portions. The first main portion is T-shaped. The branch portions are connected to the first main portion. |
| US11387312B2 |
Display device
A display device includes a first thin-film transistor (TFT) including a first semiconductor layer including silicon semiconductor and a first gate electrode insulated from the first semiconductor layer, a first interlayer insulating layer covering the first gate electrode, a second TFT arranged on the first interlayer insulating layer and including a second semiconductor layer including oxide semiconductor and a second gate electrode insulated from the second semiconductor layer, a second interlayer insulating layer covering the second gate electrode, a first power supply voltage line arranged on the second interlayer insulating layer, a first planarization layer covering the first power supply voltage line, and a data line arranged on the first planarization layer and at least partially overlapping the first power supply voltage line. |
| US11387311B2 |
Display device for reducing or preventing crosstalk
A display device having an improved reliability includes a substrate including a display area in which a display element is arranged, a first conductive layer extending in a first direction on a plane, located in the display area, and including a protrusion protruding in a second direction crossing the first direction, a first insulating layer on the first conductive layer, a second conductive layer extending in the first direction on a plane, located on the first insulating layer, and defining a groove overlapping the protrusion of the first conductive layer, a second insulating layer on the second conductive layer, and a third conductive layer extending in the second direction on a plane, located on the second insulating layer, and overlapping the protrusion of the first conductive layer. |
| US11387310B2 |
Array substrate with connection portion connecting power bus and power line and display panel
An array substrate and a display panel are disclosed. The array substrate includes: a base substrate including a display region and a peripheral region; a plurality of sub-pixels in the display region; a plurality of data lines in the display region; a plurality of first power lines in the display region; a plurality of data lead lines in the peripheral region; a plurality of selection switches in the peripheral region; a plurality of data signal input lines in the peripheral region; a first power bus in the peripheral region; and a plurality of connection portions electrically connecting the first power bus to the plurality of first power lines, respectively. The plurality of connection portions include a plurality of first connection portions and a plurality of second connection portions on both sides of the plurality of first connection portions. |
| US11387305B2 |
Display substrate, display panel, display apparatus, and method of fabricating display substrate
The present application provides a display substrate having a plurality of subpixel areas. The display substrate includes a base substrate; a plurality of thin film transistors on the base substrate; and a plurality of semiconductor junctions configured to shield light from irradiating on active layers of the plurality of thin film transistors. |
| US11387300B2 |
Display apparatus
A display apparatus includes a thin film transistor disposed in a display area of a substrate and a display device in the display area that is electrically connected to the thin film transistor, an encapsulation layer that protects the display device, at least one through portion formed in the display area that vertically penetrates the substrate and a plurality of layers stacked on the substrate, and a first groove and a second groove that are spaced apart from each other and that surround the at least one through portion. A flow-restriction portion is disposed in a region between the first groove and the second groove that protrudes upwards from the substrate and confines an organic encapsulation layer of the encapsulation layer. |
| US11387299B2 |
Display device, electronic apparatus, and display device manufacturing method
An embodiment provides a display device including an insulating layer which is continuous between opposed ends of two adjacent lower electrodes from an upper part of one of the ends to an upper part of the other end, a first organic layer which is disposed over the lower electrodes and the insulating layer, a second organic layer which is disposed over the lower electrodes and the insulating layer with the first organic layer interposed therebetween and includes a light emitting layer, and a second electrode which covers the organic layer. The upper face of the insulating layer includes a recess between the two lower electrodes. The aspect ratio of the recess is 0.5 or more. |
| US11387298B2 |
Display panel, fabrication method thereof, and display device
A display panel, a fabrication method thereof, and a display device are disclosed. The display panel includes: a substrate; a pixel defining layer located on the substrate, the pixel defining layer including: a plurality of openings and a bank enclosing each opening, the bank including a notch; and a first electrode, located at a bottom of each opening and extending into the notch, wherein with respect to a plane where the substrate is located, a height of the first electrode is less than or equal to a maximum height of the notch. |
| US11387297B2 |
Organic light-emitting diode display substrate, manufacturing method thereof and display device
An OLED display substrate, a manufacturing method thereof and a display device are provided. The OLED display substrate includes a TFT array layer, a first electrode, a pixel definition layer, an OEL layer and a second electrode arranged on a base substrate. The pixel definition layer is configured to define a plurality of subpixel regions. A reflection structure surrounds each subpixel region and is capable of reflecting light beams from the OEL layer and beyond an escaping cone in such a manner as to enable at least parts of the light beams to enter the escaping cone. |
| US11387295B2 |
Terminal device and display method
A terminal device includes a display screen module, wherein the display screen module comprises a passive matrix organic light-emitting diode (PMOLED) display panel, and an electrode cable of the PMOLED display panel comprises a transparent cable and a camera, wherein an orthographic projection of a lighting region of the camera on a display surface of a PMOLED display panel is located in the display region in which the transparent cable is located. |
| US11387294B2 |
Display device
A display device includes: a display unit including a flat part and a curved part which is formed to be bent from sides of the flat part; a sensing unit on the display unit to overlap with the flat part and the curved part; and a passivation layer on the sensing unit, wherein the passivation layer overlaps with the flat part and the passivation layer does not overlap the curved part. |
| US11387292B2 |
Electronic device
An electronic device is provided. The electronic device includes: a housing; a light-permeable display screen received in the housing and including a display area and a black matrix area surrounding the display area; an emitter received in the housing, arranged between the light-permeable display screen and the housing, opposed to the black matrix area, and configured to emit an infrared light through the black matrix area; and a receiver received in the housing, arranged between the light-permeable display screen and the housing, opposed to the black matrix area, and configured to receive the infrared light through the black matrix area. |
| US11387291B2 |
Photoelectric sensor, display panel and manufacturing method thereof
Disclosed herein is a photoelectric sensor, display panel and their manufacturing method. The photoelectric sensor may comprise a photodeformable unit and a piezoelectric unit in contact with the photodeformable unit. |
| US11387289B2 |
Array substrate, manufacturing method thereof, and display apparatus
An array substrate includes a substrate, a packaging layer, and at least one sensor. The packaging layer is over the substrate. Each sensor includes a sensing thin-film transistor and a sensing unit, electrically coupled with each other. The sensing thin-film transistor is between the package layer and the substrate, and the sensing unit is over a side of the package layer away from the substrate. The array substrate can also include a plurality of display thin-film transistors. The sensing thin-film transistor in each sensor can be at substantially same film layers, or of a same structure and a same type, as each display thin-film transistor. |
| US11387286B2 |
Display device
A display device including: a lower substrate having a display area and a peripheral area; a plurality of lower electrodes disposed in the display area and on the lower substrate; a pixel defining layer covering a portion of each of the lower electrodes; a light emitting layer disposed on the lower electrodes and the pixel defining layer; an upper electrode disposed on the light emitting layer; a plurality of optical filters disposed on the upper electrode and spaced apart from each other; a lower light blocking layer disposed between the optical filters, and having a plurality of openings; an upper substrate disposed on the lower light blocking layer to oppose the lower substrate; and an alignment structure disposed in the peripheral area of the lower substrate and the upper substrate, and including a material identical to a material of the pixel defining layer and the lower light blocking layer. |
| US11387282B2 |
Foldable display apparatus
A foldable display apparatus includes: a non-folding area, and a folding area, in which an aperture ratio of a plurality of red sub pixels in the folding area is lower than an aperture ratio of a plurality in red sub pixels of the non-folding area, an aperture ratio of the plurality of green sub pixels in the folding area is lower than an aperture ratio of the plurality of green sub pixels of the non-folding area, and an aperture ratio of the plurality in blue sub pixels of the folding area is lower than an aperture ratio of the plurality of blue sub pixels of the non-folding area. |
| US11387281B2 |
Array substrate, display panel and display device, enabling full screen display with transparent and non-transparent display areas
An array substrate, a display panel, and a display device. The array substrate includes a substrate; a first electrode layer formed on the substrate; a light emitting layer formed on the first electrode layer and including a first light emitting area and a second light emitting area, the first light emitting area including a plurality of first light emitting blocks, the second light emitting area including a plurality of second light emitting blocks, and the first light emitting blocks and the second light emitting blocks formed by the same process; and a second electrode layer formed on the light emitting layer; where the first electrode layer includes a plurality of first electrodes corresponding to the first light emitting area, each of the first electrodes corresponds to a plurality of the first light emitting blocks, the first light emitting blocks on the same first electrode have the same color, and the first light emitting area is a transparent area, and the second light emitting area is a non-transparent area. |
| US11387280B2 |
Light-emitting device and electronic device
Provided is a light-emitting device that can display an image with a wide color gamut or a novel light-emitting element. The light-emitting device includes a plurality of light-emitting elements each of which includes an EL layer between a pair of electrodes. Light obtained from a first light-emitting element through a first color filter has, on chromaticity coordinates (x, y), a chromaticity x of greater than 0.680 and less than or equal to 0.720 and a chromaticity y of greater than or equal to 0.260 and less than or equal to 0.320. Light obtained from a second light-emitting element through a second color filter has, on chromaticity coordinates (x, y), a chromaticity x of greater than or equal to 0.130 and less than or equal to 0.250 and a chromaticity y of greater than 0.710 and less than or equal to 0.810. Light obtained from a third light-emitting element through a third color filter has, on chromaticity coordinates (x, y), a chromaticity x of greater than or equal to 0.120 and less than or equal to 0.170 and a chromaticity y of greater than or equal to 0.020 and less than 0.060. |
| US11387278B2 |
Electronic devices and methods of manufacturing the same
An electronic device includes a plurality of pixel electrodes, an active layer on the plurality of pixel electrodes, an opposed electrode on the active layer and covering an entirety of an upper surface of the active layer, and a first encapsulation film on the opposed electrode wherein the opposed electrode and the first encapsulation film have a common planar shapes. |
| US11387270B2 |
Image sensor package including reflector
An image sensor package includes a substrate, an image sensor mounted on the substrate, a bonding wire connecting the image sensor to the substrate, a reflector disposed on the image sensor, a sealing member sealing the bonding wire and a portion of the image sensor, and covering at least a portion of the reflector, the sealing member including a hole exposing an effective imaging plane of the image sensor, and a filter attached to the sealing member. |
| US11387268B2 |
Image sensor including dummy patterns positioned between adjacent transfer gates
An image sensor includes a first transfer gate formed over a substrate, and including a first projection; a second transfer gate formed over the substrate, neighboring the first transfer gate, and including a second projection; and a floating diffusion formed in the substrate, and partially overlapping with the first transfer gate and the second transfer gate, wherein the first projection and the second projection face each other. |
| US11387267B2 |
Image sensor, focus adjustment device, and imaging device
An image sensor includes a plurality of pixels each including: a first and a second photoelectric conversion unit that perform photoelectric conversion upon light that has passed through a micro lens and generates a charge; a first accumulation unit that accumulates the charge generated by the first conversion unit; a second accumulation unit that accumulates the charge generated by the second conversion unit; a third accumulation unit that accumulates the charges generated by the first and second conversion units; a first transfer unit that transfers the charge generated by the first conversion unit to the first accumulation unit; a second transfer unit that transfers the charge generated by the second conversion unit to the second accumulation unit; and a third transfer unit that transfers the charges generated by the first and second conversion units to the third accumulation unit. |
| US11387266B2 |
Pixel-level background light subtraction
A pixel circuit, a method for performing a pixel-level background light subtraction, and an imaging device are disclosed. In one example of the present disclosure, the pixel circuit includes an overflow gate transistor, a photodiode, and two taps. Each tap of the two taps is configured to store a background signal that is integrated by the photodiode, subtract the background signal from a floating diffusion, store a combined signal that is integrated by the photodiode at the floating diffusion, and generate a demodulated signal based on a subtraction of the background signal from the floating diffusion and a storage of the combined signal that is integrated at the floating diffusion. |
| US11387261B2 |
Array substrate and display device
The present disclosure provides an array substrate and a display device. The array substrate includes a display region and a non-display region located at a periphery of the display region. The display region includes a plurality of pixel structures, and an outgoing line of each of the pixel structures is overlapped with and connected to a connection line. The connection line receives a signal provided by a signal supply circuit. An area of a contact interface between at least part of the connection line and the outgoing line is larger than an area of an orthographic projection of the contact interface on a plane where the array substrate is located. |
| US11387260B2 |
TFT substrate, scanning antenna provided with TFT substrate, and manufacturing method of TFT substrate
A manufacturing method of a TFT substrate is a manufacturing method of a TFT substrate in which each of a source electrode and a drain electrode includes a lower source metal layer and an upper source metal layer. The manufacturing method of the TFT substrate includes the steps of: forming an upper source metal layer by etching an upper conductive film with the first resist layer as an etching mask; forming a lower source metal layer by etching a lower conductive film; removing the first resist layer and forming a second resist layer covering the upper source metal layer; and forming a source contact portion and a drain contact portion by etching a contact layer by dry etching with the second resist layer as an etching mask. |
| US11387257B2 |
Array substrate and manufacturing method thereof, display panel and display device
An array substrate and a manufacturing method thereof, a display panel and a display device are provided. The array substrate includes: a base substrate including a driving thin film transistor region and a switching thin film transistor region; and a buffer layer containing oxygen, the buffer layer including a first buffer part located in the driving thin film transistor region and a second buffer part located in the switching thin film transistor region; the first buffer part has a first thickness, the second buffer part has a second thickness, and the second thickness is greater than the first thickness. |
| US11387256B2 |
Semiconductor integrated circuit device
The present disclosure attempts to provide a capacitor cell having a large capacitance value per unit area in a semiconductor integrated circuit device using a three-dimensional transistor device. A logic cell includes a three-dimensional transistor device. A capacitor cell includes a three-dimensional transistor device. A length of a portion, of a local interconnect, which protrudes from a three-dimensional diffusion layer in a direction away from a power supply interconnect in the capacitor cell is greater than a length of a portion, of a local interconnect, which protrudes from a three-dimensional diffusion layer in a direction away from a power supply interconnect in the logic cell. |
| US11387254B2 |
Memory cell and methods thereof
According to various aspects, a memory cell comprise: a first terminal, a second terminal, a third terminal, a fourth terminal, and a fifth terminal to control the memory cell; a first memory element (FeFET1) and a second memory element (FeFET2), the first memory element comprising a first capacitive memory structure electrically connected to the first terminal and a first field-effect transistor structure coupled to the first capacitive memory structure and electrically connected to the third terminal and the forth terminal; the second memory element comprising a second capacitive memory structure electrically connected to the second terminal and a second field-effect transistor structure coupled to the second capacitive memory structure and electrically connected to the third terminal and the fifth terminal. |
| US11387253B2 |
Three-dimensional semiconductor devices and methods of fabricating the same
A three-dimensional semiconductor device including a conductive layer disposed on a substrate and including a first conductivity-type impurity; an insulating base layer disposed on the conductive layer; a stack structure including a lower insulating film disposed on the insulating base layer, and a plurality of gate electrodes and a plurality of mold insulating layers alternately stacked on the lower insulating film, wherein the insulating base layer includes a high dielectric material; a vertical structure including a vertical channel layer penetrating through the stack structure and a vertical insulating layer disposed between the vertical channel layer and the plurality of gate electrodes, the vertical structure having an extended area extending in a width direction in the insulating base layer; and an isolation structure penetrating through the stack structure, the insulating base layer and the conductive layer, and extending in a direction parallel to an upper surface of the substrate, wherein the conductive layer has an extension portion extending along a surface of the vertical channel layer in the extended area of the vertical structure. |
| US11387252B2 |
Non-volatile memory device and method of manufacturing the non-volatile memory device
A non-volatile memory device may include a semiconductor substrate, a stack structure and a source structure. The stack structure may be formed on the semiconductor substrate. The source structure may be formed in a slit configured to divide the stack structure. The source structure may include a sealing layer, a source liner, a gap-filling layer and a source contact pattern. The sealing layer may be formed on an inner wall of the slit. The source liner may be formed on a surface of the sealing layer and a bottom surface of the slit. The gap-filling layer may be formed in the slit. The source contact pattern may be formed on the gap-filling layer in the slit. The source contact pattern may be electrically connected with the source liner. |
| US11387247B2 |
Semiconductor memory
A semiconductor memory includes first to fourth stacked bodies. The first stacked body includes a first conductor, and an alternating stack of first insulators and second conductors above the first conductor in a region. The second stacked body includes a third conductor, and an alternating stack of second insulators and fourth conductors above the third conductor in another region. The third stacked body includes a fifth conductor adjacent to the first conductor via a third insulator in a separation region. The fourth stacked body includes a seventh conductor adjacent to the third conductor via a fifth insulator in the separation region. The fifth conductor is electrically insulated from the seventh conductor. |
| US11387246B2 |
Semiconductor device including data storage pattern
A semiconductor device includes a vertical pattern in a first direction, interlayer insulating layers, spaced apart, a side surface of each of the interlayer insulating layers facing a side of the vertical pattern, a gate electrode between the interlayer insulating layers, a side of the gate electrode facing the side of the vertical pattern, a dielectric structure between the vertical pattern and the interlayer insulating layers with the gate electrode between the interlayer insulating layers, and data storage patterns between the gate electrode and the vertical pattern, the data storage patterns spaced apart. The dielectric structure includes a first and a second dielectric layers, the second dielectric layer between the first dielectric layer and the vertical pattern. The data storage patterns are between the first dielectric layer and the second dielectric layer. The first dielectric layer includes portions between the data storage patterns and the gate electrode. |
| US11387245B2 |
Electronic devices including pillars in array regions and non-array regions, and related systems and methods
An electronic device comprising a lower deck and an upper deck adjacent to a source. Each of the lower deck and the upper deck comprise tiers of alternating conductive materials and dielectric materials. Each of the lower deck and the upper deck also comprise an array region and one or more non-array regions. Memory pillars are in the lower deck and the upper deck of the array region and the memory pillars are configured to be operably coupled to the source. Dummy pillars are in the upper deck of the one or more non-array regions and the dummy pillars are configured to be electrically isolated from the source. Another conductive material is in the upper deck and the lower deck of the one or more non-array regions. Additional electronic devices and related systems and methods of forming an electronic device are also disclosed. |
| US11387241B2 |
Method for fabricating flash memory
A method for fabricating flash memory is provided. A plurality of floating gate structures is formed on a gate dielectric layer in the memory device region of a substrate. The protective spacers are formed on two opposite sidewalls of each floating gate structure. A polysilicon gate structures are formed on the logic device region and a polysilicon control gate structure with an opening are formed on the memory device region to cover two adjacent floating gate structures, wherein the two protective spacers facing each other between two adjacent floating gate structures are exposed by the opening, and then the exposed protective spacer are removed. An ion implantation is performed on the substrate to form a source region between the two adjacent floating gate structures on each cell area. There will be no polysilicon material residue in the memory device region or pitting/undercutting phenomenon in the logic device region. |
| US11387239B2 |
Semiconductor memory device structure
A transistor structure of a semiconductor memory device comprises: an active area having a plurality of trenches and a substrate surface, the trenches having openings oriented toward the substrate surface; a plurality of gate structures embedded in the trenches, wherein the substrate surface comprises source regions located on outer sides of the gate structures and a drain region located between the gate structures; node contacts each disposed on one of the source regions; a bit line contact disposed on the drain region and connectable to a bit line, the node contacts sharing the bit line contact through adjacent gate structures, wherein the drain region comprises a first ion implantation layer extending inwardly from the bit line contact, each of the source regions comprising a second ion implantation layer extending inwardly from a corresponding node contact, the first ion implantation layer being deeper than the second ion implantation layer. |
| US11387234B2 |
Semiconductor device
A semiconductor device includes a substrate with a first active region; first and second active patterns extending in a first direction and spaced apart in a second direction, and each having a source pattern, a channel pattern, and a drain pattern that are sequentially stacked; first and second gate electrodes that surround the channel patterns of the first and second active patterns and extend in the first direction; an interlayer dielectric layer that covers the first and second active patterns and the first and second gate electrodes; a first active contact that penetrates the interlayer dielectric layer and is coupled to the first active region between the first and second active patterns; and a first power rail on the interlayer dielectric layer and electrically connected to the first active contact, each of the first and second active patterns including an overlapping region that vertically overlaps the first power rail. |
| US11387231B2 |
Semiconductor device
The semiconductor device that supplies a charging current to a bootstrap capacitor includes a semiconductor layer, an N+-type diffusion region, an N-type diffusion region, a P+-type diffusion region, a P-type diffusion region, an N+-type diffusion region, a source electrode, a drain electrode, a back gate electrode, and a gate electrode. The N+-type diffusion region and the N-type diffusion region are electrically connected to a first electrode of the bootstrap capacitor. The N+-type diffusion region is supplied with a power supply voltage. The source electrode is connected to the N+-type diffusion region and is supplied with the power supply voltage. The back gate electrode is connected to a region separated from the N+-type diffusion region and is grounded. The breakdown voltage between the source electrode and the back gate electrode is greater than the power supply voltage. |
| US11387230B2 |
System in package structure for perform electrostatic discharge operation and electrostatic discharge protection structure thereof
A system in package structure and an electrostatic discharge protection structure thereof are provided. The electrostatic discharge protection structure includes a redistribution layer and a first transistor array. The redistribution layer has a first electrode and a second electrode. The first transistor array is coupled to a pin end of at least one integrated circuit, the first electrode and the second electrode. The first transistor array has a plurality of transistors. A plurality of first transistors of the transistors are coupled in parallel, and a plurality of second transistors of the transistors are coupled in parallel. The first transistors and the second transistors are configured to be turned on for dissipating an electrostatic discharge current. |
| US11387229B2 |
Semiconductor device
Disclosed is a semiconductor device comprising a logic cell including first and second active regions spaced apart in a first direction on a substrate, first and second active patterns on the first and second active regions and extend in a second direction, first and second source/drain patterns on the first and second active patterns, gate electrodes extending in the first direction to run across the first and second active patterns and arranged in the second direction at a first pitch, first lines in a first interlayer dielectric layer on the gate electrodes and each electrically connected to the first source/drain pattern, the second source/drain pattern, or the gate electrode, and second lines in a second interlayer dielectric layer on the first interlayer dielectric layer and extending parallel to each other in the first direction. |
| US11387228B2 |
Display assembly
A display assembly includes a display component and a flexible stratum. The flexible stratum includes a first side coupled to the display component and a second side opposite to the first side. The second side includes protruding portions separate apart from each other, and one of the protruding portions includes a side section, a top section, and a tapering section extending from the side section to the top section and having a curved surface. |
| US11387227B2 |
Memory device having multiple chips and method for manufacturing the same
According to one embodiment, a memory device includes: a first chip including a first insulating layer and a first pad; a plurality of memory units provided in a first area of the first insulating layer and arranged at first intervals in a first direction parallel to a surface of the first chip; a plurality of mark portions provided in a second area of the first insulating layer and arranged at second intervals in the first direction; a second chip including a second pad connected to the first pad and overlapping the first chip in a second direction perpendicular to the surface of the first chip; and a circuit provided in the second chip. |
| US11387226B2 |
Chip power supply system, chip, PCB, and computer device
This application discloses a chip power supply system, a chip, a PCB, and a computer device. The chip power supply system includes a first printed circuit board (PCB), a chip, a power controller, and an inductor module. The first PCB includes N vias, first ends of the N vias are located at a top layer of the PCB, and second ends of the N vias are located at a bottom layer of the first PCB. The chip is coupled to the top layer of the first PCB through N power supply contacts and the first ends of the N vias. The inductor module is coupled to the chip through M power supply contacts and the second ends of M vias of the N vias. The power controller is coupled to the inductor module through the first PCB, and the power controller is configured to control the inductor module to supply power to the chip. |
| US11387224B2 |
Phase change material in substrate cavity
A semiconductor device package structure is provided. The semiconductor device package structure includes a substrate having a cavity, and phase change material within the cavity. In an example, the phase change material has a phase change temperature lower than 120 degree centigrade. A die may be coupled to the substrate. In an example, the semiconductor device package structure includes one or more interconnect structures that are to couple the die to the phase change material within the cavity. |
| US11387223B2 |
Display device comprising plurality of light emitting elements overlapping with contact electrodes
A display device includes a substrate. A first electrode, a second electrode, and a third electrode are on the substrate, and are sequentially arranged along a first direction. A first light emitting element is located between the first electrode and the second electrode. A second light emitting element is located between the second electrode and the third electrode. A first contact electrode overlaps the first electrode and one end of the first light emitting element, and is in contact with the first electrode and the one end of the first light emitting element. A second contact electrode overlaps and is in contact with the other end of the first light emitting element. A third contact electrode overlaps and is in contact with the second electrode and the other end of the second light emitting element. The second contact electrode extends while detouring the third contact electrode. |
| US11387220B2 |
Display comprising light-emitting chips and manufacturing method therefor
A display according to one embodiment of the present invention comprises: a light-transmitting first layer and including a plurality of cavities; a plurality of light-emitting diode (LED) chips disposed in the cavities; and a second layer including a circuit electrically connected to the plurality of LED chips. Various other embodiments are also possible. |
| US11387218B2 |
Pad-out structure for semiconductor device and method of forming the same
The present disclosure provides a method of fabricating a semiconductor device. The method can include bonding a first die and a second die face to face, the first die including a substrate, transistors formed on a face side of the first die over a semiconductor layer with an insulating layer between the substrate and the semiconductor layer, and a first contact structure on the face side of the first die extending through the insulating layer. The method can also include exposing the first contact structure from the back side of the first die, forming, from the back side of the first die, a contact hole in the insulating layer to expose the semiconductor layer, and forming, on the back side of the first die, a first pad-out structure connected with the first contact structure and a second pad-out structure, on the contact hole, conductively connected with the semiconductor layer. |
| US11387216B2 |
Semiconductor memory device
A semiconductor memory device includes a plurality of first pads disposed in one surface of a memory chip which includes a memory cell array and a plurality of row lines coupled to the memory cell array, and coupled to the row lines, respectively; and a plurality of second pads disposed in one surface of a circuit chip which is boned to the one surface of the memory chip, coupled to pass transistors, respectively, of the circuit chip, and bonded to the first pads, respectively. The second pads are aligned with the pass transistors, with the same pitch as a pitch of the pass transistors. |
| US11387215B2 |
RF devices with enhanced performance and methods of forming the same
The present disclosure relates to a radio frequency device that includes a transfer device die and a multilayer redistribution structure underneath the transfer device die. The transfer device die includes a device region with a back-end-of-line (BEOL) portion and a front-end-of-line (FEOL) portion over the BEOL portion and a transfer substrate. The FEOL portion includes isolation sections and an active layer surrounded by the isolation sections. A top surface of the device region is planarized. The transfer substrate including a porous silicon (PSi) region resides over the top surface of the device region. Herein, the PSi region has a porosity between 1% and 80%. The multilayer redistribution structure includes a number of bump structures, which are at a bottom of the multilayer redistribution structure and electrically coupled to the FEOL portion of the transfer device die. |
| US11387214B2 |
Multi-chip modules formed using wafer-level processing of a reconstituted wafer
Apparatuses and methods are described. This apparatus includes a bridge die having first contacts on a die surface being in a molding layer of a reconstituted wafer. The reconstituted wafer has a wafer surface including a layer surface of the molding layer and the die surface. A redistribution layer on the wafer surface includes electrically conductive and dielectric layers to provide conductive routing and conductors. The conductors extend away from the die surface and are respectively coupled to the first contacts at bottom ends thereof. At least second and third IC dies respectively having second contacts on corresponding die surfaces thereof are interconnected to the bridge die and the redistribution layer. A first portion of the second contacts are interconnected to top ends of the conductors opposite the bottom ends thereof in part for alignment of the at least second and third IC dies to the bridge die. |
| US11387209B2 |
Package structure
A package structure and method of forming the same are provided. The package structure includes a die, a first dielectric layer, a second dielectric layer and a conductive terminal. The first dielectric layer covers a bottom surface of the die and includes a first edge portion and a first center portion in contact with the bottom surface of the die. The first edge portion is thicker than the first center portion. The second dielectric layer is disposed on the first dielectric layer and laterally surrounding the die. The second dielectric layer includes a second edge portion on the first edge portion and a second center portion in contact with a sidewall of the die. The second edge portion is thinner than the second center portion. The conductive terminal is disposed over the die and the second dielectric layer and electrically connected to the die. |
| US11387206B2 |
RF devices with enhanced performance and methods of forming the same
The present disclosure relates to a radio frequency (RF) device that includes a mold device die and a multilayer redistribution structure underneath the mold device die. The mold device die includes a device region with a back-end-of-line (BEOL) portion and a front-end-of-line (FEOL) portion over the BEOL portion, and a first mold compound. The FEOL portion includes an active layer formed from a strained silicon epitaxial layer, in which a lattice constant is greater than 5.461 at a temperature of 300K. The first mold compound resides over the active layer. Herein, silicon crystal does not exist between the first mold compound and the active layer. The multilayer redistribution structure includes a number of bump structures, which are at a bottom of the multilayer redistribution structure and electrically coupled to the FEOL portion of the mold device die. |
| US11387203B2 |
Side wettable package
A side wettable package includes a molding compound, a chip and multiple conductive pads exposed from a bottom surface of the molding compound. The conductive pads include peripheral conductive pads arranged near a side wall of the molding compound. Each of the peripheral conductive pads is over etched to form an undercut. When the side wettable package is connected to a circuit board via solder, the solder ascends to the undercut of the peripheral conductive pads for improving connection yield and facilitating inspection of soldering quality. |
| US11387202B2 |
Nanowire bonding interconnect for fine-pitch microelectronics
A nanowire bonding interconnect for fine-pitch microelectronics is provided. Vertical nanowires created on conductive pads provide a debris-tolerant bonding layer for making direct metal bonds between opposing pads or vias. Nanowires may be grown from a nanoporous medium with a height between 200-1000 nanometers and a height-to-diameter aspect ratio that enables the nanowires to partially collapse against the opposing conductive pads, creating contact pressure for nanowires to direct-bond to opposing pads. Nanowires may have diameters less than 200 nanometers and spacing less than 1 μm from each other to enable contact or direct-bonding between pads and vias with diameters under 5 μm at very fine pitch. The nanowire bonding interconnects may be used with or without tinning, solders, or adhesives. A nanowire forming technique creates a nanoporous layer on conductive pads, creates nanowires within pores of the nanoporous layer, and removes at least part of the nanoporous layer to reveal a layer of nanowires less than 1 μm in height for direct bonding. |
| US11387197B2 |
Protected electronic integrated circuit chip
An electronic integrated circuit chip includes a semiconductor substrate with a front side and a back side. A first reflective shield is positioned adjacent the front side of the semiconductor substrate and a second reflective shield is positioned adjacent the back side of the semiconductor substrate. Photons are emitted by a photon source to pass through the semiconductor substrate and bounce off the first and second reflective shields to reach a photon detector at the front side of the semiconductor substrate. The detected photons are processed in order to determine whether to issue an alert indicating the existence of an attack on the electronic integrated circuit chip. |
| US11387195B2 |
Electronic chip
An electronic chip includes a substrate made of semiconductor material. Conductive pads are located on a front side of the substrate and cavities extend into the substrate from a backside of the substrate. Each cavity reaches an associated conductive pad. Protrusions are disposed on the backside of the substrate. A conductive layer covers the walls and bottoms of the cavities. The conductive layer includes portions on the backside, each portion partially located on an associated protrusion and electrically connecting two of the conductive pads. |
| US11387188B2 |
High density interconnect structures configured for manufacturing and performance
Discussed generally herein are methods and devices including or providing a high density interconnect structure. A high density interconnect structure can include a stack of alternating dielectric layers and metallization layers comprising at least three metallization layers including conductive material with low k dielectric material between the conductive material, and at least two dielectric layers including first medium k dielectric material with one or more first vias extending therethrough, the at least two dielectric layers situated between two metallization layers of the at least three metallization layers, a second medium k dielectric material directly on a top surface of the stack, a second via extending through the second medium k dielectric material, the second via electrically connected to conductive material in a metallization layer of the three or more metallization layers, and a pad over the second medium k dielectric material and electrically connected to the second via. |
| US11387185B2 |
Field-effect transistor, method of manufacturing the same, and radio-frequency device
There is provided a field-effect transistor including: a gate electrode; a semiconductor layer having a source region and a drain region with the gate electrode in between; contact plugs provided on the source region and the drain region; first metals stacked on the contact plugs; and a low-dielectric constant region provided in a region between the first metals along an in-plane direction of the semiconductor layer and provided at least in a first region below bottom surfaces of the first metals along a stacking direction. |
| US11387182B2 |
Module structure and method for manufacturing the module structure
The module structure includes a substrate, a passive element, metal columns and a chip. The passive element, the metal columns and the chip are located on a same side of the substrate. The passive element is located between the substrate and the film where the metal columns and the chip are located. The following applies: the vertical projection of the chip on the substrate overlaps a line segment or closed figure formed by endpoints constituted by the vertical projections of the metal columns on the substrate; the vertical projection of the passive element on the substrate overlaps the line segment or closed figure formed by the endpoints constituted by the vertical projections of the metal columns on the substrate; or the vertical projection of the passive element on the substrate overlaps the vertical projection of the chip on the substrate. |
| US11387176B2 |
Semiconductor package structure
A semiconductor package structure is provided. The semiconductor package structure includes a substrate, a first semiconductor die, and a second semiconductor die. The substrate includes a first substrate partition and a second substrate partition. The first substrate partition has a first wiring structure. The second substrate partition is adjacent to the first substrate partition and has a second wiring structure. The first substrate partition and the second substrate partition are surrounded by a first molding material. The first semiconductor die is disposed over the substrate and electrically coupled to the first wiring structure. The second semiconductor die is disposed over the substrate and electrically coupled to the second wiring structure. |
| US11387168B2 |
Semiconductor devices
A semiconductor device includes a first conductive layer, an organic layer and a silicon layer. The first conductive layer includes a first surface. The organic layer is disposed over the first surface of the first conductive layer. The silicon layer is disposed over the organic layer and extended onto and in contact with the first surface of the first conductive layer. |
| US11387161B2 |
Package with thermal interface material retaining structures on die and heat spreader
A device package and a method of forming a device package are described. The device package includes a lid with one or more legs on an outer periphery of the lid, a top surface, and a bottom surface, where the lid is disposed on the substrate. The legs of the lid are attached to the substrate with a sealant. The device package also has one or more dies disposed on the substrate. The die(s) are below the bottom surface of the lid, where each of the dies has a top surface and a bottom surface. The device package further includes a retaining structure disposed between the bottom surface of the lid and the top surface of the die, where the retaining structure has one or more inner walls. The device package includes a thermal interface material disposed within the inner walls of the retaining structure and above the top surface of the die. |
| US11387160B2 |
Semiconductor apparatus, power module and power supply
The semiconductor apparatus includes: a thermal source TS including a semiconductor device generating heat in an operating state; a thermal diffusion unit thermally connected to the thermal source TS, the thermal diffusion unit including space in a direction opposite to the thermal source; a plurality of air-cooling fin units disposed in the space of the thermal diffusion unit, one end of the plurality of fin unit is connected to the thermal diffusion unit; and a base unit connected to the thermal diffusion unit, wherein the plurality of air-cooling fin units is connected to the base unit through a plurality of thermal contact units CP1, CP2, CP3, . . . , CPn. Provide is an air-cooling type semiconductor apparatus, power module, and power supply, each having high heat dissipation performance and realizing light weight. |
| US11387157B2 |
RF devices with enhanced performance and methods of forming the same
The present disclosure relates to a radio frequency device that includes a mold device die and a multilayer redistribution structure underneath the mold device die. The mold device die includes a device region with a back-end-of-line (BEOL) portion and a front-end-of-line (FEOL) portion over the BEOL portion, a barrier layer, and a first mold compound. The FEOL portion includes isolation sections and an active layer surrounded by the isolation sections. The barrier layer formed of silicon nitride resides over the active layer and top surfaces of the isolation sections. The first mold compound resides over the barrier layer. Herein, silicon crystal does not exist between the first mold compound and the active layer. The multilayer redistribution structure includes a number of bump structures, which are at a bottom of the multilayer redistribution structure and electrically coupled to the FEOL portion of the mold device die. |
| US11387156B2 |
Silicon carbide semiconductor device including a resin covering a silicon carbide semiconductor chip
The silicon carbide semiconductor chip includes a silicon carbide substrate, a first insulating film on the silicon carbide substrate, and a second insulating film on the first insulating film. The silicon carbide substrate has a first main surface in contact with the first insulating film, a second main surface, and an outer peripheral surface. The resin covers both of the outer peripheral surface and the second insulating film. The second insulating film has a Young's modulus lower than that of the resin. The second insulating film has a thermal expansion coefficient higher than that of the silicon carbide substrate and higher than that of the resin. The second insulating film includes a first outer peripheral end portion. In a cross section perpendicular to the first main surface, the first outer peripheral end portion is provided along the outer peripheral surface. |
| US11387155B2 |
IC having a metal ring thereon for stress reduction
An integrated circuit (IC) includes a substrate including circuitry configured for a function, the circuitry including at least one stress sensitive circuit portion, with at least a portion of nodes in the circuitry electrically coupled to bond pads provided by a top metal layer. A metal wall that is ring-shaped is positioned above the top metal layer that is not electrically coupled to the circuitry. The stress sensitive circuit portion is with at least a majority of its area within an inner area of the substrate that is framed by the metal wall to provide a cavity. |
| US11387149B2 |
Semiconductor device and method for forming gate structure thereof
The present disclosure provides a semiconductor device and a method for forming a gate structure thereof. The method includes: preparing a semiconductor substrate, and forming an active region on the semiconductor substrate; forming a dummy gate stack, a gate sidewall spacer, N-type and/or P-type source/drain regions, and an interlayer dielectric layer on the active region sequentially; removing the dummy gate stack to form a gate opening, and forming an interface oxide layer and a ferroelectric gate dielectric layer sequentially at the gate opening; forming a stress sacrificial layer on the ferroelectric gate dielectric layer, and performing an annealing process; during the annealing process, the clamping effect of the stress sacrificial layer induces the ferroelectric gate dielectric layer converted to form a ferroelectric-phase gate dielectric layer; removing the stress sacrificial layer; and forming a metal gate on the ferroelectric-phase gate dielectric layer. |
| US11387147B2 |
Method for producing a component by filling a cavity within an electrical isolation area with carbon-based material
A method is provided for producing a component based on a plurality of transistors on a substrate including an active area and an electrical isolation area, each transistor including a gate and spacers on either side of the gate, the electrical isolation area including at least one cavity formed as a hollow between a spacer of a first transistor of the plurality of transistors and a spacer of a second transistor of the plurality of transistors, the first and the second transistors being adjacent, the method including: forming the gates of the transistors; forming the spacers; and forming a mechanically constraining layer for the transistors; and after forming the spacers and before forming the mechanically constraining layer, forming a filling configured to at least partially fill, with a filling material, the at least one cavity within the electrical isolation area, between the spacers of the first and the second transistors. |
| US11387145B2 |
Jet ablation die singulation systems and related methods
Implementations of a method of singulating a plurality of semiconductor die may include forming an opening in a layer of passivation material coupled to a second side of a semiconductor substrate; etching substantially through a thickness of the semiconductor substrate at the opening in the layer of passivation material to form etched sidewalls along the thickness at a plurality of die streets; and jet ablating one or more portions of the layer of passivation material that overhangs the etched sidewalls. |
| US11387143B2 |
Redistribution lines with protection layers and method forming same
A method includes forming a metal seed layer over a first conductive feature of a wafer, forming a patterned photo resist on the metal seed layer, forming a second conductive feature in an opening in the patterned photo resist, and heating the wafer to generate a gap between the second conductive feature and the patterned photo resist. A protection layer is plated on the second conductive feature. The method further includes removing the patterned photo resist, and etching the metal seed layer. |
| US11387138B2 |
Integrated circuit isolation feature and method of forming the same
Examples of a technique for forming a dielectric material for an integrated circuit are provided herein. In an example, an integrated circuit workpiece is received that includes a recess. A first dielectric precursor is deposited in the recess. The first dielectric precursor includes a non-semiconductor component. A second dielectric precursor is deposited in the recess on the first dielectric precursor, and an annealing process is performed such that a portion of the non-semiconductor component of the first dielectric precursor diffuses into the second dielectric precursor. The non-semiconductor component may include oxygen, and the annealing process may be performed in one of a vacuum or an inert gas environment. |
| US11387134B2 |
Process kit for a substrate support
Methods and apparatus for processing substrates are provided herein. In some embodiments, a process kit for a substrate support includes: an upper edge ring made of quartz and having an upper surface and a lower surface, wherein the upper surface is substantially planar and the lower surface includes a stepped lower surface to define a radially outermost portion and a radially innermost portion of the upper edge ring. |
| US11387129B2 |
Substrate warehouse, substrate processing system, and substrate inspection method
A substrate warehouse stores a container housing a substrate, and includes a transfer-in part which allows the container to be mounted thereon when the container is transferred-in from an outside; a transfer-out part which allows the container to be mounted thereon when the container is transferred-out to the outside; and a standby part which allows the container standing by for transfer-out to the outside to be mounted thereon. Also included is a functional part including an inspection that performs processing of inspecting the substrate; a delivery part which allows the container to be mounted thereon when delivering the substrate between the functional part and the container; a container transfer mechanism which transfers the container in the substrate warehouse; and a substrate transfer mechanism which transfers the substrate between the functional part and the container mounted on the delivery part. |
| US11387126B2 |
Paddle tool for transporting semiconductor wafers or other components
An apparatus includes a base configured to receive at least one component. The apparatus also includes a handle connected to the base and extending away from the base. The apparatus further includes a clip configured to slide along at least part of the handle towards and away from the base. The clip is configured to secure the at least one component to the apparatus and to release the at least one component from the apparatus. The clip is configured, after the at least one component is secured, to be locked in order to prevent release of the at least one component from the apparatus. The handle may include a lock configured to selectively prevent movement of the clip along the handle passed the lock. |
| US11387124B2 |
Wafer container and method for holding wafer
Provided is a wafer container including a frame having a first sidewall and a second sidewall extending along a YZ plane; a plurality of first support structures disposed on the first sidewall and arranged along a Z direction; and a plurality of second support structures disposed on the second sidewall and arranged along the Z direction. One of the plurality of first support structures is horizontally aligned with a corresponding second support structure to constitute a wafer holder. The wafer holder includes a plurality of island structures to hold a wafer in a XY plane, and the plurality of island structures are separated to each other along a X direction. A method for holding at least one wafer is also provided. |
| US11387119B2 |
Fluid heating device
A fluid heating device includes: a tank to store a fluid; a pump to deliver the fluid stored in the tank; a heater to heat the delivered fluid to a predetermined temperature; a return pipe to return the heated fluid to the tank; a fluid supply valve to supply an unheated fluid into the tank; a fluid discharge valve to discharge the heated fluid from the tank; a temperature sensor to detect a temperature of the heated fluid; and a temperature controller to control an opening degree of each of the fluid supply valve and the fluid discharge valve to control the temperature of the fluid stored in the tank. The temperature controller includes: a discharge opening-degree controller-to control the opening degree of the fluid discharge valve; and a supply opening-degree controller to control the opening degree of the fluid supply valve. |
| US11387117B2 |
Component carrier with included electrically conductive base structure and method of manufacturing
A component carrier having a base structure consisting of an electrically conductive material, an electronic component arranged on the base structure and a surrounding structure on the base structure, where the surrounding structure at least partially surrounds the electronic component laterally. |
| US11387116B2 |
Method of manufacturing semiconductor device
In a manufacturing process of a transistor including an oxide semiconductor film, oxygen doping treatment is performed on the oxide semiconductor film, and then heat treatment is performed on the oxide semiconductor film and an aluminum oxide film provided over the oxide semiconductor film. Consequently, an oxide semiconductor film which includes a region containing more oxygen than a stoichiometric composition is formed. The transistor formed using the oxide semiconductor film can have high reliability because the amount of change in the threshold voltage of the transistor by a bias-temperature stress test (BT test) is reduced. |
| US11387114B2 |
Semiconductor device with dummy gate and metal gate and method of fabricating the same
A semiconductor device includes a substrate, a first well, a second well, a metal gate, a poly gate, a source region, and a drain region. The first well and the second well are within the substrate. The metal gate is partially over the first well. The poly gate is over the second well. The poly gate is separated from the metal gate, and a width ratio of the poly gate to the metal gate is in a range from about 0.1 to about 0.2. The source region and the drain region are respectively within the first well and the second well. |
| US11387109B1 |
CMP process and methods thereof
A method of forming a semiconductor device includes forming a first epitaxial layer over a substrate to form a wafer, depositing a dielectric layer over the first epitaxial layer, patterning the dielectric layer to form an opening, etching the first epitaxial layer through the opening to form a recess, forming a second epitaxial layer in the recess, etching the dielectric layer to expose a top surface of the first epitaxial layer, and planarizing the exposed top surface of the first epitaxial layer and a top surface of the second epitaxial layer. |
| US11387108B2 |
Composition for metal electroplating comprising leveling agent
A composition for metal plating comprising a source of metal ions and at least one leveling agent comprising at least one polyaminoamide comprising a polymer fragment of formula (I) or derivatives thereof obtainable by complete or partial protonation or N-quarternisation. |
| US11387105B2 |
Loading effect reduction through multiple coat-etch processes
First, second, and third trenches are formed in a layer over a substrate. The third trench is substantially wider than the first and second trenches. The first, second, and third trenches are partially filled with a first conductive material. A first anti-reflective material is coated over the first, second, and third trenches. The first anti-reflective material has a first surface topography variation. A first etch-back process is performed to partially remove the first anti-reflective material. Thereafter, a second anti-reflective material is coated over the first anti-reflective material. The second anti-reflective material has a second surface topography variation that is smaller than the first surface topography variation. A second etch-back process is performed to at least partially remove the second anti-reflective material in the first and second trenches. Thereafter, the first conductive material is partially removed in the first and second trenches. |
| US11387104B2 |
Grafting design for pattern post-treatment in semiconductor manufacturing
A method for lithography patterning includes forming an opening in a first layer over a substrate and coating a grafting solution over the first layer and filling in the opening. The grafting solution comprises a grafting compound and a solvent. The grafting compound comprises a grafting unit chemically bonded to a linking unit chemically bonded to a polymer backbone. The grafting unit is attachable to the first layer. The method further includes curing the grafting solution so that a first portion of the grafting compound is attached to a surface of the first layer, thereby forming a second layer over the surface of the first layer. The method further includes transferring a pattern including the first layer and the second layer to the substrate. |
| US11387103B1 |
Process for fabricating semiconductor nanofibers
Semiconductor nanofibers are produced at room temperature in a pressure vessel. A semiconductor wafer and metal catalyst are introduced into the pressure vessel. The pressure vessel is filled with a background gas. A nanofiber growth element is introduced into the pressure vessel. For example, the semiconductor may be ablated by a laser. The semiconductor is retained in the pressure vessel for a prolonged period of time until nanofiber growth appears. |
| US11387102B2 |
Stacked nanowire transistors
A semiconductor device includes a substrate, a first semiconductor stack including elongated semiconductor features isolated from each other and overlaid in a direction perpendicular to a top surface of the substrate, and a second semiconductor stack including elongated semiconductor features isolated from each other and overlaid in the direction perpendicular to the top surface of the substrate. The second semiconductor stack has different geometric characteristics than the first semiconductor stack. A top surface of the first semiconductor stack is coplanar with a top surface of the second semiconductor stack. |
| US11387096B2 |
Wafer level sequencing flow cell fabrication
A method for forming sequencing flow cells can include providing a semiconductor wafer covered with a dielectric layer, and forming a patterned layer on the dielectric layer. The patterned layer has a differential surface that includes alternating first surface regions and second surface regions. The method can also include attaching a cover wafer to the semiconductor wafer to form a composite wafer structure including a plurality of flow cells. The composite wafer structure can then be singulated to form a plurality of dies. Each die forms a sequencing flow cell. The sequencing flow cell can include a flow channel between a portion of the patterned layer and a portion of the cover wafer, an inlet, and an outlet. Further, the method can include functionalizing the sequencing flow cell to create differential surfaces. |
| US11387090B2 |
Mass spectrometry device
A constructed unit is fixed to a base by means of a plurality of support posts while being spaced from the base. The constructed unit includes an orthogonal acceleration unit. An incidence regulator unit is fixed to the base by a pair of support posts while being spaced from the base and the constructed unit. The incidence regulator unit includes, among others, a pair of blades that define a slit, and heaters for heating the pair of blades. |
| US11387089B2 |
Direct sample introduction device and method for cooling sample introduction probe
A direct sample introduction device includes: a pre-evacuating chamber that has an internal space extending in a first direction through which a sample introduction probe extends in the first direction; a first ventilation unit that is allowed to be opened and closed, with a first end thereof being connected to the pre-evacuating chamber; and a second ventilation unit a first end of which is connected to the pre-evacuating chamber and a second end of which is connected to a low pressure source. |
| US11387088B2 |
Target holder assembly of ion probe and method for preparing sample target thereof
Disclosed are a target holder assembly of an ion probe and a method for preparing a sample target thereof. Specifically, the target holder assembly includes a body and sheets, a middle part of the body is provided with a sample target hole, and limiting portions are symmetrically arranged at an opening of the sample target hole away from a sample target entry side; and the sheets match the limiting portions in shape and dimension to form recesses on a sample target for receiving the limiting portions. |
| US11387087B2 |
Method for analyzing small molecule components of a complex mixture, and associated apparatus and computer program product
A method, apparatus, and computer-readable storage medium for analyzing component separation/mass spectrometer data for a sample having known characteristic includes analyzing reference ion data for a relationship between ion mass, retention time, and intensity. The analyzed data is added to a repository, wherein each ion therein has an intensity maxima within a characteristic retention time range for a characteristic ion mass. If the reference ion is in the repository, the range is modified according to the characteristic retention time of the reference ion intensity maxima. Based on the known characteristic, an ion expected in the sample is selected from the repository, and sample data is compared to data for the ion selected from the repository to determine whether the ion is present in the sample. The range in the repository is then modified according to the characteristic retention time of the intensity maxima for the ion present in the sample. |
| US11387083B2 |
Plasma processing apparatus
According to one embodiment, a plasma processing apparatus includes a chamber, a plasma generator, a gas supplier supplying, a placement part, a depressurization part, and a supporting part. The supporting part includes a mounting part positioned below the placement part and provided with the placement part, and a beam extending from a side surface of the chamber toward a center axis of the chamber. One end of the beam is connected to a side surface of the mounting part. The beam includes a space connected to an outside space of the chamber. A following formula is satisfied, t1>t2, when a thickness of a side portion on the placement part side of side portions of the beam is taken as t1, a thickness of a side portion on an opposite side of the placement part side of the beam is taken as t2. |
| US11387074B2 |
Charged particle beam optical apparatus, exposure apparatus, exposure method, control apparatus, control method, information generation apparatus, information generation method and device manufacturing method
A charged particle beam optical apparatus has a plurality of irradiation optical systems each of which irradiates an object with a charged particle beam and a first control apparatus configured to control a second irradiation optical system on the basis of an operation state of a first irradiation optical system. |
| US11387071B2 |
Multi-source ion beam etch system
Apparatus for a multi-source ion beam etching (IBE) system are provided herein. In some embodiments, a multi-source IBE system includes a multi-source lid comprising a multi-source adaptor and a lower chamber adaptor, a plurality of IBE sources coupled to the multi-source adaptor, a rotary shield assembly coupled to a shield motor mechanism configured to rotate the rotary shield, wherein the shield motor mechanism is coupled to a top portion of the multi-source lid, and wherein the rotary shield includes a body that has one IBE source opening formed through the body, and at least one beam conduit that engages the one IBE source opening in the rotary shield on one end, and engages the bottom portion of the IBE sources on the opposite end of the beam conduit. |
| US11387069B2 |
Electron-emitting electrode including multiple diamond members and magnetron including same
According to one embodiment, an electron-emitting electrode includes a first member, a first diamond member, and a second diamond member. A surface of the first member includes a first region and a second region. The first diamond member is provided at the first region. The first diamond member includes a first element that includes at least one of nitrogen, phosphorus, arsenic, antimony, and bismuth. The second diamond member is provided at the second region. The second diamond member includes a second element that includes at least one of boron, aluminum, gallium, and indium. |
| US11387068B2 |
Active/passive fuse module
An active/passive fuse module including a base, a busbar disposed on a top surface of the base and including a fuse element and first and second terminal portions extending from opposite ends of the fuse element, the fuse element extending over a cavity in the top surface of the base, a pyrotechnic interrupter (PI) disposed atop the base, the PI including a piston disposed within a shaft above the fuse element, a first pyrotechnic ignitor coupled to a controller, the first pyrotechnic ignitor configured to detonate and force the piston through the fuse element upon receiving an initiation signal from the controller, and a second pyrotechnic ignitor coupled to the busbar by a pair of leads, the second pyrotechnic ignitor configured to detonate and force the piston through the fuse element upon an increase in voltage across the leads. |
| US11387067B2 |
Circuit interrupter with ground fault self-test and associated method
A circuit interrupter is structured to protect a protected circuit. The circuit interrupter includes a ground fault current sensor structured to sense a ground fault current in the protected circuit and a processor including a routine structured to perform a ground fault output self-test. The ground fault output self-test includes to output a trip signal within a predetermined phase angle of a zero-crossing of current flowing through the protected circuit, to stop outputting the trip signal before the zero-crossing, to determine whether the trip signal caused a pulse in the ground fault current, and to determine whether the circuit interrupter passed the ground fault output self-test based on whether the trip signal caused a pulse in the ground fault current. |
| US11387066B2 |
Cutout mounted recloser
A cutout mountable recloser that remains latched to the cutout until the recloser is selectively mechanically unlatched via at least rotation of a driver by an operator. During installation, including while the recloser is being latched to the cutout, the recloser can be in an open condition. Latching of the recloser to the cutout can include increasing a tension force exerted by the cutout on the recloser by increasing a linear distance between first and second terminals of the recloser. With the opened recloser latched to the cutout, the recloser can be mechanically closed via a release of stored energy from a closing mechanism. The recloser can selectively be mechanically unlatched from the cutout by a subsequent reduction in the linear distance between first and second terminals of the recloser, which can reduce the tension force being exerted by the cutout. |
| US11387064B2 |
MEMS element fuse-like electrical circuit interrupter
According to one embodiment, a MEMS element includes a first member, and an element part. The element part includes a first fixed electrode fixed to the first member, a first movable electrode facing the first fixed electrode, a first conductive member electrically connected to the first movable electrode, and a second conductive member electrically connected to the first movable electrode. The first conductive member and the second conductive member support the first movable electrode to be separated from the first fixed electrode in a first state before a first electrical signal is applied between the second conductive member and the first fixed electrode. The first conductive member and the second conductive member are in a broken state in a second state after the first electrical signal is applied between the second conductive member and the first fixed electrode. |
| US11387061B2 |
Passive triggering mechanisms for use with switching devices incorporating pyrotechnic features
Disclosed herein are passive triggering mechanisms for activation of pyrotechnic features within electrical switching devices, such as contactor devices and fuse devices. The activation of the pyrotechnic features is configured to change the configuration of the internal components of the switching device and prevent current flow through the device. In some embodiments, the triggering mechanisms comprise features that respond to a magnetic field, such as a reed switch. In some embodiments, threshold strength of a magnetic field needed to trigger the passive triggering mechanism, which corresponds to a threshold level of current running through the switching devices indicating a dangerous overcurrent, can be adjusted based upon the distance between the passive triggering mechanism and a portion of the device such as a power terminal or feature connected to a power terminal. |
| US11387058B2 |
Input device
An input device is configured to provide input to various electronic devices. The input device includes: a manipulation unit; a substrate; a tilting mechanism; and a detector. The manipulation unit includes a handle which is rotatable around a rotation axis and is pressed along the rotation axis, and outputs a first signal corresponding to rotation of the handle and a second signal corresponding to pressing of the handle. The tilting mechanism includes a cylindrical shaft fixed to the substrate, and a bearing fixed to the body, wherein the shaft is perpendicular to the rotation axis, and the tilting mechanism allows the substrate to swing around the shaft between a first manipulation position and a second manipulation position. The detector is disposed on the surface of the substrate facing the body, and outputs a third signal when the substrate is in the second manipulation position. |
| US11387057B2 |
Toggle selector switch
A toggle selector switch includes an activator stylus mounted in a housing to be pivotable about at least one axis. The toggle selector switch further includes at least one pushbutton switch positioned axially in the housing to be engaged when the elongate activator stylus is pivoted. The at least one pushbutton switch includes a mounting base including a contact and a first electrically conductive dome coupled to the mounting base. The first electrically conductive dome is positioned above the contact and is adapted and configured to flex under an applied force and to then touch the contact to complete a circuit and to return when the force is withdrawn. The activator stylus and the at least one pushbutton switch are adapted and configured such that the pushbutton switch outputs a signal indicating that the activator stylus has been moved in one of four directions. |
| US11387056B2 |
Key preloading structure and assembly method thereof
A key preloading structure including a base, a set of switches and a set of keys is provided. The set of switches is arranged on the base. The set of keys has a rotating shaft and two actuators. The rotating shaft is assembled on the base. One end of each actuator is fixedly connected to the rotating shaft, and another end is disposed on a switch of the set of switches. Each of the two actuators preloads the set of switches with a force less than a triggering force for starting the set of switches. |
| US11387055B2 |
Control device capable of providing rotational damping through magnetic force
A control device capable of providing rotational damping through a magnetic force is provided directly at the base of an electronic product and includes a supporting member, an adjusting member, and two magnetic members. The supporting member is provided at the base. The adjusting member is rotatably provided on the supporting member. The adjusting member has a bottom portion corresponding to a switch pre-installed in the base. The adjusting member further has a head portion outside the base. The two magnetic members are provided on the supporting member and the adjusting member respectively. The two magnetic members generate a magnetic force therebetween and thereby change the rotational damping between the supporting member and the adjusting member. |
| US11387054B2 |
Electrical circuit including a supercapacitor with reduced leakage
An electrical circuit is provided including a substrate having a generally planar surface. A supercapacitor assembly includes a container having a length in a longitudinal direction. The supercapacitor assembly includes an electrode assembly enclosed within the container, and the electrode assembly may have a jelly-roll configuration. An angle ranging from about 0 to about 30 degrees is formed between the longitudinal direction of the container and the generally planar surface of the substrate. |
| US11387053B2 |
Aramid fiber electrode and preparation method therefor
The invention discloses an aramid fiber electrode and a preparation method thereof. Silver nanoparticles, carbon nanotubes and polypyrrole were sequentially coated on the surface of the aramid fiber by chemical bonding, to prepare an aramid fiber electrode, two aramid fiber electrodes were wound with an electrolyte to obtain an aramid fiber electrochemical capacitor. Compared with the polymer fiber electrochemical capacitor prepared in the prior art, the aramid fiber electrochemical capacitor provided by the present invention has both high specific capacitance, high energy density, high mechanical performance, high stability, good flexibility and wearability. And other characteristics; the preparation method is controllable and suitable for large-scale applications. |
| US11387051B2 |
Solar cell
Provided is a solar cell comprising a first electrode, a second electrode, a light-absorbing layer located between the first electrode and the second electrode, and an electron transport layer located between the first electrode and the light-absorbing layer. At least one electrode selected from the group consisting of the first electrode and the second electrode has light-transmissive property. The light-absorbing layer contains a perovskite compound represented by a chemical formula ASnX3 (where A is a monovalent cation and X is a halogen anion). The electron transport layer contains an electron transport material including Ti and Zn. A difference between energy levels of lower ends of conduction bands of the electron transport material and the perovskite compound is less than 0.42 eV. |
| US11387036B2 |
Inductor device
An inductor device includes a first wire, a second wire, a third wire, a fourth wire, and an eight-shaped inductor structure. The first wire includes at least two first sub-wires. The second wire includes at least two second sub-wires. The third wire includes at least two third sub-wires. The fourth wire includes at least two fourth sub-wires. The first wire is disposed in a first area. The second wire is disposed in a second area. The third wire is disposed in the first area and at least partially overlapped with the first wire in a vertical direction. The fourth wire is disposed in the second area and at least partially overlapped with the second wire in the vertical direction. The eight-shaped inductor structure is disposed on an outer side of the third wire and the fourth wire. |
| US11387026B2 |
Assembly comprising a cylindrical structure supported by a support structure
An assembly having a cylindrical structure supported by a support structure having at least one support element, the support structure being cradle shaped, such that vertical and horizontal loads are taken largely as shear forces by respective interface surfaces which are substantially parallel to the direction of the respective load, and vertical loads are taken in a direction substantially tangential to the cylindrical surface of the cylindrical structure. |
| US11387024B2 |
R-T-B based rare earth sintered magnet and method of producing R-T-B based rare earth sintered magnet
An R—T—B based rare earth sintered magnet in which R is a rare earth sintered magnet, T is an iron group element, and B is boron. R includes one or more selected from Nd and Pr. The R—T—B based rare earth sintered magnet includes M and C in which M is one ore more selected from Zr, Ti, and Nb. The R—T—B based rare earth sintered magnet includes main phase grains and grain boundaries, and the grain boundaries includes a coexisting part in which a M—C compound, a M—B compound, and a 6-13-1 phase coexist. The R—T—B based rare earth sintered magnet attains improved HcJ while maintaining good Br and Hk/HcJ. |
| US11387023B2 |
Multilayer electronic component production method
A sintered body that includes ceramic layers and an internal electrode which are alternately stacked on one another is prepared. A first external electrode is formed on a side surface of the sintered body such that the first external electrode is connected to the internal electrode. An insulating layer is formed on a surface of the sintered body by applying a glass coating over an entire of the sintered body having the formed first external electrode. The insulating layer is exposed from the first external electrode. A second external electrode is formed on the first external electrode. This method provides the produced multilayer electronic component with a stable electric connection between the internal electrodes and the external electrodes. |
| US11387022B1 |
Illuminated potentiometer
The present invention is a modified potentiometer shaft that includes a light source for illuminating the top of the shaft. The shaft further includes electrical connections for providing power to the light source through the potentiometer assembly. |
| US11387015B2 |
Wiring member and method of manufacturing wiring member
A wiring member includes a sheet material and a wire-like transmission member fixed on the sheet material. For example, the sheet material is considered to be made by combining a plurality of base materials to be processed to extend to regions different from each other. |
| US11387013B1 |
Residue free electrically conductive material
A deformable yet mechanically resilient microcapsule having electrical properties, a method of making the microcapsules, and a circuit component including the microcapsules. The microcapsule containing a gallium liquid metal alloy core having from about 60 to about 100 wt. % gallium and at least one alloying metal, and a polymeric shell encapsulating the liquid core, said polymeric shell having conductive properties. |
| US11387008B2 |
Passive containment cooling system for boiling water reactor and method of installation
A boiling water reactor includes a reactor building, a reactor cavity pool, a primary containment vessel, and a passive containment cooling system. The reactor building includes a top wall defining a penetration therein, a bottom wall, and at least one side wall, which define a chamber. At least a portion of the primary containment vessel is in the chamber. The passive containment cooling system includes a thermal exchange pipe including an outer pipe and an inner pipe. The outer pipe has a first outer pipe end and a second outer pipe end. The first outer pipe end is closed and in the primary containment vessel. The second outer pipe end is open and extends into the reactor cavity pool. The inner pipe has a first inner pipe end and a second inner pipe end, which are open. The second inner pipe end extends into the reactor cavity pool. |
| US11386999B2 |
Multi-model member outreach system
Member outreach services to be offered to members of a health plan based on predictions generated by a prediction engine using data associated with the members. The prediction engine can include an ensemble of different base predictive models, and the prediction engine can use a weighted combination of base predictions produced by the different base predictive models to generate a final prediction associated with a member. A representative can attempt to contact the member based on an outreach ticket associated with the final prediction. The representative can also provide ticket feedback associated with the outreach, and the prediction engine can use the ticket feedback to adjust the weights associated with the different base predictive models. |
| US11386993B2 |
Plasma collection with remote programming
A system and method for collecting plasma includes drawing whole blood from a donor, combining anticoagulant with the whole blood from the donor, separating the whole blood into a plasma product and a second blood component and sending the plasma product to a collection container. A controller receives parameters over a network from a remote computer, receives a user input to confirm the a parameter and/or procedure, determines a target volume for plasma product and/or raw plasma based on the parameters and, in response to confirming the donor, controls the system to collect the plasma using draw and return phases. |
| US11386986B2 |
System and method for identifying complex patients, forecasting outcomes and planning for post discharge care
Techniques are described for identifying complex patients and forecasting patient outcomes based on a variety of factors including medical, socio-economic, mental and behavioral. According to an embodiment, a method can include employing one or more machine learning models to identify complex patients and predict patient outcomes like length of stay, potential discharge trajectories with likelihoods, discharge destinations, readmission likelihood and safety. These models are applied to respective patients that are currently admitted to a hospital and expected to be placed after discharge from the hospital, wherein the one or more discharge forecasting machine learning models predict the discharge destinations based on clinical data points and non-clinical data points collected for the respective patients. The method can further include providing discharge information identifying the discharge destinations predicted for the respective patients to one or more care providers to facilitate managing and coordinating inpatient and post-discharge care for the respective patients. |
| US11386979B2 |
Method and system for storing and accessing bioinformatics data
Method and system for storing and accessing genomic data. Genomic sequencing data are partitioned into access units of different types based on the predictability of the contained data. Access units are classified in different types and the structuring enables selective access and selective processing of genomic data. |
| US11386977B2 |
Enhanced amplicon sequencing analysis
An Amplicon Sequencing Analysis Pipeline (ASAP) system (120, 600) characterizes a genetic sample. The ASAP system (120, 600) receives assay configuration data individually associating reference sequences and genetic characteristics. The ASAP system (120, 600) processes amplicon sequencing data and the reference sequences to characterize the genetic sample based on the individual associations between the reference sequences and the genetic characteristics in the assay configuration data. The ASAP (120, 600) system transfers genetic data indicating the genetic characteristics for the genetic sample and indicating interpretation metrics for amplicon sequencing read depth and quality related to the genetic characteristics. |
| US11386973B2 |
Method and apparatus for built in redundancy analysis with dynamic fault reconfiguration
The present embodiments provides a memory repair solution finding device and method which find a fault by testing a memory and find a repair solution in parallel and dynamically reconfigure the stored fault information to minimize a repair solution searching time with an optimal repair rate. |
| US11386972B2 |
Determining read voltages for memory systems with machine learning
Systems, methods, and apparatus including computer-readable mediums for determining read voltages for memory systems with machine learning (ML) are provided. In one aspect, a memory system includes a memory and a memory controller configured to: obtain a first reading output of memory data using a first read voltage corresponding to a first set of parameters associated with the memory data; if the first reading output fails to pass an Error Correction Code (ECC) test, obtain a second reading output of the memory data using a second read voltage corresponding to a second set of parameters associated with the memory data and including the first set of parameters, the second read voltage being generated using at least one ML algorithm based on the second set of parameters; and if the second reading output passes the ECC test, output the second reading output as a target reading output of the memory data. |
| US11386970B2 |
Method for programming a memory system
A memory system includes a plurality of memory cells, and the memory cells are multiple-level cells. The memory system performs program operations to program the memory cells. After each program operation, at least one threshold voltage test is performed to determine if threshold voltages of the memory cells are greater than the verification voltage. When the threshold voltage of a first memory cell is determined to be greater than a first verification voltage, the first memory cell will be inhibited from being programmed during the next program operation. When the threshold voltage of a second memory cell is determined to newly become greater than a second verification voltage, where the second verification voltage is greater than the first verification voltage, the second memory cell will be programmed again during the next program operation. |
| US11386969B1 |
Method and system for improving word line data retention for memory blocks
Storage devices are capable of utilizing failed bit count (FBC) reduction devices to reduce FBCs for word lines in blocks. An FBC reduction device may include a FBC count component, a threshold component, a pre-verify component, and a soft program component. The FBC count component may access the FBC for the word line, where the block has unprogrammed word lines in an unprogrammed region separated from programmed word lines of a programmed region by the word line. The threshold component may determine whether the FBC of the word line exceeds a predetermined threshold. When the FBC exceeds the threshold, the pre-verify component may perform pre-verify operations on the programmed region. The soft program component may program the word line with first data equal to second data programmed in a second block. In response to disabling pre-verify operations, the program component may program the unprogrammed word lines in the unprogrammed region. |
| US11386965B2 |
Memory device, memory system including the memory device, and operating method of the memory system
There are provided a memory device, a memory system including the memory device, and an operating method of the memory system. The memory device includes a memory cell array including a plurality of memory blocks, a peripheral circuit for performing a read operation by applying a read voltage to a selected memory block among the plurality of memory blocks, and control logic for controlling the peripheral circuit to perform a normal read operation using initially set voltages and a read retry operation using new read voltages. The peripheral circuit performs the read retry operation by using the new read voltage corresponding to program states other than at least one program state included in a specific threshold voltage region among a plurality of program states of the selected memory block. |
| US11386960B2 |
Semiconductor memory device
A semiconductor memory device includes first, second, third, and fourth planes, a first address bus connected to the first and third planes, a second address bus connected to the second and fourth planes, and a control circuit configured to execute a synchronous process on at least two planes in response to a first command set including a first address and a second address. The control circuit is configured to transfer the first address to the first and third planes through the first address bus, and the second address to the second and fourth planes through the second address bus, and during the synchronous process, select a first block in one of the first and third planes, based on the transferred first address and select a second block in one of the second and fourth planes, based on the transferred second address. |
| US11386956B2 |
Mechanism and optical system for optical-medium storage
An optical mechanism and an optical system for optical-medium storage. The mechanism includes an optical-medium storage device, and an optical-medium transmission device. The optical-medium storage device is provided with an optical-medium storage module, configured to store an optical medium, and an optical-medium input-output end, configured to receive and transmit the optical medium to the optical-medium storage module and read data from the optical-medium storage module. The optical-medium receiving module is configured to receive the optical medium transmitted from outside and transmit the optical medium to the optical-medium storage module via the optical-medium input-output end, according to a receiving instruction. The optical-medium storing module is configured to form a storage path for the optical medium with the optical-medium storage module. The optical-medium reading module is configured to provide an interface for reading and read the optical medium stored in the optical-medium storage module, according to a reading instruction. |
| US11386953B2 |
Multiple memory states device and method of making same
A phase-change material based resistive memory contains a resistive layer and two electrical contacts. After fabrication the memory is subjected to thermal treatment which initiates a transition toward a crystalline state favoring in this way the subsequent obtaining of a large number of resistive memory states. |
| US11386952B2 |
Memory access module for performing a plurality of sensing operations to generate digital values of a storage cell in order to perform decoding of the storage cell
A method for performing memory access of a Flash cell of a Flash memory includes: performing a first sensing operation corresponding to a first sensing voltage to generate a first digital value of the Flash cell; according to a result of the first sensing operation, performing a plurality of second sensing operations to generate a second digital value of the Flash cell representing at least one candidate threshold voltage of the Flash cell; determining the threshold voltage of the memory Flash cell according to the at least one candidate threshold voltage; determining soft information of a bit stored in the Flash cell according to the threshold voltage of the Flash cell; and using the soft information to perform soft decoding. |
| US11386950B2 |
Stacked DRAM memory device for improving integration density and reducing bit line capacitance
A stacked memory device includes a plurality of lower word lines extending in a first direction, a bit line positioned over the plurality of the lower word lines and extending in a second direction intersecting with the first direction, and a plurality of upper word lines positioned over the bit line and extending in the first direction. The stacked memory device also includes a plurality of lower memory cells including a lower capacitor and a lower switching element between the lower word lines and the bit line. The stacked memory device further includes a plurality of upper memory cells including an upper capacitor and an upper switching element between the bit line and the upper word lines. |
| US11386947B2 |
Arithmetic devices conducting auto-load operation for writing the activation functions
An arithmetic device includes an auto-command/address generation circuit, a first data storage circuit, and a second data storage circuit. The auto-command/address generation circuit generates an auto-load selection signal that activates an auto-load operation based on a level of a power source voltage. In addition, the auto-command/address generation circuit generates an auto-load command for the auto-load operation. The first data storage circuit outputs look-up table data, to which an activation function is applied, to based on the auto-load command. The second data storage circuit stores the look-up table data, output from the first data storage circuit, based on the auto-load command. |
| US11386946B2 |
Apparatuses and methods for tracking row accesses
Apparatuses and methods for tracking all row accesses in a memory device over time may be used to identify rows which are being hammered so that ‘victim’ rows may be identified and refreshed. A register stack may include a number of count values, each of which may track a number of accesses to a portion of the word lines of the memory device. Anytime a row within a given portion is accessed, the associated count value may be incremented. When a count value exceeds a first threshold, a second stack with a second number of count values may be used to track numbers of accesses to sub-portions of the given portion. When a second count value exceeds a second threshold, victim addresses may be provided to refresh the victim word lines associated with any of the word lines within the sub-portion. |
| US11386944B2 |
Memory device with switching element connected in series to resistance change memory element
According to one embodiment, a memory device includes first and second wiring lines, a memory cell connected between the first and second wiring lines and including a resistance change memory element and a switching element connected in series to the resistance change memory element, and a determination circuit determining a determination object resistance state set in advance to the resistance change memory element based on a determination object voltage applied to the second wiring line when the switching element makes a transition from an on-state to an off-state. |
| US11386939B2 |
Read data FIFO control circuit
Disclosed herein is an apparatus that includes a memory cell array configured to output a read data and a timing signal in response to a read command signal, an input counter configured to update an input count value in response to the timing signal, an output counter configured to update an output count value in response to the read command signal, and a data FIFO circuit having a plurality of data registers, the data FIFO circuit being configured to store the read data into one of the data registers indicated by the input count value and configured to output the read data stored in one of the data registers indicated by the output count value. The output counter is configured to maintain the output count value without updating in response to the read command signal when an active judge signal is in an inactive state. |
| US11386936B2 |
Memory device, sensing amplifier, and method for sensing memory cell
A memory device for sensing memory cell in a memory array includes at least one first memory cell, a first sensing amplifier, a first multiplexer circuit, a plurality of first reference cells, and a controller. The first sensing amplifier is coupled to the at least one first memory cell. An output terminal of the first multiplexer circuit is coupled to the reference terminal of the first sensing amplifier. Each of the first reference cells is coupled to each input node of the first multiplexer circuit. The controller is coupled to a control terminal of the first multiplexer circuit. The first sensing amplifier comprises an output terminal and a reference terminal. The controller controls the first multiplexer circuit to select one of the first reference cells as a selected reference cell to couple to the reference terminal of the first sensing amplifier when each read operation to the at least one first memory cell is performed. |
| US11386932B2 |
Audio modification for adjustable playback rate
Features described herein relate to providing the capability to playback audiovisual content in a comprehensible manner at a rate adjustable by the viewer. For example, if a viewer wishes to watch a one hour news program, but the viewer only has thirty minutes to view the program, playback of the program at twice the rate, but in a comprehensible manner is provided. To provide the playback of the video at the adjustable rate, substitute audio is generated by adding or removing audio content without changing the playback rate of the audio. The video at the adjusted playback rate and the substitute audio at the normal playback rate may have the same duration and in some embodiments, may be presented synchronously. |
| US11386931B2 |
Methods and systems for altering video clip objects
The present disclosure relates generally to content delivery techniques in audio-visual streaming systems. The techniques include altering video or audio portions of media content based on user input or interaction. The techniques further include altering text or messaging distributed to multiple users based on user input. |
| US11386929B2 |
Systems and methods for incident recording
An incident recorder records original and supplemental incident information using a simplified user interface. A lead incident recorder may request any of several support tasks be accepted by other subsystems configured to Follow. Tactical support tasks may be requested. Communication support tasks may be requested. Collection support tasks may be requested. Collection support tasks may include directives for operation of an incident recorder. |
| US11386925B2 |
Data storage device compensating for head/tape wear
A data storage device is disclosed comprising at least one head configured to access a magnetic tape. A plurality of access commands are stored in a command queue, and a wear value is generated for each access command in the command queue, wherein the wear value represents a level of wear on the head or magnetic tape associated with executing the access command. An execution order for the access commands is generated based on the wear values, and at least one of the access commands is executed based on the execution order. |
| US11386921B2 |
Read head stress reduction
Systems and methods are disclosed for dynamically adjusting parameters used during a read operation to reduce stress on a read head. In certain embodiments, an apparatus may comprise a read head configured to read data stored to a data storage medium, and a control circuit that controls a parameter of the read head influencing the read head's ability to accurately read data. The control circuit may be configured to extend the working lifespan of the read head by monitoring a read performance of the read head, and adjusting the parameter to reduce the read performance when the read performance is greater than a first threshold. |
| US11386918B2 |
Method and system for assessing reading quality
This disclosure generally relates to a system and method for assessing reading quality during a reading session. In one embodiment, system is disclosed that analyzes speech that corresponds to a reading session for the duration of the reading session, the consistency of the reading sessions, the speed of the speech during the reading session, the engagement level of the parent during the reading session, and the environment in which the reading session takes place in another embodiment, a method is disclosed for calculating an objective score for a reading session, communicating the score to a parent, and providing suggestions and challenges for improving future reading sessions. |
| US11386915B2 |
Remote invocation of mobile device actions
Systems, methods and apparatus for invoking actions at a second user device from a first user device. A method includes determining that a first user device has an associated second user device; accessing specification data that specifies a set of user device actions that the second user device is configured to perform; receiving command inputs for the first user device; for each command input, determining whether the command input resolves to one of the user device actions; for each command input not determined to resolve any of the user device actions, causing the command input to be processed at the first user device; and for each command input determined to resolve one of the user device actions causing the first user device to display in a user interface a dialog by which a user may either accept or deny invoking the user device action at the second user device. |
| US11386913B2 |
Audio object classification based on location metadata
Methods (700, 800, 900), systems (200, 300, 400, 500, 600) and computer program products are provided. Location metadata (620) associated with an audio object is received (801). The location metadata defines a position of the audio object in an audio scene. It is estimated (630, 802), based on the location metadata, whether the audio object includes dialog. A value representative of a result of the estimation is assigned (803) to an object type parameter (231). In some example embodiments, audio objects are selected (661, 662, 804) based on values of their respective of object type parameters. In some example embodiments, at least one of the selected audio objects is submitted to dialog enhancement (690, 807). |
| US11386904B2 |
Signal processing device, signal processing method, and program
Deterioration of voice extraction performance when positions of a plurality of microphones are changed is prevented.A signal processing device according to an embodiment of the present technology includes a voice extraction unit that performs voice extraction from signals of a plurality of microphones, in which the voice extraction unit uses, when respective positions of the plurality of microphones are changed to positions where other microphones have been present, respective signals of the plurality of microphones as signals of the other microphones. Thus, it is possible to cancel the effect of changing the positions of respective microphones on the voice extraction. |
| US11386903B2 |
Methods and systems for speech presentation based on simulated binaural audio signals
An exemplary speech presentation system receives a simulated binaural audio signal merging together a plurality of concurrent speech instances originating from a plurality of different speakers speaking concurrently. The speech presentation system also receives acoustic propagation data representative of respective propagation effects applied, within the simulated binaural audio signal, to each of the concurrent speech instances to simulate propagation of the concurrent speech instances. Based on the acoustic propagation data, the speech presentation system extracts, from the simulated binaural audio signal, a different auto-transcribable speech signal for each of the plurality of concurrent speech instances. Additionally, based on the extracted auto-transcribable speech signals, the speech presentation system generates a different closed captioning dataset for each of the plurality of concurrent speech instances. Corresponding methods and systems are also disclosed. |
| US11386901B2 |
Audio confirmation system, audio confirmation method, and program via speech and text comparison
An audio confirmation system includes a voice acquiring section configured to acquire a voice contained in a motion picture; a voice text producing section configured to produce a voice text based on the acquired voice; a determining section configured to determine whether or not the produced voice text and a caption text that is embedded in an image contained in the motion picture correspond to each other; and an outputting section configured to output a result of the determination of the determining section. |
| US11386900B2 |
Visual speech recognition by phoneme prediction
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for performing visual speech recognition. In one aspect, a method comprises receiving a video comprising a plurality of video frames, wherein each video frame depicts a pair of lips; processing the video using a visual speech recognition neural network to generate, for each output position in an output sequence, a respective output score for each token in a vocabulary of possible tokens, wherein the visual speech recognition neural network comprises one or more volumetric convolutional neural network layers and one or more time-aggregation neural network layers; wherein the vocabulary of possible tokens comprises a plurality of phonemes; and determining a sequence of words expressed by the pair of lips depicted in the video using the output scores. |
| US11386898B2 |
Systems and methods for performing task using simple code
Systems and methods for performing a task via a simple code. Combination of a unique marker and a simple code represents a task. A simple code is submitted manually or by a voice input. Voice recognition and gesture recognition are used. In an aspect, a task is executed when a voice input comprises a predetermined name and a simple code. In another aspect, a task is executed when a voice input comprises a simple code and a user gazes or gestures at a device. |
| US11386888B2 |
Method of adjusting volume of audio output by a mobile robot device
Implementations of the disclosed subject matter provide a method of transmitting, from a mobile robot device, sound and/or at least one image captured by a sensor to a remote user device. The mobile robot device may receive at least one first control operation for the mobile robot device to move within an area via a communications network from a remote user device. An audio signal may be transmitted based on sound received at a microphone of the mobile robot device in the area. The audio signal received from the remote user device may be output at a speaker of the mobile robot device. A volume of the audio signal output by the speaker may be adjusted based on a size of the area and on an average or a median of an amplitude of frequencies in the area based on the sound received by the microphone. |
| US11386885B2 |
Method and system for detecting intent as an ordered sequence from a user query
Disclosed herein is method and system for detecting intent as an ordered sequence from user query. The system identifies word embedding feature for each word using word embedding model and identifies Part of Speech tag feature. Thereafter, system determines dependency label feature based on dependency role and POS tag feature. Further, system provides feature vector comprising POS tag feature of target word, POS tag feature of previous two words of target word, word embedding feature of target word, word embedding feature of head word for each target word and dependency label feature of target word to deep neural network for detecting intent as ordered sequence. The ordered sequence includes desired action in user query, focal point pertaining to which desired action must be performed and one or more descriptors associated with focal point. In this manner, in present disclosure, overall intent from user query is captured for accurately providing response. |
| US11386883B2 |
Acoustic lens for an ultrasound array
An acoustic lens suitable for a CMUT array (74) is provided. The acoustic lens comprising: a first layer (47) comprising a thermoset elastomer having a polymeric material selected from hydrocarbons, wherein the first layer has an inner surface (72) arranged to face the array and an outer convex shaped surface (40) arranged to oppose the inner surface; and a second layer (42) coupled to the outer surface of the first layer and comprising thermoplastic polymer polymethylpentene and an elastomer selected from the polyolefin family (POE) blended therein, wherein the outer layer located at the outer surface of the acoustic window layer, wherein the first layer has a first acoustic wave velocity (v1) and the second layer has a second acoustic wave velocity (v2), said second velocity is larger than the first acoustic wave velocity. |
| US11386873B2 |
Method and apparatus for efficient application screen compression
A method for of encoding an application screen comprises partitioning graphic data into a plurality of graphic layers and classifying each of the plurality of graphic layers as either a screen content (SC) or a non-screen content (non-SC) layer. The method further comprises classifying each of the plurality of graphic layers as either a screen content (SC) or a non-screen content (non-SC) layer. Further, the method comprises rendering and encoding the one or more SC layers using a first codec and the one or more non-SC layers using a second codec. |
| US11386870B2 |
Information processing apparatus and information processing method
Provided is an information processing apparatus including an output control unit that controls output of an image performed by a display unit, the output control unit selecting an output image to be output by the display unit from among a plurality of candidate images based on calculated visibility of the candidate image. In addition, provided is an information processing method including causing a processor to control output of an image performed by a display unit, the control further including selecting an output image to be output by the display unit from among a plurality of candidate images based on the calculated visibility of the candidate image. |
| US11386869B2 |
Display device and driving method thereof according to capturing conditions of an image
A display device and a driving method thereof are proposed, the display device including an image conversion apparatus receiving a first image signal from the outside and outputting a second image signal by converting a luminance of the received first image signal; a controller generating image data based on the second image signal; a source driver outputting data signals based on the image data; a display panel including a plurality of sub-pixels that emit light based on the data signals; and a memory, wherein the image conversion apparatus generates the second image signal by converting the luminance of the first image signal in such a manner a to satisfy a reference maximum luminance value stored in the memory. |
| US11386866B2 |
Electronic device and screen refresh method thereof
An electronic device may include a display, and a processor operatively connected to the display. The processor is configured to identify a frame rate of a first application that is currently being executed. The processor is also configured to, based on the frame rate, determine a scanning rate of the display and a frame refresh rate for refreshing a frame related to the first application. The processor is further configured to control a first screen refresh of the first application, based on the scanning rate and the frame refresh rate. |
| US11386865B2 |
Method for changing states of electrochromic film
The disclosure relates generally to a method of changing an optical state of an electrochromic film. The electrochromic film may have a plurality of optical states. The method may include selecting a desired state of the plurality of optical states; injecting electric charges into the electrochromic film; monitoring an amount of the electric charges injected into the electrochromic film; and stopping injecting the electric charges when the electric charges reaches a pre-set amount corresponding to the desired state. |
| US11386855B2 |
Voltage control circuit and power supply voltage control method, and display device
A voltage control circuit is configured to connected to a display panel, the display panel includes a plurality of pixels, the plurality of pixels includes a first pixel and a second pixel, and the first pixel and the second pixel are pixels corresponding to different colors. The voltage control circuit is configured to provide a first voltage to the first pixel and a second voltage to the second pixel at a first time and a second time, respectively; the first voltage provided at the first time is different from the second voltage provided at the first time, and the first voltage provided at the second time is identical with the second voltage provided at the second time. |
| US11386851B2 |
Display device having data lines in rounded edge and straight edge parts
A display device includes a display portion having a substantially rectangular area with rounded edges in which a plurality of data lines are arranged. The display device includes a first area corresponding to a rounded edge part and a second area corresponding to a straight edge part adjacent to the first area. A data driving circuit includes a plurality of output channels configured to output data voltages. Odd-numbered output channels output data voltages according to a sequential arrangement of data lines in the second area. Even-numbered output channels output data voltages according to a reverse sequential arrangement of data lines in the first area. |
| US11386843B2 |
Display device and manufacturing method thereof
A display device and a method of manufacturing the display device are provided. The display device includes a first display layer disposed on a surface of a display substrate and including a display element, a power supply unit that supplies a power signal to the display element, and a signal controller that supplies an image signal to the display element. The display element includes a base member, a pixel disposed on a surface of the base member, a driving circuit that provides a pixel driving signal to the pixel, a first transreceiver that receives the power signal and transmits the power signal to the driving circuit, and a second transreceiver that receives the image signal and transmits the image signal to the driving circuit. |
| US11386842B2 |
Display apparatus
A display apparatus includes a plurality of pixels configured to display an image, wherein the plurality of pixels is configured to be driven through a plurality of signals according to an initialization period, a programming period, a sampling period, and an emission period. The signals include a first scan signal having a high level in the initialization period and the sampling period, and having a low level in the programming period and the emission period; a second scan signal having a high level in the programming period and the sampling period, and having a low level in the initialization period and the emission period; and a voltage of a first electrode being dropped in synchronization with a falling time of the first scan signal of the initialization period. |
| US11386841B2 |
Pixel driving circuit, array substrate and display device
A pixel driving circuit, an array substrate and a display device are provided. The pixel driving circuit includes a first interlayer dielectric layer and a second interlayer dielectric layer. The first interlayer dielectric layer is arranged on the side of a gate layer lead away from a base substrate and is formed with a first via hole exposing the gate layer lead. The second interlayer dielectric layer is arranged on the side of the first interlayer dielectric layer away from the base substrate and is formed with a second via hole exposing the first via hole. A source drain layer lead is arranged on the side of the second interlayer dielectric layer away from the base substrate and is electrically connected to the gate layer lead through the first via hole and the second via hole. |
| US11386836B1 |
Amplifier for driving display panel and related control method
An amplifier for driving a display panel includes an input stage, a gain stage and an output stage. The gain stage is coupled to the input stage. The output stage, coupled to the gain stage, includes a first output driving circuit and a second output driving circuit. The first output driving circuit is operated in a first voltage domain. The second output driving circuit is operated in a second voltage domain different from the first voltage domain. |
| US11386835B2 |
Pixel control architecture for micro-LED micro-display with reduced transistor count
In a display with subpixel LEDs, each pixel includes two subpixel LEDs controlled via a shared control circuit and switching element. Switching element logic allows one set of brightness control transistors to alternatively control two subpixels. The driving and control elements of a display backplane are organized into pixels units of four driving elements and three control elements. Each pixel may comprise two green subpixels controlled via the switching element. Alternatively, each pixel may comprise a white subpixel that only illuminates when the colored pixels are off; the green and white subpixels are controlled via the switching element. |
| US11386830B2 |
Display apparatus and driving method of display apparatus
A display apparatus includes an addition section, a conversion section, and a control section. The addition section adds a dither signal to a digital image signal for each of a plurality of color components, the digital image signal being generated on a basis of each of the plurality of color components different from each other, and inputted in predetermined order for each sub-frame included in a frame. The conversion section performs digital to analog conversion of converting the digital image signal to which the dither signal is added into an analog image signal. The control section controls a pattern of the dither signal, at each predetermined cycle including a plurality of the sub-frames, depending on the order in which the digital image signal for each of the color components is inputted, within the frame. |
| US11386825B2 |
Multiplexer circuit and display panel having the multiplexer circuit
A multiplexer circuit and a display panel having the multiplexer circuit are provided. The multiplexer circuit includes a plurality of first transistors, a plurality of first control lines, a plurality of second control lines, a plurality of first transmission lines, and a plurality of second transmission lines. The first transistors are sequentially arranged along a first direction. The first control lines extend along the first direction and are disposed on a first side of the first transistors. The second control lines extend along the first direction and are disposed on a second side of the first transistors. The first transmission lines are respectively coupled between control terminals of a first group of the first transistors and the first control lines. The second transmission lines are respectively coupled to control terminals of a second group of the first transistors and the second control lines. |
| US11386824B2 |
Display device and power management chip for the same
A display device and a power management chip are provided. The power management chip includes a rising-edge trigger, detecting rising edges of a pulse signal; a first counter, configured to calculate the number of the rising edges; a falling-edge trigger, detecting falling edges of the pulse signal; a second counter, configured to calculate the number of the falling edges of the pulse signal; an adder, configured to sum up the number of the rising edges and the number of the falling edges of the pulse signal; and a digital-to-analog converter, electrically connected to the adder, configured to convert to a target voltage based on the sum obtained by the adder. In such a way, the poweron time of the power management chip is reduced. |
| US11386823B2 |
Array substrate and method of driving the same, and display device
The present disclosure provides an array substrate and a method of driving the same, and a display device. The array substrate includes a plurality of sets of transistors, each set of transistors include at least two columns of drive transistors. A target column of drive transistors of each set of transistors are connected to a data line, and the rest drive transistors are connected to the target column of drive transistors. |
| US11386821B2 |
In-cell touch organic light-emitting diode display device and test method thereof
A display device includes a pixel array including touch blocks; a plurality of test pads in a bezel area outside the pixel array for performing a pixel test and a touch block test; a plurality of pixel test lines and a plurality of touch block test lines connected to the test pads within the pixel array; a switching unit between the test pads and the pixel test lines and the touch block test lines and applying a test signal to any one of the pixel test lines and the touch block test lines; a pixel test switching pad in the bezel area and providing a control signal for testing pixel operation in the pixel array to the switching unit; and a touch block test switching pad in the bezel area and providing a control signal for testing the touch blocks within the pixel array to the switching unit. |
| US11386819B2 |
Display device including a connection board and a method for testing pad connection thereof
A display device includes a display panel including first and second panel pads electrically connected to each other, a connection board including first and second connection board pads connected to the first and second panel pads, respectively, an output pad, and a driving circuit. The driving circuit includes a pull-up resistor connected between a first voltage terminal and a first node, and a comparator configured to compare a voltage at the first node with a reference voltage and to output a contact test signal corresponding to a comparison result to the output pad. The first connection board pad is electrically connected to the first node, and the second connection board pad is connected to a second voltage terminal. |
| US11386811B2 |
Aroma flavor
A user-selectable aromatic label for attachment to a beverage container may include a substrate, a scent layer including plurality of scent microcapsules arranged in one or more regions on the substrate, and a removable cover over the scent microcapsules. The removable cover may be selectively removed to rupture the scent microcapsules underneath. |
| US11386806B2 |
Physical movement analysis
A processing device receives three dimensional (3D) motion capture data corresponding to a subject user performing a physical activity and receives attribute data associated with the subject user. The processing device determines a personalized reference data set for the subject user based on 3D motion capture data associated with a group of users performing the physical activity, wherein each user from the group of users shares at least a portion of the first attribute data with the subject user. The processing device provides the personalized reference data set as an input to a trained machine learning model and obtains an output of the trained machine learning model, wherein the output comprises a recommendation for the subject user pertaining to improvement of the physical activity. |
| US11386800B1 |
System and method for flight control of a vertical take-off and landing (VTOL) aircraft
A system for flight control of a vertical take-off and landing (VTOL) aircraft includes a flight simulator communicatively coupled to a VTOL aircraft, wherein the flight simulator is configured to generate a model for at least a flight component and a flight controller, wherein the flight controller is configured to receive the model for the at least a flight component, determine a command for the at least a flight component as a function of the model, and initiate the command for the at least a flight component. |
| US11386799B1 |
Vision-haptics fused augmented reality simulator for dental surgical skill training
A vision-haptics fused augmented reality simulator for dental surgical skill training, including a dental simulation training platform constructed based on an artificial head phantom; a dental operation training system based on a haptic feedback device; an observation system based on an augmented reality head-mounted display; generating a virtual dental model by modeling based on CBCT data and scan data of a patient's dental cavity, to construct a virtual dental environment; based on the virtual dental model and feature points obtained through scanning on the artificial head phantom, performing a spatial matching of a virtual dental cavity and a dental model; in a virtual dental surgery simulation method, outputting haptics information and visual information at frequencies of not less than 1000 Hz and 60 Hz, respectively; performing a visual information processing method on grid data; and performing a haptics-vision space calibration method based on information of an operator's head. |
| US11386793B2 |
Network optimizations to support unmanned aerial vehicle communications
A device may receive a request to establish a session for a wireless communication device over a wireless network; identify the wireless communication device as an unmanned aerial vehicle; modify operating parameters of a radio access network (RAN), with which the wireless communication device has a radio resource control (RRC) link, to optimize communication between the access network and the unmanned aerial vehicle. The wireless network includes the RAN. |
| US11386791B2 |
Autonomous vehicle fleet management system
Systems and methods provide for optimizing dispatching of autonomous vehicles (AVs) using an AV fleet management system. The AV fleet management system can receive first data indicative of client application to the AV fleet management system being opened on a client device. The AV fleet management system can determine availability of an AV within proximity of the client device. The AV fleet management system can determine a first route from a first location of the AV to a second location of the client device. The AV fleet management system can dispatch the AV from the first location to the second location via the first route prior to determining a destination of a second route from the second location to the destination. |
| US11386786B2 |
Method for classifying a relevance of an object
A method for classifying a relevance of an object situated in a surrounding environment of a motor vehicle that includes an environmental sensor, with regard to a collision with the motor vehicle. The method includes: receiving measurement signals representing a radial distance, measured by the environmental sensor, of the object relative to the environmental sensor, a radial relative velocity, measured by the environmental sensor, of the object relative to the environmental sensor, and a measured own velocity of the motor vehicle; receiving dimension signals representing the dimensions of the motor vehicle; calculating whether the motor vehicle can collide with the object based on the received measurement signals and on the received dimension signals; outputting a result signal that represents a result of the calculation of whether the motor vehicle can collide with the object to classify the relevance of the object with regard to a collision with the motor vehicle. |
| US11386782B2 |
Maintenance decision support system and method for vehicular and roadside applications
A method and system are provided in which maintenance vehicles collect information from sensors and operators, forward the collected information to a server, and, is response, receive maps and operator instructions. |
| US11386780B2 |
System for monitoring arrival of a vehicle at a given location and associated methods
A system is for monitoring arrival of a vehicle at a given location. The system includes a server, and a vehicle sensing device. The vehicle sensing device is configured to sense arrival of the vehicle to the given location, and to transmit information about the vehicle to the server in response to sensing arrival of the vehicle to the given location. The server is configured to determine a context of the vehicle based upon the information about the vehicle, and take action based on the context of the vehicle. The system may be installed at parking lots, shipping yards, restaurants, stores, and other locations. |
| US11386775B1 |
Structure of an object control system (OCS) for navigation of moving objects
This application discloses the structure of an object control system (OCS) for navigation of moving objects. The structure consists of cells that have circular, square, or hexagonal shape. The cells are identical with the same square meter (feet) area or in certain areas accommodate smaller cells within them. All cells have an operation frame with the same duration and a time of day for the start of first frame. All objects within a cell function as an IoT device and use a time slot within the operation frame to broadcast a time stamp, the operation frame structure and object's location coordinates. |
| US11386774B2 |
Systems and methods for remote power tool device control
Systems and methods for remote power tool control are provided. In one example, a battery pack is coupled to a power tool device. The battery pack includes a pack transceiver and a pack electronic processor. The pack electronic processor is coupled to the pack transceiver and is configured to determine that the power tool device is remotely controllable. The pack electronic processor is further configured to receive, wirelessly via a pack transceiver of the battery pack, a remote control command from a mobile device, and to provide the remote control command to the power tool device. The system further includes a tool electronic processor of the power tool device in communication with the pack electronic processor. The tool electronic processor is configured to control the power tool device to perform an action specified by the remote control command in response to receiving the remote control command. |
| US11386770B2 |
Light switch apparatus, control system, and control method thereof
A light switch apparatus includes a network communication unit and an output unit. The network communication unit is configured to receive electricity price rate server information from a server, and generate a first high range electricity price output data and a second low range electricity price rate data according to the electricity price rate server information. The output unit is configured to display at least a first output color in response to receiving the first high range electricity price output data from the network communication unit, and a second output color in response to receiving the second low range electricity price rate data from the network communication unit. |
| US11386768B2 |
Remotely controlling aspects of pools and spas
Systems and methods of (remotely) controlling aspects of pools and spas and of modifying water contained therein are detailed. Internet-enabled access to pool and spa controllers may happen without any need for users to create firewall ports or utilize static internet protocol addresses. Certain networking devices may be configured using a USB connection or SD card, avoiding any requirement for an Ethernet cable or supplying separate power to the devices during configuration. Time-varying data may be obtained in respect of one or more installations and analyzed for various information. |
| US11386767B2 |
Communicator, electric working machine, and communication method
A communicator in one aspect of the present disclosure includes a connector, a communication circuit, and a communication controller. The connector is electrically coupled to an electric working machine. The communication circuit performs wireless communication. The communication controller cyclically transmits operational information without specifying a recipient via the communication circuit in response to an operating mode of the communication controller being set to an operation-transmission mode. The operational information indicates an operating state of the electric working machine. |