| Document | Document Title |
|---|---|
| US11303214B2 |
Power conversion device and power supply device
A power conversion device includes a first switching element and a first inductor connected in series between a first terminal and a second terminal, the first inductor and a second switching element being connected in series between the second and third terminals, a switching controller that alternately turns on and off the first and second switching elements, a first capacitor connected between the first and second terminals, and a second capacitor connected between the second and third terminals. When a first full-wave rectified voltage is input, switching frequencies of the first switching element and the second switching element, an inductance of the first inductor, a capacitance of the first capacitor, and a capacitance of the second capacitor are set so that a second full-wave rectified voltage having a voltage amplitude and a phase same as the voltage amplitude and the phase of the first full-wave rectified voltage is output. |
| US11303210B2 |
Current sense circuit topology
Aspects of the present disclosure provide for a circuit. In at least some examples, the circuit includes a first switch coupled between a first node and a second node and a second switch coupled between a third node and the second node. The circuit further includes a resistor coupled between the second node and a fourth node and a capacitor comprising a first terminal coupled to the fourth node and a second terminal. The circuit further includes a transistor comprising a drain terminal coupled to the third node, a source terminal coupled to a fifth node, and a gate terminal and an amplifier comprising a first input terminal coupled to the fifth node, a second input terminal coupled to the fourth node, and an output terminal coupled to a sixth node. |
| US11303209B2 |
Power module and DC-DC converter
A power module includes: a first switching device; a current-voltage conversion circuit into which current output from the first switching device flows; a measurement circuit that measures magnitude of the current; and an output terminal that outputs an output signal indicating the magnitude of the current measured by the measurement circuit. The measurement circuit measures the magnitude of the current output from the first switching device based on a resistance value of the current-voltage conversion circuit, and the first switching device and the measurement circuit are implemented in one semiconductor package. |
| US11303208B2 |
Cycle transitions for buck converter circuits
A voltage regulator circuit included in a computer system may include multiple devices and a switch node coupled to a regulated power supply node via an inductor. The voltage regulator circuit may charge a capacitor using an input power supply signal, and couple the capacitor to the switch node using respective subsets of the multiple devices, which are selected based on one or more control signals. A control circuit may generate the one or more control signals based on a particular switching sequence, which is selected based on a ratio of a voltage level of the regulated power supply node and a voltage level input power supply signal. |
| US11303206B2 |
Semiconductor device and load control system
A semiconductor device disposed on a primary side of a system generating a secondary side voltage in an insulated form from a primary side voltage includes: a signal generation circuit configured to generate a voltage information signal for transmitting voltage information based on the primary side voltage to a secondary side of the system in the insulated form. |
| US11303204B1 |
Control circuit for multi-phase voltage regulator and associated control method
A trans-inductor voltage regulator (TLVR) circuit has multiple phases and a switching circuit for each phase. Each switching circuit has a winding of a transformer as an output inductor. The other windings of the transformers are connected in series with a nonlinear compensation inductor. An on-time period of each switching circuit is reduced when a load transient condition occurs or when a load current starts to be stable after the load transient condition. |
| US11303200B2 |
Power supply device and overcurrent protective device
A power supply device according to the present disclosure includes a first resistor and a second resistor connected in series between an output terminal and a reference potential; a power converter connected to the output terminal and a reference point between the first resistor and the second resistor, configured to supply a first voltage to the output terminal, and configured to control the first voltage to cause a second voltage generated at the reference point, to have a predetermined value; a protective current output circuit configured to output a protective current depending on an output current supplied to the output terminal and a limit current; and a control circuit to which the protective current is input, the control circuit being configured to draw in, from the reference point, a drawn-in current obtained by subtracting the protective current from a set current depending on a set value. |
| US11303197B2 |
Low pass filter, switch control circuit, driving system, chip and method
A low-pass filter, a switching control circuit, a driving system, a chip and methods are disclosed. The low-pass filter performs digital differential-integral process on a voltage of an acquired analog signal and a predefined reference voltage to generate differential-integral signals, accumulates a count of the differential-integral signals, and convert the result to an analog signal. By performing differential-integral process accumulating a count of the differential-integral signals, a low-pass filtered signal is obtained in a way that solves the problem of low integrity of circuits in conventional driving systems, reduces the complexity of external circuits for such driving systems and increases their circuit stability. |
| US11303191B2 |
Three-degree-of-freedom bearingless switch reluctance motor excited by constant current source
A three-degree-of-freedom bearingless switched reluctance motor excited by a constant current source includes a rotor and a stator. The rotor consisting of a rotating shaft and a rotor core, where a plurality of rotor teeth is uniformly distributed on an outer circumference of the rotor core. The stator includes a stator core, a magnetic isolation ring, an axial suspension winding, and a magnetic conduction ring that are sequentially connected, and axial control cores and annular constant current source windings which are symmetrically arranged on both sides of the stator core. Outer edges of the axial control cores are connected to the magnetic conduction ring, and inner edges extend to the rotor core. The stator core and the magnetic isolation ring both consist of an axial part and a radial part of which an outer end is connected to an inner wall of the axial part. |
| US11303189B2 |
Motor unit equipped with decelerator
A worm wheel is installed inside a wheel accommodation chamber of a body casing; a motor is fastened by screws from the right side perpendicular to the axis line of the worm wheel, thus forming a motor fastening part; and a worm fixed to an output shaft of the motor is engaged with the worm wheel. A board accommodation chamber is formed so as to be adjacent to the right of the wheel accommodation chamber, and a control board is inserted inside the board accommodation chamber from below. The control board is disposed so as to be inclined in a direction in which the upper end of the control board is displaced toward the wheel accommodation chamber from an erect attitude perpendicular to the axis line of the output shaft of the motor, and thus the upper end is separated from the motor fastening part in the direction of the axis line of the output shaft. |
| US11303180B2 |
Motor and pump device
A motor may include a rotor including a rotating shaft that protrudes to a first side in an axial direction; a stator disposed on an outer peripheral side of the rotor; a resin sealing member that covers the stator; and a cover member that is disposed on the first side of the resin sealing member and supports the rotating shaft. The resin sealing member may include a resin sealing member side position regulating surface that makes contact in the axial direction with a cover member side position regulating surface provided on the cover member, and a resin sealing member side securing surface that faces, in the axial direction and with a gap, a cover member side securing surface provided on the cover member. At least a portion of the resin sealing member side securing surface is secured to the cover member side securing surface via an adhesive agent layer. |
| US11303179B2 |
Stator of a rotating field machine
The invention relates to a stator active part for an electric motor, preferably a permanent-magnet-excited synchronous machine consisting of a hollow-cylindrical yoke, comprising an inner cladding and having a receptacle space, into which a coil support is inserted, wherein the coil support consists of a peripherally-closed, hollow-cylindrical tubular body extending in the axial direction (A) of the yoke, on the outer cladding of said body a plurality of coil holders being formed, wherein a finely-distributed coil is installed on each coil holder. |
| US11303177B2 |
Stator for rotating electric machine and method of manufacturing the stator
A stator includes an annular stator core having slots formed therein, a stator coil received in the slots, and insulating sheets each being interposed, in a corresponding one of the slots, between the stator coil and an interior wall surface of the stator core defining the corresponding slot. Each of the insulating sheets includes a sheet-like substrate and a resin layer provided on an outer surface of the substrate. The resin layer is formed of a curable and foamable resin that is foamed and cured by external stimulation. Each of the insulating sheets has an extension portion located outside the corresponding slot and extending nonparallel to an axial direction of the stator core so as to face an axial end face of the stator core. In each of the insulating sheets, the resin layer is provided, on the outer surface of the substrate, in a region including the extension portion. |
| US11303176B2 |
Coil winding for stators or rotors
A coil winding (20) that consists of a number of wires (22) braided with one another and bent multiple times in opposite directions such that mutually parallel legs (28, 30) of the wires (22) which are intended to fill the slots (16) are connected by winding overhangs (32, 34) which project from the end face of the stators (10) or rotors. The winding overhangs (32, 34) each have two oblique winding overhang sections (36, 38, 40, 42) having a winding overhang tip (44, 46) in between. The wires (22) are arranged one behind the other in a longitudinal direction (L) of the coil winding (20). The winding overhangs (32, 34), which are distributed in the longitudinal direction (L) over the entire length of the coil winding, of at least one wire (22) protrude transversely to the longitudinal direction (L) beyond the winding overhang (28, 30). |
| US11303175B2 |
Multiphase linear motor, multiphase planar motor, stage, lithographic apparatus and device manufacturing method
An electromagnetic motor is described, the electromagnetic motor comprising:a magnet assembly configured to generate a two-dimensional alternating magnetic field having a pitch Pm1 in a first direction and a pitch Pm2 in a second direction;a coil assembly configured to co-operate with the magnet assembly to generate a first force in the first direction and a second force in the second direction, wherein the coil assembly comprises a first coil set comprising a plurality of first coils for generating the first force and a second coil set comprising a plurality of second coils for generating the second force, wherein a ratio R1 of a coil pitch Pc1 in the first coil set in the first direction over Pm1 is different from a ratio R2 of a coil pitch Pc2 in the second coil set in the second direction over Pm2. |
| US11303174B2 |
Rotor for an electric machine
Various embodiments may include a rotor for an electric machine, the rotor comprising: a first shaft journal; a second shaft journal; a laminated rotor core; a filler body cast onto the laminated rotor core wherein the filler body and the laminated rotor core rotate conjointly; and a cooling duct extending through the shaft journals and the filler body along an axis of the filler body and the rotor core. The filler body rotates with the shaft journals and a torque applied to the shaft journals is transmitted to the laminated rotor core. |
| US11303173B2 |
Rotor for asynchronous electrical machine with non-through shaft
Provided is a rotor for an asynchronous rotating electrical machine that includes a cylindrical magnetic mass, two short-circuit disks, a non-through shaft that includes two half-shafts tightly holding the cylindrical magnetic mass and the two short-circuit disks each sandwiched between the half-shafts and one of the ends of the magnetic mass, and conducting bars housed inside the magnetic mass and distributed uniformly along at least one diameter of the magnetic mass such that the short-circuit disks and the conducting bars form a squirrel cage, and the half-shafts, the short-circuit disks and the magnetic mass form a gas-tight envelope. |
| US11303171B2 |
Drive device
A drive device for a working machine for heavy industry, particularly for the raw-materials and mining industry, includes a permanent-magnet-excited motor and a frequency converter, wherein the motor has a rotor and a stator, and wherein the motor is a segment motor, in the case of which the rotor and/or the stator is composed of a plurality of segments, where considerable improvement in the availability of the motor is achieved because the motor has a segmented design, whereby the reliability during operation of the drive device is also increased. |
| US11303167B2 |
Spirally wound laminated core for a rotary electric machine, method for manufacturing spirally wound laminated core of a rotary electric machine, and rotary electric machine
A laminated core of a rotary electric machine having: a first spiral core constituent body layer configured by linking a plurality of metal first core constituent pieces that have a magnet mounting part, the first spiral core constituent body layer being wound in a spiral shape as an integral body; and a second spiral core constituent body layer configured by linking the plurality of first core constituent pieces and a metal second core constituent piece that has a magnet mounting part, the second core constituent piece having a different longitudinal-direction length than do the first core constituent pieces, and the second spiral core constituent body layer being wound in a spiral shape as an integral body. The second spiral core constituent body layer is laminated on the first spiral core constituent body layer in continuation with the first spiral core constituent body layer. |
| US11303163B2 |
Wireless power receiving module and portable electronic device comprising same
A wireless power receiving module is provided. A wireless power receiving module according to one embodiment of the present invention comprises: a wireless power receiving antenna in which a conductive member having a rectangular cross section is formed in a loop shape; and a shielding sheet disposed on one surface of the antenna for shielding a magnetic field, wherein one surface of the antenna is directly attached to the shielding sheet. |
| US11303152B2 |
Wireless power transfer using parameters
A power receiver receives a wireless power transfer from a power transfer signal generated by a wireless power transmitter during a power transfer phase. The power transfer signal employing a repeating time frame during the power transfer phase where the frame comprises at least a power transfer time interval and a foreign object detection time interval. The power receiver comprises a synchronizer (311) which synchronizes a local time reference to the repeating time frame and a load controller (309) which disconnects a load (303) during at least part of the foreign object time detection time intervals during at least part of the power transfer phase. The timing of the disconnecting is dependent on the local time reference. A mode controller (313) switches between a first operational mode and a second operational mode for the power transfer time intervals in response to a reliability measure for the synchronization. |
| US11303147B2 |
Battery device and control method thereof
A battery device includes a storage battery unit, a current sensing unit, a temperature sensing unit, a storage unit and a processing unit. The current sensing unit detects load current. The temperature sensing unit detects the battery temperature of the storage battery unit. The storage unit stores a cycle number, multiple threshold intervals, and multiple charging voltage values. According to the load current, the battery temperature and the cycle number, the depth of discharge of the storage battery is acquired. The storage unit stores the load current, the battery temperature and the cycle number. The processing unit operates a charging procedure. The charging voltage value corresponding to the working threshold interval is selected to be the main charging voltage value, and the DC voltage that is identical to the main charging voltage value is used to perform a constant voltage charge for the battery unit. |
| US11303143B2 |
Wireless charging mount for handheld electronic devices
A wireless charging mount includes a wireless charger, an attachment portion, and a base portion. The wireless charger is coupled to the attachment portion, and the attachment portion is coupled to the base portion to support the wireless charger on the base portion. The base portion can attach with a movable or stationary object for supporting the mount thereon. The attachment portion supports a handheld electronic device on the mount, and the wireless charger selectively provides power to the handheld electronic device. |
| US11303142B2 |
Aerosol-generating system with charging device and aerosol-generating device with end contacts
An electrically operable aerosol-generating system is provided, including: a charging device including a primary power source; and an elongated aerosol-generating device including a secondary power source and having a proximal end, a distal end, and a body extending between the proximal end and the distal end, the charging device having a docking arrangement configured to engage with the elongated aerosol-generating device, the docking arrangement including a docking space defined between a first end, and an opposing second end spaced from and fixed relative to the first end, the docking space accommodating a longitudinal dimension of the elongated aerosol-generating device, in which electrical contacts are disposed on at least one of the proximal end or the distal end of the elongated aerosol-generating device and are configured to engage with corresponding electrical contacts disposed on at least one of the first end and the second end of the docking arrangement. |
| US11303141B2 |
Protection circuit for battery and power supply device provided with said protection circuit
A protection circuit for a battery includes a discharge FET, a control circuit, a first small-signal FET, and a second small-signal FET. The discharge FET connected in series to a battery interrupts an electric current. The control circuit switches on or off the discharge FET. The first small-signal FET connected in parallel between a gate (G) and a source (S) of the discharge FET is switched to an ON state, to set a gate voltage of the discharge FET to an OFF-state voltage. The second small-signal FET connected in parallel between G and S of the discharge FET detects a voltage between a drain (D) and S of the discharge FET. When the voltage between D and S of the discharge FET exceeds a preset voltage, the second small-signal FET is switched to an ON state to set the gate voltage of the discharge FET to the OFF-state voltage. |
| US11303138B2 |
Battery case power system
A battery case is operable with an electronic device such as a cellular telephone. The battery case has a battery that can be used to supply power to the electronic device. The battery case is configured to receive power from a power supply that is coupled to a mains power supply using a wired path or to receive power from a wireless charging mat or other wireless power transmitting device. Circuitry in the battery case may include direct-current-to-direct-current power converter circuitry, current sensor circuitry, switching circuitry, and other circuitry for controlling currents and voltages in the battery case and communicating with other electronic devices. |
| US11303137B2 |
Systems and methods for controlling battery current
A battery system comprising multiple battery packs. A battery pack of the battery packs includes a battery, voltage sense circuitry, a control circuit, a control switch and current regulation circuitry. The voltage sense circuitry senses a battery voltage of the battery and an input voltage of the battery pack. The control circuit is coupled to the sense circuitry and is operable for adjusting a level of a reference signal based on attribute data associated with the battery pack and a difference between the battery voltage and the input voltage. The control switch is operable for passing a battery current flowing through the battery. The current regulation circuitry is coupled to the control circuit and the control switch, and is operable for controlling the control switch to regulate the battery current according to the reference signal. |
| US11303135B2 |
Wireless power transmitter for excluding cross-connected wireless power receiver and method for controlling the same
A method and apparatus for controlling a wireless power transmitter configured to transmit power to a wireless power receiver is provided. The method includes receiving a first signal from the wireless power receiver, wherein the first signal comprises load detection indication bits, detecting a change in load of the wireless power transmitter caused by placement of the wireless power receiver in a charging area of the wireless power transmitter, based on the load detection indication bits, and determining whether to transmit a second signal to the wireless power receiver based on detecting the change in load of the wireless power transmitter. |
| US11303130B2 |
Power management system
A town storage battery power conversion device outputs an AC voltage to a distribution system during a power failure. Electric power generated by a solar cell installed in each consumer house is converted into an AC voltage by a solar cell power conversion device and output to a consumer premises distribution system to which a load is connected. In an autonomous operation during a power failure, an operation plan for a distributed power supply is updated in a cycle longer than a cycle of an operation plan for a town storage battery. In the autonomous operation, the town storage battery power conversion device changes an AC voltage frequency according to a difference between electric power output from the town storage battery and the operation plan. The solar cell power conversion device has a function of modifying a control target value for the solar cell according to the AC voltage frequency. |
| US11303127B2 |
Method for intelligent load management in off-grid AC systems
The current disclosure provides methods and systems for intelligent load management in off-grid AC systems and provides methods and systems to control and prioritize loads, so that supply and demand can be balanced via an extremely robust and reliable system. |
| US11303126B1 |
Thermal management of power delivery
The power output system contains a power supply having a supply line and a return line, and controls the flow of electricity to a load based on the temperature of the power supply. It does so via a control circuit, containing a temperature sensor and a switching circuit, connected between the power supply and the load. While the power supply remains relatively cool, the system allows power to flow to the load. When the power supply exceeds a certain threshold, however, the system disconnects the power supply from the load connection and connects it to the return line, bypassing the load and stopping the flow of electricity. Once the power supply has cooled sufficiently, the system reverses the process and reconnects the power supply to the load. |
| US11303125B2 |
Controllable electrical outlet having a resonant loop antenna
A controllable electrical outlet may comprise a resonant loop antenna. The resonant loop antenna may comprise a feed loop electrically coupled to a radio-frequency (RF) communication circuit and a main loop magnetically coupled to the feed loop. The controllable electrical outlet may comprise one or more electrical receptacles configured to receive a plug of a plug-in electrical load and may be configured to control power delivered to the plug-in electrical load in response to an RF signal received via the RF communication circuit. The RF performance of the controllable electrical outlet may be substantially immune to devices plugged into the receptacles (e.g., plugs, power supplies, etc.) due to the operation of the resonant loop antenna. For example, degradation of the RF performance of the controllable electrical outlet may be less when the controllable electrical outlet includes the resonant loop antenna rather than other types of antennas. |
| US11303123B2 |
Systems and methods for combining and distributing electrical power from multiple sources
Systems and methods are provided for continuously and automatically monitoring, controlling, and combining shore-based AC power sources for waterborne vessels while the vessels are at dock or in port. The systems can allow a one or more shore AC power AC to power the entire vessel, and automatically and safely join multiple power sources to power a single higher-current-capacity electrical distribution bus on the vessel. The systems can automatically monitor and evaluate the characteristics of multiple shore power sources to determine when it is possible to safely combine the sources. Also, the systems can recognize the disconnection/disablement of a shore power source, and can un-combine that power source from the other power sources feeding the system. The systems can automatically evaluate the phase, current and voltage of multiple AC sources, and combine the sources only after a specific set of conditions are satisfied. |
| US11303118B2 |
Overvoltage protection
The present disclosure relates to a device including a rectifying bridge including: a branch connected between first and second nodes; another branch including first and second MOS transistors series-connected between the first and second nodes and having their sources coupled together; a resistor connecting the gate of the first transistor to the second node; another resistor connecting the gate of the second transistor and the first node; and for each transistor, a circuit including first and second terminals respectively connected to the drain and to the gate of the transistor, and being configured to electrically couple its first and second terminals when a voltage between the first terminal of the circuit and the first terminal of the other circuit is greater than a threshold of the circuit. |
| US11303117B2 |
Apparatus of preventing ESD and EMP using semiconductor having a wider band gap and method thereof
An apparatus of preventing ESD and EMP coupled between a signal input and a signal output is provided with a first diode of forward bias including a positive terminal and a negative terminal connected to the signal input and ground respectively; and a first diode of reverse bias including a negative terminal and a positive terminal connected to the signal input and the ground respectively. The semiconductor is a diode including a p-type semiconductor region made of semiconductor material having a predetermined band gap and an n-type semiconductor region made of semiconductor material having a predetermined band gap. The predetermined band gap is greater than 3 eV. The diode operates in forward bias to discharge current generated by ESD and/or EMP. A method of preventing ESD and EMP is also provided. |
| US11303115B2 |
Electrostatic discharge mitigation for differential signal channels
Interface circuits for differential signal channels. The interface circuit includes, for example, a transformer, a common mode choke, and a bidirectional transient voltage suppressor (TVS) diode. The transformer is coupled to two circuit side terminals of a differential signal channel. The common mode choke is coupled to the transformer. The common mode choke is also coupled to the two line side terminals of the differential signal channel via a first signal path and a second signal path. The bidirectional TVS diode includes a first output connection coupled to the first signal path. The bidirectional TVS diode also includes a second output connection coupled to the second signal path. |
| US11303114B2 |
Protection circuit for ethernet and power sourcing equipment having the same
A protection circuit for Ethernet and a power sourcing equipment having the same are provided. The protection circuit is coupled between a power supply chip and a transmission circuit. The transmission circuit is coupled between an Ethernet chip and an Ethernet connector. The protection circuit includes a bridge rectifier and a protection element to provide the common mode surge protection and the differential mode surge protection at the same time for the power supply chip. |
| US11303113B2 |
Shutdown control system and method
A shutdown control system and a shutdown control method are provided. A main circuit is a series circuit formed by connecting output ends of multiple shutdown circuits in series or a series-parallel circuit formed by connecting output ends of multiple such series circuits in parallel. Each of the multiple shutdown circuits is connected to at least one of direct current power supplies in a distributed power generation system. A control circuit includes a SCU, one or more ACUs, and multiple PCUs corresponding to the multiple shutdown circuits. The SCU and the ACU are configured to transmit respective mode control instructions when respective condition is satisfied. Each of the multiple PCUs is configured to obtain multiple criteria based on the mode control instructions, determine a target operation mode of a corresponding shutdown circuit, and control the shutdown circuit to operate in the target operation mode. |
| US11303109B2 |
Power distribution system lateral protection and method
A fault protection system for providing protection from fault current for components and devices on a lateral line proximate to a distribution transformer in a power distribution network. The system includes a single-phase recloser having a vacuum interrupter that is controlled by a controller. In one embodiment, the recloser has an insulating body that is molded in combination with an insulating body of a bushing that is connected to the distribution transformer. In this embodiment, the controller can be powered by a current transformer within the recloser. In another embodiment, the recloser is mounted to a utility pole separate from the distribution transformer, where the controller is powered by the low voltage side of the transformer and the current transformer is eliminated. An isolated power supply is provided between the transformer and the controller to provide voltage isolation. |
| US11303104B2 |
Electrical junction box cover and related assemblies and methods for completing electrical installations
This invention relates to electrical junction box covers for temporary use during application of drywall and other finish work. Electrical junction boxes include any type of electrical outlet or switch box, including communication boxes for cable, Ethernet, phone, or any other related system. The covers of the invention prevent debris from entering the electrical junction boxes during the application of drywall and finish work. The covers protect electrical and data cabling and provide substantial efficiencies in construction of residential and commercial structures. |
| US11303102B2 |
Removing a metal shield from electrical cable
A system for removing metal foil shield from electrical wires and/or cables, using ablation process, shear stress generation and video camera feedback. |
| US11303100B2 |
Hanging bracket device for electrical equipment
An apparatus includes a circuit breaker and mounting bracketry fastened to the rear side of the circuit breaker. The mounting bracketry includes first and second spacer portions extending rearward from a respective locations inside the width of the circuit breaker unit, first and second fixation portions extending outward from the first and second spacer portions, respectively, to respective positions outside the width of the circuit breaker, and first and second hook portions extending rearward from the first and second fixation portions, respectively. The circuit breaker may be mounted to an electrical enclosure with the first hook portion and the second hook portion engaging a mounting rail of the electrical enclosure. |
| US11303098B1 |
Multi-junction VCSEL with compact active region stack
A multi-junction VCSEL is formed by as a compact structure that reduces lateral current spreading by reducing the spacing between adjacent active regions in the stack of such regions used to from the multi-junction device. At least two of the active regions within the stack are located adjacent peaks of the intensity profile of the VCSEL, with an intervening tunnel junction positioned at a trough between the two peaks. The alignment of the active regions with the peaks maximizes the generated optical power, while the alignment of the tunnel junction with the trough minimizes optical loss. The close spacing on adjacent peaks forms a compact structure (which may even include a cavity having a sub-λ optical length) that lessens the total path traveled by carriers and therefore reduces lateral current spread. |
| US11303091B2 |
Pulsed light generation device, pulsed light generation method, exposure apparatus having pulsed light generation device and inspection apparatus having pulsed light generation device
A pulsed light generation device, includes: a first optical fiber through which first pulsed light and second pulsed light, having an intensity that decreases while an intensity of the first pulsed light increases, and increases while the intensity of the first pulsed light decreases, having been multiplexed and entered therein, are propagated; and a second optical fiber at which the first pulsed light, having exited the first optical fiber and entered therein, is amplified while being propagated therein, wherein: at the first optical fiber, phase modulation occurs in the first pulsed light due to cross phase modulation caused by the second pulsed light; and self-phase modulation occurring in the first pulsed light at the second optical fiber is diminished by the phase modulation having occurred at the first optical fiber. |
| US11303087B1 |
Photonic crystal masers
In a general aspect, a photonic crystal maser includes a dielectric body having an array of cavities ordered periodically to define a photonic crystal structure in the dielectric body. The dielectric body also includes a region in the array of cavities defining a defect in the photonic crystal structure. An elongated slot through the region extends from a slot opening in a surface of the dielectric body at least partially through the dielectric body. The array of cavities and the elongated slot define a waveguide having a waveguide mode. The photonic crystal maser also includes a vapor or source of the vapor in the elongated slot and a laser configured to generate an optical signal capable of exciting one or more input electronic transitions of the vapor. |
| US11303083B2 |
Pliers with angled crimping opening
A crimping tool with a crimping opening extending at an angle to the axial direction of the tool. The tool can include jaws with multiple crimping openings cooperatively defined thereby at different angles relative to the longitudinal axial direction of the tool. For example, the crimping openings can begin at a respective faces of the jaw and such faces can extend at different angles relative to the longitudinal axial direction of the tool. In this manner, the tool can allow crimping of connectors at a variety of different angles, reduce jaw length and width, and improve the leverage of the crimpers. |
| US11303082B2 |
DC motor
A DC motor is provided that can suppress a commutator from wearing. A DC motor including a commutator formed of copper or a copper alloy of 99% or more copper, and a brush pressed against and in contact with the commutator, wherein the brush is composed of a sintered compact including graphite and copper powder, hard compound particles higher in hardness than any of the copper or the copper alloy and the graphite or the copper powder are contained in at least one of the commutator and the brush and are scattered on or near a contact surface of the commutator with the brush at least during use. |
| US11303081B2 |
Power adapter and electronic device comprising the power adapter
The present invention discloses a power adapter and an electronic device comprising the same. The power adapter comprises a housing, which has a plurality of end faces. The power adapter further comprises a power inlet socket, which is provided on any of the plurality of end faces. The end face on which the power inlet socket is provided, at least another one of the plurality of end faces, and the power inlet socket are formed as one body integrally. |
| US11303079B2 |
Modular electrical system
A modular electrical system with electrical and/or data outlets provides an unobtrusive power and/or data source that can be routed along a floor, a table or other work surface in a work area. The modular system includes a plurality of electrical wiring modules, a plurality of junction modules each having multiple outputs, and a plurality of electrical power or data units connected to the junction modules and to surfaces in the work area. Optionally, a modular floor runner system is assembled together from rigid floor runner modules interposed with junction modules, with one or more flexible branch extensions selectively coupled to any desired junction module. The floor runner modules and junction modules include housings that protect electrical wiring held internally, while being minimally intrusive for use in walking areas. Optionally, a table mounted modular electrical system is connectable to a floor runner system, and vice versa. |
| US11303076B2 |
Coaxial electrical connector
An outer conductor 70 has arm-shaped portions 74 that extend from a mating body portion 73, the arm-shaped portions 74 are of a curved shape and have front contact portions 74B-2 enabled to contact the mating body portion 73 and rear contact portions 74B-1 enabled to contact cover plate portions 76, and bringing the front contact portions 74B-2 into contact with the mating body portion 73 while bringing the rear contact portions 74B-1 into contact with the cover plate portions 76 places the counterpart outer conductor and the cover plate portions 76 in electrical communication via the mating body portion 73, front contact portions 74B-2, and rear contact portions 74B-1. |
| US11303075B2 |
Electrical plug for a dialysis machine
A dialysis machine comprising: a power supply for providing power to the dialysis machine, the power supply including a power supply cable that includes a first ground wire electrically connected to a first ground prong; and a hydraulics system for making dialysate, supplying the dialysate to a dialysate circuit, and draining spent dialysate from the dialysate circuit, the hydraulics system including a hydraulics grounding cable that includes a second ground wire electrically connected to a second ground prong. |
| US11303074B2 |
Enclosures to constrain the location of connectors in automation applications
An enclosure comprising a housing having a first end and a second end opposite the first end, the housing having a first connector receptacle at the first end, the housing having a surface defining a robot-engaging mechanism, a hook extending from the second end of the housing, and a securement mechanism at the second end of the housing. |
| US11303073B2 |
Charging inlet assembly
A charging inlet assembly for an electric vehicle includes a housing having a power connector including AC terminals and DC terminals. An AC terminal assembly is coupled to the housing and includes AC bus bars electrically connected to corresponding AC terminals at a separable mating interface. A DC connector is mechanically and electrically connect to the DC contact of the DC connector at a separable mating interface. |
| US11303069B2 |
Electrical connector with capacitive and resistive characteristics to satisfy required matching impedance
An electrical connector includes: a first main body, having a first wall surface and a second wall surface; a second main body, mounted on the first main body, and having a third wall surface and a fourth wall surface. A first channel is formed between the first wall surface and the third wall surface. A second channel is formed between the second wall surface and the fourth wall surface and is communicated with the first channel. A signal terminal has a fixing portion accommodated in the first channel and fixed by at least one of the first main body and the second main body, and an elastic arm formed by extending from the fixing portion and accommodated in the second channel. A contact portion is provided on the elastic arm and is exposed to the first main body in a left-right direction to be in contact with the mating member. |
| US11303067B2 |
Battery pack for cordless devices
It is common for a power tool system from a manufacturer to include a battery pack that is designed and configured to mate and operate with at least one power tool and a battery charger. However, as systems have evolved it has become desirable to provide a battery pack that is designed and configured to mate and operate with at least one power tool and a first battery charger but not a second battery charger. The present disclosure provides a battery pack including a housing, a terminal block, a plurality of terminals, and a mechanical lockout for allowing engagement with a power tool and a first battery charger while preventing engagement with a second battery charger. |
| US11303064B2 |
Methods and apparatuses for aligning and coupling a circuit board with a chassis and another circuit board
A Light Detection and Ranging (LiDAR) module for a vehicle can include a chassis, a galvanometer driver circuit board and a main circuit board. The main circuit board may be pre-assembled to the chassis resulting in a blind mating of an electrical connector of the main circuit board to an electrical connector of the galvanometer driver circuit board. The LiDAR module may include pins extending from the chassis arranged to extend through holes in the galvanometer driver circuit board in order to align the electrical connector of the galvanometer driver circuit board with the electrical connector of the main circuit board prior to the coupling of the electrical connectors. The pin may include a threaded portion coupled to the chassis, an unthreaded central portion engaging the galvanometer driver circuit board, and another threaded portion used to secure the galvanometer driver circuit board to the chassis. |
| US11303062B2 |
Connector
A connector 10 includes a housing 12 provided with an opening 24, a cable 14 extending rearward from the opening 24, locking lances 44 resiliently displaceable toward the cable 14, and a retainer 16 to be mounted on the housing 12. The housing 12 includes cantilevered pressing portions 36 and the pressing portions 36 resiliently bring the locking lances 44 into contact with the cable 14 by pressing the locking lances 44 in directions toward the cable 14. The retainer 16 includes a base end wall 40 in which a first insertion hole 48 into which the cable 14 is inserted and second insertion holes 50 into which the pressing portions 33 are inserted are open, and water-wetting suppression walls 62 located behind the second insertion holes 50. The water-wetting suppression walls 62 have ranges overlapping insides of openings of the second insertion holes 50 when viewed from behind. |
| US11303055B2 |
Socket contact having spring device
A socket contact includes a receptacle receiving a plug contact, a base body surrounding the receptacle at least in sections, a contact element disposed in the receptacle and contacting the plug contact, and a spring device creating a contact normal force at the contact element. The spring device is formed as a part of the base body that surrounds the contact element. The spring device is arranged at a first part and the contact element is arranged at a second part separate from the first part. |
| US11303051B2 |
Dual circuit card pluggable module
In one embodiment, a pluggable module is provided. The pluggable module includes a pluggable body having a top wall, a bottom wall, a first side wall and a second side wall. The pluggable body has a cavity. The pluggable body extends between a mating end and a cable end. An upper module circuit card is received in the cavity. The upper module circuit card has a mating edge at a mating end configured to be loaded into an upper card slot of a card edge connector and a cable end opposite the mating end. The upper module circuit card includes first upper contact pads on an upper surface of the upper module circuit card at the mating end. The upper module circuit card includes second upper contact pads on a lower surface of the upper module circuit card at the mating end. The upper module circuit card includes first upper cable termination areas on the upper surface of the upper module circuit card at the cable end. The upper module circuit card includes second upper cable termination areas on the lower surface of the upper module circuit card at the cable end. The first upper cable termination areas include first upper cable pads electrically connected to corresponding first upper contact pads. The second upper cable termination areas include second upper cable pads electrically connected to corresponding second upper contact pads. A lower module circuit card is received in the cavity. The lower module circuit card has a mating edge at a mating end configured to be loaded into a lower card slot of a card edge connector and a cable end opposite the mating end. The lower module circuit card includes first lower contact pads on an upper surface of the lower module circuit card at the mating end. The lower module circuit card includes second lower contact pads on a lower surface of the lower module circuit card at the mating end. The lower module circuit card includes first lower cable termination areas on the upper surface of the lower module circuit card at the cable end. The lower module circuit card includes second lower cable termination areas on the lower surface of the lower module circuit card at the cable end. The first lower cable termination areas includes first lower cable pads electrically connected to corresponding first lower contact pads. The second lower cable termination areas includes second lower cable pads electrically connected to corresponding second lower contact pads. Upper cables have upper cable conductors terminated to corresponding first and second upper cable pads. Lower cables having lower cable conductors terminated to corresponding first and second lower cable pads. Adjacent first upper cable termination areas are staggered relative to each other. Adjacent second upper cable termination areas are staggered relative to each other. Adjacent first lower cable termination areas are staggered relative to each other. Adjacent second lower cable termination areas are staggered relative to each other. |
| US11303050B2 |
Electric connection plug for a battery module and corresponding cabling kit
An electric connection plug (5, 5′, 5″) for an electric cable (3) for use with an electric terminal (20, 21, 20′, 21′) of a battery module (2, 2′). The plug includes a conductive fitting (51, 51′, 51″) engaged with a rotatable wheel (56, 56′, 56″) for selectively rotating the fitting to threadingly mechanically and electrically connect to plug to the battery terminal. The cable mechanically and electrically connects to the plug allowing rotation of the wheel and fitting without rotation of the cable while threadingly engaging and disengaging the plug to the battery terminal. |
| US11303045B2 |
Method for producing a current conducting unit, junction box for a vehicle battery, and motor vehicle
A method for producing a current conducting device, a junction box for a vehicle battery, and a motor vehicle having a corresponding junction box. In the method, multiple busbars are positioned in a predetermined location in relation to one another and then enclosed using an electrically insulating plastic cladding. In this case, a respective opening of the plastic cladding is left open in a respective connection region, in each of which at least two of the busbars meet one another. The busbars are then welded to one another in a respective region of the opening. |
| US11303035B2 |
Antenna apparatus and electronic device
An antenna apparatus and an electronic device are provided. The antenna apparatus includes an excitation source, a conductive member, an antenna radiator comprising a radiator body and a power feeding portion, a first extension portion and a support member, the radiator body comprises a first end and a second end opposite to the first end, and the power feeding portion is disposed at the first end; the first extension portion disposed adjacent to the second end of the antenna radiator, the support member disposed at an end of the first extension portion away from the second end of the antenna radiator, an excitation signal generated by the excitation source transmitted to the support member through the conductive member, the power feeding portion, the first end, the radiator body, the second end, and the first extension portion in sequence. |
| US11303033B1 |
Adjustable helical antenna
An adjustable antenna is provided with a linear central support defining a helical axis, and first and second support disks extending radially outward from the central support. The support disks are rotatable around the central support and the second support disk is translatable along the linear central support. An antenna element is coupled to the first and second support disks to define a helical path around the central support between the first and second support disks. An adjustment component is capable of translating one of the first and second support disks along the linear central support and of rotating at least one of the support disks around the central support to change the helical pitch of the antenna element. |
| US11303028B2 |
5G MMW dual-polarized antenna module and handheld device
A 5G MMW dual-polarized antenna module and a handheld device are disclosed. The antenna module comprises at least two antenna units. Each antenna unit comprises a first horizontal metal plate, a second horizontal metal plate, a first vertical metal plate, a second vertical metal plate and a patch antenna assembly. The antenna module can work within the 5G MMW frequency band and has the characteristic of dual polarization; and when applied to the handheld device, the antenna module will not increase the thickness of the handheld device and is conducive to ultra-thin development of the handheld device. |
| US11303026B2 |
Stacked self-diplexed dual-band patch antenna
Disclosed is an antenna having an electrically conductive base. In some embodiments, a first radiating element (102) may overlie the electrically conductive base and be operative in a first frequency band. A second radiating element (104) may overlie the first radiating element (102) and have a footprint smaller than the first radiating element (102). The second radiating element (104) may be operative in a second frequency band. The second radiating element (104) may overlie the first radiating element (102) by a distance such that isolation between the feed lines of respective first and second radiating elements, in the first and second frequency bands, is greater than or equal to 15 dB. |
| US11303025B2 |
5G dual-polarized antenna module and terminal device
A 5G dual-polarized antenna module and a terminal device are disclosed. The 5G dual-polarized antenna module comprises a substrate, a first metal ground and at least one antenna unit group are disposed in the substrate, the first metal ground partitions the substrate into a first region and a second region, the antenna unit group includes a first antenna unit and a second antenna unit which are located in the first region, and the first antenna unit comprises a dipole element and a parasitic element matched with the dipole element; the second antenna unit comprises a T-shaped probe, which is partially located between the dipole element and the parasitic element; and a first ground layer conductive with the first metal ground is disposed on the bottom surface of the substrate. The 5G dual-polarized antenna module thus being particularly suitable for light and thin terminal devices. |
| US11303024B2 |
Antenna structure
An antenna structure includes a h-shaped radiator and a first radiator. The h-shaped radiator has a first segment, a second segment opposite to the first segment, a first end and a second end which are located at the first segment, a third end located at the second segment, a short-circuit point at the first segment, and a feeding point at the second segment, in which the first segment is longer than the second segment. The first radiator is connected to the second segment. |
| US11303023B2 |
Antenna and electronic device including the same
In an embodiment, an electronic device may include a housing having an inner space, a first printed circuit board including a wireless communication circuit, an antenna structure connected to the wireless communication circuit through a first electrical path, and a tunable circuit having a first resistance value and disposed on a second electrical path. The electronic device may further include a low-resistance circuit disposed on a third electrical path branched from the second electrical path, and including a resistor and an inductor, the resistor having a second resistance value determined based on the first resistance value, and the inductor having a constant inductance value and disposed between the resistor and the ground. The electronic device may also include at least one processor configured to control the tunable circuit. |
| US11303022B2 |
Electronic devices having enclosure-coupled multi-band antenna structures
An electronic device may be provided with a housing and an antenna having a resonating element. The resonating element may have first and second arms extending from opposing sides of a feed. The first arm and a portion of the housing may radiate in a cellular ultra-high band. The first arm may have a fundamental mode that radiates in a first ultra-wideband (UWB) communications band at 6.5 GHz. The second arm may have a fundamental mode that radiates in a 5.0 GHz wireless local area network band. The first and second arms may have a harmonic mode that radiates in a second UWB communications band at 8.0 GHz. The antenna may convey radio-frequency signals in each of these communications bands without the need for adjusting components in the antenna to switch between the UWB communications bands. |
| US11303020B2 |
High gain relay antenna system with multiple passive reflect arrays
Examples disclosed herein relate to a high gain relay antenna system that includes a first passive reflect array configured to receive electromagnetic radiation from a transmitting source and generate a transmit beamforming signal with a first gain from the electromagnetic radiation. The high gain relay antenna system also includes a second passive reflect array positioned at a predetermined distance from the first passive reflect array and configured to collimate phases of the transmit beamforming signal from the first passive reflect array and transmit an outbound beamforming signal with a second gain greater than the first gain, to a coverage area. Other examples disclosed herein relate to a dual-reflect array system and a method of high gain relay with multiple passive reflect array antennas. |
| US11303018B2 |
Mm-wave wireless channel control using spatially adaptive antenna arrays
System and method for determining a position of an antenna array for optimal wireless communication. The system includes a spatially adaptive and beam-steering antenna array configured to control a wireless communications path between a first element and a second element based on a determination of wireless channel gain. |
| US11303012B2 |
Mobile device case with phased array antenna system
A case for an electronic device includes: a body configured to receive the electronic device; a connector configured to connect to a port of the electronic device; and an extendable phased array antenna structure integrated with the body and moveable relative to the body between a retracted position and an extended position. The extendable phased array antenna structure comprises an array of antenna elements that are configured to form a beam in a determined direction, the antenna elements being operatively connected to the connector by circuitry in the case. |
| US11303011B2 |
Smartphone antenna in flexible PCB
A thin, flexible antenna module is provided for use in a smartphone. When the antenna module is assembled in the smartphone, the antenna module provides an MST antenna and an NFC antenna. For this, the antenna module includes a flexible PCB containing coils and further includes a magnetic sheet engaged with flexible PCB. The flexible PCB and the magnetic sheet are attached to each other to form a single body. |
| US11303008B2 |
System and method for a shared millimeter wave antenna system co-located at a speaker grill
An information handling system to wirelessly transmit and receive data may include a base chassis including a processor, a memory, and a wireless adapater; a metal C-cover of the base chassis to house a speaker grill, the speaker grill covering a speaker to emit audio waves; the speaker grill formed within the C-cover, the speaker grill including a slot formed around a portion of a perimeter of the speaker grill that physically separates the portion of the speaker grill as a peninsula in the C-cover; a millimeter wave antenna element coupled to a back side of the speaker grill; and a sub-6 GHz antenna element to transmit via the slot formed around the perimeter of the speaker grill; wherein the speaker grill has a mesh pattern of grill openings sized to be transparent to millimeter wave frequencies emitted by the millimeter wave antenna element. |
| US11303006B2 |
Antenna with sensors for accurate pointing
Determining movement for alignment of a satellite antenna using accelerometer data and gyroscope data of the satellite antenna. Described techniques include receiving accelerometer data for a first time period from an accelerometer mounted on the antenna and analyzing the accelerometer data to determine a movement time window for a movement event of the antenna. The techniques may include receiving gyroscope data for the first time period from a gyroscope mounted on the antenna and analyzing the gyroscope data during the movement time window to determine an amount of movement of the antenna due to the movement event. |
| US11302998B2 |
Bus bar assembly for electrode lead bonding and battery module including same
A bus bar assembly for electrically connecting a plurality of battery cells having electrode leads includes a fixed bus bar provided in the form of a rod-shaped conductor; a pair of movable bus bars disposed to be spaced from both sides of the fixed bus bar in a lateral direction with the fixed bus bar being interposed therebetween to form a fitting space respectively between the pair of movable bus bars and the fixed bus bar so that at least one electrode lead can be inserted therein; and an adhering member configured to move the pair of movable bus bars close to the fixed bus bar when an electrode lead is located in each fitting space so that the electrode leads can be adhered to the fixed bus bar. |
| US11302996B2 |
Battery modules with integrated interconnect board assemblies having cell tab comb features
Presented are integrated electrical interconnect board (ICB) assemblies for battery modules, rechargeable traction battery packs equipped with such ICB assemblies, and methods for making/using such ICB assemblies. A battery module for storing and supplying electrical energy includes multiple battery cells that are stacked in side-by-side facing relation with one another and each has a battery cell casing with an electrical terminal projecting therefrom. An electrically insulating module housing has a housing base that supports thereon the stacked battery cells. An integrated ICB assembly, which is attached to the module housing, includes a central cover in spaced facing relation to the housing base, endwalls projecting from the central cover, and multiple busbar connectors attached to the endwalls and electrically connected to the battery cells' electrical terminals. Each endwall has multiple elongated slots that extend from a distal edge of the endwall and slidably receives therethrough one of the electrical terminals. |
| US11302995B2 |
Buffering member and battery module
The present disclosure provides a buffering member and a battery module, the buffering member comprises a first member and a second member. The first member comprises a first main body and a first connecting portion, the second member comprises a second main body and a second connecting portion. The first main body and the second main body face each other, and the first connecting portion is cooperated with and fixedly connected to the second connecting portion. Because the first member and the second member are independent members, and they can be formed by separately cutting a sheet. Because the first member and the second member each are small in size and simple in structure, and they can be rapidly formed by using less material, the whole structure of the buffering member is simple and the buffering member uses less material, thereby maximally improving the utilization rate of the sheet. |
| US11302993B2 |
Power storage device composition, power storage device separator using power storage device composition, and power storage device
There is demand for a power storage device composition that: compared to past lithium compounds, can suppress development of conductivity caused by blue discoloration (reduction), even when used in a reducing atmosphere; and can inhibit the generation of gases, such as carbon dioxide gas, hydrogen gas, and fluoride gas, that has been a problem in past power storage devices during use and with aging. This power storage device composition is characterized by including, as a principal component, Li2TiO3 that has an x-ray diffraction pattern for which the intensity ratio (A/B) of the peak intensity (A) at a diffraction angle of 2θ=18.4±0.1° and the peak intensity (B) at a diffraction angle of 2θ=43.7±0.1° is at least 1.10. |
| US11302989B2 |
Battery pack
A battery pack having an air communication passage communicating the interior of the battery pack accommodating battery cells with the exterior of the battery pack, and configured to prevent moisture from reaching the battery cells. The battery pack includes a housing having outer and inner bottom plates, and defining a primary chamber for accommodating battery cells and a secondary chamber between the outer and inner bottom plates. The housing includes an air communication passage communicating the secondary chamber with an exterior of the housing. A part of a bottom surface of the inner bottom plate adjacent to an upright wall inclines upward with respect to a reference surface of the bottom surface of the inner bottom plate away from the outer bottom plate toward the upright wall. The air communication passage includes a first communication hole having an edge located above the reference surface of the inner bottom plate. |
| US11302985B2 |
Battery module
A battery module includes a battery cell assembly constituted by stacking a plurality of battery cells, an end plate disposed adjacent to one end of the battery cell assembly, and a shock-absorbing member interposed between the one end of the battery cell assembly and the end plate, wherein the shock-absorbing member is woven fabric or non-woven fabric formed of a plurality of fibers. |
| US11302983B2 |
Battery module frame for a battery module of a battery system
A battery module frame includes first and second frame sections each having a main body, an upper side wall extending from the main body, and a lower side wall extending from the main body. The main body has a bus bar pad for a bus bar that is configured to be electrically connected to battery cells of the battery module. The upper and lower side walls include upper and lower mounting features. The first and second frame sections are coupled at a seam with the upper mounting features removably coupled together at an upper separable interface and with the lower mounting features removably coupled together at a lower separable interface. The first and second frame sections are coupled together with the bus bar pads of the main bodies coplanar. |
| US11302980B2 |
Arrangement for assembling rechargeable batteries into a battery module and a battery module
An arrangement for assembling rechargeable batteries into a battery module for a lift-truck, the rechargeable batteries including a base plate configured to support a respective bottom surface of at least a first and a second rechargeable battery and comprising a holder configured to fixate the position of the at least first and second rechargeable battery onto the base plate, and a cover plate configured to be arranged on a respective top of the at least first and second rechargeable battery and comprising an electrical contact configured to electrically connect the at least first and the second rechargeable battery in series, and at least a first and a second attachment for interlocking the base plate and the cover plate. |
| US11302976B2 |
Pressure-sensitive adhesive tape for battery outer packaging
A pressure-sensitive adhesive tape for a battery outer packaging including: a base material; and a pressure-sensitive adhesive layer arranged on one surface of the base material, where a value calculated from an expression “a loss modulus of elasticity (G″) of the pressure-sensitive adhesive tape for a battery outer packaging at 70° C.×a thickness (mm) of the pressure-sensitive adhesive layer/a thickness (mm) of the pressure-sensitive adhesive tape for a battery outer packaging” is 8×103 Pa or more; a value calculated from an expression “a storage modulus of elasticity (G′) of the pressure-sensitive adhesive tape for a battery outer packaging at 23° C. ×the thickness (mm) of the pressure-sensitive adhesive layer/the thickness (mm) of the pressure-sensitive adhesive tape for a battery outer packaging” is 3×105 Pa or less; and a pressure-sensitive adhesive strength of the pressure-sensitive adhesive tape for a battery outer packaging to a stainless-steel plate at 23° C. is 2 N/10 mm or more. |
| US11302974B2 |
Electrode structure, air cell, and air cell stack
An electrode structure includes a first electrode unit, a second electrode unit and a first insulating frame, in which the electrode units are adjacent to each other. The first insulating unit has an airflow space therein and includes an electrically conducive base with an airflow plane and an air cell cathode disposed on an outer surface of the airflow plane. The second insulating unit includes an electrically conductive base and an air cell anode disposed on an outer surface of the electrically conductive base. The first insulating frame spaces and joins the adjacent electrode units to each other such that the air cell cathode and the air cell anode of the adjacent electrode units are opposed to each other. The first insulating frame together with the adjacent electrode units forms an electrolytic solution container. |
| US11302972B2 |
Battery pack including batteries
The present application provides a battery pack. The battery pack includes a box, the box being configured as a cavity structure; an exhaust channel arranged at the bottom of the box; and a plurality of battery cells, the plurality of battery cells being stacked and housed in the cavity structure of the box, and the plurality of battery cells being located on an end face of the exhaust channel facing away from the bottom of the box, and an end face of each of the battery cells facing the exhaust channel being provided with an explosion-proof valve, where a structural layer of the exhaust channel facing the explosion-proof valve is provided with a weakened zone, and when thermal runaway occurs in any battery cell, a gas in the battery cell is capable of being collected into the exhaust channel via the weakened zone and discharged. |
| US11302971B1 |
System and method of utilizing a rechargeable battery with an information handling system
In one or more embodiments, one or more systems, one or more methods, and/or one or more processes may determine first multiple impedance values of respective multiple resistors associated with a barrier of an enclosure of a cell of a rechargeable battery that includes multiple cells; determine second multiple impedance values of the respective multiple resistors; determine multiple impedance value changes of the respective multiple resistors based at least on the first multiple impedance values and the second multiple impedance values; determine that at least a portion of the multiple impedance value changes exceed a threshold impedance value change; determine that the cell is compromised based at least on determining that the at least the portion of the multiple impedance value changes exceed the threshold impedance value change; and in response to determining that the cell is compromised, remove the cell from a topology of the rechargeable battery. |
| US11302961B1 |
Semi-solid polymer electrolyte and uses thereof in electrochemical devices
Described herein are semi-solid polymer electrolytes (SSPEs) based on a polymer backbone incorporating a flame-retardant crosslinker and fluorinated counterions that are useful in the production of high energy rechargeable lithium metal batteries. The described SSPEs are not liquid electrolytes, are not solid state electrolytes (SSEs), and are differentiated from standard state-of-the-art gel polymer electrolytes (GPEs). The described SSPEs are formed from a first solvent, an optional second solvent, a crosslinker, a lithium salt, and an initiator. The unique coordination structure of the described SSPEs yields non-flammable, low-volatility, non-vaporizable, high Coulombic efficiency (CE), stable solid-electrolyte-interphase (SEI)-forming electrochemical devices, such as lithium metal rechargeable batteries, that are easily adaptable to existing mass-production lines. |
| US11302958B2 |
Method and apparatus for producing all-solid-state battery
Provided is a method for producing an all-solid-state battery, which is capable of preventing the occurrence of a short circuit or a charge abnormality due to the formation of a dendrite even in cases where the pressing force is decreased. In the method for producing an all-solid-state battery, a solid electrolyte layer is arranged between a positive electrode layer and a negative electrode layer and current collectors are connected to the positive electrode layer and the negative electrode layer, respectively. This method for producing an all-solid-state battery is characterized by comprising: a step for forming at least one powder film for constituting the positive electrode layer, the negative electrode layer and/or the solid electrolyte layer, and a step for pressing a surface of the powder film by a pressing body consisting of an elastic body. |
| US11302957B1 |
Hybrid solid-state electrolyte
A hybrid solid state electrolyte (SSE) can include a plurality of SSE particles suspended in a salt-in-solvent (SIS). A battery can include the hybrid SSE. The battery can be formed by at least forming the hybrid SSE in situ. Forming the hybrid SSE in situ can include: depositing, on a surface of an electrode of the battery, a mixture comprising the SSE particles and at least a portion of salt for the SIS; filling the battery with a solvent; and heating the battery to form the SIS by at least melting and/or dissolving the portion of the salt into the solvent. |
| US11302949B2 |
Polymer electrolyte membrane, method for manufacturing same, and membrane electrode assembly comprising same
A polymer electrolyte membrane, a method for manufacturing the same, and a membrane electrode assembly containing the polymer electrolyte membrane are disclosed. The polymer electrolyte membrane includes: a fluorine-based support containing a plurality of pores due to polymer microfibrillar structures; a hybrid porous support placed on one side or both surfaces of the fluorine-based support and comprising nanowebs obtained by integrating nanofibers into a nonwoven fabric containing a plurality of pores; and ion conductors with which the pores of the porous support are filled. The polymer electrolyte membrane can reduce hydrogen permeability while being excellent in both durability and ion conductivity. |
| US11302942B2 |
Method for detecting leakage of a reducing fluid throughout an electrolyte membrane of an electrochemical cell
A method for detecting leakage of a reducing fluid throughout an electrolyte membrane of an electrochemical cell is provided. The method includes the following consecutive steps: supplying the cell with anode and cathode streams; brisk and controlled variation of at least one of the following parameters: the pressure of the anode stream in the anode channel, the pressure of the cathode stream in the cathode channel, the flow rate of the anode stream into the anode channel, the flow rate of the cathode stream into the cathode channel, and the strength of the current exchanged between the two sides of the membrane; measurement of a first reducing fluid concentration in a first stream, including the cathode stream leaving the cathode channel; and deducing the presence or absence of leakage on the basis of the variation in the first measured concentration of reducing fluid over time. A corresponding fuel cell system is also provided. |
| US11302938B2 |
Fuel cell system
A fuel cell system includes: a fuel cell stack; a first cooling medium circuit through which a cooling medium for cooling the fuel cell stack flows; an ion exchanger that removes ions in the cooling medium; a second cooling medium circuit in which the average ion concentration of the cooling medium is lower than that of the cooling medium in the first cooling medium circuit; a switching valve that switches between a flow state and a low flow state; a pump configured to cause the cooling medium in the second cooling medium circuit to flow into the first cooling medium circuit; and a control unit that, when a stop period of the fuel cell system is longer than a reference period, drives the pump with the switching valve switched to the flow state after the instruction to start the fuel cell system is input. |
| US11302933B2 |
Electrochemical cells with improved fluid flow design
An electrochemical cell stack having a plurality of electrochemical cells stacked along a longitudinal axis. The electrochemical cells include a membrane electrode assembly comprising a cathode catalyst layer, an anode catalyst layer, and a polymer membrane interposed between the cathode catalyst layer and the anode catalyst layer. The electrochemical cells also include an anode plate and a cathode plate with the membrane electrode assembly interposed therebetween, and the anode plate defines a plurality of channels that form an anode flow field facing the anode catalyst layer. The electrochemical cells further include a cathode flow field positioned between the cathode plate and the cathode catalyst layer, wherein the cathode flow field comprises a porous structure. |
| US11302932B2 |
Bipolar plate for low pressure feed electrode operation
A bipolar plate having side ports is described for use with an electrochemical cell. A side port having a high aspect ratio will have an effect on the partial pressure of the reactant gasses and prevent high pressure drop of the working fluid transport to the electrodes. The membrane electrode assembly may have a high aspect ratio and the port opening may be on the long side of the bipolar plate. The electrochemical cell may be configured in an enclosure that is maintained at less than atmospheric pressure which further increases the need for low pressure drop fuel deliver to the electrodes, especially in electrochemical compressor applications. |
| US11302930B2 |
Activation device for a battery for an electronic ignition mechanism and battery
An activation device for a battery for an electronic ignition mechanism has an ampoule filled with an electrolyte and a device for breaking the ampoule. The breaking device contains two leaf spring elements, which are fixed with a prestress on a component in the housing interior and between which the ampoule is clamped. At least the leaf spring element which supports the ampoule on the bottom side snaps from a first shape into a second shape when a force due to acceleration is applied. |
| US11302928B2 |
Carbon material for catalyst carrier of polymer electrolyte fuel cell, and method of producing the same
The present invention is a carbon material for a catalyst carrier of a polymer electrolyte fuel cell, which has a three-dimensional dendritic structure, and simultaneously satisfies the following (A), (B), and (C). (A) By a laser Raman spectroscopic analysis with a wavelength of 532 nm, a standard deviation δ(R) of an intensity ratio (R value) of an intensity of a D-band (near 1360 cm−1) to an intensity of a G-band (near 1580 cm−1) measured with a beam diameter of 1 μm at 50 measurement points is from 0.01 to 0.07. (B) A BET specific surface area SBET is from 400 to 1520 m2/g. (C) A nitrogen gas adsorption amount VN:0.4-0.8 during a relative pressure (p/p0) from 0.4 to 0.8 is from 100 to 300 cc(STP)/g. A method of producing such a carbon material for a catalyst carrier is also included. |
| US11302902B2 |
Method for manufacturing an electrode assembly for a battery cell and battery cell
The invention refers to a method for manufacturing an electrode assembly for a battery cell, whereat segments of a first electrode are placed between a continuous first separator sheet and a continuous second separator sheet; segments of a second electrode are placed on an opposite side of the first separator sheet in respect of the segments of the first electrode and on an opposite side of the second separator sheet in respect of the segments of the first electrode such that a tape element is formed; and the tape element is folded such that the segments of the first electrode and the segments of the second electrode are aligned in a stacking direction. The invention also refers to a battery cell, in particular a lithium ion battery cell, comprising an electrode assembly manufactured using the method according to the invention. |
| US11302897B2 |
Display panel, preparation method thereof, and display device each having first water oxygen barrier bar with first and second sub-barrier bars separated from each other by gaps that are not aligned
A display panel, a preparation method thereof, and a display device, and relates to the field of display technology are provided. The display panel includes: a substrate; a plurality of illuminating pixels arranged in an array above the substrate and located in the display region; and a first water oxygen barrier bar disposed above the substrate and located in the peripheral region, wherein the first water oxygen barrier bar includes a plurality of first sub-barrier bars arranged intermittently and a plurality of second sub-barrier bars arranged intermittently; in a direction perpendicular to an arrangement direction of the first sub-barrier bars, a gap between adjacent first sub-barrier bars and a gap between adjacent second sub-barrier bars are not aligned with each other. |
| US11302895B2 |
Display substrate having separation pillar in the peripheral area, display apparatus, and method of fabricating display substrate having the same
A display substrate having a display area and a peripheral area is provided. The display substrate includes a plurality of light emitting elements on a base substrate and in the display area; an encapsulating layer on a side of the plurality of light emitting elements away from the base substrate; and a first separation pillar in the peripheral area and on the base substrate, the first separation pillar forming a first enclosure substantially surrounding a first area. The first separation pillar includes a plurality of metal layers and a plurality of insulating layers alternately stacked on the base substrate. A width of a respective one of the plurality of insulating layers along a cross-pillar direction across the first enclosure and from the display area toward the first separation pillar is greater than a width of a respective one of the plurality of metal layer along the cross-pillar direction. |
| US11302894B2 |
Display substrate, method for manufacturing the same and display device
A method for manufacturing a display substrate includes: providing a base substrate; forming at least one isolation structure around an opening area on the base substrate, wherein the isolation structure includes a first side wall including a first side and a second side, the second side is closer to the base substrate than the first side, the first side is further away from the opening area than the second side; and forming a first filling structure on a side of the first side wall away from the opening area, wherein the first filling structure includes a second side wall conforming to a shape of the first side wall and a third side wall including a third side and a fourth side, the fourth side is closer to the base substrate than the third side, the third side is closer to the opening area than the fourth side. |
| US11302892B2 |
Display substrate and manufacture method thereof, and display device
A display substrate and a manufacture method thereof, and a display device are provided. The display substrate includes a display region, the display region includes an organic functional layer, an encapsulation layer, and a first barrier wall; the display region has a first opening, the first barrier wall surrounds an outer edge of the first opening, the organic functional layer surrounds the first barrier wall, and the encapsulation layer covers the organic functional layer and the first barrier wall; the encapsulation layer includes a first portion and a second portion, the first portion is configured to cover a portion of the organic functional layer close to the first opening; a second portion is configured to cover a side of the first barrier wall adjacent to the organic functional layer, the first portion forms an obtuse angle with the second portion. |
| US11302890B2 |
Encapsulation structure with sub-film layers and encapsulating method thereoff
The present disclosure is related to an encapsulating method that may include forming an inorganic film layer covering a structure to be encapsulated. The inorganic film layer may include at least two sub-film layers. Among the at least two sub-film layers, densification of a sub-film layer farther away from the structure to be encapsulated may be greater than densification of a sub-film layer closer to the structure to be encapsulated. |
| US11302889B2 |
Flexible display module having a flexible glass layer
A flexible display module and a method for manufacturing the same solve a problem that the existing flexible display module is easy to be failure after being bent. The flexible display module includes: a flexible glass layer; and a display panel disposed inside the flexible glass layer. |
| US11302885B2 |
Electroluminescent display device
An electroluminescent display device includes: a substrate including: a first subpixel, a second subpixel, and a third subpixel, an insulating layer on the substrate, the insulating layer including a trench, a first electrode in each of the first to third subpixels on the insulating layer, an emission layer on the first electrode and the insulating layer, and a second electrode on the emission layer, wherein the trench is in a boundary between the first subpixel and the second subpixel, and wherein the trench is not in a boundary between the second subpixel and the third subpixel. |
| US11302884B2 |
Organic light-emitting diode display panel and method of fabricating same
The present invention provides an organic light-emitting diode (OLED) display panel, including: an array substrate; an anode disposed on the array substrate; a light-emitting layer disposed on the anode, the light-emitting layer including a red light-emitting sub-layer, a green light-emitting sub-layer, and a blue light-emitting sub-layer in a pixel region; and a cathode disposed on the light-emitting layer, wherein the pixel region at least corresponding to the red light-emitting sub-layer and the green light-emitting sub-layer is not provided with a hole blocking layer. |
| US11302880B2 |
Organic thin-film transistors and methods for manufacturing the same and image display devices
An organic thin-film transistor includes an insulating substrate, a capacitor electrode formed on the insulating substrate, a first insulating layer covering the capacitor electrode, a gate electrode formed on the first insulating layer, a second insulating layer covering the gate electrode and the capacitor electrode, a source electrode formed on the second insulating layer, a drain electrode formed on the second insulating layer, and a semiconductor layer formed on the second insulating layer in a portion between the source electrode and the drain electrode and including an organic semiconductor material. |
| US11302879B2 |
Flexible display substrate and manufacturing method therefor, and display apparatus
A flexible display substrate and a manufacturing method therefor, and a display apparatus, for relieving the problem that it is difficult to bend the flexible display substrate in a bending region to damage an upper circuit. The flexible display substrate comprises a back film, a first flexible base substrate located above the back film, and a second flexible base substrate located on one side of the first flexible base substrate facing away from the back film. The flexible display substrate has a bending region. An auxiliary layer is further provided between the first flexible base substrate and the second flexible base substrate. At least part of the auxiliary layer in the bending region can be decomposed in a preset condition, wherein the other film layers except the auxiliary layer are maintained at the original status in the preset condition. |
| US11302878B2 |
Organic light emitting diode display panel and method of fabricating same
An organic light emitting diode (OLED) display panel and a method of fabricating the same are provided. The OLED display panel includes a double-layer polyimide flexible layer, a thin film transistor driving layer, an OLED light emitting layer, and a thin film encapsulation layer. The double-layer polyimide flexible layer includes a glass substrate, a wetting layer, a polyimide flexible layer, and an inorganic silicon nitride layer. The wetting layer converts the glass substrate or the inorganic silicon nitride layer from hydrophilic to hydrophobic. |
| US11302876B2 |
Organic light emitting diode display panel and method of manufacturing same
An organic light emitting diode (OLED) display panel and a method of manufacturing same are provided. The method includes forming a wetting layer on a substrate, such that a hydrophilicity of a surface of the substrate is same as a hydrophilicity of a flexible material layer to be formed, forming the flexible material layer on the wetting layer, wherein the formed flexible material layer has a same film thickness at different positions, and sequentially forming a thin film transistor layer and an organic light emitting layer on the flexible material layer. |
| US11302874B2 |
Organic electroluminescent compound and organic electroluminescent device comprising the same
The present disclosure relates to an organic electroluminescent compound and an organic electroluminescent device comprising the same. By comprising the organic electroluminescent compound of the present disclosure, it is possible to provide an organic electroluminescent device having excellent thermal stability, low driving voltage, high luminous efficiency, and/or improved lifespan properties. |
| US11302872B2 |
Organic electroluminescent materials and devices
A composition of matter that includes a novel combination of host compounds containing indol-fused hosts and emissive dopants containing benzofuran or azabenzofuran ligand is disclosed, |
| US11302871B2 |
Organic light-emitting device and light-emitting apparatus including the same
Provided are an organic light-emitting device including a capping layer including an amine-based compound represented by a set or predetermined formula and a radical scavenger, and a light-emitting apparatus including the organic light-emitting device. The organic light-emitting device includes: a first electrode; a second electrode facing the first electrode; an organic layer between the first electrode and the second electrode and including an emission layer a capping layer on the second electrode, wherein the capping layer includes the amine-based compound. |
| US11302870B2 |
Materials for electronic devices
The present application relates to fluoranthenylamine compounds of a formula (I). These compounds are suitable for use in electronic devices, The present application further relates to processes for preparing the compounds mentioned, and to electronic devices comprising the compounds mentioned. |
| US11302869B2 |
Manufacturing method of via-hole connection structure, array substrate and manufacturing method thereof, display device and manufacturing method thereof
A manufacturing method of a via-hole connection structure, a manufacturing method of an array substrate and an array substrate are provided by the embodiments of the present disclosure, and the manufacturing method of the via-hole connection structure includes: forming an insulation layer on a base substrate and forming a first via hole in the insulation layer; forming a connection portion in the first via hole; forming a protection layer covering the connection portion on a surface of the insulation layer; forming a second via hole in the insulation layer and in the protection layer; removing at least a portion of the protection layer to expose the connection portion. |
| US11302863B2 |
STT MRAM matertails with heavy metal insertion
A bottom pinned magnetic tunnel junction (MTJ) stack having improved switching performance is provided which can be used as a component/element of a spin-transfer torque magnetoresistive random access memory (STT MRAM) device. The improved switching performance which, in turn, can reduce write errors and improve write voltage distributions, is obtained by inserting at least one heavy metal-containing layer into the magnetic free layer and/or by forming a heavy metal-containing layer on a MTJ capping layer that is located above the magnetic free layer. |
| US11302861B2 |
Hybrid actuator having a flexible printed circuit board for applying an electric current to a piezoelectric element and a coil inside a housing of the hybrid actuator
A hybrid actuator is provided in which a piezoelectric element and an actuator are incorporated with each other. The hybrid actuator includes: a housing; a stator secured to the housing and having a coil; a vibrator having a permanent magnet configured to vibrate due to a mutual electromagnetic force with the stator; an elastic member configured to elastically support the vibrator relative to the housing; a piezoelectric element attached to one surface of the housing; and an F-PCB (flexible printed circuit board) applying an electric current to the piezoelectric element and the coil inside the housing. A part of the F-PCB extends outside the housing. Input terminals are formed on the part of the F-PCB which extends outside the housing. The input terminals are configured to receive a vibration signal and an audio signal so that the hybrid actuator can reproduce both the vibration signal and the audio signal. |
| US11302859B2 |
Zero-power wake-up sensing circuit in piezoelectric haptic feedback
Piezoelectric elements are attractive for systems in which both sensing and actuating is required because a single element, i.e. the piezoelectric actuator, can be used that act as both a sensor and an actuator. In conventional systems combining both actuating and sensing functionality, active circuitry is required to read the sensor, and that circuitry requires static and/or dynamic current from a few microamps to a few milliamps. In systems where buttons are used a few times a day, this requirement for current leads to a significant amount of wasted power. Accordingly, a wake-up circuit is provided that does not draw power when no force is applied to the piezoelectric actuator but is capable of detecting pressure applied to the piezo actuator, generate a power-up signal to the actuating circuit, and initiate a haptic feedback with low-latency. |
| US11302855B2 |
High-efficiency two-phase heusler thermoelectric materials
A thermoelectric material may be composed of an isostructural pair of Heusler compounds, either a pair of full Heusler (FH) X2YZ compounds or a pair of half Heusler (HH) XYZ compounds. In the FH pair, a first compound of the pair may the formula (X1)2Y1Z1, wherein X1 is selected from Fe and Co; Y1 is selected from Ti, V, Nb, Hf, and Ta; and Z1 is selected from Al, Ga, Si, and Sn and a second compound of the pair has the formula (X2)2Y2Z2, wherein X2 is selected from Mn, Fe, Co, Ru, and Rh; Y2 is selected from Ti, V, Mn, Zr, Nb, Hf, and Ta; and Z2 is selected from Be, Al, Ga, Si, Ge and Sn. The first and second compounds of the pair may share two elements in common and have third elements which are different and are either isovalent or have a valency which differs by ±1. In the HH pair, a first compound of the pair may have the formula X1Y1Z1 wherein X1 is selected from Ni and Fe; Y1 is selected from Ti, V, and Nb; and Z1 is selected from Sn and Sb and a second compound of the pair has the formula X2Y2Z2 wherein X2 is selected from Fe, Ru and Pt; Y2 is selected from Ti, V, and Nb; and Z2 is selected from Sn and Sb. The first and second compounds of the pair may share two elements in common and have third elements which are different and are either isovalent or have a valency which differs by ±1. The thermoelectric material at room temperature may have a nanostructured two-phase form having a matrix phase composed of the first compound of the FH pair or the first compound of the HH pair and a nanostructured phase composed of the second compound of the FH pair or the second compound of the HH pair, respectively. |
| US11302853B2 |
Semiconductor device package and light source device
A semiconductor device package provided in an embodiment comprises: first and second frames spaced apart from each other; a body disposed between the first and second frames; and a semiconductor device disposed on the first and the second frame and comprising a semiconductor layer and a first and a second electrode on the semiconductor layer, wherein the first and the second frame comprise a first metal layer having a plurality of pores, and the first metal layer of the first and the second frame may comprise coupling portions in regions where the first metal layer overlaps the first and the second electrode, respectively. |
| US11302851B2 |
Component with a reflective housing and method for producing such a component
In one embodiment, the component comprises a light reflective housing. The housing comprises a matrix material of a light-transmittive plastic and particles of a glass ceramic embedded therein. The particles comprise a mean diameter of at least 5 μm. The particles comprise a glass matrix and crystallites. A refractive index difference between the glass matrix and the crystallites is at least 0.5, and the crystallites exhibit a mean diameter between 20 nm and 0.5 μm, inclusive. |
| US11302849B2 |
Pigmented and scattering particles in side coating materials for LED applications
Phosphor-converted LED side reflectors disclosed herein comprise pigments that are photochemically stable under illumination by light from the pcLED. The pigments absorb light in at least a portion of the spectrum of light emitted by the first phosphor converted LED. The side reflector may also comprise light scattering particles and/or air voids. The pigments, light scattering particles and/or air voids may be homogeneously distributed in the reflector. Alternatively the side reflector may be layered, with the pigments, light scattering particles and/or air voids inhomogeneously distributed in the reflector. The side reflector may comprise phosphor particles. |
| US11302845B2 |
Semiconductor light-emitting element
A semiconductor light-emitting element includes: an n-type clad layer of an n-type aluminum gallium nitride (AlGaN)-based semiconductor material provided on a substrate; an active layer of an AlGaN-based semiconductor material provided on the n-type clad layer and configured to emit deep ultraviolet light having a wavelength of not shorter than 300 nm and not longer than 360 nm; and a p-type semiconductor layer provided on the active layer. The n-type clad layer is configured such that a transmittance for deep ultraviolet light having a wavelength of 300 nm or shorter is 10% or lower. |
| US11302842B2 |
Micro light emitting diode device and manufacturing method thereof
A method for manufacturing a micro light emitting diode device is provided. A connection layer and a plurality of epitaxial structures are formed on a substrate, wherein the epitaxial structures are separated from each other and relative positions therebetween are fixed via the connection layer. A first pad is formed on each of the epitaxial structures. A plurality of light blocking layers are formed between the epitaxial structures, wherein the light blocking layers and the epitaxial structures are alternately arranged. Each of the epitaxial structures is bonded to a destination substrate after forming the light blocking layers. The substrate is removed to expose the connection layer. A light conversion layer is formed corresponding to each of the epitaxial structures, wherein a width of the light conversion layer is greater than or equal to a distance between any two of the light blocking layers. |
| US11302841B1 |
Self-alignment of micro light emitting diode using planarization
Embodiments relate to a method for fabricating a light-emitting-diode (LED). A metal layer is deposited on a p-type semiconductor. The p-type semiconductor is on an n-type semiconductor. The metal layer is patterned to define a p-metal. The p-type semiconductor is etched using the p-metal as an etch mask. Similarly, the n-type semiconductor is etched using the p-metal and the p-type semiconductor as an etch mask to define individual LEDs. |
| US11302837B2 |
Solar cell panel and method for manufacturing the same
A solar cell panel can include solar cell parts including a solar cell and a wiring member connected to the solar cell; a first cover member disposed at a front surface of the solar cell; a second cover member disposed at a rear surface of the solar cell; a sealing member disposed between the first cover member and the second cover member, the sealing member surrounding the solar cell parts; and one or more of a plurality of fixing members including at least one of a first fixing member and a second fixing member, in which the first fixing member is disposed at a rear surface of the first cover member and fixes at least part of one of the solar cell parts to the first cover member, and the second fixing member fixes the second cover member to the first cover member. |
| US11302833B2 |
Optoelectronic device comprising perovskites
The invention provides an optoelectronic device comprising a porous material, which porous material comprises a semiconductor comprising a perovskite. The porous material may comprise a porous perovskite. Thus, the porous material may be a perovskite material which is itself porous. Additionally or alternatively, the porous material may comprise a porous dielectric scaffold material, such as alumina, and a coating disposed on a surface thereof, which coating comprises the semiconductor comprising the perovskite. Thus, in some embodiments the porosity arises from the dielectric scaffold rather than from the perovskite itself. The porous material is usually infiltrated by a charge transporting material such as a hole conductor, a liquid electrolyte, or an electron conductor. The invention further provides the use of the porous material as a semiconductor in an optoelectronic device. Further provided is the use of the porous material as a photosensitizing, semiconducting material in an optoelectronic device. The invention additionally provides the use of a layer comprising the porous material as a photoactive layer in an optoelectronic device. Further provided is a photoactive layer for an optoelectronic device, which photoactive layer comprises the porous material. |
| US11302829B2 |
Photovoltaic device and method for manufacturing photovoltaic device
A photovoltaic device according to the present disclosure includes: a first-conductivity-type semiconductor film provided on a back side of a semiconductor substrate; a second-conductivity-type semiconductor film in which at least a part thereof is provided in a position different, in plan view, from a position of the first-conductivity-type semiconductor film on the back side of the semiconductor substrate; a protective film, which is formed on a back side of the first-conductivity-type semiconductor film and a back side of the second-conductivity-type semiconductor film, and which includes a conductive portion and a non-conductive transformed portion; and an electrode film formed on a back side of the conductive portion. The transformed portion of the protective film is provided along a conduction path between a back surface of the first-conductivity-type semiconductor film and a back surface of the second-conductivity-type semiconductor film. |
| US11302827B2 |
Semiconductor device with sidewall oxidized dielectric and method for fabricating the same
The present application discloses a semiconductor device with an oxidized intervention layer and a method for fabricating the semiconductor device. The semiconductor device includes a substrate, a tunneling insulating layer disposed over the substrate, a floating gate disposed over the tunnel oxide layer, a lateral oxidized intervention layer disposed over the floating gate, and a control gate disposed over the dielectric layer. The lateral oxidized intervention layer comprises a sidewall portion and a center portion, and the sidewall portion has a greater concentration of oxygen than the center portion. |
| US11302826B2 |
Semiconductor device
A semiconductor device includes a first PMOS transistor, a first NMOS transistor, and a second NMOS transistor connected to an output node of the first PMOS and NMOS transistors. The first PMOS transistor includes first nanowires, first source and drain regions on opposite sides of each first nanowire, and a first gate completely surrounding each first nanowire. The first NMOS transistor includes second nanowires, second source and drain regions on opposite sides of each second nanowire, and a second gate extending from the first gate and completely surrounding each second nanowire. The second NMOS transistor includes third nanowires, third source and drain regions on opposite sides of each third nanowire, and a third gate, separated from the first and second gates, and completely surrounding each third nanowire. A number of third nanowires is greater than that of first nanowires. The first and second gates share respective first and second nanowires. |
| US11302824B2 |
Logic circuit and semiconductor device
A logic circuit includes a thin film transistor having a channel formation region formed using an oxide semiconductor, and a capacitor having terminals one of which is brought into a floating state by turning off the thin film transistor. The oxide semiconductor has a hydrogen concentration of 5×1019 (atoms/cm3) or less and thus substantially serves as an insulator in a state where an electric field is not generated. Therefore, off-state current of a thin film transistor can be reduced, leading to suppressing the leakage of electric charge stored in a capacitor, through the thin film transistor. Accordingly, a malfunction of the logic circuit can be prevented. Further, the excessive amount of current which flows in the logic circuit can be reduced through the reduction of off-state current of the thin film transistor, resulting in low power consumption of the logic circuit. |
| US11302821B2 |
Display device and method for manufacturing the same
Provided are a display device and a method for manufacturing the same. The display device includes: a connection source electrode and a connection drain electrode connected to a first source electrode a the first drain electrode, respectively by penetrating an isolation insulating layer and a second interlayer dielectric layer to enhance a characteristic of an element and reliability of the display device. |
| US11302820B2 |
Localized protection layer for laser annealing process
A method of forming a semiconductor device includes forming source/drain contact openings extending through at least one dielectric layer to expose source/drain contact regions of source/drain structures. The method further includes depositing a light blocking layer along sidewalls and bottom surfaces of the source/drain contact openings and a topmost surface of the at least one dielectric layer. The method further includes performing a laser annealing process to activate dopants in the source/drain contact region. The method further includes forming source/drain contact structures within source/drain contact openings. |
| US11302819B2 |
Semiconductor device and display device including the same
A first transistor and a second transistor are stacked. The first transistor and the second transistor have a gate electrode in common. At least one of semiconductor films used in the first transistor and the second transistor is an oxide semiconductor film. With the use of the oxide semiconductor film as the semiconductor film in the transistor, high field-effect mobility and high-speed operation can be achieved. Since the first transistor and the second transistor are stacked and have the gate electrode in common, the area of a region where the transistors are disposed can be reduced. |
| US11302817B2 |
Semiconductor device and process of forming the same
A semiconductor device type of field effect transistor (FET) primarily made of nitride semiconductor materials is disclosed. The FET includes a nitride semiconductor stack providing primary and auxiliary active regions and an inactive region surrounding the active regions; electrodes of a source, a drain, and a gate; an insulating film covering the electrodes and the semiconductor stack; and a field plate on the insulating film. A feature of the FET of the invention is that the field plate is electrically in contact with the auxiliary active region through the opening provided in the insulating film. |
| US11302815B2 |
Semiconductor device including active region and gate structure
A semiconductor device includes an active region extending from a substrate in a vertical direction, source/drain regions spaced apart from each other on the active region, a fin structure between the source/drain regions on the active region, the fin structure including a lower semiconductor region on the active region, a stack structure having alternating first and second semiconductor layers on the lower semiconductor region, a side surface of at least one of the first semiconductor layers being recessed, and a semiconductor capping layer on the stack structure, an isolation layer covering a side surface of the active region, a gate structure overlapping the fin structure and covering upper and side surfaces of the fin structure, the semiconductor capping layer being between the gate structure and each of the lower semiconductor region and stack structure, and contact plugs electrically connected to the source/drain regions. |
| US11302814B2 |
Semiconductor device with porous dielectric structure and method for fabricating the same
The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate, two conductive features positioned apart from each other over the substrate, and a porous middle layer positioned between the two conductive features and adjacent to the two conductive features. A porosity of the porous middle layer is between about 25% and about 100%. |
| US11302813B2 |
Wrap around contact for nanosheet source drain epitaxy
Embodiments of the invention include a method for fabricating a semiconductor device and the resulting structure. A nanosheet stack of alternating nanosheets of a sacrificial semiconductor material and a semiconductor channel material located on a substrate is provided. An additional dielectric spacer is formed on the dielectric spacer and within a gap. Dielectric spacer is removed. An epitaxial oxide layer is formed on the re-exposed recessed surfaces of the substrate. Germanium is formed on the epitaxial oxide layer. Sidewalls of each semiconductor channel material nanosheet are physically exposed. A source/drain is formed on a surface of the germanium. ILD material is formed above each source/drain and above an adjacent region. Portions of ILD material are removed such that sidewalls of the source/drain and germanium are exposed. The germanium is removed. A contact region is formed that wraps around the source/drain region. |
| US11302811B2 |
Silicon carbide power device with MOS structure and stressor
A silicon carbide power device, e.g., a vertical power MOSFET or an IGBT, includes a silicon carbide wafer. A first stressor and a second stressor are arranged in the silicon carbide wafer at a first main side. A first channel region, a first portion of a drift layer and a second channel region are laterally arranged between the first stressor and the second stressor in a second lateral direction parallel to the first main side and perpendicular to the first lateral direction. A stress can be introduced by the first stressor and the second stressor in the first channel region and in the second channel region. |
| US11302810B1 |
Ferroelectric field effect transistor with nanowire core
A ferroelectric field effect transistor (FeFET) is provided. The FeFET includes a buried oxide (BOX) layer; a nanowire layer including pads formed on the BOX layer at source and drain regions of the FeFET, and a nanowire core extending between the pads and over a recess formed in the BOX layer; a metal electrode coating the nanowire core; a ferroelectric layer coating the metal electrode; an interfacial layer coating the ferroelectric layer; and a polysilicon layer formed over a channel region of the FeFET, the polysilicon layer coating the interfacial layer. |
| US11302809B2 |
Semiconductor device and manufacturing method thereof
A method includes forming a first-type deep well with a first impurity of a first conductivity type in a semiconductor substrate; doping a second impurity of a second conductivity type into the first-type deep well to form a second-type doped region, in which a concentration of the first impurity in the first-type deep well is greater than a concentration of the second impurity in the second-type doped region and less than about ten times the concentration of the second impurity in the second-type doped region; forming a field oxide partially embedded in the semiconductor substrate, the field oxide laterally extending from a first side of the second-type doped region; forming a second-type well of the second conductivity type in the first-type deep well and on a second side of the second-type doped region opposite the first side of the second-type doped region. |
| US11302808B2 |
III-V transistors with resistive gate contacts
Embodiments herein describe techniques, systems, and method for a semiconductor device that may include an III-V transistor with a resistive gate contact. A semiconductor device may include a substrate, and a channel base including a layer of GaN above the substrate. A channel stack may be above the channel base, and may include a layer of GaN in the channel stack, and a polarization layer above the layer of GaN in the channel stack. A gate stack may be above the channel stack, where the gate stack may include a gate dielectric layer above the channel stack, and a resistive gate contact above the gate dielectric layer. The resistive gate contact may include silicon (Si) or germanium (Ge). Other embodiments may be described and/or claimed. |
| US11302804B2 |
Devices having a semiconductor material that is semimetal in bulk and methods of forming the same
Devices, and methods of forming such devices, having a material that is semimetal when in bulk but is a semiconductor in the devices are described. An example structure includes a substrate, a first source/drain contact region, a channel structure, a gate dielectric, a gate electrode, and a second source/drain contact region. The substrate has an upper surface. The channel structure is connected to and over the first source/drain contact region, and the channel structure is over the upper surface of the substrate. The channel structure has a sidewall that extends above the first source/drain contact region. The channel structure comprises a bismuth-containing semiconductor material. The gate dielectric is along the sidewall of the channel structure. The gate electrode is along the gate dielectric. The second source/drain contact region is connected to and over the channel structure. |
| US11302803B2 |
Semiconductor structure and method for fabricating the same
Semiconductor structure and fabrication method are provided. The method includes providing a substrate including a first region and a second region; forming a plurality of fins on the first region of the substrate; forming a first isolation structure on the first region and the second region of the substrate; forming a gate structure and a dummy gate structure each across fins and the first isolation structure at the first region; forming an epitaxial layer in each fin on two sides of the gate structure; forming a first opening by etching a portion of each of the first isolation structure and the substrate that are at the second region; filling the first opening with a conductive material layer; removing the dummy gate structure and a portion of the conductive material layer in the first opening to form a power rail; and forming a second isolation structure in a second opening. |
| US11302802B2 |
Parasitic capacitance reduction
The present disclosure provides semiconductor devices and methods of forming the same. A semiconductor device according to one embodiment of the present disclosure includes a first fin-shaped structure extending lengthwise along a first direction over a substrate, a first epitaxial feature over a source/drain region of the first fin-shaped structure, a gate structure disposed over a channel region of the first fin-shaped structure and extending along a second direction perpendicular to the first direction, and a source/drain contact over the first epitaxial feature. The bottommost surface of the gate structure is closer to the substrate than a bottommost surface of the source/drain contact. |
| US11302800B2 |
Fabrication of electronic devices using sacrificial seed layers
A method of making a semiconductor device includes depositing an amorphous layer on a substrate, masking a portion of the amorphous layer, removing a portion of the amorphous layer to form a first channel into the amorphous layer, depositing a semiconductor layer onto the substrate layer, and removing at least a portion of a defect region of the semiconductor layer to form a second channel. |
| US11302799B2 |
Method and structure for forming a vertical field-effect transistor
A method for manufacturing a semiconductor device includes forming a first semiconductor layer on a semiconductor substrate, forming a second semiconductor layer including a first concentration of germanium on the first semiconductor layer, and forming a third semiconductor layer on the second semiconductor layer. The first and third semiconductor layers each have a concentration of germanium, which is greater than the first concentration of germanium. The first, second and third semiconductor layers are patterned into at least one fin. The method further includes covering the second semiconductor layer with a mask layer. In the method, a bottom source/drain region and a top source/drain region are simultaneously grown from the first semiconductor layer and the third semiconductor layer, respectively. The mask layer is removed from the second semiconductor layer, and a gate structure is formed on and around the second semiconductor layer. |
| US11302797B2 |
Approach to bottom dielectric isolation for vertical transport fin field effect transistors
A vertical transport fin field effect transistor (VT FinFET), including one or more vertical fins on a surface of a substrate, an L-shaped or U-shaped spacer trough on the substrate adjacent to at least one of the one or more vertical fins, and a gate dielectric layer on the sidewalls of the at least one of the one or more vertical fins and the L-shaped or U-shaped spacer trough. |
| US11302793B2 |
Transistor gates and method of forming
A device includes a first nanostructure; a second nanostructure over the first nanostructure; a first high-k gate dielectric disposed around the first nanostructure; a second high-k gate dielectric being disposed around the second nanostructure; and a gate electrode over the first high-k gate dielectric and the second high-k gate dielectric. A portion of the gate electrode between the first nanostructure and the second nanostructure comprises a first portion of a p-type work function metal filling an area between the first high-k gate dielectric and the second high-k gate dielectric. |
| US11302788B2 |
Semiconductor device and method of manufacturing the same
A semiconductor device, comprising: a semiconductor substrate; a source, a gate and a drain fabricated on one side of the semiconductor substrate; a via hole region reserved in the region of the source; and an etching stopping layer made in the via hole region as well as a via hole under the etching stopping layer penetrating through the semiconductor substrate. |
| US11302787B2 |
Integrated circuit layouts with source and drain contacts of different widths
A semiconductor device includes an active region in a substrate. The active region extends in a first direction. The semiconductor device further includes a gate structure extending in a second direction different from the first direction. The gate structure extends across the active region. The semiconductor device further includes a plurality of source/drain contacts extending in the second direction and overlapping a plurality of source/drain regions in the active region on opposite sides of the gate structure. A first source/drain contact of the plurality of source/drain contacts has a first width, and a second source/drain contact of the plurality of source/drain contacts has a second width less than the first width. |
| US11302786B2 |
Miniature field plate T-gate and method of fabricating the same
A method of fabricating a gate with a mini field plate includes forming a dielectric passivation layer over an epitaxy layer on a substrate, coating the dielectric passivation layer with a first resist layer, etching the first resist layer and the dielectric passivation layer to form a first opening in the dielectric passivation layer, removing the first resist layer, and forming a tri-layer gate having a gate foot in the first opening, a gate neck extending from the gate foot, and a gate head extending from the gate neck. The gate foot has a first width, and the gate neck has a second width that is wider than the first width. The gate neck extends for a length over the dielectric passivation layer on both sides of the first opening. The gate head has a third width wider than the second width of the gate neck. |
| US11302784B2 |
Semiconductor device having contact feature and method of fabricating the same
A method including providing a device including a gate structure and a source/drain feature adjacent to the gate structure. An insulating layer (e.g., CESL, ILD) is formed over the source/drain feature. A trench is etched in the insulating layer to expose a surface of the source/drain feature. A semiconductor material is then formed in the etched trench on the surface of the source/drain feature. The semiconductor material is converted to a silicide. |
| US11302776B1 |
Method and manufacture of robust, high-performance devices
An embodiment relates to a method and manufacture of robust, high-performance devices. The method comprises preparing a unit cell of a Silicon Carbide (SiC) substrate comprising a first conductivity type substrate and a first conductivity type drift layer; forming a second conductivity type well region; forming a first conductivity type source region within the second conductivity type well region; and forming a second conductivity type shield region surrounding the first conductivity type source region. The second conductivity type shield region formed comprises a portion of the second conductivity type shield region located on a SiC surface. |
| US11302775B2 |
Power device integration on a common substrate
A semiconductor structure for facilitating an integration of power devices on a common substrate includes a first insulating layer formed on the substrate and an active region having a first conductivity type formed on at least a portion of the first insulating layer. A first terminal is formed on an upper surface of the structure and electrically connects with at least one other region having the first conductivity type formed in the active region. A buried well having a second conductivity type is formed in the active region and is coupled with a second terminal formed on the upper surface of the structure. The buried well and the active region form a clamping diode which positions a breakdown avalanche region between the buried well and the first terminal. A breakdown voltage of at least one of the power devices is a function of characteristics of the buried well. |
| US11302774B2 |
Semiconductor device and method fabricating the same
A semiconductor device is provided. The semiconductor device includes a substrate, a conductive pattern, a first conductive layer, and a dielectric layer. The conductive pattern extends upwardly from the substrate. The conductive pattern has a hollow structure. The first conductive layer covers the conductive pattern. The dielectric layer at least covers the first conductive layer. |
| US11302773B2 |
Back-end-of-line integrated metal-insulator-metal capacitor
A low cost capacitor (e.g., metal-insulator-metal (MIM) capacitor) is included in the back-end-of-line layers for effective routing and area savings. The capacitor has a first electrode (e.g., a first terminal of the capacitor) including a conductive back-end-of-line (BEOL) layer and a second electrode (e.g., a second terminal of the capacitor) including a nitride-based metal. The capacitor also has an etch stop layer (e.g., a dielectric of the capacitor) between the first electrode and the second electrode. |
| US11302769B2 |
Display device
A display device includes an active area including pixels arranged in a matrix shape, a non-active area disposed at one side of the active area in a first direction and including a pad unit, non-active fanout wirings disposed in the non-active area and connected to the pad unit, signal wirings extending in the first direction to traverse the active area and connected to the pixels, and connection wirings, each at least partially passing through the active area and connecting some of the non-active fanout wirings and some of the signal wirings. Each of the connection wirings include first and third extension portion extending in the first direction, and a second extension portion extending in a second direction, and at least two of the pixels are disposed between corresponding extension portions of two adjacent connection wirings along a direction in which the corresponding extension portions are spaced apart from each other. |
| US11302768B2 |
Display panel
A display panel including a substrate having a first area, a display area, and an intermediate area between the first area and the display area; a plurality of data lines extending in a first direction in the display area; and a data distributor including switches electrically connected to the plurality of data lines. The plurality of data lines include a first data line and a second data line, and each of the first data line and the second data line bypasses an edge of the first area in the intermediate area, and a bypass portion of the first data line and a bypass portion of the second data line overlap each other in the intermediate area. |
| US11302767B2 |
Display panel with shielded signal lines routed around an opening area in the display panel
A display panel includes: a substrate including an opening area, a non-display area at least partially surrounding the opening area, and a display area; a plurality of first lines, each of which includes a first bypass portion along the opening area; a plurality of second lines, each of which includes a second bypass portion along the opening area; and a shield layer overlapping at least one first bypass portion. Each of the first lines includes a first or second conductive line in the non-display area. Each of the first and second conductive lines includes the first bypass portion. The first and second conductive lines are alternately arranged and are disposed on different layers. Each of the second lines includes a third conductive line in the non-display area. Each of the third conductive lines includes the second bypass portion, and at least partially overlaps the first or second conductive line. |
| US11302766B2 |
Semiconductor unit, method of manufacturing the same, and electronic apparatus
There are provided a semiconductor unit that prevents connection failure caused by a wiring substrate to improve reliability, a method of manufacturing the semiconductor unit, and an electronic apparatus including the semiconductor unit. The semiconductor unit includes: a device substrate including a functional device and an electrode; a first wiring substrate electrically connected to the functional device through the electrode; and a second wiring substrate electrically connected to the functional device through the first wiring substrate. |
| US11302765B2 |
Display device
A display device includes a display panel including a display area including a plurality of pixels, and a pad area disposed around the display area; and a printed circuit board on which a plurality of lead wirings attached to the pad area of the display panel are disposed, wherein the display panel includes a plurality of signal wirings disposed on the pad area of the display panel and connected to the pixels, and an inorganic pattern disposed between each of the signal wirings and each of the lead wirings. |
| US11302761B2 |
Display substrate assembly and method of manufacturing the same, and display apparatus
In an embodiment, there is provided a display substrate assembly. The display substrate assembly includes: a base substrate; a light-shielding layer on the base substrate, the light-shielding layer having a plurality of light-shielding elements; and a plurality of polysilicon layers respectively on sides of the plurality of light-shielding elements away from the base substrate; wherein the plurality of light-shielding elements have different sizes such that energy lights reflected and/or refracted through the plurality of light-shielding elements of different sizes respectively generate different thermal energy distributions on the plurality of polysilicon layers corresponding to the plurality of light-shielding elements, causing the plurality of polysilicon layers to have different crystal forms. Meanwhile, a method of manufacturing the display substrate assembly and a display apparatus including the aforementioned display substrate assembly are also provided. |
| US11302760B2 |
Array substrate and fabrication method thereof, and display device
The embodiment of the present disclosure discloses an array substrate, a fabrication method thereof, and a display device. The array substrate includes: a base substrate and a plurality of pixel units on the base substrate, wherein the pixel unit includes a plurality of sub-pixels; and the sub-pixel includes an electroluminescent component, a pixel circuit and a photo detection circuit; the pixel circuit includes a drive transistor for driving the electroluminescent component to emit light, and the drive transistor is a low temperature poly-si thin film transistor; and the photo detection circuit includes a detection switch transistor and a PIN-type photodiode, and the detection switch transistor is a metal oxide transistor. |
| US11302755B2 |
Array substrate, manufacturing method thereof, and display apparatus
A method for manufacturing an array substrate includes: forming a pixel defining layer having a plurality of accommodating wells over a substrate, and forming a hydrophobic material layer over the pixel defining layer. A side wall of each accommodating well comprises a hydrophilic side surface. The hydrophilic side surface is partially covered by the hydrophobic material layer to thereby form an overlapped region having a hydrophobic outer surface and an exposed region having a hydrophilic outer surface. The overlapped region is on a side of the exposed region distal to the substrate. The array substrate manufactured thereby allows an organic functional layer to be evenly fabricated in each accommodating well of the pixel defining layer via inkjet printing. |
| US11302751B2 |
Pixel unit, pixel structure, and manufacturing method thereof
A pixel unit, a pixel structure and manufacturing method thereof, wherein the pixel unit includes a first sub-pixel, a second sub-pixel, and a third sub-pixel arranged to form a polygon. The third sub-pixel is disposed in a rectangular boundary of the polygon, the first sub-pixel and the second sub-pixel are respectively disposed at two sides of the rectangular boundary. A pixel area of the third sub-pixel is larger than a pixel area of the first sub-pixel and the second sub-pixel. The first sub-pixel is red, the second sub-pixel is green, and the third sub-pixel is blue. |
| US11302746B2 |
Light emitting diode (LED) stack for a display
A light emitting diode (LED) stack for a display including a first LED sub-unit configured to emit a first colored light, a second LED sub-unit disposed on the first LED sub-unit and configured to emit a second colored light, and a third LED sub-unit disposed on at least one of the first LED sub-unit and the second LED sub-unit and configured to emit a third colored light, in which the first LED sub-unit is configured to emit light through the second LED sub-unit and the third LED sub-unit, and the second LED sub-unit is configured to emit light through the third LED sub-unit. |
| US11302745B2 |
LED module and method of fabricating the same
An LED module includes light emission windows; LED cells corresponding to the light emission windows, the LED cells each including a lower and upper light emitting structure, the lower light emitting structure having an upper surface with first and second regions and having a first conductivity-type semiconductor layer, the upper light emitting structure being on the first region of the lower light emitting structure and having a second conductivity-type semiconductor layer, the LED cells including an active layer between the first and second conductivity-type semiconductor layers; a protective insulating film on a side surface of the lower light emitting structure and on the second region; a light blocking film on the protective insulating film, between the LED cells; a gap-fill insulating film on the protective insulating film between the LED cells and contacting a side surface of the upper light emitting structure; a first electrode; and a second electrode. |
| US11302741B2 |
Image sensor structure and method of forming the same
An image sensor structure has a visible light detection region and an infrared light detection region neighboring the visible light detection region. The image sensor structure includes a semiconductor substrate, photo sensing members, an infrared absorption enhancing member, a color filter and an infrared pass filter. The semiconductor substrate has a front side and a back side opposite to each other. The first photo sensing member is disposed in the front side of the semiconductor substrate. The infrared absorption enhancing member is in the back side of the semiconductor substrate and only in the infrared light detection region. The color filter is over the back side of the semiconductor substrate and in the visible light detection region. The infrared pass filter is over the infrared absorption enhancing member. |
| US11302739B1 |
High quantum efficiency superlattice infrared detector
An infrared detector. The detector includes: a superlattice structure including: at least three first layers; and at least three second layers, alternating with the first layers. Each of the first layers includes, as a major component, InAsxP1-x, wherein x is between 0.0% and 99.0%, and each of the second layers includes, as a major component, InAsySb1-y, wherein y is between 0% and 60%. |
| US11302735B2 |
Image sensor including transparent electrodes
An image sensor includes a substrate configured to include a plurality of pixels, each pixel including a photodiode formed in the substrate, a plurality of deep trench isolation (DTI) structures formed in the substrate to optically isolate each of the plurality of pixels from neighboring pixels, and a transparent electrode layer arranged over the photodiode and electrically connected to the plurality of DTI structures. |
| US11302732B2 |
Array with light emitting diodes and varying lens
The invention describes a light emitting diode array module comprising at least two light emitting diodes and a lens, wherein the lens comprises one common lens segment, wherein the common lens segment comprises a multitude of sections at least partly encompassing an axis perpendicular to the lens, wherein the sections shape an uneven surface of the lens, wherein the light emitting diodes are arranged to illuminate at least two non-overlapping target areas in a reference plane, and wherein the sections are arranged such that at least one light emitting diode illuminates one respective target area of the target areas. The invention further describes a flash light comprising at least one light emitting diode array module. |
| US11302731B2 |
Electromagnetic wave detection apparatus and information acquisition system
An electromagnetic wave detection apparatus 10 includes a first image forming unit 15, a prism 17 having a fourth surface s3 for emitting electromagnetic waves incident from the first image forming unit 15, a progression unit 16 that includes a plurality of pixels arranged along a reference surface and is configured to cause electromagnetic waves incident on the reference surface from a fourth surface s4 to progress in a particular direction using each of the pixels, and a first detector 19 configured to detect electromagnetic waves progressing in the particular direction. The prism 17 includes a reflection suppressor 90 that is provided at a position out of a progression path of electromagnetic waves incident from the first image forming unit 15 to be detected by the first detector 19. |
| US11302726B2 |
Imaging device and electronic device
An imaging device capable of executing image processing is provided.A structure is employed in which a photoelectric conversion element, a first transistor, a second transistor, and an inverter circuit are included; one electrode of the photoelectric conversion element is electrically connected to one of a source and a drain of the first transistor; the other of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the second transistor; the one of the source and the drain of the second transistor is electrically connected to an input terminal of the inverter circuit; and data obtained by photoelectric conversion is binarized and output. |
| US11302722B2 |
Array substrate, manufacturing method thereof and display device
An array substrate, manufacturing method thereof, and a display device according to some arrangements of the present disclosure include: a first transistor and a second transistor; an active layer of the second transistor is disposed on a side of the interlayer dielectric layer of the first transistor away from the substrate; an insulating layer is disposed between the interlayer dielectric layer of the first transistor and the active layer of the second transistor, and the insulating layer has an ability to block hydrogen. |
| US11302719B2 |
Thin film transistor substrate and display panel
A thin film transistor substrate includes: a plurality of gate signal lines extending in a first direction; a plurality of gate lead-out lines and a plurality of dummy gate lead-out lines extending in a second direction; a plurality of common lines extending in at least one of the first direction and the second direction in the pixel region; and a common electrode provided opposite to a pixel electrode and electrically connected to the plurality of common lines. The plurality of gate lead-out lines are connected to the gate signal lines at least at one point of a plurality of intersections between the plurality of gate signal lines and the plurality of gate lead-out lines, and the common potential is applied to the plurality of dummy gate lead-out lines. |
| US11302716B2 |
Three-dimensional memory device including ferroelectric-metal-insulator memory cells and methods of making the same
A memory opening or a line trench is formed through an alternating stack of insulating layers and sacrificial material layers. A memory opening fill structure or a memory stack assembly is formed, which includes a vertical stack of discrete intermediate metallic electrodes formed on sidewalls of the sacrificial material layers, a gate dielectric layer, and a vertical semiconductor channel. Backside recesses are formed by removing the sacrificial material layers selective to the insulating layers, and a combination of a ferroelectric dielectric layer and an electrically conductive layer within each of the backside recesses. The electrically conductive layer is laterally spaced from a respective one of the discrete intermediate metallic electrodes by the ferroelectric dielectric layer. Ferroelectric-metal-insulator memory elements are formed around the vertical semiconductor channel. |
| US11302715B2 |
Three-dimensional memory devices and fabrication methods thereof
Embodiments of three-dimensional (3D) memory devices having a memory layer that confines electron transportation and methods for forming the same are disclosed. The 3D memory device can include a structure of a plurality of gate electrodes insulated by a sealing structure over a substrate. The sealing structure can include an airgap between adjacent gate electrodes along a direction perpendicular to a top surface of the substrate. The 3D memory device can also include a semiconductor channel extending from a top surface of the structure to the substrate. The semiconductor channel can include a memory layer that has two portions extending along different directions. The 3D memory device can further include a source structure extending from the top surface of the structure to the substrate and between adjacent gate electrodes along a direction parallel to the top surface the substrate. |
| US11302714B2 |
Three-dimensional memory device including a composite semiconductor channel and a horizontal source contact layer and method of making the same
A three-dimensional memory device includes a source contact layer overlying a substrate, an alternating stack of insulating layers and electrically conductive layers located overlying the source contact layer, and a memory opening fill structure located within a memory opening extending through the alternating stack and the source contact layer. The memory opening fill structure includes a composite semiconductor channel and a memory film laterally surrounding the composite semiconductor channel. The composite semiconductor channel includes a pedestal channel portion having controlled distribution of n-type dopants that diffuse from the source contact layer with a lower diffusion rate provided by carbon doping and smaller grain sizes, or has arsenic doping providing limited diffusion into the vertical semiconductor channel. The vertical semiconductor channel has large grain sizes to provide high charge carrier mobility, and is free of or includes only a low concentration of carbon atoms and n-type dopants therein. |
| US11302712B2 |
Integrated circuitry, memory arrays comprising strings of memory cells, methods used in forming integrated circuitry, and methods used in forming a memory array comprising strings of memory cells
A method used in forming integrated circuitry comprises forming a stack comprising vertically-alternating first tiers and second tiers. The stack comprises a cavity therein that comprises a stair-step structure. At least a portion of sidewalls of the cavity is lined with sacrificial material. Insulative material is formed in the cavity radially inward of the sacrificial material. At least some of the sacrificial material is removed from being between the cavity sidewalls and the insulative material to form a void space there-between. Insulator material is formed in at least some of the void space. Other embodiments, including structure independent of method, are disclosed. |
| US11302711B2 |
Three-dimensional memory devices having a backside trench isolation and methods for forming the same
Embodiments of 3D memory devices and methods for forming the same are disclosed. In an example, a 3D memory device includes a substrate having a first side and a second side opposite to the first side. The 3D memory device also includes a memory stack including interleaved conductive layers and dielectric layers at the first side of the substrate. The 3D memory device also includes a plurality of channel structures each extending vertically through the memory stack. The 3D memory device also includes a slit structure extending vertically through the memory stack and extending laterally to separate the plurality of channel structures into a plurality of blocks. The 3D memory device further includes a first doped region in the substrate and in contact with the slit structure. The 3D memory device further includes an insulating structure extending vertically from the second side of the substrate to the first doped region. The 3D memory device further includes a plurality of second doped regions in the substrate and separated by the insulating structure. |
| US11302708B2 |
Memory arrays, and methods of forming memory arrays
Some embodiments include a method of forming an assembly (e.g., a memory array). A first opening is formed through a stack of alternating first and second levels. The first levels contain silicon nitride, and the second levels contain silicon dioxide. Some of the silicon dioxide of the second levels is replaced with memory cell structures. The memory cell structures include charge-storage regions adjacent charge-blocking regions. Tunneling material is formed within the first opening, and channel material is formed adjacent the tunneling material. A second opening is formed through the stack. The second opening extends through remaining portions of the silicon dioxide, and through the silicon nitride. The remaining portions of the silicon dioxide are removed to form cavities. Conductive regions are formed within the cavities. The silicon nitride is removed to form voids between the conductive regions. Some embodiments include memory arrays. |
| US11302707B2 |
Integrated assemblies comprising conductive levels having two different metal-containing structures laterally adjacent one another, and methods of forming integrated assemblies
Some embodiments include a memory device having a vertical stack of alternating insulative levels and conductive levels. The conductive levels include first regions, and include second regions laterally adjacent to the first regions. The first regions have a first vertical thickness and at least two different metal-containing materials along the first vertical thickness. The second regions have a second vertical thickness at least as large as the first vertical thickness, and have only a single metal-containing material along the second vertical thickness. Dielectric-barrier material is laterally adjacent to the first regions. Charge-blocking material is laterally adjacent to the dielectric-barrier material. Charge-storage material is laterally adjacent to the charge-blocking material. Dielectric material is laterally adjacent to the charge storage material. Channel material is laterally adjacent to the dielectric material. |
| US11302703B2 |
Apparatuses having memory cells with two transistors and one capacitor, and having body regions of the transistors coupled with reference voltages
Some embodiments include a memory cell with two transistors and one capacitor. The transistors are a first transistor and a second transistor. The capacitor has a first node coupled with a source/drain region of the first transistor, and has a second node coupled with a source/drain region of the second transistor. The memory cell has a first body region adjacent the source/drain region of the first transistor, and has a second body region adjacent the source/drain region of the second transistor. A first body connection line couples the first body region of the memory cell to a first reference voltage. A second body connection line couples the second body region of the memory cell to a second reference voltage. The first and second reference voltages may be the same as one another, or may be different from one another. |
| US11302697B2 |
DRAM with selective epitaxial cell transistor
A dynamic random access memory element that includes a vertical semiconductor transistor element formed on a substrate and electrically connected with a memory element such as a capacitive memory element. The memory element is located above the semiconductor substrate such that the vertical transistor is between the memory element and the substrate. The vertical semiconductor transistor is formed on a heavily doped region of the substrate that is separated from other portions of the substrate by a dielectric isolation layer. The heavily doped region of the semiconductor substrate provides electrical connection between the vertical transistor structure and a bit line. The dynamic random access memory element also includes a word line that includes an electrically conductive gate layer that is separated from the semiconductor pillar by a gate dielectric layer. |
| US11302696B2 |
Semiconductor device and method of manufacturing semiconductor device
A semiconductor device includes: two first semiconductor regions of a first conductivity type spaced apart from each other; a second semiconductor region of a second conductivity type provided between the two first semiconductor regions; a first insulator region surrounding the two first semiconductor regions and the second semiconductor region; a third semiconductor region of the second conductivity type; a fourth semiconductor region of the second conductivity type, the fourth semiconductor region surrounding the third semiconductor region and the first insulator region and having an impurity concentration of the second conductivity type lower than an impurity concentration of the third semiconductor region; a second insulator region that surrounds the fourth semiconductor region; a conductor layer provided over the second semiconductor region; two first contact plugs; a second contact plug provided on the conductor layer; and a third contact plug provided on the third semiconductor region. |
| US11302693B2 |
Semiconductor device structure and methods of forming the same
A semiconductor device structure, along with methods of forming such, are described. The structure includes a first, second, and third gate electrode layers, a first dielectric feature disposed between the first and second gate electrode layers, a second dielectric feature disposed between the second and third gate electrode layers, a first seed layer in contact with the first gate electrode layer, the first dielectric feature, and the second gate electrode layer, a first conductive layer disposed on the first seed layer, a second seed layer in contact with the third gate electrode layer, a second conductive layer disposed on the second seed layer, and a dielectric material disposed on the second dielectric feature, the first conductive layer, and the second conductive layer. The dielectric material is between the first seed layer and the second seed layer and between the first conductive layer and the second conductive layer. |
| US11302686B2 |
High-voltage circuitry device and ring circuitry layout thereof
A high-voltage circuitry device is provided. The high-voltage circuitry device includes a high-voltage transistor, a protection component and a feedback component. The high-voltage transistor has a gate, a drain and a source. The protection component is coupled between the source of the high-voltage transistor and the ground. When a current corresponding to an electrostatic discharge (ESD) event flows through the drain of the high-voltage transistor, the current flows from the drain of the high-voltage transistor to the ground through the high-voltage transistor and the protection component. The feedback component is coupled between the protection component, the ground and the gate of the high-voltage transistor. When the ESD event occurs, the feedback component enables the high-voltage transistor to stay on a turned-on state to pass the current. |
| US11302685B2 |
Fully-printed stretchable thin-film transistors and integrated logic circuits
Printable and stretchable thin-film devices and fabrication techniques are provided for forming fully-printed, intrinsically stretchable thin-film transistors and integrated logic circuits using stretchable elastomer substrates such as polydimethylsiloxane (PDMS), semiconducting carbon nanotube network as channel, unsorted carbon nanotube network as source/drain/gate electrodes, and BaTiO3/PDMS composite as gate dielectric. Printable stretchable dielectric layer ink may be formed by mixing barium titanate nanoparticle (BaTiO3) with PDMS using 4-methyl-2-pentanone as solvent. |
| US11302683B2 |
Optical signal processing package structure
A package structure and method of forming the same are provided. The package structure includes a first die, a second die, a wall structure and an encapsulant. The second die is electrically bonded to the first die. The wall structure is laterally aside the second die and on the first die. The wall structure is in contact with the first die and a hole is defined within the wall structure for accommodating an optical element insertion. The encapsulant laterally encapsulates the second die and the wall structure. |
| US11302681B2 |
Display device and method of manufacturing thereof
A display device and a method of manufacturing thereof are provided. A display device includes an array substrate and a pixel electrode disposed on the array substrate. The pixel electrode includes a soldering region, a non-soldering region, a transparent conductive oxide layer formed on the array substrate, a first metal electrode layer disposed on the transparent conductive oxide layer of the soldering region and the non-soldering region, a second metal protective layer disposed on the first metal electrode layer of the non-soldering region, and a micro LED chip including a pin correspondingly soldered on the first metal electrode layer of the soldering region. The metal electrode layer easily reacted with the organic solvent or the organic film to cause residue or defects can be improved, and the first metal electrode layer is merely retained to provide a solder joint for soldering the micro LED chip without affecting subsequent processes. |
| US11302678B2 |
Light-emitting package structure
A light-emitting package structure includes a light transmissive adhesive layer, a substrate, and at least one light-emitting diode chip. The light transmissive adhesive layer includes a first surface and a second surface facing away from the first surface. The substrate is on the first surface of the light transmissive adhesive layer. The light-emitting diode chip is on the second surface of the light transmissive adhesive layer. The light transmissive adhesive layer has a first portion and a second portion on the second surface, the first portion surrounds the second portion, a vertical projection area of the second portion on the substrate at least entirely covers a vertical projection area of the light-emitting diode chip on the substrate, and a thickness of the second portion is smaller than or equal to a thickness of the first portion. |
| US11302676B2 |
Methods of making light-emitting assemblies comprising an array of light-emitting diodes having an optimized lens configuration
Light emitting assemblies comprise a plurality of Light Emitting Diode (LED) dies arranged and attached to common substrate to form an LED array having a desired optimum packing density. The LED dies are wired to one another and are attached to landing pads on the substrate for receiving power from an external electrical source via an interconnect device. The assembly comprises a lens structure, wherein each LED die comprises an optical lens disposed thereover that is configured to promote optimal light transmission. Each optical lens has a diameter that is between about 1.5 to 3 times the size of a respective LED die, and is shaped in the form of a hemisphere. Fillet segments are integral with and interposed between the adjacent optical lenses, and provide sufficient space between adjacent optical lenses so that the diameters of adjacent optical lenses do not intersect with one another. |
| US11302672B2 |
Interconnected stacked circuits
The disclosure concerns an electronic device and methods of making an electronic device. The electronic device includes a circuit that is at least partially formed in an active region of a substrate. An electronic package is stacked on the substrate. A via extends through the circuit from the active region of the substrate to a surface of the substrate that is opposite the active region. At least one contacting element connects the via to the electronic package. |
| US11302668B2 |
Multi-purpose non-linear semiconductor package assembly line
A method of producing packaged semiconductor devices includes providing a first packaging substrate panel, providing a second packaging substrate panel, and moving the first and second packaging substrate panels through an assembly line that comprises a plurality of package assembly tools using a control mechanism. First type packaged semiconductor devices are formed on the first packaging substrate panel and second type packaged semiconductor devices are formed on the second packaging substrate panel. The control mechanism moves both of the first and packaging substrate panels through the assembly line in a non-linear manner. The first and second packaged semiconductor devices differ with respect to at least one of: lead configuration, and encapsulant configuration. |
| US11302666B2 |
Mounting head
A mounting apparatus is equipped with: an attachment including a surface for attaching a semiconductor die; a heater which is disposed on a side of the attachment opposite to the surface and heats the semiconductor die attached to the surface; a suction hole which penetrates through the attachment and the heater integrally and opens in the surface; and a body portion which is disposed on a side of the heater opposite to the attachment and on which a vacuum suction path in communication with the suction hole is arranged. The vacuum suction path includes a storage portion which stores a foreign matter consisting of a liquid formed by condensation of a gas suctioned from the suction hole or a solid formed by solidification of the liquid. |
| US11302661B2 |
Package substrate including segment grooves arranged in a radial direction of a redistribution pad and semiconductor package including the same
A package substrate may include an insulation substrate, at least one redistribution layer (RDL) and a redistribution pad. The RDL may be included in the insulation substrate. The redistribution pad may extend from the RDL. The redistribution pad may include at least one segmenting groove in a radial direction of the redistribution pad. Thus, the at least one segmenting groove in the radial direction of the redistribution pad may reduce an area of the redistribution pad. Therefore, application of physical stress to a PID disposed over the redistribution pad may be suppressed, and thus generation of cracks in the PID may be reduced. Further, spreading of the cracks toward the redistribution pad from the PID may also be suppressed, and thus reliability the semiconductor package may be improved. |
| US11302659B2 |
Semiconductor device
A semiconductor device includes a semiconductor substrate, a transistor, and a first harmonic termination circuit. The transistor is formed at the semiconductor substrate. The transistor amplifies an input signal supplied to an input end and outputs an amplified signal through an output end. The first harmonic termination circuit attenuates a harmonic component included in the amplified signal. The first harmonic termination circuit is formed at the semiconductor substrate such that one end of the first harmonic termination circuit is connected to the output end of the transistor and the other end of the first harmonic termination circuit is connected to a ground end of the transistor. |
| US11302650B2 |
Package structure and method of fabricating the same
A package structure includes a redistribution structure, a first semiconductor die, a first passive component, a second semiconductor die, a first insulating encapsulant, a second insulating encapsulant, a second passive component and a global shielding structure. The redistribution structure includes dielectric layers and conductive layers alternately stacked. The first semiconductor die, the first passive component and the second semiconductor die are disposed on a first surface of the redistribution structure. The first insulating encapsulant is encapsulating the first semiconductor die and the first passive component. The second insulating encapsulant is encapsulating the second semiconductor die, wherein the second insulating encapsulant is separated from the first insulating encapsulant. The second passive component is disposed on a second surface of the redistribution structure. The global shielding structure is surrounding the first insulating encapsulant, the second insulating encapsulant, and covering sidewalls of the redistribution structure. |
| US11302649B2 |
Semiconductor device with shielding structure for cross-talk reduction
A method includes embedding a die in a molding material; forming a first dielectric layer over the molding material and the die; forming a conductive line over an upper surface of the first dielectric layer facing away from the die; and forming a second dielectric layer over the first dielectric layer and the conductive line. The method further includes forming a first trench opening extending through the first dielectric layer or the second dielectric layer, where a longitudinal axis of the first trench is parallel with a longitudinal axis of the conductive line, and where no electrically conductive feature is exposed at a bottom of the first trench opening; and filling the first trench opening with an electrically conductive material to form a first ground trench. |
| US11302648B2 |
EMI shield for molded packages
Electromagnetic interference (EMI) shielding structures for use inside an electronic system are provided, which allow access for mold compound or cables by using baffle-like features on the shield's sides and/or top, as well as methods for shielding components from EMI, or for containing EMI. The structures block external RF from sensitive components and reduce EMI emission from internal, RF generating components. |
| US11302647B2 |
Semiconductor device package including conductive layers as shielding and method of manufacturing the same
The present disclosure provides for a semiconductor device package and a method for manufacturing the same. The semiconductor device package includes a substrate, a conductive element and conductive layers. The substrate has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The conductive element is disposed on the first surface of the substrate. The conductive layers have a first portion on the conductive element and a second portion on the lateral surface of the substrate. A number of layers of the first portion of the conductive layers is different from a number of layers of the second portion of the conductive layers. |
| US11302643B2 |
Microelectronic component having molded regions with through-mold vias
Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic component may include a substrate having a first face and an opposing second face, wherein the substrate includes a through-substrate via (TSV); a first mold material region at the first face, wherein the first mold material region includes a first through-mold via (TMV) conductively coupled to the TSV; and a second mold material region at the second face, wherein the second mold material region includes a second TMV conductively coupled to the TSV. |
| US11302638B2 |
Hybrid conductor integration in power rail
Certain aspects of the present disclosure generally relate to integration of a hybrid conductor material in power rails of a semiconductor device. An example semiconductor device generally includes an active electrical device and a power rail. The power rail is electrically coupled to the active electrical device, disposed above the active electrical device, and embedded in at least one dielectric layer. The power rail includes a first conductive layer, a barrier layer, and a second conductive layer. In certain cases, copper may be used as conductive material for the second conductive layer. The barrier layer is disposed between the first conductive layer and the second conductive layer. |
| US11302636B2 |
Semiconductor device and manufacturing method of the same
A semiconductor device includes: a device layer including first and second active patterns, extending in a first direction on a substrate and adjacent to each other, and a plurality of gate electrodes extending in a second direction, intersecting the first direction, on the substrate and crossing the first and second active patterns; a lower wiring layer on the device layer, and including first and second lower wiring patterns extending in the first direction, located on the first and second active patterns, respectively, and connected to the plurality of gate electrodes; and an upper wiring layer on the lower wiring layer, and having first and second upper vias on the first and second lower wiring patterns, respectively, and first and second upper wiring patterns extending in the second direction. The first upper wiring pattern is connected to the first upper via without being connected to the second upper via and the second upper wiring pattern is connected to the second upper via without being connected to the first upper via. |
| US11302635B2 |
Electronic apparatus and manufacturing method thereof
The disclosure provides an electronic apparatus and a manufacturing method thereof. The electronic apparatus includes a first insulating layer, a first metal layer, a second metal layer, and an electronic assembly. The first insulating layer includes a first surface and a second surface opposite to the first surface. The first metal layer has an opening and is formed on the first surface. The second metal layer is formed on the second surface and a projection of the opening on the second surface is overlapped with a projection of the second metal layer on the second surface. The electronic assembly is electrically connected with the first metal layer and the second metal layer. |
| US11302633B2 |
Semiconductor device including a fuse latch for latching data of a repair fuse cell
A fuse latch of a semiconductor device is disclosed. The fuse latch of the semiconductor device includes a plurality of PMOS transistors and a plurality of NMOS transistors. The fuse latch includes PMOS transistors and NMOS transistors configured to latch fuse cell data. In the fuse latch, the plurality of PMOS transistors and the plurality of NMOS transistors are arranged in a shape of two lines in each active region in a second direction. |
| US11302632B2 |
Semiconductor device and oscillator
A semiconductor device includes a first high resistance pattern and a second high resistance pattern that are disposed along an X axis and are separated from each other, a coupling pattern that couples the first high resistance pattern and the second high resistance pattern, and a signal wiring disposed at a layer above the first high resistance pattern, the second high resistance pattern, and the coupling pattern. The coupling pattern includes a first portion that overlaps an end portion of the first high resistance pattern in a plan view at the layer above the first high resistance pattern, the coupling pattern includes a second portion that overlaps an end portion of the second high resistance pattern in a plan view at a layer above the second high resistance pattern, and the signal wiring is disposed along a Y axis that intersects the X axis in a plan view between an end of the coupling pattern at the first portion side and an end of the coupling pattern at the second portion side. |
| US11302629B2 |
Semiconductor device with composite passivation structure and method for preparing the same
A semiconductor device includes a conductive pattern formed over a semiconductor substrate, and an interconnect structure formed over the conductive pattern. The semiconductor device also includes a first passivation layer over the conductive pattern; a second passivation layer over the first passivation layer; an interconnect structure disposed over the conductive pattern and in the first passivation layer and the second passivation layer; and an interconnect liner disposed between the interconnect structure and the conductive pattern and surrounding the interconnect structure, wherein inner sidewall surfaces of the interconnect liner are in direct contact with the interconnect structure, and a maximum distance between outer sidewall surfaces of the interconnect liner is greater than a width of the conductive pattern. |
| US11302628B2 |
Integrated assemblies having conductive-shield-structures between linear-conductive-structures
Some embodiments include an assembly having channel-material-structures, and having memory cells along the channel-material-structures. The memory cells include charge-storage-material. Linear-conductive-structures are vertically offset from the channel-material-structures and are electrically coupled with the channel-material-structures. Intervening regions are between the linear-conductive-structures. Conductive-shield-structures are within the intervening regions. The conductive-shield-structures are electrically coupled with a reference-voltage-source. |
| US11302626B2 |
Semiconductor memory device having capacitor spaced apart from a gate stack structure
A semiconductor memory device, and a method of manufacturing the same, includes: a gate stack structure including interlayer insulating layers and conductive patterns stacked in a first direction; a channel structure penetrating the gate stack structure; a peripheral contact plug spaced apart from the gate stack structure on a plane intersecting the channel structure, the peripheral contact plug extending in the first direction; and a capacitor spaced apart from the gate stack structure and the peripheral contact plug on the plane, the capacitor having an area wider than an area of the peripheral contact plug. |
| US11302623B2 |
Electronic device
An electronic device includes a first metal plate including a first wiring and a second wiring, an electronic component mounted on a lower surface of the first wiring so as to overlap the second wiring in plan view, a second metal plate including an electrode electrically connected to the lower surface of the first wiring, and an insulation layer filling a space between the first metal plate, the second metal plate, and the electronic component and covering the electronic component. The upper surface of the second wiring is exposed from the insulation layer. |
| US11302620B2 |
Circuit board and method for manufacturing the same
A circuit board includes a board, first connection pads disposed on the board and arranged in a first direction, second connection pads disposed on the board and arranged in the first direction, a driving chip disposed on the board and between the first connection pads and the second connection pads, and a first adhesive layer disposed on the board and overlapping with an entirety of the first connection pads in a plan view. The second connection pads are spaced apart from the first connection pads in a second direction perpendicular to the first direction. |
| US11302618B2 |
Microelectronic assemblies having substrate-integrated perovskite layers
Disclosed herein are microelectronic assemblies with integrated perovskite layers, and related devices and methods. For example, in some embodiments, a microelectronic assembly may include an organic package substrate portion having a surface with a conductive layer, and a perovskite conductive layer on the conductive layer. In some embodiments, a microelectronic assembly may include an organic package substrate portion having a surface with a conductive layer, a perovskite conductive layer having a first crystalline structure on the conductive layer, and a perovskite dielectric layer having a second crystalline structure on the perovskite conductive layer. In some embodiments, the first and second crystalline structures have a same orientation. |
| US11302615B2 |
Semiconductor package with isolated heat spreader
A semiconductor package includes a metallic pad and leads, a semiconductor die attached to the metallic pad, the semiconductor die including an active side with bond pads opposite the metallic pad, a wire bond extending from a respective bond pad of the semiconductor die to a respective lead of the leads, a heat spreader over the active side of the semiconductor die with a gap separating the active side of the semiconductor die from the heat spreader, an electrically insulating material within the gap and in contact with the active side of the semiconductor die and the heat spreader; and mold compound covering the semiconductor die and the wire bond, and partially covering the metallic pad and the heat spreader, with the metallic pad exposed on a first outer surface of the semiconductor package and with the heat spreader exposed on a second outer surface of the semiconductor package. |
| US11302605B2 |
Semiconductor structure comprising via element and manufacturing method for the same
A semiconductor structure and a manufacturing method for the same. The semiconductor structure includes a plug element and a via element. The plug element includes a tungsten plug. The plug element has a plug size in a lateral direction. The via element is electrically connected on the plug element. The via element is non-symmetrical with respect a center line of the plug element extending along a longitudinal direction. The via element has a via size in the lateral direction. The plug size is bigger than the via size. |
| US11302599B2 |
Heat dissipation device having a thermally conductive structure and a thermal isolation structure in the thermally conductive structure
A heat dissipation device may be formed as a thermally conductive structure having at least one thermal isolation structure extending at least partially through the thermally conductive structure. The heat dissipation device may be thermally connected to a plurality of integrated circuit devices, such that the at least one thermal isolation structure is positioned between at least two integrated circuit devices. The heat dissipation device allows for heat transfer away from each of the plurality of integrated circuit devices, such as in a z-direction within the thermally conductive structure, while substantially preventing heat transfer in either the x-direction and/or the y-direction within the thermally isolation structure, such that thermal cross-talk between integrated circuit devices is reduced. |
| US11302593B2 |
Electronic component package and method for manufacturing the same
An electronic component package (100) includes a resin layer (40), an electronic component (10), a grounding member (30), and a conductor film (50). The grounding member (30) includes a multilayer body (31) and an outer conductor (32) disposed at an end portion of the multilayer body (31) in a lamination direction. The multilayer body (31) includes at least one resin film (31a) and at least one pattern conductor (31b) laminated one on another, and at least one via conductor (31c) extending in the lamination direction and connected to the outer conductor (32). In the multilayer body (31), at least one of the pattern conductor (31b) has at least part of a circumference connected to a conductor film (50) and electrically connected to the via conductor (31c). Part of an external terminal and part of the outer conductor (32) are exposed from an identical surface of the resin layer (40). |
| US11302592B2 |
Semiconductor package having a stiffener ring
A semiconductor package includes a package substrate having a top surface and a bottom surface, and a stiffener ring mounted on the top surface of the package substrate. The stiffener ring includes a reinforcement rib that is coplanar with the stiffener ring on the top surface of the package substrate. At least two compartments are defined by the stiffener ring and the reinforcement rib. At least two individual chip packages are mounted on chip mounting regions within the at least two compartments, respectively, thereby constituting a package array on the package substrate. |
| US11302590B2 |
Delivery of light into a vacuum chamber using an optical fiber
A system for laser enhanced voltage contrast using an optical fiber is provided. The system includes a vacuum chamber with a stage that secures a wafer. A laser light source outside the vacuum chamber directs light to an optical fiber. The optical fiber transmits all wavelengths of light from the laser light source into the vacuum chamber through a wall of the vacuum chamber. |
| US11302589B2 |
Electron beam probing techniques and related structures
Methods, systems, and devices for electron beam probing techniques and related structures are described to enable inline testing of memory device structures. Conductive loops may be formed, some of which may be grounded and others of which may be electrically floating in accordance with a predetermined pattern. The loops may be scanned with an electron beam and image analysis techniques may be used to generate an optical pattern. The generated optical pattern may be compared to an expected optical pattern, which may be based on the predetermined pattern of grounded and floating loops. An electrical defect may be determined based on any difference between the generated optical pattern and the expected optical pattern. For example, if a second loop appears as having a brightness corresponding to a grounded loop, this may indicate that an unintended short exists. Fabrication techniques may be adjusted for subsequent devices to correct identified defects. |
| US11302586B2 |
Compact and efficient CMOS inverter
A structure for providing an inverter circuit employing two vertical transistor structures formed on a semiconductor substrate. The vertical semiconductor structures each include a semiconductor pillar structure and a surrounding gate dielectric. A gate structure is formed to at least partially surround the first and second vertical transistor structures. The semiconductor substrate is formed into first and section regions that are separated by a dielectric isolation structure. The first region includes a P+ doped portion and an N+ doped portion, and the second region includes an N+ doped portion and a P+ doped portion. The N+ and P+ doped portions of the first and second regions can be arranged such that the N+ doped portion of the first region is adjacent to the P+ doped portion of the second region, and the P+ doped portion of the first region is adjacent to the N+ doped portion of the second region. |
| US11302584B2 |
Semiconductor structures and static random access momories
A semiconductor structure includes: a base substrate; two first fin structures formed on the base substrate; an isolation structure formed on the base substrate, wherein a top surface of the isolation structure is lower than top surfaces of the two first fin structures, the isolation structure covers a portion of sidewall surfaces of the two first fin structures, the isolation structure includes a first region, located between the two first fin structures, and two second regions, and the top surface of the isolation structure formed in the first region adjacent to the two first fin structures is higher than the top surface of the isolation structure formed in the two second regions; and a plurality of source/drain openings formed in the first fin structures and having a bottom surface lower than the top surface of the isolation structure formed in the two second regions. |
| US11302583B2 |
Solid-phase source doping method for FinFET structure
The a solid-state source doping method for a FinFET device includes: patterning a substrate to have the first structure and the second structure for PMOS and NMOS respectively; depositing a BSG layer and removing part of it on the first structure; depositing a PSG layer on the BSG layer over the second structure, the first structure and the substrate; removing the PSG layer on the second structure; forming a dielectric layer on the PSG and BSG layers; removing the PSG and BSG layers above the dielectric layer; removing the dielectric layer to expose the PSG and BSG layer; depositing a cap layer; annealing to diffuse laterally the phosphorus in the PSG layer and the boron in the BSG layer on the sidewalls into the fin structures; removing the cap layer, depositing an oxide layer and removing the hard mask layer and the buffer layer to expose the fin structure. |
| US11302579B2 |
Composite wafer, semiconductor device and electronic component
In an embodiment, a composite semiconductor substrate includes a first polymer layer and a plurality of semiconductor dies having a first surface, a second surface opposing the first surface, side faces extending between the first surface and the second surface and a first metallization structure on the first surface. Edge regions of the first surface and at least portions of the side faces are embedded in the first polymer layer. At least one metallic region of the first metallization structure is exposed from the first polymer layer. A second metallization structure is arranged on the second surface of the plurality of semiconductor dies. A second polymer layer is arranged on edge regions of the second surface of the plurality of semiconductor dies and on the first polymer layer in regions between the side faces of neighbouring ones of the plurality of semiconductor dies. |
| US11302578B2 |
Wafer processing method
A wafer processing method includes a polyolefin sheet providing step of positioning a wafer in an inside opening of a ring frame and providing a polyolefin sheet on a back side or a front side of the wafer and on a back side of the ring frame, a uniting step of heating the polyolefin sheet as applying a pressure to the polyolefin sheet to thereby unite the wafer and the ring frame through the polyolefin sheet by thermocompression bonding, a dividing step of applying a laser beam to the wafer to form modified layers in the wafer, thereby dividing the wafer into individual device chips, and a pickup step of heating the polyolefin sheet in each of the plurality of separate regions corresponding to each device chip, pushing up each device chip through the polyolefin sheet, then picking up each device chip from the polyolefin sheet. |
| US11302577B2 |
Self aligned contact scheme
A method includes using a second hard mask layer over a gate stack to protect the gate electrode during etching a self-aligned contact. The second hard mask is formed over a first hard mask layer, where the first hard mask layer has a lower etch selectivity than the second hard mask layer. |
| US11302572B2 |
Semiconductor package and method of manufacturing the same
A method of manufacturing a semiconductor package may include forming a first substrate including a redistribution layer, providing a second substrate including a semiconductor chip and an interconnection layer on the first substrate to connect the semiconductor chip to the redistribution layer, forming a first encapsulation layer covering the second substrate, and forming a via structure penetrating the first encapsulation layer. The forming the via structure may include forming a first via hole in the first encapsulation layer, forming a photosensitive material layer in the first via hole, exposing and developing the photosensitive material layer in the first via hole to form a second encapsulation layer having a second via hole, and filling the second via hole with a conductive material. A surface roughness of a sidewall of the first encapsulation layer may be greater than a surface roughness of a sidewall of the second encapsulation layer. |
| US11302569B2 |
Method for manufacturing semiconductor device and semiconductor device
A method for manufacturing a semiconductor device according to the present invention includes the steps of (a) preparing a lead frame including a power chip die pad to which two terminals are connected, a control element die pad to which one terminal is connected, and tie bar portions connecting between a plurality of terminals including the two terminals, (b) placing a power chip and a free wheel diode on the power chip die pad and placing ICs on the control element die pad, (c) encapsulating in a mold resin to allow the tie bar portions to be exposed outside and a plurality of terminals including the two terminals and the one terminal to protrude outward, and (d) removing the tie bar portions other than the tie bar portions connecting the two terminals. |
| US11302567B2 |
Shallow trench isolation forming method and structures resulting therefrom
A method includes forming a first plurality of fins in a first region of a substrate, a first recess being interposed between adjacent fins in the first region of the substrate, the first recess having a first depth and a first width, forming a second plurality of fins in a second region of the substrate, a second recess being interposed between adjacent fins in the second region of the substrate, the second recess having a second depth and a second width, the second width of the second recess being less than the first width of the first recess, the second depth of the second recess being less than the first depth of the first recess, forming a first dielectric layer in the first recess and the second recess, and converting the first dielectric layer in the first recess and the second recess to a treated dielectric layer. |
| US11302550B2 |
Transfer method
In a transfer method used in a substrate processing apparatus including a vacuum transfer chamber and a first and a second processing chamber and a preliminary chamber connected to the vacuum transfer chamber, a first and a second processing chamber are heated such that a temperature of the first processing chamber becomes lower than a temperature of the second processing chamber. A processed substrate is transferred from the first processing chamber to the second processing chamber and an unprocessed substrate is transferred from the preliminary chamber to the first processing chamber using a substrate transfer device disposed in the vacuum transfer chamber. Further, the transfer of the processed substrate and the transfer of the unprocessed substrate are repeatedly executed for each of substrates, and the transfer of the unprocessed substrate is executed when no substrate is mounted in the first processing chamber. |
| US11302544B2 |
Method for measuring and correcting misregistration between layers in a semiconductor device, and misregistration targets useful therein
A method for measurement of misregistration in the manufacture of semiconductor device wafers, the method including measuring misregistration between layers of a semiconductor device wafer at a first instance and providing a first misregistration indication, measuring misregistration between layers of a semiconductor device wafer at a second instance and providing a second misregistration indication, providing a misregistration measurement difference output in response to a difference between the first misregistration indication and the second misregistration indication, providing a baseline difference output and ameliorating the difference between the misregistration measurement difference output and the baseline difference output. |
| US11302542B2 |
Processing apparatus
A processing apparatus includes: a plurality of process modules concatenated with one another; and a loader module configured to receive a carrier accommodating a plurality of substrates to be processed by the plurality of process modules, wherein each of the plurality of process modules includes: a heat treatment unit including a processing container configured to accommodate the plurality of substrates and perform a heat treatment on the plurality of substrates; and a gas supply unit disposed on one side surface of the heat treatment unit and configured to supply a gas into the processing container. |
| US11302540B2 |
Substrate support device and substrate cleaning device including the same
A support device for a substrate and a substrate cleaning apparatus, the support device including a support on which the substrate is loadable; a rotor that rotates the support; and an oscillator that oscillates the substrate in a direction perpendicular to a surface of the substrate, wherein the substrate oscillates according to a natural frequency of the substrate or a natural frequency of particles on the substrate. |
| US11302539B2 |
Semiconductor packaging structure and method for packaging semiconductor device
A method for packaging a semiconductor device includes the steps of: disposing a wafer on a first carrier plate; attaching a second carrier plate to a side of the first carrier plate opposite to the wafer; disposing a chip unit on a side of the wafer opposite to the first carrier plate; and covering the wafer and the chip unit with an encapsulation layer. A semiconductor packaging structure is also disclosed. |
| US11302538B2 |
Semiconductor device manufacturing method
A semiconductor device manufacturing method includes processes of: applying a protective film precursor solution over an end of each of a plurality of semiconductor element structures and a side surface and a bottom surface of a groove; roughly drying a solvent in the protective film precursor solution to form a protective film; and performing full-curing to evaporate a solvent in the protective film after a process of cutting between the plurality of semiconductor element structures or a process of peeling a plurality of semiconductor elements from a dicing tape. |
| US11302536B2 |
Deflectable platens and associated methods
A deflectable platen including a first layer formed of a material having a first coefficient of thermal expansion (CTE), and a second layer bonded to the first layer and having a second CTE, the second layer including a plurality of electrodes embedded therein for facilitating electrostatic clamping of wafers to the second layer, wherein the second CTE is different than the first CTE. |
| US11302535B2 |
Performing annealing process to improve fin quality of a FinFET semiconductor
A semiconductor device is provided. The semiconductor device has a fin structure that protrudes vertically upwards. A lateral dimension of the fin structure is reduced. A semiconductor layer is formed on the fin structure after the reducing of the lateral dimension. An annealing process is performed to the semiconductor device after the forming of the semiconductor layer. A dielectric layer is formed over the fin structure after the performing of the annealing process. |
| US11302534B2 |
Semiconductor structure with gate dielectric layer and fabrication method thereof
A semiconductor structure and a fabrication method are provided. The fabrication method includes forming a first dielectric layer on a base substrate, the first dielectric layer containing an opening exposing a surface portion of the base substrate; forming an initial gate dielectric layer on the surface portion of the base substrate and on a sidewall surface of the opening in the first dielectric layer; forming a gate dielectric layer by removing a portion of the initial gate dielectric layer from the sidewall surface of the opening, such that a top surface of the gate dielectric layer on the sidewall surface is lower than a top surface of the first dielectric layer; forming a gate electrode on the gate dielectric layer to fill the opening, a portion of the gate electrode being formed on a portion of the sidewall surface of the first dielectric layer; and forming a second dielectric layer on the gate electrode and on the first dielectric layer. |
| US11302532B2 |
Self-aligned double patterning with spacer-merge region
A method of forming a semiconductor structure includes forming a dielectric layer, forming a plurality of mandrel lines over the dielectric layer, and forming a plurality of non-mandrel lines over the dielectric layer between adjacent ones of the mandrel lines utilizing self-aligned double patterning. The method also includes forming at least one spacer-merge region extending from a first portion of a first one of the mandrel lines to a second portion of a second one of the mandrel lines in a first direction and covering at least a portion of one or more of the non-mandrel lines between the first mandrel and the second mandrel in a second direction orthogonal to the first direction. The method further includes forming a plurality of trenches in the dielectric layer by transferring a pattern of (i) the mandrel lines and (ii) portions of the non-mandrel lines outside the at least one spacer-merge region. |
| US11302531B2 |
Methods of exfoliating single crystal materials
Disclosed herein are methods for exfoliation of single crystals allowing for growth of high crystalline quality on the exfoliated surfaces for III-V photovoltaics. Also disclosed herein are methods for growing GaAs (111) on layered-2D Bi2Se3 (0001) substrates in an MOCVD reactor. |
| US11302529B2 |
Seed layer for ferroelectric memory device and manufacturing method thereof
A method includes: providing a bottom layer; depositing a first seed layer over the bottom layer, the first seed layer having at least one of a tetragonal crystal phase and an orthorhombic crystal phase; depositing a dielectric layer over the bottom layer adjacent to the first seed layer, the dielectric layer including an amorphous crystal phase; depositing an upper layer over the dielectric layer; performing a thermal operation on the dielectric layer; and cooling the dielectric layer, wherein after the cooling the dielectric layer becomes a ferroelectric layer. |
| US11302525B2 |
Substrate processing method and substrate processing apparatus
A substrate processing method includes a processing liquid film forming step of supplying a processing liquid, containing a sublimable substance, to a pattern forming surface of a substrate, to form a processing liquid film on the pattern forming surface, a temperature maintaining step of maintaining a temperature of the processing liquid film, formed on the pattern forming surface, in a temperature range not lower than a melting point of the sublimable substance and lower than a boiling point of the sublimable substance, a film thinning step of thinning the processing liquid film while the temperature of the processing liquid film is in the temperature range, a freezing step of making the processing liquid film, thinned by the film thinning step, freeze on the pattern forming surface after the temperature maintaining step to form a frozen body of the sublimable substance, and a sublimating step of sublimating the frozen body to remove the frozen body from the pattern forming surface. |
| US11302521B2 |
Processing system and processing method
A plasma processing system includes processing modules, a transfer device connected to the processing modules, and a control unit for controlling an oxygen partial pressure and a water vapor partial pressure in the transfer device. The control unit controls the oxygen partial pressure and the water vapor partial pressure in the transfer device to 127 Pa or less and 24.1 Pa or less, respectively. The processing modules include a first processing module for performing etching on the target object, a second processing module for performing surface treatment on the target object, and a third processing module for performing a deposition process on the target object. The second processing module performs the surface treatment using hydrogen radicals generated by a high frequency antenna. The high frequency antenna resonates at one half of a wavelength of a signal supplied from a high frequency power supply used in the processing system. |
| US11302519B2 |
Method of patterning a low-k dielectric film
Methods of patterning low-k dielectric films are described. In an example, a method of patterning a low-k dielectric film involves forming and patterning a mask layer above a low-k dielectric layer, the low-k dielectric layer disposed above a substrate. The method also involves modifying exposed portions of the low-k dielectric layer with a nitrogen-free plasma process. The method also involves removing, with a remote plasma process, the modified portions of the low-k dielectric layer selective to the mask layer and unmodified portions of the low-k dielectric layer. |
| US11302518B2 |
Efficient energy recovery in a nanosecond pulser circuit
Some embodiments include a nanosecond pulser circuit. In some embodiments, a nanosecond pulser circuit may include: a high voltage power supply; a nanosecond pulser electrically coupled with the high voltage power supply and switches voltage from the high voltage power supply at high frequencies; a transformer having a primary side and a secondary side, the nanosecond pulser electrically coupled with the primary side of the transformer; and an energy recovery circuit electrically coupled with the secondary side of the transformer. In some embodiments, the energy recovery circuit comprises: an inductor electrically coupled with the high voltage power supply; a crowbar diode arranged in parallel with the secondary side of the transformer; and a second diode disposed in series with the inductor and arranged to conduct current from a load to the high voltage power supply. |
| US11302515B2 |
Method for structuring a decorative of technical pattern in an object made of an at least partially transparent amorphous, semi-crystalline or crystalline material
A method for structuring a decorative or technical pattern in the thickness of an object made of an at least partially transparent amorphous, semi-crystalline or crystalline material, wherein the object is made of an at least partially transparent material including a top surface and a bottom surface which extends away from the top surface. The top or bottom surfaces is provided with a mask defining an opening whose outline corresponds to the profile of the pattern to be structured, the mask covering the top or bottom surface at the positions which are not to be structured. The pattern is structured with a mono- or multicharged ion beam through the opening of the mask, wherein the mechanical properties of the mask are sufficient to prevent the ions of the ion beam from etching the top or bottom surface at the positions where this top or bottom surface is covered by the mask. |
| US11302514B2 |
Apparatus for multiple charged-particle beams
Systems and methods for observing a sample in a multi-beam apparatus are disclosed. A charged particle optical system may include a deflector configured to form a virtual image of a charged particle source and a transfer lens configured to form a real image of the charged particle source on an image plane. The image plane may be formed at least near a beam separator that is configured to separate primary charged particles generated by the source and secondary charged particles generated by interaction of the primary charged particles with a sample. The image plane may be formed at a deflection plane of the beam separator. The multi-beam apparatus may include a charged-particle dispersion compensator to compensate dispersion of the beam separator. The image plane may be formed closer to the transfer lens than the beam separator, between the transfer lens and the charged-particle dispersion compensator. |
| US11302510B2 |
Space charge insensitive electron gun designs
Electron gun systems with a particular inner width dimension, sweep electrodes, or a combination of a particular inner width dimension and sweep electrodes are disclosed. The inner width dimension may be less than twice a value of a Larmor radius of secondary electrons in a channel downstream of a beam limiting aperture, and a Larmor time for the secondary electrons may be greater than 1 ns. The sweep electrode can generates an electric field in a drift region, which can increase kinetic energy of secondary electrons in the channel. |
| US11302509B2 |
Electron gun and electron beam device
An electron gun includes an emitter, an electron gun electrode, and a short-circuiting mechanism for setting the emitter and the electron gun electrode at the same potential. The short-circuiting mechanism includes a first switch member provided with a first switch electrode that is connected to the emitter and a second switch electrode that is connected to the electron gun electrode, a second switch member provided with a third switch electrode, and a drive unit that operates at least one of the first switch member and the second switch member to switch between a state in which the first switch electrode and the second switch electrode are in contact with the third switch electrode and a state in which the first switch electrode and the second switch electrode are separated from the third switch electrode. The short-circuiting mechanism has the same potential as a predetermined voltage. |
| US11302503B2 |
Clapper-type electromagnetic release for miniature circuit breaker
A clapper-type electromagnetic release for a miniature circuit breaker is characterized by including an armature, a magnet yoke, a coil, an iron core, a shaft, and an armature torsion spring. The iron core is mounted on the magnet yoke. The coil is sleeved on the iron core. The armature is mounted on the shaft and can rotate around the shaft. The armature torsion spring is mounted on the shaft. The armature torsion spring presses against the armature, so that the armature can be reset. In the clapper-type electromagnetic release for a miniature circuit breaker, by the rotation of the armature, the armature is not closed in absorption and the circuit breaker mechanism is not tripped within a specified current range; and when the specified current range is exceeded, the armature is closed in absorption and the armature claps a lock, so that the circuit breaker mechanism is tripped. |
| US11302499B1 |
Vacuum circuit breaker
Disclosed are example embodiments of a dead tank circuit breaker for protecting electrical components against electrical surges and other voltage anomalies such as transient overvoltages. The circuit breaker includes: one or more vacuum interrupters; a current bypass circuit electrically coupled to the one or more vacuum interrupters; a dead tank encasing and hermetically sealing the one or more vacuum interrupters and the current bypass circuit, wherein the dead tank is pressurized with a non-SF6 gas; and a controllable mechanism coupled to the one or more vacuum interrupters and to the current bypass circuit. The controllable mechanism is configured to actuate the one or more vacuum interrupters and the current bypass circuit to open or close a main circuit path such that any pre-strike arcing occurs on the current bypass circuit instead of the one or more vacuum interrupters. |
| US11302494B2 |
Intelligent lighting control system multi-way-detection apparatuses, systems, and methods
The present disclosure provides intelligent lighting control systems. |
| US11302489B2 |
Electrode assembly, energy storage device comprising the electrode assembly and a method for producing the electrode assembly
An electrode assembly includes a fan-folded multilayer containing a separator as an inner layer, current collectors as outer layers, and electrode material between the two sides of the separator and the current collectors, and a first terminal that is attached to the upward folds of the fan-folded multilayer and a second terminal that is attached to the downward folds of the fan-folded multilayer. An energy storage device includes the electrode assembly. |
| US11302487B2 |
Lithium-ion capacitor
A lithium-ion capacitor (LIC) is provided which includes positive electrodes, negative electrodes pre-loaded on surface with lithium sources including lithium strips and ultra-thin lithium films having holes, separators and organic solvent electrolyte with lithium salt for high performance including high energy density, high power density, long cycle life, long DC life and wide temperature ranges. A method for making an LIC is also provided, where cell components important to optimize the electrochemical performance of LIC's are configured, said components include PE active material and binders, NE active material and binders, thickness/mass ratio of positive electrode (PE) to negative electrode (NE) active layers, PE and NE's size designs and layer numbers, types of material for Separators and NE pre-lithiation methods, NE pre-lithiation includes loading various lithium (Li) sources including lithium strips and ultra-thin lithium films having holes onto the surface of NE. |
| US11302484B2 |
Electronic component assembly and method for manufacturing the same
An electronic component assembly includes an electronic component and a mounting board. The electronic component includes a stacked body, a pair of external electrodes provided on both end surfaces of the stacked body, and an insulating layer entirely covering a first main surface of the stacked body. The mounting board includes a board main body having a mounting surface, and land electrodes on the mounting surface. The first main surface of the electronic component faces the mounting surface of the mounting board, and the pair of external electrodes are mounted on the land electrodes with solder. Both end portions of the insulating layer in the length direction of the electronic component are located on the outer side relative to both end surfaces of the stacked body at least in a cross section taken at the center in the width direction. |
| US11302483B2 |
Electronic component
An electronic component includes a capacitor body having first to sixth surfaces, and including a plurality of dielectric layers and first and second internal electrodes; first and second external electrodes disposed on both ends of the capacitor body in a second direction in which the third and fourth surfaces oppose each other, respectively; a third external electrode disposed on the first surface of the capacitor body; and first to third metal frames connected to the first to third external electrodes, respectively, both ends of the first internal electrode are exposed through the third and fourth surfaces of the capacitor body, respectively, and the second internal electrode includes a lead portion exposed through the first surface of the capacitor body and connected to the third external electrode. |
| US11302477B2 |
Multilayer ceramic electronic component
A multilayer ceramic electronic component includes: a ceramic body including dielectric layers and a plurality of internal electrodes disposed to face each other with each of the dielectric layers interposed therebetween; and external electrodes disposed on external surfaces of the ceramic body and electrically connected to the internal electrodes, respectively, in which the external electrode each include an electrode layer electrically connected to the internal electrodes and a plating layer disposed on the electrode layer, and a thickness of the electrode layer in a cross section of the ceramic body in first and second directions is 10 μm or more. |
| US11302475B2 |
Dielectric ceramic composition and multilayer ceramic capacitor comprising the same
A dielectric ceramic composition and a multilayer ceramic capacitor comprising the same are provided. The dielectric ceramic composition includes a BaTiO3-based base material main ingredient and an accessory ingredient, where the accessory ingredient includes dysprosium (Dy) and cerium (Ce) as first accessory ingredients. A total content of Dy and Ce is greater than 0.25 mol % and equal to or less than 1.0 mol % based on 100 mol % of the base material main ingredient. |
| US11302472B2 |
Applied magnetic field synthesis and processing of iron nitride magnetic materials
Techniques are disclosed concerning applied magnetic field synthesis and processing of iron nitride magnetic materials. Some methods concern casting a material including iron in the presence of an applied magnetic field to form a workpiece including at least one ironbased phase domain including uniaxial magnetic anisotropy, wherein the applied magnetic field has a strength of at least about 0.01 Tesla (T). Also disclosed are workpieces made by such methods, apparatus for making such workpieces and bulk materials made by such methods. |
| US11302471B2 |
Integrated transformer
An integrated transformer includes a primary winding and a secondary winding each having a spiral planar arrangement coils. A dielectric portion of dielectric material is interposed between the primary winding and the secondary winding. A field plate winding is electrically coupled with the primary winding. The field plate winding includes at least one field plate coil having a first lateral extension greater than a second lateral extension of a primary outer coil of the primary winding. The field plate coil is superimposed in plan view to the primary outer coil of the primary winding. |
| US11302469B2 |
Method for fabricating inductors with deposition-induced magnetically-anisotropic cores
A method of fabricating an inductor includes (a) forming a ferromagnetic core on a semiconductor substrate, the ferromagnetic core lying in a core plane and (b) fabricating an inductor coil that winds around the ferromagnetic core, the inductor coil configured to generate an inductor magnetic field that passes through the ferromagnetic core in a first direction parallel to the core plane. While forming the ferromagnetic core, the method further includes (1) generating a bias magnetic field that passes through the ferromagnetic core in a second direction that is orthogonal to the first direction, and (2) inducing a magnetic anisotropy in the ferromagnetic core with the bias magnetic field. |
| US11302468B2 |
Electromagnet and method to produce the electromagnet
An electromagnet and method for producing an electromagnet. The electromagnet includes a sheet metal casing encompassing a magnetic coil at its end face on a magnetic pole side and extends into an interior of the magnetic coil and forms, in this case, a magnetic pole which interacts with a magnet keeper. The electromagnet enables actuation of a valve, a coupling or a reciprocating pump. The structure is achieved with as few cutting processes as possible to be used for generating the individual parts and as small a number as possible of individual parts is to be used per electromagnet. |
| US11302466B2 |
Multilayer coil electronic component
A multilayer coil electronic component having improved inductance L, Q, and strength, and which has an element in which a coil conductor and a magnetic element body are stacked. The magnetic element body includes soft magnetic metal particles and a resin. The resin fills a space between the soft magnetic metal particles. Each of soft magnetic metal particles has a soft magnetic metal particle core and an oxide film covering the soft magnetic metal particle core. A layer of the oxide film contacting the soft magnetic metal particle core is made of an oxide including Si. |
| US11302461B2 |
Method and device for producing wire harness
A wire harness producing method configured to produce a wire harness by arranging a plurality of display devices end to end, each including a display portion and a bezel arranged around a periphery of the display portion, displaying a wire laying-out drawing on the display devices, and laying out an electric wire along the wire laying-out drawing. The method includes compartmentalizing a two-dimensional image of the wire harness into display regions to be displayed on the display portions of the display devices respectively and non-display regions corresponding to the bezels of the display devices respectively, with the display regions and the non-display regions conforming to sizes of the display portions and the bezels respectively, trimming the two-dimensional image to create wire laying-out image data composed of only the display regions, and displaying the wire laying-out drawing on the display devices, based on the wire laying-out image data. |
| US11302460B2 |
Wiring harness assembly having multiple separated conductors embedded within a substrate
A wiring harness assembly includes a plurality of electrically conductive wires encased within a substrate formed of a dielectric material, a location feature integrally formed with the substrate, and an opening defined in the substrate located within a predetermined tolerance relative to the location feature. A section of the plurality of electrically conductive wires is exposed within the opening. |
| US11302459B2 |
Polyethylene extrudates and methods of making the same
A bimodal polyethylene is provided. The bimodal polyethylene may include a high molecular weight portion having a weight average molecular weight (Mw) of 100,000 g/mol to 1,000,000 g/mol and a low molecular weight portion having a Mw of 10,000 g/mol to 80,000 g/mol. Polymer extrudates, such as cable-coatings and/or wire-coatings and films, including the bimodal polyethylene as well as methods of making the polymer extrudates are also provided. |
| US11302458B2 |
Composite solid electrolytes for rechargeable energy storage devices
A device includes an ion-conducting membrane with ion-conducting ceramic particles, and an ion-conducting polymer that surrounds the ion-conducting membrane. The ion-conducting polymer includes a pressure-deformable film with a glass transition temperature lower than an operation temperature of the device. |
| US11302457B2 |
Aluminum alloy wire, aluminum alloy strand wire, covered electrical wire, and terminal-equipped electrical wire
An aluminum alloy contains at least 0.03 mass % and at most 1.5 mass % of Mg, at least 0.02 mass % and at most 2.0 mass % of Si, and a remainder composed of Al and an inevitable impurity, a mass ratio Mg/Si being not lower than 0.5 and not higher than 3.5. In a transverse section of the aluminum alloy wire, a rectangular surface-layer void measurement region having a short side of 30 μm long and a long side of 50 μm long is taken from a surface-layer region extending by up to 30 μm in a direction of depth from a surface of the aluminum alloy wire. A total cross-sectional area of voids present in the surface-layer void measurement region is not greater than 2 μm2. |
| US11302456B2 |
Radiation powered devices comprising diamond material and electrical power sources for radiation powered devices
Provided herein is a radiation powered device comprising a semiconductor comprising a diamond material. |
| US11302453B2 |
Shielding device and method
Some embodiments of a shielding device can include a base and a shield coupled to the base. The shielding device can be used to provide protection for a healthcare worker (e.g., physician, nurse, technician) during a medical procedure. |
| US11302452B2 |
Nuclear reactor cooling arrangement having a stirling engine
A reactor cooling and power generation system according to the present disclosure includes a reactor vessel, a heat exchange section formed to receive heat generated from a core inside the reactor vessel, from a feedwater system through a fluid, and an electric power production section. A Stirling engine is provided to produce electric energy using the energy of the fluid whose temperature has increased while receiving the heat of the reactor. The system is formed to circulate the fluid that has received heat from the core in the heat exchange section through the electric power production section. The system operates even during a normal operation and during an accident of the nuclear power plant.The reactor cooling and power generation system accompanies a nuclear reactor vessel which includes a reactor coolant system, a feedwater system and a steam generator. A turbine produces electric power from the feed water system. |
| US11302446B2 |
Prediction of future adverse health events using neural networks by pre-processing input sequences to include presence features
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for predicting future adverse health events using neural networks. One of the methods includes receiving electronic health record data for a patient; generating, from the electronic health record data, an input sequence comprising a respective feature representation at each of a plurality of time window time steps, comprising, for each time window time step: determining, for each of the possible numerical features, whether the numerical feature occurred during the time window; and generating, for each of the possible numerical features, one or more presence features that identify whether the numerical feature occurred during the time window; and processing the input sequence using a neural network to generate a neural network output that characterizes a predicted likelihood that an adverse health event will occur to the patient. |
| US11302442B2 |
Communication with home dialysis machines using a network connected system
This disclosure relates to remote control of dialysis machines. In certain aspects, a method includes receiving a request for a network connection from a dialysis machine and establishing the network connection with the dialysis machine. The method also includes receiving, from a client device, a request to access the dialysis machine, authorizing the client device to access the dialysis machine, receiving, from the dialysis machine, information pertaining to an operation of the dialysis machine, and providing, to the client device, the received information. |
| US11302438B2 |
Analyzing apparatus and analyzing method
An analyzing apparatus according to an embodiment includes processing circuitry. The processing circuitry acquires a plurality of time-series medical images. The processing circuitry calculates, for each of image pairs each formed of two medical images included in the medical images, a first index value indicating similarity between image signals in the two medical images. The processing circuitry also calculates, on the basis of a plurality of the first index values calculated for the respective image pairs, a second index value corresponding to a statistical value in a time direction of the first index values. |
| US11302437B2 |
Information processing device, information processing method and information processing system
An information processing device according to the present technology includes a determination unit that determines importance related to a cell-specific event of a cell, using image data obtained from a time-series imaging process targeting the cell The information processing device also includes a control unit that controls a process regarding a setting for a target of acquisition of image data in the time-series imaging, on the basis of a determination result of the importance. |
| US11302436B2 |
Method, computer and medical imaging apparatus for the provision of confidence information
In a method, computer and medical imaging apparatus for the provision of confidence information, an automatic diagnosis system is provided to the computer. Medical image data acquired from a patient are received by or accessed by the computer. A measure of confidence is determined by the computer, which describes the reliability of a correct diagnosis of the medical image data by the diagnosis system. The confidence information concerning the reliability of the correct diagnosis of the medical image data by the diagnosis system is provided as an output from the computer, wherein the confidence information is based on the determined measure of confidence. |
| US11302434B2 |
Nutrition-based management of health conditions using machine learning
A computer system provides nutrition-based management of health conditions using machine learning. Health information of a user is evaluated to determine a health condition. Medication information for the user is analyzed and the medication information is mapped to the health condition. One or more natural treatments for the user are determined from information sources based on the mapped health condition and medication information, wherein the one or more natural treatments include one or more from a group of nutrition and mind/body treatments, and wherein the information sources include information from crowdsourcing. The one or more natural treatments and medication information for the health condition are indicated. Embodiments of the present invention further include a method and program product for providing nutrition-based management of health conditions using machine learning in substantially the same manner described above. |
| US11302433B2 |
Diabetes therapy coaching
An apparatus comprising a pump, an input configured to receive information related to a user, a user interface, and a controller communicatively coupled to the pump, the input, and the user interface. The controller includes a timing module configured to initiate delivery of a drug in time and to adjust delivery according to the received information. Other devices, systems, and methods are disclosed. |
| US11302431B2 |
Systems and methods for quantification and presentation of medical risk arising from unknown factors
Example methods of quantifying known and unknown risks of an adverse drug event in an individual based on various factors are disclosed. In some embodiments, factors include known drug-drug interactions and unknown phenotypes of cytochromes. Quantification may be based on severity of the adverse drug event/and or probability of occurrence in some embodiments. Example methods of displaying the quantified risk are also disclosed. In one embodiment, the risk of individuals is aggregated to display the risk of a population. |
| US11302428B2 |
Medical data aggregation, transformation, and presentation system
Systems and methods for medical data aggregation, transformation, and presentation are provided. In one example, a method comprises accessing first and second patient data relating to first and second medical conditions. Attributes and supplementary attributes in a data structure are derived. Sets of attributes and supplementary attributes are selectively presented as directly-editable medical notes in a user interface having enhanced user functionality. |
| US11302424B2 |
Predicting clinical trial eligibility based on cohort trends
Method and apparatus for predicting clinical trial eligibility for patients. Embodiments include determining a current value for each of a plurality of attributes of a first patient. Embodiments include identifying a cohort of patients that are clinically similar to the first patient, based on the plurality of attributes. Embodiments include analyzing data associated with the cohort of patients to determine an attribute trend for at least a first attribute the plurality of attributes. Embodiments include generating a predicted value for the first attribute, based on the current value of the first attribute and the attribute trend for the first attribute. Embodiments include identifying a plurality of clinical trials based on the first attribute. Embodiments include generating a probability that the first patient will be eligible for each of the plurality of clinical trials at a future time, based on the predicted value for the first attribute. |
| US11302419B2 |
Method and system for DNA sequence alignment
A method for DNA sequence alignment is proposed to include steps of: generating multiple strings by acquiring foremost k number of suffixes corresponding to a reference DNA sequence; grouping the strings into multiple string groups; sorting the strings in each of the string groups to generate sorting results; obtaining sorted suffixes and a suffix array based on the sorting results; establishing FM-index data based on the sorted suffixes and the suffix array; and performing DNA sequence alignment on a target string based on the FM-index data to obtain an alignment result. |
| US11302417B2 |
Systems and methods for SNP characterization and identifying off target variants
Methods for processing data using information gained from examining biological materials identifies and characterized probes for Single Nucleotide Polymorphisms and identifies Off Target Variants. |
| US11302412B2 |
Systems and methods for simulated device testing using a memory-based communication protocol
Embodiments of the present invention provide a method of simulating a memory-based communication protocol for testing a simulated device. The method includes storing data in known locations of a host data buffer, where the host data buffer is implemented in a shared memory space, executing instructions of a first program to store a command in the shared memory space using a data structure including an index, an ID, and a memory location, executing instructions of a second program to read the command from the host data buffer, access the data in the shared memory space to perform an operation defined by the ID using the data, where a location of the data is indicated by the index, and send a completion indicator to the first program after the operation is complete. |
| US11302409B2 |
Programming techniques including an all string verify mode for single-level cells of a memory device
A storage device is disclosed herein. The storage device comprises a block including a plurality of memory cells and a circuit coupled to the plurality of memory cells of the block. The circuit is configured to program memory cells of a plurality of strings of a word line of the block and verify, for a plurality of sets of the memory cells, a data state of a set of the memory cells, where each set of the plurality of sets of the memory cells includes a memory cell from each string of the plurality of strings of the word line. Further, the circuit is configured to determine a number of sets of the plurality of memory cell sets that are verified to be in a first data state and determine, based on the number of sets, whether the block is faulty. |
| US11302400B2 |
Semiconductor device and memory system
A semiconductor device includes a first transistor; a first resistor; a second resistor; a first circuit configured to apply a first voltage to the first transistor. The first voltage is based on a difference between a reference voltage and an output voltage divided by the first and second resistors. A first current through the first circuit in a first mode is less than a second current through the first circuit in a second mode. The semiconductor device includes a capacitor connected to the output terminal; and a second circuit connected to the capacitor that: (a) disconnects the first circuit from the capacitor and apply a second voltage to the capacitor in a first mode, and (b) electrically connects the first circuit to the capacitor in the second mode. |
| US11302399B2 |
Semiconductor storage device and reading method thereof
A semiconductor storage device includes first and second memory cells, first and second word lines connected to the first and second memory cells, respectively, a bit line connected to the first and second memory cells, and a sense amplifier including a sense node. During a first read, a controller applies a first read voltage to the second word line and determines a read result. During a second read, the controller discharges the sense node for a first time period while applying a second read voltage to the first word line to determine a first read result, and discharges the sense node for a second time period while applying the second read voltage to determine a second read result. The controller determines read data based on the first read result, the second read result, and the read result of the second memory cell. |
| US11302392B2 |
Analog-to-digital converter and neuromorphic computing device including the same
An analog-to-digital converter is connected to a crossbar array including a plurality of resistive memory cells. Each of the plurality of resistive memory cells includes a resistive element. The analog-to-digital converter includes a voltage generator and processing circuitry. The voltage generator includes at least one resistive memory element including a same resistive material as the resistive element included in the crossbar array, and is configured to generate a first voltage based on a reference voltage and the at least one resistive memory element and to divide the first voltage to generate at least one divided voltage. The processing circuitry is configured to compare a signal voltage generated from the crossbar array with the at least one divided voltage to generate at least one comparison signal and generate at least one digital signal corresponding to the signal voltage based on the at least one comparison signal. |
| US11302391B2 |
System and method for reading memory cells
Methods, circuits, and systems for reading memory cells are described. The method may include: applying a first voltage with a first polarity to a plurality of the memory cells; applying a second voltage with a second polarity to one or more of said plurality of the memory cells; applying at least a third voltage with the first polarity to one or more of said plurality of the memory cells; detecting electrical responses of memory cells to the first voltage, the second voltage, and the third voltage; and determining a logic state of respective memory cells based on the electrical responses of the memory cells to the first voltage, the second voltage, and the third voltage. |
| US11302388B2 |
Decoding for pseudo-triple-port SRAM
A word line decoder for pseudo-triple-port memory is provided that includes a first logic gate for decoding a word line address to a first word line in a word line pair and a first word line clock signal. The decoder further includes a second logic gate for decoding a word line address to a second word line in the word line pair and a second word line clock signal. |
| US11302385B2 |
Memory controller and method of operating the same
An electronic device includes a memory controller and a memory device. The memory controller that controls the memory device includes a write buffer to temporarily store write data received from a host, a write timing controller to receive temperature information indicating a temperature of the memory device and generate write timing information based on the temperature information, the write timing information indicating a write timing at which the write data is transferred to and stored in the memory device, and a write operation controller to control the write buffer and the memory device based on the write timing information such that the write data stored in the write buffer is transferred to and stored in the memory device. |
| US11302383B2 |
Dynamic memory with sustainable storage architecture
The invention relates to DRAM with sustainable storage architecture. The DRAM comprises a DRAM cell with an access transistor and a storage capacitor, and a word-line coupled to a gate terminal of the access transistor. During the period between the word-line being selected to turn on the access transistor and the word line being unselected to turn off the access transistor, either a first voltage level or a second voltage level is stored in the DRAM cell, wherein the first voltage level is higher than a voltage level of a signal ONE utilized in the DRAM, and the second voltage level is lower than a voltage level of a signal ZERO utilized in the DRAM. |
| US11302380B2 |
Memory controller device and phase calibration method
A memory controller device includes a delay line circuitry, data sampler circuits, phase detector circuits, and a control logic circuit. The delay line circuitry delays a data strobe signal to generate first to third clock signals, in which the second clock signal is for reading a data signal, and phases of the first to the third clock signals are sequentially differentiated by a predetermined value. The data sampler circuits sample the data signal according to the first to the third clock signals, in order to generate first to third signals. The phase detector circuits compare the first signal with the second signal to generate a first detection signal, and compare the third signal with the second signal to generate a second detection signal. The control logic circuit adjusts the first to the third clock signals according to the first and the second detection signals. |
| US11302379B2 |
Semiconductor apparatus
A semiconductor apparatus according to an embodiment of the present invention includes: a plurality of semiconductor chips that are laminated; a plurality of penetration electrodes that penetrate in a lamination direction through the plurality of semiconductor chips and that electrically connect together the plurality of semiconductor chips; and a plurality of input/output elements that are configured to perform a signal input/output operation to the plurality of penetration electrodes, wherein the semiconductor chips are joined together via no bump, one of the plurality of input/output elements is connected to each of the plurality of penetration electrodes such that a functional element connected to each of the plurality of penetration electrodes performs an ON or OFF operation at a predetermined timing, and the input/output element connected to a first of two adjacent penetration electrodes among the plurality of penetration electrodes and the input/output element connected to a second of two adjacent penetration electrodes are configured to perform the signal input/output operation at a different timing from each other. |
| US11302377B2 |
Apparatuses and methods for dynamic targeted refresh steals
Embodiments of the disclosure are drawn to apparatuses, systems, and methods for dynamic targeted refresh steals. A memory bank may receive access commands and then periodically enter a refresh mode, where auto-refresh operations and targeted refresh operations are performed. The memory bank may receive a refresh management command based on a count of access commands directed to the memory bank. Responsive to the refresh management signal, a panic targeted refresh operation may be performed on the memory bank. A number of times the refresh management signal was issued may be counted, and based on that count a next periodic targeted refresh operation may be skipped. |
| US11302374B2 |
Apparatuses and methods for dynamic refresh allocation
Embodiments of the disclosure are drawn to apparatuses, systems, and methods for dynamic refresh allocation. Memories may be subject to row hammer attacks, where one or more wordlines are repeatedly accessed to cause data degradation in victim rows nearby to the hammered wordlines. A memory may perform background auto-refresh operations, and targeted refresh operations where victim wordlines are refreshed. The memory may monitor access patterns to the memory in order to dynamically allocate the number of targeted refresh operations and auto-refresh operations in a set of refresh operations based on if a hammer attack is occurring and the type of hammer attack which is occurring. |
| US11302372B2 |
MTJ stack containing a top magnetic pinned layer having strong perpendicular magnetic anisotropy
A top pinned magnetic tunnel junction (MTJ) stack containing a magnetic pinned layered structure including a second magnetic pinned layer having strong perpendicular magnetic anisotropy (PMA) is provided. In the present application, the magnetic pinned layered structure includes a crystal grain growth controlling layer located between a first magnetic pinned layer having a body centered cubic (BCC) texture and the second magnetic pinned layer. The presence of the crystal grain growth controlling layer facilitates formation of a second magnetic pinned layer having a face centered cubic (FCC) texture or a hexagonal closed packing (HCP) texture which, in turn, promotes strong PMA to the second magnetic pinned layer of the magnetic pinned layered structure. |
| US11302371B2 |
Memory systems and methods for dividing physical memory locations into temporal memory locations
Described are memory modules that support dynamic point-to-point extensibility using fixed-width memory die. The memory modules include data-width translators that allow the modules to vary the effective width of their external memory interfaces without varying the width of the internal memory interfaces extending between the translators and associated fixed-width dies. The data-width translators use a data-mask signal to selectively prevent memory accesses to subsets of physical addresses. This data masking divides the physical address locations into two or more temporal subsets of the physical address locations, effectively increasing the number of uniquely addressable locations in a given module. Reading temporal addresses in write order can introduce undesirable read latency. Some embodiments reorder read data to reduce this latency. |
| US11302370B2 |
Semiconductor apparatus and synchronization method
Data is synchronized when transmitted from a circuit operated at first frequency to another circuit operated at second frequency. A synchronization method includes storing data write pointers in a line, storing data input from a source at first frequency at a location in a data buffer designated by the write pointer at one end of the line, taking out the write pointer at the one end from the line to store it in the synchronization buffer, synchronizing a validation signal input from the input source at first frequency to second frequency, reading out the write pointer stored in the synchronization buffer when the validation signal is synchronized, adding completion information that indicates completion of synchronization to the data stored at the location in the data buffer designated by the read out write pointer, and reading out, from the data buffer, the data to which the completion information is added. |
| US11302364B2 |
Data storage devices, and related components and methods of making
The present disclosure relates to a data storage device interior components and/or data storage device housing components that include one or more solid-state deposition layers, and related methods of applying solid-state material to said components via solid-state deposition. |
| US11302362B2 |
Information processing apparatus
An information processing apparatus includes a display, an operation receiver, a storage, and a controller. The operation receiver receives an instruction indicating a switch of a candidate image from a user. The storage stores movie data. The controller controls the display to display a selection screen via which a frame image to be stored as a still image is selected from the movie data. The selection screen includes the candidate image, first marker information, and second marker information. The controller moves a frame position of the candidate image based on the position indicated by the first marker information or the second marker information in a case where the operation receiver receives the instruction. |
| US11302361B2 |
Apparatus for video searching using multi-modal criteria and method thereof
An apparatus for video searching, includes a memory storing instructions, and a processor configured to execute the instructions to split a video into scenes, obtain, from the scenes into which the video is split, one or more textual descriptors describing each of the scenes, encode the obtained one or more textual descriptors describing each of the scenes into a video scene vector of each of the scenes, encode a user query into a query vector having a same semantic representation as that of the video scene vector of each of the scenes into which the one or more textual descriptors describing each of the scenes are encoded, and identify whether the video scene vector of at least one among the scenes corresponds to the query vector into which the user query is encoded. |
| US11302360B1 |
Enhancing review videos
Review videos on product pages are enhanced with user interface elements that cause playback of the review videos at points at which particular topics are discussed. A review video is processed by converting speech to text and timestamping the text. Topics are identified in the text, and a time in the review video corresponding to each topic is identified from the timestamps for the text. In some configurations, sentiment is also determined for each topic. User interface elements corresponding to each identified topic are presented with the review video on the product page. When a user viewing the product page selects a user interface element, the review video is played at a time corresponding to the topic of the selected user interface element. |
| US11302359B2 |
Holographic storage device and method for simultaneously recording and reading on two sides
The present invention relates to a holographic storage device and method for simultaneously recording and reading on two sides, and pertains to the technical field of optical holographic storage. The device and method disclosed in the present invention use a characteristic that orthogonal light would not interfere with each other and a Bragg selectivity characteristic for holographic storage, and use two optical heads to constitute two interference fields orthogonal in polarization directions on two sides of a same position of a holographic storage medium, so as to perform two-path simultaneous recording and reading on a hologram. The device and method provided in the present invention implement two-path parallel recording and reading of holographic storage, and combine shift multiplexing and circumferential rotation multiplexing, thereby improving the speed of an information data recording and reading process while increasing a capacity of the holographic storage. |
| US11302355B2 |
Magnetic recording medium having controlled dimensional variation
A magnetic recording medium is provided and includes a substrate; and a magnetic layer provided over the substrate, wherein (wmax−wmin)/wmin≤400 [ppm] . . . (1) where wmax and wmin are respectively maximum and minimum of average values of width corresponding to samples of magnetic recording medium measured after the samples are stored for two hours under storage conditions (a loading tension in the longitudinal direction of the magnetic recording medium, a temperature and a relative humidity) for each of the samples, and a width of a sample of the magnetic recording medium at 25° C. and 50% relative humidity and without loading is ½ inch, magnetic recording medium has Young's modulus of less than 8.0 GPa in a longitudinal direction, and 4.0≤TB/(TA−TB) . . . (2) where TA is average thickness of magnetic recording medium and TB is average thickness of substrate. |
| US11302354B2 |
Magnetic recording medium having controlled dimensional variation
The average thickness tT of a magnetic recording medium meets the requirement that tT≤5.5 [μm], and the dimensional change amount Δw in the width direction of the magnetic recording medium with respect to the tension change in the longitudinal direction of the magnetic recording medium meets the requirement that 700 ppm/N≤Δw. |
| US11302348B2 |
Split band multichannel magnetic recording head having scaled reader widths
An apparatus, in accordance with one aspect of the present invention, includes an inner array of data transducers on a module, the data transducers of the inner array being aligned along a common axis that extends between distal ends of the module. Two outer arrays of data transducers are positioned to sandwich the inner array therebetween. Inner servo readers are positioned between the inner array and the outer arrays. Outer servo readers are positioned toward outer ends of the outer arrays. Widths of at least some of the outermost data transducers in the inner array are less than widths of at least some of the innermost data transducers in the inner array. |
| US11302346B2 |
System and method for frustration detection
A computer based system and method for automatically detecting frustration in an interaction, may include: identifying in the interaction using a set of linguistic rules, natural language patterns related to frustration, wherein the linguistic rules further define weights associated with the natural language patterns and rule metadata; reviewing the rule metadata associated with the identified natural language patterns to identify override attributes, wherein if the rule metadata does not include override attributes, then a frustration level in the interaction is determined based on the identified natural language patterns and weights associated with the identified natural language patterns; and if the rule metadata includes override attributes than the frustration level is determined based on the identified override attributes. |
| US11302345B2 |
Method, apparatus, and computer program product for vehicle localization via frequency audio features
A method, apparatus and computer program product are provided for vehicle localization via frequency audio features. In this regard, a frequency audio signature of audio data received from one or more audio sensors of a vehicle is determined. Location data associated with the vehicle is also determined. Based on the location data for the vehicle, at least a portion of an audio feature map is selected. The audio feature map stores frequency audio signatures associated with road noise in relation to respective locations. Furthermore, the frequency audio signature of the audio data is compared with the frequency audio signatures of the audio feature map. Based on the comparison between the frequency audio signature of the audio data and the frequency audio signatures of the audio feature map, a location of the vehicle is refined to generate updated location data for the vehicle. |
| US11302340B2 |
Pitch emphasis apparatus, method and program for the same
Provided is pitch enhancement processing having little unnaturalness even in time segments for consonants, and having little unnaturalness to listeners caused by discontinuities even when time segments for consonants and other time segments switch frequently. A pitch emphasis apparatus obtains an output signal by executing pitch enhancement processing on each of time segments of a signal originating from an input audio signal. The pitch emphasis apparatus includes a pitch enhancing unit that carries out the following as the pitch enhancement processing: obtaining an output signal for each of times n in each of the time segments, the output signal being a signal including a signal obtained by adding (1) a signal obtained by multiplying the signal of a time further in the past than the time n by a number of samples T0 corresponding to a pitch period of the time segment for the time n, η-th power of a pitch gain σ0 of the time segment, and a predetermined constant B0, to (2) the signal of the time n, η being a value greater than 1. |
| US11302338B2 |
Responding to requests for information and other verbal utterances in a healthcare facility
Systems, methods, and devices are provided for responding to requests received from users in a healthcare facility, and for generating alerts based upon criticality detected in received verbal utterances. A personal assistant device (PAD) may receive a verbal request for information. The identity of the requestor may be verified and a response to the request may be received by the PAD. In some cases, prior to audibly outputting the response, it may be determined whether the response contains protected health information (PHI). Upon determining that the response contains PHI, the presence of persons other than the patient in proximity to the PAD and/or security of the location of the PAD may be evaluated prior to audibly outputting the response. Additionally, alerts having a heightened criticality may be generated when a received verbal utterance is determined to have a heightened criticality. |
| US11302337B2 |
Voiceprint recognition method and apparatus
The present disclosure provides a voiceprint recognition method and apparatus, comprising: according to an obtained command speech, recognizing, in a voiceprint recognition manner, a user class sending a command speech; according to the user class, using a corresponding speech recognition model to perform speech recognition for the command speech, to obtain a command described by the command speech; providing resources according to the user class and command. The present disclosure can avoid the problems that in a conventional voiceprint recognition method in the prior art, a client needs to participate in voiceprint recognition, and the user's ID needs to be further recognized through a voiceprint training process, and that the user's degree of satisfaction is not high. While the user speaks naturally, it is feasible to perform processing for these very “ordinary” speech, and meanwhile complete the work of voiceprint recognition. |
| US11302332B2 |
Method, computer device and computer readable recording medium for providing natural language conversation by timely providing substantial reply
A method for providing a natural language conversation, which is implemented by an interactive agent system, may include receiving a natural language input, determining a user intent based on the natural language input, and providing a natural language response corresponding to the natural language input, based on the natural language input and/or the determined user intent, which is associated with execution of a specific task, provision of specific information, and/or a simple statement. The provision of the natural language response includes determining whether a first condition is satisfied based on whether it is possible to obtain all sufficient information from the natural language input, without having to request additional information, and when the first condition is satisfied, determining whether a second condition is satisfied and providing a natural language response belonging to a category of substantial replies when the second condition is satisfied. |
| US11302320B2 |
Systems and methods for disabling voice assistant audio monitoring and data capture for smart speakers and smart systems
A hotel room internet-of-things (IOT) controller includes: a housing configured for table-top mounting; a system controller operable by a hotel guest to wirelessly control environmental parameters in the hotel room using voice commands; a touch interactive screen extending above the housing; a voice capture circuit; and a switch disposed proximate an outside surface of the housing and manually operable between: i) a first position in which the voice capture circuit is connected to the system controller; ii) a second position in which the voice capture circuit is disconnected from the system controller; and iii) an additional step and secondary method to confirm through a double opt-in or opt-out through a user interface on the device or mobile device connected to the system. |
| US11302315B2 |
Digital video fingerprinting using motion segmentation
Methods of processing video are presented to generate signatures for motion segmented regions over two or more frames. Two frames are differenced using an adaptive threshold to generate a two-frame difference image. The adaptive threshold is based on a motion histogram analysis which may vary according to motion history data. Also, a count of pixels is determined in image regions of the motion adapted two-frame difference image which identifies when the count is not within a threshold range to modify the motion adaptive threshold. A motion history image is created from the two-frame difference image. The motion history image is segmented to generate one or more motion segmented regions and a descriptor and a signature are generated for a selected motion segmented region. |
| US11302313B2 |
Systems and methods for speech recognition
Systems and methods for speech recognition are provided. The method may include obtaining a plurality of candidate recognition results of speech information uttered by a user and a plurality of preliminary scores corresponding to the plurality of candidate recognition results, respectively. The method may further include, for each of the plurality of candidate recognition results, extracting one or more keywords from the candidate recognition result and determining at least one parameter associated with the one or more extracted keywords. The method may further include, for each of the plurality of candidate recognition results, generating an updating coefficient based on the at least one parameter and updating the preliminary score based on the updating coefficient to generate an updated score. The method may further include determining, from the plurality of candidate recognition results, a target recognition result based on the plurality of updated scores. |
| US11302308B2 |
Synthetic narrowband data generation for narrowband automatic speech recognition systems
A method for generating synthetic telephony narrowband data for training an automatic speech recognition model by receiving a broadband audio data file and then initiating a telephony call using a pre-configured telephone provider to play the broadband audio data file in the telephony call and to record and store audio data generated by transmission of the broadband audio data file in the telephony call, thereby generating the synthetic telephony narrowband data file from the broadband audio data file. |
| US11302304B2 |
Method for operating a sound output device of a motor vehicle using a voice-analysis and control device
The invention relates to a method for operating a sound output device of a motor vehicle. A voice-analysis and control device receives a voice signal from a voice detection device of the motor vehicle, wherein the received voice signal describes a voice message from a person who is in exterior surroundings of the motor vehicle. The voice signal is used to ascertain a voice message content of the voice message and a thematic context of the voice message. On the basis of that, a voice output signal is provided that describes a context-related response text for the captured voice message, and the provided voice output signal is transmitted to the sound output device to output the provided voice output signal to the exterior surroundings of the motor vehicle. |
| US11302301B2 |
Learnable speed control for speech synthesis
A method, computer program, and computer system is provided for synthesizing speech at one or more speeds. A context associated with one or more phonemes corresponding to a speaking voice is encoded, and the one or more phonemes are aligned to one or more target acoustic frames based on the encoded context. One or more mel-spectrogram features are recursively generated from the aligned phonemes and target acoustic frames, and a voice sample corresponding to the speaking voice is synthesized using the generated mel-spectrogram features. |
| US11302298B2 |
Signal processing method and device for earphone, and earphone
A signal processing method for an earphone includes: a motion state of a wearer of the earphone is detected by using an acceleration sensor arranged inside the earphone; a first microphone and a second microphone both arranged outside the earphone detect wind noise conditions corresponding to different frequency bands; and according to the motion state of the wearer of the earphone and the wind noise conditions corresponding to different frequency bands, operating modes of a feedforward filter and a feedback filter inside the earphone are adjusted, herein the feedforward filter and the feedback filter are configured for active noise cancellation of the earphone. |
| US11302295B2 |
Tuning guide
Disclosed is a tuning guide for tuning a brass musical instrument having a tuning slide. The tuning guide includes (1) visual markings provided along one arm of the tuning slide indicating a plurality of tuning positions of the tuning slide and (2) a tuning log for logging a tuning history specific to both the instrument and a particular player of the instrument. The tuning log includes a plurality of tuning records, each tuning record including (i) one or more conditions fields, each conditions field for recording an environmental condition and (ii) a tuning position field for specifying a tuning position at which the instrument is properly tuned under the environmental conditions recorded in the one or more conditions fields. |
| US11302294B2 |
Display device, and control method, control apparatus and control system therefor
A control method for a display device includes: receiving a user distance, and determining whether the user distance is smaller than a preset distance: if so, transmitting a first control command to a display screen to control the display screen to enter a local display state, and a second control command to a player to control the player to output local image data; receiving the local image data; and transmitting the local image data to the display screen. The user distance is a distance from the user to a reference surface in a direction perpendicular to the reference surface, and the reference surface is a display surface of the display screen or a plane parallel to the display surface. The preset distance is a minimum distance from the user to the reference surface in a case where the field of view of the user covers the entire active area. |
| US11302293B2 |
Systems and methods for overlays in an augmented and virtual reality environment
According to certain aspects of the disclosure, a computer-implemented method may be used for overlay display. The method may include displaying, by the one or more processors, information in an overlay; determining, by the one or more processors, a field of view of the user based on determining a positioning of the user device; determining, by the one or more processors, whether the overlay meets a minimum visibility criteria based on the positioning of the user device; and displaying, by the one or more processors, a minimum viewable portion of the overlay in the field of view of the user upon determining that the overlay does not meet the minimum visibility criteria. |
| US11302279B2 |
Method and apparatus of handling signal transmission applicable to display system
A method of handling signal transmission applicable to a display system includes a plurality of steps. The steps include transmitting a reset signal embedded in a first data signal to each of at least one source driver via a first data channel, generating a first control signal for setting the at least one source driver, and transmitting the first control signal embedded in a second data signal to each of the at least one source driver via a second data channel when the reset signal is transmitted via the first data channel. |
| US11302275B2 |
Method and device for adjusting greyscale of display panel solving problem of ineffectiveness of eliminating unevenness caused by inaccurate mura compensation value
The present disclosure discloses a method and device (302) for adjusting grayscale of display panel, the method includes: performing image capture on the display panel, and obtaining a current image (S10); identifying an uneven area in the current image, and detecting original output brightness and original input grayscale of the uneven area (S20); determining a target input grayscale corresponding to a preset target brightness according to actual Gamma curve value which is obtained by testing the display panel (S30); using the difference between the original input grayscale and the target input grayscale as grayscale compensation value of the uneven area (S40). |
| US11302274B2 |
Liquid crystal display device
A liquid crystal display device may include gate lines, data lines intersecting the gate lines, and pixels electrically connected to the gate lines and the data lines and arranged in pixel columns and pixel rows. The data lines include first-type data lines and second-type data lines. Exactly one pixel column is positioned between every immediately neighboring two of the first-type data lines. No pixel column is positioned between any immediately neighboring two of the second-type data lines. Each of the first-type data lines is electrically connected to a pixel of a first immediately adjacent pixel column in every odd-numbered pixel row and is connected to a pixel of a second immediately adjacent pixel column in every even-numbered pixel row. Each of the second-type data lines is electrically connected to a pixel of exactly one immediately adjacent pixel column in every other pixel row. |
| US11302273B2 |
Display apparatus
A display apparatus includes a liquid crystal panel; and a source driver configured to output an image signal to the liquid crystal panel. The source driver may include a digital-to-analog converter (DA converter) configured to convert digital image data into an image signal of normal polarity and an image signal of inversion polarity; a plurality of multiplexers each of which receives the image signal of the normal polarity and the image signal of the inversion polarity from the DA converter, and outputs the image signal of the normal polarity and the image signal of the inversion polarity as they are or cross outputs the image signal of the normal polarity and the image signal of the inversion polarity; and an inversion controller configured to output a control signal to each of the plurality of multiplexers through a plurality of output terminals respectively connected to the plurality of multiplexers. Each of the plurality of multiplexers may be configured to output the image signal of the normal polarity and the image signal of the inversion polarity as they are in response to a first control signal of the inversion controller, and to cross output the image signal of the normal polarity and the image signal of the inversion polarity in response to a second control signal of the inversion controller. |
| US11302272B2 |
Display device, and driving method for the display device for reducing power consumption and improving display effect
The present disclosure provides a display device and a driving method. The display device includes a display panel and a backlight module, where the display panel includes a plurality of display regions, the backlight module includes x light sources, each of the plurality of display regions corresponds to one of the light sources, each of the light sources includes a plurality of light emitting units which emit light of different colors, and x is a positive integer not smaller than 2. The driving method includes, after loading data signals to subpixels in one of the display regions, turning on a light emitting unit corresponding to the one of the display regions and at the same time, loading datap signals to subpixels in a next one of the display regions which is adjacent to the one of the display regions. |
| US11302270B2 |
Display device and driving method thereof
A display device and a driving method thereof are disclosed, the driving method includes: setting average values of a first component, a second component, and a third component of a first frame display image to be equal to a second average value, and setting the average values of both the first component and the third component of a second frame display image to be equal to a third average value, and setting the average value of the second component to be equal to a set average value; adjusting lightness of a backlight module according to the average values of the first component, the second component, and the third component corresponding to the original display image, the first frame display image, and the second frame display image. |
| US11302268B2 |
Display device
A display device includes a substrate, a first active pattern, a first gate electrode, a second active pattern, a second gate electrode, a first connecting pattern, and a second connecting pattern. The first connecting pattern is disposed on the second active pattern and is electrically connected to the first gate electrode, and the second connecting pattern is disposed on the first connecting pattern and is electrically connected to the first connecting pattern and the second active pattern. |
| US11302267B2 |
LED display panel having a driver device for equalizing data lines and operation method thereof
A driving device and an operation method thereof are provided. The driver device includes a source driver circuit, an output switching circuit, and an equalization control circuit. Two input ends of the output switching circuit are coupled to two output ends of the source driver circuit. Two output ends of the output switching circuit are coupled to two data lines of an LED display panel. The equalization control circuit checks whether sub-pixel data of the two data lines meets a predetermined condition. A plurality of sub-pixels located on a current display line of the LED display panel are reset in a reset period. In a data scanning period after the reset period, the equalization control circuit determines whether to control the output switching circuit to perform an equalization operation on the two data lines according to the checking result. |
| US11302266B2 |
Organic light emitting diode display device
An organic light emitting diode (OLED) display device is disclosed. In the OLED display device, a timing controller compares reference voltages output from driving integrated circuits (driving ICs). When a deviation occurs in the reference voltages, the timing controller compensates for the deviation of reference voltages. The OLED display device includes a display panel having reference voltage lines and a plurality of pixels, a data driving circuit having a plurality of driving ICs to generate reference voltages and to supply the reference voltages to the reference voltage lines of the display panel, and a timing controller for comparing reference voltages respectively output from the driving ICs to the display panel, thereby controlling the driving ICs such that the reference voltages respectively output from the driving ICs are equalized. |
| US11302262B2 |
Organic light-emitting display device
An organic light-emitting display device includes: a data driver configured to divide one frame into an odd-numbered sub-frame and an even-numbered sub-frame, to divide frame data for implementing the one frame into odd-numbered sub-frame data and even-numbered sub-frame data, to provide the odd-numbered sub-frame data to the data lines in the odd-numbered sub-frame, and to provide the even-numbered sub-frame data to the data lines in the even-numbered sub-frame; an odd-numbered scan driver electrically connected to odd-numbered scan lines to provide an odd-numbered scan signal to the odd-numbered scan lines in the odd-numbered sub-frame; an even-numbered scan driver electrically connected to even-numbered scan lines to provide an even-numbered scan signal to the even-numbered scan lines in the even-numbered sub-frame; an emission driver to provide an emission signal to emission line groups formed by grouping the emission lines by two adjacent emission lines in the odd-numbered sub-frame and the even-numbered sub-frame. |
| US11302256B2 |
Electroluminescent display device and driving method thereof
An electroluminescence display device lowers peak brightness of a screen image based on a preset peak luminance control (PLC) curve as an average picture level (APL) of the image is increased. The electroluminescence display device includes a memory and a timing controller. The memory stores an ELVDD reference profile for defining EVDD adjusting levels for adjusting a high-potential pixel voltage applied to pixels of the screen image in units of 1 image frame and an MDATA reference profile for defining Max data adjusting values for adjusting image data applied to the pixels of the screen image in the units of 1 image frame, for matching target peak brightness for each preset APL section with the PLC curve. The timing controller calculates an EVDD adjusting value and a Max data adjusting value of a first image frame based on an analysis result of image data of the first image frame and information stored in the memory and modulates image data of the first image frame based on the Max data adjusting value. |
| US11302254B2 |
Pixel circuit compensation method and device, and display device
The present disclosure discloses a pixel circuit compensation method and device, and a display device. The method includes: when the display panel is in a preset display state, sensing a preset mobility compensation value corresponding to a driving transistor in the pixel circuit; according to the preset mobility compensation value, adjusting an initial mobility compensation value corresponding to the driving transistor to a target mobility compensation value, wherein a difference between the target mobility compensation value and the preset mobility compensation value is less than a threshold; based on the target mobility compensation value, when the display panel is in a non-display state, compensating a mobility of the driving transistor in a preset compensation manner. |
| US11302253B2 |
El display apparatus
An EL display apparatus is provided. A display screen includes pixels arranged in a matrix, with each pixel including an EL device and a pixel circuit. A source driver circuit is configured to output an analog video signal to each pixel. A gate driver circuit is on at least one side of the display screen, with the gate driver circuit including first and second gate driver circuits. Each pixel includes a driving transistor, a first switch transistor, and a second switch transistor. A gate terminal of the first switch transistor is connected to a first gate signal line of the first gate driver circuit, and a gate terminal of the second switch transistor is connected to a second gate signal line of the second gate driver circuit. The first and second switch transistors are on/off controlled, independently, by the first and second gate driver circuits. |
| US11302248B2 |
U-led, u-led device, display and method for the same
The invention relates to various aspects of a μ-LED or a μ-LED array for augmented reality or lighting applications, in particular in the automotive field. The μ-LED is characterized by particularly small dimensions in the range of a few μm. |
| US11302239B2 |
Display apparatus and driving method
A display device includes a display panel including a plurality of sub-pixels, a grayscale conversion part configured to generate a data signal displaying different grayscales to the sub-pixels at a predetermined time interval, and a data driver configured to convert the data signal into a data voltage and to output the data voltage to the display panel. |
| US11302237B2 |
Display device, data driving circuit and display panel
A display device, a data driving circuit and a display panel capable of displaying YCbCr image data as WRGB image data while simplifying the structure of the data driving circuit and the display panel are discussed. The display device includes a display panel in which pixels including a white subpixel and a colored subpixel are arranged in a matrix form, and subpixels are disposed in a region where gate lines extending in a first direction and data lines extending in a second direction intersect, a gate driving circuit driving the gate lines, a data driving circuit driving the data lines, and a timing controller for controlling the gate driving circuit and the data driving circuit. In the display panel, a luminance data voltage is applied to the white subpixel, and a same data voltage is applied to two colored subpixels adjacent in the first direction. |
| US11302236B2 |
Display device and method for driving the same
A display device includes: a pixel unit including pixels connected to data lines and scan lines, and signal output lines, where at least one signal output line of the signal output lines is connected to each of the scan lines through a contact point; a data driver disposed at one side of the pixel unit to drive the data lines; a scan driver disposed at the one side of the pixel unit together with the data driver to drive the scan lines; and a timing controller controlling the data driver and the scan driver. The data driver includes: output buffers outputting data signals to the data lines, respectively; and a slew rate controller adjusting a slew rate of the data signals by controlling a bias value supplied to the output buffers in units of pixel rows based on positions of the pixels and a change in the data signals. |
| US11302232B2 |
Circuit device, electro-optical device, and electronic apparatus
A circuit device configured to drive an electro-optical panel including a demultiplexer provided between a first to n-th data lines, n being an integer of three or greater, and a data signal supply line, includes a data line driving circuit configured to output a data signal to the data signal supply line, and a processing circuit configured to set a selection order, by the demultiplexer, of the first to n-th data lines. When an i-th data line, i being an integer of 1 to n, is selected j-th, j being an integer of 1 to n, in the first selection order, the processing circuit sets a second selection order using random number information so as to prohibit the i-th data line from being selected j-th in the second selection order. |
| US11302229B2 |
Display panel and display apparatus
This application discloses a display panel and a display apparatus. The display panel includes a first signal line and a second signal line; an overlapping region is formed at an intersection of the second signal line and the first signal line; and the first signal line includes at least two sub-connection lines and the connection line crosses the overlapping region. |
| US11302226B2 |
Display device
A display device including a substrate having a display area and a non-display area outside the display area, a plurality of pixels disposed on the substrate in the display area, an external circuit bonded on the substrate in the non-display area, a first signal line disposed on the substrate in the non-display area and surrounding at least a portion of the display area, the first signal line being electrically connected to the external circuit, and a second signal line disposed in the non-display area and surrounding at least a portion of the first signal line, the second signal line being electrically connected to the external circuits. |
| US11302225B2 |
Pixel structure for repairing defects for micro device integrated systems
What is disclosed are structures and methods for testing and repairing emissive display systems. Systems are tested with use of temporary electrodes which allow operation of the system during testing and are removed afterward. Systems are repaired after identification of defective devices with use of redundant switching from defective devices to functional devices provided on repair contact pads. |
| US11302219B2 |
Total mesorectal excision surgical simulator
A TME surgical simulator is provided. The TME surgical simulator includes a simulated tissue layers and simulated vasculature and/or organ structures. The simulated tissue surgical simulator is adapted for but not limited to laparoscopic and/or transanal TME surgical procedures. |
| US11302217B2 |
Augmented reality dealer vehicle training manual
A method of educating a user of vehicle features with an augmented reality manual includes capturing, using an electronic device, a real-world environment including a two-dimensional representation of a marker and identifying the marker in the real-world environment, determining a plane associated with the marker with respect to the electronic device, and displaying the real-world environment on the electronic device. The method includes displaying, based at least in part on the plane associated with the marker, a three-dimensional representation of a portion of a vehicle, the portion of the vehicle being rendered such that the portion of the vehicle appears to be positioned in place of the marker in the real-world environment as displayed in the camera environment including a plurality of selectable features. The method further includes receiving a feature input selecting a vehicle feature and presenting feature information relating to the vehicle feature selected by the feature input. |
| US11302216B2 |
System and method for tracking the weight of a user
A system for tracking a user's weight includes an insole which is configured to be interchangeably located within one of each of a number of a user's pairs of shoes. A weight sensor located within the insole is configured to detect the weight of the user. A communications interface is located within the insole and is electrically connected to the weight sensor. The communications interface is configured to transmit weight readings from said weight sensor to a computerized device. |
| US11302215B2 |
Adaptive team training evaluation system and method
A computer-implemented adaptive group training method a computer accessing a virtual system and initiating a group training exercise for training a trainee group comprising one or more trainees, the group training exercise including one or more challenges to the virtual system, each of the one or more challenges including a pre-defined sequence of one or more injectable events; the computer controlling subsequent execution of the group training exercise comprising injecting the injectable events; and the computer evaluating performance of the trainee group during the subsequent execution of the group training exercise, including analyzing actions taken by the trainee group in response to each of the injections, and attributing one or more of the actions taken to a trainee. |
| US11302214B2 |
Movement based fitness and fitness product management
Raw motion data generated by sensors affixed to a user performing exercises or poses in response to perceiving content annotated with a motion track and presented to the user, the motion track generated using a posture dictionary is collected. The exercises or poses are determined from the raw motion data using the posture dictionary. Motion data indicating the exercises or poses within the raw motion data is generated using the raw motion data. The user is graded in performing the exercises or poses by comparing the motion data with the motion track. The content is presented to the user based on the grading of the user. |
| US11302213B2 |
Tactical target mobile device
A device, sometimes mobile, which simulates human motion, such as an omnidirectional sensing target. The target that can detect and differentiate between projectile (bullet) hits to the head, body, and one or more peripheral regions (e.g., arms, pelvis, legs) of a humanoid-form target, elicit a physical response from the mobile device based upon the sensing data, and provide real time feedback to a user (shooter) via a user-friendly interface. The target includes multiple layers of conductive material separated by one or more insulating layers. Forming can be by wrapping planar sensing panel into a three-dimensional configuration such that the panel occludes a three-dimensional volume and presents surfaces sensing projectiles from all directions. Associated circuitry is configured to have a bullet pass through multiple zones and to electronically detect the bullet path based on a combination and/or sequence of zones detecting bullet passage. |
| US11302208B2 |
Dynamically providing video checkpoint questions to counter viewer distraction events
Systems and methods for dynamically providing video checkpoint questions to counter viewer distraction events are disclosed. In embodiments, a method includes: initiating, by a computing device, a viewing session of a video module at a user computer system; determining, by the computing device, a distraction event with respect to a viewer of the video module during the viewing session, wherein the distraction event is associated with content at a distraction point in the video module; dynamically generating, by the computing device, a checkpoint question for the viewer based on the content at the distraction point in the video module and in response to the determining the distraction event; and presenting, by the computing device, the checkpoint question to the viewer during the viewing session. |
| US11302206B2 |
Teaching social skills using a customized interactive model
Social skills can be taught using a customized interactive model. As part of this model, an Autism Spectrum Disorder (ASD) individual and an influencer are involved in creating customized content that will later be presented to the individual as part of an interactive game or other learning environment. This customized content includes both visual and audio content of the individual and the influencer and other graphical content selected and/or customized by the individual. One problem faced when teaching individuals is that they do not instantaneously connect noises with sources or relate words they hear with the speaker. By involving the individual in the creation of the customized content, the likelihood that the individual will make such connections can be increased since the individual is more likely to recognize content that he or she created in conjunction with an influencer. |
| US11302205B2 |
Language learning and speech enhancement through natural language processing
A computer-implemented method, a computer program product, and an incremental learning system are provided for language learning and speech enhancement. The method includes transforming acoustic utterances uttered by an individual into textual representations thereof, by a voice-to-language processor configured to perform speech recognition. The method further includes accelerating speech development in the individual, by an incremental learning system that includes the voice-to-language processor and that processes the acoustic utterances using natural language processing and analytics to determine and incrementally provide new material to the individual for learning. Responsive to the individual being a baby, the voice-to-language processor discretizes baby babbling to consonants, letters, and words. |
| US11302203B2 |
Data processing device, drone, and control device, method, and processing program therefor
Provided is a technique for controlling an unmanned aerial vehicle in flight according to a battery level. A drone control device controls a drone according to a battery level, including: a flight distance calculation unit, calculating a flight distance according to an airframe position at any time point and a landing place of the drone; a battery status acquisition unit, acquiring the battery level of the drone; an estimated battery consumption calculation unit, calculating an estimated battery consumption when the drone flies over the flight distance calculated by the flight distance calculation unit; and a return decision unit, deciding, on the basis of the battery level of the drone and the estimated battery consumption, whether the drone is capable of flying over the flight distance and return. |
| US11302200B2 |
Methods and systems for assigning procedures to flight records
Methods and systems are provided for analyzing flight records to assign procedures to the flight records. One method involves identifying a set of procedures for potential association with a flight record based at least in part on a runway associated with the flight record, identifying a probable procedure from among the set of procedures based on a relationship between a trajectory associated with the probable procedure and flight data associated with the flight record, and updating the flight record to maintain an association with the probable procedure. The flown trajectory represented by the flight data is mapped to the procedure trajectories to identify the probable procedure executed during the flight associated with the flight record based on the relative adherence of the flown trajectory to the procedural legs that constitute the procedure trajectory. |
| US11302198B2 |
System and method for camera or sensor-based parking spot detection and identification
An on-board vehicle system and method for camera or sensor-based parking spot detection and identification is provided. This system and method utilizes a standard front (or side or rear) camera or sensor image to detect and identify one or more parking spots at a distance via vector or like representation using a deep neural network trained with data annotated using an annotation tool, without first transforming the standard camera or sensor image(s) to a bird's-eye-view (BEV) or the like. The system and method can be incorporated in a driver-assist (DA) or autonomous driving (AD) system. |
| US11302192B2 |
Parking control apparatus for vehicle and method thereof
Disclosed are a parking control apparatus for a vehicle and a method thereof. The parking control apparatus includes a processor that searches for at least one parking space in a parking control of a vehicle, calculates an estimated route and a required parking time for each of the at least one parking space, and performs parking control into a target parking space which is one parking space selected from the at least one parking space by a user, and a display that displays the estimated route and the required parking time for each of the at least one parking space. |
| US11302191B2 |
Method and apparatus for calculating parking occupancy
A method, non-transitory computer readable medium and apparatus for calculating a by spot occupancy of a parking lot are disclosed. For example, the method includes receiving an indication of a triggering event, sending a query to receive a first image and a second image in response to the triggering event, receiving the first image and the second image, analyzing the first image and the second image to determine a change in an occupancy status of a parking spot within the parking lot and calculating the by spot occupancy of the parking lot based on the change in the occupancy status of the parking spot. |
| US11302189B2 |
Agent cooperation system, agent cooperation method, and non-transitory storage medium
An agent cooperation system includes a first agent configured to acquire information on a driving attribute of a first driver in a first vehicle; and a second agent configured to notify a second driver in a second vehicle about driving assistance information derived based on the information on the driving attribute of the first driver acquired by the first agent. |
| US11302175B2 |
Systems and methods for network-implemented distancing enforcement
A system described herein may provide a technique for the network-implemented detection of locations that exhibit excessive density of individuals, and/or for the detection of individuals who do not maintain a minimum level of distance between each other. Location information of one or more User Equipment (“UEs”) may be monitored and compared to policy information to determine that the locations exhibit at least a threshold level of population density. Further, remedial measures may be taken when such situations are detected, such as alerting devices that are located within, or are heading towards, such locations. |
| US11302165B2 |
Sensor device, system and method
Embodiments of a sensor device, method and system employ a multiplicity of environmental sensors as a single monitoring and alerting mechanism, operable to provide a profile of any contaminant in terms of various gases and particles in the atmosphere, quantified in terms of relative concentrations. In various embodiments, the sensor device can comprise hardware and firmware elements, including an electronic control system, a case, a shield and a cover. The environmental sensors can be secured as part of the electronic control system and the shield can be formed so as to facilitate proper channeling of air and sound for effective operation. |
| US11302162B2 |
Multifunction terminals for alarm systems
The present invention is directed to circuit that improves alarm systems by adding the flexibility through software to configure an output terminal for typical device functions of Alarm System Devices. With a number of these circuits on a single Circuit Board, installers can use fewer different Circuit Boards. Alarm systems may be constructed from many different components and sensors. These components and sensors may be connected either with wires or wireless networks. This present invention improves the ability to connect components and sensors for a Wired Alarm System. Present Alarm systems have dedicated terminals for each different sensor, keypad or human interface, Contacts for Windows and Doors, Solenoids to remotely unlock Doors. |
| US11302161B1 |
Monitoring and tracking checkout activity in a retail environment
Methods and systems monitor activity in a retail environment, such as activity in a checkout area (e.g., checkout station) of the retail environment. A convolutional neural network is used to detect objects (e.g., inventory items) or events. Various algorithms may be used to determine whether valid checkout procedures are followed, and/or to determine whether to trigger alerts. Monitored/detected activity may be stored in a database to facilitate a deeper understanding of operations within the retail environment. |
| US11302159B2 |
Logistics appliance and anti-disassembly method therefor
The present application relates to the field of logistics, discloses an anti-disassembly logistics appliance and anti-disassembly method therefor, realizing the anti-disassembly alarm of a designated module under the premise of simple structure and low power consumption. An anti-disassembly logistics appliance, comprising: a confined space and an anti-disassembly module disposed in the confined space; the anti-disassembly module comprises: one or more photoelectric devices, a wireless communication unit and a determining unit; the determining unit is configured to determine whether an electrical signal output by the photoelectric device is greater than a preset threshold, and if so, triggers the wireless communication unit to transmit an alarm signal; the structure of the confined space satisfies following requirements: the confined space is an light-tight dark space after the anti-disassembly module is installed; during the process of disassembling the anti-disassembly module from the logistics appliance, the light-tightness of the confined space is at least temporarily destroyed to enable the optoelectronic device to detect light. |
| US11302158B2 |
Apparatus and method for testing a glass break detection system
A glass break detection testing system including a speaker communicatively coupled to a remote device, the remote device being configured to transmit a recorded sound file to the speaker thereby causing the speaker to emit the transmitted sound file. |
| US11302157B2 |
Infrasound drive for haptic experiences
An infrasound drive system and method are disclosed. An infrasound drive system includes a control circuit for transmitting a data signal and a power signal, and one or more infrasound drive that includes an input terminal, an amplifier and a tactile transducer. In one or more infrasound drives, the amplifier receives a power signal from the power channel and a data signal from the data channel. The amplifier outputs an amplified signal to the tactile transducer. The tactile transducer generates a tactile vibration based on the data signal and the power signal. An infrasound drive can be disposed in a housing and transmit a haptic force to a user in contact with the housing. A user can limit the haptic force transmitted by the infrasound drive. The power channel and the data channel can be provided by a power over Ethernet (PoE) cable. |
| US11302154B2 |
Automated teller machine having a slidable unloading unit having a belt part
An automated teller machine includes a frame on which a first belt part and a second belt part for conveying a medium are provided, and an unloading unit slidably coupled to the frame and provided with a third belt part for unloading the medium conveyed from the second belt part. The second belt part and the third belt part are configured to form a continuous medium movement path above the first belt part. A separation space is formed between the second belt part and the third belt part in a state in which the unloading unit is slid forward. The first belt part is exposed to an outside of the automated teller machine through the separation space. |
| US11302153B2 |
System and method for providing a game with unfolding symbols
A gaming machine includes a plurality of reels associated with the game of chance. Each of the plurality of reels includes a plurality of reel positions to generate a symbol thereon. The gaming machine also includes a display including a defined plurality of positions to present a symbol thereon. The gaming machine also includes a processor programmed to generate a spin of the plurality of reels. The spin results in a play area including one or more symbols generated from each of the plurality of reels. The processor is also programmed to identify a first unfolding symbol in a first position on the play area, determine a second position on the play area adjacent to the first position, and display a second unfolding symbol in the second position on based at least in part on the determining, thereby unfolding the first unfolding symbol. |
| US11302151B2 |
Game apparatus and recording medium
A game apparatus includes at least one processor, and a memory that is coupled to the at least one processor and configured to store therein instructions executed by the at least one processor. In the game apparatus, based on the instructions, the at least one processor is configured to select, by lottery, at least one lottery element from among lottery elements including a specific lottery element in an event, award a player a reward when the specific lottery element is selected, and change, based on a result of the lottery in the event, a probability of selecting the specific lottery element in a next event. |
| US11302150B2 |
Methods for social monetary giving in the gaming environment
The present disclosure relates generally to a gaming system conducting a streaming session with a plurality of viewer systems through a streaming system. Conducting of the streaming session can comprise receiving media content from a plurality of input devices and providing the media content and game play information of a gambling event to the streaming system. During the streaming session, an indication of an action by a user of one of the viewer systems and indicating a transfer of value from the user of the one of the viewer systems to a participant in the gambling event associated with the gaming system can be received. An indication of the action by the user of the one of the viewer systems can be provided to the participant in the gambling event. |
| US11302145B2 |
Digital currency in a gaming system
There is disclosed a gaming machine. The gaming machine includes an electronic arrangement configured to receive digital currency data from an electronic device that is remote to the gaming machine. The digital currency data represents a store of value of a digital currency. The gaming machine further includes a data transfer arrangement configured to transfer the digital currency data via a data network to a data storage arrangement that is remote to the gaming machine. The gaming machine further includes a data recording arrangement configured to create record data representing a record of a unique attribute of the digital currency data. |
| US11302141B2 |
Customized electronic game play systems and methods
A system and method for peer-to-peer gaming is described. One embodiment includes a system for peer-to-peer gaming, the system comprising an at least one gaming client, wherein the at least one gaming client is configured to accept a selection of an at least one gaming option from a player, and allow the player to play a game based on the selection of the at least one gaming option; an administration server, wherein the administration server is configured to receive the selection of the at least one gaming option from the at least one gaming client, and initiate the game for the player based on the selection of the at least one gaming option; and an at least one gaming server, wherein the at least one gaming sever is configured to run the game and transmit data about the game to the administration server. |
| US11302139B2 |
Dynamic indication of awards of an award generator in a gaming environment
Gaming systems and methods that utilize a dynamic indicator to indicate one or more awards of one or more sections of an award generator. |
| US11302137B2 |
Method of gaming, a gaming system and a game controller
Systems and methods of gaming are disclosed herein. An example method includes receiving a credit wager to initiate play of a base game. The method also includes designating a first symbol display position on the display, selecting a first symbol from a symbol set for display at the first symbol display position, evaluating whether the first symbol is an award symbol, and controlling the display to display a secondary game in response to a determination that the first symbol is an award symbol. |
| US11302136B2 |
Methods, systems, and devices for secure payment and providing multimedia at fuel dispensers
Methods, systems, and devices for secure payment and providing multimedia at fuel dispensers are provided. In general, a fuel dispenser can include a terminal configured to receive secure information and to show multimedia. The terminal can be configured to switch between a first mode and a second mode. The terminal can include a touchscreen. In the first mode, the touchscreen can have a shield enabled thereon that is configured to reduce a field of view of the touchscreen such that the touchscreen is only visible from specific angle(s). In the second mode, the shield can be disabled such that the touchscreen does not have a reduced field of view. |
| US11302135B1 |
Apparatus for selling cigarettes and system for accessing cigarettes
An apparatus for selling cigarettes and a system for accessing cigarettes are described herein. The apparatus comprises a vending machine and a smoke purification system. The smoke purification system includes a housing, an extraction device, a smoke purifier, and an exhaustion device. An upper face of the housing is provided with an air inlet for sucking in air in an upper space of a smoking room, and a front face of the housing is provided with a fresh air outlet. An intake port of the extraction device is coupled with the air inlet, an escape port of the exhaustion device is coupled with the fresh air outlet through an exhaust channel, and two ends of the smoke purifier are coupled with an escape port of the extraction device and an intake port of the exhaustion device, respectively. |
| US11302133B2 |
Systems and methods for health screening and access
A system for health screening and access to a facility comprises a computer server and a plurality of stations. The computer server and/or each station are configured to: receive input from a touch screen indicating one of a plurality of entrant types, the input being initiated by an individual; receive identification information from a badge scanner; receive a temperature value from a temperature scanner; if the temperature value is above a normal threshold, send a notification to facility staff; if the temperature value is within a normal range, display wellness attestation questions and receive wellness attestation answers; if any wellness attestation answer is adverse, send the notification; if no wellness attestation answer is adverse, for employees, display a question inquiring if the employee needs an item of personal protective equipment (PPE) and receive a PPE answer, and for non-employees, print a label that includes identification information about the individual. |
| US11302130B2 |
Smart locking system with biometrics authentication
A smart locking system with biometrics authentication allows a user with a portable electronic device installed with an application program and a biometrics characteristics extractor. The portable electronic device includes an identification code, a biometric characteristics retrieving module and an input unit. The application program has the identification code registered in a controller of a smart lock device and has the biometric characteristics retrieving module retrieve the biometric characteristics of the user. After matching and authentication of the application program, a password is produced and input into a biometric characteristics button of the input unit correspondingly. When the user is carrying the portable electronic device in the predetermined distance set in a Bluetooth receiver of the electronic device, the device automatically transmits a Bluetooth package to the controller and when the biometric characteristics button is touched and pressed, the controller is activated and operates the lock device via the driving circuit module. |
| US11302126B2 |
Lotte lockbox and parcel management system
A lockbox and parcel management system is implemented in which a lockbox having multiple compartments is controllable via an access device that locks and unlocks respective compartments upon receiving a proper access code input. A user may place an order with an e-commerce service using an e-commerce application or website. The e-commerce service, upon receiving the order, may transmit order information to a lockbox remote service which can communicate with a user device associated with the user who placed the order, the access device for the lockbox, and a deliverer's device from the delivery company. The lockbox remote service or authorized user/owner may set access codes for the deliverer to open and place a parcel in a lockbox's compartment for safe and secure storage until the user arrives home. |
| US11302124B2 |
Method and apparatus for evaluating vehicle, device and computer readable storage medium
Embodiments of the present disclosure provide a method and an apparatus for evaluating a vehicle, a device and a computer readable storage medium. The method includes: determining driving information of the vehicle in an automatic driving mode, the driving information including at least one of trip information, power consumption information and driver state of the vehicle in the automatic driving mode; determining usage situation of the vehicle in the automatic driving mode based on the driving information; and providing the usage situation of the vehicle. |
| US11302120B2 |
Utility vehicle monitoring system
A utility vehicle monitoring system includes a utility vehicle subsystem and a central system, wherein the utility vehicle subsystem is configured to be arranged proximate a part of a utility vehicle, wherein the central system includes a processing unit and an information transmission unit, wherein the central system is positioned independently of the utility vehicle, wherein the utility vehicle subsystem includes a transmitter unit, a receiver unit, a processing system and a sensor system, wherein the sensor system is configured to record at least one dynamic vehicle characteristic value and transmit the value to the processing system, wherein the transmitter unit and the receiver unit are configured to transmit the at least one dynamic vehicle characteristic value from the processing system to the central system. |
| US11302116B2 |
Device interface extraction
A system and method for visually automated interface integration that includes collecting image data; detecting a device interface source in the image data; processing the image data associated with the device interface source into an extracted interface representation; and exposing at least one access interface to the extracted interface representation. |
| US11302099B2 |
Method and device for recognizing states of electrical devices
Embodiments of the present disclosure provide a method and device for recognizing a state of an electrical device. The method includes obtaining an image of the electrical device in a field, wherein the electrical device is disposed on a plane of a predefined polygon in the field; obtaining an original appearance image of the electrical device in the field by recovering the predefined polygon in the image to an original appearance of the predefined polygon; and determining the state of the electrical device based on the original appearance image of the electrical device in the field. |
| US11302098B2 |
System for identification of marine mammalian species present at an offshore construction site
A system for supporting timely, informed decision making with respect to commencing and terminating offshore construction operations within a predetermined zone using a situational awareness tool not compromised by weather, poor-visibility, or a simple protected species observer (PSO) conundrum of not being able to see all things at all times, and for identification of marine mammalian species present at an offshore construction site that is sensor and platform agnostic comprises a plurality of sensors, a predetermined subset of the plurality of sensors operational without requiring daylight, the sensors operative to deliver data from which targets are determined and from which their position information can be derived; a data communicator operative to allow provide real-time data to a data viewer; a data processor operatively in communication with the plurality of sensors and the data communicator; and a display operatively in communication with the data communicator and operative to display a representation of real-time data, the display comprising a visual interface operatively connected to the data processor and comprising a human machine interface centralized display. |
| US11302096B2 |
Determining model-related bias associated with training data
Methods, systems, and computer program products for determining model-related bias associated with training data are provided herein. A computer-implemented method includes obtaining, via execution of a first model, class designations attributed to data points used to train the first model; identifying any of the data points associated with an inaccurate class designation and/or a low-confidence class designation; training a second model using the data points from the dataset, but excluding the identified data points; determining bias related to at least a portion of those data points used to train the second model by: modifying one or more of the data points used to train the second model; executing the first model using the modified data points; and identifying a change to one or more class designations attributed to the modified data points as compared to before the modifying; and outputting identifying information pertaining to the determined bias. |
| US11302093B2 |
Text detection, caret tracking, and active element detection
Detection of typed and/or pasted text, caret tracking, and active element detection for a computing system are disclosed. The location on the screen associated with a computing system where the user has been typing or pasting text, potentially including hot keys or other keys that do not cause visible characters to appear, can be identified and the physical position on the screen where typing or pasting occurred can be provided based on the current resolution of where one or more characters appeared, where the cursor was blinking, or both. This can be done by identifying locations on the screen where changes occurred and performing text recognition and/or caret detection on these locations. The physical position of the typing or pasting activity allows determination of an active or focused element in an application displayed on the screen. |
| US11302090B2 |
Manoeuvring items into a boot space
A first set of dimensions can be derived corresponding to a real-world space and a second set of dimensions can be derived corresponding to a first physical item in the real-world. Further included is deriving a virtual representation of the real-world space from the first set of dimensions in a virtual environment and deriving a virtual representation of the first physical item from the second set of dimensions in the virtual environment. The virtual representation of the real-world space is represented as a hollow space, and the virtual representation of the first physical item is represented as a solid item that is user-manipulatable within the virtual environment and the virtual representation of the real-world space. |
| US11302089B2 |
Computer-implemented methods, computer-readable media and electronic devices for virtual control of agricultural devices
A method for controlling a plurality of mobile agricultural devices that includes establishing electronic communication with a plurality of transceivers mounted to the mobile agricultural devices. The method also includes building a three-dimensional model including a virtual representation of each of the mobile agricultural devices and displaying the three-dimensional model at a user interface having a display. The method further includes receiving location data regarding the mobile agricultural devices via the transceivers and adjusting at least one of the virtual representations of the mobile agricultural devices within the model to reflect the location data. The method still further includes receiving, via the user interface, a user input comprising a command relating to operation of a first one of the mobile agricultural devices and transmitting the user input command to one of the transceivers, which is mounted to the first mobile agricultural device, so as to implement a change in operation of the first mobile agricultural device. |
| US11302086B1 |
Providing features of an electronic product in an augmented reality environment
The present disclosure relates to providing a software feature of an electronic product in an augmented reality (AR) environment. In some embodiments, images are obtained using one or more image sensors, a determination is made whether the obtained images include printed media depicting the electronic product, when the obtained images include the printed media depicting the electronic product, a virtual object corresponding to the electronic product is displayed in the AR environment, and the software feature of the electronic product is provided with the virtual object. |
| US11302085B2 |
Artificial reality collaborative working environments
Aspects of the present disclosure are directed to creating and administering artificial reality collaborative working environments and providing interaction modes for them. An XR work system can provide and control such artificial reality collaborative working environments to enable, for example, A) links between real-world surfaces and XR surfaces; B) links between multiple real-world areas to XR areas with dedicated functionality; C) maintaining access, while inside the artificial reality working environment, to real-world work tools such as the user's computer screen and keyboard; D) various hand and controller modes for different interaction and collaboration modalities; E) use-based, multi-desk collaborative room configurations; and F) context-based auto population of users and content items into the artificial reality working environment. |
| US11302082B2 |
Media tags—location-anchored digital media for augmented reality and virtual reality environments
Provided herein are exemplary embodiments directed to a method for creating digital media, including the placing the digital media in a computer graphics environment, the computer graphics environment further comprising visually perceptible elements appearing as real objects placed in a real world setting, and viewing the digital media when at the real world setting. Various exemplary systems include an augmented reality and virtual reality server connected to a network, and a client device connected to the network, the client device having an augmented reality and virtual reality application. Further exemplary systems include a body or motion sensor connected to the client device and/or an augmented reality and virtual reality interface connected to the client device. |
| US11302081B2 |
Caching and updating of dense 3D reconstruction data
A method to efficiently update and manage outputs of real time or offline 3D reconstruction and scanning in a mobile device having limited resource and connection to the Internet is provided. The method makes available to a wide variety of mobile XR applications fresh, accurate and comprehensive 3D reconstruction data, in either single user applications or multi-user applications sharing and updating the same 3D reconstruction data. The method includes a block-based 3D data representation that allows local update and maintains neighbor consistency at the same time, and a multi-layer caching mechanism that retrieves, prefetches, and stores 3D data efficiently for XR applications. Between sessions of an XR device, blocks may be persisted on the device or in remote storage in one or more cache layers. The device may, upon starting a new session, selectively use the blocks from one or more layers of the cache. |
| US11302080B1 |
Planner for an objective-effectuator
In some implementations, a method includes obtaining an objective for a computer-generated reality (CGR) representation of an objective-effectuator. In some implementations, the objective is associated with a plurality of time frames. In some implementations, the method includes determining a plurality of candidate plans that satisfy the objective. In some implementations, the method includes selecting a first candidate plan of the plurality of candidate plans based on a selection criterion. In some implementations, the method includes effectuating the first candidate plan in order to satisfy the objective. In some implementations, the first candidate plan triggers the CGR representation of the objective-effectuator to perform a series of actions over the plurality of time frames associated with the objective. |
| US11302074B2 |
Mobile device 3-dimensional modeling
Implementations generally relate to 3D modeling. In some implementations, a method includes displaying a live video of a scene on a device with a user interface overlay on top of the scene, wherein the user interface overlay includes one or more objects and includes one or more selectable controls. The method further includes receiving a selection of one or more new virtual points on a target object, wherein the target object is one object of the one or more objects in an image. The method further includes generating 3D polygonal data, wherein the 3D polygonal data is saved as a 3-dimensional (3D) model. |
| US11302072B2 |
System for constructing urban design digital sand table
A system for constructing an urban design digital sand table, the system includes the following modules. A sand table environment constructing module, configured to construct a digital environment of the urban design sand table. An element grading display module, configured to perform hierarchical management on urban design elements, and perform visual hierarchical display. A spatial indicator interpretation module, configured to articulate names, algorithms, and attributes for indicators in an indicator library of the urban design digital sand table. A spatial calculation tool module, configured to load a toolkit to calculate a selected range in the digital sand table. An offline data extraction module, configured to extract the data of the digital sand table so as to export two-dimensional or three-dimensional spatial data in an offline mode. A dynamic real-time editing module, configured to perform real-time editing operation on an urban digital design scheme loaded in the system. |
| US11302067B2 |
Systems and method for realistic augmented reality (AR) lighting effects
Realistic augmented reality (AR) augmentations are produced in reliance on a 3D virtual model modeled after a real world environment. Light and shadow parameters for the augmentations are produced not only from real world parameters such as, for example, a real present position of the actual sun, but also from virtual world parameters which characterize the virtual model or virtual objects within the virtual model. |
| US11302064B2 |
Method and apparatus for reconstructing three-dimensional model of human body, and storage medium
Embodiments of this application disclose a method and an apparatus for reconstructing a three-dimensional model of a human body, and a storage medium. The method includes obtaining a two-dimensional image of a human body part to be reconstructed; mapping the two-dimensional image to a voxel space, to obtain a voxelized result of the two-dimensional image; obtaining three-dimensional morphable model parameters corresponding to the two-dimensional image based on calculating the voxelized result using a preset three-dimensional parameter regression network; and reconstructing a three-dimensional model of the human body part based on the three-dimensional morphable model parameters. |
| US11302061B2 |
Image processing apparatus and method, for gerneration of a three-dimensional model used for generating a virtual viewpoint image
An image processing apparatus includes an acquisition unit configured to acquire a three-dimensional shape data of an object based on images captured by a plurality of cameras, a generation unit configured to generate information based on a relationship between the three-dimensional shape data acquired by the acquisition unit and positions of the plurality of cameras, and a correction unit configured to correct the three-dimensional shape data based on the information generated by the generation unit. |
| US11302060B2 |
Method and system for vector-raster overlay analysis of ground surface image area based on edge clipping
A method and a system for vector-raster overlay analysis of a ground surface image area based on edge clipping are provided. A large amount of computing resources is required during the calculation of extracting a ground surface image area using the vector-raster overlay analysis and a loss of accuracy is resulted when vector data is converted into raster data, thereby leading to the issue of calculation error of a polygon surface area. The disclosure adopts the vector-raster overlay analysis method while cropping an edge vector polygon of the ground surface image to be measured and allocating an attribute value of the image according to a pixel, so as to accurately calculate the ground surface image area without drastically increasing the amount of calculation, thereby achieving the function of improving the accuracy and efficiency of calculating the ground surface image area. |
| US11302055B2 |
Distributed processing in computer generated reality system
Techniques are disclosed relating to display devices. In some embodiments, a display device includes a display system configured to display three-dimensional content to a user. The display device is configured to discover, via a network interface, one or more compute nodes operable to facilitate rendering the three-dimensional content and receive information identifying abilities of the one or more compute nodes to facilitate the rendering. Based on the received information, the display device evaluates a set of tasks to identify one or more of the tasks to offload to the one or more compute nodes for facilitating the rendering and distributes, via the network interface, the identified one or more tasks to the one or more compute nodes for processing by the one or more compute nodes. |
| US11302052B2 |
Forced contiguous data for execution of evaluation logic used in animation control
An aspect provides a computer-implemented method for constructing evaluation logic associated with an animation software package. The method comprises receiving at least one software module, the at least one software module including at least one evaluator; writing the at least one software module to at least one executable code object; and maintaining data for the at least one software module in a contiguous block of memory for use by the software module. |
| US11302050B2 |
Systems and methods for applying effects to design elements
Described herein is a computer implemented method. The method comprises detecting user input activating a text effect selection control. In response to the first user input the method further comprises: automatically generating and displaying a first shadow for a selected design element, the first shadow having a first colour, a first offset value, and a first direction; and automatically generating and displaying a second shadow for the selected design element, the second shadow having a second colour, the first offset value, and a second direction, the second direction being opposite the first direction. |
| US11302046B2 |
Low power virtual reality presence monitoring and notification
Systems and methods for low power virtual reality (VR) presence monitoring and notification via a VR headset worn by a user entail a number of aspects. In an embodiment, a person is detected entering a physical location occupied by the user of the VR headset during a VR session. This detection may occur via one or more sensors on the VR headset. In response to detecting that a person has entered the location, a representation of the person is generated and displayed to the user via the VR headset as part of the VR session. In this way, the headset user may be made aware of people in their physical environment without necessarily leaving the VR session. |
| US11302044B2 |
Method of determining contrast phase of a computerized tomography image
A computer-implemented method for classifying and presenting a contrast phase (CP) of a contrast enhanced computerized tomography (CECT) scan is provided. The method includes training an artificial intelligence (AI) algorithm utilizing a set of CPs labeled CECT data to associate a set of characteristics of the data with a probability associated with the CP. The method includes receiving a new set of unlabeled CECT data, and applying the AI algorithm to the new unlabeled CECT data to associate a first probability of a first CP and a second probability of a second CP. The method also includes providing a graphical representation including the first probability of the first CP and the second probability of the second CP. |
| US11302043B2 |
Automated detection of shadow artifacts in optical coherence tomography angiography
Disclosed herein are methods and systems for automated detection of shadow artifacts in optical coherence tomography (OCT) and/or OCT angiography (OCTA). The shadow detection includes applying a machine-learning algorithm to the OCT dataset and the OCTA dataset to detect one or more shadow artifacts in the sample. The machine-learning algorithm is trained with first training data from first training samples that include manufactured shadows and no perfusion defects and second training data from second training samples that include perfusion defects and no manufactured shadows. The shadow artifacts in the OCTA dataset and/or OCT dataset may be suppressed to generate a shadow-suppressed OCTA dataset and/or a shadow-suppressed OCT dataset, respectively. Other embodiments may be described and claimed. |
| US11302040B2 |
System and method for providing weather effect in image
A system and method for providing a weather effect in an image includes selecting at least one weather texture image indicating weather, and providing a weather effect in the image by overlapping the selected weather texture image on the image. |
| US11302039B2 |
Waveform analyzer
A model constructed by a training process using the technique of deep learning using the training data including images created from a large number of chromatograms and correct peak information is previously stored in a trained model storage section. When chromatogram data for a target sample acquired with an LC measurement unit are inputted, an image creator converts the chromatogram into an image and creates an input image in which one of the two areas divided by the chromatogram curve as the boundary in the image is filled. A peak position estimator inputs the pixel values of the input image into a trained model using a neural network, and obtains the position information of the starting point and/or ending point of the peak and a peak detection confidence as the output. A peak determiner determines the starting point and/or ending point of each peak based on the peak detection confidence. |
| US11302036B2 |
Color conversion between color spaces using reduced dimension embeddings
Exemplary embodiments may provide an approach to converting multidimensional color data for an image encoded in a first color space into an intermediate form that is a single dimensional value. The exemplary embodiments may then decode the intermediate form value to produce an encoding of the color data that is encoded in a second color space that differs from the first color space. In this manner, the data for the image may be efficiently converted from an encoding in the first color space into an encoding in the second color space. |
| US11302029B2 |
Information processing apparatus, information processing system, information processing method, and program
An information processing apparatus is connected to a first information acquisition apparatus that acquires first information relating to at least one of a position or a pose of a hand of a target person and a second information acquisition apparatus that acquires second information relating to at least one of the position or the pose of the hand of the target person and different from the first information acquired by the first information acquisition apparatus. The information processing apparatus accepts the first information and the second information from the first and second information acquisition apparatuses, respectively, retains the accepted first and second information in an associated relationship with information of timings at which the first and second information acquisition apparatuses acquire the first and second information, respectively, and extracts pieces of the first and second information acquired at a common timing from the retained first and second information as pair information. |
| US11302019B2 |
Information processing apparatus and non-transitory computer readable medium
An information processing apparatus includes a processor configured to acquire three-dimensional-shape data that is data for a three-dimensional body and that represents a shape of a three-dimensional object, set in advance a feature requirement that indicates one or more features concerning a cross section of the three-dimensional body, detect one or more features that satisfy the feature requirement in the three-dimensional-shape data, and output information regarding the one or more features detected in the three-dimensional-shape data. |
| US11302016B2 |
Determination method, determination system, determination device, and program
The present invention addresses the problem of providing a technique for determining the authenticity of a product without requiring a special device such as an integrated circuit (IC) tag. A means for solving this problem according to the invention is characterized by determining the authenticity of a target product on the basis of the validity of the association between the body of the product and a surface-treated component that is mounted to the body and that has been validated. |
| US11302013B2 |
System and method for identifying features of a friction ridge signature based on information representing a topography of friction ridges
One or more features of a friction ridge signature of a subject may be identified based on information representing a three-dimensional topography of friction ridges of the subject. Information representing the three-dimensional topography of the friction ridges of the subject may be received. One or more level-three features of the friction ridge signature of the subject may be identified based on the information representing the three-dimensional topography of the friction ridges of the subject. The one or more level-three features may include one or more topographical ridge peaks, topographical ridge notches, topographical ridge passes, pores, and/or other information. |
| US11302012B2 |
Systems and methods for transparent object segmentation using polarization cues
A computer-implemented method for computing a prediction on images of a scene includes: receiving one or more polarization raw frames of a scene, the polarization raw frames being captured with a polarizing filter at a different linear polarization angle; extracting one or more first tensors in one or more polarization representation spaces from the polarization raw frames; and computing a prediction regarding one or more optically challenging objects in the scene based on the one or more first tensors in the one or more polarization representation spaces. |
| US11302011B2 |
Perspective conversion for multi-dimensional data analysis
Multi-dimensional data can be mapped to a projection shape and converted for image analysis. In some examples, the multi-dimensional data may include data captured by a LIDAR system for use in conjunction with a perception system for an autonomous vehicle. Converting operations can include converting three-dimensional LIDAR data to multi-channel two-dimensional data. Data points of the multi-dimensional data can be mapped to a projection shape, such as a sphere. Characteristics of the projection shape may include a shape, a field of view, a resolution, and a projection type. After data is mapped to the projection shape, the projection shape can be converted to a multi-channel, two-dimensional image. Image segmentation and classification may be performed on the two-dimensional data. Further, segmentation information may be used to segment the three-dimensional LIDAR data, while a rendering plane may be positioned relative to the segmented data to perform classification on a per-object basis. |
| US11302010B2 |
Gas-detection image processing device, gas-detection image processing method, and gas-detection image processing program
A gas-detection image processing device includes first, second, and third processors. The first processor generates a plurality of first images by applying processing to extract a gas candidate region to each of a plurality of infrared images captured in time series during a predetermined period. The second processor generates a second image, while using the first images, by applying processing to extract an appearance region indicating that a gas candidate region has appeared in at least a part of the predetermined period. The second processor generates two or more second images by applying the processing to extract the appearance region to the first images generated in a manner corresponding to two or more of the predetermined periods respectively. The third processor generates a third image by applying processing to extract a common region of the appearance regions while using the two or more of the second images. |
| US11302009B2 |
Method of image processing using a neural network
A method of generating landmark locations for an image crop comprises: processing the crop through an encoder-decoder to provide a plurality of N output maps of comparable spatial resolution to the crop, each output map corresponding to a respective landmark of an object appearing in the image crop; processing an output map from the encoder through a plurality of feed forward layers to provide a feature vector comprising N elements, each element including an (x,y) location for a respective landmark. Any landmarks locations from the feature vector having an x or a y location outside a range for a respective row or column of the crop are selected for a final set of landmark locations; with remaining landmark locations tending to be selected from the N (x,y) landmark locations from the plurality of N output maps. |
| US11302003B2 |
Deep learning based data-driven approach for attenuation correction of pet data
The present disclosure includes systems and methods for creating positron emission tomography (PET) images. The method includes receiving at least one PET image of a subject created from PET data acquired from the subject, creating an attenuation correction map using the at least one PET image, and reconstructing PET data using the attenuation correction map and the at least one PET image to generate an attenuation corrected PET image. |
| US11301995B2 |
Feature identification in medical imaging
Presented are concepts for feature identification in medical imaging of a subject. One such concept processes a medical image with a Bayesian deep learning network to determine a first image feature of interest and an associated uncertainty value, the first image feature being located in a first sub-region of the image. It also processes the medical image with a generative adversarial network to determine a second image feature of interest within the first sub-region of the image and an associated uncertainty value. Based on the first and second image features and their associated uncertainty values, the first sub-region of the image is classified. |
| US11301990B2 |
Borescope inspection method and device
A method for borescope inspection of a component uses a stereo borescope for recording the component. The method includes: generating two stereoscopic partial images by means of the stereo borescope; calculating 3D triangulation data from the two stereoscopic partial images; registering the 3D triangulation data to a 3D CAD reference model of the component captured by the stereo borescope, while determining a projection point; projecting 2D image data determined from the two stereoscopic partial images onto the 3D CAD reference model from the determined projection point; and determining damage by image analysis of the projected 2D image data and by ascertaining deviations of the registered 3D triangulation data vis-à-vis the 3D CAD reference model. |
| US11301987B2 |
Determining locations of suspected defects
A method, a non-transitory computer readable medium and a detection system for determining locations of suspected defects of a substrate. |
| US11301986B2 |
Method and apparatus for monitoring plant health state
A method for monitoring a plant health state relates to the technical field of intelligent agriculture. The method is used for intelligently determining the plant health state and timely prompting farmland managers to perform control for at least one plant in a poor plant health state. The method for monitoring the plant health state includes: performing first determination according to plant health state information; when a determination result is that there is a risk of poor plant health, performing second determination according to second plant health state information in an orientation where at least one plant at risk of poor plant health is located, so as to accurately obtain plant health state information, such that farmland managers can learn the current situation of the plant in a field timely and perform control timely. An apparatus applying the method for monitoring the plant health state is provided. The apparatus is used for monitoring the plant health state. |
| US11301984B1 |
System to determine user interaction with fixture
Sensors in a facility obtain sensor data about a user's interaction with a fixture, such as a shelf. The sensor data may include images such as obtained from overhead cameras, weight changes from weight sensors at the shelf, and so forth. Based on the sensor data, one or more hypotheses that indicate the items and quantity may be determined and assessed. The hypotheses may be based on information such as the location of a user and where their hands are, weight changes, physical layout data indicative of where items are stowed, cart data indicative of what items are in the possession of the user, and so forth. A hypothesis having a greatest confidence value may be deemed to be representative of the user's interaction, and interaction data indicative of the item and quantity may be stored. |
| US11301975B2 |
Apparatus, control method, and storage medium
An apparatus including a first memory area and a second memory area is provided with a control method including specifying one or a plurality of types of image processing to be applied in the first memory area, specifying a size of obtainment target image data as a predetermined size based on a memory capacity of the second memory area and a content of the specified one or plurality of types of image processing; and obtaining first divided image data having the specified predetermined size in predetermined image data. |
| US11301973B2 |
Tone mapping method
A method of performing tone mapping in a stream of images (Fr1 . . . N) includes, for each image (FrN) in the stream: sparsely reading image data values (IDN) corresponding to the image (FrN) to provide sparse image data from a plurality of sparsely distributed positions (Pos1 . . . k) in the image (FrN); generating, based on the sparse image data, tone mapping parameters of a tone mapping algorithm (TMA) for each position in the image (FrN); each position in the image (FrN) including the sparsely distributed positions (Pos1 . . . k) and a plurality of further positions (PosF1 . . . j) in the image (FrN); reading the image data values (IDN) corresponding to the image (FrN) to provide image data from each position in the image (FrN); and tone mapping the image by mapping the image data from each position in the image (FrN) to adjusted image data using the generated tone mapping parameters. |
| US11301965B2 |
Method and image processing device for image super resolution, image enhancement, and convolutional neural network model training
The disclosure provides methods and image processing devices for image super resolution, image enhancement, and convolutional neural network (CNN) model training. The method for image super resolution includes the following steps. An original image is received, and a feature map is extracted from the original image. The original image is segmented into original patches. Each of the original patches is classified respectively into one of patch clusters according to the feature map. The original patches are processed respectively by different pre-trained CNN models according to the belonging patch clusters to obtain predicted patches. A predicted image is generated based on the predicted patches. |
| US11301961B2 |
Medical signal processing apparatus and model learning apparatus
According to one embodiment, medical signal processing apparatus includes a processing circuit. The processing circuit adjust a level of activation of a unit included in a learned model in accordance with classification of an imaging condition for a process target medical signal. The processing circuit generates an output signal by applying the learned model in which the level of activation has been adjusted, to the medical signal. |
| US11301960B2 |
Object recognition based image filters
Systems and methods for distributing photo filters based on the location of the object in the image are described. A photo filter publication system detects that a client device in communication with the system has captured an image, identifies an object in the image, identifies a location of the object in the image, identifies an image overlay associated with the identified location and having object criteria satisfied by the identified object, and provides the identified image overlay to the client device. |
| US11301959B2 |
Spherical rotation for encoding wide view video
Spherical rotation is described for encoding a video that has a wide field of view, such as a spherical or hemispherical video. One example relates to receiving encoded video including rotation orientation metadata, decoding the video, extracting the rotation orientation metadata, rotating the decoded video based on the rotation orientation metadata, generating a view of the rotated decoded video, and buffering the generated view for display. |
| US11301958B2 |
Image processing apparatus, image processing method, and imaging apparatus
Provided are an image processing apparatus, an image processing method, and an imaging apparatus. An image processing apparatus includes a demosaic processing unit configured to apply demosaic processing to a mosaic image having a first number of colors to generate a multispectral image having a second number of colors equal to or more than three but less than the first number of colors. |
| US11301954B2 |
Method for detecting collision between cylindrical collider and convex body in real-time virtual scenario, terminal, and storage medium
A method for detecting a collision between a cylindrical collider and a convex body in a real-time virtual scenario performed at a computer includes: determining a location of a cylindrical collider corresponding to a virtual object in a virtual scenario in a local coordinate system of a convex body; obtaining a projection of the cylindrical collider on one or more testing axes according to the location of the cylindrical collider in the local coordinate system of the convex body; when the projections of the cylindrical collider and the convex body intersect with each other on each testing axis, determining that there is a collision between the cylindrical collider and the convex body and moving the cylindrical collider away from the convex body in the real-time virtual scenario to avoid the collision. |
| US11301952B2 |
Full screen processing in multi-application environments
Systems and methods for determining a foreground application and at least one background application from multiple graphics applications executing within an execution environment are disclosed. Pixel data rendered by the foreground application may be displayed in the execution environment while a rendering thread of the background application may be paused. |
| US11301950B2 |
Systems and methods for providing a visible watermark in a remote session
Systems and methods for providing a visible watermark in a remote session. The methods comprise: determining if a graphic update needs to be made at a client computing device during the remote session; generating a first graphic update message in response to a determination that a graphic update is needed; identifying pixels of the graphic which would be affected by at least one watermark if the graphic and watermark were both displayed on a screen of the client computing device; constructing a second string of commands specifying a new color value for each of the pixels that were previously identified; converting the first graphic update message to a second graphic update message by inserting the second string of commands in between a first string of commands and an End-Of-Frame (“EOF”) command; and communicating the second graphic update message from the sever to the client computing device. |
| US11301946B2 |
Intelligent career monitoring and correction in a computing environment
Embodiments for intelligent career planning assessment in a computing environment by a processor. A career planning pathway of a career planning model for a user may be monitored for achieving a career goal. One or more deviations from the career planning pathway may be identified according a user profile, one or more behaviors of the user, one or more environmental factors, or a combination thereof. |
| US11301944B2 |
Configuring classroom physical resources
A computer-implemented method modifies physical classroom resources in a classroom. One or more processors identify and quantify physical classroom resources in the classroom based on sensor readings received from sensors in a classroom. The processor(s) determine physical classroom resource constraints that impede learning by students in the classroom based on the sensor readings from the sensors in the classroom. The processor(s) detect one or more of the physical classroom resource constraints in the physical classroom resources identified by the sensor readings, and then adjust the one or more physical classroom resources based on the one or more detected physical classroom resource constraints. |
| US11301942B2 |
Method for trading electrical energy between small producers and end users
A device for controlling the feeding and discharging of electrical energy in or from a small producer network having at least one energy producer and at least one energy consumer. The device includes a transaction unit for communicating with at least one electronic energy trade prospect in order to negotiate and/or to define a transaction of a predefined quantity of energy; a measuring system for measuring a quantity of fed or discharged energy; a control system, which is in communication with the measuring system, designed to feed or to discharge the predefined quantity of energy via an electrical cable and controlled via a logic unit. |
| US11301940B2 |
Transaction tracking and display
A transaction tracking system includes a display that permits viewing the relationship between related transactions. In the display, individual transactions are depicted as transaction icons sorted in time order horizontal rows according to order ID. |
| US11301934B2 |
24 hours global low latency computerized exchange system
The present technology relates to distributed computerized exchange systems for trading of financial instruments. In particular it relates to a passive matching engine and an active matching engine that cooperates in handling data messages such that less bandwidth is used and so that improvement in latency can be achieved. |
| US11301933B2 |
Method for providing united point service using updated status of balance database with blockchain and server using the same
A method of registering a point distributor and an exchange rate for a united point service is provided. The method includes steps of: a system managing server (a) verifying a registration transaction TrxA or a confirmation transaction TrxB if (i) a condition that the TrxA having a public key of a point managing server, and a first XEA, an exchange rate of a point A of a point distributor to the united point, is acquired from a point distributing server, or (ii) a condition that the TrxB having a public key of the point distributing server and a second XEA is acquired from the point managing server, is satisfied; and (b) if the TrxA or the TrxB is valid, (i) recording it on a blockchain database, (ii) initializing a balance database by updating a balance of the point distributor, and (iii) acquiring a transaction ID of the TrxA, the TrxB. |
| US11301931B2 |
Systems and methods for providing user-specific dynamic content for facilitating online transactions
Methods and systems for automatically providing dynamic content for facilitating a transaction are described herein. An online marketplace is accessed by a client device over a network. A user identifier associated with the client device is passed to a payment service provider via a merchant system associated with the online market place. Dynamic content is generated by the payment service provider in response to the user identifier and subsequently served to the client device over the network. |
| US11301930B1 |
Systems and methods for integrating, aggregating and utilizing data from a plurality of data sources
A method of integrating electronic data including integrating a desktop such that the desktop includes information received from various sources. The information displayed may be analyzed by a business rule to prioritize what information is included in the desktop, and the information may include data from databases, recent member activities, planned future actions, and recommended future actions. The method also includes the ability to integrate and/or aggregate various data sources, such as databases. The combination of the data sources may be performed according to one or more business rules. |
| US11301927B2 |
Art market pricing and commission platform method, non-transitory machine-readable medium, and system for using the same
An art market pricing and commission system for the fine art market is disclosed. The art market pricing and commission system allows artists and collectors to see how others are reacting to particular pieces of artwork in real time. The art market pricing and commission system creates an electronic ledger and official photographic record that authenticates works of art now and into the future. The art market pricing and commission system encourages individuals to participate in determining what is good and valuable and create a cohesive, thriving market. The art market pricing and commission system is deployed as an Internet platform that combines a specific pricing structure with a special commission system to incentivize user interaction, assign value to works of art and create a transparent, thriving market. |
| US11301926B1 |
Computer architecture and process for implementing load caps for auctioning of basic generation services
A system for conducting a computer-based, simultaneous, multiple round, descending clock auction for basic generation services includes a web server for receiving bid data for one or more users for basic generation service products, an application server host application software, which processes the one or more bids according to at least one auction rule, tracks the auction, monitors the auction, and/or determines when to end the auction, and a database server, which stores auction data. A method of conducting a computer-based, simultaneous, multiple round, descending clock auction for basic generation services includes the repeating steps of receiving bids indicating desired tranche units of basic generation service products, calculating next round prices for each product, and sending round results to bidders. The system for and method of conducting a computer-based auction includes limiting the qualified bidders by a load cap to a maximum number of tranches bid during a round. |
| US11301925B1 |
User interface for presenting provider information to designers and/or authors
User interface technology related to a composite file or page (e.g., Webpage) including information from various entities (e.g., physical product providers) may be improved by providing a composite score (determined from one or more constituent parts) for each of the entities in a way that occupies less space than would otherwise been needed if constituent scores of each of the entities were provided. Such example embodiments may also improve user interface technology by reducing the cognitive load on a user reviewing information presented on a composite Webpage. This, in turn, reduces “friction” related to using and interacting with such a composite Webpage. Such example embodiments may also improve user interface technology by presenting information from various different entities in a uniform manner, with a consistent look and feel. |
| US11301924B2 |
Generating catalog-item recommendations based on social graph data
In one embodiment, a method includes accessing one or more order parameters associated with a first user, the order parameters including one or more user-specified parameters. The method includes determining a user preference vector for the first user. The method includes accessing references to catalog items offered by one or more vendors. Each reference is associated with one or more metadata items provided by the respective vendor. The method includes providing a first reference to a client system of the first user based on at least a comparison of the one or more order parameters, the user preference vector, and the one or more metadata items corresponding to the first reference. |
| US11301923B2 |
Automatic web browsing in electronic messaging interface method and apparatus
Disclosed are systems and methods for improving interactions with and between computers in content generating, searching, hosting and/or providing systems supported by or configured with personal computing devices, servers and/or platforms. The systems interact to identify and retrieve data within or across platforms, which can be used to improve the quality of data used in processing interactions between or among processors in such systems. The disclosed systems and methods provide systems and methods for automatically allowing web browsing in a user interface of an electronic messaging system. The disclosed systems and methods automatically display electronic messages containing item information displayed in an electronic message in place of any web page links associated with the item enabling browsing of the item information from within the electronic messaging system's user interface. |
| US11301920B2 |
Providing gesture functionality
Gesture functionality is provided in a computing environment. In example embodiments, a gesture input is received. A style difference is identified between a known gesture input of a set of known gesture inputs and the received gesture input. The set of known gesture inputs is caused to be modified to include the style difference by updating a database that stores the set of known gesture inputs. |
| US11301917B2 |
Three-dimensional heat map apparel recommendation
Devices, systems, and methods include a three-dimensional (3D) scanning element, an electronic data storage configured to store a database including fields for 3D scan data and demographic information, a processor, and a user interface. In an example, the processor obtains 3D scan data of a body part of a subject from the 3D scanning element, analyzes the 3D scan data for incomplete regions, generate a composite 3D image of 3D scan data from the database based on similarities of demographic information, and overlays composite 3D image regions corresponding to incomplete regions on the 3D scan data. |
| US11301912B2 |
Methods and systems for virtual fitting rooms or hybrid stores
Disclosed are a system comprising a computer-readable storage medium storing at least one program, and a computer-implemented method for digital inventories. An application interface module receives a request message from a user device at a physical store location linked to an online marketplace. The request message indicates a request to determine availability of a target item at the physical store location. The user device is linked to a user. In response to the request message, a database management module accesses inventory data of the online marketplace. An inventory engine determines whether the target item is available at the physical store location. Based on a determination that the target item is not available at the target store, a graphics processing module generates a digital representation of the user and the target item for display within a user interface rendered on the user device. |
| US11301908B2 |
System and method for providing contextual summaries in interaction transfer
A system and method are presented for providing a contextual summary of an interaction between a first party and a second party over a media channel in an interaction transfer to a third party. A request is received to transfer an interaction to the third party, the request being triggered from the interaction. A text transcript of the interaction is obtained. The text transcript is processed to obtain the contextual summary and metadata, which is provided to the third party for handling the interaction with the interaction transfer. The contextual summary is provided by a contextual summarizer, which comprises a custom plurality of application programming interfaces (APIs). The plurality of APIs comprises at least one of: a text summarizer API, a churn predictor API, a sentiment analysis API, a next best action API, and an interaction reference detector API. |
| US11301907B2 |
Dynamic image service
Aspects of the subject disclosure may include, for example, a method comprising obtaining, by a processing system including a processor, device design information for a device depicted in media content; obtaining a first image for inclusion in a depiction of the device; and obtaining display information regarding an apparent size and orientation of a display of the depicted device. The processing system adjusts the first image in accordance with the device design information and the display information, and inserts the adjusted first image into the media content, thereby generating a second image comprising the display of the depicted device with the adjusted first image shown on the display. The method also includes altering the adjusted first image in accordance with changes in the apparent size or orientation of the display of the depicted device, and delivering the second image to a user device. Other embodiments are disclosed. |
| US11301905B2 |
Heuristic clustering
Methods and apparatus are disclosed regarding an e-commerce system that places customers into a plurality of clusters and tailors services provided to a customer based on the cluster in which the customer is placed. In one embodiment, the e-commerce system defines the clusters based on purchase history data for customers having sufficient purchase history data. The e-commerce system then places customers without sufficient purchase history data into one of the defined clusters based on demographic data for the customer and demographic data for the customers in the cluster. |
| US11301901B2 |
Advertisement delivery system, information processing device, and advertisement distribution device
It is an object of the present disclosure to provide more appropriate advertisement information for each of a plurality of users sharing a specific space. The advertisement delivery system provides advertisement information to each user existing in a specific space shared by a plurality of users having a specific purpose. In this advertisement delivery system, an information processing device generates advertisement information for each user based on an attribute of a specific space associated with a specific purpose and an attribute of each user associated with the specific purpose. The advertisement distribution device arranged in a specific space receives advertisement information for each user from the information processing device and transmits the received advertisement information to the user terminal associated with the user to be provided. |
| US11301894B2 |
Systems, methods, and media for detecting suspicious activity
Systems, methods, and media for detecting suspicious activity in connection with advertisement impressions are provided. In some embodiments, the method includes: collecting advertisement impression information associated with a plurality of pages; determining, from the collected advertisement impression information, an indication of whether a browser application detected that an advertisement displayed on a webpage was viewable in a browser window; determining, from the collected advertisement impression information, a plurality of viewability statistics for each of the plurality of pages, wherein each viewability statistic indicates a likelihood of whether an advertisement displayed on a webpage was viewable in a browser window; comparing the plurality of viewability statistics with the indication from the browser application; determining a viewability score for the advertisement impression based on the comparison; and identifying the advertisement impression as likely to be suspicious based on the determined viewability score. |
| US11301887B2 |
Recommendation engine for rideshare system and vehicle routing
Embodiments disclosed herein generally related to a system and method for rideshare vehicle routing. A computing system receives, from one or more facilities, one or more transaction requests associated with one or more accounts of an organization associated with the computing system. The computing system maps one or more customers to a respective transaction request. For each facility of the one or more facilities, the computing device identifies a geographic location thereof. The computing system categorizes each of the one or more facilities into one or more boundaries. For each boundary, the computing system determines an estimated number of rideshare vehicles to deploy, based at least on a transaction history of each customer of the one or more customers. The computing system transmits the estimated number of rideshare vehicles to be deployed to each boundary to a rideshare computing system. |
| US11301884B2 |
Seed population diffusion method, device, information delivery system and storage medium
Embodiments of this application provide a seed group spreading method performed at a server. The method includes the following steps: obtaining a positive sample set; obtaining a negative sample set; concatenating each positive sample in the positive sample set with a corresponding positive sample feature to form a positive sample feature vector, and concatenating each negative sample in the negative sample set with a corresponding negative sample feature to form a negative sample feature vector; obtaining a target sample feature set from the positive sample feature vector and the negative sample feature vector according to at least two of a target group index, an information gain, and a logistic regression model; and sending the target sample feature set to a decision end, receiving feedback information of the decision end, and determining, according to the feedback information, whether to spread the seed group. |
| US11301873B2 |
Information processing system, information processing method, and information processing program
There is disclosed an information processing system for effectively using information indicating the state of a store visitor at the time of a visit. The system includes a recognizer that recognizes a store visitor and a transporter at the time of a visit by analyzing video information captured by an outside-the-store camera provided outside a store. The system also includes a determiner that determines a moving range of each store visitor recognized by the recognizer. Furthermore, the system includes a deriving unit that derives a trading area of the store based on a determination result of the determiner. |
| US11301868B2 |
Method for predictive analytics for finding related array entries
This invention deals with a computer-implemented method for using predictive analytics to find a second set of entries in a first array that are related to a first set of entries in the first array without directly calculating entry-to-entry similarities between entries in the first array, the method including: (a) identifying a target entry in a second array, wherein the first set of entries in the first array are linked to the target entry in the second array; (b) finding likely entries in the second array that have similarities to a target entry in the second array using a correlation; (c) finding linked entries in the first array that are linked to the likely entries found in the second array; and (d) using the linked entries found in the first array as the second set of entries in the first array. |
| US11301866B2 |
Systems and methods for correction of information in card-not-present account-on-file transactions
In one aspect, a method for processing a card-not-present account-on-file transaction is provided. The transaction involves a cardholder using payment card information stored by a merchant. The method includes receiving an authorization request message for the transaction, the authorization request message received at a payment network from an acquirer associated with the merchant and receiving an authorization response message, the authorization response message received at the payment network from an issuer. The authorization response includes a denial indicator indicating that the transaction has been denied. The method further includes querying a database coupled to the payment network to determine whether the database includes updated payment card information for a payment card associated with the transaction. The method additionally includes transmitting the updated payment card information associated with the payment card account identifier associated with the transaction to the acquirer for the acquirer to communicate to the merchant. |
| US11301864B2 |
Systems and methods for providing tokenized transaction accounts
The disclosed embodiments include methods and systems for providing tokenized transaction accounts. In one embodiment, a computer-implemented method is provided that may include generating, by one or more processors, a first tokenized transaction account from a first transaction account associated with a first user. The method may also include providing the first tokenized transaction account to a client device associated with the first user for storage in the client device and use in transactions. The method may also include updating the first tokenized transaction account based on one or more conditions and providing the updated first tokenized transaction account to the client device for storage and use in a subsequent transaction. |
| US11301862B2 |
Secure transfer of tokens between devices
Various embodiments are generally directed to the secure transfer of account tokens between devices. For example, a first device may receive an account token stored on a second device using web Bluetooth application programming interfaces (APIs). As another example, the second device may push the account token to the first device. |
| US11301861B2 |
System and method for modifying payment processing times upon suspicion of fraud
Systems, methods, and computer-readable storage media for monitoring risk levels in continuing to allow a potentially compromised payment card to continue to be used. An exemplary system can include a processor which receives a notification of unauthorized use of a card, retrieves a transaction history of authorized use of the card, and performs predictive modeling based on the transaction history based to determine a predicted transaction amount for future transactions. The system can then determine a risk level of continued use of the card and modify processing of the ongoing transaction based on the risk level. The system can then issue a risk level notification to proper authorities. |
| US11301855B2 |
Data verification in transactions in distributed network
Systems and methods for verifying a financial transaction based on an account number, a mobile directory number associated with the financial transaction, a mobile directory number associated with the account number, an email address associated with the account number, internet protocol address data associated with the financial transaction, and internet protocol address data associated with accesses of the email address. |
| US11301853B2 |
Speculative transaction operations for recognized devices
Techniques are disclosed relating to speculatively processing transactions. A transaction processing system may receive an indication of a trigger event associated with an electronic transaction not yet initiated by a client computing device. In some embodiments, in response to the indication of the trigger event and prior to receiving an indication of the electronic transaction being initiated, the computer system begins speculative processing of the electronic transaction. In some embodiments, the speculative processing includes identifying the client computing device based on device authentication information received from the client device, determining a user account based on the identifier client computing device, retrieving account information for the determined account, and storing the retrieved account information. In response to receiving an indication of the electronic transaction being initiated, in some embodiments, the computer system performs one or more operations using the stored account information to complete the transaction. |
| US11301848B2 |
Systems and methods for secure transaction approval
System and methods of contactless card authentication systems include a contactless card and a client device having an application, a processor, and a card reader. An application on the client device receives a transaction lockdown request, sends a request to the server to begin to allow a transaction approval within a time period, receives the transaction approval via an authentication tap from the contactless card, sends the transaction approval to the server; and receive an allowance or disallowance response from the server. |
| US11301847B1 |
Systems and methods for an authorized identification system
An example method includes receiving an encrypted biometric enrollment data and user identifier data. The encrypted biometric enrollment data includes at least one biometric enrollment sample from a user encrypted using an encryption key. The encryption key is generated based on a user secret and the user identifier is associated with the user. The user identifier is matched with a stored user secret. A decryption key is generated based on the stored user secret. The encrypted biometric enrollment data is decrypted using the decryption key. The at least one biometric enrollment sample is retrieved from the decrypted biometric enrollment data. The at least one biometric enrollment sample is processed using a biometric processing algorithm to generate a biometric reference template. A biometric reference template identifier uniquely identifying the biometric reference template is generated. An encryption key is generated based on the stored user secret and encrypts an enrollment confirmation message. |
| US11301843B2 |
System and method for blockchain based document processing
A system and method for blockchain-based document processing includes a processor, network interface, print engine, scan engine, and a memory storing a blockchain ledger. The blockchain ledger includes time stamped blocks, each block including currency data associated with a digital currency value. The processor generates a block corresponding to a received instruction, a preexisting currency value associated with the received instruction and contract data corresponding to a smart contract associated with the received instruction. The processor updates the blockchain ledger with a generated block and shares an updated blockchain ledger with other networked data devices via the network interface. The processor also receives verification of the updated blockchain ledger from the other networked data devices. The processor executes the smart contract upon receipt of verification. |
| US11301842B2 |
CPK-based digital bank, digital currency, and payment method
Disclosed are a CPK-based digital bank, a digital currency and a payment method. The digital currency is a core component of the digital bank. The digital currency is realized by means of a CPK digital signature, and a payer provides an account authenticity certification, an amount authenticity certification and a fund allocation authenticity certification, thereby effectively preventing crimes inside or outside a bank. The digital currency directly takes an account identifier as an account number. The digital currency can be used in on-line operations, as well as off-line operations, thereby satisfying face-to-face trade requirements between a great number of retail accounts. The CPK digital bank is realized by means of a CPK chip without support of other devices, such that everyone can check the authenticity of the digital currency. |
| US11301841B2 |
Method and system for authenticating a virtual currency instrument
Various aspects of a method and system for authentication of a virtual currency instrument for a monetary transaction are disclosed herein. In accordance with an embodiment, the method includes activation of a software module different from a payment application at an electronic device. An authentication of secure information, which is read through the payment application by the software module, is performed at the electronic device. Output of an authentication result occurs at the electronic device based on the authentication from the software module for the monetary transaction. |
| US11301838B2 |
Systems and methods for using network extensions
Systems and methods are provided for facilitating network transactions through use of browser extensions. One exemplary method includes accessing a virtual location associated with an entity through a web browser and receiving, from a user, a selection of a browser extension associated with the web browser, when at least one product is designated by the user at the virtual location. The method also includes calling a first application programming interface (API) associated with a virtual account platform, based on the selection of the browser extension, requesting virtual account information for the user from the virtual account platform, and displaying the virtual account information to the user. The method further includes calling a second API associated with the entity, requesting a transaction amount for the at least one product, and submitting a request for a network transaction based on the received virtual account information and the received transaction amount. |
| US11301829B2 |
Checkout system and method
A checkout system includes at least one input apparatus and at least one controller. The input apparatus receives an input indicating that a plurality of transactions are consecutively performed by a single customer. The input apparatus receives input of merchandise information for the plurality of transactions. The input apparatus also receives an input of a user code corresponding to a service. The at least one controller generates payment information indicating a total amount to be paid for each transaction of the plurality of transactions based on the input merchandise information. The user code is applied in connection with payment processing for each of the plurality of transactions without requiring the user code to be input more than once. Payment processing is performed with respect to each of the plurality of transactions based on the corresponding payment information, in accordance with a payment operation of the single customer. |
| US11301821B2 |
Cognitive prioritization model for hardware device prediction maintenance delivery
A method of providing a maintenance schedule that includes generating by a processor of a machine learning hardware device a predictive score for failure for each hardware device failure within a plurality of hardware devices to be serviced; determining by the processor a number of service misses for the hardware devices during a window of service; prioritizing by a processor of the machine learning hardware device each hardware device having a predictive score for failure by a business impact factor; and generating by the processor of the machine learning hardware device a maintenance schedule for the plurality of hardware devices to be serviced using the predictive score that has been prioritized by said business impact factor, wherein the service misses are selected for hardware devices having a lowest priority by the prioritizing of the predictive score by the business impact factor. |
| US11301818B2 |
Live meeting object in a calendar view
A representation of a calendar view is rendered on a user interface (UI). The calendar view is indicative of one or more calendar days comprising a time span including a plurality of sequential time slots. A representation of a scheduled meeting is rendered in at least one of the sequential time slots. The scheduled meeting is rendered without an icon or button operative to provide an interactive control to join the scheduled meeting. In response to determining that the scheduled meeting has started, the representation of the scheduled meeting is converted to a live meeting object and the representation of the scheduled meeting is replaced with the converted live meeting object. The live meeting object renders a live video or audio output of the scheduled meeting. |
| US11301816B1 |
Interactive data analysis and scheduling
A data analysis system is disclosed that receives data from a master data system to enable useful and efficient rescheduling of items, taking into account effects of various rescheduling options on various metrics related to the items and/or the scheduling. The data analysis system includes sophisticated data analysis and interactive graphical user interface functionality to enable efficient, multi-variable evaluation of various rescheduling options. The interactive graphical user interface includes interactive functionality for suggesting rescheduling options in view of the effects of those changes on various metrics, evaluating various rescheduling options in view of effects on the various metrics, adjusting instances of metrics related to items/timelines in view of scheduling changes, and the like. Once a set of schedule modifications are determined by the data analysis system, the data analysis system can push the schedule modifications back to the master data system for implementation. |
| US11301815B2 |
Notification apparatus and non-transitory computer readable medium storing program
A notification apparatus includes a registration unit that registers plural participants for each work, a positional information acquisition unit that acquires pieces of positional information of the participants, and a notification unit that notifies at least one participant out of the participants when a positional relationship between the participants is a predetermined positional relationship based on the pieces of positional information of the participants. |
| US11301814B2 |
Digital processing systems and methods for column automation recommendation engine in collaborative work systems
Systems, methods, and computer-readable media for associating a plurality of logical rules with groupings of data are disclosed. The systems and methods may involve at least one processor configured to: maintain a table containing columns; access a data structure containing the plurality of logical rules; access a correlation index identifying a plurality of column types and a subset of the plurality of logical rules; receive a selection of a new column to be added to the table; perform a look up in the correlation index for logical rules typically associated with a type of the new column; present a pick list of the logical rules typically associated with the type of the new column; receive a selection from the pick list; link to the new column a second particular logical rule associated with the selection from the pick list; and implement the second particular logical rule. |
| US11301813B2 |
Digital processing systems and methods for hierarchical table structure with conditional linking rules in collaborative work systems
Systems, methods, and computer-readable media for implementing conditional rules in a hierarchical table structure are disclosed. The systems and methods may involve maintaining for presentation on a viewable interface a higher-level table structure having first rows, first columns and first cells at the intersections of the first rows and the first columns; maintaining for presentation on the viewable interface a lower-level table structure having second rows, second columns and second cells at the intersections of the second rows and second columns; linking the lower-level table to a specific first cell in the higher-level table; storing a specific conditional rule associating the specific first cell with a plurality of second cells of the lower-level table; receiving qualifying information from each of the plurality of second cells; and triggering the specific conditional rule to thereby update milestone information in the specific first cell of the higher-level table. |
| US11301812B2 |
Digital processing systems and methods for data visualization extrapolation engine for widget 360 in collaborative work systems
Systems, methods, and computer-readable media for data extraction and mapping system are disclosed. The systems and methods may involve maintaining a main data source containing a plurality of data objects; maintain a plurality of boards for presenting the plurality of data objects; maintaining a plurality of linkages between at least some of the plurality of data objects associated with differing boards of the plurality of boards; receiving a selection of a particular data object associated with a particular board; identify via a particular linkage of the plurality of linkages at least one additional data object on another board linked to the particular data object on the particular board; defining a sub-data source, the sub-data source aggregating the at least one additional data object and the particular data object; receiving a visualization template selection; map the sub-data source to the visualization template selection to generate a sub-data visualization. |
| US11301801B1 |
Cross-account rating system
A request is received to provide shipping rate information to ship a package from a source location to a destination location. A plurality of accounts with one or more third-party carriers are searched across to determine a set of shipping rates to ship the package. A quoted set of shipping rates is determined from the set of shipping rates to be returned in response to the request. |
| US11301800B1 |
Package tracking utilizing modifiable delivery tags
In some examples, a movement range indicating a geospatial boundary for executing delivery of a package including a delivery tag may be received by a user device. The delivery tag can include a modifiable display area including first identification information. Location information related to the user device or related to the delivery tag can also be received. A position of the user device or the delivery tag with respect to the geospatial boundary can be determined. Based on the position, the modifiable display area of the delivery tag can be modified to include second identification information. |
| US11301795B2 |
Supply chain labor intelligence
Techniques are described for performing intelligence on supply chains used by organizations. A system performs a risk assessment of a labor supply chain of a particular organization by accessing, from a database, a first set of coded confidential labor supply chain data for the particular organization and a second set of coded confidential labor supply chain data for other organizations that are different from the particular organization. The system analyzes a combination of the first set of data and the second set of data to assess whether risks exist within the labor supply chain of the particular organization. Based on the analysis, the system generates a risk report for the labor supply chain data of the particular organization by desensitizing at least a portion of the second set of data for inclusion in the risk report and integrating the desensitized portion of the second set of data with confidential labor supply chain data of the particular organization. The system uses the risk report to present a graphical user interface that identifies whether risks exist within the labor supply chain of the particular organization. |
| US11301794B2 |
Machine for labor optimization for efficient shipping
A computer implemented method and system of calculating labor resources for a network of nodes in an omnichannel distribution system. Input parameters are received from a computing device of a user. Historical data related to a network of nodes is received, from a data repository. A synthetic scenario is determined based on the received input parameters and the historical data. For each node, key parameters are identified and set based on a multi-objective optimization, wherein the multi-objective optimization includes a synthetic inventory allocation to the node based on the synthetic scenario. A synthetic labor efficiency is determined for the node from the synthetic scenario. Labor resources are calculated based on the synthetic inventory allocation for the synthetic scenario. The labor resources of at least one node are displayed on a user interface of a user device. |
| US11301793B2 |
Method for augmenting procedures of a locked, regulated document
A method for augmenting procedures at production equipment includes: linking a first description of a first step in a procedure and a capture type to a first capture field; generating a digital draft procedure comprising descriptions of steps extracted from the procedure and the first capture field specifying data capture of the first capture type from an equipment unit; generating augmented guidance for the first step in the procedure based on visual content recorded by a mobile device—assigned to an exemplary operator—during completion of the first step in the digital draft procedure; linking the augmented guidance to a location proximal the equipment unit based on locations of the first mobile device during completion of the first step in the digital draft procedure; and generating an augmented digital procedure based on steps in the procedure, the augmented guidance, and definitions for data capture according to the first capture field. |
| US11301792B2 |
Cross domain integration in product lifecycle management
Cross-domain integration within product lifecycle management can include providing a plurality of finite state machines (FSMs), wherein each FSM is associated with one business object of an integration flow between a first enterprise information system and a second enterprise information system. Each FSM defines a plurality of lifecycle states of the associated business object. A business rule can be associated with each lifecycle state of each FSM. For each FSM, the associated business rules are independent of the FSM. For a selected lifecycle state of each FSM, the associated business rule defines a condition causing a transition from the selected lifecycle state to a next lifecycle state of the FSM. A network of the plurality of FSMs is established by providing communication links among individual ones of the plurality of FSMs according to the business rules. The communication links define the integration flow. |
| US11301790B1 |
Cost-optimization device for utility-scale photovoltaic power plants
This invention is embodied in a cost-optimization device for the layout and construction of a utility-scale photovoltaic (“PV”) power plant. The optimization device employs a set of algorithms designed to find the most cost-effective solution under given conditions. The algorithms are written in computer machine readable code and are highly customizable for the specific tracker equipment requirements and owner/builder/maintainer specifications or preferences.The preferred optimization device comprises three principal stages (or “units”) of computing: (1) an objective-state unit, (2) an optimum-feasible unit, and (3) a grading unit. In the first stage, the objective-state unit cost-optimizes site grading by orienting a ruling line between a maximum and a minimum pile reveal length for each tracker in the project (the objective-state solution”). When compared to the existing site topography, the ruling line indicates cost-optimized cut and fill locations.In the second stage, the optimum-feasible unit modifies the objective-state solution to satisfy given geometric constraints of the project. More specifically, the optimum-feasible unit employs a project-wide mesh (“system mesh”) to check whether the objective-state solution complies with the project's geometric restrictions. If not, the optimum-feasible unit applies a marching algorithm to incrementally adjust each ruling line until it finds a solution that minimizes site grading while complying with the project's geometric restrictions (the “optimum-feasible solution”).In the third stage, the grading unit modifies the optimum-feasible solution to satisfy non-geometric constraints of the project (the “final-state solution”). |
| US11301786B2 |
Determining interest areas at a venue location of an event
System, computer-readable medium, and methods are provided to determine interest areas of an event held at a venue location. A communication interface of a server device may receive a search request for an event, where the search request includes event data indicating a venue location of the event. An interest processing component of the server device determines an excitement interest in the event based on at least one of the event data and interest data of a user account. An area processing component of the server device determines one or more excitement areas at the venue location based at least on the excitement interest in the event. A ticket processing component of the server device determines one or more available event tickets for the event at the venue location based at least on the one or more excitement areas at the venue location. A transceiver of the communication interface that transmits an indication of the one or more available event tickets to a client device configured to access the one or more available event tickets. |
| US11301785B2 |
Operating system for vehicle-sharing service
An operating system for a vehicle-sharing service includes: a reservation input unit configured to input a usage reservation of an electric vehicle made by a user; a reservation result sending unit; a charging plan creating unit configured to create a charging plan for the electric vehicle; and a cost calculating unit configured to calculate an operation cost of the vehicle-sharing service based on a prediction of an available solar power supply. The charging plan creating unit creates the charging plan such that the operation cost of the vehicle-sharing service has a minimum cost under a predetermined acceptance condition. The result sending unit sends, to the user, a reservation result indicating that the usage reservation is unacceptable when the operation cost calculated according to the charging plan does not satisfy the predetermined acceptance condition. |
| US11301783B1 |
Disambiguating between users
This disclosure describes a system for disambiguating between multiple potential users that may have performed an item action (e.g., item removal or item placement) at an inventory location. For example, if there are three picking agents (users) standing near an inventory location and one of the agents removes an item (item action) from the inventory location, the example systems and processes described herein may utilize various inputs to disambiguate between the users and determine which of the potential users performed the item action. |
| US11301779B2 |
Air conditioner
A method of operating an air conditioner, including: obtaining an image acquired by a camera; determining a distance and a direction of an occupant relative to the air conditioner, based on the image; using at least one machine-learning network to classify an air-blowable space of the air conditioner into an intensive air blowing area and a non-intensive air blowing area, based on the distance and the direction of the occupant; controlling the air conditioner to operate in an intensive operation mode with respect to the intensive air blowing area; and controlling the air conditioner to operate in a non-intensive operation mode with respect to the intensive air blowing area and the non-intensive air blowing area based on completion of the intensive operation mode. A time duration of the intensive operation mode is smaller than a time duration of the non-intensive operation mode. |
| US11301773B2 |
Method and system for time series representation learning via dynamic time warping
Techniques that facilitate time series analysis using machine learning are provided. In one example, a system includes a matrix generation component, a matrix factorization component and a machine learning component. The matrix generation component converts at least a first stream of time series data and a second stream of time series data (e.g., raw time series data) into a data matrix (e.g., a partially-observed similarity matrix) that comprises void data and numerical data associated with the first stream of time series data and the second stream of time series data. The matrix factorization component factorizes the data matrix into a first factorization data matrix and a second factorization data matrix. The machine learning component processes a machine learning model based on first matrix data associated with the first factorization data matrix and second matrix data associated with the second factorization data matrix. |
| US11301770B2 |
Methods and systems for solving a problem on a quantum computer
A method of solving a problem can include providing a fermionic Hamiltonian, transformation of the fermionic Hamiltonian to qubit operators, transformation of the fermionic Hamiltonian in qubit operators to a mean-field Hamiltonian, and embedding the Hamiltonian onto a quantum computer. Such systems and methods may improve upon existing methods for solving electronic structure problems on a computer by adapting the problem to available hardware, reducing computational cost, and reducing the number of required qubits to solve electronic structure problems for larger number of atoms. |
| US11301768B2 |
System and method for optimal sensor placement
A controller includes a memory that stores instructions and a processor that executes the instructions. The instructions cause the controller to execute a process that includes receiving sensor data from a first sensor and a second sensor. The sensor data includes a time-series observation representing a first activity and a second activity. The controller generates models for each activity involving progressions through states indicated by the sensor data from each sensor. The controller receives from each sensor additional sensor data including a time-series observation representing the first activity and the second activity. The controller determines likelihoods that the models generated a portion of the additional sensor data and calculates a pair-wise distance between each sensor-specific determined likelihood to obtain calculated distances. The calculated distances for each sensor are grouped and a relevance of each sensor to each activity is determined by executing a regression model using the grouped calculated distances. |
| US11301764B1 |
Systems and methods for digital advice
The present disclosure relates to methods and systems for providing personalized digital advice. A digital advisor service applies cross-entity historical interaction (e.g., behavior attributes) to one or more predictive models to identify one or more personalized goals for a user. The digital advisor service provides, via an application programming interface, the identified one or more personalized goals to an entity service, enabling the entity service to present the one or more personalized goals. |
| US11301758B2 |
Systems and methods for semantic reasoning in personal illness management
A personal illness management system includes an extended semantic model of a health care knowledge domain, a semantic knowledge database for personal illness management, and an inference engine. The extended semantic model of a health care knowledge domain includes existing concepts related to personal illness management, existing relationships among the existing concepts, and inference logic embedded within each existing concept. The semantic knowledge database for personal illness management is distinct from the extended semantic model and includes existing nodes and existing links. The existing nodes represent instances of the existing concepts, and the existing links represent instances of the existing relationships among the existing concepts. The inference engine is knowledge domain independent and populates the semantic knowledge database with the instances of the existing concepts and the instances of the existing relationships by following the inference logic embedded within each existing concept. |
| US11301753B2 |
Neuron circuit, system, and method with synapse weight learning
A neuron circuit performing synapse learning on weight values includes a first sub-circuit, a second sub-circuit, and a third sub-circuit. The first sub-circuit is configured to receive an input signal from a pre-synaptic neuron circuit and determine whether the received input signal is an active signal having an active synapse value. The second sub-circuit is configured to compare a first cumulative reception counter of active input signals with a learning threshold value based on results of the determination. The third sub-circuit is configured to perform a potentiating learning process based on a first probability value to set a synaptic weight value of at least one previously received input signal to an active value, upon the first cumulative reception counter reaching the learning threshold value, and perform a depressing learning process based on a second probability value to set each of the synaptic weight values to an inactive value. |
| US11301751B2 |
Using programmable switching chips as artificial neural networks engines
A method for executing a binarized neural network (BNN) using a switching chip includes describing an artificial neural network application in a binarized form to provide the BNN; configuring a parser of the switching chip to encode an input vector of the BNN in a packet header; configuring a plurality of match-action tables (MATs) of the switching chip to execute, on the input vector encoded in the packet header, one or more of the operations including XNOR, bit counting, and sign operations such that the plurality of MATs are configured to: implement a bitwise XNOR operation between the input vector and a weights matrix to produce a plurality of first stage vectors, implement an algorithm for counting a number of bits set to 1 in the plurality of first stage vectors to produce a plurality of second stage vectors, and implement a sign operation on the second stage vectors. |
| US11301750B2 |
Simplification of neural models that include arborized projections
The simplification of neural network models is described. For example, a method for simplifying a neural network model includes providing the neural network model to be simplified, defining a first temporal filter for the conveyance of input from a neuron to an other spatially-extended neuron along the arborized projection, defining a second temporal filter for the conveyance of input from yet another neuron to the spatially-extended neuron along the arborized projection, replacing, in the neural network model, the first, spatially-extended neuron with a first, spatially-constrained neuron and the arborized projection with a first connection extending between the first, spatially-constrained neuron and the second neuron, wherein the first connection filters input from the second neuron in accordance with the first temporal filter and a second connection extending between the first spatially-constrained neuron and the third neuron. |
| US11301740B2 |
Integrated circuit, wireless communication card and wiring structure of identification mark
An integrated circuit, a wireless communication card and a wiring structure of an identification mark are provided. The integrated circuit includes a power supply wiring, a ground wiring and at least one identification mark pattern. Each identification mark pattern has a first conductive wiring and a second conductive wiring that overlap each other, wherein the first conductive wiring is electrically connected to the power wiring, and the second conductive wiring is electrically connected to the ground wiring. |
| US11301739B2 |
Method of assembly of articles and intermediate created thereby
Articles on flexible webs with different pitches are assembled together by displacing portions between articles of one web out of plane to move the articles on that web to the same pitch as the other web, aligning the two webs to register corresponding articles on the two webs, and assembling the corresponding articles together. The assembly may be used for example in the making of RFID tags, labels and inlays. |
| US11301736B1 |
Pet tag having machine readable indicia and method for manufacturing
A durable pet tag having machine readable indicia. A multiple layer label is pre-assembled and applied and embedded into a metal substrate for durability. A two sided pet tag having machine readable indicia on a first side and human readable indicia on a second side is provided, the human readable indicia being stamped into the side of the substrate opposite the machine readable printed sheet so that a single pet tag is provided with machine readable data to allow finders of lost pets to retrieve owner information using a smart phone and the database accessible with the pet tag machine readable indicia. The pet tag also has human readable indicia to comply with legal requirements. |