Document Document Title
US11057576B2 System and method for automated detection and replacement of photographic scenes
A method of identifying a background type in a photograph includes extracting a background image from a photograph, feeding the background image into a first convolution neural network to obtain a first decision, extracting color features in the background image, transforming the color features into a two-dimensional color feature matrix, feeding the two-dimensional color feature matrix into a second convolution neural network to obtain a second decision by the one or more computer processors, extracting texture features in the background image, transforming the texture features into a two-dimensional texture feature matrix image by the one or more computer processors, feeding the two-dimensional texture feature matrix into a third convolution neural network to obtain a third decision, computing a hybrid decision based on the first decision, the second decision, and the third decision, and identifying a background type in the background image based on the hybrid decision.
US11057573B2 Multi camera image processing
A system on a chip (SoC) implementing dynamic grouping of multiple cameras in an image processing system is disclosed. The SoC includes an image signal processor (ISP) configured to receive a signal corresponding to an image from two or more cameras, dynamically group the cameras into groups based on a measured view brightness and/or color temperature observed by each of the cameras, and assign cameras with a group of the groups to a same exposure/gain setting. The SoC further includes a statistics engine configured to receive the image signals and statistics related to the image signals from the ISP and determine a measurement of image brightness and/or color temperature of each image based on the image signals for forwarding to the ISP.
US11057570B2 Vehicle and method for controlling the same
A vehicle includes at least one camera configured to obtain images around the vehicle, a display configured to display an output image based on the images around the vehicle, an inputter configured to receive a user's command, and a controller configured to determine a display mode of the output image based on the user's command and change an exposure value of the camera based on brightness information of a predetermined area corresponding to the display mode.
US11057564B2 Multiple layer flexure for supporting a moving image sensor
Some embodiments may include a multi-layer flexure that may be used in an optical image stabilization voice coil motor (OIS VCM) actuator of a camera. The multi-layer flexure module may include a dynamic platform and a static platform along with multiple layers of flexure arms that mechanically connect the dynamic platform to the static platform. In some examples, the multi-layer flexure may include electrical traces configured to convey signals from the dynamic platform to the static platform. The electrical traces may be routed from the dynamic platform to the static platform via the flexure arms. In some embodiments, a multi-layer flexure may have a greater stiffness in a Z-direction aligning with an optical axis of a camera and may have a lower stiffness in X and Y directions corresponding to optical image stabilization directions of an OIS VCM actuator.
US11057562B2 Multi-mode CMOS image sensor and control method thereof
The present invention discloses a multimode CMOS image sensor and a control method thereof. The sensor comprises an independent control area group, a peripheral control circuit, a section mode setting module and a section mode configuration module. The method comprises dividing an independent control area group of the sensor into sections; setting a mode for each of the sections obtained; configuring a control mode of the peripheral control circuit for a corresponding section according to the mode set. By means of the present invention, when imaging in a push-broom mode, a regular sequence of images with fixed pixel difference can be produced at high frequency, and by performing pixel unmixing or integrating on the images obtained, the resolution and signal-to-noise ratio of the images can be effectively increased; because it is possible for some image unit area(s) of the sensor not to be selected as a scanning area, such design can bypass image units with quality issues when imaging by the hardware, which increases the reliability of the device; the characteristic of multiple times of imaging for the same target within very short time by multiple channels of the device can be utilized to realize moving target detection of optical camera imaging.
US11057561B2 Capture, analysis and use of building data from mobile devices
Techniques are described for automated operations involving capturing and analyzing information from an interior of a house, building or other structure, for use in generating and providing a representation of that interior. Such techniques may include using a user's mobile device to capture visual data from multiple viewing locations (e.g., video captured while the mobile device is rotated for some or all of a full 360 degree rotation at each viewing location) within multiple rooms, capturing data linking the multiple viewing locations, analyzing each viewing location's visual data to create a panorama image from that viewing location, analyzing the linking data to determine relative positions/directions between at least some viewing locations, creating inter-panorama links in the panoramas to each of one or more other panoramas based on such determined positions/directions, and providing information to display multiple linked panorama images to represent the interior.
US11057557B2 Starting electronic communication based on captured image
Techniques for starting an electronic communication based on a captured image are disclosed herein. In some embodiments, a computer system detects that an image has been captured by a camera on a first mobile device of a first user, where the captured image has been captured by the camera at a point in time, and, in response to detecting that the image has been captured, the computer system identifies at least one other user in the captured image. In some example embodiments, the computer system transmits a message to an electronic destination associated with the other user(s) based on the identifying of the other user(s) in the captured image.
US11057556B2 Display panel and display device using same
A display panel defines a display area surrounding a light transmission area, and a light shielding area between the display area and the light transmission area. The display panel includes a lower polarizer and a first light shielding material. The lower polarizer defines a first through hole. At least part of the first light shielding material is in the first through hole. The first light shielding material is aligned with the light shielding area and surrounds the light transmission area, so as to absorb light from a side of the lower polarizer away from the TFT array substrate toward the light transmission area. A display device using the display panel is also disclosed.
US11057551B2 Image capturing and display apparatus and wearable device
An image capturing and display apparatus comprises a plurality of photoelectric conversion elements for converting incident light from the outside of the image capturing and display apparatus to electrical charge signals, and a plurality of light-emitting elements for emitting light of an intensity corresponding to the electrical charge signals acquired by the plurality of photoelectric conversion elements. A pixel region is defined as a region in which the plurality of photoelectric conversion elements are arranged in an array. Signal paths for transmitting signals from the plurality of photoelectric conversion elements to the plurality of light-emitting elements lie within the pixel region.
US11057550B2 Camera lens controller with adaptive display for marking
A camera lens control system includes a hand control unit equipped with an adaptive display for marking. The adaptive display is electronically controlled or programmed to display any desired objects for marking. The hand control unit includes a body, a control knob attached to the body, and a marking ring concentrically coupled with the control knob. The control knob is configured to receive a user input for controlling a lens setting. The marking ring includes a display configurable to display one or more markings corresponding to the lens setting.
US11057549B2 Techniques for presenting video stream next to camera
In one aspect, a device includes at least one processor and storage accessible to the at least one processor. The storage includes instructions executable by the at least one processor to identify coordinates of a camera relative to a screen and to present on the screen a video stream next to the coordinates responsive to identifying the coordinates of the camera.
US11057546B2 Video encoding and decoding
A set of spatial motion information predictors to be encoded is generated from among spatial motion information predictors respectively associated with predetermined image portions adjacent to an image portion to be decoded, one of which is situated above the image portion to be decoded. At least one condition is used to determine that a spatial motion information predictor is not includable in the set. At least one condition is a condition to exclude from the generated set of spatial motion information predictors a spatial motion information predictor that is a duplicate of another spatial motion information predictor. A temporal motion information predictor is not subjected to the duplicate exclusion condition used for the spatial motion information predictors and may be a duplicate of a spatial motion information predictor in the generated set. A motion information predictor is selected from among (i) the generated set of motion information predictors, (ii) the temporal motion information predictor, and (iii) a zero motion information predictor as a replacement for a non-includable spatial motion information predictor.
US11057544B2 Image forming apparatus
An image forming apparatus includes a feeder having a tray and configured to convey a sheet, a reader including a platen, an image forming unit configured to form a test pattern, and a controller. The controller adjusts, based on a result of reading the sheet having the test pattern formed thereon, a quality of an image to be formed by the image forming unit. In a case where a sheet of a first type having the test pattern formed thereon is placed on the tray, the feeder conveys the sheet. In a case where a sheet of a second type having the test pattern formed thereon is placed on the tray, the controller is configured to display a notification representing that the sheet is not to be conveyed by the feeder.
US11057543B2 Updating a lookup table for an imaging system
Certain examples described herein relate to updating a lookup table for an imaging system. An initial lookup table for an imaging system is obtained, the initial lookup table mapping between a first color space and a second color space. A smoothed version of the initial lookup table is also obtained. Further obtained are color property values corresponding to nodes of the lookup tables that map from a vertex-to-vertex axis of the first color space. The color property values are derived from measurements of test areas rendered by the imaging system. For a target node of the smoothed version of the initial lookup table that maps from the vertex-to-vertex axis, a pair of nodes in the initial lookup table are selected based on the obtained color property values. A mapped value in the second color space for the target node is updated, based on an interpolation of mapped values for the pair of nodes in the initial lookup table. The mapped value for the target node is constrained based on a color property value for the target node.
US11057542B2 Color calibration
Certain examples described herein relate to color calibration. In certain cases, a plurality of test patches are printed with a printing system, the test patches corresponding to a set of initial color sample points and a set of test colors. Color properties of the printed test patches are measured. In certain examples, a gamut descriptor is identified from a plurality of gamut descriptors using the color properties of the test colors. Each gamut descriptor defines a set of up-sampling parameters for a particular color gamut. Measured color properties for the initial color sample points are up-sampled using the set of up-sampling parameters for the identified gamut descriptor to generate up-sampled data. In certain cases, the up-sampled data is used to generate a color mapping to be applied to print job data received by the printing system.
US11057538B1 Methods and systems for tagged-signal verification
The present invention discloses methods and systems for tagged-signal verification. Methods include: upon obtaining original content, generating identity and semantic signatures; superposing the identity signature on the content as an in-band digital watermark; utilizing the semantic signature by: superposing on the content or storing; transmitting a tagged signal combining watermark and content; upon receiving the tagged signal with a verification request, extracting transmitted content; extracting the watermark to retrieve a transmitted identity signature; determining the transmitted identity signature is valid by comparing to the original; obtaining the original semantic signature either by: extracting from the watermark, or retrieving a stored version; generating a transmitted semantic signature; verifying the transmitted semantic signature is identical to the original; determining the transmitted content is tamper-free and identical to the original, or has been manipulated; and transmitting a confirmation notification vouching for the authenticity as a genuine version, or designating as a tampered version.
US11057537B2 Image forming apparatus, method of controlling the same, and storage medium
The present image forming apparatus, in response to reception of facsimile data, outputs a monitoring sound at a predetermined sound volume, and displays a setting input screen for adjusting the sound volume on a display unit.
US11057536B2 System for analyzing a document and corresponding method
The invention refers to a system for analyzing a document. Each of two measurement arrangements includes two components being a radiation source and a radiation detector, respectively. The two measurement arrangements provide measurement data and differ from each other with regard to a measurement principle, a kind of radiation source, a kind of radiation detector, a kind of relative movement between the document and a component, a kind of relative arrangement of the two components to each other, a kind of emitted radiation, a kind of received radiation or a kind of processing information about radiation emitted by the respective radiation source and/or about radiation received by the respective radiation detector. An evaluator provides data based on the measurement data. The invention also refers to a corresponding method.
US11057531B2 Operating an appliance scanner system
A method and system for operating an appliance scanner system. A device can maintain at least two isolated communication channels, one to connect to a configuration service and others for connecting to document processing and management services. This can enable the configuration service to reside outside of a secure network. Firewalls and policies can prevent content generated at the scanner from exiting the secure network and reaching the configuration service. To set up the scanner, it can be initiated and connect to the configuration service via a operations communication channel. The configuration service can then instruct the scanner how to connect to various document services through one or more generated content communication channels. Furthermore, document services can communicate validation information back to the scanner.
US11057530B2 Information processing apparatus, information processing system, control program, and control method
An information processing system includes a relay server, an image forming apparatus, and a plurality of content servers. The image forming apparatus requests the relay server to transmit a print content selected by a user. When receiving a transmission request of the print content transmitted from the image forming apparatus, the relay server acquires the print content from the content server of contents provider which provides the print content, and the relay server configures a print condition according to the type of the print content in accordance with a print condition table. The relay server transmits first data to the image forming apparatus. The first data includes the print content and a setting command corresponding to the print condition according to the type of the print content.
US11057528B2 Information processing apparatus, method and storage medium
An information processing apparatus performs processing for putting a width of a line in an output in a case where printing is performed by a first printing apparatus based on print data including a line close to a width of a line in an output in a case where printing is performed by a second printing apparatus based on the print data. A first acquisition unit is configured to acquire first information relating to an output in a case where printed matter including a plurality of line width detection images is printed by the second printing apparatus.
US11057527B2 Device, system, and process for providing emergency calling service for a wireless device using voice over data
A system for providing emergency telephone call solutions for wireless devices using a voice over data network, the system having the voice over data network to recognize an emergency call from one of the wireless devices, to determine whether a cellular network is available to receive the emergency call, and to transmit the emergency call to the cellular network, a gateway for converting the emergency call between a first format for the voice over data network and a second format for a public switched telephone network associated with the cellular network, a mobile virtual network operator to communicate information associated with the emergency call to the cellular network and to the voice over data network, and the voice over data network and the cellular network to route the emergency call and the information associated with the emergency call to an emergency authority.
US11057525B1 Communication system for covert and hands-free communication
A communications system embodiment including an input device reactive to user input, circuitry, an output device, and an electronic device communicatively connected to the input device and/or the output device is provided. A tangible non-transitory computer readable medium having program instructions executed by a processor for determining a preselected public or private mode, determining a preselected type of communication for receipt, and filtering the communication based on the mode selected and the type of communication selected as well as whether the sender is on a particular contact list. The communications system embodiment may provide for responding to the incoming communication by speech response or via an input device or an output device, to reduce or eliminate the need for a user of the system to view the electronic device or contact the electronic device to receive or send communications, in some embodiments.
US11057522B2 Intelligent callback service providing system
An intelligent message processing system includes: a customer terminal configured to receive an intelligent callback service; a service provider terminal configured to send a callback message to the customer terminal; and a chatbot service providing server configured to provide an interactive callback service after the customer terminal checks the callback message, the service provider terminal comprising an intelligent agent configured to generate and send a callback message, which reflects at least one piece of information between message information received from the customer terminal and customer history information stored and managed in a customer database, or a preset callback message to the customer terminal.
US11057516B2 Systems and methods for providing context data associated with a communications session to the called device
Systems and methods for providing called devices with sets of context data associated with communication sessions are disclosed. In one implementation, a method for generating context data associated with a communications session may include receiving, from a calling device at a first subsystem, a request to establish a communications session. The request may include a first identifier associated with the calling device. The method may further include receiving, at a second subsystem, activities data associated with the calling device that transmitted the request to establish the communications session. The activities data may include a second identifier associated with the calling device and may be indicative of device activities of the calling device. In addition, the method includes determining, using the first identifier and the second identifier, that the received activities data is associated with the calling device that transmitted the request to establish the communications session, generating context data associated with the communications session based on the received activities data, generating visual content based on the generated context data, and establishing the communications session in response to receiving, from a user of the called device, an input command to accept the request.
US11057509B2 Apparatus and method for providing incoming and outgoing call information in a mobile communication terminal
Methods and apparatuses are provided for providing information at an electronic device. Incoming call entries and outgoing call entries corresponding to phone numbers are displayed. Based on receiving a selection of one of the call entries, a first option is displayed for modifying prestored contact information associated with the phone number corresponding to the call entry, without displaying a second option for adding the phone number to the address book, and call history information is displayed for the phone number, when the phone number is in the address book. The prestored contact information associated with the phone number includes a name for the phone number. The second option is displayed, without displaying the first option, and the call history information for the phone number is displayed, when the phone number is not in the address book.
US11057507B2 Electronic assembly and electronic device
An electronic assembly and an electronic device are provided. The electronic assembly includes a receiver, a first circuit board, a flashlight, a second circuit board, and a sensor. The first circuit board has a first surface and a second surface opposite to the first surface, the receiver is disposed on the first surface and electrically connected to the first circuit board, the flashlight is disposed on the second surface and electrically connected to the first circuit board, the second circuit board is disposed on one side of the receiver away from the first circuit board, the sensor is disposed on one side of the second circuit board away from the receiver and is electrically connected to the second circuit board.
US11057505B2 Multi purpose mobile device case/cover integrated with a camera system and non electrical 3D/multiple video and still frame viewer for 3D and/or 2D high quality videography, photography and selfie recording
A unique mobile device casing or cover integrated with a camera system & 3D/multiple video & still frame viewer is disclosed, which can record 2-Dimensional (2D) and 3-Dimensional (3D) video movies and still photographs and which can be used to view both 3-D video/still image, using an attachable/detachable 3D display system is disclosed herein. The unique display disclosed herein can be used to view both 3D and 2D video/still simultaneously. The camera may have zoom, tele-photo or microscopic capability by using a unique optical system disclosed herein. The Camera disclosed herein can be used in or with mobile devices for capturing self photos or self video commonly known as “selfies”, in 3 dimension (3D) and any photography or videography application. Furthermore, the 3D camera may be used with mobile phone/devices, tablets, ipad type devices by integrating the camera and 3D display sheet, on a mobile phone/device case, tablet case or the case of an ipad type device. The 3D display sheet converts the regular display of a mobile phone/device or television to a 3D display, which does not require to wear special glasses to view 3D. The 3D still photographs and 3D video movies can be viewed in a mobile device, for example, such as a mobile phone/device, tablet PC, tab, pad, etc, without using dedicated glasses, by using a suitable 3D display disclosed herein, which does not distort the 2D display capabilities, simultaneously enabling both 3D and 2D viewing.
US11057502B2 Cloud assisted behavioral automated testing
A computer readable storage medium, system and method for improving automated testing systems to include a first and second behavioral data. The first behavioral data is collected periodically and the second behavioral data is collected in real time. The receipt of the first behavioral data and a second behavioral data are followed by the receipt of a system configuration template. A test case is updated based on the first and second behavioral data, and an automated test environment is reconfigured based on the first behavioral data, second behavioral data, and the system configuration template. The test executes in the automated test environment producing a test result.
US11057490B2 Systems and methods for utilizing unused network capacity for prefetch requests
Methods, systems, and computer-readable media are disclosed for utilizing unused network capacity for prefetch requests. One method includes: receiving, over a network, network traffic information from a network provider of the network; determining a threshold value for prefetch request fulfillment based on the received network traffic information; receiving, over the network, a plurality of prefetch requests from an application running on a mobile device connected to the network of the network provider; determining, for each prefetch request of the plurality of prefetch requests, a score for the prefetch request based on the received plurality of prefetch requests; and responding to, for each prefetch request of the plurality of prefetch requests, the prefetch request based on the determined threshold value and the determined score for the prefetch request.
US11057489B2 Content deployment method and delivery controller
Embodiments of this disclosure provide a content deployment method and a delivery controller. The content deployment method includes: receiving, by a delivery controller, a content deployment request from an application server controller, where the content deployment request includes identification information of requested content and address information of an application server storing the requested content; and sending, by the delivery controller, a first deployment cache request to a first cache server, where the first deployment cache request includes the identification information of the requested content and the address information of the application server, and the first deployment cache request is used to request the first cache server to obtain the requested content from the application server and cache the requested content. With the content deployment method and the delivery controller in the embodiments of this disclosure, content deployment under control of a content provider can be implemented.
US11057488B2 Multi-state midtier cache
A server includes a data cache for storing data objects requested by mobile devices, desktop devices, and server devices, each of which may execute a different configuration of an application. When a cache miss occurs, the cache may begin loading portions of a requested data object from various data sources. Instead of waiting for the entire object to load to change the object state to “valid,” the cache may incrementally update the state through various levels of validity based on the calling application configurations. When a portion of the data object used by a mobile configuration is received, the object state can be upgraded to be valid for mobile devices while data for desktop and other devices continues to load, etc. The mobile portion of the data object can then be sent to the mobile devices without waiting for the rest of the data object to load.
US11057486B2 Content-based notification delivery
In one embodiment, a method includes one or more computing devices ranking multiple users of a social-networking system based on one or more criteria associated with a spotlight content item, wherein the spotlight content item is associated with a node in a social graph associated with the social-networking system, and wherein at least one of the criteria is based on social-networking information for each of the user, verifying the ranked users, wherein the verifying comprises confirming or eliminating each of the ranked users based on recent interactions by the ranked users with social-networking information corresponding to the node associated with the spotlight content item, and sending a notification about the spotlight content item to each of the confirmed users in accordance with a batching protocol, wherein the batching protocol is determined based at least in part on rankings for each of the confirmed users.
US11057481B2 Method and system for creation and distribution of narrated content
The electronic content generation and distribution method and system includes designating a written content for audio translation by a narrator and determining the narrator. The method and system provides written content to the narrator to generate an audio narration, receiving the audio narration back from the narrator. The method and system therein assigns a plurality of content identifiers to the audio narration based at least one the written content, accesses a subscriber database including subscriber information and subscriber preference data and electronically compares the plurality of content identifiers to the subscriber preference data to determine a distribution list. The method and system distributes the audio narration to subscribers designated in the distribution list so that the subscriber can engage the audio narration via a content interface, where the content interface is operative to monitor the subscriber engaging the audio narration.
US11057480B1 Methods and architecture for load-correcting requests for serverless functions
Methods and architecture for load-correcting requests for serverless functions to reduce latency of serverless computing are provided. An example technique exploits knowledge that a given server node does not have a serverless function ready to run or is overloaded. Without further processing overhead or communication, the server node shifts the request to a predetermined alternate node without assessing a current state of the alternate node, an efficient decision based on probability that a higher chance of fulfillment exists at the alternate node than at the current server, even with no knowledge of the alternate node. In an implementation, the server node refers the request but also warms up the requested serverless function, due to likelihood of repeated requests or in case the request is directed back. An example device has a front-end redirecting server and a backend serverless system in a single component.
US11057478B2 Hybrid cluster architecture for reverse proxies
Systems and methods for an improved HA cluster architecture that provides for seamless failover while also maintaining full processing capacity are provided. According to one embodiment, each member of a hybrid HA cluster of reverse proxy network security devices is configured to operate in an active mode or in a backup mode. A primary member of a set of active members of the cluster receives and processes network traffic. The cluster detects existence of a failure scenario of multiple potential failure scenarios involving an active member, including (i) failure of the primary member; and (ii) failure of a non-primary member. Responsive to detecting the existence of the failure scenario, seamlessly failing over from the failed active member to a backup member of a set of backup members of the cluster by causing the backup member to join the set of active members by placing it in the active mode.
US11057476B2 System and method for managing communication system
In a method for managing a communication system, the method includes: identifying, by a processor, initiation of a chat communication session with a user device operated by a user; establishing, by the processor, a connection to the chat communication session by an automated chat resource; routing, by the processor, the chat communication session to a first agent device operated by a first agent; detecting, by the processor, a disconnection of the user device from the chat communication session; maintaining, by the processor, the connection to the chat communication session by the automated chat resource during a timeout period after the disconnection of the user device is detected; detecting, by the processor, the user device reconnecting to the chat communication session; and routing, by the processor, the chat communication session to a contact center resource.
US11057473B2 Linkage system and device control server
In the present disclosure, an appropriate control-target device is caused to carry out an operation without the control-target device being designated. A linking system (7) includes: a linking server (1); a device controlling server (2); one or more devices (4); and an information providing server (5). In a case where the device controlling server (2) has received from the linking server (1) an instruction for carrying out an operation in accordance with a linking rule, the device controlling server transmits (2) a command to carry out the operation to at least one device, the at least one device having been identified by the device controlling server (2) from among the one or more devices (4) in accordance with a user specified in the linking rule. The information providing server (5) transmits, to the linking server (1), notification of a trigger for the operation.
US11057469B2 Method and apparatus for service hosting of distributed storage system
Embodiments of the present disclosure disclose a method and apparatus for service hosting of a distributed storage system. A specific embodiment of the method comprises: acquiring, in response to receiving expected service description information for a target service, current service description information and at least one piece of tag information of at least one storage node; selecting a target storage node from the at least one storage node, tag information of the target storage node satisfying a storage node filtering condition in the expected service description information and/or a storage node filtering condition in the current service description information; determining a to-be-performed task of the target storage node, based on a difference between the expected service description information and the current service description information and software package information and container information in the expected service description information; and sending information for indicating the task to the target storage node.
US11057467B2 Data object input in a hybrid cloud
A cloud environment is provided generally having a private data center possessing a controller/routing system and nonvolatile mass storage, a plurality of data objects retained in the nonvolatile mass storage, and a public cloud storage service provider linked to the controller/routing system. The public cloud storage service provider possessing a database containing policy decisions and metadata of the plurality of data objects. When a data object is uploaded by an end-user to a specific data bucket to the private data center in the cloud environment. Meta data and location information about the data object is uploaded to the public cloud storage service provider. The private data center is not in possession of the policy decisions and the metadata for data objects. The data center is independent of the public cloud storage provider.
US11057460B2 Weighted load balancing method on data access nodes
The weighted load balancing method on data access nodes ensures the ability to horizontally scale the data access system, the load handling capacity of the system is increased linearly according to the number of data access nodes. The proposed method includes the following steps: step 1: update the routing table, when adding, removing nodes or changing nodes' weight, move virtual nodes from node having decreased number of virtual nodes to node having increased number of virtual nodes; step 2: store old routing table on array Ai and new routing table on array A2; step 3: block access to records that need to be moved; step 4: copy records from old node to node; step 5: perform read/write access using data partitioning method with new routing table A2; step 6: clean duplicated records.
US11057459B2 Datapath-driven fully distributed east-west application load balancer
The disclosure provides an approach for load balancing packets within a data center. The approach leverages dynamically collected and up-to-date health information on each virtual computing instance located within the data center. In one embodiment, health monitoring modules, located within hypervisors of each host computer, collect health statistics on local virtual computing instances. Each health monitoring module shares its locally collected health statistics with every other health monitoring module. Each health monitoring module provides the shared health statistics, on all virtual computing instances within the data center, to a local load balancing module located within the hypervisor of each host computer. Each load balancing module uses health statistics of all virtual computing instances to load balance packets within the data center. Further, the disclosure describes an affinity-based load balancing approach in which a local load balancing module may give preference to local virtual computing instances when making load balancing decisions.
US11057454B2 Methods and systems for identifying and remediating poor user experiences on computing devices
This application relates to apparatus and methods for identifying and remediating poor user experiences on computing devices. In some examples, a user speed determination device is configured to receive a content delivery request for delivery of content to a user device. The computing is also configured to obtain user identification data, obtain user device data and determine a user device speed based on the user identification data and the user device data. The computing device then sends a user device speed indicator to a content delivery device to cause the content delivery device to deliver remediated content to the user device when the user device speed is determined to be less than a predetermined speed threshold. The user identification data can include an IP address and the user device data can include user agent data, user connection data and user resource timing data.
US11057449B2 Convergence sublayer for use in a wireless broadcasting system
A method of encapsulating data and a single frequency network configured to perform the method are disclosed. A content stream of data packets is received, and the data packets in the content stream are formatted in accordance with a first protocol. Information identifying a container size established for the content stream is received. The data packets formatted in accordance with the first protocol are fragmented and packed to form data units formatted in accordance with a second protocol, and the data units are sized based on the container size. The data units formatted in accordance with the second protocol are encapsulated to form second protocol data packets. The second protocol data packets are provided to a transmitter that is synchronized to one or more transmitters in a single frequency network so that each transmitter in the single frequency network broadcasts a same signal that includes the second protocol data packets.
US11057448B2 Method for receiving adaptive streaming service
A method for receiving a streaming service is disclosed. The method for receiving a streaming service may be a method performed at a terminal for receiving a streaming service for a video content coded in a layered manner and may include the steps of: (a) sequentially requesting a transmission of at least one video data for a basic layer to be stored in the idle space of a buffer; and (b) sequentially requesting a transmission of video data for a layer of an increased level if the buffer does not have idle space, performed during the decoding of video data corresponding to a single video chunk, where step (b) may be repeated with the level of the layer increased during the decoding of video corresponding to a single video chunk.
US11057447B2 Uniform packet streaming
A method and system for delivering content are disclosed. A media stream including media data is received from a content provider at a content delivery network (CDN) server. The CDN server creates a uniform protocol data unit (PDU) comprising the media data. A plurality of requests to receive the uniform PDU are received at the CDN server from a plurality of devices is received at a CDN server. Each device is associated with a unique IP address. The CDN server communicates the uniform PDU over a network to the plurality of devices using the unique IP address for each of the plurality of devices.
US11057446B2 System and method for streaming content from multiple servers
A system and a method for media streaming from multiple sources are disclosed. A content requesting client device accesses a server to receive a list of available sources that may include multiple Content Delivery Networks (CDNs) and independent servers. Based on a pre-set criteria, such as the source delivery performance and cost, the client device partitions the content into parts, allocates a source to each part, and simultaneously receives media streams of the content parts from the allocated sources. The server may be a Video-on-Demand (VOD) server, and the content may be a single file of a video data, such as a movie. The delivery performance of the used sources is measured during the streaming for updating the partition or the allocation. The updated measured performance may be stored locally at the client device, or at a server for use by other clients. The client actions may be implemented as a client-side script.
US11057445B2 Method for adapting the downloading behavior of a client terminal configured, to receive multimedia content, and corresponding terminal
The invention concerns a method for adapting the downloading behavior of a client terminal configured to receive a multimedia content from at least one server, said multimedia content being defined by at least one representation, wherein it comprises the steps of: requesting (S0) a first part of said multimedia content with a given representation; detecting (S1) if a cache between is located along the transmission path the client terminal and a server, based on the request of said first part; in case (S3) a cache is detected, requesting a second part of said multimedia content with a representation depending on at least one performance criterion.
US11057443B2 Conference system, video conference apparatus, and video image processing method
A video conference apparatus includes a relay unit that is configured to transmit video image data acquired at a site of a first conference system to a second terminal provided in a second conference system and transmit video image data of the second conference system to a first terminal provided in the first conference system. The relay unit is configured to transmit only a combined video image of video images at respective sites of the first conference system to the second terminal as first video image data, and transmit a video image sent from the second terminal to the first terminal as second video image data.
US11057436B1 System and method for monitoring computing servers for possible unauthorized access
A system is provided that includes one or more computing servers and a processing circuit for analyzing data transactions of the computing servers. Each of the computing servers is configured to provide respective services to remote users. The processing circuit is configured to analyze data transactions of at least one of the computing servers, which is associated with a user account. A security policy of the user account includes conditions that are indicative of unauthorized access when the conditions are satisfied by various characteristics of the analyzed data transactions. The processing circuit is configured to determine a threat level as function of the characteristics of the data transactions and the conditions of the security policy. In response to the threat level exceeding a first threshold level indicated in the security policy of the user account, the processing circuit performs an action for the user account that is associated with the first threshold level.
US11057433B2 System for and method of determining data connections between software applications
A system for and a method of regulating the data interconnections between applications running on an infrastructure are provided. The system/method records access permission data into metadata embedded in the source code of each such application that regulates the data that can be received or transmitted by that application. In addition to regulating the receipt or transmission of data, the metadata can serve to provide instruction to firewalls and other regulating systems in order to configure those systems to allow the applications to receive and transmit data for which permissions have been recorded.
US11057428B1 Honeytoken tracker
Disclosed herein are methods, systems, and processes for tracking honeytokens. A malicious attack from an attacker is received at a honeypot and a determination is made that an attack event associated with the malicious attack has compromised deceptive credential information maintained by the honeypot. A unique credential pair that corresponds to the deceptive credential information sought by the attack event is generated and a honeytoken tracker state table is modified to include the unique credential pair and attack event metadata in association with the attack event. The unique credential pair is then transmitted to the attacker.
US11057426B2 Methods and systems providing cyber defense for electronic identification, vehicles, ancillary vehicle platforms and telematics platforms
A system and method for providing cyber defense for electronic identification, vehicles, ancillary vehicle platforms, and telematics platforms using blockchain. The vehicle may be a ground-based vehicle, air-based vehicle, roadable aircraft vehicle, sea-based vehicle, autonomous vehicle, or unmanned aerial vehicle. Wherein ancillary vehicle platforms may include, but not limited to, aviation platforms, urban air mobility platforms (UAM), and unmanned aircraft systems (UAS). The system and method include determining whether a user is an authorized operator of a vehicle, the vehicle including an external display of a digital license tag. If the user is determined to be an unauthorized operator of the vehicle, the system activates a primary kill switch which prevents the activation of the vehicle's digital license tag. If the user is determined to be an authorized operator of the vehicle, the system activates the vehicle's digital license tag and initiates continuous cyber security monitoring of the vehicle while the vehicle is activated. The system obtains data from an Identity and Access Management Enterprise (“IAME”) platform, ancillary vehicle platforms and vehicle telematics platforms during operation of the vehicle until a cyber-attack is detected during the cyber security monitoring. The system activates a secondary kill switch when a cyber-attack is detected. The secondary kill switch disables operation of the vehicle.
US11057421B2 Enhanced detection of polymorphic malicious content within an entity
Embodiments of the invention are directed to systems, methods and computer program products for enhanced detection of polymorphic malicious content within an entity. In this regard, the present invention receives information associated with an incidence of an electronic file; receives an first hash value of the electronic file from a first network device and a second hash value of the electronic file from a second network device; compares the first hash value with the second hash value; determines that the electronic file is polymorphic based on at least the match; initiates an execution of a quantum optimization algorithm using a quantum optimizer to determine one or more hash value states; receive information associated with an incidence of the electronic file at the third network device; determine that the electronic file is malware; and initiate an intrusion detection protocol configured to deny the electronic file access to the third network device.
US11057413B2 System and method for behavioural biometric authentication using program modelling
An authentication method for use in a device and comprises monitoring a program behavior stream comprising a plurality of program observables that comprises a program observable. The method records the program observable and matches the recorded first program observable to a program model selected from a plurality of program models stored within a program store. A user model is selected from a plurality of user models stored within a user store corresponding to the program model. A user behavior stream corresponding to the program observable is monitored and a user observable contained in the user behavior stream is recorded. The user observable is correlated to the user model and an authentication state associated with the device is determined based on the correlating.
US11057411B2 Log analysis device, log analysis method, and log analysis program
A log acquirer acquires a communication log to be analyzed obtained from communications in a predetermined network. A log analyzer detects a terminal conforming to an analysis rule using a signature generated based on the characteristics of a communication log generated by a terminal infected with malware. A primary scorer and a secondary scorer calculate a score indicating the degree of threat for a detection result including the information on the terminal detected by the log analyzer and an analysis rule to which the terminal conforms using the information on the analysis rule and the information on the detection result. A detection result display unit outputs the detection result and the score calculated by the primary scorer and the secondary scorer.
US11057409B1 Apparatus having engine using artificial intelligence for detecting anomalies in a computer network
A system comprises an enterprise network system and engine. The engine has a discovery module coupled to a switch device, an AI and machine learning based monitoring and detection module coupled to the switch device, and a remediation module coupled to the switch device. The remediation module is configured to initiate a remediation process based upon the detection of at least one of the anomalies from the flow of data.
US11057406B2 Microservice integration fabrics network intrusion detection and prevention service capabilities
Aspects of the present invention provide an approach for providing network intrusion detection and prevention service (NIDPS) capabilities to a microservice in a networked computing environment. In an embodiment, a set of rules for accessing the microservice is retrieved. A NIDPS microservice is created within the environment of the microservice fabric that supports the microservice using the set of rules. The NIDPS microservice is established as a proxy communications destination for communications to the microservice such that communications that are intended for the microservice are instead rerouted to the NIDPS microservice. These communications are filtered by the NIDPS microservice according to the set of rules (e.g., to remove any communications that are determined to be threats).
US11057405B2 Automated malware family signature generation
The automatic generation of malware family signatures is disclosed. A set of metadata associated with a plurality of samples is received. The samples are clustered. For members of a first cluster, a set of similarities shared among at least a portion of the members of the first cluster is determined. The similarities are evaluated for suitability as a malware family signature. Suitability is evaluated based on how well the similarities uniquely identify the members of the first cluster. In the event the similarities are determined to be suitable as a malware family signature, a signature is generated.
US11057403B2 Suspicious packet detection device and suspicious packet detection method thereof
A suspicious packet detection device and a suspicious packet detection method thereof are provided. The suspicious packet detection device captures an HTTP packet transmitted from an internal network to an external network, and based on an HTTP header of the HTTP packet, determines that the HTTP packet belongs to one of a browser category and an application category and identifies the HTTP packet as one of a normal packet and a suspicious packet. When the HTTP packet is identified as the normal packet, the suspicious packet detection device further verifies whether the HTTP packet is the suspicious packet or not by comparing the HTTP header with relevance information or by using a URL classification model.
US11057402B2 Parallelism and n-tiering of knowledge inference and statistical correlation system
An n-tiering security threat inference and correlation apparatus (100) for monitoring and anticipating cyber attacks is disclosed. The apparatus comprises a plurality of groups of inference-correlation systems (106(a, b)-114(a, b)), each group arranged with at least one inference system and at least one associated correlation system configured to monitor at least one network; and an input/output (I/O) system (102) configured to receive security events, and broadcast the received security events to the plurality of groups of inference-correlation systems; wherein the respective groups of inference-correlation systems are configured to process only the broadcasted security events relevant to the respective networks to identify the cyber attacks. A method of operating the apparatus is also disclosed.
US11057398B2 Detecting poisoning attacks of internet of things (IOT) location beacons in wireless local area networks (WLANS) with silence periods
Poisoning attacks by spoofing location beacons in a WLAN are detected using silence periods. A location beacon identifier is received from a mobile device allegedly within range of a location device transmitting location beacons, along with a timestamp of transmission for each of the location beacons. Also silence periods associated with the location device, during which transmissions of location beacons are temporarily discontinued, and which are unknown to the public, are determined or retrieved. The location beacon transmission time is compared to the silence periods. Responsive to the location beacon transmission time corresponding to at least one of the silence periods, the location device flagged as poisoned.
US11057396B2 Intelligent transportation system station, host processor, and method therefor
An intelligent transportation system, ITS, station (600) comprising: a host processor (640); and a memory (664) operably coupled to the host processor (640). The host processor (640) is configured to: perform verification per identity that includes precomputation of data for a plurality of neighbouring ITS stations of the ITS station (600); store precomputation data for the verified identity of the plurality of neighbouring ITS stations in the memory (664); and extract from memory (664) and use the stored precomputation data for a respective neighbouring ITS station to perform an accelerated verification of a subsequent message received from that neighbouring ITS station.
US11057394B2 Determining eligibility for multiple client media streaming
Methods, systems and devices to authorize access to a simultaneous media streams are described. After a first media stream is initiated with a first client device, an authorization service receives a request to establish the simultaneous second media stream with a second client device. The service determines whether the second client device is at a geographic location where simultaneous streaming is allowed, and grants or denies access to the second simultaneous stream accordingly.
US11057387B2 Infrastructure aware adaptive resource allocation
Disclosed are systems, methods, and computer-readable storage media for infrastructure aware adaptive resource allocation. A resource manager can receive a request to allocate a first container instance in a network. The resource manager can determine a set of candidate computing nodes in the network that are capable of hosting the first container instance and request, from an infrastructure monitor that received infrastructure data from the network, health metrics for the set of candidate computing nodes. The resource manager can select, based on the health metrics for the set of candidate computing nodes, an optimal computing node to host the first container instance, and allocate the first container instance on the optimal computing node.
US11057386B2 Dynamic authentication and authorization mechanisms
A computing system architecture includes a token generator communicable with a client token agent. The client token agent is communicable with a client database access agent. A database management system is communicable with the token agent. The database management system is communicable with the client database access agent. A client authorization management system is communicable with the database management system. The client authorization management system stores a list of authorized operations for a client. The list of authorized operations is configured to be changeable during a client login session.
US11057382B2 Computing devices and methods for propagating updates to user profile data
A data update computing device is provided. The data update computing device receives, from one of a user computing device and a first relying party computing device, a first access authorization message, wherein the first access authorization message identifies (i) a first relying party and (ii) a first user data element of the user to be shared with the first relying party. The data update computing device generates a first globally unique identifier (GUID), wherein the first GUID is uniquely associated in a first record in a GUID database table with the first user data element and the first relying party; receives an updated value of the first user data element of the user; stores the updated value of the first user data element in the first record, and flag the first record as updated in the GUID database table; and transmits the first GUID to the first relying party.
US11057380B2 Secure online ID validation and review system
A method of detecting fraudulent activity during authenticating users and user identifications includes initiating a user's device to capture a sequence of images of the user to be authenticated commencing when the camera is operational and prior to receiving from the user a selection of the control that triggers capture of images and continuing until detecting that the user has selected the control to trigger capture of images, thereby enabling capture of activity performed by the user prior to and contemporaneous with selecting the control, including any attempted fraudulent activity of the user to be authenticated. Video, still images and audio of the user seeking authentication can be captured.
US11057377B2 Transaction authentication
A biometric token is generated for a user and provided to a user-operated device. A pre-staged transaction is defined by a user and the user supplies the token for association with the pre-staged transaction. Subsequently, a user visits a transaction terminal and a new candidate token is generated from biometric attributes of the user. The candidate token is matched to the token associated with pre-staged transaction to authenticate the user and the pre-staged transaction is processed at the transaction terminal as a completed transaction.
US11057376B2 Method, apparatus, and system for controlling intelligent device, and storage medium
A method, an apparatus, and a system for controlling an intelligent device are provided. The device transmits a control request including a first intelligent device identifier corresponding to a first intelligent device to be controlled. In response to transmitting the control request, the device receives a first verification character string that corresponds to the control request. The first verification character string is transmitted to a first wearable device locally establishing a data connection with the first wearable device. First signed information is received from the first wearable device. The first signed information is a result of performing a signature on first to-be-signed information and includes the first verification character string. The first signed information and operation information for controlling the first intelligent device are transmitted.
US11057369B2 Reconciliation digital facilitators in a hybrid distributed network ecosystem
A method for use in a hybrid network ecosystem comprising an enterprise network and a reconciliation network, the method comprising generating, by at least one first computing node in the enterprise network or the reconciliation network, a first digital facilitator, wherein the first digital facilitator enables a first device to use a private key to access data associated with a distributed ledger operation. The method also comprises transmitting, via the reconciliation network, the data from the first computing device to a second computing device, wherein the first computing device and the second computing device are connected via the reconciliation network.
US11057366B2 Federated identity management with decentralized computing platforms
Provided is a process that establishes user identities within a decentralized data store, like a blockchain. A user's mobile device may establish credential values within a trusted execution environment of the mobile device. Representations of those credentials may be generated on the mobile device and transmitted for storage in association with an identity of the user established on the blockchain. Similarly, one or more key-pairs may be generated or otherwise used by the mobile device for signatures and signature verification. Private keys may remain resident on the device (or known and input by the user) while corresponding public keys may be stored in association with the user identity on the blockchain. A private key is used to sign representations of credentials and other values as a proof of knowledge of the private key and credential values for authentication of the user to the user identity on the blockchain.
US11057353B2 Systems, methods, and devices for implementing a smart contract on a distributed ledger technology platform
In some embodiments, systems, methods, and devices disclosed herein are directed to implementations of one or more smart contracts deployed on a distributed ledger technology (DLT) platform. In some embodiments, implementation of one or more specific smart contracts and/or private data sharing technologies on a DLT platform can provide frameworks and/or solutions to generate a smart UCC platform that facilitates submission and tracking of Uniform Commercial Code (UCC) filings on a distributed ledger or blockchain platform. In some embodiments, implementation of one or more specific smart contracts and/or private data sharing technologies on a DLT platform can provide frameworks and/or solutions to generate a smart company platform for controlling, managing, and/or communicating company documents and/or communications on a distributed ledger or blockchain platform.
US11057351B1 System and method for session affinity in proxy media routing
A system and method for transferring media over a VPN connection are provided. The method includes receiving a first request for connection to a first target at a VPN server from a user device, upon which a domain name of the first target is resolved at the VPN server. A session identification (ID) string for the first request is generated, and the first request and the session ID string are sent from the VPN server to a proxy media server (PMS). A second request for connection to the first target or to a second target, different from the first target is received at the VPN server. The session ID string for the second request is determined or assigned or both, and the second request and the session ID string are sent from the VPN server to the PMS.
US11057347B2 Filtering data using malicious reference information
A device may receive data from a first endpoint device. The device may identify a network protocol. The network protocol may be associated with receiving the data. The device may identify a format. The format may be associated with encoding textual information in the data. The device may determine, based on the format and the network protocol, text in the data. The device may determine whether the text includes a reference from a plurality of references. The plurality of references may identify addresses associated with malicious devices. The device may selectively forward the data to a second endpoint device based on determining whether the text includes the reference.
US11057339B1 Systems and methods for providing an online platform for facilitating a communication connection between an individual and an elected official
Systems and methods for providing an online platform that enables an organization to provide information to interested individuals are described. The organization requests individuals to contact elected officials to express support, rejections or comments for specific issues. The online platform determines an advocate's elected official(s) and facilitates a communication connection between the advocate and an elected official(s). Geocoding is performed using the individual's street address and zip code to obtain geographical coordinates, and the coordinates are geomatched to district matching databases to determine the individual's elected officials. The individual selects a preferred method of connecting, and the platform enables and facilitates the connection. Further, the platform tracks and analyzes actions taken by advocates, provides analytical data about advocacy campaigns initiated by organizations, and also rates advocates based on the actions taken and the method by which the actions were taken to advocate for issues.
US11057336B2 Automated classification and time-based relevancy prioritization of electronic mail items
Automated classification and time-based relevancy prioritization of electronic messages is provided. An electronic mail item is parsed for identifying and extracting attributes for classifying the electronic message and for identifying time-sensitivity associated with the electronic message, and enriched with metadata identifying the classification and the associated time-sensitivity for displaying the electronic message based on the classification and based on relevancy to a receiving user based on the time-sensitivity.
US11057322B1 Ranking messages of conversation graphs in a messaging platform using machine-learning signals
According to an aspect, a method for ranking messages of conversation graphs in a messaging platform using machine-learning signals includes receiving a conversation view request to retrieve messages of a conversation graph stored on a messaging platform and determining a plurality of predictive outcomes for each of a plurality of messages of the conversation graph using predictive models. The determining step may include obtaining a plurality of signals relevant to the predictive models, the plurality of signals including data structure-related signals relating to the conversation graph and inputting the plurality of signals to the predictive models. The method includes ranking the plurality of messages based on the predictive outcomes and transmitting at least a subset of the plurality of messages to be rendered on a client application according to the rank.
US11057319B2 System and method for recovery of packets in overlay networks
A packet recovery transmits N requests for retransmission of the transmitted packet to the sender node at N scheduled times upon determining satisfaction of a packet recovery condition associated with a transmitted packet from a sender node at a receiver node. At least one of the N scheduled times includes a receiver waiting time. M retransmissions of the transmitted packet from sender node at M scheduled times is performed upon the first receipt of a request for retransmission of the transmitted packet. At least one of the M scheduled times includes a sender waiting time. N and M are non-zero positive integers, and at least one of N or M is greater than one.
US11057312B2 Apparatus and method for configuring MMT payload header
Disclosed are an apparatus and a method for configuring an MMT payload header. The apparatus for configuring an MMT payload header, according to one embodiment, extracts a sequence number of a media processing unit (MPU) comprising one or a plurality of media fragment units, which are to be aggregated into one payload and mapped, and displays the extracted sequence number of the MPU on the MMT payload header. Specifically, the apparatus for configuring an MMT payload header displays the sequence number commonly associated with a plurality of MFUs on the header only once, when the plurality of MFUs in one payload are aggregated in the one payload and mapped.
US11057311B2 Electronic device and method for receiving data via an asynchronous communication network, related communication system and computer program
This electronic device for receiving data via an asynchronous communication network including at least one elementary network, is configured to be connected to said elementary network and comprises: a receiving module configured to receive several successive data frames via the asynchronous communication network, each frame being sent over the elementary network according to a predefined sending table and with a minimum time gap between the sending time instants of two successive frames, a verification module configured, for at least two received data frames, to estimate a network jitter from the minimum time gap and reception time instants of at least two frames received on said elementary network, then to compare the estimated jitter to an authorized range of network jitter values.
US11057305B2 Congestion notification reporting for a responsive network
Techniques for identifying network congestion and adapting network performance to relieve the network congestion are described. As described, a network element such as a switch reports network congestion indicators such as link level control frames to a network controller. The network controller uses the network congestion indicators reported from the network elements to identify congestion points, data traffic, and data flows experiencing congestion at a network level. The network controller then determines optimized control parameters for the network in order to reduce or alleviate the congestion at the congestion points.
US11057304B1 DNS (domain name server)-based application-aware routing on SD-WAN (software-defined wide access network)
Applications associated with the network data packet are identified by parsing the network data packet of the received network data packets to identify a second-level domain from a destination IP address and searching the second-level domain database to identify the application associated with the second-level domain. It is determined whether the network data packet comprises a DNS packet or a non-DNS packet. Responsive to the network data packet comprising a DNS packet, a second-level domain database in real-time is updated by storing the destination IP address in association with the second-level domain, the second-level domain associated with the application. Responsive to the network data packet comprising a non-DNS packet, a network policy for enforcement on the identified application and routing the network data packet in accordance with the network policy for the application is identified.
US11057291B2 Test system
A test system tests a DUT configured as a wireless device. A golden device is configured to provide bidirectional communication between it and the DUT. A measurement device acquires a first signal S1 including at least an output SDUT of the DUT. An interface unit monitors a second signal S2 including at least one of the output SGD of the golden device and the output SDUT of the DUT. In response to the occurrence of a predetermined waveform pattern in the second signal, the interface unit generates a trigger signal TRIG for instructing the measurement device to acquire a signal.
US11057285B2 Non-intrusive IT device monitoring and performing action based on IT device state
Infrastructure management device(s) may monitor IT device(s) communicatively connected over a network. IT device state(s) may be determined for at least one of the IT device(s). Action(s) may be performed on one or more IT device(s), determined at least in part, by the state of the IT device(s).
US11057281B2 Determination of quality of service of a network tunnel
In some examples, an example method to measure quality of service (QoS) of a network tunnel may include configuring a network tunnel from a tunnel source endpoint to a tunnel destination endpoint, transmitting multiple status packets to the tunnel destination endpoint, receiving multiple forwarded status packets from the tunnel destination endpoint, determining a time of receipt of each of the forwarded status packets, and determining a QoS measure of the network tunnel based on a time of transmission of each of the multiple status packets and the time of receipt of each of the forwarded status packets.
US11057276B2 Bulk service mapping
Techniques related to bulk mapping network services are disclosed. The techniques include a system, comprising non-transitory memory devices, and hardware processors configured to execute instructions from the non-transitory memory devices to cause the system to determine a set of service entry point candidates for an organization based, at least in part, on network information received from load balancing servers, receive user input including a selection of a set of service entry points selected from the set of service entry point candidates, collect network information related to two or more service entry points of the set of service entry point candidates in parallel, the network information including returned errors associated with a respective service entry point, group the returned errors into category groups based on characteristics of the returned errors, and display the category groups on a display device for bulk resolution.
US11057273B2 Decentralized auto-scaling of network architectures
Disclosed herein are systems, devices, and methods for providing auto-scaling in a cluster of device instances. In one embodiment, a method is disclosed comprising updating, using a distributed counter, a metric associated with one or more instances executing a network application; identifying that the metric has exceeded a threshold defined in a scaling policy based on comparing the distributed counter to the scaling policy; identifying a command to execute in response to the metric exceeding the threshold; and executing the command to modify the one or more instances.
US11057270B2 Physical network orchestration for data centers
A method is provided in one example embodiment and includes creating a segment organization, which includes a configuration profile. The method also includes attaching the configuration profile to a server in the segment organization. The method further includes sending the attached configuration profile to a database in a physical network.
US11057269B2 System and method for configuring IED process bus network switches from substation topology specification
Method and system arranged for configuring Intelligent Electronic Device, IED, process bus network switches from a substation specification according to IEC 61850 standard, said method comprising: calculating, from a substation topology file and from control function and substation bay library files, a Substation Specification Description file and substation traffic demand flow files comprising a GOOSE message profile subscription file and a Sampled Values message profile subscription file; generating destination MAC addresses; simulating the process bus communication network using said substation traffic demand flow files and process bus communication network topology, said topology comprising said process bus network switches, respective links and IED links; calculating the shortest path between each publisher IED and each subscriber IED; calculating a switch multicast filtering rule file, for each switch output port, comprising a multicast filter rule that allows the calculated shortest paths; translating the filtering rule file into a file acceptable by the switch.
US11057267B1 Methods, systems, and computer readable media for managing multiple software defined wide area network (SD-WAN) software versions
A method for managing multiple software defined wide area network (SD-WAN) software versions includes providing a controller that defines an overall configuration for an SD-WAN and that creates configuration registries for individual SD-WAN appliances to implement their respective portions of the overall configuration. The controller generates, in an intermediate configuration language registry format, a first and second configuration registry for first and second SD-WAN appliance that respectively execute first and second versions of SD-WAN software. The controller respectively transmits the first and second configuration registries to the first and second SD-WAN appliances, which use the first and second configuration registries to configure themselves. The first and second SD-WAN appliances negotiate with each other for common SD-WAN features usable to implement configurations specified in the first and second configuration registries.
US11057265B2 Path check insight
Embodiments of the present disclosure relate to systems, methods, and user interfaces for monitoring and maintaining redundant network and storage paths. Initially, path check information is received at a path check server via one or more management nodes. Each of the one or more management nodes comprises one or more physical nodes corresponding to network and hardware infrastructure. Failed nodes of the one or more physical nodes are identified, the failed nodes indicating physical nodes having path failures. Upon determining the node does not have an active incident in progress, an incident corresponding to the node is generated. In embodiments, a notification may be communicated to one or more team members. The notification may include the incident and a status of the incident. In embodiments, data visualization corresponding to the incident may be provided.
US11057263B2 Methods and subsystems that efficiently distribute VM images in distributed computing systems
The current document is directed to methods and systems that efficiently distribute virtual-machine images (“VM images”) among servers within large, distributed-computer-system-implemented IAAS platforms to facilitate temporally and computationally efficient instantiation of virtual machines within the servers. In implementations discussed below, VM images are stored in a distributed fashion throughout one or more distributed computing systems, using several different VM-image-distribution models, in order to balance computational-resource usage, temporal constraints, and other factors and considerations related to VM-image distribution and VM instantiation.
US11057261B2 Systems and methods for transmitting data via an electrical cable
A method for transmitting data via a coaxial electrical cable includes (a) converting symbols of each input data stream of a plurality of parallel input data streams from digital form to analog form, (b) individually filtering symbols of each input data stream, (c) transforming symbols of each input data stream from a first frequency-domain to a first time-domain, to generate parallel first time-domain samples, (d) converting the first time-domain samples to a serial multi-carrier signal, and (e) injecting the multi-carrier signal onto the coaxial electrical cable.
US11057258B2 Data channel and control/management channel separation
Methods, systems, and devices for wireless communications are described. In some systems (e.g., Wi-Fi systems), two stations (STAs) may support communicating different information simultaneously via multiple links, channels, resource units, etc. Simultaneous communication may be enabled by a multi-band aggregation system, an enhanced preamble puncturing system, a multi-resource unit assignment system, a full duplex system, or some combination of these. A transmitting STA may transmit data to a receiving STA in a first set of resources while communicating different information with the STA in a second set of resources. The communicating may involve an additional transmission of data, control information, or management information, or receiving feedback from the receiving STA. In some examples, the data transmission may occur on a data channel, while the control information and feedback may occur on a control channel. The simultaneous communication may improve communication throughput while reducing feedback latency in the system.
US11057257B2 Method and device for timing alignment
A method and device for timing alignment are disclosed. The method includes widening spectra of two signals for timing misalignment estimation; performing cross-correlation between the two spectrum-widened signals; and estimating the timing misalignment between the two signals according to a result of the cross-correlation. Therefore, an accurate time alignment result will be obtained with low complexity. Furthermore, it will be appropriate for all types of signals including separated multi-carrier signals.
US11057251B1 Optimization of the number of numerologies and numerology selection method in fifth generation cellular communications systems
According to the necessities of users under a service of one base station, the disclosed method decides how many instantaneous numerology structures should be used mostly and selects the most suitable numerologies from the existing numerology set.
US11057248B2 Baseband system for a wireless receiver and baseband signal processing method thereof
A baseband system includes: an estimation and compensation circuit estimating frequency-independent non-ideal effects based on an original IQ signal pair, and compensating the original IQ signal pair based on a result of the estimation to obtain a compensated IQ signal pair; a channel estimation and equalization circuit performing channel estimation and equalization based on the compensated IQ signal pair to obtain an equalized IQ signal pair; and a tracking and compensation circuit obtaining a result of tracking of residual quantities of the aforesaid non-ideal effects based on the equalized IQ signal pair, and compensating the equalized IQ signal pair based on the result of the tracking to obtain an output IQ signal pair.
US11057243B2 Aliasing behavior for traffic to multihomed sites in ethernet virtual private network (EVPN) networks
For use in an Ethernet Virtual Private Network (EVPN) in which a site including at least one MAC-addressable device is multihomed, via a customer edge device (CE), to at least two provider edge devices (PE1 and PE2), the potential problem of one of the at least two provider edge devices (PE2) dropping or flooding packets designed for a MAC-addressable device of the multihomed site is solved by controlling advertisements of an auto-discovery per EVPN instance (A-D/EVI) route (or an auto-discovery per Ethernet segment identifier (A-D/ESI) route) to a remote provider edge device (PE3), belonging to the EVPN but not directly connected with the CE. Such advertisements may be controlled by: (a) determining, by PE2, whether or not a MAC-learning condition is met; and (b) responsive to a determination that the MAC-learning condition is met, advertising, by PE2, an A-D/EVI route (or an A-D/ESI route) to the remote provider edge device (PE3), and otherwise, responsive to a determination that the MAC-learning condition is not met, suppressing, by PE2, an A-D/EVI route advertisement (or an A-D/ESI route advertisement).
US11057229B2 Mobile payment application architecture
A system, apparatus, and method for conducting payment transactions using a mobile device. Embodiments of the invention are directed to an architecture or system design for the functional elements residing in a mobile device that may be used to conduct a payment transaction. The inventive architecture may be implemented as a set of functional modules resident in a secure element that is embedded or otherwise incorporated into the mobile device.
US11057227B2 Network management using wake on LAN
In a network including a controllable device, a method for sending a network management method to the controllable device including asserting a network management command directed to the controllable device and in response to the network management command generating and sending over the network a first number of WOL packets having a predetermined relationship to one another, followed by generating and sending over the network a second number of WOL packets, a predetermined relationship between the second number of WOL packets defining the network management command.
US11057226B1 Electronic device detecting change of power mode based on external signal
Disclosed is electronic device configured to switch a power mode from a first mode to a second mode as a first time interval and a second time interval sequentially pass. The electronic device includes a first mode receiver, a second mode detector, and a second mode verifier. The first mode receiver outputs a first detection signal, based on three or more receive signals, when the first time interval begins. The second mode detector outputs a second detection signal, based on the first detection signal and a change in voltage levels of the three or more receive signals, when the second time interval begins. When the second detection signal is received, the second mode verifier detects an option pattern generated by the three or more receive signals and verifies that the second time interval begins.
US11057225B2 Enforcing compute equity models in distributed blockchain
An example operation may include one or more of identifying a blockchain transaction submitted from a requestor member of the blockchain, identifying one or more task requests associated with the blockchain transaction, determining one or more blockchain members having resources available for completing the one or more task requests, wherein the resources are identified via known computing parameters associated with each of the one or more blockchain members, and assigning the one or more task requests to the one or more blockchain members based on the resources available.
US11057224B1 Method and system for performing physical unclonable function generated by non-volatile memory write delay difference
A method for performing a physical unclonable function generated by a non-volatile memory write delay difference includes a resetting step, a writing step, a detecting step, a terminating step and a write-back operating step. The resetting step includes resetting two non-volatile memory cells controlled by a bit line and a bit line bar, respectively. The writing step includes performing a write operation on each of the two non-volatile memory cells. The detecting step includes detecting a voltage drop of each of the bit line and the bit line bar, and comparing the voltage drop and a predetermined voltage difference value to generate a comparison flag. The terminating step includes terminating the write operation on one of the two non-volatile memory cells according to the comparison flag. The write-back operating step includes performing a write-back operation on another of the two non-volatile memory cells.
US11057223B2 Anti-counterfeit communication system
The communication system includes a communication buffer and a communication terminal. The communication buffer includes a physical unclonable function (PUF) device, and the communication buffer provides a security key generated by the PUF device. The communication terminal is coupled to the communication buffer, and transmits a mapping request to the communication buffer to ask for the security key. The communication terminal manipulates the transmission data with the security key to generate the encrypted data, and transmits the encrypted data to the communication buffer. The communication buffer further restores the transmission data from the encrypted data according to the security key.
US11057219B2 Timestamped license data structure
Technology is disclosed herein for a timestamped license data structure. In at least one implementation, program instructions stored on one or more computer readable storage media, when executed by a processing system, direct the processing system to at least, responsive to a launch of an application, obtain a license file for the application, the license file comprising a license data structure comprising: a user license; a licensing service signature; a licensing service public key; and a trusted timestamp package. The processing system is also directed to analyze the license data structure using the trusted timestamp package to determine if the licensing service public key was valid when the user license was signed by the licensing service signature if the licensing service public key is invalid. If the licensing service public key was valid when the user license was signed by the licensing service signature: enable features of the application.
US11057216B2 Protection method and protection system of system partition key data and terminal
Disclosed are a protection method and a protection system of system partition key data and a terminal. The protection method includes: obtaining a verification table corresponding to key data carried in a system partition file when a bootloader is started, and decrypting a digital signature by using a preset public key or a private key to obtain a first verification value; generating a second verification value according to a block address and a hash value, and comparing the first verification value with the second verification value; and starting a system if the first verification value is consistent with the second verification value.
US11057214B2 Authentication apparatus using visual cryptography and method thereof
An authentication method using visual cryptography in a smart terminal, including: receiving, from an authentication server, a key image in which a user's individual cryptography string generated by the authentication server is separated; requesting user authentication from the authentication server; after requesting the user authentication, receiving, from a camera, an encrypted image shown on a display device; extracting an encrypted area from the received encrypted image; converting the extracted encrypted area to match with the key image in size and shape and overlaying the encrypted area with the key image pre-stored in the smart terminal; displaying an authentication code shown in an area where the encrypted area is overlaid with the key image and receiving the authentication code to transmit the authentication code to the authentication server; and after transmitting the authentication code, receiving an authentication result from the authentication server to provide the authentication result to the user.
US11057211B2 Secured protection of advertisement parameters in a zero trust low power and lossy network
In one embodiment, a method comprises: receiving, by a parent network device providing at least a portion of a directed acyclic graph (DAG) according to a prescribed routing protocol in a low power and lossy network, a destination advertisement object (DAO) message, the DAO message specifying a target Internet Protocol (IP) address claimed by an advertising network device in the DAG and the DAO message further specifying a secure token associated with the target IP address; and selectively issuing a cryptographic challenge to the DAO message to validate whether the advertising network device generated the secure token.
US11057209B2 Methods and systems that efficiently and securely store data
The current document is directed to distributed-secure-storage systems, and processes carried out within the distributed-secure-storage systems, that provide for secure storage and retrieval of confidential and critical data, referred to as “secrets,” within distributed computer systems. The secret-storage systems partition an input secret into multiple secret shares and distribute the secret shares among multiple secret-share-storing node subsystems, without persistently storing the secret itself. An agent within a client device subsequently requests a secret share corresponding to a secret, or a share of data derived from the secret share, from each of the multiple secret-share-storing nodes. The multiple secret-share-storing nodes additionally cooperate to periodically alter the stored secret shares corresponding to a secret in a way that allows agents to recover the original secret, or derived data, from all or a portion of the altered secret shares or derived-data shares.
US11057206B2 Random number generator, encryption device including the same, and method of operating the encryption device
An encryption device for generating an electronic signature for security includes a random number generation module configured to generate at least one random number, a random number adjusting module configured to generate a one-time random number satisfying a random number condition in an elliptic curve cryptography-based digital signature algorithm (ECDSA) by adjusting the at least one random number; and an electronic signature generation module configured to generate the electronic signature using the one-time random number based on the ECDSA.
US11057203B2 Network Function Virtualization (NFV) hardware trusted hosted MANO
A Network Function Virtualization (NFV) system implements hardware trusted Management and Orchestration (MANO). A Hardware (HW) trust server issues a HW trust challenge to a first MANO system. The first MANO system hashes its physically-embedded read-only hardware trust key to generate a HW trust result and transfers the HW trust result to the HW trust server. The HW trust server validates the hardware trust result and transfers a HW trust certificate to the first MANO system. The first MANO system transfers the HW trust certificate and NFV MANO data to a second MANO system. The second MANO system validates the HW trust certificate. The second MANO system exchanges NFVI control data with NFVI circuitry responsive to the NFV MANO data when the HW trust certificate is valid. The second MANO system isolates the NFV MANO data when the HW trust certificate is not valid.
US11057199B2 Secure probabilistic one-time program by quantum state distribution
Method and system for executing a one-time program comprising at least one instruction operating on at least one input value (a, b) and returning at least one output value (O), wherein each instruction of the one-time program is encoded onto a state of an elementary quantum system, comprising: encoding the at least one input value (a, b) onto a quantum gate according to a pre-defined input-encoding scheme; applying the quantum gate to the at least one elementary quantum system; making a measurement of a resulting state of the at least one elementary quantum system after the quantum gate; and determining the at least one output value from a result of the measurement.
US11057196B2 Establishing shared key data for wireless pairing
In an example, a method includes pairing a first electronic device and a data relay apparatus associated with a second electronic device to establish a secure wireless communication link therebetween. Each of the first electronic device and the data relay apparatus may be associated with an identifier and a verifier, each verifier being to verify the identifier of the other of the first electronic device or data relay apparatus. The pairing may include mutual verification of an identifier using the verifier, establishing shared key data and using the shared key data to establish a shared secret value for use in determining a derived key.
US11057194B2 Processing system, related integrated circuit, device and method
A processing system includes a first processing unit; a second processing unit; and a cryptographic coprocessor communicatively coupled to the first processing unit and the second processing unit. The cryptographic coprocessor includes a key storage memory for storing a cryptographic key; a first interface configured to receive source data to be processed directly from the first processing unit; a hardware cryptographic engine configured to process the source data as a function of the cryptographic key stored in the key storage memory; a second interface configured to receive a first cryptographic key directly from the second processing unit; and a hardware key management circuit configured to store the first cryptographic key in the key storage memory.
US11057193B2 Enhanced randomness for digital systems
A digital processing method, which comprises obtaining a stream of N-bit input data words; obtaining a value k between 0 and M−1, inclusively, where M>1; processing each of the N-bit input data words at least based on the kth of M permutation elements to produce a corresponding N-bit output data word; and outputting a stream of N-bit output data words on a network or storing the stream of the N-bit output data words in a non-transitory storage medium.
US11057191B2 Data retention management in databases
An identifying data set is defined including semi-identifying attributes with semi-identifying attribute values corresponding to an entity. Descriptive records corresponding to the semi-identifying attributes are created. Based on the descriptive records, retention records with retention attributes are created. A composed retention attribute is generated based on applying cryptographic hash algorithms to the retention attributes stored in a database. A retention attribute description is generated with a category and payload corresponding to the composed retention attribute. The semi-identifying attributes with corresponding positions are stored in the retention attribute. Hashes corresponding to the retention attributes are computed based on a composing mechanism that includes logic to compute the hashes. The hashes are combined to generate the composed retention attribute. When a request is received to permanently delete the entity from the database, the entity may be permanently deleted from the database.
US11057182B2 Method and apparatus for transmitting reception acknowledgement in wireless communication system
Provided are a method and apparatus for transmitting acknowledgement/not-acknowledgement (ACK/NACK) of a user equipment in a carrier aggregation system. The method includes: assigning first and second control regions as search spaces for a specific cell; detecting scheduling information with respect to the specific cell from the first control region and/or second control region; receiving a data channel from the specific cell on the basis of the scheduling information; and transmitting ACK/NACK indicating a reception acknowledgement for the data channel, wherein if the scheduling information is detected from the first control region, the ACK/NACK is transmitted using a radio resource linked to another radio resource used to receive the scheduling information, and wherein if the scheduling information is detected from the second control region, the ACK/NACK is transmitted using a pre-set radio resource through a higher layer signal.
US11057181B2 Control overhead reduction for low latency communication systems
The present disclosure relates to reducing control overhead in a wireless communication system. For example, a network entity may determine to transmit data according to a codeword format based on at least one of a transmission time interval (TTI), or a traffic type of the data, or any combination thereof, and configure the data for transmission on a communication channel according to the codeword format. Further, for instance, a user equipment may receive a transmission from a network entity on a downlink communication channel according to a codeword format, and transmit at least one of an acknowledgement (ACK) or a negative acknowledgement (NACK) on an uplink communication channel in response to receiving the transmission from the network entity.
US11057172B2 Transmission apparatus and transmission method
An transmission apparatus of the present disclosure comprises a transmission signal generator that generates a transmission signal including a legacy preamble, a non-legacy preamble and a data field and a transmitter that transmits the transmission signal. The non-legacy preamble comprises a first and a second signal fields, the second signal field comprising a first channel field and, when the transmission signal occupies more than one subband channel, the second signal field further comprising a second channel field. Each of the first and the second channel fields comprises a user-specific field that includes a plurality of user fields, each carrying per-user allocation information for a terminal station. The plurality of user fields are split equitably between the first and the second channel fields when a full bandwidth that covers a first and a second subband channels is allocated for multi-user MIMO transmission.
US11057167B2 Method and apparatus for implementing efficient switching on a split bearer
A method and apparatus may include configuring a split bearer. The split bearer is configured with a first data path between a user equipment and a first network node, and the split bearer is also configured with a second data path between the user equipment and a second network node. The split bearer is configured for a switching operation. The switching operation includes an operation where data transmission is restricted to be towards only one of the first data path and the second data path. The method also includes first transmitting on the split bearer towards the first data path. The method also includes performing the switching operation. The transmitting towards the first data path is switched to transmitting towards the second data path. The method also includes second transmitting on the split bearer towards the second data path.
US11057163B2 Data transmission method and related device
In certain embodiments, a method includes repeatedly transmitting, by a first device, first data to a second device within a first time unit set. The first data is determined based on a first redundancy version and to-be-transmitted system bits. The first time unit set includes K time units, K≥3, and K is an integer. The method further includes when a first condition is met, stopping, by the first device, transmitting the first data in the Mth time unit, where 2≤M≤K, and M is an integer.
US11057161B2 Wireless communication method and apparatus in wireless communication device for transmitting feedback acknowledgement information
Provided in an embodiment of the present invention are a radio communication method and device capable of preventing repeated transmission of feedback acknowledgement information and improving PUCCH efficiency. The method comprises: a terminal device transmitting first feedback information in a first time unit, wherein a bit in the first feedback information corresponding to a first resource unit is set to be placeholder information, the first resource unit belongs to a first target resource set, the first resource unit is used to transmit a first downlink channel, a feedback time sequence corresponding to the first downlink channel is a second time unit, the first target resource set comprises at least one resource unit, and the second time unit is different from the first time unit.
US11057160B2 Method for transmitting multiplexed HARQ feedbacks in a carrier aggregation system and a device therefor
A method for a wireless device operating in a wireless communication system includes receiving configuration information for configuring a non-Physical Uplink Control Channel (PUCCH) cell; and transmitting a Hybrid Automatic Repeat request (HARQ) feedback of the non-PUCCH cell on a special cell (SpCell) or a PUCCH cell other than SpCell, according to indication information. Further, when the indication information is not received with the configuration information, the HARQ feedback is transmitted on the SpCell, and when the indication information is received with the configuration information, the HARQ feedback is transmitted on the PUCCH cell.
US11057154B2 Method and apparatus for rate matching interleaving for polar codes
A method and an apparatus for rate matching interleaving for polar codes are provided. The method includes: obtaining a first codeword bit sequence; dividing the first codeword bit sequence to obtain one or more segments; performing intra-segment and/or inter-segment interleaving on the one or more segments to generate an interleaved bit sequence.
US11057150B2 Polar code transmission method and apparatus
This application discloses a transmission method, a transmission apparatus, and a communications device. The transmission method includes: performing polar encoding on a bit sequence, to obtain an encoded sequence, where the bit sequence includes control information and a cyclic redundancy check CRC sequence; fragmenting the encoded sequence, to obtain n encoded subsequences, where n is an integer, and n>0; and scrambling the n encoded subsequences by using n scrambling sequences respectively, to obtain n scrambled sequences. In the transmission method, the n scrambling sequences are newly defined based on encoding and decoding features of a polar code, and the n scrambling sequences additionally carry ┌log2n┐-bit information. According to the foregoing encoding method, signaling overheads are reduced.
US11057144B2 Optical transmission apparatus, method for setting wavelength, and optical transceiver
An optical transmission apparatus includes the optical transceiver configured to generate a test light for each wavelength assignable to the wavelength multiplex light to transmit the test light to the optical transmission line via the wavelength multiplexer and demultiplexer, detect a reflected light for the test light from the optical transmission line, calculate an arrival distance of the test light for the each wavelength from the reflected light for the each wavelength, and set a wavelength having a longest arrival distance among the arrival distances for the respective wavelengths, as a wavelength to be assigned to the signal light in the optical transceiver.
US11057141B2 Method and apparatus for allocating and processing sequences in communication system
A method for allocating and processing sequences in a communication system includes: dividing sequences in a sequence group into multiple sub-groups, each sub-group corresponding to its own mode of occupying time frequency resources; selecting sequences from a candidate sequence collection corresponding to each sub-group to form the sequences in the sub-group by: the sequences in a sub-group i in a sequence group k being composed of n sequences in the candidate sequence collection, the n sequences making a |ri/Ni−ck/Np1| or |(ri/Ni−ck/Np1) modu mk,i| function value the smallest, second smallest, till the nth smallest respectively; allocating the sequence group to cells, users or channels. It prevents the sequences highly correlated with the sequences of a specific length from appearing in other sequence groups.
US11057138B2 Interference cancellation method and base station
Embodiments of this application disclose an interference cancellation method and a base station. The method in the embodiments of this application may include obtaining, by a first base station, system information of a neighboring cell. The method may also include determining, by the first base station, interference channel information of a second base station to the first base station based on the system information, where the second base station is a base station in a coverage area of the neighboring cell. Furthermore, the method may also include receiving, by the first base station based on the interference channel information, an uplink signal sent by user equipment in a coverage area of the first base station.
US11057135B2 Transmitter, receiver, and clock transfer method
A transmitter includes a memory, and a processor configured to generate a first clock parallel signal by performing serial-parallel conversion of a first clock signal acquired by using a reference clock and generate a second clock parallel signal by performing serial-parallel conversion of a second clock signal acquired by using the reference clock, generate first compressed information by compressing the first clock parallel signal on the basis of clock periodicity and generate second compressed information by compressing the second clock parallel signal based on the clock periodicity, generate a serial signal by adding a synchronization signal indicating a top of a multiplexed signal to the multiplexed signal generated by time-division multiplexing of the first compressed information and the second compressed information, and transmit the serial signal to a receiver.
US11057134B2 Integrating digital advertising with cable tv network and broadcast advertising
A programmable and universal video serving platform enabling brand safe digital ads to be inserted into linear television cable and broadcast programming feeds. A linear programming feed includes a cue message that indicates a spot for ad insertion into the programming feed. Detection of the cue message triggers the generation of a VAST protocol ad request from the video serving platform to a digital ad server, the request including programmable fields that are configured to obtain data to generate standard and custom VAST tag information, including audience impression information and distribution platform information as needed. The digital ad server delivers a VAST response back to the video serving platform identifying a digital ad for insertion, and the video serving platform enables playout of the selected digital ad during the designated insertion spot into the programming feed. This process can be implemented for national cable and broadcast network advertising such that VAST-driven ads can be placed to run on the entire footprint of the cable or broadcast network, or just in a particular geographic market.
US11057129B2 SCell selection and optimization for telecommunication systems
UE-related measurements taken on a Pcell in a wireless communication system are formed into a set of data. The Pcell overlaps with Scell(s). The UE-related measurements on the Pcell are for a specific UE in the Pcell. Using a ML algorithm applied to the set of data, achievable channel quality is predicted for the specific UE for each of the Scell(s). The predicted achievable channel qualities are output for the specific UE to be used for Scell selection. At a RAN node, the set of data is sent toward an Scell prediction module for the module to determine information suitable to enable Scell selection for the specific UE. The RAN node receives information from the module allowing the RAN node to inform the selected UE of Scell(s) to be used for Scell selection for the specific UE. A node may train the ML algorithm using UE-related measurements on the Pcell.
US11057128B1 Locationing based on channel-specific gain
A wireless communication device may determine that a channel is to be used to transmit an advertisement. The wireless communication device may determine a channel-specific gain associated with transmitting the advertisement via the channel. The wireless communication device may generate the advertisement to include information identifying a channel identifier of the channel and the channel-specific gain. The wireless communication device may transmit the advertisement for locationing based on a received signal strength indicator (RSSI) of the advertisement.
US11057124B2 Wireless communication system, wireless communication apparatus and directivity determination method
A wireless receiver measures a reception parameter while scanning multiple pieces of reception directivity for an interval during which a signal is not transmitted from a wireless transmitter. The wireless transmitter transmits a signal while scanning multiple pieces of transmission directivity, and the wireless receives measures a reception parameter relating to reception of the signal and determines k pieces of transmission directivity that correspond to high-ranking k results, respectively, of the measurement that have a great reception parameter. The wireless transmitter forms any transmission directivity and transmits a signal, and the wireless receives measures a reception parameter while scanning M pieces of reception directivity and determines reception directivity that is to be used for data communication.
US11057123B1 Transceiver and transceiver calibration method
The application discloses a transceiver and a transceiver calibration method. The transceiver includes: a calibration signal generation unit for generating a first test signal and a second test signal to a transmission unit in a gain calibration mode; the transmission unit for generating a combined signal according to the first test signal, the second test signal and a transmission gain; a mixer for performing self-mixing upon the combined signal to generate a self-mixed signal; a receiving unit for generating a receiving signal according to the self-mixed signal; a Fourier transformer for computing a power of the receiving signal at a specific frequency; and a gain calibration unit for adjusting the transmission gain according to the power at the specific frequency in the gain calibration mode.
US11057120B2 System and method for obtaining far field radiated power with multiple radiated power measurements in middle field range
A method for testing an antenna array uses a probe antenna to measure an RF signal antenna pattern of the antenna array. The method includes measuring the RF signal antenna pattern at a first position and at a second position relative to the antenna array. The first position and the second position are located at different distances from the antenna array in a middle field of the antenna array. The middle field satisfies near field criteria for the antenna array and also satisfies far field criteria for each antenna element of the plurality of antenna elements in the antenna array. The method further includes determining, based on the first measurement and based on the second measurement, the RF signal antenna pattern at a third position relative to the antenna array located in a far field of the antenna array.
US11057118B2 Indoor localization with beacon technology based on signal strength distribution and deep learning techniques
Systems, apparatuses and methods may provide for technology that generates a real-time histogram image based on real-time signal strength indicator (SSI) information associated with a plurality of beacons adjacent to an indoor area. The technology may also input the real-time histogram image to a neural network and automatically determine a location of a mobile recipient of the real-time SSI information in the indoor area based on an output of the neural network.
US11057115B1 Optical communication device
An optical communication device includes a plurality of laser sources, a plurality of first meta-lenses, and an optical fiber. The laser sources transmit a plurality of laser beams in the same direction according to electrical signals. The laser beams have different wavelengths. The first meta-lenses receive the laser beams, and in a first substrate, refract the laser beams to a focal point to generate a mixed laser beam. The optical fiber receives the mixed laser beam for transmission. The focal point is arranged at the input end of the optical fiber.
US11057109B2 System and method for performance optimization in and through a distributed antenna system
A method for operating a Distributed Antenna System (DAS) includes providing a plurality of Digital Remote Units (DRUs), each configured to send and receive wireless radio signals and providing a plurality of inter-connected Digital Access Units (DAUs), each configured to communicate with at least one of the plurality of DRUs via optical signals and each being coupled to at least one sector of a base station. The method also includes providing a plurality of sensors operable to detect activity at each of the plurality of DRUs, turning off a DRU downlink signal at one of the plurality of DRUs in response to an output from one of the plurality of sensors, and turning on a DRU downlink signal at another of the plurality of DRUs in response to an output from another of the plurality of sensors.
US11057108B1 Out-of-band commissioning in a luminaire or other radio frequency network using visible light communication
A lighting system employs out-of-band (OOB) commissioning techniques, and includes a plurality of uncommissioned luminaires located in a space and a commissioning device. The commissioning device receives, via a visible light camera, over a VLC communication band, a respective VLC code of a respective uncommissioned luminaire. Commissioning device receives via a radio frequency (RF) transceiver, over an RF commissioning network band, a respective RF identifier of the respective uncommissioned luminaire. In response to receiving the respective VLC code and the respective RF identifier, commissioning device determines whether the respective uncommissioned luminaire is in a candidate luminaire roster of candidate luminaires suitable for commissioning in the space. Based on the determination of whether respective uncommissioned luminaire is in the candidate luminaire roster, commissioning device accepts or rejects commissioning of the respective uncommissioned luminaire in the space.
US11057105B2 Monitoring device and monitoring method
A monitoring device 1 includes an individual alarm reception unit 10 configured to receive individual alarms issued from a plurality of devices constituting an optical transmission network, a table 20 in which a search operator for searching for necessary information, that is information required for treating the individual alarms in the same manner when specifications of the individual alarms are different from each other, is associated with information included in the individual alarms, a search operator extraction unit 30 configured to extract the search operator using the information included in each of the individual alarms as a key, a rule 40 in which the search operator is associated with the necessary information; and a unified alarm information generation unit 50 configured to search the rule 40 using the search operator as a key, compare the information included in the individual alarms with the necessary information corresponding to the search operator, and add information, that is included in the necessary information but not included in the individual alarm, to the individual alarm to generate unified alarm information.
US11057100B2 Signal booster with spectrally adjacent bands
Technology for a repeater is disclosed. The repeater can include a first multiband filter. The repeater can include a second multiband filter. The repeater can include one or more first-direction signal paths communicatively coupled between the first multiband filter and the second multi-band filter. At least one of the one or more first-direction signal paths can be configured to amplify and filter signals in two or more spectrally adjacent bands. The repeater can include one or more second-direction signal paths communicatively coupled between the first multiband filter and the second multi-band filter. At least one of the one or more second-direction signal paths can be configured to amplify and filter signals in two or more spectrally adjacent bands.
US11057088B2 Hierarchically elaborated phased-array antenna modules and faster beam steering method of operation
A system substantially updates all the phase shifter values of a phased array antenna by using two “global writes” to update these parameters to all phased-array transformation circuits simultaneously via a serial bus. Antenna elements, each controlled by a phased-array transformation circuit, are individually configured to transform phase and gain according to a register array. The register array has a local register group and a central register group, the local registers physically placed close in proximity to RF chains which each correspond to an element of array antenna, whereby each set of local registers control an individual antenna element and a central register controlling overall beam steering function. Gain values are hierarchically distributed. The apparatus is configured to efficiently elaborate phase shift weights into a submodule of a phase array antenna system with low noise and bandwidth.
US11057082B2 Method and apparatus for transmitting and receiving channel state information in wireless communication system
A method by a terminal, a method by a base station, a terminal, and a base station are provided. The method by the terminal includes receiving a first channel state information reference signal (CSI-RS) and a second CSI-RS from a base station; generating channel state information (CSI) based on both the first CSI-RS and the second CSI-RS; and reporting the CSI to the base station, wherein the CSI includes a rank indicator (RI) and a channel quality indicator (CQI).
US11057081B2 Multi-cell processing architectures for modeling and impairment compensation in multi-input multi-output systems
A method for predistortion comprising receiving a plurality of input signals forming a multiple-input signal in a multiple-input multiple-output system, generating a pre-distorted multiple-input signal from the received multiple-input signal, generating a multiple-output signal by feeding the pre-distorted multiple-input signal into a multiple-input and multiple-output transmitter, estimating impairments generated by the multiple-input and multiple-output transmitter, the impairments comprising nonlinear crosstalk between distinct ones of the plurality of input signals; and adjusting the pre-distorted multiple-input signal to compensate for the estimated impairments.
US11057076B2 Selective application of error detection and correction for radio frequency identification
Methods, apparatuses, and system for performing at least one of error correction or error detection are described. In one embodiment, a radio frequency identification (RFID) tag receives a signal activating or interrogating the tag. The tag includes memory that stores data associated with the tag. The tag performs at least one of error detection or error correction on the stored data. The error detection includes detecting, by the tag, that one or more bits of the stored data are inflicted with an error. The error correction includes correcting the erroneous bit if the error affects less than a predetermined number of the bits of the stored data. The tag transmits the stored data to a reader in response to the detection or correction. The reader can analyze the stored data for additional information about the error or provide the stored data to another computing system that performs the analysis.
US11057075B2 Communication system and communication method
A communication system includes one or more chargers and a server capable of communicating with the one or more chargers. The server obtains first information from a first vehicle via a first charger included in the one or more chargers, during charging of the first vehicle by the first charger, and supplies second information based on the first information to a second vehicle via a second charger included in the one or more chargers, during charging of the second vehicle by the second charger.
US11057074B2 Data and power communication cable with galvanic isolation protection
A data and power communication cable that provides galvanic isolation between data-signal related circuitry and power-signal related circuitry present at both ends of the cable. The cable includes a first connector configured to mate with a first device to receive data and power signals therefrom; a first galvanic-isolating device configured to generate a galvanic-isolated data signal based on the data signal; a second galvanic-isolating device configured to generate a galvanic-isolated power signal based on the power signal; a second connector configured to mate with a second device to provide the galvanic-isolated data signal and the galvanic-isolated power signal thereto; a first set of communication mediums to route the data signal or the galvanic-isolated data signal from the first connector to the second connector; and a second set of communication mediums to route the power signal or the galvanic-isolated power signal from the first connector to the second connector.
US11057073B2 Integrated circuit with physical layer interface circuit
An integrated circuit for use in a differential network bus node comprising: a transceiver having a first transceiver input-output terminal and a second transceiver input-output terminal; a physical layer high terminal connected to the first transceiver input-output-terminal; a physical layer low terminal connected to the second transceiver input-output terminal; and a physical layer interface circuit comprising: a first low frequency RC matching circuit and a first high frequency RC matching circuit each connected between the first transceiver input-output-terminal and a first reference terminal; and a second low frequency RC matching circuit and a second high frequency RC matching circuit each connected between the second transceiver input-output terminal and a second reference terminal.
US11057069B2 Radio frequency (RF) front end of low power consumption and fully automatic adjustable broadband receiver
The present disclosure provides a radio frequency (RF) front-end of a low power consumption and fully automatic adjustable broadband receiver, including a low-noise amplification module, amplifying an broadband single-ended RF signal, and converting it into differential current signal; a local oscillator, generating a local oscillator signal; an quadrature mixer, quadraturely mixing the differential current signal and the local oscillator signal to generate intermediate frequency differential current signals; a transimpedance amplifier, converting the intermediate frequency differential current signal into an intermediate frequency differential voltage signal; an IIP2 calibration module, reducing the IIP2 effect of the RF front end; a received signal strength indicator module, sending the first amplification factor control signal and the differential mismatch control signal to the low noise amplification module, and sending the second amplification factor control signal to the transimpedance amplifier, thereby making the intermediate frequency differential voltage signals meet the requirements of the amplitude and mismatch.
US11057068B2 Receiver module, data transmission system and method for receiving an electromagnetic signal
A receiver module for receiving an electromagnetic signal, including an analog frontend and at least a first receiving channel and a second receiving channel is described. The receiving channels are both connected to the analog frontend, wherein the frontend is configured to receive an input signal including a symbol sequence and to forward the input signal to the receiving channels, wherein the receiving channels each include an analog to digital converter, wherein the second receiving channel includes an attenuator, wherein the first receiving channel and the second receiving channel each include a soft-input-soft-output-decoder, and wherein the soft-input-soft-output decoders each are configured to process the symbol sequence. Moreover, a data transmission system and a method for receiving an electromagnetic signal are described.
US11057066B2 Altering filtering by changing mixing frequency when interferer present
A filtering arrangement for a wireless communication receiver is disclosed. The filtering arrangement comprises an input port configured to receive a digital signal, wherein the digital signal has a signal bandwidth and comprises a desired signal, dividing circuitry configured to divide the digital signal into two or more signal parts, wherein the two or more signal parts comprise two edge signal parts, and a respective processing branch associated with each of the two or more signal parts. A processing branch configured to process a respective edge signal part comprises a digital edge filter configured to filter the edge signal part, determination circuitry configured to determine whether an un-desired signal is comprised in the edge signal part, and frequency shifting circuitry configured to frequency shift the edge signal part responsive to determination by the determination circuitry. Corresponding wireless communication receiver, filtering method and computer program product are also disclosed.
US11057065B1 Adaptive analog parallel combiner
An adaptive analog parallel combiner circuit for receiver data recovery from a communication signal is provided. The circuit includes a summer that sums outputs of a plurality of filter taps in parallel, including zeroth and first through Nth filter taps, each filter tap having as input the communication signal or a version thereof, wherein N is a finite integer greater than or equal to two. The zeroth filter tap has an amplifier with gain controlled by a zeroth adaptive gain control coefficient, and each of the first through Nth filter taps having an all pass filter and gain controlled amplification, with gain controlled by a corresponding one of a first through Nth adaptive gain control coefficients and the all pass filter implementing a transfer function having a zero and a pole equaling each other and at a base frequency divided by a corresponding integer from one through N.
US11057060B1 Method and apparatus for matrix flipping error correction
A technique of extending a correction limit defined by an ECC is described. According to one aspect of the present invention, remaining errors that cannot be corrected by the ECCs in a data array is first identified and then formed in form of matrix with defined size. These remaining errors are flipped in value, namely from “1” to “0” or “0’ to “1” if the number of the errors are within a range or additional ECCs are applied to correct the errors in flipped data bits.
US11057052B2 Data processing method and apparatus to restore mother code sequences with different code lengths by using an indication sequence and a basic sequence
A data processing method is disclosed, and the method includes: receiving, by an encoding end, a to-be-encoded data block; obtaining, by the encoding end, a first mother code element for each first indication element in a first indication sequence based on an association relationship in which S=Q+B*N0 when B>0, and S=Q when B=0; and placing the first mother code element at a location of the first indication element in the first indication sequence to obtain a first mother code sequence.
US11057049B2 Generalized low-density parity check codes in digital communication system
Provided is an encoder, a decoder, a computer-readable medium and methods of forward error correction channel encoding/decoding within a HARQ scheme, based on a generalized quasi-cyclic low-density parity-check code comprising a Cordaro-Wagner component code.
US11057048B2 Ratiometric gain error calibration schemes for delta-sigma ADCs with programmable gain amplifier input stages
An analog to digital converter (ADC) includes voltage and reference input terminals, a buffer circuit, and control logic. The buffer circuit includes input and output terminals and a variable resistor including resistive branches connected in parallel. The control logic is configured to, in a calibration phase, determine a given gain value for which gain error is to be calibrated, determine a set of the resistive branches in the buffer circuit to be used to achieve the given gain value, successively enable a different resistive branch of the variable resistor of the set until all resistive branches of the set have been enabled, determine an output code resulting after enabling all resistive branches of the set, and, from the output code, determine a gain error of the given gain value. The control logic is further configured to take corrective action based upon the gain error of the given gain value.
US11057046B2 Multi-stage analog to digital converter
A multi-stage analog-to-digital converter (ADC) suitable for low power applications, such as glucose monitoring, may be required to digitize a slow-moving signal. As such, a multi-stage ADC must be versatile. Accordingly, the multi-stage ADC can be configured to operate at different bandwidths and resolutions through the use of ADC stages that can be enabled or disabled in an exchange between resolution and speed. Each ADC stage digitizes an input signal (e.g., a voltage or a current) using an analog comparison to access a lookup table for a digital signal that represents the input signal at a particular accuracy. Unlike other multi-stage approaches, the digitization is asynchronous (i.e., requires no clock) and can provide simplicity, speed, and low-power operation to the multi-stage ADC.
US11057040B2 Phase-locked loop circuit and clock generator including the same
A phase-locked loop (PLL) circuit may include a voltage-controlled oscillator, a sub-sampling PLL circuit, and a fractional frequency division control circuit. The fractional frequency division control circuit may include a voltage-controlled delay line that routes a feedback signal to generate delay information, a replica voltage-controlled delay line to which the delay information is applied and configured to route a reference clock signal to generate a plurality of delay reference clock signals each delayed by up to a different respective delay time, and a digital-to-time converter (DTC) configured to generate the selection reference clock signal from the plurality of delay reference clock signals and output the selection reference clock signal to the sub-sampling PLL circuit.
US11057038B2 Semiconductor device including buffer circuit
A device includes a power supply line, an output terminal, a circuit configured to perform a logic operation on a first signal and a second signal to produce a third signal, first, second and third transistors. The first transistor is coupled between the power supply line and the output terminal and includes a control gate supplied with the third signal. The second and third transistors are coupled in series between the power supply line and the output terminal. The second transistor includes a control gate supplied with the first signal and the third transistor includes a control gate supplied with a fourth signal that is different from each of the first, second and third signals.
US11057037B2 Touch switch
A touch switch includes a light-pervious plate, a first peripheral frame, a second peripheral frame and an electrical switch module. The light-pervious plate has a predetermined shape. The first peripheral frame corresponds in shape to the light-pervious plate. One side face of the first peripheral frame is coupled to one side face of the light-pervious plate. The second peripheral frame corresponds in shape to of the first peripheral frame. One side face of the second peripheral frame is coupled to another side face of the first peripheral frame. The electrical switch module corresponds in shape to the second peripheral frame. One side face of the electrical switch module is coupled to another side face of the second peripheral frame. The side face of the electrical switch module is provided with at least one light sensitive switch.
US11057035B2 Multi-voltage input output device
A device comprises, a first power source providing a first voltage, a second power source providing a second voltage less than the first voltage, a first bias voltage source providing a first bias voltage between the first voltage and the second voltage, a second bias voltage source providing a second bias voltage between the first voltage and the second voltage, the second bias voltage greater than or equal to the first bias voltage. The device also includes an output, a pull up network coupled in series between the first power source and the output pad including: a first gate coupled to the bias voltage source; and a second gate coupled to a signal that varies between first bias voltage and first power source. The device includes and a pull down network coupled between the output pad and second power source and including: a third gate coupled to the second bias voltage source; and a fourth gate coupled to a signal that varies between the second power source and the second bias voltage source.
US11057031B1 Reliability in start up sequence for D-mode power FET driver
Methods and devices to address start up of half-bridge circuits including D-mode power FETs are disclosed. The disclosed devices overcome possible issues of output overload or excess current through gate-source of power FETs during start up. Methods and devices based on monitoring coupling capacitors voltages and pre-charging such coupling capacitors using current sources are also described. The current sources can be implemented using negative voltages provided by negative voltage sources such as charge pumps.
US11057025B2 Level shifter
A level shifter includes: a first inverter configured to receive an input signal in a first voltage domain and shift the input signal from the first voltage domain to a first output signal at a first output terminal in a second voltage domain higher than the first voltage domain in response to a logical high state of a first clock signal in the first voltage domain; a second inverter configured to receive a complement of the input signal and shift the complement of the input signal from the first voltage domain to a second output signal at a second output terminal in the second voltage domain in response to the logical high state; a pair of NMOS sensing transistors; a PMOS transistor configured to equalize the first output signal and the second output signal in response to a logical low state of the first clock signal.
US11057024B2 Flip flop circuit and data processing apparatus
Disclosed is a flip flop circuit including a master latch circuit receiving master input data based on target input data, a slave latch circuit configured to load master output data from the master latch circuit and to hold the master output data, and a data output section, target output data based on the target input data being output from the data output section. The slave latch circuit includes a first to an N-th slave latch circuits provided in parallel with the master latch circuit (N is an integer of 2 or larger), the flip flop circuit further includes an output selection circuit selecting any one of data output from the first to N-th slave latch circuits, and selection data from the output selection circuit is output from the data output section as the target output data.
US11057023B1 Accurate high-voltage gate detector
Systems, methods, and devices for accurate sensing of gate voltages of high-voltage devices are presented. A gate sense circuit can generate accurate transitions of the gate voltages via a differential input provided by a gate node voltage and a source node voltage of the high-voltage devices. The differential input is fed to two separate processing paths, one path for accurate detection of a rising edge of the gate voltage with a reduced propagation delay, and the other path for accurate detection of a falling edge of the gate voltage with a reduced propagation delay. A switch selects an output of the two paths that accurately detects a next edge to be detected. An Output pulse signal defined by the detected rising and falling edges is generated based on the output of the switch.
US11057022B2 PVT compensated delay cell for a monostable
A monostable circuit includes a delay cell with a reference generator generating a reference current based upon a PVT invariant resistance and a threshold voltage, and a delay block with an output capacitor and an output circuit altering an amount of charge stored on the output capacitor as a function of the reference current, in response to an input signal. An inverter has an input coupled to the output circuit. A logic circuit logically combines output of the inverter and the input signal to generate a monostable trigger pulse. The output circuit includes a current source sourcing the reference current to the output capacitor in response to a first logic state of an input signal, and a current sink sinking current from the output capacitor to discharge the output capacitor, in response to a second logic state of the input signal.
US11057012B2 Distributed envelope tracking amplifier circuit and related apparatus
A distributed envelope tracking (ET) amplifier circuit and related apparatus are provided. The distributed ET amplifier apparatus includes an amplifier circuit configured to amplify a radio frequency (RF) signal based on a modulated voltage. In examples discussed herein, the amplifier circuit is co-located with an ET voltage circuit configured to supply the modulated voltage such that a trace inductance between the amplifier circuit and the ET voltage circuit can be reduced to below a defined threshold. By co-locating the amplifier circuit with the ET voltage circuit to reduce a coupling distance between the amplifier circuit and the ET voltage circuit and thus the trace inductance associated with the coupling distance, it may be possible to reduce degradation in the modulated voltage. As a result, it may be possible to improve efficiency and maintain linearity in the amplifier circuit, particularly when the RF signal is modulated at a higher modulation bandwidth.
US11057010B2 Power amplifier and method of operating a power amplifier
Embodiments of a power amplifier and method of operating a power amplifier are disclosed. In one embodiment, a power amplifier includes a pulse wave modulation (PWM) controller, a first power control stage configured to drive a first output between VDD and VSS in response to a control signal from the PWM controller, a second power control stage configured to drive a second output between VDD and VSS in response to a control signal from the PWM controller, and a mid-voltage control circuit configured to hold the voltage of the first output at a mid-voltage that is between VDD and VSS during an interval between when the first output is driven between VDD and VSS and hold the voltage of the second output at the mid-voltage during an interval between when the first output is driven between VDD and VSS.
US11057009B2 Digital power amplifier with RF sampling rate and wide tuning range
A switching power amplifier includes logic circuitry that generates first and second components of a differential signal, based on received amplitude code and a delayed version of the same. The amplitude code includes a sign and a magnitude. When the sign is positive, a first logic path is configured to generate the first component based on the received amplitude code and the second logic path is configured to generate the second component based on the delayed amplitude code. When the sign is negative, the first logic path is configured to generate the first component based on the delayed amplitude code and the second logic path is configured to generate the second component based on the received amplitude code. The switching power amplifier further includes a differential-to-single ended conversion circuit configured to generate a single-ended signal based on the differential signal.
US11057007B2 Tuning system and method for automobile power amplifier
A method and system for power amplifier tuning based on an automobile audio bus (A2B) interface including determining a plurality of tuning paths and a plurality of tuning parameters of one or more power amplifiers; determining data volumes of the plurality of tuning parameters according to the type(s) of the one or more power amplifiers; determining a data volume for each tuning path according to the data volumes of the plurality of tuning parameters; allocating the number of A2B channels to each tuning path according to the data volume determined for each tuning path; calculating a tuning speed for each tuning, path according to the number of A2B channels allocated to each tuning path; and allocating the calculated tuning speed for each tuning path to the one or more power amplifiers through the A2B interface.
US11057006B2 Systems and methods for full duplex amplification
An amplification subsystem for a communication system includes a downstream amplifier configured to transmit a downstream signal within a first frequency range, an upstream amplifier configured to transmit an upstream signal within a second frequency range, and a bidirectional amplifier configured to selectively transmit a mid-band signal in either of the upstream and downstream direction.
US11057005B2 Low noise amplifier circuit
An amplifier for converting a single-ended input signal to a differential output signal. The amplifier comprises a first transistor, a second transistor, a third transistor and a fourth transistor. The first transistor, configured in common-source or common-emitter mode, receives the single-ended input signal and generates a first part of the differential output signal. The second transistor, also configured in common-source or common-emitter mode, generates a second part of the differential output signal. The third and fourth transistors are capacitively cross-coupled. The amplifier further comprises inductive degeneration such that a source or emitter of the first transistor is connected to a first inductor and a source or emitter of the second transistor is connected to a second inductor.
US11057003B2 Devices and methods for detecting a saturation condition of a power amplifier
The present disclosure relates to devices and methods for detecting and preventing occurrence of a saturation state in a power amplifier. A power amplifier module can include a power amplifier including a cascode transistor pair. The cascode transistor pair can include a first transistor and a second transistor. The power amplifier module can include a current comparator configured to compare a first base current of the first transistor and a second base current of the second transistor to obtain a comparison value. The power amplifier module can include a saturation controller configured to supply a reference signal to an impedance matching network based on the comparison value. The impedance matching network can be configured to modify a load impedance of a load line in electrical communication with the power amplifier based at least in part on the reference signal.
US11057002B2 Amplifier configurable into multiple modes
This disclosure describes techniques for selecting one of a plurality of modes in which to operate an amplifier. The techniques include configuring input routing circuitry, coupled to first and second inputs of the amplifier, based on the selected one of the plurality of modes; selectively applying a resistance to an output of the amplifier, using feedback routing circuitry, based on the selected one of the plurality of modes; and selectively applying one of a plurality of reference voltages, using reference voltage routing circuitry, coupled to the first and the second inputs of the amplifier, based on the selected one of the plurality of modes.
US11057000B2 Superconducting device that mixes surface acoustic waves and microwave signals
A superconducting device that mixes surface acoustic waves and microwave signals and techniques for fabricating the same are provided. A superconducting device can comprise a superconducting surface acoustic wave resonator and a superconducting microwave resonator. The superconducting device can also comprise a Josephson ring modulator coupled to the superconducting surface acoustic wave resonator and the superconducting microwave resonator. The Josephson ring modulator can be a dispersive nonlinear three-wave mixing element.
US11056992B2 Motor controller
A motor controller includes: a rotation speed estimating unit that estimates a rotation speed of a motor based on current information and primary frequency information of the motor; a proximity switch that outputs an ON signal when a portion of a rotating body of the motor is in proximity and that outputs an OFF signal when a portion of the rotating body of the motor is not in proximity; a rotation speed calculating unit that calculates a rotation speed of the motor based on the ON signal and the OFF signal output from the proximity switch; a speed command compensating unit that compensates a speed command value such that an error between the speed command value and a rotation speed calculation value becomes smaller; and a speed control system that perform the speed control on the motor based on the compensated speed command value and the rotation speed estimation value.
US11056991B2 Method and apparatus for controlling operation of a rotary electric machine
A method and system for controlling and regulating operation of a multi-phase rotary electric machine in a manner that minimizes power loss under partial load conditions is described. This includes an instruction set that is executable to determine a torque command and a rotational speed of the electric machine, determine a peak torque per loss parameter for the electric machine based upon the rotational speed, and determine a second torque parameter for the electric machine based upon the rotational speed. A modulated torque command for controlling the electric machine is determined based upon the peak torque per loss parameter and the second torque parameter, wherein the electric machine generates an average torque that is equivalent to the torque command when operating in response to the modulated torque command. The inverter is controlled to operate the electric machine based upon the modulated torque command.
US11056988B2 Drive unit and motor system for brushless DC motors
A waveform control unit outputs a signal for driving a brushless DC motor by intermediate value energization to a waveform output unit, and outputs a signal for driving a brushless DC motor by sine wave energization to the waveform output unit when the signal in which the rotation position of the rotation reference is detected is acquired from the element, and the waveform control unit applies voltage corresponding to a sine value of an angle of a winding of one phase of n-phase windings when the brushless DC motor is to be driven by intermediate value energization, and outputs a signal for applying voltage corresponding to a sine value of an angle having similar phase difference as the sine wave energization drive with respect to the angle to the rest of the windings.
US11056968B2 Power converter, power controller, and control method capable of providing multiple protections
A power converter capable of performing over-voltage protection and over-temperature protection converts an input voltage into an output voltage. A power switch is connected in series with a primary winding between the input voltage and an input ground. A power controller with a multi-function pin controls the power switch to control a winding current through the primary winding. The power converter has a multi-purpose circuit with first and second resistors, a rectifier and a thermistor. A connection node makes the first and second resistors connected in series between two ends of an auxiliary winding. The rectifier and the thermistor are connected in parallel between the multi-function pin and the connection node. The power controller can perform over-voltage protection and over-temperature protection via the multi-purpose circuit and the multi-function pin.
US11056967B2 Electrical supply system for an aircraft with a legacy AC network and a bipolar DC network
An electrical supply system for an aircraft includes a generator having a neutral point, an AC network, a bipolar DC network, and a neutral point clamped converter. The neutral point is connected to ground, in at least one operating mode. The converter has an AC side with AC connectors couplable with at least one phase of the generator. The converter also has a DC side with a first DC connector, a second DC connector and a neutral DC connector. The AC side of the converter is coupled with the generator, the DC side is coupled with the bipolar DC network, and the neutral DC connector is connected to ground. The convertor provides a DC voltage on the DC side upon receiving an AC voltage on the AC side, and provides an AC voltage on the AC side upon receiving a DC voltage on the DC side.
US11056962B2 Torque transfer across an air gap
In one embodiment, an aircraft includes a wing operable to fold along a wing fold gap. The wing comprises an inboard edge flap and an outboard edge flap, wherein the wing fold gap is between the inboard edge flap and the outboard edge flap. The aircraft further includes an input shaft operably coupled to the inboard edge flap, the input shaft mechanically coupled to a first magnetic torque coupler assembly at a first end of the input shaft. The wing further includes an output shaft operably coupled to the outboard edge flap, the output shaft mechanically coupled to a second magnetic torque coupler assembly at a first end of the output shaft. The first magnetic torque coupler assembly may magnetically couple to the second magnetic torque coupler assembly across the fold gap.
US11056959B2 Linear actuator
A linear actuator comprising a support structure; at least one magnet provided on the support structure; a carriage; at least one coil arrangement provided around the carriage; and a spring arrangement operatively connected between the support structure and the carriage to urge the carriage towards a predetermined position relative to the support structure; wherein a part of one of the support structure and the carriage is received by a part of the other of the support structure and carriage so as to constrain motion of the carriage relative to the support structure substantially along a longitudinal axis of the linear actuator.
US11056956B2 Disc motor
A disc motor uses first, second magnetic components and third, fourth magnetic components of first, second magnetic disc set of a magnetic set to carry out magnetization in the motion direction, a coil of a coil set of an induction set is arranged perpendicularly to the motion direction, so as to form a four magneto-mechanical force effect; poles of the first, second magnetic components and the third, fourth magnetic component of the first, second magnetic disc sets are arranged oppositely to each other if they are different in polarity and adjacently to each other if they are the same in polarity; with the switching of forward reverse circuit power supplies of an induction switch circuit, magnetic resistant force can be avoided, the whole motion process is magnetically assisted, input power can be reduced effectively, and output power is increased.
US11056953B2 Stator unit, motor, and fan motor
The motor has a stator unit covered with a resin. The stator unit has a stator core, a coil, a circuit board, and an insulator. The insulator has a cylindrical portion and a circumferential-direction positioning portion. Below the stator core, the cylindrical portion surrounds a central axis. The circumferential-direction positioning portion protrudes outwards in a radial direction from an outer circumferential surface of the cylindrical portion. At least a part of the circuit board and the circumferential-direction positioning portion are opposed to each other in a circumferential direction. In addition, a lower end of the circumferential-direction positioning portion is positioned above a lower end of the cylindrical portion.
US11056952B2 Electric machine with internal cooling passageways
An electric machine includes a stator core having opposing first and second end faces, an outer surface between the end faces, and a plurality of fluid passageways defined within the stator core. Each fluid passageway includes an entrance hole defined in the outer surface and an inboard passage extending along a length of the core and in fluid communication with the entrance hole. Each fluid passageway further includes an outboard passage extending along a length of the core and having a first exit hole defined in the first end face and an interconnecting passage connecting the inboard passage in fluid communication with the outboard passage.
US11056948B1 Progressive force electro-permanent magnets actuator
An example system includes a disk that is rotatable and has a plurality of ferromagnetic elements disposed in a radial array on a surface of the disk; and at least one electro-permanent magnet (EPM) mounted adjacent to the disk such that a gap separates the disk from the EPM. Applying an electric pulse to the at least one EPM changes a magnetic state thereof, thereby generating an external magnetic field that traverses the gap between the disk and the EPM and interacts with a ferromagnetic element of the plurality of ferromagnetic elements, and causing a rotational speed of the disk to change as the disk rotates.
US11056943B2 Stator assembly with electrically balanced conductor layers
A stator assembly includes a plurality of stator slots having multiple respective slot layers and a plurality of hairpins. The plurality of hairpins have a respective first leg positioned in one of the multiple respective slot layers and a respective second leg positioned in another of the multiple respective slot layers. A first set of n adjacent slots of the plurality of stator slots is configured to accommodate the plurality of hairpins carrying a current in a first phase, n being an integer. The plurality of hairpins is configured in respective conductor layers (L1, L2 . . . ) having a plurality of respective turn locations defining n respective turn positions. The plurality of hairpins is configured to occupy the n respective turn positions an equal number of times such that the respective conductor layers (L1, L2 . . . ) are electrically balanced.
US11056939B2 Rotor with stress relaxation magnetic flux suppression holes with flux paths width less than length of the hole
A rotor that includes a permanent magnet; and a rotor core that has a magnet placement hole in which the permanent magnet is disposed, wherein the stress relaxation magnetic flux suppression hole is formed such that a total width of a minimum width of a first magnetic flux passage between a portion of the stress relaxation magnetic flux suppression hole on a first side in the longitudinal direction and the magnet placement hole and a minimum width of a second magnetic flux passage between a portion of the stress relaxation magnetic flux suppression hole on a second side in the longitudinal direction and the magnet placement hole is less than a total length of a length of the first magnetic flux passage in the longitudinal direction and a length of the second magnetic flux passage in the longitudinal direction.
US11056935B2 Rotation angle sensor system and semiconductor device
A synthesis circuit synthesizes detection signals from a plurality of detection coils to generate a synthesized detection signal indicating a sine component of a rotation angle of a rotor. In this regard, the detection coils which are synthesis targets when the synthesis circuit generates the synthesized detection signal include a detection coil of a salient pole installed at a first electrical angle based on a first pole of the rotor and detection coils of salient poles installed at a second electrical angle different from the first electrical angle based on the first pole, and do not include detection coils installed at the first electrical angle based on a second pole.
US11056934B2 Rotary electric machine with a stator core with teeth having different protrusion portions heights
A stator core for a rotary electric machine is provided, which includes core members stacked and formed annularly so as to surround a rotor, each core member including a plurality of slots extending from one end to another end in a shaft direction and teeth formed between the slots. A whole of the teeth includes a first teeth section including, at a tip on an inner periphery side of each core member, each tooth including a first protrusion portion and a second protrusion portion with a lower protrusion height than the first protrusion portion protruding in a circumferential direction of each core member and a second teeth section including a pair of the first protrusion portions and/or a pair of the second protrusion portions.
US11056932B2 Wireless charging apparatus and method
Methods and apparatus for wireless charging are provided. Transmission power transmitted from a wireless power transmitter is received at a power receiver of a wireless power receiver. A battery of the wireless power receiver is charged with the received transmission power. It is determined whether the battery is fully charged. A packet from a communication unit of the wireless power receiver is transmitted to the wireless power transmitter when the battery is fully charged. An auxiliary charge of the battery is performed by receiving strength-reduced transmission power from the wireless power transmitter.
US11056930B2 Wireless power transfer and communications
A device operative to transfer power and communicate wirelessly includes a drive-sense circuit (DSC), memory that stores operational instructions, and processing module(s). The DSC generates a drive signal based on a reference signal and provides the drive signal to a first coil via a single line and via a resonating capacitor, and simultaneously senses the drive signal via the single line, to facilitate electromagnetic coupling to a second coil to transfer power wirelessly to another device. The DSC also detects electrical characteristic(s) of the drive signal including whether a communication signal is transmitted from another device and generates a digital signal representative thereof. The processing module(s) generates the reference signal, processes the digital signal including to determine whether the communication signal is transmitted from the other device to the device and appropriately processes the digital signal to interpret control information of the communication signal to adapt the reference signal.
US11056922B1 Wireless power transfer system for simultaneous transfer to multiple devices
The present application relates to an apparatus which comprises a wireless power transmission system. This system comprises features which allow it to transfer more power wirelessly to multiple devices simultaneously, each at extended distances than other systems operating in the same frequency range. The system including heat dissipation features, allowing the system to operate effectively in elevated-temperature environments and to transfer power at higher levels and/or greater distances than a typical power-transfer system. The system also may include design features to withstand mechanical shocks, stresses, and impacts for use in a rugged environment. The system may include features to reduce electromagnetic interference (EMI) and/or specially shaped components with magnetic/ferrimagnetic properties that enhance performance. Other potential features include power conditioning by combining, within one circuit or one board, multiple elements that protect against excessive current, over-voltage, and/or reverse voltage.
US11056916B2 Transmission coil module for wireless power transmitter
A wireless power transmitter includes a shield; a first coil having a first hollow portion in a center area thereof; a second coil disposed below the first coil and having a second hollow portion in a center area thereof; and a third coil disposed below the first coil and having a third hollow portion in a center area thereof. Further, the first coil overlaps a portion of the second coil and a portion of the third coil, and the shield includes a first functional hole in a region corresponding to the first hollow portion; a second functional hole in a region corresponding to the second hollow portion; and a third functional hole in a region corresponding to the third hollow portion.
US11056914B2 Energy harvesting circuit, corresponding system and method
A first Radio-Frequency-to-Direct-Current (RF2DC) transducer receives a first signal from a sensing antenna and generates energy stored by an energy storage circuit. An energy transfer circuit is controllably switched between an energy storage state where energy is stored in the energy storage state and an energy transfer state where stored energy is transferred to a load. The voltage at the energy storage circuit is alternatively variable between an upper value and a lower value around a voltage setting point. A second RF2DC transducer, which is a down-scaled replica of the first RF2DC transducer, produces a second signal indicative of an open-circuit voltage of the first RF2DC transducer. The voltage setting point is set as a function of the second signal indicative of the open-circuit voltage of the first RF2DC transducer.
US11056912B1 Power system optimization using hierarchical clusters
A power flow schedule of a cluster is determined by calculating sensitivity of the net power exchange bounds. Each cluster includes a different section of the power system. The cluster provides to another cluster the power flow schedule and the net power exchange bounds for determination of a second power flow schedule by another cluster based on collective net power exchange bounds, a forecast power supply of the plurality of clusters, and a forecast power demand schedule. The clusters are hierarchically arranged such that the another cluster is higher in a hierarchy than the cluster. The cluster receives from the another cluster the second power flow schedule. The first power flow schedule is adjusted locally within the cluster based on the second power schedule and the net power exchange bounds of the cluster. The power output of the cluster is controlled using the adjusted first power flow schedule.
US11056910B1 Engine transmission-dependent control for electric auxiliary power generation
An auxiliary electric power device, which is coupled to a prime mover, provides electric power to convenience outlets, appliances, and heating cooling units. Based on a mode of a transmission coupled to the prime mover, one of a plurality of control schemes is selected to control the power provided by the auxiliary electric power device.
US11056907B2 Uninterruptible power supply device
In an uninterruptible power supply device for supplying DC power to a load, a control device is configured such that, when the load is performing power running operation, the control device turns on a second switch to supply DC power from a diode rectifier to the load, turns off a first switch, and controls a converter to suppress a harmonic current contained in an AC current flowing from an AC power supply to the diode rectifier, and when the load is performing regenerative operation, the control device turns off the second switch, turns on the first switch, and controls the converter to convert regenerative power generated by the load into AC power.
US11056906B2 Integrated power supply system
An integrated power supply system includes a grid power source, at least one renewable power source, a rechargeable battery assembly, a DC bus, a bi-directional AC-to-DC converter, at least one first DC-to-DC converter, a bi-directional DC-to-DC converter, and a controller. The bi-directional AC-to-DC converter is coupled to the grid power source and the DC bus. The at least one first DC-to-DC converter is coupled to the at least one renewable power source and the DC bus. The bi-directional DC-to-DC converter is coupled to the rechargeable battery assembly and the DC bus. The controller controls power electricity feeding into and being drawn from the DC bus, thereby keeping a bus voltage of the DC bus substantially fixed at a system voltage.
US11056905B2 Battery charging management method and terminal
A battery charging management method and a terminal, where the method includes charging, by the terminal, a battery according to a first charging policy, where the first charging policy includes a first voltage and a first current for charging the battery obtaining, by the terminal, a battery capacity of the battery when the terminal fully charges the battery for N times, where N is a positive integer determining, by the terminal, a second charging policy based on the battery capacity, where the second charging policy includes a second voltage and a second current for charging the battery and charging, by the terminal, the battery according to the second charging policy.
US11056900B2 Charging method, charging device, and computer-readable medium for charging a battery
A charging method is proposed to include the steps of: in a first stage of charging, charging a battery with a first-stage current until a voltage of the battery reaches a first-stage voltage value; and in a second stage of charging, charging the battery with a second-stage current until the voltage of the battery reaches a second-stage voltage value which is greater than the first-stage voltage value. The second-stage current is smaller than the first-stage current.
US11056899B2 Charge management system
A charge management system including a power distribution bus circuit for distributing energy from a power source to a load, and an intermediate energy storage circuit operably connected to a power distribution bus circuit for aiding in distribution of energy to the load. A charge management system controller may be configured to control the discharge of energy between the intermediate storage circuit and the power distribution bus circuit during one or more modes. Such a charge management system may enable the power distribution bus circuit to receive energy from the intermediate energy storage circuit before the power bus voltage drops in response to load demand, which may enable the power source to respond to perturbations in the power bus voltage and minimize inrush current from the power source. The system also may be used to soft-start high-power equipment, or absorb energy spikes associated with shut-down.
US11056889B2 Dual use photovoltaic system
A system for providing power from a direct current (DC) source to the power grid. The system includes a first inverter with an input and an output. The input is adapted to connect to the DC source. A first switch disposed between the output and the power grid. A second inverter with a DC terminal and an AC terminal, the AC terminal is adapted to connect in parallel with the output of the first inverter. A battery adapted to connect to the DC terminal of the second inverter. A second switch connected between the DC terminal of the second inverter and the input of the first inverter. The second switch also operatively connects the DC source to the battery. The system may further include a charging circuit adapted to be disposed between the input and the DC terminal and a load adapted to connect to the output.
US11056886B2 Power storage system
In a power storage system, a three-phase AC wire is connected to a three-phase AC power system. Power storage blocks, each of which includes a power storage module and a power conditioner, are connected in parallel to the three-phase AC wire. A system controller individually controls power storage blocks. The power storage modules each includes: a power storage unit; and a management unit that manages the power storage unit. The power conditioner includes a power converter and a controller. The power converter converts DC power discharged into single-phase AC power and outputs the converted AC power to two lines of the three-phase AC wire, or converts single-phase AC power received from the two lines of the three-phase AC wire into DC power and charges the power storage unit. The controller is connected to the system controller via a communication line and the management unit via a communication line.
US11056882B2 Power management device, power management system, power management method, and control program
A power management device has power consumption information in a building of a power customer, and stores history information in which the acquired power consumption information and time information indicating a time frame in which power has been consumed in the building are associated with each other. When having received a request based on power supply and demand, the power management device determines ease or difficulty in management of power consumption according to the request, on the basis of the stored history information, and power-management-required time frame information indicating a time frame for which power management according to the request is required, and notifies the power customer of a determination result. Then the power management device receives acceptance or rejection of the request, and transmits response information corresponding to a received content, to a request source.
US11056880B1 Snapback electrostatic discharge protection for electronic circuits
Snapback ESD protection circuits that include an Input/Output pad, a ground source, a first and a second NMOS transistor, and trigger circuit, pad bias circuit, and gate bias circuit. The first transistor drain connects to the pad. The second transistor drain connects to the first transistor source. The second transistor source connects to ground. The trigger circuit connects to the pad and a reference voltage to detect an ESD event at the pad. The pad bias circuit connects to the pad, the trigger circuit, ground, and the reference voltage to manage a voltage level for the reference voltage. The gate bias circuit connects to the reference voltage, a supply voltage, ground, and the gates of the first and second transistor to dynamically control the voltage of each gate of the first and a second NMOS transistor.
US11056879B2 Snapback clamps for ESD protection with voltage limited, centralized triggering scheme
An apparatus for electrostatic discharge protection. In one embodiment, an integrated circuit (IC) includes a trigger circuit configured to generate a trigger voltage VT in response to an electrostatic discharge (ESD) event. A plurality of metal oxide semiconductor (MOS) transistors are coupled to the trigger circuit. The plurality of MOS transistors are configured to conduct ESD current from a plurality of circuit nodes, respectively, to a ground conductor in response to the trigger circuit generating the trigger voltage VT. A voltage limiter circuit is also included and is configured to limit the trigger voltage VT.
US11056877B2 Method and system for feeder protection in electrical power network
A system and method for feeder protection in an electrical power network nodal point including at least three feeders. In the system and the method it is executed in an intelligent electronic device reserved for the feeder, on the basis of the at least one measured electrical quantity actual in the respective feeder, at least one first protection function monitoring a power system related condition of the respective feeder, as well as in a central intelligent electronic device, for at least one feeder, at least one second protection function monitoring the same power system related condition of the feeder. Furthermore the central intelligent electronic device is configured to further execute for the at least one feeder, on the basis of the at least one measured electrical quantity actual in the other feeders connected to the same nodal point, at least one third protection function monitoring the same power system related condition of the feeder.
US11056876B2 Circuit arrangement for switching inverter devices
Circuit arrangement 1 for securely switching inverter devices 2 of a system by a common emergency switch 3 which is connected to a switching signal input 4 of one of the inverter devices 2 which is configured as a master of the system and comprises a switching signal output 5, other inverter devices 2 of the system configured as a slave being connected to the one inverter device via switching signal lines 6, wherein the inverter devices 2 configured as a slave together with the inverter device 2 configured as a master form a switching chain which is automatically switched upon actuation of the emergency switch 3.
US11056874B2 Fault detection and protection during steady state using traveling waves
An electric power delivery system may be protected upon occurrence of a fault condition by the systems and methods disclosed herein by detecting the fault condition and signaling a protective action before the overcurrent condition reaches the protective equipment. The protective action may be an opening of a circuit breaker or engagement of a fault current limiter. The overcurrent condition may be a non-steady-state condition. The fault may be detected using traveling wave or incremental quantity techniques.
US11056872B2 Motorized cable reel
The current invention concerns an improved motorized cable reel, specifically for a more stable and safer winding of the cables therearound.
US11056864B2 Electrical junction box
An electrical junction box includes an electronic component, a circuit assembly that has a conductive path and on which the electronic component is mounted, and a cover member for covering at least a portion of the circuit assembly, and the cover member is provided with an air valve that allows air permeation while inhibiting water from entering the circuit assembly side.
US11056862B2 Electrical device connector and switchgear
An electrical device connector includes: a bus bar which includes a hollow portion extending in an axial direction and through holes extending in an axis-orthogonal direction, and which electrically connects a plurality of switchgears to each other; terminal members including bus bar support portions in which the bus bar is inserted, and including electrical device connection portions in which the insulation plugs are inserted and fixed; and stud bolts each having one end fixed to the corresponding switchgear, each extending in the axis-orthogonal direction through the corresponding through hole, and each fixing the corresponding insulation plug at the other end. Gaps are each formed between the corresponding stud bolt and the bus bar so as to allow communication between the hollow portion and an internal space of the corresponding terminal member.
US11056858B2 Spark plug having a housing with a channel part
A spark plug has a housing of a cylindrical shape and an insulator supported to an inside of the housing. A channel part is formed at a distal end side of the housing. The channel part is open so that the inside of the housing communicates with an outside of the housing through the channel part. The channel part has a channel bottom having a tapered shape oblique relative to a plug central axis. An overall channel bottom is arranged in the housing closer to a proximal end side than to the distal end side of the housing.
US11056855B2 Beam projector module for performing eye-safety function using temperature, and control method thereof
An embodiment provides a beam projector module that includes: a light source configured to output light; a substrate configured to support the light source; an optical device configured to reduce the light in terms of intensity output to a predetermined space; a frame configured to space the optical device apart from the light source by a predetermined distance, the frame forming a closed space with the substrate and the optical device; a temperature sensor configured to measure a temperature of the frame; and a processor configured to control an output of the light source. The processor is configured to operate the light source in an eye-safety mode when a temperature drop rate of the frame exceeds a reference value.
US11056854B2 Laser assembly and related methods
An epoxy-free laser assembly includes at least one laser array and at least one optics assembly positioned within an optical path of at least one laser array. The laser array and the optics assembly are epoxy-free. In one example, the optics assembly has a beam shaping optic and a wavelength stabilization optic, wherein the wavelength stabilization optic is connected to beam shaping optic with at least one tab and solder. In another example, a plurality of optics assemblies is included within the laser assembly, whereby the laser array and all of the plurality of optics assemblies fit within a footprint of the heatsink. Methods of manufacturing the same are also provided.
US11056853B2 Method of manufacturing semiconductor laser element, and semiconductor laser device thereof and gas analyzer
In order to form a reflection film on a rear end facet of a waveguide more easily than conventional, by etching a laminated structure formed on a substrate, a plurality of waveguides segmented in a lattice shape are formed, and a reflection film is formed on a surface of each of the waveguides for reflecting light in each of the waveguides.
US11056851B2 Terminal insertion device
A terminal insertion device is provided which enables inserting connector terminals into terminal accommodating chambers of a connector housing, each of the connector terminals being connected to an end of each of a plurality of electric wires in a multi-core cable by crimping, while reducing the separation length for the plurality of electric wires. The terminal insertion device comprises: a terminal separator configured to be interposed between two connector terminals; a terminal chuck configured to clamp and bundle the two connector terminals in two directions, i.e., in a first direction intersecting an insertion direction and in a second direction intersecting the insertion direction and the first direction; and a moving mechanism configured to move at least one of a connector housing and the two connector terminals held by the terminal separator and the terminal chuck to insert the two connector terminals into two terminal accommodating chambers.
US11056848B2 Method and apparatus of powering an electronic device using a removable power supply
An electronic device lacking an internal power supply comprises electronic circuitry, an external power adapter having an input connector for receiving AC power from a conventional AC power outlet and for providing a low-voltage output signal to an output connector, and a first port electronically coupled to the electronic circuitry for receiving the low-voltage output signal from the output connector of the power adapter and for providing the low-voltage output signal to the electronic circuitry.
US11056844B2 Connector, device provided with the same and method of manufacturing the same
A connector has a main portion formed as a part of a multilayer wiring board and having a tongue shape. The multilayer wiring board is provided with a surface conductive layer and an inner conductive layer. The inner conductive layer is located apart from and inward of the surface conductive layer in an up-down direction. The main portion is provided with a grounding plate formed in the surface conductive layer and a plurality of contacts formed in the inner conductive layer. Each of the contacts is, at least in part, exposed and contactable in the up-down direction. Since the grounding plate and the contacts are formed in the conductive layers of the multilayer wiring board, the connector can possess desired electric characteristics in high accuracy.
US11056842B2 Jumper cable with capacitive power enhancement and/or overvoltage protection
A hybrid jumper cable includes: a pair of power conductors; a pair of optical fibers; a jacket surrounding the pair of power conductors and the pair of optical fibers; a hybrid connector connected with the pair of power conductors and the pair of optical fibers; a capacitor electrically connected to each of the pair of power conductors; and a conduit attached to the hybrid connector, the capacitor residing in the conduit.
US11056838B2 Transceiver receptacle with EMI cage and bezel clips that provide high shielding effectiveness
A receptacle includes a cage, a bezel opening in the cage, and at least one bezel clip mounted adjacent to the bezel opening. The at least one bezel clip includes first bezel fingers and second bezel fingers. The first bezel fingers are located along an inner surface of the cage. The second bezel fingers include outer fingers located along an outer surface of the cage and inner fingers located along the inner surface of the cage. The inner and outer fingers of the second bezel fingers are defined by the second bezel fingers passing through a through hole in the cage.
US11056830B2 Port locking actuator device for vehicle inlet
A manual operation element includes a locking active surface and an unlocking active surface. A locking displaceable element includes a locking passive surface and an unlocking passive surface. When the manual operation element is operated in a locking direction, the locking active surface engages with the locking passive surface and displaces the locking displaceable element toward a locked position. When the manual operation element is operated in an unlocking direction, the unlocking active surface engages with the unlocking passive surface and displaces the locking displaceable element toward an unlocked position. When the locking displaceable element performs a displacement operation electrically, neither the locking active surface and the locking passive surface nor the unlocking active surface and the unlocking passive surface engage with each other in an entire area or more than half area of a displacement range of the locking displaceable element.
US11056827B2 Electronic device and method for identifying state of connection between connector and electrical path
An electronic device is disclosed. The device includes a housing, a first printed circuit board (PCB) disposed in the housing and to including a first connector and a grip sensor, a second PCB disposed separate from the first PCB and including a second connector, an electrical path electrically coupled to the first connector and the second connector, at least one antenna forming part of the housing or disposed within the housing, a processor operatively connected to the grip sensor and the at least one antenna, a first conductive path electrically coupled to the grip sensor and the at least one antenna, and a second conductive path electrically coupled to the grip sensor and the first connector.
US11056826B2 Wire holding member
A wire holding member is a wire holding member for holding a wire in which an outer circumference of a core wire is covered by an insulating covering, the wire holding member including: a front wall that includes an insertion hole having an inner diameter larger than an outer diameter of the core wire so as to allow the core wire to be passed therethrough; an upper extending piece and a lower extending piece that extend rearward from a plurality of different end edges of the front wall, and that are to be disposed around the insulating covering; and an upper holding portion and a lower holding portion that protrude from rear end portions of the upper extending piece and the lower extending piece toward the insulating covering, and that clamp an outer surface of the insulating covering, wherein at least the upper and lower extending pieces and the upper and lower holding portions are made of a metal.
US11056820B2 SC combined tail sleeve with changeable polarity
The present utility model discloses an SC combined tail sleeve with changeable polarity, which includes an SC body composed of an SC plug and a claw fixing bracket, the SC plug and the claw fixing bracket are both snapped in a combined base, the rear snapping box and the front snapping box respectively fix the SC plug and the claw fixing bracket to ensure the reliability and various performances of the SC body in signal connection. The SC plug and the claw fixing bracket are both snapped in the combined base, when it is necessary to withdraw from a mating state, holding the combined base can simultaneously drive the SC plug and the claw fixing bracket to retreat at the same time, so as to achieve the purpose of withdrawing from the mating state, thus its operation is simple and convenient, and the rear snapping box and the front snapping box of the present utility model can be detached flexibly, and a polarity swapping of the two SC bodies can be easily realized.
US11056819B2 Connector and connector processing method
A connector is provided. The connector includes a shell assembly, a circuit board, a terminal, and an insulated block. The terminal includes a contact piece and a connecting piece including a connecting portion and a connecting pin, and an angle is between the connecting portion and the connecting pin. The insulated block is disposed on one side of the shell assembly, and the connecting pin passes through the insulated block to be connected to the circuit board. The connecting portion and a bending portion of the connecting piece are both embedded in the insulated block. The periphery of the contact piece is devoid of material receiving areas. The contact area of the contact piece has a pleasing appearance. Moreover, as the bending portion is completely embedded in the insulated block, insufficient molding and burr phenomenon during molding can be avoided.
US11056818B2 Electrical outlet with female member moveable between connected and disconnected portions
An electrical outlet has a female member with at least two electrically conductive contact sleeves for the reception of the pins on a plug inserted in the female member and a connector arrangement for connection of the electrical outlet to a mains supply. The female member is movable relative to the connector arrangement between a first mode, in which the contact sleeves are electrically disconnected from the mains supply, and a second mode, in which contact sleeves are electrically connected to a mains supply. The connector arrangement include a connection ring and a mounting plate. The connector arrangement further include connection plates, whose number corresponds to the number of contact sleeves on the female member, wherein each contact sleeve is brought in or out of contact with a connection plate by movement of the female member.
US11056812B2 Method of manufacturing an actuator device
An actuator device includes: an actuator including first contacts arranged in a first direction; and a wire member including second contacts and joined to the actuator. The second contacts are arranged in the first direction and respectively connected to the first contacts. Each of particular contacts as the first contacts or the second contacts has a protruding and recessed portion including: at least two protrusions; and a recess between the at least two protrusions. The particular contacts include: at least one central-region contact disposed on a central region in the first direction; and at least one end-region contact disposed nearer to an end region than to the central region in the first direction. The protruding and recessed portion of each of the at least one central-region contact is different in shape from the protruding and recessed portion of each of the at least one end-region contact.
US11056809B2 Vertical-type direct PCB connector
A vertical-type direct printed circuit board (PCB) connector including a connector housing directly mounted to one surface of a PCB substrate in a vertical type, and bending terminal members installed inside the connector housing and having one side extending in a first direction corresponding to a direction perpendicular to the one surface of the PCB substrate to be connected to a signal transmission cable and the other side extending in a second direction corresponding to a length direction of contact pads provided to the one surface of the PCB substrate to be connectable to the contact pads.
US11056806B2 Housing device for storage battery housing
A housing device is provided which houses a storage battery having a first connector. The housing device may include a storage battery holding part which holds a storage battery and a drive part which (i) moves a second connector that is to be connected to the first connector of the storage battery toward the first connector and/or (ii) moves a second connector that has been connected to the first connector of the storage battery in a direction away from the first connector.
US11056805B2 Method of connecting an electrically connecting cable to a splice
A cable splice includes a casing, a guide, and a pilot cup. The casing has a first opening and an interior cavity. The guide includes a receiving end and a shaft extending at least partially into the interior cavity. The pilot cup is integrally formed with the guide and frangibly connected to the shaft. The cable splice may also include a clamp positioned in the interior cavity and moveable between a loading position and a terminated position. A biasing member urges the clamp into the terminated position. During movement of the clamp from the loading position to the terminated position, the clamp contacts the guide causing at least a portion of the shaft to exit the interior cavity. The guide may also include a rib and a slot allowing the guide to fit in casings having different sized interior cavities.
US11056799B2 W-band combiner-splitter fabricated using 3-D printing
Methods and systems are disclosed for scalable antenna arrays that may be built up using pluggable tiles that have low distortion, flat band high gain, and structured to channelize the signals into narrow bands that may be 40 MHz or even smaller bandwidth apart. Antenna array tiles may employ traveling wave tube (TWT) components and wafer scale arrays. H-topology, equal length, feed networks connect the signals to antenna elements. The fractal-like, recursively repeating at different size scales, structure for the H-tree feed networks, implemented using pluggable tiles, facilitates the scalability of the high gain waveguide antenna array. System integration across the 75-115 GHz spectral band implements scalable aperture architecture with emphasis on addressing considerations of the TX power requirement, feed network, channelizing signals at different frequency bands using specially designed diplexers and combiners, cooling, component placement, and isolation.
US11056794B2 Dual-polarized antenna
A method for producing a dual-polarized antenna includes providing first, second and third dielectric substrates with first and second main surfaces. The method includes patterning a conductive film on the first main surface of the first dielectric substrate to form a first ground conductor having an opening and a metal patch as a radiation element, the patch aligned to the opening in a lamination direction, patterning a conductive film on the first main surface of the second dielectric substrate to form a first feed probe configured to excite the metal patch, patterning a conductive film on the second main surface of the second dielectric substrate to form a second ground conductor having a slot generally parallel to the first feed probe, and patterning a conductive film on the second main surface of the third dielectric substrate to form a second feed probe generally perpendicular to the slot.
US11056793B2 Antenna module
Disclosed herein is an antenna module that includes a circuit layer having a filter circuit, an antenna layer having a radiation conductor, a wiring layer having a connection wiring, a first ground pattern provided on a surface of the circuit layer, a second ground pattern provided between the circuit layer and the wiring layer, a third ground pattern provided between the wiring layer and the antenna layer, and a signal terminal provided on the surface of the circuit layer where the first ground pattern is cut away. The clearance region is located so as not to overlap the filter circuit as viewed in a lamination direction. The signal terminal is connected to the filter circuit through a pillar conductor penetrating the circuit layer and the connection wiring. The radiation conductor receives power through a feed pattern connected to the filter circuit.
US11056785B2 Beamforming using an antenna array
There is provided mechanisms for transmitting a signal using a beamforming antenna array. A method being is by a network node. The method comprises obtaining an indication for transmission of the signal requiring use of a partial antenna array of the antenna array, the partial antenna array requiring less than all of the physical elements of the antenna array for transmission. The method comprises forming virtual antenna elements for the partial antenna array, thereby reducing the full antenna aperture of the antenna array. The method comprises expanding weight factors applied to the virtual antenna elements by connecting each of the virtual antenna elements to at least part of all physical antenna elements of the antenna array such that the virtual antenna elements at least partly utilize the full antenna aperture. The method comprises initiating transmission of the signal using the array of the virtual antenna elements.
US11056784B1 Phased array antenna with analog beamforming—calibration techniques for angle of arrival applications
Embodiments are presented herein of apparatuses, systems, and methods for a wireless device to calibrate a phased antenna array. The wireless device may begin a calibration process with a second wireless device. The first wireless device may receive a calibration signal from the second wireless device and may calibrate a subset (e.g., all but one) of the antennas of the array. The first wireless device may receive a subsequent signal and estimate the angle of arrival using the calibrated subset of antennas. Further, the first wireless device may calibrate a complete set of antennas using calibration signals from a plurality of directions.
US11056777B2 Millimeter wave LTCC filter
The present invention provides a millimeter wave LTCC filter including system ground layers, metallized vias, perturbation grounding posts, first and second probes, two adjacent layers of the system ground layers define one closed resonant cavity, each closed resonant cavity is provided with a plurality of metallized vias, the metallized vias of different closed resonant cavities form concentric hole structures, the perturbation grounding posts include first perturbation grounding posts penetrating a second closed resonant cavity and second perturbation grounding posts penetrating a third closed resonant cavity, the first perturbation grounding posts respectively face right to the second perturbation grounding posts, one end of the first probe is inserted into the first closed resonant cavity and electrically connected with the first system ground layer, and the second probe is arranged symmetrically with the first probe and inserted into the fourth closed resonant cavity and electrically connected with the second system ground layer.
US11056776B2 Antenna arrangement for a vehicle
The present invention relates to an antenna arrangement for a vehicle, in which a first antenna structure is arranged in a housing of an impedance converter and a second antenna structure is arranged in or on a vehicle pane.
US11056775B2 Integrated antenna module and in-vehicle system
An integrated antenna module to be applied to an in-vehicle system includes an antenna element group that is mounted on a vehicle and is formed of a plurality of antenna elements, and the antenna element group constitutes a plurality of antennas capable of transmitting or receiving a plurality of electromagnetic waves by combining the plurality of antenna elements.
US11056773B2 Twin-beam base station antennas having thinned arrays with triangular sub-arrays
Twin-beam base station antennas include first and second arrays that each have a plurality of radiating elements that are mounted to extend forwardly from respective first and second panels of an angled reflector. The radiating elements in each array extend in three columns, with the radiating elements in the middle column vertically offset from the radiating elements in the outer columns. The antennas further include first and second phase shifters. More than half of the outputs of the first phase shifter are connected to respective first sub-arrays, where each first sub-array includes one radiating element from each of the three columns in the first array, and more than half of the outputs of the second phase shifter are connected to respective second sub-arrays, where each second sub-array includes one radiating element from each of the three columns in the second array.
US11056772B2 Antenna system with decreased SAR value
The present disclosure discloses an antenna system with decreased SAR. The antenna system includes a circuit board having a feeding point, an RF switch for making the antenna system work under a number of working modes with different frequency bands, and a system ground. The antenna further includes a radiation body including a feeding portion electrically connected to the feeding point, a ground portion connected to the system ground by the RF switch, and a connecting portion connecting the feeding portion to the ground portion. The ground portion includes a first metal segment for connecting to the connecting portion, and a second metal segment; the feeding portion includes a third metal segment and a fourth segment. The RF switch electrically connects to the second metal segment, and the feeding point electrically connects to the fourth segment. A method for decreasing the SAR value is also provide.
US11056769B2 Electronic device comprising antenna
An electronic device may include a housing including a conductive area, a first conductive member comprising a conductive material in electrical contact with the conductive area, a first wireless communication circuit electrically connected to the conductive area, and a second wireless communication circuit electrically connected to the first conductive member. The first wireless communication circuit transmits and/or receives a first signal having a frequency of 6 GHz or less using the conductive area, and the second wireless communication circuit transmits and/or receives a second signal having a frequency of 20 GHz or more using at least part of the first conductive member and the conductive area.
US11056766B2 Antenna apparatus
An antenna apparatus for transmitting and receiving electromagnetic waves via a cover member disposed outside, including: first and second antenna sections that are disposed adjacently to each other along a direction orthogonal to a predetermined direction to which the electromagnetic waves are transmitted and received and that transmit the electromagnetic waves, respectively; and first and second dielectric lenses that are disposed in the predetermined direction to which the first and second antenna sections transmit their electromagnetic waves and narrow beams of the electromagnetic waves transmitted by the first and second antennas, respectively, to transmit to the outside, in which an outer end face of first dielectric lens protrudes further forward in the predetermined direction than an outer end face of second dielectric lens.
US11056764B2 Phased array antenna panel having reduced passive loss of received signals
A phased array antenna panel includes a first plurality of antennas, a first radio frequency (RF) front end chip, a second plurality of antennas, a second RF front end chip, and a combiner RF chip. The first and second RE front end chips receive respective first and second input signals from the first and second pluralities of antennas, and produce respective first and second output signals based on the respective first and second input signals. The combiner RF chip can receive the first and second output signals and produce a power combined output signal that is a combination of powers of the first and second output signals. Alternatively, a power combiner can receive the first and second output signals and produce a power combined output signal, and the combiner RF chip can receive the power combined output signal.
US11056762B2 Adjustable antenna mount
An adjustable antennal mount has a base bracket, an upper bracket, multiple fasteners, and a leveling instrument. The base bracket has a slanting surface not perpendicular to an assembling axis of base bracket and a rotating axis perpendicular to the slanting surface. The upper bracket is adjustably mounted on the base bracket along the rotating axis and has a diagonal surface and a top surface. The diagonal surface is attached to the slanting surface of the base bracket and is not parallel to the top surface of the upper bracket. The fasteners are connected with the base bracket and the upper bracket and are arranged at spaced intervals. The leveling instrument is mounted in the upper bracket and indicates levelness of the top surface of the upper bracket.
US11056757B2 Manufacturing method of a radio-frequency member
In a manufacturing method of a radio-frequency member in which an inner peripheral surface of a cavity in a die includes a functional-region section that provides the radio-frequency member, a gate opens in a first wall surface of the inner peripheral surface of the cavity, an overflow expands in a direction in which a second wall surface of the inner peripheral surface extends is opened in the second wall surface, the functional-region section is located in a main flow region, the functional-region section includes a plurality of rod forming holes, a distance between edges of openings of at least two rod forming holes is smaller than depths of both of the two rod forming holes, a metal material in a fluid state is injected into the cavity through the gate, and a portion of the metal material flows outside of the cavity from the overflow.
US11056756B2 Multilayer substrate connecting body and transmission line device
A multilayer substrate connecting body includes first and second multilayer substrates. The first and second multilayer substrates each include a step portion defined by a difference of a number of stacked layers of insulating base material layers, and a portion of a conductor pattern is exposed to the step portion. An anisotropic conductive film is disposed between the step portions of the first and second multilayer substrates, and portions of conductor patterns that are exposed to the step portions of the first and second multilayer substrates are electrically connected through an electrically connecting portion of the anisotropic conductive film.
US11056755B2 Microwave resonator
A microwave resonator comprising a hollow tube comprising a plurality of electrically conductive wall faces which together define a tube wall defining a tube bore, the tube extending along a length axis from a first end to a second end; the tube wall having an N fold rotational symmetry about the length axis where 2
US11056749B2 Secondary battery and method for manufacturing the same
To solve the above-described objects, a method for manufacturing a secondary battery according to an embodiment of the present invention comprises: manufacturing an electrode assembly in which electrodes and a separator are alternately stacked; inserting the electrode assembly into a battery case through an opening; covering the opening of the battery case; injecting an electrolyte into the battery case through an injection hole formed in the battery case; closing the injection hole; performing a pre-formation process; and applying external force to a switch of a gas discharge device formed on one surface of the battery case, thereby linearly moving a gasket of the gas discharge device and opening a gas discharge hole, such that a first gas generated in the battery case is discharged to an outside of the battery case during the performing of the pre-formation process.
US11056745B2 Battery module
There is provided a battery module capable of restraining an increase in manufacturing costs and reducing a height dimension of the battery module. The battery module includes a cell-stacked body in which a plurality of battery cells are stacked, and a module case for holding the cell-stacked body. The module case includes a pair of side plates for holding side surfaces of the cell-stacked body, a bottom plate on which the cell-stacked body is loaded, and a plate member installed on an upper end portion of the pair of side plates to cover at least a part of an upper surface of the cell-stacked body. A filler is filled in a first space formed between the plate member and the upper surface of the cell-stacked body and in a second space formed between the side plate and the side surface of the cell-stacked body.
US11056743B2 Electricity supply system and package structure thereof
A package structure and its related electricity supply system are disclosed. Two substrates of the package structure are directly or indirectly served as current collectors of the electricity supply system. The sealing frame of the package structure is made of several silicone layers having high moisture-resistance and/or high gas-resistance. Hence, the package structure mentioned may not only provide a novel electrical conduction module to lower the intrinsic impedance of the electricity supply system itself but prevent the moisture and the gas outward from the electricity supply unit inside the package structure as well. Consequently, the electrical performance and safety of the electricity supply system are both improved.
US11056738B2 Metal-air battery
A metal-air battery including a cathode including a metal; an anode including a composite conductive material; a solid electrolyte layer between the cathode and the anode; and a vapor supplier configured to supply a vapor to the anode and the solid electrolyte layer.
US11056737B2 Cure in place thermal interface material
Methods and devices for providing an even distribution of waste heat in a vehicular battery pack, including a battery pack, a cold plate, a coolant reservoir, a support structure between the battery pack and the coolant reservoir, and a conformable thermal interface material for filling the space between cells of the battery pack and the coolant reservoir so as to provide thermal contact between the cells and the coolant reservoir for distributing the waste heat. In addition, methods and devices for providing an even distribution of waste heat and structural support in any heat source to heat sink for applications such as small devices such as computer motors.
US11056735B2 Heat exchanger and battery unit structure for cooling thermally conductive batteries
A heat exchanger and battery unit structure is provided for cooling battery units (or cells) where the thermally conductive nature of the battery forms a cooling path. The heat exchanger is in the form of a cooling element provided with an engaging device formed on or attached to an outer surface of the cooling plate for receiving a battery unit (or cell). The interconnection between the battery unit (or cell) and heat exchanger creates a mechanical interlock between the two components that results in improved heat transfer properties between the two components.
US11056732B2 Battery management apparatus and battery pack including the same
A battery management apparatus includes a master BMS and a plurality of slave BMSs connected to the master BMS by means of communication. The master BMS includes a master controller configured to generate operation order information of the plurality of slave BMSs based on state-of-charge information of each of a plurality of battery modules respectively connected to the plurality of slave BMSs. Each of the plurality of slave BMSs includes: a slave communicator configured to receive the operation order information generated by the master controller and receive battery temperature information measured by a temperature measurement sensor; and a slave controller configured to operate a battery cooler by using an output of a corresponding battery module according to a temperature value of the battery temperature information when the operation order corresponds to a first operation order according to the received operation order information or the slave communicator receives a first operation signal from another slave communicator.
US11056731B2 Modular, adaptable holders for sensors and battery cells for physical analysis
Systems and methods for battery testing including a holder system. The holder system is designed to couple one or more transducers to a battery under test, wherein the one or more transducers are configured for electrochemical-acoustic signal interrogation (EASI) of the battery. The holder system includes at least one arm to house at least one transducer to be coupled to the battery, and a pressure applying device to apply pressure to the at least one transducer, and to control pressure between the at least one transducer and the battery. The holder system is also configured to determine the pressure between the at least one transducer and the battery and adjust the pressure applied to the at least one transducer based on the determined pressure.
US11056730B2 Voltage detection terminal holding structure
A voltage detection terminal holding structure includes a bus bar holding part and the voltage detection terminal held in the bus bar holding part. The voltage detection terminal includes an electric connection part configured to be connected to a bus bar, a wire connection part configured to be connected to an electric wire, and a temporary fixing part. The temporary fixing part is formed between the electric connection part and the wire connection part. The temporary fixing part is temporarily fixed to the bus bar holding part in a state that a movement in a axis direction in an end of the electric wire connected to the wire connection part is regulated and in a state that a displacement in a perpendicular direction to the axis direction and a rotation around the axis direction are allowed.
US11056729B2 Vehicular battery monitoring system
Realized is a vehicular battery monitoring device or a vehicular battery monitoring system for which the number of wires can be reduced, and that can transmit information using a characteristic transmission path. A battery monitoring device includes: a detection unit configured to detect at least one of a voltage at a predetermined position of a battery or a temperature of the battery; and a wireless communication unit configured to transmit, using a wireless communication method, detection information that indicates at least one of the voltage and the temperature of the battery based on a detection result of the detection unit, at least to another battery monitoring device provided in a vehicle.
US11056726B2 Positive temperature coefficient film, positive temperature coefficient electrode, positive temperature coefficient separator, and battery comprising the same
Provided herein is a positive temperature coefficient film comprising an inorganic positive temperature coefficient compound. Also provided herein are a positive temperature coefficient electrode, a positive temperature coefficient separator, and a positive temperature coefficient lithium secondary battery, each of which comprises the positive temperature coefficient film.
US11056724B2 Power storage system
In a power storage system, each of a plurality of power storage modules includes at least one cell, and the plurality of power storage modules are connected in series. A management device manages the plurality of power storage modules. Each of the plurality of power storage modules contains a first insulation unit having a primary side and a secondary side that are insulated from each other. The first insulation unit outputs a signal containing information of at least one cell to a communication line. The signal is referenced to predetermined standard voltage between a voltage at one end and a voltage at the other end of the plurality of power storage modules. The management device contains a second insulation unit having a primary side and a secondary side that are insulated from each other, and a circuit unit insulated from the communication line by the second insulation unit.
US11056722B2 Tool and method of fabricating a self-aligned solid state thin film battery
A solid state electrochemical battery fabrication device and a method of creating the solid state electrochemical battery are provided. There is a first chamber comprising a first magnetron and a second chamber comprising a second magnetron, coupled to the first chamber. There is a third chamber comprising a vapor source for a polymer deposition, coupled to the second chamber. A Knudsen cell is coupled to the third chamber and configured to deposit lithium on a battery being fabricated. A linear hollow shaft connects the first, second, and third chambers, and provides a hermetic seal. A first telescopic arm having a housing is coupled to a first end of the hollow shaft and configured to extend out of its housing from the first chamber to the second chamber.
US11056717B2 Lithium phosphate derivative compounds as Li super-ionic conductor, solid electrolyte and coating layer for lithium metal battery and lithium-ion battery
Solid-state lithium ion electrolytes of lithium phosphate derivative compounds are provided which contain an anionic framework capable of conducting lithium ions. The activation energy of the lithium phosphate derivative compounds is from 0.2 to 0.45 eV and conductivities are from 0.01 to 10 mS/cm at 300K. Materials of specific formulae are provided and methods to alter the composite materials with inclusion of aliovalent ions shown. Lithium batteries containing the composite lithium ion electrolytes are also provided. Electrodes containing the lithium phosphate derivative materials and batteries with such electrodes are also provided.
US11056716B2 All solid battery
An all solid battery includes: a solid electrolyte layer; a positive electrode layer provided on a first face of the solid electrolyte layer, a part of the positive electrode layer extending to a first edge portion of the solid electrolyte layer; a first margin layer that is provided on an area of the solid electrolyte layer where the positive electrode is not provided; a negative electrolyte layer provided on a second face of the solid electrolyte layer, a part of the negative electrolyte layer extending to a second edge portion of the solid electrolyte layer; a second margin layer that is provided on an area of the second face of the solid electrolyte layer where the negative electrolyte layer is not provided; wherein a main component of the first margin layer and the second margin layer is solid electrolyte of which ionic conductivity is lower than that of the solid electrolyte layer.
US11056715B2 Stabilization of Li-ion battery anodes
Li-ion batteries are provided that include a cathode, an anode comprising active particles, an electrolyte ionically coupling the anode and the cathode, a separator electrically separating the anode and the cathode, and at least one hydrofluoric acid neutralizing agent incorporated into the anode or the separator. Li-ion batteries are also provided that include a cathode, an anode comprising active particles, an electrolyte ionically coupling the anode and the cathode, and a separator electrically separating the anode and the cathode, where the electrolyte may be formed from a mixture of an imide salt and at least one salt selected from the group consisting of LiPF6, LiBF4, and LiClO4. Li-ion battery anodes are also provided that include an active material core and a protective coating at least partially encasing the active material core, where the protective coating comprises a material that is resistant to hydrofluoric acid permeation.
US11056710B2 Electrode assembly for flexible rechargeable battery and flexible rechargeable battery including the same
An electrode assembly and a rechargeable battery including the same are provided. An electrode assembly for a rechargeable battery includes: a first electrode including a first coating part and a first uncoated region at at least one side of the first coating part; a second electrode including a second coating part and a second uncoated region at at least one side of the second coating part; a separator between the first electrode and the second electrode; and at least one of a first stress buffering part on at least a partial region of the first uncoated region and a second stress buffering part on at least a partial region of the second uncoated region, the at least one of the first stress buffering part and the second stress buffering part being configured as a film including an ethylene propylene copolymer, a hydrogenated hydrocarbon polymer, and polyethylene.
US11056705B2 Organic anolyte materials for flow batteries
Organic anolyte materials for redox flow batteries and redox flow batteries containing organic anolyte materials are disclosed.
US11056700B2 Circuit arrangement for impressing an electrical signal into an electrochemical energy supply device
The invention relates to a method for impressing an electrical alternating signal in an electrochemical energy supply device (1) by means of a control device (2), in which method a coupling capacitor (Ck) is connected in series between the control device (2) and the energy supply device (1) during the duration of the signal impression operation comprising the following steps which are executed by the control device (2): a) outputting an output signal (Sout) corresponding to the alternating signal to be impressed, for impression into the energy supply device (1), wherein the output signal (Sout) is determined based on at least one setpoint (Sset), which is set by the control device (2), of the alternating signal to be impressed; b) detecting an actual signal (Sact) which corresponds to the output signal and which is applied to the energy supply device, c) comparing the actual signal (Sact) with the setpoint (Sset) of the alternating signal to be impressed and d) controlling the output signal (Sout) in order to minimize the deviation between the actual signal (Sact) and the setpoint (Sset) of the alternating signal to be impressed.
US11056697B2 Apparatus and system for discharging water of fuel cell
An apparatus for discharging water of a fuel cell is provided. The apparatus includes a separation tube that has an inlet formed to face up to be connected to a fuel cell stack and has a first outlet and a second outlet to separately discharge gas and liquid. A discharge tube is connected to the first outlet formed at a lower portion of the separation tube, extends downward, and has a bending portion that bends upward at a predetermined section.
US11056696B2 System for the treatment of water
The disclosure relates to a system for the treatment of water formed during an operation of at least one fuel cell of a vehicle, having a cavity, a condenser and an underbody-side system outer wall, and is designed to bound an underbody of the vehicle, wherein the condenser is arranged between the cavity and the underbody-side system outer wall, wherein the cavity is connected via an inlet to the at least one fuel cell, wherein, when the vehicle is in motion, the condenser is acted upon by air of an airflow and is cooled, wherein the condenser is designed to cool water which, originating from the at least one fuel cell, flows into the cavity.
US11056687B2 Negative electrode active material, negative electrode, and battery
A negative electrode active material is provided that is utilized in a nonaqueous electrolyte secondary battery, and that can improve the capacity per volume and charge-discharge cycle characteristics. The negative electrode active material according to the present embodiment contains an alloy having a chemical composition consisting of, in at %, Sn: 13.0 to 24.5% and Si: 3.0 to 15.0%, with the balance being Cu and impurities. The alloy particles contain a phase with a peak of the most intense diffraction line appearing in a range of 42.0 to 44.0 degrees of a diffraction angle 2θ, the most intense diffraction line being a diffraction line having the largest integrated diffraction intensity in an X-ray diffraction profile. A half-width of the most intense diffraction line of the alloy particles is in a range of 0.15 to 2.5 degrees.
US11056682B2 Positive electrode active material particle including core including lithium cobalt oxide and shell including lithium cobalt phosphate and preparation method thereof
Provided is a positive electrode active material particle including a core that includes lithium cobalt oxide represented by the following Chemical Formula 1; and a shell that is located on the surface of the core and includes lithium cobalt phosphate represented by the following Chemical Formula 2, wherein the shell has a tetrahedral phase: LiaCo(1-x)MxO2-yAy  (1) wherein M is at least one of Ti, Mg, Zn, Si, Al, Zr, V, Mn, Nb, or Ni, A is oxygen-substitutional halogen, and 0.95≤a≤1.05, 0≤x≤0.2, 0≤y≤0.2, and 0≤x+y≤0.2, LibCoPO4  (2) wherein 0≤b≤1.
US11056681B2 Positive electrode active material for nonaqueous electrolyte secondary battery, method for producing same, and nonaqueous electrolyte secondary battery using said positive electrode active material
Provided is a method for producing the positive electrode active material for nonaqueous electrolyte secondary batteries, including a first step of mixing a Li-metal composite oxide powder which is represented by the general formula: LizNi1-x-yCoxMyO2 (where 0≤x≤0.35, 0≤y≤0.35, and 0.97≤z≤1.30 are satisfied, and M is at least one element selected from Mn, V, Mg, Mo, Nb, Ti and Al) and constituted by primary particles and secondary particles, to an alkaline solution with a W compound dissolved therein, and immersing a resulting mixture, followed by solid-liquid separation, to obtain a W mixture with W uniformly dispersed on the surface of the primary particles of the composite oxide, and a second step of heat-treating the W mixture to thereby form a compound containing W and Li on the surface of the primary particles of the composite oxide powder.
US11056678B2 Negative electrode for power storage device, method for forming the same, and power storage device
An object is to suppress electrochemical decomposition of an electrolyte solution and the like at a negative electrode in a lithium ion battery or a lithium ion capacitor: thus, irreversible capacity is reduced, cycle performance is improved, or operating temperature range is extended. A negative electrode for a power storage device including a negative electrode current collector, a negative electrode active material layer which is over the negative electrode current collector and includes a plurality of particles of a negative electrode active material, and a film covering part of the negative electrode active material. The film has an insulating property and lithium ion conductivity.
US11056677B2 Display substrate, method and device for manufacturing display substrate, and display device
A display substrate, a method and a device for manufacturing the display substrate, and a display device are provided. The method includes shielding a to-be-cut region of a to-be-evaporated substrate with a shielding member and evaporating a common layer material onto the to-be-evaporated substrate to form a common layer of the display substrate. The display substrate includes the to-be-cut region and a display region surrounding the to-be-cut region, and the common layer material is deposited onto the display region rather than the to-be-cut region.
US11056676B2 Method of brightness enhancement layer with sub-wavelength structure for a light-emitting element
A method of brightness enhancement layer with sub-wavelength structure for a light-emitting element contains steps of: (a). synthesizing PS nanospheres by using emulsion polymerization without emulsifier; (b). spreading and suspending the PS nanospheres in a liquid level by way of PS nanosphere suspension; (c). forming the PS nanospheres in a close-packed arrangement by using surfactant solution; (d). regulating a diameter of the PS nanospheres in an oxygen plasma treatment so as to form non-close-packed single-layer PS nanosphere array structure, thus producing the sub-wavelength structure; (e) replicating the sub-wavelength structure onto an indium tin oxide (ITO) conductive glass in a nanoimprint lithography manner; and (f) using the ITO conductive glass with the sub-wavelength structure as a substrate so as to manufacture the light-emitting element.
US11056673B2 Light emitting device
A covering layer (240) is formed by atomic layer deposition (ALD) and contains an insulating inorganic material. An intermediate layer (220) contains a material having a linear expansion coefficient different from that of a material of the covering layer (240). A buffer layer (230) has a surface in contact with the intermediate layer (220), that is, a first surface. The buffer layer (230) has a surface in contact with the covering layer (240), that is, a second surface. A linear expansion coefficient difference between a material of the buffer layer (230) and the inorganic material of the covering layer (240) is less than a linear expansion coefficient difference between the material of the intermediate layer (220) and the inorganic material of the covering layer (240).
US11056670B2 Organic light-emitting diode (OLED) display and method of fabricating the same
An organic light-emitting diode (OLED) display and method of fabricating the same are disclosed. In one aspect, the OLED display includes a first substrate including a display area and a peripheral area surrounding the display area. The display area includes a plurality of pixels each including an OLED and the peripheral area includes a signal driver electrically connected to the pixels. A conductive layer is formed over the signal driver and on opposing sides of the signal driver and a second substrate is formed over the first substrate. The OLED display further includes a first seal interposed between the first and second substrates in the peripheral area and substantially sealing the first and second substrates and a second seal surrounding the first seal and formed over the signal driver.
US11056660B2 Organic optoelectronic component and method for producing the same
The invention relates to an organic optoelectronic component (10) comprising a first electrode layer (2), having a doped matrix material and metal nanowires, an organic active layer (3), which is suitable for emitting or detecting electromagnetic radiation, and a second electrode layer (6). The organic active layer (3) is directly adjacent to the first electrode layer (2). The invention further relates to a method for producing the organic optoelectronic component (10).
US11056653B2 Organic electroluminescence device
ObjectTo provide an organic electroluminescence device including, in order to improve the device characteristics of the organic electroluminescence device, particularly, to absorb light having the wavelengths of from 400 nm to 410 nm from sunlight, not to affect a material inside the device, and to significantly improve the light extraction efficiency, a capping layer formed of a material that has a high absorption coefficient, a high refractive index, and an excellent stability, durability, and light resistance of a thin film, and does not absorb light in the blue, green, and red wavelength range.Solving MeansAn organic electroluminescence device including at least an anode electrode, a hole transport layer, a light emitting layer, an electron transport layer, a cathode electrode, and a capping layer in the stated order, in which the capping layer includes a material having an extinction coefficient of not less than 0.3 at wavelengths of from 400 nm to 410 nm and an absorbance of not less than 0.2 at wavelengths of from 400 nm to 410 nm in an absorption spectrum of a concentration of 10−5 mol/l.
US11056646B2 Memory device having programmable impedance elements with a common conductor formed below bit lines
An integrated circuit device can include a plurality of access transistors formed in a substrate having control terminals connected to word lines that extend in a first direction; a plurality of two-terminal programmable impedance elements formed over the substrate; at least one conductive plate structure formed on and having a common conductive connection to, the programmable impedance elements, and extending in at least the first direction; a plurality of storage contacts that extend from a first current terminal of each access transistor to one of the programmable impedance elements; a plurality of bit lines formed over the at least one conductive plate structure, the bit lines extending in a second direction different from the first direction; and a plurality of bit line contacts that extend from a second current terminal of each access transistor through openings in the at least one plate structure to one of the bit lines.
US11056645B2 Vertical memory devices
A vertical memory device includes gate electrodes on a substrate and a first structure. The gate electrodes may be spaced apart from each other in a first direction perpendicular to an upper surface of the substrate. The first structure extends through the gate electrodes in the first direction, and includes a channel and a variable resistance structure sequentially stacked in a horizontal direction parallel to the upper surface of the substrate. The variable resistance structure may include quantum dots (QDs) therein.
US11056639B2 Magnetoresistance effect element
A magnetoresistance effect element includes: a first ferromagnetic layer; a second ferromagnetic layer; and a tunnel barrier layer sandwiched between the first ferromagnetic layer and the second ferromagnetic layer, wherein the tunnel barrier layer is an oxide having a spinel structure, and the tunnel barrier layer includes a magnetic element as an additional element.
US11056636B2 Oscillator, method of manufacturing oscillator, electronic apparatus, and vehicle
An oscillator includes a substrate having a first substrate main surface and a substrate side surface, and a lid body bonded to the substrate and including a metal material, in which the substrate includes a substrate body having a first substrate body main surface corresponding to the first substrate main surface and a substrate body side surface corresponding to the substrate side surface, and provided with a cutout portion in the substrate body side surface, a side surface wiring provided along the cutout portion, a filling member provided in the cutout portion, and an insulating coating member provided on the first substrate body main surface.
US11056634B1 Josephson magnetic memory with a semiconductor-based magnetic spin valve
Josephson magnetic memory cells with a semiconductor-based magnetic spin valve are described. An example memory cell includes a first superconducting electrode, a second superconducting electrode, and a semiconductor-based magnetic spin valve arranged between the two superconducting electrodes. The semiconductor-based magnetic spin valve includes a semiconductor layer and a first ferromagnetic insulator arranged near the semiconductor layer, arranged on a first side of the semiconductor layer, configured to provide a fixed magnetization oriented in a first direction. The semiconductor-based magnetic spin valve further includes a second ferromagnetic insulator, arranged on a second side, opposite to the first side, of the semiconductor layer, configured to provide a free magnetization oriented in the first direction or a second direction, opposite to the first direction, in order to control a parameter associated with a flow of current from the first superconducting electrode to the second superconducting electrode through the semiconductor layer.
US11056630B2 Display module having glass substrate on which side wirings are formed and manufacturing method of the same
A display module includes a glass substrate having a front surface and a back surface opposite to the front surface; a TFT layer; LEDs mounted on the TFT layer; and a plurality of side wirings formed at intervals in an edge area of the glass substrate, and the edge area includes a first area corresponding to a side surface of the glass substrate, a second area adjacent to the side surface, and a third area adjacent to the side surface, and a first chamfered surface formed by chamfering a corner at which the first area and the second area meet, and a second chamfered surface formed by chamfering a corner at which the first area and the third area meet, and each of the plurality of side wirings is disposed along the second area, the first chamfered surface, the first area, the second chamfered surface, and the third area.
US11056628B2 Method of producing an optoelectronic semiconductor chip and optoelectronic semiconductor chip
A method of manufacturing an optoelectronic semiconductor chip includes providing a growth substrate, growing a semiconductor layer sequence on the growth substrate, depositing a metallization on a side of the semiconductor layer sequence remote from the growth substrate, depositing a layer on the metallization, coupling a carrier to the layer on a side of the layer remote from the semiconductor layer sequence, separating the growth substrate from the semiconductor layer sequence, depositing an electrically conductive layer on a side of the semiconductor layer sequence facing away from the carrier, separating the carrier from the layer, thereby forming a layer stack with the metallization, the semiconductor layer sequence, the electrically conductive layer and a coupling layer including at least a part of a further material of the layer remaining on a side of the metallization remote from the semiconductor layer sequence, and coupling the layer stack to a chip carrier.
US11056622B2 Light source module and backlight unit having the same
A backlight unit including a light guide plate, a first light source and a second light source adjacent to the light guide plate, each of the light sources including a light emitting diode chip including a substrate and a semiconductor stack disposed on the substrate, a wavelength conversion layer covering the light emitting diode chip, and a plurality of reflectors disposed on at least two opposing side surfaces of the light emitting diode chip, in which at least a portion of the wavelength conversion layer of the first light source facing the second light source is exposed by the reflectors.
US11056621B2 Optoelectronic device
An optoelectronic device is disclosed. In an embodiment an optoelectronic device includes a primary radiation source configured to emit an electromagnetic primary radiation during operation of the device and a conversion element arranged in a beam path of the electromagnetic primary radiation, wherein the conversion element includes quantum dots configured to at least partially convert the electromagnetic primary radiation into an electromagnetic secondary radiation during operation of the device, and wherein the quantum dots have a diameter of 50 nm inclusive to 500 nm inclusive.
US11056620B2 Light emitting device and plant cultivation method
A light emitting device includes a light emitting element having an emission peak wavelength in a range of 380 nm or more and 490 nm or less, and a red fluorescent material which is excited by the light from the light emitting element to emit light having at least one light emission peak wavelength in a range of 580 nm or more and 680 nm or less, wherein a ratio of the photon flux R of red light in a range of 620 nm or more and 700 nm or less to the photon flux B of blue light in a range of 400 nm or more and 490 nm or less, R/B, is in a range of more than 20 and 200 or less.
US11056619B2 Quantum dot materials and method of manufacturing thereof
A quantum dot material and a method of manufacturing quantum dot materials are provided. The method comprises a step of providing a quantum dot solution and a silicon compound, a step of introducing the quantum dot solution and the silicon compound to a cross-linking agent and an ammonia solution (NH4OH) for cross-linking reaction, and a step of obtaining a quantum dot material coated with a silicon oxide (SiOx) material.
US11056613B2 Method for production of quantum rods with precisely controllable wavelength of emission
A method for fabricating quantum rods includes: preparing a Cd-precursor; preparing a S-precursor and CdSe seeds; preparing a Zn-precursor; mixing the S-precursor and the CdSe seeds with the Cd-precursor in a reaction mixture; adding the Zn-precursor to the reaction mixture; stopping the reaction; and performing a purification process to obtain the quantum rods.
US11056612B2 Light emitting element
A light emitting element includes: a semiconductor structure including: a substrate, an n-side nitride semiconductor layer containing an n-type impurity and located on the substrate, and a p-side nitride semiconductor layer containing a p-type impurity and located on the n-side nitride semiconductor layer, wherein a resistance of a peripheral portion of the p-side nitride semiconductor layer is higher than a resistance of an area inside of the peripheral portion in a top view, wherein a p-side nitride semiconductor side of the semiconductor structure is a light extraction face side, and an n-side nitride semiconductor side of the semiconductor structure is a mounting face side; and first protective layer located on an upper face of the p-side nitride semiconductor layer in a region corresponding to the peripheral portion of the p-side nitride semiconductor layer.
US11056607B2 Complex sensing device packaging structure and packaging method
A complex sensing device packaging structure includes a light emitting element sealed in a first transparent molding material, a light sensing element sealed in a second transparent molding material, a substrate disposed with the light emission element, the light sensing element, the first transparent molding material and the second transparent molding material, and an opaque blocking element disposed on the substrate and between the first transparent molding material and the second transparent molding material, wherein the opaque blocking element is formed by performing a solidifying process to an opaque glue being liquid at the room temperature.
US11056606B2 Photodetector and method of manufacture
The present invention teaches a structure of a photodetector and the method of making thereof. A photodetector inaccordance of the present invention is easy to fabricate, can be fabricated through low temperature processes, has high responsivity, high switching speed and high active area to device area ratio, is able to operate under photovotaic mode or reverse bias conditions.
US11056604B1 Photodiode of avalanche breakdown having mixed composite charge layer
An avalanche photodiode (APD) is provided with a mixed composite charge layer. A novel structure of InAlAs is designed with the mixed layer. A single P-type field control layer is divided into three layers of different materials with each two forming a heterojunction structure. By controlling the relative concentration distributions and thicknesses of the first, second, and third P-type field control layers along with a mesa shape formed through chemical selective etching, a part of the second P-type field control layer is exposed to the air with a part of the first one etched out at the same time through this single structure having the mesa shape. Thus, the field of a multiplication layer is further confined at center to concentrate electric-field so that fringe field is low but not collapsed. Hence, the overall speed is increased, the intensity high, and sensitivity good while response is fast and efficiency high.
US11056601B2 Solar cell
A solar cell includes an n-type silicon substrate having a first main surface and a second main surface, an n-type first semiconductor layer disposed above the first main surface, a first intrinsic semiconductor layer disposed between the first main surface and the first semiconductor layer, a p-type second semiconductor layer disposed on the second main surface, and a second intrinsic semiconductor layer disposed between the second main surface and the second semiconductor layer. An oxygen concentration at an interface between the silicon substrate and the second intrinsic semiconductor layer is lower than an oxygen concentration at an interface between the silicon substrate and the second intrinsic semiconductor layer. An oxygen concentration at an interface between the second intrinsic semiconductor layer and the second semiconductor layer is higher than an oxygen concentration at an interface between the first intrinsic semiconductor layer and the first semiconductor layer.
US11056596B2 Semiconductor device and method of manufacturing the same
A semiconductor device according to an exemplary embodiment of the present disclosure includes: an n− type layer disposed in a first surface of a substrate; an n type layer disposed on the n− type layer; a first electrode disposed on the n type layer, and a second electrode disposed in a second surface of the substrate, wherein an energy band gap of the n− type layer is larger than an energy band gap of the n type layer.
US11056593B2 Semiconductor devices with metal contacts including crystalline alloys
Techniques are disclosed for forming semiconductor integrated circuits including one or more of source and drain contacts and gate electrodes comprising crystalline alloys including a transition metal. The crystalline alloys help to reduce contact resistance to the semiconductor devices. In some embodiments of the present disclosure, this reduction in contact resistance is accomplished by aligning the work function of the crystalline alloy with the work function of the source and drain regions such that a Schottky barrier height associated with an interface between the crystalline alloys and the source and drain regions is in a range of 0.3 eV or less.
US11056587B2 Semiconductor device and method for fabricating the same
A semiconductor device includes an active region defined by an element isolation region in a base substrate, source and drain regions of a first conductivity type spaced apart from each other, and formed in the active region, a body region of a second conductivity type surrounding the source region, and formed in the base substrate, a drift region of the first conductivity type surrounding the drain region, having a lower impurity concentration than the drain region, and formed in the base substrate, an insulating structure including a buried insulating pattern and a semiconductor pattern sequentially stacked on the drift region, a gate dielectric film including a first portion extending along an upper surface of the body region and a second portion extending along a side surface and an upper surface of the insulating structure, and a gate electrode extending along an upper surface of the gate dielectric film.
US11056582B2 Bidirectional phase controlled thyristor (BiPCT)—a new semiconductor device concept
A bidirectional thyristor device includes a semiconductor wafer with a number of layers forming pn junctions. A first main electrode and a first gate electrode are arranged on a first main side of the wafer. A second main electrode and a second gate electrode are arranged on a second main side of the wafer. First emitter shorts penetrate through a first semiconductor layer and second emitter shorts penetrate through a fifth semiconductor layer. In an orthogonal projection onto a plane parallel to the first main side, a first area occupied by the first semiconductor layer and the first emitter shorts overlaps in an overlapping area with a second area occupied by the fifth semiconductor layer and the second emitter shorts. The overlapping area, in which the first area overlaps with the second area, encompasses at least 50% of a total wafer area occupied by the semiconductor wafer.
US11056579B2 Semiconductor device
Semiconductor devices and fabrication methods are provided. A semiconductor device includes a substrate, a source and drain material layer formed on the substrate. The source and drain material layer contains a first trench there-through. The semiconductor device further includes a mask layer formed on the source and drain material layer containing a second trench there-through. The second trench has a cross-section area larger than the first trench and covers the first trench. The semiconductor device further includes a channel material layer conformally formed on a bottom and sidewalls of each of the first trench and the second trench and a gate structure conformally formed on the channel material layer, on the bottom and the sidewalls of each of the first trench and the second trench. The gate structure has a recess and the recess has a symmetrical step structure.
US11056576B1 Method of manufacturing semiconductor device
The present disclosure provides a method of manufacturing a semiconductor device. The method includes steps of creating at least one trench in a substrate; forming a dielectric film on the substrate in the trench; depositing a first conductive layer on the dielectric film to partially fill the trench; depositing an insulative film on the first conductive layer; depositing a second conductive layer to bury the insulative film; and recessing the first conductive layer, until the insulative film is entirely removed. Due to the deposition of the insulative film on the first conductive layer, the etch depth of the superfluous first conductive layer can be accurately controlled.
US11056568B2 Method for manufacturing horizontal-gate-all-around devices with different number of nanowires
A method is provided. First and second fins are etched to form a first recess over the etched first fin and a second recess over the etched second fin. A first composite fin and a second composite fin are concurrently epitaxially grown respectively in the first recess and the second recess. The first composite fin includes a plurality of nanowire channels and at least one sacrificial layer. The second composite fin includes at least one nanowire channel and at least one sacrificial layer. A number of the plurality of nanowire channels of the first composite fin is greater than a number of the at least one nanowire channel of the second composite fin. A dielectric material is recessed to expose at least a portion of the first composite fin and at least a portion of the second composite fin.
US11056567B2 Method of forming a doped metal carbide film on a substrate and related semiconductor device structures
Methods for depositing a doped metal carbide film on a substrate are disclosed. The methods may include: depositing a doped metal carbide film on a substrate utilizing at least one deposition cycle of a cyclical deposition process; and contacting the doped metal carbide film with a plasma generated from a hydrogen-containing gas. Semiconductor device structures including a doped metal carbide film formed by the methods of the disclosure are also disclosed.
US11056562B2 Silicon carbide semiconductor device
A present invention includes the following: a third impurity region having a second conductivity type and disposed in an outer peripheral region that is the outer periphery of a cell arrangement region in which a unit cell is disposed; a field insulating film disposed in the outer peripheral region; an interlayer insulating film; a first main electrode disposed on the interlayer insulating film. The third impurity region includes a fourth impurity region having the second conductivity type, having a higher impurity concentration than the third impurity region. A gate wire and a gate pad are disposed in the outer peripheral region. The fourth impurity region is adjacent to the cell arrangement region, surrounds at least a region below the gate pad, and is electrically connected to the first main electrode.
US11056559B2 Gas sensor and method for manufacturing same
A method for manufacturing a gas sensor may be provided, the method comprising the steps of: preparing a porous base substrate; providing, on the porous base substarte, a source solution having graphene dispersed in a base solvent; manufacturing a graphene-impregnated base substrate by means of a driving process; and forming a first electrode and a second electrode on the graphene-impregnated base substrate.
US11056553B2 Organic light emitting diode display substrate, manufacturing method thereof, and display device comprising organic light emitting diode display substrate
An organic light emitting diode display substrate, comprises: a base substrate, and a first data line, a driving thin film transistor and an energy storage capacitor which are disposed on the base substrate, wherein the energy storage capacitor comprises a first capacitor plate and a second capacitor plate disposed opposite to each other, and the second capacitor plate is electrically connected to a gate of the driving thin film transistor, in a direction away from the base substrate, the first capacitor plate is disposed between the first data line and the second capacitor plate, wherein the display substrate further comprises a first shielding portion, which is electrically connected to the first capacitor plate and is disposed at least partially between the second capacitor plate and the first data line. A method of manufacturing the display substrate and a display device are further provided.
US11056552B2 Display panel and method of manufacturing same
A display panel and a method of manufacturing of the same are provided. The display panel includes a storage capacitor and a light emitting structure. The light emitting structure is disposed above the storage capacitor, and a light emitting surface of the light emitting structure faces the storage capacitor. A first plate of the storage capacitor includes an anode and an active area electrically connected with each other, and a second plate of the storage capacitor includes a source/drain electrode layer, and the source/drain electrode layer is a transparent electrode.
US11056544B1 Display panel and manufacturing method thereof
A display panel includes a substrate, a pixel defining layer defining a plurality of subpixel areas, and a plurality of subpixels. The plurality of subpixels are disposed in the plurality of subpixel areas in one-to-one correspondence. Each of the plurality of subpixels includes a primary pixel and a secondary pixel surrounding the primary pixel. The primary pixel and the secondary pixel are independently driven by different driving circuits, respectively. By configuring the subpixels into the primary pixel and the secondary pixel surrounding the primary pixel and driving the primary pixel and the secondary pixel independently, it is beneficial to adjust brightness of the plurality of subpixels and compensate for luminescence lifespans of the plurality of subpixels.
US11056542B2 Display device and method for manufacturing the same
A display device includes a substrate having a red pixel region, a blue pixel region, and a green pixel region. An anode is on the substrate, a light-emitting layer is on the anode, and a cathode is on the light-emitting layer, wherein the light-emitting layer includes a red light-emitting layer emitting red light on the red pixel region, a blue light-emitting layer emitting blue light on the blue pixel region, and a green light-emitting layer emitting green light on the red pixel region, the blue pixel region, and the green pixel region. Each of the red light, the blue light, and the green light is resonated between the anode and the cathode.
US11056536B2 Semiconductor device and method for fabricating the same
A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate; forming a first top electrode on the first MTJ and a second top electrode on the second MTJ; forming a passivation layer on the first MTJ and the second MTJ; removing part of the passivation layer so that a top surface of all of the remaining passivation layer is lower than a top surface of the first electrode; and forming a ultra low-k (ULK) dielectric layer on the first MTJ and the second MTJ.
US11056535B2 Non-volatile memory element arrays in a wheatstone bridge arrangement
Structures for a bitcell of a non-volatile memory and methods of fabricating and using such structures. Non-volatile memory elements are arranged in a Wheatstone bridge arrangement having a first terminal and a second terminal. A first field-effect transistor is coupled with the first terminal of the Wheatstone bridge arrangement, and a second field-effect transistor is coupled with the second terminal of the Wheatstone bridge arrangement.
US11056534B2 One selector one resistor MRAM crosspoint memory array fabrication methods
A memory array is provided that includes a first memory level having a plurality of memory cells each including a corresponding magnetic memory element coupled in series with a corresponding selector element, and a plurality of vias, each of the vias coupled in series with a corresponding one of the memory cells.
US11056531B2 Method of fabricating a monolithic sensor device from a layered structure
A method of fabricating a field-effect transistor in which a native oxide layer is removed prior to etching a gate recess. The cleaning step ensures that the etch of the gate recess starts at the same time across an entire sample, such that a uniform gate recess depth and profile can be achieved across an array of field-effect transistors. This results in a highly uniform switch-off voltage for the field-effect transistors in the array.
US11056529B2 Image-sensor chip-scale package and method for manufacture
A method for fabricating an image-sensor chip-scale package includes bonding, with temporary adhesive, a glass wafer to a device wafer including an array of image sensors. The method also includes forming an isolated-die wafer by removing, from the device wafer, each of a plurality of inter-sensor regions each located between a respective pair of image sensors of the array of image sensors. The isolated-die wafer includes a plurality of image-sensor dies each including a respective image sensor, of the array of image sensors, bonded to the glass wafer. The method also includes encapsulating the isolated-die wafer to form an encapsulated-die wafer; removing, from each of the plurality of image-sensor dies, a respective region of the glass wafer covering the respective image sensor; and singulating the encapsulated-die wafer.
US11056528B2 Image sensor with phase-sensitive pixels
Imaging apparatus (100, 200) includes a photosensitive medium (302) configured to convert incident photons into charge carriers. A bias electrode (304) overlies the photosensitive medium and applies a bias potential to the photosensitive medium. One or more pixel circuits (306) are formed on a semiconductor substrate. Each pixel circuit defines a respective pixel (300) and includes first and second pixel electrodes (316, 318) coupled to collect the charge carriers from the photosensitive medium at respective first and second locations, and first and second transfer gates (326, 328) in respective proximity to the first and second pixel electrodes. Circuitry (700) is coupled to apply different, respective first and second potentials to the first and second transfer gates and to vary the first and second potentials so as to control relative proportions of the charge carriers that are collected by the first and second electrodes.
US11056526B2 Imaging device camera system and driving method of the same
An imaging device including an electronic shutter and a pixel array with color pixels with different characteristics of spectral sensitivity arranged. The pixel array part has at least one clear pixel, the plurality of color pixels including at least two of (i) a first color filter pixel having a peak of spectral sensitivity characteristics for red, (ii) a second color filter pixel having a peak for blue, and (iii) a third color filter pixel having a peak for green. The clear pixel has a high transmittance arranged in an oblique pixel array system at a given position of a given row and a given column with respect to the first color filter pixel, the second color filter pixel, and the third color filter pixel. An electronic shutter is separately driven for the at least one clear pixel and for the plurality of color filter pixels.
US11056525B2 Semiconductor photomultiplier
The present disclosure relates to a semiconductor photomultiplier comprising a a substrate; an array of photosensitive elements formed on a first major surface of the substrate; a plurality of primary bus lines interconnecting the photosensitive elements; at least one segmented secondary bus line provided on a second major surface of the substrate which is operably coupled to one or more terminals; and multiple vertical interconnect access (via) extending through the substrate operably coupling the primary bus lines to the at least one segmented secondary bus line.
US11056524B2 Image pickup device, method of manufacturing image pickup device, and electronic apparatus
Provided is an image pickup device, including: a first trench provided between a plurality of pixels in a light-receiving region of a semiconductor substrate, the semiconductor substrate including the light-receiving region and a peripheral region, the light-receiving region being provided with the plurality of pixels each including a photoelectric conversion section; and a second trench provided in the peripheral region of the semiconductor substrate, wherein the semiconductor substrate has a variation in thickness between a portion where the first trench is provided and a portion where the second trench is provided.
US11056522B2 Optical sensor assembly
An optical sensor assembly is provided in which a dark mirror coating is used to suppress stray light in the form of both unwanted reflections from non-optically active regions of the sensor assembly surface and unwanted transmission of light into the surface region of the sensor assembly. The sensor assembly includes an image sensor positioned in a substrate adjacent to substrate surface areas that are not optically active. A dark mirror coating covering those surface areas significantly reduces reflections from non-optically active surface regions and improves image sensor performance in terms of signal-to-noise ratio and reduction in the appearance of “ghost” images, in turn enhancing the accuracy and precision of the sensor. The dark mirror coating may in the alternative, or in addition, be positioned underneath an optical filter, depending on the structure, material, and requirements of a particular sensor assembly.
US11056516B2 Power storage element, manufacturing method thereof, and power storage device
Disclosed is a power storage element including a positive electrode current collector layer and a negative electrode current collector layer which are arranged on the same plane and can be formed through a simple process. The power storage element further includes a positive electrode active material layer on the positive electrode current collector layer; a negative electrode active material layer on the negative electrode current collector layer; and a solid electrolyte layer in contact with at least the positive electrode active material layer and the negative electrode active material layer. The positive electrode active material layer and the negative electrode active material layer are formed by oxidation treatment.
US11056512B2 Device substrate
A device substrate includes a first substrate, an active device array, a data line pad, a gate drive circuit test line, and a first barrier structure. The active device array is located on the first substrate. The data line pad is electrically connected to the active device array. The gate drive circuit test line is located on the first substrate. The first barrier structure is located on the first substrate. The first barrier structure is located between the gate drive circuit test line and the data line pad. The barrier structure includes a first blocking wall.
US11056511B2 Display apparatus and method of manufacturing the same
A display apparatus including a first thin film transistor disposed on a substrate and including a first gate electrode and a first active layer including a silicon semiconductor, and a second thin film transistor disposed on the first thin film transistor and including a second gate electrode and a second active layer overlapping the first thin film transistor, the second active layer including an oxide semiconductor.
US11056509B2 Display device having a plurality of thin-film transistors with different semiconductors
A display device includes a substrate; a buffer layer disposed on the substrate; a first thin-film transistor comprising a first active layer made of a low-temperature poly-silicon (LTPS), a first gate electrode overlapping with the first active layer with the first gate insulating layer and the second gate insulating layer therebetween, and a first source electrode and a first drain electrode electrically connected to the first active layer; and a second thin-film transistor comprising a second active layer made of an oxide semiconductor, a second gate electrode overlapping with the second active layer with the second gate insulating layer therebetween, and a second source electrode and a second drain electrode electrically connected to the second active layer. The first gate electrode of the first thin-film transistor and the second gate electrode of the second thin-film transistor may be disposed on the second gate insulating layer.
US11056508B2 Ferroelectric memory device
A ferroelectric memory device according to an embodiment includes a substrate, a ferroelectric layer and a gate electrode layer that are sequentially stacked on the substrate, and an oxygen vacancy barrier layer disposed at least between the substrate and the ferroelectric layer or between the ferroelectric layer and the gate electrode layer. The oxygen vacancy barrier layer includes a metal oxide with formula unit components that satisfy a stoichiometric ratio.
US11056503B2 Semiconductor memory device including vertical barrier
A semiconductor memory device includes a dummy stack structure having a first stack structure and a second stack structure formed on the first stack structure. The semiconductor memory device also includes a cell stack structure surrounding the dummy stack structure. The semiconductor memory device further includes a vertical barrier disposed at a boundary between the cell stack structure and the dummy stack structure, the vertical barrier including a first part formed on a sidewall of the first stack structure and a second part formed on a sidewall of the second stack structure. A sectional area of the first part of the vertical barrier is greater than a sectional area of the second part of the vertical barrier at a height at which a boundary between the first stack structure and the second stack structure is disposed.
US11056501B2 Three-dimensional NAND memory device with source line comprising metallic and semiconductor layers
According to an embodiment, a memory device comprises a conductive layer containing a metal, a semiconductor layer on the conductive layer, electrode layers stacked on the semiconductor layer in a stacking direction, a semiconductor pillar penetrating the electrode layers in the stacking direction and electrically connected to the semiconductor layer, and a charge trap layer between the electrode layers and the semiconductor pillar. The conductive layer has a recess or a through-hole below the semiconductor pillar.
US11056500B2 Semiconductor memory device
A semiconductor memory device includes a dielectric stack structure, and capacitor electrodes disposed in the dielectric stack structure.
US11056498B2 Semiconductor device and manufacturing method therefor
The present disclosure provides a semiconductor device and a manufacturing method therefor. The manufacturing method for a semiconductor device is provided for forming through-holes in a semiconductor device, comprising: forming a plurality of shallow trench isolations in portions of a substrate corresponding to memory cell regions; forming a plurality of gates on surfaces of the portions of the substrate; forming spacers on side walls at both sides of the gates extending in the first direction; depositing a sacrificial layer on the memory cell region; removing portions of the sacrificial layer corresponding to the shallow trench isolations at memory cell drain, and depositing an isolation dielectric on the shallow trench isolations at the memory cell drain to form isolation strips; and removing the remaining sacrificial layer to form bottom through-holes in spaces formed after removing the remaining sacrificial layer.
US11056496B2 Semiconductor memory device and method for programming shared page data in memory cells of two different word lines
A semiconductor memory device includes a memory cell array, a peripheral circuit, and a control logic. The memory cell array may include a plurality of memory cells. The peripheral circuit may program shared page data on selected memory cells among the plurality of memory cells. The control logic may control, during the program operation on the selected memory cells, the peripheral circuit to program first partial data of the shared page data to memory cells coupled to a first word line among the selected memory cells, and to program second partial data of the shared page data to memory cells coupled to a second word line different from the first word line among the selected memory cells.
US11056493B2 Semiconductor structures with deep trench capacitor and methods of manufacture
An integrated FinFET and deep trench capacitor structure and methods of manufacture are disclosed. The method includes forming at least one deep trench capacitor in a silicon on insulator (SOI) substrate. The method further includes simultaneously forming polysilicon fins from material of the at least one deep trench capacitor and SOI fins from the SOI substrate. The method further includes forming an insulator layer on the polysilicon fins. The method further includes forming gate structures over the SOI fins and the insulator layer on the polysilicon fins.
US11056492B1 Dense memory arrays utilizing access transistors with back-side contacts
Described herein are memory arrays where some memory cells include access transistors with one front-side and one back-side source/drain (S/D) contacts. An example memory array further includes a bitline, coupled to the first S/D region of the access transistor of a first memory cell of the memory array, and a plateline, coupled to a first capacitor electrode of a storage capacitor of the first memory cell. Because the access transistor is a transistor with one front-side and one back-side S/D contacts, the bitline may be provided in a first layer, the channel material—in a second layer, and the plateline—in a third layer, where the second layer is between the first layer and the third layer, which may allow increasing the density of memory cells in a memory array, or, conversely, reducing the footprint area of a memory array with a given density of memory cells.
US11056489B2 Integrated circuit devices including vertical field-effect transistors (VFETs)
Integrated circuit devices including standard cells are provided. The standard cells may include a first vertical field effect transistor (VFET) having a first conductivity type, and a second VFET having a second conductivity type. The first VFET may include a first top source/drain region, a first channel region, and a first bottom source/drain region. The second VFET may include a second top source/drain region, a second channel region, and a second bottom source/drain region. The standard cells may also include a conductive line that is electrically connected to the first top source/drain region or the first bottom source/drain region and is electrically connected to the second bottom source/drain region. The standard cell may be configured to output an output signal thereof through the conductive line.
US11056486B2 Semiconductor device with multiple threshold voltage and method of fabricating the same
A semiconductor device includes a first vertical device having a first threshold and second vertical device having a second threshold. The first vertical device includes a first source; a first channel over the first source; a first drain over the first channel; a first conductive layer adjacent to the first channel; and a first gate adjacent to the first conductive layer. The second vertical device includes a second source; a second channel over the second source; a second drain over the second channel; a second conductive layer adjacent to the second channel; and a second gate adjacent to the second conductive layer.
US11056485B2 Semiconductor device having three-dimensional structure and method of manufacturing the same
A semiconductor device having a three-dimensional structure is disclosed herein. The semiconductor device includes a substrate. a first electrode line that extends in a first direction perpendicular to the substrate, a device pattern that extends from the first electrode line in a second direction parallel to the substrate, and a second electrode line connected to the device pattern. The device pattern may comprise at least one semiconductor layer pattern, where the at least one semiconductor layer pattern comprises an n-type dopant or a p-type dopant.
US11056483B2 Heterolithic microwave integrated circuits including gallium-nitride devices on intrinsic semiconductor
Apparatus and methods relating to heterolithic microwave integrated circuits HMICs are described. An HMIC can include different semiconductor devices formed from different semiconductor systems in different regions of a same substrate. An HMIC can also include bulk regions of low-loss electrically-insulating material extending through the substrate and located between the different semiconductor regions. Passive RF circuit elements can be formed on the low-loss electrically-insulating material.
US11056482B2 Semiconductor device with electrostatic discharge protection
A semiconductor device includes a P-type substrate, a P-type well region, an N-type well region, an N-type guard ring region, an insulating layer, a poly gate disposed, and a bulk region. The P-type well region is disposed on the P-type substrate and includes source regions and drain regions each spaced apart from the other. The N-type well region disposed and spaced apart from the P-type well region on the P-type substrate. The N-type guard ring region is disposed around perimeters of the P-type well region and the N-type well region. The insulating layer is disposed around the P-type well region and the N-type well region on the N-type guard ring region. The poly gate is disposed around the perimeter of the P-type well region and the N-type well region, respectively, on the insulating layer. The bulk region is disposed on the N-type guard ring region adjacent the poly gate.
US11056480B2 Method of forming a TVS semiconductor device
In one embodiment, a TVS semiconductor device includes a P-N diode that is connected in parallel with a bipolar transistor wherein a breakdown voltage of the bipolar transistor is less than a breakdown voltage of the P-N diode.
US11056479B2 Chip, manufacturing method, and mobile terminal
In a chip, a manufacturing method, and a mobile terminal, the chip includes a first region and a second region. The first region is formed by at least one first circuit unit set. The second region is formed by a second circuit unit set. The at least one first circuit unit set includes a plurality of identical circuit units. A number of circuit units in the first region determines a specification of the chip and a size of the first region of the chip.
US11056477B2 Semiconductor device having a first cell row and a second cell row
Disclosed herein is a semiconductor integrated circuit device which includes a standard cell with a plurality of fins extending in a first direction and arranged in a second direction that is perpendicular to the first direction. An active fin of the fins forms part of an active transistor. A dummy fin of the fins is disposed between the active fin and an end of the standard cell.
US11056476B2 Microcontroller unit and fabrication method thereof
The present disclosure provides a microcontroller unit and its fabrication method. The microcontroller unit includes a logic control substrate, and also includes at least one memory die and at least one non-memory die, which are disposed on the logic control substrate. The logic control substrate includes a semiconductor device layer and an interconnection dielectric layer. A central processing unit and at least one logic controller are formed in the semiconductor device layer. All memory dies are disposed on the interconnection dielectric layer side by side or stacked one over another, and the at least one memory die is electrically connected to the central processing unit through a corresponding electrical interconnection structure in the interconnection dielectric layer. All non-memory dies are disposed on the interconnection dielectric layer side by side or stacked one over another and are electrically connected to corresponding logic controllers through corresponding electrical interconnection structures in the interconnection dielectric layer.
US11056475B2 Semiconductor module
A semiconductor module includes: a first circuit substrate having a conductive layer disposed on an insulating plate; a plurality of semiconductor elements on the conductive layer, a second circuit substrate disposed above the semiconductor elements, the second circuit substrate having a main current wiring layer and a control wiring layer positioned in a layer above the main current wiring layer; a first lead terminal vertically extending upwards from and in contact with the main current wiring layer; a second lead terminal vertically extending upwards from and in contact with the conductive layer of the first circuit substrate; a third lead terminal vertically extending upwards from and in contact with the control wiring layer; and a sealing material covering at least some of the elements mentioned above.
US11056470B2 Electronic package and method for fabricating the same
An electronic package is provided, including: an encapsulation layer embedded with a first electronic component and conductive pillars; a circuit structure disposed on one surface of the encapsulation layer; a second electronic component disposed on the circuit structure; an insulation layer formed on the other surface of the encapsulation layer; and a circuit portion disposed on the insulation layer. Since the first and second electronic components are disposed on two sides of the circuit structure, respectively, the electronic package has various functions and high performance. A method for fabricating the electronic package is also provided.
US11056469B2 Multimedia device having a pixel array and method for manufacturing the multimedia device
A multimedia device has a multimedia substrate, a magnetic substrate and a pixel array. The multimedia substrate has a magnetic induction portion and a cavity portion. The magnetic substrate is disposed under the cavity portion of the multimedia substrate. The pixel array is disposed on the multimedia substrate. At least an active switching element of the pixel array is electrically connected to the magnetic induction portion of the multimedia substrate and at least a display medium module of the pixel array. The magnetic induction portion changes its current to generate a force of attraction and repulsion so as to vibrate the multimedia substrate and/or the magnetic substrate to generate sound.
US11056468B1 3D semiconductor device and structure
A 3D semiconductor device, the device including: a first die including first transistors and a first interconnect; a second die including second transistors and a second interconnect; and a third die including third transistors and a third interconnect, where the first die is overlaid by the second die, where the first die is overlaid by the third die, where the first die has a first die area and the second die has a second die area, where the first die area is at least 20% larger than the second die area, where the second die is pretested, where the second die is bonded to the first die, where the bonded includes metal to metal bonding, where the first die includes at least two first alignment marks positioned close to a first die edge of the first die, where the second die is aligned to the first die with less than 800 nm alignment error, where the second die includes at least two second alignment marks positioned close to a second die edge of the second die, and where the third die is bonded to the first die.
US11056464B2 Packages with metal line crack prevention design
A package includes a corner, a device die, a plurality of redistribution lines underlying the device die, and a plurality of metal pads electrically coupled to the plurality of redistribution lines. The plurality of metal pads includes a corner metal pad closest to the corner, wherein the corner metal pad is a center-facing pad having a bird-beak direction substantially pointing to a center of the package. The plurality of metal pads further includes a metal pad farther away from the corner than the corner metal pad, wherein the metal pad is a non-center-facing pad having a bird-beak direction pointing away from the center of the package.
US11056460B2 Method for producing an electric circuit comprising a circuit carrier, contact areas, and an insulating body
A method for producing an electric circuit in which a contact carrier comprising a first contact area and a second contact area is provided. An insulating body is applied to the circuit carrier and at least partially covers the first contact area and the second contact area. The insulating body comprises cut-outs in regions both contact areas. A flowable electrical conducting medium is introduced into the insulating body.
US11056457B2 Semiconductor device with bond wire reinforcement structure
A packaged semiconductor device includes a substrate having input/output (I/O) pads, a semiconductor die attached to the substrate and electrically connected to the substrate with bond wires. A bond-wire reinforcement structure is formed over the bond wires before the assembly is covered with a molding compound. The bond-wire reinforcement structure prevents wire sweep during molding and protects the wires from shorting with other wires. In one embodiment, the bond-wire reinforcement structure is formed with a fiberglass and liquid epoxy mixture.
US11056454B2 Stacked three-dimensional heterogeneous memory devices and methods for forming the same
Embodiments of three-dimensional (3D) memory devices and fabrication methods thereof are disclosed. In an example, a 3D memory device includes NAND memory cells and a first bonding layer including first bonding contacts. The 3D memory device also includes a second semiconductor structure including DRAM cells and a second bonding layer including second bonding contacts. The 3D memory device also includes a third semiconductor structure including SRAM cells, a third bonding layer including third bonding contacts, and a fourth bonding layer including fourth bonding contacts. The third and fourth bonding layers are on both sides of the SRAM cells. The semiconductor device further includes a first bonding interface between the first and third bonding layers. The first bonding contacts are in contact with the third bonding contacts at the first bonding interface. The 3D memory device further includes a second bonding interface between the second and fourth bonding layers. The second bonding contacts are in contact with the fourth bonding contacts at the second bonding interface.
US11056453B2 Stackable fully molded semiconductor structure with vertical interconnects
A method of making a semiconductor device may include providing a carrier and forming a first photoresist over the carrier with first openings through the first photoresist. A non-planar conductive seed layer may be formed over the first photoresist and conformally extend into the first openings through the first photoresist. A second photoresist may be formed over the first photoresist and over the non-planar conductive seed layer. The second photoresist layer may be patterned to form second openings through the second photoresist that extend to the non-planar conductive seed layer. Conductive posts may be plated over the non-planar conductive seed layer and within the second openings. The second photoresist may be removed while leaving in place the first photoresist. A semiconductor die may be coupled to the carrier. The semiconductor die, the conductive posts, and the first photoresist may be encapsulated with mold compound.
US11056452B2 Interface bus for inter-die communication in a multi-chip package over high density interconnects
An IC includes first, second, and third IOs, and a multiplexer that includes first and second inputs, and an output. The IC includes first and second transmitters respectively having an output coupled to the first IO and an output coupled to the second IO. A clock generator is coupled between the output and an input of the first transmitter and between the output and an input of the second transmitter. The first input may receive a clock signal generated by the first clock generator and the second clock input is coupled to the third IO and may receive a clock signal via the third IO element from another IC. An IC includes a programmable fabric, k*n wires coupled to and extending from the fabric, n TDMs, and n IO blocks. Each TDM includes k inputs coupled to k wires and an output coupled to one of the IO blocks.
US11056450B2 Semiconductor device
The present disclosure provides a technique for improving the reliability of a semiconductor device where spreading of cracking that occurs at the time of dicing to a seal ring can be restricted even in a semiconductor device with a low-k film used as an interlayer insulating film. Vias are formed in each layer on a dicing region side. The vias are formed at the same intervals in a matrix as viewed in a top view. Even in the case where cracking occurs at the time of dicing, the cracking can be prevented from spreading to a seal ring by the vias. As a result, resistance to moisture absorbed in a circuit formation region can be improved, and deterioration in reliability can be prevented.
US11056449B2 Guard ring structures and their methods of fabrication
A guard ring structure includes a ring of semiconductor material disposed on a substrate. A conductive ring is disposed on the ring of semiconductor material. The conductive ring is interconnected by intervening vias. The guard ring structure may include a plurality of individual rings of the semiconductor material formed concentrically and in close proximity to one another on the substrate. A Guard ring structure is generally disposed around a periphery of a die containing integrated circuits that include transistors RF amplifiers and memory devices to reduce the impact of stresses arising from die sawing to separate individual die in a wafer.
US11056445B2 Package structure with buffer layer sandwiched between encapsulation layer and semiconductor substrate
Package structures are provided. A package structure includes an adhesive layer and a semiconductor substrate over the adhesive layer. The package structure also includes a connector over the semiconductor substrate. The package structure further includes a first buffer layer surrounding the connector. In addition, the package structure includes an encapsulation layer surrounding the first buffer layer. The first buffer layer is sandwiched between the encapsulation layer and the semiconductor substrate, and a sidewall of the encapsulation layer is in direct contact with a sidewall of the first buffer layer and a sidewall of the adhesive layer. The package structure also includes a redistribution layer over the first buffer layer and the encapsulation layer.
US11056444B2 Surface-mount thin-film components having terminals configured for visual inspection
A surface-mountable component is disclosed. The surface-mountable component may include a substrate having a side surface and a top surface that is perpendicular to the side surface. The component may include an element layer formed on the top surface of the substrate. The element layer may include a thin-film element and a contact pad electrically connected with the thin-film element. The contact pad may extend to the side surface of the substrate. The component may include a terminal that is electrically connected with the contact pad at a connection area. The connection area may be parallel with the top surface of the substrate. The terminal may have a visible edge surface that is approximately aligned with the side surface of the substrate. The visible edge surface may be visible for inspection when the surface-mountable component is mounted to a mounting surface.
US11056443B2 Apparatuses exhibiting enhanced stress resistance and planarity, and related methods
An apparatus comprises conductive segments comprising an uneven topography comprising upper surfaces of the conductive segments protruding above an upper surface of underlying materials, a first passivation material substantially conformally overlying the conductive segments, and a second passivation material overlying the first passivation material. The second passivation material is relatively thicker than the first passivation material. The apparatus also comprises structural elements overlying the second passivation material. The second passivation material has a thickness sufficient to provide a substantially flat surface above the uneven topography of the underlying conductive segments at least in regions supporting the structural elements. Microelectronic devices, memory devices, and related methods are also disclosed.
US11056442B2 Substrate structure, electronic package having the same, and method for fabricating the same
A substrate structure has an obtuse portion formed between a side surface and a bottom surface of a substrate body. The obtuse portion includes a plurality of turning surfaces to disperse the stress of the substrate body generated in the packaging process. Therefore, the substrate body is prevented from being cracked. A method for fabricating the substrate structure and an electronic package including the substrate structure are also provided.
US11056440B2 Methods of manufacturing semiconductor device and semiconductor device
In a method of manufacturing a semiconductor device, a first interlayer dielectric (ILD) layer is formed over a substrate, a CMP stop layer is formed over the first ILD layer, a trench opening is formed by patterning the CMP stop layer and the first ILD layer, an underlying first process mark is formed by forming a first conductive layer in the trench opening, a lower dielectric layer is formed over the underlying first process mark, a middle dielectric layer is formed over the lower dielectric layer, an upper dielectric layer is formed over the middle dielectric layer, a planarization operation is performed on the upper, middle and lower dielectric layers so that a part of the middle dielectric layer remains over the underlying first process mark, and a second process mark by the lower dielectric layer is formed by removing the remaining part of the middle dielectric layer.
US11056438B2 Semiconductor packages and method of forming the same
Semiconductor packages and method of forming the same are disclosed. One of the semiconductor packages includes a first die, a second die, a through via and a dielectric encapsulation. The second die is bonded to the first die. The through via is disposed aside the second die and electrically connected to the first die. The through via includes a step-shaped sidewall. The dielectric encapsulation encapsulates the second die and the through via.
US11056436B2 Integrated fan-out structure with rugged interconnect
A method of forming a package assembly includes forming a first dielectric layer over a carrier substrate; forming a conductive through-via over the first dielectric layer; treating the conductive through-via with a first chemical, thereby roughening surfaces of the conductive through-via; and molding a device die and the conductive through-via in a molding material.
US11056427B2 Chip package
A chip package includes a substrate, first and second dielectric layers, first and second metal layers, and first conductive vias. The first dielectric layer is on a bottom surface of the substrate. The first metal layer is on a bottom surface of the first dielectric layer. The first metal layer has first sections, and every two adjacent first sections have a gap therebetween. The second dielectric layer is on a bottom surface of the first metal layer and the bottom surface of the first dielectric layer. The second metal layer is on a bottom surface of the second dielectric layer, and has second sections respectively aligned with the gaps. Two sides of the second section respectively overlap two adjacent first sections. The first conductive via is in the second dielectric layer and in electrical contact with the first and second sections.
US11056420B2 Pressing-type semiconductor power device package
The present invention relates generally to a pressing-type semiconductor power device package, and more specifically to a pressing-type semiconductor power device package in which a semiconductor chip, such as a transistor or diode, is formed into a package via a pressing structure without using any conductive adhesive, such as solder, which is used in the past, thereby improving production efficiency and durability.
US11056411B2 Chip packaging structure
A chip packaging structure with better reliability includes a first protective layer, a redistribution layer formed on the first protective layer, at least one chip electrically connected to the redistribution layer, and an encapsulating layer covering the redistribution layer, the chip, and the side surfaces of the first protective layer. The first protective layer comprises an exposed surface and at least four side surfaces each connected to the exposed surface. A plurality of second openings is defined in the second protective layer, and a portion of the redistribution layer is exposed from the plurality of second openings.
US11056405B2 Methods and systems for controlling wafer fabrication process
A method for controlling a semiconductor fabrication process includes determining a representative feature within a given area on a wafer. The representative feature has a critical dimension (CD) response to a specified process control parameter that is correlated to a CD response to the specified process control parameter of other features within the given area on the wafer. A CD adjustment is determined for the representative feature to achieve a target CD for the representative feature. The CD response to the specified process control parameter for the representative feature and the CD adjustment for the representative feature are used to determine an adjustment to the specified process control parameter that will drive a CD of the representative feature to the target critical dimension for the representative feature. A process controller is updated to implement the adjustment to the specified process control parameter during subsequent processing of another wafer.
US11056403B2 Wafer with beveled edge region and method for analyzing shape of the same
Embodiments provide a method of analyzing a shape of a wafer, including: measuring a cross-sectional shape of a plurality of wafers; obtaining a first angle formed by a first line connecting a first point to a second point having a maximum curvature in an edge region of the wafer and a front surface of the wafer; forming a thin film layer on a surface of each of the wafers; measuring a thickness profile of an edge region of the wafer on which each of the thin film layers is formed; and confirming a wafer having a smallest maximum thickness profile of the thin film layer among the plurality of wafers.
US11056400B2 Semiconductor device and method
Nanowire devices and fin devices are formed in a first region and a second region of a substrate. To form the devices, alternating layers of a first material and a second material are formed, inner spacers are formed adjacent to the layers of the first material, and then the layers of the first material are removed to form nanowires without removing the layers of the first material within the second region. Gate structures of gate dielectrics and gate electrodes are formed within the first region and the second region in order to form the nanowire devices in the first region and the fin devices in the second region.
US11056395B2 Transistor metal gate and method of manufacture
Semiconductor devices and methods of manufacturing semiconductor devices with differing threshold voltages are provided. In embodiments the threshold voltages of individual semiconductor devices are tuned through the removal and placement of differing materials within each of the individual gate stacks within a replacement gate process, whereby the removal and placement helps keep the overall process window for a fill material large enough to allow for a complete fill.
US11056392B2 FinFET devices having gate stacks with protruding parts and method of forming the same
A method for forming a FinFET device is described. The method includes the following steps. A substrate is patterned to form fins. Dummy gate stack is formed on the substrate and over the fins, wherein the dummy gate stack may be formed by the following steps: a dummy layer is formed; a first etching step is performed on the dummy layer with a bromine containing etching gas to form a dummy strip; a second etching step is performed on the dummy strip with a chlorine containing etching gas to form the dummy gate stack. The dummy gate stack is replaced with a gate stack.
US11056389B2 Method of manufacture of group III nitride semiconductor
A method for manufacturing a group III nitride semiconductor without causing adverse effects on device characteristics includes: preparing a group III nitride substrate having a first group III nitride layer and a second group III nitride layer laminated in this order from a back-surface side to a front-surface side, the first group III nitride layer being a layer having a transmittance of 60% or more for a predetermined wavelength of 400 nm to 700 nm, the second group III nitride layer being a layer provided on the first group III nitride layer and containing impurity oxygen in a concentration of 1×1020 cm−3 or more and having a transmittance of 0.1% or less for the predetermined wavelength; forming a device structure on the front-surface side of the group III nitride substrate; and forming an internal altered layer in the first group III nitride layer by multiphoton absorption using a laser beam applied from the first group III nitride layer side on the back-surface side of the group III nitride substrate with a focal point set in front of the second group III nitride layer, and dividing the group III nitride substrate at the internal altered layer serving as a boundary.
US11056386B2 Two-dimensional (2D) self-aligned contact (or via) to enable further device scaling
2D self-aligned contact structures (both gate contact and source/drain contact) are provided that can improve the process control and push further scaling. The 2D self-aligned contact structures can enable tighter process control which can lead to further device scaling. In accordance with the present application, the gate contact structure is confined in one direction by a sacrificial spacer structure that is present in a dielectric material layer, and in another direction by an edge of a metallization structure that is located above the gate contact structure.
US11056385B2 Selective formation of metallic films on metallic surfaces
Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on copper instead of insulating or dielectric materials. In some embodiments, a first precursor forms a layer on the first surface and is subsequently reacted or converted to form a metallic layer. The deposition temperature may be selected such that a selectivity of above about 50% or even about 90% is achieved.
US11056380B2 Wafer positioning pedestal for semiconductor processing
An assembly used in a process chamber for depositing a film on a wafer and including a pedestal extending from a central axis. An actuator is configured for controlling movement of the pedestal. A central shaft extends between the actuator and pedestal, the central shaft configured to move the pedestal along the central axis. A lift pad is configured to rest upon the pedestal and having a pad top surface configured to support a wafer placed thereon. A pad shaft extends between the actuator and the lift pad and controls movement of the lift pad. The pad shaft is positioned within the central shaft and is configured to separate the lift pad from the pedestal top surface by a process rotation displacement when the pedestal is in an upwards position. The pad shaft is configured to rotate relative to the pedestal top surface between first and second angular orientations.
US11056379B2 Clamp assembly
A clamp assembly is for clamping an outer peripheral portion of a substrate to a support in a plasma processing chamber. An RF bias power is applied to the support during the plasma processing of the substrate. The clamp assembly includes an outer clamp member, and an inner clamp member which is received by the outer clamp member, the inner clamp member defining an aperture which exposes the substrate to the plasma processing. The outer clamp member has an inner portion terminating in an inner edge, wherein the inner portion is spaced apart from the inner clamp member.
US11056378B2 Workpiece holding method and workpiece processing method
A workpiece holding method for a workpiece having a bowl-shaped warp includes a mounting step of mounting the workpiece on a holding unit having a holding surface, a suction hole opening to the holding surface, and a suction passage for making selective communication between the suction hole and a vacuum source for producing a suction force, the workpiece being mounted on the holding surface of the holding unit, a liquid supplying step of supplying a liquid to the workpiece held on the holding surface so that the liquid flows into a gap defined between the holding surface and the workpiece to fill the gap, and a suction step of bringing the suction hole into communication with the vacuum source to suck the liquid and the workpiece and thereby hold the workpiece through the liquid on the holding surface under suction, after performing the liquid supplying step.
US11056377B2 Collet inspection in a semiconductor pick and place apparatus
A semiconductor pick and place apparatus comprises: a pick arm having a main body, and a conduit incorporated in the main body for permitting fluid flow through the main body via the conduit, the conduit further defining a holding orifice which is operative in use to secure a semiconductor die, the conduit being configured to convey light received from one side of the pick arm through the holding orifice and an alignment window located on the main body to an opposite side of the pick arm.
US11056373B2 3D fanout stacking
Semiconductor packages and fan out die stacking processes are described. In an embodiment, a package includes a first level die and a row of conductive pillars protruding from a front side of the first level die. A second level active die is attached to the front side of the first level die, and a redistribution layer (RDL) is formed on an in electrical contact with the row of conductive pillars and a front side of the second level active die.
US11056372B2 Low temperature biasable substrate support
Embodiments described herein relate to a substrate support and techniques for controlling a temperature of the same. The substrate support includes a heating element and an over temperature switch disposed therein. The heating element heats the substrate support and a substrate disposed thereon. The over temperature switch controls a temperature of the heating element and the substrate support. The over temperature switch is operable to switch states in response to a temperature of the substrate support exceeding a predefined temperature.
US11056370B2 Method for processing workpiece
A method according to an embodiment includes: (a) a first step of etching a workpiece held by a holding structure in a state in which a first direction and a second direction are maintained to form a first angle, by a plasma generated in a processing container; and (a) a second step of, after execution of the first step, etching the workpiece held by the holding structure in a state in which the first direction and the second direction are maintained to form a second angle, by the plasma generated in the processing container.
US11056369B2 Substrate holding apparatus
A substrate holding apparatus includes a baseplate, an adhesive layer disposed on the baseplate, and an electrostatic chuck disposed on the adhesive layer to hold an object, wherein a first side surface of a first portion of the electrostatic chuck is at a same position in a plan view as a second side surface of a second portion of the baseplate, the first portion being in contact with a first face of the adhesive layer, the second portion being in contact with a second face of the adhesive layer, wherein the adhesive layer has a protruding part extending outwardly from the first side surface and the second side surface, and wherein the first face and the second face are flat planes extending from an inside of the first side surface and the second side surface to an outside of the first side surface and the second side surface.
US11056365B2 Fault detection method in semiconductor fabrication facility
A method for fault detection in a fabrication tool is provided. The method includes processing a semiconductor wafer in a fabrication tool according to a plurality of process events of a process run. The method further includes measuring humidity in the fabrication tool in at least one of the process events. The method also includes comparing the humidity measured in one of the process events with an expected humidity associated with the process event. In addition, the method includes based on the comparison, indicating an alarm condition when a difference between the measured humidity and the expected humidity exceeds a range of acceptable values associated with the process event.
US11056364B2 Method for substrate thinning
A method for thinning a substrate is provided. The method includes at least the following steps. A substrate is disposed on a carrying surface of a chuck, where a first liquid supply unit surrounds the chuck to form a frame of the chuck, and an outlet of the first liquid supply unit is disposed aside the carrying surface of the chuck. A first liquid flows from a bottom of the frame to the outlet and discharges to fill a gap between the substrate and the carrying surface of the chuck. The substrate is thinned during the gap is filled.
US11056359B2 Cleaning apparatus and substrate processing apparatus
A cleaning apparatus includes a plurality of processing units including a cleaning unit which cleans a processing object, a transport chamber provided between the plurality of processing units, a transport robot provided inside the transport chamber so as to be movable vertically, an exhaust port portion which discharges gas compressed, when the transport robot descends, from a lower portion of the transport chamber, and a liquid remaining unit which causes liquid transported to the compressed gas to remain in the lower portion of the transport chamber.
US11056358B2 Wafer cleaning apparatus and method
The present disclosure describes an apparatus for wafer cleaning. The apparatus includes an enclosure made of a noncombustible material, a wafer holder, a cleaning nozzle, at least one sensor, and an exhaust unit. The wafer holder can hold and heat a wafer. The cleaning nozzle can supply a flow of a cleaning fluid onto a surface of the wafer. The at least one sensor can detect attributes of the wafer. The exhaust unit can expel a vapor generated by the cleaning fluid in the enclosure. The exhaust unit can include a rinse nozzle to rinse the vapor passing through the exhaust unit with a mist.
US11056354B2 Semiconductor separation device
Described is a semiconductor substrate stack, including: a plurality of semiconductor substrates arranged in a stack in which the semiconductor substrates include opposing facing surfaces, wherein the facing surfaces of adjacent semiconductor substrates are separated by a gap, each semiconductor substrate having an edge surface at an exposed edge of the stack. A spacer is attached to one of the facing surfaces of each of the at least one of the semiconductor substrates and extends between adjacent semiconductor substrates to define the gap and mask a central portion of each respective semiconductor substrate.
US11056349B2 Method of fabricating semiconductor device, vacuum processing apparatus and substrate processing apparatus
There is provided a method of fabricating a semiconductor device by performing a process on a substrate, which includes: forming a masking film made of a polymer having a urea bond by supplying polymerizing raw materials to a surface of the substrate on which an etching target film formed; forming an etching pattern on the masking film; subsequently, etching the etching target film with a processing gas using the etching pattern; and subsequently, removing the masking film by heating the substrate to depolymerize the polymer.
US11056344B2 Layer forming method
There is provided a method of forming a layer, comprising depositing a seed layer on the substrate and depositing a bulk layer on the seed layer. Depositing the seed layer comprises supplying a first precursor comprising metal and halogen atoms to the substrate; and supplying a first reactant to the substrate. Depositing the bulk layer comprises supplying a second precursor comprising metal and halogen atoms to the seed layer and supplying a second reactant to the seed layer.
US11056337B2 Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium
There is provided a technique, including: (a) forming NH termination on a surface of a substrate by supplying a first reactant containing N and H to the substrate; (b) forming a first SiN layer having SiCl termination formed on its surface by supplying SiCl4 as a precursor to the substrate to react the NH termination formed on the surface of the substrate with the SiCl4; (c) forming a second SiN layer having NH termination formed on its surface by supplying a second reactant containing N and H to the substrate to react the SiCl termination formed on the surface of the first SiN layer with the second reactant; and (d) forming a SiN film on the substrate by performing a cycle a predetermined number of times under a condition where the SiCl4 is not gas-phase decomposed after performing (a), the cycle including non-simultaneously performing (b) and (c).
US11056334B2 Wafer processing method using a ring frame and a polyester sheet
A wafer processing method includes a polyester sheet providing step of positioning a wafer in an inside opening of a ring frame and providing a polyester sheet on a back side of the wafer and on a back side of the ring frame, a uniting step of heating the polyester sheet as applying a pressure to the polyester sheet to thereby unite the wafer and the ring frame through the polyester sheet by thermocompression bonding, a dividing step of applying a laser beam to the wafer to form division grooves in the wafer, thereby dividing the wafer into individual device chips, and a pickup step of blowing air to each device chip through the polyester sheet to push up each device chip, thereby picking up each device chip from the polyester sheet after performing the dividing step.
US11056328B2 Rapid inline preparation of a diluted sample
A sample introduction system providing variable online dilution of a sample is described. In one or more implementations, a device includes a spectrometry analysis system that employs example techniques in accordance with the present disclosure includes an inline dilution environment, including a first valve assembly configured to prepare a sample by accepting at least one of the sample, a diluent, a carrier, or an internal standard, where the first valve assembly includes a first sample loop; and a second valve assembly configured to prepare the sample by accepting the sample from the first valve assembly, where the second valve assembly is coupled to the first valve assembly, and where the second valve assembly includes a second sample loop.
US11056319B2 Apparatus and system having extraction assembly for wide angle ion beam
An ion beam processing apparatus may include a plasma chamber, and a plasma plate, disposed alongside the plasma chamber, where the plasma plate defines a first extraction aperture. The apparatus may include a beam blocker, disposed within the plasma chamber and facing the extraction aperture. The apparatus may further include a non-planar electrode, disposed adjacent the beam blocker and outside of the plasma chamber; and an extraction plate, disposed outside the plasma plate, and defining a second extraction aperture, aligned with the first extraction aperture.
US11056313B1 Wien filter with integrated vacuum pump
An integral Wien filter and vacuum pump for separating charged particles or for orienting their spin direction while maintaining optimal beamline vacuum. The vacuum pump is an ion pump including one or more cylindrical Penning cells to trap and expel electrons. The Wien filter includes orthogonal electric and magnetic fields to direct particles with the desired speed through the device while deflecting particles at undesired speeds. The Wien filter includes two electrodes, one biased positive and one biased negative, a dipole magnet, and means for reversing polarity of the electrodes to flip the spin of the charged particles. Metal plates on either side of the Penning cells embed gas that is ionized by trapped electrons in the Penning cell thus creating vacuum by turning gas into solid. The two metal plates can be configured to obtain vacuum pumping via chemical gettering and for removal of noble gases.
US11056311B2 Time-dependent defect inspection apparatus
An improved charged particle beam inspection apparatus, and more particularly, a particle beam inspection apparatus for detecting a thin device structure defect is disclosed. An improved charged particle beam inspection apparatus may include a charged particle beam source to direct charged particles to a location of a wafer under inspection over a time sequence. The improved charged particle beam apparatus may further include a controller configured to sample multiple images of the area of the wafer at difference times over the time sequence. The multiple images may be compared to detect a voltage contrast difference or changes to identify a thin device structure defect.
US11056308B2 System and method for depth-selectable x-ray analysis
A system for x-ray analysis includes at least one x-ray source configured to emit x-rays. The at least one x-ray source includes at least one silicon carbide sub-source on or embedded in at least one thermally conductive substrate and configured to generate the x-rays in response to electron bombardment of the at least one silicon carbide sub-source. At least some of the x-rays emitted from the at least one x-ray source includes Si x-ray emission line x-rays. The system further includes at least one x-ray optical train configured to receive the Si x-ray emission line x-rays and to irradiate a sample with at least some of the Si x-ray emission line x-rays.
US11056302B2 Coil control device of electronic magnetic contactor
A coil control device of an electronic magnetic contactor, comprises: an input power processing unit configured to convert and output an input power into a direct current power; an input voltage detecting unit configured to detect a voltage level of the direct current power outputted from the input power processing unit; a control unit configured to output a control signal for controlling current flowing in a coil using the voltage level detected by the input voltage detecting unit; and a switching unit configured to connect or cutoff the current flowing in the coil by switching according to the control signal from the control unit, wherein the control unit includes a gate driver electrically connected with the switching unit and configured to block noise from the coil.
US11056300B2 Circuit breaker comprising a ceria-based catalyst for CO conversion into CO2
A circuit breaker, comprising an enclosure comprising: —at least two arcing contacts that are movable axially relative to each other, between an open position of the circuit breaker in which the arcing contacts are separated from each other and a closed position of the circuit breaker in which the arcing contacts are in contact with each other; and —a gas inlet configured to blow an arc-control gas in order to interrupt an electric arc that is likely to form during movement of the arcing contacts from the closed position to the open position of the circuit breaker, wherein the arc-control gas comprises at least 80% of carbon dioxide; wherein the enclosure further comprises a catalytic material, which converts carbon monoxide that forms after ionization of the carbon dioxide during arcing, into carbon dioxide, said catalytic material comprising ceria and a precious metal.
US11056299B2 Vacuum circuit breaker
A vacuum circuit breaker 10 comprising a vacuum interrupter 12 coupled between upper 18 and lower 20 terminals and being operable to make or break an electrical connection between the upper and lower terminals. The circuit breaker has a body 22 formed from electrically insulating material, the vacuum interrupter being located in an internal chamber of the body. The lower terminal 20 comprises a hollow body 26 that forms part of the internal chamber and which is shaped and dimensioned to allow the vacuum interrupter 12 to pass through it. An electrical connector device 50 has a movable part 52 that is connected to the movable contact and an annular fixed part 54 that is connected to the lower terminal 20. The movable part 52 is connected to the first part 54 by flexible connectors 56, and has a socket (58) for engaging an electrical connector 60 of the vacuum interrupter 12. A pulling rod 16 is coupled to the movable contact via the electrical connector 60.
US11056296B2 Circuit breaker using multiple connectors
A circuit breaker having a movable tulip contact and a vacuum interrupter together connecting a first terminal to a second terminal of the circuit breaker. The tulip contact has a first end having contact fingers removably attached to a stationary contact of the first terminal, and a second end that is electrically connected to the second terminal. The vacuum interrupter has a first electrode assembly that is electrically connected to the first terminal, and a second electrode assembly that is electrically connected to the second terminal. The tulip contact and stationary contact provide a first conductive path from the first terminal to the second terminal when the tulip contact is connected to the stationary contact. The vacuum interrupter provides a second conductive path from the first terminal to the second terminal when the vacuum interrupter is in a closed position.
US11056292B2 Keyswitch and keyboard
The present invention disclosed a keyswitch comprising a housing, a keycap, a circuit board, an elastic body, a guiding part, and a cushioning part. The housing comprises an opening. The keycap is disposed on the housing. The circuit board is disposed under the housing. The elastic body is disposed on the circuit board and is disposed between the housing and the circuit board. One end of the guiding part is disposed on the elastic body, and the other end corresponds to the opening and is connected with the keycap. The cushioning part is disposed between the guiding part and the housing, wherein the cushioning part cushions the collision between the guiding part and the housing when the keycap moves away from the housing. When the keyswitch is restored, the guiding part does not directly hit the housing. The present invention also disclosed a keyboard using the keyswitch.
US11056289B2 Retrofit switch
A retrofit switch apparatus is attached to a traditional switch device. The traditional switch device has a traditional switch for accepting a first user manual operation to control a target. The retrofit switch apparatus includes an attaching device, a retrofit housing and a touch module. The attaching device is attached to the traditional switch device. The retrofit housing provides a containing space for covering the traditional switch. The touch module has a touch surface and a driver circuit. The touch surface receives a second user manual operation processed by the driver circuit.
US11056288B2 Nanodendrite with ruthenium oxide capacitor and method
A metallic nanodendrite electrode and methods are shown. In one example, the metallic nanodendrite is coated with ruthenium oxide and is used as an electrode in a capacitor.
US11056282B2 Method of manufacturing a capacitor including dielectric structure formed of sintered body
A capacitor includes a dielectric structure formed of a sintered dielectric, and a first electrode and a second electrode each formed of a conductor. The dielectric structure includes a wall. The first electrode and the second electrode are insulated from each other by the wall. The wall has a height which is a dimension in a first direction, and a thickness which is a dimension in a second direction orthogonal to the first direction, the height being greater than the thickness. The wall has a non-straight shape when seen in the first direction. A manufacturing method for the capacitor includes forming the dielectric structure, and forming the first electrode and the second electrode simultaneously after the formation of the dielectric structure.
US11056281B2 Electronic component
An electronic component includes a capacitor body including a plurality of dielectric layers and a plurality of first and second internal electrodes alternately disposed with the dielectric layers interposed therebetween, having first to sixth surfaces, and including one ends of the first and second internal electrodes exposed through the third and fourth surfaces, respectively; first and second external electrodes respectively including first and second head portions, and first and second band portions; a first connection terminal having conductive portions disposed on both ends thereof and connected to the first and second band portions, respectively; and a second connection terminal having conductive portions on both ends thereof and connected to the first and second band portions, respectively. The second connection terminal is spaced apart from the first connection terminal in a direction connecting the fifth and sixth surfaces.
US11056277B2 Magnetized substrate carrier apparatus with shadow mask for deposition
Methods and apparatus for a magnetized substrate carrier apparatus are described herein. In some embodiments, a substrate carrier apparatus includes: a carrier plate having a support surface to support a substrate, a mask assembly disposed above the support surface, wherein the mask assembly includes an annular frame and a shadow mask disposed within the annular frame, and wherein the shadow mask includes one or more openings arranged in a predetermined pattern and disposed through the shadow mask, and one or more magnets disposed on or embedded within at least one of the carrier plate and the shadow mask to create a magnetic field above the support surface.
US11056276B2 Inductive power transfer coil and method for making the same for use in wireless power transfer systems
An inductive power transfer coil and method for making the same for use in wireless power transfer systems. The inductive power transfer coil comprising an elongate member disposed around a looped path, wherein the elongate member is arranged in a helical form and the axis of the helical form is provided by the looped path so that the coil scaffold defines a toroidal void and each circuit of the looped path provides a coil turn. The elongate member is covered by a conductive layer to provide a coiled conductive tube.
US11056270B2 Magnetic film and coil module
A magnetic film includes a first layer having a real part of complex magnetic permeability of 50 or more and an imaginary part of complex magnetic permeability of below 30 at 10 MHz, and a second layer provided on the first layer and having a real part of complex magnetic permeability of 50 or more and an imaginary part of complex magnetic permeability of 30 or more at 10 MHz.
US11056269B2 Coil component and method for manufacturing coil component
In an embodiments, a coil component includes: an element body part 10 and a coil 30 of spiral shape constituted by multiple winding conductors 32 and through hole conductors 34 that interconnect the winding conductors 32; wherein each winding conductor 32 has, in a cross-sectional view in the width direction of the winding conductor 32, a flat side 40 that extends in a second direction substantially perpendicular to the coil axis of the coil 30; and the point of intersection 48 between a figure line 42 corresponding to the longest part in a first direction, and a figure line 44 corresponding to the longest part in the second direction, with respect to the coil axis, is positioned on the figure line 42 within one-quarter of the figure line away from one end 50 on the side 40 or from the other end 52 opposing the side 40.
US11056267B2 Receive coil configurations for implantable medical device
Systems, devices and methods allow inductive recharging of a power source located within or coupled to an implantable medical device while the device is implanted in a patient. The implantable medical device in some examples include a receive antenna configuration that may include at least one infinity shaped receive coil. One or more of the receive coils may be affixed to a ferrite sheet formed having a curved shape that conforms to a curvature on an inner surface of a portion of a housing of the implantable medical device so that the ferrite sheet and the receive coil or coils may be positioned adjacent to some portion of the curved inner surface with the ferrite sheet positioned between the inner surface and the receive coil or coils.
US11056258B2 Magnetic material and production method therefor
A production method for a magnetic material, which is expressed by a chemical structure formula Fe(Al1-xMnx)2O4, where 0
US11056256B2 Non-oriented electrical steel sheet and method of producing same
Iron loss is reduced by increasing magnetic flux density. Disclosed is a non-oriented electrical steel sheet has a chemical composition containing, by mass %, C: 0.0050% or less, Si: 1.50% or more and 4.00% or less, Al: 0.500% or less, Mn: 0.10% or more and 5.00% or less, S: 0.0200% or less, P: 0.200% or less, N: 0.0050% or less, O: 0.0200% or less, and Ca: 0.0010% or more and 0.0050% or less, with the balance being Fe and inevitable impurities, in which the non-oriented electrical steel sheet has an Ar3 transformation temperature of 700° C. or higher, a grain size of 80 μm or more and 200 μm or less, and a Vickers hardness of 140 HV or more and 230 HV or less.
US11056255B2 Composite component comprising ring-shaped bonded magnet and method of manufacturing the same
The present invention relates to a composite component including a metal component having a substantially cylindrical shape or a substantially annular shape, and a ring-shaped bonded magnet disposed on the outer periphery of the metal component, the ring-shaped bonded magnet containing a thermoplastic resin, magnetic particles, and rubber particles.
US11056254B2 Method of manufacturing magnetic material
A method of manufacturing a magnetic material, includes a surface oxides decreasing step of decreasing surface oxides of an iron powder; a powder-molded body forming step of mixing the iron powder whose surface oxides are already decreased obtained by the surface oxides decreasing step, and a compound powder “A” constituted by a La element and a Si element, and compressing and molding the obtained mixture powder; and a sintered body forming step of preparing a sintered body from the powder-molded body obtained by the powder-molded body forming step, by a solid phase reaction under vacuum atmosphere.
US11056252B2 Electrical signal transmission cable system and method of using same
Electrical signal transmission cable systems and methods of using the same are disclosed. The systems and methods use an electrical signal transmission cable system, wherein the electrical signal transmission cable system includes a parallel set of electrical signal transmission cables in electrical communication between an electrical signal transmitting device and an electrical signal receiving device.
US11056250B1 Conductive surface coating based on modified and unmodified particles and method of preparation thereof
Conductive coating compositions and methods of preparation and application thereof are provided, whereby a mixture of conductive polymer encapsulated particles and non-encapsulated particles are employed to provide a conductive surface coating with controllable viscosity and conductivity. The particles may be filler and/or pigment particles such as calcium carbonate or clay, a portion of which are coated with a conductive polymer such as polypyrrole. Encapsulated particles are prepared and filtered, mixed with non-encapsulated particles, and subsequently combined with a binder for application to a surface or substrate such as paper. A dispersant may be included to obtain a suitable viscosity of the mixture prior to application. The relative concentrations of the encapsulated and non-encapsulated particles may be selected to tailor the resulting conductivity of the coating.
US11056248B2 Heterogeneous core designs and thorium based fuels for heavy water reactors
A channel type heterogeneous reactor core for a heavy water reactor for burnup of thorium based fuel is provided. The heterogeneous reactor core comprises at least one seed fuel channel region comprising seed fuel channels for receiving seed fuel bundles of thorium based fuel; and at least one blanket fuel channel region comprising blanket fuel channels for receiving blanket fuel bundles of thorium based fuel; wherein the seed fuel bundles have a higher percentage content of fissile fuel than the blanket fuel bundles. The seed fuel channel region and the blanket fuel channel region may be set out in a checkerboard pattern or an annular pattern within the heterogeneous reactor core. Fuel bundles for the core are also provided.
US11056246B2 Heterogeneous core designs and thorium based fuels for heavy water reactors
A channel type heterogeneous reactor core for a heavy water reactor for burnup of thorium based fuel is provided. The heterogeneous reactor core comprises at least one seed fuel channel region comprising seed fuel channels for receiving seed fuel bundles of thorium based fuel; and at least one blanket fuel channel region comprising blanket fuel channels for receiving blanket fuel bundles of thorium based fuel; wherein the seed fuel bundles have a higher percentage content of fissile fuel than the blanket fuel bundles. The seed fuel channel region and the blanket fuel channel region may be set out in a checkerboard pattern or an annular pattern within the heterogeneous reactor core. Fuel bundles for the core are also provided.
US11056245B2 Systems and methods for transitions of care
A system and method to manage the transitioning the care of an individual in a healthcare setting from one point of care with a particular set of characteristics to another physical location with a different set of characteristics by providing for the retrieval of information relating to an individual by a plurality of authorized users and devices at multiple facilities. The system includes a skin wearable, waterproof, non-transferable frangible individual identification device comprising an adhesive and an ink arranged to provide a physiologically and optically perceptible, humanly understandable, and machine readable information relating to said individual wherein once applied to skin said identification device is not removable in one piece without rendering the device inoperable; a plurality of reader devices; a computer interface device receiving information from said individual identification device and from said reader devices respecting the individual identified by said individual identification device; a computer system coupled to said computer interface device, said computer system including a memory with an algorithm for processing information collected by said computer system; and a separate set of reader devices and a separate service rendering system, each output information from their respective reader devices to a common database, the contents of said common database being coupled to a computing device which communicates information to said plurality of facilities.
US11056242B1 Predictive analysis and interventions to limit disease exposure
Methods, systems, and apparatus, including computer programs encoded on computer-storage media, for predictive analysis and interventions to limit disease exposure. In some implementations, user data indicating a prospective action of a user of a mobile device is received. Content is provided to cause the mobile device associated with the user to present a prompt for user input regarding the prospective action of the user. Potential future exposure of the user to a disease is evaluated based on response data indicating a response to the prompt. A disease exposure prevention option for the user is selected or customized for the user based on at least one of the user data or the response data. Content is provided to cause the mobile device associated with the user to present the disease exposure prevention option.
US11056241B2 Radiotherapy planning apparatus and clinical model comparison method
According to one embodiment, a radiotherapy planning apparatus includes processing circuitry and a display. The processing circuitry calculates, by applying patient information to each of a plurality of analysis models relating to clinical practice, analysis results based on the analysis models. The processing circuitry compares each of the analysis results with an actual clinical result relating to a comparison target patient, and generates evaluation information to evaluate a change between the analysis models. The display displays the evaluation information.
US11056239B2 Risk-based monitoring of clinical data
A computing device generates an audit trail for monitoring clinical data. In particular, the computing device receives clinical data comprising patient data and investigator site data. The computing device accepts and rejects respective portions of the clinical data by applying a risk-based monitoring policy comprising one or more policy rules to the clinical data. The computing device generates an audit trail for the clinical data. The audit trail comprises the clinical data and corresponding audit data. The audit data comprises identification of the accepted and rejected portions of the clinical data, identification of one or more of the policy rules of the risk-based monitoring policy used in the accepting and rejecting of the respective portions of the clinical data, and one or more timestamps corresponding to each of the accepting and rejecting of the respective portions.
US11056234B2 Method of managing external devices, method of operating external device, host device, management server, and external device
Provided is a method of a host device managing at least one external device connected to the host device through a management server. The method includes: obtaining measurement information measured by the at least one external device; requesting authorization by the management server; transmitting the obtained measurement information to the management server when the authentication succeeds; receiving management information for managing the at least one external device, where the management information is generated based on the measurement information by the management server; and managing the at least one external device based on the received management information.
US11056233B2 Controller-based apparatus and method for diagnosis and treatment of acquired brain injury and dysfunction
A controller-based apparatus for diagnosis and treatment of a subject with acquired brain injury and dysfunction. Various embodiments of the invention described herein recognize that different body postures affect the autonomic nervous system differently, and therefore various external stimuli may have different therapeutic efficacies when a patient or subject is in each body posture. Postures, such as walking, sitting, standing, prone and supine, have different effects on the autonomic nervous system, and therefore some stimuli have different physiological efficacies while a patient or subject is in a given body posture. Disclosed embodiments of the present invention leverage this relationship to provide a controller-based apparatus that determines a combination of posture and stimulus that has optimal therapeutic effect, while minimizing health practitioner involvement. The controller based apparatus provides a treatment that stimulates the nervous system through a combination of noninvasive therapies that stimulate brain cells to increase their efficiency—this promotes the formation of pathways that help transfer information throughout the brain in such a way that in the end, the affected area of the brain and overall brain function are improved without medication or surgery.
US11056230B2 Aggregator system for enabling online access to encounter data from multiple disparate sources
Disclosed are systems, methods, and non-transitory computer-readable enabling online access to encounter data across multiple disparate sources. The method includes providing a synchronizer application configured to access data of a practice group server, receiving, by an aggregator server, a start time and a duration of a healthcare appointment, and determining a completion time of the healthcare appointment. Based on the completion time, the aggregator server transmits a request for encounter data for the healthcare appointment to the synchronizer application and then receives and stores the encounter data in an aggregator database. The aggregator server generates an electronic alert addressed to a computing device accessible by the patient and transmits the alert to the computing device. The aggregator server receives an electronic response to the alert and provides an interactive user interface to the computing device configured to display the encounter data on the computing device.
US11056229B2 Systems, methods, and media for laboratory benefit services
Systems, methods, and media for laboratory benefit services are disclosed. Embodiments of the present invention provide systems, methods, and media that enhance the quality of health care related services to a patient, thereby enhancing patient care.In an embodiment, the present invention provides systems, methods and media that present a health care provider with information to support a decision, for example, a decision relating to a test, or tests, for a patient. In addition, or in additional embodiment, the present invention provides systems, methods and media that present information relating to a patient's health plan to advantageously facilitate a health care provider's knowledge and use of a patient's health plan information. Further, or in an additional, or further, embodiment, the present invention provides systems, methods and media that present information relating to a laboratory to advantageously facilitate a health care provider's knowledge and use of laboratory information, including laboratory expertise.
US11056225B2 Analytics for livestreaming based on image analysis within a shared digital environment
Analytics are used for live streaming based on image analysis within a shared digital environment. A group of images is obtained from a group of participants involved in an interactive digital environment. The interactive digital environment can be a shared digital environment. The interactive digital environment can be a gaming environment. Emotional content within the group of images is analyzed for a set of participants within the group of participants. Results of the analyzing of the emotional content within the group of images are provided to a second set of participants within the group of participants. The analyzing emotional content includes identifying an image of an individual, identifying a face of the individual, determining facial regions, and performing content evaluation based on applying image classifiers.
US11056217B2 Systems and methods for facilitating health research using a personal wearable device with research mode
Methods and systems for facilitating health research by utilizing one or more wearable sensor devices with a research mode are provided herein. Systems include a wearable sensor device that can pair with a first portable computing device of a user and a second computing device of a researcher in a first and second pairing, respectively. The wearable sensor device obtains one or more health parameters of a user. In one aspect, the wearable sensor device communicates research related and non-research related health information to the first computing device via the first pairing link and communicates only research related health information to the second computing device via the second pairing link. Methods for pairing one or more wearable sensor devices with one or more research computing devices and switching between operating modes to provide additional research related features are also provided.
US11056213B2 Identifying signature snippets for nucleic acid sequence types
A method of identifying regions of malicious organic sequences includes identifying a plurality of benign snippets derived from a first sequence obtained from at least one benign organism; extracting a plurality of candidate signature snippets from a second sequence obtained from a malicious organism; determining, for each of the plurality of candidate signature snippets, whether the candidate signature snippet matches at least one of the plurality of benign snippets; and responsive to the candidate signature snippet not matching the at least one of the plurality of benign snippets, identifying the candidate signature snippet as a malicious signature snippet.
US11056212B1 Methods and systems for an integrated disassembler with a function-queue manager and a disassembly interrupter for rapid, efficient, and scalable code gene extraction and analysis
The present invention discloses methods and systems for an integrated disassembler with a function-queue manager and a disassembly interrupter for rapid, efficient, and scalable code gene extraction and analysis. Methods include the steps of: upon receiving a target binary file, disassembling the target binary file into assembly code; extracting code fragments from the assembly code; as each code fragment is extracted, verifying each code fragment; upon availability, placing each verified code fragment in an extractor queue; and upon availability, submitting each code fragment in the extractor queue to a gene-analysis system having a code genome database. Alternatively, upon determining the extractor queue is empty or determining resources of the gene-analysis system are underutilized, transferring partially-verified code fragments to the extractor queue. Alternatively, upon receiving gene information regarding the target binary file from the gene-analysis system during disassembly, determining whether to terminate the step of disassembling based on the gene information.
US11056211B1 Apparatus and method for handling temperature dependent failures in a memory device
Devices, methods, and systems for managing temperature dependent failures in a memory device. An erase failure of a memory block is detected, and marked as a grown bad block if the memory device temperature is below a threshold temperature. If the temperature exceeds the threshold temperature, it is determined whether memory cells of the block exceed a first threshold voltage. If the memory cells of the block exceed the first threshold voltage, the block is marked as a potential grown bad block. If the memory cells of the block are below the first threshold voltage, it is determined whether a number of the memory cells of the block exceed a second threshold voltage. If the memory cells of the block are below the second threshold, the block is programmed. If the memory cells of the block exceed the second threshold, the block is marked for error correction and programmed.
US11056207B2 Efuse circuit and operation method thereof
An efuse circuit adapted for a memory device is provided. The efuse circuit includes a plurality of efuse sets and a control circuit. Each of the plurality of efuse sets includes a plurality of efuses. When a power is turned on, the control circuit detects each of the plurality of efuse sets to generate a detection signal. The control circuit determines whether the efuses of each of the efuse sets are burned according to the detection signal to determine whether to perform a burn operation on the plurality of efuses. When the control circuit determines that at least one of the plurality of efuses is a burned efuse according to the detection signal, the control circuit latches a write data of at least one burned efuse and disables an overwrite operation on the efuse set to which the at least one burned efuse belongs.
US11056204B2 Memory device and method of operating the same
The present disclosure relates to a memory device includes a memory cell array, a peripheral circuit and a program operation controller. The memory cell array including a plurality of memory cells each having a target programmed state among a plurality of programmed states. The peripheral circuit performs at least one program loop including applying a program voltage to a word line coupled in common to the plurality of memory cells, and selectively performing a verify operation of determining whether a threshold voltage of each of the plurality of memory cells exceeds a verify voltage. The program operation controller controls the peripheral circuit to perform the at least one program loop corresponding to at least one of remaining programmed states other than a most significant programmed state among the plurality of programmed states, and apply a program pulse corresponding to the most significant programmed state to the word line.
US11056202B2 Semiconductor memory device capable of shortening erase time
In a memory cell array, a plurality of memory cells connected to a plurality of word lines and a plurality of bit lines are arranged in a matrix. A control circuit controls the potentials of said plurality of word lines and said plurality of bit lines. In an erase operation, the control circuit erases an n number of memory cells (n is a natural number equal to or larger than 2) of said plurality of memory cells at the same time using a first erase voltage, carries out a verify operation using a first verify level, finds the number of cells k(k≤n) exceeding the first verify level, determines a second erase voltage according to the number k, and carries out an erase operation again using the second erase voltage.
US11056201B2 Apparatus for determining data states of memory cells
Memory might include a plurality of strings of memory cells, a plurality of access lines each connected to the strings of memory cells, and a controller configured to cause the memory to increase a voltage level applied to each of the access lines, determine a particular voltage level at which each memory cell of a first set of strings of memory cells is deemed to be activated while increasing the voltage level applied to the access lines, decrease the voltage level applied to a particular access line without decreasing the voltage level applied to each remaining access line, and, for each memory cell connected to the particular access line and contained in a second set of strings of memory cells, determine whether that memory cell is deemed to be activated while applying the particular voltage level to the particular access line.
US11056194B2 Method of erasing data in nonvolatile memory device, nonvolatile memory device performing the same and memory system including the same
A nonvolatile memory device includes a memory cell region, a peripheral circuit region, a memory block in the memory cell region, a row decoder in the peripheral circuit region, and a control circuit in the peripheral circuit region. The memory cell region includes a first metal pad. The peripheral circuit region includes a second metal pad and is vertically connected to the memory cell region by the first metal pad and the second metal pad. The memory block includes memory cells stacked in a direction intersecting a substrate, and is divided into a plurality of sub-blocks configured to be erased independently. The row decoder selects the memory block by units of a sub-block. The control circuit receives a data erase command for a selected sub-block among the plurality of sub-blocks, performs a data read operation on at least one victim sub-block among the plurality of sub-blocks in response to the data erase command, selectively performs a soft program operation on the at least one victim sub-block based on a result of the data read operation, and performs a data erase operation on the selected sub-block after the data read operation is performed and the soft program operation is selectively performed.
US11056193B2 Non-volatile memory devices having enhanced erase control circuits therein
A memory device includes an array of vertical NAND strings of nonvolatile memory cells, on an underlying substrate. An erase control circuit is provided, which is configured to drive a plurality of bit lines electrically coupled to the array of vertical NAND strings of nonvolatile memory cells with respective erase voltages having unequal magnitudes during an operation to erase the nonvolatile memory cells in the array of vertical NAND strings. This erase control circuit may also be configured to drive a first of the plurality of bit lines with a first erase voltage for a first duration and drive a second of the plurality of bit lines with a second erase voltage for a second duration unequal to the first duration during the operation to erase the nonvolatile memory cells in the array of vertical NAND strings.
US11056192B2 Monotonic counters in memories
An apparatus, such as a memory (e.g., a NAND memory), can have a controller, a volatile counter coupled to the controller, and a non-volatile memory array coupled to the controller. The controller can be configured to write information, other than a count of the counter, in the array each time the count of the counter has been incremented by a particular number of increments. Counts can be monotonic, non-volatile, and power-loss tolerant.
US11056190B2 Methods and apparatus for NAND flash memory
Methods and apparatus for NAND flash memory are disclosed. In an embodiment, a method is provided for programming a NAND flash memory includes setting programming conditions on word lines to set up programming of multiple memory cells associated with multiple bit lines, and sequentially enabling bit line select gates to load data from a page buffer to the multiple bit lines of the memory. After each bit line is loaded with selected data, an associated bit line select gate is disabled so that the selected data is maintained on the bit line using bit line capacitance. The method also includes waiting for a programming interval to complete after all the bit lines are loaded with data to program the multiple memory cells associated with the multiple bit lines. At least a portion of the multiple memory cells are programmed simultaneously.
US11056187B2 Memory device with read-write-read memory controller
A memory device includes a memory cell array including a plurality of memory cells, each of the plurality of memory cells having a switch element, and a data storage element connected to the switch element and containing a phase-change material; and a memory controller for obtaining first read voltages from the plurality of memory cells, inputting a first write current to the plurality of memory cells, and then, obtaining second read voltages from the plurality of memory cells, wherein the memory controller compares the first read voltage of a first memory cell of the plurality of memory cells to the second read voltage of the first memory cell to determine a state of the first memory cell.
US11056186B2 Apparatuses and methods for sensing a phase change test cell and determining changes to the test cell resistance due to thermal exposure
A phase change memory array may include at least one cell used to determine whether the array has been altered by thermal exposure over time. The cell may be the same or different from the other cells. In some embodiments, the cell is only read in response to an event. If, in response to that reading, it is determined that the cell has changed state or resistance, it may deduce whether the change is a result of thermal exposure. Corrective measures may then be taken.
US11056179B2 Techniques to couple high bandwidth memory device on silicon substrate and package substrate
Techniques to couple a high bandwidth memory device on a silicon substrate and a package substrate are disclosed. Examples include selectively activating input/out (I/O) or command and address (CA) contacts on a bottom side of a logic layer for the high bandwidth device based on a mode of operation. The I/O and CA contacts are for accessing one or more memory devices include in the high bandwidth memory device via one or more data channels.
US11056176B2 Memory device and operating method thereof
A memory device having improved read reliability includes: first blocks coupled to a first global line group and second blocks coupled to a second global line group; a voltage generator configured to generate an operating voltage for an operation performed on the first blocks and the second blocks; a block decoder configured to generate a block select signal for selecting a memory block on which a main operation is to be performed from among the first blocks as a selected block; and a block voltage controller configured to control the block decoder and the voltage generator to: perform a channel initializing operation of discharging channel regions of the selected block and a shared block which is selected from among the second blocks according to the block select signal; and perform a word line floating operation on the selected block and the shared block after the channel initializing operation.
US11056172B1 Flash memory and operation method thereof for controlling raising speed of the read pass voltage
A flash memory and an operation method thereof are provided. The flash memory includes a plurality of memory cell strings and a pass voltage generator. Each of the memory cell strings includes a plurality of memory cells. The pass voltage generator is configured to provide a pass voltage to a plurality of word lines of a plurality of unselected memory cells of a selected memory string. During a reading operation, the pass voltage generator raises the pass voltage from a first voltage at a first time point, and raises the pass voltage to a second voltage at a second time point. The second voltage is lower than a target voltage times a preset ratio The first time point is earlier than a start time point of a bit line voltage received by the selected memory cell, and the second time point occurs at the start time point of the bit line voltage.
US11056168B2 Temperature compensated memory refresh
Examples of the present disclosure relate to a device, method, and medium storing instructions for execution by a processor for refreshing memory blocks of solid state memory through a temperature compensated refresh rate. Techniques discussed herein include a solid state memory to store data and a temperature sensor to identify a temperature of the solid state memory. The memory device with solid state memory also includes a memory controller that periodically refreshes memory blocks of the solid state memory at an adjustable refresh rate, wherein memory controller is to adjust the adjustable refresh rate based on the temperature of the solid state memory.
US11056165B2 Cell-specific reference generation and sensing
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A portion of charge of a memory cell may be captured and, for example, stored using a capacitor or intrinsic capacitance of the memory array that includes the memory cell. The memory cell may be recharged (e.g., re-written). The memory cell may then be read, and a voltage of the memory cell may be compared to a voltage resulting from the captured charge. A logic state of the memory cell may be determined based at least in part on the voltage comparison.
US11056164B2 Circuits to control output signal variability
Briefly, embodiments of claimed subject matter relate to circuits and methods for providing signals, such as signals to bring about writing of binary logic values to magnetic random-access memory (MRAM) cells. In particular embodiments, such circuits may operate to control output signal variability over an operating temperature range.
US11056163B2 Amplifier circuit devices and methods
In a particular implementation, an apparatus including first and second bias circuits and an inner amplifier provides sense amplifier offset cancellation. The inner amplifier includes: first and second current generators configured to replicate respective first and second currents from the first and second bias circuits, first and second transistors configured to transform the first and second currents into voltage samples, and first and second capacitors configured to store the voltage samples. In a sampling phase, a sampling of the first and second currents may be performed in the inner amplifier, and further, in an amplification phase, an amplification of the stored voltage samples may also be performed in the inner amplifier.
US11056161B2 Data processing system and method for generating a digital code with a physically unclonable function
A data processing system and method for generating a digital code for use as a physically unclonable function (PUF) response is provided. The method includes activating a plurality of word lines for a read operation. A first bit line is coupled to a first input of a comparator during the read operation. A second bit line is coupled to a second input of the comparator during the read operation. A current is generated on each of the first and second bit lines. The currents on the first and second bit lines are converted to voltages. The voltage on the first bit line is compared to the voltage on the second bit line. A logic bit is output from the comparator as part of the digital code, a logic state of the logic bit is determined in response to the comparison. By selecting multiple word lines to determine a PUF response, noise immunity is improved.
US11056160B2 Non-volatile memory with selectable hard write
As disclosed herein, a non-volatile memory circuit includes an array of memory cells. The non-volatile memory circuit also includes circuitry for performing a hard write to selective bits of addressed cells simultaneously with a normal write to the other bits of the addressed cells during a write operation to the addressed cells.
US11056158B2 Memory device and divided clock correction method thereof
A memory device includes an internal clock generator, a deserializer, a data comparator, and a clock controller. The internal clock generator generates a plurality of internal clock signals, which have different phases from each other, by dividing a clock signal received from a host. The deserializer deserializes serial test data received from a host as pieces of internal data using the internal clock signals. The data comparator compares reference data with the internal data. The clock controller corrects a clock dividing start time point of the clock signal of the internal clock generator based on the result of the comparison of the reference data and the internal data.
US11056150B2 Multi-time search analytics
Multi-time search analytics for smart video indexing based on active search and video database, which is configured to be operated without any need for a second broadcast with a camera, a second large data index, additional servers, a third additional software for indexing and analytics, a third additional face recognition system, a license recognition system, an object recognition system, or an additional net bandwidth for a new hardware. The method of operating multi-time search analytics for the additional net bandwidth for new hardware includes following steps: recognizing objects, activating software components and/or incoming alarms, collecting the alarms in an alarm database pool, extracting a first video with a same length in the alarm database pool, performing a motion recognition with H264/H265, recording detected motions by a video content recorder, transferring the detected motions to a timeline adjuster and changing the detected motions in accordance with an Alpha Time Zone.
US11056149B2 Medical image storage and reproduction apparatus, method, and program
The medical image storage and reproduction apparatus includes: a storage unit that stores a motion picture obtained by imaging an imaging target; a virtual image generation unit that generates a virtual image based on a three-dimensional medical image captured in advance; a chapter information assignment unit that detects an anatomical feature or a functional feature from the virtual image corresponding to an updated frame according to updating of each frame of the motion picture and assigns chapter information to the motion picture based on the detection point in time; and a display control unit that displays a selection screen for receiving the selection of chapter information. The display control unit reproduces the motion picture based on the selected chapter information.
US11056143B2 Magnetic recording medium
A magnetic recording medium is provided and includes a magnetic layer, a non-magnetic layer, a base layer and a back layer, wherein an average thickness tT of the magnetic recording medium is tT≤5.3 μm, a dimensional change amount Δw in a width direction with respect to a change in tension in a longitudinal direction is 700 ppm/N≤Δw, a thickness of the non-magnetic layer is 2.0 μm or less, a squareness ratio measured in a vertical direction of the magnetic recording medium is 65% or more, and the magnetic layer includes a magnetic powder.
US11056142B2 Magnetic recording medium
The magnetic recording medium includes a non-magnetic substrate, a non-magnetic layer, and a magnetic layer, wherein the magnetic layer contains a hexagonal strontium ferrite magnetic powder, Mr and t satisfy 0.0020 μT·m≤Mr·t≤0.0150 μT·m, where Mr is the residual magnetic flux density of the magnetic layer, and t is the average thickness of the magnetic layer, L1 satisfies 2 nm≤L1≤6 nm, where L1 is the average thickness of a first mixed layer that is formed on the surface of the magnetic layer opposite to the non-magnetic layer, L2 satisfies 0.1≤L2/t≤0.45, where L2 is the average thickness of a second mixed layer that is formed on the surface of the magnetic layer facing the non-magnetic layer.
US11056141B2 Magnetic tape, magnetic tape cartridge, and magnetic tape apparatus
The magnetic tape includes a non-magnetic support and a magnetic layer including ferromagnetic powder and a binding agent, in which the magnetic layer has a timing-based servo pattern, an edge shape of the timing-based servo pattern, specified by magnetic force microscopy is a shape in which a difference (L99.9−L0.1) between a value L99.9 of a cumulative distribution function of 99.9% and a value L0.1 of a cumulative distribution function of 0.1% in a position deviation width from an ideal shape of the magnetic tape in a longitudinal direction is 180 nm or less, and an isoelectric point of a surface zeta potential of the magnetic layer is 3.8 or less.
US11056139B2 Semi-flexible structure for micro-positioning a write/read head
A first semi-flexible structure and a second semi-flexible structure may be generated. The first semi-flexible structure may be bonded to a first end of a write/read tape head. The second semi-flexible structure may be bonded to a second end of the write/read tape head. A voice coil motor may be activated.
US11056138B2 Disk drive suspension tri-stage actuator with single side actuator attach
A tri-stage actuated disk drive suspension is described. The tri-stage actuated disk drive suspension including a beam and a gimbal attached to the beam. The gimbal is configured to receive a first actuator to mount on a first surface of the suspension near a first lateral side of the suspension and is configured to receive a second actuator to mount on the first surface of the gimbal near a second lateral side of the suspension. The gimbal is configured to receive a head slider to mount on the first surface of the suspension. And, the tri-stage actuated disk drive suspension including a baseplate having the beam attached thereto. The baseplate configured to receive a third actuator from the first surface of the suspension to mount on a pair of shelves.
US11056129B2 Adaptive parametrically formulated noise systems, devices, and methods
In one embodiment, an audio system can generate a parametrically formulated noise signal which can be adaptively reconfigured according to an input signal. According to an embodiment, an audio system can adaptively adjust a parametrically formulated noise signal according to environmental noise detected by the audio system. According to an embodiment, an audio system can present an adaptive level of activation energy in the presence of environmental noise such that a substantially constant and sufficient level of activation energy can be presented to an individual's auditory system such that additional sound energy corresponding to speech can become audible and intelligible to the individual.
US11056128B2 Apparatus and method for processing an audio signal using noise suppression filter values
An apparatus for processing an audio signal includes an audio signal analyzer and a filter. The audio signal analyzer is configured to analyze an audio signal to determine a plurality of noise suppression filter values for a plurality of bands of the audio signal, wherein the analyzer is configured to determine a noise suppression filter value so that a noise suppression filter value is greater than or equal to a minimum noise suppression filter value and so that the minimum noise suppression value depends on a characteristic of the audio signal. The filter is configured for filtering the audio signal, wherein the filter is adjusted based on the noise suppression filter values.
US11056126B2 Device and method for transmitting and receiving voice data in wireless communication system
Provided are a device and a method for transmitting and receiving voice data in a wireless communication system. A method for operating a transmission terminal for transmitting a voice signal comprises the steps of: generating sampling and bitrate request information including sampling information for determining a sampling rate of the voice signal and bitrate information for determining a bitrate of the voice signal, and transmitting the generated sampling and bitrate request information to a reception terminal; receiving, from the reception terminal, combined determination information obtained by at least one combination of the sampling rate determined on the basis of the sampling information and the bitrate determined on the basis of the bitrate information; and compressing the voice signal according to the received combined determination information, and transmitting the compressed voice signal to the reception terminal.
US11056124B2 Temporal noise shaping
In methods and apparatus for performing temporal noise shaping, an apparatus may have a temporal noise shaping, TNS, tool for performing linear prediction, LP, filtering on an information signal including a plurality of frames; and a controller configured to control the TNS tool so that the TNS tool performs LP filtering with: a first filter whose impulse response has a higher energy; and a second filter whose impulse response has a lower energy than the first filter, wherein the second filter is not an identity filter, wherein the controller is configured to choose between filtering with the first filter, and filtering with the second filter on the basis of a frame metrics.
US11056122B2 Encoder and encoding method for multi-channel signal, and decoder and decoding method for multi-channel signal
An encoder and an encoding method for a multi-channel signal, and a decoder and a decoding method for a multi-channel signal are disclosed. A multi-channel signal may be efficiently processed by consecutive downmixing or upmixing.
US11056119B2 Methods and systems for speech signal processing
Methods and systems for speech signal processing an interactive speech are described. Digitized audio data comprising a user query from a user is received over a network in association with a user identifier. A protocol associated with the user identifier is accessed. A personalized interaction model associated with the user identifier is accessed. A response is generated using the personalized interaction model and the protocol. The response is audibly reproduced by a voice assistance device.
US11056105B2 Talk back from actions in applications
Embodiments of the present invention provide systems, methods, and computer storage media directed to providing talk back automation for applications installed on a mobile device. To do so actions (e.g., talk back features) can be created, via the digital assistant, by recording a series of events that are typically provided by a user of the mobile device when manually invoking the desired action. At a desired state, the user may select an object that represents the output of the application. The recording embodies the action and can be associated with a series of verbal commands that the user would typically announce to the digital assistant when an invocation of the action is desired. In response, the object is verbally communicated to the user via the digital assistant, a different digital assistant, or even another device. Alternatively, the object may be communicated to the same application or another application as input.
US11056102B2 Input generation for classifier
A computer-implemented method includes generating a single text data structure for a classifier of a speech recognition system, and sending the single text data structure to the classifier. Generating the single text data structure includes obtaining n-best hypotheses as an output of an automatic speech recognition (ASR) task for an utterance received by the speech recognition system, and combining the n-best hypotheses in a predetermined order with a separator between each pair of hypotheses to generate the single text data structure. The classifier is trained based on a single training text data structure by obtaining training source data, including selecting a first text sample and at least one similar text sample belong to a same class as the first text sample based on a maximum number of hypotheses, and arranging the plurality of text samples based on a degree of similarity.
US11056096B2 Artificial intelligence (AI)-based voice sampling apparatus and method for providing speech style in heterogeneous label
Disclosed is an artificial intelligence (AI)-based voice sampling apparatus for providing a speech style in a heterogeneous label, including a rhyme encoder configured to receive a user's voice, extract a voice sample, and analyze a vocal feature included in the voice sample, a text encoder configured to receive text for reflecting the vocal feature, a processor configured to classify the voice sample input to the rhythm encoder into a label according to the vocal feature, provide a weight by measuring a distance between a voice sample corresponding to the label and a voice sample corresponding to a heterogeneous label as a label other than the label and provide a weight by measuring similarity between the label and the heterogeneous label, extract an embedding vector representing the vocal feature, generate a speech style from the embedding vector, and apply the generated speech style to the text, and a rhyme decoder configured to output synthesized voice data in which the speech style is applied to the text by the processor.
US11056094B2 Method and apparatus for processing audio signal
A method and audio apparatus for processing an audio signal are provided. The audio apparatus includes at least one microphone to acquire ambient sound of the audio apparatus, a speaker to output the audio signal, an air pressure regulator including a fluid tube connecting an external space of a housing of the audio apparatus to an internal space of the housing, and configured to adjust a change in an air pressure of the internal space of the housing and an audio signal processor configured to generate an anti-noise signal for canceling noise in the ambient sound by using the acquired ambient sound and output the generated anti-noise signal and the audio signal through the speaker.
US11056088B2 System and method for grouping audio events in an electronic percussion device
An electronic percussion device has a plurality of triggerable actuators, in the form of any of pads, external trigger inputs or foot switches, that may be organized into synchronized groups, and has an operational mode in which triggering of any actuator within the synchronized group initiates playback of audio events or execution of control functions associated with other of the actuators within the synchronized group in one of multiple different synchronization orders, e.g. one at a time, all simultaneously, random or in a predefined or user-defined consecutive order.
US11056075B2 Adjusting display settings of a head-mounted display
Apparatuses, methods, systems, and program products are disclosed for adjusting display settings of a head-mounted display. An apparatus includes a processor and a memory that stores code executable by the processor. The code is executable by the processor to receive sensor data from one or more sensors operably connected to a head mounted display (“HMD”) unit while a user wears the HMD unit. The code is executable by the processor to determine a visual acuity of the user based on the sensor data. The code is executable by the processor to adjust one or more display settings of the HMD unit based on the determined visual acuity for the user. The one or more display settings may be adjusted to correct for impairments in the user's visual acuity.
US11056070B2 Encoding method and device, decoding method and device, and display device
This application relates to an encoding method and device, a decoding method and device, and a signal transmission system. The encoding method includes: encoding 8-bit data corresponding to a to-be-encoded byte of to-be-transmitted data into 9-bit data, the to-be-transmitted data comprising at least one to-be-encoded byte; detecting the first digit of data of the 9-bit data and a previous digit of data adjacent to the first digit of data, when the to-be-encoded byte is not the first byte of the to-be-transmitted data; inverting the 9-bit data and then adding a tenth digit of data for indicating that the inverted 9-bit data has undergone an inversion operation behind the inverted 9-bit data to obtain 10-bit data, when the numerical value of the first digit of data is the same as that of the previous digit of data; and adding a tenth digit of data for indicating that the 9-bit data has not undergone an inversion operation behind the 9-bit data to obtain 10-bit data, when the numerical value of the first digit of data is different from that of the previous digit of data.
US11056067B2 Display apparatus and display system
A display apparatus includes a display panel including a plurality of pixels, and a driver which receives input image data, divides a border portion of the display panel into edge regions and corner regions, generates final image data by compensating the input image data such that luminances of the edge regions are increased by a first multiplicative factor and luminances of the corner regions are increased by a second multiplicative factor greater than the first multiplicative factor, and drives the display panel based on the final image data.
US11056065B2 Light-emitting display for compensating degradation of organic light-emitting diode and method of driving the same
The present disclosure provides a light-emitting display including a display panel, a first circuit, a second circuit, and a compensation circuit. The display panel includes a pixel having an organic light-emitting diode. The first circuit supplies a data voltage to the pixel. The second circuit performs a first sensing operation for sensing a voltage stored at an anode of the organic light-emitting diode and a second sensing operation for sensing a parasitic capacitance of the organic light-emitting diode. The compensation circuit compensates for degradation of the organic light-emitting diode based on a sensed value outputted from the second circuit.
US11056062B2 Data line compensation for organic light emitting display device and driving method thereof
Provided are an organic light emitting display device and a driving method thereof. The display device includes data lines, first detection lines, first compensation detection circuits, a display driving chip, a compensation chip and a control chip. Each data line is electrically connected to a corresponding first detection line through at least one first compensation detection circuit. The display driving chip sends a reference data signal to the data lines in a detection stage. The compensation chip acquires signals collected by the first detection lines and sends the signals to the control chip in the detection stage. The control chip determines a data signal compensation parameter according to the received signals, and controls the display driving chip to provide a display data signal to the data lines in a display stage according to the data signal compensation parameter.
US11056059B2 Display panel, method of driving the same, and display apparatus
The present application provides a display panel, a method of driving the same and a display apparatus. The display panel has pixel regions, each of which has pixel structures. Each of the pixel structures includes an anode, a cathode and a light emitting layer. The display panel further includes a controller and power signal lines coupled to the controller. Cathodes or anodes in a same pixel region are coupled to a same power signal line. The controller is configured to control a duty cycle of a control signal input to a power signal line coupled to a pixel region in response to a motion picture being displayed in the pixel region.
US11056057B2 Array substrate, display apparatus, and method of driving array substrate
An array substrate is provided. The array substrate includes a plurality of pixel groups, a respective one of the plurality of pixel groups including two adjacent pixels in a same row of pixels, a respective one of the two adjacent pixels including three subpixels; a plurality of scanning line groups configured to respectively control a plurality of rows of pixels, a respective one group of the plurality of scanning line groups including four scanning lines; and a plurality of data line groups respectively connected to a plurality of columns of pixel groups of the plurality of pixel groups, a respective one group of the plurality of data line groups including three data lines. The two adjacent pixels includes a first pixel and a second pixel. Each of the first pixel and the second pixel includes a first subpixel, a second subpixel, and a third subpixel.
US11056051B2 Touch sensor assembly and refrigerator door with touch sensor assembly and method for manufacturing the same
Provided are a touch sensor assembly that is maintained in a state in which the touch sensor is closely attached to an exterior member to accurately detect displacement when touch manipulation is performed to improve a recognition rate, a refrigerator door including a touch sensor assembly that is capable of preventing a sensor control part from being damaged by static electricity and having an improved front outer appearance, and a method for manufacturing the refrigerator door.
US11056047B2 Display panel and driving method of the display panel
A display panel includes a plurality of pixels arranged in a matrix, the plurality of pixels respectively including a plurality of sub pixels. The plurality of sub pixels respectively includes a light emitting element, and a PWM pixel circuit configured to control a light emitting duration of the light emitting element, based on a pulse width modulation (PWM) data voltage and a sweep voltage. A plurality of PWM pixel circuits included in the display panel are driven, for each of row lines of the plurality of pixels, in an order of a data setting period for setting the PWM data voltage and then a light emitting period in which the light emitting element emits light during a duration corresponding to the set PWM data voltage according to a change of the sweep voltage.
US11056044B2 Method of compensating pixel data and related timing controller
A method of compensating pixel data for a display panel includes the steps of: receiving a first pixel data and a second pixel data respectively corresponding to two adjacent data lines of the display panel; generating a compensation pixel data by searching a lookup table based on the first pixel data and the second pixel data; and transmitting the compensation pixel data to one of the two adjacent data lines to be displayed on the display panel.
US11056041B2 Display panel redundancy schemes
Display panel redundancy schemes and methods of operation are described. In an embodiment, and display panel includes an array of drivers (e.g. microdrivers), each of which including multiple portions to independently receive control and pixel bits. In an embodiment, each driver portion is to control a group of redundant emission elements.
US11056040B1 Systems and methods for mask-based temporal dithering
In one embodiment, a computing system may determine that a target grayscale value for a frame falls within a predetermined grayscale range. The system may compute, based on the target grayscale value, barycentric weights for a predetermined barycentric coordinate system associated with vertices that each represents a subframe combination of zero or more subframe identifiers. The system select, using the barycentric weights and threshold values associated with respective dots in a dithering mask, a set of non-overlapping dot patterns from the dithering mask corresponding to the vertices of the barycentric coordinate system. The dots in the dithering mask may satisfy a spatial stacking constraint. The system may generate subframes to represent the frame based on the set of non-overlapping dot patterns and the subframe combination represented by each of the vertices.
US11056038B2 Gray-scale compensation device and method for combined pixels, and display device
A gray-scale compensation device and method for combined pixels, and a display device. The compensation method for the combined pixels includes: measuring a gamma curve of the first pixel group to obtain a first gamma curve; measuring a gamma curve of the second pixel group to obtain a second gamma curve, where an area of the first pixel group is different from an area of the second pixel group; obtaining a compensation voltage based on the first gamma curve and the second gamma curve; and compensating the first pixel group or the second pixel group based on the compensation voltage.
US11056030B1 Display apparatus and method of enhancing apparent resolution using liquid-crystal device
A display apparatus including an image renderer per eye; a liquid-crystal device including a liquid-crystal structure and a control circuit, the liquid-crystal structure being arranged in front of image-rendering surface of image renderer, wherein liquid-crystal structure is to be electrically controlled, via control circuit, to shift light emanating from a given pixel of the image renderer to a plurality of positions in a sequential and repeated manner; and at least one processor configured to render a sequence of output image frames via the image renderer, wherein a shift in the light emanating from the given pixel of the image renderer to the plurality of positions causes a resolution of the output image frames to appear higher than a display resolution of the image renderer.
US11056026B2 Screen flickering processing method and device, storage medium and electronic device
A screen flickering processing method may include that: whether screen flickering occurs or not is detected (101); a reference voltage (VCOM voltage) value for liquid crystal molecule deflection of a display screen is acquired in response to detecting that screen flickering occurs (102); a difference value between the acquired VCOM voltage value and a preset VCOM voltage value is calculated (103); a target VCOM voltage value is calculated according to the acquired VCOM voltage value, the preset VCOM voltage value and the difference value (104); and the VCOM voltage value of the display screen is adjusted into the target VCOM voltage value (105). A screen flickering processing device, a storage medium and an electronic device (400) are also provided.
US11056025B2 Display device
A flexible display panel of a display device includes a first side with a display unit, and a second side opposite to the first side. A bending guide includes an external guide that faces part of the first side and has a first curved side, and an internal guide that faces part of the second side and has a second curved side. A slider that slides on the bending guide is attached to one end portion of the flexible display panel. A radius of the first curved side is greater than a radius of the second curved side. When the slider moves toward the bending guide, the first side contacts the first curved side and is bent by the first curved side, and when the slider moves away from the bending guide, the second side contacts the second curved side and is bent by the second curved side.
US11056024B2 Seal and sealing method
The invention relates to a seal containing a substrate which can be applied to an object to be sealed, so that said seal is changed when it is removed without authorization, wherein the substrate contains or comprises a polymer and/or a glass and at least one optical waveguide is arranged in the substrate, at least one first Bragg grating being arranged in said optical waveguide, wherein the substrate has a thickness of less than 200 μm. The invention further relates to a system having a seal of this kind and having an evaluation device, and also to a sealing method.
US11056021B2 Method for producing simulated animal organ and simulated animal organ
A method for producing a simulated animal organ includes: a shaping step of mixing a raw material containing mannan as a main component and water for gelatinization and shaping a gelatinized substance into a shape of an animal organ to obtain a shaped body; and a low temperature step of keeping the shaped body in a low temperature environment lower than a normal temperature. As a result, a simulated animal organ in a state extremely close to an actual animal organ is provided.
US11056017B2 System for dynamically provisioning cyber training environments
Methods and systems allow a user or operator to easily create cyber-training environments for use in a cyber-training system. In one embodiment, the environments are configured as missions. The missions may have a plurality of features, such as training objectives, a mission storyline, a mission order and mission objectives, relative to a mission environment. The mission environment comprises a virtual environment, such as defined by a virtual network having virtual machines or devices.
US11056016B2 Mechatronic factory simulation system and method of teaching how to resolve errors in an automation-driven process
A mechatronic training and simulation system and method of detecting and resolving complex control system errors in automation-driven process that replicates a scaled factory. The system provides student work stations that allow students to monitor, analyze and repair an automation-driven process. The automation-driven process includes at least one scaled model factory station simulator such as: a robot station, a warehouse station, a furnace processing station, and error checking color sorting station. A problem interjecting device to introduce errors to the automation-driven process through discrete I/O interfacing to interrupt process flow by breaking inputs and breaking outputs. Students at the student work stations, independently or concurrently, analyze and repair interruptions in automation-driven process through use of interface software and electrical measurement instruments. Students learn theoretical and practical hands on technical knowledge for debugging and troubleshooting programmable logic control systems and automation-driven mechanical systems.
US11056014B1 Virtual classroom over a group meeting platform
A method to provide a remote classroom experience is provided. The method includes receiving, in a server, a data feed from multiple participants in a group meeting, merging the data feed from each of the participants into a group presentation, and providing the group presentation to one or more of the participants. The method also includes tracking at least one application data from at least one participant in the group meeting and providing an assignment to a selected group of participants in the group meeting. The method also includes generating a grade of the assignment for each of the selected group of participants based on a template document stored in a database and providing, to the second participant, the grade of the assignment for each of the selected group of participants. A system and a non-transitory, computer readable medium storing instructions to perform the above method are also provided.
US11056013B1 Dynamic filtering and tagging functionality implemented in collaborative, social online education networks
Various aspects disclosed herein are directed to dynamic filtering and tagging functionality implemented in collaborative, social online education networks.
US11056012B2 Systems and methods for generating improved environmental displays for vehicles
An imaging system for a moving vehicle aggregates pre-existing data with sensor data to provide an image of the surrounding environment in real-time. The pre-existing data are combined with data from one or more 3-D sensors, and 2-D information from a camera, to create a scene model that is rendered for display. The system accepts data from a 3-D sensor, transforms the data into a 3-D data structure, fuses the pre-existing scene data with the 3-D data structure and 2-D image data from a 2-D sensor to create a combined scene model, and renders the combined scene model for display. The system may also weight aspects of data from first and second sensors to select at least one aspect from the first sensor and another aspect from the second sensor; wherein fusing the pre-existing scene data with the sensor data uses the selected aspect from the first sensor and the selected aspect from the second sensor.
US11056010B2 Verifying flight information
Disclosed herein is a method. The method comprises retrieving a first message comprising flight information that is input into a flight information system associated with a flight. The method also comprises receiving a second message comprising flight information that is input into the flight information system associated with the flight based on the first message. The method further comprises verifying that the flight information that is sent in the first message matches the flight information that is received in the second message. The method additionally comprises providing a notification in response to verifying that the flight information that is sent in the first message does not match the flight information that is received in the second message.
US11056009B2 Secure control and operation of drones
Techniques are described for the exchange of control signals between a controlled unmanned aircraft (i.e. drone) and a ground control station and for the transmission of communication signals, such as video, from the drone to the ground control station so that the signals are more difficult to intercept or jam. The video signal transmitted from the drone can be an analog RF signal employing one or more of video “scrambling”, RF signal inversion, hopping, usage of a wide frequency range and other techniques. To secure the control signals between the drone and the ground control station, techniques can include hopping, encryption and use of a wide frequency range.
US11056008B2 Real-time service provider progress monitoring
A network computer system provides a service instruction to a computing device. The service instruction can include offers, such as a service request to pick up and transport a user, and recommendations, such as a movement recommendation encouraging the service provider to relocate to another geographic area. The network computer system remotely monitors the computing device to receive a current position of the computing device as the service provider travels within a geographic area. The network computer system remotely monitors the computing device to receive a service state of the service provider. The network computer system periodically determines whether the service provider is making progress towards a target of the service instruction based on the current position of the computing device and a set of progress conditions, including determining whether the service provider satisfied the set of progress conditions in response to a change in the service state.
US11056005B2 Traffic light detection and lane state recognition for autonomous vehicles
Methods and system are provided for training and using a model to determine states of lanes of interest. For instance, image data including an image and an associated label identifying at least one traffic light, a state of the at least one traffic light, and a lane controlled by the at least one traffic light are received and used to train the model such that the model is configured to, in response to receiving an image and a lane of interest included in the image, output a lane state for the lane of interest. This model is then used by a vehicle in order to determine a state of a lane of interest. This state is then used to control the vehicle in an autonomous driving mode based on the state of the lane of interest.
US11056004B1 Traffic signal system for congested trafficways
A traffic signal system for congested trafficways has a plurality of stationary alarm light/sensor-reader combinations and mobile alarm light/sensor-reader combinations monitoring each other and monitory tags placed on individuals, machines, and hazards to provide real time alarms to not only pedestrians but also machine operators, who are potentially approaching harm's way, or have the better ability to avert potential harm. Different forms of alarms are provided to indicate different kinds of alarm conditions and to reduce complacency to alarms, and thus improve effectiveness.
US11056002B2 Method, control unit and system for avoiding collision with vulnerable road users
Method and control unit, for avoiding a potential collision between the vehicle and a Vulnerable Road User, VRU. The method comprises: predicting a future path of the vehicle; detecting the VRU and the position of the VRU; determining velocity of the detected VRU; predicting a future position of the detected VRU, based on the VRU position upon detection and the determined VRU velocity; and performing an action for avoiding a collision, when the predicted future position of the VRU is overlapping the predicted future path of the vehicle.
US11056000B2 Emergency UAV method and apparatus
Apparatus, method and storage medium associated with UAV assisted emergency responses are disclosed herein. In embodiments, an UAV may comprise a flight controller to control at least one or more engines of the UAV to navigate the UAV to condition road traffic for an emergency vehicle on emergency en route to a destination, wherein to condition road traffic, the flight controller is to receive navigation data of the emergency vehicle, and in response, control at least the one or more engines to navigate the UAV in advance of the emergency vehicle, to alert road traffics ahead of the emergency vehicle of pending transit of the emergency vehicle. Other embodiments may be disclosed or claimed.
US11055997B1 System and method for resolving ambiguous right of way
According to one aspect, a computer-implemented method for communication between a plurality of vehicles at an intersection includes detecting the intersection ahead of a first vehicle. The method includes determining a time of arrival of a first vehicle at the intersection and a time of arrival of a second vehicle at the intersection is approximately the same. Further, the method includes receiving behavior data about the first vehicle for a previous time of duration before the time of arrival of the first vehicle at the intersection, and receiving behavior data about the second vehicle for a previous time of duration before the time of arrival of the second vehicle at the intersection. The method includes transmitting a resolution message including information for determining a right of way maneuver between the first vehicle and the second vehicle at the intersection.
US11055995B2 Arrangement and method for providing adaptation to queue length for traffic light assist-applications
A system and method relate to adapting traffic light assist applications of connected road vehicles to queue lengths at intersections having connected traffic lights. Each vehicle is arranged to: communicate to back-end logic a position thereof; and determine, using sensor data from sensors thereof, if a vehicle is located within, or if it is the last vehicle (Vn) in the queue (11). If the vehicle is in the que, the length (lqv) of the queue (11) from that vehicle (3) up to the traffic light (6) is determined. If the vehicle is the last vehicle (Vn) in the queue, traffic light assist applications of vehicles approaching that traffic light are adapted to the determined length (lqtot) of the entire queue.