Document Document Title
US11018805B2 Apparatus and method of transmission using HARQ in communication or broadcasting system
The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). The present disclosure discloses a method for effective retransmission when HARQ is applied to data encoded with a low density parity check (LDCP) code. A data transmission method of the transmitter may include: initially transmitting data encoded with an LDPC code to a receiver; receiving a negative acknowledgement (NACK) from the receiver; determining retransmission related information for data retransmission; and retransmitting, in response to the NACK, LDPC-encoded data based on the retransmission related information.
US11018803B2 Method for transmitting or receiving signal in wireless communication system and apparatus therefor
According to one embodiment of the present invention, a method of receiving DCI by a UE includes receiving bundling information regarding REGs via higher layer signaling, performing blind detection for a PDCCH in a CORESET configured on a plurality of OFDM symbols, and acquiring DCI from the PDCCH. When the bundling information indicates a first value, the UE may perform bundling such that only REGs locating on a same RB and corresponding to different OFDM symbols in the CORESET, are bundled as 1 REG bundle, and when the bundling information indicates a second value, the UE may perform bundling such that the REGs locating on the same RB and corresponding to the different OFDM symbols are bundled as 1 REG bundle along with REGs locating on different RBs in the CORESET, and the UE may perform the blind detection of the PDCCH by assuming same precoding for REGs belonging to a same REG bundle as a result of REG bundling.
US11018800B2 Information transmission method and user equipment
Embodiments of the present disclosure provide an information transmission method, including: determining, by a user equipment (UE), first speed information of the UE; determining, by the UE, a transmission manner of control information based on the first speed information; and sending, by the UE, the control information in the transmission manner over a first link. In the embodiments of the present disclosure, the UE may determine the transmission manner of the control information based on the first speed information. When the UE is high speed UE, an appropriate transmission manner can be selected for the high speed UE, thereby meeting a transmission requirement of the high speed UE and ensuring a transmission success rate.
US11018799B1 Adapting the performance of the decision feedback demodulator based on quantified impairments
Disclosed are techniques for wireless communication. In an aspect, a receiver wireless device receives, from a transmitter wireless device, a wireless signal comprising a plurality of modulated symbols forming at least one packet, determines a quantification of impairments associated with the plurality of modulated symbols of the wireless signal, the impairments caused by the receiver wireless device, the transmitter wireless device, or both, determines a remembrance factor based on the quantification of the impairments, and demodulates the plurality of modulated symbols of the wireless signal based on a number of previously demodulated symbols, wherein the number of previously demodulated symbols is based on the remembrance factor.
US11018796B2 Method and system for eliminating polarization dependence for 45 degree incidence MUX/DEMUX designs
Methods and systems for eliminating polarization dependence for 45 degree incidence MUX/DEMUX designs may include an optical transceiver, where the optical transceiver comprises an input optical fiber, a beam splitter, and a plurality of thin film filters arranged above corresponding grating couplers in a photonics die. The transceiver may receive an input optical signal comprising different wavelength signals via the input optical fiber, split the input optical signal into signals of first and polarizations using the beam splitter by separating the signals of the second polarization laterally from the signals of the first polarization, communicate the signals of the first polarization and the second polarization to the plurality of thin film filters, and reflect signals of each of the plurality of different wavelength signals to corresponding grating couplers in the photonics die using the thin film filters.
US11018795B2 Methods and apparatus for coding for interference network
The disclosed techniques allow for transmitting a signal stream from a sender to a receiver in an environment including multiple senders and receivers. The technique for the sender decomposes a data stream from the sender into multiple substreams, encodes a substream by a codeword, further superimposes multiple codewords to form a signal stream in an asynchronous manner, and transmits the signal stream to the receiver. A codeword can span over multiple blocks. The receiver receives a first codeword stream from a first sender, receives a second codeword stream from a second sender, the two codeword streams may be received at the same time as one signal, and decodes the first codeword stream and second codeword stream over a sliding window of multiple blocks.
US11018794B2 Method and apparatus for transmitting or detecting a primary synchronization signal
A method and apparatus for transmitting or detecting primary synchronization signal. The receiver receives primary synchronization signal from a transmitter, and detects the sequence used in the received primary synchronization signal by using three root indexes. Here, the primary synchronization signal is generated by using a Zadoff-Chu sequence having one of the three root indexes. The three root indexes comprise a first index and a second index, and a sum of the first index and the second index corresponds to the length of the Zadoff-Chu sequence.
US11018792B2 Methods and apparatus for configuring a flex ethernet node
Methods and apparatus are provided for processing communications. In one aspect, a method of configuring a first Flex Ethernet (FlexE) node comprises receiving first data from a second FlexE node in time slots over at least one physical layer connection, the first data including overhead identifying assignments of the time slots to one or more client flows in the first data, and assigning time slots for transmission of second data to the second FlexE node based on the assignments of time slots in which the first data is received.
US11018788B2 Robust high speed sensor interface for remote sensors
Systems, methods, and apparatuses are discussed that enable robust, high-speed communication of sensor data. One example system includes a sensor bus, an electronic control unit (ECU), and one or more sensors. The ECU is coupleable to the sensor bus and configured to generate a synchronization signal, and is configured to output the synchronization signal to the sensor bus. The one or more sensors are also coupleable to the sensor bus, and at least one sensor of the one or more sensors is configured to sample sensor data in response to the synchronization signal and to output the sampled sensor data to the sensor bus.
US11018778B1 System and method to prevent unauthorized voice detection via fiber links
A random acoustic phase scrambler device is installed in-line with a telecommunications fiber link to prevent voice detection via fiber links. The device includes a transducer to produce vibrations; a length of optical fiber positioned to receive the vibration from the transducer; and a random acoustic phase driver configured to control the intensity and frequency of the vibrations. The transducer produces randomized vibrations within an acoustic bandwidth. The device is configured to introduce device-induced phase changes to signals within the telecommunications fiber link. The bandwidth of the device-induced phase changes is greater than the bandwidth of voice-induced phase changes, and the device-induced phase changes are greater in intensity than the voice-induced phase changes. The device-induced phase changes mask voice-induced phase changes through the telecommunications fiber link that are otherwise detectable by voice detection equipment tapped to the telecommunications fiber link.
US11018776B2 Power-based decoding of data received over an optical communication path
A system for transmitting data over an optical communication path is configured to receive data to be encoded in a bitstream for transmission using an optical communication path and encodes the received data to obtain a bitstream. The system is further configured to determine that the bitstream includes a sequence of consecutive bits, and obtain a power level at which to transmit a portion of the bitstream based on a count of the consecutive bits in the sequence. The system may be configured to selectively activate a light source at a power level according to a modulation scheme to optically transmit the portion of the bitstream at the power level.
US11018774B2 Network security and variable pulse wave form with continuous communication
A pulsed light communication device has a plurality of indicator light emitting diodes emitting diodes emitting at least one of a plurality of wavelengths of colored light to correspond to a designated color assigned to a security level for a network. A continuous uninterrupted modulated pulsed light emitting diode light signal may be generated having a sensitivity threshold detection level exceeding minimal parameters of a photodetector.
US11018772B1 Optical communication circuits
Various apparatuses, circuits, systems, and methods for optical communication are disclosed. In some implementations, an apparatus includes multiple lasers that input an electronic signal. Each laser encodes and outputs a respective optical data signal based on the electronic signal. Each laser has a different configuration of one or more first optical parameters. A first selection circuit selects the respective optical data signal from one of the lasers. Multiple optical components configure second optical parameters of an input optical data signal. A second selection circuit inputs the selected optical data signal from the first selection circuit and provides the selected optical data signal to one of the optical components. A third selection circuit selects the optical data signal output from the one optical component.
US11018771B2 Communications network
Embodiments disclosed herein provide a hybrid fiber-copper access network in which a main OLT sends data to the DSLAMs via a plurality of point-to-point optical fiber connections. A standby OLT is provided which has a plurality of point-to-multi-point optical fiber connections to the DSLAMs. In the event of a failure, data can be sent to some of the DSLAMs via the standby OLT and the point-to-multi-point optical fiber connections. Following the rectification of the fault, the network can revert to its normal state and transmit data to the DSLAMs via the main OLT and the plurality of point-to-point optical fiber connections.
US11018767B2 Digital nonlinear phase compensator for legacy submarine cables
A method and system are herein disclosed. A coherent optical receiver receives a first optical data carrier signal at a first instant of time and a second optical data carrier signal at a second instant of time, generates at least four first data streams from the first optical data carrier signal and at least four second data streams from the second optical data carrier signal; and circuitry calculates a first aggregate power of the first data streams and a second aggregate power of the second data streams; applies an adjustable temporal low pass filter to the first aggregate power and the second aggregate power resulting in a compensation power, the adjustable temporal low pass filter adjusted to achieve a performance metric; and phase-rotates the first data streams and the second data streams proportional to the compensation power.
US11018761B2 Automated system for link health assessment in fiber optic networks
Methods and systems for automated health assessment of fiber optic links of a fiber optic communication system are described. Tables are used to describe the fiber optic links, including access addresses to communication modules used in the links. Telemetry data representative of operation of the communication modules can be read via the access addresses into a central station. OTDR/OFDR measurement data of fiber optic segments used in the links can be read via the access addresses into the central station. The telemetry and/or OTDR/OFDR measurement data can be used by the central station for comparison against reference data to assess health of the links. The communication modules locally and continuously capture the telemetry data to detect transient events that may be the result of tampering of the links.
US11018760B1 Method and apparatus for automatic provisioning of optical module
A method and apparatus are provided for tuning a wavelength of an optical signal outputted by first optical module installed on central office terminal (COT) equipment on a central office side and a wavelength of an optical signal outputted by second optical module installed on a remote office side in an optical communication system, which perform port deactivation by blocking a signal input/output at a front-end port corresponding to a rear-end port installed with the first optical module.
US11018755B2 Network for enabling beyond visual line of sight aircraft command and control communications
One embodiment is an apparatus comprising an aircraft and an aerial network communications system associated with the aircraft. The network communications system may comprise an antenna physically connected to an outside surface of the aircraft; and a transceiver electrically connected to the antenna. The aerial network communications system receives signals from and transmits signals to an unmanned aerial vehicle (“UAV”) via a communications network comprising a control station and a plurality of airborne network nodes.
US11018754B2 RF communications system and method
An RF communications (COMM) system includes a COMM antenna connected to a signal processing unit including a multi-channel analog navigation/communications (NAV/COMM) transceiver and an analog COMM transmitter. The system is configured for switching between the transceiver and the transmitter, based on preprogrammed parameters including prioritizing signals based on keywords, system location and other parameters. An aircraft application is disclosed. A global navigation satellite subsystem (GNSS) subsystem can be connected to the signal processing unit for locating the telecommunications system. A method includes the steps of providing an RF communications system for aircraft and other applications.
US11018750B2 Recovery mechanism for secondary cell
Aspects of the present disclosure relate to wireless communications, and more particularly, to cell recovery techniques. One example method generally includes receiving, at a user-equipment (UE), at least one pilot signal via a secondary cell, receive, via a primary cell, a first message triggering reporting of at least one preferred beam for communication via the secondary cell, determining the preferred beam based on the at least one pilot signal, transmitting, via the primary cell, a report indicating the at least one preferred beam, and communicating data via the secondary cell and via the preferred beam.
US11018749B2 OAM multiplexing communication system and inter-mode interference compensation method
An OAM multiplexing communication system multiplexes signals of one or more sequences for each OAM mode. A transmitting station includes a transmitting antenna using an M-UCA, and an OAM mode generation unit that simultaneously generates one or more OAM modes from each UCA. A receiving station includes a receiving antenna equivalent to the M-UCA, an OAM mode separation unit that separates signals received by each UCA for each OAM mode, and a channel estimation/interference compensation unit that compensates for inter-mode interference between the OAM modes by using a weight. The channel estimation/interference compensation unit selects, for each OAM mode, signals of a subject mode and an adjacent mode from among the signals of the OAM modes separated by the OAM mode separation unit, and compensates for the inter-mode interference by multiplying an approximate weight calculated by using channel matrixes of the subject mode and the adjacent mode.
US11018741B2 Wireless communication device and method for switching antenna
The present disclosure relates to a wireless communication device and a method for switching an antenna of a wireless communication device that includes a first antenna in an operation state and a second antenna in a standby state. The method includes detecting a first performance parameter of the first antenna, the first performance parameter including at least one of a strength of a received signal at the first antenna and a sensitivity of the first antenna; and when the first performance parameter of the first antenna is lower than a preset threshold, switching the second antenna to the operation state, and switching the first antenna to the standby state. The technical solution can improve a communication quality of the wireless communication device by enabling a standby antenna when performance of an antenna in the operation state has been degraded.
US11018740B2 Method for antenna port indication and apparatus
The application relates to a method for antenna port indication. A terminal receives information indicating an antenna port set of a pilot from a base station. The antenna port set is used for a resource block (RB) set and the pilot is used for data demodulation. And the terminal determines the antenna port set based on the received information. By implementing the solution in the application, transmission resource utilization is improved.
US11018739B2 Method and apparatus for operating beamformed reference signal in communication system
The present disclosure relates 5G or pre-5G communication systems for supporting higher data transmission rate than those by LTE or other post-4G communication systems. According to the present disclosure, a method for operating a beamformed reference signal by a base station and terminal in a communication system, and the terminal, are provided. The method includes transmitting, to a terminal, control information indicating whether a first codebook is used for generating feedback information on a downlink reference signal. The first codebook is used if generating feedback information on the beamformed reference signal and is generated based on a number of antenna ports and a number of ranks.
US11018738B2 Communication method, communications apparatus, and system
This application provides a communication method, to provide a codebook of a higher-order precoding matrix, and help increase a quantity of layers of data, thereby helping improve a data transmission capability and improving a throughput. The method includes: receiving, by a first device, a reference signal used for channel measurement; and sending, by the first device, at least one precoding matrix indicator PMI and a rank indication RI based on the reference signal, where the PMI is used to indicate a precoding matrix in a codebook corresponding to the RI, the precoding matrix in the codebook includes a plurality of matrices in a one-to-one correspondence with a plurality of antenna port groups, a matrix corresponding to one antenna port group or each of at least two antenna port groups has two different inter-antenna-port-group phase factors, and any two column vectors in the precoding matrix are orthogonal to each other.
US11018733B2 Transmission device and transmission method
A transmission device comprising: a weighting circuitry which, in operation, generates transmission signals of n streams (n is an integer of 3 or more) by weighting modulated signals of the n streams using a predetermined fixed precoding matrix; a phase changing circuitry which, in operation, regularly changes each phase of a symbol series included in each of the transmission signals of the n streams; and a transmitter which, in operation, transmits the transmission signals of the n streams from different antennas, the phases of each of the transmission signals of the n streams being changed in each symbol, wherein the transmission signal of an i-th stream has an mi kind of phase change value yi(t) (i is an integer between 1 and n (inclusive), 0≤yi<2π, and mi is set in each stream, t is an integer of 0 or more, and indicates a symbol slot), and the phase changing circuitry changes the phase in one or more u (u=m1×m2× . . . ×mn) symbol periods using all patterns of a set of phase change values yi(t) different from each other in each symbol.
US11018731B2 Tomlinson-harashima precoding in an OTFS communication system
A method for signal transmission using precoded symbol information involves estimating a two-dimensional model of a communication channel in a delay-Doppler domain. A perturbation vector is determined in a delay-time domain wherein the delay-time domain is related to the delay-Doppler domain by an FFT operation. User symbols are modified based upon the perturbation vector so as to produce perturbed user symbols. A set of Tomlinson-Harashima precoders corresponding to a set of fixed times in the delay-time domain may then be determined using a delay-time model of the communication channel. Precoded user symbols are generated by applying the Tomlinson-Harashima precoders to the perturbed user symbols. A modulated signal is then generated based upon the precoded user symbols and provided for transmission over the communication channel.
US11018729B2 Structured-pipelined CORDIC for matrix equalization
Flexible structured-pipelined CORDIC techniques efficiently perform various CORDIC operations and support different parameters for MIMO MEQ processing. The structured-pipelined CORDIC techniques simplify signal processing flow, unify input requirements and output delay, and simplify integration. Look-up table techniques provide quick generation of control signals, reduce design and verification efforts, and facilitate design automation. In addition, the structured-pipelined CORDIC techniques are conducive to hardware sharing and reuse. The structured-pipelined CORDIC techniques reduce integrated circuit area and power consumption.
US11018728B2 Transmission phase measurement and calibration method utilizing higher-order frequency bins
A circuit includes a transmission channel that outputs a continuous-wave signal based on a reference signal, a transmit monitoring signal path that couples out a portion of the transmit signal as a monitoring signal, a test phase shifter that receives the reference signal and generates a phase-shifted signal based on a sequence of phase offsets applied to the reference signal, a phase mixer that mixes the phase-shifted signal and the monitoring signal to generate a mixer output signal including a plurality of direct current (DC) values, an analog-to-digital converter that samples the mixer output signal in order to provide a sequence of DC values; and a monitor circuit that applies a discrete Fourier transform (DFT) to the sequence of DC values to generate a plurality of DFT bins with corresponding DFT bin values, and generate compensated phase information of the transmission channel using at least two DFT bin values.
US11018727B2 Diversity modules for processing radio frequency signals
Diversity modules for processing radio frequency (RF) signals are provided herein. In certain implementations a diversity module includes a first terminal, a second terminal, a low band processing circuit that generates a low band signal based on one or more diversity signals, a mid band processing circuit that generates a mid band signal based on the one or more diversity signals and that provides the mid band signal to the second terminal, a high band processing circuit that generates a high band signal based on the one or more diversity signals, and a multi-throw switch that provides the low band signal to the first terminal in a first state and that provides the high band signal to the first terminal in a second state.
US11018719B2 Broadband, low profile, high isolation, two-port antenna
A broadband, dual-polarized, cavity-backed slot antenna (CBSA) array is presented for enabling full-duplex wireless communication. The antenna consists of a thin rectangular cavity appropriately loaded with metallic septa to excite multiple resonances of similar desired field distribution to achieve consistent radiation characteristics over a wide bandwidth. Four pairs of orthogonal radiating slots are cut out on one of the broad-walls of the cavity; all of which are fed by two orthogonal slots on the opposite broad-wall of the cavity. The cavity is fed by an end-launch coaxial-to-waveguide transition to excite one of the channels. The other channel is excited by a two-pronged microstrip line symmetrically crossing over the other cavity feeding slot. Due to the out-of-phase coupling from the two prongs of the microstrip line to the other port, this type of excitation is shown to provide an unpredicted level of isolation between the two channels over a wide bandwidth.
US11018714B2 Radio front end module with reduced loss and increased linearity
A Radio Frequency (RF) circuit including a receive path, a transmit path, a switching circuit, and an output configured to receive RF signals from an antenna in a receive mode of operation, and to provide RF signals to the antenna in a transmit mode of operation. The receive path is configured to be coupled between a low-noise amplifier and the output. The switching circuit is located in the receive path and is configured, in the receive mode, to selectively couple the low-noise amplifier to the output and to pass the received RF signals from the output to the low-noise amplifier. The transmit path is configured to be coupled between a power amplifier and the output, to provide, in the transmit mode, signals from the power amplifier to the output, bypassing the switching circuit, and to have, in receive mode of operation, an off-state impedance of at least 200+j*13 Ohm.
US11018713B2 Radio frequency shielding within a semiconductor package
Radio frequency shielding within a semiconductor package is described. In one example, a multiple chip package has a digital chip, a radio frequency chip, and an isolation layer between the digital chip and the radio frequency chip. A cover encloses the digital chip and the radio frequency chip.
US11018712B2 Wireless device
A wireless multi-band device comprises a radiating system comprising a ground plane layer, a boosting element, and a radiofrequency system, wherein the radiofrequency system comprises a tunable reactive element.
US11018702B2 Multi-radio access technology circuit
A multi-radio access technology (RAT) circuit is provided. The multi-RAT circuit includes a radio frequency (RF) circuit(s) coupled to an interconnect medium(s). The RF circuit(s) includes a power head circuit configured to receive a local oscillation (LO) pilot and an RF signal via the interconnect medium(s). The power head circuit generates an LO signal based on the LO pilot without requiring a synthesizer. Accordingly, the power head circuit modulates the RF signal to a carrier band based on the LO signal for transmission in a millimeter wave (mmWave) spectrum. By generating the LO signal and modulating the RF signal to the carrier band in the power head circuit, it may be possible to minimize attenuation and/or interference to the RF signal. Further, it may also be possible to share the interconnect medium(s) with existing RATs, thus helping to reduce size, power, and cost impacts associated with supporting an mmWave RAT.
US11018700B2 Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 2/15 and 256-symbol mapping, and bit interleaving method using same
A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.
US11018699B2 Method and apparatus for controlling interleaving depth
A method and an apparatus for controlling an interleaving depth are provided. The interleaving depth controlling method includes performing a modulo operation on an interleaving depth selected to be less than or equal to a maximum interleaving depth and a total number of codewords to obtain a number of remaining codewords; and comparing the total number of the codewords to the interleaving depth, when the number of the remaining codewords excludes “0”, to control the interleaving depth.
US11018694B2 Fast cyclic redundancy check code generation
Systems and methods are provided for fast cyclic redundancy check code generation. For example, a method includes representing the sequence of bits as a polynomial over a Galois field base 2; partitioning the polynomial into a plurality of partial polynomials, wherein the polynomial equals the sum of the partial polynomials; concurrently generating a respective partial CRC code for each of the partial polynomials; weighting each partial CRC code according to a position of the respective partial polynomial in the polynomial; and summing the weighted partial CRC codes.
US11018693B2 System and method for continuously verifying device state integrity
Various embodiments of the invention relate to continuously verifying semiconductor device state integrity. A counter is combined to form part of the Cyclic Redundancy Check (CRC) calculation for control register within the semiconductor device. The counter is initialized to zero and resets after a predetermined number of cycles. The counter value is added to the currently calculated CRC value to get a combined CRC value. Every time a CRC value is calculated for the register bank, the counter value is updated, e.g. incremented. If the CRC calculation is repeated enough times, the counter value will reach its maximum value, and then roll over to its initial value of zero. If no errors occur in the register bank, the combined CRC value at the rolling over point will match an initial combined CRC value. Such a repetitive pattern of the combined CRC value may be used to continuously monitor control register integrity.
US11018691B2 Increasing storage capacity and data transfer speed in genome data backup
Methods and systems for storing data include compressing data inflated from a first compression format into a second format using a processor and verifying contents of the data concurrently with compressing the data. Compression is aborted responsive to a failure of the content verification, but an output of the compression is stored to a tape drive until the compression is aborted. The tape drive is rolled back to a file start position after the compression is aborted and compression of any remaining uncompressed data is skipped after the compression is aborted. The data is stored to the tape drive after rolling the tape drive back.
US11018688B1 DTC device and method based on capacitive DAC charging
A DTC circuit, includes: a DAC connected to a first node; a first switch connected between a first power source and a second node, and to provide a charge current to the second node according to a first switching signal; and a second switch connected between the first node and the second node, and to electrically connect the DAC to the second node according to a second switching signal. The DAC is to be charged to generate a voltage ramp corresponding to the charge current during a first DTC operational phase when the first and second switching signals have an active level to turn on the first and second switches, and to generate an input control word dependent voltage according to an input control word during a second DTC operational phase when the first and second switching signals have an inactive level to turn off the first and second switches.
US11018683B2 Analog to digital converter
An analog-to-digital converter (“ADC”) has an input terminal configured to receive an analog input voltage signal. A first ADC stage is coupled to the input terminal and is configured to output a first digital value corresponding to the analog input voltage signal and an analog residue signal corresponding to a difference between the first digital value and the analog input signal. A second ADC stage is coupled to the first ADC stage and is configured to convert the analog residue signal to a second digital value. At least one of the first ADC stage and the second ADC stage includes a first sub-stage configured to convert an analog signal to a first number of bits of a digital value representing the analog signal, and a second sub-stage configured to convert the analog signal to a second number of bits of the digital value, where the second number of bits is greater than the first number of bits. A controller is coupled to the first and second ADC stages and configured to combine the first digital value and the second digital value into a digital output signal representing the analog input voltage signal.
US11018681B1 Digital-to-analog converter waveform generator
Techniques for testing circuits, such as converter circuits, such as digital-to-analog converter circuits (DACs), are described. A digital signal processor (DSP) can generate a waveform, such as sine wave, and apply the sine wave to the circuit under test, e.g., a DAC. The DAC can generate an output and the DSP can regenerate the waveform and determine an accuracy of the DAC such as to determine whether the DAC meets one or more specified criteria. In some example implementations, the tests can be performed using variable voltage amplitude segments.
US11018677B1 Transmission enable signal generation circuit and integrated circuit
An integrated circuit which adjusts a period for enabling a transmitter, and includes a data delay circuit delaying data to generate transmission data; a transmission/reception terminal; a receiver receiving reception data transferred to the transmission/reception terminal, in response to a reception enable signal; a transmitter transmitting the transmission data to the transmission/reception terminal in response to a transmission enable signal; a shift circuit generating a plurality of preliminary transmission enable signals by sequentially delaying a signal; a phase comparison circuit comparing a phase of each of the plurality of preliminary transmission enable signals and a phase of the transmission data; and a selection circuit selecting one of the plurality of preliminary transmission enable signals as a transmission enable signal according to a phase comparison result of the phase comparison circuit. Since only one phase comparison circuit is used, a circuit area for generating the transmission enable signal may be reduced.
US11018675B2 Matrix phase interpolator for phase locked loop
Generating a composite interpolated phase-error signal for clock phase adjustment of a local oscillator by forming a summation of weighted phase-error signals generated using a matrix of partial phase comparators, each of which compare a phase of the local oscillator with a corresponding phase of a reference clock.
US11018673B2 Multi-modulus frequency dividers
Various embodiments relate to multi-modulus frequency dividers, devices including the same, and associated methods of operation. A method of operating a multi-modulus divider (MMD) may include receiving, at the MMD, an input signal at a first frequency. The method may also include generating, via the MMD, an output signal at a second, lower frequency based on a divisor value. Further, the method may include receiving, at the MMD, an integer value. Moreover, the method may include setting the divisor value equal to the integer value in response to a current state of the MMD matching a common state for the MMD, wherein the MMD is configured to enter the common state regardless of the divisor value.
US11018667B2 Optical keyswitch
An optical keyswitch includes a keycap, a supporting mechanism having a protrusion disposed under the keycap to support the keycap to move downward or upward, and a switch module including a circuit board, an emitter, and a receiver. The emitter and the receiver are electrically connected to the circuit board. The emitter emits an optical signal to the receiver. When the keycap is not pressed, the receiver receives the optical signal of a first intensity. When the keycap is pressed, the protrusion moves along with the keycap, and the protrusion changes the optical signal received by the receiver to have a second intensity different from the first intensity, so the switch module is triggered to generate a triggering signal.
US11018666B1 Thyristor current interrupter and auxiliary quasi-resonant turn-off unit
An apparatus and method that can accelerate the turn off time for a thyristor current interrupter. Following commutation of a load current from a main thyristor to an auxiliary turn-off unit, a capacitor of the auxiliary turn-off unit can provide a resonant current to create a zero current crossing for turning the main thyristor off, as well as provide a reverse bias voltage for the main thyristor. The auxiliary turn-off unit can hold the main thyristor off and facilitate sufficient time being available for main thyristor to block forward system voltage. A voltage level of another capacitor of the auxiliary turn-off unit can, with a switch of the auxiliary turn-off unit and the main thyristor turned off, be increased to a level that triggers at least one voltage-clamping unit to absorb electrical power from that capacitor. The load current passing in the auxiliary turn-off unit can be decreased as the electrical power is absorbed to a level at which one or more auxiliary thyristor switches of the auxiliary turn-off unit can be turned off.
US11018663B2 Linear switch circuits and methods
A system includes an output terminal and a linear switch circuit coupled to the output terminal. The linear switch circuit includes a first power field-effect transistor (FET) having: a first channel width; a control terminal; a first current terminal; and a second current terminal, wherein the second current terminal is coupled to the output terminal. The linear switch circuit also includes a second power FET having: a second channel width smaller than the first channel width; a control terminal; a first current terminal coupled to the first current terminal of the first power FET; and a second current terminal coupled to the output terminal. The system also comprises a control circuit coupled to the control terminal of the first power FET and to the control terminal of the second power FET. The control circuit detects a drain-to-source voltage (VDS) saturation condition and controls the first and second power FETs accordingly.
US11018660B2 Multi-mode feedback control through digital isolator
Power isolators with multiple selectable feedback modes are described. The power isolators may transfer a power signal from a primary side to a second side. A feedback signal may be provided from the secondary side to the primary side to control generation of the power signal on the primary side. In this manner, the power signal provided to the secondary side may be maintained within desired levels. The feedback signal may be generated by feedback circuitry configurable to operate in different modes, such that the feedback signal may be of differing types depending on which feedback mode is implemented.
US11018658B1 Electronic device and operating method of electronic device
An electronic device includes a unit interval detector including a plurality of delay cells and that receives a first signal, a second signal, and a third signal and detects a code indicating a unit interval from the first signal, the second signal, and the third signal, a clock recovery circuit that generates a clock signal from the first signal, the second signal, and the third signal in response to the code, and a data recovery circuit that generates a first receive signal, a second receive signal, and a third receive signal from the first signal, the second signal, and the third signal in response to the code and the clock signal. A total delay amount of the delay cells is smaller than a length of the unit interval and the unit interval detector performs a multi-stage detection operation including coarse detection and fine detection by using the delay cells.
US11018656B1 Multi-function level finder for serdes
An illustrative receiver includes: a decision element that derives symbol decisions from a slicer input signal; an equalizer that converts a receive signal into the slicer input signal; a summer that combines the symbol decisions with the slicer input signal to produce an error signal; and a level finder that operates on said signals to determine thresholds at which each signal has a given probability of exceeding the threshold. One illustrative level finder circuit includes: a gated comparator and an asymmetric accumulator. The gated comparator asserts a first or a second gated output signal to indicate when an input signal exceeds or falls below a threshold with a programmable condition being met. The asymmetric accumulator adapts the threshold using up steps for assertions of the first gated output signal and down steps for assertions of the second gated output signal, with the up-step size being different than the down-step size.
US11018651B2 Bulk acoustic wave resonators having doped piezoelectric material and an adhesion and diffusion barrier layer
Bulk acoustic wave (BAW) resonators, and electrical filters that incorporate the BAW resonators, are described. Generally, the BAW resonators comprise a substrate comprising an acoustic reflector; a first electrode disposed over the acoustic reflector; a piezoelectric layer disposed over the first electrode, the piezoelectric layer comprising scandium-doped aluminum nitride (ASN); a diffusion barrier layer disposed over the piezoelectric layer; and a second electrode disposed over the diffusion barrier layer. The diffusion barrier layer configured to prevent diffusion of material of the first electrode into the piezoelectric layer.
US11018650B2 Acoustic wave device
An acoustic wave device includes a piezoelectric substrate, an interdigital transducer electrode on the piezoelectric substrate, and two reflectors on both sides of the interdigital transducer electrode in an acoustic wave propagation direction. The reflectors include first and second busbars and first to third electrode fingers, respectively, and the first and second busbars are opposed to one another. The first busbars and the second busbars are connected by at least one third electrode finger. The reflectors each include a center area located centrally in a length direction and a first high-acoustic-velocity area that is located between the center area and the first busbars and has an acoustic velocity higher than the acoustic velocity of the center area, where the length direction is a direction in which the first to third electrode fingers extend.
US11018635B2 Embedded test circuitry and method therefor
A circuit (200) for testing failure of a connection between a radio frequency, RF, integrated circuit (201) and external circuitry (204), the circuit comprising: an amplifier (205) having first and second input paths (215, 216) and first and second output paths (206, 207); a first power detector (208, 209) coupled to one of said first or second output paths; at least one connection (211) between said first and second output paths (206, 207) and said external circuitry (204), connecting said outputs to a RF combiner (210) said external circuitry; at least one disabling circuit (230, 232, 234, 236, 240, 242, 260, 262) coupled to at least one of said first and second output paths (206, 207) or at least one of said first and second input path (215, 216), before said path reaches said power detector (208, 209); for disabling one of said inputs or outputs; wherein when said input or output path is disabled (206, 207), and a signal is output along the enabled output path (206, 207), the power detector (208, 209) on said disabled output path can detect if there is a failure in said at least one connection (211).
US11018634B2 Audio codec circuit and method for processing audio data
A circuit includes a digital-to-analog conversion circuit, an amplifying circuit, a mixing circuit, and an analog-to-digital converter. The digital-to-analog conversion circuit is configured to receive and convert audio data in the digital domain and output audio data in the analog domain. The audio data includes a main-tone component. The amplifying circuit is configured to output an audio signal according to the audio data in the analog domain. The mixing circuit is configured to eliminate the main-tone component according to the audio data in the analog domain and the audio signal and to output a feedback signal. The analog-to-digital converter is configured to convert the feedback signal from the analog domain to the digital domain.
US11018623B2 Safety switch for photovoltaic systems
Various implementations described herein are directed to a methods and apparatuses for disconnecting, by a device, elements at certain parts of an electrical system. The method may include measuring operational parameters at certain locations within the system and/or receiving messages from control devices indicating a potentially unsafe condition, disconnecting and/or short-circuiting system elements in response, and reconnection the system elements when it is safe to do so. Certain embodiments relate to methods and apparatuses for providing operational power to safety switches during different modes of system operation.
US11018616B2 Electric driving apparatus and electric power steering apparatus
In the present electric driving apparatus, coils that constitute a first armature winding and coils that constitute a second armature winding are arranged so as to alternate in a circumferential direction, and a control portion is configured so as to perform single-system driving when one of a first system and a second system fails, the single-system driving stopping driving of an inverter of the system that has failed, and controlling driving of the inverter of the system that has not failed to supply inverter phase currents to an armature winding of the system that has not failed such that the inverter phase currents are set to a second upper limit value that is greater than a first upper limit value.
US11018615B2 Motor drive device and air conditioner
A motor drive device includes an inverter to apply power to a motor, and a plurality of relays to switch a connection state of the motor by each switching its state between a first state and a second state. A timing at which at least one of the plurality of relays switches from the first state to the second state is different from a timing at which the other relays switch from the first state to the second state.
US11018605B2 DC to DC voltage converter and voltage converter control scheme
According to an example aspect of the present invention, there is provided a DC to DC converter module for use between an electric power source and an electric motor. The DC to DC converter module having: a DC to DC converter; input terminals configured to provide a source voltage to the DC to DC converter from the electric power source; output terminals connected to outputs of the DC to DC converter and configured to provide an output voltage of the DC to DC converter module to the electric motor; and control circuitry connected to the DC to DC converter, the control circuitry having an input for receiving a signal indicative of a desired electric motor performance. The control circuitry being configured to control the DC to DC converter in order to adjust the output voltage based at least partially on the signal indicative of a desired electric motor performance.
US11018601B2 Half-bridge driver circuit, related integrated circuit and system
A half-bridge driver circuit includes an amplifier configured to generate a measurement signal indicative of a current flowing through a shunt resistor. A processing circuit is configured to selectively acquire a sample of the measurement signal in response to a trigger signal. A synchronization circuit is configured to determine a first value indicative of the switch-on duration of a high side control signal, determine a second value indicative of the switching period of the high side control signal, compute a third value based on the first and second values, generate a third signal based on the third value when the next switching period of the high side control signal starts, start a second counter in response to the third signal, compare the count value of the second counter with a reference value to generate a fourth signal, and generate the trigger signal as a function of the fourth signal.
US11018599B1 Power regulator and power conversion circuitry for delivering power
A DC-to-DC transformer converts power from an input source to a load using a fixed voltage transformation ratio. The density of point of load power conversion may be increased and the associated power dissipation reduced by removing the input driver circuitry from the point of load where it is not necessary. An output circuit may be located at the point of load providing fault tolerant rectification of the AC power from the secondary winding of a power transformer which may be located nearby the output circuit. The driver circuit may drive a plurality of transformer-output circuit pairs. The transformer and output circuit may be combined in a single module at the point of load. Alternatively, the output circuit may be integrated into point of load circuitry such as a processor core. The transformer may be deployed near the output circuit.
US11018598B2 System and method for controlling switching network of a power regulation circuit
A system for controlling a switching network of a power regulation circuit arranged to regulate power transfer between a first and second circuit connected with the power regulation circuit includes one or more controllers receiving one or more first signals indicative of power characteristics of the first circuit and one or more second signals indicative of power characteristics of the second circuit. The controllers determine, based on the received signals and reference signals, a required power output for regulating power transfer between the first and second circuit, and then select, dynamically, a switching scheme, from predetermined switching schemes, based on the determination result. The predetermined switching schemes represent unique switching schemea for controlling switching of respective switches of the switching network. The controllers generate, based on the dynamically selected switching scheme, output signals for controlling switching of respective switches to regulate power transfer between the first and second circuit.
US11018596B2 Power converting device
A power converter device includes a power element module, a conductor, and a magnetic-conductive assembly. The power element module includes at least two electrodes and a power semiconductor unit. Voltage among these electrodes is AC voltage. The power semiconductor unit includes at least one pure die, and the pure die includes plural surfaces. The surface which occupies the most area of the pure die is the pure die surface. The conductor is coupled to the power element module. A current loop forms between the power element module and the conductor. A magnetic loop forms in the magnetic-conductive assembly. The magnetic-conductive assembly includes a chamber. The current loop passes through the chamber and intersects the magnetic loop to form inductance which the current loop needs. A part of the power element module is disposed in the chamber.
US11018592B2 Flyback converter controller, flyback converter and methods of operation
Flyback converters and corresponding methods are provided. In an implementation, an on-time of a low-side switch of the flyback converter is kept at half a resonance period of a resonance defined by a leakage inductance of a transformer of the flyback converter and a capacitance value of a capacitor coupled to a primary winding of the transformer. Other methods, controllers and flyback converters are also provided.
US11018587B2 Methods and apparatus to reduce switching losses in power converters
Methods, apparatus, systems and articles of manufacture are disclosed to reduce switching losses occurring in power converters. An example a converter including an input voltage node and an output voltage node, a controller coupled to the converter, and a compensation network coupled to the converter and to the controller, the compensation network adapted to conduct a current to the converter in response monitoring a first voltage at the input voltage node being a threshold difference than a second voltage at the output voltage node.
US11018578B1 High voltage startup booster
An electronic device includes a circuit board that manages supply of electricity to the electronic device. The circuit board includes an integrated circuit and an external capacitor coupled to a supply terminal of the circuit board. During a startup operation of the integrated circuit, the integrated circuit supplies a first charging current to charge the capacitor to a supply voltage value. The circuit board includes a boost circuit that receives a portion of the first charging current and outputs a second charging current that augments charging of the capacitor. The second charging current is an amplification of the first charging current. The integrated circuit enables operation of the electronic device after the capacitor is charged to the supply voltage value.
US11018574B2 Voltage converter with embedded snubber for suppressing switching harmonics
A voltage converter includes a switch controller controlling operation of first second transistors to generate an output voltage from an input voltage while suppressing harmonics generated by the operation of the first an second transistors, wherein the first transistor includes an embedded snubber including a first damping resistor.
US11018572B2 Inverter with intermediate circuit capacitor cascade and DC-side common-mode and differential-mode filters
The invention relates to an inverter having an intermediate circuit capacitor, the connections of which are connected to supply lines for current supply and to a switching device which includes a plurality of half-bridges, wherein the intermediate circuit capacitor has a prespecified intermediate circuit capacitance, the magnitude of which is such that a ripple voltage which is formed in the supply lines by switching processes in the switching device is reduced to a prespecified maximum ripple voltage under prespecified operating conditions. For the purpose of reducing differential-mode interference, the invention proposes that a plurality of intermediate circuit capacitors which are connected in parallel are provided, wherein a sum of the capacitances of the plurality of intermediate circuit capacitors corresponds to the intermediate circuit capacitance.
US11018569B1 Torque augmentation device
The torque augmentation device has two primary embodiments. The first embodiment is two rotors, the rotors including rings of permanent magnets. The two rotors are angled with respect to each other. The magnetic field is disrupted on the bottom half by a ferrous flux diversion plate. With the forces unbalanced between the upper and lower halves of the rotors, rotation will result, thus augmenting the torque production of any associated rotational device. The second embodiment uses a straight shaft, with a single central rotor, both sides of the rotor covered in magnets. In place of adjacent rotors, the second half of the magnets is placed on fixed plates, one on each side of the central rotor. The fixed plates are set at an angle with respect to the central rotor, creating the unbalanced forces that cause rotation.
US11018567B2 Permanent magnet rotor with enhanced demagnetization protection
A permanent magnet machine includes a rotor and an irregular polyhedron shaped magnet assembly. The rotor may define at least one magnet opening and may be configured to rotate within a circular opening defined by a stator. The irregular polyhedron shaped magnet assembly may be disposed in the magnet opening and may define a magnetization direction, wherein a height along the magnetization direction and perpendicular with a lamination plane of the rotor is greater at both ends than at a central portion disposed therebetween.
US11018562B2 Stator of a submersible linear electric motor and method for assembling said stator
The invention relates to the field of electrical engineering, in particular the design of linear electric motors for submersible installations with a plunger pump, and used for oil extraction. The technical result is to increase the durability of the submersible electric motor and the efficiency of its operation. The stator consists of a cylindrical housing, within which are installed magnetically conductive cups incorporating armature coils and support elements separating the groups of cups, whereby the inner diameter of which is less than the inner diameter of the magnetically conductive cups. On the inner surface of the support elements, grooves are provided, the depth of which is more than half the difference between the inner diameters of the magnetically conductive cups and the support elements. Moreover, the magnetically conductive cups and the support elements are installed in a housing with a radial clearance and are attached therein by fastening elements.
US11018556B2 Generators operable with shared oil systems and independent oil systems
A generator includes a stator with a stator winding, a rotor with a field winding supported for rotation relative to the stator, and a housing enclosing the stator and the rotor. The housing has an independent system port that is connected to a shared system port by a selector. The selector fluidly couples the stator and one of the independent system port and the shared system port. The selector also fluidly separates the stator from the other of the independent system port and the shared system port. Generator arrangements and methods of making generators are also described.
US11018549B2 Rotating electric machine having dynamic vibration absorber
A dynamic vibration absorber needs to be designed so that the natural frequency of the dynamic vibration absorber alone becomes equal to the natural frequency of a stator. If these natural frequencies greatly deviate from each other, the effect is reduced. Therefore, the natural frequency of the dynamic vibration absorber alone needs to be accurately calculated to make designing. However, in actual, the natural frequency is greatly influenced by the rigidity around the mounting position of a vibration damping target, and thus there is a problem that the natural frequency becomes different from the designed value upon mounting. An object of the present invention is to reduce an influence on the natural frequency of the dynamic vibration absorber alone given by the rigidity around the mounting position, by mounting a plurality of dynamic vibration absorbers to a dynamic vibration absorber mounting member, thereby making the dynamic vibration absorber more effective.
US11018546B2 Arc resistant device and method
The systems and methods disclosed relate to arc resistant medium voltage motor control centers. A drive control system comprises a variable frequency drive cabinet comprising a variable frequency drive; a power supply line; and at least one motor control cabinet having a top portion and a bottom portion, wherein the at least one motor control cabinet comprises: a medium voltage fused bypass controller in the bottom portion; a medium voltage non-fused transfer controller in the top portion; a first door disposed within the bottom portion; a second door disposed within the top portion; and an air vent, wherein the air vent is disposed in the first door, wherein the first door, the second door, and the air vent are arc resistant; wherein the variable frequency drive is coupled to the power supply line and the non-fused transfer controller and the fused bypass controller is coupled to the power supply line.
US11018542B2 Rotating machinery with three-phase armature windings and first and second parallel windings
Rotating machinery includes a two-pole rotor, a stator core with seventy-two slots, and three-phase armature windings, as an example. The armature winding has two phase belts per phase. The phase belt includes a first parallel winding and a second parallel winding which are arranged in the stator slots as top coils and bottom coils. When a circumferential mean position of all top coils and bottom coils included in the phase belt is defined as a phase belt center, an arrangement of the first and second parallel windings in the phase belt, as viewed in order of proximity to the phase belt center, is such that the first and second parallel windings are arranged in order of second/first/second/first/first/second/first/second/first/second/second/first parallel windings as the top coils, and the first and second parallel windings are arranged in order of first/second/second/first/second/first/first/second/first/second/second/first parallel windings as the bottom coils connected to the top coils.
US11018541B2 Electric machine with stator windings having over-under end loops
A multi-phase electric machine having plurality of windings are mounted on the stator core and define a plurality of phases with each phase having at least two parallel windings. A standard pitch is defined between each pole of each phase, the pitch being a common circumferential spacing between corresponding slots of each pole. Each of the windings has a position change end loop at the same location, wherein the position change end loops define a non-standard pitch to thereby change the relative positions of the parallel windings in the slots. At each set of such position change end loops, the windings defining a greater pitch extend over the windings defining a lesser pitch.
US11018540B2 Slim-type stator, and single phase motor and cooling fan using same
Provided are a slim-type stator using a multilayer printed circuit board (PCB) capable of maximally generating torque in an opposite rotor and capable of increasing airflow, and a single-phase motor and a cooling fan using the same. The slim-type stator includes: a multilayer PCB; and a plurality of coil patterns formed on respective PCB layers of the multilayer PCB and connected via throughholes, wherein the multilayer PCB includes at least one protrusion corresponding to the plurality of coil patterns, and at least one recess disposed between the plurality of coil patterns.
US11018533B2 Calibration device and method for determining an optimal operating frequency of a power transfer system
A calibration device includes a controller configured to communicate a plurality of input voltage signals having different determined frequencies to a first power exchange coil. Also, the calibration device includes a load unit coupled to a second power exchange coil, where the load unit includes at least a first electrical load and a second electrical load. Further, the calibration device includes a voltage sensor configured to measure a plurality of first output voltage signals across the first electrical load and a plurality of second output voltage signals across the second electrical load, and where the controller is configured to determine an optimal operating frequency of a wireless power transfer system based on the plurality of input voltage signals, the plurality of first output voltage signals, and the plurality of second output voltage signals.
US11018530B2 Wireless power transmission apparatus with multiple controllers
This disclosure provides systems, devices, apparatus and methods, including computer programs encoded on storage media, for wireless power transmission. In accordance with this disclosure, a wireless power transmission apparatus (such as a charging pad) may support positional freedom such that a wireless power receiving apparatus may be charged regardless of positioning or orientation of the wireless power receiving apparatus. Various implementations include the use of multiple primary coils in a wireless power transmission apparatus. In some implementations, a wireless power transmission apparatus having multiple local controllers to activate different primary coils. In some implementations, the wireless power transmission apparatus may support concurrent charging of multiple wireless power receiving apparatuses. Furthermore, in some implementations, the wireless power transmission apparatus may support charging of a wireless power receiving apparatus that moves in relation to the wireless power transmission apparatus.
US11018529B2 Wireless charger for underwater vehicles fed from a constant current distribution cable
An apparatus for inductive power transfer (“IPT”) includes an active bridge section with input terminals that receive power from a constant current source, where the active bridge section operates at a fixed switching frequency, a primary resonant capacitor connected in series with an output terminal of the active bridge section, and a primary IPT coil connected in series with the primary resonant capacitor, where power is transferred wirelessly between the primary IPT coil and a secondary IPT coil, and the secondary IPT coil is connected in series with a secondary resonant capacitor, which is connected in series with an output rectifier section that receives power from the secondary IPT coil and comprising output terminals for connection to a load. The apparatus includes a controller that regulates output voltage to the load, where the controller regulates output voltage to the load by controlling switching of the active bridge section.
US11018522B2 Computer-implemented method for configuring electronic relays in an electric power distribution grid
A method for configuring one or more electronic relays in an electric power distribution grid, said electronic relays being operatively associated to corresponding switching devices of said electric power distribution grid, wherein it includes the following: providing a graphic user interface on a computer display, the graphic user interface including graphic resources activatable by a user; providing first graphic resources on said graphic user interface to select a configuration graphic template, the configuration graphic template representing a corresponding control logic model for configuring the electronic relays, the control logic model including one or more logic elements configurable by means of corresponding sets of configuration values; providing second graphic resources to configure one or more configurable logic elements of a control logic model represented by the selected configuration graphic template; providing third graphic resources on the graphic user interface to associate one or more configured logic elements to a corresponding electronic relay; checking whether the electronic relays meet predefined operating conditions; if the operating conditions are met by the electronic relays, transmitting configuration information including the configuration values to the electronic relays.
US11018521B2 Power and data distribution module and method for power and data distribution in an airborne vehicle
A power and data distribution module includes a plurality of first power supply interfaces, configured to be connected to a plurality of power supply lines, a data bus interface configured to be connected to a data bus, a plurality of power output interfaces, configured to be connected to an electrical load and to supply electrical power from a first power supply interfaces to the connected electrical loads, a plurality of voltage distribution modules coupled between the first power supply interfaces and the power output interfaces and configured to provide AC or DC voltage via the power output interfaces, a load shedding module configured to receive load shedding information via data communication over one or more power supply lines, and a data concentrator configured to receive redundant load shedding information via data communication over the data bus and to transmit the redundant load shedding information to the load shedding module.
US11018519B2 Charging apparatus capable of reducing low frequency leakage current
Disclosed is a charging apparatus capable of reducing a low-frequency leakage current, the charging apparatus including a duty controller that determines a duty of a switching element in a power factor correction converter based on a level of a common-mode component of an alternating-current (AC) voltage of AC power provided from an external charging facility, a level of a direct-current (DC) voltage formed by a DC link capacitor, and a leakage current flowing from a connection node of two input-terminal Y-capacitors and a connection node of two output-terminal Y-capacitors to the ground.
US11018516B2 Electronic device for providing user interface for transmitting or receiving power wirelessly and method therefor
An electronic device includes a first battery; a coil; a communication circuit; a display; a memory; and at least one processor operably coupled to the first battery, the coil, the communication circuit, the display, and the memory. The memory may include multiple instructions configured to cause, while being executed, the at least processor to identify a first user input for activating a function of sharing power in the first battery; display a user interface (UI) indicating that the function has been activated on the display, based on the identification of the first user input; identify an external electronic device distinguished from the electronic device by using the communication circuit, while the UI is displayed; display a visual element indicating information regarding a second battery included in the identified external electronic device on the UI, based on the identification of the external electronic device; and output power in the first battery to the identified external electronic device through the coil, at least partially based on a second user input regarding the visual element.
US11018505B2 Building electrical usage translation system
A method for performing validation, estimation, and editing (VEE), including: displaying real-time electrical usage for a building on a controllable video display; executing VEE rules on each of the streams to generate and store a corresponding post VEE readings, the post VEE readings comprising tagged energy consumption data sets each associated with a corresponding one of the streams, each of the data sets comprising first groups of contiguous interval values tagged as having been validated and second groups of contiguous interval values tagged as having been edited, the first groups of contiguous interval values corresponding to correct data; for the each of the data sets, creating anomalies having different durations using only the first groups of contiguous interval values; generating estimates for the anomalies by employing estimation techniques; for each of the durations, selecting one of the estimation techniques for subsequent employment when performing VEE of subsequent energy consumption data for the corresponding one of the streams; and executing functions on the streams translated by the generating and directing directing the controllable video display to display a weather normalized usage baseline recommendation for action regarding current energy usage.
US11018502B2 Cable with over-temperature protection
A cable comprises a power conductor, a data conductor and a first PTC device. The power conductor is configured to transmit electrical power between a source and a sink. The data conductor is configured to transmit data between the source and the sink. The first PTC device is coupled to the data conductor and its resistance increases drastically to decrease current flowing through the data conductor if a temperature of the first PTC device exceeds a first trip temperature. The first trip temperature is 55-80° C. The resistance of the PTC device is larger than 20 kΩ at 85° C. and larger than 80 kΩ at 100° C. A current flowing through the data conductor does not exceed 20 mA.
US11018497B2 In-phase motor bus transfer
In-phase transfer of an electric power source to a load bus from a first feeder to a second feeder is disclosed herein. Voltage phase difference, voltage frequency difference, and voltage rate-of-change of frequency difference, between the second feeder and the load bus are used along with a breaker delay time to determine whether the breaker will close while the phase of the second feeder and the load bus are within an acceptable range. One or more breaker close time checks may be performed, including a breaker close time consistency check and a breaker close time uncertainty check.
US11018493B2 Method for driving backlight module, driving device and display apparatus
A method for driving a backlight module, a driving device and a display apparatus are provided. The backlight module is divided into a plurality of light-emitting areas, each of the light-emitting areas including a plurality of lines of point sources, and the driving device includes a controller and a driving component, the driving component is connected to the controller and is configured to output a time series of voltage signal to the controller, and the controller is connected to all the plurality of lines of point sources in each of the light-emitting areas and is configured to drive the lines of point sources in the light-emitting area to emit light respectively at different periods based on the time series of voltage signal.
US11018491B2 System for field replaceable surge protection
A power sourcing equipment for remote powering of PoE equipment is provided including a transceiver for receiving an optical signal, a power module for receiving a power input, and a PoE device for receiving and converting the optical signal and the power input and controlling at least one remote device. A surge protector slot with a removable and field replaceable surge protector unit is provided. The removable field replaceable surge protector unit, after triggering by a surge event, is removable and replaceable with a new field replaceable surge protector unit allowing for continued surge protection without replacing the entire power sourcing equipment.
US11018489B2 Terminal structure of armored cable and armor wire anchoring device
A terminal structure of an armored cable includes an end of an armored cable, a terminal metal fitting, and a support. The end includes a core, and an armoring including armor wires made of copper or copper alloy disposed on an outer circumference of the core. The terminal metal fitting is attached to an end of each armor wire. The support is disposed on a tip side of the core and supports a plurality of the terminal metal fittings. The support includes a base plate and a fixing member. The base plate is provided with a first through hole into which the core is inserted, and second through holes which are provided on an outer circumference of the first through hole and into each of which a corresponding one of the terminal metal fittings is inserted. The fixing member fixes each terminal metal fitting to the base plate.
US11018488B2 Climate responsive transmission lines
An electrical power transmission line conductor having a bundle of at least one electrical conductor configured for transmission of high voltage alternating current electrical power, at least one strengthening structure bundled with the electrical conductor to provide physical support to the electrical conductor, and at least one magnetocaloric structure having magnetocaloric material. A changing magnetic field generated by transmission of high voltage alternating current electrical power via the at least one conductor causes the magnetocaloric material composition to exhibit a magnetocaloric effect to regulate the operating temperature of the electrical power transmission line conductor.
US11018484B2 Serpentine comb assembly for cable management and retention via curve engagement
A cable manager or serpentine comb assembly that can be provided as part of or as an add-on accessory to an electronics cabinet or enclosure (such as in a server rack or the like) to provide improved cable management. The cable manager uses a series of spaced-apart curved features or walls (“comb teeth”) to retain cables axially and laterally. The movement restriction provided by the cable manager is a product of the mechanical interaction of a cable, positioned in a channel or void between an adjacent pair of these curved walls/comb teeth, with the curved surfaces on the cable manager. The channels can be sized with varying widths and engagement curvatures to account for flexibility and minimum bend requirements of the cables being retained and managed by the cable manager or based on its intended use.
US11018483B2 Cable preparation machine
A cable preparation machine includes a blade assembly having arms and braid blades mounted thereto and disposed about a cable opening receiving a cable end along a cable axis. The arms are movable between retracted positions and advanced positions to move the braid blades. The braid blades have edges configured to engage a cable braid of the cable to cut the cable braid. The cable preparation machine includes a mandrel coupled to the end of the cable between the cable braid and an inner insulator of the cable. The braid blades are rotated around the cable axis pressing the cable braid between the edges of the braid blades and the mandrel to cut the braid blade.
US11018482B2 Coating-peeling apparatus of rectangular conductor wire
The present invention relates to a method of coating-peeling and a coating-peeling apparatus. The method of coating-peeling includes a gripping step and a peeling step, and peels by a pair of peeling blades peeling target portions of an insulating coating covering peeling target side surfaces of a rectangular conductor wire. In the gripping step, abutting sections of a pair of gripping members abut on gripping target portions of the insulating coating, whereby the rectangular conductor wire is gripped between the abutting sections. In the peeling step, in a state where the rectangular conductor wire has been gripped by the gripping members, the peeling blades are moved relatively following a surface direction of the peeling target side surfaces while opposing each other sandwiching the peeling target side surfaces, whereby the peeling target portions are peeled.
US11018480B2 Bus bar electric wire with a bent portion of uniform elongation
A bus bar electric wire includes a flat conductor which is formed of aluminum and inevitable impurities, and which has a cross-section of a substantially rectangular shape. An area of the cross-section is 15 mm2 or more and 240 mm2 or less. The flat conductor includes a bent portion having a predetermined bending R in a plane direction of the flat conductor, and a conductor part that is an outermost side of a bend in the bent portion has a plate width being set within a range satisfying uniform bending of the conductor part.
US11018477B2 Tunable laser for coherent transmission system
A tunable laser device is described. In one example, the tunable laser device includes an adaptive ring mirror, a gain waveguide, a loop mirror waveguide, and a booster amplifier waveguide. The gain waveguide and the boost amplifier waveguide can be formed in a semiconductor optical amplifier (SOA) region of the tunable laser device, and the adaptive ring mirror and the loop mirror waveguide can be formed in a silicon photonics region of the tunable laser device. The adaptive ring mirror includes a phase shifter optically coupled between a number of MMI couplers. By inducing a phase shift using the phase shifter, the wavelength of the output of the tunable laser device can be altered or adjusted for use in coherent fiber-optic communications, for example, among other applications.
US11018476B2 Laser module and system
Laser modules and systems are provided that are smaller, lighter, and less complex and while more reliably generating collimated laser beams having limited divergence.
US11018475B2 High-output power quarter-wavelength shifted distributed feedback laser diode
Provided is a quarter-wavelength shifted distributed feedback laser diode. The laser diode includes a substrate having a laser diode section and a phase adjustment section, a waveguide layer on the substrate, a clad layer on the waveguide layer, a grating disposed in the clad layer in the laser diode section, an anti-reflection coating disposed on one side walls, of the substrate, the waveguide layer, and the clad layer, adjacent to the laser diode section, and a high reflection coating disposed on the other side walls, of the substrate, the waveguide layer, and the clad layer, adjacent to the phase adjustment section.
US11018474B2 Laser temperature compensation system and driving method thereof
An optical transmitter and a method for driving the optical transmitter include emitting an optical signal using a laser having a lasing cavity with a first section and a second section, performing, using a first heater thermally coupled to the first section, a first temperature control on the first section using a first control signal, and performing, using a second heater thermally coupled to the second section, a second temperature control on the second section using a second control signal. The first temperature control is independent from the second temperature control.
US11018469B2 Current collector and conductor line system
A current collector and a conductor line system having such a current collector. The current collector has a holder and a carbon brush arranged in carbon brush support movable relative to holder in a feed direction from and to the conductor line. The carbon brush is movable in a feed direction from and to conductor line. A better and reliable guiding of the carbon brush on the conductor line and simpler design of the current collector, uses a current collector in which the carbon brush is additionally movable in a transverse direction running essentially across the longitudinal direction, a spring element being provided between the carbon brush and holder.
US11018468B2 Card tray, card tray plug-in device, and terminal
The present disclosure provides a card tray, a card tray plug-in device, and a terminal. The card tray may include a first supporting portion and a second supporting portion connected with the first supporting portion. The first and the second supporting portions may both be configured for placing data cards, and configured on a same side of the card tray along a thickness direction of the card tray. The card tray may include an electrical connection portion, a data card supported on the first supporting portion and/or another data card supported on the second supporting portion may electrically connect with a card holder of a terminal through the electrical connection portion.
US11018467B2 Plug-in network device with adjustable power tongs for plug attachment
A device with a plug attachment; a power plug extending from the plug attachment; adjustable power tongs; a fastening mechanism configured to fasten the power plug to the adjustable power tongs; a plug attachment cover operationally connected to the adjustable power tongs; electronic components coupled to the power plug through which power is provided from a power source to the electronic components, the electronic components causing the plug-in network device to function as a wireless access point (WAP).
US11018466B2 Electrical power transmission and outlet system
The present disclosure relates to a socket. The socket may include a housing and a plug. At least one of a slot or a hole may be positioned on at least one side of the housing. A clamping conducting strip may be positioned in the housing. At least two elastic conducting contacts may be positioned on a surface of plug. The elastic conducting contacts may connect to a power source and the plug may be positioned outside the housing. A connecting groove may be positioned on a back side of the housing. An inner contact point may be positioned in the connecting groove and be connected to the clamping conducting strip. A connector may be positioned in the plug. An external contact point may be positioned on the connector. The external contact point may be connected to the elastic conducting contact. The connector may be inserted into the connecting groove.
US11018464B2 Pin bridge connector for modular building block system for RF and microwave design
An RF signal processing system including multiple drop-in modular circuit blocks is disclosed. The drop-in modular circuit blocks include input and output launches exhibiting the same launch geometry. The RF system may include a conductive plate with a grid of holes disposed on the conductive plate. Multiple modular blocks may be installed on the conductive plate to form a cascade of modular blocks that exhibit common launch geometries. The cascade may include an RF probe with a projection and conductive pin that overhang a portion of a launch of a modular block at an end of the cascade. Flex connects may be disposed on, and held in position by, anchors to connect adjacent modular blocks together in a prototype system. A production RF system may exhibit the same overall geometry as a prototype RF system to speed up the transition from prototype design to production design.
US11018460B1 Telephone jack bracket and masking devices for mounting on same
The present disclosure relates to telephone jack covering systems that advantageously render existing telephone jacks more attractive and useful. The systems disclosed include a novel bracket that allows for existing telephone jacks to be covered with decorative and functional devices. In a preferred embodiment, an existing telephone jack is outfitted with a bracket and covered with a converter device that converts the existing telephone jack into a smart device charging station.
US11018459B2 Protection circuit against high voltages for USB type C receiver
A USB Type-C receiver device, includes: a port including a channel configuration input; a ground pin; and a protection circuit for protection against high voltages on the channel configuration input, wherein the protection circuit includes a resistive circuit coupled between the channel configuration input and the ground terminal and configured to form both a voltage divider and a resistive pull-down circuit coupled between the channel configuration input and the ground pin.
US11018456B2 Contact module for a connector assembly
A contact module includes a leadframe having signal contacts arranged in pairs. Each signal contact includes a lead having sides extending between inner and outer edges. The contact module includes a dielectric frame supporting the leadframe having a first side and a second side with windows extending through the dielectric frame between the first side and the second side. The windows exposing to air the sides, the inner edges and the outer edges of the corresponding leads along a majority of lengths of the leads. The contact module includes a shield structure having a first ground shield at the first side and a second ground shield at the second side to provide electrical shielding for the signal contacts.
US11018452B2 Positioning fastener
A positioning fastener includes a base having a seat plate extended therefrom, a fixing portion disposed below the base for fastening to an electronic substrate, and an elastic positioning structure disposed above the base and including an urging plate, a pressing plate connected to the urging plate, a positioning space defined therein and a positioning member disposed at a bottom side thereof. The urging plate and the pressing plate are squeezed backwards and elastically deformed by a circuit board that is rotated downward so that the circuit board passes the urging plate and moves into the positioning space of the elastic positioning structure and a suspended board edge of the circuit board is secured in position by the positioning member. The pressing plate can be pressed by an external force to lift the urging plate, allowing the circuit board to be rotated in direction away from the positioning member.
US11018449B2 Connector
A connector includes a housing and a terminal held by the housing and having a mounting part adapted to be mounted on a connecting member. The housing has a recess part in which a for-connection portion of the connecting member is housed and held and a protrusion protruding higher than the thickness of the for-connection portion and defining the recess part. The protrusion is located only at a peripheral edge portion of the housing.
US11018447B2 Transition coupling for terminating connector and liquidtight conduit fitting
According to various embodiments, a cable and termination system includes a cable, a liquidtight conduit at least partially surrounding the cable, and a termination. The cable includes a cable core comprising three insulated phase conductors, three ground conductors, and filler interspersed within the cable core to force the ground connectors into symmetrical, geometric location with a corresponding phase conductor and a second phase conductor, and a cable wrap applied over the cable core. The termination includes a first connector, a second, reverse-threaded connector including an exterior metal body and a male metal body coupled with a collet sleeve. Various embodiments of the first connector are also described.
US11018443B2 Coupler between a coaxial connector and a coaxial cable
A coupler (100; 100′) between a first coaxial connector and a coaxial cable (10) has a first coaxial connector with an inner conductor (2), at least one hollow cylindrical insulator part (27; 271, 272) and a hollow cylindrical outer conductor (1) and a first spring sleeve (9) for accommodating an outer conductor (11) of the coaxial cable (10), which spring sleeve is connected to the outer conductor (1) of the first coaxial connector. In addition, the coupler (100; 100′) in accordance with the invention has a locking device, which is axially movable relative to a longitudinal axis of the first coaxial connector and is supported on a conically realized outer surface (20) at a distal end of the first spring sleeve (9). The outer conductor (1) of the first coaxial connector is connected to the locking device via a bayonet connection.
US11018442B2 Connector having press contact portions separated by partition walls
Provided is a connector capable of enhancing contact reliability between a cable and a contact by improving press-contact accuracy of the cable by the contact. The connector (10) configured to clamp a core wire of a cable by a press-contact portion includes: a pair of fitting objects fitted to each other; a contact (50) provided in the fitting objects and having a pair of press-contact portions; a first partition wall (18b1) formed in one of the fitting objects; and a second partition wall (33) formed in another one of the fitting objects, in which a pair of press-contact portions of the contact (50) are spaced apart from each other and are separated by the first partition wall (18b1) and the second partition wall (33) in a pair of fitting objects fitted to each other.
US11018441B2 Wireless module
A high gain of an antenna is achieved while suppressing interference of a radio wave from an RFIC. A plurality of serial-type radiation element rows 41 are arranged in parallel. A parallel feed line 45 branches from a feed terminal of an electronic component 11, and connects radiation elements 42, at ends of the serial-type radiation element row 41 farthest from the electronic component 11, to the feed terminal of the electronic component 11. All of the serial-type radiation element rows have an identical path length, along the parallel feed line 45, from each of the radiation elements 42 at the ends farthest from the electronic component 11 to the feed terminal of the electronic component 11. An amplifier 61 is connected to the parallel feed line on a halfway portion of the parallel feed line 45. The amplifier 61 amplifies a signal passing through the parallel feed line 45.
US11018438B2 Multi-band fast roll off antenna having multi-layer PCB-formed cloaked dipoles
Disclosed is a telecommunications antenna having a plurality of cloaked low band (LB) and high band (HB) dipoles. The LB and HB dipoles provide cloaking by breaking the dipoles into dipole segments, and providing conductive cloaking elements over the gaps between dipole segments to form a plurality of capacitors along the dipole. The capacitors along the LB dipoles provide a low impedance to LB RF signals and a high impedance to HB signals. The capacitors formed on the HB dipoles provide a low impedance to RF signals and high impedance to harmonics of the LB RF signals. This cross-cloaking of dipoles enables more dense arrangements of LB and HB dipoles on an antenna array face, providing opportunities to arrange, for example, the LB dipoles with an array factor that results in an advantageous fast roll off gain pattern.
US11018437B2 Multi-band base station antennas having broadband decoupling radiating elements and related radiating elements
Radiating elements include a first and second dipole arms that extend along a first axis and that are configured to transmit RF signals in a first frequency band. The first dipole arm is configured to be more transparent to RF signals in a second frequency band than it is to RF signals in a third frequency band, and the second dipole arm is configured to be more transparent to RF signals in the third frequency band than it is to RF signals in the second frequency band. Related base station antennas are also provided.
US11018436B2 Antenna modules for phased array antennas
In some embodiments, an antenna module includes an antenna element having a first side and a second side opposite the first side; a spacer structure disposed at the second side of the antenna element and configured to define a cavity, the spacer structure configured to be physically and electrically couplable with a printed circuit board (PCB) of a receiver or a transmitter; and an amplifier located within the cavity. The first side comprises a radiating side of the antenna element.
US11018435B2 Antenna and vehicle having the same
A directional antenna apparatus capable of radiating radio signals in various directions may include first, second, third and fourth main director elements forming a square; first, second, third and fourth sub-director elements extending from the center portion of the square to the first, second, third and fourth main director elements, respectively, inside the square; first, second, third and fourth radiators disposed in parallel with the first, second, third and fourth main director elements, respectively, outside the square; and a selection switch configured to selectively connect any one of the first, second, third and fourth radiators to an external device.
US11018432B2 Slot mode antennas
The invention concerns an assembly for an antenna operating in a slot mode. It is also directed to an electronic wristwatch-like device comprising such antennas. The antenna assembly comprises at least one circuit board of an electronic device, a conductive body arranged at a distance from said at least one circuit board, at least one feed element for coupling an electromagnetic signal between said conductive body and said circuit board, and wherein at least one conductive rim structure is running peripheral to at least one said circuit board. The conductive rim and the conductive body define at least one slot mode antenna between themselves. The length of a slot mode antenna is defined between two points at which said conductive body is connected to said conductive rim.
US11018427B2 Multiplexed antennas that sector-split in a first band and operate as MIMO antennas in a second band
Base station antennas include a plurality of multiplexer filters and a multi-column array of radiating elements that includes a plurality of sub-arrays. Each filter may have a first and second ports that are configured to pass RF signals in respective first and second frequency bands and a third common port that is coupled to a respective one of a plurality of sub-arrays. These antennas also include first frequency band ports that are coupled to the first ports of respective subsets of the multiplexer filters and second frequency band ports that are coupled to the second ports of at least some of the multiplexer filters. The antenna may operate as a MIMO sector antenna in the first frequency band and as a sector-splitting antenna in the second frequency band.
US11018424B2 Multi radiator antenna comprising means for indicating antenna main lobe direction
A multi radiator antenna comprising an electrically conductive reflector, at least two radiating elements arranged on said reflector, a feeding network connected to the radiating elements, and a protective cover. The feeding network comprises a plurality of conductors for distributing signals to the radiators. The feeding network has means for adjusting relative phases of said signals in order to adjust a direction of the antenna main lobe of said multi-radiator base station antenna. The means for adjusting is provided with, or is connected to, an indicating portion configured to provide a visual indication of said direction. The protective cover is provided with an at least partially transparent wall portion arranged such that said indicating portion is visible there through.
US11018415B2 Electronic device including an antenna structure
An electronic device is provided. The electronic device includes a housing structure that includes a ceramic portion including a ceramic material, and a polymer portion formed on an inner surface of the ceramic portion and including a polymer material, and an antenna structure that is disposed within the housing structure and radiates a radio frequency (RF) signal to an outside of the housing structure. The housing structure includes a first portion including at least a portion of a region through which the RF signal passes, and a second portion formed around the first portion. In the first portion, a ratio of a thickness of the polymer portion to an entire thickness of the first portion is a first ratio. In the second portion, a ratio of a thickness of the polymer portion to an entire thickness of the second portion is a second ratio.
US11018414B2 Electronic device comprising antenna
An electronic device is provided. The electronic device includes a housing, a first antenna radiator configured to transmit a signal having a target frequency to a vehicle and exposed to an outside of the housing, a second antenna radiator spaced apart from the first antenna radiator, configured to transmit the signal having the target frequency to the vehicle, and exposed to the outside of the housing, a conductive line disposed in an interior of the housing and electrically connecting the first antenna radiator and the second antenna radiator, and a feeding part configured to supply power to one point of the conductive line, wherein a first electrical length formed by the feeding part, the one point of the conductive line, and the first antenna radiator is different from a second electrical length formed by the feeding part, the one point of the conductive line, and the second antenna radiator.
US11018412B2 Antenna module supporting dual bands and electronic device including the same
An electronic device including a housing; a display; a wireless communication circuit comprising a first port, a second port, a third port, and a fourth port, wherein the wireless communication circuit is configured to transmit a first signal having a first frequency via the first port; receive a second signal having the first frequency via the second port; transmit a third signal having a second frequency different from the first frequency via the third port; and receive a fourth signal having the second frequency via the fourth port; and an antenna structure disposed inside the housing, wherein the antenna structure comprises: a conductive pattern; a first node, a second node, and a third node electrically connected to the conductive pattern; a first electrical path; a second electrical path; a third electrical path; a fourth electrical path; a fifth electrical path; a sixth electrical path; and a seventh electrical path.
US11018411B2 RF antenna arrangement configured to be a part of a lid to an apparatus
An RF antenna arrangement has the same or slightly larger footprint as the RF shield for radio chips on a printed circuit board. The apparatus includes a printed circuit board, a digital processor, a radio chip(s), a radio frequency shield, a lid, and an RF antenna arrangement(s). The lid has the same or slightly larger footprint as the RF shield, which enables the lid to fit on the RF shield. The RF antenna is formed as an integral part of the lid. The apparatus also includes an RF transmission coaxial cable(s) having a first end physically and electrically connected to the RF antenna arrangement(s) and the surface of the lid, and a second end electrically coupled to an RF connector. By forming the antenna arrangement(s) from the lid, this invention solves the space constraint problems of antenna placements for wireless device applications. Additionally, this invention is cost-effective and simple to manufacture.
US11018410B2 Wireless communication module
A wireless communication module includes a first circuit board, a second circuit board, a chip antenna, an electrical connector and an electrical conductive member. The first circuit board and the second circuit board are electrically connected to each other and arranged in parallel spaced relationship. The chip antenna is located on the first circuit board. The electrical connector is located on the second circuit board and between the first and second circuit boards. The electrical conductive member extends from a metal housing of the electrical connector and has at least a radiation aid portion and a shielding portion. The electrical conductive member and the first circuit board collectively define a hollow space, wherein the electrical connector and the electrical conductive member are electrically connected to the chip antenna to serve as an electromagnetic radiation aid member for the chip antenna.
US11018406B2 Radiofrequency communication module for a tire
A radiofrequency communication module or semi-finished product able to be integrated into the structure of a tire comprises a radiofrequency transponder embedded in a rubber blend and comprising an electronic chip and a radiating antenna that is able to communicate with a radiofrequency reader. The radiofrequency transponder in addition comprises a primary antenna that is electrically connected to the electronic chip, the primary antenna is electromagnetically coupled to the radiating antenna, the radiating antenna consists of a single-strand helical spring, and the radiating antenna has a core made of steel coated with a metal exterior adhesion layer for adhesion to the rubber blend that surrounds it.
US11018402B2 High speed data communication system
High speed waveguide-based data communication systems are disclosed. Such systems may include separable electrical connectors, forming signal propagation paths between electronic assemblies with one or more waveguides.
US11018398B2 Fastening assembly on a battery housing and battery housing having such a fastening assembly
The invention relates, inter alia, to an assembly for fastening an upper shell or a lid to a lower shell of a battery housing, said assembly having at least one fastening element, by means of which the upper shell or the lid is or can be frictionally connected to the lower shell in the region of contact flanges, which correspond with each other and are laid one over the other. The at least one fastening element is formed by a rail element that has a U-profile-shaped cross-section at least in some sections which rail element has a web and an upper and a lower flange and is or can be slid onto the contact flanges from the end edges of the contact flanges, which are laid one over the other, and is or can be at least frictionally connected to the contact flanges as a result of a subsequent movement in the longitudinal direction of the contact flanges.
US11018392B2 Battery module carrier, battery module and vehicle with a battery system
A battery module carrier includes a carrier frame configured to accommodate a first component carrier and a second component carrier. The first component carrier includes a control electronics assembly and a signal port, and the second component carrier is configured to accommodate a battery submodule. The carrier frame is configured to provide an external electronic connection to the first component carrier via the signal port, and each of the first component carrier and the second component carrier are configured to be individually attached and detached from the carrier frame.
US11018387B2 Moisture and carbon dioxide management system in electrochemical cells
An electrochemical cell utilizes an air flow device that draws air through the cell from a scrubber that may be removed while the system is operating. The negative pressure generated by the air flow device allows ambient air to enter the cell housing when the scrubber is removed, thereby enabling continued operation without the scrubber. A moisture management system passes outflow air from the cell through a humidity exchange module that transfers moisture to the air inflow, thereby increasing the humidity of the air inflow. A recirculation feature comprising a valve allow a controller to recirculate at least a portion of the outflow air back into the inflow air. The system may comprise an inflow bypass conduit and valve that allows the humidified inflow air to pass into the cell inlet without passing through the scrubber. The scrubber may contain reversible or irreversible scrubber media.
US11018381B2 Battery module with interconnect board assembly having integrated cell sense PCB-flex circuit hardware
An interconnect board (ICB) assembly is used with a battery module and a battery controller. The ICB assembly includes a printed circuit board assembly (PCBA) integrally formed from a printed circuit board (PCB) and a flex circuit. The PCB has a component surface populated with electronic components which measure and report parameters of the battery module to the battery controller. The flex circuit is constructed of conductive foil, and defines tabular flying leads that project from a periphery of the flex circuit. A window may be present in the flex circuit. A carrier frame has a support surface flanked by busbars. The PCBA is seated on the support surface, with the flying leads conductively joined to a corresponding busbar. A battery system includes the battery controller and the ICB assembly.
US11018379B2 Electrode, secondary battery using same, and method for manufacturing electrode
Provided are an electrode capable of preventing separation of a short-circuit prevention layer since the short-circuit prevention layer, which is made of a heat-resistant polymer fiber, can be attached with high binding force when formed on the surface of the electrode, in the case that an active material layer includes a predetermined amount of polyvinylidene fluoride (PVdF) as a binder; a secondary battery using the same; and a method of manufacturing the electrode. The electrode includes: an electrode current collector; an active material layer formed on the electrode current collector; and a short-circuit prevention layer formed on the active material layer, wherein the short-circuit prevention layer includes a porous polymer fiber web having a plurality of pores through accumulation of ultrafine fibers of a heat-resistant polymer material, and the active material layer includes PVdF as a binder.
US11018377B2 Secondary battery, battery pack, and vehicle
According to one embodiment, a secondary battery is provided. The secondary battery includes a positive electrode, an aqueous electrolyte, a separator, and a negative electrode including a negative electrode active material-containing layer. The negative electrode active material-containing layer includes negative electrode active material particles and solid electrolyte particles having lithium ion conductivity. The porosity of the negative electrode active material-containing layer is within a range of 0.1% to 28%. The water content of the negative electrode active material-containing layer is within a range of 0.01 g/cm3 to 0.4 g/cm3.
US11018376B2 Nanoparticle compositions and methods for enhancing lead-acid batteries
This disclosure relates to compositions and methods for improving the performance of lead-acid batteries, including reviving or rejuvenating a partially or totally dead battery, by adding an amount of nonionic, ground state metal nanoparticles to the electrolyte of the battery, and optionally recharging the battery by applying a voltage. The metal nanoparticles may be gold and coral-shaped, and are added to provide a concentration within the electrolyte of 100 ppb to 2 ppm.
US11018373B2 Solid electrolyte containing composite metal halide containing magnesium, gallium, indium, and halogen, and secondary battery including the same
A solid electrolyte contains a composite metal halide. The composite metal halide contains magnesium, gallium, indium, and a halogen. In the composite metal halide, the molar ratio of indium to the total of gallium and indium is less than 0.2.
US11018372B2 Interlayer sodium electrodes for sodium ion batteries
A sodium-ion battery includes an electrode and a passivation layer on the electrode material.
US11018371B1 Functional aliphatic and/or aromatic amine compounds or derivatives as electrolyte additives to reduce gas generation in li-ion batteries
Systems and methods for batteries comprising a cathode, an electrolyte, and an anode, wherein functional aliphatic and/or aromatic amine compounds or derivatives are used as electrolyte additives to reduce gas generation in Li-ion batteries.
US11018365B2 Semi-solid electrodes having high rate capability
Embodiments described herein relate generally to electrochemical cells having high rate capability, and more particularly to devices, systems and methods of producing high capacity and high rate capability batteries having relatively thick semi-solid electrodes. In some embodiments, an electrochemical cell includes an anode and a semi-solid cathode. The semi-solid cathode includes a suspension of an active material of about 35% to about 75% by volume of an active material and about 0.5% to about 8% by volume of a conductive material in a non-aqueous liquid electrolyte. An ion-permeable membrane is disposed between the anode and the semi-solid cathode. The semi-solid cathode has a thickness of about 250 μm to about 2,000 μm, and the electrochemical cell has an area specific capacity of at least about 7 mAh/cm2 at a C-rate of C/4. In some embodiments, the semi-solid cathode slurry has a mixing index of at least about 0.9.
US11018364B2 Flow battery
A flow battery includes: a first liquid containing dissolved therein a condensed aromatic compound and lithium; a first electrode immersed in the first liquid; and a first circulator including a first container and a first passage prevention member. The first liquid containing the condensed aromatic compound dissolved therein has the property of causing the lithium to release solvated electrons and dissolve as cations. When the lithium dissolved in the first liquid precipitates on the first electrode, lithium precipitate particles are generated. The first circulator circulates the first liquid between the first electrode and the first container. The first circulator transfers the lithium precipitate particles generated on the first electrode to the first container. The first passage prevention member is disposed in a channel through which the first liquid flows from the first container to the first electrode. The first passage prevention member prevents passage of the lithium precipitate particles.
US11018362B2 System for generating electricity using oxygen from water
Oxygen from water can be efficiently and economically achieved via water electrolysis on antimony, nickel doped tin oxide (Sb,Ni—SnO2/Ti) anode using low DC power. As O2 is evolved, it will be quickly reduced by adjacent cobalt oxide doped carbon nanofilm (Co3O4—CNF/Ti) to hydrogen peroxide (H2O2) and electricity. In the said electricity generation, O2 is first formed in O2 evolution reaction (OER), then, electricity is generated in O2 reduction reaction (ORR). Both of anode and cathode are shared by OER and ORR, yet, the former consumes energy and the latter yields electricity. It is the cathode, a load and the anode that form an electricity-forming circuit. The said circuit relies on clean water to supply the fuel, O2, hence, it is designated as all-water fuel cell (AWFC). Supercapacitor is employed as the load for AWFC, and onboard purifiers are providers of clean water for AWFC.
US11018359B2 Thermal management of fuel cell units and systems
Various designs and configurations of and methods of operating fuel cell units, fuel cell systems and combined heat and power systems are provided that permit efficient thermal management of such units and systems to improve their operation.
US11018358B2 Pinhole determination method and system for fuel cell
A pinhole determination method for a fuel cell includes steps of blocking air supply to a fuel cell stack by a controller; measuring a cell voltage value of each of unit fuel cells of the fuel cell stack; and determining whether or not a pinhole is present by comparing the cell voltage value with an average cell voltage value.
US11018349B2 Catalyst for oxygen reduction electrode and method for manufacturing same
The present invention relates to a non-platinum catalyst for an oxygen reduction electrode, in which iron nanoparticles are dispersed in nitrogen-doped mesoporous carbon nanofibers, and the surfaces of the iron nanoparticles are at least partially exposed to the outside. In addition, the present invention relates to a method for producing a non-platinum catalyst for an oxygen reduction electrode using electrospinning and hydrogen activation reactions.
US11018347B2 Cyclic regeneration of nanostructured composites for catalytic applications
A cermet catalyst material, defining a matrix having interconnected open pores, the matrix selected from the group consisting of YSZ and CGO and defining a substrate, a ceramic coating having a general formula AyBnOx at least partially coating the pores, and a plurality of metal particles A at least partially embedded in the ceramic coating. A is selected from the group consisting of Co, Cu, Ce, Ni, Ti, and combinations thereof and B is selected from the group consisting of Mo, W, Ce, and combinations thereof. When the coating is in a first oxidizing atmosphere and at a temperature between 400 degrees Celsius and 800 degrees Celsius the metal particles are absorbed into the coating in the form of metal cations, giving the coating the general formulation AyBnOx′. When the coating is in a reducing atmosphere and at a temperature between about 400 degrees Celsius and about 800 degrees Celsius the B metal cations emerge from the coating to yield a plurality of B metal particles at least partially embedded in the coating, wherein the reduced coating has a general formula Ay-zBnOx, wherein y>z and x′>x.
US11018344B2 Current collector for electrical storage device, method for producing the same, and coating liquid used in said production method
A current collector for electrical storage device includes a sheet-shaped conductive substrate and a coating layer disposed on one or both sides of the conductive substrate. The coating layer includes a powdery carbon material, acid-modified polyvinylidene fluoride and polyvinylpyrrolidone. The content of the polyvinylpyrrolidone is 0.099 to 5.0 mass %. The content of the powdery carbon material in the coating layer is 15.0 to 45.0 mass %. Also disclosed is a coating liquid for producing the current collector for electrical storage device as well as a method for producing the current collector for electrical storage device.
US11018340B2 Negative electrode for rechargeable lithium battery and rechargeable lithium battery including same
A negative electrode for a rechargeable lithium battery includes a negative active material layer including a negative active material, and a current collector supporting the negative active material layer. The negative active material may include first spherical crystalline carbon, the first spherical crystalline carbon including secondary particles in which primary particles of crystalline carbon are assembled, the first spherical crystalline carbon having a coating of crystalline carbon, second spherical crystalline carbon, the second spherical crystalline carbon including secondary particles in which primary particles of crystalline carbon are assembled, the second spherical crystalline carbon having a coating of amorphous carbon, and flake-shaped graphite.
US11018329B2 Traction battery spacer with retention element
A battery assembly includes a plurality of cells stacked to form an array and a plurality of spacers each disposed between an adjacent pair of the cells. Each cell includes at least one terminal. Each of the spacers includes a retainer extending from an edge portion of the spacer. The retainers are configured to orient and engage a busbar for connecting the terminals of an adjacent pair of cells. The battery assembly may also include a busbar module. The busbar module may engage with the retainers to hold the busbar module to the array.
US11018328B2 Method and apparatus for manufacturing display substrate
A method and an apparatus for manufacturing a display substrate are provided. The method includes: a back film material forming step of forming a back film material having first adhesion on a substrate, the substrate includes a substrate region and a peripheral region surrounding the substrate region, and the substrate region includes a display region, a bending region, and a bonding region sequentially arranged in a first direction; a back film cutting step of cutting the back film material along outlines of the display region and the bonding region; a back film removing step of removing the back film material in the peripheral region and the bending region; and a back film adhesion enhancing step of enhancing adhesion of the back film material in the display region and the bonding region from the first adhesion to second adhesion, so as to form a back film on the substrate.
US11018322B2 Light emitting device using light emitting diode
A light emitting device comprises an emission area and a non-emission area defined at a substrate, wherein the non-emission area includes a first non-emission area and a second non-emission area where a first pad and a second pad are respectively disposed; a light emitting diode disposed over the substrate and including a first electrode, an emission layer and a second electrode; an auxiliary electrode directly contacting the first electrode; a buffer layer disposed between the substrate and the light emitting diode; and a light extraction layer disposed between the buffer layer and the substrate, wherein the first electrode includes a contact portion directly contacting the auxiliary electrode, an electrode portion disposed in the emission area and a short-circuit-preventing portion disposed between the contact portion and the electrode portion.
US11018320B2 Display device
A display device includes a display region including light emitting elements; a first inorganic insulating layer covering the light emitting elements; a first organic insulating layer on the first inorganic insulating layer; a second organic insulating layer on the first organic insulating layer; a third organic insulating layer on the second organic insulating layer; and a second inorganic insulating layer on the third organic insulating layer. Edges of the first to third organic insulating layers are between edges of the first and second inorganic insulating layers and an edge of the display region; the edge of the second organic insulating layer is between the edge of the first organic insulating layer and the edge of the display region; and the edge of the third organic insulating layer is between the edges of the first and second inorganic insulating layers and the edge of the second organic insulating layer.
US11018316B2 Organic device and method of manufacturing the same
A device comprising a first layer, a sealing layer and a resin layer stacked in that order and an organic layer arranged between the first layer and the sealing layer in a pixel region is provided. The first, sealing and resin layers have openings for exposing an electrode in a peripheral region. The sealing layer includes second and third layers each having a water permeability lower than the first layer, and a fourth layer arranged between the second layer and the third layer and having a defect density lower than the second layer. A step of the second layer arranged above the end of the opening of the first layer is covered with the fourth layer and a step of the third layer arranged above the end of the opening of the first layer is covered with the resin layer.
US11018310B2 Luminescent tetradentate gold(III) compounds for organic light-emitting devices and their preparation
A highly rigid tetradentate ligand is combined with a gold(III) ion as a thermally stable tetradentate gold(III) complex. The tetradentate gold(III) complex is a tetradentate gold(III) compound that can be used as a light-emitting material which can be used for fabricated of light-emitting devices such as an organic light-emitting diode (OLED). The tetradentate gold(III) compound can be deposited as a layer or a component of a layer using a solution-process or a vacuum deposition process. The luminescent tetradentate gold(III) compounds are robust and can provide electroluminescence (EL) with a high efficiency and brightness.
US11018300B2 Self-aligned memory decks in cross-point memory arrays
A multi-layer memory device with an array having multiple memory decks of self-selecting memory cells is provided in which N memory decks may be fabricated with N+1 mask operations. The multiple memory decks may be self-aligned and certain manufacturing operations may be performed for multiple memory decks at the same time. For example, patterning a bit line direction of a first memory deck and a word line direction in a second memory deck above the first memory deck may be performed in a single masking operation, and both decks may be etched in a same subsequent etching operation. Such techniques may provide efficient fabrication which may allow for enhanced throughput, additional capacity, and higher yield for fabrication facilities relative to processing techniques in which each memory deck is processed using two or more mask and etch operations per memory deck.
US11018299B2 Memory cell having resistance variable film and method of making the same
A manufacture includes a first electrode having an upper surface and a side surface, a resistance variable film over the first electrode, and a second electrode over the resistance variable film. The resistance variable film extends along the upper surface and the side surface of the first electrode. The second electrode has a side surface. A portion of the side surface of the first electrode and a portion of the side surface of the second electrode sandwich a portion of the resistance variable film.
US11018298B2 Phase change memory structures
A phase change memory structure (100) includes a phase change material layer (110), a top electrode layer (120) above the phase change material layer, a metal silicon nitride layer (130) in contact with the top electrode layer opposite from the phase change material layer, a metal silicide layer (140) in contact with the metal silicon nitride layer opposite from the top electrode layer, and a conductive metal bit line (150) in contact with the metal silicide layer opposite from the metal silicon nitride layer.
US11018293B2 Magnetoresistance effect element
A magnetoresistance effect element has a first ferromagnetic metal layer, a second ferromagnetic metal layer, and a tunnel barrier layer that is sandwiched between the first and second ferromagnetic metal layers, and a tunnel barrier layer that is sandwiched between the first and second ferromagnetic metal layers, the tunnel barrier layer is expressed by a composition formula of AB2Ox (0
US11018291B2 Ultrasonic device and ultrasonic apparatus
An ultrasonic device includes a vibration portion, a first electrode, a piezoelectric body, and a second electrode which are laminated in this order in a laminate direction, in which an outer circumferential edge of the first electrode is larger than an outer circumferential edge of the piezoelectric body in a plan view across the laminate direction, in which the piezoelectric body includes an active portion that is provided in the vibration portion, and an extraction portion that is connected to the active portion and is provided over the inside and the outside of the vibration portion, in which a width dimension of the extraction portion is smaller than a width dimension of the active portion, and in which the second electrode is provided on the active portion and the extraction portion.
US11018289B2 Thermoelectric generation system
Disclosed is a thermoelectric generation system that generates electricity using waste heat from a steam condenser that exchanges heat with steam as cyclic water flows through a high temperature portion and a low temperature portion, the thermoelectric generation system including: a first hot-water discharge line used to discharge the cyclic water passing through the high temperature portion; a cyclic water circulation line through which the cyclic water from under water circulates; and a thermoelectric generation unit that generates electricity on the basis of a temperature difference between a temperature of the cyclic water flowing through the first hot-water discharge line and a temperature of the cyclic water flowing through the cyclic water circulation line.
US11018287B2 System and method of manufacture for LED packages
A light emitting diode (LED) package includes an aluminum nitride (AlN) substrate, a patterned copper layer with polished portions formed on a first side of the substrate, at least one LED disposed over the polished portions of the patterned copper layer, covers incorporating one or more phosphors disposed over the LEDs, a silicone fill and dam walls. The silicone fill, which is bordered by silicone dam walls and silicone fill surfaces, is formed in between the LEDs and covers. In some embodiments, the silicone fill does not extend over the covers. The silicone fill surface and the ends of the dam walls are substantially planar with an end of the substrate. The LED package can also include a thermal pad disposed on an opposite side of the substrate. Embodiments also include methods for make the LED package.
US11018285B2 Display device and manufacturing method thereof
A display device and a manufacturing method thereof, wherein the display device includes a light emitting diode chip, including: a light emitting structure which includes a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer interposed between the first and second conductive semiconductor layers; a second electrode which is electrically connected to the second conductive semiconductor layer; an insulation unit which is disposed to cover a part of the top surface of the second electrode and side surfaces of the light emitting structure; and a second fixed part which covers the top surface of the insulation unit and is electrically connected to the second electrode, and at least a part of which extends to the side surfaces of the light emitting structure.
US11018283B2 Method of producing optoelectronic semiconductor components and an optoelectronic semiconductor component
A method of producing optoelectronic semiconductor components including providing a primary light source having a carrier and a semiconductor layer sequence mounted thereon that generates primary light (B), wherein the semiconductor layer sequence is structured into a plurality of pixels that can be driven electrically independently of each other, and the carrier includes a plurality of control units that drive the pixels, providing at least one conversion unit adapted to convert the primary light (B) into at least one secondary light (G, R), wherein the conversion unit is grown continuously from at least one semiconductor material, structuring the conversion unit, wherein portions of the semiconductor material are removed in accordance with the pixels, and applying the conversion unit to the semiconductor layer sequence so that the remaining semiconductor material is uniquely assigned to a portion of the pixels.
US11018282B2 LED device
A LED device includes LED chips mounted on a substrate, a first fluorescent layer, a second fluorescent layer and a package housing. The LED chips emit a blue light. The first fluorescent layer has a first side facing to the LED chips for converting the blue light to a red light. The second fluorescent layer has a first side attached to a second side of the first fluorescent layer for converting the blue light to a red light emitted from a second side of the second fluorescent layer. The package housing holds the substrate and the first fluorescent layer.
US11018277B2 Semiconductor layer sequence and method for producing a semiconductor layer sequence
A semiconductor layer sequence and a method for producing a semiconductor layer sequence are disclosed. In an embodiment a semiconductor layer sequence includes a first nitridic compound semiconductor layer, an intermediate layer, a second nitridic compound semiconductor layer and an active layer, wherein the intermediate layer comprises an AlGaN layer with an Al content of at least 5%, wherein the second nitridic compound semiconductor layer has a lower proportion of Al than the AlGaN layer such that relaxed lattice constants of the AlGaN layer of the intermediate layer and of the second nitridic compound semiconductor layer differ, wherein the second nitridic compound semiconductor layer and the active layer are grown on the intermediate layer in a lattice-matched manner, wherein the active layer comprises one or more layers of AlInGaN, and wherein an In content in each of the layers of AlInGaN is at most 12%.
US11018270B2 Flux coating device and method for solar cell panel, and apparatus for attaching interconnector of solar cell panel
A flux coating device for a solar cell panel, can include a flux bath configured to receive flux and having an inlet and an outlet, in which the inlet and the outlet of the flux bath are configured to pass an interconnector below a surface of the flux, and the interconnector can include a wiring material including: a rounded portion or a circular cross-section, a core layer, and a solder layer formed on a surface of the core layer.
US11018269B2 Thin optoelectronic modules with apertures and their manufacture
The wafer-level manufacturing method makes possible to manufacture ultrathin optical devices such as opto-electronic modules. A clear encapsulation is applied to an initial wafer including active optical components and a wafer-size substrate. Thereon, a photostructurable opaque coating is produced which includes apertures. Then, trenches are produced which extend through the clear encapsulation and establish side walls of intermediate products. Then, an opaque encapsulation is applied to the intermediate products, thus filling the trenches. Cutting through the opaque encapsulation material present in the trenches, singulated optical modules are produced, wherein side walls of the intermediate products are covered by the opaque encapsulation material. The wafer-size substrate can be attached to a rigid carrier wafer during most process steps.
US11018268B2 Solar cells for shingled solar cell module, shingled solar cell module, and method of making solar cells
The present disclosure relates to solar cells for a shingled solar cell module, a shingled solar cell module, and a method of making solar cells for the shingled solar cell module. Said solar cell has a front side and a back side, a plurality of front side busbars being arranged on the front side, a plurality of back side busbars being arranged on the back side, the solar cell comprising a plurality of sections, each section comprising a front side busbar and a back side busbar located at edges thereof, the front side busbar of at least one section of the solar cell having an extension at one end or both ends, the extension extending along another edge of said at least one section intersecting with the above-mentioned edges. The shingled solar cell module is fabricated from solar cell strips split from the solar cell.
US11018266B2 Reduced surface field layer in varactor
Various embodiments of the present disclosure are directed towards a varactor comprising a reduced surface field (RESURF) region. In some embodiments, the varactor includes a drift region, a gate structure, a pair of contact regions, and a RESURF region. The drift region is within a substrate and has a first doping type. The gate structure overlies the drift region. The contact regions are within the substrate and overlie the drift region. Further, the contact regions have the first doping type. The gate structure is laterally sandwiched between the contact regions. The RESURF region is in the substrate, below the drift region, and has a second doping type. The second doping type is opposite the first doping type. The RESURF region aids in depleting the drift region under the gate structure, which decreases the minimum capacitance of the varactor and increases the tuning range of the varactor.
US11018262B2 Field-effect transistor, method for producing the same, display element, image display device, and system
A field-effect transistor including: a gate electrode, which is configured to apply gate voltage; a source electrode and a drain electrode, which are configured to take electric current out; an active layer, which is disposed between the source electrode and the drain electrode and is formed of an oxide semiconductor; and a gate insulating layer, which is disposed between the gate electrode and the active layer, the source electrode and the drain electrode each including a metal region formed of a metal and an oxide region formed of one or more metal oxides, and a part of the oxide region in each of the source electrode and the drain electrode being in contact with the active layer, and rest of the oxide region being in contact with one or more components other than the active layer.
US11018258B2 Device of dielectric layer
A device includes a semiconductor fin and a shallow trench isolation (STI) structure. The semiconductor fin extends from a semiconductor substrate. The STI structure is around a lower portion of the semiconductor fin, and the STI structure includes a liner layer and an isolation material. The liner layer includes a metal-contained ternary dielectric material. The isolation material is over the liner layer.
US11018257B2 Semiconductor device structure having a plurality of threshold voltages and method of forming the same
An embodiment method includes forming a semiconductor liner layer on a first fin structure and on a second fin structure and forming a first capping layer on the semiconductor liner layer disposed on the first fin structure. The method further includes forming a second capping layer on the semiconductor liner layer disposed on the first fin structure, where a composition of the first capping layer is different from a composition of the second capping layer. The method additionally includes performing a thermal process on the first capping layer, the second capping layer, and the semiconductor liner layer to form a first channel region in the first fin structure and a second channel region in the second fin structure. A concentration profile of a material of the first channel region is different from a concentration profile of a material of the second channel region.
US11018256B2 Selective internal gate structure for ferroelectric semiconductor devices
The present disclosure relates to a semiconductor device including a substrate and first and second spacers on the substrate. The semiconductor device also includes a gate stack between the first and second spacers. The gate stack includes a gate dielectric layer having a first portion formed on the substrate and a second portion formed on the first and second spacers; an internal gate formed on the first and second portions of the gate dielectric layer; a ferroelectric dielectric layer formed on the internal gate and in contact with the gate dielectric layer; and a gate electrode on the ferroelectric dielectric layer.
US11018252B2 Power semiconductor transistor
A power semiconductor transistor includes a semiconductor body having a front side and a backside with a backside surface. The semiconductor body includes a drift region of a first conductivity type and a field stop region of the first conductivity type. The field stop region is arranged between the drift region and the backside and includes, in a cross-section along a vertical direction from the backside to the front side, a concentration profile of donors of the first conductivity type that has: a first local maximum at a first distance from the backside surface, a front width at half maximum associated with the first local maximum, and a back width at half maximum associated with the first local maximum. The front width at half maximum is smaller than the back width at half maximum and amounts to at least 8% of the first distance.
US11018251B2 Semiconductor device
A semiconductor device includes a semiconductor body; first and second electrodes provided on back and front surfaces of the semiconductor body, respectively; a third electrode provided on the front surface; and a control electrode disposed inside a trench on the front surface side, and electrically connected to the third electrode. The third electrode is electrically insulated from the semiconductor body and the second electrode. The control electrode is placed between the semiconductor body and the second electrode, and is electrically insulated from the semiconductor body and the second electrode. The control electrode continuously extends inside the trench without branching. The control electrode includes first and second portions. The first portion extends in a first direction parallel to the front surface of the semiconductor body, and the second portion extends in a second direction parallel to the front surface of the semiconductor body and crossing the first direction.
US11018250B2 Semiconductor device with multi-branch gate contact structure
According to an embodiment of a semiconductor device, the semiconductor device includes: a first active cell area comprising a first plurality of parallel gate trenches; a second active cell area comprising a second plurality of parallel gate trenches; and a metallization layer above the first and the second active cell areas. The metallization layer includes: a first part contacting a semiconductor mesa region between the plurality of parallel gate trenches in the first and the second active cell areas; and a second part surrounding the first part. The second part of the metallization layer contacts the first plurality of gate trenches along a first direction and the second plurality of gate trenches along a second direction different from the first direction.
US11018248B2 Semiconductor device and method for manufacturing the same
According to one embodiment, a semiconductor device includes first to third electrodes, first and second semiconductor layers, a nitride layer, and an oxide layer. A direction from the second electrode toward the first electrode is aligned with a first direction. A position in the first direction of the third electrode is between the first electrode and the second electrode in the first direction. The first semiconductor layer includes first to fifth partial regions. The first partial region is between the fourth and third partial regions in the first direction. The second partial region is between the third and fifth partial regions in the first direction. The nitride layer includes first and second nitride regions. The second semiconductor layer includes first and second semiconductor regions. The oxide layer includes silicon and oxygen. The oxide layer includes first to third oxide regions.
US11018247B1 Semiconductor device with a base link region and method therefor
A semiconductor device includes a semiconductor substrate with a collector region formed within the semiconductor substrate. A base region, including a first base region and a second base region, is formed over the collector region. An extrinsic base region is formed laterally adjacent to and coupled to the second base region. A base link region is disposed proximate to the second base region, wherein the base link region couples the extrinsic base sidewall to the second base region. A method for forming a semiconductor device includes forming the collector region within the semiconductor substrate, forming a plurality of dielectric layers over the collector region, forming an extrinsic base layer over the collector region, etching an emitter window, forming the first base region over the collector region, forming the second base region over the first base region, wherein forming the second base region includes forming the base link region.
US11018238B2 Structure, method for manufacturing same, semiconductor element, and electronic circuit
A structure including a metal oxide semiconductor layer and a noble metal oxide layer, wherein the metal oxide semiconductor layer and the noble metal oxide layer are adjacent to each other, and a film thickness of the noble metal oxide layer is more than 10 nm.
US11018237B2 Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
An electrical device in which an interface layer is disposed in between and in contact with a conductor and a semiconductor.
US11018236B2 Thin film transistor, array substrate, display panel and method for manufacturing thin film transistor
The present disclosure provides a thin film transistor, including a base substrate, an active layer and a source/drain, and a conductive layer. The active layer and an outer edge of the conductive layer are formed in the same etching process. The present disclosure further provides a method for manufacturing a thin film transistor, including forming an active material layer and a conductive material layer, forming a photoresist on the conductive material layer, exposing and developing the photoresist by means of a halftone mask, removing segments of the active material layer and the conductive material layer corresponding to a photoresist completely-removed region by a same etching process, partially removing the photoresist in a photoresist completely-retained region and completely removing the photoresist in a photoresist partially-retained region, and removing a segment of the conductive material layer corresponding to the photoresist partially-retained region.
US11018234B2 Semiconductor device and manufacturing method thereof
A semiconductor device includes a semiconductor substrate and a gate structure. The semiconductor substrate includes a first semiconductor fin and a second semiconductor fin. The gate structure includes a work function metal structure crossing over the first semiconductor fin and the second semiconductor fin. The work function metal structure comprises a first portion over a portion of the first semiconductor fin, a second portion over a portion of the second semiconductor fin, and a third portion connecting the first portion to the second portion, wherein a thickness of the third portion is smaller than a thickness of the second portion and greater than a thickness of the first portion along an extension direction of the second semiconductor fin.
US11018230B1 Semiconductor devices with a mixed crystal region
An embodiment of a semiconductor device may include a semiconductor substrate, a first semiconductor region comprising a first material with a first polarity formed within the semiconductor substrate and a second semiconductor region comprising the first material with a second polarity formed within the semiconductor substrate and coupled to the first semiconductor region. In an embodiment, a semiconductor device may also include a first electrode coupled to the first semiconductor region, a second electrode coupled to the second semiconductor region, and a depletion region formed between the first semiconductor region and the second semiconductor region. The depletion region may include a mixed crystal region that includes a mixed crystal alloy of the first material and a second material, wherein the mixed crystal region has a lower bandgap energy than a bandgap energy of the first material.
US11018229B2 Methods of forming semiconductor structures
A method of forming a semiconductor structure includes forming a first material over a base material by vapor phase epitaxy. The first material has a crystalline portion and an amorphous portion. The amorphous portion of the first material is removed by abrasive planarization. At least a second material is formed by vapor phase epitaxy over the crystalline portion of first material. The second material has a crystalline portion and an amorphous portion. The amorphous portion of the second material is removed by abrasive planarization. A semiconductor structure formed by such a method includes the substrate, the first material, the second material, and optionally, an oxide material between the first material and the second material. The substrate, the first material, and the second material define a continuous crystalline structure. Semiconductor structures, memory devices, and systems are also disclosed.
US11018228B2 Silicon carbide semiconductor device
A silicon carbide semiconductor device includes a first doped region including a plurality of first leg portions, a plurality of body portions, and a plurality of first arm portions. The first leg portions are extending along a second direction, the body portions connect at least two of the first leg portions, and the first arm portions are extending along a first direction and connecting at least two of the first leg portions. A second doped region includes a plurality of second leg portions, a plurality of source portions, and a plurality of second arm portions. The second leg portions are extending along the second direction, the source portions are arranged in the body portions and connecting at least two of the second leg portions, and the second arm portions are extending along the first direction and connecting at least two of the second leg portions.
US11018227B2 Semiconductor storage device, method of controlling semiconductor storage device, computer program product, and method of fabricating semiconductor storage device
A semiconductor storage device comprises a plurality of memory cells arranged in a matrix. Each of the memory cells includes: a semiconductor storage element including a silicon carbide substrate and a silicon carbide film on a first surface of the silicon carbide substrate; a lower electrode on a second surface facing away from the first surface of the silicon carbide substrate; and an upper electrode on at least part of a surface of the silicon carbide film, the surface facing away from another surface of the silicon carbide film in contact with the silicon carbide substrate. Each memory cell includes at least one basal plane dislocation formed at at least part of the semiconductor storage element.
US11018225B2 III-V extension by high temperature plasma doping
A method for forming an overlap transistor includes forming a gate structure over a III-V material, wet cleaning the III-V material on side regions adjacent to the gate structure and plasma cleaning the III-V material on the side regions adjacent to the gate structure. The III-V material is plasma doped on the side regions adjacent to the gate structure to form plasma doped extension regions that partially extend below the gate structure.
US11018223B2 Methods for forming device isolation for semiconductor applications
The present disclosure provide methods for forming nanowire structures with desired materials horizontal gate-all-around (hGAA) structures field effect transistor (FET) for semiconductor chips. In one example, a method of forming nanowire structures on a substrate includes forming a multi-material layer on a bottom structure on a substrate, wherein the multi-material layer includes repeating pairs of a first layer and a second layer, selectively removing the second layer from the multi-material layer from the substrate, and selectively oxidizing the bottom structure on the substrate after removing the second layer from the multi-material layer.
US11018222B1 Metallization in integrated circuit structures
Disclosed herein are structures, methods, and assemblies related to metallization in integrated circuit (IC) structures. For example, in some embodiments, an IC structure may include a first nanowire in a metal region and a second nanowire in the metal region. A distance between the first nanowire and the second nanowire may be less than 5 nanometers, and the metal region may include tungsten between the first nanowire and the second nanowire.
US11018221B2 Air gap regions of a semiconductor device
A semiconductor device is provided, which includes an active region, a first structure, a second gate structure, a first gate dielectric sidewall, a second gate dielectric sidewall, a first air gap region, a second air gap region and a contact structure. The active region is formed over a substrate. The first and second gate structures are formed over the active region and between the first gate structure and the second gate structure are the first gate dielectric sidewall, the first air gap region, the contact structure, the second air gap region and a second gate dielectric sidewall.
US11018220B2 Device isolation design rules for HAST improvement
Structures and methods for isolating semiconductor devices and improving device reliability under harsh environmental conditions are described. An isolation region may be formed by ion implantation in a region of semiconductor surrounding a device. The implantation region may extend into streets of a wafer. A passivation layer may be deposited over the implantation region and extend further into the streets than the isolation region to protect the isolation region from environmental conditions that may adversely affect the isolation region.
US11018219B2 P-type MOSFET and method for manufacturing same
The invention discloses a P-type MOSFET, a channel region consisting of an N-well is formed in the semiconductor substrate covered with a gate structure; the N-well is formed by overlaying an annealed phosphorus-implanted region, an annealed first arsenic-implanted region and an annealed second arsenic-implanted region, and the first arsenic-implanted region and the second arsenic-implanted region are overlaid to form a threshold voltage regulation region; the implantation depth of the first arsenic-implanted region is greater than that of the second arsenic-implanted region; and an amorphous layer is formed by the first arsenic-implanted region on the semiconductor substrate to improve the implantation uniformity of the second arsenic-implanted region and to decrease the peak surface doping concentration of the second arsenic-implanted region located on the surface of the semiconductor substrate. The invention further discloses a method for manufacturing a P-type MOSFET. The invention can reduce the flicker noises of a device.
US11018217B2 Semiconductor device and method for manufacturing the same
A semiconductor device includes a first semiconductor layer that is an electrically-conductive polycrystalline semiconductor layer and a second semiconductor layer on the first semiconductor layer. The second semiconductor layer is an electrically-conductive polycrystalline semiconductor layer having a smaller average grain size than the first semiconductor layer. A plurality of electrode layers are stacked on the second semiconductor layer at intervals in a first direction. A third semiconductor layer extends in the first direction through the first semiconductor layer, the second semiconductor layer, and each of the electrode layers and contacts the second semiconductor layer. A charge storage layer is between the plurality of electrode layers and the third semiconductor layer.
US11018216B2 High voltage capacitor and method
In accordance with an embodiment, an electrical element includes a first portion of a first dielectric material between a first portion of a first electrical conductor and a first portion of a second electrical conductor and a second portion of the first dielectric material between a second portion of the first electrical conductor and a first portion of a third electrical conductor. In accordance with another embodiment, an electrical component has a plurality of dopant regions formed in a semiconductor material, where the dopant regions include a plurality of dopant regions formed in a dopant region of the same conductivity type. A plurality of dopant regions of an opposite conductivity type are formed in corresponding dopant regions of the first conductivity type. A metallization system is formed over the semiconductor material, where a portion of the metallization system contacts the semiconductor material.
US11018215B2 Package and manufacturing method thereof
A package includes a first redistribution structure, a die, an encapsulant, a second redistribution structure, and an inductor. The die is disposed on the first redistribution structure. The encapsulant laterally encapsulates the die. The second redistribution structure is over the die and the encapsulant. The inductor includes a first portion, a second portion, and a third portion. The first portion is embedded in the first redistribution structure. The second portion is embedded in the encapsulant and is connected to the first and third portions of the inductor. The third portion is embedded in the second redistribution structure.
US11018214B2 Display device
A display device includes a resin substrate, a TFT layer, a light-emitting element, a frame region, a terminal portion, a bending portion, a plurality of frame wiring lines, and at least a one-layer inorganic film. The light-emitting element includes a metal electrode provided on a flattening film included in the TFT layer. In the bending portion, an opening is formed in at least the one-layer inorganic film. A frame flattening film is provided to fill the opening. The plurality of frame wiring lines are provided on the frame flattening film across the opening. The frame wiring line is formed of a metal material identical to the metal material of the metal electrode. The frame flattening film is formed of a resin material identical to the resin material of the flattening film.
US11018207B2 Display device
A display device is provided, including: a display panel including a display face and a first face opposite to the display face; an optical module configured to converge light transmitted through the display panel, the optical module being located on a side of the first face facing away from the display face; and a camera configured to receive light converged by the optical module, the camera located on a side of the optical module facing away from the first face and spaced apart from the optical module, the camera including a light incident face onto which light is incident. A projection of the optical module in a direction perpendicular to the first face of the display panel falls into display area of the display panel, and an area of the projection of the optical module is larger than an area of the light incident face of the camera.
US11018203B2 Display panel including touch sensor, display panel comprising the same and method for detecting defect thereof
A display panel, a display device comprising the display panel, and a method for detecting a defect thereof are provided. The display panel includes a touch sensor having at least one defect detection pattern to detect a defect by changing the configuration of an array. Thereby, a defect detection at the outside of the array can be easily accomplished.
US11018194B2 Display substrate and method of manufacturing the same, and display panel
In one embodiment, there is provided a display substrate including: a base substrate; a plurality of pixels on the base substrate; and a pixel definition layer on the base substrate, defining the pixels and separating the pixels from one another. Each of the pixels includes: a first electrode assembly, a light-emitting function layer and a second electrode arranged sequentially in a direction away from the base substrate, and the second electrodes of the pixels form a common electrode layer extending over the pixel definition layer. In each of the pixels, a distance between a surface of the pixel definition layer away from the base substrate and a surface of the light-emitting function layer away from the base substrate in the direction away from the base substrate is less than or equal to a preset threshold that is in a range of about 0 Å to about 300 Å.
US11018193B2 High resolution low power consumption OLED display with extended lifetime
Full-color pixel arrangements for use in devices such as OLED displays are provided, in which multiple sub-pixels are configured to emit different colors of light, with each sub-pixel having a different optical path length than some or all of the other sub-pixels within the pixel.
US11018192B2 Reduction of metal resistance in vertical ReRAM cells
Embodiments of the invention include resulting structures and a method for fabricating a vertical ReRAM array structure. The embodiments of the invention include forming alternating layers over a metal layer of a structure, wherein a layer of the alternating layers comprises a low resistivity material, masking one or more portions of a topmost layer of the alternating layers, and etching one or more portions of the alternating layers down to the metal layer. Embodiments of the invention also include depositing a lateral electrode layer over the etched one or more portions of the alternating layers, performing an etch back on the lateral electrode layer, and forming a vertical electrode layer over the structures.
US11018189B2 Storage apparatus
A storage apparatus includes a plurality of first wiring layers extending in one direction, a plurality of second wiring layers extending in another direction, and a plurality of memory cells provided in respective opposing regions in which the plurality of first wiring layers and the plurality of second wiring layers are opposed to each other. The plurality of memory cells each includes a selector element layer, a storage element layer, and an intermediate electrode layer provided between the selector element layer and the storage element layer. One or more of the selector element layer, the storage element layer, and the intermediate electrode layer is a common layer that is common between the plurality of memory cells, in which the plurality of memory cells is adjacent to each other and extends in the one direction or the other direction. The intermediate electrode layer includes a nonlinear resistive material.
US11018185B1 Layout pattern for magnetoresistive random access memory
A layout pattern for magnetoresistive random access memory (MRAM) includes a first magnetic tunneling junction (MTJ) pattern on a substrate, a second MTJ pattern adjacent to the first MTJ pattern, and a third MTJ pattern between the first MTJ pattern and the second MTJ pattern. Preferably, the first MTJ pattern, the second MTJ pattern, and the third MTJ pattern constitute a staggered arrangement.
US11018183B2 Source sensitive optic with reconfigurable chip-on-board light emitting diode array
Described herein is source sensitive optic that uses reconfigurable chip-on-board (CoB) light emitting diode (LED) arrays as light sources. In an implementation, the reconfigurable CoB LED array includes a predetermined number of LEDs that are configurable for a variety of illumination scenarios. In an implementation, the reconfigurable CoB LED array is multiple CoB LED arrays that are configured for use with the source sensitive optic as described herein. The source sensitive optic includes surface shapes that are responsive to the reconfigurable CoB LED array. The source sensitive optic is configured to provide beam profile and radiation pattern differentiation based on a CoB LED array configuration configured from the reconfigurable CoB LED. Each configurable CoB LED array configuration radiates a different beam pattern via the surface shapes due to proximity and surface shape geometries.
US11018182B2 Pixel structure
A pixel structure includes a light emitting diode chip and a light blocking structure. The light emitting diode chip includes a P-type semiconductor layer, an active layer, an N-type semiconductor layer, a first electrode, and K second electrodes. The active layer is located on the P-type semiconductor layer. The N-type semiconductor layer is located on the active layer. The N-type semiconductor layer has a first top surface that is distant from the active layer. The first electrode is electrically connected to the P-type semiconductor layer. The light blocking structure is located in the light emitting diode chip and defines K sub-pixel regions. The active layer and the N-type semiconductor layer are divided into K sub-portions respectively corresponding to the K sub-pixel regions by the light blocking structure. The K sub-pixel regions share the P-type semiconductor layer.
US11018181B2 Solid-state imaging device
A solid-state imaging device includes a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type on the first semiconductor layer; and first and second detectors positioned inside the second semiconductor layer. The first and second detectors are arranged in a first direction along a boundary between the first semiconductor layer and the second semiconductor layer. The device further includes first and second semiconductor regions provided between the first semiconductor layer and the first and second detectors, respectively. The first and second semiconductor regions include second conductivity type impurities with a higher concentration than that in the second semiconductor layer. The first detector has a first thickness along a second direction from the first semiconductor layer toward the second semiconductor layer, and the second detector has a second thickness along the second direction, the second thickness being thicker than the first thickness.
US11018177B2 Backside illuminated global shutter image sensor
Various embodiments of the present disclosure are directed towards an image sensor. The image sensor includes a photodetector disposed in a semiconductor substrate. An interlayer dielectric (ILD) structure is disposed on a first side of the semiconductor substrate. A storage node is disposed in the semiconductor substrate and spaced from the photodetector, where the storage node is spaced from the first side by a first distance. A first isolation structure is disposed in the semiconductor substrate and between the photodetector and the storage node, where the first isolation structure extends into the semiconductor substrate from a second side of the semiconductor substrate that is opposite the first side, and where the first isolation structure is spaced from the first side by a second distance that is less than the first distance.
US11018175B2 Solid-state imaging device, method for manufacturing same, and electronic device
The present disclosure relates to a solid-state imaging device, a method for manufacturing the same, and an electronic device capable of increasing utilization efficiency of a substrate. The solid-state imaging device includes a first semiconductor substrate provided with a sensor circuit having a photoelectric conversion part, and a second semiconductor substrate and a third semiconductor substrate provided with respective circuits different from the sensor circuit. The first semiconductor substrate, the second semiconductor substrate, and the third semiconductor substrate are stacked on each other in three layers, and a metal element for an electrode constituting an electrode for external connection is disposed in the first semiconductor substrate. An electrode for a measuring terminal is disposed within the second semiconductor substrate or the third semiconductor substrate, and the first semiconductor substrate is stacked after performing a predetermined measurement. The present technology can be applied to a backside-illuminated solid-state imaging device, for example.
US11018174B2 Apparatus and method related to sensor die ESD protection
Techniques of drawing ESD current away from an image sensor device of a CMOS image sensor die include using a light shield configured to block light from an image sensor device. The light shield may be used to draw the ESD current away when it has an electrical connection to an ESD ground bus and/or to a bond pad of the CMOS image sensor die. Advantageously, the light shield has a low resistance due to its large surface area. Accordingly, parallel connections to the bond pads and/or ESD bus have a resistance close to the low resistance of the light shield without altering the size of the die.
US11018173B2 Image sensor
An image sensor including: a semiconductor substrate having a first region and a second region; an isolation region filling an isolation trench that partially penetrates the semiconductor substrate; a plurality of photoelectric conversion regions defined by the isolation region and forming a first hexagonal array on a plane that is parallel to a surface of the semiconductor substrate; and a plurality of microlenses respectively corresponding to the plurality of photoelectric conversion regions, and forming a second hexagonal array on the plane that is parallel to the surface of the semiconductor substrate.
US11018172B2 Solid-state imaging element, and electronic device
The present disclosure relates to a solid-state imaging element configured to inhibit an adverse effect, which is attributable to a light shielding film formed for disposing an OPB region, on the formation of a constituent other than the light shielding film of the solid-state imaging element, and an electronic device. According to a first aspect of the present disclosure, there is provided a solid-state imaging element, including: an effective pixel region in which a large number of pixels are vertically and horizontally arranged; and an OPB region formed by coating pixels around the effective pixel region with a light shielding film. Corners on at least one of an outer circumferential side and an inner circumferential side of the OPB region are formed into an arc shape. The present disclosure can be applied to, for example, a back-surface irradiation type CMOS image sensor.
US11018171B2 Transistor and manufacturing method
The present technology relates to a transistor and a manufacturing method that make it possible to reduce noise. The transistor includes a gate electrode, a source region, and a drain region. The gate electrode is formed on a semiconductor substrate. The source region is formed on a surface of the semiconductor substrate and extended from the gate electrode. The drain region is positioned to oppose the source region and formed on the surface of the semiconductor substrate without being brought into contact with the gate electrode. The source region and the drain region are asymmetrical. The drain region is formed at a position deeper than the source region. At a gate end of the gate electrode, the drain region is formed at a distance from the surface of the semiconductor substrate. The present technology is applicable, for example, to an amplifying transistor.
US11018170B2 Image sensor and control method for the same
An image sensor includes a pair of pixel sharing circuits, a second reset transistor, an amplifier transistor, a readout transistor and a control circuit. The pair of pixel sharing circuits connected to a floating diffusion node, each including a photon device, a first reset transistor, a capture transistor, a holding transistor, a capacitor and a sharing transistor. The control circuit is configured to control the first reset transistor, the first capture transistor, the first holding transistor and the sharing transistor of each of the pair of sharing pixel circuits to be turned on or off.
US11018168B2 Image sensor with improved timing resolution and photon detection probability
In some embodiments, a photodetector is provided. The photodetector includes a first well having a first doping type disposed in a semiconductor substrate. A second well having a second doping type opposite the first doping type is disposed in the semiconductor substrate on a side of the first well. A first doped buried region having the second doping type is disposed in the semiconductor substrate, where the first doped buried region extends laterally through the semiconductor substrate beneath the first well and the second well. A second doped buried region having the second doping type is disposed in the semiconductor substrate and vertically between the first doped buried region and the first well, where the second doped buried region contacts the first well such that a photodetector p-n junction exists along the second doped buried region and the first well.
US11018167B2 Method and system for aging process on transistors in a display panel
The present disclosure relates to a method and system for performing aging process on the transistor in the display panel. A method for performing aging process on a transistor in a display panel, comprising: obtaining an initial characteristic curve of the transistor; determining an initial cutoff voltage range of the transistor according to the obtained initial characteristic curve; determining a gate-source voltage and a drain-source voltage required by the transistor according to the initial cutoff voltage range, so as to increase an cutoff voltage range of the transistor; and performing aging process on the transistor according to the determined required gate-source voltage and drain-source voltage.
US11018165B2 Manufacturing method of array substrate and array substrate
A manufacturing method of an array substrate and the array substrate are provided. The method comprises: forming an active layer on a substrate; forming an insulation layer on the active layer; forming a first metal layer on the insulation layer; forming an interlayer dielectric layer and a pixel electrode layer on the first metal layer by a same mask; forming a second metal layer on the interlayer dielectric layer, wherein the second metal layer comprises a source electrode, a drain electrode, and a touch signal line; and forming a patterned protective layer and a patterned common electrode layer on the second metal layer.
US11018148B2 Semiconductor memory device and method for manufacturing same
A semiconductor memory device according to an embodiment, includes a semiconductor pillar extending in a first direction, a first electrode extending in a second direction crossing the first direction, a second electrode provided between the semiconductor pillar and the first electrode, a first insulating film provided between the semiconductor pillar and the second electrode, and a second insulating film provided between the first electrode and the second electrode. The second electrode includes a thin sheet portion disposed on the first electrode side, and a thick sheet portion disposed on the semiconductor pillar side. A length in the first direction of the thick sheet portion is longer than a length in the first direction of the thin sheet portion.
US11018146B2 Integrated electronic circuit comprising a first transistor and a ferroelectric capacitor
The present invention relates to an integrated electronic circuit comprising a first transistor (1) and a ferroelectric capacitor (2). The ferroelectric capacitor (2) comprises a first electrode layer composed of a non-ferroelectric material, a ferroelectric interlayer having a thickness that is less than the thickness of the first electrode layer, and a second electrode layer composed of a non-ferroelectric material, wherein the ferroelectric interlayer is arranged between the first electrode layer and the second electrode layer, and the first electrode layer is electrically conductively connected to a gate terminal of the first transistor (1).
US11018143B1 Antifuse OTP structures with hybrid low-voltage devices
An antifuse One-Time-Programmable memory cell includes a substrate, and a hybrid select transistor and a hybrid antifuse capacitor formed on the substrate. The hybrid select transistor includes a first gate dielectric layer formed on the substrate, wherein the first gate dielectric layer is thinner than 40 nm, a first high-voltage junction formed in the substrate, and a low-voltage junction formed in the substrate. The hybrid antifuse capacitor includes a second gate dielectric layer, wherein the second gate dielectric layer is thinner than 40 nm, which enables a low-voltage antifuse capacitor device, a second gate formed on the gate dielectric layer, a second high-voltage junction formed in the substrate, and a third high-voltage junction formed in the substrate.
US11018141B2 Contacts and method of manufacturing the same
A method of manufacturing contacts is provided in the present invention, which include the steps of forming a plurality of mask bars on a substrate, forming a circular mask surrounding each mask bar, wherein the circular masks connect each other and define a plurality of opening patterns collectively with the mask bars, using the mask bars and the circular masks as etch masks to perform an etch process and to transfer the opening patterns and form a plurality recesses in the substrate, and filling up the recesses with metal to form contacts.
US11018138B2 Methods for forming dynamic random-access devices by implanting a drain through a spacer opening at the bottom of angled structures
Disclosed are DRAM devices and methods of forming DRAM devices. One method may include forming a plurality of trenches and angled structures, each angled structure including a first sidewall opposite a second sidewall, wherein the second sidewall extends over an adjacent trench. The method may include forming a spacer along a bottom surface of the trench, along the second sidewall, and along the first sidewall, wherein the spacer has an opening at a bottom portion of the first sidewall. The method may include forming a drain in each of the angled structures by performing an ion implant, which impacts the first sidewall through the opening at the bottom portion of the first sidewall. The method may include removing the spacer from the first sidewall, forming a bitline over the spacer along the bottom surface of each of the trenches, and forming a series of wordlines along the angled structures.
US11018133B2 3D integrated circuit
A 3D integrated circuit, the circuit including: a first wafer including a first crystalline substrate, a plurality of first transistors, and first copper interconnecting layers, where the first copper interconnecting layers at least interconnect the plurality of first transistors; and a second wafer including a second crystalline substrate, a plurality of second transistors, and second copper interconnecting layers, where the second copper interconnecting layers at least interconnect the plurality of second transistors; where the second wafer is bonded face-to-face on top of the first wafer, where the bonded includes copper to copper bonding; and where the second crystalline substrate has been thinned to a thickness of less than 5 micro-meters.
US11018128B2 Semiconductor device
A semiconductor device according to an embodiment includes a semiconductor substrate of a first conducting type. A pad is provided on the semiconductor substrate. An internal circuit is provided on the semiconductor substrate. An electrostatic discharge protection element is provided between the pad and the internal circuit. The electrostatic discharge protection element comprises a first well of a second conducting type, a second well of a first conducting type, and a first electrode layer of a second conducting type. The first well of a second conducting type is provided in a surface region of the semiconductor substrate. The second well of a first conducting type is provided inside the first well in the surface region of the semiconductor substrate. The first electrode layer of a second conducting type is provided inside the second well in the surface region of the semiconductor substrate.
US11018125B2 Multi-chip package with offset 3D structure
Various semiconductor chip devices and methods of manufacturing the same are disclosed. In one aspect, a semiconductor chip device is provided that has a reconstituted semiconductor chip package that includes an interposer that has a first side and a second and opposite side and a metallization stack on the first side, a first semiconductor chip on the metallization stack and at least partially encased by a dielectric layer on the metallization stack, and plural semiconductor chips positioned over and at least partially laterally overlapping the first semiconductor chip.
US11018122B1 Area-efficient subpixel apparatus
This application describes a subpixel apparatus comprising two transistors, a capacitor, and a small LED. The transistors and capacitor are fabricated in such a manner as to occupy a reduced area and have the small LED overlie them. Methods to form the subpixel apparatus are discussed.
US11018120B2 Semiconductor device package with stress buffering layer and method for manufacturing the same
A semiconductor device package includes a first conductive structure, a stress buffering layer and a second conductive structure. The first conductive structure includes a substrate, at least one first electronic component embedded in the substrate, and a first circuit layer disposed on the substrate and electrically connected to the first electronic component. The first circuit layer includes a conductive wiring pattern. The stress buffering layer is disposed on the substrate. The conductive wiring pattern of the first circuit layer extends through the stress buffering layer. The second conductive structure is disposed on the stress buffering layer and the first circuit layer.
US11018116B2 Method to form a 3D semiconductor device and structure
A method to form a 3D semiconductor device, the method including: providing a first level including first circuits, the first circuits including first transistors and first interconnection; preparing a second level including a silicon layer; performing growth of an epitaxial layer on top of the silicon layer, the epitaxial layer including non-silicon atoms; forming second circuits over the second level, the second circuits including second transistors and second interconnection; transferring and then bonding the second level on top of the first level; and then thinning the second level to a thickness of less than ten microns, where the bonding includes oxide to oxide bonds.
US11018115B2 Semiconductor package having a high reliability
A semiconductor package includes a package substrate, a plurality of semiconductor devices stacked on the package substrate, a plurality of underfill fillets disposed between the plurality of semiconductor devices and between the package substrate and the plurality of semiconductor devices, and a molding resin at least partially surrounding the plurality of semiconductor devices and the plurality of underfill fillets. The plurality of underfill fillets include a plurality of protrusions that protrude from spaces between each of the plurality of semiconductor devices or between the package substrate and each of the plurality of semiconductor devices. At least two neighboring underfill fillet protrusions of the plurality of protrusions form one continuous structure without an interface therebetween.
US11018113B2 Memory module, semiconductor package including the same, and manufacturing method thereof
A memory module includes a first redistribution structure, a second redistribution structure, first semiconductor dies, second semiconductor dies, an encapsulant, through insulator vias and thermally conductive material. Second redistribution structure is stacked over first redistribution structure. First semiconductor dies are sandwiched between first redistribution structure and second redistribution structure and disposed side by side. Second semiconductor dies are disposed on the second redistribution structure. The encapsulant laterally wraps the second semiconductor dies. The through insulator vias are disposed among the first semiconductor dies, extending from the first redistribution structure to the second redistribution structure. The through insulator vias are electrically connected to the first redistribution structure and the second redistribution structure. The thermally conductive material is disposed on the second redistribution structure, among the second semiconductor dies and overlying the through insulator vias. The thermally conductive material has a thermal conductivity larger than that of the encapsulant.
US11018107B2 Semiconductor device
A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.
US11018103B2 Integrated circuit structure
An integrated circuit structure includes a substrate, a metal pad, a first passivation layer, a second passivation layer, and a conductive bump. The metal pad is over the substrate. The metal pad includes a probing portion and a bumping portion laterally connected to the probing region. The first passivation layer is over the metal pad. The second passivation layer is over the first passivation layer and has an opening. The bumping portion is in the opening. The conductive bump is in the opening of the second passivation layer and contacts the probing portion. The probing portion and the conductive bump are separated by the first passivation layer.
US11018099B2 Semiconductor structure having a conductive bump with a plurality of bump segments
A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes: a semiconductor chip; a substrate facing an active surface of the semiconductor chip; and a conductive bump extending from the active surface of the semiconductor chip toward the substrate, wherein the conductive bump comprises: a plurality of bump segments comprising a first group of bump segments and a second group of bump segments, wherein each bump segment comprises the same segment height in a direction orthogonal to the active surface of the semiconductor chip, and each bump segment comprises a volume defined by the multiplication of the segment height with the average cross-sectional area of the bump segment; wherein the ratio of the total volume of the first group of bump segments to the total volume of the second group of bump segments is between about 0.03 and about 0.8.
US11018098B2 Fabricated two-sided millimeter wave antenna using through-silicon-vias
A system may include a first semiconductor substrate having a first side and a second side opposite the first side. The system may further include multiple device layers positioned on the first side of the substrate. The system may also include a first portion of an antenna structure positioned within at least one of the multiple device layers. The system may include a second portion of the antenna structure positioned over the second side of the substrate. The system may further include a via passing through the substrate and electrically coupling the first portion of the antenna structure to the second portion of the antenna structure.
US11018094B2 Semiconductor packages configured for measuring contact resistances and methods of obtaining contact resistances of the semiconductor packages
A method of obtaining contact resistance values of a semiconductor package, the semiconductor package includes a package substrate, a semiconductor chip mounted on the package substrate, a molding member disposed on the package substrate to surround the semiconductor chip, and an electromagnetic interference (EMI) shielding layer disposed on side surfaces of the package substrate and on the molding member. The package substrate includes a substrate body having a first surface and a second surface which are opposite to each other, first to fourth upper interconnection patterns disposed on the first surface of the substrate body in a first region of the package substrate and in contact with the EMI shielding layer, and an interconnection structure disposed in a second region of the package substrate.
US11018092B2 Thinned semiconductor wafer
A semiconductor wafer has a base material with a first thickness and first and second surfaces. A wafer scribe mark is disposed on the first surface of the base material. A portion of an interior region of the second surface of the base material is removed to a second thickness less than the first thickness, while leaving an edge support ring of the base material of the first thickness and an asymmetric width around the semiconductor wafer. The second thickness of the base material is less than 75 micrometers. The wafer scribe mark is disposed within the edge support ring. The removed portion of the interior region of the second surface of the base material is vertically offset from the wafer scribe mark. A width of the edge support ring is wider to encompass the wafer scribe mark and narrower elsewhere around the semiconductor wafer.
US11018091B2 Eliminate sawing-induced peeling through forming trenches
A package includes a device die, a molding material encircling the device die, wherein a top surface of the molding material is substantially level with a top surface of the device die, and a bottom dielectric layer over the device die and the molding material. A plurality of redistribution lines (RDLs) extends into the bottom dielectric layer and electrically coupling to the device die. A top polymer layer is over the bottom dielectric layer, with a trench ring penetrating through the top polymer layer. The trench ring is adjacent to edges of the package. The package further includes Under-Bump Metallurgies (UBMs) extending into the top polymer layer.
US11018089B2 Display devices and methods for manufacturing the same
A method for manufacturing a display device is provided. The method includes providing an array module having at least one first alignment mark. The method also includes providing a light-emitting module having at least one second alignment mark. The method further includes aligning the light-emitting module and the array module by the at least one first alignment mark and the at least one second alignment mark. In addition, the method includes bonding the light-emitting module onto the array module.
US11018085B2 Semiconductor device
A semiconductor device includes a first lower line and a second lower line on a substrate, the first and second lower lines extending in a first direction, being adjacent to each other, and being spaced apart along a second direction, orthogonal the first direction, an airgap between the first and second lower lines and spaced therefrom along the second direction, a first insulating spacer on a side wall of the first lower line facing the second lower line, wherein a distance from the first airgap to the first lower line along the second direction is equal to or greater than an overlay specification of a design rule of the semiconductor device, and a second insulating spacer between the airgap and the second lower line.
US11018075B2 Integrated circuits and methods for forming integrated circuits
An example relates to an integrated circuit including a semiconductor substrate, and a wiring layer stack located on the semiconductor substrate. The integrated circuit further includes a transistor embedded in the wiring layer stack. The transistor includes an embedded layer. The embedded layer has a thickness of less than 10 nm. The embedded layer includes at least one two-dimensional crystalline layer including more than 10% metal atoms. Further examples relate to methods for forming integrated circuits.
US11018071B2 Initiation of one or more processors in an integrated circuit
In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may determine whether the IC temperature is less than a threshold value. The apparatus may initiate a joule heating procedure using a joule heating element of the IC upon determining that the temperature is less than the threshold value. The apparatus may delay an initiation of the one or more processors of the IC until the IC temperature meets the threshold value.
US11018070B2 Semiconductor die, manufacturing method thereof, and semiconductor package
A semiconductor die is provided. The semiconductor die includes a semiconductor substrate, an interconnection structure, conductive pads, a first passivation layer, and a second passivation layer. The interconnection structure is disposed on the semiconductor substrate. The conductive pads are disposed over and electrically connected to the interconnection structure. The first passivation layer and the second passivation layer are sequentially stacked on the conductive pads. The first passivation layer and the second passivation layer fill a gap between two adjacent conductive pads. The first passivation layer includes a first section and a second section. The first section extends substantially parallel to a top surface of the interconnection structure. The second section faces a side surface of one of the conductive pads. Thicknesses of the first section and the second section are different.
US11018061B2 Strain enhancement for FinFETs
An integrated circuit device includes a substrate having a first portion in a first device region and a second portion in a second device region. A first semiconductor strip is in the first device region. A dielectric liner has an edge contacting a sidewall of the first semiconductor strip, wherein the dielectric liner is configured to apply a compressive stress or a tensile stress to the first semiconductor strip. A Shallow Trench Isolation (STI) region is over the dielectric liner, wherein a sidewall and a bottom surface of the STI region is in contact with a sidewall and a top surface of the dielectric liner.
US11018059B2 SiC substrate processing method
An SiC substrate processing method for producing an SiC substrate from an SiC ingot. The SiC substrate processing method includes a separation layer forming step of setting a focal point of a laser beam having a transmission wavelength to SiC inside the SiC ingot at a predetermined depth from the upper surface of the SiC ingot and next applying the laser beam LB to the SiC ingot to thereby form a separation layer for separating the SiC substrate from the SiC ingot, a substrate attaching step of attaching a substrate to the upper surface of the SiC ingot, and a separating step of applying an external force to the separation layer to thereby separate the SiC substrate with the substrate from the SiC ingot along the separation layer.
US11018058B2 Wafer processing method for dividing a wafer along predefined division lines using polyester sheet
A wafer processing method includes a polyester sheet providing step of positioning a wafer in an inside opening of a ring frame and providing a polyester sheet on a back side of the wafer and on a back side of the ring frame, a uniting step of heating the polyester sheet as applying a pressure to the polyester sheet to thereby unite the wafer and the ring frame through the polyester sheet by thermocompression bonding, a dividing step of applying a laser beam to the wafer to form division grooves in the wafer, thereby dividing the wafer into individual device chips, and a pickup step of cooling the polyester sheet in each region of the polyester sheet corresponding to each device chip, pushing up each device chip from the polyester sheet side to pick up each device chip from the polyester sheet.
US11018057B2 Semiconductor devices
A semiconductor device includes a substrate, a first gate structure and a second gate structure over the substrate, a first hard mask on a top surface of the first gate structure, a second hard mask on the second gate structure and a third hard mask disposed between the first gate structure and the second gate structure and disposed between the first hard mask and the second hard mask. A bottom surface of the third hard mask is substantially flush with a bottom surface of the first gate structure.
US11018051B2 Power semiconductor device with reliably verifiable p-contact and method
A method includes: forming trenches extending from a surface along a vertical direction into a semiconductor body, facing trench sidewalls of two adjacent trenches laterally confining a mesa region of the semiconductor body along a first lateral direction; forming a body region in the mesa region, a surface of the body region in the mesa region at least partially forming the semiconductor body surface; forming a first insulation layer on the semiconductor body surface; subjecting the semiconductor body region to a tilted source implantation using at least one contact hole in the first insulation layer at least partially as a mask for forming a semiconductor source region in the mesa region. The tilted source implantation is tilted from the vertical direction by an angle of at least 10°. The semiconductor source region extends for no more than 80% of a width of the mesa region along the first lateral direction.
US11018045B2 Deposition apparatus including upper shower head and lower shower head
A deposition apparatus for depositing a material on a wafer, the apparatus including a lower shower head; an upper shower head disposed on the lower shower head, the upper shower head facing the lower shower head; and a support structure between the upper shower head and the lower shower head, the wafer being supportable by the support structure, wherein the upper shower head includes upper holes for providing an upper gas onto the wafer, the lower shower head includes lower holes for providing a lower gas onto the wafer, the support structure includes a ring body surrounding the wafer; a plurality of ring support shafts between the ring body and the lower shower head; and a plurality of wafer supports extending inwardly from a lower region of the ring body to support the wafer, and the plurality of wafer supports are spaced apart from one another.
US11018044B2 Wafer expanding method and wafer expanding apparatus
A wafer expanding method increases spacing between adjacent devices formed on a wafer. The method includes preparing an annular jig having a first restricting portion, a second restricting portion, and a curved restricting portion connecting the first restricting portion and the second restricting portion, mounting a ring frame supporting the wafer through an adhesive tape on a cylindrical frame fixing member, next mounting the annular jig on the ring frame, and next fixing the ring frame and the annular jig to the cylindrical frame fixing member, and operating a cylindrical pushing member having an outer circumference corresponding to an outer circumference of the wafer to push up an annular exposed portion of the adhesive tape defined between the wafer and the ring frame and thereby lift the wafer away from the ring frame, thereby expanding the annular exposed portion and increasing the spacing between the adjacent devices.
US11018042B1 3D semiconductor memory device and structure
A 3D semiconductor device, the device including: a first single crystal layer including a plurality of first transistors and at least one metal layer, where the at least one metal layer interconnecting the first transistors; a plurality of first logic gates including the at least one metal layer interconnecting the first transistors; a plurality of second transistors atop the at least one metal layer; a plurality of third transistors atop the second transistors; a top metal layer atop the third transistors; and a memory array including wordlines, where the memory array includes at least four rows by four columns of memory mini arrays, where each of the mini arrays includes at least four rows by four columns of memory cells, and where each of the memory cells includes at least one of the second transistors or at least one of the third transistors.
US11018041B2 Chip transferring method
The chip transfer method includes: firstly, (A) providing a carrier film carrying a plurality of chips and a substrate having an adhesive layer; next, (B) disposing the carrier film opposite the substrate so that the chips face the adhesive layer; then, (C) using an abutting element to pass through the carrier film to abut at least one of the chips, so that the chip is detached from the carrier film and attached to the adhesive layer; finally, (D) repeating step (C) to detach the remaining chips from the carrier film and attach the remaining chips to the adhesive layer.
US11018039B2 Electrostatic chuck which reduces arc discharge
According to the embodiment, the electrostatic chuck includes a ceramic dielectric substrate having a first major surface and a second major surface on an opposite side to the first major surface, a base plate supporting the ceramic dielectric substrate and including a gas introduction path, and a first porous part provided at a position between the base plate and the first major surface and being opposite to the gas introduction path. The ceramic dielectric substrate includes a first hole part positioned between the first major surface and the first porous part. At least one of the ceramic dielectric substrate or the first porous part includes a second hole part positioned between the first hole part and the first porous part, and a dimension of the second hole part is smaller than a dimension of the first porous part and larger than a dimension of the first hole part.
US11018036B2 Carrier adapter insert apparatus and carrier adapter insert detection methods
Methods, apparatus, and assemblies are provided for a substrate carrier adapter insert including an adapter frame including a support rail adapted to support one or more substrates in a substrate carrier, a frame extension coupled to, or integral with, the adapter frame, and a mapping feature formed on the frame extension and disposed to be detected by a sensor for determining whether an adapter insert is present or absent in a substrate carrier. Numerous additional features are disclosed.
US11018032B2 High pressure and high temperature anneal chamber
Embodiments of the disclosure relate to an apparatus and method for annealing one or more semiconductor substrates. In one embodiment, a processing chamber is disclosed. The processing chamber includes a chamber body enclosing an internal volume, a substrate support disposed in the internal volume and configured to support a substrate during processing, a gas panel configured to provide a processing fluid into the internal volume, and a temperature-controlled fluid circuit configured to maintain the processing fluid at a temperature above a condensation point of the processing fluid. The temperature-controlled fluid circuit includes a gas conduit fluidly coupled to a port on the chamber body at a first end and to the gas panel at a second end.
US11018030B2 Fan-out wafer level chip-scale packages and methods of manufacture
In a general aspect, a for producing a fan-out wafer level package (FOWLP) semiconductor device can include separating a semiconductor wafer into a plurality of semiconductor die and, after separating the semiconductor wafer into the plurality of semiconductor die, increasing spacing between the plurality of semiconductor die. The method can further include encapsulating, in a molding compound, the plurality of semiconductor die and determining respective locations of one or more alignment features disposed within the molding compound. The method can still further include forming, based on the determined respective locations, one or more alignment marks in the molding compound.
US11018021B2 Curing photo resist for improving etching selectivity
A method includes exposing and developing a negative photo resist, and performing a treatment on the negative photo resist using an electron beam. After the treatment, a layer underlying the photo resist is etched using the negative photo resist as an etching mask.
US11018020B2 Method of fabricating an integrated circuit device by using a block copolymer to form a self-assembly layer
A method of fabricating an integrated circuit device includes forming a mold layer on a main surface of a substrate. A first hole is formed in the mold layer having a first inner wall that has a first tilt angle. A first conductive pattern is formed in the first hole. A block copolymer layer is formed on the mold layer and the first conductive pattern. A self-assembly layer is formed having a first domain and a second domain by phase separation of the block copolymer layer. The first domain covers the first conductive pattern and the second domain covers the mold layer. A second hole is formed by removing the first domain, the second hole having a second inner wall that has a second tilt angle. A second conductive pattern is formed in the second hole.
US11018018B2 Superstrate and methods of using the same
An apparatus may include a superstrate. The superstrate can include a body having a diameter. The body may fit within a projected square. The projected square may have a length equal to the diameter of the body. The body within the projected square may produce an open area between an exterior edge of the body and the projected square. The superstrate may further include a first projection extending from the exterior edge of the body within the open area.
US11018015B2 Composition for forming organic film, substrate for manufacturing semiconductor device, method for forming organic film, and patterning process
The invention provides: a composition for forming an organic film, the composition having high filterability and enabling formation of an organic film which has high pattern-curving resistance, and which prevents a high-aspect line pattern particularly finer than 40 nm from line collapse and twisting after dry etching; a method for forming an organic film and a patterning process which use the composition; and a substrate for manufacturing a semiconductor device, including the organic film formed on the substrate. The composition for forming an organic film includes a condensate (A), which is a condensation product of dihydroxynaphthalene shown by the following formula (1) and a condensation agent, or a derivative of the condensate (A). A sulfur content among constituent elements contained in the condensate (A) or the derivative of the condensate (A) is 100 ppm or less in terms of mass.
US11018012B2 Contact structures with deposited silicide layers
A method of forming a semiconductor device includes forming a source/drain region on a substrate, depositing a metal-rich metal silicide layer on the source/drain region, depositing a silicon-rich metal silicide layer on the metal-rich metal silicide layer, and forming a contact plug on the silicon-rich metal silicide layer. This disclosure also describes a semiconductor device including a fin structure on a substrate, a source/drain region on the fin structure, a metal-rich metal silicide layer on the source/drain region, a silicon-rich metal silicide layer on the metal-rich metal silicide layer, and a contact plug on the silicon-rich metal silicide layer.
US11018011B2 Methods of forming contact features in semiconductor devices
A method includes forming a first trench in an isolation region; forming a second trench in a device region, wherein the device region is disposed adjacent to the isolation region and each of the first and second trenches is disposed between two metal gate structures; forming a first dielectric layer in the first and the second trenches; forming a second dielectric layer over and different from the first dielectric layer; removing a portion of the second dielectric layer from the first and the second trenches, leaving behind a remaining portion of the second dielectric layer in the first trench; removing a portion of the first dielectric layer formed over a bottom surface of the second trench; subsequent to removing the portion of the first dielectric layer, removing the remaining portion of second dielectric layer from the first trench; and forming contact features in the first and the second trenches.
US11018009B2 Tuning work function of p-metal work function films through vapor deposition
The present disclosure relates to a method for forming a p-metal work function nitride film having a desired p-work function on a substrate, including: adjusting one or more of a temperature of a substrate, a duration of one or more temporally separated vapor phase pulses, a ratio of a tungsten precursor to a titanium precursor, or a pressure of a reaction to tune a work function of a p-metal work function nitride film to a desired p-work function, and contacting the substrate with temporally separated vapor phase pulses of the tungsten precursor, the titanium precursor, and a reactive gas to form a p-metal work function nitride film thereon having the desired p-work function.
US11018008B2 Manufacturing method of a semiconductor device with efficient edge structure
A manufacturing method of an electronic device includes: forming a drift layer of an N type; forming a trench in the drift layer; forming an edge-termination structure alongside the trench by implanting dopant species of a P type; and forming a depression region between the trench and the edge-termination structure by digging the drift layer. The steps of forming the depression region and the trench are carried out at the same time. The step of forming the depression region comprises patterning the drift layer to form a structural connection with the edge-termination structure having a first slope, and the step of forming the trench comprises etching the drift layer to define side walls of the trench, which have a second slope steeper than the first slope.
US11018007B2 Self aligned pattern formation post spacer etchback in tight pitch configurations
A method of forming a structure for etch masking that includes forming first dielectric spacers on sidewalls of a plurality of mandrel structures and forming non-mandrel structures in space between adjacent first dielectric spacers. Second dielectric spacers are formed on sidewalls of an etch mask having a window that exposes a connecting portion of a centralized first dielectric spacer. The connecting portion of the centralized first dielectric spacer is removed. The mandrel structures and non-mandrel structures are removed selectively to the first dielectric spacers to provide an etch mask. The connecting portion removed from the centralized first dielectric spacer provides an opening connecting a first trench corresponding to the mandrel structures and a second trench corresponding to the non-mandrel structures.
US11018005B2 Patterning method and patterned structure
A patterning method includes the following steps. A mask layer is formed on a material layer. A first hole is formed in the mask layer by a first photolithography process. A first mask pattern is formed in the first hole. A second hole is formed in the mask layer by a second photolithography process. A first spacer is formed on an inner wall of the second hole. A second mask pattern is formed in the second hole after the step of forming the first spacer. The first spacer surrounds the second mask pattern in the second hole. The mask layer and the first spacer are removed. The pattern of the first mask pattern and the second mask pattern are transferred to the material layer by an etching process.
US11017995B2 Composition for TiN hard mask removal and etch residue cleaning
Composition, method and system for TiN hard mask removal from electronic circuitry devices, such as advanced pattern wafers have been disclosed. The cleaning compositions preferably comprise an etchant agent (also referred to as a base), an oxidizing agent, an oxidizing stabilizer (also referred to as a chelating agent), an ammonium salt, a corrosion inhibitor, and a solvent. Other optional additives could be provided. It is preferable that the pH of the cleaning composition be greater than 5.5. The cleaning composition is preferably free from dimethyl sulfoxide and tetramethylammonium hydroxide.
US11017994B2 Ion guide
An ion guide is disclosed that comprises a plurality of electrodes arranged to form a multipole ion guide and one or more rigid support members. The plurality of electrodes comprises one or more groups of electrodes, and each group of electrodes comprises plural electrodes that are axially spaced apart from one another. The electrodes of one or more groups of electrodes are attached to one of the one or more rigid support members. One or more of the electrodes comprises a curved metal sheet, plate or strip.
US11017992B2 AC-coupled system for particle detection
A system and method for detecting energetic particles include a detector onto which the particles are impinged. An output signal from the detector, indicative of the energy of the particles, is directed by an AC-coupler to a measurement device to determine particle characteristics such as mass and/or abundance. The detector is selectively couplable to positive or negative bias voltages, and in one embodiment is differentially biased to eliminate ringing due common-mode excitation. The AC-coupler has capacitively-coupled input and output terminals that are embedded in a transmission line structure including capacitances that in some embodiments serve as the sole energy storage component in order to reduce the effects of parasitic inductance found in conventional detection circuits. In some embodiments, a pulse compensation network is provided, to reduce undershoot and ringing due to remote installation of the AC-coupler caused by reflection of low frequency components blocked by the AC-coupler.
US11017991B2 Mass spectrometric determination of fatty acids
The invention relates to the detection of fatty acids. In a particular aspect, the invention relates to methods for detecting very long chain fatty acids and branched chain fatty acids by mass spectrometry.
US11017990B2 Compact mass spectrometer
A miniature mass spectrometer includes an atmospheric pressure ionisation source and a first vacuum chamber having an atmospheric pressure sampling orifice or capillary, a second vacuum chamber downstream of the first vacuum chamber, and a third vacuum chamber downstream of the second vacuum chamber. An ion detector is located in the third vacuum chamber. A first RF ion guide is located within the first vacuum chamber and a second RF ion guide is located within the second vacuum chamber. The ion path length from the atmospheric pressure sampling orifice or capillary to an ion detecting surface of the ion detector is ≤400 mm. The mass spectrometer also includes a tandem quadrupole mass analyser, 3D ion trap mass analyser, 2D or linear ion trap mass analyser, Time of Flight mass analyser, quadrupole-Time of Flight mass analyser, or electrostatic mass analyser arranged in the third vacuum chamber.
US11017988B2 Charged particle beam apparatus
An charged particle beam apparatus includes: a gas introduction chamber to which raw gas is introduced; a plasma generation chamber connected to the gas introduction chamber; a coil wound around an outer circumference of the plasma generation chamber and receiving a high-frequency power; an extraction electrode applying an extraction voltage to plasma discharged from a plasma aperture at an outlet of the plasma generation chamber; an ampere meter measuring a magnitude of a plasma current caused by the plasma moved out of the plasma aperture; an extraction voltage calculator calculating, based on variation in the magnitude of the plasma current measured by the ampere meter with respect to variation in the extraction voltage, an extraction voltage set value; and a controller controlling the extraction voltage based on the extraction voltage set value calculated by the extraction voltage calculator.
US11017983B2 RF power amplifier
In one embodiment, an RF power amplifier includes a first transistor and a second transistor in parallel, wherein a gate of the first transistor and a gate of the second transistor are configured to be driven by an RF source. A third transistor comprising a drain is operably coupled to both a source of the first transistor and a source of the second transistor. A control circuit is operably coupled to a gate of the third transistor and configured to alter a gate-to-source voltage of the third transistor, thereby altering a drain current of each of the first transistor and the second transistor, thereby altering an output power of the RF power amplifier.
US11017978B2 Ion implanter and beam park device
An ion implanter having a beam park device on the way of a beamline through which an ion beam is transported toward a wafer is provided. The beam park device includes a pair of park electrodes which faces each other across the beamline, and a beam dump which is provided away from the beamline in a facing direction of the pair of park electrodes and on a downstream side of the pair of park electrodes in a beamline direction. At least one of the pair of park electrodes includes a plurality of electrode bodies which are disposed to be spaced apart from each other in a predetermined direction perpendicular to both a direction in which the beamline extends and the facing direction, and each of the plurality of electrode bodies extends from an upstream side toward the downstream side in the beamline direction.
US11017976B2 Spiral groove bearing assembly with minimized deflection
A liquid metal or spiral groove bearing structure for an x-ray tube and associated process for manufacturing the bearing structure is provided in which journal bearing sleeve is formed with a number of structures thereon that function to dissipate heat transmitted to the sleeve during operation of the bearing assembly within the x-ray tube to minimize thermal deformation of the sleeve, thereby minimizing gap size alteration within the bearing assembly. The structures formed within the sleeve are slots disposed within the section of the sleeve in which the highest temperature gradients develop. The slots enable an increase in thermal conductance away from the sleeve while minimizing the stresses created from the deformation of the portion(s) of the sleeve between the slots.
US11017975B2 Electromagnetic interference containment for accelerator systems
An apparatus for coupling to an input connection of an electron gun, the input connection having a heater terminal and a cathode terminal, includes: a connector having a first end and a second end; wherein the first end of the connector is configured to attach to a cable; wherein the second end of the connector is configured to connect to the input connection of the electron gun; and wherein the connector comprises an opening configured to receive the heater terminal of the input connection of the electron gun.
US11017966B2 Key structure convertible between digital and analog switch modes and switching method thereof
A key structure including a circuit board, a membrane, a positioning frame, a sensor module, a scissor leg, and a key cap is provided. The membrane is disposed on the circuit board and is electrically connected to each other. The positioning frame is disposed on the membrane. The sensor module is disposed on the membrane and is electrically connected to the circuit board. The scissor leg is connected to the positioning frame and is adapted to move up and down relative to the positioning frame. The key cap is detachably disposed at the scissor leg and is spaced with positioning frame. The key cap has a reflective plane and a shaft component. The reflective plane faces the membrane. The shaft component is extended from the reflective plane and penetrates through the scissor leg and the positioning frame to abut the membrane. The sensor module is aligned with the reflective plane.
US11017961B2 Safety switch arrangement
A safety switch arrangement with a safety switch and an actuator associated with it. Moreover, a locking unit is provided for, by means of which the actuator is locked in a latched position. The safety switch has an auxiliary unlocking unit that has a mechanically actuatable actuating element. An actuation of the actuating element is implemented only with a transmission element as a positioning movement for the locking unit.
US11017958B2 Monolithic flexible supercapacitors, methods of making and uses thereof
Disclosed are methods for fabricating supercapacitors (SCs) via vapor printing, specifically oxidative chemical vapor deposition (oCVD). Also disclosed are methods of using the supercapacitors, in particular for energy storage devices and photovoltaics.
US11017954B2 Solid electrolytic capacitor and method of manufacturing the same
A solid electrolytic capacitor that includes at least one capacitor element having a linear-shaped valve metal substrate that extends in an axial direction and includes a porous portion on a surface of a core portion, a dielectric layer on a surface of the porous portion, and a cathode layer on the dielectric layer; a cathode terminal including a recessed portion having an inner wall surface extending in the axial direction, the capacitor element is disposed in the recessed portion, and the cathode layer is electrically connected to the inner wall surface; an anode terminal electrically connected to the core portion of the capacitor element; and a sealing material covering the capacitor element.
US11017953B2 Multilayer ceramic electronic component
A multilayer ceramic electronic component includes: a ceramic body having a dielectric layer, and a plurality of first and second internal electrodes facing each other with the dielectric layer interposed therebetween; and first and second external electrodes disposed on an outer surface of the ceramic body, respectively. The ceramic body includes an active portion including a plurality of internal electrodes facing each other with the dielectric layer interposed therebetween to form capacitance, and cover portions formed on upper and lower portions of the active portion. A buffer region is disposed between at least one pair of first and second internal electrodes among the plurality of first and second internal electrodes disposed inside the active portion, and satisfies the relation 0
US11017952B2 Multi-layer ceramic electronic component
A multi-layer ceramic electronic component includes: a ceramic body including first and second main surfaces facing in a first axis direction, first and second end surfaces facing in a second axis direction, and first and second internal electrodes; a first external electrode including a first cover portion covering the first end surface, and a first extended portion extending from the first cover portion to the second main surface; and a second external electrode including a second cover portion covering the second end surface, and a second extended portion extending from the second cover portion to the second main surface, the multi-layer ceramic electronic component satisfying that, when T1 represents a dimension of the ceramic body in the first axis direction and T2 represents a dimension of each extended portion in the first axis direction, T1+T2 is 50 μm or less, and T2/(T1+T2) is 0.32 or less.
US11017949B2 Multi-layer ceramic capacitor and method of producing the same
A multi-layer ceramic capacitor according to an embodiment of the present invention includes a multi-layer, side margins and offset sections. The multi-layer includes internal electrodes and dielectric layers alternately laminated. The side margins are configured of a dielectric and disposed to cover side faces of the multi-layer. The offset sections are made with amorphous areas or gap areas. The offset sections are formed between the internal electrodes and the side margins such that ends at side faces of the internal electrodes are offset from the side faces to an inward direction of the multi-layer.
US11017948B2 Multilayer ceramic electronic component
A multilayer ceramic electronic component includes a ceramic body including a dielectric layer, and a first internal electrode and a second internal electrode facing each other with the dielectric layer interposed therebetween, and a first external electrode electrically connected to the first internal electrode, and a second external electrode electrically connected to the second internal electrode, disposed in an outer portion of the ceramic body, the first and second external electrodes comprise a first electrode layer including a conductive metal, a first plating layer disposed on the first electrode layer and including nickel (Ni), and a second plating layer disposed on the first plating layer and including tin (Sn), and a ratio (t1/t2) is within a range from 1.0 to 9.0, where t1 is a thickness of the first plating layer including nickel (Ni), and t2 is a thickness of the second plating layer including tin (Sn).
US11017944B2 Multilayer ceramic electronic component
A multilayer ceramic electronic component includes a ceramic body including dielectric layers and a plurality of first and second internal electrodes disposed to face each other with each of the dielectric layers interposed therebetween, and first and second external electrodes disposed on external surfaces of the ceramic body and electrically connected to the first and second internal electrodes, respectively. The first internal electrodes are exposed to a first surface of the ceramic body and the second internal electrodes are exposed to a second surface, opposing the first surface of the ceramic body. Strength enhancing material layers are disposed, respectively, between the first and second internal electrodes disposed to face each other.
US11017942B2 Systems and methods for determining coil current in wireless power systems
Disclosed herein are systems and methods for determining a current of a resonator coil during operation of a wireless power system having the resonator coil, in which the resonator coil is coupled to a fixed capacitive network and a reactance circuit. The systems and methods can include determining a first signal which can include receiving a current in an inductor of the reactance circuit; converting the current to a voltage signal; and scaling the voltage signal. The systems and methods can include determining a second signal which can include receiving an output voltage at an output of the reactance circuit; dividing the output voltage; and integrating the divided scaled voltage to produce an inverted differentiated voltage signal. The methods can include summing the first signal and the second signal to produce a summed signal; and determining the current in the resonator coil based on the summed signal.
US11017939B2 Magnetic component assembly with filled gap
Magnetic component assemblies for circuit boards include magnetic cores formed with a gap and preformed conductive windings sliding assembled to the cores via the gaps. The gaps in the cores are filled with a magnetic material to enhance the magnetic performance. The magnetic component assemblies may define power inductors.
US11017933B2 Winding coil component
A winding coil component includes a drum-shaped core including a winding core having a substantially n-sided prism shape having n side surfaces positioned around a central axis. The n side surfaces include a first side surface facing a mounting substrate and wire wound around the winding core portion and forming a multilayer portion in layers including a superposition beginning portion located in a region other than a region above an n-th side surface to which the n side surfaces are arranged in order from the first side surface in a winding direction in which a lowest layer of the multilayer portion winds toward the superposition beginning portion.
US11017931B2 Coil component
A coil component includes a body, a coil part embedded in the body, and an insulating layer covering the body. First and second plating electrodes are disposed between the body and the insulating layer, are connected to the coil part, and are disposed to be spaced apart from each other on one surface of the body. First and second through electrodes penetrate through the insulating layer to thereby be connected to the first and second plating electrodes, respectively.
US11017929B2 Multi-layer sensor core
A sensor may include a core and a coil. The core may include a rectangular substrate, a layer of magnetically-permeable material disposed on the substrate, and an adhesive rigidly coupling two ends of the substrate so as to form a tube with the rectangular substrate. The coil may be wound on the tube. The core may further include a layer of radiopaque material. The core may further include a flex pad for electrically coupling the coil with an external system.
US11017923B1 Resistor component
A resistor component includes an insulating substrate having one surface and the other surface and one end surface and the other end surface, a slit portion disposed on the one end surface and the other end surface and extending to the one surface and the other surface, a resistor layer disposed on the one surface, and a first terminal and a second terminal connected to the resistor layer. The first and second terminals include: an internal electrode layer including an upper electrode disposed on the one surface, a lower electrode disposed on the other surface, and a slit electrode disposed on an internal wall of the slit portion, and an external electrode layer disposed on the one end surface, the other end surface, and the internal wall of the slit portion, being in contact with the slit electrode, having a thickness less than a thickness of the internal electrode layer.
US11017922B2 Chip resistor and mounting structure thereof
A chip resistor with a reduced thickness is provided. The chip resistor includes an insulating substrate, a resistor embedded in the substrate, a first electrode electrically connected to the resistor, and a second electrode electrically connected to the resistor. The first electrode and the second electrode are spaced apart from each other in a lateral direction that is perpendicular to the thickness direction of the substrate.
US11017907B2 Nuclear reactor protection systems and methods
A nuclear reactor protection system includes a plurality of functionally independent modules, each of the modules configured to receive a plurality of inputs from a nuclear reactor safety system, and logically determine a safety action based at least in part on the plurality of inputs; and one or more nuclear reactor safety actuators communicably coupled to the plurality of functionally independent modules to receive the safety action determination based at least in part on the plurality of inputs.
US11017906B2 Machine learning models in location based episode prediction
The disclosed embodiments include a method performed by server computer(s). The method includes obtaining private healthcare insurance claims data and public healthcare procedure code data from one or more data source(s), generating a model based the training data, and determining a multiplier for each of the many facilities based on the model. The model provides predictive results for variability between healthcare facilities thereby enabling consumer research in light of considerations in facility variability. The multiplier is indicative of a value used to scale the public healthcare procedure code data for a facility such that a healthcare service associated with the facility can be estimated based on the multiplier.
US11017904B2 Systems and methods for simulation of occluded arteries and optimization of occlusion-based treatments
Systems and methods are disclosed for simulation of occluded arteries and/or optimization of occlusion-based treatments. One method includes obtaining a patient-specific anatomic model of a patient's vasculature; obtaining an initial computational model of blood flow through the patient's vasculature based on the patient-specific anatomic model; obtaining a post-treatment computational model by modifying portions of the initial computational model based on an occlusion-based treatment; generating a pre-treatment blood flow characteristic using the initial computational model or computing a post-treatment blood flow using the post-treatment computational model; and outputting a representation of the pre-treatment blood flow characteristic or the post-treatment blood flow characteristic.
US11017901B2 Systems and methods to identify persons and/or identify and quantify pain, fatigue, mood, and intent with protection of privacy
The disclosed technology enables, among other things, the identification of persons and the characterization of mental perceptions (e.g., pain, fatigue, mood) and/or intent (e.g., to perform an action) for medical, safety, home care, and other purposes. Of significance are applications that require long-term patient monitoring, such as tracking disease progression (e.g., multiple sclerosis), or monitoring treatment or rehabilitation efficacy. Therefore, longitudinal data must be acquired over time for the person's identity and other characteristics (e.g., pain level, usage of a cane). However, conventional methods of person identification (e.g., photography) acquire unnecessary personal information, resulting in privacy concerns. The disclosed technology allows measurements to be performed while protecting privacy and functions with partial or incomplete measurements, making it robust to real-world (noisy, uncontrolled) settings, such as in a person's home (whether living alone or with others).
US11017900B2 Calculation engine based on histograms
Methods and apparatus, including computer program products, are provided for processing analyte data. In some exemplary implementations, there is provided a method that includes generating, by at least one processor, a data structure comprising a plurality of bins assigned to a plurality of predetermined glucose concentration levels; generating, by the at least one processor, a value representative of a measured glucose concentration level obtained from received sensor data; adding, by the at least one processor, the value to at least one of the plurality of bins, wherein the adding of the value increments an occurrence value for the at least one of the plurality of bins; and analyzing, by the at least one processor, the data structure including the at least one of the plurality of bins and the occurrence value to determine at least one descriptive measurement. Related systems, methods, and articles of manufacture are also disclosed.
US11017895B2 Irecon: intelligent image reconstruction system with anticipatory execution
A diagnostic imaging system retrieves data (206) from a plurality of accessible data sources, the accessible data sources storing data including physiological data describing a subject to be imaged, a nature of a requested diagnostic image, image preferences of a clinician who requested the diagnostic image, and previously reconstructed images of the requested nature of the subject and/or other subjects, reconstruction parameters and/or sub-routines used to reconstruct the previously reconstructed images. The system analyzes (6, 12) the retrieved data to automatically generate reconstruction parameters and/or sub-steps specific to the nature of the requested diagnostic image, the subject, and the clinician image preferences. The system controls a display device (10, 216) to display the generated reconstruction parameters and/or sub-routines to the user for a user selection. The system sets a reconstruction processor system to reconstruct scan data using the selected reconstruction parameters and/or sub-routines.
US11017890B2 Systems and methods for aggregating analyte data
An analyte measurement system includes one or more handheld analyte meters and/or measurement devices and a means for collecting data, preserving data integrity, and uniquely identifying patient data received from multiple sources. For example, provided herein is a means to uniquely identify patients and their data when the data is collected from one or more measurement devices. By providing a way to allow the patients to use multiple sources to collect data, the system described herein provides patients with more flexibility, which should encourage better compliance to protocols. Further, by having a way to uniquely identify patients' data without requiring a patient to only use one analyte meter, for example, data can be centralized and analysis can be done with more assurance that all of the patient's data is being considered in the analyses.
US11017889B1 Methods and systems for graphical medicine display
Methods and systems for graphical medicine display are described. In one embodiment, prescription drug data associated with a prescription drug is accessed. The prescription drug is associated with a member. The prescription drug data includes prescription name data, prescription packaging data, prescription pill data, and dosage data. A prescription pill indicator and a prescription package indicator based on the prescription drug data are determined. A medicine display based on the prescription drug data associated with the prescription drug is generated. The medicine display includes the prescription pill indicator in association with the prescription package indicator, a prescription name indicator, and a dosage indicator. The prescription name data, the prescription packaging data, and the prescription pill data are associated with the prescription drug and the dosage data is associated with the member.
US11017883B1 Blockchain-based systems and methods for tracking donated genetic material transactions
Systems and methods are provided for tracking the provenance of donated genetic material using blockchain-based technologies. Immutable records of transactions associated with the donated genetic material are generated. These records can be utilized to create an audit trail for the genetic material.
US11017881B2 Systems, methods, and devices for analysis of genetic material
A representation of a nucleic acid sequence encodes a particular gene having at least one intron. An intron signature value corresponding to the at least one intron is determined based on a first computational function applied to at least one portion of the representation of the nucleic acid sequence corresponding to the at least one intron. A protein signature value is determined, being based on a second computational function applied to a representation of a protein. In a database, an association is formed between the intron and protein signature values. This process is repeated for each of a plurality of nucleic acid sequences. Nucleic acid sequences in the database are ordered based on a sort of corresponding intron signature values. An ordering determined by the sort is used to determine or confirm a role or function of a portion of a given nucleic acid sequence.
US11017880B2 Screening of large-scale genetic interaction networks
Disclosed in some examples are methods including selecting a first plurality of single gene mutants from a pool of possible single gene mutants of an organism. The first plurality of single gene mutants is less than a number of possible single mutants. A computer processor is used to iteratively select a second plurality of single gene mutants by selecting single gene mutants from the pool of possible single gene mutants that increases a sum of products of similarities between the first plurality of single gene mutants and corresponding functional relationships. The second plurality of single gene mutants is larger in number than the first plurality of single gene mutants, and wherein the second plurality of single gene mutants is less than the number of possible single gene mutants of the organism. A set of genes is outputted comprising the first and second pluralities of single gene mutants.
US11017878B1 Memory device with a dynamic fuse array
Methods, systems, and devices for memory device with a dynamic fuse array are described. Techniques and apparatus are described herein for storing an address of a set of the array of latches that is associated with a set of the array of fuses. A se of an array of fuses may include a first portion for indicating the value of the parameter and a second portion for indicating an address of a set of the array of latches that is to receive the parameter stored in the first portion. An enabled set of fuses may indicate that the block is storing a value of a parameter for operating the memory device. By storing the address for the set of the array latches in the set of the array of fuses, a memory device may have a dynamic mapping between the array of latches and the array of fuses. Such a dynamic mapping may reduce an area used by the array of fuses and may make some parameters modifiable.
US11017875B2 Tracking address ranges for computer memory errors
Tracking address ranges for computer memory errors including detecting, by memory logic, an error at a memory address, the memory address representing one or more memory cells at a physical location of computer memory; reporting, by the memory logic to memory firmware, the detected error including providing the memory firmware with the memory address; identifying, by the memory firmware, an address range affected by the detected error including scanning the computer memory in dependence upon the memory address; determining, by the memory firmware, a region size based on the address range affected by the detected error; and populating an entry in a mark table corresponding to the detected error, including populating a field specifying the region size and a field specifying a match address corresponding to the memory address.
US11017872B2 Gate driving circuit, display device and driving method
A gate driving circuit includes M levels of shift registers. Each level of shift register includes a first register unit and a second register unit. The first register units of the M levels of shift registers are connected to each other in a cascaded manner, the second register units of the M levels of shift registers are connected to each other in a cascaded manner, and an output end of the first register unit and an output end of the second register unit of each level of shift register are electrically connected to an output end of the level of shift register, where M is a positive integer greater than or equal to 1.
US11017864B2 Preemptive mitigation of cross-temperature effects in a non-volatile memory (NVM)
Method and apparatus for managing data in a non-volatile memory (NVM) of a storage device, such as a solid-state drive (SSD). An initial temperature is stored associated with the programming of data to memory cells in the NVM. A current temperature associated with the NVM is subsequently measured. At such time that a difference interval between the initial and current temperatures exceeds a selected threshold, a preemptive parametric adjustment operation is applied to the NVM. The operation may include a read voltage calibration, a read voltage increment adjustment, and/or a forced garbage collection operation. The operation results in a new set of read voltage set points for the data suitable for the current temperature, and is carried out independently of any pending read commands associated with the data. The initial temperature can be measured during the programming of the data, or measured during the most recent read voltage calibration operation.
US11017861B2 Semiconductor memory device and method of operating the same
Provided herein may be a semiconductor memory device and a method of operating the semiconductor memory device to program a selected physical page of the semiconductor memory device. The method may include performing a plurality of program loops. Each of the program loops may include: applying a bit line voltage based on data input to a page buffer of the semiconductor memory device; applying a two-step program pulse to a word line coupled to the selected physical page; performing a program verify operation on the selected physical page using a double verify scheme; and determining a bit line voltage to be applied in a subsequent program loop based on a result of the program verify operation.
US11017859B2 Sequential write and sequential write verify in memory device
Some embodiments include apparatuses and methods for performing a first stage of an operation of storing information in a first memory cell and a second memory cell, and performing a second stage of the operation after the first stage to determine whether each of the first and second memory cells reaches a target state. The first memory cell is included in a first memory cell string coupled to a data line through a first select transistor. The second memory cell is included in a second memory cell string coupled to the data line through a second select transistor.
US11017858B1 Low power content addressable memory
A CAM/TCAM includes a plurality of rows of CAM/TCAM lines, a plurality of search lines, and a plurality of bit lines, wherein each row comprises an array of CAM/TCAM cells. Each TCAM cell has two storage cells, representing state for data and a mask of the cell, and match logic. The two storage cells connect to a respective bit line as input and their output drives the match logic. In response to the respective search line and storage outputs, the match logic generates cell match outputs. The match logic can be implemented using static logic comprising tristate gates and masking logic that forces the cell match output to a predetermined value in response to the stored mask value. The match outputs in the row are AND-ed by a logic tree to generate a match output, thereby reducing power consumption.
US11017856B1 Soft reset for multi-level programming of memory cells in non-Von Neumann architectures
A method for setting memory elements in a plurality of states includes applying a set signal to a memory element to transition the memory element from a low-current state to a high-current state; applying a partial reset signal to the memory element to transition the memory element from the high-current state to a state between the high-current state and the low-current state; determining whether the state corresponds to a predetermined state; and applying one or more additional partial reset signals to the memory element until the state corresponds to the predetermined current state. The memory element may be coupled in series with a transistor, and a voltage control circuit may apply voltages to the transistor to set and partially reset the memory element.
US11017853B2 Cross point resistive memory device with compensation for leakage current in read operation
A memory device and an operating method of the memory device, the memory device including a memory cell array including a plurality of memory cells respectively arranged at points at which a plurality of word lines and a plurality of bit lines cross; and a control logic circuit configured to precharge a selected word line connected to a selected memory cell and precharge a selected bit line connected to the selected memory cell in a read operation, wherein the control logic circuit is further configured to precharge a first unselected word line among unselected word lines to a second voltage when the selected word line is precharged to a first voltage, a level of the first voltage is lower than a level of a third voltage applied to an unselected bit line when the selected word line is precharged to the first voltage, and a level of the second voltage is higher than the level of the third voltage.
US11017851B1 Silicon-oxide-nitride-oxide-silicon based multi level non-volatile memory device and methods of operation thereof
A semiconductor device that has a semiconductor-oxide-nitride-oxide-semiconductor (SONOS) based non-volatile memory (NVM) array including NVM cells arranged in rows and columns, in which NVM transistors of the NVM cells are configured to store N×analog values corresponding to the N×levels of their drain current (ID) or threshold voltage (VT) levels, digital-to-analog (DAC) function that receives and converts digital signals from external devices, column multiplexor (mux) function that is configured to select and combine the analog value read from the NVM cells, and analog-to-digital (ADC) function that is configured to convert analog results of the column mux function to digital values and output the digital values.
US11017849B2 Non-volatile memory device with concurrent bank operations
An apparatus, system, and method for controlling data transfer to an output port of a serial data link interface in a semiconductor memory is disclosed. In one example, a flash memory device may have multiple serial data links, multiple memory banks and control input ports that enable the memory device to transfer the serial data to a serial data output port of the memory device. In another example, a flash memory device may have a single serial data link, a single memory bank, a serial data input port, a control input port for receiving output enable signals. The flash memory devices may be cascaded in a daisy-chain configuration using echo signal lines to serially communicate between memory devices.
US11017841B2 Nonvolatile memory device, operating method of nonvolatile memory device, and storage device including nonvolatile memory device
A nonvolatile memory device includes a memory cell array that includes memory cells arranged in rows and columns, row decoder circuitry that is connected to the rows of the memory cells through word lines and controls voltages of the word lines, and page buffer circuitry that is connected to the columns of the memory cells through bit lines and includes first transistors configured to sense voltages of the bit lines and second transistors configured to invert and sense the voltages of the bit lines. The page buffer circuitry is configured to obtain first values by performing a first sensing operation on first bit lines of the bit lines through the first transistors and obtain second values by performing a second sensing operation on the second bit lines of the bit lines through the second transistors, wherein the first values or the second values are inverted.
US11017840B1 Semiconductor devices
A semiconductor device includes a row address generation circuit, a first region, and a second region. The row address generation circuit is configured to generate a first row address from an active signal and a first bank address and configured to generate a second row address from the active signal and a second bank address. The first region is activated by the first row address and an internal address. The second region is activated by the second row address and the internal address. One of the first and second bank addresses is selectively generated according to a command/address signal.
US11017833B2 Apparatuses and methods for pure-time, self adopt sampling for row hammer refresh sampling
Apparatuses and methods for pure-time, self-adopt sampling for RHR refresh. An example apparatus includes a memory bank comprising a plurality of rows each associated with a respective row address, and a sampling timing generator circuit configured to provide a timing signal having a plurality of pulses. Each of the plurality of pulses is configured to initiate sampling of a respective row address associated with a row of the plurality of rows to detect a row hammer attack. The sampling timing generator includes first circuitry configured to provide a first subset of pulses of the plurality of pulses during a first time period and includes second circuitry configured to initiate provision of a second subset of pulses of the plurality of pulses during a second time period after the first time period.
US11017832B2 Multi-level storage in ferroelectric memory
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. In some examples, multi-level accessing, sensing, and other operations for ferroelectric memory may be based on sensing multiple charges, including a first charge associated with a dielectric of the memory cell and a second charge associated with a polarization of the memory cell. In some cases, multi-level accessing, sensing, and other operations may be based on transferring a first charge associated with a dielectric of the memory cell to a sense amplifier, isolating the sense amplifier, activating the sense amplifier, transferring a second charge associated with a polarization of the memory cell to the sense amplifier, and activating the sense amplifier a second time.
US11017830B1 Ferroelectric memories
A ferroelectric memory is provided. The ferroelectric memory includes a first electrode layer having a dominant crystallographic orientation of (110) or (220), a second electrode layer opposite the first electrode layer, wherein the second electrode layer has a dominant crystallographic orientation of (110) or (220), and a ferroelectric layer disposed between the first electrode layer and the second electrode layer, wherein the ferroelectric layer has a dominant crystallographic orientation of (111).
US11017829B2 Magnetic memory device including voltage generator connected to both word line driver and write driver
A magnetic memory devices including a memory cell array including magnetic memory cells, a voltage generator configured to generate a gate voltage, a row decoder including a word line driver, the word line driver configured to be driven by the gate voltage generated from the voltage generator, and the row decoder connected to the memory cell array through a word line, a column decoder connected to the memory cell array through a plurality of bit lines and a plurality of source lines, and a write driver configured to transfer a write voltage to a bit line selected, from among the plurality of bit lines, by the column decoder, the word line driver driven by the gate voltage generated from the voltage generator may be provided.
US11017824B2 Semiconductor device, control device and control method
An interference of control signals is caused by a deviation in the start timings of counting between counters of timer counter units of a first MCU and a second MCU. And thus, when a count value of the counter of the MCU of a parent reaches a predetermined value D, the MCU of the parent transmits a trigger signal to the MCU of a child. The MCU of the child obtains the time difference between the start timings of the counts of the counters of the parent and the child from the difference between the D and a count value E of the child at that time. A count period of the child until a maximum value of the count value is reached is adjusted by the time difference.
US11017822B1 Yield-centric power gated regulated supply design with programmable leakers
Examples described herein provide a method for disabling a defective portion of a fabric die of a stacked IC device. The method includes receiving a signal indicating that a portion of a fabric die of a stacked IC device including at least two fabric dies is defective. The method further includes, in response to the signal, pulling a source voltage rail of the defective portion to ground, thereby disabling the portion, and operating the remainder of the fabric die without interference from or contention with the disabled portion. In one example, the stacked IC device is an active on active (AoA) device, and the portion of the fabric die includes a configuration memory cell. In one example, the signal is received after power-up of the stacked IC device.
US11017821B2 Magnetic recording array and magnetic recording device
A magnetic recording array includes: a plurality of domain wall moving elements; a first wiring which is electrically connected to a reference potential and is electrically connected to at least one domain wall moving element of the plurality of domain wall moving elements; a second wiring which is electrically connected to at least two or more domain wall moving elements of the plurality of domain wall moving elements; a first switching element which is connected between each of the domain wall moving elements and the first wiring; and a second switching element which is connected between each of the domain wall moving elements and the second wiring, wherein an OFF resistance of the first switching element is smaller than an OFF resistance of the second switching element.
US11017820B1 Electromagnetic shielding for electronic devices
An electronic device which includes a cover, a base coupled to the cover to create an enclosure, a conductive layer positioned between the cover and the base and arranged to reduce radiation from entering the enclosure, and a gasket positioned between the cover and the base to create a seal and positioned between the conductive layer and the enclosure.
US11017813B2 Storyline experience
A processing device provides, on a mobile device, a storyline content user interface (UI) for adding video content to a storyline, the storyline content UI having a first area including a media player, a second area including visual representations of video clips of one or more storylines, and a third area including a first UI element to record video content. In response to a user activation of the first UI element, the processing device initiates recording of a new video clip, determines that a duration of the new video clip has reached a predetermined threshold, creates a visual representation of the new video clip, associates the new video clip that reached the predetermined threshold with an additional storyline, and adds the visual representation of the new video clip to the second area. In response to a user selection of the visual representation of the new video clip in the second area of the storyline content UI, the processing device causes the new video clip to be associated with the storyline. In response to a user selection of the visual representation of the new video clip, the processing device plays, in a predetermined order on the mobile device, the new video clip and at least one of the video clips having the visual representations in the second area.
US11017811B1 Playback speed optimization
An approach is provided that identifies a preferred words-per-minute corresponding to a user listening to an audio. The actual words-per-minute of a selected audio segment is determined and used to calculate a playback speed adjustment value based on the preferred words-per-minute and the actual words-per-minute. A playback speed is adjusted according to the calculated playback speed adjustment value and the audio segment is audibly played at the adjusted first playback speed.
US11017810B2 Spring clip leader and housing for magnetic tape
A system, according to one embodiment, includes: a plurality of tape reels; and a tape drive configured for reading data from tape stored on at least one of the plurality of tape reels. At least some of the tape reels have a tape wound thereon and a spring-like clip coupled to a free end of the tape. Moreover, the clip is selectively positionable in a wrapped position where the clip wraps around a portion of the tape when the tape is wound onto the reel, thereby holding the portion of the tape in place on the reel.
US11017808B2 Fractionation method for magnetic recording-magnetic powder, fractionation apparatus for magnetic recording-magnetic powder, and method of producing magnetic recording medium
A fractionation method for magnetic recording-magnetic powder is provided. The method includes applying a magnetic field to a liquid that contains magnetic recording-magnetic powder dispersed therein, wherein the liquid is stored in a storage unit relatively shifting a position where the magnetic field is applied to the liquid; and separating the storage unit into two parts after the shift.
US11017802B2 Magnetic head with assisted magnetic recording and method of making thereof
A magnetic head includes a main pole configured to serve as a first electrode, an upper pole containing a trailing magnetic shield configured to a serve as a second electrode, and a record element located in a trailing gap between the main pole and the trailing magnetic shield. The record element includes an electrically conductive, non-magnetic material portion which is not part of a spin torque oscillator stack. The main pole and the trailing magnetic shield are electrically shorted by the record element across the trailing gap between the main pole and the trailing magnetic shield such that an electrically conductive path is present between the main pole and the trailing magnetic shield through the record element.
US11017801B1 Magnetic head with assisted magnetic recording and method of making thereof
A magnetic head includes a main pole configured to serve as a first electrode, an upper pole containing a trailing magnetic shield configured to a serve as a second electrode, and a record element located in a trailing gap between the main pole and the trailing magnetic shield. The record element includes an electrically conductive, non-magnetic material portion which is not part of a spin torque oscillator stack. The main pole and the trailing magnetic shield are electrically shorted by the record element across the trailing gap between the main pole and the trailing magnetic shield such that an electrically conductive path is present between the main pole and the trailing magnetic shield through the record element.
US11017798B2 Dynamic noise suppression and operations for noisy speech signals
Systems and methods for noise reduction are provided including operations for noisy speech signals, such as speech signals that are subject to speech processing, speech recognition and speech transmission for voice communication purposes. In one embodiment, a system for noise suppression includes an input smoothing filter to smooth magnitudes of the input spectrum, a desired noise shape determination block configured to determine a desired noise shape of the noise spectrum dependent on the smoothed-magnitude input spectrum, and a suppression factors determination block configured to determine a set of suppression factors based on the desired noise shape and the smoothed-magnitude input spectrum. In one embodiment, a filter coefficient determination block is configured to determine noise suppression filter coefficients from the desired noise shape of the noise spectrum. Embodiments are also directed to systems and methods for noise reduction. System configurations and processes are provided for formant detection.
US11017792B2 Modular echo cancellation unit
An audio system includes: a head unit comprising at least a first processor, the head unit being configured to generate a plurality of program content signals, one of the plurality of program content signals being a phone program content signal being received from a phone, wherein the plurality of program content signals are transduced by an acoustic transducer into an acoustic signal within a vehicle cabin; a microphone disposed within the vehicle cabin such that the microphone receives the acoustic signal and produces a microphone signal comprising a plurality of echo signals; and a multichannel echo-cancellation unit being implemented by a second processor, the multichannel echo-cancellation unit being configured to receive a plurality of reference signals and to minimize the plurality of echo signals, according to the plurality of reference signals, to produce an estimated voice signal, and to provide the estimated voice signal to the head unit.
US11017789B2 Robust Short-Time Fourier Transform acoustic echo cancellation during audio playback
Example techniques involve noise-robust acoustic echo cancellation. An example implementation may involve causing one or more speakers of the playback device to play back audio content and while the audio content is playing back, capturing, via the one or more microphones, audio within an acoustic environment that includes the audio playback. The example implementation may involve determining measured and reference signals in the STFT domain. During each nth iteration of an acoustic echo canceller (AEC): the implementation may involve determining a frame of an output signal by generating a frame of a model signal by passing a frame of the reference signal through an instance of an adaptive filter and then redacting the nth frame of the model signal from an nth frame of the measured signal. The implementation may further involve determining an instance of the adaptive filter for a next iteration of the AEC.
US11017785B2 Advanced stereo coding based on a combination of adaptively selectable left/right or mid/side stereo coding and of parametric stereo coding
The application relates to audio encoder and decoder systems. An embodiment of the encoder system comprises a downmix stage for generating a downmix signal and a residual signal based on a stereo signal. In addition, the encoder system comprises a parameter determining stage for determining parametric stereo parameters such as an inter-channel intensity difference and an inter-channel cross-correlation. Preferably, the parametric stereo parameters are time- and frequency-variant. Moreover, the encoder system comprises a transform stage. The transform stage generates a pseudo left/right stereo signal by performing a transform based on the downmix signal and the residual signal. The pseudo stereo signal is processed by a perceptual stereo encoder. For stereo encoding, left/right encoding or mid/side encoding is selectable. Preferably, the selection between left/right stereo encoding and mid/side stereo encoding is time- and frequency-variant.
US11017784B2 Speaker verification across locations, languages, and/or dialects
Methods, systems, apparatus, including computer programs encoded on computer storage medium, to facilitate language independent-speaker verification. In one aspect, a method includes actions of receiving, by a user device, audio data representing an utterance of a user. Other actions may include providing, to a neural network stored on the user device, input data derived from the audio data and a language identifier. The neural network may be trained using speech data representing speech in different languages or dialects. The method may include additional actions of generating, based on output of the neural network, a speaker representation and determining, based on the speaker representation and a second representation, that the utterance is an utterance of the user. The method may provide the user with access to the user device based on determining that the utterance is an utterance of the user.
US11017781B2 Reverberation compensation for far-field speaker recognition
Techniques are provided for reverberation compensation for far-field speaker recognition. A methodology implementing the techniques according to an embodiment includes receiving an authentication audio signal associated with speech of a user and extracting features from the authentication audio signal. The method also includes scoring results of application of one or more speaker models to the extracted features. Each of the speaker models is trained based on a training audio signal processed by a reverberation simulator to simulate selected far-field environmental effects to be associated with that speaker model. The method further includes selecting one of the speaker models, based on the score, and mapping the selected speaker model to a known speaker identification or label that is associated with the user.
US11017780B2 System and methods for neural network orchestration
Methods and systems for classifying a multimedia file using interclass data is disclosed. One of the methods can use classification results from one or more engines of different classes to select a different engine for the original classification task. For example, given an audio segment with associated metadata and image data, the disclosed interclass method can use the classification results from a topic classification of metadata and/or an image classification result of the image data as inputs for selecting a new transcription engine to transcribe the audio segment.
US11017776B2 Local and cloud speech recognition
Disclosed herein are system, apparatus, article of manufacture, method and/or computer program product embodiments, and/or combinations and sub-combinations thereof, for distributing the performance of speech recognition among a remote control device and a voice platform in the cloud. In some embodiments, the remote control device operates to receive a voice input from a user. The remote control device detects a trigger word in the voice input. The remote control device then processes the voice input. The remote control device then transmits the voice input to a voice platform based on the detecting in order to determine an intent associated with the voice input.
US11017772B1 Natural language programming
Audio content associated with a received verbal utterance is received. An operational meaning of the received verbal utterance comprising a compound input is recognized and determined at least in part by: determining that a first subset of the received verbal utterance is associated with a first recognized input; determining that a second subset of the received verbal utterance is associated with a second recognized input; and storing data that associates with a scene identifier a set of commands that includes a first command associated with the first recognized input and a second command associated with the second recognized input.
US11017770B2 Vehicle having dialogue system and control method thereof
A vehicle may include: an input processor to receive a speech of a user and convert the speech into a text-type utterance; a natural language processor that performs morpheme analysis on the text-type utterance, and identifies an intent of the user and selects a domain related to the text-type utterance based on a result of the morpheme analysis; a storage to store a plurality of domains; a controller to add a new domain to the plurality of domains based on a specific condition, and determine a final domain among the plurality of domains and the added new domain; and a result processor to generate a command based on the determined final domain.
US11017767B2 Hierarchical attention for spoken dialogue state tracking
Described herein are systems and methods for providing hierarchical state tracking in a spoken dialogue system. A sequence of turns is received by a spoken dialogue system. Each turn includes a user utterance and a machine act. At each turn, a value pointer and a turn pointer are provided for that turn. The value pointer represents a probability distribution over the one or more words in the user utterance that indicates whether each word in the user utterance is a slot value for a slot. The turn pointer identifies which turn in a set of turns includes a currently-relevant slot value for the slot, where the set of turns includes a current turn for which the turn point is being provided, and all turns that precede the current turn.
US11017765B2 Intelligent assistant with intent-based information resolution
A method for use with a computing device is provided. The method may include executing one or more programs of an intelligent digital assistant system at a processor and presenting a user interface to a user. At the processor, the method may include receiving natural language user input from the user, parsing the user input at an intent handler to determine an intent template with slots, populating the slots in the intent template with information from user input, and performing resolution on the intent template to partially resolve unresolved information. If a slot with missing slot information exists in the partially resolved intent template, a loop may be executed at the processor to fill the slots. The method may include, at the processor, determining that all required information is available and resolved and generating a rule based upon the intent template with all required information being available and resolved.
US11017764B1 Predicting follow-on requests to a natural language request received by a natural language processing system
In various embodiments, a natural language (NL) application receives a partial NL request associated with a first context, and determining that the partial NL request corresponds to at least a portion of a first next NL request prediction included in one or more next NL request predictions generated based on a first natural language (NL) request, the first context associated with the first NL request, and a first sequence prediction model, where the first sequence prediction model is generated via a machine learning algorithm applied to a first data dependency model and a first request prediction model. In response to determining that the partial NL request corresponds to at least the portion of the first next NL request prediction, the NL application generates a complete NL request based on the first NL request and the partial NL request, and causes the complete NL request to be applied to a data storage system.
US11017761B2 Parallel neural text-to-speech
Presented herein are embodiments of a non-autoregressive sequence-to-sequence model that converts text to an audio representation. Embodiment are fully convolutional, and a tested embodiment obtained about 46.7 times speed-up over a prior model at synthesis while maintaining comparable speech quality using a WaveNet vocoder. Interestingly, a tested embodiment also has fewer attention errors than the autoregressive model on challenging test sentences. In one or more embodiments, the first fully parallel neural text-to-speech system was built by applying the inverse autoregressive flow (IAF) as the parallel neural vocoder. System embodiments can synthesize speech from text through a single feed-forward pass. Also disclosed herein are embodiments of a novel approach to train the IAF from scratch as a generative model for raw waveform, which avoids the need for distillation from a separately trained WaveNet.
US11017756B2 Phononic system to achieve quantum-analogue phase-based unitary operations
Various embodiments of a phononic system to achieve quantum-analogue phase-based unitary operations are disclosed. A plurality of diatomic molecules is adsorbed on a cubic crystal surface. At least a first pair of parallel chains is created from the plurality of diatomic molecules, such that the two constituent chains of the first pair of parallel chains each comprise three or more diatomic molecules. One or more diatomic molecules of the first pair of parallel chains are displaced in order to thereby create one or more kinks in the first pair of parallel chains. The one or more kinks apply a first desired phase transformation to elastic waves scattered by the plurality of diatomic molecules and adjusting the number of kinks or adjusting the order in which kinks are created or modified causes a corresponding adjustment to the first desired phase transformation.
US11017755B2 Pickup with variable coil windings for string instruments
A pickup with variable coil windings for string instruments is described herein. In one aspect, the pickup including a coil including a first subsection wound around a first subset of pole pieces of a plurality of pole pieces; and a second subsection wound around a set of pole pieces of the plurality of pole pieces, the set of pole pieces selected from the group of: the plurality of pole pieces in its entirety and a second subset of pole pieces different than the first subset of pole pieces.
US11017754B2 Singing scoring method and singing scoring system based on streaming media
A singing scoring method and a singing scoring system based on streaming media are provided. In the singing scoring method and the singing scoring system, a first time difference between a moment at which a streaming video player starts to play a song and a moment at which an electronic device starts an audio recording program and a scoring engine is calculated. In addition, in the singing scoring method and the singing scoring system, a playing time difference of the streaming video player within every fixed period of a system time of the electronic device is continuously calculated, and the playing time difference is transferred to the scoring engine for accumulation to form a second time difference. The scoring engine then adjusts a singing time of each note in an entire musical score according to the first time difference and the second time difference.
US11017752B1 Attachment for mouth actuated touch screens
An attachment for a smart device having a touch screen displaying at least one interactive area thereon includes at least one port defining an air passageway therethrough and at least one actuator element disposed at least partially within the air passageway of each of the at least one ports. Each of the at least one actuator elements is configured to actuate upon a flow of air passing through the corresponding air passageway. Actuation of each of the at least one actuator elements causes an electrical interaction with one of the interactive areas of the touch screen.
US11017751B2 Synchronizing playback of a digital musical score with an audio recording
Playback of a graphical representation of a digital musical score is synchronized with an expressive audio rendering of the score that contains tempo and dynamics beyond those specified in the score. The method involves determining a set of offsets for occurrences of score events in the audio rendering by comparing and temporally aligning audio waveforms of successive subclips of the audio rendering with corresponding audio waveforms of successive subclips of an audio rendering synthesized directly from the score. Tempos and dynamics of human performances may be extracted and used to generate expressive renderings synthesized from the corresponding digital score. This enables parties who wish to distribute or share music scores, such as composers and publishers, to allow prospective licensors to evaluate the score by listening to an expressive musical recording instead of a mechanically synthesized rendering.
US11017747B2 Systems and methods for adaptive calibration for dynamic rotation of computing device
Aspects of the present disclosure include a computing device for adaptive calibration for dynamic rotation. In an example, a computing device may include an orientation sensor to generate orientation information corresponding to an orientation of the computing device. The computing device monitor a rotation of the computing device based on the orientation information and determine a resting rotational angle of the computing device does not match a desired endpoint orientation angle. The computing device may set the endpoint orientation angle equal to the resting rotational angle and map a set of image orientation angles of an image according to the endpoint orientation angle and a second endpoint orientation angle. The computing device may determine the computing device is rotating based on the orientation information and cause dynamic display of the image based on the set of image orientation angles in response to a rotation of the computing device.
US11017745B2 Method, computer readable storage medium having instructions, apparatus and system for calibrating augmented reality goggles in a transportation vehicle, transportation vehicle suitable for the method, and augmented reality goggles suitable for the method
A method, a computer-readable storage medium with instructions, a device, and a system for calibrating a pair of augmented-reality glasses in a transportation vehicle and a transportation vehicle and a pair of augmented-reality glasses suitable for the method. A set of points in an interior of the transportation vehicle is illuminated sequentially. At least a subset of the illuminated points are captured by a camera arranged in the pair of augmented-reality glasses. Through a comparison of the subset of the illuminated points that have been captured by the camera with a known geometry of the set of points, a transformation specification for the pair of augmented-reality glasses is determined.
US11017742B2 Information handling system multiple display viewing angle brightness adjustment
A portable information handling system presents visual images at first and second displays integrated in first and second rotationally-coupled housing portions. When the housing portions rotate to a clamshell configuration, a refractive layer in a “DO” display aligns light illuminated from the display off an orthogonal angle and towards a user while a “SEE” display aligns light illuminated from the display along an orthogonal angle.
US11017739B2 Method for supporting user input and electronic device supporting the same
An electronic device is provided. The electronic device includes housing, a touchscreen display, a wireless communication circuit, a connector, and a processor electrically connected to the touchscreen display, the wireless communication circuit, and the connector. The processor is configured to connect to an external display device via the wireless communication circuit or the connector, to display a graphical user interface corresponding to a screen, which the external display device outputs, in at least part of a region of the touchscreen display, to display at least part of a region of the graphical user interface in a black background, and to convert first coordinate information of a user input, which is received with respect to at least one region of the graphical user interface, to second coordinate information corresponding to the external display device to transmit the second coordinate information to the external display device.
US11017738B2 Gate driving circuit
A gate driving circuit which allows narrower framing of a display screen includes cascade-connected gate driving modules. Each gate driving module is electrically coupled to first and second scan lines and outputs scanning signals to the first and the second scan lines in a time-division manner in response to first and second clock signals. Each gate driving module includes an input transistor, and first and second output transistors. The input transistor receives a trigger signal for activating the gate driving module. The input transistor controls the first output transistor to output first scanning signal to first scan line in response to the first clock signal and controls the second output transistor to output second scanning signal to the second scan line in response to the second clock signal.
US11017736B2 Display device
A display device may include a data driver that outputs a previous data voltage and a current data voltage, respectively, at an output terminal, to be applied to a pixel of a display panel in respective time intervals. A switch is controlled to open and close a circuit path between the output terminal and a data line coupled to the pixel. A capacitor stores an overdriving voltage. At least one further switch selectively applies the overdriving voltage to the data line from the capacitor when the circuit path is open and thereby enables a rapid transition of a voltage level of the data line between the previous and current data voltages, when the current and previous data voltages are to differ by more than a predetermined amount. As an example, the rapid transition between the previous and current data voltages may serve to minimize a color mixture phenomenon between pixels connected to a common data line and representing different colors.
US11017733B2 Electronic device for compensating color of display
An electronic device includes a housing including a front plate and a back plate opposite the front plate, a touchscreen display exposed through a portion of the front plate and including an organic light emitting diode (OLED), a fingerprint sensor interposed between the display and the back plate and overlapping the display when viewed above the front plate, and a processor operatively connected with the display and the fingerprint sensor.
US11017727B2 Driving voltage setting device, method of setting driving voltage for display device, and display device
A driving voltage setting device includes a first voltage determiner, a luminance measurer, and a second voltage determiner. The first voltage determiner is configured to: determine, based on a variable preliminary black gray scale voltage (BGSV) under a first display luminance condition, a first BGSV corresponding to a first display luminance of a display device; and determine, based on the variable preliminary BGSV under a second display luminance condition, a second BGSV corresponding to a second display luminance of the display device. The luminance measurer is configured to measure a luminance of a BGSV of the display device using the variable preliminary BGSV. The second voltage determiner is configured to determine, based on the first BGSV and the second BGSV, BGSVs respectively corresponding to a plurality of preset display luminances between the first display luminance and the second display luminance.
US11017722B1 Display substrate, display device, and control method thereof
The present disclosure relates to a display substrate, a display device, and a control method thereof. The display substrate includes a plurality of pixels, each of which includes a first sub-pixel, a second sub-pixel, a third sub-pixel, and a fourth sub-pixel. The first sub-pixel, the second sub-pixel, and the third sub-pixel have different light emission colors. The fourth sub-pixel has the same light emission color as the first sub-pixel. The first sub-pixel, the second sub-pixel, the third sub-pixel, and the fourth sub-pixel all emit light, in a case where an ambient temperature is less than a first threshold. The second sub-pixel and the third sub-pixel both emit light, and one of the fourth sub-pixel and the first sub-pixel emits light, in a case where the ambient temperature is greater than or equal to the first threshold.
US11017720B2 Pixel and organic light emitting display device having the pixel
A pixel includes a plurality of transistors, a storage capacitor, and an organic light emitting diode. A first transistor controls the amount of current from a first driving power source to the organic light emitting diode based on a data voltage. A second transistor is connected to a data line and is turned on based on a scan signal. A third transistor coupled to the first transistor and is turned on based on the scan signal. A first stabilizing transistor is coupled to the third transistor or between the first and third transistors and is turned off when the third transistor is turned off.
US11017719B2 Display device
A display device includes a plurality of pixels. Each pixel includes a first transistor that controls an amount of current received from a first power supply voltage line connected via a second node to an organic light emitting diode in response to a voltage of a first node, a second transistor connected between a data line and the second node and that includes a first gate electrode connected to a first scan line, a light emitting line connected to a gate electrode of at least one light emitting transistor located in a current path between the first power supply voltage line and the organic light emitting diode, and a seventh transistor connected between one of at least one second gate electrode of the second transistor and the light emitting line. Accordingly, a threshold voltage of a switching transistor included in each of the plurality of pixels may be negatively shifted.
US11017715B2 Mura compensation method and device for curved screen
A Mura compensation method and device for a curved screen are disclosed. The method includes: dividing each of curved portions into blocks; acquiring measured luminance values of each of the illuminated sub-pixels in a non-curved portion and measured luminance values of each of the illuminated blocks in the curved portions according to grayscale values, wherein each of measured luminance values has a corresponding relationship with one of the grayscale values; and using the measured luminance values and the grayscale values in a gamma relational expression, solving for coefficients and a gamma value in the gamma relational expression by a fitting process, finding a theoretical luminance value corresponding to each of the grayscale values in a gamma curve according to the gamma value, and using the theoretical luminance value, the coefficients, and the gamma value in the gamma relational expression to solve for a compensation grayscale value.
US11017711B2 Gate driving circuit, driving method, and display device
The present disclosure provides a gate driving circuit and a driving method, and a display device. The gate driving circuit includes: a plurality of first gate driving units, ith first gate driving unit being configured to output a first gate driving signal to ith row of gate line in a display phase; a plurality of first control modules, mth first control module being configured to control mth second gate driving unit to output a second gate driving signal to mth row of gate line in a vertical blanking phase; nth first control module being configured to control nth second gate driving unit not to output the second gate driving signal in the vertical blanking phase; a plurality of second control modules, kth second control module being configured to control kth second gate driving unit not to output the second gate driving signal in the vertical blanking phase.
US11017708B2 System and method for a six-primary wide gamut color system
Systems and methods for a six-primary color system for display. A six-primary color system increases the number of primary colors available in a color system and color system equipment. Increasing the number of primary colors reduces metameric errors from viewer to viewer. The six-primary color system includes Red, Green, Blue, Cyan, Yellow, and Magenta primaries. The systems of the present invention maintain compatibility with existing color systems and equipment and provide systems for backwards compatibility with older color systems.
US11017703B2 Method for manufacturing display device, method for repairing display device, and display device
Disclosed are a method for manufacturing a display device, a method for repairing a display device, and a display device. The display device includes a display panel and a driver chip and the display panel includes: gate lines, and a first screen gate driver circuit and a second screen gate driver circuit that correspond to a same group of gate lines. Detecting whether the first screen gate driver circuit and the second screen gate driver circuit are normal; and when a detection result is “normal”, connecting the first screen gate driver circuit and/or the second screen gate driver circuit to the driver chip; or when a detection result is “damaged”, physically disconnecting the first screen gate driver circuit and/or the second screen gate driver circuit from the driver chip.
US11017702B2 Display device and driving method thereof
A display device is provided including a display unit configured to display an image; a processor that supplies a control signal for controlling a driving of the display unit; a detection circuit that detects whether the control signal is abnormal based on a frequency of the control signal measured in a frame unit; and a power supply that supplies driving power to the display unit, where the driving power is blocked from being supplied to the display unit when the control signal is detected to be abnormal. The detection circuit detects whether the control signal is abnormal based on an average frequency of the control signal for N successive frames, where N is a natural number of 2 or more.
US11017699B2 Display panel and display device including lighting test circuit
A display panel may include a plurality of pixel groups, a first lighting test circuit for testing at least one pixel of the plurality of pixel groups, a demultiplexer for providing data signals to the plurality of pixel groups, and a second lighting test circuit for testing one or more pixels of the plurality of pixel groups. At least one of the first lighting test circuit and the demultiplexer is positioned between the plurality of pixel groups and the second lighting test circuit.
US11017698B2 Health monitoring device and large area display including the same
A health monitoring device included in a large area display (LAD) with at least one display computers comprises a universal asynchronous receiver-transmitter (UART) configured to produce a test path by communicating with a processor of the display computer, a field programmable gate array (FPGA) configured to transmit a test signal to a terminal of the display computer and receive a test result, an ethernet unit configured to communicate with a test terminal connected with the LAD to transmit a monitoring signal to the test terminal, and a micro-controller configured to gather an operation state of the display computer and produce a measurement signal according to the test result.
US11017694B2 System and method for three-dimensional augmented reality guidance for use of equipment
A guidance system providing real-time, three-dimensional (3D) augmented reality (AR) feedback guidance to a user of an equipment system, to achieve improved procedural outcomes in the use of the equipment system.
US11017689B2 Very low nicotine cigarette blended with very low THC cannabis
The present disclosure relates to tobacco products, including methodology, devices and compositions, for assisting a smoker to transition from conventional tobacco cigarettes to either e-cigarettes or a tobacco heating device. Provided herein are methodology for switching, along with kits, products and apparatuses. The disclosure also provides methodology for regulating tetrahydrocannabinolic acid synthase expression, for use in producing cigarettes, reconstituted cannabis, and other products having reduced Δ9-tetrahydrocannabinolic acid.
US11017688B1 System, method, and program product for interactively prompting user decisions
The present disclosure relates to a computer-implemented process for evaluating user activity, user preference, and/or user habit via one or more personal devices and providing precisely timed and situationally targeted prompts and stimuli for encouraging lifestyle choices and reinforcing health habits. It is an object of the present disclosure to provide a technological solution to the long felt need in health management services caused by the technical problem of procuring timely health management by encouraging healthy choices.
US11017687B2 Information technology user behavior monitoring rule generation
Textual indicators are extracted from an electronic document. A rule for monitoring information technology user behavior is generated from the extracted textual indicators.
US11017681B2 Unmanned aerial vehicle avoiding obstacles
An unmanned aerial vehicle may include a flight control circuit configured to control flight of the unmanned aerial vehicle and to provide a flight path based at least on an actual position of the unmanned aerial vehicle and a desired target position for the unmanned aerial vehicle; and at least one sensor configured to monitor an environment of the unmanned aerial vehicle and to detect one or more obstacles in the environment; wherein the flight control circuit is further configured to determine a local flight path to avoid a collision with one or more detected obstacles, and to superimpose the flight path with the local flight path, thereby generating a flight path to the desired target position avoiding a collision with the one or more detected obstacles.
US11017680B2 Drone detection systems
Methods, systems, and apparatus, including computer programs encoded on storage devices, for drone-augmented emergency response services. In one aspect, a device includes a network interface, one or more sensors, one or more processors, and one or more storage devices that include instructions that are operable to perform operations. The operations include monitoring a predetermined geographic area that surrounds a particular property, determining that a drone device is within the predetermined geographic area that surrounds the particular property, determining whether the drone device that is detected within the predetermined geographic area that surrounds the property is an unauthorized drone device, and in response to determining that the drone device that is detected within the predetermined geographic area that surrounds the property is an unauthorized drone device, transmitting a signal indicating the detection of the unauthorized drone device within the predetermined geographic area that surrounds the property.
US11017679B2 Unmanned aerial vehicle visual point cloud navigation
Methods, systems and apparatus, including computer programs encoded on computer storage media for unmanned aerial vehicle flight operations near physical structures or objects. In particular, a point cloud of the physical structure is generated using aerial images of the structure. The point cloud is then referenced to determine a flight path for the UAV to follow around the physical structure, determine whether a planned flight path to desired locations around the structure is possible, determine the fastest route to return home and land from a given position around the physical structure, determine possibility of inflight collision to surface represented in point cloud, or determine an orientation of a fixed or gimbaled camera given a position of the UAV relative the point cloud.
US11017678B2 Terminal and en-route airspace operations based on dynamic routes
Methods and systems for terminal airspace operations based on dynamic routes are described. An exemplary method for providing airspace operations based on dynamic routes includes performing spatio-temporal filtering on air traffic data for a plurality of aircrafts in an en-route airspace sector to generate one or more dynamic routes, each dynamic route being associated with a subset of the plurality of aircrafts that share similar spatial and temporal flight characteristics. The method further includes generating a priority value for each of the one or more dynamic routes, adjusting at least one of the one or more dynamic routes based on the respective priority value to generate one or more final dynamic routes, and for each of the plurality of aircrafts, generating a three-dimensional route based on the one or more final dynamic routes to increase an efficiency of the en-route airspace operations.
US11017677B2 Decision-making aid for revising a flight plan
A method is provided for managing the revising of a flight plan of an aircraft implemented by at least two systems, one being of avionics type (qualified, certified) and the other not. From a flight plan, flight plan revisions are determined, even assessed, then one or more of these revisions are selected and/or combined. Subsequently, these combinations are processed by the avionics system and the corresponding avionics parameters are calculated. By comparing the different results of avionics quality, the impact of each revision can be quantified then rendered to the pilot to assist in his or her decision-making, in particular with regard to negotiating the revisions with air traffic control. Combinatorial optimization and learning steps are described, as are system and software aspects.
US11017676B2 Safety system configured to determine when a vehicle has made an unwanted stop
A method for monitoring a vehicle includes determining that the vehicle is stopped and determining a location where the vehicle is stopped. Traffic congestion corresponding to the location where the vehicle is stopped may also be determined. A safety action may be taken based at least in part on whether the vehicle is stopped on a highway and whether the traffic congestion is causing the vehicle to be stopped.
US11017674B1 Managing and tracking scouting tasks using autonomous vehicles
A method is provided for managing and tracking scouting tasks to obtain map information using a fleet of autonomous vehicles. For instance, the method includes defining a scouting quest to obtain the map information. The scouting quest includes a plurality of objectives. Each objective is associated with a geographic location from which sensor data is to be captured. The method also includes receiving a first update message from an autonomous vehicle of the fleet. The update message identifies a location of the autonomous vehicle. The method also includes assigning at least one of the objectives to the autonomous vehicle based on the location of the autonomous vehicle. The method also includes, sending instructions to the autonomous vehicle in order to cause the autonomous vehicle to complete the at least one objective and after sending, tracking a status of the scouting quest.
US11017673B2 Method and device for learning generating lane departure warning (LDW) alarm by referring to information on driving situation to be used for ADAS, V2X or driver safety required to satisfy level 4 and level 5 of autonomous vehicles
A method for generating a lane departure warning (LDW) alarm by referring to information on a driving situation is provided to be used for ADAS, V2X or driver safety which are required to satisfy level 4 and level 5 of autonomous vehicles. The method includes steps of: a computing device instructing a LDW system (i) to collect information on the driving situation including information on whether a specific spot corresponding to a side mirror on a side of a lane, into which the driver desires to change, belongs to a virtual viewing frustum of the driver and (ii) to generate risk information on lane change by referring to the information on the driving situation; and instructing the LDW system to generate the LDW alarm by referring to the risk information. Thus, the LDW alarm can be provided to neighboring autonomous vehicles of level 4 and level 5.
US11017672B2 System and method for expanding rear side alarm area of tractor-trailer combination vehicle
A rear side alarm area expansion method of a tractor-trailer combination vehicle according to the present invention includes determining whether a trailer is connected to a tractor using a rear side alarm sensor when a tractor-trailer combination vehicle travels, changing a normal mode to an expansion mode if it is determined that the trailer is connected to the tractor, adjusting a rear side alarm area based on a predetermined length of the trailer in the expansion mode, calculating an actual length Ym of the trailer, and resetting the rear side alarm area. According to the configuration of the present invention, since the alarm area is set on the basis of the actual length of the trailer, the vehicle may safely change lanes.
US11017666B2 Vehicle control system, vehicle control method, and program
The present invention provides a vehicle control system including an acquisition unit that acquires information relating to a situation of a transit point of autonomous driving, and a determination unit that determines whether an autonomously driven vehicle will pass the transit point based on the information acquired by the acquisition unit.
US11017664B2 Integrated telecommunications roadside unit
Concepts and technologies directed to an integrated telecommunications roadside unit for supporting vehicle-to-everything (“V2X”) communications are disclosed herein. Embodiments of an integrated telecommunications roadside unit can include a processor and a memory that store computer-executable instructions that configure a processor to perform operations. The operations can include intercepting a vehicle-to-vehicle communication that is provided from a first vehicle to a second vehicle. The vehicle-to-vehicle communication can be transmitted using a direct transmission mode. The operations can further include encapsulating the vehicle-to-vehicle communication in a user plane package. The operations can also include routing the user plane package to a destination network access node, where the destination network access node is outside of a direct communication range corresponding to the first vehicle and the second vehicle.
US11017660B2 Information processing apparatus, information processing method and program
There is provided an information processing apparatus including a matter extracting unit extracting a predetermined matter from text information, an action pattern specifying unit specifying one or multiple action patterns associated with the predetermined matter, an action extracting unit extracting each of the action patterns associated with the predetermined matter, from sensor information, and a state analyzing unit generating state information indicating a state related to the matter, based on each of the action patterns extracted from the sensor information, using a contribution level indicating a degree of contribution of each of the action patterns to the predetermined matter, for a combination of the predetermined matter and each of the action patterns associated with the predetermined matter.
US11017658B2 Apparatus, system and methods for providing notifications and dynamic security information during an emergency crisis
The present invention provides a system and methods for notifying first responders of the general or specific location of a security crisis or threat in a building or public location, and the type of threat or crisis that has occurred, while notifying building occupants or others in the public location of the crisis and how to respond. The crisis management and notification system provides critical information to the first responders, including initial location of the crisis and whether the crisis location has changed in real time, audio and video input of the crisis arena, communications with designated occupants in the crisis arena, static building or location information, and other information. The crisis notification system can be scaled to allow the effective use in facilities of differing sizes and layouts. The system is also flexible, enabling the system to integrate with currently existing systems or to operate with new devices.
US11017654B2 Method and system for motivating and monitoring hand washing in a food service or related environment
Methods, hand wash monitoring system and hand wash hub system for motivating and monitoring compliance of hand washing are disclosed. Hand wash monitoring system detects presence of hands in hand washing sink. Subsequently, hand wash monitoring system initiates countdown of plurality of instructions to be displayed to user for washing hands. Plurality of instructions include wetting hands, applying soap, scrubbing hands, rinsing hands, and drying hands. Each of plurality of instructions is counted for predetermined time period. Hand wash monitoring system further monitors compliance of user following plurality of instructions for washing hands to improve compliance of hand washing with established protocol. In one embodiment, hand wash monitoring system is communicatively coupled with hand wash hub system and attendance monitoring system to display users' hand washing schedule and compliance with established protocol on external display device to get people to wash their hands more frequently and more thoroughly.
US11017649B1 Dynamic alarm priority system and method
A dynamic alarm priority system includes plural kinds of alarm devices, an alarm signal being generated when the alarm device is triggered; a plurality of image capture devices, correspondingly coupled to the alarm devices respectively, the triggered alarm device activating the corresponding image capture device to capture an alarm image; an interface device that receives the alarm signal; an assignment device coupled to receive the alarm signals, which are assigned priorities in order of time, thereby generating an initial alarm signal sequence; and an object detection device that performs object detection on the alarm image to determine whether an associated object is detected in the alarm image. The assignment device dynamically modifies the initial alarm signal sequence according to an object detection result from the object detection device, thereby generating an updated alarm signal sequence.
US11017646B2 Information processing device and determination method
An information processing device and a determination method for determining whether a person other than the persons determined to be permitted to enter each zone has entered the zone is provided. The information processing device has a communication section for receiving face image data from cameras for photographing respective plurality of zones in a building and a control section for collating the face image data with the registered face image data of the persons permitted to enter each zone and for determining whether the entry of the person corresponding to the face image data is permitted or not.
US11017644B2 Warning system, monitor device and warning device for merchandise security
The prevent invention provides a warning system for merchandise security, comprising, a monitor device, a warning device and a controller, this warning system can control the warning device and the monitor device through the controller. This controller can work as a un-locker, especially when the warning device and the monitor device sending warning signal, and through which the system can realize message interaction, message transmission and control, the monitor device and the warning device have their own working rules.
US11017643B2 Methods and systems for augmentative and alternative communication
Methods and systems for augmentative and alternative communication are disclosed. An example method can comprise receiving a candidate input, classifying the candidate input as an intentional input, and generating a signal in response to the intentional input.
US11017642B2 System for providing location alerts relating to emergencies
Disclosed is a system for generating alerts communicated to emergency responders and/or contacts indicating a location of an incident. The system comprises a housing, one or more light sources, and a computing processor. A switch is located in the housing and configured to be accessible to a user. When the switch is actuated by a user indicating an incident, the processor provides power to the at least one light source to output light from the housing thereby indicating the location of the system. The system may also control a speaker to output an audible signal and a transmitter to transmit an emergency signal with location information to a device of an emergency responder and/or an emergency contact. The present invention may also be embodied in a software application that is implemented on a mobile device to thereby leverage the components of the mobile device to send alerts.
US11017637B2 Hybrid wagering and skill-based gaming system and server
Embodiments of the invention provide A system includes a game device. A first game including a transition point is conducted on the game device. When a transition point is reached, a second game outcome is selected. The second game outcome is generated by a second game that is logically independent of the first game. The second game outcome generated by the second game is independent of the first game.
US11017634B2 Game system with mechanism for determining whether to trigger three-dimensional re-spinning
The present invention is to determine whether a game result of a slot machine satisfies a specified condition by using a control unit, the specified condition is defined as any one of the plurality of game symbols in the game result replaced so that the reward condition is satisfied, and one of the game symbols replaced to be located at a replacement position; when the control unit determines that the game result satisfies the specified condition, the control unit activates a three-dimensional re-spinning component to generate a replacement game symbol. The replacement game symbol is used to replace the game symbol at the replacement position and update the game result, thereby the control unit re-determines whether the updated game result meets the reward condition, and after the reward condition is met, performs a reward program by using a reward unit.
US11017631B2 Method to detect and counteract suspicious activity in an application environment
Aspects of the subject disclosure may include, for example, comparing an input received from a peripheral device associated with an execution of a gaming application with a threshold value, wherein the threshold value is based on a first identification of a first user, a second identification of the peripheral device, and a third identification of stimuli presented as part of the execution of the gaming application. Responsive to the comparing, a determination may be made that the input exceeds the threshold value. Responsive to the determination, a validation request may be transmitted to a user device of the first user. Other embodiments are disclosed.
US11017628B2 System and method for wireless gaming with location determination
In accordance with the teachings of the present embodiment, a system and method for wireless gaming with location-dependent gaming functions are provided. In a particular embodiment, the apparatus includes a gaming server; a wireless network at least partially covering a property, the wireless network comprising a plurality of signal detection devices; and a gaming communication device operable to transmit and receive gaming information to and from the gaming server via the wireless network. A location of the gaming communication device on the property is used to alter a game play function, such as a bet option, wager, graphic overlay, permission, or to provide location-dependent advertising or embedded advertising. Based upon the location of the gaming communication device on the property, a predetermined functionality of the gaming communication device may be enabled and/or controlled.
US11017624B2 Automated preparation and dispensation of food and beverage products
In one embodiment, a system includes: a robotic arm assembly; a plurality of components arranged around the robotic arm assembly and positioned within reach of the robotic arm assembly; and a controller configured to control operation of the robotic arm assembly within the system. Each of the plurality of components is configured to either: store ingredients under predetermined environmental conditions; store food preparation tools; dispense ingredients; blend, cook, or assemble ingredients into a completed food item; provide cleaning functionality to the system and/or components thereof; provide user access to completed food items; or display information relevant to a food item or preparation thereof to users. Methods of using such systems to prepare and dispense food items are also disclosed, and generally include translating recipes into instructions executable by the robotic arm assembly and/or components of the system, communicating such instructions to the robotic arm assembly, and executing such instructions.
US11017622B2 Communications system and communications apparatus
A communications system configured to execute data transmission between a transponder having no radio wave generating source thereof and a reader/writer is provided. The communications system includes, a service permission level notifier configured to tell a service permission level for associated with a received signal level for permitting service acceptance from the reader/writer to the transponder, and an access controller configured to determine in the transponder whether the received signal level from the reader/writer is at the notified service permission level to determine accessibility to the transponder from the reader/writer.
US11017613B2 Augmented reality enabled control system and method for active asset control with real-time attribute tracking
A system for active asset control includes: assets, which can be vehicles; asset beacons positioned in the assets; an active asset control server with an asset configuration database and an asset status database; and an active asset control device, including a processor, a non-transitory memory, an input/output component, an asset viewer, an asset controller, a location sensor, an orientation sensor, and a data bus; such that a user can view attributes in an augmented reality view, showing completion status and incurred cost for selected services, and control commands of the assets. Also disclosed is a method for active asset control, including positioning asset beacon, retrieving attribute, selecting service, updating service cost, and viewing asset status.
US11017607B2 System and method for implementing computer-simulated reality interactions between users and publications
Methods, systems, and media for enhancing one or more publications by receiving live video captured by a user, the live video comprising video of a publication, the publication comprising copyrighted content; identifying at least one first trigger in the live video, identifying one or more first three-dimensional, interactive media associated with the at least one first trigger and pertaining to the copyrighted content, and presenting to the user the first three-dimensional, interactive media; and identifying at least one second trigger in the first three-dimensional, interactive media, identifying one or more second three-dimensional, interactive media associated with the at least one second trigger and pertaining to the copyrighted content, and presenting to the user the second three-dimensional, interactive media to progressively deepen and enrich the engagement with the copyrighted content of the publication.
US11017603B2 Method and system for user interaction
A method includes pointing an image capture module on a head mounted augmented reality display towards a panel, recognizing fiducial markers on the panel and an interaction area defined by the fiducial markers, recognizing and using a panel identifier to select a graphical user interface, rendering the graphical user interface on the augmented reality display to appear to float in a volume between the head mounted augmented reality display and the interaction area, where at least two of the fiducial markers are configured for defining a position and orientation of the panel with respect to the head mounted augmented reality display, and using the image capture module to recognize a hand, a finger or a predefined detectable object in the volume, where the hand, the finger or the predefined detectable object is directed towards at least one graphical user interface element rendered to appear to float in the volume.
US11017601B2 Mixed-reality space map creation and mapping format compatibility-enhancing method for a three-dimensional mixed-reality space and experience construction sharing system
A novel method for enhancing mixed-reality space map creation and mapping format compatibilities among various three-dimensional mixed-reality space and experience construction platforms is disclosed. In one example, mapped space information, current location information, geotagging information, timestamps, map scanning device information, and map creation user information are fetched from a native 3D map dataset, and are saved separately along with the native 3D map dataset. Based on a specific 3D map standardization scheme, the fetched information and at least some portions of the native 3D map dataset can then be saved as an XML metadata file. If a 3D map decoding device requesting the 3D map is deemed incompatible to the native 3D map dataset format, then the mixed-reality space map creation and mapping format compatibility-enhancing method converts the XML file on the fly into a 3D map format determined to be most compatible with the 3D map decoding device.
US11017598B2 Method for processing omni-directional image using padding area and apparatus supporting the same
An image processing apparatus is disclosed. The image processing apparatus comprises: a receiver configured to receive an input frame including a plurality of image regions, corresponding to a plurality of faces of a three-dimensional polyhedron, and metadata; and a processor configured to render an output frame including at least one a part of the input frame, on the basis of padding information included in the metadata. Here, the processor may be configured to identify, on the basis of the padding information, a padding region included in at least one of the plurality of image regions, and render, on the basis of the determined padding region, a boundary between at least one face of the plurality of faces and another face of the plurality of faces adjoining the at least one face of the polyhedron.
US11017597B2 Singularity reduction in quadrilateral meshes
Systems and methods for modifying and generating quadrilateral meshes for computer graphic structures include obtaining a polygon mesh representing a computer graphic structure, the polygon mesh comprising a plurality of polygonal faces and a plurality of singularities, determining, based on a first singularity of the plurality of vertices, selecting, based on one or more characteristics of the patch, a first minimum singularity template (MST) of a plurality of MSTs each representing a corresponding quadmesh that has three or fewer singularities, and replacing, within the polygon mesh, the patch with the first MST.
US11017596B2 Methods, devices, and systems for part-to-build
Methods, devices, and systems for determining a job file for a three-dimensional printing machine based on part-to-build data. Embodiments include determining the part-to-build data based on: determining part data from a received computer-aided design (CAD) file, generating orientation data, generating support data, generating feature data, and generating slicing data. In some embodiments, determining the job file may be further based on generating nesting matrix associated with the part-to-build data.
US11017595B2 Object segmentation using high-level structural meshes
Improved techniques for performing object segmentation are disclosed. Surface reconstruction (SR) data corresponding to an environment is accessed. This SR data is used to generate a detailed three-dimensional (3D) representation of the environment. The SR data is also used to infer a high-level 3D structural representation of the environment. The high-level 3D structural representation is inferred using machine learning that is performed on the surface reconstruction data to identify a structure of the environment. The high-level 3D structural representation is then cut from the detailed 3D representation. This cutting process generates a clutter mesh comprising objects that remain after the cut and that are distinct from the structure. Object segmentation is then performed on the remaining objects to identify those objects.
US11017591B2 Point cloud data transmitting apparatus, point cloud transmitting method, point cloud data receiving apparatus, and point cloud receiving method
Disclosed is a method of transmitting point cloud data including encoding point cloud data, and transmitting a bitstream containing the point cloud data. Disclosed is a method of receiving point cloud data may include receiving a bitstream containing point cloud data, and decoding the point cloud data.
US11017590B2 System and method for lighting design and real time visualization using intuitive user interphase and controls in composition with realistic images
A lighting visualization system and methods for visualizing lighting scenarios for an object is provided. The system includes a graphic user interface for displaying a rendered image of the object, the rendered image representing a selected lighting scenario for the object. The system includes a control panel for indicating a value of parameters associated with the selected lighting scenario, each parameter being associated with at least one light source. The control panel includes a means for adjusting at least one parameter associated with at least one light source, thereby changing the selected lighting scenario. Upon changing the selected lighting scenario, the rendered image is modified and/or replaced. Each rendered image is rendered using a three-dimensional model of the object, one or more high-quality image of the object being utilized for creating the three-dimensional model.
US11017589B2 Untransformed display lists in a tile based rendering system
3-D rendering systems include a rasterization section that can fetch untransformed geometry, transform geometry and cache data for transformed geometry in a memory. As an example, the rasterization section can transform the geometry into screen space. The geometry can include one or more of static geometry and dynamic geometry. The rasterization section can query the cache for presence of data pertaining to a specific element or elements of geometry, and use that data from the cache, if present, and otherwise perform the transformation again, for actions such as hidden surface removal. The rasterization section can receive, from a geometry processing section, tiled geometry lists and perform the hidden surface removal for pixels within respective tiles to which those lists pertain.
US11017584B2 Method for visualizing an image data set, system for visualizing an image data set, computer program product and a computer readable medium
A method is for visualizing an image data set, the image data set displaying a three-dimensional arrangement including at least a first object and a second object. The method includes providing a three dimensional image data set including first voxels assigned to the first object and second voxels assigned to the second object; identifying first voxels of the three-dimensional image data set; determining a set of parameters for volume rendering, the set of parameters determined including a subset of parameters and a focusing parameter; identifying primary rays impacting on the first object and identifying secondary rays missing the first object; and performing the volume rendering using the subset of parameters determined, for visualizing the first object and the second object. The focusing parameter used for the primary rays in the volume rendering is different from the focusing parameter used for the secondary rays in the volume rendering.
US11017583B2 Multiprocessing system for path tracing of big data
A path tracing system in which the traversal task is distributed between one global acceleration structure, which is central in the system, and multiple local acceleration structures, distributed among cells, of high locality and of autonomous processing. Accordingly, the centrality of the critical resource of accelerating structure is reduced, lessening bottlenecks, while improving parallelism.
US11017570B2 Display control apparatus, display control method, and recording medium
A display control apparatus having: a processor configured to: read a predetermined command to control a display to draw a specific display object based on first coordinates within a coordinate system, wherein the predetermined command is part of a script of a plurality of commands to be read in order; determine whether the first coordinates satisfy a first condition, a second condition and a third condition; and control a display in response to a determination of whether the first coordinates satisfy the first condition, the second condition and the third condition.
US11017569B2 Methods and devices for displaying data mark information
A method includes displaying at least a first portion of a chart at a first magnification, the first portion containing a plurality of data marks. The method also includes detecting a first input at a location that corresponds to the first portion of the chart and, in response, zooming in to display a second portion of the chart at a second magnification, the second portion including a first data mark in the plurality of data marks. The method further includes detecting a second touch input at a location that corresponds to the second portion of the chart, and, in response: if one or more predefined data-mark-information-display criteria are not met, zooming in to display a third portion of the chart at a third magnification, the third portion including the first data mark; and, if the one or more predefined data-mark-information-display criteria are met, displaying information about the first data mark.
US11017568B2 Apparatus and method for visualizing digital breast tomosynthesis and other volumetric images
Digital Breast Tomosynthesis allows for the acquisition of volumetric mammography images. The present invention allows for novel ways of viewing such images to detect microcalcifications and obstructions. In an embodiment a method for displaying volumetric images comprises computing a projection image using a viewing direction, displaying the projection image and then varying the projection image by varying the viewing direction. The viewing direction can be varied based on a periodic continuous mathematical function. A graphics processing unit can be used to compute the projection image and bricking can be used to accelerate the computation of the projection images.
US11017567B2 Dynamic content providing method and system for face recognition camera
A dynamic content providing method performed by a computer-implemented dynamic content providing system including recognizing a facial region in an input image, extracting feature information of the recognized facial region, and dynamically synthesizing an image object of content based on the feature information, the content being synthesizable with the input image may be provided.
US11017562B2 Imaging system and method for producing images using means for adjusting optical focus
An imaging system for producing images for a display apparatus. Imaging system includes at least one imaging unit including camera, optical element including first optical portion and second optical portion having different focal lengths, and means for adjusting optical focus; means for generating depth or voxel map; and processor. Processor is configured to obtain gaze direction of user; determine optical depth of object present in region of interest within real-world scene; and control means for adjusting optical focus of imaging unit, based on optical depth of object and focal lengths of first and second optical portions, to capture warped image of real-world scene, the warped image having spatially-uniform angular resolution.
US11017560B1 Controllable video characters with natural motions extracted from real-world videos
A video generation system is described that extracts one or more characters or other objects from a video, re-animates the character, and generates a new video in which the extracted characters. The system enables the extracted character(s) to be positioned and controlled within a new background scene different from the original background scene of the source video. In one example, the video generation system comprises a pose prediction neural network having a pose model trained with (i) a set of character pose training images extracted from an input video of the character and (ii) a simulated motion control signal generated from the input video. In operation, the pose prediction neural network generates, in response to a motion control input from a user, a sequence of images representing poses of a character. A frame generation neural network generates output video frames that render the character within a scene.
US11017551B2 System and method for identifying a point of interest based on intersecting visual trajectories
The present teaching relates to method, system, medium, and implementations for identifying object of interest. Image data acquired by a camera with respect to a scene are received. One or more users are detected, during a period of time, from the image data who are present at the scene. Three dimensional (3D) gazing rays of the one or more users during the period of time are estimated. One or more intersections of such 3D gazing rays are identified and are used to determine at least one object of interest of the one or more users.
US11017549B2 Smart fixture for a robotic workcell
A fixture having a memory containing information about one or more of a plurality of fiducials, a keep-out zone, and an interaction point. The fixture provides this information to a processor of a workcell during set-up.
US11017548B2 Methods, systems, and apparatuses for computing dimensions of an object using range images
Various embodiments described herein relate to techniques for computing dimensions of an object using multiple range images. In this aspect, the multiple range images are captured from selective locations and satisfy a pre-defined criterion. In accordance with various embodiments, at least a pair of 3D points are identified from the multiple range images, which correspond to at least one geometric feature on a surface of the object. In this regard, a correspondence score is estimated for the identified at least one pair of 3D points. The correspondence score is then utilized for registering the at least one pair of 3D points. Based in part on the registration of the 3D points and 3D point clouds retrieved from the captured images, the dimensions of the object are computed.
US11017547B2 Method and system for postural analysis and measuring anatomical dimensions from a digital image using machine learning
A method for use of machine learning in computer-assisted anatomical prediction. The method includes identifying with a processor parameters in a plurality of training images to generate a training dataset, the training dataset having data linking the parameters to respective training images, training at least one machine learning algorithm based on the parameters in the training dataset and validating the trained machine learning algorithm, identifying with the processor digitized points on a plurality of anatomical landmarks in an image of a person displayed on a digital touch screen by determining linear anatomical dimensions of at least a portion of a body of the person in the displayed image using the validated machine learning algorithm and a scale factor for the displayed image, and making an anatomical circumferential prediction of the person based on the determined linear anatomical dimensions and a known morphological relationship.
US11017541B2 Texture detector for image processing
Techniques related to detecting texture content in an input image are discussed. Such techniques include accumulating pixel-wise directional gradient counts for positive and negative gradients for a first direction and positive and negative gradients for a second direction for pixels in a pixel window. A texture value for the target pixel of the window is determined based on a sum of a minimum of the positive and negative gradients for a first direction and a minimum of the positive and negative gradients for a second direction.
US11017537B2 Image monitoring system
An abandoned item detection unit detects an abandoned item shown in an image taken by any of a plurality of imaging devices. A person identification unit specifies the image directly before or directly after the appearance of the abandoned item as an image of abandonment timing, and identifies at least one person shown in the image of abandonment timing as a target person. A person search unit searches for an image showing the target person from among the images respectively taken by any of the plurality of imaging devices. A result display unit outputs a display showing the movement of the target person on the screen of a user terminal on the basis of the imaging device that has taken each image showing the target person and the imaging time at which each image showing the target person was taken.
US11017532B1 Systems and methods for training a model to predict survival time for a patient
In some aspects, the described systems and methods provide for a method for training a model to predict survival time for a patient. The method includes accessing annotated pathology images associated with a first group of patients in a clinical trial. Each of the annotated pathology images is associated with survival data for a respective patient. Each of the annotated pathology images includes an annotation describing a tissue characteristic category for a portion of the image. Values for one or more features are extracted from each of the annotated pathology images. A model is trained based on the survival data and the extracted values for the features. The trained model is stored on a storage device.
US11017528B2 Method and device for processing at least one image of a given part of at least one lung of a patient
A method for automatically processing at least one image slice of a given part of at least one lung of a patient suffering from a pathology that causes a bronchial infection by diffuse dilatation of the bronchial tubes of the lungs. The method includes segmenting the at least one image slice of the given part of the lung, in order to produce a histogram characterizing the pulmonary density of the given part of the lunch, by means of the voxels of the at least one image slice, each voxel associated with a given pulmonary density; calculating a threshold, from the histogram, corresponding to a threshold pulmonary density, based on at least one characteristic of the histogram, a first characteristic being the mode of the histogram; determining from the at least one image slice of the given part of the lung, a pulmonary volume having a pulmonary density higher or lower than the calculated threshold, corresponding to the sum of the voxels having a pulmonary density higher or lower than the calculated threshold; and calculating an automatic score on the basis of the determined pulmonary volume.
US11017527B2 Information processing device, information processing method, and information processing system
There is provided an information processing device including: an analysis unit that specifies a movement in a region-of-interest relating to an embryo on a plurality of images using the plurality of images including the embryo captured in a time series manner during periods corresponding to a plurality of cell stages; a feature value calculation unit that calculates a movement feature value relating to an inside of the embryo on the basis of the specified movement; and a presentation control unit that controls a presentation of the movement feature values acquired during periods corresponding to at least two cell stages among the plurality of cell stages in order to evaluate a quality of the embryo.
US11017525B2 Semiconductor pattern detecting apparatus
A semiconductor pattern detecting apparatus is provided. The semiconductor pattern detecting apparatus includes a stage configured to position a wafer formed with a semiconductor pattern, the stage extending in a first direction and a second direction perpendicular to the first direction, an electron emitter configured to irradiate first electrons on the semiconductor pattern, an electrode configured to generate an electric field to induce an electric potential on a surface of the semiconductor pattern, a detector configured to detect second electrons emitted from the semiconductor pattern, an imager configured to obtain a plurality of first images by using the second electrons detected by the detector, and at least one controller configured to apply a first voltage and a second voltage different from the first voltage to the electrode alternately and repeatedly and to generate a second image by combining the plurality of first images, wherein the imager is so configured that each of the plurality of first images are obtained when the first voltage is applied to the electrode.
US11017524B2 Thickness measurement of substrate using color metrology
A metrology system for obtaining a measurement representative of a thickness of a layer on a substrate includes a camera positioned to capture a color image of at least a portion of the substrate. A controller is configured to receive the color image from the camera, store a predetermined path in a coordinate space of at least two dimension including a first color channel and a second color channel, store a function that provides a value representative of a thickness as a function of a position on the predetermined path, determine a coordinate of a pixel in the coordinate space from color data in the color image for the pixel, determine a position of a point on the predetermined path that is closest to the coordinate of the pixel, and calculate a value representative of a thickness from the function and the position of the point on the predetermined path.
US11017514B2 Determining a difference image dataset of an examination volume
A solution for determination of a three-dimensional difference image dataset of an examination volume. Here two-dimensional real image datasets relating to the examination volume are received via an interface, each of the two-dimensional real image datasets including a two-dimensional x-ray projection of the examination volume in relation to a projection direction. Furthermore, the first difference image dataset is determined based on the two-dimensional real image datasets and based on a first trained function via a processing unit. Here the first difference image dataset is at least two-dimensional, in particular at least three-dimensional, in particular the first difference image dataset is three-dimensional or four-dimensional. The determination of the first difference image dataset based on the two-dimensional real image datasets and based on a trained function enables mask recordings of the examination volume to be dispensed with, and thus the x-ray load of the examination volume to be reduced.
US11017513B1 Active sensor fusion systems and methods for object detection
Active sensor fusion systems and methods may include a plurality of sensors, a plurality of detection algorithms, and an active sensor fusion algorithm. Based on detection hypotheses received from the plurality of detection algorithms, the active sensor fusion algorithm may instruct or direct modifications to one or more of the plurality of sensors or the plurality of detection algorithms. In this manner, operations of the plurality of sensors or processing of the plurality of detection algorithms may be refined or adjusted to provide improved object detection with greater accuracy, speed, and reliability.
US11017508B2 Image matching method and apparatus
An image matching method and apparatus are disclosed. The method according to the present embodiment comprises: a step of acquiring source image; a step of acquiring a transformation image, by converting the display mode of the source images into a top view and adjusting the brightness thereof through auto exposure (AE); a step of acquiring image information; and a step of generating a target image comprising a first area and a second area in an overlap area in which pixels of a corrected transformation image are disposed on the basis of the image information, wherein the correction comprises gradation correction of the pixels of an image disposed in the first area and pixels of an image in the second area.
US11017507B2 Image processing device for detection and correction of cloud cover, image processing method and storage medium
An image processing device which is capable of accurately detects and corrects areas affected by clouds even if multiple types or layers of clouds present in images, is disclosed. The device includes: a cloud spectrum selection unit for selecting at least one spectrum for each of pixels from spectra of one or more clouds present in an input image; an endmember extraction unit for extracting spectra of one or more endmembers other than the one or more clouds from those of the input image; and an unmixing unit for deriving fractional abundances of the respective spectra of one or more endmembers and a selected spectrum of one of the one or more clouds for the each of pixels in the input image.
US11017501B2 Demosaicing method and apparatus
A method is applied to an electronic device including a color camera and a monochrome camera, and the color camera and the monochrome camera are disposed in parallel on the electronic device, includes: obtaining a to-be-processed color image obtained after the color camera photographs a target scenario, and extracting a first luminance component of the to-be-processed color image; obtaining a monochrome image obtained after the monochrome camera collects the target scenario at the same moment, and extracting a second luminance component of the monochrome image; performing registration on the first luminance component and the second luminance component by using a preset algorithm, to generate a third luminance component; extracting a chrominance component of the to-be-processed color image based on the third luminance component; and compositing a color output image based on the extracted chrominance component of the to-be-processed color image and the third luminance component.
US11017500B2 Image acquisition using time-multiplexed chromatic illumination
An imaging system includes an image sensor having an array of sensor pixels, a multi-chromatic illuminator adapted to independently generate a plurality of illumination colors each having a different finite spectral range, and a controller coupled to the image sensor and to the multi-chromatic illuminator. The controller includes logic to time-multiplexing the multi-chromatic illuminator between the illumination colors. Each of the illumination colors independently illuminates for at least a corresponding one of non-overlapping durations of illumination of the illumination colors. The controller includes further logic to acquire chromatic sub-images with the image sensor and combine the chromatic sub-images into a composite color image. Each of the chromatic sub-images is acquired during a different one of the non-overlapping durations of illumination.
US11017499B2 Method, apparatus, and computer program product for generating an overhead view of an environment from a perspective image
A method, apparatus and computer program product are provided for warping a perspective image into the ground plane using a homography transformation to estimate a bird's eye view in real time. Methods may include: receiving first sensor data from a first vehicle traveling along a road segment in an environment, where the first sensor data includes perspective image data of the environment, and where the first sensor data includes a location and a heading; retrieving a satellite image associated with the location and heading; applying a deep neural network to regress a bird's eye view image from the perspective image data; applying a Generative Adversarial Network (GAN) to the regressed bird's eye view image using the satellite image as a target of the GAN to obtain a stabilized bird's eye view image; and deriving values of a homography matrix between the sensor data and the established bird's eye view image.
US11017493B2 FIFO queue, memory resource, and task management for graphics processing
Methods and devices for managing first-in first-out (FIFO) queues in graphics processing are described. A dispatcher thread can receive a value of a write done pointer indicating a next memory location following one or more memory locations to which data has been written by a write thread of a graphics processing unit (GPU). The dispatcher thread can accordingly launch, based at least in part on the value of the write done pointer, multiple read threads on the GPU to read, in parallel and based on the write done pointer, the data from the FIFO queue.
US11017491B2 Nonconformance detection system
A method, apparatus, and system for generating images. An imaging system comprises a computer system with a controller. The controller is configured to receive from a shearography camera system an unloaded visible light image generated of a coating in an area of a structure while the area is in an unloaded state and a loaded visible light image generated while the area is in a loaded state and receive from an infrared camera system an unloaded thermal image generated while the area is in the unloaded state and a loaded thermal image generated while the area is in the loaded state. The controller is configured to subtract the loaded visible light image from the unloaded visible light image to form a subtracted visible light image. The controller is configured to subtract the loaded thermal image from the unloaded thermal image to form a subtracted thermal image.
US11017490B2 Government and first responder interface system for a vehicle having a digital license plate
A digital license plate interface for interacting with government and other regulatory authorities is described. A user can provide authorization to release data from the digital license plate to government authorities and allow for automated payment of governmental transportation licensing and usage fees.
US11017489B2 Systems and methods for implementing search and recommendation tools for attorney selection
A system and a method disclosed herein provides search and recommendation mechanisms for selecting attorneys. In an embodiment, a processor identifies a claim litigated by a candidate attorney. The processor uses historical claim data and a claim score for an attorney who opposed the candidate attorney when litigating the claim to determine a claim score for the candidate attorney. The processor then uses the candidate attorney claim score to recalculate the opposing attorney claim score, and checks to see whether the claim scores have converged. If the scores have not converged, the processor iteratively recalculates the claim scores of the candidate attorney and the opposing attorney until the scores converge. Finally, the candidate attorney claim score is used to determine an overall score for the candidate attorney which can be compared against the scores of other attorneys and used for attorney search and recommendation.
US11017486B2 Electronic device and control method therefor
An electronic device and a control method therefor are disclosed. An electronic device according to the present invention comprises: a communication unit for performing data communication with at least one peripheral device; an output unit for outputting virtual environment content; and a control unit for controlling the output unit so as to play the virtual environment content according to a user command, determining the peripheral device, which can provide a function corresponding to a virtual effect, among peripheral devices of which there is at least one, on the basis of information on the virtual effect provided from the virtual environment content, and controlling the communication unit so as to transmit a control signal, which corresponds to the virtual effect, to the determined peripheral device. Therefore, the electronic device playing the virtual environment content provides the virtual effect related to the playing virtual environment content by using the peripheral device, thereby enabling an experience related to various virtual environments to be provided to a user.
US11017485B2 Utility resource asset management system
The UTILITY RESOURCE ASSET MANAGEMENT SYSTEM APPARATUSES, METHODS AND SYSTEMS (“URAMS”) transform weather, terrain, and utility asset parameter data via URAMS components into damage predictions with confidence metrics, alerts, and asset allocation and response plans.
US11017474B1 Systems and methods for developing an automated life planner
Methods and systems described in this disclosure are directed at developing a life planner for a user based on data collected from various data sources. The life plan is displayed using a timeline that includes events generated from the collected data. As additional data is received, the timeline is updated to reflect the changes or additions to the data. In some embodiments, the life plan includes recommendations and predictions pertaining to a financial plan for the user based on his or her expenses and income.
US11017472B1 Total loss evaluation and handling system and method
Aspects of the disclosure describe systems and methods for handling a loss involving an insured vehicle. A total loss evaluation and handling system receives vehicle telematics data from a vehicle telematics device that monitors the vehicle. The total loss evaluation and handling system determines that a loss involving the vehicle has occurred, and a total loss evaluator selects a set of total loss rules configured to determine whether the loss is a total loss. The total loss evaluator applies the total loss rules selected to the vehicle telematics data received and determines whether the loss is a total loss based on the total loss rules applied. A total loss handler obtains an estimated value of the vehicle and generates a settlement amount based on the estimated value. The total loss handler initiates a payment corresponding to the settlement amount as settlement for the total loss.
US11017471B2 Transactionally deterministic high speed financial exchange having improved, efficiency, communication, customization, performance, access, trading opportunities, credit controls, and fault tolerance
The disclosed embodiments relate to implementation of a trading system, which may also be referred to as a trading system architecture, having improved performance which further assures transactional determinism under increasing processing transaction loads while providing improved trading opportunities, fault tolerance, low latency processing, high volume capacity, risk mitigation and market protections with minimal impact, as well as improved and equitable access to information and opportunities.
US11017467B1 Systems and methods for measuring data quality over time
Systems, methods, and computer-readable media are disclosed for evaluating data quality. An exemplary embodiment includes storing a plurality of records, the records sharing a common attribute, and reading first values for the common attribute corresponding to a first time period and second values for the common attribute corresponding to a second time period. A business rule for evaluating the common attribute is accessed, and first and second consistency data are generated. The first consistency data may reflect the extent to which the first values of the common attribute are consistent with the business rule at the first time. The second consistency data may reflect the extent to which the second values of the common attribute are consistent with the business rule at the second time. The first consistency data and the second consistency data are processed to generate a quality change rate of the common attribute from the first time period to the second time period, based on the difference between the first consistency data and the second consistency data.
US11017465B2 OLED-based secure monitoring of valuables
A method for enhancing security of a receptacle for valuables may be provided. The method may include placing currency in the receptacle. The receptacle may include an integral OLED display. The OLED display may occupy a portion of the receptacle. The OLED display may form a portion of the receptacle. The OLED display may be visible from a viewpoint external to the receptacle. The method may include capturing one or more biometric characteristics on a pressure-sensitive portion of the OLED display. The method may include storing the captured biometric characteristics on a software chip of the OLED display. The method may include transmitting the captured biometric characteristics via a communication circuit of the OLED display.
US11017462B2 Providing a virtual shopping environment for an item
Techniques for providing a virtual item shopping environment are presented herein. Live video of a person walking past a display is captured using a camera. One or more items are selected from a database automatically by determining an item available for sale and selecting the item without intervention from the person. One or more data records representing one or more respective items are retrieved from a database. The items are presented on a display based on the data records representing the respective items. Presentation is perform by presenting live real-time video of the person walking past the display with an overlaid view of the item available for sale to provide an unrequested view of the item available for sale.
US11017458B2 User terminal device for providing electronic shopping service and methods thereof
A user terminal device includes a display, a sensor, and a controller configured to control the display to display a screen comprising information on a product, and, based on a user input for defining a closed area by drawing a curve around the information on the product being sensed through the sensor, obtain price information of the product from at least one object included in the defined closed area, and add the obtained price information to a wish list.
US11017457B2 Information processing system and information processing method of information processing system
An information processing system includes a local server and a cloud server. The cloud server includes the following. A receiver receives input of temporary input data. A transmitter transmits the temporary input data based on a transmitting request from the local server. The local server includes the following. A monitoring unit monitors whether the temporary input data is received in the cloud server. A transmitting request unit requests the temporary input data when the monitoring unit determines that the temporary input data is received. A receiver receives the temporary input data. A reflecting unit reflects the temporary input data on a data input form. A registering unit registers data input on the data input form in a database of the local server when data input on the data input form is finished.
US11017455B1 Dynamic computer marketplace system and method
Systems, methods and apparatuses are disclosed for implementation and management of a dynamic compute and application marketplace. The dynamic computer marketplace system can coordinate access to one or more other computing resources, including on-premises computing resources, external (or off-premises) computing resources or a combination thereof. In various embodiments, the dynamic computer marketplace system advantageously can be used to facilitate inter-provider migration, transparent pricing, and/or competitive pricing, among other things.
US11017454B2 Agent robot control system, agent robot system, agent robot control method, and storage medium
Provided is an agent robot control system comprising an acquisition unit which acquires a purchasing master list which shows a user's purchase merchandise candidates, and a control unit which generates a purchasing execution list for recommending, from the purchasing master list, purchases for select merchandise to be performed at real storefronts and for recommending purchases for other merchandise to be performed at online storefronts.
US11017453B2 Glasses selling system, lens company terminal, frame company terminal, glasses selling method, and glasses selling program
A selling server stores prescription data of a customer transmitted from an optometrist terminal of an optometrist who performs optometry for a glasses prescription through a communication line in association with customer identification information, transmits image data of a frame candidate group of glasses to a customer terminal, transmits image data of a lens candidate group of the glasses to the customer terminal, receives information relating to a frame and a lens purchased by the customer and determined on the basis of a combined image of a frame image selected by the customer, a lens image selected by the customer, and a face image of the customer, and transmits prescription data of the customer to a lens company terminal of a lens company which processes the lens purchased by the customer.
US11017452B2 Concerted learning and multi-instance sequential prediction tree
A method, system and computer readable medium for performing a purchase prediction operation. The purchase prediction operation includes: selecting a target purchaser, the purchase prediction operation providing a purchase prediction for the target purchaser; capturing a product term associated with a most recent purchase period of the target purchaser; performing a sequential recommendation operation, the sequential recommendation operation providing a sequence recommendation score; and, generating a purchase pattern prediction for the target user based upon the sequential recommendation score.
US11017448B2 On-demand customization of products
Methods and apparatus for on-demand customization of products. A product distributor may provide a product customization service and user interface to its customers that may be used to enhance, extend, customize, or combine stock physical products offered by the product distributor by providing custom add-on physical items for or customizations to the stock products. The product distributor may leverage on-demand production technologies such as additive manufacturing technologies to produce the custom physical items or customizations according to specifications received from the customer or generated according to descriptive information for the stock products. The custom items may be combined with one or more stock products to produce customized products for the customers.
US11017447B2 Secure proxy service
A system is configured to receive a network resource request from a user device configured with a browsing application, wherein the request includes identification data associated with the user device. The system transmits, to a network resource provider, a request for the network resource, wherein the request transmitted to the network resource provider excludes identification data included in the request received from the user device. The system receives from the network resource provider a response, including a document comprising a field configured to receive payment information for an item purchase. The system receives from the browsing application an indication that an anonymous payment instrument, associated with a first entity different than the user, is to be used to purchase a first item at a first price. The system causes information regarding the anonymous payment instrument to be provided to the network resource provider.
US11017446B2 System and method for automated preparation of quotes and proposals
A system includes a proposal engine configured to present quotes and/or proposals to customers at a network site.
US11017445B2 Methods and systems for online transactions
Systems, methods, and devices of the various embodiments enable online transactions related to buying/selling an item, such as a vehicle. In an embodiment, one or more installment agreements relating to a user and one or more items may be generated in response to one or more received inputs. In an embodiment, a deal table comprising the one or more installment agreements may be generated, and the deal table may be transmitted to a user device for presentation via the user interface.
US11017444B2 Verified-party content
Disclosed herein are systems, methods, and non-transitory computer-readable storage media for uploading, by a verified party, verified-party content to a media platform, receiving requests by a client device for store content, and displaying the uploaded verified-party content along with store content on the client device.
US11017443B2 System and method for a merchant onsite personalization gifting platform
An online personalized gifting system and method includes an application executed on a computing device to communicate with a merchant server owned and managed by a merchant for generating customized gift structures that may be sent to a recipient. The application transmits the gift structure templates to a merchant server in communication with a user computing device, communicates with the merchant server to receive a selected one gift structure template that has been obtained by the merchant server from the user computing device, and communicate with the merchant server to receive at least one of user-supplied textual, audio, or video content that has been obtained by the merchant server from the user computing device. The application communicates with a production facility located at a site of the merchant to generate a gift structure in accordance with the selected gift structure template and the user-supplied content using a production facility.
US11017433B1 Systems, apparatus, and methods for providing merchant-defined local promotions
Systems, apparatus, and methods for providing networked-based electronic messages having local relevance to consumer device location are discussed herein. Some embodiments may include an apparatus or distributed apparatuses including processing circuitry configured to provide a merchant interface to a merchant device. The merchant interface may be configured to facilitate creation of promotion data that defines a promotion based on merchant device input. The promotion data may further define one or more merchant locations capable of providing redemption of the promotion, such as shipping or in-store pickup. The processing circuitry may track the location of the consumer device, and may provide impressions of the promotion to the consumer device based on the location of the consumer device relative to the one or more merchant locations capable of providing redemption.
US11017429B2 Systems and methods for managing user information over a network
Systems, methods, and computer-readable mediums, consistent with principles of some embodiments of the present invention provide for applying a user interface to an electronic device including storing information relating to a user of an electronic device, wherein the stored information includes user information data and user history data, storing a template user interface, modifying the user interface based on the stored user information and the user history data, and applying the modified user interface to the electronic device, wherein the user interface enables a user to instruct the electronic device to perform operations within a shopping establishment.
US11017427B1 Systems and methods for attributing electronic purchase events to previous online and offline activity of the purchaser
Systems and methods are disclosed for attributing payment vehicle purchase events to previous activity of a purchaser. One method comprises: receiving purchase information associated with a purchase event by a purchaser; comparing the received purchase information to a profile data store to identify a purchaser profile associated with the purchaser, the profile data store comprising a plurality of purchaser profiles, wherein each purchaser profile comprises payment vehicle data and a tracking element; determining the tracking element of the identified purchaser profile; identifying one or more activities of the purchaser using the tracking element of the identified purchaser profile; for each of the identified one or more activities, assessing the strength of attributing the purchase event to the activity, using environmental and/or behavioral data associated with the tracking element; and determining whether to attribute the purchase event to one or more of the identified activities based on the assessment.
US11017426B1 Content performance analytics
Techniques for performing content performance analytics are disclosed in accordance with some embodiments. In some embodiments, a process for performing content performance analytics includes receiving content on a web site; performing content performance analytics of content available on the web site using a processor; generating a report that includes a recommended action based on the content performance analytics for the content on the web site; and automatically performing a recommended action based on the content performance analytics for the content on the web site.
US11017420B2 Processing requests to buy items or services
A method and system for processing shopping information. The shopping information, which pertains to an item purchased by a user, is read from a mobile device, and was scanned by the mobile device from an item tag attached to the item. The item relates to another user. A set of affiliates is determined from analysis of the shopping information. Each affiliate is entitled to receive a reward due to purchase of the item.
US11017419B2 Systems and methods for managing incentive campaigns and automatically approving requests for incentives
Systems and methods to manage incentive campaigns and automatically approve requests for incentives received from consumers or their proxy based on dynamic parameters defined by an incentive provider are described herein. Users at various levels between an original equipment manufacturer and the consumer may interact and offer input. In various implementations, campaign parameters may be received from an incentive provider and used to initiate and/or otherwise administrate a campaign. Incentive providers may then dynamically modify ongoing campaigns via the system. One or more user interfaces may be generated through which users may interact with the system and visualizations related to a campaign may be presented. Based on the initial or modified parameters for a campaign, the systems and methods described herein may further determine whether to approve, deny, or otherwise respond to requests for incentives received from consumers or their proxy.
US11017418B1 Merchant services statements and pricing
A method for obtaining credit card pricing for a merchant includes obtaining a merchant category classification (MCC) code. A sales volume, a number of credit card transactions, an average dollar amount of the credit card transactions and a percentage of credit card transactions that are keyed are obtained. The MCC code, the average dollar amount of the of credit card transactions processed and the percentage of credit card transactions that are keyed are compared with corresponding data from a database of merchant credit card transactions. A matched merchant is identified whose transaction profile closely matches a combination of the MCC code, the average dollar amount of the credit card transactions processed and the percentage of credit card transactions that are keyed. Credit card processing pricing information for the matched merchant is obtained from the database. The credit card processing pricing information is used to calculate credit card processing pricing for the matched merchant.
US11017412B2 Contextual information monitoring
Context information in a computer system is collected. Dependent context data maintains a reference to parent context data so that system context can be reconstructed and analyzed.
US11017411B2 Systems and methods for multi-channel offer redemption
Provided is a method for presenting images with embedded links for multi-channel redemption in a user interface. The method includes displaying an image including a first selectable portion and a second selectable portion, wherein a first link is embedded in the first selectable portion and points to a portal under control of a transaction handler, the first link identifying an offer for a merchant including at least one condition, and wherein a second link is embedded in the second selectable portion and points to the merchant. The method further includes, in response to a user selecting the first selectable portion of the image and following the first link, identifying, by the transaction handler and/or the portal, the user and an account of the user, and associating, by the transaction handler and/or the portal under control of the transaction handler, the offer with the account of the user.
US11017404B1 Event based authentication
Methods and systems of authenticating a user based on an event, such as a natural disaster, a gathering of people, and mass activities of people. The method comprises recognizing, by a financial institution computing system, an event; receiving, by the financial institution computing system, a transaction request of a user; determining, by the financial institution computing system, that the user is associated with the recognized event; adjusting, by the financial institution computing system, authentication rules for the user; and processing, by the financial institution computing system, the transaction request for the user based on the adjusted authentication rules.
US11017403B2 Systems and methods for identifying fraudulent common point of purchases
A common point of purchase (CPP) system for identifying a common point of purchases involved in fraudulent or unauthorized payment transactions is provided. The CPP system includes a common point of purchase (CPP) computing device that is configured to receive transaction data, store the transaction data in a database, and perform a look up within the database. The CPP computing device is also configured to build a merchant table, receive a card list, and compare a plurality of flagged account identifiers in the card list to account identifiers in the merchant table. The CPP computing device is further configured to retrieve a unique merchant identifier and/or a merchant name identifier associated with the merchant table account identifiers matched with the flagged account identifiers, aggregate the unique merchant identifier using the merchant name identifier, and determine a first number of the flagged account identifiers associated with the merchant name identifier.
US11017395B2 Vending machine with user ID/age verification system and associated method
A method for remotely authorizing a financial transaction within a friendship network includes at least the steps of: (a.) a host server communicating with a friendship network of a first user and a second user, the host server receiving from the first user a request to retrieve an item; (b.) in response to receiving the request, the host server locating the item at an authorized transaction terminal in communication with the friendship network and within a vicinity of a location of the first user; and (c.) the host server communicating the request to the second user, selected by the first user and within the friendship network of the first user, and notifying the second user that the item is located at the authorized transaction terminal.
US11017393B2 Direct connection systems and methods
Embodiments of the invention are directed to passing a plurality of communications directly from a merchant to a payment processing network. A first communication may include payment information in an authorization request, while a second transaction may include non-payment transaction data. The communications may be linked with a transaction identifier. In other embodiments, a capture file process is disclosed where capture files are generated by the payment processing network, and transactions are subsequently cleared and settled.
US11017392B2 Method, apparatus and electronic device for blockchain transactions
The application provides a method, apparatus, and electronic device for implementing blockchain-based transactions. The method comprises: determining a plurality of blockchain-based transactions to be executed among a transaction-initiating party, a transaction-relay party, and a transaction-target party in a blockchain; generating common transaction data and first independent transaction data, wherein: the common transaction data is related to the plurality of blockchain-based transactions, and the first independent transaction data is related to one or more of the plurality of blockchain-based transactions involving the transaction-initiating party; obtaining second independent transaction data, wherein: the second independent transaction data is related to one or more of the plurality of blockchain-based transactions involving the transaction-relay party; and submitting a consolidated transaction related to the plurality of blockchain-based transactions to the blockchain, wherein the consolidated transaction comprises the common transaction data, the first independent transaction data, and the second independent transaction data.
US11017388B2 Cryptographically assured zero-knowledge cloud service for composable atomic transactions
A trusted network based service running on a server, for example as a cloud server, includes receiving a request from a first user device and a second user device. The request includes one or more inputs to perform a transaction. Based upon the request, selecting one or more computational resources from a set of a plurality of computational resources using zero-knowledge verifiable computing. In response to receiving authorization from each of the computational resources that they are capable of performing the zero-knowledge verifiable computing transactions to carry out at least a portion of the request, executing the program using zero-knowledge verifiable computing to carry out the request using a zero-knowledge protocol to ensure privacy of the first user device and the second user device. Sending to the first user device and the second user device an output of the request.
US11017386B2 Cloud-based transactions with magnetic secure transmission
Techniques for enhancing the security of a communication device when conducting a transaction using the communication device may include using a limited-use key (LUK) to generate a transaction cryptogram, and transmitting a token instead of a real account identifier and the transaction cryptogram to an access device to conduct the transaction. The token and the transaction cryptogram can be transmitted to a magnetic stripe reader by generating an emulated magnetic signal. The LUK may be associated with a set of one or more limited-use thresholds that limits usage of the LUK, and the transaction can be authorized based on at least whether usage of the LUK has exceeded the set of one or more limited-use thresholds.
US11017377B2 Apparatus and method for wireless secure payment and data transaction with biometric enrollment and authentication
An apparatus and a method for wireless secure payment and data transaction with biometric enrollment and authentication including an active and passive hybrid device for secure wireless data transaction including a secure element adapted for storing at least one secure applet and at least one data segment for secure contactless data transaction and operatively connected with an active operation unit and a passive operation unit; and preferably the active operation unit is adapted to be connected removably with the secure element; and wherein the hybrid device is configured to be switchable between an active state in which the active operation unit is activated on demand to enable the hybrid device to function as an active device and adapted for provisioning various data to the secure element; and a passive state in which the active operation unit is deactivated and the passive operation unit is activated to enable the hybrid device to function as a passive device and adapted for conducting data verification and/or contactless data transaction operation via the secure element; and it further includes a biometric unit for biometric enrollment and authentication and a visual and/or audible indicator unit for providing a proper visual and/or audible indication for the result of authentication.
US11017376B1 Mobile device-based dual custody verification using micro-location
A computer-implemented method includes receiving a transaction initiation request from a first user via a first computing device. A first micro-location parameter relating to a micro-location of the first computing device is received. Approval of the transaction initiation request is requested from a second user via a second computing device. Approval of the transaction initiation request is received from the second user via the second computing device. A second micro-location parameter relating to a micro-location of the second computing device is received. The transaction is approved if the micro-locations of the first and second computing devices indicate that the first and second computing devices are at least a predetermined distance from each other.
US11017368B2 Systems and methods for automatically collection of performance data in a multi-tenant database system environment
A method of collecting data from multiple sources in a multi-tenant system is provided. The method includes obtaining data corresponding to a first tenant in the multi-tenant system and a second tenant in the multi-tenant system from a first source, obtaining data corresponding to the first tenant in the multi-tenant system and the second tenant in the multi-tenant system from a second source, and aggregating the data obtained from the first and second sources into a single database and associating each entry of the obtained data with at least one of the tenants of the multi-tenant system.
US11017367B2 Processing device, processing device control method, and recording medium
A processing device allocates processing resources to a communication processing and an application processing and executes at least the communication processing and the application processing. The processing device includes: a communication interface and at least one processor that operates to execute a scheduling processing that allocates communication processing resources that are at least a part of the processing resources to the communication processing in a preferential manner and a billing processing that bills a user of the application processing according to a usage amount of processing resources used for the application processing. The application processing includes a non-priority application processing processable in a non-preferential manner. The scheduling processing is capable of allocating, when a load on the communication processing resources does not reach a predetermined threshold, the communication processing resources to the non-priority application processing. The billing processing bills for the non-priority application processing at a usage fee of the communication processing resources more inexpensive.
US11017366B2 System and method for two-click validation
A method to enable transactions comprising transmitting, by a vendor server, a request message to the e-commerce system for a token. Receiving a token in response to the request message. Generating an offer message including a mailto hyperlink, wherein the offer message is an email message including a mailto hyperlink is configured to generate an email reply message include the token. Transmitting the offer message to an email address associated with the customer. Receiving a response message from the e-commerce system, the response message including transaction details that confirm the token was validated by the e-commerce system. Transmitting a payment processing request message to a payment processor, wherein the payment processing request is based on the transaction details. Receiving a notification from the payment processor, that payment processing has been completed. Transmitting an email message to the email address of the customer, that payment has been processed.
US11017365B2 Systems and methods for point of sale deposits
The disclosed embodiments include systems and methods for executing a point of sale deposit. In one embodiment, a system may include one or more memory devices storing software instructions, and one or more processors configured to execute the software instructions to receive transaction information related to a point of sale deposit from a client device, and generate a pending deposit transaction based on the transaction information. The one or more processors may be further configured to execute the software instructions to receive a first transaction token from the client device, receive a second transaction token from a third-party device, match the first transaction token to the second transaction token, and complete the pending deposit transaction based on the match.
US11017360B2 Methods for cloud processing of vehicle diagnostics and providing electronic keys for servicing
A method and system for diagnosing and providing access to a vehicle for servicing the vehicle are provided. One method is provided for accessing the vehicle for servicing the vehicle. The method includes receiving, by a server, vehicle data that is used for diagnostics of the vehicle. Recommending, via the server, a service job needed for the vehicle based on the diagnostics. Receiving, by the server, approval from a user account associated with the vehicle to process the service job on the vehicle. The approval includes approval of a service provider to perform the service job on the vehicle. Generating an electronic key by the server for the vehicle for performing the service job on the vehicle by the service provider. The electronic key has a set of restrictions that limit types of access and use of the vehicle for when the service provider performs the service job on the vehicle. The method then includes sending the electronic key to the service provider. The electronic key is usable by the service provider based on the set of restrictions.
US11017358B2 Schedule defragmentation
Calendar data including meeting schedules for users may be received by a processing device. A set of user schedules for the users may be generated based upon the calendar data. Each user schedule may contain a set of timeslots that represent a time window and an indication of whether a meeting is scheduled. A first combined score for the set of user schedules may be calculated. One or more rescheduling moves for the scheduled meetings may be determined using a rescheduling rule. A second combined score may be generated based on the rescheduling moves for the set of user schedules. A determination may be made as to whether the second combined score is higher than the first combined score. One or more meeting updates to reschedule the one or more meetings for the users may be generated.
US11017357B2 Employee mobile device storage apparatus and timekeeping system
A mobile device storage and tracking system includes a mobile device storage unit having a housing and a plurality of storage spaces. Responsive to a user input that is indicative of a particular user, a control positions a respective storage space at a door, whereby the user can store a mobile device at that respective storage space. After the user stores the mobile device at that respective storage space, the door is closed. When that user again provides the user input, the control positions the respective storage space at the door and the user can access the mobile device at that respective storage space. The control monitors and records, for each particular user during a work shift, the amount of time that the particular user's mobile device is at the storage space and the amount of time that the particular user's mobile device has been removed from the storage space.
US11017347B1 Supply chain visibility platform
Systems, methods, and non-transitory media are provided for dynamically predicting visibility of freights in a constrained environment. An example method can include determining attributes associated with a load transported by a carrier from a source to a destination, the attributes including an identity of the carrier, an identity of an industry associated with the load, an identity of a shipper of the load, load characteristics, and/or a pickup time of the load; based on the attributes, predicting a route the carrier will follow when transporting the load to the destination, at least a portion of the route being predicted without data indicating an actual presence of the carrier within the portion of the route, the data including location measurements from a device associated with the carrier and/or a location update from the carrier; and generating a tracking interface identifying the route the carrier is predicted to follow.
US11017346B2 Methods, apparatus, and systems for generating a content-related notification using a container interface display apparatus
Methods, apparatus, and systems are described for generating a content related notification based upon managed logistics information related to a container using a container interface display apparatus. Such a container interface display apparatus records an update to the managed logistics information maintained in a memory of the container interface display apparatus and then accesses at least a portion of the managed logistics information maintained in the memory after recording the update. The container interface display apparatus then detects a notification event based upon the accessed portion of the managed logistics information. Such notification event is related to status information associated with the container or an item stored within the container. The container interface display apparatus then generates the content related notification related the notification event and dynamically displays information related to the content related notification on a display screen of the container interface display apparatus.
US11017345B2 Method for providing delivery item information and apparatus therefor
The present disclosure provides a method and system for allowing a receiver of a delivery item to view moving picture corresponding to the delivery item attached on the delivery item in an augmented reality form without unpacking the delivery item so as to allow to intuitively check the information of the delivery item. According to an aspect of an exemplary embodiment, a method of providing delivery item information in a device includes: activating a camera when an application program is executed; recognizing an identification code attached on a delivery item and photographed by the camera; requesting moving picture data corresponding to the identification code from a service server and receiving the moving picture data; and outputting moving picture corresponding to the moving picture data by superimposing on a real-time camera image acquired by the camera.
US11017340B2 Systems and methods for cheat examination
A system includes a storage device storing a set of instructions and at least one processor in communication with the storage device. When executing the instructions, the at least one processor is configured to obtain, via a network, rule information for rules for determining alert from a rule library and obtain, via the network, operation data of the on-demand service from a storage medium. The at least one processor may also cause the system to determine whether the operation data is in accordance with the rules for determining alert based on the rule information and determine an alert based on the determination that the operation data is in accordance with the rules for determining alert. The at least one processor may further cause the system to and transmit the alert to be displayed to managers of the on-demand service.
US11017337B2 Computerized data processing systems and methods for generating interactive graphical user interfaces
Centralized communication server systems and methods are provided. In one embodiment, a centralized server includes at least one network interface for bidirectional communication with mobile devices. At least one processor is configured to receive, via the computer network, event information for a discharge event associated with an individual, automatically identify a department associated with the one or more rooms, automatically receive protocol information for the identified department, and identify one or more milestones. The processor(s) are further configured to automatically generate workload data based on the identified milestones, receive assignment information for a plurality of individuals associated with the protocol information, and automatically assign the one or more milestones to the first individual. The processor(s) are further configured to automatically generate a first electronic notification addressed to the first mobile device, including information associated with the at least one discharge event and the one or more milestones.
US11017334B2 Workspace management system utilizing smart docking station for monitoring power consumption, occupancy, and usage displayed via heat maps
Systems for managing a workspace are disclosed. A system to manage a workspace includes a plurality of docking stations located at corresponding workstations. Each docking station is configured to provide a network connection and power to a computer device at a corresponding workstation. Each docking station of the plurality of docking stations includes a power input and a network interface to communicate with a network. The system also includes a system computer including a system network interface to communicate with each docking station of the plurality of docking stations via the network.
US11017330B2 Method and system for analysing data
A method and system for analysing data is disclosed. One or more data records are passed to a data analysis system. The data records comprised a plurality of data items and a first one of the data items is selected from the data items in the data record. A statistical model can be retrieved from a store in a computer system and the statistical model used to detect abnormal results from the selected data item and produce a data model. This statistical model is stored with the data record in the data base.
US11017318B2 Information processing system, information processing method, program, and vehicle for generating a first driver model and generating a second driver model using the first driver model
An information processing system receives first travel histories from vehicles that belong to vehicle type A, learns based on the first travel histories to build a first driver model that represents relation between travel situations and behaviors of the vehicles that belong to a first vehicle type, receives second travel histories from vehicles that belong to vehicle type X that is different from vehicle type A, and performs transfer learning in which the second travel histories are used for the first driver model to build a second driver model that represents relation between travel situations and behaviors of the vehicles that belong to vehicle type X.
US11017315B2 Forecasting wind turbine curtailment
A method includes training a prediction model to forecast a likelihood of curtailment for at least one wind turbine. The prediction model is trained, by a processor system, using historical information and historical instances of curtailment. The method also includes forecasting the likelihood of curtailment for the at least one wind turbine using the trained prediction model. The method also includes outputting the forecasted likelihood.
US11017313B2 Situational context analysis program
In an approach for providing a response based on situational context, a computer determines that an individual is within a proximity of a computing device. The computer identifies an identity associated with the determined individual within the proximity of the computing device. The computer determines a location associated with the identified identity. The computer identifies an entry within a table based on at least in part on the identified identity and the determined location. The computer determines a stimulus associated with the identified entry occurs. The computer provides a response based on determining the stimulus associated with the identified entry occurs.
US11017311B2 Dataset augmentation based on occlusion and inpainting
Augmenting a dataset in a machine learning classifier is disclosed. One example is a system including a training dataset with at least one training data, and a label preserving transformation including an occluder, and an inpainter. The occluder occludes a selected portion of the at least one training data. The inpainter inpaints the occluded portion of the at least one training data, where the inpainting is based on data from a portion different from the occluded portion. In one example, the augmented dataset is deployed to train a machine learning classifier.
US11017306B2 Using machine learning-based seed harvest moisture predictions to improve a computer-assisted agricultural farm operation
Embodiments generate digital plans for agricultural fields. In an embodiment, a model receives digital inputs including stress risk data, product maturity data, field location data, planting date data, and/or harvest date data. The model mathematically correlates sets of digital inputs with threshold data associated with the stress risk data. The model is used to generate stress risk prediction data for a set of product maturity and field location combinations. In a digital plan, product maturity data or planting date data or harvest date data or field location data can be adjusted based on the stress risk prediction data. A digital plan can be transmitted to a field manager computing device. An agricultural apparatus can be moved in response to a digital plan.
US11017304B2 Original idea extraction from written text data using knowledge graphs
Original idea extraction from written data is provided by capturing expression as written text data, obtaining a knowledge graph representing concepts and relationships between the concepts automatically topic modeling the written text data to ascertain thought units and identify respective concepts of the thought unit, mapping a thought unit to the knowledge graph, determining that the thought unit is an original idea based on a graph distance in the knowledge graph between correlated concepts represented in the knowledge graph, and based on determining that the thought unit is an original idea, storing a representation of the original idea to an idea repository and invoking processing of at least one computer.
US11017299B1 Providing contextual actions for mobile onscreen content
Systems and methods provide an application programming interface to offer action suggestions to third-party applications using context data associated with the third-party. An example method includes receiving content information and context information from a source mobile application, the content information representing information to be displayed on a mobile device as part of a source mobile application administered by a third party, the context information being information specific to the third party and unavailable to a screen scraper. The method also includes predicting an action based on the content information and the context information, the action representing a deep link for a target mobile application. The method further includes providing the action to the source mobile application with a title and a thumbnail, the source mobile application using the title and thumbnail to display a selectable control that, when selected, causes the mobile device to initiate the action.
US11017297B2 System and methods to provide seamless information exchange between certified and uncertified applications
A system for information exchange comprises a vehicle electronics data broker gateway for exchanging information between vehicle electronics certified applications and uncertified applications. The data broker gateway comprises configuration files generated with a dedicated modeling tool; a source selection module operative to seamlessly choose a best data source; a source abstraction and data collection module operative to receive data from the data source; a data conversion module operative to convert the data received into a standard format; a data cache operative to store the data received before transmitting the data; and a client abstraction and data dispatch module operative to transmit the data to the client. The data broker gateway also includes a data pre-fetch module comprising a rule based engine operative to determine a time to pre-fetch data based on pre-defined rules; and a machine learning based engine operative to learn data fetching conditions for a given data source.
US11017295B1 Device storing ternary weight parameters for machine-trained network
Some embodiments provide a set of processing units and a set of machine-readable media. The set of machine-readable media stores sets of instructions for applying a network of computation nodes to an input received by the device. The network of computation nodes includes multiple layers of nodes. The set of machine-readable media stores a set of machine-trained weight parameters for configuring the network to perform a specific function. Each layer of nodes has an associated value, and each of the weight parameters is associated with a computation node. Each weight parameter is zero, the associated value for the layer of the computation node with which the weight parameter is associated, or the negative of the associated value for the layer of the computation node with which the weight parameter is associated. Each weight value is stored using two bits or less of data.
US11017294B2 Recognition method and apparatus
A method of recognizing input data includes determining a feature vector corresponding to an ensemble model from input data, based on the ensemble model, and recognizing the input data based on the feature vector. The ensemble model includes a first model and a second model having a structure that is the same as a structure of the first model.
US11017283B2 Electronic tag for a metal component of a system in a housing
There is provided an electronic tag for a metal component of a system, wherein the electronic tag includes: a metal support frame, a first portion arranged within the metal support frame and secured relative to the metal support frame, a passive transponder, and a second portion, wherein the second portion secures the passive transponder at least relative to the first portion.
US11017277B2 Image processing apparatus, image processing method and storage medium, with correction amount for correcting line width in accordance with color of line
An object is to reduce a difference between a target line width and a width of a line that is printed by a printing apparatus by correcting the line width in accordance with color information indicating a color of the line in a case where an image is printed by the printing apparatus based on image data including the line based on print data. The present disclosure is an image processing apparatus having an acquisition unit configured to acquire a drawing command in which a color and a line width of a line are specified, a determination unit configured to determine a correction amount for correcting the line width specified in the drawing command based on the color of the line specified in the drawing command, and a correction unit configured to correct the line width specified in the drawing command in accordance with the correction amount.
US11017271B2 Edge-based adaptive machine learning for object recognition
Examples of techniques for interactive generation of labeled data and training instances are provided. According to one or more embodiments of the present invention, a computer-implemented method for interactive generation of labeled data and training instances includes presenting, by the processing device, control labeling options to a user. The method further includes selecting, by a user, one or more of the presented control labeling options. The method further includes selecting, by a processing device, a representative set of unlabeled data samples based at least in part on the control labeling options selected by the user. The method further includes generating, by a processing device, a set of suggested labels for each of the unlabeled data samples.
US11017266B2 Aggregated image annotation
Image annotation includes: accessing an image and a plurality of annotation data sets for the image, wherein the plurality of annotation data sets are made by a plurality of contributors, and the image has a plurality of original image channels; aggregating the plurality of annotation data sets to obtain an aggregated annotation data set for the image; and outputting the aggregated annotation data set. Aggregating the plurality of annotation data sets to obtain an aggregated annotation data set for the image includes: generating an additional image channel based at least in part on weight averages of confidence measures of the plurality of contributors; and applying an object detection model to at least a part of the plurality of original image channels and at least a part of the additional image channel to generate the aggregated annotation data set.