| Document | Document Title |
|---|---|
| US10193985B2 |
Method and device for performing service discovery in wireless communication system
Provided according to the present invention is a method for a first neighbor awareness networking (NAN) device for performing service discovery in a wireless communication system. A method for performing service discovery comprises the steps of: exchanging a subscribe message with a second NAN device; and transmitting a first service discovery frame (SDF) on the basis of the exchanged subscribe message. The first service discover frame comprises a NAN connection capability attribute field, wherein the NAN connection capability attribute field comprises a first type interface information field, wherein the first type interface information field can show whether or not the first NAN device supports a first type interface. |
| US10193981B2 |
Internet of things (IoT) self-organizing network
Novel tools and techniques are provided for implementing Internet of Things (“IoT”) functionality. In some embodiments, a first IoT-capable device might receive beacon data from each of one or more other IoT-capable devices in a self-organizing network (“SON”) of IoT devices, might compare the received beacon data with stored beacon data, and might send at least one first data to a computing system to update the computing system of any changes in the SON (indicating, without limitation, new devices, failed devices, disabled devices, devices that have moved out of range, etc.). The computing system might receive and analyze the at least one first data to determine a status of each IoT-capable device in the SON, might generate control instructions, and might autonomously send the control instructions to at least one of the IoT-capable devices in the SON to improve the functionality of the SON. |
| US10193979B2 |
System architecture for wireless metrological devices
System architecture that provides computer-based methods of wireless communication between a wireless metrological device and a mobile computing device that includes the sending/receiving of data (e.g., measurements) along with a universal generic data service that includes data descriptor(s) affiliated with the measurements. The architecture and methods, which may be communicated via BLE, allow for uniform communication between tools and mobile computing devices regardless of tool type, manufacturer, and measurement information. |
| US10193978B2 |
Distributed network node operation system based on operation control unit
A distributed network node operation system based on an operation control unit. The operation system operates on a network node and interacts with a data link layer, and includes: an application interface unit, a network information management unit, a file unit, a task scheduling unit and a device drive management unit. The application interface unit packages the services provided by the file unit, the task scheduling unit and the network information management unit into an interface for interacting with the protocol stack management unit; the network information management unit interacts with the data link layer to perform link scheduling for transmitting information and updating node data; the file unit manages and stores file information; the task scheduling unit manages hardware resources; the device drive management unit manages underlying device application drives, and invokes different protocol stack library functions through different application drives. |
| US10193975B2 |
Managing multiple cloud stores through a web service
A service exposes a storage system-independent application programming interface (API) and receives a data request from an application over the API. The service transforms the storage system-independent data request into a storage system-specific data request and executes it against an identified cloud-based storage system. The service can execute the request against multiple cloud-based storage systems and then return aggregated results to the application through the storage system-independent API. |
| US10193972B2 |
Shared data transmitting method, server, and system
A method of transmitting data performed by a server through a network, a method of transmitting data in an ad hoc network, a server, and a data transmitting system are provided. The method of transmitting data performed by a server through a network includes receiving and storing data from a device of a first user; detecting that a device of a second user accesses the server; selecting data from the stored data based on user information; processing the selected data to be optimized for the device of the second user; and transmitting the processed data to the device of the second user, wherein the server is configured to combine data received from a plurality of devices of the first user and transmit the combined data to the device of the second user. |
| US10193965B2 |
Management server and operation method thereof and server system
A management server includes a storage unit, a sub-server and a load balancing unit. The storage unit stores a datum. The sub-server is corresponded to the storage unit and obtains the datum from the storage unit according to a request signal. The load balancing unit is coupled to the sub-server and receives the request signal from the client. The load balancing unit distributes the request signal to the corresponding sub-server according to a request number of the request signal. The management server outputs the datum obtained by the sub-server from the storage unit according to the request number. |
| US10193963B2 |
Container virtual machines for hadoop
A distributed computing application is described that provides a highly elastic and multi-tenant platform for Hadoop applications and other workloads running in a virtualized environment. Data and compute nodes are separated into different virtual machines (VM). Compute VMs are used to launch containers from different tenants. Compute VMs are organized in pools of hot spare VMs that are immediately available for launching a container and executing a task, and pools of cold spare VMs. Each compute VM may include a mounted network filesystem provided by a node manager to share intermediate outputs across VMs executing on the same host. |
| US10193962B1 |
Opportunistic routing
When a client requests content from a Content Delivery Network (or other system), a first portion of the content is transmitted to the client from a source capable of providing high performance to that client. When the client has a sufficient amount of the content to perform its function, then additional portions of the content can be transmitted to the client from a source that provides a lower performance to that client with a minimal or no performance penalty to the user of the client. |
| US10193952B2 |
Systems and methods for integrating external resources from third-party services
Various embodiments concern communication platforms that can integrate electronic resources distributed amongst various sources by tagging metadata associated with each of the electronic resources, thereby making the electronic resources readily searchable from a messaging interface using a single search architecture. The messaging interface can be used by users to communicate with one another. In some embodiments, the communication platform performs a search based on characters as they are entered into the text field of the messaging interface. This search across various heterogeneous sources enables the communication platform to identify a reference to an electronic resource the sender of a message wishes to insert within the message. Recipients of the message may be able to access the electronic resource directly from the messaging interface. The communication platform can also perform natural language processing techniques such as speech act detection on messages and/or other textual resources to facilitate intelligent communication streamlining. |
| US10193947B2 |
Devices and methods for content distribution in a communications network
At least one example embodiment provides a method for transmitting data files in a network. The method may include receiving requests from destination devices for packets of the data files. The method may include constructing a conflict graph such that each packet requested by each destination device is represented by a distinct vertex in a plurality of vertices of the conflict graph. The method may include coloring the plurality of vertices of the conflict graph according to a coloring scheme. The method may include performing a first encoding operation on the requested packets based on the coloring to generate first encoded data. The method may include performing a second encoding operation on the first encoded data to generate second encoded data. The method may include sending the second encoded data. |
| US10193946B2 |
Method for downloading multimedia file and electronic device
A method for downloading multimedia files and an electronic device are provided. The method includes: obtaining first bandwidth information of a first electronic device; calculating a first times point according to the first bandwidth information; sending a first download request to the first electronic device to request downloading a first multimedia streaming prior to the first time point in the multimedia file; and sending a second download request to a second electronic device to request downloading a second multimedia streaming posterior to the first time point in the multimedia file. |
| US10193944B2 |
Systems and methods for multi-device media broadcasting or recording with active control
A controller may preview media streams from a plurality of source devices, and may select between the streams, add processing or additional content to the streams, and provide an edited or mixed stream to one or more client or recipient devices. In many implementations, mixing or selective presentation of streams may be accomplished with little to no delay via a lightweight signaling and chunk identification change protocol. In other implementations, processing and mixing instructions may be provided to client devices, which may retrieve the streams and process them locally, reducing or eliminating delay from an intermediary processor or mixer. |
| US10193942B2 |
Mobile media architecture for sponsored data services
Methods and devices provide access to a sponsored data service (SDS) from a mobile device. A method may include generating a play media command that includes a remote media address and an SDS identifier, and converting the remote media address into a local media address. The method may further include requesting media from an internal content server via the local media address, where the internal content server resides within the mobile device. The method may include determining if the requested media is stored on the internal content server, obtaining the requested media from the internal content server upon determining that the requested media is stored within the internal content server, and playing the requested media on a mobile media player. |
| US10193941B2 |
Interworking between first protocol entity of stream reservation protocol and second protocol entity of routing protocol
A method for interworking between a first protocol entity adapted to operate in accordance with a stream reservation protocol for reserving resources for a data stream along a stream path of the data stream and a second protocol entity adapted to operate in accordance with a routing protocol for distributing information in a communication network is described. The method comprises sending, from the first protocol entity to the second protocol entity, a request for stream path information indicating, for a data stream to be sent, a stream path in the communication network. The method also comprises determining, by the second protocol entity, the stream path information for the stream path based on the request, sending, from the second protocol entity to the first protocol entity, the determined stream path information, and initiating, by the first protocol entity, a resource reservation procedure for reserving resources in response to receiving the stream path information. |
| US10193939B2 |
SPI handling between UE and P-CSCF in an IMS network
Managing Security Parameter Information (SPIs) to prevent race condition failures begins where a system negotiates SPIs along with associated expiration times, and re-negotiates new SPIs as necessary. The system prevents race conditions that would otherwise occur when both an old SPI and a new SPI are active at the same time. The system accomplishes this by managing the storage and deletion of old SPIs such that only active SPIs are stored on the system for use by a User Equipment (UE) or Proxy Call Session Control Function (P-CSCF). |
| US10193937B2 |
Internet protocol multimedia subsystem (IMS) restoration support for temporary globally routable user agent uniform resource identifier (GRUU)
The present invention provides apparatuses, methods, computer programs, computer program products and computer-readable media regarding IMS (Internet Protocol Multimedia Subsystem) restoration support for temporary GRUU (Globally Routable User Agent Uniform Resource Identifier). Certain aspects of the present invention include creating, at a registrar, a registration identified by a registration identifier, and storing, by the registrar, the registration identifier, a call identifier and an initial command sequence related to the registration identified by the registration identifier in a persistent database during the registration. |
| US10193934B2 |
Data compression for communications signalling
A communication event is established between an initiating device and a responding device under the control of a remote communications controller. In a pre-session establishment phase: a compression dictionary or a dictionary link that identifies an addressable memory location, at which a compression dictionary is held, is received at the initiating device. The received compression dictionary or the received dictionary link is stored in electronic storage of the initiating device. In response to a communication event establishment instruction received at the initiating device after the dictionary or the dictionary link has been received and stored at the initiating device, a session is established between the initiating device and the communications controller by the initiating device transmitting an initial session establishment message—compressed using the dictionary—to the communications controller to establish the communication event. |
| US10193933B2 |
System and method for post-discovery communication within a neighborhood-aware network
In a particular embodiment, a method includes determining, at a first mobile device, a post-discovery communication technique for communicating within a mobile device cluster after a discovery interval. During the discovery interval, a discovery message may be sent. The discovery message indicates the post-discovery communication protocol for communicating within the mobile device cluster after the discovery interval. The discovery message may further indicate a time interval for sending and receiving a paging request. In response to the receipt of the discovery message a second mobile devices may send a paging request, the paging request including a security information request. The method further includes sending from the first mobile device a paging response including security information and exchanging one or more post-discovery communications with the second mobile device using the security information. |
| US10193931B2 |
Session initiation protocol call preservation based on a network failure
To reestablish a media stream, first and second SIP INVITE with replaces header messages are received by an application from a first and second communication endpoint respectively. The SIP INVITE with replaces header messages comprises a first Session Description Protocol (SDP) offer that are each based a change of a network address used by the respective communication endpoint. In response to receiving one or both of the SIP INVITE with replaces header messages, the application, depending on implementation, sends one of a first SIP 200 OK message with a fabricated SDP answer or sends a SIP 480 temporarily unavailable message that does not comprise a SDP offer. This initiates the process of reestablishing the media stream on new network without dropping the communication session. |
| US10193928B2 |
Master security policy server
A master policy server manages security polices for client computers through a network of local policy servers. Each local policy server is responsible for the security policies on a group of clients and maintains a data store containing the security policies and security information pertaining to the clients. Periodically, the master policy server and the local policy server synchronize, at which time the master policy server replicates updated policies to the local policy servers and the local policy servers upload client security statistics to the master policy server for consolidation into a global status. |
| US10193927B2 |
Method of instruction location randomization (ILR) and related system
Systems and methods for relocating executable instructions to arbitrary locations are described, in which the relocation of the instructions may be arbitrary or random, and may operate on groups of instructions or individual instructions. Such relocation may be achieved through hardware or software, and may use a virtual machine, software dynamic translators, interpreters, or emulators. Instruction relocation may use or produce a specification governing how to relocate the desired instructions. Randomizing the location of instructions provides defenses against a variety of security attacks. Such systems and methods may provide many advantages over other instruction relocation techniques, such as low runtime overhead, no required user interaction, applicability post-deployment, and the ability to operate on arbitrary executable programs. |
| US10193925B2 |
Anti-replay method and apparatus
An anti-replay method and apparatus are provided. The same maximum agreed value is set at a transmit end and a receive end. The receive end receives an Internet Protocol Security (IPSec) packet, where the IPSec packet includes a sequence number, and acquires an upper limit value of an anti-replay sliding window. If the upper limit value of the anti-replay sliding window is the maximum agreed value, the receive end sets an interval of the anti-replay sliding window to M1 to M2, where M1 is a minimum value of the packet sequence number, and M2 is a sum of M1 and a size of the anti-replay sliding window. When a sequence number of a packet sent by the transmit end reaches a maximum value, a sequence number of a next sent packet starts from the minimum value, thereby resolving a problem that a packet is falsely discarded because of anti-replay. |
| US10193923B2 |
Methods for preventing cyber intrusions and phishing activity
Systems and methods for mitigating cyber intrusions includes: receiving target domain input, wherein the target domain input comprises a domain name associated with a target entity or target entity data that is useable to generate phishing attack domain names; using the target domain name input to generate the phishing attack domain names, wherein the phishing attack domain names include a plurality of domain names each having a phishing value comprising a likelihood or a probability of being used in a phishing campaign against the digital resources, where the likelihood or the probability satisfies a predetermined phishing value threshold; arranging the phishing attack domain names in a hierarchical order; and implementing one or more digital resources security protocols that mitigates the likelihood or the probability that selected domain names of the phishing attack domain names may be used in the phishing campaign against the digital resources. |
| US10193922B2 |
ISP blacklist feed
Embodiments are provided for an actionable blacklist of DDoS offenders and ISPs associated offenders. The system can collect real-time attack data and perform real-time analysis, which can be fed into a centralized database for intelligent analysis to identify offenders and report to interested subscribers. The system can receive an indication that network resources are being targeted as part of one or more DDoS attacks, and then obtain the malicious IP address of devices associated with those DDoS attacks. The system can determine the Internet Service Provider (ISP) associated with malicious IP addresses. A metric can be computed that is associated with an ISP involved in the one or more DDoS attacks. If the metric exceeds a threshold, then an alert message indicating that the first ISP is involved in the one or more DDoS attacks can be sent to a list of subscribers. |
| US10193921B2 |
Malware detection and prevention system
Aspects of the present disclosure involve systems and methods computing devices to access a public network posing as a user to the network to detect one or more malware programs available for downloading through the network. More particularly, a malware detection control system utilizes a browser executed on a computing device to access a public network, such as the Internet. Through the browser, sites or nodes of the public network are accessed by the control system with the interactions with the sites of the public network designed to mimic or approximate a human user of the browser. More particularly, the control system may apply the one or more personality profiles to the browser of the computing device to access and interact with the nodes of the public network. Further, the control system may monitor the information retrieved from the network sites to detect the presence of malware within the nodes. |
| US10193915B2 |
Computerized system and method for automatically determining malicious IP clusters using network activity data
Disclosed are systems and methods for improving interactions with and between computers in content searching, generating, hosting and/or providing systems supported by or configured with personal computing devices, servers and/or platforms. The systems interact to identify and retrieve data within or across platforms, which can be used to improve the quality of data used in processing interactions between or among processors in such systems. The disclosed systems and methods provide a novel clustering framework applied on datasets of network interactions to automatically identify IP clusters carrying out a specific task(s) based on an IP blacklist. The disclosed systems and methods can analyze network activity of devices associated with the IP addresses, and/or the IP addresses themselves, and perform an automatic, on-the-spot analysis that results in a determination whether the activity is permitted on or over a network. |
| US10193914B2 |
Methods and systems for providing security for page framing
Techniques for analyzing a page to be presented by a browser running on a computing platform. The page is disabled. The page is tested to determine if the page is framed by a second page. The page is enabled if the testing indicates that the page is not framed by a second page. Each level of a hierarchy of framed pages is inspected to determine whether each level is authorized. The page is enabled if the inspecting indicates that each level of the hierarchy of framed pages is authorized. |
| US10193913B2 |
Joint anomaly detection across IOT devices
Systems and methods of the present disclosure provide technology to identify when network-connected devices are likely infected with malware. Network communications are be monitored during a specific time window and a graph is created for a conditional random field (CRF) model. Vertices of the graph represent devices connected to the network and an edge between two vertices indicates that one or more network communications occurred between two devices represented by the two vertices during the time window. Network devices can report observations about network behavior during the time window and the observations can be used as input for the CRF model. The CRF model can then be used to determine infection-status values for the network devices. |
| US10193909B2 |
Using instrumentation code to detect bots or malware
Techniques are provided for using instrumentation code to detect bots or malware. Data corresponding to requests from a plurality of client devices for a web resource comprising web code is obtained. The web resource is hosted by a first web server system. For a first client device of the plurality of client devices, instrumentation code is served. The instrumentation code is configured to execute on the first client device to monitor execution of the web code of the web resource at the first client device. One or more responses generated by the instrumentation code at the first client device are received from the first client device. The one or more responses are based one or more interactions with the web code at the first client device. |
| US10193908B2 |
Data transfer for network interaction fraudulence detection
A method for analyzing network interaction data is disclosed. Initially, network interaction data is received from a network over time. A predetermined model comprising predetermined values associated with network interaction parameters is also received. The received network interaction data is processed to determine the network interaction parameters and information regarding the network interaction data. A score for the network interaction data is calculated based on the predetermined model and the determined network interaction parameters. The score is compared to a threshold. The information regarding the network interaction data is then forwarded based on the comparison of the score to the threshold. |
| US10193904B2 |
Data-driven semi-global alignment technique for masquerade detection in stand-alone and cloud computing systems
Systems and methods are provided for intrusion detection, specifically, identifying masquerade attacks in large scale, multiuser systems, which improves the scoring systems over conventional masquerade detection systems by adopting distinct alignment parameters for each user. For example, the use of DDSGA may result in a masquerade intrusion detection hit ratio of approximately 88.4% with a small false positive rate of approximately 1.7%. DDSGA may also improve the masquerade intrusion detection hit ratio by about 21.9% over convention masquerade detection techniques and lower the Maxion-Townsend cost by approximately 22.5%. It will also improve the computational overhead. |
| US10193900B2 |
Methods and apparatus to identify an internet protocol address blacklist boundary
Methods, apparatus, systems and articles of manufacture are disclosed to identify candidate boundaries of Internet protocol addresses associated with a malicious Internet protocol address. An example method includes collecting, with a processor, netflow data associated with the Internet protocol addresses within a netblock having a lower boundary Internet protocol address and an upper boundary Internet protocol address, generating, with the processor, a first window of Internet protocol addresses numerically lower than the malicious Internet protocol address, generating, with the processor, a second window of Internet protocol addresses numerically higher than the malicious Internet protocol address, for respective Internet protocol addresses in the first and second windows, calculating, with the processor, occurrence counts associated with behavior features, and identifying candidate boundaries within the netblock based on divergence values caused by the behavior features. |
| US10193892B2 |
Resource restriction
In one implementation, a data sharing system can comprise a trust engine to identify an environment that satisfies a level of trust, an access engine to request access to a set of data, a procedure engine to receive a procedure, a restriction engine to receive a restriction associated with a resource of the environment, a monitor engine to maintain resource utilization information, and a control engine to limit execution of the procedure based on the restriction and the resource utilization information. In another implementation, a method for sharing a set of data can comprise validating an environment satisfies a level of trust, receiving a restriction associated with a resource of the environment, receiving a procedure to access the set of data, ascertaining resource utilization information, and providing a view of the set of data based on the restriction and the resource utilization information. |
| US10193891B2 |
Device-to-device network location updates
An electronic device in a device-to-device network of a user of the electronic device communicates with a group of one or more other instances of the electronic via dynamic connections that are based on pre-established and maintained (i.e., long-lived) associations in the device-to-device network. Moreover, a given dynamic connection between the electronic device and a given instance of the electronic device in the group is setup by the electronic device without assistance of a computer in another network, which conveys the communication within the group. During operation, the electronic device: detects a change to a location of the electronic device in the other network; and communicates a message with the update to the location to a second user in the device-to-device network who is associated with a second instance of the electronic device in the group at a second location specified by one of the associations. |
| US10193890B2 |
Communication apparatus to manage whitelist information
A communication apparatus receives control information of first data and a plurality of types of header information of first data, the first data being received by a first data receiver; selects a parameter from the plurality of types of header information of the first data based on a priority of a first data receiver group to which the first data receiver belongs and a storage condition, the priority being indicated by priority information, the storage condition indicating the number of entries of a whitelist that can be stored in a whitelist storage first memory; and add, to the whitelist, an entry that includes control information of the first data and at least one parameter selected above. |
| US10193887B2 |
Network appliance
System, method, and device for providing services on a network. The device comprises a security assessor and a service provider unit. The security assessor is connected to the network and is configured to identify rights of an entity on the network. The service provider unit is connected to the network and the security assessor. The service provider unit comprises a discovery unit, an interaction unit, and an interest unit. The discovery unit identifies content available on the network. The interaction unit identifies interactions of the entity on the network. The interest unit identifies interests of the entity based on the identified interactions and the identified content. The service provider unit provides services to the entity on the network, based on the rights of the entity, and at least one of the identified content and the identified interests of the entity. |
| US10193884B1 |
Compliance and audit using biometric tokenization
Various embodiments relate to a method of auditing a biometric enrollment event journal entry, performed by a processor of an authentication computing system. An example method includes receiving a biometric enrollment event journal entry. The entry includes a tokenized biometric reference sample and a biometric reference template identifier. The tokenized biometric reference sample is generated by tokenizing at least one biometric reference sample captured from a user having a unique user identifier. The biometric reference template identifier uniquely identifies a biometric reference template generated using the at least one biometric reference sample. The tokenized biometric reference sample and biometric reference template associated with the biometric reference template identifier in the biometric enrollment event journal entry is retrieved. It is determined whether the detokenized biometric reference sample matches the biometric reference template. An enrollment match value indicative of whether the biometric reference sample matched the biometric reference template is generated. |
| US10193883B2 |
Systems and methods for product authentication
The present invention relates to both systems and methods for product authentication. Unique identifiers are associated with products. Said identifiers are captured through a camera of the client device and transmitted to authentication server; whereupon said authentication server authenticates the products by contacting an authentication database would manufacturer-provided authentication information. |
| US10193881B2 |
Method for controlling information terminal in cooperation with wearable terminal
A method is provided for controlling interaction among an information terminal, an electronic mail server, and a wearable terminal. The method causes an information terminal to receive electronic mail from an electronic mail server by using a mail application for executing transmission and reception of the electronic mail, the mail application being stored in a memory of the information terminal. The method also causes the information terminal to transfer the received electronic mail to a wearable terminal having a second display, and to receive viewing information from the wearable terminal, the viewing information indicating that the electronic mail was displayed on the second display. The method further causes the information terminal to determine whether the electronic mail is being displayed on the second display, and to automatically display, on the first display, a reply-mail creation screen for creating a reply mail to the electronic mail. |
| US10193879B1 |
Method and system for software application deployment
A method and system for deploying applications. The method includes deploying an application image of an application to a computing device, where the application is accessible using a first uniform resource locator (URL). The method also includes sending an application creation message to an authoritative domain name system (DNS) server to create a record mapping the first URL to a second URL. The first URL is in a first domain and the second URL is in a second domain. The method further includes providing, to the computing device, a digital certificate associated with the application. The method further includes generating certificate data using the digital certificate and sending, to a remote application server, the second URL and certificate data. A client software module may establish a connection to the application on the computing device using the second URL and the certificate data. |
| US10193877B2 |
On-premises agent for mobile cloud service
Systems, devices, and methods are disclosed for an agent device within a company's network firewall to initiate an HTTP connection with a cloud-based gateway and then upgrade the connection to a WebSockets protocol in order to have an interactive session. Over this interactive session, a mobile device, which connects to the cloud-based intermediary, can request data from servers inside the company's firewalls. Because the firewall is traversed using HTTP protocols (with WebSockets), it can be as safe as letting employees browse the web from inside the company's network. |
| US10193876B2 |
System and method for verifying user supplied items asserted about the user for searching
A system and method validates user supplied photographs and/or characteristics using a video, audio or series of images of the user responding to instructions, and uses such validation in searching and/or matching. |
| US10193874B2 |
Communication system
Provided is a communication system in which a terminal communicates with a server via a portable communication network used for communication between smartphones. The smart phone includes first pre-shared key and encryption keys, the terminal includes a second pre-shared key, the server includes the encryption keys same as the encryption keys included in the smartphone, authentication between the terminal and the smartphone is performed by using the first pre-shared key and the second pre-shared key, and the terminal and the server perform communication via the smartphone by performing key synchronization of the encryption keys while setting a hash value of the encryption keys as an ID. |
| US10193868B2 |
Safe security proxy
The system and method for protecting multiple networked enclaves each having one or more insecure machines. The system may include an attack detector as part of a secure node (e.g., SAFE node) proxy. The system may include an attack detector external to the proxy. The proxy may support multiple detectors and its actions may include isolating an insecure machine, cleansing an insecure machine, or tattling on (impugning the reputation of) an insecure machine. |
| US10193866B2 |
Private network peering in virtual network environments
Methods and apparatus for private network peering in virtual network environments in which peerings between virtual client private networks on a provider network may be established by clients via an API to a peering service. The peering service and API 104 may allow clients to dynamically establish and manage virtual network transit centers on the provider network at which virtual ports may be established and configured, virtual peerings between private networks may be requested and, if accepted, established, and routing information for the peerings may be specified and exchanged. Once a virtual peering between client private networks is established, packets may be exchanged between the respective client private networks via the peering over the network substrate according to the overlay network technology used by the provider network, for example an encapsulation protocol technology. |
| US10193857B2 |
Secure unrestricted network for innovation
The present disclosure relates to a system and method for transporting data within a dual network computing system including a first workstation communicably coupled to a first storage device, and a second workstation communicably coupled to a second storage device, wherein the first storage device cannot be accessed by the second workstation, and the second storage device cannot be accessed by the first workstation. The system and method further includes a data transport server communicably coupled to the first storage device and the second storage device, wherein the data transport server is configured to be in unidirectional communication with the first storage device and in unidirectional communication with the second storage device, the data transport server being configured to purge one or more data elements from data accessed from the first storage device and transport remaining data elements to the second storage device, and the second workstation is configured to access the remaining data elements from the second storage device. |
| US10193852B2 |
Canonical name (CNAME) handling for global server load balancing
Canonical name (CNAME) handling is performed in a system configured for global server load balancing (GSLB), which orders IP addresses into a list based on a set of performance metrics. When the GSLB switch receives a reply from an authoritative DNS server, the GSLB switch scans the reply for CNAME records. If a CNAME record is detected and it points to a host name configured for GSLB, then a GSLB algorithm is applied to the reply. This involves identifying the host name (pointed to by the CNAME record) in the reply and applying the metrics to the list of returned IP addresses corresponding to that host name, to reorder the list to place the “best” IP address at the top. If the CNAME record in the reply points to a host name that is not configured for GSLB, then the GSLB sends the reply unaltered to the inquiring client. |
| US10193849B2 |
Determining stories of interest based on quality of unconnected content
A system identifies unconnected content items of high quality and provides the unconnected content items for display to a user. The method comprises receiving several content items posted on pages of a social networking system. The system then determines a subset of those content items (e.g., high quality content items). A topic is then extracted from each of the subset of content items. The topic is mapped to one or more related pages of the social networking system that represent an expanded set of pages associated with the content item. For each of the related pages, a user is identified who is connected to the related page. Finally, the content item (e.g., a high quality content item) is provided to the user for display in the user's newsfeed. |
| US10193848B2 |
System and related method for management of devices of a network system via social media interfaces
A system and related method for the exchange of information, data and instructions between one or more network administrators and one or more network infrastructure devices via one or more media exchanges. Devices are managed using a social media agent including a session agent that translates media messages into network device content and vice versa while maintaining context. Particular media interfaces may be selected for messaging dependent upon the particular message to be exchanged. Shorthand may be used to facilitate messaging through media of interest. |
| US10193846B2 |
Method and system for reporting message disposition in a communication network
Methods, servers and mobile stations are provided to allow a sender mobile station which has transmitted a message toward a recipient mobile station via a first protocol to be notified that the message has been delivered to the recipient mobile station via a different protocol. The sender mobile station may be notified that the message was delivered to the recipient mobile station via a different protocol method via a disposition notification message comprising an indication that the message was delivered to the recipient mobile station via a different protocol. |
| US10193842B1 |
Workflow management and corresponding integrated notification processing platform
Customer orders and other service related events require multiple operations to fulfill and process. One example may include receiving a request message from a user device, identifying the request message as being a particular message type, pre-processing the request message to identify message content, and forwarding the identified message content to an active user interface. The request may be identified as a service request and processed by multiple entities prior to fulfilling the request(s). |
| US10193838B2 |
Conditional instant delivery of email messages
Technologies are described herein for providing delivery optimization of email messages. In particular, direct delivery system is provided for sending emails to allow for instant communication and collaboration. According to one aspect presented herein, a method is provided for instant or near instant delivery of a message. The method includes receiving the message from a client. Additionally, the method analyzes the message to determine if it meets one or more factors for taking a direct path. |
| US10193834B2 |
Method and apparatus for downloading and displaying pictures
A computer-implemented method for downloading and displaying pictures associated with instant messages is performed at a computing device. The computing device displays a list of instant messages on the screen, at least one of the instant messages having an associated picture and including address information of the picture. While the picture is being downloaded, the computing device detects a user instruction to slide the list of instant messages on the screen. In response to the user instruction, the computing device pauses the download of the picture and determines, among the list of instant messages, a second instant message having an associated second picture and including address information of the second picture based on the user instruction. The computing device then downloads the second picture associated with the second instant message according to the address information without receiving a download instruction from the user of the computing device. |
| US10193831B2 |
Device and method for packet processing with memories having different latencies
A packet processing system and method for processing data units are provided. A packet processing system includes a processor, first memory having a first latency, and second memory having a second latency that is higher than the first latency. A first portion of a queue for queuing data units utilized by the processor is disposed in the first memory, and a second portion of the queue is disposed in the second memory. A queue manager is configured to push new data units to the second portion of the queue and generate an indication linking a new data unit to an earlier-received data unit in the queue. The queue manager is configured to transfer one or more queued data units from the second portion of the queue to the first portion of the queue prior to popping the queued data unit from the queue, and to update the indication. |
| US10193830B2 |
Onboard communication network of a vehicle and subscriber of such a communication network
A subscriber of a deterministic Ethernet communication network using virtual links including a first receiver, a first transmitter, a first memory to record a configuration table relating to a set of virtual links that the subscriber can receive and/or retransmit. A processing unit is configured to implement at least one application, a reception function to receive data frames received by the first receiver, to accept the reception only of the frames corresponding to virtual links belonging to the set of virtual links and to transmit these frames to a sorting function to transmit the data frames received to the application and/or to a transmission function to dispatch the data frames received to the first transmitter while complying with Bandwidth Allocation Gap (BAG) constraints associated with the corresponding virtual links. |
| US10193828B2 |
Edge datapath using inter-process transports for control plane processes
A novel design of a gateway that handles traffic in and out of a network by using a datapath daemon is provided. The datapath daemon is a run-to-completion process that performs various data-plane packet-processing operations at the edge of the network. The datapath daemon dispatches packets to other processes or processing threads outside of the daemon. At least one of these other processes is a control plane process that consumes the packet. |
| US10193826B2 |
Shared mesh
A shared mesh comprises a mesh station. The mesh station is used to couple to at least a first core component and a second core component. The mesh station includes a logic unit. The mesh station is shared by at least the first core component and the second core component. A memory is coupled to the mesh station. |
| US10193823B2 |
Rich resource management incorporating usage statistics for fairness
A system includes a processor and memory to execute an application. The application receives feedback from a target regarding ability of a plurality of resources of the target to service requests from one or more clients. The feedback includes a metric indicative of a load of each of the resources. The application calculates weights for the resources based on the feedback. A weight for a resource is based on a product of a first term that determines a maximum difference in probabilities of selection between two resources and a second term including an exponent that is a difference between a current load of the resource and a current minimum load across the resources determined based on the feedback. The application selects, for servicing a request from one of the clients, one of the resources in round robin manner based on the weights to evenly utilize the plurality of resources. |
| US10193821B1 |
Analyzing resource placement fragmentation for capacity planning
A distributed system may implement analyzing resource placement fragmentation for capacity planning Capacity planning may determine when, where, and how much capacity to implement for a distributed system that hosts resources. Placement constraints for resources may, over time, create fragmentation or stranded capacity which is available yet unusable to host new resources. Analyzing capacity fragmentation across a distributed system may allow a determination of available capacity that is actually available to host additional resources. In some embodiments, future resource placements may be estimated in order to perform capacity fragmentation analysis to determine available capacity. |
| US10193819B2 |
Adaptive throttling for shared resources
Customers of shared resources in a multi-tenant environment can have token buckets allocated that have an associated depth and fill rate, with each token enabling the customer to obtain an amount of work from a shared resource. A resource management system can monitor one or more system or output metrics, and can adjust a global fill rate based at least in part upon values of the monitored metrics. Such an approach can provide a fair distribution of work among the customers, while ensuring that the metrics stay within acceptable ranges and there are no drastic changes in performance levels of the system. The fill rate can update dynamically with changes in the monitored parameters, such that the system can float near an equilibrium point. Commitments for specific minimum service levels also can be met. |
| US10193817B2 |
Method, and network system
A method includes: recording information on a transmission source and a transmission destination in a received packet into first information; generating a copied packet by copying the received packet, the information of which is recorded in the first information, the first information being to be referred to when whether to generate a copied packet is determined based on a received packet; transmitting the generated copied packet to an analyzer device; receiving the copied packet; when it is determined that a predetermined condition is satisfied for the copied packet, transmitting instruction information for the copied packet to a first relay device among relay devices being a transmission source of the copied packet; and in response to reception of the instruction information, deleting, from the first information, the information on the transmission source and the transmission destination of the received packet used in the copying. |
| US10193815B2 |
Mobile network handling of unattended traffic
A method in a system function capable of differently handling unattended data traffic as compared to attended data traffic. By using a dedicated policy on how to handle unattended data traffic, detected unattended data traffic is handled according to the dedicated policy. A communication device, a radio network node and a network node capable of differently handling unattended data traffic as compared to attended data traffic are provided for enforcing a policy to comply with requirements in 3GPP TS 22.101 regarding handling of unattended traffic at user plane congestion. Further embodiments provide for enforcing policies even in an uncongested state. |
| US10193811B1 |
Flow distribution using telemetry and machine learning techniques
A device may receive, from a set of network devices, telemetry information associated with a first set of flows. The device may process, using a machine learning technique, the telemetry information to determine information that permits the set of network devices to identify a set of expected bandwidth values associated with a second set of flows. The device may provide, to a network device of the set of network devices, at least a portion of the information, that permits the set of network devices to identify the set of expected bandwidth values associated with the second set of flows, to permit the network device to determine an expected bandwidth value associated with a flow of the second set of flows and select a link to use when providing network traffic associated with the flow based on the expected bandwidth value. |
| US10193810B2 |
Congestion-aware load balancing
Certain embodiments presented herein relate to load balancing of data transmissions among a plurality of paths between endpoints (EPs) coupled to virtual switches. In particular, between the virtual switches there may be a number of physical paths for the data to be communicated between the EPs. Each path may have a different congestion level. Certain embodiments relate to selecting a path of the plurality of paths between EPs to communicate data between the EPs based on the congestion levels associated with each of the plurality of paths. In certain embodiments, a virtual switch determines a congestion level of each of the plurality of paths, selects a path of the plurality of paths based on the determined congestion level, and sets source port information of network packets to correspond to the selected path so that the network packets are communicated along the selected path. |
| US10193809B1 |
Load balancing methods based on transport layer port numbers for a network switch
In one embodiment, a network element that performs network traffic bridging receives load balancing criteria comprising an indication of at least one transport layer port number and an indication of a plurality of network nodes. A plurality of forwarding entries are created based on the load balancing criteria. A forwarding entry specifies the at least one transport layer port number and a network node of the plurality of network nodes. The network element applies the plurality of forwarding entries to network traffic to load balance, among the plurality of network nodes, network traffic that matches the at least one transport layer port number. |
| US10193807B1 |
Penalty-box policers for network device control plane protection
In general, techniques are described for dynamically controlling host-bound traffic by dynamically adding and updating, within the forwarding plane of a network device, network packet policers that each constrains, for one or more packet flows, an amount of host-bound traffic of the packet flows permitted to reach the control plane in accordance with available resources. In one example, a control plane of the network device detects internal congestion in the communication path from the forwarding plane to control plane (the “host-bound path”), identifies packet flows utilizing an excessive amount of host-bound path resources, computes limits for the identified packet flows, and adds “penalty-box policers” configured with the computed limits for the identified packet flows to the forwarding plane. The forwarding plane subsequently applies the policers to the identified packet flows to constrain the amount of traffic of the packet flows allowed to reach the control plane to the computed limits. |
| US10193801B2 |
Automatic traffic mapping for multi-protocol label switching networks
In general, techniques are described for automated traffic mapping for multi-protocol label switching (MPLS) networks. A network device comprising a processor and an interface card may perform the techniques. The processor may generate an advertisement that conforms to a routing protocol. The advertisement may advertise a mapping between a network flow and a label switched path (LSP) tag. The processor may also generate a communication associating the label switched path tag with an LSP. The interface card may transmit the advertisement to a head-end label edge router that admits traffic into the LSP identified by the LSP tag. The interface card may also transmit the communication to the label edge router such that the label edge router is able to process the communication in conjunction with the advertisement to map the network flow to the LSP identified by the LSP tag. |
| US10193800B2 |
Service label routing in a network
Aspects of the present disclosure involve systems, methods, computer program products, and the like, for implementing and utilizing one or more service labels in a Multiprotocol Label Switching (MPLS) network for delivery service through the network. The general, the service label acts to instantiate a service tunnel between two or more devices of the network, such as between a service or provider edge device and a metro device of the network. The service label is unique and arbitrary label per service to a network device. Once the service tunnel is established between the devices, one or more Internet Protocol (IP) or Ethernet services can be multiplex over the service tunnel to the network device. Also, one or more service labels (tunnels) can be established between any two or more network devices to allow for greater flexibility and scale. |
| US10193798B2 |
Methods and modules for managing packets in a software defined network
Methods, an uplink module (130), downlink module (160), an entry module (170) and a management module (147) for managing packets in a communication system (100) based on Software Defined Networking are disclosed. A data plane of the communication system (100) comprises a forwarding module (140), a service module (145) and the entry module (170) and a control plane of the communication system (100) comprises the management module (147). The entry module (170) receives (8) an Internet Protocol “IP” packet from the peer device (180), wherein the IP packet includes a destination IP address associated with the mobile device (120). The entry module (170) obtains (9), from the management module (147), a location value specifying the radio network node (110) associated with the destination IP address. The entry module (170) associates (10) the location value with the IP packet, wherein the location value is related to a location tag name, indicating the radio network node (110) that serves the mobile device (120), thereby obtaining a packet. The entry module (170) sends (11) the packet, via the forwarding module (140), towards the radio network node (110) as indicated by the location value of the location tag name. Corresponding computer programs and carriers therefor are also disclosed. |
| US10193794B2 |
Multiparty call method and apparatus
A multiparty call method and an apparatus. A transmit end acquires communications data to be transmitted to at least two receive ends and identifiers of the at least two receive ends. The transmit end sends the communications data and the identifiers of the at least two receive ends to a network side device. The network side device forwards the communications data to the receive ends that correspond to the identifiers of the at least two receive ends. |
| US10193789B2 |
Handling port identifier overflow in spanning tree protocol
Techniques for handling port identifier overflow when implementing Spanning Tree Protocol (STP) in a networking system are provided. According to one embodiment, a network device can receive a spanning tree protocol (STP) bridge protocol data unit (BPDU) and can extract a port identifier value from the BPDU. The network device can then determine a port number component of the port identifier value by decoding the least significant fourteen bits of the port identifier value and can determine a port priority component of the port identifier value by decoding the most significant two bits of the port identifier value. |
| US10193788B2 |
Systems and methods implementing an autonomous network architecture and protocol
A network having a nodal architecture consisting of a child/parent familial structure formed by a parenting process which creates a structure relative to each node, with descendants below, siblings beside, and a parent above. In this network, a one-to-many relationship exists from the perspective of an entity that is an ancestor to multiple descendants. Thus, a parent may have many children, who each may have multiple children themselves, but each node will only have one parent. Data packets are routed to destination nodes by propagating from one node to the next via the tree structure. |
| US10193783B2 |
System for aggregating statistics associated with interfaces
Some embodiments provide a statistics collection framework that is used to aggregate statistic for interfaces such as logical ports and logical port pairs. Flows that are related with these interfaces are tagged with the identifier of the logical entities for which statistics are being collected. The interface statistics is periodically sent in the background to a statistics aggregator. The read queries for the interface statistics are directed to the statistics aggregator. The statistics aggregator, therefore, acts as a cumulative cache for the interface statistics. |
| US10193780B2 |
System and method for anomaly root cause analysis
A method includes receiving an anomaly data point and comparing the anomaly data point to a magnitude bounding box to produce a first comparison. The method also includes comparing the anomaly data point to a principal component analysis (PCA) bounding box to produce a second comparison and classifying the anomaly data point in accordance with the first comparison and the second comparison to produce a classification. |
| US10193778B2 |
System, method and program for detecting anomalous events in a network
A communication device detects whether anomalous events occur with respect to at least one node in a utility network. The communication device has recorded therein threshold operating information and situational operating information. The threshold operating information includes data indicative of configured acceptable operating parameters of nodes in the network based on respective locational information of the nodes. The situational information includes data indicative of configured operation data expected to be received from nodes in the network during a predetermined time period, based on a condition and/or event occurring during the time period. The communication device receives operation data from nodes in the network, and determines whether the operation data from a node constitutes an anomalous event based on a comparison of the received operation data with (i) the threshold operating information defined for the node and (ii) the situational information. The communication device outputs notification of any determined anomalous event. |
| US10193775B2 |
Automatic event group action interface
An automatic service monitor in an information technology environment is equipped to automatically identify and group recognized events based on user-defined criteria, and to automatically perform user-defined operations against the group and its members at the detection of user-specified conditions. A related user interface is taught. |
| US10193773B2 |
Methods, systems, and computer readable media for distributed network packet statistics collection in a test environment
A method for distributed network packet statistics collection includes instantiating first and second operations that implement different portions of a network packet statistics collection task on processing nodes implemented on different processors in a network packet statistics collection system. The method includes utilizing an auto-discovery mechanism for the second operation to subscribe to a set of capabilities and identify the first operation as a matching operation. The method further includes establishing a channel between the first and second operations. The method further includes executing the network packet statistics collection task, where the first and second operations perform the different portions of the network packet statistics collection task. |
| US10193766B2 |
Dynamic changing tier service on test device
A test device is located within a broadband communications network. The test device is interconnected with a policy enforcement point of the broadband communications network. Responsive to commencement of a test to be conducted with the test device, the policy enforcement point is signaled, from a policy server of the broadband communications network, so as to set a bandwidth tier for the test to be conducted with the test device. The test is conducted with the test device in accordance with the bandwidth tier. One or more additional tests can be conducted for additional, different, bandwidth tier(s). Related methods, systems, apparatuses, and computer program products are also disclosed. |
| US10193762B2 |
Dynamic optimization of simulation resources
The present invention dynamically optimizes computing resources allocated to a simulation task while it is running. It satisfies application-imposed constraints and enables the simulation application performing the simulation task to resolve inter-instance (including inter-server) dependencies inherent in executing the simulation task in a parallel processing or other HPC environment. An intermediary server platform, between the user of the simulation task and the hardware providers on which the simulation task is executed, includes a cluster service that provisions computing resources on hardware provider platforms, an application service that configures the simulation application in accordance with application-imposed constraints, an application monitoring service that monitors execution of the simulation task for computing resource change indicators (including computing resource utilization and application-specific information extracted from output files generated by the simulation application) as well as restart files, and a computing resource evaluation engine that determines when a change in computing resources is warranted. |
| US10193760B2 |
Hybrid SDN controller
One embodiment provides a network interface controller. The network interface controller includes a portion of a hybrid software-defined networking (“SDN”) controller, the portion of the hybrid SDN controller including a service abstraction layer module (“SAL”) and a southbound application programming interface (“SB API”), the SAL including a representation of a physical network. |
| US10193758B2 |
Communication via a connection management message that uses an attribute having information on queue pair objects of a proxy node in a switchless network
A connection management message that uses a proxy attribute is received, wherein the connection management message includes information on a first proxy queue pair and a second proxy queue pair, wherein the first proxy queue pair provides communication between a proxy node and an initiator node in a switchless network, and wherein the second proxy queue pair provides communication between the proxy node and a target node in the switchless network. The connection management message that uses the proxy attribute, channels datagrams received from the initiator node to the target node in the switchless network. |
| US10193757B2 |
Network topology system and method
A network topology system comprises a plurality of nodes, each of the plurality of nodes having a set of connection rules which is built by the steps of: generating a series of prime number differences; generating a series of communication strategy numbers; extracting as many terms as the number of connecting nodes from a recursive sequences to serve as an index series; generating a series of connection strategy numbers by extracting the Nth terms from the series of communication strategy numbers, wherein N stands for each number of the index series; and generating a series of connecting nodes numbers by calculating the sum of each odd number and each term of the series of connection strategy numbers so as to build the connection rules for each odd-numbered node to connect the nodes numbered in corresponding with the numbers of the connecting nodes number series. |
| US10193753B1 |
Automated configuration and deployment of internet of things platforms
An apparatus comprises an Internet of Things (IoT) platform configuration and deployment system accessible to a plurality of user devices over at least one network. The IoT platform configuration and deployment system comprises a configuration and deployment controller, and a multi-tiered adaptive service catalog associated with the controller. The configuration and deployment controller is configured to receive requirements input for respective ones of a plurality of requested IoT platforms from one or more of the user devices and to determine corresponding sets of resources for implementation of the respective IoT platforms based at least in part on one or more services selected from the multi-tiered adaptive service catalog. The IoT platforms are deployed utilizing the respective sets of resources determined by the configuration and deployment controller. Each of the deployed IoT platforms is illustratively configured to interact with a different set of IoT devices. |
| US10193750B2 |
Managing virtual port channel switch peers from software-defined network controller
Systems, methods, and computer-readable storage media for configuring a virtual port channel (VPC) domain. The disclosed technology involves determining that a first switch and a second switch are connected in a VPC domain, determining that the first switch is in a primary role, and determining a unique identifier for the first switch, a VPC portchannel number for the first switch, and an orphan port number for the first switch. Also, the first switch receives a unique identifier, a VPC portchannel number, and an orphan port number for the second switch. The first switch can associate the VPC portchannel number for the second switch and the VPC portchannel number for the first switch with a unified VPC portchannel number and create a first unique orphan port number for the first switch and a second unique orphan port number for the second switch. |
| US10193749B2 |
Managed forwarding element executing in public cloud data compute node without overlay network
Some embodiments provide a method for a network controller that manages a logical network implemented in a datacenter having forwarding elements to which the network controller does not have access. The method identifies a data compute node (DCN), that operates on a host machine in the datacenter, to attach to the logical network. The DCN has a network interface with a network address provided by a management system of the datacenter. The DCN executes (i) a workload application and (ii) a managed forwarding element (MFE). The method distributes configuration data for configuring the MFE to receive data packets sent from the workload application on the DCN and perform network security processing on the data packets without performing logical forwarding operations. The data packets sent by the workload application have the provided network address as a source address when received by the MFE and are not encapsulated by the MFE. |
| US10193747B2 |
Fault detection method and device
The present disclosure discloses a fault detection method and device. The method includes: receiving, by a terminal device, a fault detection instruction entered by a user, and determining a service type of a to-be-detected fault according to the fault detection instruction; determining fault detection content according to the service type; starting to detect the fault detection content to obtain a detection result; and presenting the detection result. In this way, whether in a period of deploying or in a period of using the terminal device, the fault detection instruction is directly triggered when there is a need to determine whether the terminal device is faulty, and then the fault detection content corresponding to the service type of the to-be-detected fault is detected, which effectively implements a self-detection capability of the terminal device, increases a fault locating speed, and improves fault detection accuracy. |
| US10193744B1 |
Mass restoration of enterprise business services following service disruption
Techniques are disclosed for restoring application services following a service disruption to a computer network. A faster service restoration (FSR) engine identifies one or more services hosting at least one of the services. The FSR engine identifies dependencies between the service and other application services. The FSR engine generates a run list comprising one or more healing scripts for restoring the services in one or more successive phases. Each successive phase is determined based on the dependencies. Each healing script is associated with one of the services and includes instructions for starting, stopping, and restarting the service. The run list is invoked on each of the servers to restore the application. |
| US10193740B1 |
Method and apparatus for notification control
Modern mobile communication devices have a number of features that enable the users to stay connected with people, stay informed about various local and global events. While these features are useful, they can be intrusive or may cause distraction under some conditions. To reduce the disturbance and intrusion, the various notifications that inform the user about the new events on the mobile device may be temporarily disabled. However, the event notifications must be explicitly re-enabled by the user when it is acceptable to receive the notifications. The user may forget to re-enable the event notification which may lead to missed calls, missed event notifications, etc. A method and apparatus are disclosed that disable and enable the event notifications on the mobile device adaptively depending on the user's location and time to reduce the intrusiveness of the mobile device notification when not required while reducing any missed event notifications. |
| US10193739B2 |
Communication device
Provided is a communication device that includes a plurality of ports, through which a frame is transmitted and received, and that forms a network together with at least one adjacent device connected via at least one port among the plurality of ports. The communication device includes an information acquisition unit that acquires information on the at least one adjacent device; a setting execution unit that executes, upon receipt of a setting command specified in advance, a setting processing for changing a setting of the communication device in accordance with the setting command; and a propagation execution unit that executes a propagation processing for transferring the setting command to the at least one adjacent device. |
| US10193737B2 |
Method for performing communication between browser and mobile terminal, and browser apparatus
A method for performing communication between a browser and a mobile terminal, and a browser apparatus. The method comprises: at a browser side, triggering a read request for reading storage data information or device information in a mobile terminal bound to the browser; starting a page process to load a preset page, the page process notifying a first process of the browser to establish a data communication channel with the mobile terminal; after the data communication channel is established, the page process notifying the first process of the browser to request the mobile terminal for the storage data information or the device information in the mobile terminal; and the page process acquiring the storage data information or the device information in the mobile terminal transmitted by the first process of the browser, and loading and displaying the storage data information or the device information on the preset page. |
| US10193732B2 |
Apparatus and method for sending and receiving broadcast signals
A broadcast signal receiver includes a tuner for tuning a broadcast signal, a reference signal detector for detecting pilots from the tuned broadcast signal, a de-framer for de-framing a signal frame of the broadcast signal and deriving service data based on a number of carriers of the signal frame, and a decoder for performing error correction process on the derived service data. |
| US10193727B1 |
Selective muting of transmission of reference signals to reduce interference in a wireless network
Disclosed is a method and system for selectively muting default downlink transmission of particular reference signals in order to reduce interference experienced by user equipment devices (UEs) receiving user data. In scheduling transmission of a downlink resource block (RB), a base station may select a particular transmission mode (TM) that does not require transmission of the particular reference signal. The base station may also determine that no condition exists that requires default transmission of the particular reference signal during a time interval allocated for transmission of the RB and on sub-carrier frequencies allocated to the RB. With particular TM selected and the absence of other requirements for default transmission of the particular reference signal, the base station can then mute transmission of the particular reference signal during transmission of the downlink RB. The base station may also coordinate scheduling with a neighboring base station to achieve further interference reduction. |
| US10193725B2 |
Apparatus and method for sending and receiving broadcast signals
A broadcast signal transmitter includes a Forward Error Correction (FEC) encoder configured to perform error correction processing on PLP data; a time interleaver configured to perform time-interleaving on the PLP data; a framer configured to generate a signal frame comprising the PLP data; a frequency interleaver configured to perform frequency-interleaving on the signal frame; and a waveform generator configured to generate a transmission signal comprising the signal frame, wherein the signal frame comprises a preamble, and at least one subframe, wherein the preamble comprises at least one preamble symbol, the at least preamble symbol carries Layer 1 (L1) signaling data for the signal frame, and wherein the first preamble symbol comprises preamble_symbol_number information, and the preamble_symbol_number information indicates a number of preamble symbols other than the first preamble symbol. |
| US10193722B2 |
Holevo capacity achieving joint detection receiver
An optical receiver may include a unitary transformation operator to receive an n-symbol optical codeword associated with a codebook, and to perform a unitary transformation on the received optical codeword to generate a transformed optical codeword, where the unitary transformation is based on the codebook. The optical receiver may further include n optical detectors, where a particular one of the n optical detectors is to detect a particular optical symbol of the transformed optical codeword, and to determine whether the particular optical symbol corresponds to a first optical symbol or a second optical symbol. The optical receiver may also include a decoder to construct a codeword based on the determinations, and to decode the constructed codeword into a message using the codebook. The optical receiver may attain superadditive capacity, and, with an optimal code, may attain the Holevo limit to reliable communication data rates. |
| US10193718B2 |
Method for data modulation in wireless communication system and apparatus for the same
A data modulation apparatus may comprise a S2D conversion part including a first amplifier operating based on a carrier wave signal and two transformers receiving an output signal of the first amplifier; a first switch part transferring status of input data to the first amplifier based on the input data; a differential amplification part receiving output signals of the S2D conversion part and amplifying the output signals of the S2D conversion part; a D2S conversion part receiving output signals of the differential amplification part and performing modulation on the output signals by converting the output signals to a single signal; and a second switch part transferring the output signals of the differential amplification part to the D2S conversion part based on the input data. Here, the first switch part and the second switch part may be alternately turned on and off. |
| US10193717B2 |
Semiconductor device
A semiconductor device of an embodiment includes first and second couplers, an encoding circuit, and a demodulating circuit. The encoding circuit executes differential Manchester encoding on digital data based on a clock inputted thereto via the first coupler and outputs an encoded data. The demodulating circuit includes a first sampling circuit which samples the encoded data inputted via the second coupler based on a sampling frequency set to be two times higher than that of the encoded data and which outputs first sample data, a second sampling circuit which samples the encoded data at a timing earlier than that in the first sampling circuit and which outputs second sample data, a determination circuit which determines whether or not the first and the second sample data match each other, and a selection circuit which selects first phase data or second phase data from the first sample data. |
| US10193714B2 |
Continuous time pre-cursor and post-cursor compensation circuits
To improve on power and bandwidth limitations associated with conventional feedforward equalizer (FFE) implementations, the present disclosure provides intersymbol interference (ISI) compensation circuits that do not use delay cells common to FFE structures. In one example, the compensation circuit of the present disclosure comprises a two stage amplifier. Each stage of the amplifier is implemented using a differential pair with degeneration. One of the amplifier stages has a transfer function with a zero in the left half of the s-domain, also called the s-plane, and the other amplifier has a transfer function with a zero in the right half of the s-domain. The amplifier stage with the zero in the left half of the s-domain can be used to provide post-cursor ISI compensation, and the amplifier stage with the zero in the right half of the s-domain can be used to provide pre-cursor ISI compensation. |
| US10193712B2 |
Mobile terminal device and method for processing signals
A method for processing a receive radio signal is provided. The method may include receiving in a mobile device a receive radio signal, equalizing the receive radio signal using a first equalizer to generate a first equalized receive radio signal, equalizing the receive radio signal using a second equalizer to generate a second equalized receive radio signal, re-synthesizing a transmit signal from the second equalized receive radio signal, calculating a subtraction signal based on the re-synthesized transmit signal, and subtracting the subtraction signal from the equalized receive radio signal. |
| US10193700B2 |
Trust-zone-based end-to-end security
Methods, electronic devices, and systems for exchanging encrypted information. A method for exchanging encrypted information by an electronic device includes generating one or more device certificates and one or more device public private key pairs. The one or more device certificates are signed using a device unique private key that is pre-stored on the electronic device. The method also includes sending the one or more device certificates to a server of a token service provider (TSP). The method further includes receiving one or more TSP certificates from the TSP server. The method includes identifying one or more TSP public keys of the TSP server based on the one or more received TSP certificates. Additionally, the method includes transmitting a message including the information encrypted based on the one or more identified TSP public keys and a signature of the electronic device. |
| US10193694B1 |
Method and apparatus for securely configuring parameters of a system-on-a-chip (SOC)
Embodiments include a method comprising: receiving, by a system-on-a-chip (SOC) from a host, a public key of a public/private key pair; generating a first hash value of the public key; authenticating the first hash value; in response to authenticating the first hash value, transmitting, by the SOC, a first nonce to the host; receiving a signed nonce from the host, the signed nonce being signed using a private key of the public/private key pair; decrypting, using the received public key, the signed nonce to generate a second nonce; based on the first nonce and the second nonce, authenticating the host; in response to authenticating the host, receiving, from the host, a command to configure one or more parameters of the SOC; and configuring the one or more parameters of the SOC. |
| US10193688B2 |
Flexible Ethernet encryption systems and methods
Systems and methods for Physical Coding Sublayer (PCS) encryption implemented by a first network element communicatively coupled to a second network element include utilizing an encryption messaging channel to establish an authenticated session and exchanging one or more encryption keys with a second network element; encrypting a signal, based on the one or more encryption keys; and transmitting the encrypted signal to the second network element. |
| US10193687B2 |
Method for acquiring synchronization, and PHY transmitter and PHY receiver for cable network
Disclosed are a method for acquiring synchronization in a cable network, and a physical (PHY) transmitter and PHY receiver. The method for acquiring synchronization in a cable network according to an embodiment includes receiving, by a PHY receiver, a signal from a PHY transmitter, and acquiring, by the PHY receiver, channel synchronization when a symbol in which a channel preamble exists is detected from the received signal and a position of a frequency in which a channel subcarrier exists is detected from the detected symbol by performing a cross correlation operation on the received signal and the channel preamble. |
| US10193686B2 |
Trim for dual-port frequency modulation
Various methods provide for trimming the gain in a dual-port phase-locked loop (PLL) of a radio transceiver. Use is made of the radio's demodulator to perform modulation accuracy measurements, thereby reducing the cost and complexity of external test equipment. |
| US10193684B2 |
Method and apparatus for signal processing
The present embodiments relate to the field of communications, and discloses a signal processing method and apparatus, which can implement self-interference cancellation when in-phase quadrature (IQ) imbalance exists in a communications system. An embodiment is acquiring, a digital baseband reference signal, a self-interference reference signal, and a frequency-domain baseband signal. The method also includes obtaining, according to the digital baseband reference signal, a basic reference signal and an image reference signal that are image to each other and estimating an estimated value of a first comprehensive response and an estimated value of a second comprehensive response according to the basic reference signal, the image reference signal, and the self-interference reference signal. Additionally, the method includes calculating a self-interference signal according to the estimated value of the first comprehensive response, the estimated value of the second comprehensive response, the basic reference signal, and the image reference signal, so as to perform self-interference cancellation on the frequency-domain baseband signal. |
| US10193683B2 |
Methods and devices for self-interference cancelation
A communication circuit arrangement includes a signal path circuit configured to separately apply a kernel dimension filter and a delay tap dimension filter to an input signal for an amplifier to obtain an estimated interference signal, a cancelation circuit configured to subtract the estimated interference signal from a received signal to obtain a clean signal, and a filter update circuit configured to alternate between updating the kernel dimension filter and the delay tap dimension filter using the clean signal. |
| US10193680B2 |
Apparatus and method for estimating channel
A method for transmitting a reference signal includes selecting one of a first initialization value and a second initialization value, generating selection instruction information corresponding to the selected initialization value, transmitting the selection instruction information to a mobile station, generating a reference signal based on the selected initialization value, and transmitting the generated reference signal to the mobile station. A method for estimating a channel includes receiving selection instruction information indicating a selection of at least one of a first initialization value and a second initialization value, receiving a first reference signal based on the selection instruction information, generating a second reference signal based on an initialization value indicated as being selected by the selection instruction information, and estimating a channel state by comparing the first reference signal with the second reference signal. |
| US10193679B2 |
Reference signal reception and CQI computation method and wireless communication apparatus
A wireless communication base station apparatus which is able to prevent deterioration in the throughput of LTE terminals even when LTE terminals and LTE+ terminals coexist. In this apparatus, based on the mapping pattern of the reference signals used only in LTE+ terminals, a setting unit sets, in each subframe, the resource block groups where the reference signals used only by the LTE+ terminals are mapped. For symbols mapped to the antennas, an mapping unit maps, to all the resource blocks within one frame, cell specific reference signals used for both LTE terminals and LTE+ terminals. For the symbols mapped to the antennas, the mapping unit maps, to the plurality of resource blocks, of which part of the resource block groups is comprised, in the same subframe within one frame, the cell specific reference signals used only for LTE+ terminals, based on the setting results inputted from the setting unit. |
| US10193678B2 |
Muting schemes for channel state information reference signal and signaling thereof
A method of wireless communication is provided which includes establishing a time-frequency muting pattern including at least one data resource element (RE) and transmitting information indicating the time-frequency muting pattern to a user equipment. In some designs, the muting pattern is established by grouping a plurality of resource elements into muting groups such that the time-frequency muting pattern includes the muting groups. |
| US10193677B2 |
Method for receiving downlink signal by means of unlicensed band in wireless communication system and device for same
Disclosed is a method for receiving a downlink signal by a terminal in a wireless communication system from a base station. More particularly, a method for receiving a downlink signal comprises receiving, from a base station, information about a second reference signal being quasi co-located (QCL) and a first reference signal for demodulating a downlink signal; determining the quasi-continuity of the second reference signal on the basis of the average density of the second reference signal, which exists in a window, for determining a quasi-continuity; and receiving the downlink signal from the base station on the basis of the existence of the quasi-continuity of the second reference signal. |
| US10193675B2 |
Method and device for notifying reference signal configuration information
A method and a device for notifying reference signal configuration information are disclosed. Channel state information-reference signal (CSI-RS) configuration information is coded, to obtain a CSI-RS configuration information code. A mapping relation between the CSI-RS configuration information code and the CSI-RS configuration information is stored. A CSI-RS configuration information code corresponding to CSI-RS configuration information to be notified is searched in the stored mapping relation between the CSI-RS configuration information code and the CSI-RS configuration information. The searched CSI-RS configuration information code is sent to a user equipment (UE), so that the UE determines CSI-RS configuration information according to the received CSI-RS configuration information code and the mapping relation between the CSI-RS configuration information code and the CSI-RS configuration information. |
| US10193671B2 |
System and method for transmission symbol arrangement for reducing mutual interference
A method for operating a first device includes determining a spreading pattern associated with the first device, placing a pilot signal associated with the first device into resources of a first transmission symbol in accordance with the spreading pattern, and transmitting the first transmission symbol to a second device. |
| US10193670B2 |
Methods and systems for communication
One embodiment relates to a communication system. The communication system includes a central node that is coupled to a communication channel and configured to individually communicate with a number of network nodes over a frequency range. One of the network nodes can identify a common frequency band that is within the frequency range and on which the central node and network nodes can transmit a signal. Other methods and systems are also disclosed. |
| US10193668B2 |
ENodeB-based communication method and communication system
An eNodeB-based communication method and communication system include dividing a plurality of eNodeBs into at least one eNodeB cluster; when a terminal is moving within any particular eNodeB cluster of the at least one eNodeB cluster, the terminal obtains identification information of the particular eNodeB cluster, and determines an eNodeB associated with the terminal from among the particular eNodeB cluster; and a specified eNodeB of the particular eNodeB cluster schedules the eNodeB associated with the terminal to provide communication services for the terminal. |
| US10193665B2 |
Reference signal for 3D MIMO in wireless communication systems
A user equipment device obtains a first measurement using a first CSI-RS sub-resource and a second measurement using a second CSI-RS sub-resource. The user device derives a single CSI-process based on the first and the second measurements and reports the CSI-process to a base station. The user device receives a message from the base station configuring the first and second CSI-RS sub-resources corresponding to the single CSI-process to be reported by the user device. The message from the base station comprises a configuration of the first CSI-RS sub-resource and a separate configuration of the second CSI-RS sub-resource. The configuration of each CSI-RS sub-resource comprises, for the corresponding CSI-RS sub-resource, at least a CSI-RS sub-resource index, a periodicity, and an offset. The user device may alternatively obtain measurements using any number of CSI-RS sub-resources and then derive and report a single CSI-process based on the plurality of measurements. |
| US10193663B2 |
Method and apparatus for determining number of HARQ processes in wireless communication system
Provided are a method for determining the number of hybrid automatic repeat request (HARQ) processes in a carrier aggregated system configured with a plurality of serving cells, and an apparatus using such a method. The method receives data from a downlink subframe of a second serving cell, and transmits an ACK/NACK signal for the data from an uplink subframe of a first serving cell, wherein the first serving cell uses a first-type frame, the second serving cell uses a second-type frame, and the number of HARQ processes in the second serving cell are determined with respect to each subframe comprised in the second-type frame and on the basis of the number of downlink subframes comprised in each section comprising a set number of subframes. |
| US10193662B2 |
Router, terminal, and congestion control method for router and terminal
A congestion control method includes determining whether congestion occurs by monitoring a network, receiving an interest packet including a name of content data that is requested to be sent, generating a first NACK packet indicating an occurrence of congestion if it is determined that the congestion occurs when the interest packet is received, and sending the generated first NACK packet to the network. In the generating of the first NACK packet, if first alternative content data which is an alternative of the content data corresponding to a name included in the received interest packet is stored in a cache of the router, information regarding the first alternative content data is set in the first NACK packet. At least one of the determining whether the congestion occurs, the receiving the interest packet, the generating the NACK packet, and the sending the NACK packet is performed by a processor of the router. |
| US10193659B2 |
Wireless receiver
The present invention relates to a method and apparatus for channel estimation between a transmitter and a receiver in a wireless communications system. In one arrangement, the method comprises: receiving at the receiver a first sequence of bits representing a first sequence of coded symbols transmitted over the communications channel; decoding the first sequence of coded symbols using maximum-likelihood based decoding including: generating traceback outcomes by tracing backwards the first sequence of bits through a maximum-likelihood based traceback path, the traceback outcomes including a first portion associated with a first traceback depth and a second portion associated with a second traceback depth that is deeper than the first traceback depth; generating a channel estimate of the communications channel based on the first portion of the traceback outcomes; and generating an estimate of at least some information bits coded in the first sequence of coded symbols based on the second portion of the traceback outcomes. |
| US10193655B2 |
Method and apparatus for scheduling multimedia streams over a wireless broadcast channel
A method of broadcasting data is disclosed. A plurality of broadcast data streams are received and divided into a plurality of frames. Each frame includes data from only one of the broadcast data streams. The frames can then be broadcast wirelessly. |
| US10193653B2 |
Polarization multiplexing optical transmission circuit and polarization multiplexing optical transmission and reception circuit
A one chip-integrated digital coherent polarization multiplexing optical transmission and reception circuit with optimal optical power distribution between sending and receiving is provided by using an optical power splitter having a branching ratio of a lower asymmetry property so that the unbalanced loss depending on the polarization path can be compensated. A polarization multiplexing optical transmission and reception circuit includes a polarization multiplexing optical transmission circuit, including: the first optical power splitter for branching the optical power of continuous light outputted from a light source; one polarization optical modulation circuit at the side of a path having a higher loss connected to one output of the first optical power splitter; the second optical power splitter connected to the other output of the first optical power splitter; and the other polarization optical modulation circuit connected to one output of the second optical power splitter. |
| US10193650B2 |
Automated, dynamic minimization of inter-cell site interference in CDMA networks
Methods and apparatus for allocating scrambling codes to cells of a wireless network. In an example method, current scrambling code allocation information for a plurality of cells and network configuration information for a radio access network are received (310). A reallocation of scrambling codes to the plurality of cells is computed (320), based on the current scrambling code allocation information and the network configuration information, using a metaheuristic algorithm. A change in scrambling code for at least one of the plurality of cells is then triggered (330), based on the computed reallocation. In some embodiments, the metaheuristic algorithm is based on an objective function that comprises a summation of interference metrics for each of the plurality of cells, wherein the interference metrics depend on scrambling code allocations to the plurality of cells. In some embodiments, a simulated annealing metaheuristic is used. |
| US10193644B2 |
Method and device for transmitting data in electronic device
The disclosure relates to a method of transmitting data in various types of electronic devices that are connected to the Internet of Things (IoT). An electronic device, according to an example of the disclosure, may include an additional storage device in addition to a buffer that stores data packets for created or collected information in order to minimize or reduce the loss of the information. Further, according to an example of the disclosure, the electronic device can re-transmit data by determining a re-transmission delay value or an aggregation level using a maximum transmission delay value required by an application associated with the corresponding data packet and a current transmission delay value counted based on the creation time of the data packet. |
| US10193637B2 |
Method and system of network switch optimization
A method for determining a network configuration for the delivery of entangled photons individually to a plurality of users, the network comprising a plurality of inputs, switches, and outputs operatively connected by optical fibers; the plurality of switches being switchable between two states; the method comprising: determining the minimum number of switches necessary to deliver entangled photon pairs from a predetermined number of sources to a predetermined number of users, minimizing the loss experienced by an entangled photon passing through the switches by minimizing the number of switches that any one photon passes through by selecting only nondominated switch configurations; determining the minimum number of equivalent network switch configurations and eliminating all but one of the equivalent network switch configurations; and selecting an optimum network configuration by which the plurality of inputs and the plurality of outputs are operatively interconnected using a minimum number of switches in any one route. |
| US10193636B1 |
DC-coupled optical burst-mode receiver
A DC-coupled burst-mode optical receiver is described. The optical receiver may include an input node that receives a current, e.g., from an optoelectronic converter (such as a photodiode). Moreover, the optical receiver may include a current amplifier, coupled to the input node, that provides an output current based at least in part on the current, where the current amplifier has a shunt feedback path that reduces a bias sensitivity of the current amplifier and a feed-forward path that reduces a DC bias current of the current amplifier. Furthermore, the optical receiver may include a TIA, electrically coupled to the current amplifier, that converts the output current to an output voltage. Additionally, the optical receiver may include a feedback loop coupling an output of the TIA to an input of the feed-forward path. |
| US10193634B2 |
Optical driver circuits
Examples disclosed herein relate to optical driver circuits. In some of the disclosed examples, an optical driver circuit includes a pre-driver circuit and a main driver circuit. The pre-driver circuit may include a pattern generator and at least one serializer to generate a main modulation signal and an inverted delayed modulation signal. The main driver circuit may include a level controller to control amplitudes of pre-emphasis on rising and falling edges of a modulation signal output and an equalization controller to transition the modulation signal output from the pre-emphasis amplitudes to main modulation amplitudes using the inverted delayed modulation signal. |
| US10193633B2 |
Optical transmitter apparatus
A multi-lane optical apparatus is disclosed. The optical apparatus includes monitor photodiodes (mPD) whose number corresponds to a number of lanes. The mPDs are arranged in an array so as to intersect optical axes of the respective lanes. The mPD has a light-sensitive area and an electrode that are arranged on a diagonal connecting two corners. The light-sensitive area is disposed offset from the center of the mPD. The mPDs in outermost are disposed such that the respective electrodes face inward. |
| US10193629B2 |
Optical-signal processing apparatus, optical transmission method, receiver, and optical network system
In an optical network system: control light is generated by optical modulation based on a modulated data signal which is generated by modulation of a carrier signal with a data signal; and the control light is optically combined with an optical carrier which is to propagate through a nonlinear optical medium, so as to cause cross phase modulation of the optical carrier with the control light in the nonlinear optical medium. |
| US10193628B2 |
Optical communication systems
A receiver, transmitter, and photon counting detector for use in an optical communication link are disclosed. Also disclosed are methods of communicating using the transmitter, the receiver, and the photon detector. |
| US10193625B2 |
Modulation system and modulation method
A system with which any abnormality can be easily found is provided. A system includes: a first modulator that generates a control signal and modulates an input signal in accordance with the generated control signal, to control luminance of a first light source that emits light according to the modulated input signal, the first modulator outputting the control signal; a second modulator that acquires the control signal output from the first modulator and modulates an input signal in accordance with the control signal, to control luminance of a second light source that emits light according to the modulated input signal, the second modulator outputting the control signal. The first modulator generates, as a light ID signal, a control signal for transmitting a visible light signal by luminance variations of the first light source, and acquires a light information signal being the control signal output from the second modulator. |
| US10193623B2 |
Wireless transmission of server status information
A system, according to one embodiment, includes: a wireless communication device, and one or more optical sensors. The wireless communication device and the one or more optical sensors are coupled together by a physical or wireless connection, and the wireless communication device is operable to establish a direct wireless connection and transmit server status information over the direct wireless connection. Furthermore, the one or more optical sensors are operable to detect optical signals from one or more optical sources of one or more servers. Other systems, methods, and computer program products are described in additional embodiments. |
| US10193622B2 |
Artificial light source based messaging platform
A processor receives data associated with a device. On the basis of the data associated with the device, the processor modulates a light from the artificial light source at a rate imperceptible to a human eye while detectable by a light sensor device. The modulated light is representative of the data associated with the device. The modulated light is detected, demodulated, and decoded by the light sensor device to retrieve the data associated with the device. Further, the data associated with the device is presented by the light sensor device to a user. In addition, the light sensor device is configured to receive input data from the user and communicate the input data to the processor via a wireless link. The processor is configured to receive the input data from the light sensor device and effect a change in a characteristic of the device based on the received input data. |
| US10193619B2 |
Mode division multiplexed passive optical network
A method of compensating for crosstalk in a mode division multiplexing passive optical network using a technique of transmitter-side crosstalk pre-compensation, performed at the Central Office, in which a downlink reference signal such as a training sequence or pilot signal is retrieved at the transmitter without being influenced by crosstalk effects on its uplink transmission. An uplink reference signal is transmitted in a quasi-single mode transmission along the optical fiber, and a plurality of optical signals input to transmission multiplexer are adapted based on the uplink reference signal to pre-compensate for crosstalk. |
| US10193617B2 |
Relay method, relay system, recording medium, and method
A relay method includes transmitting, by a first apparatus in a ring network, a first control frame in which information of the first apparatus is stored, through a first port different from a second port where a communication failure is detected; receiving, by a second apparatus in the ring network, the first control frame through a third port, when the communication failure does not occur at a side of a fourth port different from the third port: storing information of the second apparatus in the first control frame; and transmitting the first control frame through the fourth port; and when the communication failure occurs at the side of the fourth port, determining whether a data frame flowing into the ring network is affected by the communication failure for every VLAN (virtual local area network) based on the first control frame; and switching a communication path set in an affected VLAN. |
| US10193614B2 |
Data-receiving method and apparatus for relay station in wireless communication system
A method for receiving data by a relay station (RS) in a wireless communication system includes: receiving radio resource allocation information via an R-PDCCH (R-Physical Downlink Control Channel); and receiving data from a base station (BS) via an R-PDSCH (R-Physical Downlink Shared Channel) indicated by the radio resource allocation information, wherein the radio resource allocation information includes information regarding an allocation of resource blocks in a frequency domain and information regarding an allocation of OFDM symbols in a time domain. Since the radio resource allocation information providing information regarding a time relationship between a control channel transmitted by the BS to a UE and a control channel transmitted by the RS to a UE connected to the RS is provided, the RS can reliably receive a signal transmitted from the BS in a backhaul link between the BS and the RS in a wireless communication system including the RS. |
| US10193613B2 |
Ping pong beamforming
Embodiments of the present disclosure provide an iterative procedure relying on ping-pong transmissions between two antenna arrays to determine desired beamforming weights at each device. Other embodiments may be described and claimed. |
| US10193610B2 |
Enhancing MU-MIMO to group clients across multiple BSSIDs for a physical radio
MU-MIMO provides a mechanism for a wireless network device to transmit to multiple client devices at the same time. When employing MU-MIMO, a network device may group two or more associated client devices, and transmit beamformed signals to each group. In some implementations, a network device may initiate channel sounding. Channel sounding may include transmitting sounding frames to client devices associated with two or more basic service sets. Channel sounding may facilitate beamforming transmissions to client devices associated with the two or more basic service sets. The network device may receive feedback frames from client devices associated with the two or more basic service sets. A feedback frame may indicate how a sounding frame was received. In some implementations, the network device may further construct a feedback table from the feedback frames. The feedback table may facilitate grouping of the client devices for beamforming transmissions. |
| US10193609B2 |
Method for feeding back channel state information, base station and user equipment
A method for feeding back CIS includes: dividing a plurality of antenna ports into a plurality of groups of antenna ports; configuring for each group a same intra-group codebook set consisting of a plurality of intra-group precoding matrices, allocating for each group a plurality of different reference signals corresponding to a same reference resource, and configuring for each antenna port in each group a precoded reference signal acquired after a precoding operation using the intra-group precoding matrices, the number of the reference resources corresponding to the number of the intra-group precoding matrices in the intra-group codebook set, and the number of the reference signals corresponding to each reference resource corresponding to the number of groups of inter-group antenna ports; transmitting the precoded reference signal to a UE via each antenna port; and receiving the CSI fed back by the UE after measurement on the reference signal. |
| US10193603B2 |
Communication unit, integrated circuit and method for generating a plurality of sectored beams
A communication unit comprises a plurality of antenna element feeds (203, 205) for coupling to a plurality of antenna elements of an antenna array, where each antenna element feed comprises at least one coupler; and a plurality of transmitters operably coupled to the plurality of antenna element feeds. At least one transmitter of the plurality of transmitters comprises: an input for receiving a first signal and at least one second signal; beamformer logic arranged to apply independent beamform weights (RefBF1, RefBF2) on the first signal and the at least one second signal of the transmitter respectively, wherein each of the independent beamform weights is allocated on a per sector basis; and a signal combiner arranged to combine the first signal and the second signal to produce a combined signal, such as that the combined signal supports a plurality of sectored beams. |
| US10193601B2 |
Precoding codebook bitmaps in telecommunications
A base station node communicates over a radio interface with a wireless terminal. The base station node comprises a controller which, upon basis of channel feedback received from the wireless terminal, is configured to make a precoding codebook bitmap decision regarding a precoding codebook bitmap affecting transmissions between the base station and the wireless terminal. The base station is further configured to communicate the precoding codebook bitmap decision so that the precoding codebook bitmap decision may be implemented by the wireless terminal. In example embodiments and modes the base station sends the precoding codebook bitmap decision using a bitmap decision signal to a radio network controller. |
| US10193599B2 |
Node unit of distributed antenna system
The inventive concept relates to a distributed antenna system (DAS), and more particularly, to an uplink signal transmission operation of each of node units constituting a DAS. A node unit of a DAS includes a multiplexer configured to generate a single uplink signal by selectively outputting any one of m uplink signals received from m lower node units at an interval of a predetermined output time, where m is a positive integer greater than 1, and a down-sampler configured to output a transmission uplink signal by converting a sampling rate of the single uplink signal to correspond to a sampling rate of any one of the m uplink signals. Accordingly, it is possible to provide a DAS capable of processing and outputting, as one signal, uplink signals received from a plurality of remote units, without any error. |
| US10193597B1 |
Electronic device having slots for handling near-field communications and non-near-field communications
An electronic device may be provided with a conductive wall. A gap in the wall may divide the wall into first and second segments. A ground may be separated from the wall by first, second, and third slots that form radiating elements for first, second, and third non-near-field communications antennas. First and second conductive structures may be coupled between the wall and the ground. A near-field communications antenna may include a first feed terminal coupled to the first segment and a second feed terminal coupled to the second segment. The antenna may convey signals over a conductive loop path that includes portions of the first and second segments, the antenna ground, and the first and second conductive structures. A differential or single-ended signal transmission line may be coupled to the terminals. Phase shifters may configure the signals to be out of phase at the feed terminals. |
| US10193594B2 |
Method and apparatus for transmitting and receiving signals over pairs of wires
A method of transmitting data from a transmitter device to a plurality of receiver devices each of which is connected to the transmitter device via a respective wire connection the method comprising transmitting a common signal onto all or both of the respective wire connections and using a multiple access technique to enable respective virtual data channels to be generated for transmitting data from the transmitter device to each of the receiver devices via its own respective virtual data channel. |
| US10193592B2 |
Techniques for detecting and cancelling interference in wireless communications
Various aspects described herein relate to cancelling interference in wireless communications. Energy level detection of a received signal can be performed to determine an allocation size and position corresponding to an interfering device in the received signal. An interference demodulation reference signal (DM-RS) and cyclic shift of the interfering device in the received signal can be determined. It can be determined whether to apply successive interference cancellation on the received signal, based at least in part on the allocation size and position and the DM-RS and cyclic shift, to cancel interference from the interfering device. |
| US10193589B1 |
Electronic device
An electronic device includes a housing, a locking assembly and a battery demountably disposed on the housing and including a first engaging portion. The locking assembly includes a limiting element, a pressing element and a linking element movably disposed on the housing and includes a second engaging portion. The first and second engaging portions engage, allowing the battery to be fixedly disposed on the housing. The limiting element is disposed on the housing and includes first and second limiting portions. The pressing element is connected to the linking element and disposed at the first limiting portion to fix relative positions of the first and second engaging portions. When the pressing element separates from the first limiting portion and moves to the second limiting portion, the linking element drives the second engaging portion to separate from the first engaging portion, causing the battery to separate from the housing. |
| US10193588B2 |
Head protection device, communication unit, connection unit and system comprising head protection device, communication unit and connection unit
A head protection device, e.g., a gas mask or a safety helmet, has a communication interface for sending a first communication signal and for receiving a second communication signal. Further, the gas mask has a signal processor providing an interface for sending the first communication signal, for detecting a microphone signal, for detecting the second communication signal and for sending an ear speaker signal. The signal processor is configured such that the first communication signal is sent as a function of the microphone signal, and that the ear speaker signal is further sent as a function of the second communication signal. |
| US10193587B2 |
Mobile phone and communication method thereof
A mobile phone and a communication method thereof are provided. The mobile phone includes a mobile phone body and mobile phone accessory, wherein the mobile phone body includes a first communication module, a mobile phone card information reading module, a data transmission control module and a basic communication module; and the mobile phone accessory include a mobile phone card, a storage module and a second communication module. According to the mobile phone and the communication method thereof, the user data is stored in the mobile phone body and the mobile phone accessory separated from the mobile phone body; the mobile phone body and the mobile phone accessory are interconnected by wireless communication; and when the verification for the identification of the mobile phone body and the mobile phone accessory is failed or the communication therebetween is disconnected, the mobile phone body clears all the user data stored thereby automatically to prevent the user data from being stolen, therefore, the security of the user data is improved. |
| US10193582B2 |
Interference cancellation method and base station apparatus therefor
The present disclosure relates to a pre-5th-generation (5G) or 5G communication system to be provided for supporting higher data rates beyond 4th-generation (4G) communication system such as long term evolution (LTE). A method of operating a base station for interference cancellation in a wireless communication system is provided. The method may include receiving, from a target terminal, an uplink data signal including at least one interference signal generated by at least one interference terminal; performing a primary decoding for the uplink data signal; in accordance with decoding errors, generating a cancelling signal corresponding to an interference signal of the at least one interference terminal; performing a cancellation by applying the cancelling signal to the uplink data signal; and performing a secondary decoding for the uplink data signal to which the cancelling signal has been applied. |
| US10193579B2 |
Storage control device, storage system, and storage control method
According to an embodiment, a storage control device includes a controller, a compression condition determiner, a compressor, and an error correction encoder. The controller receives a write request for a data item and determines whether or not the wear degree of a target region in a storage device to which the data item is to be written is less than a threshold value. The compression condition determiner determines, based on the wear degree, an optimal compression condition out of compression conditions that include lossy compression. The compressor generates, based on the compression condition, compressed data. The error correction encoder subjects the data item to error correction and generates encoded data. |
| US10193578B2 |
Flexible polar encoders and decoders
Modern communication systems must cope with varying channel conditions and differing throughput constraints. Polar codes despite being the first error-correcting codes with an explicit construction to achieve the symmetric capacity of memoryless channels are not currently employed against other older coding protocols such as low-density parity check (LDPC) codes as their performance at short/moderate lengths has been inferior and their decoding algorithm is serial leading to low decoding throughput. Accordingly techniques to address these issues are identified and disclosed including decoders that decode constituent codes without recursion and/or recognize classes of constituent directly decodable codes thereby increasing the decoder throughput. Flexible encoders and decoders supporting polar codes of any length up to a design maximum allow adaptive polar code systems responsive to communication link characteristics, performance, etc. while maximizing throughput. Further, designers are provided flexibility in implementing either hardware or software implementations. |
| US10193576B2 |
Memory system and memory device
According to one embodiment, a memory system comprises a memory array, a first ECC control circuit, and a second ECC control circuit. The memory cell array stores data, a first parity generated in association with the data based on a first error correction code (ECC) scheme, and a second parity generated in association with the data and the first parity based on a second error correction code (ECC) scheme. The first ECC control circuit executes error correction using the first ECC scheme and the first parity during a read operation on the memory cell array. The second ECC control circuit executes error correction using the second ECC scheme and the second parity during a scrub operation on the memory cell array. The first ECC scheme and the second ECC scheme have error correction capabilities of different levels. |
| US10193573B2 |
Method and data processing device for determining an error vector in a data word
In various embodiments, a method for determining an error vector in a data word is provided. The method includes determining the syndrome of the error vector, successively generating code words by cyclically interchanging one or more predefined code words, forming, for each code word generated, the sum of the syndrome supplemented with zeros to the data word length and the code word, and checking, for the code word, whether the sum of the syndrome supplemented with zeros to the data word length and the code word has a minimum weight among all code words, and determining the error vector as the sum of the syndrome and the code word for which the sum of the syndrome supplemented with zeros to the data word length and the code word has a minimum weight among all code words. |
| US10193567B1 |
Methods and network device for uncoded bit protection in 10GBASE-T ethernet
A network interface devices receives a plurality of bits, and encodes the plurality of bits into a plurality of bit blocks that includes a first set of bit blocks and a second set of bit blocks. The network interface device transcodes the first set of bit blocks to generate a third set of bit blocks, and aggregates the second set of bit blocks and the third set of bit blocks into an aggregated set of bit blocks. A first error correction encoder encodes a first portion of the bits in the aggregated set of bit blocks to generate a first set of encoded bits. A second error correction encoder encodes a second portion of the bits in the aggregated set of bit blocks to generate a second set of encoded bits. The network interface modulates the first set of encoded bits and the second set of encoded bits. |
| US10193563B2 |
Semiconductor device, wireless sensor, and electronic device
An object is to reduce power consumption of an analog-digital converter circuit. An analog potential obtained in a sensor or the like is held in a sample-and-hold circuit including a transistor with an extremely low off-state current. In the sample-and-hold circuit, the analog potential is held in a node which is able to hold a charge by turning off the transistor. Then, power supply to a buffer circuit or the like included in the sample-and-hold circuit is stopped to reduce power consumption. In a structure where a potential is held in each node, power consumption can be further reduced when a transistor with an extremely low off-state current is connected to a node holding a potential of a comparator, a successive approximation register, a digital-analog converter circuit, or the like, and power supply to these circuits is stopped. |
| US10193560B2 |
Method and circuits for charge pump devices of phase-locked loops
A charge pump includes: (I) a current source; (II) a p-channel source current network including: a first p-channel transistor; a second p-channel transistor; a p-channel current switch including at least one source terminal coupled to the drain terminal of the first p-channel transistor, at least one gate coupled to a phase comparator, and at least one drain terminal; a third p-channel transistor; and (III) a n-channel sink current network including: a first n-channel transistor; a second n-channel transistor; a third n-channel transistor; a n-channel current switch comprising at least one drain terminal coupled to the source terminal of the third n-channel transistor, at least one gate coupled to the phase comparator; and at least one source terminal coupled to the drain terminal of the first n-channel transistor; and wherein the p-channel source current network and the n-channel sink current network draw a baseline current from the first p-channel transistor. |
| US10193558B2 |
Clock signal and supply voltage variation tracking
Embodiments disclosed herein provide an apparatus comprising a clock generation circuit configured to generate a first signal for a first time period and a second signal for a second time period, a charge pump circuit coupled to the clock generation circuit and configured to generate a first voltage and a second voltage based, at least in part, on the first time period and the second time period, and a comparison circuit coupled to the charge pump circuit, the comparison circuit configured to compare a difference between the first voltage and the second voltage with a threshold value and generate an active tracking enablement signal in response to determining that the difference between the first and second voltages exceeds the threshold value. |
| US10193556B2 |
Method and apparatus for configurable control of an electronic device
Methods and apparatuses are provided for establishing operational states of a device having a plurality of functional operating units. An input is configured to receive an identifier of a desired operational state of the device. A number of control outputs are configured to couple to one or more of the plurality of functional operating units having two or more operational states. A number of reference inputs are each configured to receive a reference signal, and at least one reference signal is mapped, based on the identifier, to at least one control output. Each control output provides a control signal that places each functional operating unit in a selected state to achieve the desired operational state of the device. |
| US10193554B1 |
Capacitively coupled level shifter
A half bridge GaN circuit is disclosed. The circuit includes a low side power switch configured to be selectively conductive according to one or more input signals, a high side power switch configured to be selectively conductive according to the one or more input signals, and a high side power switch controller, configured to control the conductivity of the high sigh power switch based on the one or more input signals. The high side power switch controller includes a capacitor, and a logic circuit, wherein the capacitor is configured to capacitively couple a signal based on the input signals to the logic circuit, and the logic circuit is configured to control the conductivity of the high sigh power switch based on the capacitively coupled signal. |
| US10193553B2 |
Processing circuit capable of dynamically modifying its precision
The invention concerns a circuit comprising: a processing circuit (102) comprising a plurality of circuit domains (103), each circuit domain (103) comprising a plurality of transistors and being configured to apply one or more corresponding transistor biasing voltages to said transistors; and a control circuit (104) configured to determine, based on at least a selected accuracy setting of the processing circuit, the level of said one or more transistor biasing voltages to be applied in each of said circuit domains, the control circuit (104) being further configured to cause said transistor biasing voltages to be applied to the circuit domains. |
| US10193552B1 |
Termination resistor calibration circuit and control method thereof
The termination resistor calibration circuit and a control method thereof are provided. The resistance of the termination resistor of the CML transmitter is directly calibrated, so that the error caused by duplicating the resistor can be avoided, which improves the calibration accuracy. In addition, no duplicated resistor and constant current source is required, which reduces the area occupied by the circuit. Further, the absolute current and the relative current are obtained from the bandgap module and thus have high accuracy. The output signal control module, the constant current source, and the termination resistors of the CML transmitter can be used for transmitting signals after the resistance calibration is finished, which improves the utilization of the circuit module. |
| US10193546B1 |
Pump switching device
A pump switching device is provided. The pump switching device includes a relay, a switch, a sensor and a controller. The relay selectively couples current to a pump motor. The switch is coupled in parallel with the relay. The sensor is configured to generate a signal upon the detection of a condition. The controller is in communication with the sensor. The controller is further coupled to control the relay and the switch. The controller is configured to activate the switch a select amount of time before the controller activates the relay upon initial detection of the signal from the sensor. The controller is further configured to deactivate the switch a select amount of time after the relay is activated while the signal is being detected. |
| US10193544B2 |
Minimizing ringing in wide band gap semiconductor devices
Embodiments include a power conversion circuit comprising first and second semiconductor switches, and a drive circuit configured to create a period of operational overlap for the first and second switches by setting a gate voltage of the first switch to an intermediate value above a threshold voltage of the first switch, during turn-on and turn-off operations of the second switch. Embodiments also include a method of operating first and second semiconductor devices, comprising: reducing a gate voltage of the first device to an intermediate value above a threshold voltage while the second device is off; turning off the first device after the second device is on; increasing the gate voltage of the first device to the intermediate value while the second device is on; and fully turning on the first device after the second device is off. |
| US10193541B1 |
Transformerless switching regulator with controllable boost factor
For transformerless switching regulators, a current-mode controlled boost converter operates based on current sensing through a switch to ground, allowing use of common controllers. To avoid reverse current from a cascaded charge pump, the input of the charge pump is blocked by a diode from passing through the switch to ground and is itself separately switched to ground. |
| US10193539B1 |
High speed data synchronization
According to an embodiment, a semiconductor device may be provided. The semiconductor device may include an internal clock generation circuit configured to generate a plurality of internal clock signals respectively from a plurality of division clock signals. The semiconductor device may include a data input and output (I/O) circuit configured to output input data as output data in synchronization with the plurality of internal clock signals. Each bit of the output data may be outputted in sequential order in synchronization with an internal clock signal from the plurality of internal clock signals. |
| US10193534B2 |
Wireless power system tuning apparatus
A wireless power transmission system comprising a wireless transmitter capable of transmitting power and a wireless receiver capable of receiving power such that the transmitter or receiver comprises a controller and resonant tank, and the resonant tank comprises a capacitor and an electrically tunable inductor. |
| US10193533B2 |
Methods and systems for event-driven recursive continuous-time digital signal processing
Continuous-time digital systems implemented with separate timing paths and data paths are disclosed. The disclosed continuous-time digital systems, can implement an event-grouping and detection method that can be used feedback systems with propagation delays. By implementing event-detection into a feedback loop of a continuous-time digital system, the system can automatically stop when there is no event in the system. When new events are detected the system can commence operation. |
| US10193530B2 |
Multiplexer, transmission device, reception device, high-frequency front end circuit, communication device and impedance matching method for multiplexer
A multiplexer includes elastic wave filters with different pass bands, a common terminal to which an inductance element is serially connected in a connection path between an antenna element and the common terminal; and an inductance element. Among the elastic wave filters, a reception input terminal of a first reception filter is connected to the common terminal via the inductance element and is connected to a parallel resonator. Transmission output terminals of transmission filters and a reception input terminal of a second reception filter are connected to the common terminal, are connected to series resonators, and are not connected to parallel resonators. |
| US10193528B2 |
Acoustic wave device and acoustic wave module
An acoustic wave device of the present invention has a piezoelectric substrate, an excitation electrode arranged on the piezoelectric substrate, an electrode pad arranged on the piezoelectric substrate and electrically connected to the excitation electrode, and a cover arranged on the piezoelectric substrate so that a oscillation space is arranged between the cover and the excitation electrode. The cover has inside it a via conductor electrically connected to the electrode pad and is curved so that its surface facing the piezoelectric substrate approaches the excitation electrode side with respect to an upper surface of the piezoelectric substrate from a position of contact with the via conductor. |
| US10193526B2 |
Bulk acoustic resonator and filter
A bulk acoustic resonator includes a substrate, a first electrode disposed above the substrate, a piezoelectric body disposed on the first electrode and including a plurality of piezoelectric layers each including aluminum nitride with a doping material, and a second electrode disposed on the piezoelectric body, where at least one of the piezoelectric layers is a compressive piezoelectric layer formed under compressive stress. |
| US10193524B2 |
Resonator structure with enhanced reflection of shear and longitudinal modes of acoustic vibrations
A solidly mounted resonator structure includes an multi-layer acoustic reflector structure and a piezoelectric material layer arranged between the first and second electrode structures to form an active region, with the acoustic reflector structure providing enhanced reflection of shear and longitudinal modes of acoustic vibrations. The solidly mounted resonator structure is configured for transduction of an acoustic wave including a longitudinal component and a shear component. The acoustic reflector structure includes multiple sequentially arranged differential acoustic impedance layer units each including a low acoustic impedance material layer in contact with a high acoustic impedance material layer. A frequency corresponding to a minimum transmissivity of a second harmonic resonance of a longitudinal response is substantially matched to a frequency corresponding to a minimum transmissivity of a third harmonic resonance of a shear response. |
| US10193523B2 |
Filter chip and method for producing a filter chip
The present invention relates to a filter chip (1), comprising an interconnection of at least one first and one second resonator (2, 3) operating with bulk acoustic waves, wherein the first resonator (2) operating with bulk acoustic waves comprises a first piezoelectric layer (4) that is structured in such a way that the first resonator (2) has a lower resonant frequency than the second resonator (3). |
| US10193522B2 |
Single port wide band impedance matching circuit with narrow band harmonic bypass, wireless communication device, and method for providing antenna matching
The present application provides a single port wide band impedance matching circuit and method for providing antenna matching. The single port wide band impedance matching circuit includes a single signal port adapted for receiving a wide band signal. The single port wide band impedance matching circuit further includes an impedance matching circuit including a narrow band harmonic bypass. Still further, the single port wide band impedance matching circuit includes an antenna port coupled to the single signal port via the impedance matching circuit. |
| US10193521B2 |
Adjustable impedance matching network
An impedance matching network includes a first terminal, a second terminal, and a reference potential terminal. The impedance matching network further includes a first shunt branch between the first terminal and the reference potential terminal, the first shunt branch including a capacitive element. The impedance matching network also includes a second shunt branch between the second terminal and the reference potential terminal, the second shunt branch including an inductive element. Furthermore, the impedance matching network includes a transmission line transformer with a first inductor path and a second inductor path, wherein the first inductor path connects the first terminal and the second terminal. An alternative impedance matching network includes a transformer and an adaptive matching network. The transformer is configured to transform an impedance connected to a first port so that a corresponding transformed impedance lies within a confined impedance region in a complex impedance plane. |
| US10193518B2 |
Radio-frequency (RF) component
First no-electrode-forming areas where first wiring electrodes such as internal wiring electrodes and external connection terminals are not formed are set to ranges that overlap inductor components in a plan view of at least one of dielectric layers of a first substrate, and second no-electrode-forming areas where second wiring electrodes such as internal wiring electrodes and mounting electrodes are not formed are set to ranges that overlaps the inductor components in a plan view of at least one of dielectric layers of a second substrate. Accordingly, reduction of the inductance of the inductor components, which is caused by the first and second wiring electrodes crossing the magnetic field of the inductor components, can be suppressed. Therefore, the overall component size can be reduced without deteriorating the Q value of the inductor components by configuring an RF component with a stacking structure. |
| US10193517B2 |
Variable filter circuit and radio communication device
A variable filter circuit (10) includes a parallel arm (11) connected between a port (P3) and node (A), a series arm (12) including a resonator (Re_s1) connected in series between a port (P1) and node (A), and a series arm (13) including a resonator (Re_s2) connected in series between a port (P2) and node (A). The parallel arm (11) includes a first inductor (Lp1). The series arms (12, 13) include variable capacitors (Cp_s1, Cp_s2) connected in parallel to the resonators (Re_s1, Re_s2). |
| US10193512B1 |
Phase-shifting power divider/combiner assemblies and systems
In some embodiments, a power divider/combiner assembly includes a divider network, a plurality of amplifiers, and a combiner network. The divider network divides a received divider-network input signal into N divider-network output signals. The divider network includes at least one divider and at least one divider phase-shift circuit. The plurality of amplifiers include N amplifiers for amplifying the divider-network signals. The combiner network is for combining the N amplified signals into a combiner-network output signal. The combiner network includes at least one combiner and at least one combiner phase-shift circuit. Each phase-shift circuit is configured to produce a respective non-zero phase shift between divider output signals or between combiner input signals. |
| US10193511B2 |
Monolithic microwave integrated circuit having an overlay transformer and low impedance transmission lines
A monolithic microwave integrate circuit (MMIC) presents as a power amplifier including a 9:1 overlay transformer and artificial low impedance transmission lines. The 9:1 overlay transformer effects the output impedance thereof. The artificial low impedance transmission lines behave as inductors without occupying an amount of space equivalent to that of an inductor having similar properties as the artificial low impedance transmission line. |
| US10193510B1 |
Switching controllers and methods for loads
System controller and method for providing at least an output voltage. For example, the system controller includes a first controller terminal configured to receive an input voltage. The input voltage is associated with an input-voltage magnitude. Additionally, the system controller includes a second controller terminal configured to receive a control voltage, and a third controller terminal configured to output an output voltage to a load. Moreover, the system controller includes a supply voltage generator configured to receive the input voltage from the first controller terminal and generate a supply voltage. The supply voltage is associated with a supply voltage magnitude. Also, the system controller includes a ramp voltage generator configured to receive the supply voltage and generate a ramp voltage. |
| US10193506B2 |
Methods and circuits to reduce pop noise in an audio device
A class D amplifier receives and amplifies a differential analog signal which is then differentially integrated. Two pulse width modulators generate pulse signals corresponding to the differentially integrated analog signal and two power units generate output pulse signals. The outputs the power units are coupled to input terminals of integrators via a resistor feedback network. An analog output unit converts the pulse signals to an output analog signal. The differential integration circuitry implements a soft transition between mute/un-mute. In mute, the integrator output is fixed. During the soft transition, the PWM outputs change slowly from a fixed 50% duty cycle to a final value to ensure that no pop noise is present in the output as a result of mode change. |
| US10193505B2 |
Configurable control loop topology for a pulse width modulation amplifier
In accordance with embodiments of the present disclosure, a system may have a configurable control loop technology, wherein the system comprises a first mode control loop, a second mode control loop and a reconfigurable pulse width modulator (PWM) configured to generate an output signal from an input signal. The reconfigurable PWM may include a digital PWM and an analog PWM and may be configured such that when the first mode control loop is activated, the reconfigurable PWM utilizes the analog PWM to generate the output signal from the input signal and when the second mode control loop is activated, the reconfigurable PWM utilizes the digital PWM to generate the output signal from the input signal and the digital PWM receives its input from a digital proportional integral derivative controller. |
| US10193500B2 |
Supply modulator and communication device including the same
A supply modulator includes: a voltage generator including output terminals respectively outputting voltages having different levels, and configured to select, in response to a selection control signal corresponding to an envelope signal, at least one of the voltages as a selection supply voltage and to generate the selection supply voltage by performing DC-DC conversion on a power supply voltage; and a switch unit configured to connect an output terminal through which the selection supply voltage is output to a power amplifier, in response to a connection control signal corresponding to the envelope signal. |
| US10193499B2 |
Multiphase power supply having single comparator
A multiphase power supply includes a multiphase converter including first and second converters having differing operating phases, each of the first and second converters configured to convert input power into driving power, and transmit the driving power to a power amplifier, a detector configured to detect a voltage based on the driving power, and a duty controller configured to compare an error voltage between an envelope signal of an input signal input into the power amplifier and the detected voltage and sawtooth wave signals having different phases from each other to generate duty control signals, wherein the duty controller compares the error voltage and the sawtooth wave signals with each other using a single comparator. |
| US10193498B2 |
Method and system for boosting the supply of power amplifier
The present invention relates to a system for boosting the power supply of an RF power amplifier in high peak to average power ratio applications, wherein said power amplifier is coupled to receive and amplify a digital data stream of a baseband signal, (e.g., which after modulation with a carrier wave are supplied as the RF input signal to said power amplifier to generate an RF output signal). Said system comprises: a) a first circuit for controlling said boost by said digital data stream of said baseband signal in open-loop, wherein the timing of said boost event can be adjusted according to delays in the data stream of said system, wherein said boost event is imparted as a copy of the most significant bits of said baseband signal; and b) a second circuit for adjusting the precise timing of said boost event in such a way that the signal which controls said second circuit is the result of a comparison between a digital form of said RF input signal and/or a digital representation of the waveform of said power supply and said digital baseband signal, wherein said comparison represents the substantial matching of the delays in the paths of RF input signal and said power supply. |
| US10193496B2 |
Photovoltaic combiner box monitoring system
A photovoltaic combiner box monitoring system includes a current sampling circuit, a microprocessor and a communication circuit; the current sampling circuit is connected with the microprocessor to sample at least one channel of current signals and input the sampled currents to the microprocessor; and the microprocessor is connected with the communication circuit to send the current signals sampled by the current sampling circuit by the communication circuit. Thus, the photovoltaic combiner box monitoring system can sample current signals from the photovoltaic combiner box by means of the current sampling circuit and send the sampled current signals through the communication circuit. |
| US10193494B2 |
Vehicle glass roof systems
A glass roof system includes a first glass layer, a photovoltaic module, a switching film powered by the photovoltaic module, and a control module configured to selectively control the switching film based on a passenger cabin temperature. |
| US10193493B2 |
Multi-surface solar cell packaging for self-powered electronic devices
A solar cell assembly includes a bendable substrate and multiple solar cells to be mounted over different surfaces of an electronic device. The bendable substrate includes an electrical contact to couple to an electrical contact on one of the surfaces of the electronic device. Thus, the electronic device only needs an electrical connection on one surface, and the solar cell assembly can mount solar cells on multiple surfaces to couple to the one electrical connection. |
| US10193492B2 |
Solar Cell Module
A solar cell module according to an embodiment comprises: a solar cell panel; and a frame for accommodating the solar cell panel, wherein the frame comprises: a first sub-frame extending in one direction; a second sub-frame protruding and extending from the first sub-frame; a third sub-frame protruding and extending from the first sub-frame and disposed at the lower portion of the second sub-frame; and a fourth sub-frame protruding from the first sub-frame and extending in the direction opposite to the second sub-frame and the third sub-frame. |
| US10193488B2 |
Methods and systems for reducing conducted electromagnetic interference
An EMI filter is described that includes an input having first and second input terminals, and an output having first and second output terminals. A first conductive path is defined between the first input and output terminals, and a second conductive path is defined between the second input and output terminals. The EMI filter also includes a first choke device coupled across the first and second conductive paths, and a first Y capacitor including a first end and a second end opposite the first end, the first end coupled to the first conductive path downstream from the first choke device. The EMI filter further includes a second Y capacitor including a first end and a second end opposite the first end, the first end coupled to the second conductive path downstream from the first choke device, and a second choke device coupled to an inverter output. |
| US10193485B2 |
Method and apparatus for control of switched reluctance motors
A short pitched switched reluctance motor control apparatus comprising a voltage provider comprising a first coupling and a second coupling configured to be coupled to a phase winding of the switched reluctance motor for applying a voltage to drive current in the winding between the first and second coupling is disclosed. The apparatus further comprises a controller configured to apply a first voltage pulse to the first coupling, and to apply a second voltage pulse to the second coupling, wherein the start of the second pulse is delayed with respect to the start of the first pulse, and the end of the first pulse is delayed with respect to the end of the second pulse. |
| US10193480B2 |
Proportional integral regulating loop for digital regulator device for motor vehicle excitation rotary electrical machine
A regulating loop for a digital regulator of an excitation rotating electric machine for operation as a generator delivering an output voltage tailored by an excitation current. The digital regulator comprises a control device for controlling the excitation current and the regulating loop comprises, at input, a measuring device for measurement by sampling the output voltage generating a measurement signal (Um), an calculation device generating an error signal (e) equal to a difference between the measurement signal (Um) and a setpoint (U0), a processing system for processing of the error signal (e) generating a regulating signal (Ysat) comprising in parallel a first amplifier, an integrator and an anti-saturation system, and comprising, at output, a generation system for generation of a control signal (PWM) controlling the control device as a function of the regulating signal (Ysat). The anti-saturation system is a conditional detection system. |
| US10193479B2 |
Device for controlling a regulator of a motor vehicle alternator, and alternator comprising the corresponding regulator
A regulator has a circuit generating an activation command by bringing, to a first voltage higher than a high reference voltage, a bidirectional line connected to a detection circuit for detecting a status of the activation command. The detection circuit comprises generation means for generating a fault signal from a flag indicating a failure of the alternator, linking the line to a ground by means of a switching element, thus bringing the line to a second voltage lower than a fault voltage lower than the high reference voltage, and the control circuit comprises detection means for detecting the fault signal. The control circuit further transmits a setpoint PWM signal having a maximum higher than the high reference voltage and a minimum lower than a low reference voltage higher than the fault voltage, a duty ratio of the setpoint signal being representative of a setpoint voltage (V0) of the regulator. |
| US10193477B2 |
Method for estimating the angular position of a rotor of an electric drive system
The present invention has for object a method for estimating the angular position of a rotor in relation to a stator in a rotary electric machine, such as an electric machine of an electric or hybrid motorization system, comprising: estimating the angular position and/or of the rotation speed of the rotor by a method of injecting high frequency signals as long as the absolute value of the rotation speed of the rotor, derived from said angular position, is less than a first predefined threshold; estimating the angular position and/or of the rotation speed of the rotor by a model coming from a learning method as long as the absolute value of the rotation speed of the rotor, derived from said angular position, is greater than a second predefined threshold. |
| US10193470B2 |
Step up/down inverter circuit and method for controlling same
A step up/down inverter circuit (10) is provided with: a plus line (13p) and a minus line (13m) connected to the plus terminal and minus terminal of a DC power supply, respectively; a voltage dividing circuit (14), a first leg (15), and a second leg (16) which are disposed between the plus line (13p) and the minus line (13m); a first reactor L1, having one end connected to a first intra-leg wiring connecting the switching elements SW1, 2 of the first leg (15); a second reactor L2, having one end connected to second intra-leg wiring connecting the switching elements SW3, 4 of the second leg (16) and having the other end connected to the other end of the first reactor (L1); a bidirectional switching element SW5 disposed between the first intra-leg wiring and a w-terminal (12w); another bidirectional switching element SW6 disposed between the second intra-leg wiring and a u-terminal (12u); and a smoothing circuit (17) for smoothing the voltages output from the bidirectional switching elements SW5, 6. |
| US10193469B2 |
Multi-level power converter and a method for controlling a multi-level power converter
A multi-level power converter for one or more phases includes one or more converter arms including a plurality of serial connected switching cells. Each switching cell includes a plurality of switching devices, a primary energy storage, a secondary energy storage and a first inductor. The switching devices are arranged to selectively provide a connection to the primary energy storage, wherein each switching cell includes a bridge circuit including the switching devices and the primary energy storage, a battery circuit connected to the bridge circuit and including the secondary energy storage, and an arm circuit providing a connection between two adjacent switching cells. The first inductor of each switching cell is arranged in the arm circuit. |
| US10193467B2 |
Power conditioning units
We describe a power conditioning unit with maximum power point tracking (MPPT) for a dc power source, in particular a photovoltaic panel. A power injection control block has a sense input coupled to an energy storage capacitor on a dc link and controls a dc-to-ac converter to control the injected mains power. The power injection control block tracks the maximum power point by measuring a signal on the dc link which depends on the power drawn from the dc power source, and thus there is no need to measure the dc voltage and current from the dc source. In embodiments the signal is a ripple voltage level and the power injection control block controls an amplitude of an ac current output such that an amount of power transferred to the grid mains is dependent on an amplitude of a sinusoidal voltage component on the energy storage capacitor. |
| US10193465B2 |
DC/DC conversion apparatus
A DC/DC conversion apparatus includes a DC voltage source that outputs a DC power supply voltage, an oscillation circuit electrically connected to the DC voltage source, switch elements, a switch controller that connects or disconnects electrical connection between the DC voltage source and the oscillation circuit by switching turn-on and turn-off of the switch elements, and switches a direction of a voltage applied to the oscillation circuit between a first direction and a second direction, and a transformation circuit that outputs a current generated in the oscillation circuit and converts the current into a DC current. The switch controller disconnects the electrical connection between the oscillation circuit and the DC voltage source before the direction of the voltage applied to the oscillation circuit is switched from the first direction to the second direction, and connects the electrical connection between the oscillation circuit and the DC voltage source and switches the direction of the voltage applied to the oscillation circuit to the second direction after a current flowing through the oscillation circuit has been outputted to the transformation circuit. |
| US10193462B1 |
Power converter using bi-directional active rectifying bridge
Power converters that use bi-directional switches to rectify an AC power source, rather than diode bridges, are provided. In additional to performing rectification, the bi-directional switches also control power flow through the power converter, i.e., the switches effectively implement a switching power supply to provide a desired DC voltage to a load. The use of bi-directional switches that can block current flow in either direction enables a power converter that uses minimal circuitry, has low conduction losses (high efficiency), and can operate in buck and boost modes. Furthermore, via appropriate control, the described power converter circuitry may be used both for converting from AC voltage to DC voltage, and from DC voltage to AC voltage. |
| US10193461B2 |
Multi-phase resonant converter and method of controlling it
A PWM controlled multi-phase resonant voltage converter may include a plurality of primary windings powered through respective half-bridges, and as many secondary windings connected to an output terminal of the converter and magnetically coupled to the respective primary windings. The primary or secondary windings may be connected such that a real or virtual neutral point is floating. |
| US10193460B2 |
DC/DC converter having current diversion circuit
This invention is concerning a secondary side reflux circuit having a series circuit that is formed by connecting a secondary side reflux diode and a reflux reactor in series, the secondary side reflux circuit being provided on a secondary side of a DC/DC converter that subjects DC power from a DC power supply to DC/DC conversion and outputs the converted power to a load connected in series to a smoothing reactor connected to an output side of a rectifier circuit having a plurality of rectifying semiconductor switching elements. During a period in which a voltage from the DC power supply is not applied to a primary side of a transformer, the secondary side reflux circuit diverts a load current flowing through a load so as to return the load current to the load. |
| US10193456B2 |
Pulse width modulation controller and relevant control method having minimum on time in response to voltage peak of line voltage
A PWM controller in a switching mode power supply provides to a power switch a PWM signal determining an ON time and an OFF time. A peak detector detects a voltage peak of a line voltage generated by rectifying an alternating-current input voltage. An OFF-time control unit controls the PWM signal and determines the OFF time in response to a compensation voltage, which is in response to an output voltage of the switching mode power supply. An ON-time control unit controls the PWM signal and determines the ON time in response to the compensation voltage and the voltage peak. The ON-time control unit is configured to make the ON time not less than a minimum ON time, and the minimum ON time is determined in response to the voltage peak. |
| US10193451B2 |
Systems and methods for regulating power conversion systems with output detection and synchronized rectifying mechanisms
System and method for regulating a power conversion system. An example system controller includes: a first controller terminal and a second controller terminal. The system controller is configured to: receive an input signal at the first controller terminal and generate a first drive signal at the second controller terminal based on at least information associated with the input signal to turn on or off a transistor to affect a current associated with a secondary winding of the power conversion system. The system controller is further configured to: in response to the input signal changing from a first value larger than a first threshold to a second value smaller than the first threshold, change the first drive signal from a first logic level to a second logic level to turn on the transistor. |
| US10193447B2 |
DC topology circuit workable with various loads through inclusion of subtractor
The present invention provides a DC topology circuit, which provides a subtractor in the control chip and a control module which is electrically connected with the output terminal of the subtractor. The two input terminals of the subtractor are respectively inputted with the input voltage and the load-rated voltage, and the input voltage and the load-rated voltage are subtracted by the subtractor. The control module controls the conduction or not of the plurality of field effect transistors according to the operation result, so that the DC topology circuit enters the different working mode, when the load uses the same connection port and communication protocol, the DC topology circuit can supply different loads with different rated voltages, and increase the application range of the DC topology circuit. |
| US10193443B2 |
Systems and methods for enhancing dynamic response of power conversion systems
System and method for regulating a power conversion system. For example, a system controller for regulating a power conversion system includes an amplifier, a variable-resistance component, a capacitor, and a modulation and drive component. The amplifier is configured to receive a reference signal and a feedback signal associated with an output signal of the power conversion system, the amplifier including an amplifier terminal. The variable-resistance component is associated with a first variable resistance value, the variable-resistance component including a first component terminal and a second component terminal, the first component terminal being coupled with the amplifier terminal. The capacitor includes a first capacitor terminal and a second capacitor terminal, the first capacitor terminal being coupled with the second component terminal. The modulation and drive component includes a first terminal and a second terminal, the first terminal being coupled with the amplifier terminal. |
| US10193442B2 |
Chip embedded power converters
A direct current to direct current (DC-DC) converter can include a chip embedded integrated circuit (IC), one or more switches, and an inductor. The IC can be embedded in a PCB. The IC can include driver, switches, and PWM controller. The IC and/or switches can include eGaN. The inductor can be stacked above the IC and/or switches, reducing an overall footprint. One or more capacitors can also be stacked above the IC and/or switches. Vias can couple the inductor and/or capacitors to the IC (e.g., to the switches). The DC-DC converter can offer better transient performance, have lower ripples, or use fewer capacitors. Parasitic effects that prevent efficient, higher switching speeds are reduced. The inductor size and overall footprint can be reduced. Multiple inductor arrangements can improve performance. Various feedback systems can be used, such as a ripple generator in a constant on or off time modulation circuit. |
| US10193441B2 |
DC-DC transformer with inductor for the facilitation of adiabatic inter-capacitor charge transport
An apparatus for power transformation includes a power converter having a charge pump, a first regulator that regulates the power provided by the power converter, and a magnetic filter connected to a terminal of the charge pump. The particular terminal to which the magnetic filter is connected is selected to facilitate adiabatic inter-capacitor charge transport within the charge pump. |
| US10193436B2 |
Switching power supply apparatus
A switching power supply apparatus, including a power converting device body configured to switch DC input power through a first switching element to thereby store the DC input power in an inductor, and to transfer the stored power to an output capacitor through a second switching element by use of resonance of the inductor, a control circuit configured to drive the first and second switching elements to alternately turn ON or OFF the two switching elements, to thereby resonate the inductor, and an overload detecting circuit configured to detect a load state of the power converting device body based on a peak value or an effective value of a resonance voltage generated from the resonance of the inductor, to thereby control operation of the control circuit. |
| US10193435B2 |
Start-up circuit to discharge EMI filter for power saving of power supplies
A start-up circuit to discharge EMI filter is developed for power saving. It includes a detection circuit detecting a power source for generating a sample signal. A sample circuit is coupled to the detection circuit for generating a reset signal in response to the sample signal. The reset signal is utilized for discharging a stored voltage of the EMI filter. |
| US10193433B2 |
Railway vehicle control apparatus
A primary circuit and a secondary circuit each have a switching element, each operate as a power conversion circuit while the switching element is activated, and each operate as a rectifier circuit while the switching element is deactivated. While a generator provided at the primary side of a first power conversion device is stopped, a controller activates the switching element of the secondary circuit and deactivates the switching element of the primary circuit. Accordingly, the first power conversion device converts electric power input from the secondary side and supplies electric power for causing the generator to operate. While the generator is operated, the controller activates the switching element of the primary circuit and deactivates the switching element of the secondary circuit such that the first power conversion device converts electric power supplied from the generator and outputs the converted electric power to the secondary side. |
| US10193431B2 |
Linear motor
A linear motor includes a stator, a mover that moves a subject to be moved linearly along the stator, and a multi-member spacer that is interposed between the mover and the subject to be moved. The stator includes a plurality of permanent magnets, the mover includes a plurality of coils arranged to be opposed to the permanent magnets, and the multi-member spacer includes two or more members different in thermal conductivity. |
| US10193427B2 |
Method of fabricating electric machine laminations using additive manufacturing
A method of making a component of a radial or axial flux electrical machine is provided. An additive manufacturing process is used to manufacture a plurality of laminas, including applying beams of energy to a successive plurality of ferromagnetic material particles and fusing them together to form a ferromagnetic helix or spiral, disposing an insulating material on said ferromagnetic helix or spiral, compressing the ferromagnetic helix or spiral to form a compressed ferromagnetic helix or spiral, and fixing the compressed ferromagnetic helix or spiral. A method of making a component of a transverse flux electrical machine is provided, including using an additive manufacturing process. |
| US10193420B2 |
Rotating electric machine
Provided is a rotating electric machine capable of improving heat dissipation from each of busbars to achieve a higher output. The rotating electric machine includes: a stator core (8); a frame (3); coil portions; a plurality of busbars (18, 19, 20) arranged on one end surface side of the stator core (8), which are to be electrically connected to the coil portions to distribute electric power to the coil portions; a holder (17); and a plate (24) having one end portion facing at least one of the plurality of busbars (18, 19, 20) and another end portion exposed externally from the holder (17) to be held in contact with an outer circumferential surface of a jacket (4). The plate (24) guides heat of the plurality of busbars (18, 19, 20) from the one end portion to the another end portion. |
| US10193419B2 |
Air gap baffle train for turbine generator
A baffle train for turbine generator air baffles independently aligns axial position of the composite air baffle along a stator core bore axial slot. Air baffle sectors that form the composite air baffle are coupled to baffle blocks of the baffle train. The baffle blocks are positioned axially along at least one axial spacer rod corresponding to the desired position of the composite air baffle within the stator bore. The baffle blocks are locked into position by a locking engagement member. Wedge blocks are axially spaced on a reciprocating wedge block rod within the stator slot below the baffle blocks. A biasing element, such as arched leaf spring, tensions the baffle block radially inwardly toward the stator bore when the wedge blocks are reciprocated below the baffle blocks. |
| US10193417B2 |
Brushless motor assembly for a fastening tool
An electric brushless DC motor is provided including an outer rotor assembly having a metallic rotor body, rotor magnets mounted within an inner surface of the rotor body, and a molded structure formed within the rotor body. The molded structure includes a main body formed on inner surface of the rotor body to securely cover and retain the rotor magnets on the inner surface of the rotor body, an axial fan formed at an end of the rotor body opposite the rotor magnets, and a sense magnet mount formed at approximately a radial center portion of the axial fan. Alternatively or additionally, the molded structure includes a radial member projecting inwardly from the main body towards a center of the outer rotor assembly, and a bearing support member having a substantially cylindrical shape in an axial direction of the outer rotor and supported by the at least one radial member. |
| US10193410B2 |
Motor
A motor includes a rotor, a stator, a housing, a bus bar assembly, a cover fixed to the housing, and a circuit board. The bus bar assembly includes a bus bar, a wiring member, and a bus bar holder. The bus bar holder includes a main body portion, a connector portion, and a connection terminal holding portion. The cover directly or indirectly contacts a second side of the main body portion. The wiring member includes a circuit board connection terminal fixed to the connection terminal holding portion at a first side ahead of the end of the second side of the main body portion, and the end of the second side at the radially inner surface of the connection terminal holding portion is located at the first side ahead of the surface of the second side of the circuit board. |
| US10193406B2 |
Rotating machinery
Rotating machinery includes a rotor of 2n poles, 84n slots, and three-phase stator windings, where n is an integer equal to or greater than 1. A top coil and a bottom coil accommodated at the diametrically inner and outer sides of the slot are connected to each other to form the stator winding. The stator windings have 2n phase belts per one phase, the phase belt including two parallel windings. In at least one of the phase belts, the one coils are disposed in the order of the second, first, first, second, first, second, first, second, second, first, second, first, second, and first parallel windings; the other coils connected to the one coils are disposed in the order of the first, second, second, first, second, first, second, first, second, first, first, second, first, and second parallel windings. |
| US10193404B2 |
Claw rotor with reduced cross-section, and alternator comprising rotor of this type
Rotor an alternator or alternator-starter type comprises two pole wheels including a series of axial claws having a generally trapezoidal shape that extend axially from the edge of the outer radial end of one pole wheel towards the other pole wheel. The rotor comprises an interpolar magnetic assembly in the interpolar space between a first claw of a first pole wheel and a second claw of a second pole wheel. The magnetic assembly comprises two first faces defined by first and second free ends. A side face is also provided, such that the adjacent side face faces same, the side face comprising third and fourth opposing ends between which the magnet is in contact. The side faces of the first and second claws define a reduction in cross-section from one of the free ends of the magnetic assembly extending towards a claw head end along a side facet. |
| US10193390B2 |
Wireless power transmitter configuration for power transmission through a partition
Apparatus and methods for configuring power settings of a wireless power transmitter installed adjacent to a partition are described. A wireless power receiver may detect an amount of power transmitted through the partition from the power transmitter, and identify at least one power setting to the power transmitter that produces an acceptable level of wirelessly transferred power at the wireless power receiver. The power transmitter may store an identified power setting and subsequently operate at the setting identified by the wireless power receiver to provide wireless power through the partition for powering or charging a wirelessly powered device. By configuring a wireless power transmitter at an installation site, various partition thicknesses may be accommodated for through-table, wireless power transfer, for example. |
| US10193386B2 |
Wireless charging method and system, wireless charging device and wearable device
A wireless charging method and system, a wireless charging device, and a wearable device. The method includes receiving, by a charging device, electric power usage data sent by at least one wearable device, determining, by the charging device, an electric power distribution solution according to the electric power usage data, where the electric power distribution solution is used to determine a charging order and charging electric power for charging the wearable device by the charging device, and performing, by the charging device, wireless charging on the wearable device according to the electric power distribution solution where the wireless charging method disclosure may coordinate a relationship between an actual electric power requirement of a user and charging capability distribution, thereby implementing overall arrangement of electric power among multiple wearable devices and dynamic distribution of charging capabilities. |
| US10193376B2 |
Wireless power receiver, charging arrangement and method for operating a wireless power receiver
A wireless power receiver (11) comprises an antenna (13), a capacitor (14) having a first terminal permanently connected to a first terminal (16) of the antenna (13) and a second terminal permanently connected to a second terminal (17) of the antenna (13), a first charge switch (18), a rectifier (15) having a first input (19) coupled to the antenna (13) via the first charge switch (18) and having a first output (22), and a communicator unit (35) with a first terminal coupled to the antenna (13). |
| US10193366B2 |
Rapid battery charging
A method and battery charger for charging one or more batteries includes a pulse generator, a detector and a processor communicably coupled to the pulse generator and the detector. A recovery/discharge circuit is electrically connected to each battery, and one or more energy storage devices are electrically connected to each of the recovery/discharge circuits. A charging pulse group, which includes a positive pulse, a rest period and a negative pulse, is determined based on one or more battery parameters using the processor and the detector. The charging pulse group is generated using the pulse generator, and sequentially applied to each of the batteries. Energy is recovered from each of the one or more batteries using the recovery/discharge circuits during the negative pulse, and the energy is stored in the one or more energy storage devices. The battery parameters are monitored and the charging pulse group may be adjusted. |
| US10193365B2 |
Charging pack with flexible attachment members
A charging pack for an electronic device which includes flexible members adapted to snugly attach the charging pack to an electronic device such as a cellular telephone. The flexible members may stretch to capture the corners of the cellular telephone. The flexible members may reside along a back surface of the charging pack in a stowed configuration. The flexible members may stretch over the corners of the charging pack main body to provide protection to the charging pack. |
| US10193364B2 |
Electronic cigarette and method for reminding charging therein
The invention is related to an electronic cigarette and a method for reminding of charging of an electronic cigarette. The electronic cigarette comprises: a microcontroller, a charging prompt module, a power detection module and a power supply battery, wherein the power detection module is configured for detecting the remaining capacity of the power supply battery and sending the value of the remaining capacity to the microcontroller, the microcontroller is configured for comparing the received value of remaining capacity with a preset value, and controlling the charging prompt module to send a charging prompt signal when the value of the remaining capacity is lower than the preset value. The beneficial effects are to remind a user of insufficient remaining capacity of a power supply battery in time, to effectively avoid the situation where a user cannot use an electronic cigarette due to the power supply battery is used up. |
| US10193363B2 |
Hybrid coupling for a smart battery system
A hybrid coupling for a smart battery system having two internal batteries. The hybrid power coupling includes a power coupling for connecting to the batteries and a data coupling for connecting with two bus devices that are also within the battery housing. The contacts of the digital data coupling are disposed in a circular configuration within the mating jack of the hybrid coupling. The data contacts are concentric with the D.C. battery contacts. The data contacts are retractable to automatically and selectively connect to a variety of battery-mounted jacks. |
| US10193360B2 |
Uninterruptible power supply receptive to different types of output modules
An uninterruptible power supply (UPS) includes a first battery set and a second battery set. The UPS includes a charging circuit to charge the battery sets using alternating current (AC) power. The UPS includes a slot receptive to insertion of different types of output modules that each include an inverter to convert direct current (DC) power from the first and second battery sets, including a first type that connects the first and second battery sets in parallel and a second type that connects the battery first and second sets in series. |
| US10193357B2 |
Energy storage system
An energy storage system having battery building blocks which contribute load current to the output of the energy storage system. A system controller provides functional control of the energy storage system and communication to an external host, a system charger charges cells in the battery building blocks and an interface provides a separate connection for at least two battery building blocks to allow the at least two battery building blocks to be separately removed from the energy storage system. The system controller diverts the flow of current from a charger to provide a contribution to the load current in place of the contribution to the load current from the battery building block being replaced to allow said battery building block to be replaced whilst the energy storage system is in operation. The system may also be used to charge battery building blocks based upon their capacity and charging profile using an integral charger located within the energy storage system which is able to provide the requisite charge level and charging profile to respective battery building blocks. |
| US10193355B2 |
Electric power supply system
An electric power supply system includes a first power storage, a second power, an input, and a processor. Information including priority information is to be input through the input. The processor is configured to determine whether the first power storage is charged up to a first target residual capacity and the second power storage is charged up to a second target residual capacity by a timing at which at least one of the first power storage and the second power storage starts discharging. The processor is configured to charge either one of or both of the first power storage and the second power storage according to the priority information when it is determined that the first power storage is not charged up to the first target residual capacity and/or the second power storage is not charged up to the second target residual capacity by the timing. |
| US10193353B2 |
Guided surface wave transmission of multiple frequencies in a lossy media
Disclosed are various embodiments for transmitting energy at multiple frequencies via a guided surface wave along the surface of a lossy medium such as, e.g., a terrestrial medium by exciting a guided surface waveguide probe. |
| US10193352B2 |
Wireless power transmission apparatus
A wireless power transmission apparatus is described that comprises a mounting member, an upper transmission coil disposed on the mounting member, and first and second terminals disposed in the mounting member. The upper transmission coil comprises an outer coil part connected to the first terminal and formed in one-turn with respect to a central axis between the first and second terminals, a first inner coil part connected to the outer coil part and formed in a half-turn on a first side of the central axis, a second inner coil part connected to the first inner coil part, formed in a half-turn on a second side of the central axis, a third inner coil part connected to the second inner coil part, formed in a half-turn on the first side of the central axis, and a fourth inner coil part connected to the third inner coil part and the second terminal, formed in a half-turn on the second side of the central axis. |
| US10193346B2 |
Interface for renewable energy system
An improved interface for renewable energy systems is disclosed for interconnecting a plurality of power sources such as photovoltaic solar panels, windmills, standby generators and the like. The improved interface for renewable energy systems includes a multi-channel micro-inverter having novel heat dissipation, novel mountings, electronic redundancy and remote communication systems. The improved interface for renewable enemy systems is capable of automatic switching between a grid-tied operation, an off grid operation or an emergency power operation. |
| US10193345B2 |
System and method for managing the power output of a photovoltaic cell
A solar cell management system for increasing the efficiency and power output of a solar cell and methods for making and using the same. The management system provides an electric field across an individual solar cell, an array of solar cells configured as a panel, or a group of solar panels. The imposed electric field exerts a force on both the electrons and holes created by light incident on the solar cell and accelerates the electron-hole pairs towards the electrodes of the solar cell. Compared to conventional solar cells, these accelerated electron-hole pairs travel a shorter distance from creation (by incident optical radiation) and spend less time within the solar cell material, therefore the electron-hole pairs have a lower likelihood of recombining within the cells' semiconductor's material. This reduction in the electron-hole recombination rate results in an overall increase in the solar cells' efficiency and greater power output. |
| US10193342B2 |
Method and device for controlling power generators of a subgrid within an interconnected grid
Disclosed is a subnetwork controller for a subnetwork within an interconnected grid. The controller controls power generators, subnetworks, or loads of the subnetwork in accordance with sensor-captured internal measured variables and sensor-captured external measured variables as well as external controlled variables of the subnetwork in such a way that a dynamic behavior of the subnetwork in relation to its adjacent subnetworks corresponds to a defined desired behavior. |
| US10193336B2 |
ESD protection circuit, differential transmission line, common mode filter circuit, ESD protection device, and composite device
An ESD protection device includes a first terminal and a second terminal defining a first balanced port, a third terminal and a fourth terminal defining a second balanced port, and a ground terminal. A first coil and a third coil are provided between the first terminal and the third terminal to cancel an inductance component of a first ESD protection circuit. A second coil and a fourth coil are provided between the second terminal and the fourth terminal to cancel an inductance component of a second ESD protection circuit. |
| US10193335B2 |
Radio frequency surge protector with matched piston-cylinder cavity shape
A surge protector includes a housing defining a cavity and having an axis. The surge protector also includes first and second center conductors positioned within the cavity at the axial ends of the housing. The surge protector also includes an inner coupler positioned within the cavity, having a center portion, and being coupled to the first center conductor. The surge protector also includes an outer coupler positioned within the cavity, having an inner surface that defines a volume for receiving a portion of the center portion of the inner coupler, and coupled to the second center conductor. The surge protector also includes a first dielectric material positioned between the center portion and the inner surface. The surge protector also includes a first spiral inductor positioned within the cavity, having an outer curve and an inner curve, and being coupled to the first center conductor or the second center conductor. |
| US10193334B2 |
Apparatuses and method for over-voltage event protection
Circuits, integrated circuits, apparatuses, and methods, such as those for protecting circuits against electrostatic discharge events are disclosed. An example apparatus comprises a thyristor coupled to a node and configured to limit the voltage and discharge the current associated with an over-voltage event at the node. The over-voltage event includes a negative voltage having a magnitude that exceeds a trigger voltage of the thyristor. The example apparatus further comprising a transistor coupled to the thyristor and configured to adjust the magnitude of the trigger voltage. |
| US10193332B2 |
ESD protection device
There is provided an ESD protection device that can have an advantageously low discharge inception voltage. An ESD protection device having a substrate, first and second discharge electrodes provided somewhere on the substrate with their respective distal ends facing each other with a gap therebetween, and a high-dielectric-constant layer having a relative dielectric constant higher than that of the substrate. |
| US10193329B2 |
Wave-making mechanism
A mounting rack for supporting a wave-making mechanism in a pool includes a connecting bracket coupled to a side wall of the pool. The connecting bracket includes a support bracket with an adjustable opening configured to receive an upper portion of the pool and at least one connecting bar configured for vertical adjustment along the side wall of the pool. The mounting rack further includes a suspension bracket operably coupled to the connecting bracket and configured to support the wave-making mechanism in the pool, and a bottom surface of the wave-making mechanism is generally parallel to a bottom surface of the pool. |
| US10193328B2 |
Method and system for protecting transformers from internal fire
A system and method for preventing a transformer from catching the fire due to internal faults is provided. The system includes a first set of sensors, a timer connected to the first set of sensors, a first breaker, a set of relays and a controller. The first set of sensors is configured to sense the generation of arc. As soon as the arc is detected, incoming supply to the transformer is isolated and the timer is triggered for a pre-determined time to measure the duration for which the faulty condition is persisting in the transformer. This faulty condition will be sensed through the set of relays. When such an abnormal condition persists for a duration set on the trigger of the system, beyond which the controller issues a signal to isolate the power supply. A method of using the system for preventing fire due to internal faults is also disclosed. |
| US10193327B2 |
Safety control method and device for system with precharging circuit, and system thereof
The object of the present application is to ensure the security of a device when a precharging relay is not closed and a load current passes through a precharging resistor, so as to ensure the customer's security. Provided is a security control method for a system with a precharging circuit, comprising: giving out an error alarm and stopping operating the system when the number of times of undervoltage of a precharging circuit achieves m times and the duration between the first undervoltage and the mth undervoltage is less than or equal to τ seconds, where m and τ are positive integers. Compared with the previous method, the present invention has the following advantages of no danger of combustion and high reliability; and cost saving and no need of adding additional hardware. |
| US10193325B2 |
Controlled power-up scheme for an electronic trip unit, and circuit interrupter employing same
A power supply circuit for a trip unit of a circuit interrupter includes a current transformer, a startup circuit receiving a regulated voltage and a DC/DC converter. The startup circuit is structured to: (i) burden the current transformer with an impedance approximating the trip unit and cause the DC/DC converter to enter the shutdown mode when the regulated voltage is below a predetermined value, (ii) remove the burden and cause the DC/DC converter to exit the shutdown mode and provide power to the trip unit responsive to the regulated voltage reaching the predetermined value, and (iii) remove the burden and cause the DC/DC converter to exit the shutdown mode and provide power to the trip unit responsive to a rate of change of the regulated voltage being at least a predetermined level. |
| US10193318B1 |
Efficient installation electrical hardware system and method of use
An improved installation system for electrical hardware, such as power outlets, electrical switches, light fittings, ceiling fans and the like, whereby the cutting of their installation access holes in drywall panels is accomplished much faster than prior art methods and with a high degree of accuracy by the use of the hole cutting system, comprising the magnetic block assembly, corresponding magnetic template assembly and the hole cutter. In conjunction with the aforementioned; the electrical hardware's associated electrical boxes are wired directly to their electrical supply and the hardware is in turn, electrically connected to them by their respective sets of electrical terminals which make simultaneous contact with each other upon their installation. Additionally, the latching pawl mechanism and alignment device supports the weight of heavy light fittings and ceiling fans and aligns their electrical connections while they're being fixed into their installed position. These features taken together make this improved installation system substantially superior to all prior art. |
| US10193310B2 |
Low power edge-emitting laser diode and laser diode module
A low power, side-emitting semiconductor laser diode is provided. The laser diode is formed from a semiconductor heterostructure having an active layer sandwiched between an n-type layer and a p-type layer, wherein the active layer forms a gain medium of width W. Front and back reflectors of reflectivity Rf and Rb are arranged on opposing side facets of the semiconductor heterostructure part to form a cavity of length L containing at least a part of the active layer which thus forms the gain medium for the laser diode, the gain medium having an internal loss αi. To achieve stable, low power operation close to threshold, the laser diode is configured with the following parameter combination: width W: 1 μm≤W≤2 μm; cavity length L: 100 μm≤L≤600 μm; internal loss αi: 0 cm−1≤αi≤30 cm−1; back reflectivity Rb: 100≥Rb≥80%; and front reflectivity Rf: 100≥Rf≥60%. |
| US10193309B1 |
Method of manufacture for an ultraviolet laser diode
A method for fabricating a laser diode device includes providing a gallium and nitrogen containing substrate member comprising a surface region, a release material overlying the surface region, an n-type gallium and nitrogen containing material; an active region overlying the n-type gallium and nitrogen containing material, a p-type gallium and nitrogen containing material; and a first transparent conductive oxide material overlying the p-type gallium and nitrogen containing material, and an interface region overlying the first transparent conductive oxide material. The method includes bonding the interface region to a handle substrate and subjecting the release material to an energy source to initiate release of the gallium and nitrogen containing substrate member. |
| US10193305B2 |
Wavelength tunable laser device and laser module
A wavelength tunable laser device includes: a laser cavity formed of a grating and a reflecting mirror including a ring resonator filter; a gain portion; and a phase adjusting portion. The grating creates a first comb-shaped reflection spectrum. The ring resonator filter includes a ring-shaped waveguide and two arms and creates a second comb-shaped reflection spectrum having peaks of a narrower full width than peaks in the first comb-shaped reflection spectrum at a wavelength interval different from that of the first comb-shaped reflection spectrum. One of the peaks in the first comb-shaped reflection spectrum and one of the peaks in the second comb-shaped reflection spectrum are overlapped on a wavelength axis, and a spacing between cavity modes is narrower than the full width at half maximum of the peaks in the first comb-shaped reflection spectrum. |
| US10193294B2 |
Light emitting device
A light emitting device includes a base member, a laser element, a retaining member, a fluorescent member, and first and second fixing members. The retaining member has a first surface on a laser element side and a second surface not on the laser element side. The fluorescent member is fixed to a through hole of the retaining member. The first and second fixing members clamp the retaining member. The first and second fixing members have first and second contact surfaces in contact with the first and second surfaces of the retaining member, respectively. A distance between the first and second contact surfaces becomes smaller as the first and second contact surfaces become farther from the through hole. The retaining member, the first and second fixing members are arranged such that a space surrounded by the retaining member, and the first and second fixing members exists around the retaining member. |
| US10193292B2 |
Jig and press-fitting device comprising this jig
Provided are a jig and a press-fitting device that are capable of suppressing buckling during the press-fitting process. The jig has a jig unit in which a plurality of metal plate-shaped bodies for installing a press-fit terminal onto a substrate are combined. The jig unit includes a movable guide member having a guide groove through which a terminal main body can pass; an insertion punch having a punch groove corresponding to the guide groove, and having a pressing section formed therein; and a rear surface plate body. The movable guide member and the rear surface plate body are attached so as to be vertically movable relative to the insertion punch and, while the press-fit section is being press-fitted into the substrate by the insertion punch, the movable guide member and the rear surface plate body move upward relative to the insertion punch after the lower sides thereof abut to the substrate. |
| US10193291B2 |
Rotary crimping tool assembly
A rotary crimping tool assembly includes a tool housing defining a crimping chamber, and one or more crimp wheels within the crimping chamber. The crimping chamber is configured to receive the portion of the structure in proximity to the crimp wheel(s). The crimp wheel(s) are configured to be pressed into and rotated relative to the portion of the structure to form one or more crimps in the portion of the structure. |
| US10193288B2 |
Snap button fastener providing electrical connection
Embodiments are generally directed to a snap button fastener providing electrical connection. An embodiment of a fastener includes a first mechanical part, the first mechanical part including at least a stud portion, the first mechanical part including a first electrical connector; a second mechanical part, the second mechanical part including at least a socket portion with a spring element and the socket portion, the second mechanical part including a second electrical connector. The stud portion of the first mechanical part and the socket portion of second mechanical part, if separated, are to interlock upon the application of a first force towards each other, and, if interlocked, to separate upon the application of a second force away from each other. The first electrical connector and the second electrical connector are to be electrically connected when the first mechanical part and the mechanical part are interlocked, and first electrical connector and the second electrical connector are to be disconnected when the first mechanical part and second mechanical part are separated. |
| US10193287B2 |
Connecting adapter for a connecting terminal assembly
The present disclosure relates to a connecting adapter configured to connect to a terminal assembly. The connecting terminal assembly includes a plurality of electrical connecting terminals. The connecting adapter includes a printed circuit board that includes a comb-type conducting structure. The comb-type conducting structure includes a plurality of comb teeth, and each comb tooth includes an electrical contact surface. The connecting adapter also includes an electrical plug connector interface including a plug connector. The electrical plug connector interface includes electrical terminals electrically connected to the electrical contact surfaces of the comb teeth. The electrical plug connector interface is arranged on the printed circuit board. |
| US10193281B1 |
Electrical connector assembly having a shield assembly
A connector assembly for terminating a cable having a cable shield is provided including an electrically conductive backshell and a shield assembly. The backshell includes a body that extends from a mating end to a cable end along a mating axis. The cable end includes a cable channel that extends through the body and holds an end segment of the cable therein. The connector assembly includes a shield assembly having a clamp system that is held within the cable end of the backshell and includes front and rear clamping members. The cable shield is terminated to the clamp system between the front and the rear clamping members. The connector assembly includes an EMI gasket that is electrically coupled to the backshell and held within the cable end of the backshell. The EMI gasket includes a backshell interface that engages the backshell and a clamp interface that engages the clamp system. |
| US10193279B2 |
Extension cord, socket and cover of a socket
The present invention relates to an extension cord comprising a lead having a first end and a second end. The first end comprises a socket having a cover and the second end comprises a plug. The cover is attached to the socket by a hinged joint possessing a force which resists opening of the cover. The cover comprises a retainer. The present invention also relates to a socket having a cover and a cover of a socket. |
| US10193274B2 |
Electronics module extraction feedback system
An assembly for attaching and detaching an electronics module from a base includes a feedback assembly that provides an operator with tactile feedback on the relative positioning of the module with the base during attachment or detachment of the module to or from the base. The feedback assembly includes cams on the electronics module and a follower attached to an end of a spring arm on the base. The spring arm forms a portion of a wall that guides movement of the module along the base during attachment or detachment of the module. |
| US10193273B2 |
Plug-in connection having a locking element
The invention relates to a plug-in connection, comprising a plug connector having a plug connector housing (1) and comprising a mating plug connector that can be plugged together with the plug connector, wherein the plug connector has a superstructure (4) and the superstructure (4) accommodates a locking element (8) in a preliminary latching position and a final latching position, wherein the plug connector has first latching means and the locking element (8) has first latching means corresponding thereto and the mating plug connector has further latching means and the locking element (8) has further latching means corresponding thereto, wherein the locking element (8) is first fastened to the plug connector in the preliminary latching position by means of the first latching means corresponding to each other before the mating plug connector is inserted into the plug connector, and the further latching means corresponding to each other are actuated by means of the insertion of the mating plug connector into the plug connector, whereby the locking element (8) can be moved into the final latching position thereof, characterized in that the plug connector housing (1) and the locking element (8) have third latching means corresponding to each other, by means of which additional locking of the locking element (8) to the plug connector occurs when the locking element has been moved into the final latching position thereof. |
| US10193271B2 |
Electrical connector having metallic outer cover equipped with transversely linked mounting ears and sealing element secured upon front end region
An electrical connector includes: an insulative housing having a base portion and a tongue portion; plural contacts affixed to the insulative housing and exposed to the tongue portion; an outer cover enclosing the insulative housing, the outer cover having plural peripheral grooves (111) open at a front face thereof; and a sealing element having plural protrusions (421) secured to the plural grooves. |
| US10193270B2 |
Cartridge of gel for a connection set and connection sets comprising such a cartridge of gel
A cartridge includes an outer case, partially filled with electrically insulating gel, and at least one electrically conductive track submerged in the insulating gel. Connection sets including at least one connector half and such a cartridge are also disclosed. |
| US10193268B1 |
SFP cable connector capable of protecting solder joints
An SFP cable connector capable of protecting solder joints includes a lower case, a cable, a circuit board that is soldered with one end of the cable to form a plurality of solder joints, an insulator being formed on the circuit board and covering said solder joints, and an upper case being mounted on the lower case and being capable of pressing the insulator. The SFP cable connector can provide a direct protection for said solder joints by employing the upper case to press the insulator downward, thereby preventing said solder joints between the cable and the circuit board from being damaged and ensuring the quality of the SFP cable connector. |
| US10193267B2 |
Multifunction connector
An electrical connector includes a unitary base elongated along a longitudinal direction. A first tongue extends forwardly from the base and has a uniform thickness along the longitudinal direction. The first tongue comprises a plurality of spaced apart first contacts. A second tongue extends forwardly from the base and comprises a plurality of spaced apart second contacts. The first and second tongues define a gap therebetween that extends from a front edge of one of the first and second tongues toward the unitary base. |
| US10193266B1 |
Electrical connector device
An electrical connector device of the present invention is characterized that a shell is disposed at a second opening of a front end of a protective casing of the electrical connector device. The shell is hollow, and a third opening is disposed at a front end of the shell and is used to receive a rear end of a signal terminal housing of the electrical connector device. A second round hole corresponding to a first round hole of a rear end of the protective casing is disposed at a rear end of the shell. As a result, the shell is configured to reinforce strength of the protective casing. A life of use of the electrical connector device is prolonged since the protective casing and the signal terminal housing of the electrical connector device are difficult to be separated when the signal terminal housing is plugged or unplugged. |
| US10193263B2 |
Connector
A connector includes a housing provided with a terminal chamber, a terminal accommodated in the terminal chamber and having a terminal-connecting portion and a wire-connecting portion, and a locking lance flexibly provided in the terminal chamber and having a locking portion. A plate portion is provided in the terminal-connecting portion. A hole portion is provided in the plate portion. An engagement surface to be engaged with the locking portion is provided on an edge portion of the hole portion. Chamfered portions are provided at edges of the hole portion on both sides of the engagement surface, and are inclined toward an inside of the hole portion. Supplemental engagement surfaces to be engaged with the locking portion in a detachment direction of the terminal from the terminal chamber are provided at parts of the engagement surface where the chamfered portions are located. |
| US10193262B2 |
Electrical device having an insulator wafer
An electrical device includes a substrate having a signal contact and a ground contact along a surface of the substrate. The electrical device also includes an insulator wafer having a front surface, a rear surface, and an opening, the front surface facing the signal contact. A communication cable includes a signal conductor, an insulator surrounding the signal conductor, and a shield layer that surrounds the insulator. The insulator and the shield layer have substantially coplanar terminating ends, and a terminating end of the signal conductor extends beyond a terminating end of the insulator. The signal conductor has a terminating end that projects through the opening of the insulator wafer to electrically couple with the signal contact. The insulator wafer electrically blocks the shield layer from the signal conductor and the signal contact. |
| US10193261B2 |
Genderless electric terminals for vehicles
Method and apparatus are disclosed for genderless electric terminals of vehicles. An example genderless electric terminal includes a first arm, a second arm opposite the first arm, and a wall integrally connecting the first arm and the second arm to define a slot. The example genderless electric terminal also includes a first flexible contact extending from an end of the first arm and protruding into the slot to engage a first arm of a different genderless electric terminal that is inserted into the slot. |
| US10193260B1 |
Multi-contact connector
A multi-contact connector includes terminals, which each include a first contact piece section, which has a first contact section, which achieves pressing contact with a pin terminal in a first direction, and a first elastic arm, which extends in a direction that intersects the first direction and displaceably supports the first contact section, and a second contact piece section, which has a second contact section, which achieves pressing contact with the pin terminal in the first direction, and a second elastic arm, which displaceably supports the second contact section. The second elastic arm extends in the first direction, which intersects the direction in which the first elastic arm extends, and an end portion of the second elastic arm or the end portion in the extending direction, that is, the front end facing the first elastic arm is formed as a spring piece linked to the second contact section. |
| US10193259B1 |
Receptacle connector housing with hold-down ribs
A receptacle connector includes a housing and a terminal held within a cavity of the housing. The housing includes a top wall, a bottom wall, and first and second side walls. The housing includes a first hold-down rib in a first corner region of the cavity defined by the top wall and the first side wall, and a second hold-down rib in a second corner region of the cavity defined by the top wall and the second side wall. The terminal defines a receptacle configured to receive a mating tab contact therein through a mating end of the housing. The first hold-down rib engages an outer surface of a first rolled wall of the terminal and the second hold-down rib engages an outer surface of a second rolled wall of the terminal to limit float of the terminal within the cavity. |
| US10193258B2 |
Two piece clean body female electric terminal
A female electrical terminal includes a contact piece and a spring piece. The contact piece includes contact arms that extend from a contact base on opposite sides of a terminal axis in an insertion direction to respective arm ends. The contact piece also includes at least one contact latch. The spring piece includes spring arms that extend from a spring base on opposite sides of the terminal axis. The spring arms bias the contact arms toward the terminal axis. The spring piece also includes at least one engagement tab that extends from the spring base. The engagement tab includes a spring latch that is engaged with the contact latch to prevent movement of the spring piece relative to the contact piece in the insertion direction. |
| US10193257B1 |
Connection terminal
A connection terminal includes a terminal main body having a female connector provided with an internal space into which a male connector is inserted and a contact member accommodated into the internal space. The contact member has at least one first locked part and at least one second locked part. The female connector has a first locking part that is arranged on a side in an insertion direction of the male connector and locks the movement of the first locked part in the insertion direction, and a second locking part that is arranged on a side opposite to the side in the insertion direction relative to the second locked part of the contact member after the completion of being accommodated and locks the movement of the second locked part in a removal direction in order to maintain the accommodated state of the contact member. |
| US10193252B2 |
Electronic component and imaging device
In an accommodation hole of a dielectric, an external connection terminal, a board connection terminal, and a first coil spring that make up an internal conductor are disposed compactly in a straight line along the hole axis of the accommodation hole. Therefore, an external connection connector can be reduced in size in the radial direction, the projected area on a second board can also be reduced, and it is possible to contribute to the reduction in size of the entire imaging device by the reduction in size of the second board. |
| US10193251B2 |
Next generation form factor (NGFF) carrier
A Next Generation Form Factor (NGFF) carrier includes a flat component perpendicularly connected to two flat side components to receive an NGFF module, a bar rotatably connected to the two flat side components, and a number of holds along an interior of the flat component to receive a fastener. The NGFF module is insertable in relation to the flat component when the bar is rotated to a first position and fixed on the flat component when the bar is rotated to a second position. |
| US10193250B2 |
Substrate and terminals for power module and power module including the same
According to example embodiments, a substrate for a power module includes a first part, a second part, and a third part on a same surface of an underlying part of the substrate. The first part, the second part, and the third part may be spaced apart from each other, electrically insulated from each other, and not directly contacting each other. The third part may surround the first part and the second part. A first element module may be on the third part. The first part, the second part, and the third part may be conductive. |
| US10193249B2 |
Connector component and retention mechanism for M.2 form factor module
In one example in accordance with the present disclosure, a connector component is provided. The connector component includes a first connector portion comprising a plurality of contacts to couple with a printed circuit board, and a second connector portion comprising a plurality of contacts to couple with an M.2 form factor module. The second connector portion is to receive the M.2 form factor module in an upright orientation such that neither a front surface nor a rear surface of the M.2 form factor module substantially faces the printed circuit board. In addition, the second connector portion is to retain the M.2 form factor module in the upright orientation without a retention mechanism external to the connector component. |
| US10193247B1 |
Electrical contact spring with extensions
An electrical terminal assembly includes a contact member. The contact member has a contact base. A plurality of contact arms extend from the contact base in an arm direction. The electrical terminal assembly includes a spring member supported on the contact member. The spring member includes a spring base. A plurality of spring arms extend from the spring base in the arm direction. The spring arms engage the plurality of contact arms. The spring member includes a shroud. The shroud extends in the arm direction around and beyond the contact arms. A shroud extension extends from the shroud opposite the arm direction. The shroud extension engages the contact base. |
| US10193246B1 |
Multipurpose socket for electrical utility repair application
A socket for mating with the eyelet of a hot line clamp, an eye nut, an eye bolt, and a wing nut, the socket defining two slots for straddling and axially-rotating a bolt of the hot line clamp to tighten or loosen the hotline clamp. |
| US10193244B2 |
Push-in clamp retainer, push-in clamp assembly and electric connector element
The invention relates to a push-in clamp retainer for an electric connector element with a lead wire receptacle which is at least partly encircled by a surrounding wall. In a lateral direction, a push-in clamp assembly includes such a push-in clamp retainer and a separate spring member having a first end and second end, The invention also relates to an electric connector element having a spring release member and a push-in clamp assembly. The invention involves the implementation of at least one receiving member into at least one contraction of the push-in clamp retainer, combining such a push-in clamp retainer with a spring member to form the push-in clamp assembly, and adding a spring release member to the push-in clamp assembly to obtain the electric connector element. |
| US10193242B2 |
Printed circuit board based communications plugs that are suitable for field termination and patch cords including such plugs
A communications plug includes a housing, a printed circuit board that is at least partially within the housing, first through eighth plug contacts mounted adjacent a front edge of the printed circuit board, and first through eighth wire connection terminals having insulation cutting blades, where at least some of the insulation cutting blades are mounted rearwardly of a rear edge of the printed circuit board. |
| US10193241B2 |
Fixing structure and fixing method
A fixing method for fixing a terminal to a conductive pattern with a brazing filler metal disposed therebetween includes: a first step of disposing the brazing filler metal on the conductive pattern; a second step of bringing the terminal into contact with the brazing filler metal; and a third step of forming a penetrating hole in the terminal by irradiating a laser beam onto the terminal. In the third step, the laser beam is irradiated onto the terminal in such a manner that the penetrating hole is filled with the brazing filler metal melted by the irradiation of the laser beam. |
| US10193240B2 |
Partitioned phased array fed reflector antenna system
Systems and methods for partitioned phased array fed (PAFR) antennas are disclosed. The phased array in a PPAFR antenna is partitioned into multiple partitions of antenna elements that can be operated by corresponding beam forming networks configured to independently and simultaneously generate angularly offset static and dynamic spot beams patterns. The generated spot beam patterns can include transmission and receiving spot beams for establishing a number of pathways. |
| US10193237B1 |
Multi-fin flared radiator
In one embodiment, the present disclosure describes a flared antenna where the upper portions of the prongs are separated into a plurality of spaced apart parallel fins. The parallel fins disposed on the energized prong are energized by a common electrical feed, such as a coaxial transmission line that enters the energization region of the energized prong. The use of separate fins allows a wider range of tuning to gain greater BW and scan performance for a given equivalent design, since each fin pair may be designed independently from the other fin pairs in that flared antenna. The flared antenna may be a Vivaldi antenna, a stepped notch antenna or some other flared shape. |
| US10193236B1 |
Highly isolated sector antenna for concurrent radio operation
Network hardware devices organized in a Wireless mesh network (WMN) in which the network hardware devices cooperate in distribution of content files to client consumption devices without Internet connectivity are described. One mesh network device includes a housing with a first sector defined by a first recessed region between a first reflective wall, a second reflective wall, and a third reflective wall, and a second sector defined by a second recessed region between a fourth reflective wall, a fifth reflective wall, and a sixth reflective wall. A first antenna, such as a phased array dipole antenna, is disposed inside the first recessed region. A first radio, which is coupled to the first antenna, causes the first antenna to radiate electromagnetic energy in a first frequency range and the first, the second, and the third reflective walls collectively reflect the electromagnetic energy, radiated by the first antenna, in a first direction away from the housing. |
| US10193225B2 |
Beam forming network for feeding short wall slotted waveguide arrays
An example method for a beamforming network for feeding short wall slotted waveguide arrays. The beamforming network may include six beamforming network outputs, where each beamforming network output is coupled to one of a set of waveguide inputs. Further, the beamforming network may include a cascaded set of dividers configured to split electromagnetic energy from a beamforming network input to the six phase-adjustment sections. The cascade may include a first level of the cascade configured to split the electromagnetic energy from the beamforming network input into two first-level beamforming waveguides, a second level configured to split the electromagnetic energy from each of two first-level beamforming waveguides into two respective second-level beamforming waveguides, and a third level of the cascade configured to split the electromagnetic energy from one of two respective second-level beamforming waveguides into two respective third-level beamforming waveguides. |
| US10193219B2 |
System and method for reconfigurable polymer antenna
An antenna includes an ion exchange material and at least one polymer member coupled to a communication circuit. The at least one polymer member is configured to, responsive to receiving a bias voltage, interact with the ion exchange material to change electrical conductivity of the at least one polymer member. |
| US10193216B2 |
Electronic device with component trim antenna
An optical component such as a camera, an acoustic component such as a speaker, or other electrical component may be mounted on the surface of an electronic device housing. A window structure may overlap the component. The window structure may be formed form an optically transparent material to allow light to pass or may be formed from an acoustically transparent material to allow acoustic signals to pass. A conductive structure such as a metal member may surround at least part of the periphery of the window structure. The conductive structure may serve as an antenna structure for an antenna. Radio-frequency transceiver circuitry may be coupled to an antenna feed for the antenna using a radio-frequency transmission line. The conductive structure may serve as a cosmetic trim for the electrical component. |
| US10193212B2 |
Digital tacho graph apparatus having embedded radio frequency antenna
A digital tacho graph (DTG) apparatus for vehicles is disclosed. The DTG apparatus includes a metal terminal having one end connected to a printed circuit board (PCB) pattern unit connected to the wireless communication module, an RF antenna embedded inside the DTG apparatus and having one end connected to the other end of the metal terminal, and a front case unit, on which the other end of the RF antenna is formed by patterning, the front case unit serving as a front case of the DTG apparatus and enclosing the RF antenna inside the DTG apparatus. The wireless communication module and the embedded RF antenna are integrated, thereby reducing working time, increasing transmission and reception sensitivity, and reducing cost. |
| US10193211B2 |
Smartcards, RFID devices, wearables and methods
Coupling frames comprising a conductive (metal) surface with a slit (S) or non-conductive stripe (NCS) extending from an outer edge to an inner position thereof, and overlapping a transponder device. A coupling frame with slit for coupling with an inductive or capacitive device (inductor or capacitor) may be used at any ISM frequency band to concentrate surface current around the slit. The coupling frame can be tuned to operate at a frequency of interested by introducing a resistive, inductive or capacitive element. The resonance frequency of the coupling frame can be matched to that of the transponder chip module to achieve optimum performance. Coupling frames with or without a transponder device may be integrated, overlapping, stacked or placed adjacent to one another to enhance system performance. Multiple coupling frames may be electrically isolated from one another by the application of a dielectric coating such Diamond Like Carbon (DLC). |
| US10193210B2 |
Terminal device having hybrid antenna integrating with capacitive proximity sensors
A terminal device having hybrid antenna integrating with capacitive proximity sensors comprises a ground, a radiator, a first capacitance electrode and a second capacitance electrode. The radiator has a feeding portion, a low-frequency radiating path and a high-frequency radiating branch. The low-frequency radiating path has a first coupling portion. The feeding portion is disposed between the first coupling portion and the ground. The high-frequency radiating branch acts as a second coupling portion. The first capacitance electrode has a first shorting portion and a first electrode portion. The first shorting portion is connected to the ground. The first electrode coupling with the first coupling portion generates a first coupling resonant mode. The second capacitance electrode has a second shorting portion and a second electrode portion. The second shorting portion is connected to the ground. The second electrode coupling with the high-frequency radiating branch generates a second coupling resonant mode. |
| US10193208B2 |
Wireless distribution using cabinets, pedestals, and hand holes
Novel tools and techniques are provided for implementing antenna structures to optimize transmission and reception of wireless signals from ground-based signal distribution devices, which include, but are not limited to, cabinets, pedestals, hand holes, and/or network access point platforms. Wireless applications with such devices and systems might include, without limitation, wireless signal transmission and reception in accordance with IEEE 802.11a/b/g/n/ac/ad/af standards, UMTS, CDMA, LTE, PCS, AWS, EAS, BRS, and/or the like. In some embodiments, an antenna might be provided within a signal distribution device, which might include a container disposed in a ground surface. A top portion of the container might be substantially level with a top portion of the ground surface. The antenna might be communicatively coupled to at least one conduit, at least one optical fiber line, at least one conductive signal line, and/or at least one power line via an apical conduit system installed in a roadway. |
| US10193207B2 |
Substrate for supporting antenna pattern and antenna using same
The present invention relates to a substrate for supporting an antenna pattern. The substrate includes a porous anodic oxide layer having a plurality of pores formed by anodizing metal. A metallic material is filled in at least a part of the pores. |
| US10193204B2 |
Combiner, a power directional coupler and a method for manufacturing a power directional coupler and a combiner
A power directional coupler is described which comprises two hollow conductors and a separation wall. Said separation wall has a coupling portion which comprises several holes which are arranged in said separation wall such that a high hole-wall relation is obtained, ensuring a good coupling at a small size of said power directional coupler. Further, a combiner and a method for manufacturing said power directional coupler and a combiner are described. |
| US10193201B2 |
System and method for controlling operation of a metal-air battery
A system and method for controlling operation a metal-air battery are provided. A system and method for controlling operation a metal-air battery may include controlling a current drawn from the battery; and controlling a temperature of the battery. A system and method may draw a preconfigured amount of power from a metal-air battery, and draw power from a rechargeable device when power required is greater than the preconfigured power. |
| US10193199B2 |
Battery system
A battery system is disclosed herein that includes a battery enclosure and a battery assembly contained within or substantially surrounded by the enclosure. The enclosure may include enclosure walls having fluid pathways defined therein. In an example, enclosure walls are formed from multiple instances of a repeating modular wall component. A cooling fluid may be circulated through the fluid pathways to provide thermal regulation of the battery assembly. The battery assembly may include one or more electric batteries. An example battery assembly includes a plurality of batteries that are organized into rows. These rows of batteries may be electrically interconnected with each other by electrically conductive strips to form a battery pack. The battery system may be used to provide energy storage within the context of automotive applications or other electronic systems. |
| US10193197B2 |
Battery device
To provide a battery device including a battery; a first cooling system having a first cooling fan and a first temperature sensor; a second cooling system having a second cooling fan and a second temperature sensor; and a controller, wherein the controller carries out abnormality determination with respect to a temperature sensor when a difference between the first cooling air temperature and the second cooling air temperature, detected by the first temperature sensor and the second temperature sensor, respectively, after elapse of a predetermined set period after a start switch of the vehicle is turned off while the first cooling fan and the second cooling fan remain stopped, is equal to or greater than a predetermined amount. |
| US10193193B2 |
Structure of battery protection circuit module package coupled with holder, and battery pack having same
A battery pack includes a battery protection circuit module package coupled with a holder. The protection circuit module includes a basic package including a lead frame having a plurality of leads spaced apart from each other, and protection circuit elements provided on the lead frame, and an encapsulant and a holder simultaneously produced by disposing the basic package in a first injection mold and injecting a resin melt into the first injection mold to perform an insert injection molding process. The encapsulant encapsulates the protection circuit elements to expose parts of the lead frame, wherein the encapsulant and the basic package configure the battery protection circuit module package, and wherein the holder is coupled to the battery protection circuit module package due to the insert injection molding process. |
| US10193192B2 |
Structure for modulating the voltage of a battery and the active equilibration thereof
A battery of accumulators including a plurality of power storage cells and an electrical network which connects the cells to one another. The cells are grouped together in composite cells including two identical branches each including at least one cell and the composite cells being connected in series to one another. The electrical network includes: a mechanism for parallel or connection in series of the cells of each composite cell, and a mechanism for controlling the connection mechanism, which is configured to connect the cells of each composite cell in parallel or in series to adapt an output voltage of the battery of accumulators to a desired value and to balance charging states of the cells. |
| US10193184B2 |
Lithium ion secondary battery and method for manufacturing same
A method for manufacturing a lithium ion secondary battery, the lithium ion secondary battery including a positive electrode and a negative electrode disposed with a separator sandwiched therebetween and contained together with an electrolytic solution in an outer case including a flexible film, wherein the quantity of dissolved nitrogen in the electrolytic solution in injecting the electrolytic solution into the outer case is 100 μg/mL or less. |
| US10193176B2 |
System and method for production of ultra-pure hydrogen from biomass
The disclosure provides a system and method for synthesizing ultra-pure hydrogen from biomass waste. The present invention comprises a gasifier, an oils and tars filter, a steam generator, a water gas shift reactor (“WGS”), a heat-exchange two-phase water separator, a scrubber, a hydrogen separator, and fluid conduits in fluid communication with the various system components, which together convert hydrocarbon-based biomass, e.g., woodchips, into ultra-pure hydrogen gas. Fluid conduits connect the gasifier and the steam generator, separately, to the WGS, the WGS to the two-phase separator, the two-phase separator to the scrubber, and the scrubber to the hydrogen separator, which further comprises an outlet port through which hydrogen gas may flow free of carbon monoxide. The hydrogen may flow to a device that utilizes hydrogen to generate energy, such as a hydrogen fuel cell or to an internal combustion engine. |
| US10193173B2 |
Electrochemical hydrogen sensor for global/local hydrogen starvation detection in PEM fuel cells
A fuel cell stack hydrogen starvation detection device, a fuel cell system and a method of operating a fuel cell stack to protect it from hydrogen starvation conditions. In one particular form, the fuel cell system includes a stack of fuel cells, a controller and a detection device made up of one or more sensors that can compare a reference signal corresponding to the presence of substantially pure hydrogen to a signal that corresponds to a local hydrogen value within a single fuel cell within the stack or across multiple fuel cells within the stack. In this way, the detection device promptly provides indicia of a hydrogen starvation condition within the cell or stack without the need for conventional cell voltage monitoring. The detected hydrogen starvation condition may be presented as a warning signal to alert a user that such a condition may be present, as well as to the controller for modification of the stack operation. |
| US10193172B2 |
Method for starting up a fuel cell
The invention relates to a method (40) for starting up a fuel cell (11), wherein hydrogen is introduced into an anode chamber (15) of the fuel cell (11), and at the beginning of the start-up process oxygen is present in the anode chamber (15) of the fuel cell (11). According to the invention, at the beginning of the hydrogen introduction stage enough hydrogen is introduced to ensure that upon entry into the anode chamber (15) hydrogen and oxygen are present in no more than a stoichiometric ratio. |
| US10193168B2 |
Fuel cell system
A fuel cell system that generates electric power by supplying anode gas and cathode gas to a fuel cell includes a control valve adapted to control the pressure of the anode gas to be supplied to the fuel cell; a buffer unit adapted to store the anode-off gas to be discharged from the fuel cell; a pulsation operation unit adapted to control the control valve in order to periodically increase and decrease the pressure of the anode gas at a specific width of the pulsation; and a pulsation width correcting unit adapted to correct the width of the pulsation on the basis of the temperature of the buffer unit. |
| US10193162B2 |
Electrode catalyst and method for producing the same
An electrode catalyst obtained by calcining a metal phthalocyanine polymer having a repeating structural unit obtained by the amide bonding of a structural unit represented by general formula (1a) to a structural unit represented by general formula (2a) to form a calcined body, then treating the calcined body with an acid. Formula (1a) (wherein L is a divalent or trivalent metal ion belonging to Period 3 to Period 5 on the long-form periodic table.) Formula (2a) (wherein M is a divalent or trivalent metal ion belonging to Period 3 to Period 5 on the long-form periodic table.) |
| US10193161B2 |
Anode for solid oxide fuel cell and production method therefor, and method for producing electrolyte layer-electrode assembly for fuel cell
A method for producing an anode capable of increasing output of a solid oxide fuel cell is provided. The method for producing an anode for a solid oxide fuel cell includes a first step of shaping a mixture that contains a perovskite oxide having proton conductivity and a nickel compound and a second step of firing a shaped product, which has been obtained in the first step, in an atmosphere containing 50% by volume or more of oxygen at 1100° C. to 1350° C. so as to generate an anode. |
| US10193159B2 |
Current collector for secondary battery and secondary battery using the same
A current collector for a secondary battery (1) of the present invention includes a resin layer (2) having electrical conductivity, and an ion barrier layer (3) provided on the surface of the resin layer (2). The ion barrier layer (3) contains ion trapping particles (6) in which metal compounds (5) are provided on the surfaces of metal containing particles (4). The ion trapping particles (6) are continuously provided from an interface (7) between the resin layer (2) and the ion barrier layer (3) toward a surface (3a) of the ion barrier layer (3). Thus, the ion barrier layer (3) prevents from the entry of ions, so that the ion adsorption in the current collector (1) can be decreased. |
| US10193154B2 |
Cathode composition for primary battery
In some examples, a primary battery comprising a cathode comprising at least one active material and at least one of a metal oxide and metal fluoride, wherein the active material exhibits a first discharge capacity and the at least one of metal oxide and metal fluoride exhibits a second discharge capacity at a voltage lower than the first discharge capacity; an anode comprising a metal as an electron source; and an electrolyte between the cathode and anode. The metal reacts with the electrolyte below a third discharge capacity at a voltage lower than the second discharge capacity to form a gas, where the metal reacts with the active material at the first discharge capacity, and, following the consumption of the active material of the cathode, the metal reacts with the at least one of metal oxide and metal fluoride of the cathode prior to reacting with the electrolyte below the third discharge capacity. |
| US10193153B2 |
Positive electrode active material for nonaqueous electrolyte secondary battery
There is provided a positive electrode active material for a nonaqueous electrolyte secondary battery capable of suppressing an increase in DCR during cycles. There is provided a positive electrode active material for a nonaqueous electrolyte secondary battery that includes a secondary particle formed by aggregation of primary particles formed of a lithium transition metal oxide. A rare-earth compound secondary particle formed by aggregation of particles formed of a rare-earth compound adheres to a recess formed between primary particles adjacent to each other on a surface of the secondary particle, and the rare-earth compound secondary particle adheres to both the primary particles adjacent to each other in the recess. A tungsten-containing compound adheres to an interface of primary particles inside the secondary particle formed of the lithium transition metal oxide. |
| US10193141B2 |
Positive electrode mixture and non-aqueous electrolyte secondary battery
An object of the present invention is to provide a positive electrode mixture capable of conducting stable charging and discharging with a less amount of gasses generated which has an operating voltage or an initial crystal phase transition voltage of not less than 4.5 V on the basis of lithium. The present invention relates to a positive electrode mixture comprising carbon black having a bulk density of not more than 0.1 g/cm3, a crystallite size of 10 to 40 Å, an iodine adsorption of 1 to 150 mg/g, a volatile content of not more than 0.1% and a metal impurity content of not more than 20 ppm, and a positive electrode active substance having an operating voltage or an initial crystal phase transition voltage of not less than 4.5 V on the basis of lithium. |
| US10193140B2 |
Positive active material for rechargeable lithium battery and rechargeable lithium battery
A positive electrode for a rechargeable lithium battery includes a positive active material and activated carbon, wherein an average particle diameter of the activated carbon is about 100% to about 160% relative to 100% of an average particle diameter of the positive active material. |
| US10193139B1 |
Redox and ion-adsorbtion electrodes and energy storage devices
Provided herein are energy storage devices comprising a first electrode comprising a layered double hydroxide, a conductive scaffold, and a first current collector; a second electrode comprising a hydroxide and a second current collector; a separator; and an electrolyte. In some embodiments, the specific combination of device chemistry, active materials, and electrolytes described herein form storage devices that operate at high voltage and exhibit the capacity of a battery and the power performance of supercapacitors in one device. |
| US10193137B2 |
Lithium-ion batteries with nanostructured electrodes
Several embodiments related to lithium-ion batteries having electrodes with nanostructures, compositions of such nanostructures, and associated methods of making such electrodes are disclosed herein. In one embodiment, a method for producing an anode suitable for a lithium-ion battery comprising preparing a surface of a substrate material and forming a plurality of conductive nanostructures on the surface of the substrate material via electrodeposition without using a template. The substrate material is at least partially compliant. |
| US10193135B2 |
Positive electrode active materials with composite coatings for high energy density secondary batteries and corresponding processes
A composite coated form of lithium cobalt oxide is described that can achieve improved cycling at higher voltages. Liquid phase and combined liquid and solid phase coating processes are described to effectively form the composite coated powders. The improved cycling positive electrode materials can be effectively combined with either graphitic carbon negative electrode active materials or silicon based high capacity negative electrode active materials. Improved battery designs can achieve very high volumetric energy densities in practical battery formats and with reasonable cycling properties. |
| US10193130B2 |
Rechargeable battery pack
A rechargeable battery pack is disclosed. In one aspect, the battery pack includes a battery cell including an electrode terminal in a cap plate and configured to perform charging and discharging operations, a protection element connected to the electrode terminal via a first connecting tab and a protection management package connected to a second connecting tab of the protection element and connected to the cap plate via an electrode tab. The battery pack also includes a molding portion enclosing the protection element and the protection management package; and an adhesive member disposed between the molding portion and the battery cell to attach them, wherein the first connecting tab has a bending portion bent between the electrode terminal and the protection element so as to set a height difference. |
| US10193129B2 |
Parallel battery module
The present disclosure provides a parallel battery module comprising a plurality of battery cells, a first current collection connector, and a second current collection connector. The plurality of battery cells are in parallel connection. Each battery cell comprises a conducting top cover plate, a first terminal, a conducting connector, a second terminal, a bare cell, a fuse, and a conducting deformable piece. The first current collection connector and the second current collection connector are disposed on the top of the plurality of battery cells, and are electrically connected to the first terminal and the second terminal of the plurality of battery cells, respectively. When the conducting deformable piece of a battery cell deforms and becomes electrically connected to the conducting connector, the electrical connection between said battery cell and other battery cells is broken by blowing the first current collection connector and/or the second current collection connector. |
| US10193125B2 |
Electrode assembly and secondary battery including the same
An electrode assembly includes: an electrode plate which is wound together with an electrode plate having a different polarity and then formed in a form of a jelly roll and includes a plurality of non-coated portions that are spaced apart from each other; and a plurality of tabs attached to the plurality of non-coated portions, respectively, in which the plurality of non-coated portions includes a first non-coated portion having a set or predetermined width, and a second non-coated portion having a different width from the width of the first non-coated portion. According to the exemplary embodiments of the present invention, it is possible to more easily align and bond multiple tabs, and weld the multi-tab structure to a CID (or a can). Furthermore, it is possible to increase an output of a secondary battery by reducing resistance of the battery. |
| US10193118B2 |
Hydroxide-ion-conductive dense membrane and composite material
Provided is a hydroxide-ion-conductive dense membrane having a He permeability per unit area of 10 cm/min·atm or less. The present invention provides a highly-densified hydroxide-ion-conductive membrane that can significantly reduce permeation of substances other than hydroxide ions (in particular, Zn, which may cause growth of dendritic zinc in a zinc secondary battery) and that is particularly suitable for use in, for example, a separator for a battery (in particular, a zinc secondary battery, which may cause growth of dendritic zinc). |
| US10193114B2 |
Electricity storage device
An electricity storage device includes: a plurality of batteries juxtaposed in a first direction, each battery having on a first side a gas discharge valve that discharges a gas produced inside the battery; and a cooling path formed between the plurality of batteries that face each other in the first direction, constructed to convey a coolant that cools the batteries, and an intake opening for taking in the coolant on a second side that is an opposite side to the first side in a second direction orthogonal to the first direction and a discharge opening for discharging the coolant taken in on at least one of sides in a third direction orthogonal to the second direction and to the first direction. |
| US10193113B2 |
Vent adapter for lead-acid battery systems
A vent adapter for a lead-acid battery includes a first side configured to mate with a vent port of the lead-acid battery via a first connector having a first geometry; and a second side in fluid communication with the first side and configured to mate with a vent passage of an automobile via a second connector having a second geometry, wherein the first and second geometries have respective shapes that are different from one another. |
| US10193110B2 |
Electrochemical device, such as a microbattery or an electrochromic system, covered by an encapsulation layer comprising a barrier film and an adhesive film, and method for fabricating one such device
An electrochemical device, such as a microbattery or an electrochromic system, including at least one stack of active layers containing lithium, said stack being arranged on a substrate and being covered by an encapsulation layer. The encapsulation layer includes at least: a barrier film presenting at least one electrically insulating surface and including at least one layer hermetic to oxidising species, said adhesive film including a juxtaposition of electrically conducting adhesive strips and of electrically insulating adhesive strips, and an adhesive film, provided with a first surface and a second surface, the first surface being in contact with the electrically insulating surface of the barrier film and the second surface covering the stack of active layers and a part of the substrate. |
| US10193108B2 |
Secondary battery, electronic device, and vehicle
Provided is a secondary battery suitable for a portable information terminal or a wearable device, or an electronic device having a novel structure with a variety of forms and a secondary battery that fits the form of the electronic device. The secondary battery is sealed using a film having projections that can reduce stress on the film caused when external force is applied. The film has a pattern of projections formed by pressing (e.g., embossing). A top portion of each of the projections has a region thicker than a bottom portion of each of the projections. The thickness of the top portion of each of the projections is 1.5 or more times, preferably 2 or more times, as large as that of the bottom portion of each of the projections, and is a thickness such that each of the projections has a convex space. |
| US10193107B2 |
Electric storage device and electric storage apparatus provided with the electric storage device
Provided is an electric storage device and an electric storage apparatus capable of suppressing an increase in thickness of a conductive member due to a rivet member being swaged. The present invention includes a rivet member provided with an insert part, and a conductive member provided with an insert-receiving part through which the insert part is inserted. The insert part has a higher Vickers hardness than the peripheral region of the insert-receiving part. |
| US10193103B2 |
Organic light emitting device having protrusion formed of transparent material and display apparatus
An organic light emitting device and a display apparatus are disclosed. The organic light emitting device includes an array substrate and a package substrate (2); on a side of the package substrate (2) facing the array substrate, there is provided a protrusion (7) formed of a first transparent material, a surface of the protrusion (7) is also covered with a transparent layer (8) formed of a second transparent material, and the refractive index of the second transparent material is larger than the refractive index of the first transparent material. With the organic light emitting device, a part of light that is emitted from an organic light-emitting layer (5) and irradiated to a surface of the protrusion (7) is totally reflected and changed in optical paths to decrease incident light totally reflected at a boundary between the package substrate (2) and the outside air, and light that has been changed in optical paths is irradiated out through the package substrate (2) more easily, thereby improving the output efficiency of light. |
| US10193099B2 |
Transformable device and method of manufacturing the same
A transformable device is provided. The transformable device includes an electro-active layer. A first electrode is disposed at a lower portion inside the electro-active layer. A second electrode is disposed at an upper portion inside the electro-active layer. In the transformable device according to an embodiment of the present disclosure, performance of the electrodes is suppressed from decreasing in spite of repeated operating and a life of the transformable device can be increased as compared with a case of forming electrodes outside an electro-active layer. |
| US10193098B2 |
Light emitting device manufacturing method and apparatus thereof
A method of manufacturing a light emitting device includes providing a substrate and forming a plurality of photosensitive bumps over the substrate. The method also includes forming a photosensitive layer over the plurality of photosensitive bumps and patterning the photosensitive layer to form a recess through the photosensitive layer to expose a surface. The method also includes disposing an organic emissive layer on the surface, and removing the patterned photosensitive layer. |
| US10193089B2 |
Display device, array substrate, and manufacturing method
A display device, an array substrate, and a manufacturing method for the array substrate are disclosed. The array substrate includes a substrate base, and two gates, a source, a drain, an active layer, and a pixel electrode on the substrate base. The drain and the pixel electrode are connected together. The source and the drain contact the active layer, respectively. The two gates control the conduction and cut off of the active layer, which in turn controls the conduction and cut off between the source and the drain. Through the present disclosure, the variation of threshold voltage is effectively prevented. |
| US10193088B2 |
Perovskite nanocrystalline particles and optoelectronic device using same
Provided are perovskite nanocrystalline particle and an optoelectronic device using the same. The perovskite nanocrystalline particle may include a perovskite nanocrystalline structure while being dispersible in an organic solvent. Accordingly, the perovskite nanocrystalline particle in accordance with the present invention has therein a perovskite nanocrystal having a crystalline structure in which FCC and BCC are combined; can form a lamellar structure in which an organic (or A site) plane and an inorganic plane are alternately stacked; and can show high color purity since excitons are confined to the inorganic plane. |
| US10193082B2 |
Condensed-cyclic compound and organic light emitting device including the same
A condensed-cyclic compound represented by Formula 1: wherein, in Formula 1, Ar11, X1 to X8, and Z11 to Z14 are the same as described in the specification. |
| US10193081B2 |
Organic compound for optoelectric device and composition for optoelectric device and organic optoelectric device and display device
Disclosed are a first compound for an organic optoelectric device represented by a combination of Chemical Formula I-1 and Chemical Formula I-2 and a composition for an organic optoelectric device including the first compound for an organic optoelectric device and at least one second compound for an organic optoelectric device having a moiety represented by Chemical Formula II, and an organic optoelectric device and a display device including the same. Chemical Formula I-1, Chemical Formula I-2 and Chemical Formula II are the same as described in the detailed description. |
| US10193078B2 |
Organic light-emitting device
An organic light-emitting device including a first electrode; a second electrode; and an organic layer between the first electrode and the second electrode, wherein the organic layer includes at least one first material and at least one second material, the first material being represented by Formula 1 and the second material being represented by Formula 2: |
| US10193077B2 |
Biscarbazole derivative, material for organic electroluminescence device and organic electroluminescence device using the same
A biscarbazole derivative of the invention is represented by a formula (1) below. In the formula (1): A1 represents a substituted or unsubstituted nitrogen-containing heterocyclic group having 1 to 30 ring carbon atoms; A2 represents a substituted or unsubstituted aromatic hydrocarbon group having 6 to 30 ring carbon atoms, or substituted or unsubstituted nitrogen-containing heterocyclic group having 1 to 30 ring carbon atoms; X1 and X2 each are a linking group; Y1 to Y4 each represent a substituent; p and q represent an integer of 1 to 4; and r and s represent an integer of 1 to 3. |
| US10193076B2 |
Amine compound and organic light emitting element comprising same
The present specification provides an amine compound of Chemical Formula 1 and an organic light emitting device including the same. |
| US10193075B2 |
Aniline derivative and use thereof
Aniline derivatives such as are represented by, e.g., the formula have excellent solubility in organic solvents and make it possible to obtain an organic EL element having exceptional brightness characteristics when a thin film containing these derivatives as a charge transport material is applied to a hole injection layer. |
| US10193072B2 |
Pyrene-based compound and organic light-emitting diode comprising the same
A pyrene-based compound, and an organic light-emitting diode including the pyrene-based compound are provided. |
| US10193065B2 |
High K scheme to improve retention performance of resistive random access memory (RRAM)
An integrated circuit or semiconductor structure of a resistive random access memory (RRAM) cell is provided. The RRAM cell includes a bottom electrode and a data storage region having a variable resistance arranged over the bottom electrode. Further, the RRAM cell includes a diffusion barrier layer arranged over the data storage region, an ion reservoir region arranged over the diffusion barrier layer, and a top electrode arranged over the ion reservoir region. A method for manufacture the integrated circuit or semiconductor structure of the RRAM cell is also provided. |
| US10193064B2 |
Memory cells including dielectric materials, memory devices including the memory cells, and methods of forming same
A memory cell comprising a threshold switching material over a first electrode on a substrate. The memory cell includes a second electrode over the threshold switching material and at least one dielectric material between the threshold switching material and at least one of the first electrode and the second electrode. A memory material overlies the second electrode. The dielectric material may directly contact the threshold switching material and each of the first electrode and the second electrode. Memory cells including only one dielectric material between the threshold switching material and an electrode are disclosed. A memory device including the memory cells and methods of forming the memory cells are also described. |
| US10193063B2 |
Switching device formed from correlated electron material
Subject matter disclosed herein may relate to fabrication of a correlated electron material (CEM) switch. In embodiments, processes are described in which conductive traces may be formed on or over an insulating material. Responsive to forming voids in the insulating material, localized portions of the conductive traces in contact with the voids may be exposed to gaseous oxidizing agents, which may convert the localized portions of the conductive traces to a CEM. In embodiments, an electrode material may be deposited within the voids to contact the localized portion of conductive trace converted to the CEM. |
| US10193062B2 |
MgO insertion into free layer for magnetic memory applications
A magnetic tunnel junction (MTJ) is disclosed wherein first and second interfaces of a free layer (FL) with a first metal oxide (Hk enhancing layer) and second metal oxide (tunnel barrier), respectively, produce perpendicular magnetic anisotropy (PMA) to increase thermal stability. In some embodiments, a continuous or discontinuous metal (M) or MQ alloy layer within the FL reacts with scavenged oxygen to form a partially oxidized metal or alloy layer that enhances PMA and maintains acceptable RA. M is one of Mg, Al, B, Ca, Ba, Sr, Ta, Si, Mn, Ti, Zr, or Hf, and Q is a transition metal, B, C, or Al. Methods are also provided for forming composite free layers where interfacial perpendicular anisotropy is generated therein by contact of the free layer with oxidized materials. |
| US10193060B2 |
Magnetoresistive random access memory device and method of manufacturing the same
An MRAM device may include an insulating interlayer structure, a lower electrode contact structure and a variable resistance structure. The insulating interlayer may be formed on a substrate. The lower electrode contact structure may extend through the insulating interlayer. The lower electrode contact structure may include a first electrode having a pillar shape and a second electrode having a cylindrical shape on the first electrode. An upper surface of the second electrode may have a ring shape. A variable resistance structure may be formed on the second electrode. The variable resistance structure may include a lower electrode, a magnetic tunnel junction (MTJ) structure and an upper electrode sequentially stacked. |
| US10193059B2 |
Perpendicularly magnetized spin-orbit magnetic device
A perpendicularly magnetized spin-orbit magnetic device including a heavy metal layer, a magnetic tunnel junction, a first antiferromagnetic layer, a first block layer and a first stray field applying layer is provided. The magnetic tunnel junction is disposed on the heavy metal layer. The first block layer is disposed between the magnetic tunnel junction and the first antiferromagnetic layer. The first stray field applying layer is disposed between the first antiferromagnetic layer and the first block layer. The first stray field applying layer provides a stray magnetic field parallel to a film plane. The first antiferromagnetic layer contacts the first stray field applying layer to define the direction of the magnetic moment in the first stray field applying layer. |
| US10193056B2 |
Minimal thickness synthetic antiferromagnetic (SAF) structure with perpendicular magnetic anisotropy for STT-MRAM
A synthetic antiferromagnetic (SAF) structure for a spintronic device is disclosed and has an FL2/AF coupling/CoFeB configuration where FL2 is a ferromagnetic free layer with intrinsic PMA. In one embodiment, AF coupling is improved by inserting a Co dusting layer on top and bottom surfaces of a Ru AF coupling layer. The FL2 layer may be a L10 ordered alloy, a rare earth-transition metal alloy, or an (A1/A2)n laminate where A1 is one of Co, CoFe, or an alloy thereof, and A2 is one of Pt, Pd, Rh, Ru, Ir, Mg, Mo, Os, Si, V, Ni, NiCo, and NiFe, or A1 is Fe and A2 is V. A method is also provided for forming the SAF structure. |
| US10193055B2 |
Printed circuit board and method of manufacturing the same
A printed circuit board includes: insulating layers and wiring layers arranged in stacked configuration; a cavity disposed in a first insulating layer among the insulating layers; a piezoelectric substrate disposed in the cavity; an electrode disposed on the piezoelectric substrate and configured to convert an electrical signal into an elastic wave or to convert an elastic wave into an electrical signal; and a sealing part disposed on the piezoelectric substrate, the sealing part enclosing the electrode and forming an air gap around the electrode. |
| US10193051B2 |
Acoustic wave device
An acoustic wave device includes: an IDT provided on a piezoelectric substrate; and gratings provided on both sides of the IDT, wherein: a slowness surface of an acoustic wave has a concave shape; a duty ratio of electrode fingers of the gratings is larger than that of the electrode fingers of the IDT, or a thickness of the electrode fingers of the gratings is larger than that of the electrode fingers of the IDT, or a thickness of an added film provided on the electrode fingers of the gratings is larger than that of an added film provided on the electrode fingers of the IDT; a pitch of the electrode fingers of the gratings is smaller than that of the electrode fingers of the IDT; and a resonant frequency of the gratings is substantially the same as that of the IDT. |
| US10193047B2 |
Electronic assemblies incorporating heat flux routing structures for thermoelectric generation
Electronic assemblies for thermoelectric generation are disclosed. In one embodiment, an electronic assembly includes a substrate having a first surface and a second surface, and a conductive plane and a plurality of thermal guide traces position on the first surface of the substrate. The conductive plane includes a plurality of arms radially extending from a central region. The plurality of thermal guide traces surrounds the conductive plane, and is shaped and positioned to guide heat flux present on or within the substrate toward the central region of the conductive plane. The electronic assembly may also include a thermoelectric generator device thermally coupled to the central region of the conductive plane, and a plurality of heat generating devices coupled to the second surface of the substrate. |
| US10193044B2 |
Light emitting package having a guiding member guiding an optical member
A light emitting device package can include a base including a flat top surface; first and second electrical circuit layers on the flat top surface; a light emitting diode on a region of the flat top surface; an optical member to pass light; and a guiding member having a closed loop shape surrounding the region for guiding the optical member, in which the first and second electrical circuit layers respectively include first and second portions disposed between the flat top surface and a bottom surface of the guiding member, in which the first and second electrical circuit layers respectively include first and second extension portions that respectively extend from the first and second portions to locations outside of an outer edge of the guiding member in different directions. |
| US10193043B2 |
Light emitting device package with reflective side coating
A light-emitting device is disclosed that includes a semiconductor structure having an active region disposed between an n-type layer and a p-type layer; a wavelength converter formed above the semiconductor structure; an insulating side coating formed around the semiconductor structure; and a reflective side coating formed around the wavelength converter above the insulating side coating, the reflective side coating having a top surface that is flush with a top surface of the wavelength converter. |
| US10193032B2 |
Method for manufacturing light emitting device
A method for manufacturing a light emitting device includes: providing a substrate including a placement region for placing a light emitting element on a top surface; mounting the light emitting element in the placement region; and forming a frame body surrounding the placement region on the substrate. The step of forming the frame body is performed by arranging a first frame body and second frame body on the substrate to surround the placement region. The second frame body have a larger diameter than the first frame body, and have the same thickness as the first frame body. |
| US10193027B2 |
Light emitting device and method of producing the same
A light emitting device includes: a resin package including: a plurality of leads that includes: a first lead, and a second lead, a first resin portion, a second resin portion, and a third resin portion, the leads and the at least one inner lateral wall surface of the first resin portion defining a recess, the third resin portion being located between the first lead and the second lead, the second resin portion disposed surrounding an element mounting region at the bottom of the recess; and at least one light emitting element disposed on an element mounting region. At least one inner lateral wall surface of the recess has at least one protruding portion that protrudes toward the at least one light emitting element. A region of the recess between the at least one inner lateral wall surface and the second resin portion is covered by a light-reflective member. |
| US10193025B2 |
Inorganic LED pixel structure
An inorganic light-emitting diode (iLED) pixel structure includes a transparent pixel substrate having an LED surface, an emission surface opposite the LED surface, and one or more sides other than the LED surface and the emission surface that are not parallel to the LED surface or the emission surface. One or more iLEDs are mounted on the pixel substrate and each iLED has an emission side adjacent to the LED surface of the pixel substrate to emit light into the pixel substrate and out of the emission surface. A reflector is disposed on at least a portion of the one or more sides. |
| US10193016B2 |
III-nitride semiconductor light emitting device and method of producing the same
Provided is a III-nitride semiconductor light-emitting device having excellent device lifetime as compared with conventional devices and a method of producing the same. A III-nitride semiconductor light-emitting device 100 has an n-type semiconductor layer 30, a light emitting layer 40 containing at least Al, an electron blocking layer 50, and a p-type semiconductor layer 60 in this order. The light emitting layer 40 has a quantum well structure having well layers 41 and barrier layers 42. The electron blocking layer 50 is adjacent to the light emitting layer 40 and is formed from a layer having an Al content higher than that of the barrier layers 42 and the p-type semiconductor layer 60. The electron blocking layer 50 has a Si-based doped region layer 50a. |
| US10193013B2 |
LED structures for reduced non-radiative sidewall recombination
LED structures are disclosed to reduce non-radiative sidewall recombination along sidewalls of vertical LEDs including p-n diode sidewalls that span a top current spreading layer, bottom current spreading layer, and active layer between the top current spreading layer and bottom current spreading layer. |
| US10193011B1 |
Method of manufacturing a 3 color LED integrated Si CMOS driver wafer using die to wafer bonding approach
Methods of forming an integrated RGB LED and Si CMOS driver wafer and the resulting devices are provided. Embodiments include providing a plurality of first color die over a CMOS wafer, each first color die being laterally separated with a first oxide and electrically connected to the CMOS wafer; providing a second color die above each first color die, each second color die being separated from each other with a second oxide, bonded to a first color die, and electrically connected to the CMOS wafer through the bonded first color die; removing a portion of each second color die to expose a portion of each bonded first color die; forming a conformal TCO layer over each first and second color die and on a side surface of each second color die and oxide; forming a PECVD oxide layer over the CMOS wafer; and planarizing the PECVD oxide layer. |
| US10193008B2 |
Lighter than air vehicle
Disclosed is a lighter than air vehicle comprising: an envelope containing a lighter than air gas, at least part of the envelope admitting the passage of light through the at least part of the envelope; and a directing device for selectively redirecting the light which passes through the at least part of the envelope. The vehicle may further comprises a plurality of devices for using incident light. The directing device for selectively redirecting the light may be for selectively redirecting the light onto a selected device, for example, by switching the positions of two or more devices into the path of the light. |
| US10193003B2 |
Solar cell unit, solar cell array, solar cell module and manufacturing method thereof
A solar cell unit comprises a cell. The cell includes a cell substrate and a plurality of secondary grid lines disposed on a front surface of the cell substrate. The secondary grid lines comprises an edge secondary grid line adjacent to an edge of the cell substrate and a middle secondary grid line disposed inside of the edge secondary grid line. The secondary grid line comprises a welding portion. At least one welding portion of the edge secondary grid line has a projection area in the cell substrate larger than a welding portion of the middle secondary grid line. The solar cell unit also comprises a plurality of conductive wires spaced apart from each other and welded with the secondary grid lines in the welding portion. |
| US10192999B2 |
Vertical memory cell with non-self-aligned floating drain-source implant
Various embodiments provide a memory cell that includes a vertical selection gate, a floating gate extending above the substrate, wherein the floating gate also extends above a portion of the vertical selection gate, over a non-zero overlap distance, the memory cell comprising a doped region implanted at the intersection of a vertical channel region extending opposite the selection gate and a horizontal channel region extending opposite the floating gate. |
| US10192997B2 |
Semiconductor device comprising oxide semiconductor
A highly reliable semiconductor device having stable electric characteristics is provided by suppressing, in a transistor including an oxide semiconductor film, diffusion of indium into an insulating film in contact with the oxide semiconductor film and improving the characteristics of the interface between the oxide semiconductor film and the insulating film. In an oxide semiconductor film containing indium, the indium concentration at a surface is decreased, thereby preventing diffusion of indium into an insulating film on and in contact with the oxide semiconductor film. By decreasing the indium concentration at the surface of the oxide semiconductor film, a layer which does not substantially contain indium can be formed at the surface. By using this layer as part of the insulating film, the characteristics of the interface between the oxide semiconductor film and the insulating film in contact with the oxide semiconductor film are improved. |
| US10192994B2 |
Oxide semiconductor film including indium, tungsten and zinc and thin film transistor device
There is provided an oxide semiconductor film composed of nanocrystalline oxide or amorphous oxide, wherein the oxide semiconductor film includes indium, tungsten and zinc, a content rate of tungsten to a total of indium, tungsten and zinc in the oxide semiconductor film is higher than 0.5 atomic % and equal to or lower than 5 atomic %, and an electric resistivity is equal to or higher than 10−1 Ωcm. There is also provided a semiconductor device including the oxide semiconductor film. |
| US10192991B2 |
Thin film transistor and manufacturing method thereof, array substrate and display device
A thin film transistor and a manufacturing method thereof, an array substrate and a display device. The manufacturing method of the thin film transistor includes: providing a substrate; depositing an active layer film, a gate insulator layer film, and a gate metal layer film on the substrate in sequence, patterning the active layer film, the gate insulator layer film, and the gate metal layer film to form an active layer, a gate insulator layer and a gate metal layer respectively, and depositing an insulator layer film at a first temperature and patterning the insulator layer film to form an insulator layer; a portion of the active layer, which portion is not overlapped with the gate metal layer, is treated to become conductive to provide a conductor during deposition of the insulator layer film. |
| US10192986B1 |
HEMT GaN device with a non-uniform lateral two dimensional electron gas profile and method of manufacturing the same
A high electron mobility field effect transistor (HEMT) having a substrate, a channel layer on the substrate and a barrier layer on the channel layer includes a stress inducing layer on the barrier layer, the stress inducing layer varying the piezo-electric effect in the barrier layer in a drift region between a gate and a drain. A two dimensional electron gas (2DEG) has a non-uniform lateral distribution in the drift region between the gate and the drain. |
| US10192983B2 |
LDMOS with adaptively biased gate-shield
An LDFET is disclosed. A source region is electrically coupled to a source contact. A lightly doped drain (LDD) region has a lower dopant concentration than the source region, and is separated from the source region by a channel. A highly doped drain region forms an electrically conductive path between a drain contact and the LDD region. A gate electrode is located above the channel and separated from the channel by a gate dielectric. A shield plate is located above the gate electrode and the LDD region, and is separated from the LDD region, the gate electrode, and the source contact by a dielectric layer. A control circuit applies a variable voltage to the shield plate that: (1) accumulates a top layer of the LDD region before the transistor is switched on; and (2) depletes the top layer of the LDD region before the transistor is switched off. |
| US10192982B2 |
Nano MOSFET with trench bottom oxide shielded and third dimensional P-body contact
A semiconductor power device may include a lightly doped layer formed on a heavily doped layer. One or more devices are formed in the lightly doped layer. Each device includes a body region, a source region, and one or more gate electrodes formed in corresponding trenches in the lightly doped region. Each trench has a first dimension (depth), a a second dimension (width) and a third dimension (length). The body region is of opposite conductivity type to the lightly and heavily doped layers. An opening is formed between first and second trenches through an upper portion of the source region and a body contact region to the body region. A deep implant region of the second conductivity type is formed in the lightly doped layer below the body region. The deep implant region is vertically aligned to the opening and spaced away from a bottom of the opening. |
| US10192977B2 |
Power semiconductor device
In the present application, a power semiconductor device includes a first-conductive-type first base region having a first principal surface and a second principal surface opposite to the first principal surface, a second-conductive-type second base region disposed on the first principal surface and at least three groove parts parallel to each other disposed from a surface of the second base region. The device further includes insulating films covering inner walls of the respective groove parts, conductive trench gates filled on the insulating films, a first-conductive-type emitter region disposed in the second base region, and a second-conductive-type collector region disposed on the second principal surface of the first base region. The trench gates embedded in the first groove part and the third groove part are electrically connected to the gate electrode, and the trench gate embedded in the second groove part is electrically connected to the emitter electrode. |
| US10192976B2 |
Semiconductor quantum dot device and method for forming a scalable linear array of quantum dots
An exemplary quantum dot device can be provided, which can include, for example, at least three conductive layers and at least two insulating layers electrically insulating the at least three conductive layers from one another. For example, one of the conductive layers can be composed of a different material than the other two of the conductive layers. The conductive layers can be composed of (i) aluminum, (ii) gold, (iii) copper or (iv) polysilicon, and/or the at least three conductive layers can be composed at least partially of (i) aluminum, (ii) gold, (iii) copper or (iv) polysilicon. The insulating layers can be composed of (i) silicon oxide, (ii) silicon nitride and/or (iii) aluminum oxide. |
| US10192970B1 |
Simultaneous ohmic contact to silicon carbide
A simultaneous ohmic contact to silicon carbide includes a mixture of platinum, titanium, and silicon compounds deposited on a silicon carbide substrate. The silicon carbide substrate includes an n-type surface and a p-type surface. |
| US10192969B2 |
Transistor gate metal with laterally graduated work function
Semiconductor device(s) including a transistor with a gate electrode having a work function monotonically graduating across the gate electrode length, and method(s) to fabricate such a device. In embodiments, a gate metal work function is graduated between source and drain edges of the gate electrode for improved high voltage performance. In embodiments, thickness of a gate metal graduates from a non-zero value at the source edge to a greater thickness at the drain edge. In further embodiments, a high voltage transistor with graduated gate metal thickness is integrated with another transistor employing a gate electrode metal of nominal thickness. In embodiments, a method of fabricating a semiconductor device includes graduating a gate metal thickness between a source end and drain end by non-uniformly recessing the first gate metal within the first opening relative to the surrounding dielectric. |
| US10192968B2 |
Semiconductor devices having gate structures with skirt regions
Provided are a semiconductor device and a method for fabricating the same. The semiconductor device includes an active fin protruding upwardly from a substrate and extending in a first direction and a gate structure extending in a second direction intersecting to cross the active fin, where a first width of a lower portion of the gate structure that contacts the active fin is greater than a second width of the lower portion of the gate structure that is spaced apart from the active fin. |
| US10192965B2 |
Semiconductor device including first and second gate electrodes and method for manufacturing the same
A semiconductor substrate (1) includes a region (AR3) between a region (AR1) and a region (AR2), a control gate electrode (CG) is formed on an upper surface (TS1) of the region (AR1), and a memory gate electrode (MG) is formed on an upper surface (TS2) of the region (AR2). The upper surface (TS2) is lower than the upper surface (TS1), and the region (AR3) has a connection surface (TS3) connecting the upper surface (TS1) and the upper surface (TS2). An end (EP1) of the connection surface (TS3) which is on the upper surface (TS2) side is arranged closer to the memory gate electrode (MG) than an end (EP2) of the connection surface (TS3) which is on the upper surface (TS1) side, and is arranged lower than the end (EP2). |
| US10192964B2 |
Compound semiconductor device and method of manufacturing the same
A compound semiconductor device includes: a carrier transit layer; a carrier supply layer over the carrier transit layer; a source electrode and a drain electrode above the carrier supply layer; a gate electrode above the carrier supply layer between the source electrode and the drain electrode; and a first insulating film, a second insulating film, and a third insulating film above the carrier supply layer between the gate electrode and the drain electrode. The gate electrode includes a portion above the third insulating film, a first concentration of electron traps in the first insulating film is higher than a second concentration of electron traps in the second insulating film, and a third concentration of electron traps in the third insulating film is higher than the second concentration of the electron traps in the second insulating film. |
| US10192962B2 |
Semiconductor device and method for manufacturing the same
A semiconductor device including, a semiconductor layer including a plurality of first trenches formed therein and a second trench formed in a region between the first trenches, channel regions formed in regions between the first and second trenches in a surface layer portion of the semiconductor layer, field plate electrodes embedded at bottom portion sides of the respective first trenches, first gate electrodes embedded at opening portion sides of the respective first trenches so as to face the channel regions across first gate insulating films above the field plate electrodes, second insulating films interposed between the field plate electrodes and the first gate electrodes, an embedded insulating film embedded to an intermediate portion of the second trench, and a second gate electrode embedded in the second trench so as to face the channel regions across a second gate insulating film above the embedded insulating film. |
| US10192961B2 |
Silicon carbide semiconductor device
A silicon carbide semiconductor device includes a silicon carbide substrate and a gate insulating film. The silicon carbide substrate has a first main surface and a second main surface opposite to the first main surface. The gate insulating film is provided on the first main surface. The silicon carbide substrate includes a first body region having p type, a second body region having p type, and a JFET region provided between the first body region and the second body region and having n type. The JFET region has both a first impurity capable of providing the p type and a second impurity capable of providing the n type. A concentration of the second impurity is higher than a concentration of the first impurity. The silicon carbide semiconductor device capable of suppressing dielectric breakdown of the gate insulating film is provided. |
| US10192960B2 |
Silicon carbide semiconductor device and method for manufacturing same
A silicon carbide layer includes a drift region, a body region and a source region. The drift region constitutes a first main surface and has a first conductivity type. The body region is provided on the drift region, and has a second conductivity type. It is provided on the body region to be separated from the drift region, constitutes a second main surface, and has the first conductivity type. The silicon carbide layer is provided with a trench including a first side wall portion and a first bottom portion. The silicon carbide layer is embedded in the drift region to face the first bottom portion, and includes a second conductivity type region having the second conductivity type. The second conductivity type region is electrically connected to the source region. |
| US10192959B2 |
III-N based substrate for power electronic devices and method for manufacturing same
The present disclosure relates to a III-N based substrate for power electronic devices, comprising a base substrate, a III-N laminate above the base substrate and a buffer layer structure between the base substrate and the III-N laminate. The buffer layer structure comprises at least a first superlattice laminate and a second superlattice laminate above the first superlattice laminate. The first superlattice laminate comprises a repetition of a first superlattice unit which consists of a plurality of first AlGaN layers. The second superlattice laminate comprises a repetition of a second superlattice unit which consists of a plurality of second AlGaN layers. An average aluminum content of the first superlattice laminate is a predetermined difference greater than an average aluminum content of the second superlattice laminate, to improve the vertical breakdown voltage. The present disclosure also relates to a method for manufacturing a III-N based substrate for power electronic devices. |
| US10192957B2 |
Thin-film transistor array substrate
a thin-film transistor according to an exemplary embodiment of the present invention comprises an active layer; an intermediate layer; a gate insulating film; a gate electrode; an interlayer insulating film; and source and drain electrodes. The active layer is positioned on a substrate, and the gate insulating film is positioned on the active layer. The gate electrode is positioned on the gate insulating film, and the interlayer insulating film is positioned on the gate electrode. The source and drain electrodes are positioned on the interlayer insulating film and connected to the active layer. The intermediate layer is positioned between the active layer and the gate insulating film, and made of an oxide semiconductor comprising a Group IV element. |
| US10192955B2 |
Semiconductor device containing oxygen-related thermal donors
A method of manufacturing a semiconductor device includes determining information that indicates an extrinsic dopant concentration and an intrinsic oxygen concentration in a semiconductor wafer. On the basis of information about the extrinsic dopant concentration and the intrinsic oxygen concentration as well as information about a generation rate or a dissociation rate of oxygen-related thermal donors in the semiconductor wafer, a process temperature gradient is determined for generating or dissociating oxygen-related thermal donors to compensate for a difference between a target dopant concentration and the extrinsic dopant concentration. |
| US10192954B2 |
Junctionless nanowire transistor and manufacturing method for the same
A junctionless nanowire transistor and a manufacturing method for the same are disclosed. Two terminals of each of the channel nanowires disposed in the transistor are respectively connected with the source region and the drain region; the source region, the drain region and the channel nanowires uses a same doping material such that the on-state current of the transistor is increased, and the uniformity of the transistor is increased. Besides, the multiple channel nanowires are disposed above the active layer in a stacked arrangement to increase the integration of the transistor. |
| US10192951B2 |
Inductor element, inductor element manufacturing method, and semiconductor device with inductor element mounted thereon
An inductor element is formed in a multiple layer lead structure including a lead, an insulative layer that insulates leads above and below, and a via provided in the insulative layer and connecting leads above and below wherein lead layers are multiply laminated layers, characterized in that: at least a portion of at least a pair of vertically adjacent leads are coiled leads; the coiled leads are connected in series, wherein current directions of vertically adjacent coiled leads are the same by a via provided on an end portion thereof, and form a serial inductance; and an inter-lead capacitance of the vertically adjacent coiled leads is larger than an inter-lead capacitance between other coiled leads formed in the same lead layer. |
| US10192950B2 |
Display module and multi-display device including the same
A display module is provided including a pixel region having a plurality of pixels and a black matrix arranged outside the pixel region. Each of the pixels is separated from adjacent pixels by a first interval, a left distance from the left edge to a first one of the plurality of pixels plus a right distance from a second one of the plurality of pixels to the right edge is a first distance, and a bottom distance from the bottom edge to a third one of the plurality of pixels plus a top distance from a fourth one of the plurality of pixels to the top edge is the first distance. |
| US10192949B2 |
Display apparatus having reduced defects
A display apparatus capable of reducing defects such as disconnections during manufacturing processes, while ensuring longer lifespan thereof. The display apparatus includes: a substrate including a bending area between a first area and a second area, the bending area of the substrate being bent or bendable about a bending axis; an organic material layer positioned on the substrate corresponding at least to the bending area; a conductive layer extending from the first area to the second area through the bending area, positioned over the organic material layer, and including a plurality of through holes positioned corresponding to the bending area; and first protective layers spaced apart from one another so as to at least partially cover sides of the plurality of through holes. |
| US10192942B2 |
Display device including light emitting element and bank having sloped surface
A display device includes a plurality of light-emitting elements aligned on a TFT substrate in a formation of a matrix. The plurality of light-emitting elements each have a flat surface portion and including a light-emitting layer, an anode, and a cathode, an insulating layer formed on the TFT substrate and under the light emitting element, and a tilted metal surface provided on a peripheral area surrounding the flat surface portion of the light-emitting element and having a tilt angle with respect to the flat surface portion of the light-emitting element. The tilted metal surface is provided on a surface of a slope of a bank that is provided on the insulation layer, and a width of a cross-section of the bank becomes smaller as the cross section conies farther away from a surface of the TFT substrate. A counter substrate is placed on the TFT substrate. |
| US10192941B2 |
Display device
The display device includes a first substrate having flexibility and including pixels arranged in matrix form in a first direction and a second direction, the first direction and second direction mutually intersecting each other, a transistor layer arranged above the first substrate and including at least one transistor arranged in each of the pixels, an inorganic insulation film formed continuously across the pixels in the second direction, and a plurality of aperture parts extending in the second direction and arranged between two transistors arranged in two of the plurality of pixels adjacent in the first direction, a plurality of first groups of wiring extending in the first direction and connected to each of the pixels arranged in the first direction, and a plurality of second groups of wiring extending in the second direction and connected to each of the pixels arranged in the second direction. |
| US10192938B2 |
Light-emitting diode displays
A display may have an array of pixels. Display driver circuitry may supply data and control signals to the pixels. Each pixel may have seven transistors, a capacitor, and a light-emitting diode such as an organic light-emitting diode. The seven transistors may receive control signals using horizontal control lines. Each pixel may have first and second emission enable transistors that are coupled in series with a drive transistor and the light-emitting diode of that pixel. The first and second emission enable transistors may be coupled to a common control line or may be separately controlled so that on-bias stress can be effectively applied to the drive transistor. The display driver circuitry may have gate driver circuits that provide different gate line signals to different rows of pixels within the display. Different rows may also have different gate driver strengths and different supplemental gate line loading structures. |
| US10192932B2 |
Quantum dot LED and OLED integration for high efficiency displays
Displays including hybrid pixels including an OLED subpixel and QD-LED subpixel are described. In an embodiment, OLED and QD-LED stacks are integrated into the same pixel with multiple common layers shared by the OLED and QD-LED stacks. |
| US10192931B2 |
Complementary thin film transistor and manufacturing method thereof
A complementary thin film transistor and manufacturing method thereof are provided. The complementary thin film transistor has a substrate, an n-type semiconductor layer, a p-type semiconductor layer, and an etched barrier layer. The substrate defines an n-type transistor region and a p-type transistor region adjacent to the n-type transistor region. The n-type semiconductor layer is disposed on the substrate and within the n-type transistor region, and has a metal oxide material. The p-type semiconductor layer is disposed on the substrate and within the p-type transistor region, and has an organic semiconductor material. The etched barrier layer is formed on the n-type semiconductor layer and disposed within the n-type transistor region and the p-type transistor region, and the p-type semiconductor layer is formed on the etched barrier layer. |
| US10192930B2 |
Three dimensional complementary metal oxide semiconductor carbon nanotube thin film transistor circuit
A metal oxide semiconductor carbon nanotube thin film transistor circuit includes a p-type carbon nanotube thin film transistor and an n-type carbon nanotube thin film transistor stacked on one another. The p-type carbon nanotube thin film transistor includes a first semiconductor carbon nanotube layer, a first drain electrode, a first source electrode, a functional dielectric layer, and a first gate electrode. The n-type carbon nanotube thin film transistor includes a second semiconductor carbon nanotube layer, a second drain electrode, a second source electrode, a first insulating layer, and a second gate electrode. The first drain electrode and the second drain electrode are electrically connected with each other. The first gate electrode and the second gate electrode are electrically connected with each other. |
| US10192927B1 |
Semiconductor device for a non-volatile (NV) resistive memory and array structure for an array of NV resistive memory
A method for forming a resistive switching device. The method includes providing a substrate having a surface region and forming a first dielectric material overlying the surface region. A first wiring structure is formed overlying the first dielectric material. The method forms one or more first structure comprising a junction material overlying the first wiring structure. A second structure comprising a stack of material is formed overlying the first structure. The second structure includes a resistive switching material, an active conductive material overlying the resistive switching material, and a second wiring material overlying the active conductive material. The second structure is configured such that the resistive switching material is free from a coincident vertical sidewall region with the junction material. |
| US10192925B2 |
Semiconductor device structure useful for bulk transistor and method of manufacturing same
A semiconductor device including a semiconductor substrate with a first surface and a second surface facing each other, the semiconductor substrate having an element region in which a transistor is provided on the first surface, and a separation region in which an element separating layer surrounding the element region is provided; a contact plug extending from the first surface to the second surface, in the element region of the semiconductor substrate; and an insulating film covering a periphery of the contact plug. |
| US10192924B2 |
Image pickup device and image pickup apparatus
An image pickup device according to the present disclosure includes a first pixel and a second pixel each including a photodetection section and a light condensing section, the photodetection section including a photoelectric conversion element, the light condensing section condensing incident light toward the photodetection section, the first pixel and the second pixel being adjacent to each other and each having a step part on a photodetection surface of the photodetection section, in which at least a part of a wall surface of the step part is covered with a first light shielding section. |
| US10192922B2 |
Charge packet signal processing using pinned photodiode devices
An image sensor may include an array of image pixels coupled to analog-to-digital conversion circuitry formed from pinned photodiode charge transfer circuits. Majority charge carriers for the pinned photodiodes in the charge transfer circuits may be electrons for photodiode wells formed from n-type doped regions and may be holes for photodiode formed from p-type doped regions. Pinned photodiodes may be used for charge integration onto a capacitive circuit node. Pinned photodiodes may also be used for charge subtraction from a capacitive circuit node. Comparator circuitry may be used to determine digital values for the pixel output levels in accordance with single-slope conversion, successive-approximation-register conversion, cyclic conversion, and first or second order delta-sigma conversion techniques. The array of image pixels used for imaging may have a conversion mode wherein at least a portion of the pixel circuitry in the array are operated similar to the charge transfer circuits. |
| US10192921B2 |
Solid state imaging device for reducing dark current, method of manufacturing the same, and imaging apparatus
A solid state imaging device having a light sensing section that performs photoelectric conversion of incident light includes: an insulating layer formed on a light receiving surface of the light sensing section; a layer having negative electric charges formed on the insulating layer; and a hole accumulation layer formed on the light receiving surface of the light sensing section. |
| US10192920B2 |
Solid-state imaging device
A solid-state imaging device includes a substrate of P type and a wiring layer. The substrate includes: a first semiconductor region disposed on a first principle surface and extending in a direction from the first principal surface toward the second principal surface; a second semiconductor region disposed between the second principal surface and the first semiconductor region and connected to the first semiconductor region; a P type semiconductor region disposed between the second principal surface and the second semiconductor regions of two pixels; and a pixel isolation region disposed inside the substrate, between the first semiconductor regions of the two pixels. The second semiconductor region and the P type semiconductor region form an avalanche multiplication region. |
| US10192918B2 |
Image sensor including dual isolation and method of making the same
An image sensor includes a substrate having a pixel region and a periphery region. The image sensor further includes a first isolation structure formed in the pixel region; the first isolation structure including a first trench having a first depth. The image sensor further includes a second isolation structure formed in the periphery region; the second isolation structure including a second trench having a second depth. The second depth is greater than the first depth. |
| US10192916B2 |
Methods of fabricating solid-state imaging devices having flat microlenses
Methods of fabricating solid-state imaging devices having a flat microlens array are provided. The method includes providing a semiconductor substrate having a plurality of photoelectric conversion elements. A color filter layer is formed above the semiconductor substrate. A lens material layer is formed on the color filter layer. A hard mask having a lens-shaped pattern is formed on the lens material layer. The method further includes etching both the hard mask and the lens material layer to form a microlens with a flat top surface that is formed from the lens material layer, and to leave a portion of the hard mask on the flat top surface of the microlens. The method also includes removing the portion of the hard mask that remains on the microlens. |
| US10192901B2 |
Organic light emitting diode display and manufacturing method thereof
An organic light emitting diode display having a lightly doped region formed in a transistor for simplifying manufacturing process and reducing manufacturing costs is provided. The organic light emitting diode display includes: a substrate, a transistor on the substrate, and an organic light emitting diode (OLED) connected to the transistor, wherein the transistor includes a semiconductor member on the substrate, an insulating member on the semiconductor member, a source member and a drain member disposed on the semiconductor member and respectively disposed at opposite sides of the insulating member, and a gate electrode on the insulating member, wherein each of the source member and the drain member includes a plurality of layers having different impurity doping concentrations. |
| US10192894B2 |
Thin film transistor and method of manufacturing the same, array substrate and display panel
Embodiments of the present application provide a thin film transistor and a method of manufacturing the same, an array substrate and a display panel. The thin film transistor comprises, successively from the bottom up, a gate, a first common electrode located in the same layer as the gate, a gate insulating layer, an active layer, a pixel electrode, a source-drain electrode layer and a passivation layer located above the layer where the gate is located, and a second common electrode located on the passivation layer, and the thin film transistor further comprises at least one connection electrode located in a same layer as the pixel electrode, wherein at least two via holes are provided between the first common electrode and the second common electrode so as to connect the first common electrode and the second common electrode through the connection electrode. |
| US10192890B2 |
Transistor array panel and method of manufacturing thereof
A transistor display panel including: a substrate; a gate electrode disposed on the substrate; a semiconductor that overlaps the gate electrode; an upper electrode disposed on the semiconductor; a source connection member and a drain connection member disposed on the same layer as the upper electrode and respectively connected with the semiconductor; a source electrode connected with the source connection member and the upper electrode; and a drain electrode connected with the drain connection member. |
| US10192889B2 |
Display device and method of manufacturing a display device
A display device includes a first substrate including a display area and a non-display area. A gate line and a gate electrode are in the display area. A data line is connected to the gate line. A gate insulating layer is on the gate line and the gate electrode. A semiconductor layer is on the gate insulating layer. A drain electrode and a source electrode are on the semiconductor layer. A first passivation layer is on the drain electrode and the source electrode. A color filter is on the first passivation layer. A common electrode is on the first passivation layer. A second passivation layer is on the common electrode. A pixel electrode is on the second passivation layer. The gate insulating layer has substantially a same shape as a shape of the gate electrode. The gate insulating layer has a width wider than a width of the gate electrode. |
| US10192887B2 |
Method to improve crystalline regrowth
The migration of dislocations into pristine single crystal material during crystal growth of an adjacent conductive strap is inhibited by a conductive barrier formed at the interface between the layers. The conductive barrier may be formed by implanting carbon impurities or depositing Si:C layer that inhibits dislocation movement across the barrier layer, or by forming a passivation layer by annealing in vacuum prior to deposition of amorphous Si to prevent polycrystalline nucleation at the surface of single crystalline Si, or by implanting nucleation promoting species to enhance the nucleation of polycrystalline Si away from single crystalline Si. |
| US10192885B2 |
Semiconductor on insulator (SOI) block with a guard ring
A semiconductor device includes a bulk substrate of a first conductivity type, a first semiconductor on insulator (SOI) block in the bulk substrate, a first well of the first conductivity type in the first SOI block, a second well of a second conductivity type in the first SOI block, a first guard ring of the first conductivity type in the first SOI block around at least a portion of a periphery of the first SOI block, and a second guard ring of the second conductivity type in the first SOI block around at least a portion of the periphery of the first SOI block. The first conductivity type is different than the second conductivity type. |
| US10192883B2 |
Vertical memory device
A memory device may include a peripheral region and a cell region. The peripheral region may include a first substrate, a plurality of circuit elements disposed on the first substrate, a first insulating layer disposed on the plurality of circuit elements, and a first protective layer disposed in the first insulating layer. The cell region may include a second substrate disposed on the first insulating layer, wherein the ceil region includes a first impurity region, a channel region extending in a direction substantially perpendicular to an upper surface of the second substrate, a plurality of gate electrode layers stacked on the second substrate and adjacent to the channel region, and a first contact electrically connected to the first impurity region, wherein the first protective layer is disposed below the first impurity region, and has a shape corresponding to a shape of the first impurity region. |
| US10192882B1 |
Semiconductor device and method for manufacturing same
According to one embodiment, a semiconductor device includes a stacked body, a columnar portion, and a first air gap. The stacked body includes a plurality of conductive layers stacked with an insulator interposed. The columnar portion extends through the stacked body in a stacking direction of the stacked body. The first air gap extends through the stacked body in the stacking direction. The insulator includes an insulating layer provided at a periphery of a side surface of the columnar portion, and a second air gap communicating with the first air gap and being provided between the insulating layer and the first air gap. The insulating layer has a protrusion at an end adjacent to the second air gap. |
| US10192879B2 |
Semiconductor device and manufacturing method thereof
An improvement is achieved in the performance of a semiconductor device having a nonvolatile memory. A memory cell of the nonvolatile memory includes a control gate electrode formed over a semiconductor substrate via a first insulating film and a memory gate electrode formed over the semiconductor substrate via a second insulating film to be adjacent to the control gate electrode via the second insulating film. The second insulating film includes a third insulating film made of a silicon dioxide film, a fourth insulating film made of a silicon nitride film over the third insulating film, and a fifth insulating film over the fourth insulating film. The fifth insulating film includes a silicon oxynitride film. Between the memory gate electrode and the semiconductor substrate, respective end portions of the fourth and fifth insulating films are located closer to a side surface of the memory gate electrode than an end portion of a lower surface of the memory gate electrode. Between the memory gate electrode and the semiconductor substrate, in a region where the second insulating film is not formed, another silicon dioxide film is embedded. |
| US10192877B2 |
Three-dimensional memory device with level-shifted staircase structures and method of making thereof
A mesa structure is formed over a substrate. An alternating stack of insulating layers and spacer material layers having a total height of approximately double the height of the mesa structure is formed over the substrate and the mesa structure. The spacer material layers are formed as, or are replaced with, electrically conductive layers. Portions of the alternating stack are removed from above the mesa structure by a planarization process. Stepped surfaces can be concurrently formed in a first terrace region overlying the mesa structure and in a second terrace region located at an opposite side of a memory array region of the alternating stack. A pair of level shifted stepped surfaces is formed. Contacts to the alternating stack can reach down only to the lowest surface of the pair of level shifted stepped surfaces, and can be shorter than the alternating stack. |
| US10192875B2 |
Non-volatile memory with protective stress gate
A non-volatile memory including following elements is provided. The floating gate transistor, the select transistor and the stress-releasing transistor are disposed on the substrate and coupled in series with each other. The stress-releasing transistor is located between the floating gate transistor and the select transistor. The stress-releasing transistor has a stress release ratio represented by formula (1). A lower limit value of the stress release ratio is determined by a sustainable drain side voltage of the stress-releasing transistor of the non-volatile memory which is unselected when a program operation is performed. An upper limit value of the stress release ratio is determined by a readable drain current of the non-volatile memory which is selected when a read operation is performed. The stress release ratio=a channel length of the stress-releasing transistor/a gate dielectric layer thickness of the stress-releasing transistor (1). |
| US10192870B2 |
Semiconductor device
An HVNMOS having a source follower configuration is disposed in an n− diffusion region that forms an HVJT. The lateral HVNMOS includes a p-type back gate region, source contact region, n+drain region, and gate electrode. The p-type back gate region and source contact region contact a p− isolation region and are separated from p+ common potential regions inside the p− isolation region. The source contact region is electrically connected to the COM electrode pad through a source follower resistor RSF. The p+ common potential regions are electrically connected to the p-type back gate region and source contact region of the HVNMOS through diffusion resistors provided between the p-type back gate region/source contact region of the HVNMOS and the p+ common potential region. |
| US10192869B2 |
Reduction of negative bias temperature instability
A complementary metal-oxide semiconductor (CMOS) circuit and a method of fabricating the device are described. The circuit includes an n-channel field effect transistor (nFET), the nFET including a high-k dielectric layer on an interlayer. The CMOS circuit also includes a p-channel field effect transistor (pFET), the pFET including the high-k dielectric layer on the interlayer and additionally including an aluminum-based cap layer between the high-k dielectric layer and a pFET work function setting metal. Metal atoms from the cap layer do not intermix with the interlayer. |
| US10192861B1 |
OPC method for a shallow ion implanting layer
The present invention discloses an OPC method for a shallow ion implanting layer, comprising the following steps of: selecting a valid device region in an implanting active region in a shallow ion implanting original layout; selecting a region in the valid device region which is contacted with a poly-silicon pattern in a poly-silicon layer, as a poly-silicon contacting region; extending the length and width of the poly-silicon contacting region and the non poly-silicon contacting region, to form a new poly-silicon contacting region and a new non poly-silicon contacting region; combining a gap portion which an interval between any two new poly-silicon contacting regions and/or new non poly-silicon contacting regions after extending is smaller than or equal to G and completely fallen in the STI region, with the poly-silicon contacting regions and non poly-silicon contacting regions after extending, to form a correction target layer; performing a model-based OPC routine on the correction target layer, to obtain a mask layer. |
| US10192858B2 |
Light emitting structure
A method and structure for receiving a micro device on a receiving substrate are disclosed. A micro device such as a micro LED device is punched-through a passivation layer covering a conductive layer on the receiving substrate, and the passivation layer is hardened. In an embodiment the micro LED device is punched-through a B-staged thermoset material. In an embodiment the micro LED device is punched-through a thermoplastic material. |
| US10192855B2 |
Semiconductor package and electronic device having heat dissipation pattern and/or heat conducting line
A semiconductor package is provided. The semiconductor package include a lower semiconductor package including a lower package substrate and a lower semiconductor chip mounted thereon, and an upper semiconductor package provided on the lower semiconductor package to include an upper package substrate and an upper semiconductor chip mounted thereon. The upper package substrate include an upper heat-dissipation pattern, the lower semiconductor chip include a first via connected to the upper heat-dissipation pattern through the lower semiconductor chip, and the first via may provide a pathway for dissipating heat generated in the lower semiconductor chip. |
| US10192853B2 |
Method for preparing a semiconductor apparatus
The present disclosure provides a method for preparing a semiconductor apparatus. The semiconductor apparatus includes a first semiconductor die and a second semiconductor die stacked onto the first semiconductor die in a horizontally shifted manner. The first semiconductor die includes a first chip selection terminal and a first lower terminal electrically connected to the first chip selection terminal. The second semiconductor die includes a second chip selection terminal electrically connected to a first upper terminal of the first semiconductor die via a second lower terminal of the second semiconductor die. The first upper terminal which is electrically connected to the second chip selection terminal is not electrically connected to the first lower terminal which is electrically connected to the first chip selection terminal. |
| US10192842B2 |
Package for environmental parameter sensors and method for manufacturing a package for environmental parameter sensors
A sensor package comprises a sensor chip bonded to an intermediate carrier, with the sensor element over an opening in the carrier. The package is for soldering to a board, during which the intermediate carrier protects the sensor part of the sensor chip. |
| US10192840B2 |
Ball pad with a plurality of lobes
In some forms, an electronic assembly includes a substrate; and a ball pad mounted on the substrate, wherein the ball pad includes a plurality of lobes projecting distally from a center of the ball pad. In some forms, he electronic assembly includes a substrate; and a ball pad mounted on the substrate, wherein the ball pad includes a lobe projecting distally from a center of the ball pad. In some forms, the electronic assembly includes a substrate; and a ball pad mounted on the substrate, wherein the ball pad includes at least one lobe projecting distally from a center of the ball pad; and an electronic package that includes at least one conductor that electrically connects the ball pad on the substrate to the electronic package. |
| US10192839B2 |
Conductive pillar shaped for solder confinement
A method of fabricating a pillar-type connection includes forming a first conductive layer. A second conductive layer is formed on the first conductive layer to define a conductive pillar that includes a top surface defining a recess aligned with a hollow core of the first conductive layer. A conductive via that terminates at a top surface of the first conductive layer is formed. |
| US10192835B2 |
Substrate designed to provide EMI shielding
Packages and packaging techniques for providing EMI shielding are described. In an embodiment, a package includes an electrically conductive ground structure on a ground pad at a periphery of a package substrate. The electrically conductive ground structure is encapsulated in a molding compound, and a surface of the electrically conductive ground structure is exposed at a side surface of the molding compound. An electrically conductive shield layer is on top and side surfaces of the molding compound, and in physical contact with the surface of the exposed electrically conductive ground structure. |
| US10192834B2 |
Semiconductor package and fabrication method thereof
A semiconductor package is provided, including: a substrate; a first semiconductor element disposed on the substrate and having a first conductive pad grounded to the substrate; a conductive layer formed on the first semiconductor element and electrically connected to the substrate; a second semiconductor element disposed on the first semiconductor element through the conductive layer; and an encapsulant formed on the substrate and encapsulating the first and second semiconductor elements. Therefore, the first and second semiconductor elements are protected from electromagnetic interference (EMI) shielding with the conductive layer being connected to the grounding pad of the substrate. A fabrication method of the semiconductor package is also provided. |
| US10192833B2 |
Interposer and semiconductor package with noise suppression features
Interposer and semiconductor package embodiments provide for the isolation and suppression of electronic noise such as EM emissions in the semiconductor package. The interposer includes shield structures in various embodiments, the shield structures blocking the electrical noise from the noise source, from other electrical signals or devices. The shields include solid structures and some embodiments and decoupling capacitors in other embodiments. The coupling structures includes multiple rows of solder balls included in strips that couple the components and surround and contain the source of electrical noise. |
| US10192830B2 |
Self-similar and fractal design for stretchable electronics
The present invention provides electronic circuits, devices and device components including one or more stretchable components, such as stretchable electrical interconnects, electrodes and/or semiconductor components. Stretchability of some of the present systems is achieved via a materials level integration of stretchable metallic or semiconducting structures with soft, elastomeric materials in a configuration allowing for elastic deformations to occur in a repeatable and well-defined way. The stretchable device geometries and hard-soft materials integration approaches of the invention provide a combination of advance electronic function and compliant mechanics supporting a broad range of device applications including sensing, actuation, power storage and communications. |
| US10192828B2 |
Metal gate transistor
A metal gate transistor is provided. The metal gate transistor includes a semiconductor substrate; a metal gate structure formed on the semiconductor substrate; source/drain regions formed in the semiconductor substrate on sides of the metal gate structure; an etch stop layer formed on a top surface of the metal gate structure with a top surface leveled with a top surface of the first dielectric layer; an etch stop sidewall formed on each side of the metal gate structure with a top surface leveled with the top surface of the first dielectric layer; and a contact plug formed in the first dielectric layer to electrically connect to each source/drain region formed in the semiconductor substrate. |
| US10192826B2 |
Conductive layout structure including high resistive layer
A layout structure including a conductive structure is provided. The layout structure includes a dielectric layer formed on a substrate and a conductive structure formed in the dielectric layer. And the conductive structure further includes a barrier layer, a metal layer formed within the barrier layer, and a high resistive layer sandwiched in between the barrier layer and the metal layer. |
| US10192824B2 |
Edge structure for multiple layers of devices, and method for fabricating the same
An edge structure for multiple layers of devices including stacked multiple unit layers includes first and second stair structures. The first stair structure is at a first direction of the devices where device contacts are formed, including first edge portions of the unit layers at the first direction, of which the borders gradually retreat with increase of level height. The elevation angle from the border of the first edge portion of the bottom unit layer to that of the top one is a first angle. The second stair structure includes second edge portions of the unit layers at a second direction. The variation of border position of the second edge portion with increase of level height is irregular. The elevation angle from the border of the second edge portion of the bottom unit layer to that of the top one is a second angle larger than the first angle. |
| US10192822B2 |
Modified tungsten silicon
A method for forming a precision resistor or an e-fuse structure where tungsten silicon is used. The tungsten silicon layer is modified by implanting nitrogen into the structure. |
| US10192819B1 |
Integrated circuit structure incorporating stacked field effect transistors
Disclosed are integrated circuit (IC) structure embodiments that incorporate a stacked pair of field effect transistors (FETs) (e.g., gate-all-around FETs) and metal components that enable power and/or signal connections to source/drain regions of those FETs. Specifically, the IC includes a first FET and a second FET stacked on and sharing a gate with the first FET. The metal components include an embedded contact in a source/drain region of the first FET and connected to a wire (e.g., a power or signal wire). The wire can be a front end of the line (FEOL) wire positioned laterally adjacent to the source/drain region and the embedded contact can extend laterally from the source/drain region to the FEOL wire. Alternatively, the wire can be a back end of the line (BEOL) wire and an insulated contact can extend vertically from the embedded contact through the second FET to the BEOL wire. |
| US10192816B2 |
Semiconductor package and fabricating method thereof
A semiconductor device structure and a method for making a semiconductor device. As non-limiting examples, various aspects of this disclosure provide various semiconductor package structures, and methods for making thereof, that comprise a thin fine-pitch redistribution structure. |
| US10192814B2 |
Electronic assemblies having a cooling chip layer with fluid channels and through substrate vias
An electronics assembly includes a cooling chip structure having a device facing surface opposite a base surface and one or more sidewalls extending around a perimeter of the cooling chip structure between the device facing surface and the base surface. A plurality of fluid microchannels fluidly are coupled to a fluid inlet port and a fluid outlet port. A through substrate via extends from the base surface of the cooling chip structure to the device facing surface of the cooling chip structure, where the through substrate via intersects two or more fluid microchannels of the plurality of fluid microchannels. |
| US10192811B2 |
Power semiconductor device
When a power semiconductor device is energized, heat generated from upper-side power semiconductor chips mounted on a P-potential electrode transfers to a first heat mass portion and a second heat mass portion, and heat generated from lower-side power semiconductor chips mounted on a intermediate potential electrode transfers to a resistor. A lead frame, the power semiconductor chip, an inner lead and the resistor are placed in symmetry with respect to a centerline, which can reduce the difference among the temperature increases of the power semiconductor chips when energized. In this way, transient temperature increase of the power semiconductor chip can be suppressed without adding a new member, such as a heat diffusion plate. |
| US10192808B1 |
Semiconductor structure
A semiconductor structure includes a substrate having a frontside surface and a backside surface. A through-substrate via extends into the substrate from the frontside surface. The through-substrate via comprises a top surface. A metal cap covers the top surface of the through-substrate via. A plurality of cylindrical dielectric plugs is embedded in the metal cap. The cylindrical dielectric plugs are distributed only within a central area of the metal cap. The central area is not greater than a surface area of the top surface of the through-substrate via. |
| US10192804B2 |
Bump-on-trace packaging structure and method for forming the same
A device comprises a first package component, and a first metal trace and a second metal trace on a top surface of the first package component. The device further includes a dielectric mask layer covering the top surface of the first package component, the first metal trace and the second metal trace, wherein the dielectric mask layer has an opening therein exposing the first metal trace. The device also includes a second package component and an interconnect formed on the second package component, the interconnect having a metal bump and a solder bump formed on the metal bump, wherein the solder bump contacts the first metal trace in the opening of the dielectric mask layer. |
| US10192801B2 |
Semiconductor device and method of forming vertical interconnect structure in substrate for IPD and baseband circuit separated by high-resistivity molding compound
A semiconductor device is made with a conductive via formed through a top-side of the substrate. The conductive via extends vertically through less than a thickness of the substrate. An integrated passive device (IPD) is formed over the substrate. A plurality of first conductive pillars is formed over the first IPD. A first semiconductor die is mounted over the substrate. An encapsulant is formed around the first conductive pillars and first semiconductor die. A second IPD is formed over the encapsulant. An interconnect structure is formed over the second IPD. The interconnect structure operates as a heat sink. A portion of a back-side of the substrate is removed to expose the first conductive via. A second semiconductor die is mounted to the back-side of the substrate. The second semiconductor die is electrically connected to the first IPD and first semiconductor die through the conductive via. |
| US10192800B2 |
Semiconductor device
A semiconductor device comprises two electrodes with opposite faces; a semiconductor wafer sandwiched between the two electrodes; an outer insulating ring attached to the two electrodes and surrounding the semiconductor wafer; a middle insulating ring inside the outer insulating ring and surrounding the semiconductor wafer, whereby the middle insulating ring is made of a plastics material; and an inner insulating ring inside the middle insulating ring, whereby the inner insulating ring is made of ceramics and/or glass material. Either the middle insulating ring or the inner insulating ring has a tongue and the other thereof has a groove such that the tongue fits into the groove for their rotational alignment. The middle insulating ring and the inner insulating ring have a radial opening for receiving a gate connection of the semiconductor device. |
| US10192796B2 |
Semiconductor device and method of forming dual-sided interconnect structures in FO-WLCSP
A semiconductor device has a substrate with first and second conductive layers formed over first and second opposing surfaces of the substrate. A plurality of bumps is formed over the substrate. A semiconductor die is mounted to the substrate between the bumps. An encapsulant is deposited over the substrate and semiconductor die. A portion of the bumps extends out from the encapsulant. A portion of the encapsulant is removed to expose the substrate. An interconnect structure is formed over the encapsulant and semiconductor die and electrically coupled to the bumps. A portion of the substrate can be removed to expose the first or second conductive layer. A portion of the substrate can be removed to expose the bumps. The substrate can be removed and a protection layer formed over the encapsulant and semiconductor die. A semiconductor package is disposed over the substrate and electrically connected to the substrate. |
| US10192795B2 |
Semiconductor device
A semiconductor device including a power transistor is prevented from being broken. A cathode of a temperature sensing diode and a source of a power MOSFET are electrically coupled to each other so as to have the same potential. Such a characteristic point allows the temperature sensing diode to be disposed in a power MOSFET formation region without considering withstand voltage. This means that there is no need to provide an isolating structure that maintains a withstand voltage between the power MOSFET and the temperature sensing diode. Consequently, the power MOSFET and the temperature sensing diode can be closely disposed. |
| US10192794B2 |
Wafer transfer device
An embodiment comprises: a guide moving in the vertical direction or the horizontal direction; a transfer arm provided on the guide and loading spaced apart wafers; a laser emission unit disposed on the guide and emitting first laser beams at the spaced apart wafers loaded on the transfer arm; and a laser detection unit disposed below the transfer arm and collecting, from among the first laser beams, second laser beams having passed through gaps between the spaced apart wafers. |
| US10192789B1 |
Methods of fabricating dual threshold voltage devices
A device having two transistors with dual thresholds, and a method of fabricating the device, including fabricating a silicide source, a conductive layer, and contacts to a plurality of layers of the device, is provided. The device has a core and a plurality of layers that surround the core in succession, including a first layer, a second layer, a third layer, and a fourth layer. The device further comprises a first input terminal coupled to the core, the first input terminal being configured to receive a first voltage and a second input terminal coupled to the fourth layer, the second input terminal being configured to receive a second voltage. The device comprises a common source terminal coupled to the core and the fourth layer. A memory device, such as an MTJ, may be coupled to the device. |
| US10192785B2 |
Devices and methods related to fabrication of shielded modules
Devices and methods related to fabrication of shielded modules. In some embodiments, a carrier assembly can be provided for processing of packaged modules. The carrier assembly can include a plate having a first side that defines a plurality of openings, and an adhesive layer implemented on the first side of the plate. The adhesive layer can define a plurality of openings arranged to substantially match the openings of the plate, with each opening of the adhesive layer being dimensioned such that the adhesive layer is capable of providing an adhesive engagement between an underside perimeter portion of a package and a perimeter portion about the corresponding opening of the first side of the plate. |
| US10192783B2 |
Gate contact structure over active gate and method to fabricate same
Gate contact structures disposed over active portions of gates and methods of forming such gate contact structures are described. For example, a semiconductor structure includes a substrate having an active region and an isolation region. A gate structure has a portion disposed above the active region and a portion disposed above the isolation region of the substrate. Source and drain regions are disposed in the active region of the substrate, on either side of the portion of the gate structure disposed above the active region. A gate contact structure is disposed on the portion of the gate structure disposed above the active region of the substrate. |
| US10192782B2 |
Method of manufacturing semiconductor device using a plurality of etch stop layers
A method of manufacturing the semiconductor device includes providing a first interlayer dielectric layer having a conductive pattern, sequentially forming a first etch stop layer, a second etch stop layer, a second interlayer dielectric layer and a mask pattern on the first interlayer dielectric layer, forming an opening in the second interlayer dielectric layer using the mask pattern as a mask, the opening exposing the second etch stop layer, and performing an etching process including simultaneously removing the mask pattern and the second etch stop layer exposed by the opening to expose the first etch stop layer. |
| US10192781B2 |
Interconnect structures incorporating air gap spacers
A dual damascene article of manufacture comprises a trench containing a conductive metal column where the trench and the conductive metal column extend down into and are contiguous with a via. The trench and the conductive metal column and the via have a common axis. These articles comprise interconnect structures incorporating air-gap spacers containing metal/insulator structures for Very Large Scale Integrated (VLSI) and Ultra Large Scale Integrated (ULSI) devices and packaging. The trench in this regard comprises a sidewall air-gap immediately adjacent the side walls of the trench and the conductive metal column, the sidewall air-gap extending down to the via to a depth below a line fixed by the bottom of the trench, and continues downward in the via for a distance of from about 1 Angstrom below the line to the full depth of the via. In another aspect, the article of manufacture comprises a capped dual damascene structure. |
| US10192780B1 |
Self-aligned multiple patterning processes using bi-layer mandrels and cuts formed with block masks
Methods of self-aligned double patterning and improved interconnect structures formed by self-aligned double patterning. A mandrel line including an upper layer and a lower layer is formed over a hardmask. A non-mandrel cut block is formed over a portion of a non-mandrel line, after which the upper layer of the mandrel line is removed. An etch mask is formed over a first section of the lower layer of the mandrel line defining a mandrel cut block over a first portion of the hardmask. The first section of the lower layer is arranged between adjacent second sections of the lower layer. The second sections of the lower layer of the mandrel line are removed to expose respective second portions of the hardmask, and the second portions of the hardmask are removed to form a trench. The mandrel cut block masks the first portion of the hardmask during the etching process. |
| US10192777B2 |
Method of fabricating STI trench
A method of fabricating an STI trench includes providing a substrate. Later, a first mask is formed to cover the substrate. The first mask includes numerous sub-masks. A first trench is disposed between each sub-mask. Subsequently, a protective layer is formed to fill up the first trench. Then, a second mask is formed to cover the first mask. The second mask includes an opening. The sub-mask directly disposed under the opening is defined as a joint STI pattern. After that, the joint STI pattern is removed to transform the first mask into a third mask. Later, the second mask is removed followed by removing the protective layer. Finally, part of the substrate is removed by taking the third mask as a mask to form numerous STI trenches. |
| US10192774B2 |
Temperature control device for processing target object and method of selectively etching nitride film from multilayer film
A temperature control device includes a moving stage allowed to be heated and configured to mount a processing target object on a top surface thereof; a cooling body allowed to be cooled and fixed at a position under the moving stage; a shaft, having one end connected to the moving stage; the other end positioned under the cooling body; a first flange provided at the other end; and a second flange provided between the first flange and the cooling body, extended between the one end and the other end; a driving plate, provided between the first flange and the second flange, having a top surface facing the second flange and a bottom surface opposite to the top surface; an elastic body provided between the bottom surface of the driving plate and the first flange; and a driving unit configured to move the driving plate up and down. |
| US10192763B2 |
Methodology for chamber performance matching for semiconductor equipment
Embodiments of the present disclosure provide methodology to match and calibrate processing chamber performance in a processing chamber. In one embodiment, a method for calibrating a processing chamber for semiconductor manufacturing process includes performing a first predetermined process in a processing chamber, collecting a first set of signals transmitted from a first group of sensors disposed in the processing chamber to a controller while performing the predetermined process, analyzing the collected first set of signals, comparing the collected first set of signals with database stored in the controller to check sensor responses from the first group of sensors, calibrating sensors based on the collected first set of signals when a mismatch sensor response is found, subsequently performing a first series of processes in the processing chamber, and collecting a second set of signals transmitted from the sensors to the controller while performing the series of processes. |
| US10192761B2 |
Pick arm comprising a winged part for a bonding apparatus
A pick arm for a pick and place apparatus for semiconductor devices, the pick arm comprising first and second ends along a longitudinal axis of the pick arm, and a pick tool located at the first end of the pick arm for picking up semiconductor devices. The pick arm further comprises a winged part extending in a direction transverse to the longitudinal axis between the first and second ends of the pick arm, wherein the winged part comprising a sloping surface. The sloping surface is inclined between a top portion and a bottom portion of the winged part such that the sloping surface is nearer to the longitudinal axis at the top portion than at the bottom portion of the winged part. |
| US10192760B2 |
Substrate supporting unit, substrate processing apparatus, and method of manufacturing substrate supporting unit
A substrate supporting unit, a substrate processing apparatus, and a method of manufacturing the substrate supporting unit are provided. The substrate supporting unit includes a susceptor provided with heaters to heat a substrate placed on the susceptor, and including a first temperature region and a second temperature region having a higher temperature than that of the first temperature region; a heat dissipating member including a contact surface being in thermal contact with the second temperature region; and a reflecting member disposed approximately in parallel with one surface of the susceptor to reflect heat emitted from the susceptor toward the susceptor. |
| US10192759B2 |
Image reversal with AHM gap fill for multiple patterning
Methods and apparatuses for multiple patterning using image reversal are provided. The methods may include depositing gap-fill ashable hardmasks using a deposition-etch-ash method to fill gaps in a pattern of a semiconductor substrate and eliminating spacer etching steps using a single-etch planarization method. Such methods may be performed for double patterning, multiple patterning, and two dimensional patterning techniques in semiconductor fabrication. |
| US10192757B2 |
Substrate cleaning apparatus and substrate cleaning method
A substrate cleaning apparatus capable of quickly removing cleaning liquid that has been used in cleaning of a substrate with a roll cleaning tool from the substrate. The substrate cleaning apparatus includes a substrate holder configured to hold and rotate a substrate; a cleaning-liquid supply nozzle configured to supply cleaning liquid onto a first region of the substrate; a roll cleaning tool configured to be placed in sliding contact with the substrate in the presence of the cleaning liquid to thereby clean the substrate; and a fluid supply nozzle configured to supply fluid, which is constituted by pure water or chemical liquid, onto a second region of the substrate. The second region is located at an opposite side of the first region with respect to the roll cleaning tool, and a supply direction of the fluid is a direction from a central side toward a peripheral side of the substrate. |
| US10192751B2 |
Systems and methods for ultrahigh selective nitride etch
A method for selectively etching a silicon nitride layer on a substrate includes arranging a substrate on a substrate support of a substrate processing chamber. The substrate processing chamber includes an upper chamber region, an inductive coil arranged outside of the upper chamber region, a lower chamber region including the substrate support and a gas dispersion device. The gas dispersion device includes a plurality of holes in fluid communication with the upper chamber region and the lower chamber region. The method includes supplying an etch gas mixture to the upper chamber region and striking inductively coupled plasma in the upper chamber region by supplying power to the inductive coil. The etch gas mixture etches silicon nitride, promotes silicon dioxide passivation and promotes polysilicon passivation. The method includes selectively etching the silicon nitride layer on the substrate and extinguishing the inductively coupled plasma after a predetermined period. |
| US10192746B1 |
STI inner spacer to mitigate SDB loading
A shallow trench isolation (STI) structure is formed from a conventional STI trench structure formed of first dielectric material extending into the substrate. The conventional STI structure undergoes further processing, including removing a first portion of the dielectric material and adjacent portions of the semiconductor substrate to create a first recess, and then removing another portion of the dielectric material to create a second recess in just the dielectric material. A nitride layer is formed above remaining dielectric material and on the sidewalls of the substrate. A second dielectric material is formed on the spacer layer and fills the remainder of first and second recesses. The nitride layer provides an “inner spacer” between the first insulating material and the second insulating material and also separates the substrate from the second insulating material. An isotropic Fin reveal process is performed and the STI structure assists in equalizing fin heights and increasing active S/D region area/volume. |
| US10192744B2 |
Semiconductor device, related manufacturing method, and related electronic device
A method for manufacturing a semiconductor device may include the following steps: preparing a first substrate; providing a first conductor, which is configured to electrically connect two elements associated with the first substrate; providing a second conductor on the first substrate, wherein the second conductor is electrically connected to the first conductor; preparing a second substrate; providing a third conductor, which is configured to electrically connect two elements associated with the second substrate; providing a fourth conductor on the second substrate, wherein the fourth conductor is electrically connected to the third conductor; providing a fifth conductor on the fourth conductor; and combining the fifth conductor with the second conductor through eutectic bonding. |
| US10192742B2 |
Soft landing nanolaminates for advanced patterning
Methods for depositing nanolaminate protective layers over a core layer to enable deposition of high quality conformal films over the core layer for use in advanced multiple patterning schemes are provided. In certain embodiments, the methods involve depositing a thin silicon oxide or titanium oxide film using plasma-based atomic layer deposition techniques with a low high frequency radio frequency (HFRF) plasma power, followed by depositing a conformal titanium oxide film or spacer with a high HFRF plasma power. |
| US10192737B2 |
Method for heteroepitaxial growth of III metal-face polarity III-nitrides on substrates with diamond crystal structure and III-nitride semiconductors
The present invention discloses a method of heteroepitaxial growth enabling the successful growth of thin films of GaN and III-nitride semiconductor heterostructures of (0001) orientation with III metal-face polarity on diamond substrates being either polycrystalline or single crystal with various crystallographic orientations. The method uses a thin AlN nucleation layer on the diamond substrate with thickness equal or less than 5 nm, grown by Molecular Beam Epitaxy (MBE) using a nitrogen plasma source. The invention enables the development of very high power metal-face III-nitride devices, such as High Electron Mobility Transistors, on single crystal or polycrystalline diamond substrates. The method is also applicable for other element IV substrates with diamond crystal structure. |
| US10192729B2 |
Apparatus and method for static gas mass spectrometry
A method of static gas mass spectrometry is provided. The method includes the steps of: introducing a sample gas comprising two or more isotopes to be analyzed into a static vacuum mass spectrometer at a time, t0; operating an electron impact ionization source of the mass spectrometer with a first electron energy below the ionization potential of the sample gas for a first period of time that is following t0 until a time t1; and operating the electron impact ionization source with a second electron energy at least as high as the ionization potential of the sample gas for a second period of time that is after time t1. The first time period from t0 to t1 is a period corresponding to a period taken for the isotopes of the sample gas to equilibrate in the mass spectrometer. A constant ion source temperature is preferably maintained. Also provided is a static gas mass spectrometer. |
| US10192725B2 |
Atmospheric interface for electrically grounded electrospray
An interface for a mass spectrometer system is provided. The interface can include an inner ceramic tube fabricated from a first ceramic material and an outer tube fabricated from a second ceramic material surrounding the inner ceramic tube. The inner ceramic tube can have high electrical resistivity and high thermal conductivity and the intermediate ceramic tube can have an electrical resistivity that is at least an order of magnitude higher than the electrical resistivity of the first ceramic material and a thermal conductivity that is at least an order of magnitude higher than the thermal conductivity of the first ceramic material. |
| US10192722B2 |
Plasma treatment method, plasma treatment apparatus, and plasma-treated long object
A plasma treatment method subjects a long object to be treated to plasma treatment by placing the long object to be treated in contact with plasma, the density distribution of which varies while selectively passing the long object to be treated through an area having high plasma density so that a surface of the long object can be thoroughly and uniformly subjected to plasma treatment. The method is applied to a plasma treatment apparatus, and a plasma-treated long object can be obtained by the method. |
| US10192720B2 |
Plasma processing apparatus
A plasma processing apparatus includes a processing chamber to be depressurized in a vacuum vessel with a sidewall made of a transparent or translucent dielectric material, a stage in the processing chamber to mount a wafer thereon, a coil disposed around an outer side of the sidewall and supplied with radio-frequency power for forming plasma above the stage in the processing chamber, a lamp disposed above the coil outside the vacuum vessel which radiates light onto the wafer, and a reflector disposed the coil and reflecting light to irradiate an inside of the processing chamber. |
| US10192719B2 |
Plasma processing method
A plasma processing method is provided that includes a step of loading a substrate into a chamber where a plasma process is to be executed, a step of applying a high frequency bias power that has a lower frequency than a high frequency excitation power for plasma excitation to a mounting table on which the substrate is mounted, and a step of applying a DC voltage to an electrostatic chuck configured to electrostatically attract the substrate that is mounted on the mounting table. The step of applying the DC voltage is performed after the step of applying the high frequency bias power. |
| US10192716B2 |
Multi-beam dark field imaging
Multi-beam scanning electron microscope (SEM) inspection systems with dark field imaging capabilities are disclosed. An SEM inspection system may include an electron source and at least one optical device. The at least one optical device may be configured to produce a plurality of primary beamlets utilizing electrons provided by the electron source and deliver the plurality of primary beamlets toward a target. The apparatus may also include an array of detectors configured to receive a plurality of image beamlets emitted by the target in response to the plurality of primary beamlets and produce at least one dark field image of the target. |
| US10192713B2 |
Charged particle beam device
In a side entry type sample holder, vibrations in the radial direction of the sample holder provoke a resolving power decrease in the measurement results. In the present invention, the side entry type sample holder has a stepped portion in the radial direction of an axial portion. The sample stage has a support part contacting the stepped portion in a cylindrical portion capable of moving as one body in the axis direction of the sample holder, and, through the contact between the stepped portion and the support part, a frictional force is generated, opposing the radial direction of the axial portion in the sample holder. In this manner, the vibrations in the radial direction of the sample holder are suppressed, and the resolving power decrease in the measurement results is suppressed. |
| US10192712B2 |
Charged particle beam writing apparatus, method of adjusting beam incident angle to target object surface, and charged particle beam writing method
A charged particle beam writing apparatus according to one aspect of the present invention includes an emission unit to emit a charged particle beam, an electron lens to converge the charged particle beam, a blanking deflector, arranged backward of the electron lens with respect to a direction of an optical axis, to deflect the charged particle beam in the case of performing a blanking control of switching between beam-on and beam-off, a blanking aperture member, arranged backward of the blanking deflector with respect to the direction of the optical axis, to block the charged particle beam having been deflected to be in a beam-off state, and a magnet coil, arranged in a center height position of the blanking deflector, to deflect the charged particle beam. |
| US10192707B2 |
Fuse assembly with replaceable casing
A fuse assembly includes a casing having two slots defined through the first end thereof, and a conductive member is located in the casing and has a first end extending through the second end of the casing. The conductive member includes two blades with a fuse connected therebetween. A cap is detachably mounted to the first end of the casing and has a light member connected thereto. The light member has a leg portion which is electrically connected to a second end of the conductive member. The cap includes two arms which are detachably hooked to two positioning members on two sides of the casing to ensure the connection between the cap and the casing. When the fuse is burned off, the light member lights on, the cap is removed from the casing, and is detachably connected to a new casing with a functional fuse therein. |
| US10192705B2 |
Fuse element, a fuse, a method for producing a fuse, SMD fuse and SMD circuit
The invention relates to a fuse element (12_1; 12_2), comprising two connecting contacts (24_1′, 24_1″; 24_2′, 24_2″) and an interposed conductive track (26_1; 26_2), wherein the conductive track (26_1; 26_2) has a reduced line-cross-section, in relation, to the connecting contacts (24_1′, 24_1″; 24_2′, 24_2″) at least in some sections, further comprising at least one overlay (16_1; 16_2′, 16_2″), wherein the fuse element (12_1; 12_2) and the overlay (16_1; 16_2′, 16_2″) each comprise materials which undergo diffusion when a predetermined ambient temperature is exceeded and when an electric current is conducted by the fuse element (12_1; 12_2). The invention further relates to a fuse (TO) having such a fuse element (12_1; 12_2) and a base support (14), wherein the fuse element (12_1; 12_2) is disposed on a surface of the base support (14). |
| US10192703B2 |
Bypass switch comprising a plunger, a first contact device and a second contact device
A bypass switch provides a bypass path between a first terminal and a second terminal. The bypass switch includes: a first contact device; a second contact device; and a plunger being moveable from an initial state, via a first state, to a second state, wherein in the initial state the first terminal and second terminal are conductively separated; in the first state a movement of the plunger causes the first contact device to close a first conductive connection between the first terminal and the second terminal; and in the second state the plunger mechanically forces the second contact device to close a second conductive connection between the first terminal and the second terminal. |
| US10192699B2 |
Power seat operation device and power seat
In a power seat operation device, a micro switch is attached inside a dial that is rotatably provided to a side face of a power seat. An opening is formed inside the dial, with an operation portion of a knob to operate the micro switch inserted through the opening. There is accordingly a possibility that liquid might infiltrate into the dial, however a channel is formed inside the dial by the dial and the knob. The channel lets liquid flow downward to the lower side of the micro switch so as to discharge the liquid to outside the dial in cases in which liquid has infiltrated into the dial through the opening in a state in which the opening is positioned at the upper side of the micro switch. The channel is partitioned from the micro switch, enabling flow of liquid to the micro switch to be prevented or suppressed. |
| US10192695B2 |
Keyswitch assembly and manufacturing method thereof
A keyswitch assembly and a manufacturing method thereof are disclosed. The keyswitch assembly includes a display unit, a carrier, one or more contact pads, a light-shielding layer, and a transparent keycap. The display unit includes one or more display regions. The carrier is for carrying the display unit. The contact pads are on the carrier and are electrically connected to the display regions. The light-shielding layer is positioned corresponding to the display regions. The light-shielding layer includes one or more transparent patterns. The transparent patterns are positioned respectively corresponding to the display regions. The transparent keycap is positioned on the display unit. |
| US10192692B2 |
Explosion-proof cross-type limit switch
A cross-type limit switch (10) with a housing (12) that contains a gear mechanism (24) that includes a cover plate (38), base plate (48), and intermediate plate (42). The intermediate plate (42) has first and second cutouts (44, 46) within which respective gearwheels (54, 58) are arranged. The first and second gear wheels (54, 58) have respective plugthrough openings (56, 60), and a shaft (20) coupled to an actuating lever (18) outside the housing is rotatably mounted in a first bearing arrangement (22) connected to the housing. The actuating lever shaft (20) extends through the first plugthrough opening (56) of the first gear wheel (54) for rotating and radially locating the first gear wheel (54). A rotary switch (30) arranged in the housing (12) has a switch shaft (138) rotatably mounted in a second bearing arrangement (106, 34) that extend through the second plugthrough opening (60) of the second gearwheel for rotating and radially locating the second gearwheel (58). |
| US10192690B2 |
Titanium oxide-based supercapacitor electrode material and method of manufacturing same
A titanium oxide-based supercapacitor electrode material and a method of manufacturing same. A reactive substance of the titanium oxide-based supercapacitor electrode material is a conductive titanium oxide. The conductive titanium oxide is a sub-stoichiometric titanium oxide, reduced titanium dioxide, or doped reduced titanium dioxide obtained by further doping an element in reduced titanium dioxide. The titanium oxide-based supercapacitor electrode material has a carrier concentration greater than 1018 cm−3, and the titanium oxide-based supercapacitor electrode material has a specific capacitance 20 F/g to 1,740 F/g at a charge/discharge current of 1 A/g. |
| US10192689B2 |
Self-assembly of perovskite for fabrication of transparent devices
Provided is a continuous material pattern, the pattern is selected to have a plurality of material-free voids, the material including at least one perovskite material. |
| US10192688B2 |
Electrolytic capacitor and method for improved electrolytic capacitor anodes
Provided is an anode for an electrolytic device formed of a substantially uniform mixture of elongated elements with capacitor grade tantalum powders of tantalum metal. Also provided is a method for forming an anode or cathode for an electrolytic device formed of a substantially uniform mixture of elongated elements of a valve metal and a conductive powder metal. |
| US10192687B2 |
Capacitor assembly having a non-symmetrical electrode structure and capacitor seat structure thereof
The present disclosure provides a capacitor assembly having a non-symmetrical electrode structure and a capacitor seat structure thereof. The capacitor assembly includes a capacitor seat structure and a capacitor package structure. The capacitor seat structure includes a capacitor seat, a first electrode layer and a second electrode layer. The capacitor seat has a first through hole, a first groove, a second through hole and a second groove. The capacitor package structure includes a first conductive pin and a second conductive pin. The first conductive pin passes through the first through hole and is disposed inside the first groove to electrically contact the first electrode layer. The second conductive pin passes through the second through hole and is disposed inside the second groove to electrically contact the second electrode layer. |
| US10192686B1 |
Multilayer electronic component and board having the same
There are provided a multilayer electronic component and a board having the same. The multilayer electronic component includes: a capacitor body; external electrodes including band portions and connected portions; connection terminals formed of insulators and disposed on the band portions; and insulating portions disposed on at least some circumferential surfaces of the connection terminals. The connection terminals include conductive patterns formed on surfaces thereof facing the band portions and surfaces thereof opposing the surfaces, cut portions are formed in some the circumferential surfaces connecting between the conductive patterns facing each other, connection patterns are formed on the cut portions to electrically connect between the conductive patterns facing each other, and the insulating portions are disposed so as not to cover the cut portions. |
| US10192680B2 |
Planar transformer components comprising electrophoretically deposited coating
Provided is an electrically insulated component for use in a planar transformer. The insulated component may include a planar transformer conductive component having a first surface, a second surface and a plurality of edges. The insulated component may also include a first layer including an oxidized metal coating, as well as a second layer including an electrophoretically deposited (EPD) insulating coating. The EDP coating may include a polymer and an inorganic material. The first layer and the second layer may cover at least the first surface and the plurality of edges of the conductive component and the first layer may be disposed between the conductive component and the second layer. Also provided is a method of manufacturing of the electrically insulated component. |
| US10192677B2 |
Method and apparatus for leakage monitoring for oil-immersed electrical transformers
The present invention comprises an apparatus and method for detecting a loss of oil from an oil-immersed transformer, based on fitting a transformer top-oil temperature model to online measurements in an iterative optimization process that yields fitted values for a first model parameter representing the top-oil temperature rise over ambient temperature and a second model parameter representing the oil time constant. Among the several advantages seen in the contemplated apparatus and method is the reduction in required instrumentation, whereby transformer oil leaks are indirectly detected without requiring pressure sensors or mechanical floats, although the presence of such sensors is not excluded by the teachings herein. |
| US10192675B2 |
Pulse transformer
A pulse transformer includes a drum core having a winding core, two flanges on end portions of the winding core and each having a notch formed in the upper portion, two terminal electrodes and a center tap disposed on one of the flanges, two further terminal electrodes and another center tap disposed on the other flange, a coil includes four wires wound around the winding core of the drum core and connected to the terminal electrodes and the center taps, two of the wires are wound in one direction, and the other wires are wound in another direction, two of the wires cross each other at the inner surface of one of the flanges, and the other wires cross each other at the inner surface of the other flange. |
| US10192668B2 |
Coil component
In the coil component, for dimensions measured along a predetermined direction of a winding core portion, a dimension of each of top surfaces of first and second flange portions is equal to or larger than a dimension of the winding core portion. |
| US10192666B2 |
Magnetic device for locking a gear selector lever of a vehicle in a predetermined position, method for producing a magnetic device, and method for operating a magnetic device
A magnetic device for locking a gear shift lever of a vehicle in a predetermined position, where the magnetic device has a coil, a tie component, which is or can be movably supported in the coil, and a spring, which is disposed outside the coil, where the spring is designed to push the tie component out of the coil. |
| US10192664B2 |
Exciting device for electromagnetic connection device
A yoke includes an annular groove in which an exciting coil is stored, and a first through hole formed in the bottom of the annular groove. A terminal housing includes a boss portion fitted in the first through hole and a connecting concave portion located on the opposite side of the annular groove with respect to the boss portion. The boss portion includes a second through hole extending in a direction parallel to the center line of the first through hole. An external connecting terminal is buried in the terminal housing. The external includes a coil extraction hole continuing to the second through hole. The extraction end of the exciting coil is soldered to the terminal in a state in which the extraction end is passed through the second through hole and the coil extraction hole. |
| US10192662B2 |
Method for producing grain-oriented electrical steel sheet
In a method for producing a grain-oriented electrical steel sheet by comprising a series of steps of hot rolling a raw steel material comprising C: 0.002-0.10 mass %, Si: 2.0-8.0 mass %, and Mn: 0.005-1.0 mass %, subjecting the steel sheet to a hot band annealing as required, cold rolling to obtain a cold rolled sheet having a final sheet thickness, subjecting the steel sheet to primary recrystallization annealing combined with decarburization annealing, applying an annealing separator to the steel sheet surface and then subjecting to final annealing, rapid heating is performed at a rate of not less than 50° C./s in a region of 200-700° C. in the heating process of the primary recrystallization annealing, and the steel sheet is held at any temperature of 250-600° C. in the above region for 1-10 seconds, while a soaking process of the primary recrystallization annealing is controlled to a temperature range of 750-900° C., a time of 90-180 seconds and PH2O/PH2 in an atmosphere of 0.25-0.40, whereby a grain-oriented electrical steel sheet being low in the iron loss and small in the deviation of the iron loss value is obtained. |
| US10192660B2 |
Process for preparation of nanoparticles from magnetite ore
The compositions and methods herein relate to stable dispersions of long chain carboxylic acid-stabilized magnetite nanoparticles dispersed in alcohol. These compositions are useful in advanced biomedical applications. |
| US10192652B2 |
Multi-cover bus bar unit for rotary machines
A bus bar unit includes a plurality of bus bars that electrically connects coils of each phase of a rotary electric machine and an external power supply, a plurality of caps that separately covers portions of the plurality of bus bars and separately hold the plurality of bus bars, and an outer holding section that is formed of an insulating material, that collectively covers the plurality of caps, and that is formed in a state in which the plurality of bus bars are electrically insulated. |
| US10192651B2 |
Transfer material, method of manufacturing transfer material, laminated body, method of manufacturing laminated body, method of manufacturing capacitance-type input device, and method of manufacturing image display device
A transfer material and a method of manufacturing the same, the transfer material including, in this order, a temporary support body, a first resin layer, and a second resin layer, the first resin layer not being water soluble, the second resin layer including a water soluble polymer, the second resin layer including a compound that has a heteroaromatic ring including a nitrogen atom as a ring member, and a content of the compound that has a heteroaromatic ring including a nitrogen atom as a ring member in the second resin layer being 3.0% by mass or greater with respect to a total solid content of the second resin layer. A laminated body including a substrate; an electrode pattern that is positioned above the substrate and that includes a metal in at least part of the electrode pattern; a second resin layer positioned above the electrode pattern; and a first resin layer positioned above the second resin layer, the second resin layer including a compound that has a heteroaromatic ring including a nitrogen atom as a ring member. |
| US10192639B2 |
Method and system for medical suggestion search
The present teaching relates to medical suggestion searching. In one example, data related to a medication drug are obtained. One or more candidate prescription strings are identified from the obtained data. Each of the candidate prescription strings is associated with a plurality of attributes. Each of the one or more candidate prescription strings is automatically processed based on at least one model to generate one or more prescription strings each with an associated ranking. At least some of the generated one or more prescription strings and the associated rankings are stored for future use. |
| US10192633B2 |
Low cost inbuilt deterministic tester for SOC testing
A method and system for high speed on chip testing for quality assurance. A multi-core system on a chip has a plurality of processing cores. The cores act as transaction agents with an auto-response unit fabricated on the chip at a chip boundary, the auto-response unit to provide a deterministic return value based on a logical address of a received read request. |
| US10192631B2 |
Current memory circuit for minimizing clock-feedthrough
The present disclosure relates to a current memory circuit for minimizing clock feedthrough, the circuit including: a first memory capacitor implemented as a first conductive type MOS; a second memory capacitor implemented as a second conductive type MOS; and a dummy capacitor for connecting the first memory capacitor and the second memory capacitor to each other, wherein the first memory capacitor and the second memory capacitor are current mirrors. Accordingly, a current memory circuit with a more accurate performance, low power consumption, and an integration capability can be provided. |
| US10192628B1 |
Semiconductor memory device and method of operating the same
Provided herein may be a semiconductor memory device and a method of operating the same. The method of operating a semiconductor memory device may include performing a program operation on a Least Significant Bit (LSB) of a page, and performing a program operation on a flag cell and a Most Significant Bit (MSB) of the page based on an operation of verifying at least one of a plurality of program states. The data stored in the flag cell may be data indicating whether data programmed according to the program operation is LSB data or MSB data. |
| US10192627B2 |
Non-volatile memory array with memory gate line and source line scrambling
A memory device includes a memory array arranged in rows and columns. The memory array may have at least four non-volatile memory (NVM) cells coupled in the same column of the memory array, in which each NVM cell may include a memory gate. The first and second NVM cells of the at least four NVM cells may share a first source region, and the third and fourth NVM cells may share a second source region. The memory gates of the first and second NVM cells may not be electrically coupled with one another, and the first and second source regions may not be electrically coupled with one another. Each of the first and second source regions may be electrically coupled with at least another source region of the same column in the memory array. |
| US10192620B2 |
Nonvolatile memory device, operating method of nonvolatile memory device, and storage device including nonvolatile memory device
A nonvolatile memory device performs a method which includes: causing a ready/busy signal pin of the nonvolatile memory device to indicate that the nonvolatile memory device is in a precharge busy state wherein the nonvolatile memory device is not available to perform memory access operations for its nonvolatile memory cells; applying one or more word line precharge voltages to one or more selected word lines among a plurality of word lines of the nonvolatile memory device to precharge the selected word lines; and, after at least a portion of the precharge operation, causing the ready/busy signal pin to transition from indicating the precharge busy state, to indicating that the nonvolatile memory device is in a ready state wherein the nonvolatile memory device is available to perform memory access operations for its nonvolatile memory cells. |
| US10192619B2 |
Methods for programming 1-R resistive change element arrays
Methods for reading and programming one or more resistive change elements within a 1-R resistive change element array are disclosed. These methods include using measurement and storage elements to measure the electrical response of one or more selected cells within an array and then comparing that stored electrical response to the electrical response of a reference element within the array to determine the resistive state of the one or more selected cells. These methods also include programming methods wherein selectable current limiting elements are used to permit or inhibit programming currents from flowing through selected and unselected cells, respectively. These methods further include programming methods that use specific biasing of array lines to provide sufficient programming currents through only selected cells. |
| US10192618B2 |
Nonvolatile memory device and operating method thereof
An operating method of a nonvolatile memory device includes storing different data in first and second reference cells connected to a word line, checking whether the different data are abnormally stored in the first and second reference cells, and when it is determined that the different data are abnormally stored in the first and second reference cells, swapping the first and second reference cells. |
| US10192617B2 |
Circuit and array circuit for implementing shift operation
A circuit and an array circuit for implementing a shift operation are provided. The circuit for implementing a shift operation includes a resistive random-access memory and four switches. The circuit has a simple structure and can improve computational efficiency. |
| US10192615B2 |
One-time programmable devices having a semiconductor fin structure with a divided active region
An One-Time Programmable (OTP) memory is built in at least one of semiconductor fin structures. The OTP memory has a plurality of OTP cells. At least one of the OTP cells can have at least one resistive element and at least one fin. The at least one resistive element can be built by an extended source/drain or a MOS gate. The at least one fin can be built on a common well or on an isolated structure that has at least one MOS gate dividing fins into at least one first active region and a second active region. |
| US10192610B2 |
Methods and apparatus for synchronizing communication with a memory controller
A memory controller receives data and phase-providing signals from a memory device. The phase-providing signal is not a clock signal, but is used by the memory controller to phase align a local data-sampling signal with the incoming data. The memory controller samples the data signal with the data-sampling signal. The memory controller can perform maintenance operations to update the phase relationship between the phase-providing and data-sampling signals. |
| US10192606B2 |
Charge extraction from ferroelectric memory cell using sense capacitors
A ferroelectric capacitor of a memory cell may be in electronic communication with a sense capacitor through a digit line. The digit line may be virtually grounded during memory cell sensing, limiting or avoiding voltage drop across the digit line, and allowing all or substantially all of the stored charge of the ferroelectric capacitor to be extracted and transferred to the sense capacitor. Virtually grounding the digit line may be achieved by activating a switching component (e.g., a p-type field-effect transistor) that is electronic communication with the digit line. The charge of the ferroelectric capacitor may be transferred through the switching component. A sense amplifier may compare the voltage of the sense capacitor to a reference voltage in order to determine the stored logic state of the memory cell. |
| US10192605B2 |
Memory cells and semiconductor devices including ferroelectric materials
Methods of operating a ferroelectric memory cell. The method comprises applying one of a positive bias voltage and a negative bias voltage to a ferroelectric memory cell comprising a capacitor including a top electrode, a bottom electrode, a ferroelectric material between the top electrode and the bottom electrode, and an interfacial material between the ferroelectric material and one of the top electrode and the bottom electrode. The method further comprises applying another of the positive bias voltage and the negative bias voltage to the ferroelectric memory cell to switch a polarization of the ferroelectric memory cell, wherein an absolute value of the negative bias voltage is different from an absolute value of the positive bias voltage. Ferroelectric memory cells are also described. |
| US10192600B2 |
Storage element
A storage element is provided. The storage element includes a layer structure including a first layer having a first magnetization state of a first material, a second layer having a second magnetization state of a second material; and an intermediate layer including a nonmagnetic material and provided between the first layer and the second layer, wherein the intermediate layer includes a carbon layer. |
| US10192596B2 |
Apparatuses including multiple read modes and methods for same
Apparatuses and methods including multiple read modes for reading data from a memory are described. An example apparatus includes a memory including a first read mode and a second read mode. The memory has a read operation for the first read mode including a first pre-access phase, an access phase, and a first post-access phase. The read operation for the second read mode includes a second pre-access phase, the access phase, and a second post-access phase. The read operation for either the first read mode or the second read mode is performed responsive to the memory receiving a read command. The second pre-access phase is different from the first pre-access phase, with the second pre-access phase having a shorter time than the first pre-access phase measured from receipt of the read command. |
| US10192594B2 |
Semiconductor device
A semiconductor device includes a voltage hold circuit that raises a second boosted voltage with rise of an output voltage of a booster circuit that generates a first boosted voltage and then maintains the second boosted voltage at a point when the output voltage reaches a hold voltage level after that, and a first switch that short-circuits a first output terminal through which the first boosted voltage is output and a second output terminal through which the second boosted voltage is output until the output voltage reaches the hold voltage level. |
| US10192592B2 |
Systems and methods involving data bus inversion memory circuitry, configuration and/or operation including data signals grouped into 10 bits and/or other features
Systems, methods and fabrication processes relating to dynamic random access memory (DRAM) devices involving data signals grouped into 10 bits are disclosed. According to one illustrative implementation a DRAM device may comprise a memory core, circuitry that receives a data bus inversion (DBI) bit associated with a data signal as input directly, without transmission through DBI logic associated with an input buffer, circuitry that stores the DBI bit into the memory core, reads the DBI bit from the memory core, and provides the DBI bit as output. In further implementations, DRAM devices herein may store and process the DBI bit on an internal data bus as a regular data bit. |
| US10192585B1 |
Scene and activity identification in video summary generation based on motion detected in a video
Video and corresponding metadata is accessed. Events of interest within the video are identified based on the corresponding metadata, and best scenes are identified based on the identified events of interest. In one example, best scenes are identified based on the motion values associated with frames or portions of a frame of a video. Motion values are determined for each frame and portions of the video including frames with the most motion are identified as best scenes. Best scenes may also be identified based on the motion profile of a video. The motion profile of a video is a measure of global or local motion within frames throughout the video. For example, best scenes are identified from portion of the video including steady global motion. A video summary can be generated including one or more of the identified best scenes. |
| US10192583B2 |
Video editing using contextual data and content discovery using clusters
Video editing using contextual data may include collecting metadata from a sensor concurrently with recording a video, wherein the metadata is synchronized in time with the video, detecting attributes within the metadata and attributes from the video, and correlating the attributes with a plurality of editors. An editor may be selected from the plurality of editors according to the correlating and a video editing workflow may be automatically initiated. Content discovery using clusters may include receiving a user request for video content from a device, determining a behavioral cluster for the user according to demographic data for the user, determining a video of interest associated with the behavioral cluster, and providing a video of interest to the device using the processor. |
| US10192577B1 |
Write pole coating layer
An apparatus comprises a slider having a media-facing surface and that is configured for heat-assisted magnetic recording. The slider comprises a write pole, a heatsink layer, and a diffusing metal. The write pole includes two or more sides extending into the slider and a pole tip at the media-facing surface. The heatsink layer is proximate at least part of the two or more sides of the write pole, and a first portion of the heatsink layer is proximate the pole tip. The diffusing metal is disposed proximate the write pole. |
| US10192575B1 |
Split actuator with multiple head stack assemblies bonded to bearing sleeves
An apparatus includes at least one actuator shaft. First and second head stack assemblies are coaxially located on the actuator shaft(s). The first and second head stack assemblies each include: at least one bearing having an inner race coupled to an outer surface of the actuator shaft(s); an E-block surrounding an outer race of the at least one bearing; an annular gap is between the E-block and the outer race of the at least one bearing; a ring of bonding material filling the annular gap; and an access gap providing a fluid path to the annular gap from at least one of a top and a bottom of the E-block. |
| US10192570B2 |
Magnetic disk device and write method
A magnetic disk device includes a disk, a head configured to write data on the disk, and a controller. The controller generates a target trajectory of the head in a circumferential direction for writing to a plurality of sectors in a current track, wherein the target trajectory is based on an actual trajectory of the head for writing to a plurality of sectors in a previously written track that is adjacent to the current track, determines that the previously written track is discontinuous between an initial sector of the previously written track and an end sector of the previously written track by a radial offset, generates a corrected trajectory for writing the plurality of sectors in the current track, and controls a position of the head in a radial direction based on the corrected trajectory while writing to the plurality of sectors in the current track. |
| US10192565B2 |
Cross product enhanced harmonic transposition
The present invention relates to audio coding systems which make use of a harmonic transposition method for high frequency reconstruction (HFR). A system and a method for generating a high frequency component of a signal from a low frequency component of the signal is described. The system comprises an analysis filter bank providing a plurality of analysis subband signals of the low frequency component of the signal. It also comprises a non-linear processing unit to generate a synthesis subband signal with a synthesis frequency by modifying the phase of a first and a second of the plurality of analysis subband signals and by combining the phase-modified analysis subband signals. Finally, it comprises a synthesis filter bank for generating the high frequency component of the signal from the synthesis subband signal. |
| US10192562B2 |
Cross product enhanced subband block based harmonic transposition
The invention provides an efficient implementation of cross-product enhanced high-frequency reconstruction (HFR), wherein a new component at frequency QΩ+rΩ0 is generated on the basis of existing components at Ω and Ω+Ω0. The invention provides a block-based harmonic transposition, wherein a time block of complex subband samples is processed with a common phase modification. Superposition of several modified samples has the net effect of limiting undesirable intermodulation products, thereby enabling a coarser frequency resolution and/or lower degree of oversampling to be used. In one embodiment, the invention further includes a window function suitable for use with block-based cross-product enhanced HFR. A hardware embodiment of the invention may include an analysis filter bank, a subband processing unit configurable by control data and a synthesis filter bank. |
| US10192560B2 |
Robust spectral encoding and decoding methods
Spectral encoding methods are more robust when used with improved weak signal detection and synchronizations methods. Further robustness gains are achieved by using informed embedding, error correction and embedding protocols that enable signal to noise enhancements by folding and pre-filtering the received signal. |
| US10192558B2 |
Adaptive gain-shape rate sharing
An improved gain-shape vector quantization is achieved by determining a number of bits to be allocated to a gain adjustment- and shape-quantizer for a plurality of combinations of a current bit rate and a first signal property. The bit allocation is derived by using an average of optimal bit allocations for a training data set. A number of bits to the gain adjustment and the shape quantizers for a plurality of combinations of the bit rate and a first signal are pre-calculated, and a table indicating the number of bits to be allocated to the gain adjustment- and the shape-quantizers for a plurality of combinations of the bit rate and a first signal property is created. In this way, the table can be used for achieving an improved bit allocation. |
| US10192557B2 |
Electronic device and method for voice recognition using a plurality of voice recognition engines
A method and an electronic device are provided for voice recognition. A method includes receiving a first voice by one of a first voice recognition device and a second voice recognition device; when the first voice is received by the first voice recognition device and the first voice recognition device recognizes a predetermined command in the first voice, transferring a received second voice to an external electronic device and recognizing the received second voice through the external electronic device; and when the first voice is received by the second voice recognition device and the second voice recognition device recognizes the predetermined command in the first voice, recognizing a second command in the received second voice, and performing an operation based on the recognized second command. |
| US10192553B1 |
Initiating device speech activity monitoring for communication sessions
Methods and devices for causing a communications session between a first device and a second device to end based on lack of speech activity are described herein. In some embodiments, a communications between a first device and a second device may be initiated by the first device, where a first user account associated with the first device is authorized to initiate communications session with the second device by a second user account. After the communications session is started, audio data is received by a speech activity detection system, which determines whether the audio data represents speech or non-speech. If, after the communications session begins, non-speech is detected by the first device for more than a predefined amount of time, then the communications session is caused to end so that the first device is not capable of receiving video and/or audio associated with the second device. |
| US10192551B2 |
Using textual input and user state information to generate reply content to present in response to the textual input
Methods, apparatus, and computer readable media related to receiving textual input of a user during a dialog between the user and an automated assistant (and optionally one or more additional users), and generating responsive reply content based on the textual input and based on user state information. The reply content is provided for inclusion in the dialog. In some implementations, the reply content is provided as a reply, by the automated assistant, to the user's textual input and may optionally be automatically incorporated in the dialog between the user and the automated assistant. In some implementations, the reply content is suggested by the automated assistant for inclusion in the dialog and is only included in the dialog in response to further user interface input. |
| US10192543B2 |
Method and system for conveying an example in a natural language understanding application
A method (300) and system (100) is provided to add the creation of examples at a developer level in the generation of Natural Language Understanding (NLU) models, tying the examples into a NLU sentence database (130), automatically validating (310) a correct outcome of using the examples, and automatically resolving (316) problems the user has using the examples. The method (300) can convey examples of what a caller can say to a Natural Language Understanding (NLU) application. The method includes entering at least one example associated with an existing routing destination, and ensuring an NLU model correctly interprets the example unambiguously for correctly routing a call to the routing destination. The method can include presenting the example sentence in a help message (126) within an NLU dialogue as an example of what a caller can say for connecting the caller to a desired routing destination. The method can also include presented a failure dialogue for displaying at least one example that failed to be properly interpreted to ensure that ambiguous or incorrect examples are not presented in a help message. |
| US10192540B2 |
Coordinated route distribution systems and methods
Techniques are disclosed for systems and methods to provide coordinated route distribution for one or more mobile structures. A coordinated route distribution system includes a route generator and/or distribution server and various route retrievers, each of which are used in conjunction with operation of corresponding coordinated mobile structures to retrieve routes from the route generator and/or distribution server. The route retriever includes and/or is configured to communicate with a logic device, a memory, one or more sensors, one or more actuators/controllers, and modules to interface with users, sensors, actuators, and/or other modules of a mobile structure. The logic device is adapted to receive the routes and/or directional data corresponding to the mobile structure and adjust a directional control signal provided to an actuator of the mobile structure accordingly. Portions of the routes and/or control signals are displayed or used to adjust steering actuators, propulsion system thrusts, and/or other operational systems. |