最新美国发明专利第2016-06-07期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US09362812B2	Shaft coupling apparatus, rotary fluid damper, and deployable device with magnetic coupling mechanism A shaft coupling apparatus, a rotary fluid damper, and a deployable device are provided herein. In an embodiment, the shaft coupling apparatus includes a chamber having a non-magnetic diaphragm delimiting at least a portion of the chamber. A first shaft is disposed in the chamber and is rotatable about a first axis. A second shaft is disposed outside of the chamber and is rotatable about the first axis. The diaphragm is disposed between the first and second shafts and separates the first and second shafts from direct physical contact. A magnetic coupling mechanism includes a first magnetic coupler attached to the first shaft and a second magnetic coupler attached to the second shaft, with the first and second magnetic couplers separated by the diaphragm. Magnetic coupling forces are generated between the first and second magnetic couplers to transfer rotational energy from the first magnetic coupler to the second magnetic coupler.
US09362809B2	Stator for electric rotary machine and fabricating method of the same One embodiment provides a stator for an electric rotary machine, the stator including: a stator core having plural slots; segmented coils of plural phases; and a pair of base plates provided at both ends of the stator core, wherein the segmented coils have plural substantially-straight coil bars which are respectively inserted in the slots in the stator core and plural connection coils which are disposed on the base plates so as to connect together the coil bars of the same phase, and wherein the stator core and the coil bars make up a stator core assembly and the base plates and the connection coils make up base plate assemblies, so that the stator is made up of the stator core assembly and the base plate assemblies.
US09362808B2	Method of manufacturing rotor core of electric rotating machine The method of manufacturing a rotor core of an electric rotating machine includes a preliminary shaping step of forming a boss section having a cylindrical portion extending in an axial direction, a disk section extending from one end portion of the boss section in a radical direction and preliminary shape portions of claw sections extending from a periphery of the disk section in the axial direction, a boring step of forming an axial hole extending through the boss section in the axial direction, an ironing step of forming the claw sections, and a sizing step to achieve a necessary thickness and flatness of the boss section. The ironing step is performed with a mandrel having an interference with the axial hole smaller than a boring punch being inserted into the axial hole after completion of the boring step.
US09362799B2	Acoustic covering for a generator set enclosure with pressure sensitive adhesive A housing for a generator set includes an enclosure within which the generator set is disposed. The housing further includes a covering including a substantially flat top face and a bottom face comprising a plurality of undulations. The bottom face is disposed between the top face and the enclosure. Each of the plurality of undulations has a peak atop which an adhesive bead is positioned. The adhesive bead is responsive to pressure exerted thereon. Each of the undulations is in contact with the enclosure via a respective adhesive bead.
US09362798B2	Outer-rotor motor An outer-rotor motor includes a stationary portion, a rotating portion, and a bearing mechanism arranged to support the rotating portion such that the rotating portion is rotatable about a central axis extending in a vertical direction with respect to the stationary portion. The stationary portion includes a stator, a mounting plate, and a circuit board. The rotating portion includes a shaft, a rotor holder, and a rotor magnet. The mounting plate includes a projecting portion arranged to project radially. The outer-rotor-motor further includes a guide structure connected with the projecting portion. The guide structure is arranged to extend axially, radially outside the rotor holder. A leadwire is electrically connected to the circuit board, and is guided along the guide structure. Provision of the guide structure, which is arranged to guide the leadwire radially outwardly of the rotor holder, contributes to preventing a contact between the leadwire and the rotor holder.
US09362796B2	Electricity collection and distribution ring and electric motor An electricity collection and distribution ring includes a plurality of bus rings that include a plurality of annular conductive bodies and a plurality of connecting terminals provided on the annular conductive bodies. The connecting terminals each include a first connecting portion connected to a center conductor, a second connecting portion connected to a winding and a coupling portion for coupling the first and second connecting portions. The coupling portion includes the first extended portion including an end portion extending through a gap between the annular conductive bodies toward one side in an axial direction of the annular conductive bodies and the second extended portion extending from the end portion of the first extended portion toward one side in a radial direction of the annular conductive bodies. The second connecting portion is formed at an end portion of the second extended portion on one side in the radial direction.
US09362792B2	Radially embedded permanent magnet rotor having magnet retention features and methods thereof In one embodiment, a permanent magnet rotor is provided. The permanent magnet rotor includes a substantially cylindrical rotor core including an outer edge, an inner edge, and opposed first and second ends. The rotor further includes a first wall and a second wall defining at least one radial aperture extending radially through the rotor core. The rotor further includes at least one permanent magnet positioned within the at least one radial aperture. A first indentation is formed in one of the at least one permanent magnet and the first wall, the first indentation defining a first space between the at least one permanent magnet and the radial aperture first wall. The rotor further includes a first material positioned within the first space, the material configured to substantially prevent movement of the permanent magnet relative to the at least one radial aperture.
US09362789B2	Magnetic field-modulated transverse flux multiphase permanent magnet motor A magnetic field-modulated transverse flux multiphase permanent magnet motor consisting of a stator and a rotor. A number m of phase armature units are arranged in a row along the axial direction within a motor housing (1); each successive phase armature unit is offset in the circumferential direction by an electrical angle of 360°/m; the armature coil (2) is embedded within an annular cavity between the first to the third stator iron core tooth segments (3, 4, 5); the external circumferential surfaces of the first and the third rotor iron core tooth segments (6, 8) are respectively grooved in the axial direction with k/2 permanent magnet slots; the rotor permanent magnet slot on the first rotor iron core tooth segment (6) is axially offset from the rotor permanent magnet slot on the third rotor iron core tooth segment (8) by one-half the rotor tooth pitch; the direction of magnetization of the rotor permanent magnets (9) is identical. The present motor features high reliability and high security, high fault tolerance, structural simplicity, low costs, high torque density, good dynamic characteristics and ease of modularization.
US09362787B2	Wind turbine generator with movable stator subunits A generator (5) for a wind turbine (1) is disclosed. The generator (5) comprises a rotor (3) configured to rotate about a rotational axis, and at least one stator (4) arranged next to the rotor (3). Each stator (4) comprises at least two subunits (8), the subunits (8) being arranged side-by-side along a moving direction of the rotor (3). Each subunit (8) comprises at least one flux-generating module (9) facing the rotor (3) but spaced therefrom, thereby defining an air gap between the rotor (3) and each flux-generating module (9). The subunits (8) are movable relative to each other along a direction which is substantially transverse to the moving direction of the rotor (3). This allows a subunit (8) to move in a manner which adjusts the air gap without affecting the position and the air gap of a neighboring subunit (8). Thereby variations in the rotor (3) can be compensated and a uniform and constant air gap can be maintained. The invention further provides a wind turbine (1) comprising such a generator (5) and a method for performing service on a generator (5).
US09362780B2	Piezoelectric charging system and electronic device using same The present disclosure relates to a piezoelectric charging system, which has two operational modes: a vibration mode and a charging mode. The system includes a piezoelectric vibrator, a driving module, a switch selecting module, a rectifying and processing module and a charging control module. The present disclosure can make full use of the mechanical energy from human beings and the ambient environment to provide the electronic device with an important energy source. Furthermore, energy can be charged to the electronic devices in real time. Furthermore, the present disclosure provides a terminal device using the piezoelectric charging system.
US09362778B2	Short distance wireless device charging system having a shared antenna A wireless charging system includes a power receiving antenna that also functions as a communication antenna. The wireless charging system includes a transmitter having a first antenna configured to transmit radio-frequency energy and a first electronic device. The first electronic device includes a second antenna, a first communication circuit operably connected to the second antenna, and a first power converter operably connected to the second antenna. The second antenna is configured to receive the radio frequency energy transmitted by the first antenna.
US09362777B2	Portable wireless charging system A portable wireless charging system is incorporated inside a carrying device that has a plurality of walls and an interior. The portable wireless charging system has a transmitter positioned at a first fixed location at an inner surface of one of the walls, a mobile power supply positioned adjacent the transmitter and electrically coupled to the transmitter, and a receiver positioned at a second fixed location at an outer surface of the one of walls, with the second fixed location aligned with the first fixed location. A barrier is positioned between the transmitter and the receiver, and a first pocket positioned at the outer surface about the second fixed location. A portable device that includes a battery to be charged can be retained inside the first pocket to be charged.
US09362775B1	Charging wearable computing devices A wearable electronic device may be inductively charged during regular operation of a computing device when the electronic device is within a proximity zone of a charging component. The electronic device may be charged in a seamless manner such that the charging occurs when a user uses or operates a computing device in a regular manner. The electronic device and/or the computing device may contain an indicator that indicates a charging value for the electronic device.
US09362767B2	Portable wireless communication device A portable wireless communication device includes a connector configured to charge the portable wireless communication device by electronically connecting a power source to the portable wireless communication device. The connector includes a plurality of pins, one of the pins configured to serve as a radiation portion of an antenna to receive/send wireless signals when the connector electronically is uncoupled to the power source.
US09362765B1	Systems and methods for a power adapter for mobile devices A power adapter for mobile devices may include an alternating current to direct current (AC/DC) converter. The AC/DC converter may convert electric power from a power source. The power adapter may include a housing enclosing the AC/DC converter. The power adapter may include a power plug extending from the housing along a first axis. The power adapter may include a Universal Serial Bus (USB) plug extending from the housing along the first axis and on an opposite end of the housing from the power plug. The power adapter may include a device charging plug pivotally coupled to the housing.
US09362763B2	Wireless charging circuit and abnormal state protection circuit thereof A wireless charging circuit and an abnormal state protection circuit thereof is provided in the present invention. The wireless charging circuit includes a power converter, a resonant circuit and an abnormal state protection circuit. The power converter receives an input voltage for outputting a PWM (pulse width modulation) signal. The input terminal of the resonant circuit receives the PWM signal. The common voltage terminal of the resonant circuit is coupled to a common voltage. The abnormal state protection circuit includes a DC sampling circuit and a control circuit. The DC sampling circuit is coupled to the resonant terminal of the resonant circuit for sampling the DC component of the voltage of the resonant terminal to obtain a DC voltage. The control circuit is coupled to the power converter and the DC sampling circuit for receiving the DC voltage. When the DC voltage is greater than a threshold voltage, the control circuit controls the power converter to reduce the current flowing through the resonant circuit.
US09362760B2	Battery having a plurality of battery cells and method for regulating a battery voltage of a battery using switch-on probabilities of the battery cells A method for regulating a battery voltage of a battery having a plurality of battery cells configured to be selectively bridged and connected to a battery string includes regulating the battery voltage to a desired nominal voltage by alternately driving the battery cells. The method further includes transmitting a value for a nominal switch-on probability to one or more driving circuits of the battery cells, with the result that the one or more battery cells are each switched with an allocated switch-on probability.
US09362756B2	Circuit and architecture for a demodulator for a wireless power transfer system and method therefor A primary side wireless power transmitter inductively couplable to a secondary side wireless power receiver for receiving communications from the secondary side wireless power receiver through the inductive coupling having a primary side tank circuit receiving a signal from the secondary side wireless power receiver. A phase delay or time delay circuit generates a fixed delay clock signal from a signal utilized to excite the primary side tank circuit. A sample and hold circuit samples a tank circuit voltage utilizing the fixed phase or time delayed clock signal. A comparator is coupled to an output of the sample and hold circuit for extracting data or commands from the signal stream. A method of operating a primary side wireless transmitter inductively coupled to a secondary side wireless power receiver for supplying power to the wireless power receiver to power a load coupled to the receiver is also disclosed.
US09362753B2	Extended signaling system and method Embodiments are described that include a “front end” device located remotely from a local telephone location. The front end filters DC and AC current on a telephone line to separate these signals and passes a DC current through a low resistance Low Pass Filter without traditional resistance or current limiting means. The front end also provides signaling capability isolated from the DC and audio channels by a High Pass Filter. Some embodiments also include a “back end” unit located near a local telephone location. The “back end” unit filters the DC and AC currents into at least two DC current streams. One of the DC current streams provides sufficient current to power a local telephone. The other stream(s) provides current sufficient to power an auxiliary device. The “back end” device may also provide signaling isolated from the DC and audio channels that is complementary to the “front end” signaling.
US09362750B2	Energy storage system and method for controlling the same An energy storage system configured to be coupled to at least one of a power generation system, a grid, or a load, the energy storage system including a battery system including at least one rack, the at least one rack including a rack controller, and a system controller configured to control a charging operation and a discharging operation of at least one battery on the at least one rack in accordance with a temperature of the at least one battery.
US09362747B2	Distributed status calculations in an electricity network with the aid of agents Calculating device and method for carrying out status calculations in an electricity network (2) with a multiplicity of nodes (K1-K11). The method comprises the allocation of a local calculating agent (A1-A11) to each of the multiplicity of nodes (K1-K11), the allocation of regional calculating agents (R1, R2) to regional networks (3, 4), the reception by the regional calculating agents (R1, R2) of the results of the status calculations from the associated local calculating agents (A1-A11) and, on the basis thereof, the performance of a status calculation for the associated regional network (3, 4). The method further comprises the creation of a simplified network representation of the associated regional network (3, 4) and the reception by a higher-order regional calculating agent (R3) of the results of the status calculations and the simplified network representations of the regional calculating agents (R1, R2), and, on the basis of the simplified network representations, calculation of the status of the electricity network (2).
US09362746B2	Communication network topology management based on an associated electric grid topology In one embodiment, a computer determines a grid topology of an electric grid based on one or more electric grid configuration description files, and also determines a network topology of a computer network used to provide communication to grid devices of the electric grid. By assessing whether the network topology is configured to meet one or more communication requirements of the grid topology (e.g., initially and/or through monitoring for grid changes), the computer may trigger a corrective action (e.g., alarm or reconfiguration) in response to the network topology not being configured to meet the one or more communication requirements of the grid topology.
US09362745B2	Power storage module and power storage device A power storage module and a power storage device are disclosed. The power storage module and the power storage device include a DC/AC converter, a first power storage element, a second power storage element and at least one DC/DC converter. The first power storage element is coupled to the DC side of the DC/AC converter to form a first power storage branch. The second power storage element is coupled to the DC side of the DC/AC converter to form a second power storage branch. The DC/DC converter is disposed on the first power storage branch or the second power storage branch.
US09362743B2	Direct current power combiner A circuit for combining direct current (DC) power including multiple direct current (DC) voltage inputs; multiple inductive elements. The inductive elements are adapted for operatively connecting respectively to the DC voltage inputs. Multiple switches connect respectively with the inductive elements. A controller is configured to switch the switches periodically at a frequency sufficiently high so that direct currents flowing through the inductive elements are substantially zero. A direct current voltage output is connected across one of the DC voltage inputs and a common reference to both the inputs and the output.
US09362738B2	Intelligent control system for high-voltage switch and control method thereof An intelligent control system for a high-voltage switch and a control method thereof. The control system includes a control terminal (10) and a plurality of high-voltage switches (21-1, 21-2, . . . , 21-n-1, 21-n), each of which is controlled by an executive terminal (11-1, 11-2, . . . , 11-n-1, 11-n) respectively, wherein the executive terminal is connected to the control terminal via a communication network. The executive terminal includes a current detecting module (5), an analog/digital conversion module (4), a second communication module (2), a calculation processing module (3), a first communication module (1) and a switch control module (6) which controls the switch in real-time. The current detecting module detects a line current value. The analog/digital conversion module converts the line current value into a digital current value. The first and second communication modules are for communication. The calculation processing module compares digital current values and sends an alarm signal to the control terminal, or sends a tripping order to the high-voltage switch while sending an alarm signal to the control terminal.
US09362736B2	Method for improving power distribution protection A solid state switch module is provided for use in a power distribution network including an input differential protection connection for receiving a measured current value from an upstream module. The solid state switch module also includes an output differential protection connection for sending a measured current value. The solid state switch module includes a trip outlet for sending a trip signal to an upstream solid state switch, and a trip inlet for receiving a trip signal from a downstream solid state switch. The trip inlet is operably coupled to the switch. A current sensor measures the current value of a connected power transmission line across the solid state switch module. A summer adds a current input from a parallel module with the current measures by the current sensor. A comparator determines whether an amount of current lost between the solid state switch module and an upstream module is acceptable.
US09362735B2	Feed chain for a synchronous electric machine, electric traction system comprising such a chain, and control method for such a chain A feed chain (16) has M feed outputs (31) for supplying a synchronous electric machine (14) with M phases. The feed chain comprises: a converter (22) for converting a direct input current into a polyphase alternating current; a storage bank; a detector (30) for detecting a short-circuit outside or inside the electric machine (14), a device (26) for insulating the electric machine (14) from overvoltages and/or overcurrents of the polyphase alternating current, and a controller (28) for controlling the converter (22) and the insulating device (26). The feed chain (16) includes short-circuiting device (27) capable of connecting the M power supply outputs (31) to each other, the controller (28) being capable of commanding the short-circuiting device (27) to perform that operation.
US09362734B2	Apparatus for limiting current of line or breaking current, and control method thereof An apparatus for limiting a current of a line or breaking a current, and a control method thereof are disclosed. The apparatus includes a current breaking branch (29) and a bridge branch. The bridge branch includes two bridge arms formed by four identical current commutation branches. Every two of the four current commutation branches are connected in series, and the formed two bridge arms are then connected in parallel. The two bridge arms are both connected in parallel to the current breaking branch, and middle points of the two bridge arms are separately connected to two ends of a line. Each current commutation branch includes at least one high-speed isolation switch (6) and at least one bidirectional power semiconductor switch (10) that are connected in series. The apparatus can turn off currents in two directions.
US09362732B2	Corrugated tube with path-maintaining member and wire harness A corrugated tube with a path-maintaining member is provided with a corrugated tube having annular convex portions and annular concave portions alternately formed along a longitudinal direction, and a path-maintaining member attached to the corrugated tube along the longitudinal direction thereof. The path-maintaining member is formed as a long member die-molded to maintain a shape at least a portion of which is bent in the longitudinal direction and includes an arc-shaped portion in which a lateral-direction cross section exhibits an arc shape.
US09362728B2	Active cover plates In one example, an active cover plate includes a faceplate, a load and a spring clip adjustable in at least one of a horizontal direction and a vertical direction with respect to the faceplate to electrically interface with a receptacle body and extract electrical power from the receptacle body to energize the load. A method for installing an active cover plate on an electrical receptacle is also provided.
US09362726B2	Wiring harness protection member and wiring harness It is aimed to provide a wiring harness protection member and a wiring harness having good protection performance even when being used under high temperature and high humidity. A wiring harness 3 is formed by covering a wire bundle 4 with wiring harness protection members 2 obtained by molding nonwoven fabrics 1 made of mixed fibers containing 10 to 90 mass % of polypropylene resin fibers and 90 to 10 mass % of polyethylene terephthalate resin fibers into a predetermined shape.
US09362721B1	Circuits and methods for protecting integrated circuits from powerline noise In one embodiment, a circuit couples an integrated circuit to a powerline and protects the integrated circuit from overvoltage noise. In one example, the integrated circuit comprises a two-port differential transceiver. Respective Schottky diodes couple the ports to a power supply and reference, so one diode for each port conducts current in forward bias if an applied voltage exceeds a respective voltage reference plus the forward voltage of that diode. A respective end of a first transformer winding feeds each input port. Respective ends of a second transformer winding couple to capacitors that couple with the powerline. Back-to-back zener diodes are connected between the ends of the second winding. A zener diode with a breakdown voltage set based on the power supply voltage plus a margin is coupled between the power supply and ground so that the power supply voltage does not exceed a desired value plus the margin.
US09362717B2	Columnar crystal containing light emitting element and method of manufacturing the same A method of manufacturing a semiconductor element by forming, on a substrate, columnar crystals of a nitride-base or an oxide-base compound semiconductor, and by using the columnar crystals, wherein on the surface of the substrate, the columnar crystals are grown while ensuring anisotropy in the direction of c-axis, by controlling ratio of supply of Group-III atoms and nitrogen, or Group-II atoms and oxygen atoms, and temperature of crystal growth, so as to suppress crystal growth in the lateral direction on the surface of the substrate.
US09362715B2	Method for manufacturing gallium and nitrogen bearing laser devices with improved usage of substrate material In an example, the present invention provides a method for manufacturing a gallium and nitrogen containing laser diode device. The method includes providing a gallium and nitrogen containing substrate having a surface region and forming epitaxial material overlying the surface region, the epitaxial material comprising an n-type cladding region, an active region comprising of at least one active layer overlying the n-type cladding region, and a p-type cladding region overlying the active layer region. The method includes patterning the epitaxial material to form a plurality of dice, each of the dice corresponding to at least one laser device, characterized by a first pitch between a pair of dice, the first pitch being less than a design width. The method includes transferring each of the plurality of dice to a carrier wafer such that each pair of dice is configured with a second pitch between each pair of dice, the second pitch being larger than the first pitch corresponding to the design width.
US09362713B2	MOPA with high-gain solid-state amplifier Radiation from a VBG-locked diode-laser at a locked wavelength of 878.6 nm is focused into a 30-mm long Nd:YVO4 optical amplifier crystal for optically pumping the crystal (24). The crystal amplifies a beam of seed-pulses from a fiber MOPA (12). The power of pump radiation is about 75 Watts. The radiation is focused into a beam-waist having a minimum diameter of about 600 micrometers. This provides an amplifier having a high gain-factor well over 100. The high-gain factor provides a gain-shaping effect on the seed-pulse beam which overcomes thermal aberrations inherent in such high-power pumping, thereby producing an amplified seed-pulse beam with M2 less than 1.3.
US09362712B1	No-vibration cryogenic cooling of reference cavities for high-precision metrology using optical refrigeration Provided is a method and system for stabilizing a property of a first laser beam from a first laser in a vibration-free and cryogen free-manner. The method can include optically cooling a ytterbium-doped yttrium lithium fluoride (Yb:YLF) crystal using a second laser beam; coupling the crystal to a thermal coupling, wherein the thermal coupling is further coupled to a reference cavity to maintain a temperate of the reference cavity; directing a portion of the first laser beam through the reference cavity onto a photodetector to measure the property of the first laser beam; and stabilizing the first laser beam using a feedback control mechanism using the photodetector.
US09362710B1	Multichannel controller An output characteristic of a monotonic system is controlled using a plurality of adjustable inputs. The adjustments are controlled using a set of setpoints and a set of dither magnitudes. Each input's adjustment is controlled simultaneously using a setpoint and a dither around the setpoint. The dither values for each input have a zero mean and there is zero correlation between the dithers applied to different inputs. The changes in the output characteristic that result from the dithers are measured, and are used to create an adjustment value. The adjustment value is used to create a set of adjusted dither magnitudes. The set of adjusted dither magnitudes are added to a set of integrated prior adjusted dither magnitudes to create a set of setpoint adjustments. Adding the setpoint adjustments to corresponding setpoints creates a set of updated setpoints. This process is repeated so that the setpoints converge on a value that maximizes the output characteristic being controlled.
US09362707B2	Supercontinuum system with microstructured photonic crystal fibers based on fluoride glass A fiber-based supercontinuum system including: a pump laser; a ZBLAN or other fluoride-based microstructured glass fiber; and control electronics; wherein the control electronics control the pump laser to generate laser pulses into the ZBLAN or other fluoride-based microstructured glass fiber. The fabrication of a ZBLAN photonic crystal fiber with sub-micron features and large air-filling fraction and the use of the fiber to generate a stable supercontinuum (200 to 2500 nm) from 140 fs, 1 nJ pulses at 1042 nm are disclosed.
US09362706B2	Laser machine and controlling method of laser machine A laser machine includes a laser oscillator, a cooler for cooling the laser oscillator, and a control unit for controlling the laser oscillator and the cooler. The control unit includes a controller that stops base discharge of the laser oscillator at a time when a specified time has elapsed from a stop of laser light emission by the laser oscillator. According to the laser machine, since base discharge of the laser oscillator is stopped after the specified time has elapsed from the stop of laser light emission, wasteful energy (power) consumption of the laser oscillator in a standby state can be restricted.
US09362705B2	Laser system chiller A laser system includes a laser element, a pump source configured to input light to the laser element, a first heat exchanger, a pump source heat exchanger, a laser element heat exchanger, and a pump. The first heat exchanger is configured to cool a first flow of cooling liquid. The pump source heat exchanger is configured to remove heat from the pump source using the first flow of cooling liquid. The laser element heat exchanger is configured to remove heat from the laser element using a second flow of cooling liquid. The pump is configured to drive the first and second flows of cooling liquid.
US09362701B2	Shear guide for a terminal crimping machine A shear guide for a terminal crimping machine includes a body having a shear edge configured to face a terminal used to splice a magnet wire and a lead wire. A magnet wire channel is formed by the body and is configured to receive and hold the magnet wire. A lead wire channel is formed by the body and is configured to receive and hold the lead wire. The lead wire channel is vertically offset with respect to the magnet wire channel. The body may include a platform and a separating wall positioned vertically above the platform with a slot defined between the separating wall and the platform. The slot may receive the magnet wire and the separating wall may support the lead wire above the separating wall.
US09362696B1	Portable apparatus having electrical power receptacles and device charging ports A portable apparatus that provides electrical power receptacles and device charging ports. The portable apparatus has a base member and a plurality of post members connected to the base member. Each post member has an electrical power receptacle that provides electrical power and an electrical power device having a device charging port that provides a voltage suitable for charging and powering devices such as cell phones, cameras, iPads, Ipods and similar devices. In a preferred embodiment, the electrical power device includes an additional electrical power receptacle. Each post member has an interior region and electrical wiring located with the interior region which provides electrical power to the electrical power receptacles and the electrical power device. The portable apparatus also has a top member connected to the post members and an intermediate support member that is attached to the post members and located between the top member and the base member.
US09362695B2	Electrical connector An electrical connector includes an insulative housing, at least a contact module and a grounding member. The insulative housing has a body portion and a mating portion forwardly extending from the body portion. The mating portion is provided with a top wall, a bottom wall, a pair of side walls and a receiving space formed therebetween. The receiving space opens forwardly. The contact module has a plurality of contacts retained on the insulative housing. Each contact has a contact portion forwardly extending into the receiving space and a connecting portion backwardly extending out of the body portion. The grounding member has a middle grounding sheet and a pair of locking arms projecting into the receiving space. The middle grounding sheet is fixed in the body portion and spacing apart from the contacts along an up to down direction. The locking arms electrically connect with the middle grounding sheet.
US09362693B2	Header assembly having power and signal cartridges A header assembly includes a header housing having a cavity configured to receive a receptacle connector therein. The header housing has at least one cartridge latch in the cavity. A signal header cartridge is received in the cavity and locked in the header housing by the at least one cartridge latch. The signal header cartridge has a plurality of signal contacts extending between mating portions and mounting portions that extend from the signal header cartridge. A power header cartridge is received in the cavity and locked in the header housing by the at least one cartridge latch. The power header cartridge has a plurality of power contacts extending between mating portions and mounting portions that extend from the power header cartridge.
US09362688B2	Portable power connector with RFID tracking system and method An electrical connector includes a female and male connector each having a tapered insulator and a contact with a first set screw a radial aperture. A set screw is received within the radial apertures, the set screws having an outer surface and a bore extending at least partway therethrough. A retaining screw is received within the bores of the set screws and corresponding aperture in the female and male connector. An RFID transponder is disposed within the connector. The transponder is configured to transmit a first signal to a transmitting and receiving device and receive a second signal from the transmitting and receiving device.
US09362686B2	Interface terminating device An interface terminating device for an interface port includes, in one embodiment, a resistor having first and second conductive leads and a resistive element between the first and second leads. The interface terminating device includes a resistor holder and resistor engager which cooperate together to establish electrical contact with an interface port.
US09362680B2	Electrical plug connector An electrical plug connector includes a metallic shell, and two conductive contact members. The two conductive contact members are respectively received in a top concave region and a bottom concave region of the insulated housing. When the electrical plug connector is inserted into a metallic shell of the electrical receptacle connector, each conductive contact members of the electrical plug connector comes in contact with the inner surface of the metallic shell of the electrical receptacle connector and a low-impedance grounding path is established between the metallic shell of the electrical plug connector and the metallic shell of the mating electrical receptacle connector through each conductive contact member.
US09362678B2	Connection system for use with a chip A connection system is disclosed for use in providing a high speed transmission line for connecting a chip mounted on a circuit board to a connector. The system has a structure that allows for high data rates from the connector to the chip. The connector includes a plurality of conductive terminals and a ground terminal arranged so that the impedance and other electrical characteristics may be maintained from the connector to the chip while reducing signal loss.
US09362677B1	Crosstalk reducing conductor orientations and methods In accordance with a non-limiting example, a connector mates to a circuit board at a connector interface. The connector often introduces an undesirable level of crosstalk between pairs. Traces are formed on the circuit board in a “compensation region” that also introduces crosstalk between pairs. The “compensation region” is created in a geometrically controlled fashion such that the crosstalk in the compensation region is of equal magnitude, but opposing phase to the crosstalk introduced by the connector. Thus, the overall crosstalk is minimized.
US09362675B2	Connector assembly with improved contact arrangement A connector assembly includes a receptacle connector and a plug connector. The plug insulative housing includes a body portion having a mating surface, a number of cavities extending through the mating surface and a number of contact-receiving slots. The number of male contacts are divided into groups each of which includes two male contacts in parallel relationship. Each male contact includes a contacting portion residing in corresponding cavity, a mounting portion perpendicular to the contacting portion and an inclined portion connecting the contact portion and the mounting portion. In each group, a distance between the contacting portions is larger than a gap between the inclined portions, and the gap between the inclined portions is no less than a gap between the mounting portions.
US09362673B1	Secure connector with spring release This document presents an adaptor that has both male and female USB type connectors. The adaptor has an activation button held in tension by an internal spring and locking prongs that are moved in response to depressing and releasing the activation button. The locking prongs retract into a cutout depression in the insulating portion of the male connector and into the open space of the female portion of the adaptor. The adaptor locks both male and female USB connectors attached to cables or devices so as to secure the electrical and physical connection of these cables and devices during relocation or transport of the equipment containing the USB connectors. A single adaptor may be used to securely connect two cables together, a cable to a device, or two devices during movement or transport.
US09362672B1	Lockable socket The disclosure provides a lockable socket, which includes a body, a rotatable assembly and an prong receiving member. The prong receiving member is provided with a guide hole, a fixing pin is disposed in the guide hole and extends through a first spring. Guide chutes matching with the fixing pins are provided on the inner surface of the body. The lockable socket of the disclosure, which has a simple structure and is easy to use, can effectively prevent the plug including prongs with openings from being released from the socket due to an unexpected external force or a loose connection between the plug and the socket.
US09362671B2	Coaxial cable connector with quick-locking connection A coaxial cable plug includes: an inner conductor extension configured to mate with the inner conductor extension of a mating coaxial cable jack; an outer conductor extension configured to mate with the outer conductor extension of the mating coaxial cable jack; a coupling nut positioned radially outwardly of the outer conductor extension of the coaxial cable plug and having an internal cavity; and a thread-engaging member residing within the internal cavity of the coupling nut. The thread-engaging member includes radially-inwardly extending projections configured to intermesh with outer threads of a housing of the mating coaxial cable jack and is movable relative to the coupling nut. Rotation of the coupling nut relative to the outer threads of the housing of the mating coaxial cable jack causes the projections of the thread-engaging member to move relative to the threads of the jack housing, thereby securing the jack to the plug.
US09362664B2	Connecting device and electronic device assembly A connecting device is disclosed, which includes a connector structure having a housing, a plug connector, a plurality of electrical contacts and a magnetic-metal set. The housing has a surface on which the electrical contacts and the magnetic-metal set are disposed, and the plug connector protrudes from the housing and is electrically connected to the electrical contacts. An electronic device assembly is further disclosed, which includes an electronic device and the aforesaid connecting device. The connecting device can be inserted into a socket connector of the electronic device, so as to transform the socket connector into a non-pluggable magnetic connector.
US09362663B2	Replaceable bushing for electrical equipment An electrical equipment connector having a replaceable bushing for an electrical power connector is disclosed. The replaceable bushing includes an insulator body having a tapered exterior surface formed on the first end, and a tapered interior surface formed in a second end. A conductor body extends through the insulator body and has a through bore with a counterbore at one end. A captured bolt in the counterbore engages a threaded tap in a conductor body disposed in the housing such that the tapered interior surface fits over and conforms to a tapered exterior surface on the housing connector.
US09362662B2	Subsea electrical connector A connector for connecting power or control systems infrastructure such as for example subsea infrastructure, said connector comprises a male component and a female component, the male and female components comprising cooperating mating surfaces and means for locking the male and female components together, the locking means being retractably mounted within one of the male or female components but extendible from that component into the other of the male or female components to lock the two components together against axial and rotational movement while providing a snag free release when the locking means is in the retracted position. The means for locking includes pivotal levers with free ends that are to enter recesses of the male component and that are to be held in locking position by a moveable control coupler. An electrical coupler located within the female component is to be raised to engage a corresponding coupler on the locked in position male component.
US09362654B2	Energy storage device service interlock An energy storage device and electrical component are secured under an access cover by a lock. A handle has a key portion that operates the lock. Removal of the handle from an electrical disconnect isolates the component electrically from the energy storage device. The lock is located such that the handle is removed from the disconnect to operate the lock.
US09362652B2	Connector with at least one detector A detector (60) is supported on a lock arm (15) of the housing (10) movably between a standby position and a detection position. The detector (60) includes restricting portions (69) and the housing (10) include escaping portions (28). The escaping portions (28) extend in a direction intersecting a connecting direction, and the restricting portions (69) are inserted therein when the detector (60) is inclined in a connecting process and brought into contact with a wall surface facing in a moving direction of the detector (60) to prevent the detector (60) from reaching the detection position while being kept in an inclined state when the detector (60) moves from the standby position toward the detection position.
US09362651B2	Locking structure of terminal fitting and bulb socket A locking structure includes a terminal fitting and a terminal containing portion that holds and contains the terminal fitting so that the terminal fitting is electrically connected to a connection counterpart in a condition that at least part of the connection counterpart is inserted in the terminal containing portion. A first lock projection which is elastically deformable and is provided on the terminal fitting is locked on a second lock projection which is provided on the terminal containing portion. The at least part of the connection counterpart inserted in the terminal containing portion restricts elastic deformation of the first lock projection in a direction in which the first lock projection is unlocked from the second lock projection.
US09362646B2	Mating interfaces for high speed high density electrical connector Mating interfaces for high speed, high density electrical connectors. In some embodiments, a contact comprises a base region, a first elongated member comprising a distal end attached to the base region and a proximal portion, a second elongated member comprising a distal end attached to the base region and a proximal portion, and a strap coupling the distal portion of the first elongated member to the distal portion of the second elongated member, wherein the strap is conductive and compliant such that the distal portion of the first elongated member is capable of moving independently of and is electrically connected to the distal portion of the second elongated member.
US09362641B2	Orthogonal backplane design with reduced chassis depth According to some embodiments of the invention a device includes a first circuit board having a hollow slot, wherein a longitudinal length of the hollow slot is greater than a transverse length of the hollow slot, wherein a longitudinal axis of the hollow slot is parallel to a first edge of the first circuit board, wherein the hollow slot causes a gap at a second edge of the first circuit board, and wherein the hollow slot is adapted to accept a second circuit board that is oriented orthogonally to the first circuit board. The device may further include a first data transferring connector coupled to the first circuit board at a longitudinal terminus of the hollow slot, wherein the first data transferring connector is adapted to connect to a second data transferring connector that is coupled to the second circuit board.
US09362640B2	Card edge connector A card edge connector includes a harness-side connector (H) in which a plurality of terminal fittings (50) are arranged side by side in a harness-side housing (10) and a board-side connector (P) in which a connecting edge portion (63) of a circuit board (62) projects from a front surface (60F) of a board-side housing (60). The harness-side housing (10) includes a terminal accommodating portion (39) configured to accommodate the plurality of terminal fittings (50), and a housing accommodating portion (48) arranged to face a front surface (39F) of the terminal accommodating portion (39) and configured to accommodate the board-side housing (60) connected to the harness-side housing (10). A resilient member (49) configured to bias the terminal accommodating portion (39) and the board-side housing (60) in a direction toward or away from each other in parallel to a connecting direction is provided in the housing accommodating portion (48).
US09362639B2	Audio jack and electronic device including same An audio jack includes an insulated base including an upper plate and a lower plate connected to the upper plate, wherein a connecting portion between the upper plate and the lower plate forms a socket for plugging an audio plug, and a slot, formed between facing surfaces of the upper plate and the lower plate, is configured for installing a circuit board in a plugging manner; and a metal contact terminal configured to electrically connect the audio plug plugged into the socket to a corresponding conductive trace on the circuit board installed in the slot.
US09362638B2	Overmolded contact wafer and connector A contact wafer that has a plurality of contacts. Each of the contacts has a body portion with a mating end and an opposite tail end. The mating end is configured to couple to a mating contact and the tail end is configured to engage a printed circuit board. An overmold surrounds the body portions of the contacts such that the mating ends and the tails ends of the contacts are exposed and extend from opposite ends of said overmold. The overmold has a first side that includes a plurality of recessed surfaces. Each recessed surface is between adjacent body portions of the contacts and sized to receive a corresponding portion of an overmold of another contact wafer.
US09362634B2	Enhanced continuity connector A male F-Type coaxial cable connector with a body prod, the body prod for urging a connector nut into contact with a connector post.
US09362631B2	Shield sleeve having a sleeve member with a protruding contact finger A shield sleeve is disclosed having a sleeve member. The sleeve member has a first end, and at least one radially protruding contact finger. Each contact finger has a cantilevered end connected to the first end, and at least one contacting protrusion positioned proximate to an opposite free end and protruding outward in a radial direction with respect to the sleeve member.
US09362628B2	Antenna reflector apparatus According to one aspect of the present invention, an antenna reflector apparatus provided comprises a shell body, a reflector indentation, and an antenna. The reflector indentation embedded in the shell body comprises a first indentation opening and a second indentation opening opposite to the first indentation opening. The first indentation opening is on the first surface of the shell body; the second indentation opening is on the second surface of the shell body. And the first indentation opening penetrates the shell body and connects to the second indentation opening. The antenna is located besides the second indentation opening of the reflector indentation. The area of the first indentation opening of the reflector indentation is larger than the area of the second indentation opening.
US09362627B2	Artificial microstructure and artificial electromagnetic material using the same The present invention provides an artificial microstructure. The artificial microstructure includes at least three split rings. The at least three split rings surround and embed in turn. Each split ring is formed by a wire which is made of conductive material, with two terminals of the wire towards each other to form an opening of the corresponding split ring. The present invention also provides an artificial electromagnetic material using the artificial microstructure. The artificial electromagnetic material with the artificial microstructure can achieve the function of broadband wave-absorbing.
US09362624B2	Compact antenna with dual tuning mechanism An antenna, including at least one set of conductive arms radiative at a resonant frequency, the at least one set of conductive arms including a first conductive arm having a first terminus and a second conductive arm having a second terminus, the first and second termini being closely spaced so as to form a capacitive gap therebetween, the capacitive gap having a width, a feed connection located on the first conductive arm, a first electrical length being defined along the first conductive arm between the feed connection and the first terminus, a ground connection located on the second conductive arm, a second electrical length being defined along the second conductive arm between the ground connection and the second terminus, the resonant frequency depending at least on the width of the capacitive gap and on the first and second electrical lengths, a total electrical length along the set of conductive arms between the first and second termini being less than or equal to half of a wavelength corresponding to the resonant frequency, and a balun coupled to the first and second conductive arms.
US09362616B2	Strengthening means for a dipole whip antenna A dipole antenna comprises a hollow dielectric whip, a coaxial center feed extending therethrough, and a pair of conductive dipole elements comprising an upper element and a lower element. The dipole antenna further comprises an upper element lead connecting the upper element to a first portion of the coaxial center feed at a feed point and a lower element lead connecting the lower element to a second portion of the coaxial center feed at the feed point. The dipole antenna further comprises a feed point strengthening means to mechanically strengthen the feed point against disconnection when the whip is impacted. Additionally, the dipole antenna may be a dual dipole antenna.
US09362614B1	Minimum depth spiral antenna A minimum depth spiral antenna includes a fiberglass circuit board with two spiraling conductive radiator arms that are etched on the fiberglass circuit board. A metallic ring is formed around the two spiraling conductive radiator arms and is mounted on the outward edge of the fiberglass circuit board. An antenna cavity cone and antenna cavity cone cap are mounted inside the antenna cavity. A tapered microstrip balun circuit is electrically-connected to the two spiraling conductive radiator arms on its proximal end and to a connector cap on its distal end. The connector cap is mounted on the lower side of a bottom plate, which forms the base of the antenna. The antenna cavity cone has a bottom lip. A wall ring is positioned between the bottom plate and the metallic ring. The wall ring connects the bottom plate to the metallic ring.
US09362613B2	Bond wire antenna An antenna structure includes a substrate having at least one first pad for wire bonding. A chip is mounted on the substrate, and the chip has at least one second pad for wire bonding. At least one bond wire connects the at least one first pad and the at least one second pad. The at least one bond wire is configured to transmit or receive an electromagnetic wave signal in at least one specified frequency for data communication.
US09362611B2	Internal antenna of mobile terminal An antenna of a mobile includes at least two internal antennas and a printed circuit board disposed between a front cover and a rear cover. The printed circuit board includes at least one first antenna mounted on an upper surface and the printed circuit board having at least one fastening opening therein. A second antenna is mounted in an upper portion of a side surface of the printed circuit board and included a protruded portion of one end protruded from a body and in which the protruded portion is fastened to the fastening opening to be fastened to a side surface of the printed circuit board and the mobile terminal can be produced having a reduced thickness.
US09362607B2	Waveguide propagation apparatus compatible with hermetic packaging This topic is related to a waveguide propagation apparatus, converting microstrip propagation to waveguide propagation, providing hermeticity on the mounting area, eliminating the cabling component causing degradation on the overall performance, involving at least a microwave module (2), and comprising a combination of a base part (3) and a cover part (4).
US09362606B2	On-chip vertical three dimensional microstrip line with characteristic impedance tuning technique and design structures A vertical three dimensional (3D) microstrip line structure for improved tunable characteristic impedance, methods of manufacturing the same and design structures are provided. More specifically, a method is provided that includes forming a first microstrip line structure within a back end of the line (BEOL) stack. The method further includes forming a second microstrip line structure separated from the BEOL stack by a predetermined horizontal distance.
US09362605B2	Electromagnetic wave propagation path and electromagnetic wave propagation device An electromagnetic wave propagation device includes multiple planar propagation media each formed by laminating at least one planar conductor and at least one planar dielectric, multiple transceivers for transmitting and receiving information among electronic apparatuses, and a first interface for transmitting and receiving the electromagnetic wave between the transceivers and the planar propagation media. Planar dielectric spacers are provided for isolating the multiple planar propagation media from one another. The planar propagation medium is disposed to have an overlapped part with at least the other of the planar propagation media so that an obverse face of the medium and a reverse face of the other medium are at least partially overlapped with each other. The planar conductor is provided with an electromagnetic wave linking unit at the overlapped part that transmits and receives the electromagnetic wave between the planar propagation media.
US09362603B2	Via structures and compact three-dimensional filters with the extended low noise out-of-band area A filter of the present invention includes a plurality of via structures with a multilayer substrate. Each of the plurality of via structures includes first, second and third functional sections. One end of a signal via of the first functional section is connected to one end of a signal via of the second functional section and another end of the signal via of the second functional section is connected to two signal vias of the third functional section. Those signal vias are surrounded by a plurality of ground vias. Input and output ports of the filter are connected to another end of the signal via of each first functional section.
US09362601B2	Apparatus and method for broadband electromagnetic mode suppression in microwave and millimeterwave packages A parallel plate waveguide structure may be configured to suppress spurious propagating modes by including a lossy frequency selective surface (FSS) formed from a resistive film. The electromagnetic material properties of individual layers disposed between the conductive plates of the waveguide may be engineered to extend the suppression band of the fundamental TE mode up to the cutoff frequency of the second TE mode, and to simultaneously create a multi-octave TM mode suppression band. Applications include, for example, cavity mode suppression in microwave and millimeterwave assemblies at the board, package, and chip level.
US09362594B2	Borohydride solvo-ionic liquid family for magnesium battery A method for forming a solvo-ionic liquid suitable for use as an electrolyte in an electrochemical cell is provided. The solvo-ionic liquid, a mixture including a multidentate ethereal solvent and magnesium borohydride, can be a liquid, a gel or a solid at room temperature and generally has high thermal stability including virtually no volatility at a typical cell operating temperature. An electrochemical cell having a solvo-ionic liquid as electrolyte is also disclosed. The electrochemical cell will typically be a rechargeable magnesium battery, having an anode suitable to accommodate magnesium oxidation during battery discharge.
US09362588B2	Lithium-ion secondary battery and manufacturing method for same An object of this present invention is to provide: a lithium-ion secondary battery 1 constructed to easily interpose an electrical insulating protection film 41 between a battery container 2 and an electricity-generating element 3, to facilitate automatic mounting of the insulating protection film 41, and thus to be highly producible; and a method of manufacturing the battery. The lithium-ion secondary battery 1 of the invention is characterized in that the battery is electrically insulated between the battery container 2 and the electricity-generating element 3, and in that the insulating protection film 41 of a sheet-like form is wrapped around the electricity-generating element 3.
US09362585B2	Fuel cell stack A fuel cell stack includes fuel cells stacked in a stacking direction, a first end plate a second end plate, and first tightening members and second tightening members. The first tightening members couple long sides of the first end plate and long sides of the second end plate, and extend in the stacking direction. The second tightening members couple short sides of the first end plate and short sides of the second end plate, and extend in the stacking direction. Extensions are formed on both of long sides of the fuel cell, and the first tightening members have recessed portions engaged with the extensions.
US09362582B2	Flow cell stack with single plate cells A flow-field plate for a flow stack in a flow cell battery system is described. The flow-field plate includes first electrolyte channels formed in a molded plate to direct a first electrolyte to a first flow-field on a first side of the molded plate and second electrolyte channels formed in the molded plate to direct a second electrolyte to a second flow-field on the second side of the molded plate.
US09362580B2	Integration of molten carbonate fuel cells in a refinery setting In various aspects, systems and methods are provided for operating molten carbonate fuel cells in a refinery setting. The molten carbonate fuel cells can be used to provide hydrogen to various refinery processes, including providing hydrogen in place of using a carbon-based fuel for various combustion reactions. In a further aspect, CO2-containing streams generated by refinery processes can also be used as input streams to the molten carbonate fuel cells.
US09362579B2	Fuel cell system and driving method thereof A fuel cell system and a method for driving a fuel cell system are disclosed. The fuel cell system includes a fuel cell stack with a plurality of unit cells, a temperature measurer configured for determining a temperature of the fuel cell stack, a cell voltage measurer configured for determining voltages of one or more of the plurality of unit cells, and a control unit configured for monitoring the unit cell voltages of the plurality of unit cells to detect a minimum unit cell voltage when a measured temperature of the fuel cell stack is below zero, and configured for controlling the load current so that the detected minimum unit cell voltage may be maintained at a predetermined threshold voltage.
US09362570B2	Elongate battery for implantable medical device A battery assembly for a medical device includes an elongate cathode, an elongate anode, an electrolyte, and an elongate housing assembly encapsulating the cathode, the anode, and the electrolyte. The battery assembly also includes a first electrode exposed from and electrically insulated from the housing assembly. One of the anode and the cathode is electrically coupled to the first electrode, and the other of the anode and the cathode is electrically coupled to the housing assembly. Respective axes of the cathode and the anode are substantially parallel to an axis of the housing assembly, and the cathode and anode each include a flat portion that face each other.
US09362567B2	Electrode for fuel cell, method of preparing same, membrane-electrode assembly and fuel cell system including same Disclosed are an electrode for a fuel cell, a method of preparing the fuel cell electrode, a membrane-electrode assembly including the fuel cell electrode, and a fuel cell system including the fuel cell electrode. The electrode includes an electrode substrate having a conductive substrate and a layer-by-layer assembled multi-layer disposed on a side of the conductive substrate and a bilayer including a polymer electrolyte or a conductive nanoparticle, and a catalyst layer disposed on the electrode substrate.
US09362566B2	Positive composite material for lithium ion batteries and preparation method thereof An anode composite material for lithium ion battery and a preparation method thereof. The composite material is a composite material formed by compounding at least one of SiCO, SiCNO, SiCN and SiBCN with LiaMbPO4, wherein 0.95≦a≦1.1, 0.95≦b≦1.1, and M is at least one of Fe, Co, Ni and Mn. The content of at least one of SiCO, SiCNO, SiCN and SiBCN in the anode composite material is in a range of 1-20 wt % of the total weight of the composite material. The composite material formed by compounding at least one of SiCO, SiCNO, SiCN and SiBCN with LiaMbPO4 is obtained by adding LiaMbPO4 into at least one organosilicon polymer of polysiloxane, polysilazane, and polyborosilazane, and then curing, crosslinking, and pyrolyzing. Compared with LiaMbPO4, the composite material has a notable improvement in electrochemistry performance and tap density.
US09362565B2	Apparatus and associated methods An apparatus including a flexible substrate of electrically insulating material, and an electrically conductive polymer, wherein the electrically conductive polymer is retained by the flexible substrate to form together at least part of an electrode of an electrical storage apparatus such that the electrically conductive polymer provides an electrical path for electrons which are generated and/or stored by the electrical storage apparatus.
US09362562B2	Cathode materials for secondary (rechargeable) lithium batteries The invention relates to materials for use as electrodes in an alkali-ion secondary (rechargeable) battery, particularly a lithium-ion battery. The invention provides transition-metal compounds having the ordered-olivine or the rhombohedral NASICON structure and the polyanion (PO4)3− as at least one constituent for use as electrode material for alkali-ion rechargeable batteries.
US09362559B2	Nitrogen substituted carbon and silicon clathrates Compositions comprising Type I clathrates of silicon (Si46) or carbon (C46) wherein the framework of the cage structure includes nitrogen and carbon or nitrogen and silicon or nitrogen-silicon-carbon atom type composition, with or without guest atoms in their respective cage structures. The clathrate structures are particularly useful for energy storage applications such as battery electrodes.
US09362555B2	Rechargeable lithium cell having a chemically bonded phthalocyanine compound cathode A rechargeable lithium cell comprising: (a) an anode comprising an anode active material; (b) a cathode comprising a hybrid cathode active material composed of an electrically conductive substrate and a phthalocyanine compound chemically bonded to or immobilized by the conductive substrate, wherein the phthalocyanine compound is in an amount of from 1% to 99% by weight based on the total weight of the conductive substrate and the phthalocyanine compound combined; and (c) electrolyte or a combination of electrolyte and a porous separator, wherein the separator is disposed between the anode and the cathode and the electrolyte is in ionic contact with the anode and the cathode. This secondary cell exhibits a long cycle life, the best cathode specific capacity, and best cell-level specific energy of all rechargeable lithium-ion cells ever reported.
US09362550B2	Negative electrode for lithium ion secondary batteries and method for producing the negative electrode, and lithium ion secondary battery Provided is a negative electrode for lithium ion secondary batteries, which can enhance the penetration of non-aqueous electrolyte, and can improve the input-output characteristics. The negative electrode includes a negative electrode core material sheet, and a negative electrode material mixture layer supported thereon. The negative electrode material mixture layer includes negative electrode active material particles, and a binder. The negative electrode material mixture layer has a plurality of pores interspersed on the surface and in the interior of the negative electrode material mixture layer. The pores have an average maximum diameter R of 45 to 125 μm. The pores have a number density of 8 to 17 pores per 1 cm2 of the surface of the negative electrode material mixture layer or per 1 cm2 of a cross section in the plane direction of the negative electrode material mixture layer.
US09362547B2	Solid electrolyte cell and positive electrode active material The present technology is able to provide a solid electrolyte cell that uses a positive electrode active material which has a high ionic conductivity in an amorphous state, and a positive electrode active material which has a high ionic conductivity in an amorphous state. The solid electrolyte cell has a stacked body, in which, a positive electrode side current collector film, a positive electrode active material film, a solid electrolyte film, a negative electrode potential formation layer and a negative electrode side current collector film are stacked, in this order, on a substrate. The positive electrode active material film is made up with an amorphous-state lithium phosphate compound that contains Li; P; an element M1 selected from Ni, Co, Mn, Au, Ag, and Pd; and O, for example.
US09362542B2	Lithium ion battery components with chelating agents having oriented permanent dipole moments One example of a lithium ion battery component is a lithium ion battery separator including a planar microporous polymer membrane and a chelating agent bonded to the planar microporous polymer membrane through a linking group. The chelating agent is bonded such that the permanent dipole moment of the chelating agent is oriented perpendicular to the plane of the planar microporous polymer membrane.
US09362541B2	Magnesium cell and magnesium cell system A magnesium cell includes a positive electrode, a negative electrode including a magnesium alloy, and a separator disposed between the positive electrode and the negative electrode to hold an electrolytic solution, in which a contact area between the negative electrode and the separator is variable.
US09362539B2	Polyethylene powder, microporous membrane, and fiber It is intended to provide a polyethylene powder which can offer a fiber excellent in resistance to end breakage, dimensional stability, and acid resistance and/or a microporous membrane excellent in dimensional stability and acid resistance, and a microporous membrane and a fiber which are obtained by forming the polyethylene powder. The present invention provides a polyethylene powder comprising: 0.5 ppm or higher and 3,000 ppm or lower of aluminum hydroxide having an average particle size smaller than 50 μm; and 0.5 ppm or higher and 12 ppm or lower of a magnesium element, wherein the polyethylene has a viscosity-average molecular weight of 100,000 or larger.
US09362535B2	Pouch-type wrap for battery cell A battery assembly includes a cold plate and a plurality of battery cells arranged in an array. Each of the cells has a bottom in contact with the cold plate and is encased in a dielectric jacket. The dielectric jacket surrounds side portions and the bottom of the cell. The jacket has seams on the side portions of the cells but not on the bottom. The seamless bottom forms a continuous and uninterrupted panel over the bottom to provide a seamless interface between the bottom and cold plate. A method of installing the cell into the jacket is also disclosed.
US09362532B2	Apparatus and method for ablating substrate and method of fabricating display apparatus An apparatus for ablating a substrate of a display apparatus, the apparatus including a stage, the stage being configured to receive thereon a carrier substrate, the carrier substrate having attached thereto the display apparatus, a light source unit, the light source unit being configured to emit light towards the stage, a measuring unit, the measuring unit being configured to measure a transmittance of the carrier substrate, and a control unit, the control unit being configured to control the light source unit to emit light sufficient to ablate the substrate of the display apparatus according to the transmittance of the carrier substrate as measured by the measuring unit.
US09362531B2	Organic light emitting display device and manufacturing method thereof An organic light emitting display device and manufacturing method thereof are disclosed. One inventive aspect includes a first substrate, a second substrate, a pixel unit, a circuit unit, a sealing member and a radiation unit. The pixel unit is formed on the first substrate and comprises an organic light emitting device and a thin-film transistor (TFT). The radiation unit includes radiation fins formed in the sealing member and a radiation layer contacting first ends of the radiation fins.
US09362527B2	Functional film having a hybrid layer of polysiloxane and fine resin particles To provide a functional film having excellent bending resistance and stability under high temperature and high humidity conditions, a method for producing the same, and an electronic device including the functional film. A functional film including a resin base, a functional inorganic layer arranged on the resin base, and a hybrid layer arranged on at least one surface of the functional inorganic layer, in which the hybrid layer contains a polysiloxane and fine resin particles.
US09362525B2	OLED device in contact with a conductor Disclosed is a method for contacting a device with a conductor 6, the device 1 comprising a substrate 2 with at least one cell 3, a contact region 4 and an encapsulation 5, wherein the encapsulation 5 encapsulates at least the contact region 4, the method comprising the steps of arranging the conductor 6 on the encapsulation 5, and interconnecting the conductor 6 with the contact region 4 without removing the encapsulation 5 between the conductor 6 and the contact region 4 beforehand. This invention is advantageous as the encapsulation 5 between the conductor 6 and the contact region 4 does not need to be removed beforehand anymore.
US09362522B2	Method for bonding substrates, method for manufacturing sealing structure, and method for manufacturing light-emitting device An object is to improve productivity related to a laser light irradiation step in a bonding technique of substrates using glass frit. A highly airtight sealing structure or a highly airtight light-emitting device, which can be manufactured with high productivity, is provided. When a glass layer by melting glass frit or a sintered body by sintering glass frit is irradiated with laser light, in order to increase the efficiency, a light-absorbing material is attached to a surface of the glass layer. The laser light irradiation is performed on the light-absorbing material and the glass layer. The substrates are fixed with the glass layer therebetween.
US09362521B2	Organic light emitting diode display An organic light emitting diode (OLED) display that includes: a display panel that displays an image; a cover window that is positioned at the outside of a display surface of the display panel; a buffer member that is positioned at a rear surface of the display panel; and a set frame that encloses a rear surface and a side surface of the display panel at a predetermined distance from the buffer member. A distance between the buffer member and the set frame increases as receding from a central portion of the display panel.
US09362517B2	Light-emitting element, display module, lighting module, light-emitting device, display device, electronic appliance, and lighting device An object of one embodiment of the present invention is to provide a multicolor light-emitting element that utilizes fluorescence and phosphorescence and is advantageous for practical application. The light-emitting element has a stacked-layer structure of a first light-emitting layer containing a host material and a fluorescent substance, a separation layer containing a substance having a hole-transport property and a substance having an electron-transport property, and a second light-emitting layer containing two kinds of organic compounds that form an exciplex and a substance that can convert triplet excitation energy into luminescence. Note that a light-emitting element in which light emitted from the first light-emitting layer has an emission spectrum peak on the shorter wavelength side than an emission spectrum peak of the second light-emitting layer is more effective.
US09362509B2	Aryloxy-phthalocyanines of group IV metals The present disclosure relates to a compound comprising an aryloxy-phthalocyanine compound of Group IV metals, a method for preparing the aryloxy-phthalocyanine compound of Group IV metals and an article of manufacture made therefrom.
US09362506B2	Heterocyclic compound and organic light-emitting device including the same A heterocyclic compound represented by Formula 1 below and an organic light-emitting device including the heterocyclic compound: wherein R1 to R12 are defined as in the specification.
US09362504B2	Method for manufacturing display panel A method for manufacturing a display panel, including defining a desorbing area of a support substrate by forming one of a release layer or a recess portion in the desorbing area, cleaning a surface of the support substrate, disposing a thin film substrate on the support substrate, directly bonding, in an adsorbing area external to the desorbing area, the thin film substrate to the support substrate, forming a pixel and a sealing member on the thin film substrate, cutting the sealing member and the thin film substrate at a location that corresponds to the desorbing area, and separating the support substrate from the thin film substrate.
US09362502B2	Donor substrate for transfer and manufacturing method of organic light emitting diode display A donor substrate for transfer is disclosed. In some embodiments, the donor substrate for transfer includes a base layer, a light-heat conversion layer on the base layer, an intermediate layer on the light-heat conversion layer, and a transfer layer on the intermediate layer, in which the intermediate layer includes a transfer part and a non-transfer part, and in the transfer part and the non-transfer part, surface roughness of the intermediate layer is in a range of 30 nanometers or more and 1 micrometer or less. Methods of manufacturing an organic light emitting diode display are also disclosed.
US09362500B2	Method for manufacturing semiconductor memory device and semiconductor memory device According to one embodiment, a manufacturing method of a semiconductor memory device includes forming a stacked body in which word line material layers and insulating layers are alternately stacked on a base layer. The method includes forming first holes on the stacked body so as to be arranged in a first direction and in a second direction that intersects with the first direction. The method includes forming resistance-change films on inner walls of the first holes, forming bit lines inside the resistance-change films in the first holes, and dividing the stacked body in the first direction by forming second holes so that a portion in the stacked body adjacent to the resistance-change films in the second direction. The method includes forming inter-bit line insulating films in the second holes.
US09362497B2	Reduction of forming voltage in semiconductor devices This disclosure provides a nonvolatile memory device and related methods of manufacture and operation. The device may include one or more resistive random access memory (ReRAM) approaches to provide a memory device with more predictable operation. In particular, the forming voltage required by particular designs may be reduced through the use of a barrier layer, a reverse polarity forming voltage pulse, a forming voltage pulse where electrons are injected from a lower work function electrode, or an anneal in a reducing environment. One or more of these techniques may be applied, depending on the desired application and results.
US09362496B2	Resistive memory cell with trench-shaped bottom electrode A resistive memory cell, e.g., CBRAM or ReRAM cell, may include a top electrode an a trench-shaped bottom electrode structure defining a bottom electrode connection and a sidewall extending from a first sidewall region adjacent the bottom electrode connection to a tip region defining a tip surface facing generally away from the bottom electrode connection, and wherein the tip surface facing away from the bottom electrode connection has a tip thickness that is less than a thickness of the first sidewall region adjacent the bottom electrode connection. An electrolyte switching region is arranged between the top electrode and the bottom electrode sidewall tip region to provide a path for the formation of a conductive filament or vacancy chain from the bottom electrode sidewall tip surface of the top electrode, via the electrolyte switching region, when a voltage bias is applied to the resistive memory cell.
US09362495B2	Confined resistance variable memory cells and methods Methods, devices, and systems associated with resistance variable memory device structures can include a method of forming a confined resistance variable memory cell structure includes forming a resistance variable material such that a first unmodified portion of the resistance variable material contacts a bottom electrode and a second unmodified portion of the resistance variable material contacts a top electrode.
US09362494B2	Array of cross point memory cells and methods of forming an array of cross point memory cells An array of cross point memory cells comprises spaced elevationally inner first lines, spaced elevationally outer second lines which cross the first lines, and a multi-resistive state region elevationally between the first and second lines where such cross. Individual of the multi-resistive state regions comprise elevationally outer multi-resistive state material and elevationally inner multi-resistive state material that are electrically coupled to one another. The inner multi-resistive state material has opposing edges in a vertical cross-section. The outer multi-resistive state material has opposing edges in the vertical cross-section that are laterally offset relative to the opposing edges of the inner multi-resistive state material in the vertical cross-section. Methods are also disclosed.
US09362492B2	Integrated phase change switch Various methods and devices that involve phase change material (PCM) switches are disclosed. An exemplary integrated circuit comprises an active layer with a plurality of field effect transistor (FET) channels for a plurality of FETs. The integrated circuit also comprises an interconnect layer comprising a plurality of conductive interconnects. The plurality of conductive interconnects couple the plurality of field effect transistors. The integrated circuit also comprises an insulator layer covering at least a portion of the interconnect layer. The integrated circuit also comprises a channel of a radio-frequency (RF) PCM switch. The channel of the RF PCM switch is formed on the insulator layer.
US09362490B1	Method of patterning MTJ cell without sidewall damage A method of removing a damaged magnetic layer at the sidewall of MTJ edge is provided to form damage-free MRAM cell. In this method, the MTJ film stack outside the Ta hard mask protected area is first etched by high-power magnetic reactive ion etch (RIE) using methanol (CH3OH) or Co & NH3 as etchant gases. Then a very mild chemical vapor trimming (CVT) process is used to remove a damaged layer (by the high power RIE) from the MTJ sidewall followed by an in-situ edge passivation with Si nitride (SiN) layer formed by PECVD. The MRAM cell formed by such method will have higher magnetoresistance with good device performance and better reliability.
US09362482B2	Method of producing piezoelectric device using Be, Fe and Co under excess oxygen atmosphere Provided are a bismuth-based piezoelectric material whose insulation property is improved while its performance as a piezoelectric body is not impaired and a piezoelectric device using the piezoelectric material. The piezoelectric material includes a perovskite-type metal oxide represented by the following general formula (1): Bix(Fe1-yCoy)O3 (1) where 0.95≦x≦1.25 and 0≦y≦0.30, and a root mean square roughness Rq (nm) of a surface of the piezoelectric material satisfies a relationship of 0
US09362481B2	Continuous piezoelectric film including polar polymer fibers A continuous piezoelectric film can include a plurality of fibers, each fiber including a polypeptide, wherein molecules of the polypeptide have electric dipole moments that are aligned such that the piezoelectric fiber provides a piezoelectric effect. The continuous piezoelectric film has at least one piezoelectric constant d31 or d33 that is at least 1 pC/N. The continuous piezoelectric film can be prepared hot pressing a mat of aligned piezoelectric fibers.
US09362477B2	Method of forming ceramic wire, system of forming the same, and superconductor wire using the same Provided is a method of forming a ceramic wire. In the method, a ceramic precursor film is deposited on a wire substrate. Then, the wire substrate on which the ceramic precursor film is deposited is treated by heating. For treating the wire substrate by heating, a temperature of the wire substrate and/or an oxygen partial pressure of the wire substrate are controlled such that the ceramic precursor film is in a liquid state and an epitaxy ceramic film is formed from the liquid ceramic precursor film on the wire substrate.
US09362473B2	Lead frame for mounting LED elements, lead frame with resin, method for manufacturing semiconductor devices, and lead frame for mounting semiconductor elements A lead frame for mounting LED elements includes a frame body region and a large number of package regions arranged in multiple rows and columns in the frame body region. The package regions each include a die pad on which an LED element is to be mounted and a lead section adjacent to the die pad, the package regions being further constructed to be interconnected via a dicing region. The die pad in one package region and the lead section in another package region upward or downward adjacent to the package region of interest are connected to each other by an inclined reinforcement piece positioned in the dicing region.
US09362469B2	Light emitting package having a guiding member guiding an optical member A light emitting package, includes a base; a light emitting device on the base; an electrical circuit layer electrically connected to the light emitting device; an optical member formed of a light transmissive material; and a guiding member guiding the optical member, the guiding member including an opening, a first portion disposed on the uppermost surface of the base, and a second portion connected to an edge portion of the optical member. The first portion of the guiding member is positioned higher than a bottom surface of the optical member, an uppermost surface of the base is closer to the first portion of the guiding member than the second portion of the guiding member, and the edge portion of the optical member is closer to the second portion of the guiding member than the first portion of the guiding member.
US09362467B2	Flat panel display device and method of fabricating the same Discussed is a flat panel display device in which a protective pattern is formed on a lower surface of an upper film so that when the upper film is cut, link lines of a display panel formed in a cutting region is not damaged.
US09362466B2	Contacting an optoelectronic semiconductor component through a conversion element and corresponding optoelectronic semiconductor component A method for manufacturing an optoelectronic semiconductor component, comprising: providing a semiconductor chip in a composite wafer, comprising an active side for emitting a primary radiation and a contact terminal which is arranged on the active side; depositing a coupling element on the active side; attaching a luminescence conversion element, for converting part of the primary radiation into a secondary radiation, to the coupling element.
US09362462B2	Light emitting device package Disclosed is a light emitting device package. The light emitting device package includes a body part provided therein with a cavity, a light emitting chip in the cavity, a cover part to cover the cavity, and a light conversion part provided on a bottom surface of the cover part while being separated from the light emitting chip.
US09362461B2	Light emitting device and lighting system having the same Disclosed are a light emitting device and a lighting system which uses a light emitting diode. The light emitting device includes a body which has a first and a second sidewall. The sidewalls have a first length and a corresponding third and fourth sidewalls. The third and fourth sidewalls are close to the first and second sidewalls and have a second length shorter than the first length, and a concave portion which has an open upper portion. A first lead frame is disposed in the concave portion of the body which includes a first cavity having a depth lower than a bottom of the concave portion. Also, a second lead frame is disposed in the concave portion of the body and includes a second cavity having a depth lower than the bottom of the concave portion. There is a gap part between the first and second lead frames. In the first cavity is a light emitting chip, and in the second cavity there is a light emitting chip.
US09362460B2	Integrated polarized light emitting diode with a built-in rotator The invention is directed to an integrated polarized light emitting diode device that has a light emitting diode, a metal grating, an oxide layer, and a built-in photonic crystal rotator. Additional teachings include a method for making the integrated polarized light emitting diode, a method for improving the polarization selectivity and energy efficiency of a light emitting diode, and a method for rotating polarization of a light emitting diode.
US09362454B2	Gallium nitride based light emitting diode A light emitting diode includes a first conductive type semiconductor layer; at least one InxGa1−xN layer (0
US09362452B2	Light-emitting device and the manufacturing method thereof A light-emitting device includes: a substrate including an upper surface, wherein the upper surface includes an ion implantation region; a semiconductor layer formed on the upper surface; a light-emitting stack formed on the semiconductor layer; and a plurality of scattering cavities formed between the semiconductor layer and the upper surface in accordance with the ion implantation region.
US09362449B2	High efficiency light emitting diode and method of fabricating the same Disclosed herein are a high efficiency light emitting diode and a method of fabricating the same. The light emitting diode includes a semiconductor stacked structure disposed on the support substrate and including a gallium nitride-based p-type semiconductor layer, a gallium nitride-based active layer, and a gallium nitride-based n-type semiconductor layer; and a reflecting layer disposed between the support substrate and the semiconductor stacked structure, wherein the semiconductor stacked structure includes a plurality of protrusions having a truncated cone shape and fine cones formed on top surfaces of the protrusions. By this configuration, light extraction efficiency of the semiconductor stacked structure having low dislocation density can be improved.
US09362447B2	Semiconductor light emitting device There is provided a semiconductor light emitting device. The device includes an n-type semiconductor layer, and a p-type semiconductor layer. The p-type semiconductor layer includes a plurality of first layers and second layers, each containing a p-type impurity and are alternately stacked. The impurity concentrations of the plurality of first layers increase in a direction away from the n-type semiconductor layer. An active layer is disposed between the n-type semiconductor layer and the p-type semiconductor layer.
US09362446B2	Semiconductor light-emitting device The present disclosure relates to a semiconductor light emitting device, comprising: a supporting substrate having a first surface and a second surface opposite to the first surface; at least one semiconductor stack formed on the first surface, wherein each stack includes a plurality of semiconductor layers grown sequentially using a growth substrate and composed of a first semiconductor layer, a second semiconductor layer, and an active layer generating light via electron-hole recombination, and wherein a growth substrate-removed surface is formed on the side of the first semiconductor layer; a bonded layer, which bonds the second semiconductor layer side of the plurality of semiconductor layers to the first surface side of the supporting substrate; and a bonded layer-removed surface formed on the first surface, being open towards the plurality of semiconductor layer to supply current thereto.
US09362445B2	Light-emitting device A light emitting device comprising a plurality of current spreading layers including a first P doped layer, a first N doped layer and a second P doped layer, wherein the N doped layer having a doping level and thickness configured for substantial depletion or full depletion.
US09362443B2	Solar cell with absorber layer with three dimensional projections for energy harvesting, and method for forming the same A solar cell with an absorber layer including three dimensional tubular projections and the method for forming the same, is provided. The three dimensional tubular projections are formed in various configurations and include surfaces facing in various directions and are adapted to absorb sunlight directed to the solar cell panel at various angles. The method for forming the absorber layer includes introducing impurities onto a layer over a solar cell substrate to form as nucleation sites and depositing an absorber layer to form a base layer portion and tubular projections at the nucleation sites. The solar cell is exposed to sunlight and the absorber layer including the three dimensional tubular projections, absorbs direct and reflected sunlight directed to the solar cell at various angles.
US09362440B2	60×120 cm2 prototype electrodeposition cell for processing of thin film solar panels Techniques for electrodeposition of thin film solar panels are provided. In one aspect, an electrodeposition apparatus is provided. The electrodeposition apparatus includes at least one electroplating cell; and a conveyor for moving panels over the electroplating cell, wherein the conveyor comprises at least one metal belted track over the electroplating cell surrounding a plurality of metal rollers. The electroplating cell can include an anode at a bottom of the electroplating cell; and a plurality of paddles at a top of the electroplating cell. A baffle may be located in between the anode and the paddles. An electroplating process is also provided.
US09362438B2	Optoelectronic semiconductor component and module with a plurality of such components The invention relates to a semi-conductor component, comprising a semi-conductor chip (1) which has an active layer (1a) suitable for generating radiation and suitable for emitting radiation in the blue wavelength range. A first converter (3a) comprising a Ce doping is arranged downstream of the semiconductor chip (1) in the emission direction. In addition, a second converter (3b) comprising a minimum Ce doping of 1.5% is arranged downstream of the semiconductor chip (1) in the emission direction. The invention further relates to a module with a plurality of such components.
US09362433B2	Photovoltaic interconnect systems, devices, and methods Photovoltaic modules may include multiple flexible thin film photovoltaic cells electrically connected in series by a substantially transparent top sheet having an embedded conductive wire grid pattern. Methods of manufacturing photovoltaic modules including integrated multi-cell interconnections are provided.
US09362431B2	Compound semiconductor single crystal ingot for photoelectric conversion devices, photoelectric conversion device, and production method for compound semiconductor single crystal ingot for photoelectric conversion devices The present invention increases the conversion efficiency of a photoelectric conversion element that uses cadmium zinc telluride or cadmium telluride (Cd(Zn)Te) compound semiconductor single crystals containing a group 1A element as an impurity. A heat-resistant pot is filled with raw material and a group 1A element, which is reacted with a portion of the raw material, and the container is heated, thereby melting the raw material into a melt and diffusing the dissociated group 1A element in the melt, producing single crystals from the melt. Compound semiconductor single crystals for photoelectric conversion elements having a hole concentration of 4×1015 cm−3 to 1×1018 cm−3 are produced in this manner. Using a substrate (2) that has been cut out from the compound semiconductor single crystals for photoelectric conversion elements enables the conversion efficiency of a photoelectric conversion element (10) to be increased.
US09362428B2	Photonic lock based high bandwidth photodetector The technique introduced herein decouples the traditional relationship between bandwidth and responsivity, thereby providing a more flexible and wider photodetector design space. In certain embodiments of the technique introduced here, a photodetector device includes a first mirror, a second mirror, and a light absorption region positioned between the first and second reflective mirrors. For example, the first mirror can be a partial mirror, and the second mirror can be a high-reflectivity mirror. The light absorption region is positioned to absorb incident light that is passed through the first mirror and reflected between the first and second mirrors. The first mirror can be configured to exhibit a reflectivity that causes an amount of light energy that escapes from the first mirror, after the light is reflected back by the second mirror, to be zero or near zero.
US09362425B2	Solar cell device and method for manufacturing the same In order to provide a solar cell device having increased reliability, the present invention is provided with: a substrate having a semiconductor region containing silicon at one primary surface side; a first electrode provided on the one primary surface and containing silver as the primary component; and a second electrode connected to the first electrode on the one primary surface and containing aluminum as the primary component. The first electrode is a solar cell device containing elemental tin.
US09362421B2	Semiconductor device including a support structure In a semiconductor device, a support wall is formed between storage nodes to more effectively prevent leaning of a capacitor, and the storage nodes are formed using a damascene process, which may increase a contact area between each storage node and a storage node contact.
US09362420B2	Transistor structure for electrostatic discharge protection The present invention discloses a transistor structure for electrostatic discharge protection. The structure includes a substrate, a doped well, a first doped region, a second doped region and a third doped region. The doped well is disposed in the substrate and has a first conductive type. The first doped region is disposed in the substrate, encompassed by the doped well and has the first conductive type. The second doped region is disposed in the substrate, encompassed by the doped well and has a second conductive type. The third doped region is disposed in the substrate, encompassed by the doped well and has the second conductive type. A gap is disposed between the first doped region and the second doped region.
US09362413B2	MOTFT with un-patterned etch-stop A method of fabricating a high mobility semiconductor metal oxide thin film transistor including the steps of depositing a layer of semiconductor metal oxide material, depositing a blanket layer of etch-stop material on the layer of MO material, and patterning a layer of source/drain metal on the blanket layer of etch-stop material including etching the layer of source/drain metal into source/drain terminals positioned to define a channel area in the semiconductor metal oxide layer. The etch-stop material being electrically conductive in a direction perpendicular to the plane of the blanket layer at least under the source/drain terminals to provide electrical contact between each of the source/drain terminals and the layer of semiconductor metal oxide material. The etch-stop material is also chemical robust to protect the layer of semiconductor metal oxide channel material during the etching process.
US09362410B2	Semiconductor device, manufacturing method thereof, and display device A multi-gate structure is used and a width (d1) of a high concentration impurity region sandwiched by two channel forming regions in a channel length direction is set to be shorter than a width (d2) of low concentration impurity regions in the channel length direction. Thus, a resistance of the entire semiconductor layer of a TFT which is in an on state is reduced to increase an on current. In addition, a carrier life time due to photoexcitation produced in the high concentration impurity region can be shortened to reduce light sensitivity.
US09362408B2	Thin film transistor and display panel including the same Disclosed is a thin film transistor including a gate electrode on a substrate. A gate dielectric layer is disposed on the gate electrode and the substrate, and source/drain electrodes are disposed on the gate dielectric layer overlying two edge parts of the gate electrode. A channel layer is disposed on the gate dielectric layer overlying a center part of the gate electrode, and the channel region contacts the source/drain electrodes. An insulating capping layer overlies the channel layer, wherein the channel layer includes an oxide semiconductor.
US09362405B1	Channel cladding last process flow for forming a channel region on a FinFET device One method of forming epi semiconductor cladding materials in the channel region of a semiconductor device is disclosed which includes forming an initial epi semiconductor cladding material around the exposed portion of a fin for an entire axial length of the fin, forming a sacrificial gate structure around a portion of the fin and the initial cladding material, removing the sacrificial gate structure so as to thereby define a replacement gate cavity, performing an etching process through the replacement gate cavity to remove at least the exposed portion of the initial cladding material and thereby expose a surface of the fin within the replacement gate cavity, forming at least one replacement epi semiconductor cladding material around the exposed surface of the fin, and forming a replacement gate structure within the replacement gate cavity around the at least one replacement epi semiconductor cladding material.
US09362400B1	Semiconductor device including dielectrically isolated finFETs and buried stressor A finFET semiconductor device includes a semiconductor-on-insulator (SOI) substrate including a buried insulator layer, a plurality of semiconductor fins on the buried insulator layer, and a gate structure covering the semiconductor fins, at least one buried stressor element embedded in the buried insulator layer, and a source/drain element on an upper surface of the at least one buried stressor element and integrally formed with at least one semiconductor fin among the plurality of semiconductor fins, the at least one buried stressor element applying a stress upon the source/drain element from therebeneath.
US09362396B2	Semiconductor device, manufacturing method thereof, electronic device and vehicle A method for manufacturing a semiconductor device, includes forming a recess over a surface of an n-type semiconductor substrate, forming a gate insulation film over an inner wall and a bottom face of the recess, embedding a gate electrode into the recess, forming a p-type base layer in a surface layer of the semiconductor substrate so as to be shallower than the recess, and forming an n-type source layer in the p-type base layer so as to be shallower than the p-type base layer. An impurity profile of the p-type base layer in a thickness direction includes a first peak, a second peak being located closer to a bottom face side of the semiconductor substrate than the first peak and being higher than the first peak, and a third peak located between the first peak and the second peak by implanting impurity ions three times or more at ion implantation energies different from each other in the forming of the p-type base layer.
US09362394B2	Power device termination structures and methods Power device termination structures and methods are disclosed herein. The structures include a trenched-gate semiconductor device. The trenched-gate semiconductor device includes a semiconducting material and an array of trenched-gate power transistors. The array defines an inner region including a plurality of inner transistors and an outer region including a plurality of outer transistors. The inner transistors include a plurality of inner trenches that has an average inner region spacing. The outer transistors include a plurality of outer trenches that has an average termination region spacing. The average termination region spacing is greater than the average inner region spacing or is selected such that a breakdown voltage of the plurality of outer transistors is greater than a breakdown voltage of the plurality of inner transistors.
US09362392B2	Vertical high-voltage semiconductor device and fabrication method thereof To provide a vertical SIC-MOSFET and IGBT capable of having low ON-resistance without destruction of gate oxide films or degradation of reliability even when a high voltage is applied, and a fabrication method thereof, a vertical mosfet has a semiconductor layer and a base layer joined instead of a well region 6 so as to include, as a joining portion, a point that is farthest and equidistant from centers of all the source regions facing each other and that is closest and equidistant from end portions farthest from the centers of the source regions in a planar view.
US09362390B2	Logic elements comprising carbon nanotube field effect transistor (CNTFET) devices and methods of making same Inverter circuits and NAND circuits comprising nanotube based FETs and methods of making the same are described. Such circuits can be fabricating using field effect transistors comprising a source, a drain, a channel region, and a gate, wherein the first channel region includes a fabric of semiconducting nanotubes of a given conductivity type. Such FETs can be arranged to provide inverter circuits in either two-dimension or three-dimensional (stacked) layouts. Design equations based upon consideration of the electrical characteristics of the nanotubes are described which permit optimization of circuit design layout based upon constants that are indicative of the current carrying capacity of the nanotube fabrics of different FETs.
US09362387B2	Method for producing multi-gate in FIN field-effect transistor A method for producing a multi-gate fin field-effect transistor (FinFET) is provided. The method includes forming a channel layer and a gate medium layer on a substrate; forming an amorphous silicon layer on the substrate, and etching the amorphous silicon layer, to form at least one fin; forming, by using an epitaxial growth process, a first protective layer from both sides to the middle of the substrate along a length direction of the at least one fin until a groove is formed in a middle location along the length direction of the at least one fin; forming a gate electrode layer on the substrate, performing planarization processing on the gate electrode layer to expose the first protective layer, and etching away the first protective layer by using an etching process, so as to form a gate electrode; and forming a source electrode and a drain electrode on the substrate.
US09362386B2	FETs and methods for forming the same FETs and methods for forming FETs are disclosed. A structure comprises a substrate, a gate dielectric and a gate electrode. The substrate comprises a fin, and the fin comprises an epitaxial channel region. The epitaxial channel has a major surface portion of an exterior surface. The major surface portion comprising at least one lattice shift, and the at least one lattice shift comprises an inward or outward shift relative to a center of the fin. The gate dielectric is on the major surface portion of the exterior surface. The gate electrode is on the gate dielectric.
US09362371B2	Method for producing a controllable semiconductor component having a plurality of trenches A method of producing a controllable semiconductor component includes providing a semiconductor body with a top side and a bottom side, and forming a first trench protruding from the top side into the semiconductor body and a second trench protruding from the top side into the semiconductor body. The first trench has a first width and a first depth, and the second trench has a second width greater than the first width and a second depth greater than the first depth. The method further includes forming, in a common process, an oxide layer in the first trench and in the second trench such that the oxide layer fills the first trench and electrically insulates a surface of the second trench, and removing the oxide layer from the first trench completely or at least partly such that the semiconductor body comprises an exposed first surface area arranged in the first trench.
US09362368B2	Substrate with silicon carbide film, method for producing substrate with silicon carbide film, and semiconductor device A substrate with a silicon carbide film includes a Si substrate, and a SiC film and a mask stacked on the Si substrate. The SiC film has a first SiC film provided on the upper side of the Si substrate and a second SiC film provided on the upper side of the first SiC film. The mask has a first mask provided on the Si substrate and including an opening (first opening) and a second mask provided on the first SiC film and including an opening (second opening). The width W1 (μm) of the first opening and the thickness T1 (μm) of the first mask satisfy the following relationship: T1
US09362367B2	Semiconductor devices including polar insulation layer capped by non-polar insulation layer Illustrative embodiments of semiconductor devices including a polar insulation layer capped by a non-polar insulation layer, and methods of fabrication of such semiconductor devices, are disclosed. In at least one illustrative embodiment, a semiconductor device may comprise a semiconductor substrate, a polar insulation layer disposed on the semiconductor substrate and comprising a Group V element configured to increase a carrier mobility in at least a portion of the semiconductor substrate, and a non-polar insulation layer disposed above the polar insulation layer.
US09362361B1	Methods of forming elastically relaxed SiGe virtual substrates on bulk silicon One illustrative method disclosed herein includes, among other things, forming a composite fin structure comprised of a sacrificial silicon material and a first non-sacrificial semiconductor material positioned above the sacrificial silicon material, forming a second non-sacrificial semiconductor material in each of the trenches adjacent the composite fin structure, performing at least one etching process so as to cut the composite fin structure and thereby expose cut end surfaces of the sacrificial silicon material, selectively removing the sacrificial silicon material of the composite fin structure relative to the first and second non-sacrificial semiconductor materials and forming a layer of strained channel semiconductor material above an upper surface of the first non-sacrificial semiconductor material of the composite fin structure and above an upper surface of the second non-sacrificial semiconductor materials positioned in the trenches.
US09362358B2	Spatial semiconductor structure A method of fabricating a spatial semiconductor structure includes steps as follows. Firstly, a semiconductor substrate is provided. Then, a first mask layer is formed above the semiconductor substrate. Then, at least a first opening is formed in the first mask layer and exposes a portion of a surface of the semiconductor substrate. Then, a first semiconductor pattern is formed in the first opening. Then, a second mask layer is formed over the first semiconductor pattern and the first mask layer. Then, at least a second opening is formed through the second mask layer to the first mask layer and exposes another portion of the surface of the semiconductor substrate. And, a second semiconductor pattern is formed in the second opening.
US09362355B1	Nanosheet MOSFET with full-height air-gap spacer A semiconductor device includes a gate positioned on a substrate; a nanosheet that extends through the gate, protrudes from a sidewall of the gate, and forms a recess between the substrate and the nanosheet; a dielectric spacer disposed in the recess; a source/drain contact positioned on a source/drain disposed on the substrate adjacent to the gate; an air gap spacer positioned along the sidewall of the gate and in contact with a dielectric material disposed on the nanosheet, the air gap spacer being in contact with the source/drain contact; and an interlayer dielectric (ILD) disposed on the air gap spacer.
US09362354B1	Tuning gate lengths in semiconductor device structures A method for tuning gate lengths in nanowire semiconductor device structures. The present invention tunes the gate length by having the suspension height of the nanowire channels altered. The first method alters the suspension height by offsetting the height of the nanowires while utilizing gates of similar tapered dimensions, such that the nanowires pass through the gate regions at different heights and result in different gate length nanowire transistor device structures. The second method alters the suspension height by offsetting the height of the steps that the gates of similar tapered dimensions are formed on, such that the nanowires pass through the gate regions at different heights, resulting in different gate length nanowire transistor device structures. Both methods facilitate a decrease in overall fabrication costs by allowing the same type of patterned gate stacks to be used in order to produce channels of various lengths.
US09362352B2	Semiconductor device and manufacturing method A semiconductor device includes a first-conductivity-type semiconductor layer including an active region in which a transistor having impurity regions is formed and a marginal region surrounding the active region, a second-conductivity-type channel layer formed between the active region and the marginal region and forming a front surface of the semiconductor layer, at least one gate trench formed in the active region to extend from the front surface of the semiconductor layer through the channel layer, a gate insulation film formed on an inner surface of the gate trench, a gate electrode formed inside the gate insulation film in the gate trench, and at least one isolation trench arranged between the active region and the marginal region to surround the active region and extending from the front surface of the semiconductor layer through the channel layer, the isolation trench having a depth equal to that of the gate trench.
US09362349B2	Semiconductor device with charge carrier lifetime reduction means A semiconductor device includes a cell region having at least one device cell, wherein the at least one device cell includes a first device region of a first conductivity type. The semiconductor device further includes a drift region of a second conductivity type adjoining the first device region of the at least one device cell, a doped region of the first conductivity type adjoining the drift region, and charge carrier lifetime reduction means configured to reduce a charge carrier lifetime in the doped region of the first conductivity type.
US09362348B2	Method of manufacturing a light emitting, power generating or other electronic apparatus An exemplary printable composition of a liquid or gel suspension of diodes comprises a plurality of diodes, a first solvent and/or a viscosity modifier. An exemplary method of fabricating an electronic device comprises: depositing one or more first conductors; and depositing a plurality of diodes suspended in a mixture of a first solvent and a viscosity modifier. Various exemplary diodes have a lateral dimension between about 10 to 50 microns and about 5 to 25 microns in height. Other embodiments may also include a plurality of substantially chemically inert particles having a range of sizes between about 10 to about 50 microns.
US09362346B2	Organic light emitting display device including a plurality of power lines Disclosed is an organic light emitting display device that includes a first substrate; at least one pixel formed on the first substrate; a first power line formed on the first substrate, the first power line supplying a first voltage to the pixel; a second power line formed on the first substrate, the second power line supplying a second voltage to the pixel, the second voltage being different from the first voltage; and a second substrate formed over the first substrate, the second substrate including a first metal layer, a second metal layer, and an insulating layer formed between the first metal layer and the second metal layer, the insulating layer insulating the first metal layer and the second metal layer from each other, wherein the first metal layer is electrically connected with the first power line and the second metal layer is electrically connected to the second power line.
US09362345B2	Organic light emitting display apparatus and method of manufacturing the same An organic light emitting display apparatus and a method of manufacturing the same are disclosed. The organic light emitting display apparatus includes, for example, a pixel electrode and a bus electrode spaced apart and electrically insulated from each other, a pixel defining layer exposing a part of the pixel electrode including a central part thereof and a part of the bus electrode, a first intermediate layer on a top surface of the pixel defining layer between the pixel electrode and the bus electrode, the first intermediate layer having a first opening in a part of the bus electrode to expose a part of the bus electrode, an emission layer disposed on the first intermediate layer, and an opposite electrode disposed on the emission layer to correspond to the pixel electrode and the bus electrode and contacting the bus electrode through the first opening of the first intermediate layer.
US09362341B2	X ray detection apparatus There is set forth herein a method for making an apparatus for use in X ray detection comprising fabricating a first layered assembly 10 comprising a scintillator and first electrode layer, and laminating the first layered assembly 10 onto a second layered assembly 20 wherein the second layered assembly has a thin film transistor (TFT) array, wherein the TFT array includes a second electrode layer, wherein at least one of the first layered assembly and the second layered assembly includes an organic photodiode (OPD) absorber layer and wherein the laminating is absent use of an adhesive.
US09362337B1	Non-volatile storage unit and non-volatile storage device A non-volatile storage device adopt memristors to store data and uses fewer transistors to realize the same circuit function, whereby to decrease the chip area and reduce the time and energy spent in initiating the device. Further, the non-volatile storage device disposes appropriate electronic elements in the spacing between adjacent memristors to meet the layout design rule and achieve high space efficiency in the chip lest the space between memristors be wasted.
US09362334B2	Double-sided display apparatus and method of manufacturing the same A double-sided display apparatus and a method of manufacturing the same are provided. The double-sided display apparatus includes a first substrate and a second substrate arranged opposite to each other; a first transparent electrode and a second reflective electrode arranged on the first substrate; a first reflective electrode opposed to the first transparent electrode on the first substrate and a second transparent electrode opposed to the second reflective electrode on the first substrate arranged on the second substrate; and a quantum light-emitting layer arranged between the respectively corresponded transparent electrodes and reflective electrodes, the quantum light-emitting layer including charge transport particles and QD light-emitting material mixed therein. The provided double-sided display apparatus is lighter, thinner, more portable, and of low cost.
US09362332B1	Method for semiconductor selective etching and BSI image sensor A method of selectively etching a semiconductor device and manufacturing a BSI image sensor device includes etching a doped silicon substrate with an HNA solution for a predetermined time duration to obtain an etching solution having a concentration C1 of nitrite ions, etching the semiconductor device using the obtained etching solution. Etching the semiconductor device requires an initial concentration C0 of nitride ions that is lower than C1. The HNA solution comprises a hydrofluoric acid (HF), a nitric acid (HNO3), and a acetic acid (CH3COOH). The BSI image sensor device will have a uniform thickness when etched using the thus obtained etching solution.
US09362329B2	Pad structure exposed in an opening through multiple dielectric layers in BSI image sensor chips An integrated circuit structure includes a semiconductor substrate, and a dielectric pad extending from a bottom surface of the semiconductor substrate up into the semiconductor substrate. A low-k dielectric layer is disposed underlying the semiconductor substrate. A first non-low-k dielectric layer is underlying the low-k dielectric layer. A metal pad is underlying the first non-low-k dielectric layer. A second non-low-k dielectric layer is underlying the metal pad. An opening extends from a top surface of the semiconductor substrate down to penetrate through the semiconductor substrate, the dielectric pad, and the low-k dielectric layer, wherein the opening lands on a top surface of the metal pad. A passivation layer includes a portion on a sidewall of the opening, wherein a portion of the passivation layer at a bottom of the opening is removed.
US09362328B2	Semiconductor device and imaging apparatus The invention relates to a semiconductor device having a vertical transistor bipolar structure of emitter, base, and collector formed in this order from a semiconductor substrate surface in a depth direction. The semiconductor device includes an electrode embedded from the semiconductor substrate surface into the inside and insulated by an oxide film. In the surface of the substrate, a first-conductivity-type first semiconductor region, a second-conductivity-type second semiconductor region, and a first-conductivity-type third semiconductor region are arranged, from the surface side, inside a semiconductor device region surrounded by the electrode and along the electrode with the oxide film interposed therebetween, the second semiconductor region located below the first semiconductor region, the third semiconductor region located below the second semiconductor region. The electrode is insulated from the first to third semiconductor regions, and current gain is variable through application of voltage to the electrode.
US09362325B2	Semiconductor device and electronic appliance The present technique relates to a semiconductor device and an electronic appliance in which the reliability of the fine transistor can be maintained while the signal output characteristic is improved in a device formed by stacking semiconductor substrates.The semiconductor device includes a first semiconductor substrate, a second semiconductor substrate providing a function different from a function provided by the first semiconductor substrate, and a diffusion prevention film that prevents diffusion of a dangling bond terminating atom used for reducing the interface state of the first semiconductor substrate and the second semiconductor substrate, wherein at least two semiconductor substrates are stacked and the semiconductor substrates are electrically connected to each other, and the first semiconductor substrate and the second semiconductor substrate are stacked with the diffusion prevention film inserted between an interface of the first semiconductor substrate and an interface of the second semiconductor substrate.
US09362323B2	Solid-state image sensor An image sensor includes first to fourth microlenses. A first height difference between a first valley between the first and second microlenses and tops of the first and second microlenses is larger than a second height difference between a second valley between the third and fourth microlenses and tops of the third and fourth microlens, a first angle formed by a tangent in an outermost portion of the first microlens, which contacts the first valley and a plane perpendicular to the normal is equal to or smaller than a second angle formed by a tangent in an outermost portion of the third microlens, which contacts the second valley and the plane.
US09362322B2	Light-sensing apparatus, method of driving the light-sensing apparatus, and optical touch screen apparatus including the light-sensing apparatus In one embodiment, a light-sensing apparatus includes a light-sensing pixel array that has a plurality of light-sensing pixels arranged in rows and columns; and a gate driver configured to provide the light-sensing pixels with a gate voltage and a reset signal that have inverted phases. Each of the light-sensing pixels includes a light sensor transistor configured to sense light and a switch transistor configured to output a light-sensing signal from the light-sensor transistor. The gate driver includes a plurality of gate lines connected to gates of the switch transistors, a plurality of reset lines connected to gates of the light sensor transistors, and a plurality of phase inverters each connected between a corresponding reset line and a gate line. Thus, when a gate voltage is applied to one of the plurality of gate lines, a reset signal with an inversed phase to the gate voltage may be applied to a corresponding reset line.
US09362321B2	Solid-state imaging device and manufacturing method thereof A solid-state imaging device includes a photoelectric conversion unit, a transistor, and an element separation region separating the photoelectric conversion unit and the transistor. The photoelectric conversion unit and the transistor constitute a pixel. The element separation region is formed of a semiconductor region of a conductivity type opposite to that of a source region and a drain region of the transistor. A part of a gate electrode of the transistor protrudes toward the element separation region side beyond an active region of the transistor. An insulating film having a thickness substantially the same as that of a gate insulating film of the gate electrode of the transistor is formed on the element separation region continuing from a part thereof under the gate electrode of the transistor to a part thereof continuing from the part under the gate electrode of the transistor.
US09362319B2	Image pickup device An image pickup device according to the present invention is an image pickup device in which a plurality of pixel are arranged in a semiconductor substrate. Each of the plurality of pixels includes a photoelectric conversion element, a floating diffusion (FD) region, a transfer gate that transfers charges in the first semiconductor region to the FD region, and an amplification transistor whose gate is electrically connected to the FD region. The photoelectric conversion element has an outer edge which has a recessed portion in plan view, a source region and a drain region of the amplification transistor are located in the recessed portion, and the FD region is surrounded by the photoelectric conversion region or is located in the recessed portion in plan view.
US09362318B2	Method of manufacturing a semiconductor device An interlayer insulating film is formed. Then a first gate electrode and a second gate electrode are buried in the interlayer insulating film. Then, an anti-diffusion film is formed over the interlayer insulating film, over the first gate electrode, and over the second gate electrode. Then, a first semiconductor layer is formed over the anti-diffusion film which is present over the first gate electrode. Then, an insulating cover film is formed over the upper surface and on the lateral side of the first semiconductor layer and over the anti-diffusion film. Then, a semiconductor film is formed over the insulating cover film. Then, the semiconductor film is removed selectively to leave a portion positioned over the second gate electrode, thereby forming a second semiconductor layer.
US09362313B2	Thin film transistor and display device Provided is an oxide-semiconductor-based thin film transistor having satisfactory switching characteristics and stress resistance. Change in threshold voltage through stress application is suppressed in the thin film transistor. The thin film transistor of excellent stability comprises a substrate and, formed thereon, at least a gate electrode, a gate insulating film, oxide semiconductor layers, a source-drain electrode, and a passivation film for protecting the gate insulating film, and oxide semiconductor layers, wherein the oxide semiconductor layers are laminated layers comprising a second oxide semiconductor layer consisting of In, Zn, Sn, and O and a first oxide semiconductor layer consisting of In, Ga, Zn, and O. The second oxide semiconductor layer is formed on the gate insulating film. The first oxide semiconductor layer is interposed between the second oxide semiconductor layer and the passivation film.
US09362307B2	Thin film transistor, electronic device having the same, and method for manufacturing the same An object of the present invention is to provide a method for manufacturing a thin film transistor which enables heat treatment aimed at improving characteristics of a gate insulating film such as lowering of an interface level or reduction in a fixed charge without causing a problem of misalignment in patterning due to expansion or shrinkage of glass. A method for manufacturing a thin film transistor of the present invention comprises the steps of heat-treating in a state where at least a gate insulating film is formed over a semiconductor film on which element isolation is not performed, simultaneously isolating the gate insulating film and the semiconductor film into an element structure, forming an insulating film covering a side face of an exposed semiconductor film, thereby preventing a short-circuit between the semiconductor film and a gate electrode. Expansion or shrinkage of a glass substrate during the heat treatment can be prevented from affecting misalignment in patterning since the gate insulating film and the semiconductor film are simultaneously processed into element shapes after the heat treatment.
US09362306B2	Semiconductor device and method of fabricating the same According to example embodiments, a three-dimensional semiconductor device including a substrate with cell and connection regions, gate electrodes stacked on the cell region, a vertical channel structure, pads, a dummy pillar, and first and second semiconductor patterns. The vertical channel structure penetrates the gate electrodes on a lowermost gate electrode and includes a first gate dielectric pattern. The pads extend from the gate electrodes and are stacked on the connection region. The dummy pillar penetrates some of the pads on a lowermost pad and includes a second gate dielectric pattern. The first semiconductor patterns are between the vertical channel structure and the substrate. The second semiconductor patterns are between the dummy pillar and the substrate. The first and second gate dielectric patterns may be on the first and second semiconductor patterns, respectively. The second gate dielectric pattern may cover a whole top surface of the second semiconductor pattern.
US09362305B2	Vertically stacked nonvolatile NAND type flash memory device with U-shaped strings, method for operating the same, and method for fabricating the same A nonvolatile memory device includes a substrate including a plurality of active regions which are constituted by a P-type semiconductor; first and second vertical strings disposed over each active region, wherein each of the first and second strings includes a channel vertically extending from the substrate, a plurality of memory cells, and a select transistor, wherein the plurality of memory cells and the select transistor are located along the channel; and a bottom gate being interposed between a lowermost memory cell and the substrate, contacting the channel with a first gate dielectric layer interposed therebetween, and controlling connection of the first vertical string with the second vertical string.
US09362299B2	Method of fabricating a nonvolatile memory device with a vertical semiconductor pattern between vertical source lines A non-volatile memory device in accordance with one embodiment of the present invention includes a substrate including a P-type impurity-doped region, a channel structure comprising a plurality of interlayer insulating layers that are alternately stacked with a plurality of channel layers on the substrate, a P-type semiconductor pattern that contacts sidewalls of the plurality of channel layers, wherein a lower end of the P-type semiconductor pattern contacts the P-type impurity-doped region, and source lines that are disposed at both sides of the P-type semiconductor pattern and contact the sidewalls of the plurality of channel layers.
US09362296B2	Non-volatile memory semiconductor devices and method for making thereof The disclosed technology generally relates to memory devices, and more particularly to memory devices having an intergate dielectric stack comprising multiple high k dielectric materials. In one aspect, a planar non-volatile memory device comprises a hybrid floating gate structure separated from an inter-gate dielectric structure by a first interfacial layer which is designed to be electrically transparent so as not to affect the program saturation of the device. The inter-gate structure comprises a stack of three layers having a high-k/low-k/high-k configuration and the interfacial layer has a higher k-value than its adjacent high-k layer in the inter-gate dielectric structure. A method of making such a non-volatile memory device is also described.
US09362294B2	Semiconductor device including an electrode lower layer and an electrode upper layer and method of manufacturing semiconductor device The semiconductor device according to the present invention includes a ferroelectric film and an electrode stacked on the ferroelectric film. The electrode has a multilayer structure of an electrode lower layer in contact with the ferroelectric film and an electrode upper layer stacked on the electrode lower layer. The electrode upper layer is made of a conductive material having an etching selection ratio with respect to the materials for the ferroelectric film and the electrode lower layer. The upper surface of the electrode upper layer is planarized.
US09362291B1	Integrated circuit devices and methods An integrated circuit can include multiple SRAM cells, each including at least two pull-up transistors, at least two pull-down transistors, and at least two pass-gate transistors, each of the transistors having a gate; at least one of the pull-up transistors, the pull-down transistors, or the pass-gate transistors having a screening region a distance below the gate and separated from the gate by a semiconductor layer, the screening region having a concentration of screening region dopants, the concentration of screening region dopants being higher than a concentration of dopants in the semiconductor layer, the screening region providing an enhanced body coefficient for the pull-down transistors and the pass-gate transistors to increase the read static noise margin for the SRAM cell when a bias voltage is applied to the screening region; and a bias voltage network operable to apply one or more bias voltages to the multiple SRAM cells.
US09362288B2	Semiconductor device and manufacturing method thereof One semiconductor device includes an active region extending in a first direction, and first, second, and third semiconductor pillars which are provided upright relative to a main surface of the active region and disposed side by side in succession in the first direction; and between the first semiconductor pillar and the second semiconductor pillar, a first gate insulating film in contact with a side surface of the first semiconductor pillar, a first gate electrode in contact with the first gate insulating film, a second gate insulating film in contact with a side surface of the second semiconductor pillar, a second gate electrode in contact with the second gate insulating film, and a first embedded insulating film located between the first and second gate electrodes; and between the second and third semiconductor pillars, a second embedded insulating film in contact with the side surfaces of the second and third semiconductor pillars.
US09362284B2	Threshold voltage control for mixed-type non-planar semiconductor devices A range of lowest, low and regular threshold voltages are provided to three p-type devices and three n-type devices co-fabricated on a same substrate. For the p-type devices, the range is achieved for the lowest using an additional thick layer of a p-type work function metal in a gate structure and oxidizing it, the low Vt is achieved with the thick p-type work function metal alone, and the regular Vt is achieved with a thinner layer of the p-type work function metal. For the n-type devices, the lowest Vt is achieved by implanting tantalum nitride with arsenic, argon, silicon or germanium and not adding any of the additional p-type work function metal in the gate structure, the low Vt is achieved by not adding the additional p-type work function metal, and the regular Vt is achieved with a thinnest layer of the p-type work function metal.
US09362283B2	Gate structures for transistor devices for CMOS applications and products An integrated circuit product includes an NMOS transistor having a gate structure that includes an NMOS gate insulation layer, a first NMOS metal layer positioned on the NMOS gate insulation layer, an NMOS metal silicide material positioned above the first NMOS metal layer, and a layer of a second metal material positioned above and in contact with the NMOS gate insulation layer, the first NMOS metal layer, and the NMOS metal silicide layer. The PMOS transistor has a gate structure that includes a PMOS gate insulation layer, a first PMOS metal layer positioned on the PMOS gate insulation layer, a PMOS metal silicide material positioned above the first PMOS metal layer, and a layer of the second metal material positioned above and in contact with the PMOS gate insulation layer, the first PMOS metal layer, and the PMOS metal silicide layer.
US09362279B1	Contact formation for semiconductor device A method of contact formation and resulting structure is disclosed. The method includes providing a starting semiconductor structure, the structure including a semiconductor substrate with fins coupled to the substrate, a bottom portion of the fins being surrounded by a first dielectric layer, dummy gates covering a portion of each of the fins, spacers and a cap for each dummy gate, and a lined trench between the gates extending to and exposing the first dielectric layer. The method further includes creating an epitaxy barrier of hard mask material between adjacent fins in the trench, creating N and P type epitaxial material on the fins adjacent opposite sides of the barrier, and creating sacrificial semiconductor epitaxy over the N and P type epitaxial material, such that subsequent removal thereof can be done selective to the N and P type of epitaxial material. The resulting structure has replacement (conductive) gates, conductive material above the N and P type epitaxy, and a contact to the conductive material for each of N and P type epitaxy.
US09362270B2	High sheet resistor in CMOS flow An integrated circuit containing CMOS gates and a counterdoped polysilicon gate material resistor which has a body region that is implanted concurrently with the NSD layers of the NMOS transistors of the CMOS gates and concurrently with the PSD layers of the PMOS transistors of the CMOS gates, and has a resistor silicide block layer over the body region which is formed of separate material from the sidewall spacers on the CMOS gates. A process of forming an integrated circuit containing CMOS gates and a counterdoped polysilicon gate material resistor which implants the body region of the resistor concurrently with the NSD layers of the NMOS transistors of the CMOS gates and concurrently with the PSD layers of the PMOS transistors of the CMOS gates, and forms a resistor silicide block layer over the body region of separate material from the sidewall spacers on the CMOS gates.
US09362269B2	Resistor and metal-insulator-metal capacitor structure and method A passive circuit device incorporating a resistor and a capacitor and a method of forming the circuit device are disclosed. In an exemplary embodiment, the circuit device comprises a substrate and a passive device disposed on the substrate. The passive device includes a bottom plate disposed over the substrate, a top plate disposed over the bottom plate, a spacing dielectric disposed between the bottom plate and the top plate, a first contact and a second contact electrically coupled to the top plate, and a third contact electrically coupled to the bottom plate. The passive device is configured to provide a target capacitance and a first target resistance. The passive device may also include a second top plate disposed over the bottom plate and configured to provide a second target resistance, such that the second target resistance is different from the first target resistance.
US09362266B1	Electrostatic discharge protection device for differential signal devices A robust electrostatic (ESD) protection device is provided. In one example, the ESD protection device is configured to accommodate three nodes. When used with a differential signal device, the first and second nodes may be coupled with the differential signal device's BP and BM signal lines, respectively, and the third node may be coupled to a voltage source. This allows for a single ESD protection device to be used to protect the signal lines of the differential signal device, thus providing significant substrate area savings as compared to the conventional means of using three dual-node ESD protection devices to accomplish substantially the same protection mechanism. Moreover, the ESD protection device may be structurally designed to handle high voltage ESD events, as required by the FlexRay standard.
US09362265B2	Protection devices for precision mixed-signal electronic circuits and methods of forming the same Apparatus and methods for precision mixed-signal electronic circuit protection are provided. In one embodiment, an apparatus includes a p-well, an n-well, a poly-active diode structure, a p-type active region, and an n-type active region. The poly-active diode structure is formed over the n-well, the p-type active region is formed in the n-well on a first side of the poly-active diode structure, and the n-type active region is formed along a boundary of the p-well and the n-well on a second side of the poly-active diode structure. During a transient electrical event the apparatus is configured to provide conduction paths through and underneath the poly-active diode structure to facilitate injection of carriers in the n-type active region. The protection device can further include another poly-active diode structure formed over the p-well to further enhance carrier injection into the n-type active region.
US09362261B2	Power semiconductor module The purpose of the present invention is to reduce the wiring inductance of a power semiconductor module. It comprises a first power semiconductor device, a second power semiconductor device, a first conductor unit which is opposed to the first power semi conductor device, a second conductor unit which is opposed to the first conductor unit across the first power semiconductor device, a third conductor unit which is opposed to the second power semiconductor device, a fourth conductor unit which is opposed to the third conductor unit across the second power semiconductor device, a first intermediate conductor unit which extends from the first conductor unit, a second intermediate conductor unit which extends from the fourth conductor unit and, a positive electrode side first terminal, and a positive electrode side second terminal which project from the first intermediate conductor unit, and a negative electrode side first terminal and a negative electrode side second terminal which project from the second intermediate conductor unit. The negative electrode side first terminal is arranged in a position adjacent to the positive electrode side first terminal. The negative electrode side second terminal is arranged in a position adjacent to the positive electrode side second terminal.
US09362258B2	Optoelectronic component having chips and conversion elements An optoelectronic component includes a carrier, a first optoelectronic semiconductor chip arranged on the carrier, a first conversion element arranged on the first semiconductor chip, a second optoelectronic semiconductor chip arranged on the carrier and a second conversion element arranged on the second semiconductor chip. The optoelectronic component also includes an insulation material arranged on the carrier. The insulation material surrounds the first and second semiconductor chips and the first and second conversion element. The first conversion element is embodied in a stepped fashion and has a first and a second section wherein the first section projects laterally beyond the second section.
US09362246B2	Semiconductor device, method for manufacturing the same, circuit substrate, electro-optical apparatus, and electronic equipment A semiconductor device is provided with a plurality of protrusions which are made of a resin and which protrude higher than electrodes, and conductive layers which are electrically connected to the electrodes and which cover the top surfaces of the protrusions. A method for manufacturing the semiconductor device includes a step of applying a layer of the resin to the semiconductor device except for the electrodes, a step of patterning the conductive layers on the electrodes and the layer of the resin in accordance with the protrusions, and a step of removing the layer of the resin located between the conductive layers by the use of the patterned conductive layers as masks so as to form the protrusions.
US09362245B2	Package structure and fabrication method thereof A package structure is disclosed, which includes a substrate having a body, a plurality of conductive pads formed on the body and a surface passivation layer formed on the body and having a plurality of openings for exposing the conductive pads; a plurality of conductive vias formed in the openings of the surface passivation layer and electrically connected to the conductive pads; a plurality of circuits formed on the surface passivation layer and electrically connected to the conductive vias, wherein the circuits have a plurality of electrical contacts; at least a pattern portion formed on the surface passivation layer and intersecting with the circuits; and a second passivation layer formed on the surface passivation layer, the circuits and the pattern portion and having a plurality of openings for exposing portions of the electrical contacts of the circuits, thereby strengthening the bonding between the circuits and the passivation layers.
US09362244B2	Wire tail connector for a semiconductor device A memory device, and a method of making the memory device, are disclosed. The memory device is fabricated by mounting one or more semiconductor die on a substrate, and wire bonding the die to the substrate. The die and wire bonds are encapsuated, and the encapsulated device is singulated. The wire bonds are severed during the singulation step, and thereafter the severed wire bonds are connected to the substrate by external connectors on one or more surfaces of the molding compound.
US09362240B2	Electronic device An electronic device includes multiple semiconductor chips in a single housing. Such semiconductor chips may comprise different semiconductor materials, for example they may comprise GaN. Using bonding clips instead of bonding wires is an efficient way of connecting such semiconductor chips to a substrate.
US09362234B2	Shielded device packages having antennas and related fabrication methods Shielded device packages and related fabrication methods are provided. An exemplary device package includes one or more electrical components, a molding compound overlying the one or more electrical components, a conductive interconnect structure within the molding compound, a conductive frame structure laterally surrounding the one or more electrical components and the interconnect structure, and a shielding structure overlying the one or more electrical components. The shielding structure is electrically connected to the frame structure and at least a portion of the molding compound resides between the shielding structure and the one or more electrical components.
US09362228B2	Electro-migration enhancing method for self-forming barrier process in copper metalization A method of forming a barrier on both the sidewalls and bottom of a via and the resulting device are provided. Embodiments include forming a metal line in a substrate; forming a Si-based insulating layer over the metal line and the substrate; forming a via in the Si-based insulating layer down to the metal line; forming a dual-layer Mn/MnN on sidewalls and a bottom surface of the via; and filling the via with metal.
US09362227B2	Topological insulator in IC with multiple conductor paths A topological insulator is grown on an IC wafer in a vacuum chamber as a thin film interconnect between two circuits in the IC communicating with each other. As the TI is being grown, magnetic doping of the various TI sub-layers is varied to create different edge states in the stack of sub-layers. The sub-edges conduct in parallel with virtually zero power dissipation. Conventional metal electrodes are formed on the IC wafer that electrically contact the four corners of the TI layer (including the side edges) to electrically connect a first circuit to a second circuit via the TI interconnect. The TI interconnect thus forms two independent conducting paths between the two circuits, with each path being formed of a plurality of sub-edges. This allows bi-direction communications without collisions. Since each electrode contacts many sub-edges in parallel, the overall contact resistance is extremely low.
US09362226B2	Three-dimensional (3D) semiconductor devices and methods of fabricating 3D semiconductor devices A three-dimensional (3D) semiconductor device includes a stack of conductive layers spaced from each other in a vertical direction, the stack having a staircase-shaped section in a connection region, and ends of the conductive layers constituting treads of the staircase-shaped section, respectively. The 3D semiconductor device further includes buffer patterns disposed on and protruding above the respective ends of the conductive layers, an interconnection structure disposed above the stack and including conductive lines, and contact plugs extending vertically between the conductive lines and the buffer patterns and electrically connected to the conductive layers of the stack via the buffer patterns.
US09362225B2	Data storage device and methods of manufacturing the same Provided are data storage devices and methods of manufacturing the same. The device may include a plurality of cell selection parts formed in a substrate, a plate conductive pattern covering the cell selection parts and electrically connected to first terminals of the cell selection parts, a plurality of through-pillars penetrating the plate conductive pattern and insulated from the plate conductive pattern, and a plurality of data storage parts directly connected to the plurality of through-pillars, respectively. The data storage parts may be electrically connected to second terminals of the cell selection parts, respectively.
US09362222B2	Interconnection between inductor and metal-insulator-metal (MIM) capacitor Embodiments of mechanisms for forming a semiconductor device structure are provided. The semiconductor device structure includes a metal-insulator-metal (MIM) capacitor formed on a substrate. The semiconductor device structure also includes an inductor formed on the MIM capacitor. The semiconductor device structure further includes a via formed between the MIM capacitor and the inductor, and the via is formed in a plurality of dielectric layers, and the dielectric layers comprise an etch stop layer.
US09362221B2	Surface mountable power components According to an exemplary implementation, a power component includes a component substrate and a power semiconductor device electrically and mechanically coupled to the component substrate. The power component also includes at least one first peripheral contact and at least one second peripheral contact situated on the component substrate. A power semiconductor device is situated between the at least one first peripheral contact and the at least one second peripheral contact. The at least one first peripheral contact, the at least one second peripheral contact, and a surface electrode of the power semiconductor device are configured for surface mounting. The at least one first peripheral contact can be electrically coupled to the power semiconductor device.
US09362219B2	Semiconductor module and semiconductor device A heat sink has a fixation surface and a heat release surface opposite from the fixation surface. A fin is provided in a central portion of the heat release surface. An insulating member is provided on the fixation surface of the heat sink. An electroconductive member is provided on the insulating member. A semiconductor chip is provided on the electroconductive member. A metal frame is connected to the semiconductor chip. A molding resin covers the heat sink, the insulating member, the electroconductive member, the semiconductor chip, and the metal frame so that the fin is exposed to outside. A hole extends through a peripheral portion of the heat sink and a peripheral portion of the molding resin. The semiconductor module is mounted on a cooling jacket by passing a screw through the hole.
US09362217B2	Package on package structure and fabrication method thereof A method for fabricating a POP structure is disclosed. First, a first package is provided, which has: a dielectric layer; a stacked circuit layer embedded in the dielectric layer and exposed from upper and lower surfaces of the dielectric layer; a plurality of conductive posts and a semiconductor chip disposed on the upper surface of the dielectric layer and electrically connected to the stacked circuit layer; and an encapsulant formed on upper surface of the dielectric layer for encapsulating the semiconductor chip and the conductive posts and having a plurality of openings for exposing top ends of the conductive posts. Then, a second package is disposed on the encapsulant and electrically connected to the conductive posts. The formation of the conductive posts facilitates to reduce the depth of the openings of the encapsulant, thereby reducing the fabrication time and increasing the production efficiency and yield.
US09362215B2	Power quad flat no-lead (PQFN) semiconductor package with leadframe islands for multi-phase power inverter According to an exemplary implementation, a power quad flat no-lead (PQFN) package includes a U-phase output node situated on a first leadframe island of a leadframe, a V-phase output node situated on a second leadframe island of said leadframe, and a W-phase output node situated on a W-phase die pad of said leadframe. The first leadframe island can be on a first leadframe strip of the leadframe, where the first leadframe strip is connected to a U-phase die pad of the leadframe. The second leadframe island can be on a second leadframe strip of the leadframe, where the second leadframe strip is connected to a V-phase die pad of the leadframe. A first W-phase power switch is situated on the W-phase die pad. Furthermore, at least one wirebond is connected to the W-phase die pad and to a source of a second W-phase power switch. The W-phase die pad can be a W-phase output terminal of the PQFN package.
US09362214B2	Pre-encapsulated etching-then-plating lead frame structure with island and method for manufacturing the same A method for manufacturing a lead frame structure for semiconductor packaging. The method includes providing a metal substrate having a top surface and a back surface, forming a first photoresist film on the top surface of the metal substrate, forming a top surface etching pattern in the first photoresist film using photolithography, forming a second photoresist film on the back surface of the metal substrate, forming a back surface etching pattern in the second photoresist film using photolithography, performing an etching process on the top surface and the back surface of the metal substrate, removing the first photoresist film and the second photoresist film, placing the etched metal substrate in a mold, encapsulating the etched metal substrate using the mold; and performing a plating process on the encapsulated metal substrate.
US09362205B2	Circuit device A compact circuit device wherein a semiconductor element that performs high current switching is embedded is provided. A lead (30) and lead (28) though which high current passes are disposed superimposed on the upper surface of a circuit board (12). Also, a plurality of ceramic substrates (22A-22F) are affixed to the circuit board (12), and transistors, diodes, or resistors are mounted to the upper surface of the ceramic substrates. Furthermore, the circuit elements such as the transistors or diodes are connected to the lead (28) or the other lead (30) via fine metal wires.
US09362204B2	Tunable composite interposer A composite interposer can include a substrate element and a support element. The substrate element can have first and second opposite surfaces defining a thickness of 200 microns or less, and can have a plurality of contacts exposed at the first surface and electrically conductive structure extending through the thickness. The support element can have a body of at least one of dielectric or semiconductor material exposed at a second surface of the support element, openings extending through a thickness of the body, conductive vias extending within at least some of the openings in a direction of the thickness of the body, and terminals exposed at a first surface of the support element. The second surface of the support element can be united with the second surface of the substrate element. The terminals can be electrically connected with the contacts through the conductive vias and the electrically conductive structure.
US09362203B2	Staged via formation from both sides of chip A method of fabricating a semiconductor assembly can include providing a semiconductor element having a front surface, a rear surface, and a plurality of conductive pads, forming at least one hole extending at least through a respective one of the conductive pads by processing applied to the respective conductive pad from above the front surface, forming an opening extending from the rear surface at least partially through a thickness of the semiconductor element, such that the at least one hole and the opening meet at a location between the front and rear surfaces, and forming at least one conductive element exposed at the rear surface for electrical connection to an external device, the at least one conductive element extending within the at least one hole and at least into the opening, the conductive element being electrically connected with the respective conductive pad.
US09362197B2	Molded underfilling for package on package devices Presented herein are a package-on-package device having a molded underfill and a method for forming the same, the method comprising applying a package mount mounting a die to the first side of a carrier package. A molded underfill may be applied first side of the carrier package, and be in contact with a portion of the package mount a portion of a sidewall of the die. A top package having at least one land may be mounted to the first side of the carrier package above the die, and, optionally separated from the top of the die. The package mount may be coined prior to, during or after applying the molded underfill to optionally be level with the underfill surface. The underfill region contacting the package mount may be below or above the surface of the underfill region contacting the die sidewall.
US09362194B2	Semiconductor chip covered with sealing resin having a filler material A semiconductor device includes a wiring substrate, a sealing resin layer formed on the wiring substrate out of a filler-containing resin and having a one-sided filler content ratio, and at least one semiconductor chip mounted on the wiring substrate such that the semiconductor chip is located offset to be closer to an area where the filler content ratio is relatively low in the sealing resin layer and is sealed in its offset location in the sealing resin layer.
US09362193B2	Chip arrangement, a method for manufacturing a chip arrangement, integrated circuits and a method for manufacturing an integrated circuit A chip arrangement is provided, the chip arrangement, including a carrier; at least one chip electrically connected to a carrier top side; an encapsulation material at least partially surrounding the at least one chip and the carrier top side, wherein the encapsulation material is formed on one or more lateral sides of the carrier; and a ceramic material disposed on a carrier bottom side, and on at least one side of the encapsulation material.
US09362178B1	FinFET including varied fin height According to another embodiment, a semiconductor finFET device includes a semiconductor substrate. The finFET device further includes at least one first semiconductor fin on the semiconductor substrate. The first semiconductor fin comprises a first semiconductor portion extending to a first fin top to define a first height, and a first insulator portion interposed between the first semiconductor portion and the semiconductor substrate. A second semiconductor fin on the semiconductor substrate has a second semiconductor portion extending to a second fin top to define a second height, and a second insulator portion interposed between the second semiconductor portion and the semiconductor substrate, the second height being different from the first height.
US09362177B1	Nanowire semiconductor device A method for forming a nanowire device comprises forming a fin on a substrate, depositing a first layer of insulator material on the substrate, etching to remove portions of the first layer of insulator material to reduce a thickness of the first layer of insulator material, epitaxially growing a first layer of semiconductor material on exposed sidewall portions of the fin, depositing a second layer of insulator material on the first layer of insulator material, etching to remove portions of the second layer of insulator material to reduce a thickness of the second layer of insulator material, and etching to remove portions of the first layer of semiconductor material to expose portions of the fin and form a first nanowire and a second nanowire.
US09362175B2	Epitaxial growth of doped film for source and drain regions Embodiments of mechanisms for epitaxially growing one or more doped silicon-containing materials to form source and drain regions of finFET devices are provided in this disclosure. The dopants in the one or more doped silicon-containing materials can be driven into the neighboring lightly-doped-drain (LDD) regions by thermal anneal to dope the regions. The epitaxially growing process uses a cyclical deposition/deposition/etch (CDDE) process. In each cycle of the CDDE process, a first and a second doped materials are formed and a following etch removes most of the second doped material. The first doped material has a higher dopant concentration than the second material and is protected from the etching process by the second doped material. The CDDE process enables forming a highly doped silicon-containing material.
US09362172B2	Semiconductor devices having through-vias and methods for fabricating the same The inventive concept provides semiconductor devices having through-vias and methods for fabricating the same. The method may include forming a via-hole opened toward a top surface of a substrate and partially penetrating the substrate, forming a via-insulating layer having a first thickness on a bottom surface of the via-hole and a second thickness smaller than the first thickness on an inner sidewall of the via-hole, forming a through-via in the via-hole which the via-insulating layer is formed in, and recessing a bottom surface of the substrate to expose the through-via. Forming the via-insulating layer may include forming a flowable layer on the substrate, and converting the flowable layer into a first flowable chemical vapor deposition layer having the first thickness on the bottom surface of the via-hole.
US09362170B2	Dielectric liner for a self-aligned contact via structure At least one dielectric material layer having a top surface above the topmost surface of the gate electrode of a field effect transistor is formed. Active region contact via structures are formed through the at least one dielectric material layer to the source region and the drain region. A self-aligned gate contact cavity is formed over the gate electrode such that at least one sidewall of the gate contact cavity is a sidewall of the active region contact via structures. A dielectric spacer is formed at the periphery of the gate contact cavity by deposition of a dielectric liner and an anisotropic etch. A conductive material is deposited in the gate contact cavity and planarized to form a self-aligned gate contact via structure that is electrically isolated from the active region contact via structures by the dielectric spacer.
US09362166B2	Method of forming copper wiring A method of forming a copper wiring buried in a recess portion of a predetermined pattern formed in an interlayer insulation layer of a substrate is disclosed. The method includes: forming a manganese oxide film at least on a surface of the recess portion, the manganese oxide film serving as a self-aligned barrier film through reaction with the interlayer insulation layer; performing hydrogen radical treatment with respect to a surface of the manganese oxide film; placing a metal more active than ruthenium on the surface of the manganese oxide film after the hydrogen radical treatment; forming a ruthenium film on the surface where the metal more active than ruthenium is present; and forming a copper film on the ruthenium film by physical vapor deposition (PVD) to bury the copper film in the recess portion.
US09362164B2	Hybrid interconnect scheme and methods for forming the same A device includes a first low-k dielectric layer, and a copper-containing via in the first low-k dielectric layer. The device further includes a second low-k dielectric layer over the first low-k dielectric layer, and an aluminum-containing metal line over and electrically coupled to the copper-containing via. The aluminum-containing metal line is in the second low-k dielectric layer.
US09362159B2	Manufacturing method for display device A method of manufacturing a display device that includes: performing a surface treatment on at least one of two opposing surfaces of a carrier substrate and a mother substrate; bonding the carrier substrate and the mother substrate; performing a thin film formation process on the mother substrate; and separating the carrier substrate and the mother substrate. The thin film formation process includes a heat treatment operation, the surface treatment includes using an inorganic acid or an organic acid, and the surface treatment controls a content of —OH, —OH2+, and —O− groups of the at least one treated surface.
US09362158B2	OTP memory cell and fabricating method thereof A one-time programmable (OTP) memory cell is provided, which includes: a well of a first conductivity type; a gate insulating layer formed on the well and including first and second fuse regions; a gate electrode of a second conductivity type formed on the gate insulating layer, the second conductivity type being opposite in electric charge to the first conductivity type; a junction region of the second conductivity type formed in the well and arranged to surround the first and second fuse regions; and an isolation layer formed in the well between the first fuse region and the second fuse region.
US09362157B2	Method of processing substrate holder material as well as substrate holder processed by such method A method is provided of processing substrate holder material for a substrate holder on which on a first side of said substrate holder a semiconductor substrate is to be placed for layered deposition of various semiconductor materials on the semiconductor substrate using induction heating. The method includes the operations of determining a first electrical resistivity at at least one measuring position on said substrate holder material, comparing said first electrical resistivity with a second reference electrical resistivity and adapting said substrate holder material in correspondence with said comparison. Also a substrate holder is provided which is processes by such a method.
US09362156B2	Dicing tape-integrated film for semiconductor back surface The present invention provides a dicing tape-integrated film for semiconductor back surface, which includes: a dicing tape including a base material and a pressure-sensitive adhesive layer provided on the base material; and a film for flip chip type semiconductor back surface provided on the pressure-sensitive adhesive layer, in which the film for flip chip type semiconductor back surface contains a black pigment.
US09362155B2	Suppporting device, method for manufacturing thin film transistor array substrate and method for manufacturing liquid crystal display A supporting device includes a main body and a ring-shaped glue layer. The main body includes a top surface and a bottom surface opposite to the top surface. The top surface defines a first groove. The first groove is substantially ring-shaped. The glue layer is arranged in the top surface and surrounds the first groove. A plurality of glass-fits is distributed in the glue layer.
US09362154B2	Method for treatment of a temporarily bonded product wafer A method for treatment of a product wafer temporarily bonded on a carrier wafer with the following steps: grinding and/or backthinning of the product wafer on one flat side facing away from the carrier wafer to a product wafer thickness D of <150 μm, especially <100 μm, preferably <75 μm, even more preferably <50 μm, especially preferably <30 μm, surface treatment of the flat side with means for reducing an especially structural intrinsic stress of the product wafer.
US09362153B2	Method for aligning substrates in different spaces and having different sizes A method for aligning substrates in different spaces and having different sizes includes: capturing actual local images of two substrates; comparing specific marks in standard local feature regions of the two substrates, and obtaining specific marks in actual local feature regions of the two substrates; separately establishing actual coordinate systems of the two substrates to synthesize aligned assembly coordinate system; comparing coordinate values of the specific marks of the two substrates in the two actual coordinate systems to obtain first group of offsets, and comparing sizes of the two substrates to obtain a size difference; using the first group of offsets and the size difference to correct coordinate values of specific marks of one of the two substrates; comparing coordinate values of the specific marks of the two substrates, to obtain second group of offsets; and moving the one to a position compensated by the second group of offsets.
US09362152B2	Article supporting device Each of a pair of support members includes a lightweight-article support portion that is inserted into an insertion space of a lightweight article and supports a support-target portion of the lightweight article from below and a heavyweight-article support portion that is inserted into an insertion space of a heavyweight article and supports a support-target portion of the heavyweight article from below. The heavyweight-article support portion is formed to be thick in the vertical direction compared with the lightweight-article support portion. The lightweight-article support portion is provided at a position that is located in the insertion space of the heavyweight article when the heavyweight-article support portion is inserted into the insertion space of the heavyweight article, and formed integrally with the heavyweight-article support portion.
US09362143B2	Methods for forming semiconductor device packages with photoimageable dielectric adhesive material, and related semiconductor device packages Methods for forming semiconductor device packages include applying a photoimageable dielectric adhesive material to a major surface of a semiconductor die and at least partially over conductive elements on the semiconductor die. The photoimageable dielectric adhesive material may be removed from over the conductive elements. The conductive elements are aligned with and bonded to bond pads of a substrate, and the semiconductor die and the substrate are adhered with the photoimageable dielectric adhesive material. A semiconductor device package includes at least one semiconductor die including conductive structures thereon, a substrate including bond pads thereon that are physically and electrically connected to the conductive structures, and a developed photoimageable dielectric adhesive material disposed between the semiconductor die and the substrate around and between adjacent conductive structures.
US09362138B2	IC package and method for manufacturing the same An IC package is provided. The IC package comprises a leadframe comprising a metal strip (222) partially etched on a first side. The leadframe may be configured for an IC chip to be mounted thereon and for a plurality of bonding areas (218) to be electrically coupled to the leadframe and the IC chip. The IC chip, the bonding areas, and a portion of the metal leadframe are covered with an encapsulation compound, with a plurality of contact pads (206) protruding from the bottom surface of the leadframe. The bottom surface of the leadframe may be etched one or more times during the manufacturing process to reduce the depth of the undercutting. A method for manufacturing an IC package is also provided.
US09362137B2	Plasma treating apparatus, substrate treating method, and method of manufacturing a semiconductor device A substrate treating method may be performed by a plasma treating apparatus. The substrate treating method may include: providing a substrate on a platform in a lower portion of an inner space of a process chamber; directing a first process gas upward from a first nozzle formed at an inner wall of the process chamber into an upper portion of the inner space, the first process gas being an inert gas and wherein the first nozzle is an obliquely upward-oriented nozzle structured to direct the first process gas upward; directing a second process gas downward from a second nozzle formed at a inner wall of the process chamber into a lower portion of the inner space, the second process gas being hydrogen gas and wherein the second nozzle is an obliquely downward-oriented nozzle structured to direct the second process gas downward; and applying a microwave to the upper portion of the inner space to excite the first process gas and the second process gas into plasma, and then processing the substrate.
US09362136B2	Method of manufacturing semiconductor device In a manufacturing process of a transistor including an oxide semiconductor film, oxygen doping treatment is performed on the oxide semiconductor film, and then heat treatment is performed on the oxide semiconductor film and an aluminum oxide film provided over the oxide semiconductor film. Consequently, an oxide semiconductor film which includes a region containing more oxygen than a stoichiometric composition is formed. The transistor formed using the oxide semiconductor film can have high reliability because the amount of change in the threshold voltage of the transistor by a bias-temperature stress test (BT test) is reduced.
US09362135B2	Semiconductor device manufacturing method A semiconductor device manufacturing method, the method including: forming an insulation layer having a protruding portion, the insulation layer having a surface and a rising surface that protrudes upward from the surface, on a semiconductor substrate; forming a conductive layer to cover the insulation layer having the protruding portion; and removing a predetermined region of the conductive layer by patterning the predetermined region according to an etching process using microwave plasma, which uses a microwave as a plasma source, while applying bias power of 70 mW/cm2 or above on the semiconductor substrate, under a high pressure condition of 85 mTorr or above.
US09362134B2	Chip package and fabrication method thereof A fabrication method of a chip package includes the following steps. A wafer structure having a wafer and a protection layer is provided. The first opening of the wafer is aligned with and communicated with the second opening of the protection layer. A first insulating layer having a first thickness is formed on a conductive pad exposed from the second opening, and a second insulating layer having a second thickness is formed on a first sidewall of the protection layer surrounding the second opening and a second sidewall of the wafer surrounding the first opening. The first and second insulating layers are etched, such that the first insulating layer is completely removed, and the second thickness of the second insulating layer is reduced.
US09362129B2	Polishing apparatus and polishing method A polishing apparatus is used for polishing a surface of a substrate such as a semiconductor wafer to planarize the surface of the substrate. The polishing apparatus includes a polishing table having a polishing surface, and a top ring configured to hold a substrate with an outer circumferential edge of the substrate surrounded by a retainer ring and to press the substrate against the polishing surface. The top ring is movable between a polishing position above the polishing table, a position laterally of the polishing table, and a cleaning position. The polishing apparatus includes a cleaning unit disposed in the cleaning position and configured to eject a cleaning liquid toward the lower surface of the top ring, which is being rotated, thereby cleaning the substrate held by the top ring together with the lower surface of the top ring.
US09362127B2	Method for processing a workpiece by forming a pourous metal layer A method for processing a workpiece may include: providing a workpiece including a first region and a second region; forming a porous metal layer over the first region and the second region; wherein the first region and the second region are configured such that an adhesive force between the second region and the porous metal layer is lower than an adhesive force between the first region and the porous metal layer.
US09362123B2	Structure and method for integrated devices on different substartes with interfacial engineering The present disclosure provides one embodiment of a semiconductor structure. The semiconductor structure includes a semiconductor substrate having a first semiconductor material and a first reactivity; and a low reactivity capping layer of disposed on the semiconductor substrate, wherein the low reactivity capping layer includes a second semiconductor material and a second reactivity less than the first reactivity, the low reactivity capping layer includes silicon germanium Si1-xGex and x is less than about 30%.
US09362119B2	Methods for integrated circuit design and fabrication The present disclosure provides a method of patterning a target material layer over a semiconductor substrate. The method includes steps of: forming a plurality of first features over the target material layer using a first sub-layout, with each first feature having sidewalls; forming a plurality of spacer features, with each spacer feature conforming to the sidewalls of one of the first features and having a spacer width; and forming a plurality of second features over the target material layer using a second sub-layout. The method further includes steps of removing the plurality of spacer features from around each first feature and patterning the target material layer using the plurality of first features and the plurality of second features. Other methods and associated patterned semiconductor wafers are also provided herein.
US09362115B2	Nitride semiconductor wafer, nitride semiconductor element, and method for manufacturing nitride semiconductor wafer A nitride semiconductor wafer includes a silicon substrate, a first layer, a second layer, a third layer, a fourth layer, a fifth layer, and a sixth layer. The first layer is provided on the silicon substrate. The second layer is provided on the first layer. The third layer is provided on the second layer. The fourth layer is provided on the third layer. The fifth layer is provided on the fourth layer. The sixth layer is provided on the fifth layer. A composition ratio x4 of the fourth layer decreases in a first direction from the third layer toward the fifth layer. A maximum value of the composition ratio x4 is not more than a composition ratio of the third layer. A minimum value of the composition ratio x4 is not less than a composition ratio of the fifth layer.
US09362114B2	Epitaxial wafer and method of manufacturing the same A method of manufacturing an epitaxial wafer, including a silicon substrate having a surface sliced from single-crystalline silicon and a silicon epitaxial layer deposited on the surface of the silicon substrate, includes an oxygen concentration controlling heat treatment process in which a heat treatment of the epitaxial layer is performed under a non-oxidizing atmosphere after the epitaxial growth such that an oxygen concentration of the surface of the silicon epitaxial layer is set to 1.0×1017 to 12×1017 atoms/cm3 (ASTM F-121, 1979).
US09362112B2	p-Doped silicon layers The invention relates to a process for producing p-doped silicon layers, especially those silicon layers which are produced from liquid silane-containing formulations. The invention further relates to a substrate coated with a p-doped silicon layer. The invention additionally relates to the use of particular dopants based on boron compounds for p-doping of a silicon layer.
US09362111B2	Hermetic CVD-cap with improved step coverage in high aspect ratio structures Implementations described herein generally relate to methods for forming dielectric films in high aspect ratio features. In one implementation, a method for forming a silicon oxide layer is provided. A silicon-containing precursor gas is flown into a processing chamber having a substrate having a high aspect ratio feature disposed therein. Then a high frequency plasma is applied to the silicon-containing precursor gas to deposit a silicon-containing layer over the surface of the high aspect ratio feature. The processing chamber is purged to remove by-products from the silicon-containing layer deposition process. An oxygen-containing precursor gas is flown into the processing chamber. A high frequency plasma and a low frequency plasma are applied to the oxygen-containing precursor gas to form the silicon oxide layer.
US09362109B2	Deposition of boron and carbon containing materials Methods of depositing boron and carbon containing films are provided. In some embodiments, methods of depositing B,C films with desirable properties, such as conformality and etch rate, are provided. One or more boron and/or carbon containing precursors can be decomposed on a substrate at a temperature of less than about 400° C. In some embodiments methods of depositing silicon nitride films comprising B and C are provided. A silicon nitride film can be deposited by a deposition process including an ALD cycle that forms SiN and a CVD cycle that contributes B and C to the growing film.
US09362103B2	High pressure discharge lamp and lighting method thereof The present high-pressure discharge lamp is composed of an arc tube part having an internal space, a pair of tungsten electrodes disposed in opposition to each other within the internal space, and mercury and halogen encapsulated in the internal space. The halogen is excessively encapsulated into the internal space relatively to the capacity of the internal space so as to establish an appropriate halogen cycle when the mercury partially deposits without evaporating.
US09362096B2	Combustion pretreatment-isotope dilution mass spectrometry Provided is a combustion pretreatment-isotope dilution mass spectrometry measuring concentration of a target element for detection contained in a target sample for detection by using an isotope dilution mass spectrometry, including: pretreating the target sample for detection by combustion during an isotope dilution mass spectrometry, to thereby stabilize an isotope and further improve analysis ability, and therefore, the present invention is expected to be utilized as an element analysis method surpassing accuracy of the existing mass spectrometry method.
US09362095B1	Method and apparatus for transporting samples in a mass spectrometer A sample plate handling system for a time-of-flight mass spectrometer includes a transport chamber and a mass spectrometer chamber that is mechanically coupled to transport chamber. A two-dimensional translation stage is positioned in the mass spectrometer chamber. A sample plate transporter is mounted on the two-dimensional translation stage. A first portion of the sample plate transporter is mechanically attached to the two-dimensional translation stage. A second portion of the sample plate transporter defines a sample plate receiver that is positioned in the transport chamber. A sealing surface located between the first and the second portions connects the transport chamber and the mass spectrometer chamber. A motion of the two-dimensional translation stage in one direction aligns the sample plate transporter with the sealing orifice and a motion of the two-dimensional translation stage in the other direction moves the sealing surface of the sample plate transporter to engage the sealing orifice, thereby preventing gas flow between the mass spectrometer chamber and the transport chamber.
US09362093B2	Plasma enhanced chemical vapor deposition (PECVD) source One embodiment is directed to a plasma source comprising a body in which a cavity is formed and at least two self-contained magnetron assemblies disposed within the cavity. The magnetron assemblies are mutually electrically isolated from each other and from the body. In one implementation of such an embodiment, the self-contained magnetron assemblies comprise closed-drift magnetron assemblies. Other embodiments are disclosed.
US09362090B2	Plasma processing apparatus, plasma processing method, and storage medium A plasma processing apparatus that enables polymer to be removed from an electrically insulated electrode. A susceptor of the plasma processing apparatus is disposed in a substrate processing chamber having a processing space therein. A radio frequency power source is connected to the susceptor. An upper electrode plate is electrically insulated from a wall of the substrate processing chamber and from the susceptor. A DC power source is connected to the upper electrode plate. A controller of the plasma processing apparatus determines a value of a negative DC voltage to be applied to the upper electrode plate in accordance with processing conditions for RIE processing to be carried out.
US09362087B2	Charged particle beam apparatus The present invention provides apparatuses to inspect small particles on the surface of a sample such as wafer and mask. The apparatuses provide both high detection efficiency and high throughput by forming Dark-field BSE images. The apparatuses can additionally inspect physical and electrical defects on the sample surface by form SE images and Bright-field BSE images simultaneously. The apparatuses can be designed to do single-beam or even multiple single-beam inspection for achieving a high throughput.
US09362086B2	In-column detector for particle-optical column The invention relates to an in-column back-scattered electron detector, the detector placed in a combined electrostatic/magnetic objective lens for a SEM. The detector is formed as a charged particle sensitive surface, preferably a scintillator disk that acts as one of the electrode faces forming the electrostatic focusing field. The photons generated in the scintillator are detected by a photon detector, such as a photo-diode or a multi-pixel photon detector. The objective lens may be equipped with another electron detector for detecting secondary electrons that are kept closer to the axis. A light guide may be used to offer electrical insulation between the photon detector and the scintillator.
US09362085B2	Charged-particle beam lithographic system A charged-particle beam lithographic system (100) delineates a pattern on a substrate (2) by directing a charged-particle beam (L) at the substrate. The system (100) includes a substrate stage (10) on which the substrate (2) is disposed and a substrate cover (20). The cover (20) has a frame portion (22) that covers an outer peripheral portion of the substrate (2) as viewed within a plane. The frame portion (22) has a first part (22a) disposed on the stage (10) and a second part (22b) capable of being loaded and unloaded on and from the stage (10) by a transport portion (40). When the second part (22b) is loaded on the stage (10), it is electrically grounded.
US09362084B2	Electro-optical element for multiple beam alignment The invention relates to a charged particle system for processing a target surface with at least one charged particle beam. The system comprises an optical column with a beam generator module for generating a plurality of charged particle beams, a beam modulator module for switching on and off said plurality of beams and a beam projector module for projecting beams or subbeams on said target surface. The system further comprises a frame supporting each of said modules in a fixed position and alignment elements for aligning at least one of beams and/or subbeams with a downstream module element.
US09362082B2	Electron microscope and method of adjusting monochromator An electron microscope is offered which can facilitate adjusting a monochromator. The electron microscope (100) includes the monochromator (20) having an energy filter (22) for dispersing the beam (EB) according to energy and a slit plate (24) disposed on an energy dispersive plane. The slit plate (24) is provided with plural energy-selecting slits (25) which are different in width taken in a direction where the beam (EB) is dispersed. The microscope (100) further includes a lens system (30) on which the beam impinges after being monochromatized by the monochromator (20), a first measuring section (50) for measuring the intensity of the beam (EB) emitted from an electron beam source (10), a second measuring section (60) for measuring the intensity of the beam (EB) that has passed through an active one (25-L) of the energy-selecting slits (25), and a slit identifying portion (72) for identifying the active energy-selecting slit (25-L) from the plural energy-selecting slits (25) on the basis of the results of measurements made by the first and second measuring sections (50, 60).
US09362081B2	Source of X-rays generating a beam of nanometric size and imaging device comprising at least one such source A source of X-rays, and imaging device, and an imaging process are provided, including a source of electrons generating an electron beam of nanometric size and a target, the target being designed to send out an X-ray beam upon illumination by the electron beam, the target including one nanowire, for example made of silicon, and a nanowire catalyst, for example made of gold, covering the free end of the nanowire.
US09362080B2	Electron emission device and electron emission display An electron emission device includes a number of second electrodes intersected with a number of first electrodes to define a number of intersections. The first electrode includes a carbon nanotube layer and a semiconductor layer coated on the carbon nanotube layer. An insulating layer is sandwiched between the first electrode and the second electrode at each of the number of intersections, wherein the semiconductor layer is sandwiched between the insulating layer and the carbon nanotube layer.
US09362078B2	Ion source using field emitter array cathode and electromagnetic confinement An ion source for use in a radiation generator tube includes a back passive cathode electrode, a passive anode electrode downstream of the back passive cathode electrode, a magnet adjacent the anode, and a front passive cathode electrode downstream of the passive anode electrode. The front passive cathode electrode and the back passive cathode electrode define an ionization region therebetween. At least one field emitter array (FEA) cathode is configured to electrostatically discharge due to an electric field in the ion source. The back passive cathode electrode and the passive anode electrode, and the front passive cathode electrode and the passive anode electrode, have respective voltage differences therebetween, and the magnet generating a magnetic field, such that a Penning-type trap is produced to confine electrons from the electrostatic discharge to the ionization region. At least some of the electrons in the ionization region interact with an ionizable gas to create ions.
US09362071B2	Gas density monitoring system A circuit breaker monitoring system may monitor both at least one gas characteristic of a gas surrounding the circuit breaker and at least one fault arc energy characteristic. The monitored characteristics may be used to forecast maintenance events. The monitored characteristics may be used to control the operation of the circuit breaker.
US09362070B2	ARC extinguishing chamber for an electric protection apparatus and electric protection apparatus comprising same The present invention relates to an arc extinguishing chamber of an electric protection apparatus comprising an arc formation chamber containing a stationary contact and a movable contact which, when they separate, form an arc between them, said arc formation chamber communicating with the inlet of a second chamber, called arc extinguishing chamber. This chamber comprises a wall called balancing wall, substantially solid at least on its central part, said wall being located downstream from the arc extinguishing chamber and being formed and arranged with respect to the arc extinguishing chamber in such a way as to slow down the exhaust flow of the breaking gases on the side of the arc extinguishing chamber where the gases go first, and enhancing flow of the exhaust gases on the opposite side, the exhaust gases being stopped by the central part of the wall and escaping via the edges of the wall.
US09362069B1	Multi-command trigger switch A multi-command trigger switch includes a rotary switch, a rotary casing and a trigger element. The rotary switch includes a base and a rotary disc coupled with the base and movable on a swivel locus against the base. The base and the rotary disc are interposed by a housing space to hold a rotary trigger assembly and a depressing trigger assembly. The rotary trigger assembly outputs a first trigger signal while moving on the swivel locus. The depressing trigger assembly outputs a second trigger signal while moving on a vertical locus. The rotary casing and the rotary switch define a movement space therebetween to hold the trigger element. The base and the depressing trigger assembly confine movement of the depressing trigger assembly through a positioning notch and a confining rib. The depressing trigger assembly and the trigger element include confine the trigger element from rotating against the rotary casing.
US09362068B2	Switching arrangement and household appliance comprising such switching arrangement A switching arrangement for detection of displacement of a movable member (80, 62, 86) of a household appliance comprises: (a) a switch (76, 84) having an control element (78, 116) which is movable between a first position in which the switch assumes a first switching condition and at least one second position in which the switch assumes a second switching condition; and (b) an actuation member (68, 82) adapted for connection to said movable member (80, 62, 86) and having a cam surface engaging said control element (78, 116).
US09362060B2	Touch electrode device A touch electrode device includes a substrate, at least one electrode layer and a conductive ink pattern. The electrode layer is disposed above a surface of the substrate, and the electrode layer includes non-transparent conductive material. The conductive ink pattern is printed on two sides of a surface of the electrode layer.
US09362058B2	High safety vehicular capacitor The invention relates to a safety vehicle capacitor. It includes a box-shaped capacitor shell, lead-out electrode sheet, capacitor core accommodated inside capacitor shell and epoxy resin used to encapsulate the capacitor core. Said lead-out electrode sheet comprises of an inner connection end, an intermediate connection portion and outer connection, where the intermediate connection portion is in a shape of ‘n’ or ‘v’, one end of said intermediate connection portion being connecting to inner end of outer connection end horizontally, while the other end of intermediate connection portion being connected to up end of inner connection end with an angle; the inner wall of said capacitor shell is provided with inner mounting slot for the lead-out electrode sheet, and said inner connection end of said lead-out electrode sheet is inserted in to said inner mounting slot for fixing; the capacitor shell containing the inner mounting slot has a corresponding outer wall provided with a fixing pillar for the lead-out electrode sheet, and said outer connection end of the lead-out electrode sheet is fixed to the fixing pillar through a fixing element; said intermediate connection portion of the lead-out electrode sheet locates above the epoxy resin surface.
US09362053B2	Multilayer ceramic capacitor and method of manufacturing the same A multilayer ceramic capacitor includes a multilayer body including a plurality of stacked dielectric layers including a dielectric ceramic that includes a plurality of crystal grains and a plurality of internal electrodes disposed at a plurality of interfaces between the dielectric layers, and external electrodes. The multilayer body includes a Ba and Ti containing perovskite compound, La, Mg and Mn, and satisfies conditions such that in a case in which a content of Ti is set to 100 molar parts, a fraction of each content of La, Mg and Mn relative to the content of Ti is such that La is about 1.2 to about 6.0 molar parts, Mg is about 0.5 to about 5.0 molar parts and Mn is about 1.0 to about 3.0 molar parts, and an average number of crystal grains included in each of the dielectric layers in the stacking direction is one or more to three or less.
US09362044B1	Magnetic component with multiple pin row bobbin A magnetic component apparatus includes a bobbin having a bobbin body, a first pin rail, a second pin rail, and a longitudinal axis. First and second pin rows are located on the first pin rail. The second pin row is located at an exterior position from the first pin row. A third pin row is located on the second pin rail. The first, second, and third pin rows can be oriented in a direction transverse to the longitudinal axis. A plurality of windings can be located on the bobbin body. Some embodiments can include a fourth pin row located on the second pin rail, the fourth pin row located at an exterior position from the third pin row. In some embodiments one or more wire guide channels can be defined in the first or second pin rails to help keep breakout wires from the plurality of windings separate.
US09362039B2	Composition and method of application to reduce magnetostriction losses in encapsulated microelectronic components A buffer material protects a microelectronic device in space constrained environments, for improved efficiency with respect to magnetostrictive materials therein, and includes a gas filled polymer shell microsphere carried in an elastomeric polymer binder. Expanded Expancel microspheres being less than 20 microns in diameter form 80% of the composition by volume. The polymer binder is a low viscosity dimethyl silicone with a hardness of less than 25. Coating thicknesses may be based upon the overall expected dimensional changes of the encapsulation material, due to its coefficient of thermal expansion and an expected operating temperature range of the component, plus the expected shrinkage of that encapsulation material during polymerization and the overall mass which shall be exerting a force upon the magnetic core, plus the dimensional changes of the component as a result of the flux density resulting in magnetostriction of the magnetic core.
US09362036B2	Magnetic composite structures with high mechanical strength Magnetic fiber structures include a fiber and a plurality of permanent magnet particles carried by the fiber.
US09362035B2	NdFeB system sintered magnet A NdFeB system sintered magnet according to the present invention is a NdFeB system sintered magnet having a base material produced by orienting powder of a NdFeB system alloy and sintering the powder, with Dy and/or Tb (the “Dy and/or Tb” is hereinafter called RH) attached to and diffused from a surface of the base material through the grain boundary inside the base material by a grain boundary diffusion treatment, wherein the number of grain-boundary triple points at which the difference Ct−Cw between the RH content Ct (wt %) at the grain-boundary triple point and the RH content Cw (wt %) at a two-grain boundary portion leading to that grain-boundary triple point is equal to or smaller than 4 wt % is equal to or larger than 60% of the total number of grain-boundary triple points.
US09362031B2	Semiconductor ceramic composition and PTC thermistor A semiconductor ceramic composition which includes a compound represented by the following formula (1) as a main component, (Ba1-x-y-wBixAyREw)m(Ti1-zTMz)O3 (1) (wherein, A is at least one element selected from Na or K, RE is at least one element selected from the group consisting of Y, La, Ce, Pr, Nd, Sm, Gd, Dy and Er, TM is at least one element selected from the group consisting of V, Nb and Ta, w, x, y, z and m satisfy the following relationships of (2)˜(5), 0.007≦x≦0.125 (2), x
US09362029B2	Cable sealing device in a fuel dispenser A cable sealing device for sealing a cable passing through a first and second surface in a fuel dispenser can include a first sealing element extending in a first radial direction of the cable and configured to surround at least a portion of the cable and to seal an opening in the first surface, and a second sealing element extending in a second radial direction of the cable and configured to surround at least a portion of the cable and to seal an opening in the second surface. The extension of the first sealing element in the first radial direction is smaller than the extension of the second sealing element in the second radial direction.
US09362027B2	Method for making cable jacket with embedded shield A method for making a cable jacket that includes the steps of providing at least one shielding tape having a substrate formed of a substrate material, said substrate including at least one conductive segment; inserting the at least one shielding tape between first and second jacket layers of the cable jacket, each of said first and second jacket layers being formed of a jacket material; and co-extruding the at least one shielding tape with the first and second jacket layers, wherein the substrate material of the at least one shielding tape and the jacket material of the first and second jacket layers are the same such that during the co-extrusion step, the substrate and first and second jacket layers bond together into a single layer wherein the at least one conductive segment is embedded in the single layer.
US09362026B2	Oxide superconductor wire, connection structure thereof, and superconductor equipment An oxide superconductor wire including: a superconductor laminate including a tape-shaped substrate, an interlayer, an oxide superconductor layer, and a protection layer which are formed on the substrate; a metal stabilization layer covering the periphery of the superconductor laminate; a first electrically conductive joint material arranged between the superconductor laminate and the metal stabilization layer; and a sealing member formed from a metal foil, connected to a terminal of the superconductor laminate, and extending in the longitudinal direction of the superconductor laminate, wherein the metal stabilization layer includes an extension part formed so as to cover the periphery of the sealing member, and wherein the first electrically conductive joint material includes an extension part arranged between the extension part of the metal stabilization layer and the sealing member and formed so as to cover the periphery of the sealing member.
US09362024B2	High voltage transmission line cable based on textile composite material An electric transmission cable having a current conductive element comprising a braided core formed of a plurality of high modulus synthetic armored yarns, each yarn being of at least 53.6 tex and having a tensile strength of at least 200 cN/tex (centiNewton/tex), and the core being of a diameter in the range of 0.7 mm to 4.5 mm and being surrounded by a quartz sleeve covered on an outer surface thereof by a carbon layer.
US09362023B2	Edge insulation structure for electrical cable An edge insulated electrical cable including an electrical cable having opposing uppermost and lowermost surfaces and a conductive material near a longitudinal edge of the cable. The conductive material is susceptible to making electrical contact at the longitudinal edge. An edge insulation structure is applied to the electrical cable covering the edge and portions of the upper most and lowermost surfaces.
US09362021B2	Composite core conductors and method of making the same Electrical cables for the transmission of electricity between power poles or towers with at least one of a cooling feature and a fail safe feature and methods of producing the same.
US09362019B2	Electrical cable resistant to partial discharges An electrical cable having an elongate electrically conductive element (2) and at least one electrically insulating fluoropolymer layer (4) surrounding the electrically conductive element (2). The electrical cable is exempt from polyimide-containing layer between the electrically conductive element and the electrically insulating fluoropolymer layer.
US09362013B2	Tilting collimator, in particular for single-photon emission computed tomography A tilting collimator (4), in particular usable in the single photon emission computed tomography imaging technique, comprises: a plurality of side-by-side tubular structures (5), apt to form a matrix of tubular structures (5) on a two-dimensional space, each tubular structure (5) comprising at least a through hole; each tubular structure (5) being in contact with the tubular structures (5) adjacent thereto so as to be able to tilt only in presence of an equal tilting in the adjacent tubular structures (5); and retaining means, acting on the outer edges of said matrix, apt to move horizontally to determine the simultaneous tilting of all tubular structures (5) of the matrix, allowing a three-dimensional scanning of a gamma source by tilting progressively the single tubular structures (5) with great precision and in an extremely quick way.
US09362009B2	Cross-section reducing isotope system An isotope production target rod for a power generating nuclear reactor is provided. The isotope production target rod can include at least one rod central body including an outer shell that defines an internal cavity and a plurality of irradiation targets within the internal cavity. The irradiation targets can be positioned in a spatial arrangement utilizing a low nuclear cross-section separating medium to maintain the spatial arrangement.
US09362007B2	Semiconductor memory device A data transfer unit includes a first page buffer to latch data of a normal bit line connected to a normal memory cell, a second page buffer to latch data of a parity bit line connected to a parity memory cell, and a third page buffer to be first replaced when the first page buffer is defective or when the second page buffer 102c is defective. An error code correction bus is connected to the first and second page buffers, and a data bus is connected to the first, second and third page buffers.
US09362006B2	Timing-drift calibration The disclosed embodiments relate to components of a memory system that support timing-drift calibration. In specific embodiments, this memory system contains a memory device (or multiple devices) which includes a clock distribution circuit and an oscillator circuit which can generate a frequency, wherein a change in the frequency is indicative of a timing drift of the clock distribution circuit. The memory device also includes a measurement circuit which is configured to measure the frequency of the oscillator circuit. Additionally, the memory system contains a memory controller which can transmit a request to the memory device to trigger the memory device to measure the frequency of the oscillator circuit. The memory controller is also configured to receive the measured frequency from the memory device and uses the measured frequency to determine the timing drift in the memory device.
US09362005B2	Semiconductor device for parallel bit test and test method thereof A semiconductor device includes a plurality of memory chips and a plurality of signal selection units respectively corresponding to the plurality of memory chips, and suitable for commonly transferring test data signals from an external to a corresponding one of the plurality of memory chips during a common test mode, wherein one or more of the plurality of signal selection units may transfer the test data signals from the external to corresponding ones of the plurality of memory chips during an individual test mode, and wherein the semiconductor device may be set to the common test mode when a common test signal is enabled, and set to the individual test mode when both the common test signal and a test control signal are enabled.
US09362001B2	Memory cell capable of operating under low voltage conditions A memory cell includes a programming selection transistor, a following gate transistor, an antifuse element, and a reading circuit. A charging current formed by the antifuse element may trigger the reading circuit to form a stable read current during a reading operation of the memory cell so that the time for reading data from the memory cell can be shortened. A discharging process may be operated in the beginning of the reading operation of the memory cell so that the window of time for reading data from the memory cell can be widened.
US09361998B2	Semiconductor memory device and data writing method of the same A semiconductor memory device includes memory cells which are laminated on a semiconductor substrate and include charge storage layers and control gates, a plurality of word lines each of which is commonly connected to the control gates of a plurality of the memory cells, and a control unit which performs programming and verification of data in units of a page of memory cells. The control unit consecutively performs programming of data in two or more pages of memory cells connected to the same word line, and then consecutively performs verification of the data programmed in the two or more pages of memory cells connected to the same word line.
US09361997B2	Storage devices and methods of operating storage devices A method of operating a storage device may include receiving a read command and a read address, performing a read operation on selected memory cells corresponding to a selected string selection line and a selected word line based on the read address and performing a reliability verification read on unselected memory cells. Data read by the read operation may be output to an external device, and data read by the reliability verification read may be not output to the external device.
US09361991B1	Efficient scanning of nonvolatile memory blocks A method of searching for a boundary between a written portion and an unwritten portion of an open block may include performing a word line by word line binary search of a first physical area of the open block to identify a last written word line of the first physical area of the block, and subsequently, searching in at least a second physical area of the open block based on the last written word line of the first physical area of the block as identified by the binary search.
US09361989B1	Memory device and data erasing method thereof A memory device comprises a first memory string and a second memory string. The first memory string is coupled to a first bit line and a plurality of word lines, and the second memory string is coupled to a second bit line and the word lines. When an erasing voltage is applied to the word lines, a first voltage is applied to the first bit line to erase data stored in the first memory string, and a second voltage is applied to the second bit line to set the second memory string to be floating.
US09361983B2	Semiconductor device and method of refresh thereof The present invention relates to a semiconductor device, including memory blocks suitable for storing data, peripheral circuits suitable for refreshing the memory blocks, and a control circuit suitable for controlling the peripheral circuits to change data stored in a first memory block among the memory blocks and refresh the first memory block with changed data, and an operating method thereof.
US09361979B2	Apparatuses including cross point memory arrays and biasing schemes Memory devices comprise a plurality of memory cells, each memory cell including a memory element and a selection device. A plurality of first (e.g., row) address lines can be adjacent (e.g., under) a first side of at least some cells of the plurality. A plurality of second (e.g., column) address lines extend across the plurality of row address lines, each column address line being adjacent (e.g., over) a second, opposing side of at least some of the cells. Control circuitry can be configured to selectively apply a read voltage or a write voltage substantially simultaneously to the address lines. Systems including such memory devices and methods of accessing a plurality of cells at least substantially simultaneously are also disclosed.
US09361975B2	Sensing data in resistive switching memory devices Structures and methods of operating a resistive switching memory device are disclosed herein. In one embodiment, a resistive switching memory device can include: (i) a plurality of resistive memory cells, where each of the resistive switching memory cells is configured to be programmed to a low resistance state by application of a first voltage in a forward bias direction, and to be erased to a high resistance state by application of a second voltage in a reverse bias direction; and (ii) a sensing circuit coupled to at least one of the plurality of resistive memory cells, where the sensing circuit is configured to read a data state of the at least one resistive memory cell by application of a third voltage in the forward bias direction or the bias reverse direction.
US09361971B2	Semiconductor module A semiconductor module includes a wiring layer for data signal lines on which all data signal lines transferring a data signal are wired, a wiring layer for strobe signal lines on which all strobe signal lines transferring a strobe signal are wired in a plane connected to the wiring layer for data signal lines through vias passing through the wiring layer for data signal lines, and a chip delaying the data signal with respect to the strobe signal.
US09361969B2	Semiconductor device and method for driving the same A semiconductor device includes a periodic signal generating circuit for generating a periodic signal having a set period regardless of changes in temperature in response to a first trimming signal as a default value and controlling the set period of the periodic signal based on the temperature in response to a second trimming signal, and an internal circuit to perform a set operation in response to the periodic signal.
US09361968B2	Non-volatile random access memory power management using self-refresh commands For non-volatile random access memory (NVRAM) power management using self-refresh commands, a low-power module intercepts a memory self-refresh command and powers down an NVRAM in response to the memory self-refresh command. A resumption module intercepts a self-refresh exit command and powers up the NVRAM in response to the self-refresh exit command.
US09361966B2	Thyristors Some embodiments include thyristors having first and second electrode regions, first and second base regions, and material having a bandgap of at least 1.2 eV in at least one of the regions. The first base region is between the first electrode region and the second base region, and the second base region is between the second electrode region and the first base region. The first base region interfaces with the first electrode region at a first junction, and interfaces with the second base region at a second junction. The second base region interfaces with the second electrode region at a third junction. A gate is along the first base region, and in some embodiments does not overlap either of the first and second junctions. Some embodiments include methods of programming thyristors, and some embodiments include methods of forming thyristors.
US09361964B1	Boosted supply voltage generator for a memory device and method therefore A boosted supply voltage generator is selectively activated and deactivated to allow operations that are sensitive to variations on the boosted voltage to be performed with a stable boosted voltage. Techniques for deactivating and reactivating the voltage generator are also disclosed that enable more rapid recovery from deactivation such that subsequent operations can be commenced sooner. Such techniques include storing state information corresponding to the voltage generator when deactivated, where the stored state information is used when reactivating the voltage generator. Stored state information can include a state of a clock signal provided to the voltage generator.
US09361962B2	Solid-state quantum memory based on a nuclear spin coupled to an electronic spin A system comprising a solid state lattice containing an electronic spin coupled to a nuclear spin; an optical excitation configuration which is arranged to generate first optical radiation to excite the electronic spin to emit output optical radiation without decoupling the electronic and nuclear spins; wherein the optical excitation configuration is further arranged to generate second optical radiation of higher power than the first optical radiation to decouple the electronic spin from the nuclear spin thereby increasing coherence time of the nuclear spin; a first pulse source configured to generate radio frequency (RF) excitation pulse sequences to manipulate the nuclear spin and to dynamically decouple the nuclear spin from one or more spin impurities in the solid state lattice so as to further increase the coherence time of the nuclear spin; a second pulse source configured to generate microwave excitation pulse sequences to manipulate the electronic spin causing a change in intensity of the output optical radiation correlated with the electronic spin and with the nuclear spin via the coupling between the electronic spin and the nuclear spin; and a detector configured to detect the output optical radiation correlated with the electronic spin and the nuclear spin so as to detect a nuclear spin state of the nuclear spin.
US09361961B2	Memory device and memory system including the same A memory device may include a plurality of memory banks, a row control signal input unit suitable for receiving a plurality of row control signals, a column control signal input unit suitable for receiving a plurality of column control signals, a row control unit suitable for selecting a memory bank and a row in response to the row control signals, and controlling a row operation for the selected row, and a column control unit suitable for selecting a memory bank and column in response to the column control signals, and controlling a column operation for the selected column.
US09361958B2	Semiconductor device and method for operating the same A semiconductor device may include: a plurality of data pads; a plurality of data buffers each suitable for buffering a signal inputted through a first input node using a voltage inputted through a second input node, and outputting the buffered signal; and a calibration control unit suitable for generating a test signal in a calibration mode, adjusting the level of the test signal, receiving outputs of the plurality of data buffers while adjusting the level of the test signal, and adjusting offsets of the data buffers such that the logical values of the outputs of the data buffers transit when the test signal has a target level.
US09361956B2	Performing logical operations in a memory The described embodiments include a memory with a memory array and logic circuits. In these embodiments, logical operations are performed on data from the memory array by reading the data from the memory array, performing a logical operation on the data in the logic circuits, and writing the data back to the memory array. In these embodiments, the logic circuit is located in the memory so that the data read from the memory array need not be sent to another circuit (e.g., a processor coupled to the memory, etc.) to have the logical operation performed.
US09361955B2	Memory access methods and apparatus An example apparatus includes a row address register to store a row address corresponding to a row in a memory array. The example apparatus also includes a row decoder coupled to the row address register to assert a signal on a wordline of the row after the memory receives a column address. In addition, the example apparatus includes a column decoder to selectively activate a portion of the row based on the column address and the signal asserted on the wordline.
US09361953B2	Memory and memory system including the same A memory includes a first cell block comprising a plurality of first word lines and one or more first redundancy word lines for replacing at least one of the plurality of first word lines; a second cell block comprising a plurality of second word lines and one or more second redundancy word lines for replacing at least one of the plurality of second word lines; and a control unit suitable for sequentially receiving one or more input addresses, during a target refresh section, selecting one of the first cell block and the second cell block and a word line included in the selected cell block in response to a first input address, and activating one or more adjacent word lines adjacent to the selected word line, which is selected based on the first input address, when the selected word line is adjacent to the redundancy word line, wherein the adjacent word lines comprise the redundancy word line.
US09361948B2	Memory module and memory system A memory module is provided which includes a printed circuit board; first semiconductor packages provided on one surface of the printed circuit board; and second semiconductor packages provided on the other surface of the printed circuit board, the first semiconductor packages and the second semiconductor packages having semiconductor dies that form ranks. A number of the ranks formed by the first semiconductor packages being different from a number of the ranks formed by the second semiconductor packages. Semiconductor packages forming a same one of the ranks receive a chip selection signal in common and semiconductor packages forming other ranks receive a different chip selection signal.
US09361942B2	Playlist configuration and preview In some implementations, a user can play a music track from a dynamically generated playlist. The user can provide input indicating that the user likes or dislikes the music track and the playlist can be adjusted based on the user input. In some implementations, information can be presented to the user so that the user can preview changes to the playlist before the changes are made to the playlist. In some implementations, a user can adjust playlist criteria (configuration) by adjusting specific music characteristics. In some implementations, a user can adjust playlist criteria by manipulating a list of representative music tracks. In some implementations, a user can compare the user's playlist to playlists of other users.
US09361941B2	Method and systems for arranging a media object in a media timeline Methods and systems are described for arranging a media object in a media timeline. In one embodiment, a method includes presenting a graphical user interface including a media timeline for arranging a plurality of media objects in an order for presentation. The method includes receiving a selection of a portion of the media timeline representing a time period of presentation is received. The method also includes receiving a search term for association with the selected portion of the media timeline. The method further includes retrieving a media object according to a determination that the media object is related to the search term associated with the selected portion of the media timeline. The method still further includes arranging the retrieved media object in the selected portion of the media timeline for presentation during the represented time period.
US09361939B1	Data storage device characterizing geometry of magnetic transitions A data storage device is disclosed comprising a head and a disk comprising servo information and a reference pattern comprising a plurality of magnetic transitions. The servo information on the disk is processed to actuate the head over the disk, and a read signal is sampled from the head as the head moves across a width of the reference pattern at a substantially constant velocity to generate signal samples. The signal samples are processed to characterize a geometry of the magnetic transitions.
US09361934B2	Vehicle-mounted electronic device The present invention has an object to improve usability of a vehicle-mounted electronic device. The vehicle-mounted electronic device is configured to execute, when unauthorized content is detected by an unauthorized content detecting unit, an audio reproduction restriction on a display device, and when a volume change operation is executed during the audio reproduction restriction, to cause the display device to display a message indicating that the volume change operation has been executed during the audio reproduction restriction. More specifically, the displayed message indicates that the audio reproduction restriction associated with the unauthorized content reproduction is executed and the volume change operation is also executed during the execution. Therefore, the volume can be changed when next content is reproduced, resulting in preventing unexpected high-volume audio from being outputted and thus improving usability.
US09361931B2	Library apparatus with a locking and releasing shutter mechanism A library apparatus includes a shutter mechanism including a slide-type shutter configured to open and close the opening and an urging member configured to urge the shutter in a closing direction, and a first locking mechanism configured such that when the running body is stopped at a passing and receiving position of the cartridge, the first locking mechanism permits the shutter in a fully closed state to slide in an opening direction and enables a fully open state of the shutter to be maintained, whereas when the running body is not stopped at the passing and receiving position of the cartridge, the first locking mechanism releases the maintenance of the fully open state of the shutter and prohibits the shutter in the fully closed state from sliding in the opening direction.
US09361927B2	Optical pickup and optical recording and reproducing device An optical pickup includes a light source 1; a diffraction element 2 for generating a write main beam and a read sub-beam via diffraction; an objective lens 5; a wavelength plate 9; a polarization hologram element 7 having a plurality of diffraction regions with different diffraction characteristics, designed so that each diffraction region separates a light beam reflected from the optical storage medium and transmitted through the wavelength plate into a 0th order light beam and ±1st order light beams; an actuator 11; and a photodetector 10 configured to detect a light beam reflected from the optical storage medium 6 and diffracted by the polarization hologram element 7. The photodetector 10 generates an RF signal from a detection result concerning a 0th order light beam derived from the main beam, generates a focus error signal and a tracking error signal from a detection result concerning one of ±1st order light beams derived from the main beam, and generates a signal indicating that data has been recorded normally from a detection result concerning a 0th order light beam derived from the sub-beam.
US09361924B2	Magnetic recording medium and magnetic recording and reproducing apparatus A thermally-assisted magnetic recording medium or a microwave-assisted magnetic recording medium includes: an orientation control layer (104) that is formed on a substrate (101); an underlayer (10) that is formed on the orientation control layer (104); and a magnetic layer (108) that is formed on the underlayer (10) and contains an alloy having an L10 type crystal structure as a main component, in which the underlayer (10) includes an MgO underlayer (107) that contains MgO and has a (100) orientation and a nitride underlayer (106) that contains at least one nitride selected from the group consisting of TaN, NbN, and HfN and has a (100) orientation.
US09361920B1	Compensation for track misalignment due to degradation of HAMR write head An offset from track center of data is determined in a data storage device. The data is written to a heat-assisted magnetic recording medium of the device, and the offset compensates for degradation of an optical component of a read/write head when writing the data. The offset is stored in a memory of the storage device. Using the offset, a track alignment is changed during subsequent writes via the read/write head.
US09361916B1	Electrical lapping guide for dimensional control of back side of heat assisted magnetic recording device A slider bar apparatus, and a method for lapping a back side surface of the slider bar, is provided. The slider bar includes a head part and a pair of sliders separated by the head part. Each of the sliders has an air bearing surface (ABS) and a back side surface opposite the ABS. Each of the sliders has a reader element and a writer element of a magnetic head for use in a magnetic hard disk drive. An electrical lapping guide is mounted on the back side surface and has a pair of terminals and a conductive material extending between the terminals. The conductive material is arranged on the slider bar such that the resistance between the terminals increases during a lapping of the back side of the sliders.
US09361912B1	High moment side shield design for area density improvement of perpendicular magnetic recording (PMR) writer A PMR writer is disclosed wherein a hot seed layer (HS) made of a 19-24 kilogauss (kG) magnetic material is formed between a side gap and a 10-16 kG magnetic layer in the side shields, and between a 16-19 kG magnetic layer and the leading gap in the leading shield to improve Hy_grad and Hy_grad_x while maintaining write-ability. The HS is from 10 to 100 nm thick and has a first side facing the write pole with a height of ≦0.15 micron, and a second side facing a main pole flared side that may extend to a full side shield height of ≦0.5 micron. First and second sides may form a continuous curve or the a double tapered design where first and second sides have different angles with respect to a center plane. The side shield design described herein is especially beneficial for side gaps of 20-60 nm.
US09361910B2	Leads coupled to top and bottom reader stacks of a reader A reader includes top and bottom reader stacks that are offset relative to each other in a downtrack direction and disposed between a top shield and a bottom shield. Top side shields surround the top reader stack in a crosstrack direction, and bottom side shields surround the bottom reader stack in the crosstrack direction. A middle shield is between the top and bottom reader stacks and the top and bottom side shields. The middle shield includes a common electrical conductive path coupled to the top and bottom reader stacks. A middle lead is coupled to an edge of the middle shield.
US09361907B2	Sound signal processing apparatus, sound signal processing method, and program An apparatus including a direction estimation unit detecting one or more direction points indicating a sound source direction of a sound signal for each of blocks divided in a predetermined time unit, and a direction tracking unit connecting the direction points to each other between the blocks and detecting a section in which a sound is active.
US09361905B2	Voice data playback speed conversion method and voice data playback speed conversion device The present invention addresses the problems of enabling a process of converting voice data playback speed even in a voice data playback device alone. The solution is a voice data playback speed conversion method and a voice data playback speed conversion device, comprising: a step of setting a reference zero cross point from any arbitrary zero cross point; a step of selecting a zero cross point temporally after the reference zero cross point within a first predetermined time range; a step of calculating a reference correlation function in a waveform from the reference zero cross point until a second predetermined time; and a step of calculating a correlation function in a waveform from a plurality of previously selected zero cross points until the second predetermined time, wherein a second reference zero cross point is the zero cross point of the waveform having a correlation function in which a concordance rate of the correlation value between the reference correlation function and the correlation function is the highest value, the difference between the reference zero cross point and the second reference zero cross point is calculated as a basic cycle, and the expansion and contraction of voice data is executed in basic cycle units so as to perform a process of converting the playback speed of the voice data.
US09361897B2	Device and method for encoding and decoding multichannel signal Provided is an apparatus and method for converting a 10.2 channel signal into a multi-channel signal having a relatively few number of channels, thereby encoding and decoding the 10.2 channel signal. An apparatus for encoding/decoding a multi-channel signal may include a multi-channel signal converter to convert a first multi-channel signal into a second multi-channel signal having a fewer number of channels when compared to the first multi-channel signal, a remaining signal generator to generate a remaining signal using a difference between the first multi-channel signal and the second multi-channel signal, and an encoder to encode the second multi-channel signal and the remaining signal.
US09361887B1	System and method for providing words or phrases to be uttered by members of a crowd and processing the utterances in crowd-sourced campaigns to facilitate speech analysis Systems and methods of providing text related to utterances, and gathering voice data in response to the text are provide herein. In various implementations, an identification token that identifies a first file for a voice data collection campaign, and a second file for a session script may be received from a natural language processing training device. The first file and the second file may be used to configure the mobile application to display a sequence of screens, each of the sequence of screens containing text of at least one utterance specified in the voice data collection campaign. Voice data may be received from the natural language processing training device in response to user interaction with the text of the at least one utterance. The voice data and the text may be stored in a transcription library.
US09361886B2	Providing text input using speech data and non-speech data Systems, methods, and computer readable media providing a speech input interface. The interface can receive speech input and non-speech input from a user through a user interface. The speech input can be converted to text data and the text data can be combined with the non-speech input for presentation to a user.
US09361884B2	Communicating context across different components of multi-modal dialog applications A human-machine dialog system is described which has multiple computer-implemented dialog components. A user client delivers output prompts to a human user and receives dialog inputs including speech inputs from the human user. An automatic speech recognition (ASR) engine processes the speech inputs to determine corresponding sequences of representative text words. A natural language understanding (NLU) engine processes the text words to determine corresponding semantic interpretations. A dialog manager (DM) generates the output prompts and responds to the semantic interpretations so as to manage a dialog process with the human user. The dialog components share context information with each other using a common context sharing mechanism such that the operation of each dialog component reflects available context information.
US09361879B2	Word spotting false alarm phrases In one aspect, a method for processing media includes accepting a query. One or more language patterns are identified that are similar to the query. A putative instance of the query is located in the media. The putative instance is associated with a corresponding location in the media. The media in a vicinity of the putative instance is compared to the identified language patterns and data characterizing the putative instance of the query is provided according to the comparing of the media to the language patterns, for example, as a score for the putative instance that is determined according to the comparing of the media to the language patterns.
US09361878B2	Computer-readable medium, system and method of providing domain-specific information A computer readable storage medium embodies instructions that, when executed by a processor, cause the processor to perform a method including receiving a natural language request corresponding to an audio input associated with a user. The computer-readable storage medium further embodies instructions that, when executed, cause the processor to retrieve account information associated with the user from a domain-specific data source through a network based on the natural language request using an application configurable retrieve account data from selected ones of a plurality of domain-specific data sources, process the account information based on the natural language request to produce output information, and provide the output information to an output interface.
US09361877B2	Ultrasonic communication system for communication through RF-impervious enclosures and abutted structures An ultrasonic communication system comprising an enclosure, a first module and a second module is described. The enclosure has an internal surface, an external surface, and defines at least one metal channel. The first module comprises an ultrasonic transceiver disposed within the enclosure. The first module is positioned on the internal surface of the enclosure and is capable of transmitting and/or receiving modulated ultrasonic waves via the metal channel. The second module is positioned on the external surface of the enclosure and is adapted to transmit and/or receive modulated ultrasonic waves from the first module via the metal channel.
US09361872B2	Systems, methods, apparatus, and computer-readable media for adaptive active noise cancellation An adaptive active noise cancellation apparatus performs a filtering operation in a first digital domain and performs adaptation of the filtering operation in a second digital domain.
US09361871B1	Whistle with non-spherical pea A whistle that includes a pea formed of two semi-spheres coupled together to form a non-spherical shape. The non-spherical shape results in unpredictable movement of the pea in a chamber of the whistle so as to produce a trill. An interior surface of the chamber may include flat portions that further cause unpredictable movement of the pea to produce the trill.
US09361870B2	Electronic musical instruments Electronic musical instruments as disclosed, include sensors to digitize and alter the sound using FSR sensors in the mouthpieces and other elements of the instrument to mimic the variations available in analog instruments.
US09361869B2	Generative scheduling method A method for providing one or more outputs at one or more respective time instants is provided. The method comprises generating a data object executable to provide an output, placing the object in a position in a sequence, and executing the object at said position in said sequence to provide said output. Each position in the sequence represents a time instant.
US09361867B2	Detachable shaker A hand-held percussive shaker assembly comprising two identical shakers capable of producing different percussive sounds and rhythms in a single assembly is disclosed. The shakers are detachably connected by an integrally formed lock assembly. The shakers may be played as a single assembly or detached and played individually. Each shaker comprises one or more bottles filled with a striker material. Each bottle isolates its striker material from the striker material in other bottles and from any other part of the shaker. The shakers may produce the same or different tones when the shaker assembly is moved.
US09361866B2	Drum stand Provided is a drum stand that includes a first pipe holding a percussion instrument, a second pipe to which the first pipe is connected, and a leg member supporting the second pipe on a floor surface. The first pipe is slidable along an axial direction of the second pipe. A lower end of the second pipe is in contact with the floor surface. The leg member is in contact with the floor surface on one side in a horizontal direction relative to the lower end of the second pipe and supports the second pipe in a state that an upper end of the second pipe is on the one side in the horizontal direction relative to the lower end of the second pipe.
US09361864B2	Flatpick device Methods, systems, and apparatus for a flatpick device is in the present application. The flatpick device includes a front face and a back face, the flatpick includes first and second bores through the flatpick extending from the front face to the back face. Also included is a band with a first distal end and a second distal end, the first distal end extending from the front face to the back face through a first bore and the second distal end extending from the front fact to the back face though the second bore.
US09361863B1	Capo for raised stringed instruments Method and apparatus for a capo for a raised string instrument. The capo has a base having a channel on its upper side for receiving a slidable wedge arm therein which slidable wedge arm has an upper sloped surface thereon. A cap disposed on an upper end of a lift pin rides on the upper sloped surface of the slidable wedge arm so that the cap and lift pin along with a string tension rod connected to the lift pin are raised or lowered as the wedge arm is moved along the channel. The action of the string tension rod being raised secures the strings between the string tension rod and the bottom of the base. Also, cushion tubes are installed on each end of the tension rod to assist in compressing the strings against the bottom of the base.
US09361862B2	Passive amplification system for stringed instruments A passive amplifier for a stringed instrument (such as an electric guitar) comprises a pickup and a resonator. The pickup is removably attached at one end to the headstock of the stringed instrument and extends substantially normal to the headstock. The resonator is attached to the other end of the pickup. The resonator has a generally flared structure. An aperture in the pickup extends from one end to the other end.
US09361860B2	Display apparatus, image post-processing apparatus and method for image post-processing of contents A display apparatus for post-processing the image of the contents, an image post-processor and a method for post-processing the image of the contents are disclosed. The display apparatus includes a communicator which communicates with a server, a display which displays contents received from the server, and a controller which determines an image post-processing method for elements of the contents based on source information of the contents and predetermined condition information, renders the elements which are post-processed according to the determined image post-processing method, and controls the display to display the contents generated after the rendering. Accordingly, the display apparatus can selectively implement image post-processing for the elements of the contents.
US09361852B2	Media reproduction device A media reproduction device that compresses and decompresses images for display on the media reproduction device.
US09361848B2	Apparatus and method for driving liquid crystal display device having data driver with temperature detector Discussed are an apparatus and method for driving a liquid crystal display device, whereby the apparatus includes a data driver for driving data lines of a liquid crystal panel, setting detectable temperatures for different temperature detection time points, detecting an ambient temperature at each temperature detection time point, and outputting a gate drive voltage variation signal and a common voltage variation signal in accordance with the set and detected temperatures at each temperature detection time point, and a power supplier for varying levels of a gate drive voltage and a common voltage in accordance with the gate drive voltage variation signal and the common voltage variation signal, and supplying the gate drive voltage and common voltage to a gate driver and the liquid crystal panel, respectively.
US09361845B2	Display device compensating clock signal with temperature A display device for improving display quality includes a pulse compensator, a gate driver, a source driver and a display panel. The pulse compensator generates a clock signal of which amplitude decreases when peripheral temperature increases and increases when peripheral temperature decreases. The gate driver outputs a gate driving signal to the display panel based on the clock signal, wherein an amplitude of the gate driving signal decreases when the peripheral temperature increases and the amplitude of the gate driving signal increases when the peripheral temperature decreases. The source driver provides a gray-scale voltage based on gray-scale data, and the display panel displays an image corresponding to the gray-scale voltage in response to the gate driving signal. Therefore, the deterioration in the drive capability of the gate driver depending on the peripheral temperature may be prevented and display quality of the display device may be improved.
US09361841B2	Pixel and display device A pixel unit and a display device are proposed. The pixel unit includes a primary subpixel, a white subpixel, a display data line, a display scanning line, a common line and a mode scanning line. When the display device is in a 2D display mode, the white subpixel appears bright under the control of the display mode signal. Ehen the display device is in a 3D display mode, the white subpixel appears dark under the control of the display mode signal. Owing to the design of the present invention, power which the convention pixel and display device consumes is obviously reduced. Besides, crosstalk occurring in the conventional display device is successfully solved.
US09361840B2	Display device Provided is a display device, including: a drive circuit for inputting input signals generated based on video signals corresponding to at least red, green, and blue input from an exterior thereof; and a substrate including a plurality of connection wiring lines and a plurality of signal lines formed thereon, the plurality of connection wiring lines being connected to the drive circuit, the plurality of signal lines being provided in a display region, to which output signals output from the drive circuit are input through the plurality of connection wiring lines. The plurality of connection wiring lines supplied with the output signals corresponding to the respective colors are formed in layers different from each other corresponding to the respective colors on the substrate.
US09361839B2	Double-vision display device and method for driving the same Embodiments of the present invention provide a double-vision display device comprising a display panel and a grating, wherein the display panel includes a plurality of sub-pixels, and, the grating includes light shading regions and light transmittance regions alternately arranged in a first direction. A distance between midlines of two adjacent ones of the light transmittance regions in each row of the light transmittance regions along the first direction is at least four times as large as a length of one of the sub-pixels along the first direction. Meanwhile, embodiments of the present invention also provide a method for driving the abovementioned double-vision display device. With the abovementioned double-vision display device and the method for driving the same, the double-vision display function is guaranteed while allowing a greater distance between a plane where the grating is located and a plane where the sub-pixels are located.
US09361834B2	Method and apparatus for adjusting the brightness of a display and a display system The present application relates to a method and apparatus for adjusting the brightness of a display, and a display system. The method for adjusting the brightness of a display comprises: acquiring a brightness adjusting signal, wherein the brightness adjusting signal includes a position value indicative of a desired brightness of the display; comparing the position value with a first threshold, wherein an adjusting scale is defined according to a variable range of transparency of an object displayed on the display if the position value is smaller than the first threshold; generating a brightness value of the object according to the position of the position value in the adjusting scale; and applying the brightness value to the object displayed on the display. The method can adjust the transparency of the displayed object through the graphical system in an electronic device, thereby further lowering the brightness of the display.
US09361829B2	Display apparatus, method of driving a display, and electronic device In a display apparatus including a switching transistor, a correction voltage for eliminating an effect of a variation in a characteristic of a driving transistor is stored in a storage capacitor. The switching transistor is disposed between one current terminal of the driving transistor and a light emitting element. The switching transistor turns off during the non-light emission period thereby to electrically disconnect the light emitting element from the one current terminal of the driving transistor thereby preventing a leakage current from flowing through the light emitting element during the period in which the correction unit operates, and thus preventing the correction voltage from having an error due to the leakage current.
US09361824B2	Graphics display systems and methods A graphics display system is provided with a graphics processing module and a display module. The graphics processing module detects whether first frame data is equal to second frame data subsequent to the first frame data, and in response to the first frame data being equal to the second frame data, stops outputting any frame data after outputting the second frame data and a mode switching command. The display module displays graphic images according to the first frame data, and stores the second frame data as temporary data and continuingly displays the graphic images according to the temporary data in response to the mode switching command.
US09361815B1	Flag attachment and method An attachment and method of use is described for securing flags, banners and the like to flag poles. The attachment includes a ring having a rotatable pin which fits within a conventional flag grommet. A ring retainer is used to maintain the ring at a selected location along the flag pole. In order for the attachment to work with flag poles having different diameters, a ring retainer spacer and ring spacer are available for easy use during assembly. The attachment allows ease in repositioning the flag along the pole as desired.
US09361813B1	Recessed luminaire installation with minimal disturbance of ceiling aesthetics A recessed lighting device includes an electrical component housing that has a cavity. The recessed lighting device also includes a plaster ring that includes a plaster plate that has an opening therethrough. The plaster ring also includes a body extending substantially orthogonally from a perimeter of the opening towards the electrical component housing. The recessed lighting device further includes an illuminated panel that includes an electrical component assembly inserted through the opening and into the cavity, where the electrical component assembly is positioned within the electrical component housing.
US09361812B2	Modular storage component A system including a first component configured to be attached to a vertical surface, the first component including at least a pair of protrusions coupled thereto with a spacing therebetween. The system further includes a second component including a pair of hang tags coupled thereto. Each hang tag has an opening therethrough with a spacing therebetween. The spacing between the openings of said hang tags generally corresponds to the spacing between the pair of protrusions such that each protrusion is receivable through the opening of an associated one of the hang tags to removably couple the second component to the first component. Each hang tag is generally flat and planar and is movable in a direction generally parallel to a plane of the associated hang tag.
US09361809B1	Tracking system The present system and method related to simulating medical procedures. The system and method comprise a body cavity simulator and at least one camera. The body cavity simulator comprises a channel having a proximal end, a distal end, and an inner longitudinal passage extending between the proximal end and the distal end. The channel is partially made of a material comprised of one of the following: a transparent material, a translucent material, a semi-transparent material. The channel receives at least one simulated medical instrument through the proximal end. The at least one camera is adapted for capturing through the material of the channel a pattern of a tracking device of the at least one simulated medical instrument inserted in the channel. The camera transmits data corresponding to the captured pattern of the tracking device to a processing unit.
US09361808B1	Tracking system The present simulated medical instrument is adapted for insertion in a channel of a body cavity simulator. The present simulated medical instrument comprises a tube and at least one tracking device. The tube comprises a proximal end and a distal end. The tube is sized and shaped for insertion in the channel of the body cavity simulator. The at least one tracking device is located in proximity of the distal end of the tube, the tracking device having a pattern detectable via camera.
US09361806B2	Comprehension normalization The Comprehension Normalization Method of the present disclosure exploits the differences in the meanings of words or ideas between Big Data sets to build insight. When the comprehension normalization method is performed between two big data sets, both data sets take turns rephrasing the material of the other data set in their own language of understanding. The act of rephrasing a foreign idea connects the data within the set doing the rephrasing in a way it had not been connected before. After two sets take turns rephrasing the data within, both sets will become more connected than ever before and more insightful to the researcher.
US09361805B2	Method and system for page detection using light attenuators A system for page detection using light attenuators is applied in a book to detect an opened page of the book. The book has N pages and each page has a page detection area in which at most M light attenuators are installed in each page detection area. A light source passes through the at most M light attenuators for attenuating intensity of the light source. M light sensing devices are installed in an area of the book that corresponds to the page detection area. The M light sensing devices are used to detect attenuated intensities of the light source. A controller is connected to the M light sensing devices for detecting the opened page based on a ratio of the intensities of the light source detected by the M light sensing devices on each page.
US09361802B2	Vehicle ad hoc network (VANET) Mesh node modules are associated with vehicles and companion nodes can dynamically form a mesh network which uploads location information of the nodes and in some cases additional information, e.g., road condition or proximity to objects.
US09361801B2	Apparatus for measuring vehicle queue length, method for measuring vehicle queue length, and computer-readable recording medium storing computer program for measuring vehicle queue length An apparatus includes: a processor that executed a procedure, the procedure including: detecting a moving vehicle as the moving vehicle approaches a vehicle queue based on a signal from a sensor, acquiring a position and a speed of the moving vehicle based on the signal, calculating a stop position of the moving vehicle based on a change in the position and the speed of the moving vehicle, and calculating a length of the vehicle queue based on the stop position of the moving vehicle.
US09361799B2	Detecting traffic Devices and methods for detecting traffic objects. Radiated energy is captured at a detection device, wherein the radiated energy is radiated from traffic objects. Data associated with the radiated energy is generated. The data associated with the radiated energy is transmitted using a communication device.
US09361798B2	Vehicle classification system and method Approaches for classifying vehicles include generating a signal waveform from a signal in a single inductive loop generated by a passing vehicle. The signal waveform is compared to a first plurality of model waveforms. Each model waveform is associated with a respective class of vehicle. A first model waveform of the first plurality of model waveforms that matches the signal waveform is determined, and data indicating the respective class of vehicle associated with the first model waveform is output.
US09361797B1	Detecting road condition changes from probe data Systems, methods, and apparatuses are disclosed for identifying anomalies or changes in road conditions on a roadway location. An initial low rank data matrix of initial vehicle probe data at a plurality of different times for a roadway location is provided, where the initial low rank data matrix represents a baseline of road conditions for the roadway location. A plurality of additional vehicle probe data from at least one vehicle at the roadway location is received. The additional vehicle probe data is added to the initial vehicle probe data of the initial low rank data matrix. The updated data matrix with the compiled probe data is decomposed into a low rank data matrix and a sparse data matrix. A change at the roadway location is identified based on the probe data in the sparse data matrix.
US09361784B1	Emergency app The primary objective of the invention is to provide a computer-implemented method for sending one or more alerts from a mobile alerting system stored in the non-transitory storage medium of an electronic device like mobile phones or smart phones etc. In one embodiment of the invention, the method of sending one or more alerts from a mobile alerting system stored in the non-transitory storage medium comprises of a centralized server and a plurality of mobile devices. Further in the same embodiment of the invention, the processor in the centralized server computes a plurality of instructions stored in the memory of the centralized server. Furthermore, the centralized server receives a primary alert initiation request comprising metadata generated from the primary mobile device, wherein the centralized server extracts the metadata of the alert. The alert is further delivered to a plurality of secondary mobile devices capable of telecommunication.
US09361781B2	Method and system for detecting a state of a golf club A method for detecting a lost club includes detecting an orientation characteristic of a golf club with a detection unit, transmitting the orientation characteristic from the detection unit to a mobile device, determining a distance between the golf club and the mobile device based on a signal transmitted from the detection unit to the mobile device and determining a lost club state based on the orientation characteristic of the golf club and the distance between the golf club and the mobile device.
US09361770B2	Electrical device current flow indicator An electric current flow indicator senses electrical current flowing through an electrical device and produces a visible feedback to indicate proper operation. The current flow indicator has a voltage and current regulation circuit having first and second inputs connected to first and second conductors, respectively. The circuit converts an AC line voltage carried by an electrical supply cord into a limited low voltage DC current. A toroidal core inductor coil and at least one current indicating LED are connected to the circuit. The first conductor passes through a center of the inductor coil. A transistor amplifier is connected to an output of the inductor coil for energizing the current indicating LED when an electrical current conducts through the first conductor. The flow indicator can be integrated into an electrical supply cord, a male or female electrical cord end, a single or duplex electrical outlet, or a universal plugin adapter.
US09361768B2	Information gauge with analog backup An information gauge apparatus and method for providing both visual and audio readings of pressure within a pressure vessel. The information gauge apparatus includes a digital display coupled to a printed circuit board in communication with a pressure sensor. The digital display illustrates indicia relating gas pressure levels provided by the pressure sensor to the printed circuit board during use. The gauge further comprises an audible indicator coupled to the printed circuit board, the audible indicator provides an audible signal relating to gas pressure levels sensed by the pressure sensor to the printed circuit board during use. The gauge also includes a mechanical sensor providing a mechanically sensed reading value to a visual indicia display on the information gauge apparatus relating to gas pressure levels during use.
US09361766B2	Wagering game with community event poker game A gaming system for conducting a wagering game includes a display for displaying a base game of the wagering game in response to receiving a wager input from a player and a controller coupled to the display. The controller is programmed to randomly increment during game play a bonus-time eligibility counter for a community bonus game, decrement the bonus-time eligibility counter as real time progresses, and render a player eligible to play the community bonus game if the bonus-time eligibility counter is greater than zero when a community bonus game is triggered.
US09361764B2	Gaming machine and control method thereof An object of the gaming machine is to simultaneously display symbols and visual information with a simple structure, while displaying the symbols clearly. The gaming machine includes: one or more reels each provided with a reel band having one or more symbols; and a light application device configured to apply visible light representing visual information which enables recognition of information related to games on an outer circumference of the one or more reels. The reel band has a mirror layer which reflects the visible light from the light application device.
US09361761B2	Server, communication system, method for controlling communication system, and program A server includes drawing means (121) for drawing an item by lottery from among an item group including a plurality of types of items with different scarcity values and providing the item to a user, and additional item providing means (122) for providing an additional item to the user in accordance with a provision count of the number of times an item is provided by the drawing means (121).
US09361759B2	Game method using community reels The claimed embodiments contemplate methods, systems and apparatuses directed to gaming machines that include a community spin mechanism that, when activated, causes reel displays, at two or more player stations, to spin. Certain embodiments provide for one or more community reels that are utilized to determine an outcome of a community gaming session. The community reels are “community” in that they are formed by combining reels of individual play stations in order to increase the odds, and payouts, of potential wins via various line combinations of the combined set of reels, once they stop spinning. Re-stated, by way of non-limiting example, each play station has its own set of reels and when community play is started, one or more community reels are spun along with each players set of reels. Any potential winning combinations are then based on resulting combinations of the individual play station reels in combination with the community reels. In one embodiment, one or more dedicated reels are specifically reserved as community reels that may be used in various combinations with a player's reels and other player reels to determine potential awards. The addition of community play, via community reels, advantageously adds to the excitement and enjoyment.
US09361750B2	Gaming machine with screen split and merge feature A gaming machine includes a display device and a processor. The processor is programmed to cause the display device to display a first game using a first frame, detect a first trigger condition during play of the first game in the first frame, based on the first trigger condition, display a second game in a second frame on the display device, and enable simultaneous play of the first game in the first frame and the second game in the second frame.
US09361749B2	Gaming machine with screen split and merge feature A gaming machine includes a display device and a processor. The processor is programmed to cause the display device to display a first game in a first frame, detect a trigger condition during play of the first game in the first frame, based on the detected trigger condition, display a second game in a second frame on the display device, allocate a number of available credits from the first game to the second game, and enable play of the second game with the allocated number of credits.
US09361747B2	Dispenser with wedge for rolling products A serpentine dispenser and cartridge system provides simplified stocking and restocking of the dispenser, as well as jam-free dispenser feeding. Cartridge opening flaps allow a cartridge be inverted and inserted into a dispenser while products in the cartridge are prevented from falling out. A dispenser wedge applies pressure on rolling products as the cartridge is inserted into the dispenser, forcing a retaining flap open so that rolling products may exit the cartridge and enter the dispenser. The wedge may also constrain rolling products to exit the cartridge in an order that prevents jamming.
US09361740B2	Systems and methods for access control The disclosure describes various systems and methods for access control. One such method includes providing an access control module that includes a base portion and an update portion. The update portion is electrically coupled to the base portion via a detachable electrical connector, and wherein operation of the access control module is based at least in part on an interaction between the base portion and the update portion.
US09361737B2	Compliance application with driver specific performance recording A base unit installed in a vehicle including a vehicle communication module for communicating with a controller, the controller monitoring at least one operating parameter of the vehicle. The base unit also includes a transceiver and a processor configured to receive the at least one operating parameter of the vehicle from the vehicle communication module. The processor is further configured to receive identifying information for a driver associated with the vehicle from at least one external device and process the at least one operating parameter and a set of thresholds associated with the driver to detect a driving event. The transceiver is configured to transmit the driving event to at least one external device.
US09361734B2	Image processing device and image processing method The present technique relates to an image processing device and an image processing method for realizing high-precision image generation of predetermined viewpoints by using depth images on the receiving end when the depth images with reduced resolutions are transmitted.A parallax image resolution increasing unit increases the resolution of each of the parallax images of auxiliary images having half the resolution of a compatible image. A parallax image warping unit generates parallax images of virtual viewpoints by performing a warping operation on the parallax images of the auxiliary images with the increased resolutions based on the positions of the virtual viewpoints. A smoothing unit corrects the parallax values of the occlusion regions in the parallax images of the virtual viewpoints. The present technique can be applied to decoding devices that decode glasses-free 3D images, for example.
US09361732B2	Transitions between body-locked and world-locked augmented reality Various embodiments relating to controlling a see-through display are disclosed. In one embodiment, virtual objects may be displayed on the see-through display. The virtual objects transition between having a position that is body-locked and a position that is world-locked based on various transition events.
US09361722B2	Synthetic audiovisual storyteller A method of animating a computer generation of a head and displaying the text of an electronic book, such that the head has a mouth which moves in accordance with the speech of the text of the electronic book to be output by the head and a word or group of words from the text is displayed while simultaneously being mimed by the mouth, wherein input text is divided into a sequence of acoustic units, which are converted to a sequence of image vectors and into a sequence of text display indicators. The sequence of image vectors is outputted as video such that the mouth of said head moves to mime the speech associated with the input text with a selected expression, and the sequence of text display indicators is output as video which is synchronized with the lip movement of the head.
US09361720B2	Image prioritization in a collage shape Embodiments disclosed herein relate to image prioritization in a collage shape. In one embodiment, image positions are determined within a collage shape based on an importance level map of the collage shape and priorities of the images to be positioned within the collage shape. A collage may be created with the collage images in the determined positions.
US09361711B2	Lesion-type specific reconstruction and display of digital breast tomosynthesis volumes A method, a control unit and a system for image reconstruction and visualization of a tomosynthesis volume. Different region of interests are detected in the volume and specific types of lesions are determined. Based on the type of lesion, different reconstruction parameters and different reconstruction algorithms are applied in order to reconstruct a sub-volume or a region in a projection. After displaying the digital breast tomosynthesis volume, a user selection signal is received, in order to identify a selection area. The selection area identifies a region in the volume which should be reconstructed differently from the remaining volume and typically with higher resolution, because it refers to a region of specific interest. After having received the user selection signal the selection area is defined and a pre-computed or online-computed reconstruction of the selection area is visualized. The reconstruction is executed according to the determined lesion type specific reconstruction parameters.
US09361709B2	Interpreting texture in support of mobile commerce and mobility A portable pervasive device includes a combined visual and thermal display. The user is able to detect texture of displayed objects visually and through touching the combined display. A software application pre-defines color codes and temperature settings for a plurality of textures on a graded scale including smooth, soft, and rough. The object is then shown on the display using the color codes and temperature settings for at least one surface of the object.
US09361708B2	Image processing device, image processing method An image processing device includes: a processor; and a memory which stores a plurality of instructions, which when executed by the processor, cause the processor to execute, acquiring an image to be displayed including a two-dimensional code and a positioning pattern superimposed, wherein the two-dimensional code defines information to be displayed on the basis of an image pattern including a first pixel value and a second pixel value, wherein the positioning pattern defines reference coordinates to display the information to be displayed; extracting the two-dimensional code from the image, using a first color component to extract a pixel value identified as the first pixel value and a pixel value identified as the second pixel value; and extracting the positioning pattern from the image using a second color component that identifies as identical to the first pixel value both pixel values that are identified as the first and second pixel values.
US09361707B2	Methods and systems for detection and estimation of compression noise Systems and methods for estimation of compression noise in an image or in a video sequence are provided. Difference values in a first direction are computed, and a plurality of statistical feature values for the difference values are computed in association with a plurality of offsets. At least one feature value is computed using the plurality of statistical feature values, and a compression-noise estimate may be determined in accordance with a criterion based on a comparison of the at least on feature value and an associated threshold and an additive noise estimate.
US09361706B2	Real-time optical flow sensor design and its application to obstacle detection The present disclosure relates generally to optical flow algorithms. Section 1 of the present disclosure describes an optical flow algorithm with real-time performance and adequate accuracy for embedded vision applications. This optical flow algorithm is based on a ridge estimator. Sections 2 and 3 describe an obstacle detection algorithm that utilizes the motion field that is output from the optical flow algorithm. Section 2 is focused on unmanned ground vehicles, whereas section 3 is focused on unmanned aerial vehicles.
US09361700B2	Constraint relationship for use in an image segregation A soft, weighted constraint imposed upon image locations can be used to provide a more accurate segregation of an image into intrinsic material reflectance and illumination components. The constraint is arranged to constrain all color band variations between the image locations into one integral constraining relationship.
US09361698B1	Structure light depth sensor A system and method for determining depth information of an object is provided. The system projects dots on an object and captures an image of the object with captured dots. The system identifies the captured dots based on a brightness of the captured dots and identifies coordinates of the captured dots. The system processes the captured image by removing brightness information of pixels outside of the captured dots. The system processes the captured dot by overlaying synthesized dot image on the captured dot. The system divides the processed captured image into captured sections and compares the captured sections to reference sections. The system selects individual reference sections having a highest correlation score for each of the captured sections and correlates a captured dot from each of the captured sections to a reference dot in respective corresponding reference sections. Depth information may be calculated based on coordinates of the captured dots and correlated reference dots.
US09361696B2	Method of determining a ground plane on the basis of a depth image A method of determining a triplet of parameters defining a ground plane based on a depth image includes determining a plurality of triplets of parameters, each defining a ground plane, spatial filtering of the parameters, and temporal filtering of the parameters. The temporal filtering is dependent on an indicator of quality of depth image data available for determination of the ground plane. The temporal filtering is dependent on an indicator of quality of the ground plane determined after spatial filtering. Similarly, the spatial filtering can be parameterized as a function of the two indicators. Globally, the more the estimated plane for a depth image can “explain” the points in this image, the more accurately planes of the subsequent images are determined. For the spatial filtering, the ground plane is searched in a more limited space, and, for the temporal filtering, the previously estimated ground planes considered to a lesser degree.
US09361688B2	Sensor calibration and position estimation based on vanishing point determination Disclosed are systems, apparatus, devices, method, computer program products, and other implementations, including a method that includes capturing an image of a scene by an image capturing unit of a device that includes at least one sensor, determining relative device orientation of the device based, at least in part, on determined location of at least one vanishing point in the captured image of the scene, and performing one or more calibration operations for the at least one sensor based, at least in part, on the determined relative device orientation.
US09361687B2	Apparatus and method for detecting posture of camera mounted on vehicle An in-vehicle camera posture detecting apparatus includes a first image storing unit configured to store an image of a calibration sheet placed near the vehicle, the calibration sheet having a plurality of calibration marks, a first posture estimating unit for estimating the posture of the camera based on the first image, a second image storing unit that stores an image of the calibration sheet after movement of the vehicle, a second posture estimating unit that estimates the posture of the camera based on the second image, a sheet deviation calculating unit that calculates an amount of deviation of the calibration sheet from a predetermined position based on the estimates provided by the first and second posture estimating units, and a camera posture determining unit that determines the posture of the camera based on a posture estimated value and the calculated amount of deviation.
US09361685B2	Apparatus and method for acquiring multi-parametric images in magnetic resonance imaging device There are provided an apparatus and a method for acquiring multi-parametric images from an MRI device. In one general aspect, the apparatus for acquiring multi-parametric images includes an image analyzer configured to determine a significance level of each of a plurality of multi-parametric images relating to a disease, and to determine an acquisition order of the multi-parametric images relating to the disease; and a model constructer configured to construct an acquisition model of the multi-parametric images based on the acquisition order and the multi-parametric images to be used in diagnosing the disease.
US09361683B2	Imaging technique and imaging system The present invention relates to an imaging technique and an imaging system and more particularly to an automatic assessment of quantitative measure(s)/properties(s) of an object wherein, for example, an imaging system is used to capture an image, following which image properties are quantified using image processing techniques. An imaging technique obtains an image of an object along a first axis, or by way of a first technique, and subsequently obtains an image of the object along a second axis, or by way of a second technique. One or more pixels from the first image are selected and designated as reference pixels. An automated comparison between corresponding regions of the first and second images are then performed which is based upon the reference pixels, so as to indicate regions of interest.
US09361681B2	Quality metrics for biometric authentication This specification describes technologies relating to biometric authentication based on images of the eye. In general, one aspect of the subject matter described in this specification can be embodied in methods that include obtaining first image of an eye including a view of the white of the eye. The method may further include determining metrics for the first image, including a first metric for reflecting an extent of one or more connected structures in the first image that represents a morphology of eye vasculature and a second metric for comparing the extent of eye vasculature detected across different color components in the first image. A quality score may be determined based on the metrics for the first image. The first image may be rejected or accepted based on the quality score.
US09361680B2	Image processing apparatus, image processing method, and imaging apparatus An image processing apparatus comprising: an image acquisition unit configured to acquire an image; a depth map acquisition unit configured to acquire a depth map corresponding to the image; a refinement unit configured to detect a saliency region from the image and to refine the depth map on the basis of the saliency region, the saliency region being a region on which a person tends to focus; and an image processing unit configured to apply image processing to the image using the depth map refined by the refinement unit.
US09361674B2	Image processing apparatus, image processing method, and storage medium An apparatus includes an acquisition unit configured to acquire an input image, an identifying unit configured to identify a distance from a reference point to a processing target pixel in the input image, a deformation unit configured to deform an image based on the distance, and a sharpening processing unit configured to perform sharpening processing on an image while changing a strength of the sharpening processing, the changing of the strength based on the distance.
US09361673B2	Image interpolation device, image processing device, and image interpolation method An image interpolation apparatus includes: a first processing unit which calculates an error on image data between a patch to be interpolated that overlaps with a masked region and a reference patch that does not overlap with the masked region; a second processing unit which calculates, based on the image data, feature quantities indicating the degrees of flatness of the respective patch regions; a third processing unit which calculates an error between their feature quantities; a fourth processing unit which selects a reference patch that has produced a least significant error based on results obtained by the first and third processing units; and a fifth processing unit which pastes pixel data of the reference patch that the fourth processing unit has selected onto the patch to be interpolated. The third processing unit calculates an error between the feature quantities by comparing the feature quantity of the patch to be interpolated outside of the masked region to that of the entire reference patch.
US09361667B2	Image processing apparatus and method The present technology relates to an image processing apparatus and an image processing method, and particularly to an image processing apparatus and an image processing method capable of suppressing an increase in a load on a subject and obtaining a captured image of the subject with higher image quality.An imaging unit reduces a light amount and performs a plurality of imagings of the fundus of the eye so as to generate a plurality of fundus images. A biological information alignment processing unit aligns the fundus images by using biological information of a subject. A super-resolution processing unit superimposes an aligned input image on a previous super-resolution result image so as to generate a new super-resolution result image. The super-resolution processing unit stores or outputs the super-resolution result image in a storage unit or from an output unit, and supplies the super-resolution result image to a super-resolution result image buffer so as to be stored. The present technology may be applied to, for example, an image processing apparatus.
US09361658B2	System and method for enhanced protection and control over the use of identity A method of protecting use of an entity's identity is provided. The method comprises setting a status of the identity to a first state, the first state defining a scope of permitted use of the identity, changing, in advance of an intended use of the identity, the status to a second state defining a scope of permitted use of the identity that is different from the first state, requesting use of the identity after the changing; and returning, after the requesting, the state back to the first state.
US09361655B2	Method for computer-aided control of the electrical power consumption of a plurality of power consumers in an electrical power grid In a method for controlling the electrical power consumption of a plurality of power consumers in a power grid, the power consumers represent network nodes of a communication network made of a plurality of network nodes, in which the power consumers communicate with each other. Each of the network nodes estimates the total power consumption of the network nodes based on the exchange of information with one other network node. Each network node having an additional power demand which increases a required amount of power, compares the total power consumption estimated by the network node plus the required amount of power to a predefined total power demand of the network nodes and initiates a delivery of the required amount of power from a power provider when the estimated total power demand thereof plus the required amount of power is less than the predefined total power demand by a threshold value.
US09361652B2	Accessing third-party communication service via a social networking system A user interface in a social networking system enables users to connect to and interact with each other using a third-party communication service, such as a VoIP or video chat service. A user initiates an interaction with another user in the social networking system, which passes the users' information to the third-party communication service provider to allow it to provide the requested service. The social networking system may pass an encrypted identifier for the users so that the third-party communication service does not have access to the real identities of the social networking system's users. A user of the social networking system may use this process to video conference with users of the third-party communication service, rather than just other users of the social networking system, and vice versa.
US09361651B2	Displaying quantitative trending of pegged data from cache Methods and systems of displaying response data provide for identifying a pegged area of display content during a first retrieval of the display content by a client device at a first moment in time. Additionally, first data associated with the pegged area may be stored, wherein a comparison can be conducted between the first data and additional data associated with the pegged area at one or more subsequent moments in time. In one example, a user interface is generated that highlights a quantitative trend of the pegged area between the first moment in time and the one or more subsequent moments in time.
US09361642B1	Product evaluation system featuring user context analysis A system, method and program product that provides product evaluations. A system is disclosed that includes: a system for identifying a set of products based on an inputted query; a system for collecting structured and unstructured data associated with the set of products; a system for generating a composite feature list from the structured and unstructured data; a system for generating a matrix for each identified product, wherein the matrix provides a set of features and any known limitations and benefits determined from the structured and unstructured data for each of the features; and a rating system that analyzes a usage context in view of the known limitations and benefits to evaluate each product at a feature level.
US09361641B2	System and method for tire inventory and promotion Disclosed is a system and method for modifying a tire inventory database in a tire inventory server using a computer, a table, or a mobile communication device, comprising: obtaining an image of tread pattern on a selected tire using an imaging device; measuring tread depth on the selected tire to obtain a tread depth reading; and transmitting the image of tread pattern and the tread depth reading to the tire inventory server.
US09361639B2	Video message capture and delivery for online purchases Techniques for delivering a video message from a purchaser of an order to a recipient of the order are described. An order for one or more items is received, the order specifying a recipient and having an association with a purchaser. The order further specifies to deliver a video message from the purchaser to the recipient. Embodiments receive a video message from the purchaser. The order for the one or more items is fulfilled. Embodiments transmit at least an indication of the video message to the recipient.
US09361638B2	System and method for providing a single input field having multiple processing possibilities Disclosed herein are systems, methods, and computer-readable storage devices for unifying access to multiple websites or other information sources such that the user only needs to visit one location, and utilize one input search field. That one location can be a website, an application, a search bar in a web browser, etc. Rather than navigating to a website to perform a search in the context of that website, a user can instead navigate to or open a generalized search field. Via the generalized search field, the system can implicitly or explicitly process and analyze the input from the user and the resulting context. Thus, the user goes to the website second, after the search is entered. This approach reduces the number of interactions, starting when the user opens a browser or application, to get to a purchase or a search result.
US09361637B2	System and method for providing diagnostic services A request to diagnose a problem with an appliance is provided to a diagnostic system whereupon the diagnostic system functions to interpret the information indicative of the problem with the appliance to thereby normalize the information indicative of the problem with the appliance. The normalized information indicative of the problem with the appliance is then used to select from a knowledge base in which is maintained a plurality of solutions each having associated tags that function to identify concepts and values in a domain model a set of possible solutions for the problem with the appliance. As necessary, information within the set of possible solutions for the problem with the appliance is used to dynamically generate additional questions to thereby obtain further information indicative of the problem with the appliance. The further information indicative of the problem with the appliance may then be used to identify from with the set of possible solutions for the problem with the appliance a subset of best possible solutions for the problem with the appliance. This subset of best possible solutions for the problem with the appliance may then be presented to an end user to thereby allow the end user to perform the repair(s) needed to correct the problem.
US09361628B2	Interactive video shelving system A shelving system and method are disclosed. The shelving system includes: a plurality of shelves; at least one display screen; at least one camera, for optically detecting the contents of each one of the shelves; and at least one computing device in communication with the display screen and the at least one camera for presenting sales and promotional information on the display screen in dependence on the contents of the compartments as sensed by the sensors.
US09361623B2	Preferred customer marketing delivery based on biometric data for a customer A computer implemented method, apparatus, and computer usable program product for automatically determining a marketing status for a customer. Biometric readings for the customer are received from a set of biometric devices associated with a retail facility to form biometric data describing a set of physiological responses of the customer. The biometric data is analyzed to identify a set of marketing initiation factors that indicate a degree of receptivity of the customer to marketing messages. In response to the set of marketing initiation factors indicating initiation of marketing to the customer, a customized marketing message is generated for the customer. The customized marketing message is transmitted to a display device for display to the customer in real-time as the customer is shopping.
US09361621B2	System and method for improving reliability of distributed electronic transactions A system and method are disclosed that separate control functionality from the management functionality for conducting electronic transactions. The control functions are performed by a third party resulting in a low overhead since significant overhead is incurred in response to an anomalous event, thus facilitating high throughput electronic transactions when anomalous events are infrequent. Further, the third party does not need to have access to confidential information since it only controls by observing, validating and certifying the observed communications in a specified manner to prevent confidential information from leaving the context of the transaction. Management of the transactions based on consideration of substantive information is provided by the participants. A preferred system of the invention comprises a validation authority, a logical boundary at which validation authority undertakes control of communications, and validation rules specifying parameters for observation and the nature of comparisons.
US09361618B2	Gesture-based device The use of gestures on a user device to interact with and obtain functionality from remote communication hub devices is disclosed. A user device includes an accelerometer or other motion detection device and a wireless communications capability. The device is small enough to be placed conveniently about the person and communicates with a communication hub device to perform context-dependent actions. A user makes a gestural command to the device. The device interprets the gesture and undertakes activity. The gestural sensing device may be a motion switch, a multi-axis accelerometer, a video camera, a variable capacitance device, a magnetic field sensor, an electrical field sensor etc. When combined with business logic running on a remote computer system, the device can be used to implement a range of applications and services.
US09361616B2	One-scan and one-touch payment and buying using haptic control via messaging and calling multimedia system on mobile and wearable device, currency token interface, point of sale device, and electronic payment card Provided are computer implemented methods and systems for messaging, calling, and one-touch and one-scan payments and buying via mobile and wearable devices. An exemplary system comprises a processor and a database in communication with the processor. The processor is configured to provide a haptic control associated with the system. The haptic control is shown on a display of a mobile and wearable device overlapping other visual elements. The haptic control provides mode selection elements associated with a payment, messaging, and calling modes. The processor receives a selection of the payment mode via the mode selection elements from a user. Upon the selection, context is extracted from the display. Based on the context, a payment transaction type which the user intends to perform is determined. The payment transaction type includes a payment receiving transaction and a payment sending transaction. Based on the determining, a transaction request is sent to a financial institution using the extraction.
US09361614B2	Encoding data in multiple formats Methods, systems, and apparatus, including computer programs encoded on computer storage media, for modulating card information between a card reader and a user device. One of the methods includes receiving, from a read head of the card reader, card information associated with a card. The card information is encoded in a first format to be sent to the user device at a first data rate. The card information is encoded in a second format to be sent to the user device at a second data rate lower than the first data rate. The card information is sent to the user device encoded in the first format and the second format.
US09361608B2	Transaction dispute resolution The present invention provides a method and apparatus for providing transaction information to a user of a Self-Service Terminal (SST). The method comprises aborting a user initiated transaction at an SST subsequent to an error occurring during the transaction; and displaying an optical device-readable code in a display of a user interface of the SST for identifying at least one parameter associated with the aborted transaction.
US09361606B2	Dispensing digital objects to an electronic wallet A configuration system and method is disclosed that includes a unified and integrated configuration that is composed of a payment system, an advertising system, and an identity management system such that the unified system has all of the benefits of the individual systems as well as several additional synergistic benefits. Also described are specific configurations including the system's access point architecture, visual wallet simulator user interface, security architecture, coupon handling as well as the system's structure and means for delivering them as targeted advertising, business card handling, membership card handling for the purposes of login management, receipt handling, and the editors and grammars provided for customizing the different types of objects in the system as well as the creation of new custom objects with custom behaviors. The configurations are operable on-line as well as through physical presence transactions.
US09361601B2	Systems and methods for locking and docking Embodiments of the present invention relate generally to a modular system for facilitating automated transactions. Specifically, in some embodiments a modular system includes a plurality of lock modules that are controlled by one or more primary lock control boards. The lock modules control access to products or services through one or more daughter boards.
US09361597B2	Variable risk engine The invention provides systems and methods for risk assessment using a variable risk engine. A method for risk assessment may comprise setting an amount of real-time risk analysis for an online transaction, performing the amount of real-time risk analysis based on the set amount, and performing an amount of time-delayed risk analysis. In some embodiments, the amount of real-time risk analysis may depend on a predetermined period of time for completion of the real-time risk analysis. In other embodiments, the amount of real-time risk analysis may depend on selected tests to be completed during the real-time risk analysis.
US09361587B2	Authoring system for bayesian networks automatically extracted from text A system and method that facilitates authoring of a Bayesian Belief Networks by: accessing text content stored in a content storage device; identifying statements within said accessed text content indicating a dependence relation; extracting said statements indicating said dependence relation from said text content; and aggregating said extracted statements into a form suitable for representation as a BBN network structure. To identify statements indicating a dependence relation, the method includes identifying one or more lexical and semantic attributes of variables within a text unit indicating a conditional dependence relation between two or more variables. The method further processes the text content to extract probabilistic information and probability statements and aggregate the probability statements into a quantitative layer of the BBN structure.
US09361586B2	Method and system for invariant pattern recognition An adaptive pattern recognition system optimizes an invariance objective and an input fidelity objective to accurately recognize input patterns in the presence of arbitrary input transformations. A fixed state or value of a feature output can nonlinearly reconstruct or generate multiple spatially distant input patterns and respond similarly to multiple spatially distant input patterns, while preserving the ability to efficiently evaluate the input fidelity objective. Exemplary networks, including a novel factorization of a third-order Boltzmann machine, exhibit multilayered, unsupervised learning of arbitrary transformations, and learn rich, complex features even in the absence of labeled data. These features are then used to classify unknown input patterns, to perform dimensionality reduction or compression.
US09361582B2	Efficient binary protocol marshalling for rule engine sessions Some embodiments of efficient binary protocol marshalling for rule engine sessions have been presented. In one embodiment, a set of marshalling plug-ins is provided to a rule engine. Each of the set of marshalling plug-ins is customized for a type of user objects. In response to encountering a user object, the rule engine selects a marshalling plug-in out of the set of marshalling plug-ins based on a type of the user object to marshall in or to marshall out the user object.
US09361580B2	Medical diagnosis support apparatus and method of controlling the same A medical diagnosis support apparatus is provided. In the medical diagnosis support apparatus, an acquisition unit acquires medical information associated with a diagnosis target as input information. An inference unit infers a diagnosis name of the diagnosis target based on the acquired input information. A calculation unit calculates the influence rate of each input information with respect to each inference. A creation unit creates a report sentence based on the calculated influence rate.
US09361579B2	Large scale probabilistic ontology reasoning Techniques for computing a solution to a query formulated against a knowledge base (KB) are provided. The techniques include receiving a query formulated against a knowledge base, wherein the knowledge base comprises a set of one or more axioms, wherein each axiom is annotated with a specific probability value indicating a degree of certainty assigned thereto, ignoring each probability value of the one or more axioms and computing a solution to the query, computing each of one or more justifications for the query solution, wherein computing each of one or more justifications for the query solution comprises determining a minimal set of one or more axioms in the knowledge base that entail the query solution, and using each probability value of the one or more axioms in each justification to compute a net probability of an inferred query solution.
US09361578B2	Memory efficient state-set representation for planning A method for encoding state sets which encodes a binary prefix tree representation as a level ordered edge sequence (LOES) where the inner tree nodes are ordered from left to right, and top to bottom order and coded as bit pairs which represent the presence of leaf nodes.
US09361577B2	Processing device and computation device According to one embodiment, a processing device is configured to process input data formed of a plurality of input digital values. The processing device has a plurality of computation layers connected in series. Each of the computation layers has a plurality of computation devices. Each of the plurality of computation devices in the computation layer of a first stage is configured to generate a digital value from the input digital values and weight coefficients defined in advance. The weight coefficients are applied to each of the input digital values. Each of the plurality of computation devices of the computation layer of a second or subsequent stage is configured to generate a new digital value from the digital values generated by the computation devices of the computation layer of the previous stage and weight coefficients defined in advance. The weight coefficients are applied to each of the digital values.
US09361576B2	Neuromorphic signal processing device and method for locating sound source using a plurality of neuron circuits Provided is a neuromorphic signal processing device for locating a sound source using a plurality of neuron circuits, the neuromorphic signal processing device including a detector configured to output a detected spiking signal using a detection neuron circuit corresponding to a predetermined time difference, in response to a first signal and a second signal containing an identical input spiking signal with respect to the predetermined time difference, for each of a plurality of predetermined frequency bands, a multiplexor configured to output a multiplexed spiking signal corresponding to the predetermined time difference based on a plurality of the detected spiking signals output from a plurality of neuron circuits corresponding to the plurality of frequency bands, and an integrator configured to output an integrated spiking signal corresponding to the predetermined time difference, based on a plurality of the multiplexed spiking signals corresponding to a plurality of predetermined time differences.
US09361573B2	Printed antennas, methods of printing an antenna, and devices including the printed antenna Wireless devices such as sensors, interactive displays and electronic article surveillance (EAS) and/or radio frequency identification (RFID) tags including integrated circuitry and an antenna and/or inductor printed thereon, and methods for making and using the same, are disclosed. The device generally includes an integrated circuit on a substrate and an antenna, directly on the substrate and/or the integrated circuit, in electrical communication with the integrated circuit. The method of making a wireless device generally includes forming an integrated circuit on the substrate and printing at least part of an antenna or antenna precursor layer on the integrated circuit and/or substrate. The present invention advantageously provides a low cost wireless device capable of operating at MHz frequencies that can be manufactured in a shorter time period than conventional devices.
US09361570B2	RFID tag and method of attaching the same An RFID tag for stably holding an RFID inlet 3 raised and spaced apart with respect to an article, on which the tag is placed and a method of attaching such an RFID tag. Allow the RFID tag to be raised from a surface of an article by being flexed to bring the RFID tag into contact with a head portion of a banding band. A through hole 8 defined in a tag base 2 allows insertion of the banding band. The hole 8 includes a first through bore 8A and a second through bore 8B. The tag base 2 includes a base region 2A for raising a holding region and a holding region 2B for an RFID inlet 3 for being reused. The base region 2A raises an RFID inlet 3 with respect to an article, and the holding region inlet 2B having the RFID inlet 3 is allowed to be raised from the base region.
US09361569B2	Cards with serial magnetic emulators A card is provided, such as a credit card or security card, that may transmit information to a magnetic stripe reader via a magnetic emulator. The emulator may transmit the information serially in order to reduce the amount of circuitry needed to emulate a particular block of information. Additionally, for example, a serial encoder may send any amount of information through a single emulation segment. Such a magnetic emulator may be provided on a credit card. A dynamic credit card number may be provided by, for example, coding a number with a different coding scheme for different periods of time. The magnetic emulator may be utilized to transmit a particular coded number for a particular period of time. In this manner, a dynamic credit card number may be provided such that to help secure, and progress, a payment transaction.
US09361568B2	Radio frequency identification tag with hardened memory system In embodiments of the present invention improved capabilities are described for RFID tags with hardened memory, where the memory comprises a plurality of one time programmable (OTP) non-volatile memory locations for storing data, wherein the plurality of OTP non-volatile memory locations are configured to emulate a hardened memory system that retains data stored in the plurality of OTP non-volatile memory locations, wherein the data stored is retained after exposure of the RFID tag to an ionizing radiation exposure with an exposure level equal to or greater than 25 kGy, wherein the plurality of OTP non-volatile memory locations are configured to emulate at least one multiple time programmable (MTP) memory location for storing the data.
US09361563B2	Techniques for providing an electronic representation of a card Techniques for making electronic cards that can be displayed on a mobile phone. The techniques permit making an electronic card based on an arbitrary SMS message and making an electronic card (eCard) that corresponds to a pre-existing non-electronic privilege card such as a loyalty card. In the latter case, the system on which the card is being made obtains information about the user and the issuer and uses the information to determine whether to issue the eCard and also to make use validity information which is associated with the card and is used to determine the validity of the card as it is used.
US09361561B2	High-resolution tracking of industrial process materials using trace incorporation of luminescent markers A method of marking an industrial process material including selectively incorporating a luminescent marker onto and/or into the industrial process material in a trace amount insufficient to be optically detectable in the presence of ambient light but sufficient to be non-destructively optically detectable in and/or on the industrial proce material in situ in the field or on-site. The trace amount of the luminescent marker is used to track, identify authenticate the industrial process material for at least one of material control, inventory control, stock control, logistics control, quality control and pollution control.
US09361555B2	Method, apparatus and system for rendering an object on a page A method of rendering a graphical object (e.g., 801) on a page (800), is disclosed. A region of the page containing the graphical object (801) is marked as output incompatible based on the graphical object (801) being output incompatible. A bounding box comprising the marked region is determined. A proportion of a number of the regions marked as output incompatible are determined to a total number of regions in the bounding box. A further region within the bounding box is marked as output incompatible to increase the determined proportion above a threshold. The graphical object in the marked region and the further marked region is converted into an output compatible graphical object if the determined proportion is above the threshold. The output compatible graphical object is rendered.
US09361552B2	Image detection apparatus and image forming apparatus An improved image detection apparatus is described which can colorimetrically measure an appropriate number of patches while inhibiting unnecessary sheet discharging. A correction chart consists of a plurality of patches linearly arranged in the form of a plurality of patch arrays which are parallelly arranged in the sheet width direction. The image detection apparatus includes a paper conveying unit for conveying a sheet on which the correction chart is formed, an image reading unit and a colorimetric unit which outputs the color information of each patch by performing the colorimetric process with the patch array consisting of a line of the patche. Then, while circulating a sheet, a control unit performs switch control for switching the patch array from one to the next to be colorimetrically measured by the colorimetric unit.
US09361551B2	Image forming apparatus that forms color image by superimposing plurality of images An image forming apparatus includes a unit configured to correct a relative position of a first image and a second image, and a controller configured to form a first measurement image in a case where a first condition is satisfied, and to form the first measurement image and a second measurement image in a case where a second condition is satisfied. The controller is further configured to, in a case where the first condition is satisfied, determine whether or not the second condition is satisfied before the first condition is satisfied next, and in a case where the second condition is satisfied before the first condition is satisfied next, cause an image forming unit to form the first measurement image and the second measurement image.
US09361550B2	Processing webs using printed graphic code symbol relating to web features An arrangement comprising at least one first processing machine arranged to process a web, and a scanning device arranged to scan the web. The arrangement also comprises a computing device configured to: receive image data of the web, analyze the data, and generate a graphic code symbol based on the analysis, and a printing device arranged to print the graphic symbol on the web for marking a web with data relating to features of the web. At least one second processing machine is arranged to further process the web, a reading device is arranged to read the graphic code symbol of the web, and a control device is configured to: receive image data relating to the graphic code symbol, decode the graphic code symbol to retrieve information regarding features of the web, and control the second processing machine to adapt the further processing of the web according to the features.
US09361545B2	Methods and apparatus for estimating angular movement with a single two dimensional device Certain aspects of the present disclosure relate to methods and apparatus for neuro-simulation with a single two-dimensional device to track objects. The neuro-simulation may report a point of interest in an image that is provided by the device. The device may center on the point of interest using one or more actuators. The simulation mechanism may input pixels and output a plurality of angles to the actuators to adjust their direction.
US09361544B1	Multi-class object classifying method and system A multi-class object classifying method and system are disclosed herein, where the multi-class object classifying method includes the following steps: classes, first training images and second training images are received and stored, and first characteristic images and second characteristic images are respectively extracted from the first training images and the second training images; the first training images is used to generate classifiers through a linear mapping classifying method; a classifier and the second characteristic images are used to determine parameter ranges corresponding to the classes and a threshold corresponding to the classifier. When two of the parameter ranges overlap, the remaining parameter ranges except for the two overlapped parameter ranges are recorded; after another classifier is selected from the classifiers except for the classifier that has been selected, the previous steps is repeated until the parameter ranges don't overlap with each other and the parameter ranges are recorded.
US09361543B2	Automatic learning method for the automatic learning of forms of appearance of objects in images An automatic learning method for the automatic learning of the forms of appearance of objects in images in the form of object features from training images for using the learned object features in an image processing system comprises determining a feature contribution by a training image to object features by weighted summation of training image features by means of linear filter operations, applied to the feature image, by using a weight image obtained at least from an annotation image and a classification image. This allows faster learning processes and also the learning of a greater variance of forms of appearance of objects and backgrounds, which increases the robustness of the system in its application to untrained images.
US09361542B2	Methods and systems for determining image similarity In one embodiment, a computing device receives a first image from a client device associated with at least one user of a social-networking system. The computing device performs a content-aware hashing function on the first image and generates a large hash value. The computing device then performs a locality-sensitive hashing function on the large hash value to generate a small hash value. The computing device calculates a distance from the small hash value to a cluster center which is associated with the small hash values for at least one other image. If the distance is greater than a threshold distance, the first image is determined not similar to the at least one other image. The computing device creates a new cluster center for the first image. If the distance is less than the threshold distance, the first image is determined similar to the at least one other image.
US09361535B2	Method for reading vehicle identifications A method is disclosed for reading license plate numbers in a road network, comprising: recording an image of a license plate number at a first location, OCR-reading a license plate character string in the image, and storing an OCR data set in a database; recording an image of a license plate number at a second location, OCR-reading a license plate number character string in the image, and generating a current OCR data set; and, if a confidence measure of the current OCR data set falls below a first minimum confidence value, selecting a stored OCR data set with a license plate number image having a similarity exceeding a minimum similarity value and/or having the greatest similarity to the license plate number image of the current OCR data set, and using the selected OCR data set for improving the license plate number character string of the current OCR data set.
US09361532B2	Label for enabling verification of an object A label for enabling verification of an object includes a scannable region that enables determination of auto-acquired unique spatial orientation of the scannable region with respect to a reference thereby enabling determination of a spatial orientation of the label with respect to the reference. The label is applied onto the object and a change in the spatial orientation of the label indicates tampering of the label, thereby enabling verification of the object. Further, a method for detecting tampering of an object includes providing label on the object. The label has at least a portion which is scannable region with a plurality of patterns and is associated with an external reference point. Further, the method includes determining a first and a second spatial orientations of the label based on computation between the patterns and the reference point, and generating an alert on noticing a change between first and second spatial orientations.
US09361531B2	Targeted optical character recognition (OCR) for medical terminology Embodiments of the present invention provide concepts for correcting optical character recognition (OCR) errors from and OCR scan result by sequentially applying an anagram hash (AH) and Levenshtein-Distance (LD) measurement for concurrent character identity-based (machine code) and character shape-based (OCR-Key) corrections. The OCR-Key classifies characters by shape into one or more disjoint and overlapping classes. Similar shaped-based classes appearing in consecutive characters are appended to a cardinality term, a repetition count of the class. The LD measurement groups OCR-Keys and differentiates on both class and cardinality to arrive at a shape-based mismatch error between competing candidate words from an associated dictionary and a target word from the OCR scan. The shape-based LD measurement errors are then functionally merged with the character identity-based deletion, substitution, and insertion errors to find a minimum error for the set of candidate words, corresponding to the preferred candidate word match to the target word.
US09361530B2	Use of human input recognition to prevent contamination Embodiments of a system and method for processing and recognizing non-contact types of human input to prevent contamination are generally described herein. In example embodiments, human input is captured, recognized, and used to provide active input for control or data entry into a user interface. The human input may be provided in variety of forms detectable by recognition techniques such as speech recognition, gesture recognition, identification recognition, and facial recognition. In one example, the human input recognition techniques are used in connection with a device cleaning workflow used to obtain data and human input during cleaning procedures while minimizing cross-contamination between the contaminated device or person and other objects or persons. In another example, the human input recognition techniques are used in connection with a device tracking workflow used to obtain data and human input while tracking interactions with and locations of the contaminated or uncontaminated device.
US09361524B2	System and method for crowd counting and tracking A video analytic system includes a depth stream sensor, spatial analysis module, temporal analysis module, and analytics module. The spatial analysis module iteratively identifies objects of interest based on local maximum or minimum depth stream values within each frame, removes identified objects of interest, and repeats until all objects of interest have been identified. The temporal analysis module associates each object of interest in the current frame with an object of interest identified in a previous frame, wherein the temporal analysis module utilizes the association between current frame objects of interest and previous frame objects of interest to generate temporal features related to each object of interest. The analytics module detects events based on the received temporal features.
US09361523B1	Video content-based retrieval A method and system for video-content based retrieval is described. A query video depicting an activity is processed using interest point selection to find locations in the video that are relevant to that activity. A set of spatio-temporal descriptors such as self-similarity and 3-D SIFT are calculated within a local neighborhood of the set of interest points. An indexed video database containing videos similar to the query video is searched using the set of descriptors to obtain a set of candidate videos. The videos in the video database are indexed hierarchically using a vocabulary tree or other hierarchical indexing mechanism.
US09361522B2	Motion event recognition and video synchronization system and method Enables recognition of events within motion data obtained from portable wireless motion capture elements and video synchronization of the events with video as the events occur or at a later time, based on location and/or time of the event or both. May use integrated camera or external cameras with respect to mobile device to automatically generate generally smaller event videos of the event on the mobile device or server. Also enables analysis or comparison of movement associated with the same user, other user, historical user or group of users. Provides low memory and power utilization and greatly reduces storage for video data that corresponds to events such as a shot, move or swing of a player, a concussion of a player, or other medical related events or events, such as the first steps of a child, or falling events.
US09361515B2	Distance based binary classifier of handwritten words This disclosure provides methods and systems to classify handwritten words associated with an answer to a question. According to an exemplary embodiment of this disclosure, a reference dictionary is constructed as a function of a known answer to the question, the reference dictionary including handwritten characters which are used for comparison purposes to determine if the handwritten answer if correct or not.
US09361514B2	Forensic verification from halftone images A forensic verification system (900) extracts a print signature via a print signature extractor (910) from a captured image of a printed halftone. The system (900) utilizes a comparator (920) to compare the print signature to a reference signature stored in a registry to determine differences between the print signature and the reference signature. The system (900) utilizes a forensic analyzer (930) to perform a forensic analysis on the signatures based on the comparison to authenticate the printed halftone.
US09361513B2	Sorting system using wearable input device Methods for sorting mail pieces and corresponding systems and computer-readable mediums. A method includes determining that a camera of a wearable device is directed at a mail piece and capturing an image of the mail piece by the camera of the wearable device. The method includes transmitting the image from the wearable device to a mail processing system and notifying a user wearing the wearable device of a sort location of the mail processing system that corresponds to the mail piece.
US09361511B2	Information processing apparatus, information processing method, and program An information processing apparatus includes a grouping unit that detects a part of an object from contents and performs grouping of each object, a correlation degree calculating unit that calculates a correlation degree between the objects of which the grouping is performed by the grouping unit, and a display control unit that controls a display of a diagram of a correlation between the objects indicating the correlation between the objects, based on the correlation degree between the objects which is calculated by the correlation degree calculating unit.
US09361510B2	Efficient facial landmark tracking using online shape regression method Disclosed in some examples are various modifications to the shape regression technique for use in real-time applications, and methods, systems, and machine readable mediums which utilize the resulting facial landmark tracking methods.
US09361509B2	Electronic signature authentication method and system A system and method for facilitating authentication of an electronic signature includes receiving electronic signature data associated with an electronic signature of a signer, the electronic signature data comprising at least biometric data associated with at least one of the electronic signature and the signer. A signature icon is generated by using at least the received electronic signature data, wherein the signature icon comprises a coded visual representation of the electronic signature data. The signature icon is provided on a document signed by the signer by way of the electronic signature such that the signature icon is exhibited on the document at least when the document is printed or when the document is displayed on a display screen associated with a computing device or machine, wherein the signature icon facilitates authenticating the electronic signature of the signer.
US09361507B1	Systems and methods for performing fingerprint based user authentication using imagery captured using mobile devices Technologies are presented herein in support of a system and method for performing fingerprint recognition. Embodiments of the present invention concern a system and method for capturing a user's biometric features and generating an identifier characterizing the user's biometric features using a mobile device such as a smartphone. The biometric identifier is generated using imagery captured of a plurality of fingers of a user for the purposes of authenticating/identifying the user according to the captured biometrics and determining the user's liveness. The present disclosure also describes additional techniques for preventing erroneous authentication caused by spoofing. In some examples, the anti-spoofing techniques may include capturing one or more images of a user's fingers and analyzing the captured images for indications of liveness.
US09361505B2	Display device and method of controlling therefor A display device and a method of controlling therefor are disclosed. The display device includes a fingerprint recognition unit configured to recognize a fingerprint and a movement of the fingerprint, a touch display unit configured to display visual content and a controller configured to control the fingerprint recognition unit and the touch display unit, wherein if a fingerprint contacted with the fingerprint recognition unit is recognized as a registered fingerprint, the controller is configured to switch a screen to a home screen from a lock screen by unlocking the display device, wherein if a notification event is detected the controller is configured to control the touch display unit to display a notification list selection screen together with the switched home screen, and wherein if a continuous movement of the fingerprint maintaining the contact is recognized, the controller is configured to perform a control process on the notification list selection screen.
US09361485B2	Transmission device and sensor system A transmission device for two electric pulse measurement signals includes a first measurement signal input, a second measurement signal input, a differential measurement signal output and a signal converter. The first measurement signal input serves for receiving a first single-ended measurement signal, the second measurement signal input for receiving a second single-ended measurement signal, wherein the signal converter is implemented, when receiving a first one of the single-ended measurement signals, to convert either the first single-ended measurement signal or the second single-ended measurement signal into a combined differential measurement signal and provide the same at the differential measurement signal output. Here, the differential measurement signal includes a first differential portion which may be allocated to the first single-ended measurement signal and a second differential portion which may be allocated to the second single-ended measurement signal.
US09361484B2	Security processing apparatus and security processing method The position information acquisition unit acquires the first current position information of the multifunction peripheral and the second current position information of HDD. The position information determination unit executes the first determination whether or not the first current position information is identical with the first registered position information and the second determination whether or not the second current position information is identical with the second registered position information. The activation permission unit activates the multifunction peripheral and HDD when the current position information are identical with the registered position information based on the first and second determinations, or activates the multifunction peripheral only when the current position information is identical with the registered position information based on the first or second determination, or not activates the multifunction peripheral and HDD when the current position information are not identical with the registered position information based on the first and second determinations.
US09361480B2	Anonymization of streaming data Techniques are provided for anonymizing streamed data. In various embodiments, data are anonymized by receiving a data element of a data stream including a plurality of said data elements (pi, si), where pi comprises an identifying portion and si comprises an associated sensitive information portion; obtaining a partitioned space S including t regions; assigning the identifying portion, pi, to a selected region; encrypting the associated sensitive information si as e(si); and storing the encrypted associated sensitive information e(si) in a list associated with the selected region but not storing the associated identifying portion, pi, in the list. The regions have corresponding center points, and a nearest center to pi is optionally determined. The encrypted associated sensitive information e(si) may be stored in a list associated with the nearest center.
US09361479B2	Method and system for electronic content storage and retrieval using Galois fields and geometric shapes on cloud computing networks A method and system for electronic content storage and retrieval using Galois Fields and geometric shapes on cloud computing networks. Plaintext electronic content is divided into plural portions and stored in plural cloud storage objects based on a created Xth dimensional geometric shape and a path through selected components of the geometric shape. Storage locations for the plural cloud storage objects are selected using a Galois field and the geometric shape. The plural cloud storage objects are distributed across the cloud network. When the electronic content is requested, the plural portions are retrieved and transparently combined back into the original electronic content. No server network devices storing the plural cloud storage objects or target network devices requesting the stored electronic can individually determine locations of all portions of the stored electronic content on the cloud communications network, thereby providing various levels of security and privacy for the electronic content without having to encrypt the plaintext electronic content on the cloud network.
US09361476B2	Messaging systems and methods A messaging system for providing messaging service between or among user accounts includes a message database server. The message database server includes an account module to maintain user accounts and an upload module to receive message data from a user communication device associated with a user account. The message data may include a message and a share list that authorizes identified user accounts in which the message is to be shared. A single instance storage module may store the message as a single instance. A share module may share the message with the identified user accounts and delete the message at a predetermined time as specified in the share list.
US09361475B2	Automated attended self-service terminal (SST) operations A security level for an attendant at a Self-Service Terminal (SST) is automatically resolved. An operation is automatically processed on behalf of the attendant based on the resolved security level and a condition associated with the SST.
US09361474B2	Network filesystem asynchronous I/O scheduling Resource acquisition requests for a filesystem are executed under user configurable metering. Initially, a system administrator sets a ratio of N:M for executing N read requests for M write requests. As resource acquisition requests are received by a filesystem server, the resource acquisition requests are sorted into queues, e.g., where read and write requests have at least one queue for each type, plus a separate queue for metadata requests as they are executed ahead of any waiting read or write request. The filesystem server controls execution of the filesystem resource acquisition requests to maintain the ratio set by the system administrator.
US09361471B2	Secure vault service for software components within an execution environment Embodiments of apparatuses, articles, methods, and systems for secure vault service for software components within an execution environment are generally described herein. An embodiment includes the ability for a Virtual Machine Monitor, Operating System Monitor, or other underlying platform capability to restrict memory regions for access only by specifically authenticated, authorized and verified software components, even when part of an otherwise compromised operating system environment. The underlying platform to lock and unlock secrets on behalf of the authenticated/authorized/verified software component provided in protected memory regions only accessible to the authenticated/authorized/verified software component. Other embodiments may be described and claimed.
US09361468B2	Method and system for granting access to secure data Techniques described herein can be implemented as one or a combination of methods, systems or processor executed code to form embodiments capable of improved protection of data or other computing resources based at least in part upon limiting access to a select number of delegates. Limited access to cloud data based on customer selected or other criterion, reducing the possibility of security exposures and/or improving privacy is provided for.
US09361467B2	Owner-controlled access control to released data Implementations of the present disclosure include methods, systems, and computer-readable storage mediums for receiving, from a computing device used by an authenticated user, a validation request, the validation request including a first hash value and a first validation token, the first hash value being generated based on restricted content of a workflow object and the first validation token being associated with a first state of the workflow object, and determining that the authenticated user is authorized to request validation of the workflow object and, in response: decrypting the validation token to provide a second hash value, and determining that the second hash value is equal to both the first hash value and a third hash value and, in response, transmitting a validation response to the computing device, the validation response indicating that the workflow object is valid.
US09361466B2	Printer consumable locking In one example, a printer consumable is locked to a content provider. A document that includes content restricted by a provider is printed if the printer consumable is installed in the printer.
US09361465B2	Privacy-enhanced car data distribution In accordance with some embodiments, data may be collected from vehicles, and then reported to various subscribers with different levels of access privileges and pursuant different levels of security. In some embodiments, the data may be authenticated by a cloud service without revealing the identity of vehicle owner. This may provide enhanced privacy. At the same time, some types of the data may be encrypted for security and privacy reasons. Different information may be provided under different circumstances to different subscribers, such as the government, family members, location based services providers, etc.
US09361464B2	Versatile log system A versatile log system is disclosed for producing logs for documents or other objects. The system allows authorized users to configure a log table and at least one coupled table, validate log entries for the log table, and validate data records for the coupled table. When the system is installed with investigative identity data search algorithm, identity data processing algorithm, interactive data entry features, and phrase construction feature, it can significantly improve production efficiency and data accuracy.
US09361463B2	Detection of anomalous events A system is described for receiving a stream of events and scoring the events based on anomalousness and maliciousness (or other classification). The system can include a plurality of anomaly detectors that together implement an algorithm to identify low-probability events and detect atypical traffic patterns. The anomaly detector provides for comparability of disparate sources of data (e.g., network flow data and firewall logs.) Additionally, the anomaly detector allows for regulatability, meaning that the algorithm can be user configurable to adjust a number of false alerts. The anomaly detector can be used for a variety of probability density functions, including normal Gaussian distributions, irregular distributions, as well as functions associated with continuous or discrete variables.
US09361455B2	Security management in a networked computing environment An approach for addressing (e.g., preventing) detected network intrusions in a virtualized/networked (e.g., cloud) computing environment is provided. In a typical embodiment, users may group components/systems of an environment/domain according to a range of security sensitivity levels/classifications. The users may further configure rules for responding to security threats for each security sensitivity level/classification. For example, if a “highly dangerous” security threat is detected in or near a network segment that contains highly sensitive systems, the user may configure rules that will automatically isolate those systems that fall under the high security classification. Such an approach allows for more granular optimization and/or management of system security/intrusion prevention that may be managed at a system level rather than at a domain level.
US09361453B2	Validating an untrusted native code module A system that validates a native code module. During operation, the system receives a native code module comprised of untrusted native program code. The system validates the native code module by: (1) determining that code in the native code module does not include any restricted instructions and/or does not access restricted features of a computing device; and (2) determining that the instructions in the native code module are aligned along byte boundaries such that a specified set of byte boundaries always contain a valid instruction and control flow instructions have valid targets. The system allows successfully-validated native code modules to execute, and rejects native code modules that fail validation. By validating the native code module, the system facilitates safely executing the native code module in the secure runtime environment on the computing device, thereby achieving native code performance for untrusted program binaries without significant risk of unwanted side effects.
US09361452B2	Mobile credential revocation Managing validity status of at least one associated credential includes providing a credential manager that selectively validates associated credentials for at least one device, the device invalidating a corresponding associated credential, and the device requesting that the credential manager validate the corresponding associated credential after invalidating the associated credential. The associated credential may be invalidated based on an external event, such as a user invalidating the associated credential from a UI of the device, a user improperly entering a pin value, a user indicating that a corresponding device is lost, the device entering sleep mode, the device locking a user interface thereof, the device shutting down, and a particular time of day. The at least one associated credential may be provided on an integrated circuit card (ICC) that may be part of a mobile phone and/or a smart card.
US09361451B2	System and method for enforcing a policy for an authenticator device A system and method including defining at least one device authentication policy; at a policy engine, initializing authentication policy processing for an authenticator device; collecting device status assessment; evaluating policy compliance of the device status assessment to an associated defined device authentication policy; and enforcing use of the authenticator device according to the policy compliance.
US09361450B2	Authentication using mobile devices Technologies are generally described for authentication systems. In an example, an authentication system can be built among devices by sharing an image that is virtually torn into pieces. Each participant in the authentication system receives a piece of the image. The participants are authenticated when the pieces are later joined to form the original image.
US09361449B2	Platform integrity verification system and information processing device A platform integrity verification system capable of executing platform integrity verification by a trusted boot without causing a delay of system startup time. The platform integrity verification system has an information processing device and an integrity verification computer that is communicably connected to each other. The information processing device comprises an acquisition section acquires a unique value from each of a plurality of programs executed by the information processing device when the information processing device is shut down; and a storage section configured to store the unique value acquired by the acquisition section in a storage device. The integrity verification computer comprises a comparison section configured to acquire the unique value stored in the storage device through communication with the information processing device and compares the acquired unique value with a predetermined value held in advance for each program.
US09361447B1	Authentication based on user-selected image overlay effects A processing device comprises a processor coupled to a memory and is configured to implement an overlay effects selection interface for use in conjunction with generation of a graphical password. An image is obtained and presented in the overlay effects selection interface with a plurality of user-selectable overlay effects. User input is received identifying at least one overlay effect selected from the plurality of user-selectable overlay effects, and a modified version of the image is presented incorporating the selected at least one overlay effect. Information characterizing the image and the selected at least one overlay effect is utilized to control access to a protected resource. For example, the information characterizing the image and the selected at least one overlay effect may be obtained as part of a graphical password enrollment process and stored as at least a portion of the graphical password for controlling access to the protected resource.
US09361445B2	Multiline one time password A credential such as a One Time Password (OTP) can be proffered as a matrix of characters provided by a user. The verifier can accept that credential if it determines that the matrix is rank one. If it determines the matrix is not rank one, it can reject it or treat it as possibly corrupt due to one or more erroneous or missing entries. The verifier can factor the received matrix into two vectors and create a rank one projected matrix that is the product of the two vectors. The verifier can measure the distance between the received and projected matrices and accept the credential if the distance is within a distance threshold.
US09361444B2	Card for interaction with a computer A smart card comprising: a memory for storing information; at least one transmitting or receiving antenna; and a low frequency circuit, for handling information associated with said antenna and said memory, which information is modulated at a modulation frequency of between 5 kHz and 100 kHz. Preferably the antenna is an acoustic antenna.
US09361441B2	Multiple application chip card having biometric validation A smart card includes a plurality of application circuits that are each related to at least one application service securely contained within the card, each application circuit is energizable by an outside signal; a control unit making it possible to identify the energized application circuit and the related service and moreover to activate the service in response to activation authorization; and a biometric circuit for authenticating the user so as to generate the activation authorization.
US09361434B2	Shortcut management unit and method, and storage medium A shortcut management device capable of improving user-friendliness of a portal application. The shortcut management device is capable of executing shortcuts which use functions of an electronic apparatus, and manages at least part of the functions used by the shortcuts. A storage unit registers shortcuts. An invalidation detecting unit detects that the license is invalidated. A retrieval unit retrieves a shortcut made inexecutable in association with the license of which the invalidation is detected. An invalidation unit invalidates the retrieved shortcut.
US09361430B2	Determining disease state of a patient by mapping a topological module representing the disease, and using a weighted average of node data A medical general intelligence computer system and computer-implemented methods analyze morpho-physiological numbers for determining a risk of an emergent disease state, determining an emergent disease state, predicting a pre-emergent disease state, determining a pre-emergent disease state, and/or predicting a risk of a pre-emergent disease state.
US09361426B2	Copy number analysis of genetic locus Systems and methods for analyzing copy number of a target locus, detecting a disease associated with abnormal copy number of a target gene or a carrier thereof.
US09361421B2	Method and apparatus for placing and routing partial reconfiguration modules A method for designing a system on a target device includes assigning resources on the target device to static logic modules and partial reconfigurable (PR) modules in the system. The instances of one of the PR modules are placed and routed in parallel utilizing resources from those that are assigned. Other embodiments are also disclosed.
US09361411B2	System and method for selecting a respirator Apparatus and associated methods may relate to a system for predicting a respirator fit by comparing a specific respirator model to a specific facial model in a dynamic position. In an illustrative example, one or more dynamic positions may be generated by actual user movement and/or simulated user movement. For example, a facial model may be generated by altering a static model in view of actual and/or simulated movements. In various implementations, a facial model may be compared against a variety of respirator models from a respirator model database. In some implementations, a 3D representation of the respirator model may be displayed upon a 3D representation of the facial model. In some implementations, a color-coded facial display may characterize areas of comfort and discomfort with respect to the respirator model. For example, areas of comfort and discomfort may be objectively determined in view of an applied pressure by the respirator.
US09361409B2	Automatic driver modeling for integration of human-controlled vehicles into an autonomous vehicle network Automatic driver modeling is used to integrate human-controlled vehicles into an autonomous vehicle network. A driver of a human-controlled vehicle is identified based on behavior patterns of the driver measured by one or more sensors of an autonomous vehicle. A model of the driver is generated based on the behavior patterns of the driver measured by the one or more sensors of the autonomous vehicle. Previously stored behavior patterns of the driver are then retrieved from a database to augment the model of the driver. The model of the driver is then transmitted from the autonomous vehicle to nearby vehicles with autonomous interfaces.
US09361408B2	Memory system including key-value store According to one embodiment, a memory system including a key-value store containing key-value data as a pair of a key and a value corresponding to the key, includes an interface, a memory block, an address acquisition circuit and a controller. The interface receives a data write/read request or a request based on the key-value store. The memory block has a data area for storing data and a metadata table containing the key-value data. The address acquisition circuit acquires an address in response to input of the key. The controller executes the data write/read request for the memory block, and outputs the address acquired to the memory block and executes the request based on the key-value store. The controller outputs the value corresponding to the key via the interface.
US09361400B2	Method of improved hierarchical XML databases A method is provided for initializing an XML database. The method includes the steps of parsing an XML file to extract a plurality of records, the records arranged in a hierarchical form, creating, for each record, a plurality of class objects, each class having associated therewith one or more attributes, and creating a plurality of handling methods for each of one or more attributes associated with each class object, the handling methods defining how the database can be accessed.
US09361396B2	Adaptation of display pages for client environments An adaptation system adapts a web page, which is developed to be displayed by a web browser, to be displayed by client-side code of an application. When a web server receives a request for a web page, it determines whether the request was sent from a client device executing client-side code or from a non-client device executing a browser. If the request is from a client, then the web server uses the adaptation system to adapt the web page to the environment of the application. The adaptation system may modify the web page so that the menus of the web page are not displayed when the web page is displayed within a window of the application. The adaptation system may also modify links of the content of the web page to reference forms of the application, rather than other web pages.
US09361392B1	Comparing subsets of user identities of a social networking platform In one implementation, data associated with user identities is extracted from an electronic social networking platform. Based on the extracted data, at least some of the user identities are classified as fitting one or more of multiple different profiles. A first subset of user identities classified as fitting a first profile is identified. A second subset of user identities classified as fitting a second profile is identified. In addition, values for a particular characteristic associated with user identities identified as belonging to the first subset are identified, and values for the particular characteristic associated with user identities identified as belonging to the second subset are identified. A display then is caused that reflects the identified values for the particular characteristic associated with user identities identified as belonging to the first subset and the identified values for the particular characteristic associated with user identities identified as belonging to the second subset.
US09361376B2	Method for delivering query responses A method and computing program for providing a user computing platform with a response to a query, the response comprising indications to one or more Universal Resource Identifier optionally with instructions on how to get the relevant information from there, and how to format the response. Thus a user computing platform receives information directly from a content provider, whose rights are not infringed by the query engine. If payment or other limitations are imposed by the content provider or by the user, they are handled between the user and the content provider, without intervention by the query engine.
US09361372B2	System and method for providing broadcast listener participation A method of allowing listeners to participate in broadcast programming is provided, the method generally comprising one or more of providing a library of media elements accessible by a plurality of listeners; receiving from each of at least two of the listeners a playlist of media elements, wherein at least one of the media elements in each playlist is from the library of media elements; editing the playlists using broadcast scheduling software; providing the edited playlists to the plurality of listeners for playback, and for feedback regarding the playlists; and receiving feedback from at least one of the listeners regarding the playlists. A system and apparatus are similarly provided.
US09361369B1	Method and apparatus for clustering news online content based on content freshness and quality of content source Methods and apparatus are described for scoring documents in response, in part, to parameters related to the document, source, and/or cluster score. Methods and apparatus are also described for scoring a cluster in response, in part, to parameters related to documents within the cluster and/or sources corresponding to the documents within the cluster. In one embodiment, the invention may identify the source; detect a plurality of documents published by the source; analyze the plurality of documents with respect to at least one parameter; and determine a source score for the source in response, in part, to the parameter. In another embodiment, the invention may identify a topic; identify a plurality of clusters in response to the topic; analyze at least one parameter corresponding to each of the plurality of clusters; and calculate a cluster score for each of the plurality of clusters in response, in part, to the parameter.
US09361367B2	Data classifier system, data classifier method and data classifier program A data classifier system of the present invention selects a plurality of classifications correlated to data groups so as to output classification axes based on hierarchical classifications and data groups. The data classifier system includes a basic category accumulation means, a classification axis candidate creation means and a priority calculation means. The basic category accumulation means accumulates classifications serving as basic categories used for selecting desired classifications in advance. The classification axis candidate creation means creates classification axis candidates based on combinations of classifications each correlated to at least one data among descendant classifications of each basic category. The priority calculation means calculates priorities with respect to the classification axis candidates created by the classification axis candidate creation means based on hierarchical distances of classifications in the classified hierarchy.
US09361364B2	Universal data relationship inference engine While a user is viewing content on a computer display, the universal data relationship inference engine presents related information from disparate data sources. A normalized index is maintained that indexes content to a set of standard taxonomy terms. The inference engine parses content being viewed by the user. If the content includes tags for some of the standard taxonomy terms, then the system may provide the user with the ability to view the related content that is indexed by the normalized index. If there are not taxonomy tags then the system may attempt to recognize non-standard taxonomy terms in the content in order to provide the user with related content. The inference engine may also identify related content by identifying synonyms to the taxonomy terms.
US09361361B2	Interactively entering data into the database A system and method for facilitating the accurate entry of information into a highly structured database by initially extracting information from a plurality of nonuniformly formatted source data streams, e.g., documents/files, and subsequent interactions with users before storing the accepted and/or modified information into the database. Embodiments of the present invention provide an interactive path for each user (e.g., the author of the source document/file) to interactively modify the extracted data, e.g., according to the source document/file. Preferably, this interactive path is provided via the Internet and the extracted information can be modified by editing and/or selectively copying portions of the source documents/files to supplement and/or modify the extracted information.
US09361357B2	Searching of events derived from machine data using field and keyword criteria Methods and apparatus consistent with the invention provide the ability to organize and build understandings of machine data generated by a variety of information-processing environments. Machine data is a product of information-processing systems (e.g., activity logs, configuration files, messages, database records) and represents the evidence of particular events that have taken place and been recorded in raw data format. In one embodiment, machine data is turned into a machine data web by organizing machine data into events and then linking events together.
US09361354B1	Hierarchy of service areas Systems and methods of classifying structured and/or unstructured data. Hierarchical categorization is used when evaluating and providing data services. For instance, service level objectives may contain sub-levels associated with additional service level objectives. This hierarchal system enables an entity to create a more efficient structure for managing and mapping service level objectives to the various services offered by a data center or by service providers associated with a network. Higher service level objectives are groupings of sub service level objectives. Decisions for each data object can be made independently and the hierarchical arrangement enables conflicting service levels to be resolved. An entity can adequately categorize its data, thereby allowing the entity to better maintain and service the data according to its needs using an information management system.
US09361351B2	Data management via active and inactive table space containers Aspects distribute database data to table space containers as a function of active and inactive node designations. Different groups of active and inactive logical nodes are created in response to integrating a relational database on one or more physical servers. Database node groups are created by marking the active nodes as available for use in data storage and distribution, and the inactive nodes as unavailable. Table space is created for the relational database by defining containers for each of the active and inactive nodes.
US09361346B2	Mapping information stored in a LDAP tree structure to a relational database structure A method for mapping an information directory such as a LDAP directory tree to a relational database structure. The method includes accessing an information directory, which has a number of data entries at nodes of its tree structure and each of these entries may include a number of attributes defined by one or more object classes. The method includes storing a distinguished name (DN2ID) index table including generating records the data entries that include a DN field containing the entry's attributes. The method includes forming a relational table associated with each of the object classes defined for the information directory, and the records of the relational tables may be linked to the records/entries of the DN2ID index table. The method may include determining an entry identifier for each of the entries of the directory and storing these in the records of the DN2ID index table and in the relational tables.
US09361345B2	Method and system for automated analysis and transformation of web pages A method and system for modifying web pages, including dynamic web pages, based on automated analysis wherein web pages are transformed based on transformation instructions in nearly real-time, and wherein analysis is performed and transformation instructions based on the analysis are prepared prior to a request for the web page. The system has two primary components, an analyzer which asynchronously and repeatedly analyzes web pages creating and updating transformation instructions relating to the web pages, and a transformer which intercepts traffic to a web server in response to a request for the web page, receives the returned web pages, and transforms them based on stored transformation instructions.
US09361343B2	Method for parallel mining of temporal relations in large event file Disclosed herein is a method for parallel mining of temporal relations in a large event file using a MapReduce model. In the method for parallel mining of temporal relations in a large even file according to the present invention, an event file is sorted based on customer identification (ID) and event time at which each event has occurred. A set of large event types satisfying a preset support or more is generated from the event file. The event file is converted into a large event sequence including the large event type set. The large event sequence is summarized and then a time interval data file is created. Candidate temporal relations are generated from the time interval data file, and frequent temporal relations satisfying a preset support or more are derived from the candidate temporal relations. A temporal relation rule is generated from the derived frequent temporal relations.
US09361342B2	Query to streaming data A client computer buffers a continuous flow of streaming data during a sliding window that is defined by a time boundary. The client computer processes a query on a portion of the streaming data buffered during the time boundary of the sliding window and a portion of the streaming data stored in a data warehouse.
US09361339B2	Methods and systems for constructing q, θ-optimal histogram buckets A method and system to determine a q, θ-optimal histogram comprising a plurality of buckets over a data distribution where for any cardinality estimate made using the histogram the cardinality estimate is constrained to obey an acceptability criteria parameterized by q and θ that bounds a ratio error between the cardinality estimate and a true value of the cardinality, q being a factor by which the estimate deviates, at most, from a true value of the cardinality and θ being a threshold value which the cardinality does not exceed, wherein a maximum number of possible query intervals generated in determining the acceptability of the q, θ-optimal histogram is less than quadratic in the number of values.
US09361336B2	Methods and apparatus to manage virtual machines Methods and apparatus to manage virtual machines are disclosed. An example method includes deploying a virtual machine, storing deployment information about the virtual machine, including an associated workload, in a database, retrieving configuration information, including the deployment information from the database, and displaying, via a processor, the configuration information including an indication that the virtual machine is associated with other virtual machines that are associated with the workload.
US09361333B2	Reducing lock occurrences in server/database systems Limiting the number of concurrent requests in a database system. Arranging requests to be handled by the database system in at least one queue. Defining a maximum value (SS) of concurrent requests corresponding to the at least one queue. Monitoring at least one queue utilization parameter corresponding to the at least one queue and calculating a performance value based on the at least one queue utilization parameter. Adapting the maximum value (SS) of concurrent requests of the at least one queue dynamically based on the performance value (PF) in order to improve system performance. Limiting the number of concurrent requests of the at least one queue dynamically based on the dynamically adapted maximum value (SS).
US09361325B2	Governing information A method and system for governing information is provided. The method includes receiving, by a processor, data defining a scope and context of an information governance project and information requirements data associated with the data. The processor classifies the information requirements data into concepts in accordance with a meta-model profile. The processor generates conceptual models and realization models in accordance with the meta-model profile. Governance roles are defined and assigned to informational assets within the conceptual models The processor selects a final architecture option and generates policy models in accordance with the governance roles, the informational assets, the meta-model profile and user input. A final architecture option is deployed and monitored, and governance events triggered and reports generated in response to changes in this deployed architecture option.
US09361316B2	Information processing apparatus and phrase output method for determining phrases based on an image In one aspect, an information processing system for determining complimentary phrases to present to a recipient is provided. The information processing system may receive an input image depicting a subject. A difference in appearance between the subject depicted in the input image and a model subject may be determined. One or more phrases (e.g., complimentary phrases) may be selected from a plurality of categorized phrase candidates based on the identified difference in appearance between the subject and the model subject. The difference in appearance may be determined by comparing selected features (e.g., skin, hair, eyes) of the subject with one or more predetermined features of the model subject. The model subject may be the same or different than the subject depicted in the input image.
US09361315B2	Image display apparatus, image display system, and image display method An image display apparatus includes a location information generating unit that generates location information of index information stored in the server apparatus and location information of image data stored in the server apparatus; an index obtaining unit that obtains the index information from the server apparatus using the location information of the index information; a list screen generating unit that generates a list screen including information on the image data stored in the server apparatus using the index information and displays the list screen on a display unit; an image data obtaining unit that obtains the image data from the server apparatus using the location information of the image data that is selected by an operator from the list screen; and a display screen generating unit that generates a display screen of the obtained image data and displays the display screen on the display unit.
US09361310B1	Method and system for network user access impersonation for multi-threaded backup applications Network user access impersonation for multi-threaded backup applications is described. A backup application receives a first user identity and a second user identity of a set of user identities. The backup application calls a network file system service. The network file system service applies the first user identity to a first thread of a set of threads of a backup application. The network file system service applies the second user identity to a second thread of the set of threads of the backup application. The network file system service enables the first thread to access a first backup file on a first network storage device based on the first user identity. The network file system service enables the second thread to access a second backup file on a second storage device based on the second user identity.
US09361304B2	Automated data purge in an electronic discovery system Embodiments of the invention relate to systems, methods, and computer program products for automated data purge in an e-discovery system. The automated data purge process determines files within an e-discovery file system that qualify for purging based on one or more purge policies, locates the files within the file system and automatically purges the data from the file system. Additional embodiments provide for automatically creating log entries that track the details of the purge and automatically generating and communicating alerts/messages that notify concerned parties of the data purge. As such the present invention is able to accurately and automatically purge data from an electronic discovery file system and provide for detailed purge data tracking, as well as, purge notification.
US09361302B1	Uniform logic replication for DDFS In one embodiment, the storage system determines if a first format of a first segment tree of the first file system is different from a second format of a second segment tree of the second file system representing a file stored in the first and second file systems, respectively. The storage system identifies, in response to determining that the first and second formats are different, a second level within the first and second segment trees that have different formats. In one embodiment, the storage system further identifies one or more segments of the second level of the first segment tree that have been modified based on a comparison of fingerprints of a third level of the segment trees. For each modified second level segment, the storage system resegments the segment from the first to the second format, and replicates the resegmented segments to the target storage system.
US09361300B2	Controlling filling levels of storage pools Method, system, and computer program product embodiments of controlling filling levels of a plurality of storage pools are provided. A plurality of files is selected from each storage pool of the plurality of storage pools. Each file is then copied to a server and a list is updated. The list comprises an entry for each file of the plurality of files. Each entry comprises a status information. The status information indicates that the corresponding file has been copied to the server. Each entry further comprises an identifier indicating the storage pool on which the corresponding file is stored. If it is detected that the filling level of a storage pool reaches a predefined first threshold value, then a first set of files is determined by use of the list. Each file of the first set of files is replaced by a stub file. The status information is updated.
US09361297B2	Web service-based, data binding abstraction method A method for providing a data binding abstraction. The method includes serving an interactive document via a digital data communications network using a server. The method includes generating, with intelligence in the document, a data binding request to resolve a data value placeholder that has no static data location or source reference. With a data binding web service, the method includes generating a data dictionary request that includes a placeholder identifier. The method includes using the data binding web service to process a data dictionary response which includes placeholder content for the placeholder to determine a source of the data value. The method includes the data binding web service accessing the determined data source to obtain the data value and providing the interactive document with a response including the placeholder identifier and the resolved placeholder data value. The interactive document then replaces the placeholders with the returned data value.

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