最新美国发明专利第2016-05-03期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US09331451B2	Pump radiation arrangement and method for pumping a laser-active medium The disclosure relates to a pump radiation arrangement comprising: a pump radiation source for producing pump radiation, a means for stabilizing the wavelength of the pump radiation source and a laser-active medium through which the pump radiation passes in a bidirectional manner. The pump radiation arrangement also has a retro-reflector for reflecting pump radiation which is not absorbed by the laser-active medium back to the pump radiation source and a wavelength-selective element for preventing a wavelength destabilization of the pump radiation source by filtering out undesirable spectral portions of pump radiation which is not absorbed by the laser-active medium. The invention also relates to an associated method for pumping a laser-active medium.
US09331450B2	Laser apparatus A laser apparatus according to embodiments may include a laser chamber including a laser gain medium; a power source; a first electrode to which a voltage is applied from the power source and a second electrode that is grounded, the first and second electrodes being disposed in the laser chamber; and a connector connected to the power source, and supporting the first electrode in a way that allows the first electrode to move toward a side where the second electrode is disposed.
US09331447B2	Crimping apparatus having a crimp quality monitoring system A crimping apparatus includes a ram having crimp tooling for crimping a terminal to a wire during a crimp stroke and a force sensor detecting a crimp force during the crimp stroke. The crimping apparatus also includes a controller that monitors the crimp quality of a crimp based on a frequency profile of the crimp. Optionally, the controller may create the frequency profile based on a force profile using a frequency transform algorithm. The frequency transform algorithm may be a Fast Fourier Transform algorithm.
US09331446B2	Crimp tooling for a terminal crimping machine Crimp tooling for crimping a crimp barrel of an electrical terminal to a wire includes an insulation crimper having an insulation crimp profile for crimping an insulation barrel segment of the crimp barrel to insulation of the wire, a wire crimper having a wire crimp profile for crimping a wire barrel segment of the crimp barrel to a conductor of the wire, and a transition crimper between the wire crimper and the insulation crimper. The transition crimper has a blended profile segueing from the wire crimp profile to the insulation crimp profile. The blended profile is used for crimping a transition segment of the crimp barrel between the insulation barrel segment and the wire barrel segment.
US09331444B2	Docking sleeve with electrical adapter A docking sleeve having an elastomeric protective cover, or skin, adapted for partially enveloping a portable electronic device, such as a smartphone or tablet or another portable electronic device of the prior art having a port for a docking connector. The protective cover is a sheath molded of a suitable elastic or flexibly resilient elastomer in a size and shape to fit over and closely conform to the particular portable electronic device so that the cover fits the device like a surgical glove. An adapter is provided for electrically connecting to the female input/output socket of the particular electronic device, including a male plug having a plurality of electrical connectors extended internally of the sheath and arranged for mating with the female input/output socket of the device, and a plurality of contacts electrically coupled to different ones of the plurality of electrical connectors and exposed externally of the sheath.
US09331443B1	Apparatus for providing utility receptacles and cables at a selected location on a workstation An apparatus for providing HDMI cables and utility receptacles on a work surface. The apparatus has a housing which has an interior region, a lower portion and an upper portion. The upper portion has an opening that provides access to the interior region. The lower portion comprises wall sections attached to and extending downwardly from the upper portion. The upper portion has a flange portion that is angulated with respect to the wall sections. A bottom panel is attached to the wall sections. The housing is sized such that the lower portion fits into a through-hole in a work surface and the flange portion contacts and rests upon portions of the work surface extending about the through-hole in the work surface. A HDMI signal switching device is within the interior region and has a plurality of HDMI input connectors and an HDMI output connector. The apparatus includes at least one HDMI cable having a first HDMI connector connected to a corresponding HDMI input connector of the HDMI signal switching device and second HDMI connector for connection to an external HDMI signal source device. An HDMI output connector is attached to the bottom panel and connected to the HDMI output connector.
US09331442B2	Busbar connection A busbar connection includes first and second busbars each with a free end, and a shield device. The free ends of the busbars are directed towards each other and are in electrical contact with each other. The shield device envelopes the free ends of the busbars and is configured to steer the electrical field. The shield device includes a body of electrical conducting material. The body has two oppositely arranged contact surfaces in direct electrical contact with the free ends of the busbars. The body has a flange surrounding the contact surfaces and providing an upright edge around the contact surfaces.
US09331441B2	Power adapter with retractable prongs An electrical power adapter has first and second prongs that are retractable and deployable. When the prongs are in the deployed position the adapter may be mated with a receptacle and when in the retracted position the adapter has a reduced physical size. A linkage couples the first prong to the second prongs such that the first and second prongs retract and deploy simultaneously. An actuation mechanism causes the prongs to have a first detent in the deployed position and a second detent in the retracted position.
US09331439B2	Electrical connector assembly having simplified receptacle terminals An electrical connector assembly includes an receptacle connector, the receptacle connector includes a first insulative housing defining a mating surface and a first side surface extending along a first direction. A plurality of first terminals are retained in the first insulative housing and each defines a contacting plate fixed to the first insulative housing and a welding portion extending outside of the first insulative housing. The first insulative housing defines a plurality of mating holes running through the mating surface, a part of the contacting plate is exposed in the mating hole to form a contacting portion.
US09331437B2	High definition multimedia interface socket A high definition multimedia interface (HDMI) socket for fastening on a metallic chassis includes a main body, a connecting member and a plastic piece. The connecting member includes a slot portion and a bent portion. The slot portion has a first and a second ends. The first end is connected with the main body. The bent portion is connected with the second end and has a first abutting surface abutting against the inner surface. The plastic piece is connected with the main body and has two second abutting surfaces. When the first abutting surface abuts against the inner surface before the plastic piece is fastened on the metallic chassis, a gap exists between the second abutting surfaces and the inner surface. When the plastic piece is fastened on the metallic chassis, the plastic piece is deformed and the second abutting surfaces abut against the inner surface.
US09331434B2	Electrical connector with enhanced structure An electrical connector includes an housing and a plurality of first terminals. The housing includes a first side wall, a second side wall opposite to the first side wall and two end walls connecting with the first side wall with the second side wall. The first side wall defining a plurality of first terminal passageways arranged in an inner surface thereof. Every adjacent first terminal passageways being partitioned with spaced walls and the spaced walls and the inner surface of the first side wall being on a same plane, The first terminals accommodated in the first terminal passageways. Some of the spaced walls further integrally extend enhanced walls respectively to unitarily connect with the second side wall, thereby defining a base portion located at a rear portion of the housing and a mating cavity in front of the base portion.
US09331428B2	Connector mateable with mating connector and having lock structure including lock member and operation member which is operable to move lock member A connector is mateable with a mating connector comprising a mating fitting portion and a locked portion. The connector comprises a fitted portion and a lock structure arranged in a first direction. The fitted portion is fitted to the fitting portion under a mated state where the connector is mated with the mating connector. The lock structure includes a lock member and an operation member. The lock member has an operated portion and a lock portion. The operation member has an operation portion. The lock portion locks the locked portion under the mated state. Under the mated state, when the operation portion is moved from a first position toward a second position, the operated portion is operated and moved by the operation portion. The lock portion is moved in conjunction with the operated portion along a direction perpendicular to the first direction to unlock the locked portion.
US09331427B2	Electrical connecting device with spring connecting element with compact actuator and multi-pole connector comprising a plurality of said spring contacts Electrical connecting device including an insulating body with parallel longitudinal seats and, respectively adapted to accommodate a connecting element with spring terminal and an actuator pin with profile cam facing a spring of the terminal to cause the opening and closing of said terminal by means of sliding in the corresponding seat, said spring being a ring-shaped spring with a curved lower portion, a back ascending portion engageable by a protruding portion of said cam profile of the actuator pin and an upper portion with a slot adapted to receive at least one electrical conductor, characterized in that in said actuator pin a hollow seat delimited by two lateral walls is provided adapted to receive the aforementioned ascending leg of the spring-shaped ring in condition of maximum extroversion of the spring, i.e. upon empty closed terminal.
US09331425B2	Cable connector The subject matter of the invention is a cable connector (1) for electrically connecting an electric vehicle to a charging apparatus, wherein the cable connector (1) is designed to form an electric connection to a device connector (2) associated with the electric vehicle or the charging apparatus, the cable connector (1) has a latching means (4) which is designed in such a manner that a pair of cable connectors (1) and device connectors (2) connected to each other can be latched to each other by means of the latching means (4), and the cable connector (1) has a counter-contour (10) which is designed in such a manner that a locking means (8) associated with the device connector (2) for locking the latching means (4) against being unlatched can be prevented from being unlocked by the counter-contour (10).
US09331421B2	Waterproof electric connector module and its waterproof housing A waterproof electric connector module includes an insulated housing, an electric connector, a blocking plate, and a sealed structure. The insulated housing is formed in an elongated shape. A front entry and a rear entry are individually formed on two end sides of the insulated housing and disposed aligned with each other. A side opening is formed on a side of the insulated housing and communicates with the rear entry. The electric connector is disposed in the insulated housing and has a plurality of terminals which extend and protrude from the side opening. The blocking plate blocks the rear entry. The sealed structure fills and seals the side opening. The terminals individually penetrate through the sealed structure. The waterproof housing can be sealed through the blocking plate and the sealed structure.
US09331419B2	Electric connector The electric connector including a housing formed with a plurality of holes into each of which a terminal is inserted, the holes being aligned in a line in a first direction, a rear holder connected to the housing through a hinge such that the rear holder is rotatable relative to the housing, a first engagement unit for connecting the rear holder and the housing to each other, the first engagement unit being arranged at at least one of opposite ends in the first direction, and a second engagement unit for preventing the rear holder and the housing from separating from each other after the rear holder and the housing are connected to each other, the second engagement unit being situated between the holes located adjacent to each other.
US09331418B2	Mini serial attached SCSI high density connector A mini SAS HD connector comprises: front and rear housings combined together, wherein the rear housing comprises first and second rear shell pieces; a positioning mechanism disposed between the first and second rear shell pieces and providing a positioning effect; a first combination mechanism disposed between the front and rear housings and providing a combination effect when the front and rear housings are combined; and combinations of a first inner module, a second inner module and circuit boards. The combination of the first inner module and the circuit board is mounted in the first rear shell piece. The combination of the second inner module and the circuit board is mounted in the second rear shell piece. Stopper mechanisms are provided between the first inner module, the second inner module and the circuit boards, so the circuit boards have no distinct displacement due to plugging and unplugging operations of the connector.
US09331417B2	Electronic devices with housing port shutters An electronic device may have a housing in which a display and other components are mounted. Audio components such as a speaker and microphone and other electrical components may be mounted in an interior portion of the housing. A housing port may be formed from one or more openings that pass through the housing. The audio component or other component may be aligned with the housing port. A shutter may be interposed between the audio component and the housing port. The shutter may have an electrically controlled positioner that is used to position a movable shutter member. The shutter may be closed by placing the shutter member in a position in which the housing openings are blocked, thereby preventing intrusion of contaminants into the interior portion of the housing. The shutter may be opened by placing the shutter member in a position in which the housing openings are unblocked, thereby allowing sound to pass through the housing port.
US09331407B2	Connector and connector system with grounding system A connector system is disclosed that includes a first and second connector. The first connector supports a channel terminal that is U-shaped and includes a mating edge. The second connector includes one or more wafers that support terminals arranged in an edge-coupled manner. Ground terminals in the one or more wafers are configured to engage the mating edge of the channel terminal. Each wafer can include a shield mounted on a side of the wafer. If desired, the ground terminal, the channel terminal and the shield can be electrically connected in the mating interface.
US09331405B2	Interface connector A connector system includes an interface connector having a housing having a main body holding a contact array therein. The housing extends between a front end and a back end along a mating axis. The housing includes a cavity therein open to the front end and open to the back end. The cavity is situated proximate to a side of the housing. The cavity has a receiving channel open to the side of the housing. The receiving channel has mounting shoulders at least partially extending therein. The interface connector also includes a fastener having a retention surface. The fastener is configured to be side-loaded into the receiving channel through the side of the housing. The mounting shoulders engage the fastener within the cavity to limit transaxial movement of the fastener along the mating axis.
US09331403B2	Bulb socket and lighting device A pair of terminal portions of a bus bar (i.e. a terminal clamp) includes spring portions each of which is arranged to exert a pushing force in a direction of sandwiching a base portion of a bulb, and contact portions each provided at a tip portion of the spring portion. A housing (i.e. a socket body) includes regulation portions located on opposite side of the terminal portions and arranged to abut on the terminal portions from opposite side of the base portion to regulate elastic deformation amount of the spring portions to be within a predetermined value.
US09331402B2	Conductive sleeved fastener assembly The present disclosure describes a conductive fastener assembly, system, and method, wherein the fastener assembly comprises a fastener, a fastener sleeve, a nut, and a lubricant coating. The lubricant coating is deposited on a distal portion of a fastener shank and is omitted from the rest of the fastener. To overcome the stresses placed on the fastener sleeve by the insertion of the fastener shank largely devoid of a lubricant coating, the fastener sleeve is reinforced by one or more of an increased thickness, a high-strength alloy, and a soft metal coating.
US09331395B2	Antenna provided with fall-out preventing arrangement Provided is an antenna, including: a dielectric support portion mounted to a tip of a waveguide; and a reflector bonded and fixed to the dielectric support portion. The dielectric support portion includes: an accommodating portion accommodating the reflector therein; and a fall-off preventing arrangement preventing the reflector from falling off under a state in which the reflector is accommodated in the accommodating portion.
US09331394B2	Reflector systems having stowable rigid panels Reflector systems (10) comprising a reflector (11) formed from rigid panels (14) mounted on a centrally-located hub (12) are provided. The panels (14) can be stowed in a relatively compact manner in which the panels (14) overlap. The panels (14) can translate with a combination of rotational and linear motion so that the panels (14) become disposed in a side by side relationship, thereby deploying the reflector (11) so that the reflector (11) can focus electromagnetic energy incident thereupon.
US09331393B2	Front feed satellite television antenna and satellite television receiver system thereof A front feed satellite television antenna includes a metamaterial panel. The metamaterial panel includes a core layer and a reflective panel. The core layer includes a core layer lamella which further includes a circular area and multiple annular areas distributed around the circular area. Within the circular area and the annular areas, refractive indexes are identical at a same radius, and within the respective areas, the refractive indexes decrease gradually as radius increases. The minimum refractive index of the circular area is less than the maximum the refractive index of the annular area adjacent thereto. For two adjacent annular areas, the minimum refractive index of the annular area at the inner side is less than the maximum refractive indexes of the annular area at the outer side. The metamaterial panel can replace conventional parabolic antenna, thus facilitating manufacturing and processing, and further reducing costs.
US09331390B2	Antenna assemblies According to various aspects, exemplary embodiments are disclosed of antenna assemblies. In an exemplary embodiment, an antenna assembly generally includes a feed network and a ground plane. Radiating dipoles or dipole radiating elements are along or on opposite sides of the feed network and the ground plane. The radiating dipoles or dipole radiating elements may be operable simultaneously and co-locate radio frequency currents for a first frequency band and a second frequency band.
US09331386B2	Beamformed downlink communications for a multiple antenna system Some example embodiments presented herein are directed towards an eNodeB, and corresponding method therein, for establishing beamforming for downlink communications in a multiple antenna system. The eNodeB may transmit a plurality of reference signals, where each reference signal is beamformed into a distinct direction with in at least one correlated domain (e.g., an elevation and/or azimuth domain). The eNodeB may generate beamformed downlink communications for antenna elements and/or subelements based on received signal quality assessments of the plurality of reference signals. Some example embodiments may be directed towards a user equipment, and corresponding methods therein, for establishing beamforming for downlink communications. The user equipment may receive the plurality of reference signals and provide signal assessments of the reference signals based on measurements performed by the user equipment. The user equipment may transmit the signal quality assessments to the eNodeB and receive beamformed downlink communications based on the signal quality assessments.
US09331384B2	Battery antenna having a secondary radiator A combination battery and antenna includes a battery having a positive contact and a negative contact, at least one of the positive contact and the negative contact comprising an antenna coupled to a matching circuit and to a radio frequency choke, whereby direct current (DC) is supplied to a battery circuit and a radio frequency (RF) signal is supplied to an RF circuit, and at least one secondary radiator parasitically coupled to the at least one of the positive contact and the negative contact of the battery.
US09331381B2	Method and apparatus for tunable antenna and ground plane for handset applications An embodiment is directed to a device comprising an antenna, a chassis configured to be electrically coupled to the antenna and comprising a slot loaded with at least one tunable component, wherein: the slot is aligned along a longitudinal edge of the chassis, the slot is formed in an area of the chassis based on an identification of currents in the area, and the antenna and chassis are electrically connected at a location based on the area.
US09331379B2	Mobile device and manufacturing method thereof A mobile device includes a substrate, a ground element, and a radiation branch. The ground element includes a ground branch, wherein an edge of the ground element has a notch extending into the interior of the ground element so as to form a slot region, and the ground branch partially surrounds the slot region. The radiation branch is substantially inside the slot region, and is coupled to the ground branch of the ground element. The ground branch and the radiation branch form an antenna structure.
US09331376B2	Basal-pivoting underwater RFID antenna assembly An underwater basal-pivoting antenna assembly (or array thereof) suitable for subsurface RFID tag interrogation in flowing water such as a river. In preferred embodiments, the antenna interrogates RFID tags implanted in aquatic species. The antenna resides in an elongate antenna housing whose cross-sectional shape is preferably a hydrodynamic teardrop shape. When the assembly is deployed in water with a lower end thereof anchored below an upper end, the lower end of the housing is linked to a pivot/swivel mechanism such that when the pivot/swivel mechanism is held substantially stationary with respect to the water flow, the upper end of the housing is free to rotate generally about the first end, including in a substantially vertical plane parallel to the water flow direction. The length of the antenna housing is advantageously selected to enable the antenna to monitor for signals across substantially the entire water depth.
US09331373B2	Directional coupler Disclosed is a directional coupler including a first hollow portion that is disposed in a first ground conductor and is arranged directly above a first signal conductor and a second signal conductor, and that is constructed of a discontinuous structure that has a function of delaying the phase and that is small with respect to the one-quarter wavelength of an operating frequency.
US09331370B1	Multilayer integrated circuit packages with localized air structures Integrated circuit packages with stripline structures are provided. An integrated circuit package substrate may include a core layer having top and bottom surfaces and dielectric layers formed on the top and bottom surfaces of the core layer. Stripline structures may be formed in at least some of the dielectric layers. A stripline trace may include signal routing conductors sandwiched between top and bottom ground planes. In particular, a dielectric layer may be formed between the signal conductors and the bottom ground plane to support the signal conductors, whereas a localized air region may be formed over the signal routing conductors separating the signal conductors from the top ground plane. If desired, the region above the signal routing conductors between the top ground plane and the signal routing conductors may be filled using other types of material having low loss and/or a dielectric constant that is frequency independent.
US09331368B2	Battery module A battery module has at least four battery cells that are cooled via a cooling plate arranged between them. Fins project on the cooling plate and at the same time serve as stops for individual battery cells. As a result, a powerful and very rigid battery module is provided that is of structurally simple construction.
US09331367B2	Middle and large-sized battery pack having improved cooling efficiency Disclosed herein is a middle- or large-sized battery pack including a module assembly constructed in a structure in which a plurality of battery modules, each of which includes a plurality of battery cells or unit modules mounted in a module case while the battery cells or unit modules are connected in series to each other, are arranged such that the battery modules are disposed in contact with each other in the lateral direction, and a coolant flow channel is vertically formed, a plurality of support members for supporting opposite sides and the bottom of the module assembly and maintaining the arrangement state of the module assembly, and a pack housing for surrounding the module assembly and the support members.
US09331366B2	Battery arrangement and method for cooling a battery A battery arrangement has a battery (10, 100, 200) having battery cells (11, 111, 211) with in each case two terminals (12, 112, 212) and a terminal plate (15, 115, 215), on which a terminal (12, 112, 212) of each battery cell (11, 111, 211) is arranged to connect the battery cells (11, 111, 211). A perforated plate (16, 216) is arranged above the terminal plate (15, 115, 215). A cooling medium is sprayed through the holes (17, 217) of the perforated plate (16, 216).
US09331364B2	Lithium sulfur battery pulse charging method and pulse waveform Provided are methods and apparatus for charging a lithium sulfur (Li—S) battery. The Li—S battery has at least one unit cell comprising a lithium-containing anode and a sulfur-containing cathode with an electrolyte layer there between. One method provides controlled application of voltage pulses at the beginning of the charging process. An application period is initiated after a discharge cycle of the Li—S battery is complete. During the application period, voltage pulses are provided to the Li—S battery. The voltage pulses are less than a constant current charging voltage. Constant current charging is initiated after the application period has elapsed.
US09331362B2	Battery having electrode with carbon current collector The battery includes an electrode having an active medium on a current collector. The active medium includes one or more active materials. The current collector includes or consists of carbon nanotubes. The electrical conductivity and weight of carbon nanotubes permit the weight of the battery to be reduced while the energy density and the power density of the battery are increased.
US09331353B2	Proton-conducting composite membrane for fuel cells The present invention relates to a membrane that includes a porous polymer material made of a polyimide with interconnected macropores and impregnated with protic ionic liquid conductors (CLIP), as well as to the method for manufacturing same and to the uses thereof. The membranes of the invention fulfill the need for membranes including CLIPs, which have good proton-conducting properties as well as good physical properties, in particular high thermal and mechanical stability, in addition to a wide range of electrochemical stability.
US09331352B2	Sulfonated perfluorocyclopentenyl polymers and uses thereof An aspect of the invention is directed to a polymer comprising a sulfonated perfluorocyclopentyl compound. Another aspect of the invention is directed to a sulfonated copolymer comprising one or more sulfonated polymers. A further aspect of the invention is directed to membranes prepared from the polymers of the claimed invention.
US09331342B2	Electrochemical systems and methods of operating same This disclosure relates to electrochemical systems, e.g., a combination of an electrical energy source and an electrical energy storage system having a regenerative fuel cell system, that exhibit operational stability in harsh environments, e.g., both charging and discharging reactions in a regenerative fuel cell in the presence of an acid or a mixture of acids, or a halogen ion or a mixture of halogen ions. The electrochemical systems are capable of conducting both hydrogen evolution reactions (HERs) and hydrogen oxidation reactions (HORs) in the same system. The electrochemical systems have low cost, fast response time, and acceptable life and performance. This disclosure also relates to methods of operating the electrochemical systems containing a regenerative fuel cell system.
US09331340B2	Catalytic ink preparation method A catalytic ink preparation method comprises mixing a first ion conducting body and a catalyst, preparing a first ink, and concentrating the first ink. The method is characterized by further comprising a step of adding a second ion conducting body to the concentrated first ink. With such a catalytic ink preparation method, the quantity of solvent in the first ion conducting body is reduced by concentration. In other words, the first ion conducting body adheres to the catalyst, and re-dissolution is not prone to occurring with the first ion conducting body when the second ion conducting body is added. Thus, it is possible to efficiently manufacture an electrode catalyst in which a significant part of the surface of the catalyst is covered with two ionomer layers, and there is almost no portion which is covered with only one ionomer layer.
US09331339B2	Perforated aluminium foil and manufacturing method thereof An object of the present invention is to provide an aluminum foil having a plurality of through holes and a desired foil strength, and a manufacturing method thereof. The high-strength perforated aluminum foil of the present invention includes a plurality of through holes extending from a front surface to a back surface of the foil, and has: (1) a foil thickness of 50 μm or less; and (2) a tensile strength of [0.2×foil thickness (μm)] N/10 mm or more. The method of manufacturing a high-strength perforated aluminum foil of the present invention is characterized in that a perforated aluminum foil having a plurality of through holes is either embossed, or simultaneously stretched and bent.
US09331334B2	Solid solution lithium-containing transition metal oxide and lithium ion secondary battery A solid solution lithium-containing transition metal oxide includes a compound represented by chemical formula (1): Li1.5[NiaCobMnc[Li]d]O3, where a, b, c and d satisfy relationships: 0.39≦a<0.75, 0≦b≦0.18, 0
US09331332B2	Nonaqueous electrolyte battery and battery pack According to one embodiment, there is provided a nonaqueous electrolyte battery including a positive electrode, a negative electrode, and a nonaqueous electrolyte. The negative electrode includes a first negative electrode active material containing a monoclinic β-type titanium composite oxide and a second negative electrode active material. The second negative electrode active material causes insertion and release of lithium ion in a potential range from 0.8 V to 1.5 V (vs. Li/Li+).
US09331330B2	Composite anode structure for high energy density lithium-ion batteries An electrode includes a conductive substrate and a plurality of conductive structures providing a compressible matrix of material. An active material is formed in contact with the plurality of conductive structures. The active material includes a volumetrically expanding material which expands during ion diffusion such that the plurality of conductive structures provides support for the active material and compensates for volumetric expansion of the active material to prevent damage to the active material.
US09331328B2	Prosthetic cardiac valve from pericardium material and methods of making same A prosthetic stented heart valve which includes a compressible and expandable stent structure having first and second opposite ends, an expanded outer periphery, and a compressed outer periphery that is at least slightly smaller than the expanded outer periphery when subjected to an external radial force. The valve further includes a valve segment comprising a dual-layer sheet formed into a generally tubular shape having at least one longitudinally extending seam, and a plurality of leaflets formed by attachment of an outer layer of the dual-layer sheet to an inner layer of the dual-layer sheet in a leaflet defining pattern. The valve segment is at least partially positioned within the stent structure. The valve may further include at least one opening in the outer layer of the dual-layer sheet that is spaced from both the first and second ends of the stent structure.
US09331327B2	Secondary battery pack Disclosed is a secondary battery pack including a battery cell having a cathode and anode terminal formed at one face having a sealed surplus portion and a protection circuit module (PCM) electrically connected to the cell via the cathode and anode terminal, wherein the PCM includes a board having a cathode terminal connection part connected to the cathode terminal and an anode terminal connection part connected to the anode terminal and an electrically insulative case configured to receive the board through an open face thereof. The board, connected to the cathode terminal and anode terminal of the battery cell via the cathode terminal connection part and the anode terminal connection part, is mounted to the sealed surplus portion of the cell in a state in which the board is disposed in the case so that the cathode and anode terminal are exposed through the open face of the case.
US09331324B2	Connector assembly and battery pack having the same The present invention relates to a connector assembly and a battery pack having the same. For this purpose, provided are a connector assembly with optimized size and mounting area of the connector assembly serving as a current-carrying medium of the battery pack, and improved bond strength between the connector terminal and the housing, and a battery pack having the same.
US09331320B2	Large format electrochemical energy storage device housing and module An assembly includes non-load bearing housings, each housing including several cavities. Each cavity includes a stack of freely stacked electrochemical storage cells in the housings. Each electrochemical storage cell includes an anode electrode, a cathode electrode, and a separator located between the anode electrode and the cathode electrode. The assembly is configured such that pressure applied to the assembly is born by the freely stacked electrochemical storage cells.
US09331316B2	Battery cell holder A battery cell holder is disclosed. In one embodiment, the holder includes first and second outer frames respectively positioned at first and second sides of a plurality of battery cells arranged substantially parallel with each other, wherein the first and second sides are opposing each other, and wherein the outer frames comprise first and second outer fastening members, respectively. The cell holder may further include at least one inner frame disposed between the outer frames, wherein the at least one inner frame comprises a first inner frame adjacent to the first outer frame, wherein the first inner frame has first and second inner fastening members which are respectively formed at opposing sides thereof and have corresponding shapes with respect to each other. The first inner fastening member may be connected to the first outer fastening member.
US09331315B1	Solderless battery contact Described in this disclosure are battery contacts for use in electronic devices usable without soldering to a circuit board. The battery contact includes one or more contact features supported by leaf springs. The contact features touch a corresponding pad on the circuit board at time of assembly, providing an electrically conductive pathway. One or more of the battery contacts may include a spring-biased member configured to apply pressure to one or more batteries.
US09331313B2	Battery pack of compact structure Disclosed herein is a battery pack including a battery cell array including two or more battery cells, each of which has an electrode assembly of a cathode/separator/anode structure disposed in a battery case together with an electrolyte in a sealed state, arranged in the lateral direction, a protection circuit module (PCM) connected to the upper end of the battery cell array to control the operation of the battery pack, a pack case in which the battery cell array and the protection circuit module are disposed, and a spacer mounted between the pack case and the battery cell array to provide a space accommodating the increase in thickness of the battery cell array during charge and discharge of the battery pack.
US09331312B2	Secondary battery A secondary battery including: an electrode assembly; a case containing the electrode assembly; a cap plate covering an opening of the case; a safety device on the cap plate and including a first lead; and an electrode terminal electrically connecting the electrode assembly and the first lead, the cap plate including a conductive member and an insulating portion, and the first lead is supported on the insulating portion, and the conductive member and the insulating portion being integrally formed.
US09331305B2	Electronic element sealing method and bonded substrate [Problem] The aim of the invention is to provide a method of sealing an electronic element such as an organic EL element using a normal temperature bonding method that enables bonding at low temperature and in which permeation of external gases such as hydrogen or oxygen through the sealed section (dam) formed by the organic material, or the junction interface of the sealed section and a cover substrate is suppressed. [Solution] A method of sealing an electronic element comprises a step of forming a sealing section by forming a sealing section including an organic material on the surface of a first substrate formed with the electronic element, surrounding this electronic element with a thickness that is larger than that of this electronic element; a step of forming a first inorganic material layer in which a first inorganic material layer is formed at least on the exposed surface of this sealing section; and a substrate bonding step of bonding the first substrate and the second substrate by pushing together the sealing section of the first substrate and the junction location of the second substrate.
US09331304B2	Organic light-emitting display device and method of manufacturing the same An organic light-emitting display device and a method of manufacturing the same are disclosed. The organic light-emitting display device (OLED) may include a first substrate with an element region and an encapsulation region surrounding the element region, a second substrate facing the first substrate, an organic light-emitting element interposed between the first substrate and the second substrate and formed in the element region, and an encapsulant interposed between the first substrate and the second substrate and formed in the encapsulation region. The encapsulant may include both a first encapsulant and a second encapsulant. The second encapsulant formed within the first encapsulant and is adjacent to at least one of the first substrate and the second substrate.
US09331302B2	Blue light emitting device and light emitting device A blue light emitting device includes an electrode layer, a first metal layer, a second metal layer formed between the electrode layer and the first metal layer, and an organic material layer formed between the first metal layer and the second metal layer and including a blue shift light emitting sub-layer. A peak of a first light-emitting spectrum of the blue shift light emitting sub-layer, which ranges within 490-550 nm, is shifted to a peak of a second light-emitting spectrum, which is less than 510 nm, by the surface plasmon coupling between the first metal layer and the second metal layer. A light emitting device is further provided, which is sequentially stacked with a first metal layer, an organic material layer having a blue shift light emitting sub-layer, a second metal layer having a metal portion and an opening portion, an electrode layer, and a light emitting layer doped with a dopant material, to emit white light.
US09331300B2	Thin film transistor and organic light emitting diode display including the same A thin film transistor includes a semiconductor formed on a substrate and having a source region, a first drain region spaced apart from the source region by a first current channel, and a second drain region spaced apart from the source region by a second current channel which has the different length from that of the first current channel, a gate electrode insulated from the semiconductor by a gate insulating layer, a source electrode connected to the source region of the semiconductor, a first drain electrode connected to the first drain region of the semiconductor, a second drain electrode connected to the second drain region of the semiconductor, and a bypass line electrically connecting the first drain region and the second drain region.
US09331293B2	Floating-gate transistor photodetector with light absorbing layer A field effect transistor photodetector that can operate in room temperature includes a source electrode, a drain electrode, a channel to allow an electric current to flow between the drain and source electrodes, and a gate electrode to receive a bias voltage for controlling the current in the channel. The photodetector includes a light-absorbing material that absorbs light and traps electric charges. The light-absorbing material is configured to generate one or more charges upon absorbing light having a wavelength within a specified range and to hold the one or more charges. The one or more charges held in the light-absorbing material reduces the current flowing through the channel.
US09331292B2	Perovskite and other solar cell materials Photovoltaic devices such as solar cells, hybrid solar cell-batteries, and other such devices may include an active layer disposed between two electrodes, the active layer having perovskite material and other material such as mesoporous material, interfacial layers, thin-coat interfacial layers, and combinations thereof. The perovskite material may be photoactive. The perovskite material may be disposed between two or more other materials in the photovoltaic device. Inclusion of these materials in various arrangements within an active layer of a photovoltaic device may improve device performance. Other materials may be included to further improve device performance, such as, for example: additional perovskites, and additional interfacial layers.
US09331287B2	Organic light emitting diode The present invention relates to an organic light emitting diode and a method of manufacturing the same. An organic light emitting diode according to the present invention comprises an exciton blocking layer comprising a compound represented by Formula 1 to confine an exciton to a light emitting layer to prevent light emitting leakage, and thus there is an effect of implementing an organic electroluminescence diode having excellent light emitting efficiency. Accordingly, it is possible to implement an organic light emitting diode having a simple and economical manufacturing process, a low voltage, high efficiency, and a long life span as compared to the related art.
US09331286B2	Organic electroluminescent compounds and organic electroluminescent device using the same The present disclosure relates to an organic electroluminescent compound employed as a hole transport material or a hole injection material and an organic electroluminescent device including the same. The organic electroluminescent compound is represented by [Chemical Formula 1] and an organic electroluminescent device employing the organic electroluminescent compound as a hole transport material exhibits very superior luminous efficiency and lifetime characteristics.
US09331282B2	Conjugated polymer, and electron donating organic material, material for photovoltaic device and photovoltaic device using the conjugated polymer The objective of the present invention is to provide a photovoltaic device which has high photoelectric conversion efficiency and an electron-donating organic material which comprises a conjugate polymer having a structure of a thieno[3,4-b′]thiophene skeleton with an alkoxycarbonyl group in which a specific alkyl group part is a straight chain alkyl group or an alkanoyl group in which the alkyl group part is a straight chain alkyl group and a benzo[1,2-b:4, 5-b′]dithiophene skeleton with a heteroaryl group.
US09331280B2	Transparent electrochromic polyimide, method for manufacturing the same, and electrochromic device utilizing the same Disclosed is a transparent electrochromic polyimide, polymerized of a diamine and a cycloaliphatic dianhydride. The diamine includes a diamino triphenylamine having the formula: wherein R1 consists of hydrogen, halogen, C1-6 alkyl group, C1-6 alkoxy group, or and R2 consists of hydrogen, halogen, C1-6 alkyl group, or C1-6 alkoxy group. The cycloaliphatic dianhydride includes
US09331269B2	Spin transfer torque memory cells Spin transfer torque memory cells and methods of forming the same are described herein. As an example, spin transfer torque memory cells may include an amorphous material, a storage material formed on the amorphous material, wherein the storage material is substantially boron free, an interfacial perpendicular magnetic anisotropy material formed on the storage material, a reference material formed on the interfacial perpendicular magnetic anisotropy material, wherein the reference material is substantially boron free, a buffer material formed on the reference material and a pinning material formed on the buffer material.
US09331263B2	Piezoelectric motor, drive unit, electronic part transfer apparatus, electronic part inspection apparatus, robot, and printer A piezoelectric motor includes a piezoelectric element, an oscillating plate including the piezoelectric element, a driving projection provided at an end of the oscillating plate, and a driven member driven by the driving projection coming into abutment therewith and is characterized in that Young's modulus E1 of the driving projection and Young's modulus E2 of the driven member are different.
US09331262B2	Thin film piezoelectric element, thin film piezoelectric actuator, thin film piezoelectric sensor, hard drive disk, and inkjet printer device A thin film piezoelectric element according to the present invention includes a potassium sodium niobate thin film having a structure in which a plurality of crystal grains are present in a film thickness direction; and a pair of electrode films sandwiching the potassium sodium niobate thin film. When the potassium sodium niobate thin film is divided into three regions of the same thickness in the film thickness direction and average crystal grain sizes A1, A2, and A3 of the respective regions are determined, a ratio m/M of the smallest average crystal grain size m among A1, A2, and A3 to the largest average crystal grain size M among A1, A2, and A3 is 10% to 80%. The region having the smallest average crystal grain size m lies next to one of the pair of electrode films.
US09331258B2	Solar thermoelectric generator Solar thermoelectric generators (STEGs) are solid state heat engines that generate electricity from concentrated sunlight. A novel detailed balance model for STEGs is provided and applied to both state-of-the-art and idealized materials. STEGs can produce electricity by using sunlight to heat one side of a thermoelectric generator. While concentrated sunlight can be used to achieve extremely high temperatures (and thus improved generator efficiency), the solar absorber also emits a significant amount of black body radiation. This emitted light is the dominant loss mechanism in these generators. In this invention, we propose a solution to this problem that eliminates virtually all of the emitted black body radiation. This enables solar thermoelectric generators to operate at higher efficiency and achieve said efficient with lower levels of optical concentration. The solution is suitable for both single and dual axis solar thermoelectric generators.
US09331255B2	Housing that includes reflector part and housing material formed with plastic material A method can be used to produce a housing for an optoelectronic semiconductor device. A reflector part, which has an inner area configured to reflect electromagnetic radiation, is encased in places with a housing material using an injection molding method. The inner area of the reflector part remains free of the housing material at least in places. The reflector part is formed with a first plastic material and the housing material is formed with a second plastic material that is different than the first plastic material. The first plastic material and the second plastic material differ from one another with regard to at least thermal stability or resistance to electromagnetic radiation.
US09331251B2	Light emitting device To provide a light emitting device that can suppress the increase in pits and projections caused by the thermal history of the reflective film on the surface of the reflective film used in the light emitting device, the light emitting device includes: a light emitting element; and a reflective film for reflecting light from the light emitting element, in which the reflective film contains silver as a principal component, and nanoparticles of an oxide.
US09331239B1	Light-emitting device A light-emitting device is provided. The light-emitting device comprises a light-emitting stack comprising a first cladding layer of n type, a second cladding layer of p type, and an active layer between the first cladding layer and the second cladding layer wherein the active layer comprises a well layer interposed between adjacent barrier layers. The light-emitting device further comprises a means for reducing a flicker noise of the light-emitting device.
US09331238B2	Semiconductor layer sequence, optoelectronic semiconductor chip and method for producing a semiconductor layer sequence In at least one embodiment, the semiconductor layer sequence (1) is provided for an optoelectronic semiconductor chip (10). The semiconductor layer sequence (1) contains at least three quantum wells (2) which are arranged to generate electromagnetic radiation. Furthermore, the semiconductor layer sequence (1) includes a plurality of barrier layers (3), of which at least one barrier layer is arranged between two adjacent quantum wells (2) in each case. The quantum wells (2) have a first average indium content and the barrier layers (3) have a second, smaller, average indium content. A second average lattice constant of the barrier layers (3) is thereby smaller than a first average lattice constant of the quantum wells (2).
US09331237B2	Semiconductor light emitting device, including a plurality of barrier layers and a plurality of well layers, and method for manufacturing the same According to one embodiment, a semiconductor light emitting device includes first and second semiconductor layers, and a light emitting unit. The light emitting unit is provided between the first and second semiconductor layers and includes well layers and barrier layers. The barrier layers include p-side and n-side barrier layers, and a first intermediate barrier layer. The n-side barrier layer is provided between the p-side barrier layer and the first semiconductor layer. The first intermediate barrier layer is provided between the barrier layers. The well layers include p-side and n-side well layers, and a first intermediate well layer. The p-side well layer is provided between the p-side barrier layer and the second semiconductor layer. The n-side well layer is provided between the n-side barrier layer and the first intermediate barrier layer. The first intermediate well layer is provided between the first intermediate barrier layer and the p-side barrier layer.
US09331235B2	Semiconductor device and method for manufacturing the same According to one embodiment, a semiconductor device includes a first semiconductor layer of an n type including a nitride semiconductor, a first metal layer of an alloy containing Al and Au, and a second metal layer. The first metal layer is in contact with the first semiconductor layer. The second metal layer is in contact with the first metal layer. The second metal layer includes a metal different from Al. The first metal layer is disposed between the second metal layer and the first semiconductor layer.
US09331228B2	Concentrated photovoltaic system modules using III-V semiconductor solar cells A solar cell module to convert light to electricity. The module may include a housing with a first side and an opposing spaced-apart second side. A plurality of lenses may be positioned on the first side of the housing, and a plurality of solar cell receivers may be positioned on the second side of the housing. Each of the plurality of solar cell receivers may include a III-V compound semiconductor multifunction solar cell. Each may also include a bypass diode coupled with the solar cell. At least one optical element may be positioned above the solar cell to guide the light from one of the lenses onto the solar cell. Each of said solar cell receivers may be disposed in an optical path of one of the lenses. The lens and the at least one optical element may concentrate the light onto the respective solar cell by a factor of 1000 or more to generate in excess of 25 watts of peak power.
US09331227B2	Directly bonded, lattice-mismatched semiconductor device A semiconductor device may include a first subassembly and a second subassembly. The first subassembly may include a first bonding layer. The second subassembly may include a second substrate and a second bonding layer directly bonded to the first bonding layer. The first bonding layer and the second bonding layer may be lattice-mismatched to one another. At least one of the following may be selected: the first bonding layer is lattice-mismatched to the first substrate, and the second bonding layer is lattice-mismatched to the second substrate.
US09331226B2	Photovoltaic device A photovoltaic device is provided having a semiconductor substrate, an i-type amorphous layer formed over a front surface of the semiconductor substrate, a p-type amorphous layer formed over the i-type amorphous layer, an i-type amorphous layer formed over a back surface of the semiconductor substrate, and an n-type amorphous layer formed over the i-type amorphous layer. The i-type amorphous layer and the i-type amorphous layer have oxygen concentration profiles in which concentrations are reduced in a step-shape from regions near interfaces with the semiconductor substrate and along a thickness direction, and an oxygen concentration in the step-shape portion of the i-type amorphous layer is higher than an oxygen concentration in the step-shape portion of the i-type amorphous layer.
US09331225B2	Solar cell module The present invention improves the reliability of back contact solar cell modules that are electrically connected by means of wiring material. A solar cell module (1) is provided with a plurality of solar cells (10), and wiring material (11). Each solar cell (10) has a p-side electrode (15) and an n-side electrode (14) arranged on a single main surface (20a). Among adjacent solar cells (10), the wiring material (11) electrically connects the p-side electrode (15) of one solar cell (10) to the n-side electrode (14) of another solar cell (10). The surface layers of the p-side electrode (15) and the n-side electrode (14) include plating layers (16c, 17c) which have at least one power supply point (18, 19). The wiring material (11) is bonded to the plating layers such that the wiring material overlaps a portion of the power supply points (18, 19) of each solar cell (10), and does not overlap another portion of the power supply points (18, 19).
US09331218B2	Solar cell module and method of manufacturing the same Provided are a solar cell module and a method of manufacturing the same. The solar cell module including: a substrate; a bottom electrode layer discontinuously formed on the substrate; a light absorbing layer formed on the bottom electrode layer and including a first trench that exposes the bottom electrode layer; and a transparent electrode layer extending from the top of the light absorbing layer to the bottom electrode layer at the bottom of the first trench, and including a first oxide layer, a metal layer, and a second oxide layer, all of which are staked on the light absorbing layer and the bottom electrode layer.
US09331216B2	Core-shell nickel alloy composite particle metallization layers for silicon solar cells Materials and methods for fabrication of rear tabbing, front busbar, and fine grid line layers for silicon based photovoltaic cells are disclosed. Materials include conductive metallization pastes that contain core-shell nickel based particles.
US09331212B2	Semiconductor device comprising an antiferroelectric gate insulating film A semiconductor device having a transistor gate length greatly reduced as a result of promotion of semiconductor integrated circuit miniaturization where leakage current generation in a gate insulating film can be inhibited to enhance the transistor function. The semiconductor device includes: a semiconductor substrate having a main surface; a pair of source/drain regions formed over the main surface of the semiconductor substrate; a gate insulating film formed, over a region between the pair of source/drain regions, to be in contact with the main surface; and a gate electrode formed to be in contact with the upper surface of the gate insulating film. In the semiconductor device, the gate electrode has a length of less than 45 nm in a direction from a first one of the pair of source/drain regions to a second one of the pair of source/drain regions, and the gate insulating film has an antiferroelectric film.
US09331211B2	PN junctions and methods A PN junction includes first and second areas of silicon, wherein one of the first and second areas is n-type silicon and the other of the first and second areas is p-type silicon. The first area has one or more projections which at least partially overlap with the second area, so as to form at least one cross-over point, the cross-over point being a point at which an edge of the first area crosses over an edge of the second area.
US09331208B2	Oxide semiconductor film and semiconductor device An oxide semiconductor film which has more stable electric conductivity is provided. The oxide semiconductor film comprises a crystalline region. The oxide semiconductor film has a first peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.4 nm−1 and less than or equal to 0.7 nm−1 in a region where a magnitude of a scattering vector is greater than or equal to 3.3 nm−1 and less than or equal to 4.1 nm−1. The oxide semiconductor film has a second peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.45 nm−1 and less than or equal to 1.4 nm−1 in a region where a magnitude of a scattering vector is greater than or equal to 5.5 nm−1 and less than or equal to 7.1 nm−1.
US09331204B2	High voltage field effect transistors and circuits utilizing the same A high-voltage circuit is described that comprises a high-voltage finFET can have a semiconductor fin with an insulating cap on the fin. A gate dielectric is disposed on the first and second sides of the fin. A gate overlies the gate dielectric and a channel region in the fin on the first and second sides, and over the cap. Source/drain terminals are disposed on opposing sides of the gate in the fin, and can include lightly doped regions that extend away from the edge of the gate to more highly doped contacts. The dimensions of the structures can be configured so that the transistor has a breakdown voltage of 30 V or higher.
US09331203B2	Devices with cavity-defined gates and methods of making the same Disclosed are methods, systems and devices, including a method that includes the acts of forming a semiconductor fin, forming a sacrificial material adjacent the semiconductor fin, covering the sacrificial material with a dielectric material, forming a cavity by removing the sacrificial material from under the dielectric material, and forming a gate in the cavity.
US09331202B2	Replacement gate structure on FinFET devices with reduced size fin in the channel region One illustrative method disclosed herein includes, among other things, forming a fin protection layer around a fin, forming a sacrificial gate electrode above a section of the fin protection layer, forming at least one sidewall spacer adjacent the sacrificial gate electrode, removing the sacrificial gate electrode to define a gate cavity that exposes a portion of the fin protection layer, oxidizing at least the exposed portion of the fin protection layer to thereby form an oxidized portion of the fin protection layer, and removing the oxidized portion of the fin protection layer so as to thereby expose a surface of the fin within the gate cavity.
US09331199B2	Semiconductor device Provided is a semiconductor device to which a pattern structure for performance improvement is applied. The semiconductor device includes first and second active regions spaced apart from each other in a first direction with an isolation layer interposed therebetween, a first normal gate formed on the first active region to extend in a second direction crossing the first direction, a first dummy gate having a portion overlapping with one end of the isolation layer and the other portion overlapping with the first active region and spaced apart from the first normal gate in the first direction, a second dummy gate having a portion overlapping with the other end of the isolation layer and the other portion overlapping with the second active region, a first normal source/drain contact formed on a source/drain region between the first normal gate and the first dummy gate, and a dummy contact formed on the isolation layer so as not to overlap with the first and second dummy gates and having a different size from the first normal source/drain contact.
US09331198B2	Controlled epitaxial boron nitride growth for graphene based transistors We have demonstrated controlled growth of epitaxial h-BN on a metal substrate using atomic layer deposition. This permits the fabrication of devices such as vertical graphene transistors, where the electron tunneling barrier, and resulting characteristics such as ON-OFF rate may be altered by varying the number of epitaxial layers of h-BN. Few layer graphene is grown on the h-BN opposite the metal substrate, with leads to provide a vertical graphene transistor that is intergratable with Si CMOS technology of today, and can be prepared in a scalable, low temperature process of high repeatability and reliability.
US09331197B2	Vertical power transistor device A power metal-oxide-semiconductor field-effect transistor (MOSFET) includes a substrate, a drift layer over the substrate, and a spreading layer over the drift layer. The spreading layer includes a pair of junction implants separated by a junction gate field effect (JFET) region. A gate oxide layer is on top of the spreading layer. The gate contact is on top of the gate oxide layer. Each one of the source contacts are on a portion of the spreading layer separate from the gate oxide layer and the gate contact. The drain contact is on the surface of the substrate opposite the drift layer.
US09331196B2	Semiconductor device A semiconductor device including a gate structure, a source region, a drain region, a first conductive type epitaxial layer, a high voltage second conductive type well, a linear graded high voltage first conductive type well and a first conductive type buried layer is provided. The first conductive type buried layer is located within the first conductive type epitaxial layer and below the high voltage second conductive type well, and a length of the first conductive type buried layer is smaller than a length of the high voltage second conductive type well.
US09331195B2	Source tip optimization for high voltage transistor devices which includes a P-body extension region The present disclosure provides a method for fabricating a high-voltage semiconductor device. The method includes designating first, second, and third regions in a substrate. The first and second regions are regions where a source and a drain of the semiconductor device will be formed, respectively. The third region separates the first and second regions. The method further includes forming a slotted implant mask layer at least partially over the third region. The method also includes implanting dopants into the first, second, and third regions. The slotted implant mask layer protects portions of the third region therebelow during the implanting. The method further includes annealing the substrate in a manner to cause diffusion of the dopants in the third region.
US09331192B2	Low dislocation density group III nitride layers on silicon carbide substrates and methods of making the same Group III nitride semiconductor device structures are provided that include a silicon carbide (SiC) substrate and a Group III nitride epitaxial layer above the SiC substrate. The Group III nitride epitaxial layer has a dislocation density of less than about 4×108 cm−2 and/or an isolation voltage of at least about 50V.
US09331190B2	Compound semiconductor device and method of manufacturing the same An intermediate layer composed of i-AlN is formed between a channel layer and an electron donor layer, a first opening is formed in an electron donor layer, at a position where a gate electrode will be formed later, while using an intermediate layer as an etching stopper, a second opening is formed in the intermediate layer so as to be positionally aligned with the first opening, by wet etching using a hot phosphoric acid solution, and a gate electrode is formed so that the lower portion thereof fill the first and second openings while placing a gate insulating film in between, and so that the head portion thereof projects above the cap structure.
US09331188B2	Short-circuit protection circuits, system, and method Systems, circuits, and methods for protecting an Insulated-Gate Bipolar Transistor (IGBT) from short-circuit events are provided. A short-circuit protection circuit is described that includes a switch, a resistor, a capacitor, and an optional current buffer that provide a strong pull-down to the IGBT in response to detecting a short-circuit event and then controls a rate at which turn-off current is decreased, thereby minimizing a peak voltage for the IGBT.
US09331186B2	Semiconductor device with multilayer contact and method of manufacturing the same The present invention provides a semiconductor with a multilayered contact structure. The multilayered structure includes a metal contact placed on an active region of a semiconductor and a metal contact extension placed on the metal contact.
US09331182B2	Semiconductor devices with a gate conductor formed as a spacer, and methods for manufacturing the same Semiconductor devices and methods for manufacturing the same are disclosed. In one aspect, the method comprises forming a first shielding layer on a substrate, and forming one of source and drain regions with the first shielding layer as a mask. Then, forming a second shielding layer on the substrate, and forming the other of the source and drain regions with the second shielding layer as a mask. Then, removing a portion of the second shielding layer which is next to the other of the source and drain regions. Lastly, forming a first gate dielectric layer, a floating gate layer, and a second gate dielectric layer, and forming a gate conductor as a spacer on a sidewall of a remaining portion of the second shielding layer.
US09331180B2	Semiconductor device and method for fabricating thereof A silicon nitride film, which is a second hard mask, is dry etched to be removed completely. The silicon nitride film, which is formed on a sidewall of a silicon nitride film used as a first hard mask, has a relatively low etching rate. Therefore, if the silicon nitride film is continued etching until the corresponding portion thereof is removed, polysilicon is etched in a direction of depth in trench shape. Then, floating gates in adjacent cells are separated and a step portion of the polysilicon is formed. Consequently, a remaining portion of the silicon nitride film used as the first hard mask is removed, an ONO film is laminated on a whole surface of the poly silicon having the step portion on an edge that has been etched, and then, a polysilicon for a control gate is laminated on the ONO film.
US09331177B2	Semiconductor structure with deep trench thermal conduction Diodes and resistors for integrated circuits are provided. Deep trenches (DTs) are integrated into the diodes and resistors for the purposes of thermal conduction. The deep trenches facilitate conduction of heat from a semiconductor-on-insulator substrate to a bulk substrate. Semiconductor fins may be formed to align with the deep trenches.
US09331176B2	Methods of forming field effect transistors, including forming source and drain regions in recesses of semiconductor fins Methods of forming a fin-shaped Field Effect Transistor (FinFET) are provided. The methods may include selectively incorporating source/drain extension-region dopants into source and drain regions of a semiconductor fin, using a mask to block incorporation of the source/drain extension-region dopants into at least portions of the semiconductor fin. The methods may include removing portions of the source and drain regions of the semiconductor fin to define recesses therein. The methods may include epitaxially growing source and drain regions from the recesses in the semiconductor fin.
US09331169B2	Nitride semiconductor Schottky diode and method for manufacturing same According to an embodiment, a nitride semiconductor Schottky diode includes a first layer including a first nitride semiconductor and a second layer provided on the first layer and including a second nitride semiconductor having a wider band gap than the first nitride semiconductor. The diode also includes an ohmic electrode provided on the second layer and a Schottky electrode provided on the second layer. The second layer includes a region containing an acceptor in the vicinity of the Schottky electrode between the Schottky electrode and the ohmic electrode.
US09331168B2	Semiconductor structure and manufacuturing method of the same Some embodiments of the present disclosure provide a semiconductor structure. The semiconductor structure includes a substrate, a high k dielectric layer disposed over the substrate, and a gate layer over the high k dielectric layer. The high k dielectric layer is partially crystallized and comprising an average thickness of from about 10 Å to about 30 Å. Some embodiments of the present disclosure provide a method for manufacturing a semiconductor structure. The method includes (i) forming a high k dielectric layer with a thickness of from about 10 Å to about 30 Å over a substrate, (ii) forming a gate layer over the dielectric layer, and (iii) transforming at least a portion of the dielectric layer from a first phase to a second phase by microwave irradiation.
US09331165B2	Thin-film transistor (TFT), manufacturing method thereof, array substrate, display device and barrier layer The present invention discloses a thin-film transistor (TFT), a manufacturing method thereof, an array substrate and a display device. The present invention is used for improving the electrical properties of the TFT and the image quality of the display device. The TFT provided by the present invention comprises: a gate electrode, a source electrode, a drain electrode, a semiconductor layer, a gate electrode insulating layer and a first metal barrier layer, which are disposed on a substrate; the gate electrode insulating layer is disposed between the gate electrode and the semiconductor layer; and the first metal barrier layer is disposed between the source/drain electrodes and the gate electrode insulating layer, and the first metal barrier layer is arranged on the same layer as the semiconductor layer and configured to prevent interdiffusion between the material for forming the source/drain electrodes and the material for forming the gate electrode.
US09331163B2	Transistor with diamond gate A field effect transistor having a diamond gate electrode and a process for forming the same. In some embodiments, the device is an AlGaN/GaN high-electron-mobility transistor (HEMT). The diamond gate electrode is formed so that it directly contacts the barrier layer. In some embodiments, the diamond gate electrode is formed from boron-doped nanocrystalline diamond (NCD), while in other embodiments, the diamond gate electrode is formed from single crystal diamond.
US09331162B2	Array substrate, liquid crystal display device having the same and method for manufacturing the same thereof An array substrate, comprising a substrate, a multi-layer electrode and a switch element, is provided. The multi-layer electrode is disposed on the substrate and comprises an electric conductive layer and a first etch-stop layer. The electric conductive layer covers the first etch-stop layer. The switch element is disposed on the substrate and electrically connected to the multi-layer electrode, and has a second etch-stop layer.
US09331161B1	Metal gate structure and method of forming the same The present invention provides a metal gate structure which is formed in a trench of a dielectric layer. The metal gate structure includes a work function metal layer and a metal layer. The work function metal layer is disposed in the trench and comprises a bottom portion and a side portion, wherein a ratio between a thickness of the bottom portion and a thickness of the side portion is between 2 and 5. The trench is filled with the metal layer. The present invention further provides a method of forming the metal gate structure.
US09331153B2	Methods and structures for forming microstrip transmission lines on thin silicon on insulator (SOI) wafers A structure is provided having: (A) a first silicon layer and a first silicon dioxide layer over the first silicon layer; and (B) a second silicon layer and a second silicon dioxide layer over the second silicon layer; the first silicon dioxide layer bonded to the second silicon dioxide layer. An upper surface of the first silicon layer is polished to reduce its thickness. A III-V layer is grown on the upper surface of the thinned silicon layer. A III-V device is formed in the III-V layer together with a strip conductor connected to the formed. The second silicon layer, the second silicon dioxide layer and the first silicon dioxide layer are successively removed to expose a bottom surface of the first silicon layer. A ground plane conductor is formed on the exposed bottom surface, the strip conductor and the ground plane conductor providing a microstrip transmission line.
US09331151B2	Method for coupling a graphene layer and a substrate and device comprising the graphene/substrate structure obtained The present disclosure regards a method for coupling a graphene layer to a substrate having at least one hydrophilic surface, the method comprising the steps of providing the substrate having at least one hydrophilic surface, depositing on the hydrophilic surface a layer of a solvent selected in the group constituted by acetone, ethyl lactate, isopropyl alcohol, methylethyl ketone and mixtures thereof and depositing on the solvent layer a graphene layer. It moreover regards an electronic device comprising the graphene/substrate structure obtained.
US09331150B2	Semiconductor device and method of manufacturing the same A semiconductor device of an embodiment includes a p-type first diamond semiconductor layer, a p-type second diamond semiconductor layer disposed on the first diamond semiconductor layer, a plurality of n-type third diamond semiconductor layers disposed on the second diamond semiconductor layer, and a first electrode disposed on the second diamond semiconductor and the third diamond semiconductor layers. The p-type second diamond semiconductor layer has a p-type impurity concentration lower than a p-type impurity concentration of the first diamond semiconductor layer and has oxygen-terminated surfaces. Each of the third diamond semiconductor layers has an oxygen-terminated surface. The first electrode forms first junctions between the first electrode and the second diamond semiconductor. The first electrode forms second junctions between the first electrode and the third diamond semiconductor layers. The first junctions and the second junctions are Schottky junctions.
US09331143B1	Semiconductor structure having field plates over resurf regions in semiconductor substrate A semiconductor structure is provided. The semiconductor structure comprises: a substrate; a first doping region, a first well and a second doping region formed in the substrate; a plurality of first heavily doped regions formed in the first doping region; a plurality of conductors and a plurality of dielectrics formed on the substrate between the first heavily doped regions; a second heavily doped region formed in the first well; a third heavily doped region and a fourth heavily doped region formed in the second doping region; as well as a first gate electrode and a first gate dielectric. The first doping region, the first well, the second heavily doped region and the fourth heavily doped region have a first type of doping. The second doping region, the first heavily doped regions and the third heavily doped region have a second type of doping.
US09331137B1	Metal-insulator-metal capacitors between metal interconnect layers An integrated circuit may include interconnects formed from alternating metal interconnect layers and inter-metal dielectric layers. A metal-insulator-metal capacitor may be formed within a selected inter-metal dielectric layer. The metal-insulator-metal capacitor may include first and second capacitor electrodes. The first capacitor electrode may contact a first conductive interconnect line in an underlying metal interconnect layer. The second capacitor electrode may overlap the first capacitor electrode and a portion of a second conductive interconnect line in the underlying metal layer. A via may be formed between the underlying metal interconnect layer and an additional metal interconnect layer. The via may simultaneously contact the second capacitor electrode and the second conductive interconnect line.
US09331136B2	Integrated circuit and method of fabricating the same An integrated circuit and a method of fabricating the integrated circuit are provided. In various embodiments, the integrated circuit includes a substrate and a polysilicon resistor. The polysilicon resistor is disposed on the substrate. The polysilicon resistor has at least one positive TCR portion and at least one negative TCR portion. The positive TCR portion is adjacent to the negative TCR portion, and the positive TCR portion is in direct contact with the negative TCR portion.
US09331133B2	Light emitting device and electronic apparatus On a semiconductor substrate, a plurality of transistors that includes a drive transistor which controls a drive current according to a potential of a gate, a light emitting element that emits a light having a brightness corresponding to the drive current, and an element isolation portion that electrically isolates each transistor are formed. The element isolation portion has a structure in which an insulator fills inside of a groove formed on the semiconductor substrate.
US09331131B2	Organic light emitting diode display and manufacturing method thereof An organic light emitting diode display includes a substrate including a thin film transistor, a plurality of pixels on a pixel area of the substrate, a plurality of auxiliary electrodes between the pixels, an opposite electrode on the pixels and on the auxiliary electrodes, the opposite electrode being electrically connected to the auxiliary electrodes, and including a same material as the auxiliary electrodes, and a power supply electrode on the substrate, the power supply electrode being in a periphery of the pixel area and being configured to supply power to the pixels.
US09331130B2	Light-emitting device There is provided an EL light-emitting device with less uneven brightness. When a drain current of a plurality of current controlling TFTs is Id, a mobility is μ, a gate capacitance per unit area is Co, a maximum gate voltage is Vgs(max), a channel width is W, a channel length is L, an average value of a threshold voltage is Vth, a deviation from the average value of the threshold voltage is ΔVth, and a difference in emission brightness of a plurality of EL elements is within a range of ±n %, a semiconductor display device is characterized in that A = 2 ⁢ ⁢ I ⁢ ⁢ d μ * C 0 A ( Vgs ( max ) - Vth ) 2 ≦ W L ≦ ( 1 + n 100 - 1 ) 2 * A Δ ⁢ ⁢ Vth 2  Δ ⁢ ⁢ Vth  ≦ ( 1 + n 100 - 1 ) * A * L / W .
US09331127B2	Organic light-emitting display apparatus and method of manufacturing the same A organic light-emitting display apparatus includes a substrate, a thin film transistor disposed on the substrate and including an active layer, a gate electrode, a source electrode and a drain electrode, a pixel electrode electrically connected to the source electrode and the drain electrode, a counter electrode corresponding to the pixel electrode, a light-emitting layer disposed in a plurality of light-emitting regions between the pixel electrode and the counter electrode, a common layer disposed in the light-emitting regions and in a plurality of non-light-emitting regions around the light-emitting regions between the pixel electrode and the counter electrode, and a plurality of partition walls including an insulating material disposed in the common layer.
US09331124B2	Variable resistance memory device and method of manufacturing the same A variable resistance memory device includes a semiconductor substrate having a vertical transistor with a shunt gate that increases an area of a gate of the vertical transistor.
US09331123B2	Logic unit including magnetic tunnel junction elements having two different anti-ferromagnetic layers A logic unit for security engines or content addressable memory including Magnetic Tunnel Junction (MTJ) elements connected in series to form a NAND-type string, where each MTJ element includes a storage layer and a sense layer having different anti-ferromagnetic materials respectively having higher and lower blocking temperatures. During write/program, the string is heated above the higher blocking temperature, and magnetic fields are used to store bit values of a confidential logical pattern in the storage layers. The string is then cooled to an intermediate temperature between the higher and lower blocking temperatures and the field lines turned off to store bit-bar (opposite) values in the sense layers. During a pre-compare operation, the MTJ elements are heated to the intermediate temperature, and an input logical pattern is stored in the sense layers. During a compare operation, with the field lines off, a read current is passed through the string and measured.
US09331122B2	Solid-state imaging device with varied impurity concentration, method for manufacturing a solid-state imaging device, and camera module including a solid-state imaging device According to one embodiment of the present invention, a solid-state imaging device is provided. The solid-state imaging device includes a first-conductivity-type semiconductor region and a second-conductivity-type semiconductor region. The first-conductivity-type semiconductor region is disposed for each pixel of a captured image. The second-conductivity-type semiconductor region constitutes a photoelectric conversion element by a PN junction with the first-conductivity-type semiconductor region, and has second-conductivity-type impurity concentration that decreases from the center of the photoelectric conversion element toward a transfer gate side for transferring signal charge.
US09331110B2	Semiconductor device, method of manufacturing semiconductor device, and solid-state imaging apparatus A semiconductor device includes a gate electrode formed on a substrate with a gate insulating layer in between, an insulating layer of property and thickness that allow for a silicide block formed in a first region of the substrate so as to cover the gate electrode, a sidewall formed to at least partly include the insulating layer at a side of the gate electrode, a first impurity region formed by implantation of a first impurity in a peripheral region of the gate electrode formed in the first region of the substrate before the insulating layer is formed, a second impurity region formed by implantation of a second impurity in a peripheral region of the sidewall of the gate electrode formed in a second region of the substrate after the sidewall is formed, and a silicide layer formed on a surface of the second impurity region of the substrate.
US09331101B2	Organic light emitting display panel The present invention relates to an organic light emitting display panel and a method of manufacturing the same. In accordance with an aspect of the present invention, there is provided a display panel. The display panel in one example includes a light shielding layer electrically connected to a driving power line on a substrate, and storage capacitors formed on an oxide semiconductor in parallel, insulated from the oxide semiconductor, and overlapped a gate.
US09331097B2	High speed bipolar junction transistor for high voltage applications High speed bipolar junction transistor switches for high voltage operations. An example switch includes a bipolar junction transistor including a collector region positioned over a buried insulator region. The collector region includes dopants of a first conductivity type. A field effect transistor includes a source region also positioned over a buried insulator region. The source region electrically is coupled to the collector region such that all current passing the collector region enters the source region.
US09331093B2	Three dimensional NAND device with silicon germanium heterostructure channel A method of making a monolithic three dimensional NAND string including forming a stack of alternating layers of a first material and a second material different from the first material over a substrate, forming an at least one opening in the stack, forming at least a portion of a memory film in the at least one opening and forming a first portion of a semiconductor channel followed by forming a second portion of the semiconductor channel in the at least one opening. The second portion of the semiconductor channel comprises silicon and germanium and contains more germanium than a first portion of the semiconductor channel which is located closer to the memory film than the second portion.
US09331080B2	Semiconductor device having contact plug and method of forming the same A semiconductor device includes an N-type fin and a P-type fin on a substrate, a first gate electrode configured to cross the N-type fin and cover a side surface of the N-type fin, a second gate electrode configured to cross the P-type fin and cover a side surface of the P-type fin, a first source/drain on the N-type fin adjacent to the first gate electrode, a second source/drain on the P-type fin adjacent to the second gate electrode, a buffer layer on a surface of the second source/drain and including a material different from the second source/drain, an interlayer insulating layer on the buffer layer and the first source/drain, a first plug connected to the first source/drain and passing through the interlayer insulating layer, and a second plug connected to the second source/drain and passing through the interlayer insulating layer and the buffer layer.
US09331075B2	Systems and methods for fabricating semiconductor devices at different levels Systems and methods are provided for fabricating semiconductor device structures on a substrate. For example, a substrate including a first region and a second region is provided. One or more first semiconductor device structures are formed on the first region. One or more semiconductor fins are formed on the second region. One or more second semiconductor device structures are formed on the semiconductor fins. A top surface of the semiconductor fins is higher than a top surface of the first semiconductor device structures.
US09331073B2	Epitaxially grown quantum well finFETs for enhanced pFET performance A method of forming a quantum well having a conformal epitaxial well on a {100} crystallographic orientated fin. The method may include: forming fins in a {100} crystallographic oriented substrate; forming a conformal well on the fins using epitaxial growth; and forming a conformal barrier on the conformal well using epitaxial growth.
US09331072B2	Integrated circuit devices having air-gap spacers defined by conductive patterns and methods of manufacturing the same Integrated circuit devices having a cavity and methods of manufacturing the integrated circuit devices are provided. The integrated circuit devices may include a pair of spacers, which define a recess. The integrated circuit device may also include a lower conductive pattern in the recess and an upper conductive pattern on the lower conductive pattern. The upper conductive pattern may have an etch selectivity with respect to the lower conductive pattern and may expose an upper surface of the lower conductive pattern adjacent a sidewall of the upper conductive pattern. An inner sidewall of one of the pair of spacers, the upper surface of the lower conductive pattern and the sidewall of the upper conductive pattern may define a space and a capping pattern may be formed on the upper conductive pattern to seal a top portion of the space, such that a cavity is disposed under the capping pattern.
US09331070B2	Variable capacitor and integrated circuit including the same There are provided a variable capacitor and an integrated circuit (IC) including the variable capacitor. The variable capacitor includes: a plurality of capacitance forming portions that are connected to each other in parallel between a first port and a second port and provide previously set capacitance according to a control signal, wherein each of the plurality of capacitance forming portions includes: a first capacitance forming portion including a first switch portion including a plurality of switches, and a first capacitor portion including first and second capacitors; and at least one capacitance forming group including a unit switch portion including a plurality of switches, and at least one unit capacitance forming portion including at least one unit capacitor portion including a unit capacitor.
US09331068B2	Hybrid wide-bandgap semiconductor bipolar switches A hybrid semiconductor bipolar switch in which a normally-on high-voltage wide-bandgap semiconductor bipolar switch and a normally-off field effect transistor are connected in a cascode (Baliga-pair) configuration. The switch may be constructed as a stacked hybrid device where a discrete transistor is bonded on top of a bipolar switch. Power systems may use plural switches paired with anti-parallel diodes.
US09331066B2	Method and computer-readable medium for detecting parasitic transistors by utilizing equivalent circuit and threshold distance A method of detecting a parasitic transistor detecting is provided. The method includes extracting several diodes from a selected area, selecting at least one diode pair from the diodes in accordance with signals connected to the diodes, and filtering the at least one diode pair in accordance with a threshold distance to determine whether at least one parasitic transistor is obtained.
US09331057B2	Semiconductor device A semiconductor device is disclosed. One embodiment provides a semiconductor chip. The semiconductor chip includes a first electrode of a capacitor. An insulating layer is arranged on top of the first electrode. A second electrode of the capacitor is applied over the insulating layer, wherein the second electrode is made of a conductive layer arranged over the semiconductor chip.
US09331051B2	Wafer scale technique for interconnecting vertically stacked dies A method and device for interconnecting stacked die surfaces with electrically conductive traces is provided that includes bonding, using a first layer of a photoresist compound, a second die (2) on top of a first die (1), heating the first layer above a pyrolyzation point of the photoresist compound, where the photoresist compound transitions to a stable layer, depositing a second layer of the photoresist compound (PR), using lithography, from a top surface of the first die (1) to a top surface of the second die (2), heating the second photoresist compound layer to a liquid state, where the liquid photoresist compound forms a smooth convex bridge between the first die (1) top surface and the second die (2) top surface, and depositing an electrically conductive layer on the smooth convex bridge, where an electrically conductive trace is formed between the first die (1) top surface and the second die (2) top surface.
US09331050B2	Localized alloying for improved bond reliability Methods of forming gold-aluminum electrical interconnects are described. The method may include interposing a diffusion retardant layer between the gold and the aluminum, the diffusion retardant layer including regions containing and regions substantially devoid of a diffusion retardant material; bringing into contact the diffusion retardant layer, the gold, and the aluminum; forming alloys of gold and the diffusion retardant material in regions containing the material and forming gold-aluminum intermetallic compounds in regions substantially devoid of the material; and forming a continuous electrically conducting path between the aluminum and the gold. A structure for gold-aluminum interconnect is provided. The structure may include an aluminum alloy bond pad and a diffusion retardant layer in contact with the bond pad, the diffusion retardant layer including regions containing and regions substantially devoid of a diffusion retardant material. The structure may include a gold free air ball in contact with the diffusion retardant layer.
US09331048B2	Bonded stacked wafers and methods of electroplating bonded stacked wafers A method including: providing a first wafer stack; applying a first bonding layer on the first wafer stack; providing a second wafer stack, where the second wafer stack includes vias; and applying a second bonding layer to the second wafer stack. The vias extend through the second wafer stack and to the second bonding layer. The second bonding layer is bonded to the first bonding layer. A seed layer is applied on a side of the second wafer stack opposite the second bonding layer such that a material of the seed layer (i) contacts the vias, and (ii) extends over and past ends of the second wafer stack and onto the first bonding layer.
US09331045B2	Semiconductor die laminating device with independent drives A laminating device (230) and method are disclosed for laminating semiconductor die (220) on substrates on a panel (200) of substrates. The laminating device (230) includes lamination units (234,236,238,240) that operate independently of each other so that a row or column of semiconductor die (220) may be independently laminated onto a row or column of substrates simultaneously.
US09331043B1	Localized sealing of interconnect structures in small gaps An apparatus relates generally to a microelectronic device. In such an apparatus, a first substrate has a first surface with first interconnects located on the first surface, and a second substrate has a second surface spaced apart from the first surface with a gap between the first surface and the second surface. Second interconnects are located on the second surface. Lower surfaces of the first interconnects and upper surfaces of the second interconnects are coupled to one another for electrical conductivity between the first substrate and the second substrate. A conductive collar is around sidewalls of the first and second interconnects, and a dielectric layer is around the conductive collar.
US09331039B2	Semiconductor device including a buffer layer structure for reducing stress A semiconductor device includes a semiconductor chip, wiring that is included in the semiconductor chip and has a coupling part between parts with different widths, a pad being formed above the wiring and in a position overlapping the coupling part, a bump being formed on the pad, a buffer layer being formed in a position between the coupling part and the pad so as to cover the entire couple part, and inorganic insulating layers being formed between the wiring and the buffer layer and between the buffer layer and the pad, respectively. The buffer layer is made of a material other than resin and softer than the inorganic insulating layer.
US09331031B2	Wireless communication system A wireless communication system includes: a filter; and a semiconductor chip including a signal processing integrated circuit having an amplifier, wherein a main surface of the semiconductor chip is provided with a plurality of electrode terminals along an edge portion thereof; wherein the amplifier has a transistor including a control electrode, a first electrode through which a signal is outputted, and a second electrode to which a voltage is applied; wherein the control electrode, the first electrode and the second electrode of the transistor are connected to the electrode terminals, respectively; and wherein none of wirings are arranged between the electrode terminals and placements of the control electrode, the first electrode and the second electrode, making space between the electrodes and the electrode terminals narrow.
US09331030B1	Integrated antenna package and manufacturing method thereof An integrated antenna package including a laminated structure and a multi-layered substrate is provided. The laminated structure includes at least a chip embedded therein and at least a plated through-hole structure penetrating the laminated structure. The multi-layered substrate is stacked on the laminated structure. The multi-layered substrate includes at least a metal layer located on one side of the multi-layered substrate away from the laminated structure and the metal layer includes at least an antenna pattern located above the chip. The multi-layered substrate includes at least a plated via and through-hole structure penetrating the multi-layered substrate and electrically connected to the chip, so that the antenna pattern is electrically connect with the chip. Also, the manufacturing method of the integrated antenna package is provided.
US09331027B2	Method for detecting electrical energy produced from a thermoelectric material contained in an integrated circuit An integrated circuit includes active circuitry disposed at a surface of a semiconductor body and an interconnect region disposed above the semiconductor body. A thermoelectric material is disposed in an upper portion of the interconnect region away from the semiconductor body. The thermoelectric material is configured to deliver electrical energy when exposed to a temperature gradient. This material can be used, for example, in a method for detecting the repackaging of the integrated circuit after it has been originally packaged.
US09331022B2	Substrate and patterning device for use in metrology, metrology method and device manufacturing method A pattern from a patterning device is applied to a substrate by a lithographic apparatus. The applied pattern includes product features and metrology targets. The metrology targets include large targets and small targets which are for measuring overlay. Some of the smaller targets are distributed at locations between the larger targets, while other small targets are placed at the same locations as a large target. By comparing values measured using a small target and large target at the same location, parameter values measured using all the small targets can be corrected for better accuracy. The large targets can be located primarily within scribe lanes while the small targets are distributed within product areas.
US09331019B2	Device comprising a ductile layer and method of making the same Device comprising a ductile layer, a method for making a component comprising a ductile layer and a method for testing a component are disclosed. An embodiment includes an electronic device including a first conductive layer, a ductile layer and a brittle layer between the first conductive layer and the ductile layer.
US09331017B2	Chip package incorporating interfacial adhesion through conductor sputtering This disclosure relates generally to an electronic device and method having can include a method of making a chip package. An insulator layer comprising an insulator material, the insulator layer positioned with respect to a first conductive line, forming a second conductive line with respect to the insulator layer, wherein the insulator layer is positioned between the first conductive line and the second conductive line, forming a opening in the insulator layer between the first conductive line and the second conductive line, at least some of the insulator material within the opening being exposed, and chemically bonding a conductor to the at least some of the insulator material within the opening, wherein the conductor electrically couples the first conductive line to the second conductive line.
US09331015B2	Semiconductor device with a multilayer wire A semiconductor device includes a semiconductor structure having a first wire extending in a first direction, an intermetallic insulating layer covering the semiconductor structure, a via structure penetrating the intermetallic insulating layer, and a second wire extending on the intermetallic insulating layer in a second direction at a predetermined angle with respect to the first direction, the second wire being connected to the first wire through the via structure and including first and second portions on each other, and a protruding portion protruding from at least one of the first and second portions, the protruding portion being at a boundary of the first and second portions.
US09331007B2	Semiconductor device and method of forming conductive ink layer as interconnect structure between semiconductor packages A semiconductor device has a semiconductor die with an encapsulant deposited over and around the semiconductor die. An opening is formed in a first surface of the encapsulant by etching or LDA. A plurality of bumps is optionally formed over the semiconductor die. A bump is recessed within the opening of the encapsulant. A conductive ink is formed over the first surface of the encapsulant, bump and sidewall of the opening. The conductive ink can be applied by a printing process. An interconnect structure is formed over a second surface of the encapsulant opposite the first surface of the encapsulant. The interconnect structure is electrically connected to the semiconductor die. A semiconductor package is disposed over the first surface of the encapsulant with a plurality of bumps electrically connected to the conductive ink layer. The semiconductor package may contain a memory device.
US09331006B2	Semiconductor device A semiconductor device includes a substrate that is made of a semiconductor material and has a main surface formed with a recess. The semiconductor device also includes a wiring layer formed on the substrate, an electronic element housed in the recess, and a sealing resin covering at least a part of the electronic element.
US09331002B2	Semiconductor device and method of forming through vias with reflowed conductive material A semiconductor device is made by providing a first semiconductor wafer having semiconductor die. A gap is made between the semiconductor die. An insulating material is deposited in the gap. A portion of the insulating material is removed to form a first through hole via (THV). A conductive lining is conformally deposited in the first THV. A solder material is disposed above the conductive lining of the first THV. A second semiconductor wafer having semiconductor die is disposed over the first wafer. A second THV is formed in a gap between the die of the second wafer. A conductive lining is conformally deposited in the second THV. A solder material is disposed above the second THV. The second THV is aligned to the first THV. The solder material is reflowed to form the conductive vias within the gap. The gap is singulated to separate the semiconductor die.
US09331001B2	Semiconductor module A semiconductor module includes a semiconductor device; a metal plate portion that includes a first surface on a side of the semiconductor device and has a fastening portion at an end thereof; a molded portion that is formed by molding a resin on the semiconductor device and the metal plate portion, a cooling plate portion that is a separate member from the metal plate portion, is provided on a side opposite to the first surface on the side of the semiconductor device, and includes fins on a side opposite to the side of the metal plate portion; wherein the fastening portion of the metal plate portion is exposed out of the molded portion, and the cooling plate portion includes a fastening portion at a position that corresponds to a position of the fastening portion of the metal plate portion.
US09330999B2	Multi-component integrated heat spreader for multi-chip packages A multi-component heat spreader comprising a top component having a first surface and an opposing second surface with either a cavity extending therein from the second surface thereof or a projection extending from the second surface thereof. The multi-component heat spreader further includes at least one additional component, such as a footing component or a spacer component, having a first surface and an opposing second surface with either a cavity extending therein from the second surface thereof or a projection extending from the second surface thereof, which is opposite from the top component cavity/projection. The additional component is attached to the top component, such as by brazing, wherein the top component cavity/projection is mated to the additional component cavity/projection.
US09330998B2	Thermal interface material assemblies and related methods A thermal interface material assembly generally includes a substrate and one or more pillars protruding outwardly away from the substrate. A thermally-conductive heat path is at least partially defined by the substrate and the one or more thermally-conductive pillars, whereby heat may be transferable along the thermally-conductive heat path from a heat source of an electronic device.
US09330988B1	Method of fine-tuning process controls during integrated circuit chip manufacturing based on substrate backside roughness Disclosed is a method of manufacturing integrated circuit (IC) chips. In the method, wafers are received and the backside roughness levels of these wafers are determined. Based on the backside roughness levels, the wafers are sorted into different groups. Chips having the same design are manufactured on wafers from all of the different groups. However, during manufacturing, process(es) is/are performed differently on wafers from one or more of the different groups to minimize systematic variations in a specific parameter (e.g., wire width) in the resulting chips. Specifically, because systematic variations may occur when the exact same processes are used to form IC chips on wafers with different backside roughness levels, the method disclosed herein selectively adjusts one or more of those processes when performed on wafers from one or more of the different groups to ensure that the specific parameter is approximately equal in the resulting integrated IC chips.
US09330987B2	Hot spot identification, inspection, and review A method for identifying, inspecting, and reviewing all hot spots on a specimen is disclosed by using at least one SORIL e-beam tool. A full die on a semiconductor wafer is scanned by using a first identification recipe to obtain a full die image of that die and then design layout data is aligned and compared with the full die image to identify hot spots on the full die. Threshold levels used to identify hot spots can be varied and depend on the background environments close thereto, materials of the specimens, defect types, and design layout data. A second recipe is used to selectively inspect locations of all hot spots to identify killers, and then killers can be reviewed with a third recipe.
US09330986B2	Manufacturing method for solar cell and solar cell manufacturing system The invention includes: a first process of forming a texture structure on both surfaces of a semiconductor substrate of a first conductivity type; a second process of measuring a reflectance distribution of the both surfaces of the semiconductor substrate on which the texture structure is formed; a third process of forming an impurity diffusion layer, in which an impurity element of a second conductivity type is diffused, on one of the both surfaces of the semiconductor substrate which is narrower in the reflectance distribution; a fourth process of forming, on the impurity diffusion layer, a light receiving surface-side electrode having a predetermined pattern and electrically connected to the impurity diffusion layer; and a fifth process of forming a back surface-side electrode on another of the both surfaces of the semiconductor substrate which is wider in the reflectance distribution.
US09330984B1	CMOS fin integration on SOI substrate A method for complementary metal oxide semiconductor (CMOS) fin integration includes forming fin structures from a semiconductor layer of a silicon-on-insulator substrate and filling between the fin structures with a dielectric fill. The fin structures are masked in a first area while leaving top portions of the fin structures in a second area exposed. The fin structures are recessed in the second area to form trenches, and each trench has a fin portion remaining at a bottom thereof. A new fin is epitaxially grown in the trench from the fin portion. The new fin includes SiGe.
US09330982B1	Semiconductor device with diffusion barrier film and method of manufacturing the same A method of forming a diffusion barrier film over fins and the resulting device are provided. Embodiments include forming silicon fins over a substrate; depositing a borosilicate glass (BSG) liner cap over a first set of the silicon fins; depositing a phosphosilicate (PSG) liner cap over a second set of the silicon fins; and depositing a silicon oxycarbide (SiOC) diffusion barrier film over the BSG and PSG liner caps.
US09330980B2	Semiconductor process A semiconductor structure includes a first gate and a second gate, a first spacer and a second spacer, two first epitaxial structures and two second epitaxial structures. The first gate and the second gate are located on a substrate. The first spacer and the second spacer are respectively located on the substrate beside the first gate and the second gate. The first epitaxial structures and the second epitaxial structures are respectively located in the substrate beside the first spacer and the second spacer, wherein the first spacer and the second spacer have different thicknesses, and the spacing between the first epitaxial structures is different from the spacing between the second epitaxial structures. Moreover, the present invention also provides a semiconductor process forming said semiconductor structure.
US09330978B2	Semiconductor device A semiconductor device includes a semiconductor substrate, a gate electrode, a dummy gate electrode, and a first impurity diffusion region. The semiconductor substrate has first and second grooves. The gate electrode is in the first groove. The dummy gate electrode is in the second groove. The dummy gate electrode has a first top surface. The first impurity diffusion region in the semiconductor substrate is positioned between the first and second grooves. The first top surface is positioned at a lower level than a bottom of the first impurity diffusion region.
US09330976B2	Wafer processing method A wafer processing method includes forming a resist film on the front side of a wafer in an area except division lines, plasma etching the wafer to form a groove on the front side of the wafer along each division line, the groove having a depth greater than a finished thickness, removing the resist film from the front side of the wafer by cleaning, and grinding the back side of the wafer to reduce the thickness of the wafer to the finished thickness, so that the groove is exposed to the back side of the wafer to thereby divide the wafer into individual device chips. In the resist film removing step, a chemical fluid is sprayed to the resist film formed on the front side of the wafer, thereby removing the resist film.
US09330975B2	Integrated circuit substrates comprising through-substrate vias and methods of forming through-substrate vias A method of forming a through-substrate via includes forming a through-substrate via opening at least partially through a substrate from one of opposing sides of the substrate. A first material is deposited to line and narrow the through-substrate via opening. The first material is etched to widen at least an elevationally outermost portion of the narrowed through-substrate via opening on the one side. After the etching, a conductive second material is deposited to fill the widened through-substrate via opening. Additional implementations are disclosed. Integrated circuit substrates are disclosed independent of method of manufacture.
US09330974B2	Through level vias and methods of formation thereof In one embodiment, a semiconductor device includes a first metal line disposed in a first metal level above a substrate. A second metal line is disposed in a second metal level disposed over the first metal level. A third metal line is disposed in a third metal level disposed over the second metal level. A through level via contacts the first metal line and the third metal line.
US09330971B2	Method for fabricating integrated circuits including contacts for metal resistors Integrated circuits and methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes etching an ILD layer of dielectric material overlying a semiconductor substrate that includes a device region to form first contact vias that expose active areas of the device region. The ILD layer is etched to form second contact vias that correspondingly expose a gate that is disposed in the device region and a patterned resistive metal-containing layer that is disposed in the ILD layer adjacent to the device region. The first contact vias and the second contact vias are filled with an electrically-conductive material to form first contacts that are in electrical communication with the active areas and second contacts that include a gate contact and a metal resistor contact that are in electrical communication with the gate and the patterned resistive metal-containing layer, respectively.
US09330957B2	Process for assembling two wafers and corresponding device A process for assembling a first wafer and a second wafer each bevelled on their peripheries includes excavating the bevelled peripheral part of at least one first side of the first wafer to create a deposit bordering the region excavated in the material of the first wafer. The first side and a second side of the second wafer are then bonded together.
US09330953B2	Electrostatic chuck device An electrostatic chuck device (1) according to the invention includes an electrostatic chuck section (2) that has a principal surface as a placement surface on which a plate-shaped sample is placed, and is made to have an internal electrode for electrostatic adsorption built-in, and a cooling plate section (3) that cools the electrostatic chuck section (2), wherein a heating member (5) is bonded to a principal surface on the opposite side to the placement surface of the electrostatic chuck section (2) through a first adhesive material layer (4), and the electrostatic chuck section (2) and the heating member (5) are bonded to and integrated with the cooling plate section (3) through an acrylic adhesive layer (9) having flexibility and insulation properties.
US09330952B2	Bipolar mobile electrostatic carriers for wafer processing In one embodiment, there is provided a carrier comprising a top semiconductor layer having isolated positive electrode regions and isolated negative electrode regions separated by a frontside trench through the top semiconductor layer extending at least to an underlying insulating layer positioned between the top semiconductor layer and a bottom semiconductor layer. A dielectric layer covers the top exposed surfaces of the carrier. Backside trenches through the bottom semiconductor layer extending at least to the insulating layer form isolated backside regions corresponding to the frontside positive and negative electrode regions. Backside contacts positioned on the bottom semiconductor layer and coupled to the positive and negative electrode regions allow for the electric charging of the frontside electrode regions.
US09330949B2	Heat treatment apparatus for heating substrate by irradiating substrate with flash of light Three support members made of silicon carbide are provided fixedly on an inner periphery of the support ring. The support members are inclined at an angle in the range of 15 to 30 degrees with respect to a horizontal plane. With an outer peripheral edge of a semiconductor wafer supported by the three support members, a heating treatment is performed by irradiating the semiconductor wafer with halogen light from halogen lamps. Silicon carbide absorbs the halogen light better than quartz. The support members support the outer peripheral edge of the semiconductor wafer in point contacting relationship, so that the contact between a holder and the semiconductor wafer is minimized. This minimizes the disorder of the temperature distribution of the semiconductor wafer due to the support members to achieve the uniform heating of the semiconductor wafer.
US09330944B2	Bio-implantable hermetic integrated ultra high density device An implantable bio-compatible integrated circuit device and methods for manufacture thereof are disclosed herein. The device includes a substrate having a recess. An input/output device including at least one bio-compatible electrical contact is coupled to the substrate in the recess. A layer of hermetic bio-compatible, hermetic insulator material is deposited on a portion of the input/output device. An encapsulating layer of bio-compatible material encapsulates at least a portion of the implantable device, including the input/output device. At least one bio-compatible electrical contact of the input/output device is then exposed. The encapsulating layer and the layer of bio-compatible, hermetic insulator material form a hermetic seal around the at least one exposed bio-compatible electrical contact.
US09330941B2	Package carrier and manufacturing method thereof A manufacturing method of a package carrier is provided. A supporting board having an upper surface which a patterned circuit layer formed thereon is provided. A portion of the upper surface is exposed by the patterned circuit layer. An insulating layer and a conducting layer located at a first surface of the insulating layer are laminated onto the patterned circuit layer. The patterned circuit layer and the exposed portion of the upper surface are covered by the insulating layer. Plural conductive connection structures are formed on the patterned circuit layer. Plural of pads respectively connecting the conductive connection structures and exposing a portion of the first surface of the insulating layer is defined by patterning the conductive layer. The supporting board is removed so as to expose a second surface of the insulating layer. The second surface and a bonding surface of the patterned circuit layer are coplanar.
US09330939B2	Method of enabling seamless cobalt gap-fill Methods for depositing a contact metal layer in contact structures of a semiconductor device are provided. In one embodiment, a method for depositing a contact metal layer for forming a contact structure in a semiconductor device is provided. The method comprises performing a cyclic metal deposition process to deposit a contact metal layer on a substrate and annealing the contact metal layer disposed on the substrate. The cyclic metal deposition process comprises exposing the substrate to a deposition precursor gas mixture to deposit a portion of the contact metal layer on the substrate, exposing the portion of the contact metal layer to a plasma treatment process, and repeating the exposing the substrate to a deposition precursor gas mixture and exposing the portion of the contact metal layer to a plasma treatment process until a predetermined thickness of the contact metal layer is achieved.
US09330938B2	Method of patterning dopant films in high-k dielectrics in a soft mask integration scheme A method of fabricating advanced node field effect transistors using a replacement metal gate process. The method includes dopant a high-k dielectric directly or indirectly by using layers composed of multi-layer thin film stacks, or in other embodiments, by a single blocking layer. By taking advantage of unexpected etch selectivity of the multi-layer stack or the controlled etch process of a single layer stack, etch damage to the high-k may be avoided and work function metal thicknesses can be tightly controlled which in turn allows field effect transistors with low Tinv (inverse of gate capacitance) mismatch.
US09330934B2	Methods of forming patterns on substrates Methods of forming a pattern on a substrate include forming carbon-comprising material over a base material, and spaced first features over the carbon-comprising material. Etching is conducted only partially into the carbon-comprising material and spaced second features are formed within the carbon-comprising material which comprise the partially etched carbon-comprising material. Spacers can be formed along sidewalls of the spaced second features. The carbon-comprising material can be etched through to the base material using the spacers as a mask. Spaced third features can be formed which comprise the anisotropically etched spacers and the carbon-comprising material.
US09330931B2	Method of manufacturing semiconductor device In a method of manufacturing a semiconductor device, which uses a triple patterning process, a porous layer covering sidewalls and an upper surface of a polymer-containing pattern is formed on a layer to be etched. A decomposition gas is supplied to the polymer-containing pattern through the porous layer, and a portion of the polymer-containing pattern is decomposed to form a reduced polymer-containing pattern and form a void between the reduced polymer-containing pattern and the porous layer. A portion of the porous layer is removed to form a porous spacer pattern spaced apart from the reduced polymer-containing pattern. The layer to be etched is etched by using the reduced polymer-containing pattern and the porous spacer pattern as an etch mask.
US09330929B1	Systems and methods for horizontal integration of acceleration sensor structures Embodiments relate to integrated circuit sensors, and more particularly to sensors integrated in an integrated circuit structure and methods for producing the sensors. In an embodiment, a sensor device comprises a substrate; a first trench in the substrate; a first moveable element suspended in the first trench by a first plurality of support elements spaced apart from one another and arranged at a perimeter of the first moveable element; and a first layer arranged on the substrate to seal the first trench, thereby providing a first cavity containing the first moveable element and the first plurality of support elements.
US09330927B2	System, method and apparatus for generating pressure pulses in small volume confined process reactor A plasma processing system and method includes a processing chamber, and a plasma processing volume included therein. The plasma processing volume having a volume less than the processing chamber. The plasma processing volume being defined by a top electrode, a substrate support surface opposing the surface of the top electrode and a plasma confinement structure including at least one outlet port. A conductance control structure is movably disposed proximate to the at least one outlet port and capable of restricting an outlet flow through the at least one outlet port to a first flow rate and capable of increasing the outlet flow through the at least one outlet port to a second flow rate, wherein the conductance control structure restricts the outlet flow rate moves between the first flow rate and the second flow rate corresponding to a selected processing state set by the controller during a plasma process.
US09330924B2	Method for forming control gate salicide A method for forming a semiconductor device includes forming a conductive structure of a silicon material on a substrate and forming a planarized dielectric layer adjacent the conductive structure. The method also includes removing a portion of the dielectric layer to expose a top portion of the conductive structure and removing an outer portion of the exposed top portion of the conductive structure such that the top portion of the gate structure has a narrower width than the unexposed portion. The method further includes forming a metal layer over the exposed portion of the gate structure and a top surface of the dielectric layer, and forming a silicide layer over the top portion of the conductive structure. The width of the silicided top portion of the conductive structure is substantially the same as the width of the bottom portion of the conductive structure.
US09330921B2	Semiconductor device and method of manufacturing the same A semiconductor device is provided. The semiconductor device includes a semiconductor substrate, and a memory cell disposed on the semiconductor substrate. The memory cell includes a selection transistor and a memory transistor. The selection transistor includes a selection gate, a first source, and a first drain. The memory transistor includes a floating gate, a control gate, a second source, a second drain, and a first insulating layer disposed between the floating gate and the control gate. The semiconductor device further includes a selection gate sidewall spacer disposed near an edge of a bit line of the selection gate of the selection transistor. The selection gate sidewall spacer is separated from the selection gate by a second insulating layer. The selection gate sidewall spacer and the control gate are formed of a first material.
US09330919B1	Method for manufacturing substrate A method for manufacturing a substrate is provided. The method includes irradiating a single crystal substrate with a beam of laser or charged particles while moving an irradiation point of the beam with respect to the single crystal substrate so that a trajectory of the irradiation point on a surface of the single crystal substrate describes a striped pattern of straight lines. Non-crystalline regions are formed in the single crystal substrate along the trajectory. The irradiation is repeated multiple times so that directions of the striped patterns are different from each other among the multiple times of irradiation. The repetition of the irradiation changes warpage of the single crystal substrate. All of directions of the straight lines described in the multiple times of irradiation are not parallel to any of directions of crystal axes of the single crystal substrate in a plane parallel to the surface.
US09330917B2	Passivation layer for workpieces formed from a polymer Methods of forming a passivation layer on a workpiece are disclosed. These methods utilize a SiC forming polymer to form the passivation layer. In addition, while the polymer is being heated to form SiC, a second result, such as annealing of the underlying workpiece, or firing of the metal contacts is achieved. For example, the workpiece may be implanted prior to coating it with the polymer. When the workpiece is heated, SiC is formed and the workpiece is annealed. In another embodiment, a workpiece is coating with the SiC forming polymer and metal pattern is applied to the polymer. The firing of workpiece causes the metal contacts to form and also forms SiC on the workpiece.
US09330915B2	Surface pre-treatment for hard mask fabrication A robust metallization profile is formed by pre-treat an anti-reflective coating layer by plasma before forming a hard mask layer. Pre-treatment is helpful especially in small feature size process, for example, 50 nm and below. By changing constitution of a surface layer of the anti-reflective coating, interface of the anti-reflective coating layer and the hard mask layer is smoothed which results in less overhang and better gap-filling performance.
US09330911B2	Light emitting device having group III-nitride current spreading layer doped with transition metal or comprising transition metal nitride A light-emitting device, such as a light-emitting diode (LED), has a group III-nitride current spreading layer which is either doped with transition metal, or comprises alternating transition metal nitride layer and group III-nitride layer. Also provided is a light-emitting device, such as a light-emitting diode (LED), having a quantum well doped with transition metal. Also provided is a method of forming transition-metal containing AlInGaN electrical conductive material.
US09330910B2	Method of forming an array of nanostructures A method of forming an array of nanostructures includes forming a plurality of seed points on a surface of a substrate, and growing masks from the seed points to create masked regions of the substrate underlying the masks. A remainder of the substrate comprises an unmasked region. Each mask and masked region increase in size with growth time while the unmasked region of the substrate decreases in size. During the growing, the unmasked region is etched to remove material from the substrate in a depth direction, and, simultaneously, unetched structures are formed from the masked regions of the substrate underlying the masks. Each of the unetched structures has a lateral size that increases with depth.
US09330905B2	Semiconductor device and manufacturing method of the same A semiconductor device, in which the generation of interface states in the interface region between a nitride semiconductor layer and an aluminum oxide layer is suppressed, includes a first nitride semiconductor layer and an aluminum oxide layer. The first nitride semiconductor layer includes Ga. The aluminum oxide layer directly contacts the upper surface of the first nitride semiconductor layer, and includes H (hydrogen) atoms at least within a defined region from the interface with the first nitride semiconductor layer. In addition, the peak value of an H atom concentration in the above region is in a range of 1×1020 cm−3 to 5×1021 cm−3.
US09330902B1	Method for forming HfOx film based on atomic layer deposition (ALD) process A method for forming a HfOx film based on atomic layer deposition (ALD) process includes: providing a substrate; dividing a plurality of ALD cycles as needed into multiple depositing stages, wherein each of the ALD cycles includes applying HfCl4 pulse and applying H2O pulse over the substrate and a content ratio of HfCl4 to H2O is different and increasing for the depositing stages; and performing the depositing stages to form a HfOx film.
US09330901B2	Nitrogen-containing oxide film and method of forming the same A method of forming a nitrogen-containing oxide film is disclosed. The method comprises (a) exposing a substrate to a first gas pulse having one of an oxygen-containing gas and a metal-containing gas; (b) exposing the substrate to a second gas pulse having the other of the oxygen-containing gas and the metal-containing gas to form an oxide film over the substrate; and (c) exposing the oxide film to a third gas pulse having a nitrogen-containing plasma to form a nitrogen-containing oxide film, wherein the nitrogen-containing oxide film has a nitrogen concentration between about 0.1 and about 3 atomic percent (at %).
US09330897B2	Mercury-free discharge lamp A mercury-free discharge lamp includes a luminous tube, and a pair of electrodes in the luminous tube such that the electrodes face each other in the luminous tube. The discharge lamp also includes a pair of thermal insulation films formed on an outer surface of the luminous tube around the electrodes, respectively. Zinc, halogen, and a noble gas are sealed in the luminous tube. A metal is also sealed in the luminous tube. The metal has a lower ionization energy than zinc. A ratio of a molar density of the metal to a molar density of zinc is 0.001 to 0.05. The mercury-free discharge lamp has a long life and can emit an ultraviolet beam in a short wavelength range (200-350 nm) at a high output and a high luminous efficacy without causing devitrification of the luminous tube.
US09330896B2	Mass analysis device and mass separation device An object of the present invention is to provide a mass spectrometer and a mass separator whose design and performance are less restricted by problems arising from the principle of operation, and which have in principle no limitation on the mass-to-charge ratio range to be able to deal with and are each capable of repeatedly analyzing or extracting plural ionic species of different mass-to-charge ratios in a short time.A mass spectrometer (10) is configured from an ion source (1), an ion introduction unit (2), a mass analyzer (3), an ion detection unit (4), and the like. Crude ions are introduced into a separation space (5) at a predetermined acceleration voltage as a pulse synchronized with the phase of a one-dimensional high-frequency electric field. In the separation space (5), each ion travels in an incident direction by inertia, and besides they are displaced by force received from the one-dimensional high-frequency electric field which acts in the y-direction crossing the incident direction. Ionic species having different mass-to-charge ratios with each other are separated by the difference in displacement magnitude. At this time, the acceleration voltage and the period of the one-dimensional high-frequency electric field are set in order that the measured ionic species may exit from the separation space (5) having received the action of the electric field for one period.
US09330894B1	Ion transfer method and device An ion transport device can include a plurality of pole rod pairs arranged in parallel, and a controller. The controller can be configured to apply voltages in a repeating voltage pattern to the pole rod pairs thereby creating a plurality of potential wells capable of capturing ions, and move the repeating voltage pattern along the pole rod pairs to move captured ions along the ion transport device. The ion transport device can be incorporated into a mass spectrometer.
US09330888B2	Dry etching method The present invention discloses a dry etching method. The dry etching method comprises: etching a first medium layer; introducing a second reaction gas in a reaction chamber, and exciting the second reaction gas into plasmas with a second radiofrequency power, so that the plasmas formed from the second reaction gas are combined with particulate pollutants in the reaction chamber, and in this case the reaction chamber is vacuumized to perform conversion processing; and etching a second medium layer. The technical solution of the present invention is capable of effectively preventing particulate pollutants from falling onto the glass substrate in the procedure of executing conversion processing, meanwhile, the effect of chamber purifying through vacuumizing is improved, and the amount of the particulate pollutants in the reaction chamber is effectively reduced.
US09330887B2	Plasma reactor with tiltable overhead RF inductive source Correction of skew in plasma etch rate distribution is performed by tilting the overhead RF source power applicator about a tilt axis whose angle is determined from skew in processing data. Complete freedom of movement is provided by incorporating exactly three axial motion servos supporting a floating plate from which the overhead RF source power applicator is suspended.
US09330886B2	Irradiation installation and control method for controlling same To control of an irradiation installation, a particle beam is generated with a beam intensity, and a beam quality of the particle beam is monitored with a beam monitoring device. One of several adjustable measurement ranges is selected, wherein the measurement range of the beam monitoring device is set depending on the beam intensity of the particle beam and/or depending on a particle count to be applied.
US09330881B2	Blanking device for multi charged particle beams, and multi charged particle beam writing apparatus A blanking device for multi-beams includes a substrate, a dielectric film formed on the substrate, plural first electrodes, at positions each exposed in a corresponding opening, to be applied with a first deflection potential, plural second electrodes, at positions each opposite to a corresponding first electrode with respect to the corresponding opening, to be applied with a second deflection potential, including a ground potential, for deflecting a corresponding beam of the multi-beams by a difference between the first and second deflection potentials, and a conductive film arranged in, other than plural first regions on the dielectric film each along a corresponding first electrode and being shaded by each first electrode in a case of being viewed from a position where a corresponding beam passes through a corresponding opening, a second region on the dielectric film, wherein insulation is provided between the plural first and second electrodes.
US09330877B2	Logic function generation from single microplasma transistor devices and arrays of devices Logic devices are provided in multiple sub-collector and sub-emitter microplasma devices formed in thin and flexible, or inflexible, semiconductor materials. Logic operations are provided with one of a plurality of microplasmas forming sub-collectors with a common emitter, or a common collector plasma with a plurality of sub-emitter regions in a solid state semi-conductor pn-junction, and generating a logic output from an electrode, based upon electrode inputs to two other electrodes.
US09330876B2	Systems and methods for regulating pressure of a filled-in gas A system for regulating a pressure of a filled-in gas is presented. The system includes a reservoir that stores a reservoir gas adsorbed in a sorbent material at a storage temperature, a gas-filled tube containing the filled-in gas, a controller configured to determine a pressure change required in the filled-in gas based upon signals representative of a pressure of the filled-in gas inside the gas-filled tube and a required pressure threshold, determine an updated temperature of the sorbent material based upon the pressure change required in the filled-in gas, and regulate the pressure of the filled-in gas by controlling the reservoir to change the storage temperature of the sorbent material to reach the updated temperature of the sorbent material.
US09330873B2	Electromagnetic switching device Disclosed is an electromagnetic switching device. The electromagnetic switching device includes a housing, a fixed contact point inside the housing, a movable contact point positioned under the fixed contact point to repeatedly perform contact with the fixed contact point and separation from the fixed contact point, a shaft coupled with the movable contact point, a return spring to continuously press the shaft downward, and a movable core coupled with the shaft. The shaft includes a pressing surface directed downward, and the movable core is provided to make contact with an upper end of the pressing surface, so that the movable core presses the pressing surface to move up the pressing surface if the movable core and the shaft move up, and the pressing surface presses the movable core downward to push down the movable core if the movable core and the shaft move down.
US09330872B2	Electromagnetic relay An electromagnetic relay includes a contact that includes a fixed contact and a movable contact, a permanent magnet provided on the peripheral side of the contact, and a non-magnetic body. The movable contact is displaceable in a first direction to move toward the fixed contact and in a second direction to move away from the fixed contact. The permanent magnet has a polarity direction perpendicular to the first and second directions. The non-magnetic body faces toward the direction of a Lorentz force that acts based on the permanent magnet in a direct electric current flowing through the contact.
US09330866B2	Electrical switching device Electrical switching device having a housing, at least two switching chambers within the housing with contacts to interrupt at least one current path, an arc extinguishing device for each switching chamber, and at least one guide channel within the housing, which directs the arc gas exiting the arc extinguishing device towards at least one of the exhaust openings to allow the arc gases to exit the housing, whereby each switching chamber has a guide channel, and whereby the guide channels of the different switching chambers are separated from each other.
US09330865B2	Current switch A current switch includes a blade-shaped movable contact that extends in a radial direction from a rotation center, and that reciprocates such that a free end of the movable contact draws a rotation locus, a fixed contact that includes a plurality of pairs of energizing contacts that come into and out of contact with the movable contact, a movable arcing contact that is provided on the movable contact, fixed arcing contacts that are provided on a pair of energizing contacts, and a pair of permanent magnets that are arranged within the pair of energizing contacts adjacent to the fixed arcing contacts.
US09330861B2	Arc chute assembly for an automatic transfer switch system and methods of assembling the same An arc chute assembly for use in an automatic transfer switch includes a housing including a pair of opposing sidewalls and a primary deionization plate coupled between the pair of opposing sidewalls. The primary deionization plate includes a tongue portion oriented substantially midway between the opposing sidewalls and extending toward a contact assembly. The tongue portion is configured to facilitate suppressing an electric arc originating from the contact assembly.
US09330849B2	Non-uniform dielectric layer capacitor for vibration and acoustics improvement A Non-Uniform Dielectric Layer, Multi-Layer-Ceramic-Capacitor (MLCC) has upper and lower dielectric layers separating upper and lower electrode layers, where the lower dielectric layers have a greater vertical thickness than the upper dielectric layers to reduce piezoelectric effect driven capacitor reaction forces on a printed circuit board (PCB) on which the capacitor is mounted. Such an MLCC may include an upper set of dielectric layers that separate adjacent pairs of upper electrode layers in a top portion of the MLCC, and a lower set of dielectric layers that separate adjacent pairs of lower electrode layers in a bottom portion of the MLCC. A bottom portion of the MLCC may be mounted on a PCB. The thickness of the lower dielectric layers may be between 1.5 and 3.5 times greater than the upper dielectric layers to reduce piezoelectric effect driven capacitor reaction forces in the audio range of human hearing.
US09330847B2	Conductive paste for external electrodes and multilayer ceramic electronic component manufactured using the same A multilayer ceramic electronic component may include: a ceramic body including a plurality of dielectric layers and a plurality of internal electrodes; electrode layers disposed on outer surfaces of the ceramic body to be electrically connected to the internal electrodes and containing a conducive metal and glass; and a conductive resin layer disposed on the electrode layer and containing first copper particles, second copper particles smaller than the first copper particles, copper oxide particles smaller than the second copper particles, and a base resin. The copper oxide particles have a particle size of 20 nm or less.
US09330839B2	Grain oriented electrical steel sheet and method for manufacturing the same A grain oriented electrical steel sheet is subjected to magnetic domain refining treatment by electron beam irradiation and exhibits excellent low-noise properties when assembled as an actual transformer, in which a ratio (Wa/Wb) of a film thickness (Wa) of the forsierite film on a strain-introduced side of the steel sheet to a film thickness (Wb) of the forsierite film on a non-strain-introduced side of the steel sheet is 0.5 or higher, a magnetic domain discontinuous portion in a surface of the steel sheet on the strain-introduced side has an average width of 150 to 300 μm, and a magnetic domain discontinuous portion in a surface of the steel sheet on the non-strain-introduced side has an average width of 250 to 500 μm.
US09330837B2	Energy transfer assembly with tuned leakage inductance and common mode noise compensation An energy transfer assembly includes first and second windings wound around a bobbin. The first winding has a first number of layers proximate to a first end and a second number of layers proximate to a second end of the bobbin. The second winding has a third number of layers proximate to the first end and a fourth number of layers proximate to the second end. At least a portion of one of the first and second windings overlaps at least a portion of the other one of the first and second windings. A degree of overlap between the first and second windings is non-uniform. An isolation barrier is between the first and second windings and around the bobbin. A distance between the isolation barrier and an axis of the bobbin varies along the length of the bobbin.
US09330834B2	Reactor A core member (2) of the disclosed reactor (Da) comprises a magnetic wire material and is arranged outside a plurality of coils (1). As the core member (2) in the reactor (Da) having this structure is a wire material and is arranged outside the plurality of coils (1), the core member (2) can be formed by the winding of the wire material, simplifying manufacturing.
US09330832B2	Integrated transformer balun with enhanced common-mode rejection for radio frequency, microwave, and millimeter-wave integrated circuits Apparatus and method example embodiments provide an improved common mode rejection ratio in high frequency transformer baluns. According to an example embodiment of the invention, an apparatus comprises a first winding of at least one turn forming a primary coil, having first and second differential leads oriented in a first direction, the primary coil formed in a first conductive layer over a substrate and the first differential lead of the primary coil being grounded; and a second winding of at least one turn forming a secondary coil, having a third and fourth differential leads oriented in a second direction offset by an angle of greater than zero degrees and less than 180 degrees from the first direction, the secondary coil formed in a second conductive layer separated by an insulating layer from the first conductive layer.
US09330826B1	Integrated architecture for power converters A power converter having components enclosed by legs of a first inductor is described. The first inductor is fabricated on the top surface of a substrate along the perimeter of the substrate. A second inductor is fabricated on the bottom surface of the substrate and mirrors the first inductor. Electromagnetic cancellation is provided when the current flow in the second inductor is opposite of the current flow in the first inductor.
US09330825B2	Magnetic configurations A field system includes a first component having at least one first field source having opposite polarities and a second component having at least one second field source having opposite polarities. At least one of the first and second components has a movement relative to the other of the components to produce a field interaction therebetween. The at least one first and the at least one second field sources are oriented relative to each other such that in the field interaction the resulting repelling forces and attractive forces substantially cancel each other out and there is an increase and a decrease in the field strength of at least some of the field sources. Therefore, the field system, which can be a magnetic configuration system, provides a field strength change with a minimum energy input which can increase the efficiency of many machines such as MRI or electricity generators.
US09330822B2	Reactor and manufacturing method thereof A reactor includes a coil and a core unit having partial cores butted against one another to form a closed magnetic path. The partial cores include a first partial core forming and a second partial core. The first partial core is inserted in the hollow of the coil. A pressed face of the first partial core is oriented orthogonal to the winding axis direction of the coil. The second partial core is butted against the first partial core. A pressed face of the second partial core is oriented orthogonal to a direction different from the winding axis direction. The pressed face of the second partial core is a substantially flat plane.
US09330818B2	Electrical cable resistant to fire, water and mechanical stresses An electrical cable includes at least one conductor and a barrier arranged externally to the at least one conductor. The barrier includes two first layers including an inorganic material and a second layer including a polymer-metal composite material, the second layer being interposed between the two first layers. The electrical cable also includes, in an intermediate position between the at least one conductor and the barrier, solely discontinuous layers and/or layers of non-thermally-collapsible materials.
US09330812B2	Method and apparatus for communicating between cab interior and exterior chassis of truck A method and apparatus for communicating between the cab interior and exterior chassis of a truck comprises a custom-designed multi-conductor cable having a plurality of circuits. Each multi-conductor cable is terminated at each end with non-proprietary connectors and fabricated into a harness of a length that is truck brand and model specific determined by the truck manufacturer and carry various communication functions between the cab interior and the distal exterior truck cab.
US09330809B2	Electrically conducting composites, methods of manufacture thereof and articles comprising the same Disclosed herein is a composition comprising a regioregular polyalkylthiophene and/or a regioregular poly[2,5-bis(3-alkylthiophen-2-yl)thieno(3,2-b)thiophene]; and a metallocene; where the metallocene is present in an amount of greater than 75 wt %, based on the total weight of the composition; where the charge mobility is increased by a factor of 3 or more over compositions having 50 wt % of ferrocene or less with the remainder being a regioregular polyalkylthiophene and/or a regioregular poly[2,5-bis(3-alkylthiophen-2-yl)thieno(3,2-b)thiophene]. Disclosed herein too is a method of manufacturing a thin film comprising dissolving a regioregular polyalkylthiophene and/or a regioregular poly[2,5-bis(3-alkylthiophen-2-yl)thieno(3,2-b)thiophene] in a solvent to form a solution; dissolving a metallocene in the solution; where the metallocene is present in an amount of 75 wt % or greater based on the total weight of the ferrocene and the regioregular polyalkylthiophene and/or the regioregular poly[2,5-bis(3-alkylthiophen-2-yl)thieno(3,2-b)thiophene]; disposing the solution on a substrate; and annealing the substrate.
US09330808B2	Passivation composition and its application A passivation composition and use of the composition in a method of forming a conductive pattern are provided. The passivation composition includes an oxidizing agent, an inorganic base with a general formula M(OH)n and a solvent, wherein M is a metal ion and n is the valence number of the metal ion. The method includes the following steps: (a) forming a polymer conductive layer on a substrate, wherein the polymer conductive layer is consisting of a first area and a second area. The first area is corresponding to a conductive area to be formed; and (b) passivating the second area by using the passivation composition to reduce the conductivity of the second area and form the conductive pattern on the substrate.
US09330807B2	Conductive paste and method for manufacturing the same, wiring using the conductive paste and method for manufacturing the same The present invention relates to a conductive paste in which fine metal particles are dispersed into a chemical adsorption liquid produced from a mixture of at least an alkoxysilane compound, a silanol condensation catalyst, and a nonaqueous organic solvent to form an organic thin film comprising molecules covalently bound to the surface of the fine metal particle by having the surface of the fine metal particle react with the alkoxysilane compound, so that fine metal particles that are given a reactive function to the surface are produced while almost maintaining the original conductivity of the fine metal particles, and further the particles are pasted with an organic solvent.
US09330806B2	Semiconductive ceramic sintered compact There is provided a semiconductive ceramic sintered compact that has a conductivity high enough to attain static electricity removal and antistatic purposes and, at the same time, has excellent mechanical properties or stability over time. The semiconductive ceramic sintered compact includes at least a main phase and first and second phases contained in the main phase observed as a result of observation of any face of the sintered compact, the main phase being a ceramic sintered phase containing Al2O3 particles, the first phase being a grain boundary phase including a conductive substance-containing conductive phase and Al2O3 particles, the Al2O3 particles being present in an island-sea form in the conductive phase, the second phase being a grain boundary phase containing a conductive phase having the same composition as the conductive phase in the first phase and having a structure that electrically connects the first phases three-dimensionally to each other.
US09330804B2	Metallic material for electronic components, and connector terminals, connectors and electronic components using same The present invention provides a metallic material for electronic components having a low degree of whisker formation and a high durability, and connector terminals, connectors and electronic components using the metallic material. The metallic material for electronic components includes: a base material; on the base material, an lower layer constituted with one or two or more selected from the group consisting of Ni, Cr, Mn, Fe, Co and Cu; on the lower layer, an upper layer constituted with an alloy composed of one or both of Sn and In (constituent elements A) and one or two or more of Ag, Au, Pt, Pd, Ru, Rh, Os and Ir (constituent elements B), wherein the thickness of the lower layer is 0.05 μm or more; the thickness of the upper layer is 0.005 μm or more and 0.6 μm or less; and in the upper layer, the relation between the ratio, the constituent elements A/(the constituent elements A+the constituent elements B) [mass %] (hereinafter, referred to as the proportion of Sn+In) and the plating thickness [μm] is given by plating thickness≦8.2×(proportion of Sn+In)−0.66 [herein, (the proportion of Sn+In)≧10 mass %].
US09330801B2	Method for fabricating medical imaging multilayer, multiaperture collimator A photon collimator, suitable for use in medical imaging equipment, is constructed from a block of photon-attenuating material, such as solid tungsten or molybdenum alloy that defines a plurality of integrally formed septa slats. Each slat has an elongated length dimension greater than thickness and depth dimensions, and is oriented in an opposed pattern array that is laterally spaced relative to its respective thickness dimension. An aperture channel is defined between each pair of opposed slats. Rows of integrally formed slats in one block or separately affixed blocks may be stacked on each other at skewed angles to form two-dimensional grids of apertures having polygonal cross sections. The slats may be formed by electric discharge or laser thermal ablation machining, such as by a sequential passing of an EDM wire cutting head along the pattern array, repeating sequential cutting of respective channel depth and width.
US09330799B1	Garment for protection from ultraviolet radiation A garment for protection from ultraviolet radiation, having a torso garment with a front side and a rear side that extend from a first edge to an end. Further having first and second lateral sides and first and second shoulder sections. Extending from the first and second lateral sides and the first and second shoulder sections are first and second sleeves. First and second hand covers extend from the first and second sleeves respectively. The first and second hand covers each have an elastic band. The elastic band, a distal end, and third and fourth lateral sides define an interior face. The interior face has a thumb loop and at least first and second finger loops. The elastic band, the distal end, and the third and fourth lateral sides also define an exterior face.
US09330792B2	Testing memory devices with distributed processing operations Automated testing system and method of testing memory devices with distributed processing operations. A redundancy analysis system includes multiple test site processors (TSPs) respectively coupled to multiple devices under test (DUTs). Each TSP is installed with a redundancy analyzer configured to analyzing redundancy data returned from a respective (DUT). Each TSP may be coupled with a respective fail engine for returning the redundancy data from the corresponding DUT. A main TSP of the multiple TSPs is configured to control testing routine over the multiple DUTs and process failure related data from the DUTs. The main TSP may direct the RAs distributed in the multiple TSPs to execute the redundancy analyzers in parallel.
US09330788B2	Semiconductor integrated circuit capable of performing self-test According to one embodiment, there is provided a semiconductor integrated circuit including a memory, a capture register, a writing unit, and a control unit. The memory includes a plurality of memory bit cells. The capture register stores data read out from a memory bit cell selected out of the plurality of memory bit cells. The writing unit writes relevant data according to the data stored in the capture register to the memory bit cell. The control unit reads the relevant data from the written memory bit cell, compares the relevant data according to the data stored in the capture register and the read-out relevant data, controls the capture register such that a comparison result is stored by overwriting a result as a self-test result about the written memory bit cell, and controls the writing unit such that the original data according to the read-out relevant data is rewritten to the selected memory bit cell.
US09330787B2	Memory system and memory controller According to one embodiment, a memory system includes a non-volatile memory and a memory controller that controls the non-volatile memory. The non-volatile memory includes a memory cell array and an access control unit. The access control unit performs a program operation for changing threshold voltages of memory cells and a read operation for reading data from the memory cells. The memory controller includes a read/write control unit having a first program parameter set and a second program parameter set. The read/write control unit causes the access control unit to perform a program operation based on the first program parameter set, and when a predetermined condition is satisfied, performs switching from the first program parameter set to the second program parameter set and causes the access control unit to perform a program operation based on the second program parameter set.
US09330784B2	Dynamic window to improve NAND endurance Methods and apparatus to provide dynamic window to improve NAND (Not And) memory endurance are described. In one embodiment, a program-erase window associated with a NAND memory device is dynamically varied by starting with a higher erase verify (TEV) voltage and lowering the TEV voltage with subsequent cycles over a life of the NAND memory device based on a current cycle count value. Alternatively, the program-erase window is dynamically varied by starting with a higher erase verify (PV) voltage and erase verify (TEV) voltage and lowering the PV and TEV voltages with subsequent cycles over a life of the NAND memory device based on the current cycle count value. Other embodiments are also disclosed and claimed.
US09330779B2	Detecting programmed word lines based on NAND string current A number (Nwl) of programmed word lines in a block of NAND strings is determined by measuring a reference combined current (Iref) in the block when all of the memory cells are in a conductive state. Subsequently, to determine if a word line is a programmed word line, an additional combined current (Iadd) in the block is measured with a demarcation voltage applied to the selected word line. The selected word line is determined to be programmed word lines if Idd is less than Iref by at least a margin. Nwl can be used to adjust an erase-verify test of an erase operation by making the erase-verify test relatively hard to pass when the number is relatively small and relatively easy to pass when the number is relatively large. Or, Nwl can be used to identify a next word line to program in the block.
US09330777B2	Memory program disturb reduction Some embodiments include a memory device and a method of programming memory cells of the memory device. One such method can include applying, during a first pass of programming, a first bias voltage value to a source select gate to isolate memory cells from a source, applying a programming voltage to an access line of a page of the memory cells during the first pass of programming, and applying a second bias voltage value to the source select gate to isolate the memory cells from the source during a second pass of programming. Further devices, systems, and methods are disclosed.
US09330776B2	High voltage step down regulator with breakdown protection A high voltage step regulator, such as would be used to provide a regulated low voltage (on the order of a few volts) from a high voltage external supply (e.g. 12V), is presented. To protect the output transistor, through which the output is provided from the input, from breakdown, a depletion type device is connected between the supply and the output transistor. The control gate of the depletion device is then connected to the output level of the regulator. This reduces the voltage drop across the output transistor, helping to avoid violating design rules (EDR) on how great a voltage differential can be placed across the output transistor. Examples of applications for such a circuit are for various operating voltages on a non-volatile memory chip operating with a high voltage power supply.
US09330775B2	Flash memory, flash memory system and operating method of the same A flash memory, a flash memory system, and an operating method thereof. The method of operating a flash memory includes counting the number of memory cells having threshold voltages included in a first adjacent threshold voltage range (defined by a first reference read voltage for distinguishing between initially separated adjacently located threshold voltage distributions and a first search read voltage having a first voltage difference from the first reference read voltage), and a second adjacent threshold voltage range (defined by the first reference read voltage and a second search read voltage having a second voltage difference from the first reference read voltage), and setting a first optimal read voltage based on the difference between the first and second counted numbers of the memory cells.
US09330772B2	Non-volatile semiconductor memory device and memory system A non-volatile semiconductor memory device includes a memory cell array and a control circuit. A control circuit performs an erase operation providing a memory cell with a first threshold voltage level for erasing data of a memory cell, and then perform a plurality of first write operations providing a memory cell with a second threshold voltage level, the second threshold voltage level being higher than the first threshold voltage level and being positive level. When the control circuit receives a first execution instruction from outside during the first write operations, the first execution instruction being for performing first function operation except for the erase operation and the first write operations, the circuit performs the first function operation during the first write operations.
US09330770B2	Non-volatile memory devices, operating methods thereof and memory systems including the same Nonvolatile memory devices, operating methods thereof, and memory systems including the same. A nonvolatile memory device may include a memory cell array and a word line driver. The memory cell array may include a plurality of memory cells. The word line driver may be configured to apply word line voltages to a plurality of word lines connected to the plurality of memory cells, respectively. Magnitudes of the word line voltages may be determined according to locations of the plurality of word lines.
US09330762B2	Semiconductor memory device According to one embodiment, a semiconductor memory device includes a first memory cell array including a first block that includes memory cells, a second memory cell array including a second block that includes memory cells, word lines arranged in the first and second memory cell arrays, and a row decoder including transfer gates that respectively transfer voltages to the word lines. Word lines arranged in the first block include first and second groups, word lines arranged in the second block include third and fourth groups, and the first and third groups commonly use the transfer gates.
US09330761B2	Three dimensional stacked nonvolatile semiconductor memory A three dimensional stacked nonvolatile semiconductor memory according to an example of the present invention includes a memory cell array comprised of first and second blocks disposed side by side in a first direction, and a driver disposed on one end of the memory cell array in a second direction orthogonal to the first direction. First select gate lines in the first block and first select gate lines in the second block are connected to the driver after they are commonly connected in one end in the second direction of the memory cell array in a relation of one to one.
US09330760B2	Method and apparatus for setting TCAM entry The present invention discloses a method and an apparatus for setting a TCAM entry and relates to the field of communications, which are used to achieve an objective of improving utilization of a TCAM. The method for setting a TCAM entry includes: acquiring a number set formed by values of same fields in preset packets, where the packets are packets on which a same action needs to be performed, and the number set includes at least two numbers; acquiring a longest continuous mask of the number set; obtaining an acquisition result according to the longest continuous mask of the number set; and storing the acquisition result in a ternary content-addressable memory TCAM entry corresponding to the action. The solutions disclosed in the present invention are applicable to a scenario of setting a TCAM entry.
US09330759B2	Storage element, storage device, and signal processing circuit A signal processing circuit whose power consumption can be suppressed is provided. In a period during which a power supply voltage is not supplied to a storage element, data stored in a first storage circuit corresponding to a nonvolatile memory can be held by a first capacitor provided in a second storage circuit. With the use of a transistor in which a channel is formed in an oxide semiconductor layer, a signal held in the first capacitor is held for a long time. The storage element can accordingly hold the stored content (data) also in a period during which the supply of the power supply voltage is stopped. A signal held by the first capacitor can be converted into the one corresponding to the state (the on state or off state) of the second transistor and read from the second storage circuit. Consequently, an original signal can be accurately read.
US09330757B2	Electronic device An electronic device comprising a semiconductor memory unit that may include a cell array including a plurality of storage cells; a first line connected to one ends of the plurality of storage cells; a second line connected to the other ends of the plurality of storage cells; a first driver connected to one end of the first line at a first contact location on one side of the cell array, and configured to apply a first electrical signal to the one end of the first line; and a second driver connected to one end of the second line at a second contact location on a side of the cell array opposing the side of the cell array where the first contact location is located, and configured to apply a second electrical signal to the one end of the second line.
US09330755B1	Latch circuits and methods with programmable impedance elements A circuit can include at least one two terminal element programmable between at least two impedance states; a write section configured to place the element into different impedance states in a write mode; and a read section configured to generate an output value corresponding to the impedance state of at least one element in a read mode; wherein the at least one element draws substantially no current in a standard mode that is different from the write and read modes.
US09330754B2	Electronic device and method for fabricating the same A semiconductor memory includes a substrate configured to include a plurality of active regions which are defined by isolation layers extending in a first direction and word lines extending in a second direction intersecting the first direction; source line contacts configured to be alternately disposed over the active regions arranged in the first and second directions and disposed over each of the active regions arranged in a third direction intersecting the first and second directions; source lines configured to extend in the third direction while being coupled to the source line contacts; contacts configured to be disposed over each of the active regions over which the source line contacts are not disposed; variable resistance elements configured to be disposed over each of the contacts; bit line contacts configured to be disposed over each of the variable resistance elements; and bit lines configured to extend in a fourth direction intersecting the first to third directions while being coupled to the bit line contacts.
US09330752B2	Memory system and method for writing data into memory system A memory system of one embodiment includes: a nonvolatile memory including a plurality of word lines each connected to memory cells, each one of the memory cells being capable storing two bits, the memory cells connected to one of the plurality of word lines constituting an upper page and a lower page, each one of the pages being a unit of data programming; a random access memory configured to store an address translation table indicating relationships between logical addresses designated by a host and physical addresses in the nonvolatile memory. The memory system of the embodiment further includes a memory controller which execute data fixing for saving the address translation table from the random access memory to the nonvolatile memory; and write dummy data to at least one page subsequent to the page in which valid data has been written in the nonvolatile memory before executing the data fixing.
US09330750B2	Integrated circuit using method for setting level of reference voltage An integrated circuit includes a reference voltage level setting circuit and a reference voltage generation circuit. The reference voltage level setting circuit is configured to set a level of an input reference voltage to a preset level in a power-up period or a self-refresh mode. The reference voltage generation circuit is configured to select one of a plurality of reference voltages and output the selected reference voltage as the input reference voltage when the power-up period is ended and an operation mode is not in the self-refresh mode.
US09330748B2	High-speed compare operation using magnetic tunnel junction elements including two different anti-ferromagnetic layers A match-in-place-type compare operation utilizes a string of Magnetic Tunnel Junction (MTJ) elements including storage layers and sense layers having different anti-ferromagnetic structures respectively having higher and lower blocking temperatures. Confidential data is written into the storage layers of the MTJ elements by heating the elements above the higher blocking temperature, and then orienting the storage and sense layers in first storage magnetization directions using field lines. The elements are then cooled to an intermediate temperature between the higher and lower blocking temperatures, and the field lines are turned off, setting the sense layers to preliminary storage magnetization directions opposite to the first directions. During a pre-compare phase, an input logic pattern is written into the sense layers by heating to the intermediate temperature. During a compare operation, with the field lines turned off, resistance of the MTJ string is detected by passing a read current through the string.
US09330742B2	Semiconductor device and system including the same A semiconductor device includes a plurality of data output circuits suitable for outputting data; an address training driver suitable for generating a plurality of address training data and a control signal; a plurality of data lines suitable for transferring the address training data to the data output circuits; and a self-correction circuit suitable for correcting a delay time of the address training data that reaches the data output circuits from the address training driver through the plurality of data lines, and correcting skew of the data that is outputted from the data output circuits.
US09330741B2	Semiconductor devices A semiconductor device including a data aligner that aligns input data in response to internal strobe signals obtained by dividing a data strobe signal to generate a first alignment data and a second alignment data. The semiconductor device may also include a phase sensor that generates a control clock signal in response to a clock signal and senses phases of the internal strobe signals with the control clock signal to generate a selection signal, and a data selector that selectively outputs the first and second alignment data as a first selection alignment data and a second selection alignment data in response to the selection signal.
US09330739B2	Semiconductor device having high-voltage transistor A semiconductor device includes a memory cell array having a plurality of memory cells respectively coupled to first and second bit lines, page buffers, and a bit line selection circuit including a plurality of selection circuit blocks configured to couple the first or second bit lines to the page buffers. A pair of the first and second bit lines is disposed in each of the plurality of selection circuits so that first bit lines of adjacent selection circuit blocks face each other, or second bit lines of adjacent selection circuit blocks face each other.
US09330734B2	Method and apparatus for dynamically adjusting voltage reference to optimize an I/O system Described herein is an apparatus for dynamically adjusting a voltage reference level for optimizing an I/O system to achieve a certain performance metric. The apparatus comprises: a voltage reference generator to generate a voltage reference; and a dynamic voltage reference control unit, coupled with the voltage reference generator, to dynamically adjust a level of the voltage reference in response to an event. The apparatus is used to perform the method comprising: generating a voltage reference for an input/output (I/O) system; determining a worst case voltage level of the voltage reference; dynamically adjusting, via a dynamic voltage reference control unit, the voltage reference level based on determining the worst case voltage level; and computing a center of an asymmetrical eye based on the dynamically adjusted voltage reference level.
US09330730B2	Drive tray An exemplary drive tray includes parallel side members; at least one end member connected to the parallel side members where the members collectively form a resilient, substantially rectangular frame for receipt of a drive body; and a pair of parallel side walls extending in a direction normal to a plane defined by the frame where the pair of parallel side walls include engagement features to engage opposing sides of a drive body. Various other apparatuses, systems, methods, etc., are also disclosed.
US09330729B2	Slim profile, rear docking tape drive canister In one embodiment, an automated tape library includes an array of tape drive canister bays which each allow insertion of a tape drive canister therein that supports a tape drive, a power system, a communications system, and a robotic accessor adapted for accessing through insertion and/or removal tape cartridges in tape drives in the array of tape drive canister bays, wherein each tape drive canister bay includes a latching mechanism adapted for securing a tape drive canister into the tape drive canister bay when the latching mechanism is in a latched close position and releasing the tape drive canister from the tape drive canister bay when the latching mechanism is in an unlatched open position, and a library docking connector adapted for connecting a docking connector of the tape drive canister to the power system and the communications system when the latching mechanism is in the latched close position.
US09330728B1	Spindle motor and disk drive apparatus A spindle motor includes a base portion molded by casting. The base portion includes a plate portion extends radially with respect to a central axis, and a wall portion arranged to extend in an axial direction from a radially outer edge of the plate portion. The wall portion includes a hole portion in which an attaching member to attach a cover member to the spindle motor is arranged, and is arranged to support at least a portion of the cover member. An inside surface of the base portion includes a metal surface subjected to a cutting process. The base portion includes a recessed portion arranged between the metal surface and the hole portion. The recessed portion is recessed either upward or downward in the axial direction, overlaps with at least one of the metal surface and the hole portion when viewed in a horizontal direction perpendicular to the central axis.
US09330727B1	Binding a data object to a rotational hard drive A method of determining whether a data object is stored on a storage device such as a disk includes a write operation that partitions the data object into sub-objects according to a random sequence of control bits, by (a) assigning a first block of the data object to an initially selected sub-object, and (b) assigning successive blocks to a currently selected sub-object or to a next selected sub-object based on the value of the corresponding control bit. The sub-objects are written to distinct physical regions of the storage device so that differential read latencies are experienced depending on the pattern of block access. An object read/verify operation includes reading the blocks of the data object sequentially, recording respective latencies, constructing a result word to record latency values, and calculating a difference between the control word and the result word.
US09330721B2	Streaming-based media system The invention relates to a system and method for processing or editing media contents. The media system comprises a transcoding apparatus which preferably receives high-resolution media data and converts them into a media stream with low resolution and a media stream with high resolution and provides them with an identical media stream identifier. The images of the media data in the two media streams are provided with identical identification codes by the transcoding apparatus. A logging apparatus receives the media stream with low resolution and displays the media data to a user. The logging apparatus provides the media data as a whole, individual image sequences or images therefrom with metadata. The individual metadata are allocated to individual image sequences or images of the media stream with low resolution using the identification codes and are logically combined with the media data using the media stream identifier.
US09330719B2	Automatic generation of video from structured content Apparatus for generation of playable media from structured data, comprises a structured data reading unit for reading in of content of a first structure, a transformation unit for transforming said content into a second structure, said transformation comprising incorporating media play instructions, and a rendering unit for rendering content from the second structure using said media play instructions to generate playable media from the content.
US09330717B2	Editing device An editing device for connecting first and second streams containing variable length coded parameters, includes a decision unit operable to compare an encoded first parameter contained in the first stream with an encoded second parameter contained in the second stream, and decide whether at least one of the first parameter and the second parameter is to be changed, and a replacing unit operable to replace at least one of the first and second parameters with the other code word of the same length as the code words assigned to the first and second parameters, when the decision unit decides that at least one of the parameters is to be changed.
US09330716B2	Apparatus and a record carrier for, and a method of recording a sequence of video data signals An apparatus for recording a sequence of video data signals on a record carrier has been proposed. The apparatus comprises input means (1) for receiving video data signals, generating means (100) for generating characteristic point information signals, processing means (100) for processing the characteristic point information signals for a plurality of characteristic points into a sequence of characteristic points information signals (CPI) and writing means (102) for writing the sequence of video data signals and the sequence of characteristic points information signals on the record carrier. The characteristic point information signals identify a characteristic point in the sequence of video data signals. Various measures are proposed in relation to the CPI aiming at improving quality of trickplay and random access playback operations.
US09330715B1	Mapping of shingled magnetic recording media Mapping out restricted areas on at least one disk of a data storage device. The at least one disk includes overlapping tracks with a plurality of sectors for storing data. A first addressing is provided for the plurality of sectors on the at least one disk. Defective sectors of the plurality of sectors are detected and mapped out from the first addressing. A restricted area is calculated including sectors of the plurality of sectors and the restricted area is mapped out from a second addressing.
US09330713B2	Linear recording executing optimum writing upon receipt of series of commands including mixed read and write commands An apparatus according to one embodiment includes a head, a controller coupled to the head, and logic integrated with and/or executable by the controller. The logic is configured to receive a series of commands, the series of commands including mixed read, overwrite, and append write commands, cause reading of data from a specified position of a tape using the head and storing the data in a buffer in response to a read command; and cause writing of data stored in the buffer starting from an appended data end position of the tape in response to an append write command.
US09330710B2	System for determining the location of a data storage library robot and methods of determining the same Systems and methods for determining the location of a mobile robot within a data storage library and to a library including such systems and utilizing such methods.
US09330705B2	Optical recording and playback apparatus An optical recording and playback apparatus includes: a light source configured to emit a light beam; a tracking mirror configured to change a direction of the light beam; a collimator configured to form the light beam into a parallel light beam; an objective lens configured to collect the parallel light beam to the optical tape; a lens actuator configured to adjust a position of the objective lens in a focus direction of the optical tape and a position of the objective lens in a tracking direction of the optical tape; a polarization hologram plate configured to separate a reflected light beam of the light beam; a photodetector receiving elements configured to receive the plurality of light fluxes; and a control circuit configured to control the lens actuator and the tracking mirror. The tracking mirror is disposed near the light source, and movable in the tracking direction.
US09330703B2	Polishing composition for nickel-phosphorous memory disks The invention provides a chemical-mechanical polishing composition comprising alpha alumina, fumed alumina, silica, an oxidizing agent that oxidizes nickel-phosphorous, a complexing agent, and water. The invention also provides a method of chemically-mechanically polishing a substrate comprising contacting a substrate with a polishing pad and the chemical-mechanical polishing composition, moving the polishing pad and the polishing composition relative to the substrate, and abrading at least a portion of the substrate to polish the substrate.
US09330698B1	DSA suspension having multi-layer PZT microactuator with active PZT constraining layers A PZT microactuator such as for a hard disk drive has a restraining layer bonded on its side that is opposite the side on which the PZT is mounted. The restraining layer comprises a stiff and resilient material such as stainless steel. The restraining layer can cover most or all of the top of the PZT, with an electrical connection being made to the PZT where it is not covered by the restraining layer. The restraining layer reduces bending of the PZT as mounted and hence increases effective stroke length, or reverses the sign of the bending which increases the effective stroke length of the PZT even further. The restraining layer can be one or more active layers of PZT material that act in the opposite direction as the main PZT layer. The restraining layer(s) may be thinner than the main PZT layer.
US09330695B1	Disk drive head suspension tail with a noble metal layer disposed on a plurality of structural backing islands A head suspension assembly for a disk drive includes a load beam and a laminated flexure that comprises a stainless steel layer, a copper trace layer, and a dielectric layer between the stainless steel layer and the copper trace layer. The laminated flexure includes a flexure tail that extends away from the load beam to a flexure tail terminal region. The copper trace layer includes a plurality of flexure bond pads in the flexure tail terminal region. The stainless steel layer includes a plurality of backing islands in the flexure tail terminal region. Each of the plurality of backing islands is aligned with a corresponding one of the plurality of flexure bond pads. A noble metal layer is disposed on the plurality of backing islands.
US09330692B2	Confinement magnetic cap Embodiments disclosed herein generally relate to a TMR sensor for reading a recording from a magnetic recording medium using TMR, and in particular, to a magnetic capping structure of the TMR sensor. The sensor comprises a free layer and a magnetic capping structure. The magnetic capping structure comprises a ferromagnetic capping layer and an absorption layer formed on the ferromagnetic capping layer. The absorption layer is adapted to absorb molecules from the ferromagnetic capping layer and prevent the ferromagnetic capping layer from diffusing into the free layer.
US09330686B2	Miniskirt tape head having quasi-statically tilted transducer arrays In one general embodiment, an apparatus includes a magnetic head. The magnetic head has a first portion and a second portion, the first portion and the second portion together providing a tape bearing surface. The first portion has two pieces defining an opening at least partially encircling the second portion. The second portion has at least one array of transducers. A longitudinal axis of each of the at least one array is defined between opposite ends thereof, and is oriented at an angle relative to a line oriented orthogonally to the intended direction of tape travel thereacross, the angle being between 0.2° and about 10°. A closest distance between tape bearing surfaces of the two pieces of the first portion in the intended direction of tape travel is less than a widest width of the tape bearing surface of the second portion in the intended direction of tape travel.
US09330685B1	Press system for nano-imprinting of recording media with a two step pressing method Recording media press systems and methods of operating such press systems. Embodiments of a press system include a first and second die at least one of which is configured to be coupled to an embossing foil. A stopper may be used to space the embossing foil apart from a magnetic recording disk disposed within the press system by a predetermined gap when the die set is in a closed position. In an embodiment, a piston disposed within at least one of the first and second die is moved relative to the first and second die to press the embossing foil against the magnetic recording disk after the die set stopped in the closed position by the stopper.
US09330684B1	Real-time wind buffet noise detection Wind buffet noise in a microphone signal is detected using a per-frequency probability of speech estimate as well as short-term and long-term low-frequency energy. Using the probability of speech presence estimate, the buffet-no-speech condition can be accurately detected. But the probability of speech presence, by itself, is insufficient for distinguishing between the buffet-speech and either of the no-buffet conditions. It can be assumed that, if wind buffeting is occurring, it is occurring during both speech and non-speech segments to help distinguish between the other possible states. That is, the probability difference may be used as the criteria for entering the buffet-no-speech state, and then some other information (e.g., low frequency energy) may be used to determine when to transition to the buffet-speech state or one of the no-buffet states once the probability difference criteria is no longer met.
US09330681B2	Voice signal modulation service for geographic areas Modulating a voice signal is provided. The voice signal corresponding to a voice communication is received from a sending voice communication device via a network. Voice signal features corresponding to the voice communication are extracted. A set of voice signal filters are selected to modulate the extracted voice signal features corresponding to the voice communication to an average voice signal associated with a geographic area where the voice communication is destined for. The voice signal features corresponding to the voice communication are modulated by applying the selected set of voice signal filters to generate the average voice signal associated with the geographic area where the voice communication is destined for.
US09330680B2	Biometric-music interaction methods and systems A system and method for the automatic, procedural generation of musical content in relation to biometric data. The systems and methods use a user's device, such as a cell phone to capture image data of a body part, and derive a biometric signal from the image data. The biometric signal includes biometric parameters, which are used by a music generation engine to generate music. The music generation can also be based on user-specific data and quality data related to the biometric detection process.
US09330679B2	Voice processing device, voice processing method A voice processing device includes: a processor; and a memory which stores a plurality of instructions, which when executed by the processor, cause the processor to execute, receiving a first signal including a plurality of voice segments; controlling such that a non-voice segment with a length equal to or greater than a predetermined first threshold value exists between at least one of the plurality of voice segments; and outputting a second signal including the plurality of voice segments and the controlled non-voice segment.
US09330673B2	Method and apparatus for performing microphone beamforming A method and apparatus for performing microphone beamforming. The method includes recognizing a speech of a speaker, searching for a previously stored image associated with the speaker, searching for the speaker through a camera based on the image, recognizing a position of the speaker, and performing microphone beamforming according to the position of the speaker.
US09330669B2	System and method for performing dual mode speech recognition A system and method is presented for performing dual mode speech recognition, employing a local recognition module on a mobile device and a remote recognition engine on a server device. The system accepts a spoken query from a user, and both the local recognition module and the remote recognition engine perform speech recognition operations on the query, returning a transcription and confidence score, subject to a latency cutoff time. If both sources successfully transcribe the query, then the system accepts the result having the higher confidence score. If only one source succeeds, then that result is accepted. In either case, if the remote recognition engine does succeed in transcribing the query, then a client vocabulary is updated if the remote system result includes information not present in the client vocabulary.
US09330662B2	Pattern classifier device, pattern classifying method, computer program product, learning device, and learning method According to an embodiment, a pattern classifier device includes a decision unit, an execution unit, a calculator, and a determination unit. The decision unit is configured to decide a subclass to which the input pattern is to belong, based on attribute information of the input pattern. The execution unit is configured to determine whether the input pattern belongs to a class that is divided into subclasses, using a weak classifier allocated to the decided subclass, and output a result of the determination and a reliability of the weak classifier. The calculator is configured to calculate an integrated value obtained by integrating an evaluation value based on the determination result and the reliability. The determination unit is configured to repeat the determination processing when a termination condition of the determination processing is not satisfied, and terminate the determination processing and output the integrated value when the termination condition, has been satisfied.
US09330657B2	Text-to-speech for digital literature A digital work of literature is vocalized using enhanced text-to-speech (TTS) controls by analyzing a digital work of literature using natural language processing to identify speaking character voice characteristics associated with context of each quote as extracted from the first work of literature; converting the character voice characteristics to audio metadata to control text-to-speech audio synthesis for each quote; transforming the audio metadata into text-to-speech engine commands, each quote being associated with audio synthesis control parameters for the TTS in the context of each the quotes in the work of literature; and inputting the commands to a text-to-speech engine to cause vocalization of the work of literature according to the words of each quote, character voice characteristics of corresponding to each quote, and context corresponding to each quote.
US09330656B2	Speech dialogue system and speech dialogue method A speech dialogue system generates a response sentence in a way to improve the efficiency of the dialogue with the user, based on a result of estimation on an attribute of a proper name in an utterance of a user. The system includes a database attribute estimation unit to estimate the attribute of the input proper name by utilizing a database, and a web attribute estimation unit to estimate an attribute of an input proper name by utilizing information on the web. A reliability integration unit calculates integrated reliability of estimation for each of possible attributes obtained from the estimation by the units, by integrating first reliability of the estimation. A response generation unit generates a response sentence to an input utterance based on the integrated reliabilities of the possible attributes.
US09330652B2	Active noise cancellation using multiple reference microphone signals In one aspect, multiple adaptive W filters and associated adaptive filter controllers are provided that use multiple reference microphone signals to produce multiple, “component” anti-noise signals. These are gain weighted and summed to produce a single anti-noise signal, which drives an earpiece speaker. The weighting changes based on computed measures of the coherence between content in each reference signal and content in an error signal. Other embodiments are also described and claimed.
US09330651B1	Acoustic absorbing combination An acoustic absorbing combination includes a receptacle having a chamber formed by an outer peripheral wall and a bottom wall, a number of acoustic absorbing devices are arranged in the chamber of the receptacle and each include a housing having a number of couplers extended out of the housing, and an assembling device includes a number of plates extended radially and outwardly from a center member for engaging with the couplers of the housings and for securing the housings together. The assembling device includes a bead formed on each of the plates for detachably engaging with the couplers of the housing.
US09330650B2	Sound masking device and sound masking method A sound masking device includes: a sound pick-up unit which picks up a sound, and which produces a picked-up sound signal based on the sound, a masking sound signal producing unit which produces a masking sound signal from the picked-up sound signal a sound emitting unit which emits a masking sound based on the masking sound signal, and an echo cancelling unit which performs an echo cancelling process on the picked-up sound signal by performing an adaptive filtering process on the masking sound signal, and by subtracting the filtered masking sound signal from the picked-up sound signal. The masking sound signal producing unit produces a masking sound signal having a level corresponding to an amplitude level of the picked-up sound signal which has subjected to the echo cancelling process.
US09330642B2	Weighted, gripping drum pillow The disclosure provides a drum pillow for percussion instruments. In one embodiment, the drum pillow includes: (1) a top side, (2) a bottom gripping side connected to the top side and (3) a weighted core fully enclosed within the connected top side and bottom side, wherein the weighted core includes a weighted roll of a weighted substance within a flexible container that is rolled in a fabric.
US09330641B2	Percussionists' mallet towel A percussionist's towel comprises a terry-cloth towel having a deformable band centrally located between the long edges of the towel and preferably including grommets along the shorter edges of the towel. The deformable band may comprise a pocket filled with microbeads, foam, padding, flocculation, or other substances used for pillows. The towel and deformable band are sound-deadening. The deformable band deters percussion mallets or the like from rolling off the towel when the towel is placed on a music stand that has been set into a generally horizontal position to function as a table.
US09330636B1	Turning peg structure equipped with changeable panel A turning peg structure equipped with changeable faceplate to drive a winding shaft assembly of a string instrument to adjust the tightness of a string. The turning peg structure includes a bracket, at least one first faceplate, at least one second faceplate and a linking rod. The bracket includes a plate and a passage embedded in and run through the plate. The plate includes a first side and a second side opposite to the first side. The first faceplate includes a first connecting portion connected to the first side of the bracket. The second faceplate includes a second connecting portion connected to the second side of the bracket. The linking rod has one end located in the passage and another end engaged with the winding shaft assembly. Through the bracket, the turning peg structure does not lose string adjustment function due to damage thereof.
US09330634B2	Changing visual content communication Techniques for presenting changing visual content, including video, animation and so on, as an overlay are discussed. Changing visual content, included in a visual presentation, may be identified from other visual elements included in the visual presentation. The changing visual content may be manipulated based on available resources associated with presenting the changing visual content as an overlay for a client.
US09330632B2	Capacitive sensing during non-display update times Embodiments of the invention generally provide an input device with display screens that periodically update (refresh) the screen by selectively driving common electrodes corresponding to pixels in a display line. In general, the input devices drive each electrode until each display line (and each pixel) of a display frame is updated. In addition to updating the display, the input device may perform capacitive sensing using the display screen as a proximity sensing area. To do this, the input device may interleave periods of capacitive sensing between periods of updating the display based on a display frame. For example, the input device may update the first half of display lines of the display screen, pause display updating, perform capacitive sensing, and finish updating the rest of the display lines. Further still, the input device may use common electrodes for both updating the display and performing capacitive sensing.
US09330622B2	Display and method of generating an image with uniform brightness A display includes a plurality of pixels, a plurality of scan lines and a plurality of data lines. Each pixel includes a first color sub-pixel, a second color sub-pixel and a third color sub-pixel. The scan lines and the data lines are coupled to the pixels. Two color sub-pixels in the same row coupled to the same data line are coupled to different scan lines, and all of the second color sub-pixels in the same row are coupled to the same scan line.
US09330619B2	Driving device of display device and driving method thereof A driver for pixels of a display, having pixels arranged into a plurality of pixel blocks including at least two pixels in a row and at least two pixels in a column is presented. The driver includes a first converter, a second converter, and a frame memory. The first converter receives input image signals for a pixel block of the plurality of pixel blocks and generates compressed image signals by compressing the input image signals based on compression reference image signals. The frame memory stores the compressed image signals. The second converter reads the compressed image signals from the frame memory, and restores the compressed image signals based on compression reference image signals to generate restoration image signals. A compression reference image signal for a first pixel of the pixel block is the restoration image signal for a second pixel of a neighboring pixel block. Compression reference image signals for the remaining pixels in the pixel block are restoration image signals for different pixels in the pixel block.
US09330616B2	Automatic correction function determining apparatus, non-transitory computer readable medium, and automatic correction function determining method An automatic correction function determining apparatus includes an output unit and a determining unit. The output unit sequentially outputs a first display image and a second display image to a display. The first display image includes a target area being a colorimetric target and formed of a first image and a non-target area not being a colorimetric target and formed of a second image. The second display image includes the target area formed of the first image and the non-target area formed of a third image different in mean gradation value from the second image. The determining unit determines that an automatic correction function is active on the display, if a colorimetric measurement result of the target area in the first display image displayed on the display is different from a colorimetric measurement result of the target area in the second display image displayed on the display.
US09330615B2	Display device with crosstalk level correction The purpose of the present invention is to provide a display device in which the occurrence of crosstalk can be suppressed. A display device (10) includes a display unit and a separation unit (34). The display unit displays a synthetic image formed by dividing each of a plurality of images that are different from one another and arraying the divisional images thus obtained in a predetermined order. The separation unit (34) separates the plurality of images contained in the synthetic image. The display unit includes a storage unit (54) and a correction unit (52). The storage unit (54) stores crosstalk levels used when gray scale level data of a pixel displaying an image that a viewer is supposed to see, among the plurality of images contained in the synthetic image, are corrected. The correction unit (52) corrects the gray scale level data of the pixel displaying the image that a viewer is supposed to see, by using the crosstalk levels stored in the storage unit (54). The crosstalk levels are set for the case where a viewer is supposed to see images in a plurality of predetermined directions, respectively.
US09330613B2	Image display method and liquid crystal display device employing same Uniformize afterimages caused by black insertion to each image when two types of images are alternately displayed. There are provided a left and right image alternate output unit, a mask pattern storage unit, a mask pattern selection counter, and a mask synthesizing unit. The left and right image alternate output unit alternately outputs two types of video frames. The mask pattern storage unit stores m mask patterns, wherein basic regions are defined in a pixel region of a liquid crystal panel, the pixel region has m pixels arrayed in a matrix, m is an even number equal to or greater than 4, the in mask patterns have different arrangements of mask pixels in the basic region, and the number of the mask pixels is an even number smaller than m and equal to or greater than 2.
US09330612B2	Electrofluidic display pixels A device cover includes a protective layer and a display layer. The display layer includes a plurality of display pixels. Each display pixel includes a first fluid having a first color characteristic and a second fluid having a second color characteristic.
US09330611B2	Liquid crystal display device A liquid crystal display device comprising a liquid crystal panel, a backlight, a liquid crystal panel drive controller, and a backlight drive controller determining a luminance pattern defining a magnitude of luminance of each of the plurality of illumination parts on the basis of luminance information corresponding to each area to perform an area control for separately controlling the luminances of the plurality of illumination parts in accordance with the luminance pattern, the backlight drive controller having a special area control mode for performing the area control by determining the luminance pattern common to a plurality of frames of the image displayed on the display region, wherein the backlight drive controller, in the special area control mode, performs computation of an average value of the luminances of respective pixels of the image on the basis of the image signal for the plurality of frames to determine the luminance pattern.
US09330609B2	Luminance adjusting method for display screen of electronic device A luminance adjusting method for a display screen of an electronic device includes the following steps. Firstly, a current brightness value and a current imaging color value of the display screen are recorded. In response to the user's operation, the light output of the display screen is adjusted. Consequently, the adjusted brightness value is equal to a default brightness value and the adjusted imaging color value is equal to a default imaging color value. Meanwhile, the display screen is operated in the healthy display mode. In response to the user's additional operation, the light output of the display screen is adjusted. Consequently, the adjusted brightness value is equal to the recorded current brightness value and the adjusted imaging color value is equal to the recorded current imaging color value. Meanwhile, the display screen is restored to the normal display mode.
US09330607B2	Display device including a gray compensator and method of driving the same A display device is disclosed. In one embodiment, the display device includes a first conversion unit receiving gray data and outputting a gray data value of a second gamma curve, which has a luminance equal to a luminance of the gray data on a first gamma curve. The device may also include a memory storing a look-up table (LUT) which includes first and second data groups and compensated gray data for the second gamma curve. The device may further include a reference unit generating the compensated gray data based on the two converted gray data. Coordinates formed of i) each value in the first data group and ii) each value in the second data group may correspond to any one of the compensated gray data.
US09330605B2	Organic light emitting display and method of compensating for threshold voltage thereof An organic light emitting display and a method of compensating for a threshold voltage thereof are disclosed. The organic light emitting display includes a display panel including a plurality of pixels, a gate driving circuit generating first and second threshold voltage sensing gate pulses, a data driving circuit which supplies a threshold voltage sensing data voltage to the pixels in response to the first threshold voltage sensing gate pulse and detects a source voltage of a driving thin film transistor (TFT) of each pixel as a sensing voltage in response to the second threshold voltage sensing gate pulse, and a timing controller which modulates input digital video data for the image display based on a change in the sensing voltage and generates digital compensation data.
US09330600B2	Active matrix organic light-emitting diode pixel circuit having a touch control module and method for driving the same The present disclosure relates to a field of display technology, and provides an AMOLED pixel circuit, a method for driving the same, and a display device, which can improve an integration of an in-cell touch control circuit with an AMOLED driving circuit. The AMOLED pixel circuit comprises a light-emitting module, a touch control module, a control module, and a driving and amplifying module. The MOLED pixel circuit provided in embodiments of the present disclosure can be used in the manufacture of the AMOLED display device.
US09330598B2	Method and system for driving a light emitting device display A method and system for driving a light emitting device display is provided. The system provides a timing schedule which increases accuracy in the display. The system may provide the timing schedule by which an operation cycle is implemented consecutively in a group of rows. The system may provide the timing schedule by which an aging factor is used for a plurality of frames.
US09330592B2	Pixel structure and display device comprising the same The present invention discloses a display device comprising the structure. The pixel structure comprises multiple pixel units arranged in a matrix form, and multiple gate lines and data lines for providing drive to the multiple pixel units, wherein the multiple pixel units are scanned progressively in unit of L rows; the L rows of pixel units being simultaneously scanned among the plurality of pixel units are configured as a pixel block; and at least two adjacent rows of pixel units in the L rows of pixel units being used for displaying different images, wherein L≧3. By adopting the pixel structure, the problems of undercharge of a storing capacitor Cs and RC delay of the data lines are alleviated, thus the display uniformity and the display quality of the display device is ensured. The pixel structure is particularly suitable to a large-size ultra-high-resolution display device.
US09330591B2	Data display method and device A low power display and a method for display in a display device having an Active Matrix Organic Light Emitting Diodes AMOLED panel are provided. A display window that includes content to be displayed on the AMOLED panel is determined. Luminance values of pixels constituting the display window are grasped. The pixels having luminance values that are to be adjusted are determined in accordance with a distribution degree of pixels having luminance values that are larger than a reference luminance value. The luminance values of the determined pixels are changed to the reference luminance value, and the display window is displayed on the AMOLED panel with the changed luminance values.
US09330590B2	Image display apparatus and method for controlling image display apparatus In an image display apparatus, a processor loads background image data into a frame memory via a data bus in a unit of a predetermined number of bits. When the color information for each pixel is divided into n parts to form divided data in a unit of the predetermined number of bits, the number of standing bits is calculated for each of the parts of the divided data, differences in the number of standing bits between the n parts of the divided data are calculated, and the sum of the differences in the number of standing bits is calculated as a difference sum, the background image data has a difference sum that falls within a lower 50% of the difference sums arranged in descending order for the color information that satisfies a condition that a brightness grayscale level is 90% or greater.
US09330588B2	Electro-optical device, driving method of electro-optical device, and electronic apparatus A pixel circuit includes a driving transistor, a switching transistor, and a light emitting element, and the light emitting elements are formed on a semiconductor substrate. A first substrate potential is supplied to the switching transistor, and a second substrate potential, different from the first substrate potential, is supplied to the driving transistor.
US09330587B2	Color adjustment based on object positioned near display surface A display system includes a plurality of individual display devices to collectively generate an image on a display surface. At least one camera captures at least one image of the image on the display surface and captures at least one image of an object positioned near the display surface. A controller automatically adjusts a color of an object appearing in the image on the display surface based on the at least one image of an object.
US09330586B2	Liquid crystal display A display apparatus including a plurality of pixels arranged in association with a plurality of gate lines and a plurality of data lines crossing the gate lines, a data driver configured to drive the data lines, a gate driving unit configured to drive the gate lines in synchronization with a gate control signal, and a timing controller configured to control the data driver and the gate driving unit in response to an image signal and a control signal from an exterior. The timing controller outputs the gate control signal including a plurality of pulses respectively corresponding to the gate lines and an enable time of each pulse of the gate control signal is set according to a position of a corresponding gate line of the gate lines.
US09330584B2	Method and system for developing an electroluminescent sign The described embodiments relate to methods and systems for developing an electroluminescent sign. In particular, described embodiments relate to methods and systems that process an image file to generate data for use in developing the electroluminescent sign. Further embodiments relate to an electroluminescent sign developed and/or produced in accordance with the described methods and/or systems. Certain embodiments relate to a method of developing an electroluminescent sign based on an image file. The method comprises processing the image file to generate image data representing at least one illuminating image layer and electrical configuration data, transferring the at least one illuminating image layer onto a substrate and configuring a luminescence controller of the electroluminescent sign based on the electrical configuration data. The configured luminescence controller cooperates with the substrate to provide a luminescent image based on the image file.
US09330581B2	Plant identification stake A device configured to retain an informational tag, near a plant in a positioning step and an attaching step. The device includes a display bed that defines a plane. A shoulder is defined on one side of the frame such that the shoulder extends away from the display bed and defines a stop. A retaining finger extends over the plane and defines a surface that faces and is spaced-away from the plane, A cover is positioned near the retaining finger and is movable from a first position to a second position. A prong is positioned on the cover and extends toward the plane when the cover is in the first position and extends through the plane when the cover is in the second position. The retaining finger surface and the display bed are configured to act cooperatively to retain a tag therebetween by friction.
US09330578B2	Intelligent tissue mimicking ultrasonic phantom and method of preparing the same An intelligent tissue mimicking ultrasonic phantom, which is a temperature-sensitive polymer gel having the following characteristics: acoustic velocity: 1500-1550 m/s; acoustic impedance: (1.50-1.60)×106 Pa·s/m; density: 1.01-1.06 g/cm3; and a denaturation temperature around which there is a reversible phase transformation between the opaque phase and the transparent phase. Said gel can be a polymer of isopropylacrylamide (NIPA). Said ultrasonic phantom has a transparent appearance, and an adjustable thermal denaturation temperature; the thermal denaturation region of the ultrasonic phantom is distinct and has a well-defined boundary; the material of the phantom is stable and deterioration-resistant, and can ensure the consistency of the quality; the phantom is thermal denaturable with the appearance thereof turning white, while the phantom recovers when the heat is removed, such that it can be used repeatedly.
US09330576B2	Vehicle crew training system A computer based simulation system for virtual training for vehicle crews is disclosed. The vehicle crew training system (VCTS) simulates crew positions for different military vehicles. Two or more crewman modules are networked together to support a partial or full vehicle crew. The crewman modules are self-contained devices that are modular in hardware and software design, easily reconfigurable, and that require minimal facility space, allowing use in restricted environments such as trailers. The VCTS is modular at the crew position level; crewman modules are added or deleted as required to meet a particular training need. One of the crewman modules can be a gunner module, which provides an unrestricted view of the simulated environment to the gunner by means of a display and a simulated vehicle-mounted weapon.
US09330570B2	Image assisted parking space availability searching and reservation method and system An image assisted parking space availability searching and reservation method and system. An image capturing unit can be deployed onsite (e.g., parking lot, street side parking, etc.) to monitor parking spaces/spots. A parking space detection and reservation module can be configured in association with a mobile communications device to assist in the detection and selection of particular spaces. A destination street(s) can be located via a web browser installed associated with the mobile communications device. An IP address of the image-capturing unit monitoring the parking space can be obtained and a snapshot image/video of the street can be displayed. The captured video can be processed in real-time to report parking availability with respect to the street(s) and a parking space reserved.
US09330568B2	Methods, systems and processor-readable media for parking occupancy detection utilizing laser scanning Parking occupancy detection methods, systems and processor-readable media. A laser device unit includes a laser range finder, and a programmable pan-tilt unit is deployable on site to monitor one or more parking spaces. A laser emitting and receiving unit associated with the laser range finder determines the distance of an object by estimating a time difference between an emitted laser and a received laser. The laser range finder is controllable by the programmable pan-tilt unit and scans the parking spaces. A signal-processing unit can convert the measured distance profile to a parking occupancy data to provide continuous parking space estimation data for use in parking occupancy detection.
US09330567B2	Etiquette suggestion Methods and systems for a complete vehicle ecosystem are provided. Specifically, sensor data, accumulated from one or more sensors of one or more vehicles, is compared to rules or standards. Based on the comparison, a system may generate and provide etiquette suggestions to the one or more vehicles to ensure those vehicles do not create a disruption in the flow of traffic. The one or more vehicles can receive the suggestions and provide the suggestions to a user. The user or the vehicle may decide to act on the suggestion.
US09330560B2	Reconfigurable equipment monitoring systems and methods A method for reconfiguring an equipment monitoring system may include (a) providing a monitoring device including sensor(s) configured to monitor a particular device; and a processor configured to analyze the sensor data collected by the sensor(s) to determine a status of the particular device, and control one or more status indicators to display the determined status; (b) connecting a removable memory module to the monitoring device, which memory module receives and stores sensor data from the monitoring device sensor(s); (c) connecting a removable wireless transmitter module to the monitoring device or the removable memory module, (d) connecting the removable wireless transmitter module to additional source(s) of sensor data; (e) receiving at the removable wireless transmitter module sensor data from the monitoring device sensor(s), and additional sensor data from the additional sensor data source(s); and (f) wirelessly transmitting both the sensor data and the additional sensor data to a wireless receiver.
US09330558B2	Intelligent fabrics Textiles coupled with electrical components that are responsive to actions of the wearer and the surrounding environment. The textiles comprise a variety of sensors that interface with the cloud, networks, and devices. The textiles monitor physiological characteristics of the wearer. Objects in the environment may interact with the electrical components of the textiles. Micro-Electro-Mechanical Systems that include electrical components, such as, accelerometers, gyroscopes, Bluetooth chips, NFC chips, and RF tags integrate with the textiles to wirelessly communicate with networks.
US09330552B2	Detection of ice on a vehicle window by means of an internal temperature sensor The invention relates to a method for adapting the signal processing of at least one sensor device arranged behind a window in a motor vehicle, wherein the adaptation of the signal processing comprises changing at least one detection threshold value if a probability of ice being on the window is detected on the basis of a determined temperature, characterized in that a temperature signal of at least one temperature sensor integrated in the sensor device is used to detect the probability of ice on the window.
US09330550B2	Low nuisance fast response hazard alarm Embodiments relate to systems for, and methods of, providing low nuisance, fast response hazard notification. Advantageously, the disclosed techniques avoid sounding an alarm in response to typical nuisance events, such as burnt food.
US09330549B2	Smart screening barrier and system A barrier and system for the protection of a crowd from terrorists, by evaluating each individual for any concealed prohibited items. Each individual is exposed to one or more screening mechanisms, controlled by a monitoring unit, while passing in an organized fashion through an enclosed walkway containing the screening mechanism, and exiting on the other side. When a prohibited object is detected, response is provided and the smart door device is locked to detain and isolate the suspected individual in the device structure's interior. The structure of the invention is also configured to deflect the blast created by a potential explosion and prevent harm to other individuals and structures nearby.
US09330548B2	Wireless perimeter intrusion detection system A wireless perimeter intrusion detection system includes a controller and at least one perimeter generation unit having a weatherproof housing, at least one movement detection sensor, an alarm, an input unit and a communication unit.
US09330547B2	Haptic effect authoring tool based on a haptification model A haptic authoring tool is provided that recommends one or more haptic effects provides a haptification model generated by learning a human haptic designer style. The haptic authoring tool receives an input comprising at least one of audio and video and a plurality of events. The haptic authoring tool then recommends a type of haptic effect to be associated with a corresponding event from the input based on the learned haptification model.
US09330545B2	Determining input received via tactile input device A non-transitory computer-readable storage medium may include instructions stored thereon. When executed by at least one processor, the instructions may be configured to cause a computing system including a tactile input device to at least detect a depression of the tactile input device, detect a number of contacts at the tactile input device, each of the detected contacts being associated with a duration and a distance moved, and determine, based on the number of detected contacts on the tactile input device, the durations of the detected contacts, and the distances moved of the detected contacts, a type of input to process.
US09330541B1	Key tracker and method for tracking systems An apparatus for locating misplaced keys and other objects designed with a signal transceiver and equipped with a GPS tracking chip. During use, when the user has lost an object, such as a set of keys, or any other object to which the tracking device is attached, the user may transmit signal to the tracking device on a smartphone or tablet belonging to the user via a downloadable mobile application synced for use with the tracking device in order to easily guide the user to the lost object.
US09330537B2	Extending presentation of mood-related gaming effects A wagering game system and its operations are described herein. In some embodiments, the operations can include detecting a winning event during a wager cycle a wagering game, which is played using a wagering game machine. In some embodiments, the operations can further include determining gaming activity that occurred before the wager cycle. The operations can further include presenting, based on the gaming activity, a congratulatory gaming effect via an output device of the wagering game machine. In some examples, the presenting of the congratulatory gaming effect occurs during the wager cycle and during one or more later wager cycles.
US09330535B2	Method for displaying game result Embodiments of the invention include a gaming device that has a video display. When the player initiates the game, an animation is shown. If the game had a losing outcome, the animation is very short and allows the player to quickly try for a win. If instead the game has a winning outcome the gaming device spins reels or otherwise shows the player how much he or she has one. The animation may also indicate progress toward a mystery jackpot or a group mystery jackpot.
US09330532B2	External evaluator Although wagering games and wagering game machines provide significant entertainment and excitement, outcomes of wagering games can be used to provide entertainment and excitement external to the wagering game machines and even distinct and/or separate from the wagering games that generate the outcomes. A wagering game machine can communicate wagering game outcome data to a machine that is external to the wagering game machine for evaluation of the wagering game outcome data (“external evaluator”). The external evaluator can evaluate the wagering game outcome data against rules and/or criteria that lead to an exciting and entertaining event separate and/or distinct from the wagering game itself. Evaluating wagering game outcome data separate from the hosting wagering game machine allows a variety of events to be associated with game outcomes and allows for events to adapt to a dynamic environment and/or to player preferences.
US09330531B1	System and method for displaying a game using a primary display and communicating alliance information among alliance members using a secondary display The disclosure relates to systems and methods for communicating a primary display comprising information that facilitates visual presentation of a view of a game space to a primary client device and facilitating communication of alliance information among members of an alliance through a secondary client device such as a user's smartphone. The system may include a game device that allows a user to play a video game or otherwise interact with a virtual environment, and send or receive alliance information using the primary client device and send or receive alliance information using a secondary client device while playing the video game using the primary client device. The primary client device or the secondary client device may also be used to control actions taken by the alliance. Thus, alliance control may be facilitated using either or both of the primary client device and the secondary client device.
US09330530B2	Bank wagering game System and method are disclosed for conducting a group-wagering game in which players at several gaming terminals may play wagering games and win together. The method and system of the invention involves connecting a bank of gaming terminals to a bank server. The bank server automatically plays a group-wagering game on a periodic basis in which players at the gaming terminals in the bank of gaming terminals may participate. Depending on the outcome of the group-wagering game, eligible players may be awarded prizes outright, or they may be granted a group-bonus game. The prizes and awards won may depend on the amounts wagered at the gaming terminal.
US09330528B2	Token dispenser system, installation apparatus, and method A token dispensing system is adapted suitable for installing a token dispenser in a game device. A mounting bracket for the token dispenser provides a simple and inexpensive way to install the token dispenser as part of the token dispensing system inside the housing of a game device. The dispensing system includes an electronic control circuit that controls an alarm device to provide a low level warning signal when the level of tokens in the token dispenser is low and an empty warning signal when the token dispenser is empty. The electronic control circuit controls dispensing tokens from the token dispenser such that a user receives the correct number of tokens even if the dispenser runs out of tokens in the middle of dispensing a selected number of tokens during a transaction.
US09330523B2	Wagering game machine with biofeedback-aware game presentation A computerized wagering game system includes a gaming module comprising gaming code which is operable when executed on to conduct a wagering game on which monetary value can be wagered, and a biofeedback module operable to track at least one biometric characteristic of a game player. The wagering game is further operable to alter presentation of the wagering game based on changes in the at least one biometric characteristic. A mood enhancement module is operable to provide energy to a wagering game player at a frequency designed to provide a mood enhancing effect.
US09330520B2	Detection and management of portable electronic devices in secure compartments of charging stations The disclosed embodiments provide a charging station for portable electronic devices. Upon initiating a transaction associated with charging of the portable electronic device by the charging station, the charging station attempts to detect a presence of the portable electronic device in a secure compartment of the charging station, wherein power is supplied to the portable electronic device within the secure compartment. If the presence of the portable electronic device in the secure compartment is detected, the charging station secures a door of the secure compartment. If the presence of the portable electronic device in the secure compartment is not detected, the charging station queries a user of the portable electronic device for input related to a lack of detection of the presence and processes the transaction based on the input.
US09330515B1	Disk-type coin processing unit with angled sorting head Currency processing systems, coin processing machines, and methods of sorting batches of coins are presented herein. A currency processing system is disclosed which includes a housing with a coin input area for receiving coins, and one or more coin receptacles stowed inside the housing. A disk-type coin processing unit is operatively coupled to the coin input area and the coin receptacle(s). The coin processing unit includes a rotatable disk for imparting motion to coins received from the coin input area, and a sorting head having a lower surface generally parallel to and at least partially spaced from the rotatable disk. The lower surface forms a plurality of shaped regions for guiding the coins, under the motion imparted by the rotatable disk, to a plurality of exit stations through which the coins are discharged to the coin receptacle(s). The sorting head and the rotatable disk are obliquely angled with respect to the support surface upon which the housing rests.
US09330510B2	Electronic key registration method and electronic key registration system A method for registering an electronic key to a controller of a communication subject includes locating an electronic key ID of a registered electronic key, which is registered to a first controller that was previously installed in the communication subject, based on a communication subject ID unique to the communication subject, and reregistering the registered electronic key to a second controller installed in the communication subject in lieu of the first controller by storing the electronic key ID of the registered electronic key and an encryption code corresponding to the electronic key ID in the second controller.
US09330508B2	Method and system for enhanced scanner user interface A method and system for presenting vehicle information. A functional part of a vehicle is selected to be examined and information related to the selected function part is received. A vehicle model corresponding to the vehicle is retrieved. Based on the selected functional part and the vehicle model, a mode of operation is determined and used in presenting the vehicle model and the information so that a portion of the model corresponding to the functional part is visible and the information is presented with respect to the visible functional part of the presented model.
US09330501B2	Systems and methods for augmenting panoramic image data with performance related data for a building A system and method for augmenting panoramic images with performance related data for a building are disclosed. The system includes a memory coupled to a processor configured to receive panoramic image data, generate a digital image based on the panoramic image data, and modify the digital image to include a graphical representation of the performance related data. The processor maps performance related data to the coordinate system of the panoramic images such that the graphical representation may be generated without converting the panoramic image data into a high-quality, three-dimensional model in a CAD program. In this way, computer-generated graphical representations of building performance data, such as temperature fields or virtual structures, may be overlaid directly onto a two-dimensional projection of the panoramic image data. In one embodiment, the panoramic image data is a spherical, 360 degree panoramic image captured by a laser scanning device.
US09330500B2	Inserting objects into content An image into which one or more objects are to be inserted is obtained. Based on the image, both a 3-dimensional (3D) representation and a light model of the scene in the image are generated. One or more objects are added to the 3D representation of the scene. The 3D representation of the scene is rendered, based on the light model, to generate a modified image that is the obtained image modified to include the one or more objects.
US09330499B2	Event augmentation with real-time information A system and method to present a user wearing a head mounted display with supplemental information when viewing a live event. A user wearing an at least partially see-through, head mounted display views the live event while simultaneously receiving information on objects, including people, within the user's field of view, while wearing the head mounted display. The information is presented in a position in the head mounted display which does not interfere with the user's enjoyment of the live event.
US09330494B2	Method for the automatic material classification and texture simulation for 3D models A method of automatically transforming a computerized 3D model having regions of images utilized as textures on one or more physical objects represented in the 3D model (such as building sides and roofs, walls, landscapes, mountain sides, trees and the like) to include material property information for one or more regions of the textures of the 3D model. In this method, image textures applied to the 3D model are examined by comparing, utilizing a computer, at least a portion of each image texture to entries in a palette of material entries. The material palette entry that best matches the one contained in the image texture is assigned to indicate a physical material of the physical object represented by the 3D model. Then, material property information is stored in the computerized 3D model for the image textures that are assigned a material palette entry.
US09330493B2	Method for generating a 3D representation of an object There is described a method for generating a 3D representation of an object, the method comprising retrieving a 3D structure representative of the object and comprising a plurality of voxels each having a respective position therein, each one of the voxels being shaped to mimic a shape of at least a portion of a potential internal feature for the respective position; receiving a densitometry measurement comprising densitometry data of the object; assigning a density value to each one of the voxels using the received densitometry data, thereby generating a 3D model of the object; and outputting the 3D model.
US09330481B2	Medical image processing apparatus and medical image processing method A medical image processing apparatus is configured as follows. Namely the apparatus is provided with a first image generation unit which executes reconfiguration processing based on X-ray transmission data to generate a contrast blood vessel figure three-dimensional image data including a figure of a blood vessel in a subject having a contrast media injected thereto, a second image generation unit which executes reconfiguration processing based on the X-ray transmission data to generate a human anatomy figure three-dimensional image data including a figure of a human anatomy in the subject having no contrast media injected thereto, a black-and-white reverse processing unit which executes black-and-white reverse processing with respect to the contrast blood vessel figure three-dimensional image data to generate black-and-white reversed three-dimensional image data, and a combination processing unit which combines the human anatomy figure three-dimensional image data with the black-and-white reversed three-dimensional image data to generate combined image data.
US09330469B2	Systems and methods for boil detection Systems and methods for boil detection are provided. One example system includes a vision sensor positioned to collect imagery depicting the cooktop and one or more processors implementing instructions to perform operations. The operations include obtaining a first frame of imagery and a second frame of imagery from the vision sensor. The first frame of imagery and the second frame of imagery respectively depict the cooktop. The operations include identifying a plurality of motion vectors based on the first and second frames of imagery. The operations include generating a histogram describing a characteristic of the plurality of motion vectors. The operations include calculating a dissimilarity score. The dissimilarity score describes a difference between the histogram and a pre-learned histogram. The pre-learned histogram describes the characteristic for imagery depicting boiling liquid. The operations include determining whether a boiling event is occurring at the cooktop based at least in part on the dissimilarity score.
US09330468B2	Method and system for analyzing interactions Techniques are provided for tracking different types of subjects and labeling the tracks according to subject type. In an implementation, the tracking includes tracking first and second subject types using video, and also tracking subjects of the first type using Wi-Fi tags provided to the subjects of the first type. The video and Wi-Fi tracks can be compared in order to identify and label which video tracks are associated with subjects of the first type and which video tracks are associated with subjects of the second type. Upon the tracks having been labeled, interactions between the different subject types can be identified and analyzed.
US09330467B2	Timing system and method A timing system that includes a glyph associated with an object to be timed and at least one camera for capturing images of the glyph or associated object. A computer generates a virtual line, associates the virtual line with at least one of the images, and determines when the glyph or associated object intersects, crosses or has crossed the virtual line. A database records the identity of the glyph and the time that the glyph or associated object intersected or crossed the virtual line. The invention also relates to a related method for determining the time a glyph or object associated therewith passes a predetermined point or line.
US09330465B2	Augmented reality virtual automotive X-ray having service information A tool for providing a user with information on a particular object related to a position and an orientation of the tool with respect to the object includes an image capturing device configured to capture an image of the object. The tool further includes a position and orientation sensor configured to determine the position of the tool with respect to the object, a processor configured to determine from the image the type of object, a display configured to display the image of the object, the display further configured to display additional information in addition to the image of the object in response to the determination of the type of object, and the processor further configured to determine a change in one of the position and the orientation of the sensor and the tool and further configured to modify the display.
US09330464B1	Depth camera feedback Embodiments are disclosed that relate to controlling a depth camera. In one example, a method comprises emitting light from an illumination source toward a scene through an optical window, selectively routing a at least a portion of the light emitted from the illumination source to an image sensor such that the portion of the light is not transmitted through the optical window, receiving an output signal generated by the image sensor based on light reflected by the scene, the output signal including at least one depth value of the scene, and adjusting the output signal based on the selectively routed portion of the light.
US09330454B2	Method and apparatus for image-centric standardized tool for quality assurance analysis in medical imaging The present invention relates to a computer-implemented method of performing image quality analysis on images from an imaging examination, including: displaying an imaging examination; performing a quality review of the images; performing a quality analysis on data from the imaging examination and on the images; receiving image quality analysis from the user on the data and the images and storing the image quality analysis in at least one database; saving data from the image quality analysis on at least one key image of the images, using computer-generated standardized annotation and mark-up, or graphical data input, or speech data, using a computerized tool, and saving the data as annotated image data in the at least one database; and transferring the annotated image data to at least one quality assurance database with linking to images from the imaging examination.
US09330452B2	Statistical mapping in an optoacoustic imaging system Electromagnetic energy is deposited into a volume, an acoustic return signal from energy deposited in the volume is measured, and a parametric map that estimates values of at least one parameter as spatially represented in the volume is computed. A reference level of a region of interest is determined, and upper and lower color map limits are specified, with at least one of them being determined in relation to the reference level. The parametric map is then rendered in the palette of a color map by mapping the estimated values of the parametric map onto the color map according to the color map limits. Two wavelengths of energy can be applied to the volume, and the parametric map computation can be adapted by applying an implicit or explicit model of, or theoretical basis for, distribution of electromagnetic energy fluence within the volume pertaining to the two wavelengths. The actual electromagnetic energy fluence caused by each wavelength has a propensity, due to variability within the volume, to differ from the modeled or theoretical electromagnetic energy fluence.
US09330447B2	Image evaluation device, image selection device, image evaluation method, recording medium, and program An image evaluation device (101) properly evaluating the graininess (or roughness) of an image is provided. The blurer (102) creates a second image b by blurring a first image a. The differentiator (103) creates a third image c presenting the difference between the first image a and second image b. The pixel value of each pixel of the third image c presents the difference in pixel value between the pixels at the same position in the first image a and second image b. The scanner (104) scans the pixels contained in the third image c, obtains the differences in pixel value between adjoining pixels, and obtains the respective probabilities of occurrence of the differences. The calculator (105) calculates the entropy from the obtained, respective probabilities of occurrence of the differences. The outputter (106) outputs the entropy as the evaluation value of the graininess (or roughness) of the first image.
US09330444B2	Medical image processing apparatus, medical image device and image processing method The present invention relates to a medical image processing apparatus, an image processing method and a medical image device. The medical image processing apparatus comprises a deformation field calculation unit, a deformation field weighting unit and an image deformation unit. The deformation field calculation unit may calculate a field of deformation of a first image of an object with respect to a second image. The deformation field weighting unit may weight the field according to motion intensities of respective components of the object. The image deformation unit may deform the first image by using the weighted field.
US09330442B2	Method of reducing noise in image and image processing apparatus using the same Provided are methods and apparatuses for reducing noise in an image, in which a kernel that gives a weight to a pixel value with respect to determination of a similarity between patches is adaptively changed according to a reference patch, a non-transitory computer-readable storage medium for recording the same, and an image processing apparatus using the same, in which noise in an image is removed according to a noise removal algorithm based on non-local means.
US09330439B2	Display device with crosstalk level correction The purpose of the present invention is to provide a display device in which the occurrence of crosstalk can be suppressed. A display device (10) includes a display unit and a separation unit (34). The display unit displays a synthetic image formed by dividing each of a plurality of images that are different from one another and arraying the divisional images thus obtained in a predetermined order. The separation unit (34) separates the plurality of images contained in the synthetic image. The display unit includes a storage unit (54) and a correction unit (52). The storage unit (54) stores crosstalk levels set with respect to respective combinations of gray scale level data including gray scale level data of a pixel displaying an image that a viewer is supposed to see, among the plurality of images contained in the synthetic image, and gray scale level data of a pixel serving as a factor that causes crosstalk. The correction unit (52) corrects the gray scale level data of the pixel displaying the image that a viewer is supposed to see, by using the crosstalk levels read out of the storage unit (54).
US09330438B1	High performance warp correction in two-dimensional images An apparatus generally having a first memory, a second memory and a circuit is disclosed. The first memory may be configured to store a warp table. The warp table is generally accessed through a single data port of the first memory. The second memory may be configured to buffer an input image. The input image may have a plurality of input pixels arranged in two dimensions. The circuit may be configured to generate an output image by a warp correction of an input image. The warp correction may be defined by the warp table. The output image may include a plurality of output pixels. At least one of the output pixels may be generated during each clock cycle of the circuit.
US09330436B2	Multi-camera array with adjacent fields of view Multiple cameras are arranged in an array at a pitch, roll, and yaw that allow the cameras to have adjacent fields of view such that each camera is pointed inward relative to the array. The read window of an image sensor of each camera in a multi-camera array can be adjusted to minimize the overlap between adjacent fields of view, to maximize the correlation within the overlapping portions of the fields of view, and to correct for manufacturing and assembly tolerances. Images from cameras in a multi-camera array with adjacent fields of view can be manipulated using low-power warping and cropping techniques, and can be taped together to form a final image.
US09330432B2	Queuing system for register file access Techniques are disclosed relating to arbitration of requests to access a register file. In one embodiment, an apparatus includes a write queue and a register file that includes multiple entries. In one embodiment, the apparatus is configured to select a request from a plurality of requests based on a plurality of request characteristics, and write data from the accepted request into a write queue. In one embodiment, the request characteristics include: whether a request is a last request from an agent for a given register file entry and whether the request finishes a previous request. In one embodiment, a final arbiter is configured to select among requests from the write queue, a read queue, and multiple execution pipelines to access banks of the register file in a given cycle.
US09330429B2	Scalable watermark insertion for fragmented media stream delivery A media stream is delineated into multiple fragments. Different watermark variants of individual fragments are generated. Particular sequences of watermark variants are selected for particular clients and maintained in a user access database. Analyzing media streams allows determination of the sequences of watermark variants and identification of particular clients intended to receive the media streams. Fragments can continue to be cached efficiently and unique watermarks need not be generated for each individual client.
US09330426B2	Digital video fingerprinting A digitally encoded video fingerprinting system for generating and comparing/matching finger-prints from digitally encoded video which has been encoded according to an encoding method which involves the generation of residual macroblocks of pixels and the generation of quantized transform coefficients of the residual macroblocks, or of portions of the residual macroblocks, comprises a fingerprint database (5) and a video processing subsystem (10). The video processing subsystem (10) includes a fingerprint sequence selection module (14, 24) which is operable to select one or more sets of frames from input video content to be processed in order to generate a fingerprint; a fingerprint calculation module (14, 26) which is operable to generate a fingerprint based on a set of frames selected by the fingerprint sequence selection module; and a fingerprint comparator module (14, 28) which is operable to compare two fingerprints and to output a similarity score of the compared fingerprints. The method used by the fingerprint selection and fingerprint calculation modules includes selecting a group of frames of the encoded video content; processing the digitally encoded video content to obtain a set of quantized transform coefficients of residual macroblocks or portions of residual macroblocks associated with each of the selected frames; identifying a set of residual macroblocks per frame whose transform coefficients satisfy a threshold criterion; and generating a digital video fingerprint for the encoded video content in dependence upon the identified macroblocks or some property thereof within each of the selected frames.
US09330422B2	Conversation analysis of asynchronous decentralized media The present disclosure provides a system that allows for the real-time and online monitoring of the exchanges between customers and a CRM team over social media. While crawling all messages exchanged over the social media by customers and CRM team, the system aggregates related messages exchanged between a given customer and the CRM team into a conversation. The system includes a linguistic framework for the analysis of conversations (based on the two linguistic theories of dialog acts and conversation analysis) to label the nature of the messages in a conversation or thread.
US09330421B2	Prompting user action in conjunction with tagged content on a social networking system A social networking system user is prompted to take an action or is provided with additional information associated with a location where the user has checked-in or has associated with content using a tag. When an input including the check-in or tagged location is received, the social networking system selects one or more actions based on the location, the user, and/or contextual information included in the input. A prompt identifying the one or more of the selected actions is generated and presented to the user.
US09330420B2	Using crowdsourcing to improve sentiment analytics A method and computer for managing analysis of sentiment is disclosed. A computer retrieves data used to perform the analysis of sentiment. The computer analyzes the data and the analysis of sentiment to determine if a gap exists requiring further processing to improve the analysis of sentiment. Responsive to a determination that the gap exists requiring further processing to improve the analysis of sentiment, the computer generates a task to address the gap. The computer then uses crowdsourcing to submit the generated task for processing.
US09330416B1	Visualization of fraud patterns An improved technique involves identifying other transactions for investigation from entries in a database that involve a particular actor involved in a known fraudulent transaction. From a transaction log listing transactions, a server generates a database of transaction entries which identify transactions from the transaction log, each transaction entry (i) describing an activity and (ii) identifying a set of actors involved in that activity. Based on a known fraudulent transaction involving a particular actor, the server finds a set of transaction entries from the database which involve the particular actor. From the found set of transaction entries, the server identifies other transactions for investigation.
US09330415B1	Personal savings plan A method for saving money through payroll withholding, including: obtaining, for a tax year, a projected tax liability of an employee and a target savings amount selected by the employee; identifying, for the tax year, multiple pay periods for the employee; calculating multiple of tax withholding amounts for the multiple pay periods based on the projected tax liability; calculating multiple savings withholding amounts for the multiple pay periods based on the target savings amount; withholding the multiple tax withholding amounts and the multiple savings withholding amounts from multiple paychecks of the employee corresponding to the multiple pay periods; sending the multiple tax withholding amounts to a tax authority for paying the projected tax liability; and disbursing the target savings amount from a financial account funded by the multiple savings withholding amounts.
US09330414B2	Approval system for buyer-initiated requisition modifications A method of modifying a requisition within approval and budgetary constraints by a procurement organization may include receiving the requisition from a requesting organization, where the requisition may comprise one or more lines, each having been approved by the requesting organization. The method may also include receiving a change to be applied to a first line associated with a first budget allocation, where the change may be received from a buyer in the procurement organization, and the change may be associated with a second budget allocation. The method may additionally include determining that the change violates a threshold, sending the change to the requesting organization for a second approval, receiving, from the requesting organization, an indication as to whether the second approval is granted, and creating a purchase order based on the indication as to whether the second approval is granted.
US09330408B2	System, assembly, and method for providing corrective eyewear A method of providing corrective eyewear is disclosed, the method including providing a kiosk having a plurality of eyeglass frame. The plurality of eyeglass frames vary in at least one of a dimension and a size from one another and each of the plurality of eyeglass frames has at least one reference dimension on a body of the eyeglass frame. The method further includes receiving a digital image of the consumer wearing a selected eyeglass frame and determining a pupillary distance of the consumer based on the digital image and the at least one reference dimension of the consumer-selected eyeglass frame.
US09330406B2	Method and system for sales of golf equipment Methods and systems for selecting and fabricating individualized golf clubs or golf club components. Using a website, for example, a golfer can input relevant information about his or her golf game, receive recommendations for golf club components, select from the recommendations, and have the desired golf club components manufactured and delivered. In some embodiments, the golf club components include custom golf club heads fabricated using layer by layer processing, such as direct metal laser sintering.
US09330402B2	Method and system for providing a payroll preparation platform with user contribution-based plug-ins Customizations and regional optimizations made to a payroll preparation and management system by one or more contributing users are transformed into payroll optimization plug-ins. The payroll optimization plug-ins are then aggregated into payroll optimization plug-in sets that, when implemented, optimize the payroll configurations used by the payroll preparation and management system for a given region and/or type of business within the region. The payroll optimization plug-in sets for a given region and/or activity are then requested and/or selected by other individuals using the payroll preparation and management system and imported to the requestor's implementation of the payroll preparation and management system to optimize the requestor's implementation of the payroll preparation and management system for the requested region, and/or type of business within the requested region.
US09330393B2	Providing a result with a requested accuracy using individuals previously acting with a consensus A result for a task may be provided in response to receiving a request from, for example, a user for the result. The request specifies a desired accuracy level for the result. The accuracy of the result is determined using the individual accuracies of one or more persons that have selected the result. Each person's individual accuracy is determined based on results for prior tasks previously performed by that person. The person's individual accuracy is proportional to the number of that person's prior results that are with a consensus of other persons that have performed the same prior task. The result is provided if the accuracy of the result is equal to or greater than the desired accuracy level.
US09330392B2	Collecting interest data from conversations conducted on a mobile device to augment a user profile The present invention discloses a solution for collecting interest data from conversations conducted on a mobile device to augment a user profile. Such a solution can include an interest data coordinator and a user profile. The interest data coordinator can be configured to analyze conversations conducted upon a mobile device for interest data. The user profile can represent a compilation of user data and interest data.
US09330385B2	Card payment system In one example embodiment, a card payment system includes a card payment apparatus, having an audio jack, configured to: read account information stored on a payment card, transmit the account information via a microphone contact of an audio jack, and receive an acoustic signal via at least one earphone contact of the audio jack; and a client device, having an audio jack socket to receive the audio jack, configured to: receive, from the card payment apparatus, the account information via a receptor for the microphone contact of the audio jack, and transmit, to the card payment apparatus, the acoustic signal via the at least one earphone contact.
US09330375B2	Interactive real estate contract and negotiation tool Term negotiation can utilize centralized systems accessed via web interfaces for purposes such as mediation of communications between buyers and sellers, maintenance of a history of negotiations, and notification of parties regarding changes suggested during negotiation. Changes to terms proposed by parties using centralized systems can be stored in a data warehouse, potentially along with timestamp and identification information.
US09330374B2	Source-to-processing file conversion in an electronic discovery enterprise system Embodiments of the invention relate to systems, methods, and computer program products for improved electronic discovery. Embodiments herein disclosed provide for an enterprise-wide e-discovery system that provides for source-to-processing file conversion of electronic communications and, in some embodiments, decryption of encrypted electronic communication entries for the purpose of efficiently processing data and supplying the electronic data to third party data analysis providers.
US09330373B2	Method and system for storing inventory holders A method for storing inventory items in an inventory system includes detecting that an inventory holder is available for storage and determining a classification of the inventory holder. The method also includes determining a classification of each of a plurality of storage locations and selecting a storage location for the inventory holder based, at least in part, on the classification of the inventory holder and the classification of the selected storage location. The method additionally includes transmitting information identifying the storage location to a mobile drive unit associated with the inventory holder.
US09330370B2	Updating progression of performing computer system maintenance A computer-implemented method, computer program product, and computer system for updating progression of performing computer system management. A computer system receives a log-on of a change implementer onto a managed computer system and searches a change request on a managing computer system. In response to that the change request is found, the computer system receives from the change implementer a command with a current date and time and matches the command to one or more tasks within the change request. In response to determining that the command matches the one or more tasks, the computer system updates start dates and times of the one or more tasks. And, in response to that the one or more tasks are completed, the computer system updates stop dates and times of the one or more tasks.
US09330369B2	Resource planning for data protection validation A solution for validating a set of data protection solutions is provided. A validation scenario can be defined, which can include data corresponding to a set of attributes for the validation scenario. The attributes can include a time frame for the validation scenario. The validation scenario also can include a set of backup images to be validated, each of which is generated using one of the set of data protection solutions. The set of backup images can be identified using the time frame. A set of resource requirements for implementing the validation scenario can be determined based on the set of backup images and the set of attributes for the validation scenario.
US09330365B2	Method and system for estimating size and effort of software assurance projects A method and system is provided for estimating size and effort of software assurance project for distributing the estimated effort across the software assurance project phases. Particularly, the invention provides a method and system for estimating the software assurance project size based on the predefined weight ratios assigned to the test cases after classifying them into simple, medium and complex categories. Further, the invention provides a method and system for utilizing the estimated software assurance project size and organizational baseline productivity information for estimating the software assurance efforts. Further, the invention provides a method and system for distributing the estimated effort across the software assurance project phases.
US09330349B2	Systems and methods for providing variable data printing (VDP) using dynamic font downgrading Apparatus and methods for providing downgraded fonts for VDP printing application are described. A server system may be configured to generate and/or select a set of downgraded rasterized fonts for delivery to a client system in order to provide limited client-side WYSIWIG display functionality using the downgraded fonts. A client side application may use the downgraded fonts to provide a display-only or draft print only rendering of a VDP print job.
US09330348B1	Faster monochrome printing for in-line electrophotographic color printers A method and apparatus for faster monochrome printing in an in-line electrophotographic printer is described. The printer is configured such that it has more light emitting sources for use in an image transfer assembly for black than for image transfer assemblies for any other color in the printer. When printing a color print job, less than all of the light emitting sources in the black image transfer assembly are used. A print controller directs print data for a monochrome print job to all of the available light emitting sources in the black image transfer assembly and increases the print medium transport speed. The system and method may be configured to operate with dedicated data channels for each light emitting source or may share some data channels for monochrome and color print jobs.
US09330344B2	Photonic processor with pattern matching and image recognition Apparatus (100) is provided which is arranged to accept an input data stream. In some embodiments, the apparatus (100) comprises a sampler arranged to sample the input data stream to provide k samples thereof, wherein each of the samples is n bits long and a string selector arranged to select m binary strings n bits long from at least a chosen subset of all random binary strings of a predetermined length. The apparatus (100) may further comprise a logical operator arranged to perform a logical function for each of the k samples with each of the selected binary strings to provide a vector, a memory arranged to store a matrix of the vectors generated from k samples, and an address generator arranged to generate RAM address segments from the matrix. In embodiments, the apparatus (100) may comprise a processor for, for example, pattern matching; feature detection, image recognition.
US09330339B2	System and method for detecting cargo container seals Systems and methods are disclosed for detecting container seals. In one implementation, a processing device receives one or more images and processes the one or more images to identify one or more areas of interest within at least one of the one or more images, the one or more areas of interest including one or more areas of the one or more images within which a container seal is relatively likely to be present. The processing device compares the one or more identified areas of interest with one or more templates, each of the one or more templates being associated with one or more respective seal types. The processing device identifies, based on the comparison, one or more matches between the one or more identified areas and the one or more templates, and provides, based on the identification of the one or more matches, an identification of the container seal.
US09330338B2	Image analysis method and image analysis device An image analysis method includes acquiring fluorescent images of frames in time-series. Each fluorescent image comprises pixels in which pixel data are acquired in the time-series. The method further includes setting analysis areas to the fluorescent images, selecting the fluorescent images of two or more frames to be used in analysis, extracting data pairs each comprising two pixels in which acquisition time intervals are the same in the analysis area of each of the selected fluorescent images, and performing product sum calculation of each of the data pairs for all of the selected images to calculate a correlation value.
US09330337B2	Color analytics for a digital image An automated, computerized method is provided for processing an image. The method includes the steps of providing an image file depicting an image, in a computer memory, determining intrinsic component information as a function of spatio-spectral information for the image, and calculating analytical information, as a function of the intrinsic component information.
US09330334B2	Iterative saliency map estimation In techniques for iterative saliency map estimation, a salient regions module applies a saliency estimation technique to compute a saliency map of an image that includes image regions. A salient image region of the image is determined from the saliency map, and an image region that corresponds to the salient image region is removed from the image. The salient regions module then iteratively determines subsequent salient image regions of the image utilizing the saliency estimation technique to recompute the saliency map of the image with the image region removed, and removes the image regions that correspond to the subsequent salient image regions from the image. The salient image regions of the image are iteratively determined until no salient image regions are detected in the image, and a salient features map is generated that includes each of the salient image regions determined iteratively and combined to generate the final saliency map.
US09330330B2	Polarized millimeter wave imaging system and method A detection system includes a polarization analyzer that generates one or more null detection values if an object is sensed in a received millimeter wave (MMW) brightness temperature data set. The polarization analyzer analyzes a polarization parameter in the received MMW brightness temperature data set to generate the one or more null detection values. An object detector detects if the object is present based on a comparison of the one or more null detection values to a predetermined threshold. A singular value decomposition (SVD) unit is enabled by the object detector to decompose the MMW brightness temperature data set into a plurality of image layers. Each image layer includes at least one feature of a scene. An identification unit analyzes the plurality of image layers from the SVD unit to determine a shape or a location of the object from the scene.
US09330327B2	Image capture and identification system and process A digital image of the object is captured and the object is recognized from plurality of objects in a database. An information address corresponding to the object is then used to access information and initiate communication pertinent to the object.
US09330326B2	Image capture and identification system and process A digital image of the object is captured and the object is recognized from plurality of objects in a database. An information address corresponding to the object is then used to access information and initiate communication pertinent to the object.
US09330324B2	Error compensation in three-dimensional mapping A method for forming a three-dimensional (3D) map of an object, including illuminating the object from a light source so as to project a pattern onto the object, capturing an image of the pattern using an array of detector elements, and processing the captured image so as to measure respective offsets of elements of the pattern in the captured image relative to a reference pattern, the offsets including at least a first offset of a first element of the pattern and a second offset of a second element of the pattern, measured respectively in first and second, mutually-perpendicular directions in a plane of the array. The method further includes computing a correction factor in response to the first offset, applying the correction factor to the second offset so as to find a corrected offset, and computing depth coordinates of the object in response to the corrected offset.
US09330322B2	Controlled access to functionality of a wireless device Various embodiments of the invention may be used to verify that a person being authorized by biometric techniques to use a device is a living person and not some form of recording intended to spoof the system. Some embodiments may try to cause a change in a measured biometric feature, and compare images taken before and after the change to verify the change occurred. In some embodiments, multiple stages of verification may be used, either to increase the difficulty of spoofing the security system, or to provide different levels of security for different levels of access to the device's functionality.
US09330318B2	Object detection apparatus and storage medium Important information about an object is detected using less arithmetic processing. An object detection unit generates an edge image from a color image. The object detection unit evaluates symmetry of an image included in the edge image. The object detection unit identifies a symmetry center pixel forming an object having symmetry. The object detection detects an object width for each symmetry center pixel. The object detection unit identifies the width of the object in the vertical direction based on the width of the symmetry center pixels in the vertical direction, and identifies the width of the object in the horizontal direction based on the object width identified for each symmetry center pixel.
US09330315B2	Determining foregroundness of an object in surveillance video data A computer identifies a proto-object in a digital image using a background subtraction method, the proto-object being associated with a lighting artifact in the surveillance region. The background subtraction method preserves boundary details and interior texture details of proto-objects associated with lighting artifacts. A plurality of characteristics of the proto-object digital data are determined, the characteristics, individually or in combination, distinguish a proto-object related to a lighting artifact from its background. A learning machine, trained with the plurality of characteristics of proto-objects classified as either foreground or not foreground, determines a likelihood that the plurality of characteristics is associated with a foreground object.
US09330310B2	Methods and devices for obtaining card information A server system with one or more processors and memory obtains, from a client device, a card image which includes an image of a card, and identifies a card configuration type corresponding to the card in the card image based on a database of stored card configuration types. Each stored card configuration type in the database is associated with layout information regarding respective features and information regions for the stored card configuration type. In accordance with the identified card configuration type, the server system determines one or more information regions of the card image containing respective card information of the card. The server system extracts at least a portion of the card information of the card from the one or more information regions of the card image and transmits, to the client device, at least the extracted portion of the card information.
US09330306B2	3D gesture stabilization for robust input control in mobile environments A non-contact gesture sensor is mounted within a vehicle for vehicle occupants to enter control commands by using hand gestures. The effects of vehicle motion and vibration are stabilized by an electronic circuit that includes an inertial motion sensor (IMU) in rigidly fixed relation to the gesture sensor. An adaptive filter processes the gesture sensor signal and the IMU sensor signal by modeling the arm and hand as a semi-rigid articulated body using a transfer function that relates accelerations measured by the IMU with vehicle motion-induced accelerations of the hand. The filter calculates a noise-reduced gesture signal by subtracting out the motion-induced accelerations and measurement noise. The filter also outputs a confidence measure that controls a threshold circuit that inhibits use of the filtered gesture signal when confidence in the filter's system estimation is low.
US09330305B2	Method and device for detecting a seating position in a vehicle In one embodiment a method performed by an electronic device for determining a seating position of a person in a vehicle, the method comprises capturing at least one image of an environment of a vehicle, detecting, from the at least one captured image, an orientation of a retraining device within the vehicle, and determining the seating position of a person within the restraining device based on the orientation of the restraining device.
US09330301B1	System, method, and computer program product for performing processing based on object recognition A system, method, and computer program product are provided for providing suggestions based on object recognition. In operation, a plurality of suggested identifiers is displayed based on facial recognition, utilizing a touchscreen of a mobile device. Additionally, a user input is received in connection with at least one of the suggested identifiers, utilizing the touchscreen of the mobile device. Further, after receiving the user input in connection with the at least one suggested identifier, a correspondence is created between the at least one suggested identifier and at least one aspect of a face, utilizing the at least one processor of the mobile device.
US09330294B2	System and method of capturing and producing biometric-matching quality fingerprints and other types of dactylographic images with a mobile device An optical module includes a housing with a lighting mechanism, an aperture formed therein, and a window that frames a transparent surface adapted to contact a skin surface of a person, for example, a fingertip. The lighting mechanism provides light to illuminate the skin surface placed upon the transparent surface. A prism has a first side facing the lighting mechanism, a second side at the window, and a third side through which a dactylographic image exits the prism. One or more light reflecting surfaces are disposed within the housing to reflect the dactylographic image towards the housing aperture. The optical module is coupled to a mobile device having a camera, with the aperture of the housing aligning with a lens of the camera. The camera acquires the dactylographic image, and the mobile device adjusts this dactylographic image to produce a dactylographic image suitable for biometric matching.
US09330292B2	Two-dimensional code scanning method and device A two-dimensional code scanning method and device is provided, the method including: displaying a scanning window; obtaining a window adjustment instruction, and moving and/or scaling the scanning window based on the window adjustment instruction; obtaining coordinate information of the scanning window; creating a target image according to the coordinate information; recognizing the target image, and extracting data information corresponding to the target image. By the method and device, the hardware costs are reduced.
US09330287B2	Real-time asset tracking and event association A system including a detector, a reader, and a tag. The detector includes a sensor to detect a user event, and a communication circuitry to communicate at a first frequency band. The reader includes communication circuitry to communicate at a second frequency band. The tag includes a first communication circuitry to communicate at the first frequency band and a second communication circuitry to communicate at the second frequency band. The detector is to communicate with the tag via the communication circuitry of the detector. The detector is to determine whether to associate the tag with the user event. The detector is to communicate the determined association. The tag is to communicate using the second communication circuitry of the tag with the reader.
US09330283B2	High-frequency RMS-DC converter using chopper-stabilized square cells An RMS-DC converter includes a chopper-stabilized square cell that eliminates offset, thus enabling high-bandwidth operation. The chopper-stabilized offset requires only a small portion of the circuitry (i.e., a single component square cell) which operates at high frequencies, and is amenable to using high-bandwidth component square cells. Using the chopping technique minimizes required device sizes without compromising an acceptable square cell dynamic range, thereby maximizing the square cell bandwidth. The RMS-DC converter consumes less power than conventional RMS-to-DC converters that requires a high-frequency variable gain amplifier.
US09330276B2	Conditional role activation in a database Methods, systems and computer-readable storage mediums encoded with computer programs executed by one or more processors for conditional role activation in a database are disclosed. In an embodiment, a request to activate a role for a user of a database system is received, and a predicate for conditional activation of the role is determined. The conditions of the predicate are evaluated, and if the conditions of the predicate are satisfied, the role is activated for the user. If, however, one or more of the conditions of the predicate are not satisfied, the role is not activated for the user.
US09330274B2	Methods and systems for applying parental-control policies to media files A computer-implemented method may intercept a file-system call associated with a media file. The computer-implemented method may determine an attribute of the media file. The computer-implemented method may also identify a parental-control policy associated with the attribute of the media file. The computer-implemented method may further apply the parental-control policy to the media file. Various other methods, systems, and computer-readable media are also disclosed.
US09330271B1	Fine-grained access control for synchronized data stores A remote distributed data store may be configured to process data updates received through invocation of a common API with reference to a common schema. Local data stores may also be configured to process updates using a common API and schema. Data for multiple users may be stored in a common collection of items maintained by a remote distributed data store. User identity may be verified through a public identity service. User identity and access permissions may be associated with items stored in a remote distributed data store.
US09330270B2	Encryption processing device and authentication method An encryption processing device includes a memory configured to store a common key, and a processor configured to generate a random number which is an integer, to perform a bit transposition on the common key, the bit transposition being determined at least by the random number, to transmit the random number to another encryption processing device and to receive a response from the other encryption processing device, the response obtained by encryption using a common key stored in the other encryption processing device and a second randomized key generated by performing the bit transposition determined by the random number; and to authenticate the other encryption processing device either by comparing the response with the random number by decrypting the response with the common key, or by comparing the random number with the response by encrypting the random number with the common key.
US09330266B2	Safe data storage method and device A safe data storage method is disclosed, the method comprises the following steps: hardware instructions are received; the hardware instructions are analyzed; and if the hardware instructions are storage instructions, a target address in the storage instructions is modified to be the corresponding storage address in a storage apparatus; the modified storage instructions are sent to a hardware layer. A safe data storage device is also disclosed, the device comprises the following units: a receiving unit adapted for receiving hardware instructions; an instruction analyzing unit adapted for analyzing the hardware instructions and judging whether the hardware instructions are storage instructions; an instruction modifying unit adapted for modifying a target address in the storage instructions to be the corresponding storage address in a safe storage apparatus; a sending unit adapted for sending the modified storage instructions to a hardware layer. The technical scheme is able to implement the information persistence operation on the hardware layer i.e., instruction level data dump, trojans or malicious tools can not save the obtained information even if they obtain the secret related information so that the data is always within a controllable safety range.
US09330265B2	Method for component access control and electronic device Disclosed are a method for component access control and electronic device. The method comprises: acquiring a target component list corresponding to the first application, which list includes at least one target component required by the first application, with the at least one target component belonging to at least one basic component; after a component selection command is received, generating information about those basic components accessible by the first application from the target component list according to the component selection command; and storing the information about those basic components accessible by the first application. In the present solution, it is unnecessary to set access to all the component when applying for an application; rather, those component accessible by the application can be controlled during the installation or use of the application according to system or user requirements, thereby increasing the flexibility of the application in accessing components and reducing the probability of the user privacy being stolen.
US09330262B2	Systems and methods for runtime adaptive security to protect variable assets A method of adapting a security configuration of a data processing application at runtime, and a system, together with its computing architecture, are disclosed. The system stores a causal network comprising a plurality of nodes and a plurality of incoming and outgoing causal links associated therewith, wherein each node of the causal network is associated with a security concern or a requirement that can be affected by any configuration of the security controls. The current value of assets nodes, as well as those of the security concerns that can be affected by monitored contextual factors, are updated. The control nodes corresponding to the security controls is updated according to the security configuration whose utility is evaluated by the causal network. The node corresponding to the at least one variable is updated with the determined current value, which is propagated through the causal network through the causal links associated with the updated node. The security configuration with the highest utility is selected and replaces the actual configuration by activating and/or deactivating the security functions corresponding to security control nodes enabled/disabled in the selected security configuration.
US09330250B2	Authorization of media content transfer between home media server and client device A method for authorizing media content transfer between a home media server and a client device and provisioning DRM credentials on the client device, the method comprising receiving a service authorization credential at a client authorization server from a PKI provisioning server, wherein the service authorization credential is associated with a client device, and sending a validation response from the client authorization server to the PKI provisioning server if the client authorization server determines that the service authorization credential was previously provided by the client authorization server to the client device, wherein the validation response releases the PKI provisioning server to send DRM credentials to the client device.
US09330244B2	Controller and method of storage apparatus According to one embodiment, a controller for controlling a connected storage apparatus includes a storage unit and a control unit. The control unit acquires a password input by a user, judges whether or not the password is consistent with a password previously registered in the storage unit, cancels authentication data that is stored in the storage unit and enables reading and writing toward the storage apparatus of data and allows the formatting toward the storage apparatus in a condition that the password is consistent with the password previously registered in the storage unit, and disables reading and writing toward the storage apparatus of data and formatting toward the storage apparatus in a condition that the password is not consistent with the password previously registered in the storage unit.
US09330240B2	Method and system of identifying bodily imbalances In one embodiment, a method of identifying bodily imbalances comprises presenting a mind map to a subject; asking the subject a question based on the mind map; performing muscle response testing; and, identifying the imbalance. The mind map may be presented in printed form, using an electronic means, or presented verbally. The mind map further comprises six (6) categories: pathogenic imbalances, structural imbalances, nutritional imbalances, circuitry imbalances, toxic imbalances, and energetic imbalances; and a series of subcategories within each category.
US09330233B2	Systems and methods for identifying medical image acquisition parameters Systems and methods are disclosed for identifying image acquisition parameters. One method includes receiving a patient data set including one or more reconstructions, one or more preliminary scans or patient information, and one or more acquisition parameters; computing one or more patient characteristics based on one or both of one or more preliminary scans and the patient information; computing one or more image characteristics associated with the one or more reconstructions; grouping the patient data set with one or more other patient data sets using the one or more patient characteristics; and identifying one or more image acquisition parameters suitable for the patient data set using the one or more image characteristics, the grouping of the patient data set with one or more other patient data sets, or a combination thereof.
US09330230B2	Validating a cabling topology in a distributed computing system Validating a cabling topology in a distributed computing system comprised of cabled nodes connected using data communications cables, each cabled node characterized by cabling dimensions, each cable corresponding to one of the cabling dimensions, includes: receiving a selection from a user of at least one cabled node for topology validation; identifying, for each cabling dimension for each selected cabled node, a shortest cabling path; determining, for each cabling dimension, whether the number of cabled nodes in the shortest cabling path for each selected cabled node match; and if, for each cabling dimension, the number of cabled nodes in the shortest cabling path for each selected cabled node match: selecting, for each cabling dimension, the number of cabled nodes in the shortest cabling path as a representative value for the cabling dimension, calculating a product of the representative values, and determining whether the product equals the number of selected cabled nodes.
US09330226B1	Modeling substrate noise coupling for circuit simulation Aspects of the disclosed techniques relate to techniques for modeling substrate noise coupling. Electrical impedance between two contacts in the presence of one or more other contacts is modeled based on a horizontal impedance model and an L-shaped impedance model. The one or more other contacts may be clustered together in four regions first and then are represented by the horizontal impedance model and/or the L-shaped impedance model. The electrical impedance is inserted into netlist for circuit simulation.
US09330223B2	Optical rule checking for detecting at risk structures for overlay issues A method and system is provided for detecting at risk structures due to mask overlay that occur during lithography processes. The method can be implemented in a computer infrastructure having computer executable code tangibly embodied on a computer readable storage medium having programming instructions. The programming instructions are operable to obtain a simulation of a metal layer and a via, and determine a probability that an arbitrary point (x, y) on the metal layer is covered by the via by calculating a statistical coverage area metric followed by mathematical approximations of a summing function.
US09330222B2	Methods, systems, and articles of manufacture for implementing electronic circuit designs with electro-migration awareness Disclosed are methods, systems, and articles of manufacture for implementing electronic circuit designs with electro-migration awareness. Some embodiments perform schematic level simulation(s) to determine electrical characteristics, identifies physical parasitics of a layout component, determines the electrical or physical characteristics associated to electro-migration analysis on the component, and determines whether the component meets EM related constraint(s) while implementing the physical design of the electronic circuit in some embodiments. Some embodiments further determine adjustment(s) to the component or related data where the EM related constraints are not met and/or and present the adjustment(s) in the form of hints. Various data and information, such as currents in various forms or voltages, are passed between various schematic level tools and physical level tools.
US09330220B1	Clock region partitioning and clock routing Clock region partitioning and clock routing includes creating partitions for a plurality of clocks of a circuit design, and legalizing the partitions using a processor according to a number of clocks in each partition and assignment of clock distribution tracks. Roots for implementing clock trees of the clocks are selected within the partitions.
US09330219B2	Integrated circuit design method An integrated circuit design method includes extracting a custom IC design parameter from a configuration file using a design customization module (DCM) and creating an IC design file with a module in a processor design kit (PDK) using the custom IC design parameter.
US09330215B2	Method and system for verifying the design of an integrated circuit having multiple tiers A method for verifying the design of an IC having a plurality of tiers includes conducting a layout versus schematic (“LVS”) check to separate a plurality of devices of a plurality of design layouts, wherein each design layout corresponds to a respectively different tier having the respective devices. A plurality of adjacent tier connections are generated between one of the devices in respectively different tiers from each other, using a computing device. A first RC extraction for each of the tiers is performed to compute couplings between each of the plurality of devices of the corresponding design layout. A second RC extraction for each of the adjacent tier connections is performed.
US09330213B2	Achieving power supply and heat dissipation (cooling) in three-dimensional multilayer package A computer-implemented structure for optimizing a route for power supply and heat dissipation in a multilayer chip. The method includes: setting a heat conductive thermal value for the multilayer chip by way of density, preparing a substrate that contains silicon where a wiring layer is formed facing the upper surface side of the multilayer chip, setting the power from the wiring layer of the substrate that uses silicon, manipulating the value of the power supply, and manipulating the heat conductive thermal value based on density. Both apparatuses include an organic substrate, a multilayer chip, a substrate containing silicon, a wiring layer, and a heat dissipater, wherein the components are configured to perform the steps of the above method. The method of configuring an apparatus ensures that all the multilayer chips are stored in the concave part of the organic substrate.
US09330208B2	Data point averaging for computational fluid dynamics data A system and method for generating fluid flow parameter data for use in aerodynamic heating analysis. Computational fluid dynamics data is generated for a number of points in an area on a surface to be analyzed. Sub-areas corresponding to areas of the surface for which an aerodynamic heating analysis is to be performed are identified. A computer system automatically determines a sub-set of the number of points corresponding to each of the number of sub-areas and determines a value for each of the number of sub-areas using the data for the sub-set of points corresponding to each of the number of sub-areas. The value is determined as an average of the data for the sub-set of points corresponding to each of the number of sub-areas. The resulting parameter values then may be used to perform an aerodynamic heating analysis.
US09330207B2	Support method, recording medium, and design support device to calculate a volume of a three-dimensional model A design support method includes: executing by a computer operations of: moving, in an arbitrary direction, a first particle that is placed at a position in an internal space of a three-dimensional model of a design target and has a diameter of a size; recording a movement trace of the first particle; and calculating a volume of a first spatial region formed by the recorded movement trace.
US09330206B2	Producing a three dimensional model of an implant Determining a shape of a medical device to be implanted into a subject produces an image including a defective portion and a non-defective portion of a surface of a tissue of interest included in the subject. The tissue of interest is segmented within the image. A template, representing a normative shape of an external anatomical surface of the tissue of interest, is superimposed to span the defective portion. An external shape of an implant, is determined as a function of respective shapes of the defective portion as seen in the template, for repairing the defective portion.
US09330204B2	CAD system and method for wireframe coupling Methods for use in a CAD system. One method includes loading CAD data, the CAD data including a first 2D wireframe geometry and a first 3D feature. The method also includes maintaining a first bi-directional logical relationship between the first 2D wireframe geometry and the first 3D feature and receiving an input of a change to the first 3D feature by the CAD system. The method also includes making the change to the first 3D feature and a corresponding change to the first 2D wireframe geometry by the CAD system using the first bi-directional logical relationship, in response to the input, and storing the changes. CAD systems and computer-readable mediums are also discussed.
US09330202B2	Exercise detection apparatus and control method for exercise detection apparatus An exercise detection apparatus determines body movements based on data detected by a detection unit, judges movement states for each body movement based on data detected by the detection unit, corrects the movement states based on a predetermined rule, calculates an exercise state of a user based on a result of the judgment, and stores the calculated exercise state in a storage unit. Accordingly, it is possible to provide an exercise detection apparatus capable of reducing erroneous judgments of the exercise states of the user.
US09330201B2	Inference of query relationships based on retrieved attributes Various example embodiments are provided for inferring relationships between queries. In an example, queries are related based on the identification of common terms between the queries. Another example is to relate queries based on the identification that the queries are associated with a single search session. Yet another example is to infer relationships based on the identification of relationships between item attributes retrieved from the submission of the queries.
US09330200B2	System and method for presenting input suggestions in input fields of a specific type in web pages by replacing the input field with a combo box Systems and methods display input suggestions on web pages having an input field for receiving a specific type of user input. A module stored on a user device is remote from a database containing the input suggestions. The module detects the presence of any input fields of a specific type in a web page. For each detected input field of the specific type, the module generates a combo box that is displayed so as to cover and visually replace the input field. The combo boxes display input suggestions contained in the database. The database can be updated to add or remove input suggestions for particular websites determined to be valid or invalid at those websites. Analysis of the validity of the input suggestions can be based on page analyses sent from the module and performed before and after any submission of an input suggestion.
US09330197B2	Data environment change notification A method of and system for monitoring and providing notification of changes to a data environment. Parameters of interest for monitoring changes made to a metadata data store are stored. Instructions are stored related to notifying a recipient of a communication about the changes. The metadata is monitored for changes related to the parameters of interest, and a change notification communication is generated with transmission initiated to the recipient. The instructions related to notification of the changes may include the identity of a recipient, mechanism for notification, and format and content of notification. A computer readable memory system and a computer program product may be provided that is encoded with a data structure for notifying data consumers of changes to a data environment that includes metadata.
US09330196B2	Wireless traffic management system cache optimization using http headers Wireless traffic management system cache optimization using HTTP headers is disclosed. In one embodiment, the method can include, for example: storing the web content from a web server as cached elements in a local cache on the mobile device and retrieving the cached elements from the local cache to respond to a request made at the mobile device, regardless of expiration indicated in headers of the web content that is cached. The cached elements can be retrieved from the local cache and used to respond to the request at the mobile device even if the expiration in the headers has exceeded, using a tag is used by a proxy server remote from the mobile device to determine if the cached elements for the web content on the local proxy are still valid.
US09330194B2	Communication device, web server apparatus and communication system According to one embodiment, a communication device includes a reception unit, a display unit, and a control unit. The reception unit receives, based on a connection request for a first web page, information of the first web page that includes specific information for instructing a connection to a second web page and information representing a communication status of the second web page. The control unit controls a display form of the specific information based on the information representing the communication status of the second web page when displaying the first web page on the display unit.
US09330189B2	System and method for capturing a multimedia content item by a mobile device and matching sequentially relevant content to the multimedia content item A method and system for matching sequentially relevant content to at least one multimedia content item (MMCI) captured by a mobile device are provided. The method comprises receiving from a mobile device the MMCI captured by at least one sensor of the mobile device; generating a signature for the captured MMCI; and matching at least one sequentially relevant content item respective of the signature of the captured MMCI.
US09330186B2	Similarity engine for facilitating re-creation of an application collection of a source computing device on a destination computing device Techniques are disclosed for facilitating re-creation of an application collection of a source computing device at a destination computing device. The techniques include receiving a source application identifier indicative of a source application edition, the edition of the application being programmed for a source operating system. The techniques also include receiving an indicator of a destination operating system. The techniques further include determining a source canonical application corresponding to the source application edition based on the source application identifier, the source canonical application being a representative of one or more application editions including the source application edition. The techniques also include determining a set of destination application editions that are likely similar to the source application edition based on the source canonical application, the set of destination application editions indicating one or more destination application editions programmed for the destination operating system.
US09330183B2	Approximate privacy indexing for search queries on online social networks In one embodiment, a method includes receiving from a first user of an online social network a search query, searching data stores to identify objects that match the search query, where identifying the objects is also based in part on the privacy setting for each object, determining for each identified object a visibility of the object with respect to the first user, and generating one or more search results corresponding to the search query.
US09330174B1	Determining topics of interest A computer-implemented method that includes the actions of receiving a request for data indicative of topics of interest for a user segment of a social networking platform, accessing user data for one or more users of the social networking platform, comparing the one or more user characteristics that are associated with the user segment to user characteristics associated with the accessed user data, identifying, based on comparing, a portion of the accessed user data that pertains to the user segment, analyzing contents of the portion of the accessed user data that pertains to the user segment, determining, based on analyzing, one or more elements in the portion of the accessed user data that pertain to a topic of interest for the user segment, and transmitting, to a client device that sent the request, data indicative of elements pertaining to the topics of interest for the user segment.
US09330171B1	Video annotation using deep network architectures A method includes receiving, by a processing device of a content sharing platform, a video content, selecting at least one video frame from the video content, subsampling the at least one video frame to generate a first representation of the at least one video frame, selecting a sub-region of the at least one video frame to generate a second representation of the at least one video frame, and applying a convolutional neuron network to the first and second representations of the at least one video frame to generate an annotation for the video content.
US09330170B2	Relating objects in different mediums Metadata associated with a first multimedia object in a first medium is used to find a second multimedia object in a second medium. The metadata includes category data.
US09330169B2	Audio systems and related devices and methods A method for managing presets in an audio system is provided. The method includes syncing preset assignments on a plurality of audio playback devices such that preset assignments on any one of the audio playback devices correspond to respective preset assignments on each of the other audio playback devices, and, such that, if one of the preset assignments is changed on one of the audio playback devices, each of the other audio playback devices is automatically updated such that a corresponding change is made to a corresponding preset assignment on each of the other audio playback devices. Each of the preset assignments is an assignment of an entity associated with one of a plurality of digital audio sources to one of a plurality of preset indicators on the corresponding one of the audio playback devices.
US09330164B1	Electronic platform for user creation and organization of groups of member profiles to aid in memorization of selected information An electronic platform allowing users to form and organize groups of member profiles, which contain a number of biographical categories (e.g., name, address, etc.) and a personal photo. The electronic platform incorporates many different methods of testing the user to assist in the memorization of the faces and biographical information of the members of the group, i.e., electronic flash cards (one sided or two sided), multiple choice quizzes, etc. The users then may either create their own custom tests or they may use predesigned quizzes generated by the electronic platform.
US09330162B2	Method and apparatus for providing temporal context for recommending content for consumption by a user device A method for operating a system to provide temporal context for recommending items for consumption by a user device is described. The method comprises maintaining a record of items consumed by the user device or a group of devices within a reference period, together with the time of consumption of each item, and a content descriptor associated with each item. Temporal consumption periods are identified within the reference period, each consumption period spanning the consumption of one or more items with similar content descriptors, and each consumption period is associated with its respective content descriptor. An aggregated list is created of consumption periods recorded over a plurality of reference periods. Clusters of similar consumption periods are identified in the aggregated list, and recurring temporal patterns for user device behavior are identified in each cluster. A profile is created for each user device based on the clusters and the recurring temporal patterns for each cluster, and this profile is used to provide the temporal context at the user device.
US09330161B2	Creating global aggregated namespaces for storage management Embodiments are directed to creating global, aggregated namespaces for storage management and to providing consistent namespaces in a distributed storage system. In one scenario, a computer system defines data storage objects for each data storage node. The data storage objects uniquely identify storage elements of the data storage nodes, where each data storage object includes various associated attributes. The computer system replicates the defined data storage objects and any associated attributes from a first data storage node to a second, different data storage node among the data storage nodes. As such, the defined data storage objects are visible from any node in the data storage nodes. The computer system also aggregates the defined data storage objects for each of the data storage nodes and creates a global, aggregated namespace that includes the aggregated data storage objects for each of the data storage nodes.
US09330157B2	Cross-ontology multi-master replication A system and method providing cross-ontology multi-master replication is described. In a first embodiment a method for cross-ontology multi-master replication comprising the steps of: obtaining, at an importing site, an exporting site ontology and a set of one or more database changes; wherein the exporting site ontology defines a set of one or more data types; and after mapping the exporting site ontology to an importing site ontology, incorporating the set of one or more database changes into a database including mapping each of one or more data types of the set of data types to a data type defined by the importing site ontology using an ontology map.
US09330148B2	Adapting data quality rules based upon user application requirements During application of data quality rules to a data set obtained from a data source, data is retrieved from the data source along with a common set of rules configured to format the retrieved data in a manner in accordance with one or more predefined data quality rules of the common set of rules. At least one predefined data quality rule is adjusted utilizing at least one editable widget to form a modified set of data quality rules adapted for use with a specified application. The modified set of data quality rules is applied to the retrieved data.
US09330147B2	Database and data bus architecture and systems for efficient data distribution Systems and methods for managing distributed data using any of a plurality of data models are disclosed. One method includes receiving a data request from one of a plurality of database interfaces, each database interface associated with a different data model type. The method further includes translating the data request to a second data request based at least in part on a data model neutral description of a data model in the data store that is associated with data and the database interface, wherein the data store maintains descriptions of each of a plurality of different data models corresponding to the different data model types. The method also includes executing the second data request, thereby reflecting the data request in data storage such that data is managed consistently across each of the plurality of database interfaces.
US09330144B2	Tagging of facet elements in a facet tree Returning a tagged facet tree to an end user who is only authorized to access an authorized portion of the facet tree is provided. A facet tree is received from a facet tree database. A first rule for the facet tree and a second rule for a plurality of tagging scenarios based on a characteristic of the end user is acquired. The first rule is applied to the facet tree before presentation to the end user on a user interface such that only the authorized portion of the facet tree is displayed to the end user. The second rule is applied to the plurality of tagging scenarios such that only a tagging scenario that is applicable to the characteristic of the end user is displayed to the end user. The tagging scenario is made available to the end user at a user interface.
US09330143B2	Data storage device supporting accelerated database operations Disclosed herein are data storage device embodiments for accelerating database operations and associated methods. In one embodiment, the data storage device includes a controller; an array of one or more solid-state memory storage devices; a first memory for storing processor executable instructions associated with database operations; and a second memory for storing data related to the database operations; wherein the controller is configured to execute the instructions to: cause data to be read from the solid-state memory storage devices into the second memory; determine whether the data match a query specified by the instructions; and perform a database operation based on the query match determination.
US09330137B2	Cloud data backup storage manager Techniques for cloud data backup are disclosed. Example methods may store backup data from a client computer on portions of data storage media associated with peer computers. In some example embodiments, a file may be encoded into segments using an error-tolerant encoding scheme, and the segments may be stored on peer computers. In some example embodiments, individual segments may be stored on more than one peer machine and/or an individual peer machine may not receive all of the segments associated with the file.
US09330133B2	Virtual physician office systems and methods Electronic records are formatted according to recipient addresses. When an electronic database record is received by a server or other device, the electronic database record has any formatting, herein termed a legacy format. The electronic database record is destined for delivery to device identified by a recipient address. The recipient address is associated with a software agent that reformats the legacy format into a different format. The electronic database record is thus reformatted according to software agent associated with the recipient address. A reformatted database record is thus sent to the recipient address, and the reformatted database record has the different format.
US09330130B1	Get row index of record in dynamic data table A method includes receiving a request to lookup a record in a database having dynamic record updates, performing a binary search with a basket set of sorted values as a middle key range set of records, determining if an input key value is within the middle key range set of records, and if the input key value is not within the middle key range set of records, shifting the middle key range set of records such that it includes a record corresponding to the input key value.
US09330128B2	Enumeration of rooted partial subtrees Embodiments of methods, apparatuses, devices and/or systems for manipulating hierarchical sets of data are disclosed. In particular, methods, apparatus devices and or/or systems for enumerating rooted partial subtrees are disclosed.
US09330125B2	Querying of reputation scores in reputation systems The disclosed embodiments provide a reputation system. The reputation system includes a ranking apparatus that obtains a set of reputation scores for one or more dimensions of a set of items in the reputation system and generates a ranking of the items based on the reputation scores and the one or more quantiles. The reputation system also includes a query-processing apparatus that obtains a query comprising the one or more dimensions and one or more quantiles associated with the one or more dimensions and provides the ranking in a response to the query.
US09330123B2	Method and system for improving information system performance based on usage patterns Usage patterns of structure model are utilized to determine a personalized structure model associated with a user. The personalized structure model is constructed such that retrieval of data associated with the personalized structure model is expected to improve performance of retrieving data from the data provider. The personalized structure model may be arranged based on an order of retrieval, based on groups of structure objects that may be retrieved together or the like. The personalized structure model may be a flat structure model to further improve performance of retrieving data from the data provider.
US09330122B2	System and method of dynamic data object upgrades A method, article of manufacture, and apparatus for managing a cloud computing environment. In some embodiments, this includes modifying an object or a component of an object at runtime and storing the modified object or modified component of an object in a storage device. In some embodiments, components of an object such as data structures are modified. In some embodiments, objects may have more than one version.
US09330121B2	Electronic content information display management According to an example, an operation on a version of an electronic content may be performed and a determination as to whether the operation is an editing operation may be made. In response to the operation being an editing operation, a new version may be created and information pertaining to the performance of the operation on the new version may be recorded. In addition, for each significant version, information pertaining to the significant version may be displayed, in which the information may include an identification of the significant version, available operations on the significant version, and a last operation performed on the significant version, in which a significant version may include a version in which no editing operations have been applied or a version in which an operation that is visible to another user has been performed on the version and the operation is outstanding.
US09330114B2	Data processing apparatus, data processing method, and recording medium storing computer program for performing data processing A non-transitory, computer-readable recording medium having stored therein a program for causing a computer to execute a process, the process comprising: detecting whether second data, stored in a second storage device, updated from first data stored in a first storage device has been updated, upon detecting that the second data has been updated, obtaining the second data before update from the second storage device, and storing the second data into the first storage device, and when the second data is contained in the first storage device, obtaining the second data from the first storage device, and generating third data using the second data, and the first data.
US09330113B2	Providing content based on image item A device may analyze an image and identify an image item included in the image based on analyzing the image. The device may identify content relating to the image item. For example, the device may identify an application, of the device, relating to the image item. The device may provide, for display with the image, information indicating that the content is available and receive input indicating a desire for the content. The device may provide the content for display based on receiving the input indicating the desire for the content. For example, the device may initiate the application and cause the content to be provided via the application.
US09330112B2	Grouping and compressing similar photos Systems and methods may provide for assigning a subset of a plurality of photos to a group and selecting a reference photo from the group. Additionally, the reference photo may be used to conduct a compression of one or more remaining photos assigned to the group. In one example, the reference photo and the compressed one or more remaining photos assigned to the group are transmitted to a remote server.
US09330111B2	Hierarchical ranking of facial attributes In response to a query of discernable facial attributes, the locations of distinct and different facial regions are estimated from face image data, each relevant to different attributes. Different features are extracted from the estimated facial regions from database facial images, which are ranked in base layer rankings as a function of relevance of extracted features to attributes relevant to the estimated regions, and in second-layer rankings as a function of combinations of the base layer rankings and relevance of the extracted features to common ones of the attributes relevant to the estimated regions. The images are ranked in relevance to the query as a function of the second-layer rankings.
US09330109B2	System, method and apparatus for enterprise policy management Disclosed are systems, methods and apparatuses for managing objects (files and directories) in network file systems according to policies. Each policy may have one or more rules, each of which ties a condition to an action. Each condition can be expressed in terms of metadata harvested across file systems and stored in a metadata repository. The actions are user-programmable. Users can apply and/or enforce a policy by manipulating the metadata stored in the metadata repository. For example, suppose a policy prohibits storing MP3 files in corporate storage, a user can specify a rule that ties the condition “no MP3 files in volumes A-Z” to an action “delete MP3 files from volumes A-Z.” A file management application may apply a filter to the metadata repository to produce metadata records having values that meet the specified condition and take the corresponding action on managed objects associated with those metadata records.
US09330107B1	System and method for storing metadata for a file in a distributed storage system A system, computer-readable storage medium storing at least one program, and a computer-implemented method for storing metadata for a file in a distributed storage system is presented. Metadata for a file is generated. A subset of metadata clusters in a distributed storage system is identified to form a quorum of metadata clusters. Requests to store the metadata for the file on the metadata clusters in the distributed storage system are issued, where the requests include high priority requests to store the metadata for the file on at least one of the metadata clusters in the quorum of metadata clusters and normal priority requests to store the metadata in the remaining metadata clusters, the metadata being stored on the at least one of the metadata clusters in the quorum of metadata clusters before being stored on the remaining metadata clusters.
US09330102B2	Multi-tenant platform-as-a-service (PaaS) system implemented in a cloud computing environment Implementations for providing cartridges in a multi-tenant PaaS system of a cloud computing environment is disclosed. An example method includes maintaining a repository of a plurality of packages that provide functionality for multi-tenant applications executed by a node, each package of the plurality of packages comprising a software and a configuration information specifying a plurality of hooks, receiving a request to configure a first package from the plurality of packages, wherein the first package is to provide functionality for one of the multi-tenant applications, establishing a container to provide process space for the functionality of the first package, calling a configure hook from the plurality of hooks specified in the configuration information of the first package, and in response to calling the configure hook, embedding an instance of the software of the first package in the container, the instance of the software of the first package copied from the repository.
US09330095B2	Method and system for matching unknown software component to known software component A computer system or method identifies components. A component fingerprint storage is configured to memorize known fingerprints of known components. The term “component” used herein is defined to be a specific version of pre-existing executable software, or a reusable pre-existing self-contained software code building block which is not a complete stand-alone finished product ready for use and which is binary or source code. A fingerprint is generated for a normalized unknown component and fingerprints are generated for all normalized components included in the unknown component. It is determined whether any of the fingerprints generated for the normalized unknown component and for the normalized components included in the unknown component match any of the known fingerprints of known components.
US09330094B2	RAAF merger, acquisition, divestiture methodology Different advantageous embodiments provide for data separation and data integration. A customizable toolset is implemented on an enterprise resource planning system to selectively purge or mask data in a replicated database.
US09330093B1	Methods and systems for identifying user input data for matching content to user interests A method of managing content includes analyzing a plurality of referring uniform resource locators (URLs); extracting, from each of the referring URLs, website data and a parameter having a parameter value; generating website parameter pairs based on the website data and the parameters of the referring URLs; determining a diversity metric, for each website parameter pair, based on variety of parameter values of the website parameter pair; selecting a website parameter pair having a diversity metric exceeding a determined threshold; and generating a template for parsing a referring URL of the selected website parameter pair.
US09330092B2	Systems, methods, apparatus and computer-accessible-medium for providing polarization-mode dispersion compensation in optical coherence tomography Exemplary systems, apparatus, methods and computer-accessible medium for generating information regarding at least one sample can be provided. For example, it is possible to receiving first data which is based on at least one first radiation provided to the sample(s) and at least one second radiation provided from the sample(s) that is/are associated with the first radiation(s) It is also possible to generate second data by reducing the influence of first optical effects induced on the first radiation(s) prior to reaching the sample(s), and second optical effects induced on the second radiation(s) after leaving the sample(s).
US09330078B2	Rich text handling for a web application A method and apparatus for representing and controlling documents including rich text for Web based applications and browsers is provided so that editing of rich text can be facilitated within the browsers. The rich text is represented in a memory structure so that various formats may be flexible maintained. Text, images, tables, links and the like are represented in the memory structure, which may be maintained in databases for eventual editing. A controller class and subsidiary classes represent the rich text and provide methods to convert html to the memory structure and back, representing the rich text in a relational database, retrieving the rich text from a relational database, and presenting the rich text for editing. A spell checking facility for the rich text is included.
US09330077B2	Dynamic image generation for customizable user interfaces A system and method to define icon color of an icon image for program themes. At a server having a processor and storage, an icon definition file that includes a color handle and a shape definition of a first icon are stored. A plurality of cascading style sheets, each corresponding to a respective program theme, are also stored at the server. Each of the cascading style sheets corresponds to a respective program theme and includes a color definition mapped to the color handle. At the server, an active theme from among the program themes and an icon color, using the color definition associated with the active theme, are determined. An icon image for the first icon is then created based on the shape definition and the icon color.
US09330075B2	Method and apparatus for identifying garbage template article Method and apparatus for identifying garbage template articles in network communication field are disclosed. The method includes: extracting a feature from an eligible microblog article to generate an article feature including a punctuation feature, a topic feature, a bracket feature, a link feature and an account name feature; acquiring a garbage template list including garbage template feature, i.e. an article feature whose frequency reaches a preset threshold, wherein they are extracted in a same way; identifying the microblog article as a garbage template article when the article feature is the same as the garbage template feature. The apparatus includes: a feature extracting module, an acquiring module, and an identifying module. Features of a microblog article are extracted to determine whether the microblog article is a garbage template article, so that garbage template articles in the present microblog platform can be identified effectively and search engine resources are saved.
US09330074B2	Style sheet speculative preloading Methods for preloading for a web page externally specified resources of a style sheet are provided. In one aspect, a method includes identifying at least one externally specified resource specified by a style sheet for a web page during download of at least one of the style sheet or the web page. The at least one externally specified resource includes at least one of an image, font, audio data, or video data. The method also includes determining whether the web page includes instructions to load the at least one externally specified resource, and loading the at least one externally specified resource specified by the style sheet for the web page when the determination indicates the web page includes instructions to load the at least one externally specified resource. Systems and machine-readable media are also provided.
US09330073B2	System and method for translating insurance-related data A computer system includes a processor; and a memory storage device in communication with the processor. The processor is adapted to: receive via a computer communications network a user identification and an identification of an electronic file having user-generated insurance-related data; provide an output signal for display to the user a prompt for the user to provide mapping data mapping a plurality of insurance-related data fields data identifiers in the user-data electronic file; receive mapping data in response to the prompt; access the user electronic file; employing the received mapping data, map data elements identified in the user-data electronic file, to a document in a predetermined format; verify that the received mapped data constitutes complete data to submit in connection with an insurance transaction; and provide an output signal including data constituting the document in a predetermined format to a system for further processing in accordance with an insurance transaction.
US09330072B1	Serving content for a space based on a probabilistic distribution Variations in user devices may result in content being rendered differently. Knowing the amount of space required to render the content item for a user device may allow more content to be shown. In one implementation, measurement results of rendering content items from user devices with various configurations may be obtained by running scripts on the user devices. A space need of the content items may be determined based on the measurement results. The determination may include determining a probabilistic distribution of a representation of space needed for the content items. A request for a content item for display in a slot of a web page may be received and a content item may be transmitted based on the probabilistic distribution that represents a percentage of content items that are truncated when displayed in the slot.
US09330067B2	Printed nonwoven web and method for making A nonwoven web having printed thereon a colorant and/or a composition providing a skin health benefit. The nonwoven web can be a three-dimensional, fluid pervious, polymeric web. The nonwoven web can comprise apertures. The apertures are defined in a first surface of the nonwoven web in a first plane of the nonwoven web, and extend in sidewall portions to a second surface in a second plane of the nonwoven web. A colorant or lotion composition can be deposited on at least a portion of the second surface of the nonwoven web.
US09330066B2	Dynamic display method of multi-layered PDF documents A method for dynamic display of at least one layer in a PDF document, comprising the steps of setting at least one criterion for at least one property of a trigger to change a display state of the at least one layer of the PDF document to another display state of the at least one layer of the PDF document, creating a script that can be processed by a PDF document reader and that contains the at least one criterion for the at least one property of the trigger, and embedding the script in the PDF document, wherein when the PDF document is opened by the PDF document reader, the script causes evaluation of the at least one property for the trigger, and if the at least one criterion for the at least one property of the trigger is met, then the script causes a change of the display state of the at least one layer of the PDF document.
US09330063B2	Generating a sparsifier using graph spanners A sparsifier is generated from a union of multiple spanners of a graph. The edges of the sparsifier are weighted based on a measure of connectivity called robust connectivity. The robust connectivity of a node pair is the highest edge sampling probability at which a distance between the pair is likely to drop below a specified length. Each spanner is generated from a subgraph of the graph that is generated using a decreasing sampling probability. For the weight of each edge, a spanner is determined where an estimated distance between the nodes associated with the edge is greater than a threshold distance. The sampling probability of the subgraph used to generate the spanner is an estimate of the robust connectivity of the edge. The weight of the edge is set to the inverse of the estimated robust connectivity.
US09330062B2	Vehicle control and gateway module A vehicle control and gateway module comprising an electronic control module controlling one or more vehicle systems, a vehicle communications bus, a wireless communications module, an electronic gateway module acting as a translator of information between the vehicle communications bus and the wireless communications module, and a software program, whereby an operator using a remote mobile device can send and receive wireless commands to and from the vehicle with the electronic gateway module translating messages from one data protocol to the other as required.
US09330060B1	Method and device for encoding and decoding video image data A method and device for encoding and decoding video image data. An MPEG decoding and encoding process using data flow pipeline architecture implemented using complete dedicated logic is provided. A plurality of fixed-function data processors are interconnected with at least one pipelined data transmission line. At least one of the fixed-function processors performs a predefined encoding/decoding function upon receiving a set of predefined data from said transmission line. Stages of pipeline are synchronized on data without requiring a central traffic controller. This architecture provides better performance in smaller size, lower power consumption and better usage of memory bandwidth.
US09330053B1	True push architecture for internet protocol notification A method of true push for internet protocol notification to a mobile communication device implemented by at least one server computer. The method comprises determining the size of physically addressable random access memory (RAM) and the number of central processing unit (CPU) cores of the server computer at boot time and setting the resource limit, rlimit, in the kernel of the server computer that comprises setting the limit for the total number of file handles in the entire system automatically based on the determined size of the random access memory and the determined number of the central processing unit cores at boot time. The method further comprises tying the memory page allocation into the setting of the kernel parameters, whereby the input/output (I/O) maintenance of the server computer is maximized for concurrent web sockets so that the server computer is optimized for implementing the true push for internet protocol notification.
US09330050B2	Deployment wizard A method and apparatus are provided for collecting deployment information from a user for a multi-tier computer system. The method includes the steps of receiving a deployment size of the multi-tier system from the user and identifying a set of virtual appliances by function based upon the deployment size received from the user. The method further includes the steps of prompting the user for a name for each identified virtual appliance, collecting network information of each virtual appliance based upon the name and generating a deployment configuration file for a mandatory virtual appliance of the set of virtual appliances.
US09330048B1	Balancing response times for synchronous I/O requests having different priorities A computing environment, such as an data mirroring or replication storage system, may need to process synchronous I/O requests having different priorities in addition to handling I/O requests on the basis of synchronous or asynchronous groupings. The system described herein provides a data storage system that addresses issues involving efficient balancing of response times for servicing synchronous I/O requests having different priorities. Accordingly, the system described herein provides for maintaining an optimal response time for the host-synchronous I/O requests and the optimal throughput of non-host-synchronous I/O requests using a host-synchronous request time window within which processing of non-host-synchronous I/O requests is throttled. The host-synchronous request time window may be selected to enable the optimal response time for the host-synchronous I/O and also to minimize the impact on the overall throughput of the I/O processor of the storage device.
US09330041B1	Staggered island structure in an island-based network flow processor An island-based network flow processor (IB-NFP) integrated circuit includes rectangular islands disposed in rows. In one example, the configurable mesh data bus is configurable to form a command/push/pull data bus over which multiple transactions can occur simultaneously on different parts of the integrated circuit. The rectangular islands of one row are oriented in staggered relation with respect to the rectangular islands of the next row. The left and right edges of islands in a row align with left and right edges of islands two rows down in the row structure. The data bus involves multiple meshes. In each mesh, the island has a centrally located crossbar switch and six radiating half links, and half links down to functional circuitry of the island. The staggered orientation of the islands, and the structure of the half links, allows half links of adjacent islands to align with one another.
US09330039B2	Crosstalk aware encoding for a data bus Techniques for encoding data are described herein. An example of a device in accordance with the present techniques includes a signaling module coupled to a plurality of digital inputs. The signaling module is to encode data received at the plurality of digital inputs to generate encoded data. Based on the encoded data, the signaling module can drive line voltages on a plurality of signal lines of a bus. Each one of the plurality of line voltages corresponds to a weighted sum of the data received at the plurality of digital inputs.
US09330036B2	Interrupt reduction by dynamic application buffering Systems and methods are disclosed for processing a queue associated with a request. An example system includes an input/output (I/O) interface that receives a request associated with a channel. The example system also includes an association module that determines whether a condition is satisfied. When the condition is determined to not be satisfied, the association module, after a hardware device completes processing the request, decrements an in-flight counter that represents a first amount of data in the channel. When the condition is determined to be satisfied, the association module, before the hardware device completes processing the request, decrements the in-flight counter.
US09330035B2	Method and apparatus for interrupt handling A data processing device comprises a plurality of system registers and a set of interrupt handling registers for controlling handling of an incoming interrupt. The device also includes processing circuitry configured to execute software of the plurality of execution levels, and interrupt controller circuitry configured to route said incoming interrupts to interrupt handling software that is configured to run at one of said plurality of execution levels, and register access control circuitry configured to dynamically control access to at least some of said interrupt handling registers in dependence upon one of said plurality of execution levels that said incoming interrupt is routed to. The interrupt handling software configured to run at a particular execution level does not have access to interrupt handling registers for handling a different incoming interrupt that is routed to interrupt handling software that is configured to run at a more privileged execution level.
US09330031B2	System and method for calibration of serial links using a serial-to-parallel loopback A system and method for calibration of serial links using serial-to-parallel loopback. Embodiments of the present invention are operable for calibrating serial links using parallel links thereby reducing the number of links that need calibration. The method includes sending serialized data over a serial interface and receiving parallel data via a parallel interface. The serialized data is looped back via the parallel interface. The method further includes comparing the parallel data and the serialized data for a match thereof and calibrating the serial interface by adjusting the sending of the serialized data until the comparing detects the match. The adjusting of the sending is operable to calibrate the sending of the serialized data over the serial interface.
US09330026B2	Method and apparatus for preventing unauthorized access to contents of a register under certain conditions when performing a hardware table walk (HWTW) A security apparatus and method are provided for performing a security algorithm that prevents unauthorized access to contents of a physical address (PA) that have been loaded into a storage element of the computer system as a result of performing a prediction algorithm during a hardware table walk that uses a predictor to predict a PA based on a virtual address (VA). When the predictor is enabled, it might be possible for a person with knowledge of the system to configure the predictor to cause contents stored at a PA of a secure portion of the main memory to be loaded into a register in the TLB. In this way, a person who should not have access to contents stored in secure portions of the main memory could indirectly gain unauthorized access to those contents. The apparatus and method prevent such unauthorized access to the contents by masking the contents under certain conditions.
US09330023B2	Managing translations across multiple contexts using a TLB with entries directed to multiple privilege levels and to multiple types of address spaces For a current context in control of a processor requesting access to a particular address, a translation lookaside buffer (TLB) controller specifies a virtual address with a logical partition identifier value indicating a privilege setting of the current context, a process identifier value indicating whether the address is within shared address space, and an effective address comprising at least a portion of the particular address. In response to the virtual address not matching at least one entry within a TLB comprising at least one entry stored for at least one previous translation of at least one previous address, the TLB controller translates the virtual address into a real page number using at least one page table and adding a new entry to the TLB with the virtual address and the real page number, wherein each at least one entry within the TLB identifies a separate privilege setting from among a plurality of privilege settings and a separate indicator of whether the address is within the shared address space.
US09330021B2	Synchronizing a translation lookaside buffer with an extended paging table A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of the host of the virtualization based system (host physical address), and stored in a translation lookaside buffer (TLB), with a corresponding mapping stored in an extended paging table (EPT) of the virtualization based system.
US09330018B2	Suppressing virtual address translation utilizing bits and instruction tagging Some embodiments include a method that can store a first physical address in a first entry in a translation lookaside buffer (TLB). The method can configure a first marker in the first entry in the TLB to indicate that hit suppression is allowed for the first entry. The method can detect a multi-processor coherency operation that will cause hit suppression for certain entries in a TLB, and cause purging of certain entries in the TLB. The method can translate a second virtual address for a second instruction into a second physical address. The method can store the second physical address in a second entry. The method can configure a second marker in the second entry in the TLB to indicate that the hit suppression is not allowed for the second entry in the TLB, and that the purging is not allowed for the second entry in the TLB.
US09330017B2	Suppressing virtual address translation utilizing bits and instruction tagging A translation lookaside buffer coherency unit with Emulated Purge (TCUEP) translates a first virtual address for a first instruction into a first physical address. The TCUEP detects a multi-processor coherency operation that will cause hit suppression for certain entries in a TLB and purging of certain entries in the TLB. The TCUEP translates a second virtual address for a second instruction into a second physical address and stores the second physical address in a second entry in the TLB. The TCUEP configures a second marker in the second entry to indicate that the hit suppression is not allowed for the second entry, and that the purging is not allowed for the second entry. The TCUEP receives a first address translation request that indicates a hit in the second entry. The TCUEP resolves the first address translation request by returning the second physical address.
US09330016B2	Systems and methods for managing read-only memory Embodiments for managing read-only memory. A system includes a memory device including a real memory and a tracking mechanism configured to track relationships between multiple virtual memory addresses and real memory. The system further includes a processor configured to perform the below method and/or execute the below computer program product. One method includes mapping a first virtual memory address to a real memory in a memory device and mapping a second virtual memory address to the real memory.
US09330014B2	Method and system for full resolution real-time data logging A method and data-logging system are provided. The system includes a map-ahead thread configured to acquire blocks of private memory for storing data to be logged, the blocks of private memory being twice as large as the file page size, a master thread configured to write data to the blocks of private memory, in real-time and in full resolution, the data acquired during operation of a machine generating the data and written to the blocks of private memory in real-time, the machine including a controller including a processor communicatively coupled to a memory having processor instructions therein, and a write-behind thread configured to acquire pages of memory that are mapped to pages in a file, copy the data from the blocks of private memory to the acquired file-mapped blocks of memory.
US09330013B2	Method of cloning data in a memory for a virtual machine, product of computer programs and computer system therewith A method of cloning data in a memory for a source virtual machine (VM) and at least one cloned virtual machine is proposed. A mapping relationship between a guest physical address from the source VM or the cloned VM and a host physical address of the memory is defined by a plurality of page tables configured in a plurality of hierarchical levels. In the method, metadata of the page tables in the highest level or the higher levels of the plurality of hierarchical levels is copied to the virtual machine. Remaining metadata of the page tables in the levels other than the highest level or the higher levels of the plurality of hierarchical levels is replicated to the virtual machine in response to the access operation. Data stored in the corresponding address of the memory is accessed according to the metadata and the replicated metadata.
US09330012B2	Allocation enforcement in a multi-tenant cache mechanism Cache optimization. Cache access rates for tenants sharing the same cache are monitored to determine an expected cache usage. Factors related to cache efficiency or performance dictate occupancy constraints. A request to increase cache space allocated to a first tenant is received. If there is a second cache tenant for which reducing its cache size by the requested amount will not violate the occupancy constraints for the second cache tenant, its cache is decreased by the requested amount and allocated to satisfy the request. Otherwise, the first cache size is increased by allocating the amount of data storage space to the first cache tenant without deallocating the same amount of data storage space allocated to another cache tenant from among the plurality of cache tenants.
US09330011B2	Microprocessor with integrated NOP slide detector A microprocessor includes an instruction cache and a hardware state machine configured to detect a no operation (NOP) slide by counting a continuous sequence of NOP instructions within a stream of instructions fetched from the instruction cache. The microprocessor is configured to suspend execution of the stream of instructions, and transfer control to another routine, in response to detecting the NOP slide.
US09330009B1	Managing data storage A method and system for use in managing data storage is disclosed. Data storage in a data storage system is managed. The data storage system comprises a first data storage tier and a second data storage tier configured such that the performance characteristics associated with one of the data storage tiers is superior to the other data storage tier. I/O activity is determined in connection with a data group stored on one of the first and second data storage tiers. It is determined whether to migrate the data group stored on the one of the first and second data storage tiers to the other data storage tier based on the performance characteristics associated with the other data storage tier and the determined I/O activity. The data group is migrated to the other data storage tier in response to determining to migrate the data group to the other data storage tier. The data group is processed in response to determining to migrate the data group to the other data storage tier such that fragmentation in connection with the data group is substantially reduced.
US09330007B2	Systems and methods for dynamic optimization of flash cache in storage devices In various embodiments, a storage device includes a magnetic media, a cache memory, and a drive controller. In embodiments, the drive controller is configured to establish a portion of the cache memory as an archival zone having a cache policy to maximize write hits. The drive controller is further configured to pre-erase the archival zone, direct writes from a host to the archival zone, and flush writes from the archival zone to the magnetic media. In embodiments, the drive controller is configured to establish a portion of the cache memory as a retrieval zone having a cache policy to maximize read hits. The drive controller is further configured to pre-fetch data from the magnetic media to the retrieval zone, transfer data from the retrieval zone to a host upon request by the host, and transfer read ahead data to the retrieval zone to replace data transferred to the host.
US09330004B2	Data processing method, cache node, collaboration controller, and system The present invention provides a data processing method based on a cache node group for data caching, where each cache node in the group includes a local replacement-allowable data storage space for storing data accessed by a local client and a collaborative replacement-allowable data storage space for storing data content accessed by a non-local client. By using the data processing method to process data content stored in the local replacement-allowable data storage space and the collaborative replacement-allowable data storage space of the cache node, the clients can obtain data more accurately and directly during access to the cache node, thereby meeting different requirements for local optimization of the cache node.
US09330003B1	Intelligent adapter for maintaining cache coherency A system having a first computing device interfacing with a first adapter and a second computing device interfacing with a second adapter, where the first adapter and the second adapter operate within a cluster is provided. The first adapter processes an I/O request, when the first adapter is a cache owner of a logical entity presented to the first computing device, otherwise the request is sent to the second adapter by a storage protocol controller of the first adapter and the second adapter as the cache owner of the logical entity processes the request.
US09329998B2	Information processing apparatus and scheduling method An information processing apparatus includes: at least one access unit that issues a memory access request for a memory; an arbitration unit that arbitrates the memory access request issued from the access unit; a management unit that allows the access unit that is an issuance source of the memory access request according to a result of the arbitration made by the arbitration unit to perform a memory access to the memory; a processor that accesses the memory through at least one cache memory; and a timing adjusting unit that holds a process relating to the memory access request issued by the access unit for a holding time set in advance and cancels the holding of the process relating to the memory access request in a case where power of the at least one cache memory is turned off in the processor before the holding time expires.
US09329995B2	Memory device and operating method thereof The invention provides a memory device. The memory device includes a flash memory, a memory, and a controller. The flash memory includes a plurality of blocks for data storage. The memory stores an address mapping table recording relationships between logical addresses and physical addresses of the blocks therein. The controller divides the address mapping table stored in the memory to a plurality of mapping table units, updates relationships between the logical addresses and the physical addresses stored in the mapping table units, determines whether data access performed to the flash memory fulfills the conditions of a specific requirement, and when the data access fulfills the conditions of the specific requirement, the controller selects a target mapping table unit from the mapping table units, and stores the target mapping table unit and a corresponding time stamp as a mapping table unit data to the flash memory.
US09329992B2	Data storage device and flash memory control method A data storage device using a FLASH memory with replay-protected blocks. The storage space of the FLASH memory is divided into blocks and each block is further divided into pages. A controller is provided in the data storage device to couple to the FLASH memory. The controller manages at least one replay-protected memory block of the FLASH memory. The controller programs two pages into the at least one replay-protected memory block and each page is programmed with a write count of the at least one replay-protected memory block.
US09329989B2	System and method for pre-interleaving sequential data A method and system for operating a memory device in programming mode is disclosed. The memory device includes a programming mode and a normal mode. The memory device in programming mode increases the number of physical planes that can be programmed in parallel than can be programmed in normal mode. In this way, the memory device may be programmed more quickly at various times of operation of the memory device (such as during manufacturing). The host system may send rearranged data to the memory device in programming mode with the rearranged data accounting for the increased number of physical planes programmed in parallel.
US09329982B2	Deployment pattern monitoring A computer system can detect a request for status information relating to a particular deployment pattern; query, in response to the request, a deployment pattern registry for deployment configuration information about the particular deployment pattern; test deployment capabilities for the particular deployment pattern by: verifying installation files for the particular deployment pattern are accessible; identifying one or more candidate deployment components for a hypothetical deployment of the particular deployment pattern; installing, on the one or more candidate deployment components, a virtual machine that is configured to test computing resources of the one or more candidate deployment components; and deleting the virtual machine in response to receiving test results regarding the resources of the one or more candidate deployment components. The system can generate a notification in response to detecting a failure in the testing.
US09329980B2	Security alerting using n-gram analysis of program execution data N-grams of input streams or functions executed by an application may be analyzed to identify security breaches or other anomalous behavior. A histogram of n-grams representing sequences of executed functions or input streams may be generated through baseline testing or production use. An alerting system may compare real time n-gram observations to the histogram of n-grams to identify security breaches or other changes in application behavior that may be anomalous. An alert may be generated that identifies the anomalous behavior. The alerting system may be trained using known good datasets and may identify deviations as bad behavior. The alerting system may be trained using known bad datasets and may identify matching behavior as bad behavior.
US09329979B2	Derivation of generalized test cases A first computer receives a first and a second test sample. The first computer executes the first and second test sample. The first computer determines that the value exposed by a first parameter in the second test sample is different from the value exposed by the first parameter in first test sample. The first computer creates a first value driven equivalence class. The first computer determines the value exposed by the second parameter in the second test sample is different from the value exposed by the second parameter in the first test sample and the value exposed by the second parameter in the second test sample is equivalent to the value exposed by the first parameter in the second test sample. The first computer adds the second parameter to the first value driven equivalence class and creates a generalized test case, including at least the first value driven equivalence class.
US09329974B2	Technologies for determining binary loop trip count using dynamic binary instrumentation Technologies for binary loop trip count computation include a computing device that dynamically instruments binary code, executes the instrumented code, and records execution statistics during execution of the instrumented code. The computing device may instrument only instructions affecting local control flow within functions of the binary code. The computing device may combine execution statistics from multiple threads or process instances of the binary code. After completing execution of the instrumented code, the computing device generates a control flow graph indicative of control flow of the binary code and recursively detects binary loops within the binary code. The computing device calculates a trip count for reach detected binary loop using the recorded execution statistics. Other embodiments are described and claimed.
US09329971B2	Performance analysis system for analyzing inter-thread communications to enhance performance in multithreaded system Systems and methods for enhancing performance in a multithreaded computing system are provided. The method comprises receiving a plurality of values associated with a performance characteristic common to a plurality of threads; clusterizing the plurality of threads based on the performance characteristic; analyzing an inter-thread communication between the plurality of threads for identifying a plurality of threads adversely affecting the performance of different parts of the multithreaded program; calculating a performance factor corresponding to the performance characteristic to determine a type of performance improvement activity to be performed on the plurality of threads.
US09329970B2	Selecting an operator graph configuration for a stream-based computing application First and second simulated processing of a stream-based computing application using respective first and second simulation conditions may be performed. The first and second simulation conditions may specify first and second operator graph configurations. Each simulated processing may include inputting a stream of test tuples to the stream-based computing application, which may operate on one or more compute nodes. Each compute node may have one or more computer processors and a memory to store one or more processing elements. Each simulated processing may be monitored to determine one or more performance metrics. The first and second simulated processings may be sorted based on a first performance metric to identify a simulated processing having a first rank. An operator graph configuration associated with the simulated processing having the first rank may be selected if the first performance metric for the simulated processing having the first rank is within a processing constraint.
US09329968B2	Testing application performance using virtual machines created from the same image on different hardware platforms A virtual benchmarking module generates a first virtual machine and a second virtual machine from a preconfigured image of a computing system. The virtual benchmarking module runs the first virtual machine on a first hardware platform and causes a benchmark program to be executed on the first virtual machine to measure a performance level of a first computer application program. The virtual benchmarking module runs the second virtual machine on a second hardware platform and causes the benchmark program to be executed on the second virtual machine to measure a performance level of a second computer application program. The virtual benchmarking module compares the performance levels of the first and second computer application programs, where the virtual machines counteract an effect of a difference between the first and second hardware platforms on the performance levels.
US09329966B2	Facilitating user support of electronic devices using matrix codes An electronic device detects occurrence of an error condition and selects a matrix code to include in an error message to transmit to a display device based on the error condition. A reader device decodes the displayed matrix code to present information regarding resolution of the error condition. The electronic device may select the matrix code by looking up the error condition in a table or by dynamically generate the matrix code. In various implementations, the electronic device may determine that the information regarding resolution of the error condition has been utilized to unsuccessfully resolve the error condition. If so, the electronic device may select and transmit and additional matrix code that may be decoded by the reader device to access and present an additional set of information regarding resolution of the error condition or to initiate an electronic device support request.
US09329962B2	System and methods for automated testing of functionally complex systems A system for automated testing of functionally complex systems prior to placing them into production, comprising a test manager module operating on a server computer, a test data storage subsystem coupled to the test manager module and adapted to store at least test results, a test execution module operating on a server computer, and a test analysis module operating on a server computer and adapted to receive test data from the test data storage subsystem. The test manager module causes tests to be executed by the test execution engine, and on detection of an anomalous test result, the test manager module at least causes additional testing to be performed and causes the test analysis module to analyze the results of at least some of the additional testing in order to isolate at least one component exhibiting anomalous behavior.
US09329956B2	Retrieving diagnostics information in an N-way clustered RAID subsystem A method and system for reading exception data by a storage server from a storage controller. An exception event is detected at the storage server. The storage server registers with the controller, such that only one storage server can read the exception data at a time. If the storage server is registered with the controller, the storage server reads the exception data. If the storage server does not successfully register with the controller, the controller keeps track of which storage servers have not read the exception data, to ensure that all storage servers can read the data.
US09329955B2	System and method for detecting problematic data storage nodes A method for maintaining a data storage system is disclosed. The method may include monitoring for receipt of a first broadcast message from a first data storage node, where the first broadcast message may indicate that the first data storage node is operating correctly. The method may also include detecting that the first data storage node is malfunctioning based on not receiving the first broadcast message for a predetermined period of time. The method may also include initiating a data replication procedure based on detecting that the first data storage node is malfunctioning. The data replication procedure may include sending a first multicast message to a plurality of data storage nodes requesting identification of a second data storage node that maintains a copy of a file stored on the first data storage node.
US09329952B2	Reducing application downtime during failover Reducing application downtime during failover including identifying a critical line in the startup of an application, the critical line comprising the point in the startup of the application in which the application begins to use dependent resources; checkpointing the application at the critical line of startup; identifying a failure in the application; and restarting the application from the checkpointed application at the critical line.
US09329950B2	Efficient fail-over in replicated systems A method for selecting a leader node among a plurality of network nodes, comprising: providing a current configuration of selected nodes in replicated state machine based system, wherein a first node is set for handling commands received from clients; executing a consensus protocol by the selected nodes under the current configuration; identifying at least one fault indicative event of the first node; calculating a suggested configuration of selected nodes, wherein a second node is set for handling the commands; informing each member of the suggested configuration and the first node of the suggested configuration; executing the consensus protocol in parallel under both the suggested configuration and the current configuration; and when detecting that the first node is faulty, setting the second node for handling the commands under the current configuration in place of the first node and reconfiguring the current configuration to become the suggested configuration.
US09329947B2	Resuming a paused virtual machine without restarting the virtual machine A computing device executing a virtualization manager detects that a virtual machine running on a host has been paused. While the virtual machine is paused, no processor cycles are assigned to the virtual machine. The computing device determines whether a condition that caused the virtual machine to be paused has been resolved. If the condition has been resolved, the computing device causes the virtual machine to be resumed. Resuming the virtual machine includes assigning processor cycles to the virtual machine and performing a last input/output operation that was attempted prior to the virtual machine being paused.
US09329940B2	Dispersed storage having a plurality of snapshot paths and methods for use therewith A directory file includes a plurality of entries, wherein an entry of the plurality of entries includes a file or directory name field, and a snapshot list field that includes a snapshot list in accordance with one of a plurality of snapshot paths of a snapshot tree. A new snapshot identifier (ID) is determined for a data file. The directory file is updated to produce an updated directory file, wherein the updating includes updating the snapshot list field associated with the data file to include the new snapshot ID in the snapshot list in accordance with the one of a plurality of snapshot paths of the snapshot tree.
US09329938B2	Essential metadata replication Methods, apparatus and computer program products implement embodiments of the present invention that include defining, in a storage system including receiving, by a storage system, a storage request, and identifying, based on the storage request, one or more storage management units. For each of the storage management units, a master partition table having multiple master entries and one or more backup partition tables is identified, each of the backup partition tables having backup entries in a one-to-one-correspondence with the master entries. The storage request is performed, and upon the storage request being performed, any changes to essential metadata in the one or more master partition tables are identified, and the identified changes are stored to the essential metadata in the one or more backup partition tables.
US09329927B2	Semiconductor device A semiconductor device comprising: a first processor; a second processor; a first delay circuit delaying a signal input into the first processor by a predefined number of cycles and inputting the signal into the second processor; a first compression circuit compressing a signal of n-bit width from the first processor into a signal of m-bit width (m
US09329926B1	Overlapping data integrity for semiconductor devices A data integrity (DI) protection circuit and method provide overlapping DI protection without increasing memory requirements. Write data parity is checked after write data error correcting code (ECC) check bits are generated, which is stored with the write data in memory without storing the write data parity. A corrupt location cache stores the write address and a write response error is generated when a write data parity error or write address parity error is detected. Read data and read data ECC check bits retrieved from the memory are checked and single bit errors are corrected, while double-bit errors result in a read error response. Read data parity is generated, and the corrected read data and corrected read data ECC check bits are then checked for bit errors. The corrupt location cache is searched for the read address, and a cache hit results in a read error response.
US09329924B2	Monitoring system and monitoring program A monitoring system performs cause analysis of an event occurring in any of a plurality of monitoring-target objects to be monitored based on a rule. In this case, the monitoring system makes a detection during the analysis time width and determines a plurality of conclusions based on an event corresponding to the condition for determining the conclusion. Moreover, the monitoring system performs one or more of (A) displaying change of certainty to be used for determination of a conclusion in a case where the analysis time width is assumed to be changed, (B) performing sort display of the determined conclusion based on an index value showing an affected range and (C) calculating the analysis time width based on the index value.
US09329922B1	Defect analysis based upon hardware state changes Technologies are described herein for performing a defect analysis on a software component based upon collected data that describes the operational state of hardware devices in an execution environment utilized to execute the software component at different points in time. The hardware state data is collected from the hardware devices in the execution environment at different points in time and stored in a version control system. A defect analysis may then be performed for an issue identified in the software component utilizing the hardware state data stored in the version control system. Based upon the results of the defect analysis, one or more actions may be taken such as, but not limited to, rolling the hardware or software configuration of one or more of the hardware devices in the execution environment back to a previous point in time.

1 2 3 4 5 6 7 8 9 10