| Document | Document Title |
|---|---|
| US11418218B2 |
Receiving device and receiving method
A decoding device that includes a decoding determination unit to determine a procedure of recovering and decoding missing packets in consideration of a packet missing pattern in data including a set of media packets and redundant packets generated by a two-dimensional XOR-based FEC encoding method. Further, a decoding unit executes the recovery of the missing packets according to the procedure determined by the decoding determination unit. |
| US11418216B2 |
Method and system for generating parity check matrix for low-density parity check codes
A system for generating a parity check matrix for low-density parity-check (LDPC) codes includes a memory and a processing circuitry that retrieves a base matrix from the memory. The base matrix represents sets of valid and invalid positions for a set of circulant matrices. The processing circuitry determines a value for each valid position based on a heuristic function. The value for each valid position indicates a corresponding circulant matrix of the set of circulant matrices. The processing circuitry replaces each valid position with the corresponding circulant matrix based on the determined value, and each invalid position with a null matrix, to generate the parity check matrix. The parity check matrix thus generated has a high girth and equal distribution of cycles within the parity check matrix. |
| US11418215B2 |
Electronic device and method of operating the same
The present technology includes an electronic device and a method of operating the same using an artificial neural network. The electronic device according to the present technology includes a decoding controller inputting a primary syndrome vector generated based on a read vector and a parity check matrix to a trained artificial neural, and selecting any one of a first error correction decoding algorithm and a second error correction decoding algorithm based on an output of the trained artificial neural network corresponding to the input, and an error correction decoder performing error correction decoding on a read vector using the selected error correction decoding algorithm. The output of the trained artificial neural network includes a first predicted value indicating a probability that a first error correction decoding using the first error correction decoding algorithm is successful. |
| US11418213B2 |
Reducing error in data compression
Systems and methods are provided for reducing error in data compression and decompression when data is transmitted over low bandwidth communication links, such as satellite links. Embodiments of the present disclosure provide systems and methods for variable block size compression for gridded data, efficiently storing null values in gridded data, and eliminating growth of error in compressed time series data. |
| US11418207B1 |
Analog-to-digital converter device equipped with conversion suspension function, and operation method thereof
An analog-to-digital converter (ADC) device equipped with a conversion suspension function and an associated operation method thereof are provided. The ADC device includes: an interleaved clock controller, arranged to generate a first clock signal and a second clock signal according to a master clock signal; and a multi-ADC circuit, coupled to the interleaved clock controller, arranged to perform analog-to-digital conversion. The multi-ADC circuit includes a first ADC and a second ADC, wherein the first ADC performs sampling and conversion operations according to the first clock signal, and the second ADC performs sampling and conversion operations according to the second clock signal. Based on the timing control of the first clock signal and the second clock signal, when any ADC of the first ADC and the second ADC is performing a sampling operation, the other ADC of the first ADC and the second ADC suspends conversion. |
| US11418205B1 |
System and method of FN-PLL with multi modulus divider
In accordance with an embodiment, a method of operating a fractional-N phase locked loop (FN-PLL) includes: dividing a first clock signal using a multi-modulus divider (MMD) based on a modulus control signal to form a frequency-divided clock signal, where the first clock signal is based on an output clock of the PLL; generating the modulus control signal based on a divider control input value using a delta-sigma modulator (DSM); and when a fractional portion of the divider control input value is within a first range of values, and repeatedly removing a first number of clock cycles from the first clock signal before dividing the first clock signal using the MMD, where the first number of clock cycles is a non-integer number of clock cycles. |
| US11418204B2 |
Phase lock loop (PLL) with operating parameter calibration circuit and method
A calibration scheme is used to control PLL bandwidth and contain its spread. In open loop, the VCO control voltage is swept over a range of values and VCO output frequency is measured at each control voltage level. The gain KVCO is determined for each measured output frequency and a corresponding current magnitude for the variable magnitude charge pump is calculated from a ratio of a constant to the gain KVCO and correlated in a look-up table to the measured output frequency. Once calibration is completed, the PLL loop is closed and a calculated current magnitude is fetched from the look-up table based on a desired output frequency for the PLL circuit. The variable magnitude charge pump circuit is then controlled to generate a charge pump current with a magnitude corresponding to the fetched charge pump current magnitude. |
| US11418199B1 |
Phase locked loop with parallel phase detection circuits
In accordance with an embodiment, a method of operating a phase locked loop (PLL), the method including: comparing a phase of a reference signal with a phase of a clock signal using a plurality of parallel matched phase detection circuits to provide a plurality of phase detection signals, where each of the plurality of the parallel matched phase detection circuits is configured to have a same phase difference to output characteristic; filtering a sum of the plurality of phase detection signals to form a filtered phase detection signal; and controlling a frequency of an oscillator using the filtered phase detection signal, where the oscillator is configured to provide the clock signal. |
| US11418196B2 |
Method and apparatus for dynamic routing using heterogeneous and disjoint networks
Described are concepts related to the field of programmable interconnect substrates used in packaging electronics, and to stacked integrated circuits produced for application in low power and small form factor designs with fast prototyping and short mass-production cycle times. The concepts facilitate the dynamic reconfiguration of routing resources in the presence of an active system, and the tuning of routing paths to meet power and performance metrics. |
| US11418195B1 |
Voltage power switch
A voltage power switch includes circuitry configured to output a known voltage. The voltage power switch includes a lock circuit configured to output a known state and a voltage level shifter configured to receive an input, the input being based on the known state output by the lock circuit. The voltage power switch, using an output circuit, is configured to output a known voltage level based on an output of the voltage level shifter, wherein the known voltage is one of a high voltage VHI for a fuse programing period or a first non-zero intermediate voltage VMID1 for a non-fuse programming period. |
| US11418193B2 |
Key unit and keyboard using the same
A key unit and a keyboard using the same are provided. The key unit includes a circuit board, an elastic element, a keycap, and a processing circuit. The circuit board includes a capacitance sensing circuit embedded therein, and the capacitance sensing circuit includes a pair of sensor electrodes. The elastic element is disposed on the circuit board. The keycap is moveably disposed above and spaced apart from the circuit board. The elastic element is disposed between the keycap and the circuit board so that the keycap moves between a non-depressed position and a depressed position with respect to the circuit board. The processing circuit is electrically connected to the pair of sensor electrodes to obtain a variation of a coupling capacitance between the pair of sensor electrodes and to determine whether the keycap is touched or depressed according to the variation of coupling capacitance. |
| US11418192B2 |
Push button switch assembly for a vehicle
A push button switch assembly for a vehicle includes a housing having a plurality of walls that collectively define an inner space, and an elastic button that is moveable between a first unactuated position and a second unactuated position. A plate is positioned in the housing and an actuator is pivotable between a first position and a second position. The actuator includes a magnetic element. When the elastic button is in the first unactuated position, the magnetic element biases the actuator into the first position, and when the elastic button is moved to the section actuated position, a force applied to the elastic button is transmitted to the actuator to pivot the actuator to the second position. |
| US11418191B2 |
Multiple controllers for a capacitive sensing device
A capacitive sensing device can include multiple capacitive sensors. A first device controller is operatively connected to a portion of the capacitive sensors, while a second device controller is operatively connected to another portion of capacitive sensors. A common node or shield can be connected between the first device controller and the second device controller. Charging and discharging events of selected drive lines in the capacitive sensing device and/or of the common node or shield can be synchronized to reduce undesirable effects such as noise and/or to prevent the charging events and the discharging events from overlapping with each other. One or more reference capacitive sensors can be shared by the multiple device controllers. |
| US11418189B2 |
High voltage output circuit with low voltage devices using data dependent dynamic biasing
A driver circuit drives a high voltage I/O interface using stacked low voltage devices in the pull-up and pull-down portions of the driver. The transistor closest to the PAD in the pull-up portion receives a dynamically adjusted gate bias voltage adjusted based on the value of the data supplied to the output circuit and the transistor in the pull-down portion closest to the PAD receives the same dynamically adjusted gate bias voltage. The transistors closest to the power supply nodes receive gate voltages that are level shifted from the core voltage levels of the data supplied to the output circuit. The transistors in the middle of the pull-up and pull-down transistor stacks receive respective static gate voltages. The bias voltages are selected such that the gate-drain, source-drain, and gate-source voltages of the transistors in the output circuit do not exceed the voltage tolerance levels of the low voltage devices. |
| US11418185B2 |
Switches with main-auxiliary field-effect transistor configurations
Disclosed herein are switching or other active FET configurations that implement a branch design with one or more interior FETs of a main path coupled in parallel with one or more auxiliary FETs of an auxiliary path. Such designs include a circuit assembly for performing a switching function that includes a branch with a plurality of auxiliary FETs coupled in series and a main FET coupled in parallel with an interior FET of the plurality of auxiliary FETs. The body nodes of the FETs can be interconnected and/or connected to a body bias network. The body nodes of the FETs can be connected to body bias networks to enable individual body bias voltages to be used for individual or groups of FETs. |
| US11418181B2 |
Switch turn-off circuit
Aspects of the present disclosure provide for a circuit comprising a switch coupled between a first node and a second node, a first transistor having a gate terminal, a drain terminal coupled to the second node, and a source terminal coupled to a ground terminal, a logic gate having a first input, a second input coupled to a third node, and an output coupled to the gate terminal of the first transistor, and a comparator having a first input coupled to the second node, a second input coupled to a fourth node, and an output coupled to the first input of the logic gate. |
| US11418180B2 |
Equalizer and communication module using the same
An equalizer has a first tapped delay line in which N taps (N is a positive integer) are connected in cascade, a second tapped delay line having one tap and connected in parallel with the first tapped delay line, a first multiplier configured to multiply signals extracted from the N taps by corresponding coefficients, a second multiplier configured to multiply a signal output from the second tapped delay line by a second coefficient, and an adder configured to add products of the first multiplier and a product of the second multiplier. The first tapped delay line has a fixed delay, and the second tapped delay line has a variable delay changeable at a 1/M resolution of the fixed delay, where M is a number greater than 1. |
| US11418178B2 |
Analog beamformer
An analog beamformer includes: an input circuit configured to receive an input signal to generate a first input signal having the same phase as the input signal and a second input signal having a phase difference corresponding to a first phase with respect to the input signal; a first delay circuit configured to delay the first input signal to output a first delayed signal; a second delay circuit configured to delay the second input signal to output a second delayed signal; and an output circuit configured to output an output signal by summing the first delayed signal and the second delayed signal, wherein a first write signal has the phase difference corresponding to the first phase with respect to a second write signal, and a first read signal has the phase difference corresponding to the first phase with respect to a second read signal. |
| US11418174B2 |
Efficient retention flop utilizing different voltage domain
A system and method for efficiently retaining data in sequential elements during power down modes. In various embodiments, a master latch of a flip-flop circuit receives an always-on first power supply voltage, whereas, a slave latch and other surrounding circuitry receives a second power supply voltage capable of being powered down. During a power down mode, circuitry consumes less power while the master latch retains stored data. In some designs, the flip-flop circuit is a level shifting circuit, and the always-on first power supply voltage is less than the second power supply voltage. The master latch uses complex gates with a p-type transistor at the top of a stack of p-type transistors receiving the always-on power supply voltage level on its source terminal and the retained data value on its gate terminal. This top p-type transistor is capable of remaining disabled even when used in a level shifting manner. |
| US11418173B2 |
Hybrid pulse/two-stage data latch
An apparatus includes a control circuit configured to selectively activate, based on an operating mode signal, either a local clock signal or a pulse signal. The apparatus further includes a data storage circuit that is coupled to a data signal, the local clock signal, and the pulse signal. The data storage circuit may be configured to sample the data signal using the local clock signal during a first operating mode, and to sample the data signal using the pulse signal during a second operating mode. |
| US11418172B2 |
Two-terminal protective device using parasitic energy harvesting
A two-terminal electrical protective device operates by harvesting energy from a small but non-zero voltage drop across a closed solid-state switch. From a default, open-circuit state, the device is remotely triggered by an AC signal to enter the desired conductive state. Power scavenged by an energy harvesting circuit while the device is in the conductive state, powers a gate drive circuit to hold the device in the conductive state for as long as current flows. When current stops, the device returns to the default open-circuit state. |
| US11418171B2 |
Low power consumption switching circuit with voltage isolation function for PMOS transistor bulk, and integrated chip
Disclosed is a low power consumption switching circuit with voltage isolation function for a PMOS transistor bulk, including a bulk voltage switching control unit, a bulk voltage switching unit, a first voltage input terminal, a second voltage input terminal, and a bulk voltage output terminal. The bulk voltage switching control unit includes a plurality of PMOS transistors and weak pull-down devices, and is configured to generate a control signal to control the bulk voltage switching unit to make the bulk voltage output terminal to be connected to a higher potential between the first voltage input terminal and the second voltage input terminal. The bulk voltage switching unit includes a plurality of PMOS transistors, and is configured to connect bulks of the PMOS transistors to the higher potential between the first voltage input terminal and the second voltage input terminal. Each of the PMOS transistors is a low-withstand-voltage device. |
| US11418167B2 |
Transversely-excited film bulk acoustic resonator with multi-pitch interdigital transducer
There are disclosed acoustic resonators and methods of fabricating acoustic resonators. An acoustic resonator includes a piezoelectric plate having front and back surfaces, the back surface facing a substrate. A portion of the piezoelectric plate forms a diaphragm spanning a cavity in the substrate. A conductor pattern on the front surface includes a multi-pitch interdigital transducer (IDT) with interleaved fingers of the IDT on the diaphragm. |
| US11418165B2 |
Matching networks, inductors, and coupled-inductor capacitive wireless power transfer circuit and related techniques
In one implementation, a matching network is provided comprising a pair of input terminals; a pair of output terminals; and at least two reactive components disposed between the pair of input terminals and the pair of output terminals. At least one of the reactive components comprises a coupled-inductor. In various implementations, the second reactive component can be a capacitor, and the capacitor can be at least partially realized using the parasitic capacitances of the environment. The matching network may be disposed in a capacitive wireless power transfer (WPT) system. In other implementations, inductors and coupled-inductors are further provided. In some implementations, for example, an inductor, such as but not limited to a coupled-inductor, may comprise a toroidal or semi-toroidal core comprising foil wire interleaved without notches. |
| US11418161B2 |
Transconductance amplifier circuitry
A digital to analog converter (DAC) can include a current mode DAC to receive an OC word from digital logic indicating an amount of current to add to or remove from sources of respective transistors of an amplifier and generate a current based on the OC word, an active output stage including a positive current mirror and a negative current mirror to generate a positive current and a negative current based on at least a portion of the generated current, and a plurality of outputs including a plurality of sink outputs and a plurality of source outputs to provide the positive and negative currents to the sources of the respective transistors. |
| US11418159B2 |
Differential signal offset adjustment circuit and differential system
The present invention provides a differential signal offset adjustment circuit, wherein first and second transistors are respectively coupled between a power supply line and a first current source, and between the power supply line and a second current source. First and second resistors are respectively coupled between the first transistor and a first variable current source, and between the second transistor and a second variable current source. Third and fourth transistors are respectively coupled between a third resistor and a third current source, and between a fourth resistor and a fourth current source, and have input terminals respectively coupled to the first and second resistors. Fifth and sixth transistors are respectively coupled between the power supply line and a fifth current source, and between the power supply line and a sixth current source, and have input terminals respectively coupled to the third and fourth transistors. A fifth resistor is coupled between the third and fourth current sources. |
| US11418155B2 |
Digital hybrid mode power amplifier system
A RF-digital hybrid mode power amplifier system for achieving high efficiency and high linearity in wideband communication systems is disclosed. The present invention is based on the method of adaptive digital predistortion to linearize a power amplifier in the RF domain. The power amplifier characteristics such as variation of linearity and asymmetric distortion of the amplifier output signal are monitored by the narrowband feedback path and controlled by the adaptation algorithm in a digital module. Therefore, the present invention could compensate the nonlinearities as well as memory effects of the power amplifier systems and also improve performances, in terms of power added efficiency, adjacent channel leakage ratio and peak-to-average power ratio. The present disclosure enables a power amplifier system to be field reconfigurable and support multi-modulation schemes (modulation agnostic), multi-carriers and multi-channels. As a result, the digital hybrid mode power amplifier system is particularly suitable for wireless transmission systems, such as base-stations, repeaters, and indoor signal coverage systems, where baseband I-Q signal information is not readily available. |
| US11418154B1 |
Biasing technique for an operational amplifier
A circuit includes first through fourth transistors and a device. The first transistor has a control input and first and second current terminals. The control input provides a first input to the circuit. The second transistor has a control input and first and second current terminals. The control input provides a second input to the circuit. The third transistor has a control input and first and second current terminals. The fourth transistor has a control input and first and second current terminals. The second current terminal of the fourth transistor is coupled to the second current terminal of the third transistor, and the control input of the fourth transistor is coupled to the first current terminals of the first and second transistors. The device is configured to provide a fixed voltage to the control input of the third transistor. |
| US11418153B2 |
Amplifier circuits
This application relates to amplifier circuitry and, in particular, to class-D amplifier circuits. The application describes amplifier circuitry (400) for receiving an input signal (Sin) and generating first and second driving signals (SoutP, SoutN) for driving a bridge-tied-load. The amplifier circuitry includes first and second class-D output stages (403p, 403n) for generating the first and second driving signals based on the input signal. A controller (406) controllably varies a common-mode component of the first and second driving signals based on an indication of amplitude of the first and second driving signals. The controller varies the common-mode component, at lower signal amplitudes, so the common-mode level of the first and second driving signals is moved away from an operating region that leads to distortion. |
| US11418147B2 |
Integrated photovoltaic cable and manufacturing method thereof
An integrated photovoltaic cable having a connecting terminal and a housing injection-molded on the connecting terminal. The connecting terminal has a connecting sheet, a through hole, and a plurality of U-shape groove sheets. Exposed conductors obtained by peeling front ends of the photovoltaic cable are respectively placed into corresponding U-shape groove sheets and crimped by a crimping plier. A manufacturing method for manufacturing the integrated photovoltaic cable includes three steps of manufacturing a connecting terminal, crimping photovoltaic wires, and injection molding a housing. An improvement of the cable connecting structure simplifies the production, improves the connecting quality, and reduces a volume of an adapter. The conductor end and the U-shape groove are firmly and conveniently connected to ensure the connection quality, reduce a contact resistance of a connecting wire, and cause a smaller volume of the adapter. |
| US11418146B2 |
Electrical connection device for a photovoltaic system
An electrical connection box for connecting a panel of exterior cladding of a building, the connection box including a first shell and a second shell which are interlockable, the first shell including a base including one aperture topped by a sealing chamber, a lateral wall surrounding the base and extending perpendicularly to it, the lateral wall including a removable hatch, removable to expose a wire passage, an electrical terminal connected to the base, with the axis perpendicular to the base; the second shell including a base, a lateral wall surrounding the base and extending perpendicularly to it, the lateral wall including a wire passage, an electrical terminal of inverse polarity to that of the electrical terminal of the first shell, the electrical terminal having an axis perpendicular to the base, connected to the base and positioned in such a way that it is plumb with the electrical terminal of the first shell when the first and the second shell are interlocked. |
| US11418144B1 |
Deployable solar panels for high-altitude balloons
Aspects of the disclosure relate to high altitude or stratospheric balloon systems. For instance, a stratospheric balloon system may include a an upper structure, a lower structure, a platform associated with the lower structure, a stack of solar panels positioned on the platform, each solar panel coupled to an adjacent solar panel, at least one tension element connected, at a first end thereof, to the upper structure and, at a second end thereof, to the platform, and a first flexible tension member coupled, at a first end thereof, to the upper structure and to foremost solar panel of the stack of solar panels. Solar panels may be stacked in a “Z-fold” configuration with either solar cells of the adjacent solar panels facing one another or the frames of the adjacent solar panels facing one another. In this configuration, the adjacent solar panels are connected by a hinge system. |
| US11418140B2 |
Induction motor flux and torque control
An induction motor controller is provided. The induction motor controller includes a first module that derives a commanded stator voltage vector, in a rotor flux reference frame, via a rotor flux regulator loop and a torque regulator loop, which process at least partially in the rotor flux reference frame. The induction motor controller includes a second module that processes the commanded stator voltage vector to produce AC (alternating current) power for an induction motor. |
| US11418139B2 |
Signal detection method, corresponding circuit, device and system
In an embodiment a method includes: sensing a first signal indicative of magnetization of a winding in a dynamoelectric machine; applying the first signal to a window comparator having a comparator window between upper and lower thresholds and generating window exit signals indicative of the first signal exiting the comparator window of the window comparator; generating a slowed-down replica signal of the first signal; updating the comparator window of the window comparator as a function of the slowed-down replica signal; and issuing a wake-up signal towards a control device of the dynamoelectric machine as a result of one of the window exit signals indicating the first signal exiting the comparator window of the window comparator for a time duration in excess of a duration threshold. |
| US11418136B2 |
Electric compressor, motor control method, and non-transitory computer-readable medium
A motor control device provided with a control unit which controls the number of rotations of a motor by implementing a first control which enables high-torque and precise control, or a second control enabling more efficient control than the first control with respect to the motor; and a switching determination unit which, if an actual measurement value of the number of rotations of the motor is greater than a prescribed threshold value of the number of rotations, switches the first control to the second control. The switching determination unit further switches the first control to the second control if the actual measurement value of the number of rotations is not more than the threshold value of the number of rotations, and when a prescribed time has passed from a point in time at which the actual measurement value of the number of rotations matched the required number of rotations. |
| US11418133B2 |
System and method to control slip-stick stages
A system to control slip-stick stages that includes a slip-stick stage including an actuator and a processor coupled to the actuator to obtain a frequency, a number of measurement samples, and a voltage; determine a time period based on the number of measurement samples and the frequency; sample a displacement of the actuator during the time period. The system functions to calculate an error value based on the displacement and a reference position; determine a step value based on the error value and a modulation protocol. The modulation protocol includes a proportional modulation protocol or a proportional-integral modulation protocol to generate a control signal based on the step value, the frequency and the voltage based on an integral of a function of voltage and a Heaviside function according to a direction specified by a sign of the step value; and transmit the control signal to the actuator. |
| US11418129B2 |
Providing positional awareness information and increasing power quality of parallel connected inverters
A method and a system sense at least one phase difference between at least two phases of a group of parallel connected three phase AC output terminals (e.g., a first phase AC output terminal, a second phase AC output terminal, or a third phase AC output terminal). The parallel connected AC output terminals may be three parallel connected DC to AC three phase inverters. Features of the parallel connected three phase AC output terminals enable wiring of conductors to one phase of an AC output terminal to be swapped with wiring of conductors of one phase of another phase AC output terminal. A sign of at least one phase difference is verified different from signs of other phase differences thereby the system determining the lateral position of the at least one three phase inverters relative to at least one other of the three phase inverters. |
| US11418126B2 |
Inrush current suppression device and motor drive device
An inrush current suppression device is an inrush current suppression device that suppresses an inrush current flowing from a DC power supply through a mechanical switch, and includes: a first capacitor having one end connected to a positive terminal of the DC power supply through the mechanical switch; a semiconductor switching element connected to the other end of the first capacitor and a negative terminal of DC power supply between the other end of the first capacitor and the negative terminal of the DC power supply; a resistance element connected in parallel to the semiconductor switching element; and a control circuit for controlling the semiconductor switching element. The control circuit has a first output port, and controls ON time and OFF time of the semiconductor switching element by outputting a PWM signal from the first output port to the semiconductor switching element after the mechanical switch is closed. |
| US11418109B2 |
Multi-channel cinema amplifier with power-sharing, messaging and multi-phase power supply
An integrated cinema amplifier comprises a power supply stage that distributes power over a plurality of channels for rendering immersive audio content in a surround sound listening environment. The amplifier automatically detects maximum and net power availability and requirements based on audio content by decoding audio metadata and dynamically adjusts gains to each channel or sets of channels based on content and operational/environmental conditions. A power supply stage provides power to drive a plurality of channels corresponding to speaker feeds to a plurality of speakers. The amplifier has a front panel having an LED array with each LED associated with a respective channel or group of channels of the multi-channel amplifier, and a control unit configured to light the LEDs according to display patterns based on operating status or error conditions of the amplifier. |
| US11418108B2 |
Output voltage protection from primary side while initiating secondary side controller of AC-DC converter
A system includes a transformer having a primary winding and an auxiliary winding at a primary side of an AC-DC converter, the auxiliary winding reflecting an output voltage of a secondary winding of the transformer. A primary side controller includes an over-voltage protection (OVP) pin and an OVP circuit. A voltage divider includes a first resistor coupled between the auxiliary winding and the OVP pin and a second resistor coupled between the first resistor and a ground. The voltage divider provides, to OVP pin, a reduced voltage that is proportional to the output voltage. In absence of a pulse signal from a secondary side controller, the OVP circuit turns off a gate driver that drives a primary switch in response to the OVP voltage exceeding a reference OVP voltage. The primary switch is coupled between the primary winding of the transformer and the ground. |
| US11418106B2 |
Apparatus for conversion between AC power and DC power
An apparatus for conversion between AC power and DC power. The apparatus includes: a first power conversion circuit having a first AC side and a DC side, at least one second power conversion circuit each having a second AC side and sharing the DC side with the first power conversion circuit, and at least one choke having a first terminal, a second terminal and at least one third terminal, wherein: the first terminal is arranged to be electrically coupled to a phase of the AC power, and the second terminal and the at least one third terminal are electrically coupled to respective same phases of the first AC side of the first power conversion circuit and the second AC side of the at least one second power conversion circuit. Moreover, the choke includes: a first common-mode choke and a first differential-mode choke, wherein: the first common-mode choke and the first differential-mode choke are electrically coupled in series via a first group of coil ends of the first common-mode choke and a first group of coil ends of the first differential-mode choke, and a second group of coil ends of one of the first common-mode choke and the first differential-mode choke are electrically coupled to the first terminal of the choke, and a second group of coil ends of the other are respectively electrically coupled to the second terminal and the at least one third terminal of the choke. The first common-mode choke can help provide high inductance to the high-frequency components of the common-mode current, which flows from the AC power source, since the impedance of the common-mode choke and the differential-mode choke depends on frequency on the same scale as inductance. The advantages of using the common-mode choke is that it provides twice the inductance of separate inductor design due to the coupling effect. Therefore it filters the common-mode current more effectively on the inductance size can be reduced for a given current ripple requirement. |
| US11418100B2 |
Haptic actuator having a double-wound driving coil for temperature-independent velocity sensing
A haptic engine includes a linear resonant actuator having a double-wound driving coil which is used for sensing a back electromotive force (EMF) voltage independently of the coil resistance, thus minimizing the back EMF voltage's sensitivity to temperature. |
| US11418094B2 |
Electric tool
Providing an electric tool with excellent cooling efficiency. An electric tool includes: a housing 2; a motor 3; a fan 34; a sensing portion 41; a switching portion 42; and a circuit board 40. The motor 3 is accommodated in the housing 2. The motor 3 includes a stator 33, a rotor 32, and a rotating shaft 31. The rotor 32 is rotatable relative to the stator 33. The rotating shaft 31 is rotatable together with the rotor 32. The fan 34 is configured to generate a cooling air flow inside the housing 2. The sensing portion 41 is configured to detect a rotated position of the rotor 32. The switching portion 41 controls a rotation of the rotor 32. The sensing portion 41 and the switching portion 42 are mounted on the circuit board 40. The stator 33, the fan 34, the sensing portion 41, the switching portion 42, and the circuit board 40 are arranged in the housing 2 along an axial direction of the rotor 32 in the order of the fan 34, the sensing portion 41, the circuit board 40, the switching portion 42, and the stator 33. |
| US11418085B2 |
Motor for electric power steering and sensing device
The present invention may provide a motor including a housing coupled to a first bearing, a stator disposed in the housing, a rotor disposed in the stator, and a shaft coupled to the rotor, wherein the housing includes a body and a first pocket formed to be bent from one side of the body toward an inner side of the housing, the first pocket includes an extended part bent from the one side of the body and a first support part bent from the extended part, the first pocket includes a first opening formed by one side of the extended part adjacent to the one side of the body and a second opening formed by the first support part, and a size of the first opening is greater than a size of the second opening. |
| US11418083B2 |
Motor
A motor includes a rotor including a shaft extending along a center axis in a lengthwise direction, the rotor being rotatable about the center axis, a stator opposite the rotor with a clearance between the stator and the rotor in a radial direction, and a housing accommodating the rotor and the stator. The housing includes a tubular portion extending along the center axis, and a bottom portion closing a lower opening of the tubular portion. The tubular portion includes, on its inner peripheral surface, a fitting portion fitted to the stator, and a tapered portion with a diameter gradually decreasing downward and located below the fitting portion. The tubular portion includes, in its outer peripheral surface, a recessed portion with an axial position overlapping the tapered portion and extending in a circumferential direction. |
| US11418082B2 |
Stator used for motor and method for manufacturing said stator
A stator used for a motor and having excellent vibration resistance, waterproofness, and an insulating property. The stator used for a motor includes a stator core having a plurality of teeth arranged at substantially equal intervals on a same circumference, and an insulator covering the teeth, and coil portions are formed by wires being winded around portions of the insulator that covers the plurality of teeth. The insulator includes first wall portions provided on the center axis side with respect to the coil portion, and molded portions formed, by resin, on the center axis side with respect to the first wall portions. Wire extended portions of the wire pulled out from the coil portion straddle the first wall portions. Wire terminal end portions are connected to bus rings. The bus rings are embedded in the molded portions. |
| US11418074B2 |
Rotary electrical machine with spoked rotor
A rotor assembly includes a rotor member and a plurality of permanent magnets. The rotor member has a hub with a central axis and a plurality of spokes extending radially outward relative to the hub. Each spoke has a radially inward end and a radially outward end. Each spoke also has a body section, a mounting section, and a flux barrier section. The body section extends from the radially outward end towards the radially inward end. The mounting section is interconnected to the hub. The flux barrier section is disposed between the body section and the mounting section and has at least one flux restriction web extending between the body section and the mounting section. The flux restriction web magnetically isolates the body section from the mounting section. A permanent magnet is disposed within each magnet-receiving slot between pairs of adjacent spokes. A motor with the rotor assembly is also disclosed. |
| US11418073B2 |
Rotor of an electric machine
A rotor of an electric machine, in particular an electric motor, comprising a rotor body which circumferentially surrounds a shaft, and with a plurality of magnets. Each of the magnets is in each case arranged within a radially extending pocket of the rotor body, and each of the pockets is connected by means of an axially extending slot, each with a radially inner chamber of the rotor body. An electric machine is also provided. |
| US11418072B2 |
Permanent magnet assisted synchronous reluctance motor and electric car having the same
The present disclosure provides a permanent magnet assisted synchronous reluctance motor and an electric car having the same. The permanent magnet assisted synchronous reluctance motor includes: a stator body, wherein a plurality of stator teeth are provided on an inner circumferential surface of the stator body, and a stator slot is formed between two adjacent stator teeth; a rotor body disposed within the stator body and opened with a group of permanent magnet slots, which include a plurality of permanent magnet slots, wherein a first end of at least one of the plurality of permanent magnet slots and an end of one of the plurality of stator teeth are arranged oppositely, and a second end of the permanent magnet slot and the stator slot formed by two adjacent stator teeth among remaining stator teeth are arranged oppositely. |
| US11418071B2 |
Rotating electrical machine with channel in stator slot walls
A rotating electrical machine includes a rotor, a stator core, coils, and insulating sheets. A discharge port that discharges coolant is provided on an outer circumferential face of the rotor. The stator core includes an annular or cylindrical yoke, and teeth disposed on an inner circumferential face of the yoke in a circumferential direction with spaces. The stator core is disposed encompassing an outer circumference of the rotor. A slot-wall-face channel is provided on a wall face of the stator core defining a slot, and configured to open as to the slot for the coolant to flow through. The coils are wound on the teeth. The insulating sheet is disposed in the slot and interposed between the stator core and the coil, and is configured with at least part of the slot-wall-face channel open as to the coil. |
| US11418070B2 |
Stator and rotary electric machine
Phase coils include a first phase coil and a second phase coil, the phase coils are configured by connecting together end portions of the coil terminals of the first phase coil and the second phase coil that extend outward from identical radial positions in the slots axially outside the stator core so as to be radially outside a coil end group, and the coil terminals of the first phase coils of the phase coils of three phases include joint coil portions that extend outward from the slots within a pitch of one magnetic pole, are then bent so as to extend in an identical circumferential direction, and are placed in close proximity to the end portions of the coil terminals of the second phase coils that are intended for connection therewith. |
| US11418068B2 |
Wireless power transmitters for transmitting power at extended separation distances utilizing T-Core shielding
A power transmitter is configured for transmission of wireless power, to a wireless receiver, at extended ranges, including a separation gap greater than 8 millimeters (mm). The power transmitter includes a control and communications unit and an inverter circuit configured to receive input power and convert the input power to a power signal. The power transmitter further includes a coil configured to transmit the power signal to a power receiver, the coil formed of wound Litz wire and including at least one layer, the coil defining, at least, a bottom face. The power transmitter further includes a shielding comprising a ferrite core and a magnetic backing, the magnetic backing configured to substantially back the bottom face of the coil. |
| US11418065B2 |
Portable wireless power charger with integrated wireless power receiving facilities
The technology described herein is directed to wireless power chargers with integrated power receiving facilities. Indeed, embodiments of the present disclosure describe systems, methods, and apparatuses for implementing wireless power chargers with integrated power receiving facilities. In some implementations, a portable wireless power charging apparatus is disclosed. The portable wireless power charging apparatus includes one or more antennas configured to wirelessly receive directed wireless power from a wireless power transmission system via a first radiative wireless power transfer technology in a multipath wireless power delivery environment. The portable wireless power charging apparatus further includes a wireless power receiver configured to convert the wireless power received via the first radiative wireless power transfer technology to direct current (DC) power, and a wireless power transmitter configured to wirelessly transmit the DC power to a portable electronic device via a nonradiative wireless power transfer technology. |
| US11418064B1 |
System and method for providing disjointed space-based power beaming
A system including a plurality of space-based satellites is disclosed where each satellite has at least one of an energy capture component and an energy generator component, an energy conversion component to convert the at least one of captured energy and generated energy into a power beam for wireless transmission, and a communication system to provide for each satellite in the plurality of space-based satellites to communicate between each other. The system also includes a controller to control power beam generation from at least one satellite of the plurality of satellites. Another system and method are also disclosed. |
| US11418062B2 |
Wireless power transfer systems having concentric coils
A conventional wireless power transfer (WPT) system based on resonant inductive coupling typically operates at a peak power efficiency at the expense of a energy transfer rate. Impedance matching circuits can increase the energy transfer rate, but tend to increase the complexity, form factor, and weight of the WPT system. To overcome these limitations, a WPT system is described herein that includes a resonant circuit with integrated impedance matching. The resonant circuit includes a first coil, a first capacitor in series with the first coil, a second coil in series with the first coil and the first capacitor, and a second capacitor in parallel with the first coil and the first capacitor. The inductor coils and capacitances are tailored to increase the voltage gain and, thus, the energy transfer rate. The inductor coils also transmit or receive power, thus increasing the energy transfer rate and the power efficiency. |
| US11418055B1 |
Energy storage system and power supply method thereof
An energy storage system and a power supply method thereof are provided. First and second energy storage devices are connected in series between an AC power source and a load. When the AC power source is normal, the AC power source is used to charge the first energy storage device and provided to the second energy storage device for charging. When the AC power source is abnormal, an output of the first energy storage device is switched from the AC power source to a first energy storage power source, and the second energy storage device is disabled from using the first energy storage power source for charging. A power source provided by the first energy storage device or a second energy storage power source provided by the second energy storage circuit is output to the load according to a power supply state of the first energy storage device. |
| US11418046B2 |
Charge and discharge circuit
A charge and discharge circuit includes: a charging loop, including a battery pack, a first switch module and a charging device connected in series, where, the charging loop is configured to charge the battery pack using the charging device, and precharge the charging device; and a discharging loop, including the battery pack, a second switch module and an electric device connected in series, where, the discharging loop is configured to make the battery pack discharge to the electric device, and precharge the electric device; where, the first switch module and the second switch module each include at least one switch, and a part of switches in the first switch module and the second switch module are semiconductor switches, and the other part of the switches in the first switch module and the second switch module are relays. |
| US11418041B2 |
Battery system
A battery system includes a first cell balancing circuit electrically coupled to first and second sense lines and to a first battery cell. The battery system includes an integrated circuit measuring a first cell voltage between first and second sense lines at a first time while a first cell balancing circuit is turned off, and a second cell voltage between second and third sense lines at the first time while the second cell balancing circuit is turned off, and determining first and second cell voltage values based on the first and second cell voltages, respectively. A microcontroller receives the first and second cell voltage values and determines that an open circuit condition exists in the first balancing circuit if the first cell voltage value is greater than a first threshold voltage value, or the second cell voltage value is less than a second threshold voltage value. |
| US11418033B2 |
Method to overcome electrical circuit voltage and current limitations
A power converter system including an input configured to receive input AC power from an input power source, the input power source having a peak voltage limit, at least one output configured to provide output power to at least one load, a charger coupled to the input and configured to convert the input AC power into first DC power, a DC bus configured to receive the first DC power, at least one power converter configured to convert DC power from the DC bus into the output power, and an auxiliary power source coupled to the DC bus and configured to provide second DC power to the DC bus to supplement the first DC power provided by the charger in response to a voltage demand of the at least one load exceeding the peak voltage limit of the input power source. |
| US11418028B1 |
Heater status monitor
An appliance having a heater connectable to a power source to create a heater circuit is disclosed. The appliance includes a controller and a heater switch configured to be selectively closed in response to a control signal from the controller to complete the heater circuit and enable current to flow from the power source to the electric heater. The appliance further includes a heater feedback circuit comprising a plurality of resistors and configured to be connected to the power source and further configured to generate an output signal to the controller having a first state indicative of no current leakage from the heater circuit, a second state indicative of current leakage from the heater circuit where the polarity of the power source is normal, and a third state indicative of current leakage from the heater circuit where the polarity of the power source is reversed. The controller may determine whether current leakage exists in the heater circuit, regardless of the polarity of the grid lines from the power source. The controller may take various actions in response to such determination. |
| US11418015B2 |
Isolating gas-insulated bus arrangements for switchgear
A switchgear assembly includes a plurality of switches arranged in a row and a plurality of gas insulated bus assemblies arranged in a row parallel to the row of switches. The bus assemblies have gas containment enclosures with respective bus sections therein electrically connected to one another by first connectors outside of the gas containment enclosures and electrically connected to respective ones of the switches by second connectors outside of the gas containment enclosures. |
| US11418014B2 |
Retractable DIN clip
A DIN clip apparatus with a housing in which components are disposed. The housing has a bottom edge which abuts the DIN rail when the apparatus is mounted thereon. A DIN clip is attached to the bottom edge of the housing. The DIN clip includes a DIN clip body that is disposed to a first side of a DIN rail. The DIN clip body has a first end which is closest to the DIN rail, and a second end which is farthest from the DIN rail. A DIN clip arm is pivotally attached to the first end of the DIN clip body. The DIN clip arm is configured to span the width of the DIN rail and to pivotally transition between locked and unlocked positions. The DIN clip arm is configured to attach to a second side of the DIN rail opposite the first side, when in the locked position. |
| US11418012B2 |
Structured beam generation device and method based on beam shaping
A structured beam generation device based on beam shaping and a method adopting the device are provided. Linearly polarized beam emitted by a laser sequentially passes through an electro-optic intensity modulator, a half-wave plate, and a first beam expander, and then enters a first polarization beam-splitting prism to be transmitted and reflected. The transmitted beam sequentially passes through a beam shaper, an optical delay line, and a first reflector to form a parallel ring-shaped beam to be transmitted by a second polarization beam-splitting prism. The reflected beam sequentially passes through an electro-optic phase modulator, a second reflecting mirror, and a second beam expander, and is then reflected by the second polarization beam-splitting prism and combined with the transmitted beam into a beam, which is then adjusted by a polarizing plate have consistent polarization direction, and is finally focused at a focal plane by a focusing lens for interference. |
| US11418010B2 |
VCSEL array with tight pitch and high efficiency
An optoelectronic device includes a semiconductor substrate. A first set of thin-film layers is disposed on the substrate and defines a lower distributed Bragg-reflector (DBR) stack. A second set of thin-film layers is disposed over the lower DBR stack and defines an optical emission region, which is contained in a mesa defined by multiple trenches, which are disposed around the optical emission region without fully surrounding the optical emission region. A third set of thin-film layers is disposed over the optical emission region and defines an upper DBR stack. Electrodes are disposed around the mesa in gaps between the trenches and are configured to apply an excitation current to the optical emission region. |
| US11418008B2 |
Laser device
Disclosed is a laser device. The laser device includes a substrate, a pump light source which is disposed on the substrate and provided with a light emitting layer configured to generate pump light, and an upper waveguide which is disposed above the pump light source in a first direction and provided with an upper resonator configured to allow laser light to be generated and resonate by using the pump light. |
| US11418006B1 |
Integrated device for optical time-of-flight measurement
An optoelectronic device includes a semiconductor substrate and an optically-active structure, including epitaxial layers defining a lower distributed Bragg-reflector (DBR) stack, a quantum well structure with P- and N-doped layers disposed respectively on opposing sides of the quantum well structure, and an upper DBR stack. Electrodes are coupled to apply a bias voltage between the P- and N-doped layers. Control circuitry, disposed on the substrate, is configured to apply a forward bias voltage between the electrodes so as to cause the optically-active structure to emit an optical pulse through the upper DBR stack, and then to reverse the bias voltage between the electrodes so as to cause the optically-active structure to output an electrical pulse to the control circuitry in response to incidence of one or more of the photons, due to reflection of the optical pulse, on the quantum well structure through the upper DBR stack. |
| US11418005B2 |
Variable confinement hybrid oscillator power amplifier
Described herein is a two chip photonic device (e.g., a hybrid master oscillator power amplifier (MOPA)) where a gain region and optical amplifier region are formed on a III-V chip and a variable reflector (which in combination with the gain region forms a laser cavity) is formed on a different semiconductor chip that includes silicon, silicon nitride, lithium niobate, or the like. Sides of the two chips are disposed in a facing relationship so that optical signals can transfer between the gain region, the variable reflector, and the optical amplifier. |
| US11418004B2 |
Element structure and light-emitting device
Provided is an element structure includes a heat dissipation member and a support member provided on the heat dissipation member. The support member includes a first mount material, a stress relaxation layer, and a second mount material in a stacking direction. The element structure further includes a functional element provided on the support member. |
| US11418003B2 |
Chip on carrier
A chip may include a first substantially planar isolation layer with a first surface and a second surface opposite the first surface. The chip may include a first substantially planar conduction layer with a first surface positioned adjacent to the second surface of the first isolation layer and a second surface opposite the first surface. The chip may include a second substantially planar isolation layer with a first surface positioned adjacent to the second surface of the first conduction layer and a second surface opposite the first surface. The chip may include a second conduction layer etched on the second surface of the second isolation layer. The second conduction layer may include an anode trace, a cathode trace, and an optical transmitter positioned on the cathode trace. The chip may include one or more vias through the second isolation layer electrically coupling the anode trace with the first conduction layer. |
| US11418002B2 |
Electronic package and method for fabricating the same
An electronic package and a method for fabricating an electronic package are provided. An encapsulation layer encapsulates a first electronic component and a plurality of conductive pillars, and is defined with a reservation region and a removal region adjacent to the reservation region. A circuit structure is disposed on the encapsulation layer. The removal region and the circuit structure therewithin are removed for an optical communication element to protrude from a lateral surface of the encapsulation layer when the optical communication element is disposed on the circuit structure, so as to avoid a packaging material used in a subsequent process from being adhered to a protruding portion of the optical communication element. |
| US11418000B2 |
Q-switched cavity dumped sub-nanosecond laser
Apparatuses and methods are disclosed for applying laser energy having desired pulse characteristics, including a sufficiently short duration and/or a sufficiently high energy for the photomechanical treatment of skin pigmentations and pigmented lesions, both naturally-occurring (e.g., birthmarks), as well as artificial (e.g., tattoos). The laser energy may be generated with an apparatus having a resonator with a sub-nanosecond round trip time. |
| US11417998B2 |
Bare single mode fiber amplifier/laser
A gain fiber assembly for use in optical fiber amplification systems such as fiber amplifiers and fiber lasers utilizes an active or “bare” fiber that has a single glass cladding with an outer diameter of less is less than 80 μm and preferably less than 60 μm or even 40 μm. A passive double-clad input fiber is stripped of the outer cladding and tapered to match the outer diameter of the bare fiber. A glass-fluid or glass-vacuum interface along the taper provides guidance of the pump into and along the cladding of the bare fiber and a NA>1 for a vacuum or gasses and an NA>0.8 for liquids. This allows for much shorter fiber lengths to reach max signal power and higher pump conversion efficiencies. |
| US11417995B2 |
Transmitting power and data together in a rotorcraft using a slip ring assembly
A computer-implemented method and system for transmitting power and data together in a rotorcraft using a slip ring assembly is disclosed. According to one example, a computer-implemented method includes providing a slip ring assembly comprising a stationary element coupled to an airframe of a rotorcraft and a rotatable element rotatable relative to the stationary element and coupled to a rotor assembly of the rotorcraft. Power is transmitted from a power source associated with the airframe to an electronic device associated with the rotor assembly, the slip ring assembly being configured to complete an electrical circuit between the power source and the electronic device to provide power from the power source to the electronic device. Data is transmitted from a first data transceiver associated with the airframe to a second data transceiver associated with the rotor assembly via the electrical circuit completed by the slip ring assembly. |
| US11417993B2 |
Adapter and power tool system
An adapter for connecting a single voltage battery pack to a power tool, the single voltage battery pack configured to output only one voltage and provided with a single voltage battery interface, the power tool detachable coupled with a multi-voltage battery pack and provided with a power tool interface, the single voltage battery interface being not coupleable to the power tool interface, the adapter comprising a housing, an input interface disposed in the housing and provided for electrically and mechanically coupling with the single voltage battery interface of the single voltage battery pack, an output interface disposed in the housing and provided for electrically and mechanically coupling with the power tool interface of the power tool, the input interface electrically connected with the output interface, wherein the power tool can be powered by the single voltage battery pack through the adapter. |
| US11417992B2 |
Modular edge patching system
The disclosed angled modular edge patching system is configured to be mounted to a ceiling, furniture or wall, facilitate cable management functions and enhance space utilization. The disclosed angled modular edge patching system including a patch panel element and a base, which are configured to be releasably engaged. |
| US11417991B2 |
Retainer resisting decoupling of electrical cords
A retainer resists decoupling of a first connector of a first cord from a second connector of a second cord. The retainer includes a first receiver having an adjuster to adjust the receiver about a portion of the first cord. The retainer includes a second receiver having an adjuster to adjust the receiver about a portion of the second cord. A connector housing couples the first and second receiver. The first receiver, second receiver, and connector housing form a continuous chamber in which lies portion of the first and second cords connected together when the retainer resides in an installed orientation. The retainer, in the installed orientation, resists incursion of water, dust particulate matter and other debris into the continuous chamber. |
| US11417985B2 |
Plug connector
Disclosed is a plug connector having a plurality of electrical contact elements and an elastic sealing body. The elastic sealing body has a transparent sealing ring which is connected to at least one light guide arm which extends away from the sealing ring. |
| US11417982B2 |
Connector
A connector includes a housing fittable with a fitted portion of a counterpart housing of a counterpart connector. The housing includes a base and a fitting portion. The fitting portion is integrated with the base and fittable with the fitted portion. The fitting portion extends in a direction intersecting a fitting direction with respect to the counterpart housing and faces the base. The fitting portion includes a wall configured to close an opening of the fitted portion when the fitting portion is fitted with the fitted portion. |
| US11417980B2 |
Electrical plug with an overcurrent protective device
An electrical plug includes an inner housing slidably received within an outer housing. The inner housing includes corrugations at an end of the inner housing to prevent an electrical cable from pulling out of the plug. The inner housing also includes a protrusion that is structured to be received in an aperture of the outer housing to couple the inner housing and the outer housing and provide a visual indicator of proper assembly. The electrical plug further includes fuse clips that increase the contact area between terminals and fuses of the plug, which improves reliability. |
| US11417978B2 |
RF connector comprising a flat central contact with a fork shaped end and a solid insulating structure configured to guide a complimentary contact pin, applicable for use in a board to board connector
The application relates to a connector, intended to transmit radio frequency RF signals, of longitudinal axis X, including: a central contact under the form of an elongated flat strip which at least one of its ends is shaped as a fork with two flexible branches to define inwardly a cavity extending along the axis X for receiving a contact pin of one complementary connector, the two flexible branches of the fork being configured such that to apply a contact force to the contact pin; at least one solid insulating structure in which the central contact is mechanically retained, one of its ends of the insulating structure being configured to let the two flexible branches to move freely radially and to guide the contact pin while enabling its swivelling when inserted into the cavity (C) defined by the fork. |
| US11417975B2 |
Board-to-board connector
A connector includes a flat-plate housing made of insulating resin and including a first positioning hole and a second positioning hole, a plurality of contacts held on the housing, and a first hold-down and a second hold-down made of metal and disposed to correspond to a first positioning hole and a second positioning hole, respectively. The housing includes a CPU board opposed surface to be opposed to a CPU board. The first hold-down includes a reinforcing plate part to cover the CPU board opposed surface around the corresponding first positioning hole. The second hold-down includes a reinforcing plate part to cover the CPU board opposed surface around the corresponding second positioning hole. |
| US11417973B2 |
Connector assembly for connection to a vehicle electrical ground
A connector assembly for providing electrical connection from an electrical device ground wire to a vehicle chassis ground comprises a wire connector, a cable, and a surface connector. The wire connector is configured to receive the electrical device ground wire. The cable is electrically connected to the ground wire. The surface connector is coupled to the cable and configured to attach to a vehicle chassis. The surface connector includes a conductive disc, an outer insulating ring, and an inner insulating ring. The conductive disc is electrically connected to the cable and includes a central opening configured to receive a fastener which attaches the surface connector to the chassis. The inner insulating ring, a portion of the lower surface of the conductive disc, and the outer insulating ring form a hermetically sealed chamber with the chassis when the surface connector is attached to the chassis. |
| US11417970B2 |
Hermetic terminal with improved adhesion of glass seal to high power lead
There is provided a hermetic terminal for a large amount of power so as to secure wettability of a lead member to glass and improve hermetic reliability of a glass sealing portion. A hermetic terminal includes: a metal base provided with at least one through hole; a lead inserted in the through hole of the metal base; and an insulating member that seals the lead in the metal base. The lead includes: a core member; a binding member that at least coats an outer diameter portion of the core member; an intermediate member that coats a surface of the binding member and that is composed of a low-electric-resistance material; and an outer coating member that coats the intermediate member and that has a stable glass binding characteristic at a sealing temperature. |
| US11417964B2 |
Single polarized array waveguide antenna
The present invention discloses a new single polarized array waveguide antenna adapted to be configured above a signal processing substrate, and including an antenna array substrate and a waveguide body. The antenna array substrate includes a plurality of antenna units, each of which having a coupling portion and an impedance matching portion. The waveguide body is configured above the antenna array substrate, and includes a plurality of waveguide channels passing through the waveguide body. Each waveguide channel has a first ridge and a second ridge projecting from wall surfaces and arranged opposite to each other. The first ridge has a first lower withdrawn edge on a lower section of the waveguide channel, and the second ridge has a second lower withdrawn edge on the lower section of the waveguide channel. The first lower withdrawn edge is distanced from the antenna array substrate by a first matching height, and the second lower withdrawn edge is distanced from the antenna array substrate by a second matching height, wherein the first matching height is different from the second matching height. Accordingly, signal transmission quality is improved by the structural arrangement above. |
| US11417961B2 |
Stacked patch antenna devices and methods
A stacked patch antenna comprises two or more patch antennas physically disposed in a stack to provide a multi-frequency or broad band antenna. However, independence of the resonant response frequencies of the lower and upper patches of each stacked patch antenna pair ground requires metallization dimensions for the upper patch's lower surface be contained within the perimeter of the lower patch's resonant metallization. Accordingly, composite stacked patch element dimensions are limited by the desired resonant frequency of the lower patch. The inventors have established an alternate physical structure where the resonant patch geometry of the lower patch element's upper metallization is not limited by the lower surface ground plane metallization of the first upper patch element. The inventors have also established design solutions allowing the lower frequency performance of the first, lower patch within a stacked patch antenna to be lowered without compromising footprint of the resulting antenna. |
| US11417959B2 |
Chip antenna module and electronic device
A chip antenna module includes: a solder layer disposed on a lower surface of the first dielectric layer; a first patch antenna pattern disposed on upper surface of the first dielectric layer and having a through-hole; a second patch antenna pattern spaced apart from an upper surface of the first patch antenna pattern and having an area less than an area of the first patch antenna pattern; a first feed via extending through the first dielectric layer and electrically connected to the first patch antenna pattern; a second feed via extending through the first dielectric layer and the through-hole, and electrically connected to the second patch antenna pattern; and shielding vias extending through the first dielectric layer, electrically connected to the first patch antenna pattern, and at least partially surrounding the second feed via. |
| US11417954B2 |
Electronic device comprising antenna array
An electronic device according to an embodiment of the present invention may include a housing and an antenna module disposed on one surface of the housing, wherein the antenna module may include a printed circuit board including a first layer facing the one surface of the housing, a second layer facing the first layer, and at least one ground layer disposed between the first layer and the second layer, a first antenna array disposed on the first layer, a second antenna array disposed on the second layer and at least partially overlapping the first antenna array when viewed from the one surface of the housing, and a communication circuit (radio frequency integrated circuit (RFIC)) electrically connected to the first antenna array and the second antenna array and feeding the first antenna array and the second antenna array, wherein the communication circuit may be configured to receive a first signal from an external device via at least one of the first antenna array or the second antenna array, change a phase of at least a portion of the first antenna array and the second antenna array based on the first signal, and transmit/receive a second signal in a direction of a beam formed by the changed phase. Other various embodiments could be derived from the description. |
| US11417953B2 |
Electronic shielding of antennas from fan controls in a compact electronic device
A compact electronic device for wireless communication is disclosed. The compact electronic device includes a main printed circuit board, one or more antennas, at least one conductor, and a shell. The one or more antennas are configured for wireless communication. The at least one conductor being configured to provide at least one of control signals and power to a fan. The shell mounts the fan relative to the main printed circuit board. The shell includes walls forming a cavity. The walls encapsulate the conductor in the cavity. |
| US11417950B2 |
Integrated wave-absorbing and wave-transparent apparatus and radome
The disclosure provides an integrated wave-absorbing and wave-transparent apparatus and a radome. The integrated wave-absorbing and wave-transparent apparatus includes: a wave-transparent structure, including a first substrate and a metal patch unit located on opposite surfaces of the substrate; and a wave-absorbing structure, disposed on the wave-transparent structure and including a first wave-absorbing unit and a second wave-absorbing unit that are perpendicular to each other, where the first wave-absorbing unit and the second wave-absorbing unit each includes: a second substrate; and a plurality of metal sections and a plurality of stop-bands that are located on surfaces of the second substrate, where the plurality of metal sections and the plurality of stop-bands are connected alternately to form an absorption ring, and the metal patch unit is configured to be perpendicular to each of an absorption ring of the first wave-absorbing unit and an absorption ring of the second wave-absorbing unit. |
| US11417949B2 |
Antenna module and communication device having same mounted therein
This antenna module (100) includes a dielectric substrate (130) and radiation electrodes (121) and a ground electrode (GND) that are arranged on or in the dielectric substrate (130). A plurality of openings (122) are formed in at least one electrode out of the radiation electrode (121) and the ground electrode (GND), the plurality of openings (122) penetrating through the electrode but not penetrating through the dielectric substrate (130). |
| US11417947B2 |
Antenna device for vehicle
An antenna device for a vehicle includes a camera that facilitates assembly. The antenna device for a vehicle includes: an antenna case that has a housing space formed therein; an antenna base that is covered with the antenna case from above to form the housing space; an antenna element that is held by the antenna base and housed in the housing space; and a camera that is housed in the housing space The antenna base has a wall portion extending upward. The camera is fixed to the wall portion. |
| US11417938B2 |
Printed circuit board with substrate-integrated waveguide transition
In described examples, an integrated waveguide transition includes a substrate with a waveguide side and an opposing waveguide termination side. A first layer of metal covers a portion of the waveguide side, a second layer of metal is separated from the first layer of metal by a first layer of dielectric, and a third layer of metal covers a portion of the waveguide termination side and is separated from the second layer of metal by a second layer of dielectric. A substrate waveguide perpendicular to a plane of the substrate extends from the waveguide side to the waveguide termination side; and a length and a width of the substrate waveguide is defined by a fence of ground-stitching vias that short the first layer of metal and the second layer of metal to a plate of the third layer of metal that forms a back short. |
| US11417936B2 |
Output electrode assembly and battery module
This application provides an output electrode assembly including a circuit board, a connector, an output electrode connecting sheet and a fastening base. The connector is disposed at one end of the circuit board in a longitudinal direction of the output electrode assembly, and the output electrode connecting sheet is spaced apart from the connector in a transverse direction of the output electrode assembly. The fastening base has a partition wall; a first mounting portion formed on one side of the partition wall in the transverse direction, where the connector is fixedly mounted to the first mounting portion; and a second mounting portion formed on the other side of the partition wall in the transverse direction, where the output electrode connecting sheet is fixedly mounted to the second mounting portion. The fastening base has functions of both an output electrode base and a connector mounting base in a battery module. |
| US11417935B2 |
Component for collecting current and battery
The present disclosure provides a component for collecting a current and a battery. The component for collecting a current comprises an introducing body and a connection body bendably arranged relative to the introducing body. The introducing body comprises a holding arrangement. The holding arrangement is used for fixing the introducing body when the connection body is bent. When the connection body is bent, an operator can use a clamping tool to fixedly clamp the holding arrangement arranged on the introducing body, so that the stress applied on the component for collecting a current can be transferred to the position of the clamping tool when the connection body is bent, thereby reducing the stress from damaging electrode assemblies. |
| US11417934B2 |
Connection element for mechanical and electrical connection to a contact element of an electrical storage cell
A connection element for mechanical and electrical connection to a contact element of an electrical storage cell comprises a contact receptacle and a clamping device. The contact receptacle is open in a set-on direction and receives a portion of the contact element. The clamping device extends into the contact receptacle in a press-on position of the clamping device. The clamping device is formed from a shape memory alloy transferable by a phase transformation into the press-on position. |
| US11417931B2 |
Energy storage system for a vehicle
The invention relates to an energy storage system for a vehicle, in particular a starter battery for a vehicle, having a plurality of energy storage cells for providing and/or storing electric energy and a housing which has a plurality of wall elements that delimit the interior of the housing. The housing is designed to receive the plurality of energy storage cells in the interior of the housing. A plurality of separating walls are arranged in the interior of the housing in order to divide the interior of the housing into a plurality of chambers, wherein each chamber is designed to receiving an energy storage cell. A fluidic connection is formed between the individual chambers, and a ventilation valve is arranged on one of the wall elements, preferably a cover element, of the housing in a respective region paired with the corresponding chamber. At least one of the ventilation valves is an active ventilation valve, and the remaining ventilation valves are blind closures. |
| US11417930B2 |
Mounting stand, battery assembly, and energy storage system including the same
The present disclosure provides a mounting stand which is configured for mounting a component on the floor or on the wall comprising a bracket, at least two rotating rackets connected to the fixing bracket separately and being on opposite sides of the fixing bracket, and a back plate detachably disposed on the fixing bracket and the at least two rotating brackets. The present disclosure further provides a battery assembly and an energy storage system comprising the mounting stand. The mounting stand is adapted for conveniently accepting a floor-mounted method and a wall-mounted method. |
| US11417928B2 |
Battery holding mechanism for being built in wireless transmitter and receiver device
A battery holding mechanism is adapted to selectively accommodate a first battery having a larger outer diameter, or two second batteries each having a smaller outer diameter. The battery holding mechanism includes a battery holder and a resilient positioning member. The battery holder defines therein an installation space configured to permit only the first battery or only the second batteries to be installed. When the first battery is installed, the first battery is positioned by the resilient positioning member. When the second batteries are installed, the second batteries are positioned by the resilient positioning member in a juxtaposed manner. |
| US11417923B2 |
Battery pack and manufacturing method therefor
A battery pack includes a battery assembly, a heat radiation molding being molded in advance and having flexibility, and an external case housing the battery assembly. The battery assembly includes at least one secondary battery cell and a battery holder to hold and house the at least one secondary battery cell. A heat radiation molding covers a surface of the at least one secondary battery cell and is designed to melt in response to heat generated from the at least one secondary battery cell. |
| US11417920B2 |
Power storage device
A power storage device includes at least one power storage cell, a heater that increases a temperature of the power storage cell, a pressing member that presses the heater against the power storage cell, and a sensor provided in the heater. The heater includes a base material and a heater wire provided on the base material. The base material includes a lead portion drawn from between the pressing member and the power storage cell. The heater wire includes a heater lead wire formed on the lead portion. The sensor is provided on the heater lead wire. |
| US11417917B2 |
Method of testing battery, battery testing apparatus, and battery
A method of testing a battery includes the following steps. Step A1 is a step of preparing a test target battery. Step A2 is a step of measuring magnetism when applying an electric current to the test target battery. Step A3 is a step of obtaining a current distribution of the test target battery based on the magnetism measured in step A2. Step A4 is a step of comparing the current distribution of the test target battery obtained in step A3 with a normal current distribution that is obtained in advance, with predetermined reference positions being aligned with each other. |
| US11417916B2 |
Intelligent vehicle battery charging for high capacity batteries
A system and method for intelligent battery charging management to improve battery life and charging efficiency of high capacity batteries that may not be deeply discharged on a regular basis may learn driving habits automatically and/or with user input and select an ending state-of-charge (SOC) to limit battery charging to less than maximum capacity based on current and/or anticipated ambient temperature and battery health of life (HOL). An expected vehicle travel distance before the next charge may be learned or determined based on vehicle or user inputs. An ending SOC based on battery temperature, a delta SOC to meet propulsive energy for the expected travel distance, cycling effect (depth of discharge) on battery HOL for a given delta SOC, and/or battery working efficiency may be used to control charging of the vehicle battery. |
| US11417914B2 |
Battery, electronic device and battery pack
The present application discloses a battery, an electronic device and a battery pack. The battery according to one embodiment comprises a battery cell assembly, the battery cell assembly including a first tab and a protection assembly. The protection assembly is connected to the first tab, and comprises a breaker and a first unidirectional conduction element, the breaker and the first unidirectional conduction element are connected in parallel. The battery, the electronic device and the battery pack provided by the embodiments of the present application may achieve overcharge protection on a soft package battery, and may meet a performance requirement of the soft package battery for discharge at large current. |
| US11417913B2 |
Ionic liquid gel for electrolyte, method of and ink for making the same, and printed batteries including such ionic liquid gels and/or electrolytes
The disclosure concerns an electrolyte, an electrolyte ink, a battery or other electrochemical cell including the same, and methods of making the electrolyte and electrochemical cell. The electrolyte includes an ionic liquid comprising a hydrophilic or hydrophobic anion, a multi-valent metal cation suitable for use in a battery cell, a polymer binder, and optional additives (e.g., a solid filler). The electrolyte ink includes components of the electrolyte and a solvent. The solvent and the polymer binder (or, when present, the solid filler) have a hydrophilicity, hydrophobicity or polarity similar to or matching that of the ionic liquid's anion, or form hydrogen bonds with the ionic liquid's anion. The electrolyte includes a solid inorganic filler that provides mechanical support form hydrogen bonds with the anion and/or a counterpart anion of the multi-valent metal cation, and links with a material in an adjacent layer of the electrochemical cell. |
| US11417911B2 |
All-solid-state battery and method for producing the same
The invention provides a laminated all-solid-state battery that can increase volumetric energy density and maintain the shape of the all-solid-state battery, as well as a method for producing the laminated all-solid-state battery. The all-solid-state battery comprises a battery stack having two or more unit cells and an exterior film sealing the battery stack, wherein the battery stack has a hexahedron shape formed by a top surface and bottom surface in the stacking direction and first, second, third and fourth side walls, the exterior film is a single film covering the battery stack from the top surface and bottom surface in a manner covering the fourth side wall, and condition (i) is satisfied when collector tabs protrude from the first or third side wall or condition (ii) is satisfied when collector tabs protrude from the second side wall, as well as a method for producing the all-solid-state battery. |
| US11417909B2 |
Secondary battery solid electrolyte composition and solid electrolyte prepared therefrom
A solid electrolyte composition for a lithium secondary battery including a fluorine-based polymer having grafted thereon a unit comprising alkylene oxide group and a crosslinkable functional group. The polymer may be formed by a process including grafting a monomer on a fluorine-based polymer, where the monomer includes alkylene oxide group and a crosslinkable functional group. Also disclosed is a solid electrolyte for a secondary battery formed by thermally curing the composition. By graft copolymerizing a monomer including alkylene oxide group and a crosslinkable functional group on a fluorine-based polymer having high lithium ion conductivity, the solid electrolyte is capable of providing a solid electrolyte for a secondary battery having significantly enhanced solid electrolyte ion conductivity and electrochemical stability. |
| US11417901B2 |
Electrolyzer and method of use
Provided herein are methods for operating carbon oxide (COx) reduction reactors (CRR) and related apparatus. In some embodiments, the methods involve shutting off, reducing, or otherwise controlling current during various operation stages including hydration, break-in, normal operation, planned shut-offs, and extended shutoff or storage periods. |
| US11417896B2 |
Production method for separator integrated gasket for fuel cells
This invention provides a highly reliable separator integrated gasket for fuel cells free from deformation of a separator in a gasket molding process. In order to achieve the object, a pair of separators having adjacent portions approaching each other and separation portions separating from each other in a stacked state and having manifold holes opened in the separation portions are stacked via a spacer in which an inner peripheral hole is opened and which enables the circulation of a fluid in a direction orthogonal to the stacking direction so that the manifold hole and the inner peripheral hole are continuous to each other, a stacked object of the separators and the spacer is disposed in a mold, and then a rubber molding material is charged into and cured in gasket molding cavities defined between a surface opposite to the spacer in the separator and the mold. |
| US11417892B2 |
Fuel cell
Provided is a highly reliable fuel cell that improves power generation efficiency of the fuel cell and that is less likely to cause damage to an electrode and an electrolyte film. The fuel cell includes a support substrate (2, 3) having a region in which a support portion having a mesh-like shape in a plan view is provided, a first electrode 4 on the support substrate, an electrolyte film 5 on the first electrode, and a second electrode 6 on the electrolyte film. The first electrode includes a first thin film electrode 4A formed in a manner of covering at least the region, and a first mesh-like electrode 4B connected to the first thin film electrode and provided corresponding to the support portion. The first mesh-like electrode 4B has a film thickness larger than that of the first thin film electrode and has a mesh-like shape in a plan view. |
| US11417890B2 |
Flexible battery assembly and method for manufacturing the same
A flexible battery assembly includes a positive plate, a first filling film, a separator, a second filling film, and a negative plate stacked in order. The positive plate includes a first insulating layer, spaced first current collectors, and a positive electrode active layer. The negative plate includes a second insulating layer, spaced second current collectors, and a negative electrode active layer. Each first current collector corresponds to one second current collector. The first filling film comprises first openings each corresponding to one first current collector, and the first current collectors are embedded in the first openings. The second filling film comprises second openings each corresponding to one second current collector, and the second current collectors are embedded in the second openings. An electrolyte is sealed in the first openings and the second openings. A method for manufacturing such flexible battery assembly is also disclosed. |
| US11417885B1 |
Filled carbon nanotubes and methods of synthesizing the same
Filled carbon nanotubes (CNTs), methods of synthesizing the same, and lithium-ion batteries comprising the same are provided. In situ methods (e.g., chemical vapor deposition techniques) can be used to synthesize CNTs (e.g., multi-walled CNTs) filled with metal sulfide nanowires. The CNTs can be completely (or nearly completely) and continuously (or nearly continuously) filled with the metal sulfide fillers up to several micrometers in length. The filled CNTs can be synthesized on a carbon substrate. A lithium-ion battery can comprise a cathode, an anode comprising filled CNTs as described herein, and an electrolyte in contact with the cathode and/or the anode. |
| US11417884B2 |
Titanium disulfide-sulfur composites
A titanium disulfide-sulfur (TiS2—S) composite particle contains a titanium disulfide (TiS2) substrate having solid elemental sulfur (S) disposed directly on a surface of the TiS2. The TiS2 substrate has a layered crystalline hexagonal structure of space group P-3 ml and includes at least 100 distinct layers. The TiS2 and S are present in the composite in a weight ratio (TiS2:S) of 20:80 to 50:50. Cathodes and batteries containing the composite particle, as well as related methods, are also disclosed. |
| US11417883B2 |
Positive electrode active material, preparation method thereof, positive electrode plate, lithium-ion secondary battery as well as battery module, battery pack and apparatus containing lithium-ion secondary battery
The present application discloses positive electrode active material, preparation method thereof, positive electrode plate, lithium-ion secondary battery and battery module, pack, and apparatus. The positive electrode active material includes a nickel-containing lithium composite oxide satisfying a chemical formula Li1+a[NixCoyMnzMb]O2, in the formula, M is a doping element at transition metal site, 0.5≤x<1, 0≤y<0.3, 0≤z<0.3, −0.1≤a<0.2, 0 |
| US11417878B2 |
Electrode materials in the form of lithium-based alloy and methods for manufacturing same
The present technology described relates to lithium-based alloy electrode materials used for the production of anode in lithium accumulators and processes for obtaining same. The alloy comprises metallic lithium, a metallic component X1 selected from magnesium and aluminum and a metallic component X2 selected from alkali metals, alkaline earth metals, rare earths, zirconium, copper, silver, bismuth, cobalt, zinc, aluminum, silicon, tin, antimony, cadmium, mercury, lead, manganese, boron, indium, thallium, nickel, germanium, molybdenum and iron. Processes for preparing electrode materials thus obtained and their uses are also described. |
| US11417876B2 |
Positive electrode active material and nonaqueous electrolyte secondary battery including positive electrode active material
A positive electrode active material used for a nonaqueous electrolyte secondary battery, includes a base portion, a dielectric, and a carbonate compound. The base portion is formed of a compound storing and releasing a charge carrier. The dielectric is disposed on at least a part of a surface of the base portion. The carbonate compound is disposed on at least a part of the surface of the base portion. |
| US11417875B2 |
Positive active material for rechargeable lithium battery, method of preparing the same and rechargeable lithium battery including the same
A positive active material for a rechargeable lithium battery includes a nickel-based lithium transition metal oxide including a secondary particle in which a plurality of primary particles are agglomerated, wherein the secondary particle includes a core and a surface layer surrounding the core, and the surface layer includes a plurality of primary particles and a nano-sized cobalt-based lithium transition metal oxide absorbed in the surface layer, between the primary particles. |
| US11417867B2 |
Display device
Disclosed is a display device that is capable of realizing low power consumption. The display device includes a first thin film transistor having a polycrystalline semiconductor layer in an active area and a second thin film transistor having an oxide semiconductor layer in the active area, thereby realizing low power consumption, wherein at least one opening disposed in a bending area has the same depth as one of a plurality of contact holes disposed in the active area, whereby the opening and the contact holes are formed through the same process, and the process is therefore simplified. |
| US11417866B2 |
Anisotropic conductive film and display device including the same
An anisotropic conductive film, and a display device including the same includes a first non-conductive layer; a pattern layer on the first non-conductive layer and having a plurality of holes; a plurality of conductive balls in the plurality of holes of the pattern layer; and a second non-conductive layer on the pattern layer and the plurality of conductive balls. |
| US11417864B2 |
Display panel
A display apparatus includes a first area including at least one opening, a second area disposed around the first area, and a third area disposed between the first area and the second area. The second area includes a plurality of display elements, and the third area includes a groove. The display apparatus further includes a thin film encapsulation layer covering the plurality of display elements and including an inorganic encapsulation layer and an organic encapsulation layer, a planarization layer disposed over the groove, a first insulating layer disposed over the thin film encapsulation layer, a second insulating layer disposed over the planarization layer, and a cover layer overlapping the first end of the planarization layer and partially overlapping the first insulating layer and the second insulating layer. A first end of the planarization layer overlaps the thin film encapsulation layer, and the second insulating layer includes a first through hole. |
| US11417862B2 |
Display device including lead wiring lines covered by first and second organic films, and production method therefor
Each of lead wiring lines that constitutes a TFT layer and is provided to extend parallel to each other in a frame region extends to intersect with a perimeter edge surface of a first organic film that constitutes the TFT layer and is provided on each of the lead wiring lines. A second organic film is provided to cover a lower portion of the perimeter edge surface of the first organic film and each of the lead wiring lines on a side of the perimeter edge surface of the first organic film, the lead wiring lines extending from the perimeter edge surface of the first organic film. |
| US11417855B2 |
Display device and manufacturing method thereof
A display device and a manufacturing method thereof are provided. The display device includes a display area, a non-display area surrounding the display area, a thin film transistor structure layer, a ring-shaped metal layer, a luminous layer, and a first electrode. The ring-shaped metal layer is disposed in the non-display area. The thin film transistor structure layer includes a passivation layer including a protrusion corresponding to the ring-shaped metal layer. The first electrode extends from the display area to the protrusion, and extends from a surface of the protrusion to a surface of the ring-shaped metal layer. |
| US11417851B2 |
Light-emitting element, light-emitting device, and device for producing light-emitting element
A light-emitting element includes: a first electrode; a second electrode; a quantum dot layer including layered quantum dots between the first electrode and the second electrode; and a hole transport layer formed of LaNiO3 between the quantum dot layer and the first electrode. |
| US11417849B2 |
Fabrication of corrugated gate dielectric structures using atomic layer etching
Integrated circuit structures, arrangements, and manufacturing processes are discussed herein. In one example, a method of forming a transistor structure includes forming a dielectric layer onto a gate element and forming a corrugated surface into the dielectric layer using at least an atomic layer etching (ALE) process to remove portions of the dielectric layer. The method also includes forming a semiconductor layer onto the corrugated surface and forming a source element and a drain element onto the semiconductor layer. |
| US11417846B2 |
Light-emitting layer, organic light emitting diode device and display apparatus
The present disclosure provides a light-emitting layer, an organic light emitting diode (OLED) device, and a display apparatus. The light-emitting layer has a host material containing a first photocrosslinker group. A guest material containing a second photocrosslinker group is prepared. The host material and the guest material are mixed in a solvent to form a mixture. The mixture is coated, annealed, and UV-irradiated on a substrate to form the light-emitting layer. As such, the disclosed light-emitting layer is prepared by the polymerization after being on the substrate. The light-emitting layer has a mesh structure. The mesh structure improves energy transfer between the host material and guest material and increases the lifespan of the resultant OLED device and OLED display apparatus. |
| US11417845B2 |
Organic compound, organic light-emitting diode and organic light-emitting device containing the compound
An organic compound having a spiro-anthracene core and an aromatic or heteroaromatic group and/or an amino group bonded to the core, and an organic light-emitting diode and an organic light-emitting device including the organic compound are disclosed. Since the organic compound of the present disclosure has a rigid structure and a substantially narrow full width at half maximum (FWHM), it is possible to manufacture an organic light-emitting diode and an organic light-emitting device with lowered driving voltages and enhanced luminous efficiency and color purity using the organic compound. |
| US11417842B2 |
Conductive polymer composite and conductive polymer composition
Provided are a conductive polymer composite and composition which: improve water volatilization efficiency during film formation by incorporating a novel non-doping fluorinated unit in a dopant polymer; also reduce H+ generation by using the non-doping fluorinated unit in place of an acid unit generating extra acids; have good filterability and film formability; and are capable of forming a film having high transparency and good flatness when the film is formed. The conductive polymer composite is a composite containing: (A) a π-conjugated polymer; and (B) a dopant polymer which is a copolymer containing a repeating unit “a” shown by the following general formula (1) and at least one repeating unit “b” selected from repeating units shown by the following general formulae (2-1) to (2-7). |
| US11417841B2 |
Techniques for forming self-aligned memory structures
Methods, systems, and devices for techniques for forming self-aligned memory structures are described. Aspects include etching a layered assembly of materials including a first conductive material and a first sacrificial material to form a first set of channels along a first direction that creates a first set of sections. An insulative material may be deposited within each of the first set of channels and a second sacrificial material may be deposited onto the first set of sections and the insulating material. A second set of channels may be etched into the layered assembly of materials along a second direction that creates a second set of sections, where the second set of channels extend through the first and second sacrificial materials. Insulating material may be deposited in the second set of channels and the sacrificial materials removed leaving a cavity. A memory material may be deposited in the cavity. |
| US11417834B2 |
Apparatus for spin injection enhancement and method of making the same
A switching device is disclosed. The switching device includes a spin-orbit coupling (SOC) layer, a pure spin conductor (PSC) layer disposed atop the SOC layer, a ferromagnetic (FM) layer disposed atop the PSC layer, and a normal metal (NM) layer sandwiched between the PSC layer and the FM layer. The PSC layer is a ferromagnetic insulator (FMI) is configured to funnel spins from the SOC layer onto the NM layer and to further provide a charge insulation so as to substantially eliminate current shunting from the SOC layer while allowing spins to pass through. The NM layer is configured to funnel spins from the PSC layer into the FM layer. |
| US11417831B2 |
Magnetic memory
A magnetic memory according to an embodiment includes: a magnetic member including a first to third magnetic parts, the first magnetic part including a first portion and a second portion and extending in a first direction from the first portion to the second portion, the second magnetic part extending in a second direction that crosses the first direction, and the third magnetic part connecting the second magnetic part and the first portion; a first nonmagnetic metal layer arranged along the third magnetic part, the first nonmagnetic metal layer including a first end portion on a side of the second portion, a position of the first end portion along the first direction being between positions of the first and second portions along the first direction; and a first and second electrodes supplying a current between the first and second magnetic parts via the third magnetic part. |
| US11417829B2 |
Three dimensional perpendicular magnetic tunnel junction with thin film transistor array
A three dimensional magnetic random access memory array that includes a sourceline formed on a substrate and a magnetic memory element pillar that includes a plurality of magnetic memory element pillars formed over the substrate. The three dimensional magnetic random access memory array also includes a transistor formed between the magnetic memory element pillar, the transistor being functional to electrically connect the sourceline and magnetic memory element pillar. A plurality of magnetic memory element pillars may be formed over the substrate with a transistor between each memory element pillar to selectively connect or disconnect each of the magnetic memory element pillars. The transistor can include an epitaxial semiconductor structure having a gate dielectric formed at a side of the epitaxial semiconductor and a gate material formed on the gat dielectric such that the gate dielectric material is between the gate material and the semiconductor material. |
| US11417823B2 |
Sensor element, sensor device, force detection apparatus, and robot
A sensor element includes a first reference potential side terminal located between a first signal side terminal and a second signal side terminal along a first axis passing through the first signal side terminal and the second signal side terminal in a plan view from a direction in which a first piezoelectric element and a second piezoelectric element are stacked and a second reference potential side terminal located between the first signal side terminal and the second signal side terminal along the first axis in the plan view from the direction. The first axis is located between the first reference potential side terminal and the second reference potential side terminal in the plain view from the direction. |
| US11417822B2 |
Frequency multiplexing for qubit readout
A system includes a quantum processor includes a plurality of qubits. For each qubit, there is a circulator operative to receive a control signal and an output signal from the qubit. An isolator is coupled to an output of the circulator. A quantum-limited amplifier is coupled to an output of the isolator and configured to provide an output of the qubit. A multiplexor (MUX) is configured to frequency multiplex the outputs of at least two of the plurality of qubits as a single output of the quantum processor. |
| US11417821B2 |
Superconductor ground plane patterning geometries that attract magnetic flux
Superconducting integrated circuit layouts are proofed against the detrimental effects of stray flux by designing and fabricating them to have one or more ground planes patterned in the x-y plane with a regular grid of low-aspect-ratio flux-trapping voids. The ground plane(s) can be globally patterned with such voids and thousands or more superconducting circuit devices and wires can thereafter be laid out so as not to intersect or come so close to the voids that the trapped flux would induce supercurrents in them, thus preventing undesirable coupling of flux into circuit elements. Sandwiching a wire layer between patterned ground planes permits wires to be laid out even closer to the voids. Voids of successively smaller maximum dimension can be concentrically stacked in pyramidal fashion in multiple ground plane layers having different superconductor transition temperatures, increasing the x-y area available for device placement and wire-up. |
| US11417809B2 |
Light emitting display apparatus
A light emitting display apparatus is disclosed, which can improve light extraction efficiency of light emitted from a light emitting diode. The light emitting display apparatus comprises a substrate including a plurality of pixel areas having an opening area, an uneven portion arranged in the opening area, and a light emitting diode arranged over the uneven portion, the uneven portion may have roughness average value of about 0.19 to about 0.29 for a unit size. |
| US11417807B2 |
Light emitting device
A light emitting device including at least one main light emitting unit including a light emitting diode chip and a wavelength converter, and configured to emit white light, in which the light emitting diode chip includes at least one of an ultraviolet chip, a violet chip, and a blue chip, and the light emitting device is configured to be adjustable to emit light corresponding to a spectral power distribution of morning sunlight, light corresponding to a spectral power distribution of afternoon sunlight, and light corresponding to a spectral power distribution of evening sunlight. |
| US11417805B2 |
Semiconductor device
A semiconductor device includes: a mounting board; and a semiconductor element disposed on the mounting board via metal bumps, wherein the semiconductor element includes a semiconductor stacked structure and first electrodes, the mounting board includes second electrodes, the metal bumps include a first layer in contact with the first electrodes of the semiconductor element and a second layer located on a side opposite to the first electrodes, an average crystal grain size of crystals included in the first layer is larger than an average crystal grain size of crystals included in the second layer, and the second layer is spaced apart from the first electrodes of the semiconductor element. |
| US11417804B2 |
Light emitting device package and light source device
The light emitting device package disclosed in the embodiment of the invention includes first and second frames; a body disposed between the first and second frames; and a light emitting devices disposed on the first and second frames. The first frame includes a first end portion adjacent to the second frame, and the second frame includes a second end portion adjacent to the first frame and facing the first end portion, the first end portion includes a first protrusion protruding toward the second frame, and the second end portion includes a second protrusion protruding toward the first frame. The light emitting device includes first and second bonding portions disposed on the first and second protrusions. The body includes first and second reflective portions extending toward both sides of the first protrusion toward the first frame, and third and fourth reflective portions extending toward both sides of the second protrusion toward the second frame. The light emitting device may overlap the first to fourth reflective portions in a vertical direction. |
| US11417802B2 |
Method of making a light emitting device and light emitting device made thereof
A light-emitting device, includes: a semiconductor stack, including a top surface, wherein the top surface includes a first region and a second region which are coplanar; a current barrier layer formed on the first region, wherein the current barrier layer includes an insulating material; and a transparent conductive layer formed on the current barrier layer and the second region; and a first electrode formed on the transparent conductive layer; wherein the current barrier layer includes: an electrode region at a position corresponding to the first electrode, having a shape substantially the same as the first electrode; and a plurality of extension regions extending from the electrode region and not covered by the first electrode. |
| US11417795B2 |
Die-bonding method and spraying device for LED
A die-bonding method and a spraying device for an LED include: providing a substrate provided with a pad and a white oil layer covering wiring, placing a steel mesh on the substrate, and then spraying suspension containing solder paste on the pad by the spraying device, to form a solder paste film layer. Finally, a reflow process for the solder is performed. The solder paste is prepared on the pad by spraying, so that a crystal wafer is prevented from being tilted or short-circuited due to pulling or dragging of the solder paste during the reflow process for the solder, thereby improving uneven brightness of the surface light source. |
| US11417792B1 |
Interconnect with nanotube fitting
A light emitting diode (LED) array is formed by bonding an LED substrate to a backplane substrate via fitted nanotube interconnects. The backplane substrate may include circuits for driving the LED array. The LED substrate may be a chip or wafer, and may include one or more LED devices. The LED substrate is positioned above the backplane substrate, such that a LED device of the LED substrate is aligned to a corresponding circuit in the backplane substrate. Each of the fitted interconnects electrically connect a LED device to the corresponding circuit of the backplane substrate. |
| US11417788B2 |
Type-II high bandgap tunnel junctions of InP lattice constant for multijunction solar cells
A type-II tunnel junction is disclosed that includes a p-doped AlGaInAs tunnel layer and a n-doped InP tunnel layer. Solar cells are further disclosed that incorporate the high bandgap type-II tunnel junction between photovoltaic subcells. |
| US11417786B2 |
Photoelectric conversion module
A photoelectric conversion module 100 comprises: a glass substrate 20; a photoelectric conversion cell 12 provided on a first surface side of the glass substrate 20; a pair of wirings 50 electrically connected to the photoelectric conversion cell, the wirings pulled out to a second surface side, the second surface side being an opposite side of the first surface of the glass substrate 20; and an insulator 60 provided between a positive-polarity wiring of the pair of wirings 50 and the second surface of the glass substrate 20. |
| US11417783B2 |
Semiconductor light receiver
A semiconductor layer formed on a clad layer and a light absorbing layer formed on the semiconductor layer are provided. The semiconductor layer includes a p-type region and an n-type region. The p-type region, which is of p-type, is provided on a side of one side portion of the light absorbing layer in a direction perpendicular to a direction in which light is guided, and the n-type region, which is of n-type, is provided on a side of another side portion of the light absorbing layer in the direction perpendicular to the direction in which light is guided. A p-type contact layer, which is of p-type, is formed on the p-type region, and an n-type contact layer is formed on the n-type region. |
| US11417782B2 |
Layered structure
The invention relates to a layered structure (1) with semiconducting materials on a support layer (3) comprising at least one planar semiconducting layer (6) and several electrodes, in particular a first (4) and second (5) one. The semiconducting layer (6) has a top (8) and bottom (7) flat face extending essentially parallel and spaced apart from one another by the height of the layer (10). The semiconducting layer (6) is also applied by the bottom flat face (7) to a flat face of the support layer (2) and the two electrodes are connected to the semiconducting layer in an electrically conducting manner. The at least two electrodes are applied by means of a structuring process and are disposed on two oppositely lying faces of the semiconducting layer and/or in planes at least approximately parallel between the two faces. |
| US11417781B2 |
Gate-all-around integrated circuit structures including varactors
Gate-all-around integrated circuit structures including varactors are described. For example, an integrated circuit structure includes a varactor structure on a semiconductor substrate. The varactor structure includes a plurality of discrete vertical arrangements of horizontal nanowires. A plurality of gate stacks is over and surrounding corresponding ones of the plurality of discrete vertical arrangements of horizontal nanowires. The integrated circuit structure also includes a tap structure adjacent to the varactor structure on the semiconductor substrate. The tap structure includes a plurality of merged vertical arrangements of horizontal nanowires. A plurality of semiconductor structures is over and surrounding corresponding ones of the plurality of merged vertical arrangements of horizontal nanowires. |
| US11417780B2 |
Semiconductor device
A semiconductor device includes a semiconductor part of a first conductivity type, a trench being provided in the semiconductor part at a front surface side; a first electrode provided on a back surface of the semiconductor part; a second electrode provided on the front surface of the semiconductor part; a first semiconductor layer of a second conductivity type provided inside the trench; and a insulating film electrically isolating the first semiconductor layer from the semiconductor part. The second electrode is electrically connected to the semiconductor part and the first semiconductor layer. The second electrode contacts the semiconductor part with a rectification property. |
| US11417775B2 |
Nanowire thin film transistors with textured semiconductors
Disclosed herein are transistor gate-channel arrangements that may be implemented in nanowire thin film transistors (TFTs) with textured semiconductors, and related methods and devices. An example transistor gate-channel arrangement may include a substrate, a channel material that includes a textured thin film semiconductor material shaped as a nanowire, a gate dielectric that at least partially wraps around the nanowire, and a gate electrode material that wraps around the gate dielectric. Implementing textured thin film semiconductor channel materials shaped as a nanowire and having a gate stack of a gate dielectric and a gate electrode material wrapping around the nanowire advantageously allows realizing gate all-around or bottom-gate transistor architectures for TFTs with textured semiconductor channel materials. |
| US11417772B2 |
Semiconductor device
A semiconductor device includes a substrate, an oxide semiconductor film on the substrate, a first gate structure on the oxide semiconductor film and a contact that is in contact with the oxide semiconductor film, the contact being disposed on a boundary surface with the oxide semiconductor film, and including a metal oxide film that includes a transition metal. |
| US11417771B2 |
Composite and transistor
A novel material is provided. A composite oxide semiconductor in which a first region and a plurality of second regions are mixed is provided. Note that the first region contains at least indium, an element M (the element M is one or more of Al, Ga, Y, and Sn), and zinc, and the plurality of second regions contain indium and zinc. Since the plurality of second regions have a higher concentration of indium than the first region, the plurality of second regions have a higher conductivity than the first region. An end portion of one of the plurality of second regions overlaps with an end portion of another one of the plurality of second regions. The plurality of second regions are three-dimensionally surrounded with the first region. |
| US11417768B2 |
Doped polar layers and semiconductor device incorporating same
The disclosed technology generally relates to ferroelectric materials and semiconductor devices, and more particularly to semiconductor memory devices incorporating doped polar materials. In one aspect, a semiconductor device comprises a capacitor which in turn comprises a polar layer comprising a base polar material doped with a dopant. The base polar material includes one or more metal elements and one or both of oxygen or nitrogen. The dopant comprises a metal element that is different from the one or more metal elements and is present at a concentration such that a ferroelectric switching voltage of the capacitor is different from that of the capacitor having the base polar material without being doped with the dopant by more than about 100 mV. The capacitor stack additionally comprises first and second crystalline conductive oxide electrodes on opposing sides of the polar layer. The capacitor stack further comprises first and second barrier metal layers on respective ones of the first and second crystalline conductive oxide electrodes on opposing sides of the polar layer. |
| US11417766B2 |
Transistors having nanostructures
A semiconductor device according to the present disclosure includes a first transistor and a second transistor. The first transistor includes a plurality of first channel members and a first gate structure wrapping around each of the plurality of first channel members. The second transistor includes a plurality of second channel members and a second gate structure disposed over the plurality of second channel members. Each of the plurality of first channel members has a first width and a first height smaller than the first width. Each of the plurality of second channel members has a second width and a second height greater than the second width. |
| US11417761B1 |
Transistor structure and method for fabricating the same
A transistor structure includes a substrate, having a gate region and a first trench in the substate at a first side of the gate region. Further, a first gate insulating layer is disposed on a first portion of the gate region, opposite to the first trench. A second gate insulating layer is disposed on a second portion of the gate region and a first portion of the first trench abutting to the gate region, wherein the second gate insulating layer is thicker than the first gate insulating layer. A gate layer is disposed on the first and second gate insulating layers, having a downward protruding portion corresponding to the first trench. A first doped region is in the substrate at least under the first trench. A second doped region is in the substrate at a second side of the gate region. |
| US11417758B2 |
Enhancement mode Group III nitride-based transistor device
An enhancement mode Group III nitride-based transistor device includes a body having a first surface and a Group III nitride barrier layer arranged on a Group III nitride channel layer and forming a heterojunction therebetween. A first cell field includes transistor cells and an edge region. Each transistor cell includes source, gate and drain fingers extending substantially parallel to one another on the first surface in a longitudinal direction. The gate finger, arranged laterally between the source and drain fingers, includes a p-doped Group III nitride finger arranged between a metallic gate finger and the first surface. The edge region surrounds the transistor cells and includes an edge termination structure having an isolation ring and a p-doped Group III nitride runner. The isolation ring locally interrupts the heterojunction. The runner, extending transversely to the longitudinal direction, is located laterally between the isolation ring and an end of the drain finger. |
| US11417755B2 |
Differentially strained quantum dot devices
Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack including a quantum well layer; a first gate above the quantum well stack, wherein the first gate includes a first gate metal; and a second gate above the quantum well stack, wherein the second gate includes a second gate metal, and a material structure of the second gate metal is different from a material structure of the first gate metal; wherein the quantum well layer has a first strain under the first gate, a second strain under the second gate, and the first strain is different from the second strain. |
| US11417754B2 |
Method for manufacturing semiconductor device
It is an object to provide a highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics. It is another object to manufacture a highly reliable semiconductor device at lower cost with high productivity. In a method for manufacturing a semiconductor device which includes a thin film transistor where a semiconductor layer having a channel formation region, a source region, and a drain region are formed using an oxide semiconductor layer, heat treatment (heat treatment for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor layer and reduce impurities such as moisture. Moreover, the oxide semiconductor layer subjected to the heat treatment is slowly cooled under an oxygen atmosphere. |
| US11417750B2 |
Gate air spacer for fin-like field effect transistor
Fin-like field effect transistors (FinFETs) and methods of fabrication thereof are disclosed herein. The FinFETs disclosed herein have gate air spacers integrated into their gate structures. An exemplary transistor includes a fin and a gate structure disposed over the fin between a first epitaxial source/drain feature and a second epitaxial source/drain feature. The gate structure includes a gate electrode, a gate dielectric, and gate air spacers disposed between the gate dielectric and sidewalls of the gate electrode. |
| US11417747B2 |
Transistor device with a varying gate runner resistivity per area
In an example, a transistor device is provided. The transistor device includes a plurality of transistor cells each including a gate electrode and each at least partially integrated in a semiconductor body that includes a wide bandgap semiconductor material. The transistor device includes a gate pad arranged on top of the semiconductor body, and a plurality of gate runners each arranged on top of the semiconductor body and each connected to gate electrodes of at least some of the plurality of transistor cells. Each gate runner of the plurality of gate runners has a longitudinal direction, and at least one of the gate runners includes at least a section in which a resistivity per area increases in the longitudinal direction as a distance to the gate pad along the gate runner increases. |
| US11417745B2 |
Structure and formation method of semiconductor device with metal gate stack
A semiconductor device structure and the fabrication method are provided. The semiconductor device structure includes a first channel structure and a second channel structure over a substrate. The second channel structure is longer than the first channel structure. The semiconductor device structure also includes a first gate stack over the first channel structure, and the first gate stack has a first width. The semiconductor device structure further includes a first gate spacer extending along a sidewall of the first gate stack. In addition, the semiconductor device structure includes a second gate stack over the second channel structure and a second gate spacer extending along a sidewall of the second gate stack. The second gate stack has a portion extending along the second gate spacer, and the portion of the second gate stack has a second width. Half of the first width is greater than the second width. |
| US11417743B2 |
Semiconductor device with surface insulating film
A semiconductor device of the present invention includes a semiconductor layer of a first conductivity type having a cell portion and an outer peripheral portion disposed around the cell portion, and a surface insulating film disposed in a manner extending across the cell portion and the outer peripheral portion, and in the cell portion, formed to be thinner than a part in the outer peripheral portion. |
| US11417742B1 |
Memory cell and fabricating method of the same
A memory cell includes a substrate. A first STI and a second STI are embedded within the substrate. The first STI and the second STI extend along a first direction. An active region is disposed on the substrate and between the first STI and the second STI. A control gate is disposed on the substrate and extends along a second direction. The first direction is different from the second direction. A tunneling region is disposed in the active region overlapping the active region. A first trench is embedded within the tunneling region. Two second trenches are respectively embedded within the first STI and the second STI. The control gate fills in the first trench and the second trenches. An electron trapping stack is disposed between the tunneling region and the control gate. |
| US11417740B2 |
Methods for forming recesses in source/drain regions and devices formed thereof
Embodiments disclosed herein relate generally to methods for forming recesses in epitaxial source/drain regions for forming conductive features. In some embodiments, the recesses are formed in a two-step etching process including an anisotropic etch to form a vertical opening and an isotropic etch to expand an end portion of the vertical opening laterally and vertically. The recesses can have increased contact area between the source/drain region and the conductive feature, and can enable reduced resistance therebetween. |
| US11417737B2 |
Semiconductor structure having vertical fin with oxidized sidewall and method of manufacturing the same
The present disclosure provides a semiconductor structure having a vertical fin with an oxidized sidewall and a method for preparing the semiconductor structure. The semiconductor structure includes a substrate, a top source/drain, a channel fin, a gate structure, a top cathode/anode, and a vertical fin. The substrate has a bottom source/drain and a bottom cathode/anode. The top source/drain is disposed above the bottom source/drain of the substrate, and the channel fin connects the top source/drain to the bottom source/drain of the substrate. The gate structure is disposed on the channel fin. The top cathode/anode is disposed above the bottom cathode/anode of the substrate, and the vertical fin connects the top cathode/anode to the bottom cathode/anode of the substrate, wherein the vertical fin has an oxidized sidewall. |
| US11417734B2 |
Method for fabricating flash memory
A structure of flash memory cell includes a substrate. A floating gate is disposed on the substrate. A low dielectric constant (low-K) spacer is disposed on a sidewall of the floating gate. A trench isolation structure has a base part disposed in the substrate and a protruding part above the substrate protruding from the base part. The low-K spacer is sandwiched between the floating gate and the protruding part of the trench isolation structure. |
| US11417731B2 |
Semiconductor device including a field effect transistor and method of fabricating the same
A semiconductor device includes an active pattern on a substrate, a pair of source/drain patterns on the active pattern, a channel pattern between the pair of source/drain patterns, the channel pattern including semiconductor patterns stacked to be spaced apart from each other, and a gate electrode crossing the channel pattern and extending in a first direction. One of the pair of source/drain patterns includes a first semiconductor layer and a second semiconductor layer thereon. The first semiconductor layer is in contact with a first semiconductor pattern, which is one of the stacked semiconductor patterns. The largest widths of the first semiconductor pattern, the first semiconductor layer, and the second semiconductor layer in the first direction are a first width, a second width, a third width, respectively, and the second width is larger than the first width and smaller than the third width. |
| US11417725B2 |
Isolation of circuit elements using front side deep trench etch
An integrated circuit is formed by forming an isolation trench through at least a portion of an interconnect region, at least 40 microns deep into a substrate of the integrated circuit, leaving at least 200 microns of substrate material under the isolation trench. Dielectric material is formed in the isolation trench at a substrate temperature no greater than 320° C. to form an isolation structure which separates an isolated region of the integrated circuit from at least a portion of the substrate. The isolated region contains an isolated component. The isolated region of the integrated circuit may be a region of the substrate, and/or a region of the interconnect region. The isolated region may be a first portion of the substrate which is laterally separated from a second portion of the substrate. The isolated region may be a portion of the interconnect region above the isolation structure. |
| US11417722B2 |
Display device including a low resistance cathode wiring
The display device includes a substrate, a first wiring provided on the substrate, an insulating layer having a first contact hole, and provided on the first wiring, a plurality of pixels arranged in a display region on the first insulating layer, each of the plurality of pixels having a transistor and a light emitting element, a common electrode provided in common to the plurality of light emitting elements and electrically connected to the first wiring via the first contact hole in a peripheral region surrounding the display region. |
| US11417720B2 |
Display device including n-channel transistor including polysilicon
A load, a transistor which controls a current value supplied to the load, a capacitor, a power supply line, and first to third switches are provided. After a threshold voltage of the transistor is held by the capacitor, a potential in accordance with a video signal is inputted and a voltage that is the sum of the threshold voltage and the potential is held. Accordingly, variation in current value caused by variation in threshold voltage of the transistor can be suppressed. Therefore, a desired current can be supplied to a load such as a light emitting element. In addition, a display device with a high duty ratio can be provided by changing a potential of the power supply line. |
| US11417718B2 |
Display panel with two electricity supply areas, manufacturing method thereof, and display device
The disclosure provides a display panel, a manufacturing method thereof, and a display device. A display area is defined on a surface of the display panel, and a first electricity supply area and a second electricity supply area are disposed opposite to each other at two sides of the display area. The display panel includes a substrate layer, and a first metal layer and a second metal layer which are sequentially disposed on the substrate layer, and an insulating layer is further disposed between the first metal layer and the second metal layer in the display area. |
| US11417716B2 |
Organic light emitting display substrate and panel with photodetector for light compensation of subpixel
A display substrate includes a substrate (10) that is divided into a plurality of subpixel areas, a drive transistor (20) and a photodetector (30) in each of the plurality of subpixel areas, and an insulation layer (40) on the photodetector (30). The drive transistor (20) includes an electrode layer that includes a source electrode (21) and a drain electrode (22). The photodetector (30) is coupled to one of the source electrode (21) and the drain electrode (22). An entirety of an orthographic projection of the insulation layer (40) on the substrate is inside an orthographic projection of the electrode layer on the substrate (10). |
| US11417715B2 |
Array substrate, display screen and display device
An array substrate, a display screen and a display device. The array substrate includes a base substrate, a non-transparent first OLED substrate, and a transparent second OLED substrate. The first OLED substrate at least partially surrounds the second OLED substrate. The second OLED substrate includes a first electrode layer located on the base substrate, a light emitting structure layer located on the first electrode layer, and a second electrode layer located on the light emitting structure layer. The first electrode layer includes a plurality of first electrodes. The light emitting structure layer includes a plurality of light emitting structures. A number of the first electrodes is less than a number of the light emitting structures. Each of the first electrodes corresponds to one of the light emitting structures. |
| US11417714B2 |
Display apparatus
A display apparatus includes a display area and a non-display area, a sub-pixel in the display area, and a pixel-defining layer which defines an area of the sub-pixel. The sub-pixel includes an adjacent sub-pixel arranged in the display area to be adjacent to the non-display area, and an internal sub-pixel arranged in the display area, and the adjacent sub-pixel and the internal sub-pixel implement the same color and have different shapes in a plan view. |
| US11417710B2 |
Organic light-emitting display panel and manufacturing method thereof, and organic light-emitting display device
An organic light-emitting display panel and a manufacturing method thereof and an organic light-emitting display device are provided. The organic light-emitting display panel includes a first light-emitting element, a second light-emitting element, a first color filter layer, a second color filter layer; a color of light emitted by the first light-emitting element is different from a color of light emitted by the second light-emitting element and is same as a color of the first color filter layer, and the color of the light emitted by the second light-emitting element is same as a color of the second color filter layer, a brightness attenuation speed of the light emitted by the first light-emitting element is faster than a brightness attenuation speed of the light emitted by the second light-emitting element; the first color filter layer has a first convex surface; and/or the second color filter layer has a first concave surface. |
| US11417707B2 |
Nonvolatile memory device of three-dimensional structure including resistance change element
A nonvolatile memory device according to an embodiment includes a substrate and a gate structure disposed on the substrate. The gate structure includes at least one gate electrode layer and at least one interlayer insulation layer that are alternately stacked. In addition, the nonvolatile memory device includes a hole pattern penetrating the gate structure on the substrate, and a gate insulation layer, a first ion retention layer, a second ion retention layer, and a channel layer sequentially covering a sidewall surface of the gate electrode layer in the hole pattern. The first and second ion retention layers comprise ions exchangeable with each other. |
| US11417706B2 |
Semiconductor storage device
A semiconductor storage device includes lower and upper bit lines, word lines between the bit lines, and memory cells between the bit lines and the word lines. The memory cells are divided into logical slices and a memory cell from each logical slice is selected when carrying out a read or write operation. A first logical slice includes memory cells, each of which is between one of two bit lines and one of three word lines that are adjacent to each other. The two bit lines include one lower bit line and one upper bit line. A second logical slice includes memory cells, each of which is between one of three bit lines and one of three word lines that are not adjacent to each other. The three bit lines include one lower bit line and two upper bit lines. |
| US11417705B2 |
RRAM memory cell and process to increase RRAM material area in an RRAM memory cell
A memory cell is disclosed. The memory cell includes a word line contact, a cylindrical electrode having a top region and a bottom region, and RRAM material covering the surface of the cylindrical electrode from the top region to the bottom region. A select transistor contact is coupled to the bottom region of the cylindrical electrode. |
| US11417704B2 |
Semiconductor device and electronic device
A semiconductor device that can perform product-sum operation with low power consumption is provided. The semiconductor device includes first and second circuits; the first circuit includes a first holding node and the second circuit includes a second holding node. The first circuit is electrically connected to first and second input wirings and first and second wirings, the second circuit is electrically connected to the first and second input wirings and the first and second wirings, and the first and second circuits each have a function of holding first and second potentials corresponding to first data at the first and second holding nodes. When a potential corresponding to second data is input to each of the first and second input wirings, the first circuit outputs a current to one of the first wiring and the second wiring and the second circuit outputs a current to the other of the first wiring and the second wiring. The currents output from the first and second circuits to the first wiring or the second wiring are determined in accordance with the first and second potentials held at the first and second holding nodes. |
| US11417703B2 |
Double color micro LED display panel
The present invention discloses a double color micro LED display panel including a plurality of pixels and a plurality of barrier components. Each of the pixels includes a substrate, a first metal layer disposed on the substrate, a first light emitting layer disposed on the first metal layer and emitting a first light, a second metal layer disposed on the first light emitting layer and a second light emitting layer disposed on the second metal layer and emitting a second light. The wavelength of the second light is different from that of the first light. The barrier components respectively located between the pixels for blocking a light emitted from one of the pixels to the other of the pixels. |
| US11417696B2 |
Imaging element comprising polarization unit with a conductive member as an electrode for a charge holder
A configuration is simplified of an imaging element including a polarizing unit that transmits light in a specific polarization direction. The imaging element includes a polarizing unit, a photoelectric conversion unit, a first charge holding unit, an image signal generation unit, and a second charge holding unit. The photoelectric conversion unit includes a conductive member and transmits the light in the specific polarization direction of incident light. The photoelectric conversion unit generates charge by photoelectric conversion based on the light transmitted through the polarizing unit. The first charge holding unit holds the charge generated. The image signal generation unit generates an image signal depending on the charge held in the first charge holding unit. The second charge holding unit includes the conductive member of the polarizing unit as an electrode, and holds the charge generated. |
| US11417692B2 |
Image sensing device
An image sensing device includes a plurality of image sensor pixels including a first image sensor pixel and a second image sensor pixel and a transmission driver. The transmission driver is coupled to first and second transfer gates to apply a first transmission signal to the first transfer gate to control the first transfer gate and a second transmission signal to the second transfer gate to control the second transfer gate. A first distance between the first image sensor pixel and the transmission driver is shorter than a second distance between the second image sensor pixel and the transmission driver, and the first and second transfer gates of the first image sensor pixel are different in structure from the first and second transfer gates of the second image sensor pixel, respectively. |
| US11417689B2 |
Display panel
The present application proposes a display panel, which includes a substrate, and a first thin film transistor and a second thin film transistor disposed on the substrate at intervals, wherein a first metal layer is disposed on a side of the oxide semiconductor layer away from the third gate, a first interlayer insulating layer is disposed between the first metal layer and the oxide semiconductor layer, a second gate insulating layer is disposed on a side of the first metal layer away from the oxide semiconductor layer, and the first metal layer includes a second gate corresponding to the oxide semiconductor layer. |
| US11417686B2 |
Display substrate and display device including the same
The present disclosure relates to a display substrate. The display substrate may include a substrate, a first lower gate electrode, an insulation pattern, a first insulation layer, and a first active pattern. The first lower gate electrode may be disposed on the substrate. The insulation pattern may be disposed on and patterned to correspond to the first lower gate electrode and may include a silicon nitride. The first insulation layer may be disposed on the insulation pattern and may include a silicon oxide. The first active pattern may be on the first insulation layer and formed of oxide semiconductor and may include a first channel region overlapping the first lower gate electrode and a first wiring region disposed on a side of the first channel region. |
| US11417680B2 |
Semiconductor memory device and manufacturing method thereof
There are provided a semiconductor memory device and a manufacturing method thereof. The semiconductor memory device includes a first select group and a second select group isolated from each other by an isolation insulating layer; an upper gate stack structure extending to overlap with the first select group, the isolation insulating layer, and the second select group; channel structures extending to penetrate the first select group, the second select group, and the upper gate stack structure; and a vertical connection structure spaced apart from the first select group, the second select group, and the upper gate stack structure, the vertical connection structure extending in parallel to the channel structures. |
| US11417679B2 |
Three-dimensional semiconductor memory device
According to one embodiment, a semiconductor memory device includes a substrate; an insulating layer provided on the substrate; a conductive layer provided on the insulating layer; a stacked body provided on the conductive layer and including a plurality of electrode layers and a plurality of insulating layers respectively provided among the plurality of electrode layers; a columnar section piercing through the stacked body to reach the conductive layer and extending in a first direction in which the stacked body is stacked; and a source layer. The columnar section includes a channel body and a charge storage film provided between the channel body and the respective electrode layers. The conductive layer includes a first film having electric conductivity and in contact with the lower end portion of the channel body; and an air gap provided to be covered by the first film. |
| US11417677B2 |
Semiconductor memory device
According to one embodiment, a semiconductor memory device includes a first conductive layer, and a first structure that extends in a first direction orthogonal to a stacking direction of a stacked body and the stacking direction, and reaches a position deeper than an upper surface of the first conductive layer. The first structure has a first width at a bottom of the stacked body, and a second width narrower than the first width, in a first depth region from a position of the upper surface of the first conductive layer to a first depth position. A third conductive layer is connected to a side surface of the first conductive layer in the first depth region in a second direction orthogonal to the stacking direction and the first direction. |
| US11417676B2 |
Methods of forming microelectronic devices and memory devices, and related microelectronic devices, memory devices, and electronic systems
A method of forming a microelectronic device comprises forming a memory array region comprising memory cells vertically over a base structure comprising a semiconductive material and alignment mark structures vertically extending into the semiconductive material. First contact structures are formed to extend through the memory array region and into the alignment mark structures. A support structure is formed over the memory array region. A portion of the base structure is removed to expose the alignment mark structures. A control logic region is formed vertically adjacent a remaining portion of the base structure. The control logic region comprises control logic devices in electrical communication with the first contact structures by way of second contact structures extending partially through the alignment mark structures and contacting the first contact structures. Microelectronic devices, memory devices, electronic systems, and additional methods are also described. |
| US11417675B2 |
Three-dimensional semiconductor memory devices
A three-dimensional semiconductor memory device including a peripheral circuit structure on a first substrate, the peripheral circuit structure including peripheral circuits, a second substrate on the peripheral circuit structure, an electrode structure on the second substrate, the electrode structure including a plurality of electrodes that are stacked on the second substrate and a penetrating interconnection structure penetrating the electrode structure and the second substrate may be provided. The penetrating interconnection structure may include a lower insulating pattern, a mold pattern structure on the lower insulating pattern, a protection pattern between the lower insulating pattern and the mold pattern structure, and a penetration plug. The penetration plug may penetrate the mold pattern structure and the lower insulating pattern and may be connected to the peripheral circuit structure. The protection pattern may be at a level lower than that of the lowermost one of the electrodes. |
| US11417673B2 |
Microelectronic devices including stair step structures, and related memory devices, electronic systems, and methods
A microelectronic device comprises a stack structure comprising alternating conductive structures and insulative structures arranged in tiers, the tiers individually comprising one of the conductive structures and one of the insulative structures, first support pillar structures extending through the stack structure within a first region of the microelectronic device, the first support pillar structures electrically isolated from a source structure underlying the stack structure, second support pillar structures extending through the stack structure within a second region of the microelectronic device, the second support pillar structures comprising an electrically conductive material in electrical communication with the source structure, and bridge structures extending between at least some neighboring first support pillar structures of the first support pillar structures. Related memory devices, electronic systems, and methods are also described. |
| US11417672B2 |
Semiconductor memory device and manufacturing method thereof
There are provided a semiconductor memory device and a manufacturing method thereof. The manufacturing method of the semiconductor memory device includes: forming a preliminary memory cell array that includes a gate stack structure and a channel structure, wherein the gate stack structure includes interlayer insulating layers and conductive patterns, alternately stacked on a first substrate, and wherein the channel structure has a first end portion that penetrates the gate stack structure and extends into the first substrate; forming a common source line to be in contact with a second end portion of the channel structure, the common source line formed on a first surface of the gate stack structure; removing the first substrate; and forming a bit line connected to the first end portion of the channel structure on a second surface of the gate stack structure that is opposite of the first surface of the gate stack structure. |
| US11417671B2 |
Memory device including pass transistors in memory tiers
Some embodiments include apparatuses and methods of using such apparatuses. One of the apparatuses includes a semiconductor material, a pillar extending through the semiconductor material, a select gate located along a first portion of the pillar, memory cells located along a second portion of the pillar, and transistors coupled to the select gate through a portion of the semiconductor material. The transistors include sources and drains formed from portions of the semiconductor material. The transistors include gates that are electrically uncoupled to each other. |
| US11417669B2 |
Stacked body semiconductor storage device having an electrode between a pillar and a wiring and insulating layers having different dielectric constants between the electrode and the wiring
A semiconductor memory device includes a semiconductor pillar including a semiconductor layer and extending along a first direction, a first wiring extending along a second direction crossing the first direction, a first electrode between the semiconductor pillar and the first wiring, a first insulating layer between the first electrode and the first wiring and adjacent to the first electrode, a second insulating layer between the first insulating layer and the first wiring and adjacent to the first insulating layer, the second insulating layer having a higher dielectric constant than the first insulating layer, and a third insulating layer between the second insulating layer and the first wiring. A shortest distance between the second insulating layer and the semiconductor layer in the second direction is greater than a shortest distance between the first electrode and the semiconductor layer in the second direction. |
| US11417668B2 |
Antifuse OTP structures with hybrid low-voltage devices
An antifuse One-Time-Programmable memory cell includes a substrate, and a hybrid select transistor and a hybrid antifuse capacitor formed on the substrate. The hybrid select transistor includes a first gate dielectric layer formed on the substrate, wherein the first gate dielectric layer is thinner than 40 nm, a first high-voltage junction formed in the substrate, and a low-voltage junction formed in the substrate. The hybrid antifuse capacitor includes a second gate dielectric layer, wherein the second gate dielectric layer is thinner than 40 nm, which enables a low-voltage antifuse capacitor device, a second gate formed on the gate dielectric layer, a second high-voltage junction formed in the substrate, and a third high-voltage junction formed in the substrate. |
| US11417667B2 |
Method for preparing semiconductor device with air gap structure
The present application discloses a method for preparing a semiconductor device with an air gap structure between conductive structures. The method includes: forming a first bit line, a second bit line, a first capacitor contact and a second capacitor contact over a semiconductor substrate, wherein the first capacitor contact and the second capacitor contact are disposed between the first bit line and the second bit line; forming a first dielectric layer over a sidewall of the first bit line, a sidewall of the second bit line, a sidewall of the first capacitor contact and a sidewall of the second capacitor contact such that an opening is formed and surrounded by the first dielectric layer; filling the opening with a dielectric structure; and removing the first dielectric layer to form an opening structure surrounding the dielectric structure. |
| US11417665B2 |
Semiconductor devices
A semiconductor device includes a plurality of conductive structures arranged on a substrate and spaced apart from each other in a second direction substantially perpendicular to a first direction, in which each of the plurality of conductive structures extends in the first direction. A plurality of contact structures are arranged between the conductive structures in an alternating arrangement and spaced apart from each other in the first direction. A plurality of insulation structures are arranged in a space between the conductive structures and between the contact structures. A plurality of air spacers are arranged between the alternating arrangement of the plurality of conductive structures and the plurality of contact structures, respectively and spaced apart from each other in the first direction. |
| US11417664B2 |
Semiconductor device
A semiconductor device includes a substrate including a first region having a first trench and a second region having a second trench. A first buried insulation layer pattern is disposed in the first trench. The second trench includes the first buried insulation layer pattern, a second buried insulation layer pattern, and a third buried insulation layer pattern sequentially stacked therein. A first buffer insulation layer is disposed on the substrate in the first and second regions and has a flat upper surface. A second buffer insulation layer is disposed on the first buffer insulation layer. A bit line structure is disposed on the first and second regions. A first portion of the bit line structure is disposed on the second buffer insulation layer and has a flat lower surface. A second portion of the bit line structure directly contacts a surface of the substrate in the first region. |
| US11417663B2 |
System and method for data collection and exchange with protected memory devices
A method, apparatus, and article of manufacture for collecting and exchanging data are disclosed. In one embodiment, the apparatus comprises a non-volatile memory device, which includes an interface for coupling the non-volatile memory device to a host system; non-volatile memory for storing data, including a plurality of executables at least two of which are executable on different operating systems or devices. The plurality of executables includes a data collection executable and a data transfer executable. The nonvolatile memory device also includes a controller to cause execution of at least one executable in the plurality of executables, including the data collection executable and the data transfer executable, where execution of the data collection executable causes data to be collected and stored in the non-volatile memory, and execution of which causes the collected data to be transferred to a location external to the non-volatile memory device. |
| US11417660B2 |
Semiconductor device and method for fabricating the same
A semiconductor device includes a stacked line structure including a bit line over a substrate, an active layer positioned at a higher level than the stacked line structure and parallel to the bit line, a capacitor positioned at a higher level than the active layer, a first plug extending downwardly to be coupled to the bit line through the active layer, a second plug formed between the active layer and the capacitor, and a word line extending in a direction that intersects with the bit line while intersecting with the active layer. |
| US11417659B2 |
Semiconductor memory device and method of fabricating the same
Disclosed are semiconductor memory devices and methods of fabricating the same. The method including forming a mold structure by alternately stacking a plurality of first insulating layers and a plurality of second insulating layers on a substrate, patterning the mold structure to form a first trench that exposes a first inner sidewall of the mold structure, growing a vertical semiconductor layer in the first trench such that a vertical semiconductor layer covers the first inner sidewall, using the substrate as a seed to, patterning the mold structure to form a second trench that exposes a second inner sidewall of the mold structure, forming a plurality of recesses by selectively removing the second insulating layers from the mold structure through the second trench, and horizontally growing a plurality of horizontal semiconductor layers in corresponding recesses, using the vertical semiconductor layer as a seed may be provided. |
| US11417654B2 |
Integrated circuit structure with semiconductor devices and method of fabricating the same
An integrated circuit (IC) structure includes a substrate having several regions, several semiconductor devices formed at the substrate and respectively within the regions, and an ultra-deep (UD) trench isolation structure formed in the substrate. The substrate has a top surface and a bottom surface oppositely, and the UD trench isolation structure formed in the substrate surrounds peripheries of each of the regions for structurally and physically isolating the semiconductor devices within different regions. The UD trench isolation structure penetrates the substrate by extending from the top surface of the substrate to the bottom surface of the substrate. |
| US11417633B2 |
Integrated circuit package and method
An embodiment includes a first package component including a first integrated circuit die and a first encapsulant at least partially surrounding the first integrated circuit die. The device also includes a redistribution structure on the first encapsulant and coupled to the first integrated circuit die. The device also includes a first thermal module coupled to the first integrated circuit die. The device also includes a second package component bonded to the first package component, the second package component including a power module attached to the first package component, the power module including active devices. The device also includes a second thermal module coupled to the power module. The device also includes a mechanical brace extending from a top surface of the second thermal module to a bottom surface of the first thermal module, the mechanical brace physically contacting the first thermal module and the second thermal module. |
| US11417632B2 |
RF devices with enhanced performance and methods of forming the same
The present disclosure relates to a radio frequency device that includes a transfer device die and a multilayer redistribution structure underneath the transfer device die. The transfer device die includes a device region with a back-end-of-line (BEOL) portion and a front-end-of-line (FEOL) portion over the BEOL portion and a transfer substrate. The FEOL portion includes isolation sections and an active layer surrounded by the isolation sections. A top surface of the device region is planarized. The transfer substrate including a porous silicon (PSi) region resides over the top surface of the device region. Herein, the PSi region has a porosity between 1% and 80%. The multilayer redistribution structure includes a number of bump structures, which are at a bottom of the multilayer redistribution structure and electrically coupled to the FEOL portion of the transfer device die. |
| US11417627B2 |
Micro LED display and manufacturing method with conductive film
A micro LED display manufacturing method according to various embodiments may include: a first operation of bonding an anisotropic conductive film including a plurality of conductive particles onto one surface of a prepared substrate, the one surface including a circuit part; a second operation of forming a bonding layer on the anisotropic conductive film; a third operation of positioning a plurality of micro LED chips above the bonding layer, the micro LED chips being arranged on a carrier substrate while being spaced a first distance apart from the substrate; a fourth operation of attaching the plurality of micro LED chips onto the bonding layer by means of laser transfer; and a fifth operation of forming a conductive structure for electrically connecting a connection pad to the circuit part through the conductive particles by means of heating and pressurizing. |
| US11417625B2 |
Semiconductor device having an electrical connection between semiconductor chips established by wire bonding, and method for manufacturing the same
A method for manufacturing a semiconductor device includes (i) a step of preparing a first semiconductor chip having a first electrode pad thereon and a second semiconductor chip having a second electrode pad thereon and larger in thickness than the first semiconductor chip, the second electrode pad being larger in size than the first electrode pad, (ii) a step of mounting the first semiconductor chip and the second semiconductor chip on the same planarized surface of a substrate having a uniform thickness, (iii) a step of bonding a ball formed by heating and melting a bonding wire to the second electrode pad, (iv) a step of first-bonding the bonding wire to the first electrode pad, and (v) a step of second-bonding the bonding wire to the ball. |
| US11417623B2 |
Semiconductor chip and semiconductor device including a copper pillar and an intermediate layer
A semiconductor device includes a semiconductor layer having a first surface, an insulating layer formed at the first surface of the semiconductor layer, a Cu conductive layer formed on the insulating layer, the Cu conductive layer made of a metal mainly containing Cu, a second insulating layer formed on the insulating layer, the second insulating layer covering the Cu conductive layer, a Cu pillar extending in a thickness direction in the second insulating layer, the Cu pillar made of a metal mainly containing Cu and electrically connected to the Cu conductive layer, and an intermediate layer formed between the Cu conductive layer and the Cu pillar, the intermediate layer made of a material having a linear expansion coefficient smaller than a linear expansion coefficient of the Cu conductive layer and smaller than a linear expansion coefficient of the Cu pillar. |
| US11417621B2 |
Memory die with source side of three-dimensional memory array bonded to logic die and methods of making the same
A memory die includes an alternating stack of insulating layers and electrically conductive layers located between a drain-side dielectric layer and a source-side dielectric layer. Memory openings vertically extend through the alternating stack. Each of the memory openings has a greater lateral dimension an interface with the source-side dielectric layer than at an interface with the drain-side dielectric layer. Memory opening fill structures are located in the memory openings. Each of the memory opening fill structures includes a vertical semiconductor channel, a vertical stack of memory elements, and a drain region. A logic die may be bonded to a source-side dielectric layer side of the memory die. |
| US11417619B2 |
Package and manufacturing method thereof
A package includes a first die, a second die, an encapsulant, and through insulating vias (TIV). The first die has a first bonding structure. The first bonding structure includes a first dielectric layer and first connectors embedded in the first dielectric layer. The second die has a second bonding structure. The second bonding structure includes a second dielectric layer and second connectors embedded in the second dielectric layer. The first dielectric layer is hybrid bonded to the second dielectric layer. The first connectors are hybrid bonded to the second connectors. The encapsulant laterally encapsulates the second die. The TIVs penetrate through the encapsulant and are connected to the first bonding structure. |
| US11417618B2 |
Semiconductor device including redistribution layer and method for fabricating the same
A semiconductor device includes: a lower structure; a redistribution insulating layer disposed over the lower structure; a redistribution conductive layer disposed over the redistribution insulating layer and electrically connected to a part of the lower structure, the redistribution conductive layer including a redistribution pad; and a protective layer covering the redistribution insulating layer and the redistribution conductive layer while leaving the redistribution pad exposed. The redistribution conductive layer includes a trench disposed adjacent to the redistribution pad, and a part of the protective layer fills the trench. |
| US11417613B2 |
Semiconductor package
A semiconductor package includes: a frame substrate having a plurality of wiring layers and a cavity; an adhesive member disposed at the bottom of the cavity; a semiconductor chip disposed in the cavity, with a connection pad on an upper surface and the lower surface in contact with the adhesive member; a first conductive bump disposed on the connection pad; a second conductive bump disposed on the uppermost of the plurality of wiring layers; an insulating post disposed in the cavity and whose lower surface contacts the adhesive member; an encapsulant filling the cavity and covering side surfaces of the first and second conductive bumps and the insulating post’ and a redistribution structure disposed on the encapsulant, including a redistribution layer electrically connected to the first and second conductive bumps, wherein the insulating post includes a material having a greater hardness than that of the first and second conductive bumps. |
| US11417612B2 |
Semiconductor package
A semiconductor package includes a support frame, and including a cavity, a semiconductor chip disposed in the cavity and having an active surface on which contact pads are arranged, and a connection member on the support frame and on the active surface of the semiconductor chip. The semiconductor chip includes a first insulating film disposed on the active surface and exposing the contact pads, a second insulating film disposed on the first insulating film and including a first opening exposing connection regions of the contact pads, and a conductive crack preventing layer disposed on the connection regions and having an outer peripheral region extending to a portion of the second insulating film around the first opening. The connection member includes an insulating layer including a second opening exposing the connection regions; and a redistribution layer connected to the contact pads through the second opening. |
| US11417611B2 |
Devices and methods for reducing stress on circuit components
The present disclosure relates to integrated circuits which include various structural elements designed to reduce the impact of strain on the electronic components of the circuit. In particular, a combination of trenches and cavities are used to mechanically isolate the integrated circuit from the surrounding substrate. The trenches may be formed such that they surround the integrated circuit, and the cavities may be formed under the integrated circuit. As such, the integrated circuit may be formed on a portion of the substrate that forms a platform. In order that the platform does not move, it may be tethered to the surrounding substrate. By including such mechanical elements, variation in the electrical characteristics of the integrated circuit are reduced. |
| US11417610B2 |
Post-passivation interconnect structure
A semiconductor device includes a semiconductor substrate, a passivation layer overlying the semiconductor substrate, and an interconnect structure overlying the passivation layer. The interconnect structure includes a landing pad region and a dummy region electrically separated from each other. A protective layer is formed on the interconnect structure and has a first opening exposing a portion of the landing pad region and a second opening exposing a portion of the dummy region. A metal layer is formed on the exposed portion of landing pad region and the exposed portion of the dummy region. A bump is formed on the metal layer overlying the landing pad region. |
| US11417608B2 |
Semiconductor device with EMI protection structure and method for fabricating the same
The present application discloses a semiconductor device with an electromagnetic interference protection structure and a method for fabricating the semiconductor device. The semiconductor device includes a connection structure having a connection dielectric layer, a first conductive plate positioned in the connection dielectric layer and electrically coupled to a supply voltage, a first bottom protection layer positioned below the first conductive plate, and a first top protection layer positioned on the first conductive plate, and a connection conductive layer positioned in the connection dielectric layer. The first bottom protection layer and the first top protection layer are formed of manganese-zinc ferrite, nickel-zinc ferrite, cobalt ferrite, strontium ferrite, barium ferrite, lithium ferrite, lithium-zinc ferrite, single crystal yttrium iron garnet, or gallium substituted single crystal yttrium iron garnet. |
| US11417605B2 |
Reconstituted substrate for radio frequency applications
The present disclosure relates to methods and apparatus for forming thin-form-factor reconstituted substrates and semiconductor device packages for radio frequency applications. The substrate and package structures described herein may be utilized in high-density 2D and 3D integrated devices for 4G, 5G, 6G, and other wireless network systems. In one embodiment, a silicon substrate is structured by laser ablation to include cavities for placement of semiconductor dies and vias for deposition of conductive interconnections. Additionally, one or more cavities are structured to be filled or occupied with a flowable dielectric material. Integration of one or more radio frequency components adjacent the dielectric-filled cavities enables improved performance of the radio frequency elements with reduced signal loss caused by the silicon substrate. |
| US11417603B2 |
Semiconductor devices
A semiconductor device a substrate; conductive patterns on the substrate, the conductive patterns being spaced apart from each other in a vertical direction perpendicular to a surface of the substrate, and an edge of the conductive patterns including a step portion such that an end of one conductive pattern is not overlapped in the vertical direction with conductive patterns positioned thereover; insulation patterns between the conductive patterns; sidewall insulation patterns on the sidewalls of the conductive patterns to cover sidewalls of the conductive patterns; upper pad patterns on upper surfaces of the step portion of the conductive patterns and upper surfaces of a portion of the sidewall insulation patterns; an insulating interlayer covering the conductive patterns, the insulation patterns, the sidewall insulation patterns, and the upper pad patterns; and contact plugs passing through the insulating interlayer, the contact plugs contacting the upper pad patterns, respectively. |
| US11417595B2 |
Semiconductor package and method of manufacturing the same
A semiconductor package includes a redistribution substrate having first and second surfaces, and an insulating member and a plurality of redistribution layers on different levels in the insulating member and electrically connected together; a plurality of under bump metallurgy (UBM) pads in the insulating member and connected to a redistribution layer, among the plurality of redistribution layers, adjacent to the first surface, the UBM pads having a lower surface exposed to the first surface of the redistribution substrate; a dummy pattern between the UBM pads in the insulating member, the dummy pattern having a lower surface located at a level higher than the lower surface of the UBM pads; and at least one semiconductor chip on the second surface of the redistribution substrate and having a plurality of contact pads electrically connected to a redistribution layer, among the plurality of redistribution layers, adjacent to the second surface. |
| US11417592B2 |
Methods of utilizing low temperature solder assisted mounting techniques for package structures
Methods/structures of joining package structures are described. Those methods/structures may include a device disposed on first side of substrate and an array of conductive interconnect structures disposed on a second side of the first substrate. The conductive interconnect structures of the array may comprise a solder material, wherein the solder material comprises a low temperature alloying element concentration of less than about 5 percent. A second substrate is coupled to the array of conductive interconnect structures. |
| US11417589B2 |
Semiconductor device and a method of manufacturing a semiconductor device
In one example, a semiconductor device comprises a substrate having a top surface and a bottom surface, an electronic device on the bottom surface of the substrate, a leadframe on the bottom surface of the substrate, the leadframe comprising a paddle, wherein the paddle is coupled to the electronic device, and a lead electrically coupled to the electronic device. The semiconductor device further comprises a first protective material contacting the bottom surface of the substrate and a side surface of the electronic device. |
| US11417586B2 |
Thermal management solutions for substrates in integrated circuit packages
An integrated circuit structure may be formed having a substrate, at least one integrated circuit device embedded in and electrically attached to the substrate, and at least one heat transfer fluid conduit extending through the substrate, wherein the heat transfer fluid conduit is electrically attached to the at least one integrated circuit device. In one embodiment, the at least one heat transfer fluid conduit is a power transfer route for the at least one integrated circuit device. |
| US11417582B2 |
Package structure and method of manufacturing the same
A package structure includes a semiconductor die, an insulating encapsulation, a first redistribution circuit structure and a surface-modifying film. The semiconductor die has conductive terminals. The insulating encapsulation laterally encapsulates the semiconductor die and exposes the conductive terminals. The first redistribution circuit structure is located over the insulating encapsulation and electrically connected to the semiconductor die. The surface-modifying film is located on the insulating encapsulation and has a plurality of openings exposing edges of the conductive terminals, wherein the surface-modifying film separates the first redistribution circuit structure from the insulating encapsulation. |
| US11417581B2 |
Package structure
A semiconductor package is provided and includes: an insulative layer having opposing first and second surfaces; a wiring layer embedded in the insulative layer and having a first side that is exposed from the first surface of the insulative layer and a second side opposing the first side and attached to the second surface of the insulative layer; at least one electronic component mounted on the second side of the wiring layer and electrically connected to the wiring layer; and an encapsulating layer formed on the second side of the wiring layer and the second surface of the insulative layer and encapsulating the electronic component. Therefore, the single wiring layer is allowed to be connected to the electronic component on one side and connected to solder balls on the other side thereof to shorten the signal transmission path. |
| US11417579B2 |
Packaged semiconductor devices for high voltage with die edge protection
In a described example a device includes: a first corner formed between a circuit side surface of a semiconductor die and a first sidewall formed with a first depth extending along a side of the semiconductor die from the circuit side surface; a ledge having a planar surface formed parallel to the circuit side surface of the semiconductor die formed at the first depth from the circuit side surface at the first corner, and being perpendicular to the first sidewall; a second corner formed by an intersection of the planar surface of the ledge and a scribe lane sidewall of the semiconductor die, forming a second sidewall perpendicular to the circuit side surface; and portions of the circuit side surface of the semiconductor die, the first corner, the first sidewall, and the planar surface of the ledge covered by a passivation layer. |
| US11417576B2 |
Seal for microelectronic assembly
Representative implementations of techniques and devices provide seals for sealing the joints of bonded microelectronic devices as well as bonded and sealed microelectronic assemblies. Seals are disposed at joined surfaces of stacked dies and wafers to seal the joined surfaces. The seals may be disposed at an exterior periphery of the bonded microelectronic devices or disposed within the periphery using the various techniques. |
| US11417574B2 |
Semiconductor device with testing structure and method for fabricating the same
The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a first testing area, a word line structure positioned in the first testing area and arranged parallel to a first axis, a first column of capacitor contact structures positioned in the first testing area and arranged parallel to a second axis perpendicular to the first axis, a second column of capacitor contact structures positioned adjacent to the first column of capacitor contact structures and arranged parallel to the first column of capacitor contact structures, and a first testing structure including a first drain portion extended along the second axis and a first source portion extended along the second axis. The first drain portion is positioned on the first column of capacitor contact structures and the first source portion is positioned on the second column of capacitor contact structures. |
| US11417571B2 |
Dopant profile control in gate structures for semiconductor devices
A semiconductor device with different gate structure configurations and a method of fabricating the same are disclosed. The semiconductor device includes a fin structure disposed on a substrate, and first and second gate structures on the fin structure. The first and second gate structures includes first and second interfacial oxide layers, respectively, first and second high-K gate dielectric layers disposed on the first and second IO layers, respectively, and first and second dopant control layers disposed on the first and second HK gate dielectric layers, respectively. The second dopant control layer has a silicon-to-metal atomic concentration ratio greater than an Si-to-metal atomic concentration ratio of the first dopant control layer. The semiconductor further includes first and second work function metal layers disposed on the first and second dopant control layers, respectively, and first and second gate metal fill layers disposed on the first and second work function metal layers, respectively. |
| US11417565B2 |
Methods of forming high aspect ratio openings and methods of forming high aspect ratio features
Methods of forming high aspect ratio openings. The method comprises removing a portion of a dielectric material at a temperature less than about 0° C. to form at least one opening in the dielectric material. The at least one opening comprises an aspect ratio of greater than about 30:1. A protective material is formed in the at least one opening and on sidewalls of the dielectric material at a temperature less than about 0° C. Methods of forming high aspect ratio features are also disclosed, as are semiconductor devices. |
| US11417554B2 |
Substrate storage container and method of manufacturing the same
There is provided a substrate storage container 1 capable of suppressing deformation of a functional member insert-molded and a method of manufacturing the container 1, and an device positioning member 4 as the functional member including: an attachment part 41 having a thick section 413 formed in thickness equal to a wall member of a container body 10 or a lid 20 and a thin section 410 decreasing in thickness as it approaches toward an outer edge from the thick section 413; and a body part 42 coupled to the attachment part 41, the device positioning member 4 being disposed on the container body 10 or the lid 20 so that a first surface 420 of the thick section 413 is flush with an inner surface of the wall member. |
| US11417553B2 |
Substrate deformation detection and correction
A method and apparatus for detecting and correcting incoming substrate deformation is disclosed. Substrates are positioned in a first process chamber, where the presence and type of substrate bow is detected. Based upon the detection of substrate bow, and a determination of whether the substrate has a compressive bow or a tensile bow, a substrate processing program is selected for execution. The substrate processing program can be executed in the first process chamber or in a second process chamber to correct or alleviate the bow prior to or during further processing of the substrate. |
| US11417551B2 |
Melt detection systems and methods of using the same
High bandwidth time-and-space resolved phase transition microscopy systems configured to detect melt onset in a wafer being processed by laser annealing systems with ultra-short dwell times and spot size. |
| US11417547B1 |
Peeling apparatus
A peeling apparatus includes a discarding unit configured to discard a protective member by stacking the protective member in a trash box. The discarding unit includes an inclined dropping unit configured to drop the protective member obliquely downward to an opening of the trash box, and a first inclined plate and a second inclined plate that arranged so as to face each other in a direction orthogonal to a traveling direction of the protective member when the protective member dropping obliquely downward above the opening is viewed from above. The first inclined plate and the second inclined plate are arranged such that a gap through which the protective member can pass is formed between a lower side of the first inclined plate and a lower side of the second inclined plate, and the first inclined plate and the second inclined plate are inclined. |
| US11417546B2 |
Method and apparatus for transferring micro device, and electronic product using the same
An exemplary embodiment of the present invention provides a method of transferring a micro device. The method of transferring the micro device includes: separating a transferring film from a micro device transferred to a target substrate and bending the transferring film upwardly to form a bent circular arc, and pressurizing an upper transferring film fed after the bent circular arc is formed by a pressurizing roller rotating at an upper side of the target substrate. |
| US11417544B2 |
Expanding apparatus
An expanding apparatus for expanding an expansion sheet to which a workpiece including at least a ductile material is adhered. The expanding apparatus includes expanding means for expanding the expansion sheet. The expanding means includes a plurality of moving units that are each configured and arranged to move an associated holding unit, and wherein each of the holding units is configured and arranged to clamp and hold a portion of the expansion sheet. The apparatus also includes cooling/heating means with a plate having a contact surface for contacting the workpiece, and a Peltier element for cooling or heating the plate. Finally, the apparatus includes a polarity change-over means for changing over the polarity of current passed to the Peltier element, wherein the polarity change-over means is configured and arranged to be switched between one status in which the plate is cooled and another status in which the plate is heated. |
| US11417543B2 |
Bonding apparatus and bonding method
A bonding apparatus includes a first holder, a second holder, an imaging unit and a moving device. The first holder is configured to hold a first substrate. The second holder is disposed to face the first holder and configured to hold a second substrate to be bonded to the first substrate. The imaging unit includes a first imaging device configured to image a first alignment mark formed on a surface of the first substrate facing the second substrate and a second imaging device configured to image a second alignment mark formed on a surface of the second substrate facing the first substrate. The moving device is configured to move the imaging unit in a first direction and a second direction intersecting with the first direction within a plan region between the first holder and the second holder. |
| US11417540B2 |
3D printed semiconductor package
In described examples, a method for encapsulating a semiconductor device includes the steps of immersing a layer of the semiconductor device in a liquid encapsulation material, irradiating portions of the liquid encapsulation material to polymerize the liquid encapsulation material, and moving the semiconductor device further from a surface of the liquid encapsulation material proximate to the layer. Immersing the semiconductor device is performed to cover a layer of the device in the liquid encapsulation material. Targeted locations of the liquid encapsulation material covering the layer are irradiated to form solid encapsulation material. The semiconductor device is moved from a surface of the liquid encapsulation material so that a new layer of the semiconductor device and/or of the solid encapsulation material can be covered by the liquid encapsulation material. The irradiating and moving steps are then repeated until a three dimensional structure on the semiconductor device is formed using the solid encapsulation material. |
| US11417539B2 |
Bump structure and method of making the same
In a method of manufacturing a semiconductor device first conductive layers are formed over a substrate. A first photoresist layer is formed over the first conductive layers. The first conductive layers are etched by using the first photoresist layer as an etching mask, to form an island pattern of the first conductive layers separated from a bus bar pattern of the first conductive layers by a ring shape groove. A connection pattern is formed to connect the island pattern and the bus bar pattern. A second photoresist layer is formed over the first conductive layers and the connection pattern. The second photoresist layer includes an opening over the island pattern. Second conductive layers are formed on the island pattern in the opening. The second photoresist layer is removed, and the connection pattern is removed, thereby forming a bump structure. |
| US11417534B2 |
Selective material removal
Exemplary methods for removing nitride may include flowing a fluorine-containing precursor into a remote plasma region of a semiconductor processing chamber. The methods may further include forming a plasma within the remote plasma region to generate plasma effluents of the fluorine-containing precursor and flowing the plasma effluents into a processing region of the semiconductor processing chamber housing a substrate. The substrate may include a high-aspect-ratio feature. The substrate may further include a region of exposed nitride and a region of exposed oxide. The methods may further include providing a hydrogen-containing precursor to the processing region to produce an etchant. At least a portion of the exposed nitride may be removed with the etchant. |
| US11417533B1 |
Manufacturing method of semiconductor structure
The present disclosure provides a method of manufacturing a semiconductor structure, including: providing a base; forming first mask layers and second mask layers on the base, wherein the first mask layers each extend along a first direction, the second mask layers each extend along a second direction, the first direction is different from the second direction, and the first mask layers intersect the second mask layers; cutting off the first mask layers to form first sub-mask layers, wherein the second mask layers each span a plurality of the first sub-mask layers, and partial sidewalls of each of the first sub-mask layers are covered by the second mask layers; etching the base by using a first etching process, to form active regions; forming a isolation structure; and forming word line trench. |
| US11417532B2 |
Method for reducing mismatch of semiconductor element patterns
The invention provides a method for reducing mismatch of semiconductor device patterns, which comprises the following steps: defining an initial lithography area which partially overlaps a target gate structure, a first gate structure and a second gate structure; if a length and a width of the target gate structure are smaller than a preset channel length and a preset channel width respectively, adjusting and reducing the area of the initial lithography area to define a second lithography area. The second lithography area partially overlaps with the target gate structure but does not overlap with the first gate structure and the second gate structure, and the second lithography region is defined as the active area. |
| US11417526B2 |
Multiple patterning processes
A method of forming a device includes depositing a first etch mask layer over a mandrel formed using a lithography process. The method includes depositing a second etch mask layer over the first etch mask layer. The method includes, using a first anisotropic etching process, etching the first etch mask layer and the second etch mask layer to form an etch mask including the first etch mask layer and the second etch mask layer. The method includes removing the mandrel to expose an underlying surface of the layer to be patterned. The method includes, using the etch mask, forming a feature by performing a second anisotropic etching process to pattern the layer to be patterned, where during the first anisotropic etching process, the first etch mask layer etches at a first rate and the second etch mask layer etches at a second rate, and where the first rate is different from the second rate. |
| US11417522B2 |
Two-dimensional AIN material and its preparation method and application
The present invention discloses a two-dimensional AlN material and its preparation method and application, wherein the preparation method comprises the following steps: (1) selecting a substrate and its crystal orientation; (2) cleaning the surface of the substrate; (3) transferring a graphene layer to the substrate layer; (4) annealing the substrate; (5) using the MOCVD process to introduce H2 to open the graphene layer and passivate the surface of the substrate; and (6) using the MOCVD process to grow a two-dimensional AlN layer. The preparation method of the present invention has the advantages that the process is simple, time saving and efficient. Besides, the two-dimensional AlN material prepared by the present invention can be widely used in HEMT devices, deep ultraviolet detectors or deep ultraviolet LEDs, and other fields. |
| US11417521B2 |
Film forming method and film forming apparatus
A film forming method forms a silicon film on a substrate placed on a turntable which rotates and passes through first and second process regions that are mutually separated along a circumferential direction inside a vacuum chamber that is settable to a first temperature at which Si—H bond dissociation can occur. A film forming process includes forming a molecular layer of SiH3 on the substrate, by supplying a Si2H6 gas that is set to a second temperature higher than the first temperature during a time period in which the substrate passes through the first process region, and forming a molecular layer of SiCl3 on the substrate having the molecular layer of SiH3 formed thereon while causing the Si—H bond dissociation in the molecular layer of SiH3, by supplying a gas including silicon and chlorine during a time period in which the substrate passes through the second process region. |
| US11417517B2 |
Treatments to enhance material structures
A method of forming a high-K dielectric cap layer on a semiconductor structure formed on a substrate includes depositing the high-K dielectric cap layer on the semiconductor structure, depositing a sacrificial silicon cap layer on the high-K dielectric cap layer, performing a post cap anneal process to harden and densify the as-deposited high-K dielectric cap layer, and removing the sacrificial silicon cap layer. |
| US11417515B2 |
Methods for depositing blocking layers on metal surfaces
Methods of enhancing selective deposition are described. In some embodiments, a blocking layer is deposited on a metal surface before deposition of a dielectric. In some embodiments, a metal surface is functionalized to enhance or decrease its reactivity. |
| US11417511B1 |
Method for drying wafer at room temperature
A method for drying a wafer at room temperature includes a cleaning step, a reacting step and a pressure releasing step. The cleaning step includes putting a processing workpiece into a cleaning solvent. The reacting step includes putting the processing workpiece along with the cleaning solvent into a reaction chamber, implanting a supercritical fluid into the reaction chamber, and increasing a pressure of the reaction chamber to dissolve the cleaning solvent in the supercritical fluid. A critical temperature of the supercritical fluid is below room temperature. The pressure releasing step includes releasing the pressure of the reaction chamber and discharging the supercritical fluid together with the cleaning solvent out of the reaction chamber, after completely dissolving the cleaning solvent in the supercritical fluid. |
| US11417509B2 |
Current detection device and spectrometer using ihe same
A device of detecting a current from a sensor is disclosed. The device includes an integrating circuit including a network of capacitors for providing a gain setting and configured to convert the current to a voltage ramp over a length of integration time, the integrating circuit further including a reset switch configured to connect an input and an output of the network of capacitors; an ADC configured to digitize the voltage ramp into a plurality of voltage samples; and a set of modules including an analyzing module configured to analyze the plurality of voltage samples to determine a slope of the voltage ramp; an outputting module configured to determine a magnitude of the current based on the slope of the voltage ramp and the gain setting; and a reconfiguring module that is configured to reconfigure the network of capacitors and reset the voltage ramp via the reset switch. |
| US11417506B1 |
Apparatus including thermal energy harvesting thermionic device integrated with electronics, and related systems and methods
Embodiments relate to an apparatus that includes an electronics layer with at least one electronic component, and a thermal energy harvesting thermionic device to receive thermal energy and generate an electrical output for powering the electronic component. The thermionic device includes a cathode, an anode spaced from the cathode, and a plurality of nanoparticles in at least one medium contained between the cathode and the anode to permit electron transfer between the cathode and the anode. An intermediate layer is positioned between the thermionic device and the electronics layer. The intermediate layer is made of a gradient thermal expansion material (TEM). Related systems and methods are also provided. |
| US11417503B2 |
Metal component and manufacturing method thereof and process chamber having the metal component
This invention relates to a metal component, a manufacturing method thereof, and a process chamber having the metal component, and particularly to a metal component useful in a display or semiconductor manufacturing process, a manufacturing method thereof, and a process chamber having the metal component, wherein among addition elements of an aluminum alloy that constitutes the metal substrate of the metal component, the addition element existing on the surface thereof is removed, and a barrier layer having no pores is formed, thereby solving problems attributable to a conventional anodized film having a porous layer and attributable to the addition element in the form of particles on the surface of the metal substrate. |
| US11417500B2 |
Plasma processing apparatus and plasma processing method
A disclose substrate support of a plasma processing apparatus has an electrostatic chuck that holds an edge ring. The electrostatic chuck includes a first electrode and a second electrode. In an execution period of a first plasma processing on a substrate, first potentials which are ones out of potentials same as each other and potentials different from each other are set to the first and second electrodes, respectively. In an execution period of a second plasma processing on the substrate, second potentials which are others out of the potentials same as each other and the potentials different from each other are set to the first and second electrodes, respectively. The respective potentials of the first electrode and the second electrode are switched from the first potentials to the second potentials. |
| US11417496B2 |
Stage device, charged particle beam apparatus, and vacuum apparatus
The problem addressed by the present disclosure is to provide a stage device, a charged particle beam device, and a vacuum device, with which it is possible to increase the speed and the acceleration of positioning and to suppress the leakage of a magnetic field. As a means to resolve this problem, a stage device 100 comprises a support stage 10, a floating mechanism 20, and a movement stage 30. The movement stage 30 has a propulsion-applying unit 36, and the support stage 10 has a propulsion-receiving unit 11. The stage device 100 is configured so that when the movement stage 30 moves and the propulsion-applying unit 36 contacts or approaches the propulsion-receiving unit 11, the propulsion-applying unit 36 applies propulsion in the movement direction to the propulsion-receiving unit 11. |
| US11417486B2 |
Multipurpose relay control
A method of controlling the behavior of a latching relay includes receiving a configuration signal of either a first behavior signal or a second behavior signal, receiving a power status signal of either a powered or unpowered signal, receiving either a low-to-high or a high-to-low signal command signal, generating latching pulse in response to receiving a powered signal input as the power status signal and a low-to-high signal as the command signal, generating an unlatching pulse in response to receiving a powered signal input as the power status signal and a high-to-low signal as the command signal input, and generating an unlatching pulse in response to receiving the second behavior signal as the configuration signal and the unpowered signal as the power status signal. |
| US11417484B2 |
Contactor
A contactor is provided in the present utility model, the contactor comprising: a housing; a static iron core, a movable iron core, and a contact holder positioned in the housing, wherein the static iron core is fixed to the housing, the movable iron core and the static iron core are disposed opposite to each other, and the contact holder is fixed to the movable iron core; and a built-in switch positioned in the housing, wherein the built-in switch comprises a static contact piece fixed to the housing and a moving contact piece fixed to the contact holder, and the contact holder is configured to drive the moving contact piece to move so as to switch an on/off state of the built-in switch. The contactor of the present utility model has high expandability and improves the convenience of connecting to an external circuit module. |
| US11417483B2 |
Power contactor and method for producing a housing body for the power contactor
A power contactor and a method for producing a housing body for a power contactor are disclosed. In an embodiment a power contactor includes a first electrical contact, a second electrical contact, a switch element configured to provide an opened position and a closed position, wherein the switch element, in the closed position, contacts the first electrical contact and the second electrical contact with one another, and wherein the first electrical contact and the second electric contact are insulated from one another when the switch element is in the opened position and at least one temperature sensor integrated into the power contactor, wherein the sensor is configured to detect a temperature of the power contactor in a pre-defined distance from the first electrical contact and/or the second electrical contact. |
| US11417481B2 |
Switch assembly
A structure for closing an actuator in a magnetically actuated switch assembly, where the actuator includes an armature and a winding, and the switch assembly includes a manual actuation device coupled to one end of the armature and a movable terminal in a vacuum interrupter coupled to an opposite end of the armature. The structure includes commencing a closing operation of the actuator using the manual actuation device to move the armature towards a closed latch position, detecting that the actuator is being manually closed, and energizing the winding to assist moving the armature to the closed latch position when the armature gets to a predetermined distance from the closed latch position. |
| US11417480B2 |
Electrode for a circuit breaker and the circuit breaker
The disclosure relates to the field of circuit breakers, in particular to an electrode for a circuit breaker and the circuit breaker, wherein the electrode includes an electrical terminal configured to input and output electrical power to the electrode, a stationary contact electrically connected to the electrical terminal and fixed to the electrical terminal, a movable contact configured to rotatably engage the stationary contact, an arc chute arranged on the electrical terminal and adjacent to the stationary contact, and a magnetic member arranged to generate a magnetic field force when the movable contact is disconnected from the stationary contact so as to push an arc formed between the movable contact and the stationary contact towards the arc chute. |
| US11417479B2 |
Arrangement and method for switching high currents in high-, medium- and/or low-voltage engineering
An arrangement and a method for switching high currents include at least one vacuum switching path and at least one rated-current contact switching path. The at least two switching paths are electrically connected in parallel. One current path for a rated current is routed over at least one rated-current contact of said rated-current contact switching path, and a parallel current path for a short-circuit current is routed over at least one contact of a vacuum tube of the vacuum switching path. |
| US11417478B2 |
Multidirectional input apparatus with switch and multidirectional input system with switch
A multidirectional input apparatus with a switch includes a strain generating body including at least a cylindrical portion and a first plate portion; a plurality of strain sensors; a wiring substrate; a contact rubber configuring the switch together with an electrode on the wiring substrate; and a button. The contact rubber includes a base portion, a movable portion, and a deformable portion. The movable portion is movable to a first position when the deformable portion is not deformed, and to a second position when the deformable portion is deformed. A center of a lower surface of the button contacts an upper surface of the movable portion when the movable portion is at the first and second positions. When the movable portion moves from the first position to the second position and contacts the electrode, a protruding portion on the lower surface of the button presses the wiring substrate. |
| US11417477B2 |
Rotary switch
A rotary switch having a fixing body, a rotating body disposed in the fixing body, a cover coupled to an upper portion of the fixing body, and a first elastic body positioned under the cover to contact a plurality of protrusions formed on the rotating body is provided. The protrusions of the rotating body protrude in a side direction and radial direction of the rotating body to improve a rotational operation feeling and the quality of a rotational sound. |
| US11417468B2 |
Ceramic electronic device and manufacturing method of the same
A ceramic electronic device includes: a multilayer chip in which each of a plurality of dielectric layers and each of a plurality of internal electrode layers are alternately stacked, the multilayer chip having a rectangular parallelepiped shape, the plurality of internal electrode layers being alternately exposed to a first end face and a second end face of the multilayer chip, the first end face facing with the second end face, a first external electrode provided on the first end face; a second external electrode provided on the second end face; and an organic compound that is adhered to at least a part of a region including a surface of the multilayer chip where neither the first external electrode nor the second external electrode is formed and surfaces of the first external electrode and the second external electrode, and has a siloxane bonding. |
| US11417464B2 |
Grooved, stacked-plate superconducting magnets and electrically conductive terminal blocks and related construction techniques
Described herein are concepts, system and techniques which provide a means to construct robust high-field superconducting magnets using simple fabrication techniques and modular components that scale well toward commercialization. The resulting magnet assembly—which utilizes non-insulated, high temperature superconducting tapes (HTS) and provides for optimized coolant pathways—is inherently strong structurally, which enables maximum utilization of the high magnetic fields available with HTS technology. In addition, the concepts described herein provide for control of quench-induced current distributions within the tape stack and surrounding superstructure to safely dissipate quench energy, while at the same time obtaining acceptable magnet charge time. The net result is a structurally and thermally robust, high-field magnet assembly that is passively protected against quench fault conditions. |
| US11417463B2 |
Method for manufacturing coil, coil and electronic device
Disclosed are a method for manufacturing a coil, a coil, and an electronic device. The method includes: bonding a first side of a metal sheet onto a laser-transmitting substrate by an adhesive layer; cutting a coil pattern on a second side of the metal sheet by the laser to form a coil running through the two sides of the metal sheet on the metal sheet; bonding the second side of the metal sheet onto an adhesive tape; transmitting the laser through the laser-transmitting substrate to act on the adhesive layer to detach the laser-transmitting substrate and the adhesive layer from the first side of the metal sheet; exposing the coil pattern on the first side of the metal sheet; and forming an encapsulation layer on the coil to encapsulate the first side of the coil. |
| US11417461B2 |
Techniques and apparatuses to reduce inductive charging power loss
This document describes techniques and apparatuses directed at reducing inductive-charging power loss. In aspects, a mobile device includes a multi-layer flexible printed circuit board (FPCB) coil that forms a receiver coil having a Litz-wire structure. The FPCB coil includes a multi-trace bundle, having traces systematically routed throughout the different layers of the FPCB coil to reduce eddy current losses. |
| US11417456B2 |
High-voltage transformer and electronic power apparatus
The present disclosure provides a high-voltage transformer and an electronic power apparatus. The high-voltage transformer includes a magnetic core, a secondary coil unit, and a primary coil unit. The secondary coil unit includes a secondary winding; and the primary coil unit includes a primary winding and an insulating portion. The insulating portion forms at least one through hole. At least one primary winding encircle at least one through hole and is wrapped by the insulating portion and fixed in the insulating portion. The magnetic core passes through at least one through hole. A shielding layer is formed on a surface of the insulating portion, and the shielding layer is used for connecting a safety ground and the electrical conductivity of the shielding layer is not more than 5000 S/m. |
| US11417454B2 |
Power circuit common mode filter
A power circuit common mode filter includes: a U-shaped soft magnetic core and two cylindrical soft magnetic cores, wherein recessed grooves are provided at tops of two side walls of the U-shaped soft magnetic core, and the two cylindrical soft magnetic cores are movably installed in the U-shaped soft magnetic core; two ends of each of the cylindrical soft magnetic cores are embedded in the corresponding recessed grooves, and a coil is set on each of the two cylindrical soft magnetic cores in the U-shaped soft magnetic core; the U-shaped soft magnetic core and the cylindrical soft magnetic cores are both covered with a high-voltage-resist insulating material to form insulating layers; surfaces of the insulating layers at the recessed grooves are provided with electrode layers, and ends of the coil is fixedly connected to the electrode layers through soldering tin. |
| US11417449B2 |
Magnetic sheet and non-contact power receiving device, electronic apparatus and non-contact charging system using the same
A magnetic sheet 1 of an embodiment includes a stack of a plurality of magnetic thin strips and resin film parts. The stack includes from 5 to 25 pieces of the magnetic thin strips. The magnetic thin strips are provided with cutout portions each having a width of 1 mm or less (including 0 (zero)). A ratio (B/A) of a total length B of the cutout portions provided to the magnetic thin strip to a total outer peripheral length A of an outer peripheral area of the magnetic thin strip arranged on one of the resin film parts is in a range of from 2 to 25. |
| US11417448B2 |
Method for manufacturing a device having a three-dimensional magnetic structure
A method for manufacturing a device having a three-dimensional magnetic structure includes applying or introducing magnetic particles onto or into a carrier element. A plurality of at least partly interconnected cavities are formed between the magnetic particles, which contact one another at points of contact, by coating the arrangement of magnetic particles and the carrier. The cavities are penetrated at least partly by the layer generated when coating, resulting in the three-dimensional magnetic structure. A conductor loop arrangement is provided on the carrier or a further carrier. When a current flows through the conductor loop, an inductance of the conductor loop is changed by the three-dimensional magnetic structure, or a force acts on the three-dimensional magnetic structure or the conductor loop by a magnetic field caused by the current flow, or when the position of the three-dimensional magnetic structure is changed, a current flow is induced through the conductor loop. |
| US11417438B2 |
Method for producing solidifying material for radioactive waste disposal via recycling of radioactive concrete and method for disposing of radioactive waste using the same
In accordance with the present invention, provided is a method for producing a solidifying material for radioactive waste disposal, the method including a first step (S100) of pulverizing radioactive concrete waste and separating aggregates and paste and a second step (S200) of using the paste to produce a solidifying raw material, wherein the second step (S200) includes a calcination treatment step (S210) of calcining a mixture obtained by mixing an additional material with the paste; a sintering treatment step (S220) of sintering the mixture in a sintering furnace after the calcination treatment step (S210); and a rapid-cooling treatment step (S230) of rapid-cooling the mixture after the sintering treatment step (S220) to produce a clinker. |
| US11417437B2 |
Variable propellant density for passive reactivity control of nuclear thermal propulsion reactors
Passive reactivity control technologies that enable reactivity control of a nuclear thermal propulsion (NTP) system with little to no active mechanical movement of circumferential control drums. By minimizing or eliminating the need for mechanical movement of the circumferential control drums during an NTP burn, the reactivity control technologies simplify controlling an NTP reactor and increase the overall performance of the NTP system. The reactivity control technologies mitigate and counteract the effects of xenon, the dominant fission product contributing to reactivity transients. Examples of reactivity control technologies include, employing burnable neutron poisons, tuning hydrogen pressure, adjusting wait time between burn cycles or merging burn cycles, and enhancement of temperature feedback mechanisms. The reactivity control technologies are applicable to low-enriched uranium NTP systems, including graphite composite fueled and tungsten ceramic and metal matrix (CERMET), or any moderated NTP system, such as highly-enriched uranium graphite composite NTP systems. |
| US11417436B2 |
Apparatus for decommissioning heavy-water reactor facilities and method for decommissioning heavy-water reactor facilities
An apparatus for decommissioning heavy-water reactor facilities includes a shielding device including a drawing-out space that is mounted on the reactivity mechanism deck and communicates with one through-hole among the plurality of through-holes, a separating device that is inserted into the inside of one of the plurality of guide tubes through the drawing-out space and the one through-hole and cuts an end portion of the one guide tube connected to the calandria, and a drawing-out device that is inserted into the inside of the one guide tube through the drawing-out space and the one through-hole and supports the end portion of the one guide tube to draw out the one guide tube into the inside of the drawing-out space through the one through-hole. |
| US11417432B2 |
Smile designer
Various methods and systems for designing a restored smile are provided. One method includes receiving scan data of a patient's teeth, developing a digital model of the patient's teeth via a computing device, where the model represents the patient's teeth based upon the scan data, creating a dental treatment plan to restore one or more teeth from an initial condition to a successive condition, and wherein a final condition of the one or more is based on the one or more teeth having at least one planned additional restorative tooth structure provided therewith. |
| US11417431B2 |
Virtually testing force placed on a tooth
Embodiments of the present disclosure include computing device related, system, and method embodiments for virtually testing force placed on a tooth are described herein. One method embodiment includes receiving initial orthodontic data (IOD) of teeth, and receiving a desired position of a tooth contained in the IOD. The method embodiment can also include computing a desired force and torque to be applied to the tooth to reach the desired position, wherein the force and torque are applied using a dental attachment. The method embodiment can include virtually testing and adjusting the attachment iteratively to reach the desired force and torque, and displaying the force and torque applied to the tooth via a user interface. |
| US11417424B2 |
Disease detection from weakly annotated volumetric medical images using convolutional long short-term memory and multiple instance learning
Systems and methods for developing a disease detection model. One method includes training the model using an image study and an associated disease label mined from a radiology report. The image study including a sequence of a plurality of two-dimensional slices of a three-dimensional image volume, and the model including a convolutional neural network layer and a convolutional long short-term memory layer. Training the model includes individually extracting a set of features from each of the plurality of two-dimensional slices using the convolutional neural network layer, sequentially processing the features extracted by the convolutional neural network layer for each of the plurality of two-dimensional slices using the convolutional long short-term memory layer, processing output from the convolutional long short-term memory layer for each of the plurality of two-dimensional slices to generate a probability of the disease, and updating the model based on comparing the probability to the label. |
| US11417422B2 |
Medication adherence monitoring system and method
A medication management system is described that is operable to determine whether a user is actually following a protocol, provide additional assistance to a user, starting with instructions, video instructions, and the like, and moving up to contact from a medication administrator if it is determined that the user would need such assistance in any medical adherence situation, including clinical trial settings, home care settings, healthcare administration locations, such as nursing homes, clinics, hospitals and the like. Suspicious activity on the part of a patient or other user of the system is identified and can be noted to a healthcare provider or other service provider where appropriate. |
| US11417421B1 |
Electronic health records connectivity
A system and method for obtaining prior authorization and fulfilling a prescription is described. The method includes receiving, by a computing device, prescription information for a patient from a prescriber; identifying, by the computing device, an electronic health record associated with the patient; collecting, by the computing device, medical information for the patient related to the prescription from the electronic health record; submitting, by the computing device, a claim for the prescription with a payor associated with the patient; and completing, by the computing device, a prior authorization request for the prescription. |
| US11417420B2 |
Optical data capture of exercise data in furtherance of a health score computation
A computer implemented method for managing health-related data captures an image from a display of an exercise machine using a camera, has the images processed to extract the text data from the captured images, and analyzes the text data to identify information relating to extrinsic physical activity performed by a person at the exercise machine. The results are stored in memory and a profile specific to the person is updated. The profile comprises a log of past exercise activity that allows the person to track his or her activity and progress and overall health. The profile can be accessed by the person through a portal such as using a smart phone or a computer program or web browser. The results can be combined with other data to arrive at a health score which can be published through the portal while personal data remains masked from public inspection. |
| US11417418B1 |
Recruiting for clinical trial cohorts to achieve high participant compliance and retention
Systems and methods for selectively distributing programs to remote devices are described. In some implementations, one or more computers access candidate profile for a candidate to participate in interactive programs involving collection of data from participants using remote devices. The one or more computers also identify program profiles for multiple programs in which the candidate is eligible to enroll as a participant. Scores are determined for each of the programs with respect to the candidate, and one or more of the programs are selected for the candidate based on the scores. Selection results are provided over the communication network to a client device, the selection results being provided for presentation by the client device to indicate the selected one or more programs on an interface of the client device. |
| US11417417B2 |
Generating clinical forms
A machine learning system may be used to predict clinical questions to ask on a clinical form. A first encoder may encode first information and a second encoder may encoder second information from a medical record of a past appointment. The first and second encoded information and additional encoded information may be used to predict a clinical question to ask by using a reinforcement learning system. The reinforcement learning system may be trained by receiving ratings of questions from users. |
| US11417416B2 |
Methods for lowering blood pressure with a dihydropyridine-type calcium channel blocker pharmaceutical composition
A method is provided for lowering blood pressure in a subject in need thereof by administering a dihydropyridine-type calcium channel blocker pharmaceutical composition to a subject qualified for over-the-counter access to the dihydropyridine-type calcium channel blocker pharmaceutical composition. In some embodiments, the dihydropyridine-type calcium channel blocker pharmaceutical composition includes isradipine, nifedipine, or nisoldipine. In some embodiments, the dihydropyridine-type calcium channel blocker pharmaceutical composition includes 3-O-ethyl 5-O-methyl 2-(2-aminoethoxymethyl)-4-(2-chlorophenyl)-6-methyl-1,4-dihydropyridine-3,5-dicarboxylate or a pharmaceutically acceptable salt thereof. |
| US11417414B2 |
Apparatus and method for repairing a defect of a memory module, and a memory system
The present application discloses an apparatus for repairing a defect of a memory module, comprises: a central buffer having an address recording module for recording defective address information indicating one or more defective memory addresses in the memory module; the central buffer is configured to receive an access command for accessing a target address in the memory module from a memory interface, and to determine whether to generate a repair access command for repairing the target address according to a comparison result; and a data buffer having a data recording module for recording repair data; wherein the data buffer is coupled between the memory interface and the memory module to buffer data interacted therebetween, and is coupled to the central buffer to receive the access command or the repair access command; the data buffer is configured to write target data associated with the access command into the data recording module as repair data corresponding to a target address according to the repair access command, or read repair data from the data recording module as target data corresponding to a target address. |
| US11417410B2 |
Die-based high and low priority error queues
A processor coupled to a NAND memory device comprising an n by m array of dies having n channels performs error recovery message scheduling and read error recovery on the dies by receiving indications of read errors responsive to attempted execution of a read command on a destination die and creates an error recovery message or instruction in response to the indication. The processor determines the destination die of the error recovery message and sends the error recovery message to a die queue based on the determined destination die. The n×m die queues can each be further divided into p priority queues, and error recovery messages are sent to the appropriate die priority queue based on a priority associated with the error recovery message. The processor fetches error recovery messages from a head of each die priority queue and performs read error recovery at the destination die. |
| US11417409B2 |
Electronic devices including a test circuit and methods of operating the electronic devices
An electronic device includes a pattern data generation circuit and a data input/output (I/O) circuit. The pattern data generation circuit generates pattern data having a serial pattern based on a command/address signal. The data I/O circuit outputs the pattern data or read data as internal data based on a read command for a read operation and an internal command in a test mode. The data I/O circuit receives and stores the internal data, which are output, as write data for a write operation. |
| US11417397B2 |
Non-volatile memory device and control method for mitigating memory cell overwritten
A control method of a non-volatile memory device is provided. The non-volatile memory device includes a memory array including a plurality of memory strings. Each memory string includes a plurality of memory cells connected in series. The control method includes applying a pass voltage signal to a plurality of unselected word lines connected to unselected memory cells of the plurality of memory cells during a programming operation period; and applying a program voltage signal to a selected word line connected to a selected memory cell of the plurality of memory cells during the programming operation period, wherein the program voltage signal is decreasing or changes in a descending step pulse manner during the programming operation period. |
| US11417393B2 |
Two-stage programming using variable step voltage (DVPGM) for non-volatile memory structures
A method for programming a non-volatile memory structure with four-page data, wherein the method comprises, in a first stage, selecting four programmable states of a segment of MLC NAND-type memory cells, programming at least a first of the four programmable states with two pages of a four-page data at a first step voltage level, between programming at least two neighboring programmable states of the four programmable states, increasing the first step voltage level to a second step voltage level for a single program pulse and according to a pre-determined magnitude, and programming a latter of the at least two neighboring programmable states at the first step voltage level. |
| US11417392B2 |
Semiconductor device having PDA function
A method for writing a mode register in a semiconductor device, the method includes receiving a mode register command and a mode signal; generating a first mode register setting signal; delaying the first mode register setting signal in a first latency shifter to provide a second mode register setting signal; receiving a data signal in synchronization with the second mode register setting signal; and writing the mode signal to the mode register only if the received data signal has a first logic level. |
| US11417391B2 |
Systems and methods for level down shifting drivers
A memory device includes a level down shifting driver circuit. The level down shifting driver circuit include input circuitry having at least one input port, and a cross-junction circuitry electrically coupled to the input circuitry and configured to receive a first signal from the input circuitry to drive one or more devices included in the cross-junction circuitry. The level down shifting driver circuit further includes an output drive circuitry electrically coupled to the cross-junction circuitry and configured to receive a second signal from the cross-junction circuitry, wherein the output drive circuitry comprises an output line configured to deliver a first voltage output based on a first input voltage received by the input circuitry, and a second voltage output based on a second input voltage received by the input circuitry. |
| US11417390B2 |
Memory device and operation method thereof
A memory device and an operation method thereof are provided. The memory device includes an input/output data latch circuit and a bit line sensing amplifier circuit. The input/output data latch circuit is coupled between a main input/output line pair and a local input/output line pair. The local input/output line pair is coupled to a plurality of bit line pairs through the bit line sensing amplifier circuit. The memory device performs a two-stage operation to input or output data of a selected bit line pair among the bit line pairs. The selected bit line pair connects to the local input/output line pair only during one stage operation of the two-stage operation. Further, during the other stage operation of the two-stage operation, the data of the selected bit line pair latched in the input/output data latch circuit is transmitted to the main input/output line pair. |
| US11417387B2 |
Reserved rows for row-copy operations for semiconductor memory devices and associated methods and systems
Methods, systems, and apparatuses for memory devices (e.g., DRAM) including one or more reserved rows for row-copy operations are described. Such a memory device may include a memory array having a set of rows, where one or more rows of the set are reserved for row-copy operations and hidden (un-addressable) from access commands directed to the memory array. The reserved rows may include a dummy row configured to provide a uniform processing conditions to the memory array. Additionally, or alternatively, the reserved rows may include a buffer row configured to provide a buffer zone in the memory array. In some embodiments, the memory device may perform the row-copy operations in response to detecting row hammering activities. The row-copy operations may mitigate the risks associated with the row hammering activities by routing the row hammering activities to the reserved rows. |
| US11417386B2 |
Semiconductor device having interconnection in package and method for manufacturing the same
A semiconductor device includes a first die connected to a first channel, the first die comprising a first memory chip; and a second die connected to a second channel, the second die comprising a second memory chip, the first and second channels being independent of each other and a storage capacity and a physical size of the second die being the same as those of the first die. The first and second dies are disposed in one package, and the package includes an interconnection circuit disposed between the first die and the second die to transfer signals between the first memory chip and the second memory chip. |
| US11417383B2 |
Apparatuses and methods for dynamic refresh allocation
Embodiments of the disclosure are drawn to apparatuses, systems, and methods for dynamic refresh allocation. Memories may be subject to row hammer attacks, where one or more wordlines are repeatedly accessed to cause data degradation in victim rows nearby to the hammered wordlines. A memory may perform background auto-refresh operations, and targeted refresh operations where victim wordlines are refreshed. The memory may monitor access patterns to the memory in order to dynamically allocate the number of targeted refresh operations and auto-refresh operations in a set of refresh operations based on if a hammer attack is occurring and the type of hammer attack which is occurring. |
| US11417382B2 |
Apparatuses and methods for skipping wordline activation of defective memory during refresh operations
Apparatuses and methods for refreshing memory of a semiconductor device are described. An example method includes during a refresh operation, determining a respective row of a memory cells slated for refresh in each of a plurality of sections of a memory bank of a memory device, and determining whether the respective row of memory cells slated for refresh for a particular section of the plurality of sections of the memory bank has been repaired. The example method further includes in response to a determination that the row of memory cells slated for refresh has been repaired, cause a refresh within the particular section of the memory bank to be skipped while contemporaneously performing a refresh of the rows of memory cells slated for refresh in other sections of the plurality of sections of the memory bank to be refreshed. |
| US11417378B2 |
Integrated circuit device
An integrated circuit device of the invention, includes: a first resistance variable memory element provided on a semiconductor substrate; a second resistance variable memory element provided on the semiconductor substrate; and a semiconductor circuit for controlling write and read of the first resistance variable memory element and the second resistance variable memory element, which is provided on the semiconductor substrate, in which the second resistance variable memory element has a write current that is smaller than a write current of the first resistance variable memory element, and the second resistance variable memory element is disposed farther from the semiconductor substrate than the first resistance variable memory element. |
| US11417374B1 |
Reset speed modulation circuitry for a decision feedback equalizer of a memory device
Systems and methods described herein provide decision feedback equalizer (DFE) circuitry that includes one or more phases. The one or more phases receive bit feedback at respective inputs of the phases. The DFE circuitry also may include variable reset circuitry. The variable reset circuitry may reset voltages of the bit feedback at inputs of each of the phases. The variable reset circuitry is configured to change its reset frequency between resets. |
| US11417372B2 |
Interface protocol configuration for memory
Apparatuses and methods can be related to configuring interface protocols for memory. An interface protocol can define the commands received by a memory device utilizing pins of an interface of a memory device. An interface protocol used by a memory device can be implemented utilizing a decoder of signals provided through the pins of the memory device. The decoder utilized by a memory device can be selected by setting a mode register of the memory device. |
| US11417356B1 |
Write assist stack to reduce resistance and improve reliability
The present disclosure generally relates to a magnetic media drive employing a magnetic recording head. The magnetic recording head comprises a main pole, a hot seed layer, and a write assist stack disposed between the main pole and the hot seed layer. In one embodiment, the write assist stack comprises a seed layer, a spin torque layer, and a notch layer. One or more of the seed layer and the notch layer have a first cross-track width and the spin torque layer has a second cross-track width less than the first cross track width. In another embodiment, the write assist stack comprises a seed layer, a spin polarization layer, and a notch layer. One or more of the seed layer and the notch layer have a first cross-track width and the spin polarization layer has a second cross-track width less than the first cross track width. |
| US11417352B2 |
In-vehicle intelligent WiFi microphone and audio delay processing method therefor
Disclosed in the invention are an in-vehicle intelligent WiFi microphone and an audio delay processing method therefor, by which the problem that the existing in-vehicle microphone is prone to interference and provides poor sound quality when FM signals are used to establish audio transmission with an in-vehicle entertainment system, can be solved. The in-vehicle intelligent WiFi microphone comprises a first microphone, a first main control circuit board, a first rechargeable battery and a first main mounting housing. The first microphone, the first main control circuit board and the first rechargeable battery are arranged in the first main mounting housing. The first microphone is located at an upper end of the first main mounting housing, and the first microphone and the first rechargeable battery are electrically connected to the first main control circuit board. The first main control circuit board is integrally provided with a first main control processor, as well as an audio mixing processing module, an FM receiving module and a WiFi communication module, which are electrically connected to the first main control processor. |
| US11417348B2 |
Truncateable predictive coding
A method, system, and computer program to encode and decode a channel coherence parameter applied on a frequency band basis, where the coherence parameters of each frequency band form a coherence vector. The coherence vector is encoded and decoded using a predictive scheme followed by a variable bit rate entropy coding. |
| US11417346B2 |
Method and apparatus for packet loss concealment, and decoding method and apparatus employing same
A method and an apparatus for packet loss concealment, and a decoding method and an apparatus employing same are provided. A method for time domain packet loss concealment includes checking whether a current frame is either an erased frame or a good frame after the erased frame, when the current frame is either the erased frame or the good frame after the erased frame, obtaining signal characteristics, selecting one of a phase matching tool and a smoothing tool based on a plurality of parameters including the signal characteristics, and performing a packet loss concealment processing on the current frame based on the selected tool. |
| US11417345B2 |
Encoding apparatus, decoding apparatus, fricative sound judgment apparatus, and methods and programs therefor
An encoding apparatus performing encoding by an encoding process in which bits are preferentially assigned to a low side to obtain a spectrum code, the encoding apparatus judging whether a sound signal is a hissing sound or not, obtaining and encoding, if the encoding apparatus judges that the sound signal is a hissing sound, what is obtained by exchanging all or a part of a spectrum existing on a lower side than a predetermined frequency in a frequency spectrum sequence of the sound signal for all or a part of a spectrum existing on a higher side of the predetermined frequency in the frequency spectrum sequence, the number of all or the part of the high-side frequency spectrum sequence being the same as the number of all or the part of the low-side frequency spectrum sequence. |
| US11417343B2 |
Automatic speaker identification in calls using multiple speaker-identification parameters
A speaker identification system (“system”) automatically assigns a speaker to voiced segments in a call. The system identifies one or more speakers in a call using one or more speaker-identification parameters. The system processes the call to determine one or more speaker-identification parameters, such as a transcript of the call, a facial image of the speaker, a scene image, which is an image of a scene in which the speaker is located during the call, or textual data associated with the call such as names of the speaker or an organization that are retrieved from the scene images or video data of the call. The system analyzes one or more of the speaker-identification parameters and determines the identity of the speaker. The system then identifies the voice segments associated with the identified speaker and marks the voice segments with the identity of the speaker. |
| US11417340B2 |
Fault detection and management in a real-time communication
Electronic conferences are a common method of conducting a meeting when the participants are not at the same location. When a conference drops a portion of the audio, such carrying speech from a speaker, participants may be excluded from the full content of the conference. By having a device associated with a speaking participant convey both audio and generated text from the speech provided by the speaking participant, a server may be able to determine that speech is missing from the audio portion and automatically insert text content. As a result, poor audio quality may be mitigated with text and omitting unwanted text when the audio quality is sufficient. |
| US11417339B1 |
Detection of plagiarized spoken responses using machine learning
Data is received that encapsulates a spoken response to a test question. Thereafter, the received data is transcribed into a string of words. The string of words is then compared with at least one source string so that a similarity grid representation of the comparison can be generated that characterizes a level of similarity between the string of words and the at least one source string. The grid representation is then scored using at least one machine learning model. The score indicates a likelihood of the spoken response having been plagiarized. Data providing the encapsulated score can then be provided. Related apparatus, systems, techniques and articles are also described. |
| US11417338B2 |
Electronic apparatus and control method for controlling a device in an Internet of Things
An electronic apparatus and method of controlling the electronic apparatus are provided. The electronic apparatus includes a communicator, a storage storing information on places wherein Internet of Things (IoT) devices are located, and a processor configured to, based on receiving a control signal for controlling an IoT device located in a specific place through the communicator, control the IoT device located in the specific place based on information on the place stored in the storage. The processor is further configured to receive motion information generated based on a motion of a wearable device from the wearable device, identify a place corresponding to the motion information, and store the identified place as information on a place of an IoT device located within a predetermined distance from the wearable device, in the storage. |
| US11417331B2 |
Method and device for controlling terminal, and computer readable storage medium
The present disclosure provides a method for controlling a terminal, including the following operations: obtaining recognition results corresponding to control signals after receiving the control signals, and determining whether control instructions corresponding to the recognition results conflict, each control signal comprising at least one of a voice signal or a gesture signal; determining a credibility of each control instruction in response to a determination that there exists conflict among control instructions; and sending the control instruction with highest credibility to a control terminal. The present disclosure further provides a device for controlling a terminal and a computer readable storage medium. When control instructions are received and there exists conflict among control instructions, the control instruction with the highest credibility is sent to the control terminal after the credibility of each control instructions is determined, thereby avoiding settings from conflict. |
| US11417329B2 |
System for performing a magnetic resonance tomography and method for controlling an MR scanner
A system for performing magnetic resonance tomography is disclosed. A control system creates a speech data stream from an acquired linguistic expression and generates a command library, which contains a selection of speech commands, to each of which one or more linguistic expressions are assigned. The selection of speech commands is loaded from a command database depending on a current system status of a magnetic resonance (MR) scanner. The control system applies a speech recognition algorithm to the speech data stream to determine whether a linguistic expression contained in the command library can be assigned to the speech data stream. If so, the acquired linguistic expression is recognized, a speech command from the command library assigned to the recognized linguistic expression is established, and a control command for controlling the MR scanner in accordance with the speech command is created. |
| US11417323B2 |
Electronic apparatus and control method thereof
An electronic device is provided. The electronic apparatus includes a communication interface, and at least one processor configured to receive a first audio signal and a second audio signal from a first sensor device, and a second sensor device located away from the first sensor device, respectively, through the communication interface, acquire similarity between the first audio signal and the second audio signal, acquire a first predicted audio component from the first audio signal based on an operation state of an electronic apparatus located adjacent to the first sensor device, and a second predicted audio component from the second audio signal based on an operation state of an electronic apparatus located adjacent to the second sensor device in the case where the similarity is equal to or higher than a threshold value, identify one of the first sensor device or the second sensor device as an effective sensor device based on the first predicted audio component and the second predicted audio component, and perform speech recognition with respect to an additional audio signal received from the effective sensor device. |
| US11417321B2 |
Controlling voice recognition sensitivity for voice recognition
A device for changing a speech recognition sensitivity for speech recognition can include a memory and a processor configured to obtain a first plurality of speech data input at different times, apply a pre-trained speech recognition model to the first plurality of speech data at a plurality of different speech recognition sensitivities, obtain a first speech recognition sensitivity from among the plurality of different speech recognition sensitivities based on the pre-trained speech recognition model and the plurality of different speech recognition sensitivities, the first speech recognition sensitivity corresponding to an optimal speech recognition sensitivity at which a speech recognition success rate of the speech recognition model satisfies a set first recognition success rate criterion, and change a setting of the speech recognition sensitivity based on the first speech recognition sensitivity obtained from among the plurality of different speech recognition sensitivities. |
| US11417313B2 |
Speech synthesizer using artificial intelligence, method of operating speech synthesizer and computer-readable recording medium
A speech synthesizer using artificial intelligence includes a memory configured to store a first ratio of a word classified into a minor class among a plurality of classes, a second ratio of the word which is not classified into the minor class, and a synthesized speech model and a processor configured to change a first class classification probability set of the word to a second class classification probability set, based on the first ratio, the second ratio and the first class classification probability set, and learn the synthesized speech model using the changed second class classification probability set. |
| US11417309B2 |
Ultrasonic transducer with via formed in piezoelectric element and method of fabricating an ultrasonic transducer including milling a piezoelectric substrate
An ultrasonic transducer that includes a delay line, an active piezoelectric element, and interposing metal conductive layer between the delay line and active piezoelectric element. The delay line and active piezoelectric element are joined so that ultrasonic waves may be coupled from the active piezoelectric element into the delay line or from the delay line into the active piezoelectric element. A via is formed, using a milling operation, in the active piezoelectric element to expose the edge of the interposing metal conductive layer between the delay line and active piezoelectric element. A conductive layer makes electrical contact between the interposing metal conductive layer and the surface of the active piezoelectric element to allow an electrical connection to be made from the surface of the active piezoelectric element to the interposing metal conductive layer. |
| US11417307B2 |
Selective audio isolation from body generated sound system and method
A wireless earpiece includes a wireless earpiece housing, a processor disposed within the wireless earpiece housing, at least one microphone operatively connected to the processor, and at least one speaker operatively connected to the processor. The processor is configured to receive audio from the at least one microphone, perform processing of the audio to provide processed audio, and output the processed audio to the at least one speaker. The processing of the audio involves identifying body generated sounds generated by a body of a user of the wireless earpiece and removing the body generated sounds. |
| US11417304B2 |
Electronic percussion instrument
An electronic percussion instrument includes a body having a top opening and an internal support area, and a drumhead having a striking surface and a drumhead bottom surface opposite thereto, the drumhead is stretched over the top opening of the body and is configured to receive a percussion strike thereon, and at least one peripheral sensor disposed on the internal support area of the body, and at least one rising element configured to be flexible and disposed on the internal support area of the body, and a peripheral carrier, adapted to receiving vibrations from the periphery of the drumhead, the peripheral carrier is supported by the at least one rising element such that a pressing force is formed for setting a top circumferential edge of the peripheral carrier in contact with the drumhead bottom surface. |
| US11417294B2 |
Systems and methods for remote interaction with an enhanced monochromatic image presentation device
A system to calibrate, monitor, and communicate compliance reporting of monochromatic imagery on an image presentation device includes a local terminal in operative communication with a remote host. The local terminal includes an image presentation device, an application-specific integrated circuit (“ASIC”), and a terminal application in communication with the ASIC. The terminal application is configured to initiate a verification task, via the ASIC, pertaining to an operating condition of the image presentation device and to communicate a verification report about a result of the verification task to a remote host. A system provides a mechanism to remotely monitor and calibrate medical imaging image presentation device and diagnosis devices to certify diagnosis quality and retain trustworthy data for legal compliance. |
| US11417289B2 |
Driving circuit of display panel and operation method thereof
The invention provides a driving circuit of a display panel and an operation method thereof. The driving circuit includes a calculation circuit and an edge processing circuit. The calculation circuit converts original image frame data into first image frame data for driving a first pixel array layer and second image frame data for driving a second pixel array layer. The edge processing circuit converts the second image frame data into third image frame data. The edge processing circuit performs an edge detection on a current pixel in the second image frame data to determine whether the current pixel belongs to an image edge. The edge processing circuit determines whether to adjust a gray level of an adjacent pixel in the second image frame data as the gray level of the adjacent pixel in the third image frame data according to a result of the edge detection. |
| US11417288B1 |
Control circuit and control method applicable to display panel
The present invention provides a control circuit applied to a display panel, wherein the control circuit includes a receiving interface, an image processing circuit and a transmission interface. The receiving interface is configured to receive image data, wherein the image data has a variable frame rate. The image processing circuit is configured to receive the image data from the receiving interface, and perform a frequency multiplication operation on the image data according to a frame rate of the image data to generate output image data, wherein a frame rate of the output image data is a positive integer multiple of the frame rate of the image data. The transmission interface is configured to receive the output image data from the image processing circuit, and transmit the output image data to the display panel. |
| US11417286B2 |
Display device having backlight
According to one embodiment, a display device includes a display panel including a first sub display area and a second sub display area, and an illumination device, wherein the illumination device includes a first light source opposed to the first sub display area, a second light source opposed to the second sub display area, and a partition positioned between the first and second light sources and the display panel, and the partition includes a first side surface surrounding the first light source, a second side surface surrounding the second light source, and a connector which connects the first side surface and the second side surface, and the connector is formed of curved surfaces, or two or more flat surfaces, or a combination of curved surfaces and flat surfaces. |
| US11417285B2 |
Method for controlling backlight, backlight controller of display device, and display device
Provided are a method for controlling backlight of a display device, a backlight controller for a display device, and a display device. The method includes: identifying a light emission luminance of each backlight partition in a backlight module according to display luminances of the plurality of display partitions; when the plurality of backlight partitions include two adjacent backlight partitions and an absolute value of a difference between the light emission luminance of the two adjacent backlight partitions is greater than a target threshold, adjusting the light emission luminance of at least one of the two adjacent backlight partitions such that the absolute value of the difference between the light emission luminances of the two adjacent backlight partitions is decreased; and after the luminance is adjusted, controlling light-emitting of each backlight partition. |
| US11417282B2 |
Construction of driving transistor in a pixel of a display device
A display device and a method of manufacturing the display device are provided. The display device comprises a pixel which is connected to a scan line and a data line intersecting the scan line, wherein the pixel comprises a light emitting element and a driving transistor controlling a driving current, which is supplied to the light emitting element, according to a data voltage received from the data line, wherein the driving transistor comprises a first active layer having an oxide semiconductor containing tin (Sn). |
| US11417280B2 |
Pixel circuit and driving method therefor, and display substrate and display device
A pixel circuit and a driving method therefor, and a display substrate and a display device are disclosed. The pixel circuit includes a compensation circuit. The compensation circuit may output an initial power supply signal to a first node, and a driving circuit may drive a light-emitting element to emit light according to a potential of the first node and a second power supply signal provided by a second power supply end. And, each driving circuit which the display panel includes may start to work from the same bias situation and drive the corresponding light-emitting element to emit light. |
| US11417273B2 |
Semiconductor device, display device, electronic device, and operation method
A semiconductor device that reduces variations in the characteristics of driving transistors and corrects image data is provided. The semiconductor device includes an image data retention portion, a correction data retention portion, a driver circuit portion, a display element, and a threshold voltage correction circuit portion. The image data retention portion has a function of retaining first image data, and the correction data retention portion has a function of retaining correction data, and a function of generating second image data corresponding to the first image data and the correction data when the first image data is retained in the image data retention portion. The driver circuit portion has a function of generating a current corresponding to the second image data and feeding the current to the display element, and the threshold voltage correction circuit portion has a function of correcting a threshold voltage of a driving transistor in the driver circuit portion. With the above structure, the semiconductor device can correct the image data, correct the threshold voltage of the driving transistor, and perform display based on the second image data. |
| US11417272B2 |
Pixel circuit, driving method thereof and display device
A pixel circuit and driving method are provided. The pixel circuit includes a light emitting device having a first terminal and a second terminal; a driving circuit, electrically connected to the first terminal of the light emitting device, for providing power to the light emitting device; a voltage comparator for generating a pulse width modulated signal having a duty cycle based on a data voltage and a reference voltage; an offset voltage detecting circuit, electrically connected to an output terminal of the voltage comparator, for detecting an input offset voltage of the voltage comparator; and a data voltage compensation circuit, electrically connected to the offset voltage detecting circuit, for compensating the data voltage according to the input offset voltage detected. |
| US11417271B2 |
Brightness adjustment method of display panel, display panel and driving method thereof
A brightness adjustment method of a display panel, a display panel and a driving method thereof are disclosed. The display panel includes a display region. The brightness adjustment method includes: determining a target pulse width for a gate signal inputted into the display region according to data write time determined for the display region; and adjusting a pulse width of the gate signal to the target pulse width, to make the display region display target brightness corresponding to the display region. |
| US11417269B2 |
Display device and driving method for the same
A display apparatus according to embodiments of the present disclosure includes a display panel including at least one light emitting element that emits light according to a difference in respective voltages applied to an anode electrode and a cathode electrode, and including a plurality of pixels that are connected to a plurality of data lines, a plurality of gate lines, and a plurality of light emitting control lines, wherein a reset voltage is supplied to the anode electrode, a data driver for supplying data signals to the data lines, a gate driver for supplying gate signals to the gate lines, and supplying a light emitting control signal to each of the light emitting control lines, and a timing controller for controlling the data driver and the gate driver, and enabling the reset voltage to be supplied in sync with a plurality of non-light emitting periods of the light emitting control signal included in one frame. |
| US11417268B2 |
Display device
A display device is capable of improving the image quality, the display device including: a display panel; a pixel on the display panel and including at least one light emitting element; a timing controller configured to receive an image data signal of the pixel and to compensate for a gray value of the image data signal based on the number of light emitting elements of the pixel to generate a compensated image data signal; and a data driver configured to select a compensation data signal corresponding to the compensated image data signal from the timing controller and to apply the compensation data signal to the pixel. |
| US11417267B2 |
Electronic device for controlling display of content on basis of brightness information and operation method therefor
Various embodiments of the present invention relate to an electronic device for adjusting voltage and an operation method therefor. The electronic device may comprise: a display; and a processor, wherein the processor is configured to: identify first information which relates to the brightness of at least one first content included in a first image layer and is to be displayed using the display, and second information which relates to the brightness of at least one second content included in a second image layer and is to be displayed using the display; adjust the brightness of the second content at least on the basis of a difference between the first information and the second information; and in a state where the second image layer is superimposed on the first image layer including the first content, display the at least one first content, and the second content the brightness of which has been adjusted, using the display. Other embodiments are also possible. |
| US11417262B2 |
Gate driving circuit including a shift register and display device including the same
A display device includes a display panel, a gate driving circuit including a plurality of stages, and a power supply circuit outputting a clock signal, a clock-bar signal, a first discharge voltage, and a second discharge voltage. Each of stages includes a charge part that charges a clock signal having a first high voltage to a charge node, an output part that charges the first high voltage to an output node in response to a first node voltage of the charge node and outputs a second node voltage of the output node to a gate signal, a first discharge part that discharges the second node voltage to a first discharge voltage in response to the clock-bar signal having a second high voltage, and a second discharge part that discharges the first node voltage to a second discharge voltage in response to the clock-bar signal having the second high voltage. |
| US11417261B2 |
Gate driving unit circuit, gate driving circuit, display device and driving method for improving charge rate
A gate driving unit circuit comprises an input sub-circuit and an output sub-circuit. The input sub-circuit is connected to a first pull-up node, a second pull-up node, and an input terminal, and transmits a signal input from the input terminal to the first pull-up node and the second pull-up node. The output sub-circuit is connected to the first pull-up node, the second pull-up node, a first control terminal, a third control terminal, a first output terminal, and a second output terminal. The output sub-circuit transmits a signal input through the first control terminal to the first output terminal, and transmits a signal input through the third control terminal to the second output terminal under the control of a potential of the second pull-up node, wherein, an effective voltage of a signal of the first control terminal is greater than that of a signal of the third control terminal. |
| US11417256B2 |
Shift register unit and driving method thereof, gate drive circuit and display device
A shift register unit and a driving method thereof, a gate drive circuit, and a display device are disclosed. The shift register unit includes a first input sub-circuit, a first control sub-circuit, an output sub-circuit, and a second control sub-circuit. The first input sub-circuit is configured to output a first control signal of the first control signal terminal to the first control sub-circuit; the first control sub-circuit is configured to output a second input signal of the second input terminal to the first node, or the first control sub-circuit is configured to output the second input signal to the second control sub-circuit; the second control sub-circuit is configured to output a second clock signal to the second node; or the second control sub-circuit is configured to output a first voltage of the first voltage terminal to the second node under control of a level of the control node. |
| US11417254B2 |
Foldable display apparatus and method of driving the same
A display apparatus includes: a foldable display panel to display an image; a gate driver to output a gate signal to the foldable display panel; and a data driver to output a data voltage to the foldable display panel according to a driving current. The driving current is changed according to a display mode that corresponds to a folded state of the foldable display panel. |
| US11417253B2 |
Array substrate and display device
The present application provides an array substrate and a display device. The array substrate includes: a sub-pixel and a data line; a data signal transmission line; a test circuit, in the peripheral region and at a side, away from the display region, of the data signal transmission line, and including a first portion and a second portion, wherein the first portion and the second portion respectively comprise at least one test sub-circuit, and at least a part of the test sub-circuits are electrically connected to the data signal transmission line; a first signal access terminal group, at a side, away from the second portion, of the first portion; a second signal access terminal group, between the first portion and the second portion; and a third signal access terminal group, in the peripheral region and at a side, away from the first portion, of the second portion. |
| US11417252B2 |
Open circuit detection method and LED display device
An open circuit detection method and an LED display device are provided, relating to the technical field of LED display, wherein the open circuit detection method includes: supplying an open-circuit detection voltage to any row line to be detected among a plurality of row lines in the LED display device, and pulling down electric potentials of row lines other than the row line to be detected among the plurality of row lines to a first preset value, wherein the first preset value is smaller than an ON-voltage of each of the LED lamp beads and greater than 0; detecting whether the respective column lines include a column line having an electric potential lower than a second preset value, wherein if yes, it is determined that the LED display device has an LED lamp bead in an open circuit state. |
| US11417251B2 |
Flexible circuit board, display panel, display device and test method
A flexible circuit board, a display panel, a display device, and a test method are provided. The flexible circuit board includes a flexible circuit board body and a driving chip. First to third dummy terminals are provided on a surface of the flexible circuit board body. Fourth to sixth dummy terminals are electrically connected to a common node in the driving chip. An external sink current output line and an external sink current input line form an external sink current loop through the driving chip. A bonding resistance between the first and fourth dummy terminals is a first bonding resistance, and a bonding resistance between the second and the fifth dummy terminals is a second bonding resistance. The first bonding resistance and the second bonding resistance each are a resistance on the external sink current loop. |
| US11417247B2 |
Personal augmented reality
The present disclosure provides systems and methods for enabling Personal Augmented Reality (PAR). PAR can include an emitor configured to receive data signals and emit the data signals as light signals. PAR can further include a smart device configured to receive the light signals emitted by the emitor. The smart device can process the light signals to yield a communication and display the communication on a screen. |
| US11417246B2 |
Personal augmented reality
The present disclosure provides systems and methods for enabling Personal Augmented Reality (PAR). PAR can include an emitor configured to receive data signals and emit the data signals as light signals. PAR can further include a smart device configured to receive the light signals emitted by the emitor. The smart device can process the light signals to yield a communication and display the communication on a screen. |
| US11417241B2 |
Artificial canine model
Disclosed herein are anatomic models that comprise components that simulate canine components. The models may be used for development, experimentation, or training in the field of orthopedic surgical devices, and/or implant devices. The models may also be used for training of students in the veterinarian field for procedures performed in practice. |
| US11417233B2 |
Systems and methods for assisting a user in practicing a musical instrument
The present disclosure is related to systems and methods for assisting a user in practicing a smart musical instrument. The method includes obtaining a real-time image of the user playing the smart musical instrument. The method also includes obtaining information associated with a current key being pressed and information associated with a plurality of reference fingerings from the smart musical instrument. The method also includes displaying the real-time image in real-time. The method also includes determining whether a current fingering associated with the current key being pressed matches with a reference fingering, of the plurality of reference fingerings, associated with the current key being pressed. In response to a determination that the current fingering associated with the current key being pressed does not match the reference fingering, the method further includes generating a reminder. The method still further includes displaying the reference fingering corresponding to the current fingering. |
| US11417228B2 |
Modification of extended reality environments based on learning characteristics
Provided is a method, computer program product, and system for modifying a simulation based on learning characteristics. A processor may receive a user profile associated with a user. The user profile includes a set of learning characteristics related to the user. The processor may display a simulation on an extended reality display. The displayed simulation is based in part on the set of learning characteristics. The processor may monitor focus data related to the user. The focus data is generated while the user is viewing the simulation. The processor may compare the focus data with one or more focus thresholds. The processor may modify the simulation in response to the one or more focus thresholds being met. |
| US11417225B1 |
System and method for digital communication of a flight maneuver
A system for digital communication of a flight maneuver. The system includes a computing device. The computing device is configured to receive at least a flight datum from an aircraft, generate a traffic rendition as a function of the at least a flight datum, identify a flight maneuver as a function of the traffic rendition and a traffic landscape, and transmit the flight maneuver to the aircraft. A method for digital communication of a flight maneuver is also provided. |
| US11417221B2 |
Unmanned aerial vehicle escape route planning
A method includes separating a flight plan of a vehicle into a number of portions with each portion including a particular length that is determined based on a complexity of an environment where the flight plan takes place. The complexity of the environment is based on at least one of a set of factors including at least one of a terrain of the environment, one or more obstacles, one or more no-fly zones, or one or more no-landing zones within the environment. The method also includes determining an escape route for each portion of the flight plan. The escape route includes a route to a safe landing site in response to a failure of a system onboard the vehicle. The method additionally includes generating an escape route plan for the flight plan in response to all portions of the flight plan being assigned at least one escape route. |
| US11417220B2 |
Systems and methods for providing an integrated flight management display with interactive time-based functionality
A method for providing task management assistance in managing the flight path to the flight crew is provided. The method comprises: mining flight plan data and navigational data from an aircraft system; obtaining notification data items originating from systems external to the aircraft; determining an estimated flight time to reach each of the plurality of waypoints, course data items, and the upcoming conditions; causing a timeline graphical user interface (GUI) to be displayed on an aircraft display, wherein the timeline GUI is configured to display a timeline, waypoint graphical elements representative of the waypoints, course data item graphical elements representative of the other course data items, and notification data item graphical elements representative of the upcoming conditions; automatically analyzing the mined flight plan data and the notification data items to determine if deviation from the flight plan is suggested; and providing a notification of the suggested deviation from when deviation is suggested. |
| US11417219B2 |
Non-transitory computer-readable storage medium for storing collision risk calculation program, collision risk calculation method, and collision risk calculation apparatus
A method for a collision risk calculation includes: executing acquisition processing that includes acquiring travel information regarding a position and velocity of each of a first vessel and a second vessel; executing region calculation processing that includes calculating a region having a possibility of future collision between the first vessel and the second vessel from the travel information of each of the first vessel and the second vessel; and executing first risk calculation processing that includes calculating a first risk value based on a maneuvering amount used by the first vessel or the second vessel in order to avoid the region. |
| US11417218B2 |
Platooning controller and method thereof
A platooning controller and a method thereof include a processor configured to perform a platooning control and a communicator configured perform a vehicle-to-vehicle (V2V) communication in a platooning line. The processor calculates a waiting time for an expected departure of an outside vehicle based on surrounding information when the outside vehicle cuts in the platooning line during platooning. The processor forms a platoon again when the outside vehicle does not depart from the platooning line after the waiting time. |
| US11417216B2 |
Predicting a behavior of a road used using one or more coarse contextual information
A method for predicting behaviors of road users, the method may include sensing a vicinity of a vehicle to provide sensed information; processing the sensed information to provide compact contextual signatures of sensed road users within the vicinity of the vehicle; wherein a compact contextual signature of each a sensed road user includes (a) coarse contextual metadata regarding the sensed road user, (b) coarse location information regarding the sensed road user, (c) identifiers of other sensed road users, and (d) coarse situation information; feeding the compact contextual signatures to a machine learning process trained to estimate behaviors of road users based on compact contextual signatures of road users; and predicting, by the machine learning process, the behaviors of the sensed road users. |
| US11417215B2 |
Method and system for tracking position of vehicle using ultrasonic sensor in rear-cross blind spot
The present disclosure relates to a method of more accurately tracking a tracking-target vehicle entering or exiting a dangerous area in a blind spot using ultrasonic sensors disposed on the front and rear portions of a subject vehicle. According to the present disclosure, it is possible to distinguish the case in which a tracking-target vehicle in a blind spot passes a subject vehicle from the case in which the subject vehicle passes the tracking-target vehicle, and it is also possible to effectively determine, in each of the cases, the point of time at which the tracking-target vehicle enters a dangerous area in the blind spot and the point of time at which the tracking-target vehicle exits the dangerous area. |
| US11417213B2 |
Collision detection system for a crash guard
A collision detection system (1) for detecting and assessing the state of a crash guard (2), comprising at least one crash guard (2), which is provided with a sensor for detecting a collision onto or against the said crash guard (2), wherein the said system comprises a processing unit, which is provided to assess, on the basis of the signals generated by the sensor, the effect of a collision on the crash guard (2) and, if necessary, to initiate an alarm signal. |
| US11417212B1 |
Risk management system with internet of things
A risk management system that includes an internet of things (IoT) integrated logic engine connected to IoT-capable sensors and devices and autonomous entity sensors and devices. The logic engine processes and analyzes in real-time the data from the plurality of IoT-capable sensors and the autonomous entity sensors. The logic engine further identifies novel patterns and pre-defined data patterns in the data from the plurality of IoT-capable sensors and the autonomous entity sensors to determine that a risk is occurring or imminent. The logic engine further sends real-time notifications to a set of subscribers of the risk management system about the risk that is occurring or imminent and provide inter-device communications to provide real-time warnings between one or more of the plurality of sensor-enabled devices and the autonomous entity devices. |
| US11417211B2 |
System, method, infrastructure, and vehicle for automated valet parking
A system for and a method of supporting automated valet parking, and an infrastructure and a vehicle for automated valet parking are provided. An operation method of the infrastructure includes initiating an automated valet parking procedure for a vehicle, determining a target position for the vehicle and a guide route leading to the target position, determining a display range of the guide route based on at least one of vehicle information, driving information, or environment information, and providing the guide route based on the display range. |
| US11417209B2 |
Method, apparatus, and storage medium for displaying trip strategy based on public transportation
A method and an apparatus for displaying a travelling strategy based on public transportation can improve user travel experience. When the user appears in a first preset range of the starting public station, the first public transportation travelling strategy can be automatically acquired and displayed on the designated interface for the user's reference. The user does not need to take the initiative to perform multiple steps to check the travelling strategy displayed on the designated interface, which can have lower requirements on the user and can improve the operation efficiency. |
| US11417208B1 |
Systems and methods for fraud prevention based on video analytics
A video analytics based image verification system for obtaining initial vehicle profiles is presented. The system may include an external processing server that receives a location of a vehicle and proximate traffic information to determine whether it is safe for a user to obtain an initial vehicle profile. The external processing server may further determine first and second profile features from video data indicative of the vehicle. The external processing server may compare the second profile feature to an image verification indicator to generate an image verification score. A provider server may receive the first profile feature and the image verification score from the external processing server, and update a risk evaluation to include the initial vehicle profile if the image verification score is above an image verification threshold. |
| US11417202B2 |
Theft prediction and tracking system
Systems and methods for detecting potential theft and identifying individuals having a history of committing theft use an electromagnetic emission associated with a personal electronic device associated with an individual is received from at least one of a sensor that is coupled to at least one of a traffic camera or an aerial drone camera. One or more signal properties of the electromagnetic emission are analyzed to determine an emission signature. Video data and video analytics are correlated with the emission signature to identify the individual having possession of the item. The emission signature and video data are stored for later use during a checkout. If an emission signature detected at a checkout station matches that of the individual having possession of the item, and the item is not processed through the checkout station, an alert is issued and the individual is flagged as a potential shoplifter. |
| US11417199B1 |
Location based monitoring system alerts
Monitoring system alert technology, in which monitoring system data is accessed from a monitoring system that is located in a property of a user and the monitoring system data is analyzed against one or more rules that define alerts provided for the monitoring system. Based on the analysis, a determination is made that an alert for the monitoring system is needed and conditions for providing the alert are accessed. Location of a mobile device of a user associated with the monitoring system and timing related to providing the alert are monitored. The monitored location of the mobile device and the monitored timing are analyzed with respect to the accessed conditions. Based on the analysis, a determination is made that the accessed conditions for providing the alert are met and the alert is output at the mobile device. |
| US11417195B2 |
Location-aware provisioning system for fire alarm system and method therefor
A fire alarm system design layout map is used in conjunction with a mobile computing device, an indoor tracking system and a connected services system to automate the process of determining the intended slave address for each slave device, assigning the slave address to the slave device, and verifying the assignment of the slave address to the slave device. The mobile computing device sends the location of a slave device to the connected services system, which maps the location to its corresponding position on the layout map and returns the intended slave address for that slave device. The slave address is assigned wirelessly to the slave device. The assignment of the slave address to the slave device is then verified by the connected services system. |
| US11417193B2 |
Social distancing reminder device
A wearable Social Distance Reminder (SDR) device can signal that a preset distance between the device and an individual has been breached. The device can remind people to maintain a certain predetermined social distance to avoid transfer of airborne pathogens and minimize spread of diseases. |
| US11417189B2 |
Information processing apparatus and method, storage medium, and monitoring system
An apparatus for monitoring an object in a video received from at least one camera, comprises a storage unit storing a plurality of pieces of rule information each defining a condition of an object and a movement of the object to be observed in the condition, an input unit inputting information for identifying a monitored object and information representing a condition of the object, an acquiring unit acquiring rule information defining a movement to be observed for the object by referring to the storage unit based on the information representing the condition of the object, which is input by the input unit; and a monitoring unit determining whether the object in the video exhibits the movement to be observed, which is represented by the rule information acquired by the acquiring unit, and output a result of the determination. |
| US11417188B2 |
Control of vehicle status display for occupant threat reduction
A system for a system for controlling a vehicle fuel-level display includes one or more processors and a memory communicably coupled to the one or more processors and storing a fuel-level display control module. The module includes computer-readable instructions that when executed by the one or more processors cause the one or more processors to, responsive to generation of a control signal, control operation of the vehicle so as to cause the fuel-level display to display a predetermined false low-fuel level. |
| US11417187B2 |
Scattered light detector and suction fire detection system having a scattered light detector
A scattered light detector for the detection of particles, having a test section with a flow inlet and a flow outlet for forming a flow path through which the test fluid can flow, a light transmitter, which transmits a light beam in a radiation direction, with the transmitted light beam forming an intersection region with the flow path, a light receiver for receiving a scattered light fraction scattered on smoke particles in the intersection region, and a printed circuit board. The light transmitter and the light receiver are connected to the printed circuit board, with the light beam transmitted by the light transmitter being guided into the test section by means of an optical fiber deflecting the light beam, and the light receiver is arranged in such a manner that a direct or indirect scattered light path runs between the light receiver and the intersection region. |
| US11417185B2 |
Communication management system of surveying instrument
In order to achieve the object described above, a communication management system includes: a surveying instrument including a survey unit, a GPS device, a control unit, and a communication unit; a management server capable of communicating with the surveying instrument; and a remote terminal capable of communicating with the management server, wherein the remote terminal sets a usable range of the surveying instrument, and sets determination on entrance and exit of the surveying instrument into and from the usable range, and an operation responsive to results of the determination, and makes the management server store these, the surveying instrument transmits own GPS information to the management server, and the management server compares entrance and exit of the surveying instrument into and from the usable range with the GPS information and executes the determination, and executes the operation based on results of the determination. |
| US11417180B2 |
Door alarm
A method of detecting a ligature on a door is provided whereby the load applied by the door to a load sensing means and the movement of the door relative to the door frame are used to determine whether a ligature is being applied to the door to thereby trigger an alarm. Apparatus for carrying out the method is also provided. |
| US11417179B1 |
Using image and voice tracking to contextually respond to a user in a shopping environment
A method of tracking a user in a store and tracking takes and puts in regard to items in said store. One method includes tracking a shopper in a physical store using two or more cameras that are overlapping to infer and account for shopping activity performed by the shopper. The method includes providing output of at least one of the two or more cameras to a processing entity to extract skeletal limb features of the shopper. Then, processing the skeletal limb features of the shopper to detect a take of an item from the store into possession of the shopper. The method further includes detecting, based on the tracking, that the shopper has exited the store and processing a charge to an account of shopper for the item based on the detected take. |
| US11417174B2 |
Skill-based prize levels for bonus prize awards
Systems, devices and methods are operable to include selecting a virtual prize container from a plurality of virtual prize containers that each correspond to one a plurality of prize levels in response to detecting a game event in a wagering game. The selected virtual prize container including information corresponding to the prize level and concealing a prize that is in the virtual prize container is awarded to the player. An input from the player that corresponds to the selected virtual prize container is received. In response to a player achievement level being at a minimum or higher level that corresponds to the prize level of the selected virtual prize container, the prize is awarded to the player. |
| US11417173B2 |
Image processing method, apparatus, and non-transitory computer readable storage medium
The present disclosure relates to an image processing method and apparatus, an electronic device, and a storage medium. The method includes: obtaining video streams of a game tabletop; detecting target objects in a plurality of image frames included in the video streams; determining a current game stage based on the target objects; and determining game detecting results according to the target objects and the determined game stage. |
| US11417165B2 |
Vending machine interface and pressure sensor
A vending machine interface includes a front panel, a product selection panel, and a piezoelectric element. The front panel bends in a normal direction when being pushed by a user. The product selection panel is disposed facing the front panel. A detection element is attached to the product selection panel and configured to detect bending of the front panel. |
| US11417161B2 |
Method for operating a service application installed on a mobile terminal
A method for operating a service application (100, 200.1, 200.2) installed on a mobile terminal (102, 202.1, 202.2) for the use of a service, in particular a transport service, comprising obtaining, through a reception module (104) of the service application (100, 200.1, 200.2), at least one usage data set, determining in a basic usage state of the service application (100, 200.1, 200.2), by a verification module (106) of the service application (100, 200.1, 200.2) a verified usage state based on the at least one obtained usage data set and at least one predetermined verification reference criterion, and, if a verified usage state has been determined, effecting, by a first transmitting module (108) of the service application (100, 200.1, 200.2), transmitting, through the mobile terminal (102, 202.1, 202.2), an advertising signal with an advertising message, the advertising message indicating that the service application has determined a verified usage state. |
| US11417156B2 |
Method and system for managing a maintenance task of a motor vehicle
The invention relates to a distributed system (100) for managing a maintenance task of a motor vehicle and to a method for managing a maintenance task of a motor vehicle implemented by means of such a system. |
| US11417155B2 |
On-board data request approval management
Data elements are identified, from a diagnostic request received from a remote server, to collect from controllers of the vehicle. The data elements are captured for inclusion in a diagnostic data message, responsive to receipt of the diagnostic request to allow the data elements to be collected without approval of the diagnostic request. The data elements are stored to the data storage. The remote server is queried for an approval status of the diagnostic request. Responsive to the approval status specifying that the diagnostic request is approved, the diagnostic data message is sent to the server. Responsive to the approval status failing to specify within a predefined time period that the diagnostic request is approved, the data elements are discarded from the data storage to maintain data privacy for the diagnostic request upon condition that the diagnostic request is not approved. |
| US11417153B2 |
Self-service repair for autonomous vehicles
A method of notifying an owner of a fault associated with a vehicle system of a vehicle. The method includes receiving, at a computing processor, one or more fault messages from a vehicle system of the vehicle. Each fault message includes a fault source identifying the vehicle system, a fault time identifying a time of the fault, and a fault description. The method also includes determining, by the computing processor, a fault value associated with the received one or more fault messages. The fault value indicative of a period of time or a number of events from an initial received fault message. The method also includes transmitting, from the computing processor to a third party in communication with the computing processor, the fault value. The method also includes receiving, from the third party, a service notification, and displaying, on a display in communication with the computing processor, the service notification. |
| US11417151B2 |
Adaptive rolling shutter image sensor and IR emitter control for facial recognition
A processing device comprises a memory configured to store data and a processor. The processor is configured to control an exposure timing of a rolling shutter image sensor and an IR illumination timing of an object, by an IR light emitter, by switching between a first operation mode and a second operation mode. In the first operation mode, a sequence of video frames, each having a plurality of pixel lines, comprises a frame in which each pixel line is exposed to IR light emitted by the IR light emitter; a frame which is partially exposed to the IR light and a frame in which no pixel line is exposed to the IR light. In the second operation mode, alternating video frames of the sequence comprise one of a frame in which each pixel line is exposed to the IR light and a frame in which no pixel line is exposed to the IR light. |
| US11417146B2 |
Image forming apparatus that corrects image in accordance with blood oxygen level
An image forming apparatus includes an image processing device, an image forming device, an operating device, a vital sensor, and a controller. The image processing device corrects an image. The image forming device performs an image formation of forming the image on a recording sheet. The operating device is operable by a user and through which an instruction to start the image formation by the image forming device is inputted. The vital sensor is provided at the operating device and detects a blood oxygen level of the user who is operating the operating device. The controller, when the instruction to start the image formation is inputted through the operating device, causes the image processing device to correct the image in accordance with the blood oxygen level of the user detected by the vital sensor and causes the image forming device to form a corrected image on the recording sheet. |
| US11417144B2 |
Processing apparatus, fingerprint image extraction processing apparatus, system, processing method, and computer readable medium
A technique for accurately extracting a fingerprint image for accurate authentication from 3D tomographic luminance data of a finger at a high speed. A processing apparatus (11) according to the present disclosure includes means for, after performing edge detection processing on a tomographic image (101, 102, . . . 10 k, . . . , 10n) at each depth, calculating the total number of edge pixels in the tomographic image from 3D (three-dimensional) tomographic luminance data, and acquiring depth dependence of the number of edges (111, 112), and means for extracting a tomographic image having a striped pattern from the depth dependence of the number of edges and the 3D tomographic luminance data. |
| US11417141B2 |
In-screen fingerprint identification apparatus and electronic device
An in-screen fingerprint identification apparatus includes a display panel and a fingerprint identification module. The display panel includes a backlight module, a liquid crystal layer, and a cover glass, which are sequentially stacked. The cover glass includes a fingerprint identification area. The fingerprint identification module includes a light source, a photosensor, and light guiding layers disposed on the cover glass. The light guiding layers at least cover portions of opposite sides of the cover glass, respectively, such that light emitted by the light source after being reflected in the cover glass is guided to the fingerprint identification area. The photosensor is disposed in the display panel and corresponds to the fingerprint identification area to receive an optical signal of the light source emitted by the light source after being reflected by a finger in the fingerprint identification area. |
| US11417140B2 |
Display panel and display device
A display panel and a display device are provided. The display panel includes a display area, at least a part of which is reused as a fingerprint recognition area, and a plurality of fingerprint recognition pixels located in the fingerprint recognition area. The display area includes light-emitting sub-pixels, a substrate, a driving circuit layer, and a pixel definition layer having openings for defining light exiting areas of the light-emitting sub-pixel. The fingerprint recognition pixel includes an ultrasonic fingerprint sensor and a reading control circuit located in the driving circuit layer, and the ultrasonic fingerprint sensor includes a first electrode, an ultrasonic material layer, and a second electrode, which are arranged sequentially from the substrate to the driving circuit layer. The first electrode is electrically connected to the reading control circuit, and the ultrasonic material layer is on a side of the pixel definition layer facing away from the substrate. |
| US11417139B2 |
Display device
The present invention is a display device, comprising a display module, a fingerprint recognition module and a speaker module. The back of the display module is provided with a fingerprint recognition module and a speaker module. A common electrode layer is arranged between the fingerprint recognition module and the speaker module, so that the thickness of the display can be greatly reduced. |
| US11417138B2 |
Fingerprint identification apparatus, display apparatus, and electronic device
An electronic device includes: a cover glass, including a first side and a second side; an ultrasonic wave transmitter and an ultrasonic wave receiver, arranged on the second side of the cover glass. Orthographic projections of the ultrasonic wave transmitter and the ultrasonic wave receiver onto the cover glass may be at two opposing ends of the cover glass. The ultrasonic wave transmitter is configured to emit an ultrasonic wave, the ultrasonic wave is able to enter the cover glass from an end, reflected between the first side and the second side for a plurality of times, emitted out of the cover glass from another end, and received by the ultrasonic wave receiver. |
| US11417130B2 |
System and method for facilitating graphic-recognition training of a recognition model
In certain embodiments, training of a prediction model (e.g., recognition or other prediction model) may be facilitated via a training set based on one or more logos or other graphics. In some embodiments, graphics information associated with a logo or graphic (e.g., to be recognized via a recognition model) may be obtained. Media items (e.g., images, videos, etc.) may be generated based on the graphics information, where each of the media items includes (i) content other than the logo and (ii) a given representation of the logo integrated with the other content. In some embodiments, the media items may be processed via the recognition model to generate predictions (related to recognition of the logo or graphic for the media items). The recognition model may be updated based on (i) the generated predictions and (ii) corresponding reference indications (related to recognition of the logo for the media items). |
| US11417124B2 |
System for real-time automated segmentation and recognition of vehicle's license plates characters from vehicle's image and a method thereof
The present invention discloses a system for automated vehicles license plates characters segmentation and recognition comprising an imaging processor connected to at least one image grabber module or camera. The image grabber module captures images of the vehicles and forwards it to said connected imaging processor and the imaging processor segments and recognizes the vehicles license plates character region including the region with deformed license plates characters in the captured vehicle images by involving binarization of maximally stable external regions corresponding to probable license plate region in the captured vehicle images. |
| US11417122B2 |
Method for monitoring an occupant and a device therefor
The present invention relates to an occupant monitoring method and apparatus therefor. A monitoring apparatus according to one aspect of the present invention may include a camera obtaining an image in a vehicle and a processor processing the image. Moreover, the processor may include a detecting module separating each region in which an object exists from the image, a classifying module classifying the object existing in the each separated region and a recognizing module recognizing a pose of an occupant if the object corresponds to the occupant. |
| US11417116B2 |
Vehicular trailer angle detection system
A trailering assist system includes a control and a camera disposed at a rear portion of a vehicle and having a field of view at least rearward of the vehicle. The control includes an image processor operable to process image data captured by the camera. The control, responsive to image processing of captured image data, transforms captured image data of the trailer hitch from a pivoting orientation of the portion of the trailer that pivots about the trailer hitch to a vertical orientation of the portion of the trailer that moves laterally across the transformed image data. The control transforms pivotal movement of the portion of the trailer about the trailer hitch to lateral movement of the trailer hitch in the transformed image data. The control determines a trailer angle of the trailer relative to the vehicle based on the lateral position of the trailer hitch in the transformed image data. |
| US11417115B2 |
Obstacle recognition device
An obstacle recognition device of a vehicle provided with a camera capturing an image around the vehicle, includes an acquiring unit sequentially acquiring the image captured by the camera; a feature point extracting unit extracting a plurality of feature points of an object included in the image; a calculation unit calculating each motion distance of the plurality of feature points between the image previously acquired and the image currently acquired by the acquiring unit; a first determination unit determining whether each motion distance of the feature points is larger than or equal to a first threshold; a second determination unit determining whether each motion distance of the feature points is larger than or equal to a second threshold; and an obstacle recognition unit recognizing an obstacle. |
| US11417114B2 |
Method and apparatus for processing information
A method and apparatus for processing information are provided. A specific embodiment of the method includes: identifying at least one obstacle from a point cloud collected by a lidar during a traveling process of a vehicle; for an obstacle in the at least one obstacle, determining an appearance rate of the obstacle within a life cycle corresponding to the obstacle; determining a confidence degree of a grid region of at least one grid region based on appearance rates of obstacles in the at least one obstacle; determining a target grid region from the at least one grid region based on the confidence degree, and determining whether an obstacle detected in the target grid region is an obstacle detected for a first time; and if yes, filtering out a point cloud corresponding to the obstacle detected in the target grid region for the first time. |
| US11417113B2 |
Information processing apparatus, information processing system, program, and information processing method
An information processing apparatus includes an acquisition unit, a controller, a storage unit, and a providing unit. The acquisition unit is configured to acquire vehicle information from a vehicle-mounted information processing device. The controller is configured to recognize the position of a target in a case where vehicle information including the target in the vicinity of a vehicle is acquired. The controller is configured to accumulate the target in a habitat database such that the target is correlated with the position. The controller is configured to generate habitat information of the target based on a habitat database. The providing unit is configured to provide the habitat information to a terminal device. |
| US11417108B2 |
Two-wheel vehicle riding person number determination method, two-wheel vehicle riding person number determination system, two-wheel vehicle riding person number determination apparatus, and program
The present invention is a two-wheel vehicle riding person number determination system including an imaging means configured to image a two-wheel vehicle that is installed in a predetermined position and travels on a road, and a two-wheel vehicle riding person number determining means configured to process an image of the imaging means, extract a contour shape of an upper position of the two-wheel vehicle that travels on the road, detect humped shapes corresponding to heads of persons who ride on the two-wheel vehicle from the contour shape of the upper position of the two-wheel vehicle, and determine, on the basis of the humped shapes, whether or not the number of the persons who ride on the two-wheel vehicle is at least two persons or more. |
| US11417107B2 |
Stationary vision system at vehicle roadway
A stationary vision system at a road along which vehicles travel includes an imaging sensor disposed at the road and having a field of view that encompasses a portion of the road. A wireless communication device is operable to wirelessly communicate with vehicles traveling along the road. A control includes a data processor operable to process image data captured by the image sensor. The control is operable to communicate with vehicles traveling along the road via the wireless communication device. The control, responsive to processing of image data captured by the imaging sensor, generates a three dimensional (3D) model of the portion of the road encompassed by the field of view of the imaging sensor. The control transmits the 3D model to vehicles traveling along the road. |
| US11417106B1 |
Crowd evacuation system based on real time perception, simulation, and warning
A method for real-time crowd management includes receiving LiDAR point cloud data from area of interest, forming a 3D static surface model of area of interest from LiDAR point cloud data, obtaining real-time CCTV camera images of area of interest, adding real-time CCTV camera images to 3D static surface model to generate real-time dynamic 3D model, identifying dynamic objects in the 3D model, generating a density map of an area of interest, adding density map to the 3D model, identifying which dynamic objects are people, replacing each person with animated character, displaying real-time dynamic 3D model, monitoring the 3D model in the area of interest for dangerous situations, simulating evacuation of area of interest by manipulating animated characters onto pathways leading away from area of interest, forming an evacuation strategy for crowd, and transmitting a notice of the dangerous situation and the evacuation strategy to an emergency authority. |
| US11417098B1 |
Determining location coordinates of a vehicle based on license plate metadata and video analytics
An apparatus including a location device and a processor. The location device may be configured to determine location coordinates of the apparatus. The processor may be configured to receive video frames captured by a capture device, perform video analysis on the video frames to detect objects in the video frames and extract metadata corresponding to the objects detected in the video frames, correlate the metadata with the location coordinates, determine a distance from the apparatus to the objects in the video frames and calculate an absolute location of the objects in response to the distance and the location coordinates. The distance may be determined by comparing a size of the objects detected in the video frames with a known size of the objects. The absolute location for the objects in the video frames may be added to the metadata. |
| US11417095B2 |
Image recognition method and apparatus, electronic device, and readable storage medium using an update on body extraction parameter and alignment parameter
An image recognition method is provided. The method includes obtaining predicted locations of joints of a target person in a to-be-recognized image based on a joint prediction model, where the joint prediction model is pre-constructed by: obtaining a plurality of sample images; inputting training features of the sample images and a body model feature to a neural network and obtaining predicted locations of joints in the sample images outputted by the neural network; updating a body extraction parameter and an alignment parameter; and inputting the training features of the sample images and the body model feature to the neural network to obtain the joint prediction model. |
| US11417094B2 |
Method of selecting important digital images
A method for selecting important digital images in a collection of digital images, comprising: analyzing the digital images in the collection of digital images to identify one or more sets of similar digital images; identifying one or more sets of similar digital images having the largest number of similar digital images; selecting one or more digital images from the identified largest sets of similar digital images to be important digital images; and storing an indication of the selected important digital image in a processor accessible memory. |
| US11417088B2 |
Information processing device, information processing method, program, and information processing system
A device and method for acquiring captured image data obtained by an unmanned aerial vehicle (UAV), identifying a direction that a target appearing in the captured image data faces, outputting an approach curve used to move the UAV from a current UAV position to a UAV position closer to the face of the person based on the identified direction that the face of the person faces, where the approach curve includes an arc portion connecting the current position to a straight line portion at an approach contact point located a predetermined distance in front of the face of the person, the straight line portion connecting the approach contact point to the position closer to the face of the person. |
| US11417082B2 |
Image processing system
An image processing system identifies objects within images or video segments. To identify an object within an image, the system identifies one or more regions of an image that contain an object. In some examples, a tracklet is used to track an object though a plurality of image frames within a video segment allowing more than one image frame to be used in object detection, and thereby increasing detection accuracy. Various embodiments utilize a deep learning based object detection framework and similar object search framework that models the correlations present between various object categories. The system determines a category for each object detected using a hierarchical tree of categories to learn the visual similarities between various object categories. The hierarchical tree is estimated by analyzing the errors of an object detector which does not use any correlation between the object categories. |
| US11417081B2 |
Automated system and methodology for feature extraction
Automated methods and systems for feature extraction are disclosed, including automated methods performed by at least one processor running computer executable instructions stored on at least one non-transitory computer readable medium, comprising determining and isolating an object of interest within a point cloud; forming a modified point cloud having one or more data points with first location coordinates of the object of interest; and generating a boundary outline having second location coordinates of the object of interest using spectral analysis of at least one section of at least one image identified with the first location coordinates and depicting the object of interest. |
| US11417078B2 |
Image processing method and apparatus, and storage medium
The present disclosure relates to an image processing method and apparatus, an electronic device, and a storage medium. The method includes: performing feature extraction on a to-be-processed image to obtain a first feature map of the to-be-processed image; performing target region prediction on the first feature map to determine a first region where a target is located in the first feature map; and performing key point detection on the first feature map according to the first region to determine target key point information of the to-be-processed image. According to embodiments of the present disclosure, quick and accurate target key point detection can be implemented. |
| US11417075B2 |
Object detection techniques using colorspace conversions
Techniques, devices, and systems to improve detection and security of a displayed image on a screen of a computer device, such as a device, including detection of an object in an environment, where the object has an inverse-colorspace relationship in relation to the colorspace of the environment. A system includes: a first camera device configured to determine a first underlying colorspace corresponding to an environment, a second camera device configured to determine a second underlying colorspace corresponding to either i) an actual change in the environment or ii) a predicted change in the environment, and a computer device configured to determine an inverse colorspace of at least one of i) the first underlying colorspace or ii) the second underlying colorspace and configured to detect an object in the environment based on the inverse colorspace determination. |
| US11417069B1 |
Object and camera localization system and localization method for mapping of the real world
An object and camera localization system and localization method for mapping of the real world. The mapping can be done in real-time or near real-time to the detection of the real objects by a camera device which is used to capture one or more images of an object. The localization method can be used to generate an object label of the object and a bounding box of the object in the image. The localization method can be used to generate anchor points in real world coordinates of the real 3D space of the object, a cuboid of the object, and a centroid of the cuboid. A virtual 3D map can be generated that which includes the location and pose of the real object in the real-world coordinates. |
| US11417068B1 |
System and method for augmented reality interaction at a self-service terminal
A system and method for providing an augmented reality (AR) interaction zone to a user of a mobile device to provide remote access to a self-service terminal (SST) having a controller, a display for providing information and instructions to a user, a keypad for entering user data and user commands, and a camera (preferably a depth camera). A mobile device selectively initiates, based on a user command, a transaction by establishing a wireless communications channel with the SST. The controller generates the AR interaction zone based on signals from the camera, provides a signal to the mobile device to display an AR input field on an integral display, processes signals from the camera to monitor the AR interaction zone for user movement corresponding to input, identifies input based on the signals from the camera, and causes the SST to process a requested user transaction based on the identified input. |
| US11417066B2 |
System and method for selecting targets in an augmented reality environment
Techniques are disclosed for facilitating electronic commerce in an augmented reality environment. In some embodiments, a method comprises detecting, by a mobile device, presence of the physical product or the real life service; and presenting, on the mobile device, information to conduct the transaction of a physical product or a real life service via the augmented reality environment. In some embodiments, a method comprises detecting one or more targets in the augmented reality platform using a select area in a perspective of a user, the perspective being captured by a mobile device; and prompting the user to choose an object of interest from the one or more detected targets. |
| US11417063B2 |
Determining a three-dimensional representation of a scene
One or more images (e.g., images taken from one or more cameras) may be received, where each of the one or more images may depict a two-dimensional (2D) view of a three-dimensional (3D) scene. Additionally, the one or more images may be utilized to determine a three-dimensional (3D) representation of a scene. This representation may help an entity navigate an environment represented by the 3D scene. |
| US11417057B2 |
Realistic 3D virtual world creation and simulation for training automated driving systems
A computer implemented method of creating a simulated realistic virtual model of a geographical area for training an autonomous driving system, comprising obtaining geographic map data of a geographical area, obtaining visual imagery data of the geographical area, classifying static objects identified in the visual imagery data to corresponding labels to designate labeled objects, superimposing the labeled objects over the geographic map data, generating a virtual 3D realistic model emulating the geographical area by synthesizing a corresponding visual texture for each of the labeled objects and injecting synthetic 3D imaging feed of the realistic model to imaging sensor(s) input(s) of the autonomous driving system controlling movement of an emulated vehicle in the realistic model where the synthetic 3D imaging feed is generated to depict the realistic model from a point of view of emulated imaging sensor(s) mounted on the emulated vehicle. |
| US11417052B2 |
Generating ground truth datasets for virtual reality experiences
Systems and methods of generating ground truth datasets for producing virtual reality (VR) experiences, for testing simulated sensor configurations, and for training machine-learning algorithms. In one example, a recording device with one or more cameras and one or more inertial measurement units captures images and motion data along a real path through a physical environment. A SLAM application uses the captured data to calculate the trajectory of the recording device. A polynomial interpolation module uses Chebyshev polynomials to generate a continuous time trajectory (CTT) function. The method includes identifying a virtual environment and assembling a simulated sensor configuration, such as a VR headset. Using the CTT function, the method includes generating a ground truth output dataset that represents the simulated sensor configuration in motion along a virtual path through the virtual environment. The virtual path is closely correlated with the motion along the real path as captured by the recording device. Accordingly, the output dataset produces a realistic and life-like VR experience. In addition, the methods described can be used to generate multiple output datasets, at various sample rates, which are useful for training the machine-learning algorithms which are part of many VR systems. |
| US11417050B2 |
Image adjustment device, virtual reality image display system, and image adjustment method
A region image extractor extracts a region image from an omnidirectional image or a superimposed image obtained by superimposing a sphere image on the omnidirectional image. An image rotation unit corrects the tilt of the horizontal plane of the omnidirectional image by rotating the omnidirectional image through an operation to rotate the sphere image while the region image of the superimposed image is displayed on the head-mounted display. A vanishing point detector detects a vanishing point of the omnidirectional image. A front setting unit determines the front of the omnidirectional image based on the vanishing point and rotates the omnidirectional image so that the front of the omnidirectional image corresponds to the region image extracted when the user is facing forward. |
| US11417049B2 |
Augmented reality wall with combined viewer and camera tracking
A system for real-time updates to a display based upon the location of a camera or a detected location of a human viewing the display or both is disclosed. The system enables real-time filming of an augmented reality display that reflects realistic perspective shifts. The display may be used for filming, or may be used as a “game” or informational screen in a physical location, or other applications. The system also enables the use of real-time special effects that are centered upon an actor or other human to be visualized on a display, with appropriate perspective shift for the location of the human relative to the display and the location of the camera relative to the display. |
| US11417047B2 |
Method and system for diffusing color error into additive manufactured objects
A method of processing data for additive manufacturing of a 3D object comprises: receiving graphic elements defining a surface of the object, and an input color texture to be visible over a surface of the object; transforming the elements to voxelized computer object data; constructing a 3D color map having a plurality of pixels, each being associated with a voxel and being categorized as either a topmost pixel or an internal pixel. Each topmost pixel is associated with a group of internal pixels forming a receptive field for the topmost pixel. A color-value is assigned to each topmost pixel and each internal pixel of a receptive field associated with the topmost pixel, based on the color texture and according to a subtractive color mixing. A material to be used during the additive manufacturing is designated based on the color-value. |
| US11417044B2 |
Advanced delay analysis mechanism
A computer graphics display system and method which places moving and color changing geometric shapes, which represent tasks of a project, on a circular graph by means of a display such as a computer monitor, (similar to a radar screen) which alerts the user to impending delays to a project by means of visualization of the movement and color change of the geometric shapes or “blips” on the circular graph.The method comprises extracting information from planning calculations, then translating this information into an animated visual radial graphic display. |
| US11417041B2 |
Style-aware audio-driven talking head animation from a single image
Embodiments of the present invention provide systems, methods, and computer storage media for generating an animation of a talking head from an input audio signal of speech and a representation (such as a static image) of a head to animate. Generally, a neural network can learn to predict a set of 3D facial landmarks that can be used to drive the animation. In some embodiments, the neural network can learn to detect different speaking styles in the input speech and account for the different speaking styles when predicting the 3D facial landmarks. Generally, template 3D facial landmarks can be identified or extracted from the input image or other representation of the head, and the template 3D facial landmarks can be used with successive windows of audio from the input speech to predict 3D facial landmarks and generate a corresponding animation with plausible 3D effects. |
| US11417040B1 |
Media preview placement within a graphical user interface
Multiple sinusoidal pathways may be used to determine placement of media previews on a graphical user interface. Center points may be placed along the multiple sinusoidal pathways such that a group of adjacent center points forms a triangle. Media previews may be arranged for presentation by placing centers of the media previews on the center points along the multiple sinusoidal pathways. |
| US11417034B2 |
Spectral imaging with a non-spectral imaging system
An imaging system (102) includes a radiation source (112) configured to emit X-ray radiation, a detector array (114) configured to detect X-ray radiation and generate a signal indicative thereof, an a reconstructor (116) configured to reconstruct the signal and generate non-spectral image data. The imaging system further includes a processor (124) configured to process the non-spectral image data using a deep learning regression algorithm to estimate spectral data from a group consisting of spectral basis components and a spectral image. |
| US11417031B2 |
Highlighting a tagged object with augmented reality
Methods and devices systems related to a computing device for highlighting a tagged object with augmented reality (AR) are described. An example method can include identifying, using a computing device, an object tagged with a sensor within a plurality of objects. The example method can include tracking movement of the object based on communication between the sensor and the computing device and highlighting the object via AR based on the tracking and responsive to a request to locate the object. |
| US11417026B2 |
Operating method of image processor with varying packing directions, image processing apparatus with varied packing directions, and operating method of the image processing apparatus with the varied packing directions
An operating method of an image processor includes dividing image data into a plurality of data blocks and compressing each of the plurality of data blocks. The operating method also includes determining a packing direction as a determined packing direction, in which a corresponding compressed data block of a plurality of compressed data blocks is to be stored, based on a data size of the corresponding compressed data block and a start address of a storage area where the corresponding compressed data block is to be stored among a plurality of storage areas of a memory. Each of the plurality of compressed data blocks is packed in a corresponding storage area among the plurality of storage areas of the memory based on the determined packing direction. |
| US11417022B2 |
Fry assessment system and method
A fry assessment system (10) is disclosed and includes an image analyzer (12). The image analyzer (12) includes both a fry identification module (90) and a fry scoring module (100). A color image (70) is analyzed by the fry identification module (90) to identify all fries in the color image (70). Thereafter, the fry scoring module (100) determines a score for each identified fry in the color image (70). These determined scores may be used for any appropriate purpose, for instance for purposes of determining a selling price for associated potatoes, to monitor a condition of associated potatoes in a common storage area, or the like. |
| US11417007B2 |
Electronic apparatus and method for controlling thereof
A method of controlling an electronic apparatus includes acquiring an image and depth information of the acquired image; inputting the acquired image into a neural network model trained to acquire information on objects included in the acquired image; acquiring an intermediate feature value output by an intermediate layer of the neural network model; identifying a feature area for at least one object among the objects included in the acquired image based on the intermediate feature value; and acquiring distance information between the electronic apparatus and the at least one object based on the feature area for the at least one object and the depth information. |
| US11417004B2 |
Variable transforms for three-dimensional engines
Disclosed are various embodiments of variable transform systems for three-dimensional engines. In some aspects, transform data is identified for an object. The object is associated with a base transform class of a three-dimensional engine. A variable transform class generates global transform data using the transform data. The global transform data is expressed according to a cartesian coordinate system used by the three-dimensional engine. The variable transform class provides the global transform data to the base transform class of the three-dimensional engine to position the object in world space. |
| US11417001B1 |
Detecting discrete optical patterns using depth estimation
Image data from a camera and depth information from a depth sensor, such as a LiDAR system, are used to segment an image for decoding an optical pattern. The image data is spatially correlated with the depth information. The depth information is used to partition the image into one or more foreground segments and one or more background segments. Scanning for the optical pattern is performed on the one or more foreground segments. |
| US11417000B2 |
Image processing system, image processing method, and non-transitory storage medium
An image processing apparatus includes a first classification unit configured to classify each of a plurality of pixels included in a three-dimensional medical image using a first classifier for classifying each pixel into a plurality of classes including a class representing a first target region, a determination unit configured to determine an image region including the first target region and a second target region from the three-dimensional medical image based on a first classification result, a second classification unit configured to classify each of a plurality of pixels included in the determined image region using a second classifier for classifying each pixel into a plurality of classes including at least either one of a class representing the first target region and a class representing the second target region, and an integration unit configured to integrate the first and the second classification results to acquire a third classification result. |
| US11416998B2 |
Pixel classification to reduce depth-estimation error
A method to process a contributing digital image of a subject in an image-processing computer. The contributing digital image is received in a depth-resolving machine configured to furnish a depth image based at least in part on the contributing digital image. The contributing digital image is also received in a classification machine previously trained to classify a pixel of the contributing digital image as liable to corrupt a depth value of a corresponding pixel of the depth image. A repair value is computed for the depth value of the corresponding pixel of the depth image, which is then corrected based on the repair value and returned to the calling process. |
| US11416997B2 |
Systems, methods, and apparatuses for image capture and display
Provided are systems and methods that allow a user to capture images at low- and high-level magnification and then overlay the high-level magnification images on the low-level magnification image to ease review of the images. The high-level magnification images may be overlaid on the low-level magnification image based at least in part on the portion of the low-level magnification image from which the high-level image was originated. |
| US11416996B2 |
Method to derive a person's vital signs from an adjusted parameter
The present application discloses a method of adjusting a parameter, the parameter being used to derive a physiological characteristic of an individual from an image of the user, the method comprising the steps of: obtaining the parameter for the individual; obtaining a corresponding parameter for a plurality of other individuals within a cohort of the individual; comparing the parameter for the individual with a statistically significant parameter for the plurality of other individuals; and adjusting the parameter for the individual in accordance with the difference between the parameter for the individual and the statistically significant parameter for the plurality of other individuals. |
| US11416995B2 |
Systems, devices, and methods for contactless patient registration for a medical procedure
Methods and apparatuses for performing patient registration. 3D scan data from a 3D scanner, preoperative image data, first tracking data from a first tracking system, and second tracking data from a second tracking system are mapped to a common coordinate space. The 3D scan data and the first tracking data are mapped to each other using a transformation that is determined based on a calibration relating the 3D scan coordinate space and the tracking coordinate space. The 3D scan data and the preoperative image data are mapped to each other using a surface matching algorithm. The first tracking data and the second tracking data are mapped to each other based on tracking of the patient reference device. |
| US11416990B1 |
Method and system to obtain cytology image in cytopathology
Example methods and systems to obtain images associated with target cells distributed in a cytology specimen have been disclosed. One example method includes obtaining a first image associated with a first region of the cytology specimen through a first object lens, determining a first subregion of the first region, obtaining a second set of one or more images associated with the first subregion through a second object lens, identifying a third image from the first image, and in response to a ratio of a second number of the target cells in the second set of one or more images to the first number of the target cells in the third image being in a predetermined range, obtaining images associated with the target cells based on the second set of images. |
| US11416988B2 |
Apparatus and method for visualizing visually imperceivable cosmetic skin attributes
A method of visualizing at least one cosmetic skin attribute of a subject is provided. The method includes obtaining a digital image of the face of a person, defining a plurality of tiles across the image, analyzing each of the defined tiles for the at least one cosmetic skin attribute, assigning a single degree of indicium uniquely to each tile based on the analyzed at least one cosmetic skin attribute of the tile, and displaying at least some of the tiles so that a user can visualize the cosmetic skin attribute. The displayed tiles may be selected to indicate to user a cosmetic skin attribute condition that is better relative to the non-displayed tiles, based on the analyzed skin attribute. |
| US11416986B2 |
Simulating visual field test from structural scans
Aspects of the invention include a computer implemented method for simulating visual field test results from structural scans, the method includes processing eye image data to extract visual functioning related features. Additionally, generating a representation of a visual function of the eye that is independent of a visual field test (VFT) configuration. Then generating a simulated VFT configuration specific test result based at least in part on the representation. |
| US11416985B2 |
Medical image processing apparatus, endoscope apparatus, diagnostic support apparatus, medical service support apparatus, and report creation support apparatus
A medical image processing apparatus includes a medical image acquisition unit that acquires the medical image including a subject image, a medical image analysis result acquisition unit that acquires an analysis result obtained by analyzing the medical image, a display unit that displays at least one medical image and at least information on presence or absence of a treatment tool or a type of a treatment tool in the analysis result acquired by the medical image analysis result acquisition unit, and an input receiving unit that receives an input regarding whether or not the information on presence or absence of a treatment tool or a type of a treatment tool included in the analysis result is correct. |
| US11416984B2 |
Medical image processing apparatus, medical image generation apparatus, medical image processing method, and storage medium
According to one embodiment, a medical image processing apparatus includes an acquirer, a first processor and a second processor. The acquirer is configured to acquire nonequispaced sampled data from a test object. The first processor is configured to derive product-sums of the nonequispaced sampled data acquired by the acquirer and a plurality of coefficient sets and generate equispaced sampled data including a plurality of elements with which the product-sums derived for the coefficient sets are associated as element values. The second processor is configured to generate a medical image in which at least part of the test object has been imaged through reconstruction basis on the equispaced sampled data generated by the first processor. |
| US11416983B2 |
Server-client architecture in digital pathology
A client and server are provided with the same digital image of a slice of a biological material, which has been applied with a staining substance. The server is used for pre-processing the digital image and provides results of the pre-processing to the client in turn of a request. The server is configured to classify each pixel of the digital image, wherein the pixel is classified as stained, The client is configured to determine the region of interest at the digital image, and request data related to the classification of the pixels at the region of interest at the server. The server can provide the classification results related to the classification of the pixels at the region of interest at the digital image to the client. |
| US11416980B2 |
Wetwood detection in sawn or planed wood products
The present disclosure provides embodiments of methods, systems, and apparatuses for detecting wet spots on machined surfaces of wood workpieces. Images of laser spots on a workpiece may be processed to determine area and aspect ratio values of the laser spots. Wet spots may be detected on the workpiece based at least on the area and aspect ratio values, and optionally based in part on color image data. A facility may use wet spot detection in grade determination and/or to classify wood pieces as ‘wet’ or ‘dry’ for the determination of appropriate drying conditions. |
| US11416979B2 |
Defect displaying method
A defect displaying method is provided in the disclosure. The method comprises acquiring defect group information from an image of a wafer, wherein the defect group information includes a set of correlations between a plurality of defects identified from the image and one or more corresponding assigned defect types and displaying at least some of the plurality of defects according to their corresponding assigned defect types. |
| US11416978B2 |
Image processing apparatus, control method and non-transitory computer-readable recording medium therefor
An image processing apparatus acquires a first image which captures a scene including an object from a first viewpoint position and a second image which captures a scene including the object from a second viewpoint position, and associates a coordinate position corresponding to a position of a feature of the object on the first image with a coordinate position corresponding to a position of a feature of the object on the second image. The image processing apparatus determines a partial region in the second image corresponding to a give region in the first image based on the association, generates a synthesized image by replacing an image of the given region using an image of the determined partial region, and superimposing variation data on the synthesized image. |
| US11416975B2 |
Information processing apparatus
An information processing apparatus constructs a virtual space to express a subject by acquiring an image obtained by observing a reality space in which one or more subjects are present, and arranging a plurality of unit volume elements at positions that are determined depending on a subject captured in the acquired image, and the information processing apparatus constructs a virtual space by arranging multiple types of unit volume elements with different sizes. |
| US11416973B2 |
Radiometric correction in image mosaicing
The presently disclosed subject matter includes a computerized method and system dedicated for reducing image artifacts and differences in an image mosaic and providing a smooth output image build from a collection of partially overlapping images. According to the disclosed technique image correction is applied on all regions of the corrected image and not only on overlapping regions between images. |
| US11416972B2 |
System and method for reflection removal using dual-pixel sensor
A system and method for reflection removal of an image from a dual-pixel sensor. The image including a left view and a right view. The method including: determining a first gradient of the left view and a second gradient of the right view; determining disparity between the first gradient and the second gradient using a sum of squared differences (SSD); determining a confidence value at each pixel using the SSD; determining a weighted gradient map using the confidence values; minimizing a cost function to estimate the background layer, the cost function including the weighted gradient map, wherein the image includes the background layer added to a reflection layer; and outputting at least one of the background layer and the reflection layer. |
| US11416969B2 |
System, method and computer program product for remoting orientation changes
A mobile device comprising a client application configured to receive a display stream for a virtual display of a virtual device, render a remote display in a local system user interface (UI), register a device orientation change of the mobile device, send an orientation change event message to the server, change the local system UI orientation to match the new orientation of the remote system UI based on receipt of a UI orientation signal that indicates a new orientation of the remote system UI of the virtual device, transform the display stream to compensate for changing the local system UI orientation to match the new orientation of the remote system UI and render the remote display from the transformed display stream. |
| US11416965B2 |
Image processing method, related device, and computer storage medium
An image processing method includes determining, based on a coordinate position of a to-be-interpolated sample in a target image, a first coordinate position of the to-be-interpolated sample in a source image, determining m reference samples based on the first coordinate position, determining an interpolation weight of each of the m reference samples for the to-be-interpolated sample based on a spherical distance between a coordinate position of each of the m reference samples and the first coordinate position, and determining a pixel value of the to-be-interpolated sample based on a pixel value corresponding to each of the m reference samples and the interpolation weight of each of the m reference samples for the to-be-interpolated sample to obtain the target image. |
| US11416963B2 |
Systems and methods to process electronic images to provide improved visualization and rendering of histopathology slides
A method for processing an electronic image including receiving, by a viewer, the electronic image and a FOV (field of view), wherein the FOV includes at least one coordinate, at least one dimension, and a magnification factor, loading, by the viewer, a plurality of tiles within the FOV, determining, by the viewer, a state of the plurality of tiles in a cache, and in response to determining that the state of the plurality of tiles in the cache is a fully loaded state, rendering, by the viewer, the plurality of tiles to a display. |
| US11416962B2 |
Adaptive compute size per workload
Methods and apparatus relating to techniques for power management. In an example, an apparatus comprises logic, at least partially comprising hardware logic, to receive one or more frames for a workload, determine one or more compute resource parameters for the workload, and store the one or more compute resource parameters for the workload in a memory in association with workload context data for the workload. Other embodiments are also disclosed and claimed. |
| US11416958B1 |
Mobile site watch
A method and system for monitoring people, projects, objects and properties to validate the status and quality of work completed, services provided and safety issues. The methods and systems described herein provides for a business solution (B2B, B2C and B2G) and consumer solution (C2C and C2B) that will receive data relating to tracking the onsite/offsite time of people assigned to perform a service or complete a task within a specified location, time-interval visual/audio status updates of work completed, map view to monitor multiple people, projects, objects and properties simultaneously, emergency and safety alerts for workers, safety ratings and reporting safety issues for schools/public/private spaces, tracking the delivery of mailed objects, smart mailbox and smart lockbox components, and white labeling of the mobile application to allow business users to brand it for their customers. |
| US11416951B2 |
Equipment management system and equipment management method
An equipment management system 100 comprises a manager 210 configured to manage information on a plurality of power generation facilities 300 having a power generation equipment 310 connected to a power grid configured by a power transmission network; and a controller 230 configured to, when defect information on defect of a power generation equipment 310 provided in a first power generation facility, which is one of the plurality of power generation facilities, is acquired, predict defect of a power generation equipment 310 provided in a second power generation facility, which is different from the first power generation facility. The controller 230 is configured to predict the defect of the power generation equipment 310 provided in the second power generation facility based on the cause of the defect of the power generation equipment 310 provided in the first power generation facility. |
| US11416949B2 |
Method and system for payment delegation using personalized multimedia mechanism
A system, method, and computer program product for providing personalized coordinated shopping among multiple participants in a network marketplace. Social group interactions are extended to shopping, to enhance the scope and efficiency of commerce. A shopping group comprising selected members of a social group includes an authorized purchaser and a number of shoppers who are not authorized to make purchases. A non-authorized purchaser selects desired items and sends a purchase approval request to the authorized purchaser, including a personalized video message describing and supporting the request. The personalized video message is sent to the authorized purchaser by communication means selected according to determined current availability, including via review of a social calendar. The authorized purchaser may approve, decline, or request further information from the requester, upon reviewing the purchase request. The authorized purchaser may modify the requested transaction, including the item actually purchased, the seller, and its shipping data. |
| US11416948B2 |
Image tagging for capturing information in a transaction
An image is captured within an application transaction. Identifying information corresponding to the captured image is obtained and displayed for user confirmation. The identifying information is entered into an appropriate place within the transaction. |
| US11416944B1 |
Blockchain-based systems and methods for self-managed peer group insurance
A blockchain-based social insurance (“BBSI”) computer system for creating a social insurance group is provided. The BBSI computer system includes at least one processor in communication with at least one memory device. The processor is programmed to receive social insurance group data and define at least one qualifying rule for joining the social insurance group. Each member of the social insurance group must satisfy the at least one qualifying rule to become a member of the social insurance group. The processor is programmed to generate at least one social insurance group blockchain including the qualifying rule and cause to be displayed on a user device the social insurance group data for review by a candidate member. The processor is also programmed to receive a registration message from the candidate member including a request to become a member of the group. |
| US11416937B2 |
System and method for optimizing the frequency of market information updates in an electronic trading environment
A system and method for optimizing the frequency of market information updates in an electronic trading environment are described herein. According to one example embodiment, by optimizing the frequency of market information updates, the burden on the client device to update the graphical user interface may be reduced, while still providing an accurate portrayal of the market to the user. An example method includes associating different precedence levels with messages comprising market information. Messages containing market information related to the inside market may be associated to a higher precedence level. Whereas messages containing market information relating to the quantities at prices outside the inside market may be associated with a lower precedence level. Based on the precedence level associated with a message, a client device may update the graphical user interface or the message may be stored in a data structure until a pre-defined condition is satisfied. |
| US11416935B2 |
System, method, and device for autonomous fund management by computer-based algorithms
A method for autonomous fund management including the steps of selecting a certain number of securities to create a first group of securities from a publicly traded index, discarding securities from the first group based on filter criteria to create a second group of securities, categorizing the securities from the second group of securities to assign the securities to different industry sectors, grouping a predefined number of the categorized securities into a number n of security pools, such that each security in a same security pool is categorized to a same industry sector, and trading securities within the security pools, such that a first quantity of a first security within a pool is sold and a second quantity of a second security within the pool is purchased when a trade trigger is met, the trade trigger including an event when a ratio between a price of the first security and a price of the second security meets a predefined threshold. |
| US11416933B2 |
Event management and validation platform using a recursive hierarchic blockchain
Aspects of the disclosure relate to implementation of a recursive hierarchic blockchain for event validation and processing. A computing platform may receive event data from first and second data sources. The computing platform may store, in a first distributed ledger, an event record for each event from the first data source and may store, in a second distributed ledger, an event record for each event from both data sources. In response to determining that a validation condition for a current block of the second distributed ledger has been satisfied, the computing platform may compute a hash and generate a numeric representation of the first distributed ledger. In a new block of the second distributed ledger, the computing platform may store the hash and the numeric representation. The computing platform may write, to the new block of the second distributed ledger, additional event data from both data sources. |
| US11416932B2 |
Virtual currency transaction system
Disclosed is a virtual currency transaction system. The virtual currency transaction system according to an embodiment of the inventive concept includes a virtual currency integration exchange server receiving buying request information and selling request information of virtual currency, matching the buying request information and the selling request information, which are suitable for a transaction condition, based on asking price information to make a transaction of virtual currency, and recording transaction conclusion information for each virtual currency transaction and a broker member server transmitting buying request information and selling request information, which are transmitted from a user terminal, to the virtual currency integration exchange server and receiving the asking price information and the transaction conclusion information from the virtual currency integration exchange server to provide the asking price information and the transaction conclusion information to the user terminal. |
| US11416927B1 |
Systems and methods for private loan creation
Examples described herein relate to media, apparatuses and methods. In an embodiment, a digital funding group for transactions initiated by a user via a user computing device is established. Information relating to a prospective transaction is received via a client application. The client application monitors a system idle timer of the user computing device and resets the system idle timer at predetermined time intervals, thereby maintaining the user computing device in active mode. The client application performs an electronic search for a sponsorship opportunity related to the at least one prospective transaction, generates a displayable result set comprising at least one prospective sponsor; renders the displayable result set, and responsive to a user selection of a particular sponsor from the displayable result set, causes the particular sponsor to be added to the digital funding group. |
| US11416924B2 |
Bill presentment based on a user learning style
Examples described herein relate to apparatuses and methods of determining an optimal viewing layout of a content item on a computing device based on user preference data. The method includes receiving a request for a content item associated with an account of a user. The method includes selecting a template having a set of elements for generating a content item. The method includes selecting a content item dataset associated with the content item. The method includes generating layout data based on the content item dataset and the selected template. The method includes sending the layout data, causing operations comprising assembling the content item for display in an application based on the layout data, and gathering user preference data in response to an interaction of the user with the displayed content item. The method includes updating the template based on the user preference data. |
| US11416923B1 |
System, method and apparatus for value exchange utilizing value-storing applications
A system, method and apparatus for exchanging value using a smart card in a financial transaction is disclosed. The system includes a smart card having a contact interface and a contactless interface interactive with a closed purse application and an open purse application controlled by a microprocessor. The closed purse application contains application-specific value, while the open purse contains general value. The application-specific value and general value are each compatible within the system of the invention to perform and settle the financial transaction. The financial transaction may include the smart card communicating with a load terminal or a transaction terminal to add or change the amount of value on the smart card. Further, the present invention include auto-load functionality for adding an amount of value to the smart card. Finally, applications such as a transportation application and a loyalty application are described. |
| US11416922B2 |
Method and apparatus for facilitating meta search proxy bidding
Various methods are provided for programmatically providing a platform for responding dynamically providing a response to a property level availability call through API request based on run-time information. One example method may comprise receiving the property level availability call, the property level availability call configured to elicit a response identifying an availability of one or more of the plurality of specified properties for a specified time frame, determining, based on an associated bid, whether an affirmative response to the property level availability call is profitable, and in an instance in which the affirmative response is profitable, causing transmission of the affirmative response. |
| US11416920B2 |
Analytics engine for multiple blockchain nodes
A first device receives, via a blockchain node of the first device, data and constraints associated with a smart contract, where the smart contract is deployed via a blockchain node associated with a second device, the first and second devices are provided in a blockchain network, through their blockchain nodes. The first device provides, via the blockchain node, the data and constraints to an analytics engine of the first device, and performs, via the analytics engine, a data analytics technique on the data and constraints to generate an offer with optimized parameters. The first device provides the offer with the optimized parameters to the smart contract associated with the second device, and receives, via the blockchain node, a confirmation of a transaction associated with the smart contract. The first device causes the offer with the optimized parameters to be implemented based on receiving the confirmation of the transaction. |
| US11416919B2 |
System and method for retrieving an unlock code via electronic messaging
The disclosure generally relates to a system and method for managing distributed encrypted combination over-locks from a remote location, where unlock codes for over-locks are transmitted via electronic messaging. In an exemplary embodiment, the invention is a distributed management system that controls access to various locations, such as, for example, self-storage units, hotel rooms, apartment buildings, storage containers, short-term housing rentals, lockers, equipment rooms, vaults, hospitals, airports, government facilities, nuclear power facilities, water treatment facilities, weapon storage facilities, aircraft cockpits, and any other setting that requires restricted, selective, or monitored access that can be remotely controlled, whereby users can request an unlock code via text messaging using a mobile device. |
| US11416918B2 |
Systems/methods for identifying products within audio-visual content and enabling seamless purchasing of such identified products by viewers/users of the audio-visual content
An automated system/method for identifying and enabling viewer selection/purchase of products or services associated with digital content presented on a display device. Products within the digital content are identified and existing product placement data is ascertained. For products that do not include such data, other methodologies, with the assistance of third-party servers, are employed to assess identity and purchase availability. Viewer input designate products to assess or products can be automatically assessed. Viewers initiate purchase of identified products via the display device or other electronic devices controlled by viewers, such as via viewers' smart phones. Various processes for identifying products include use of AI processing, access to data on third-party servers, crowd sourcing and other methodologies. Various techniques for selecting products for purchases are employed including employing 3D codes (e.g., QR codes) alongside presented products to enable other portable electronic devices to facilitate purchase. Other features are described. |
| US11416917B2 |
Content carousel
Described herein are techniques for presenting a graphical user interface with an improved content carousel for presenting a set of content items (e.g., images, photos, video clips, content/page links) in accordance with configuration settings set by an end-user. The content carousel may, for example, select content and present content in a manner that is consistent with the configuration settings established by the end-user, thereby giving the end-user confidence to invoke the content carousel in a variety of scenarios where content carousels might not traditionally be deployed. |
| US11416912B2 |
High volume transaction queueing with machine learning
Embodiments of the invention are directed to a system and method for providing a high-volume transaction queueing, reserve ecommerce solution that automatically engages and queues transactions when a primary back-end transaction processing system becomes unresponsive or unstable. Through machine learning algorithms, embodiments of the invention control transaction submission rates by queuing them and throttling the rate at which they are processed based on self-awareness and constant monitoring, feedback and health checks of the primary system. When metrics indicate that the third-party system can begin accepting transactions again, the system automatically feeds the queued transactions along with real-time orders at a rate that the third-party system can successfully manage. |
| US11416909B1 |
Electronic marketplace recommendations
A shared “universal” virtual shopping cart (“the cart”) may be provided by a host to enable information sharing between multiple disparate electronic marketplaces provided by various merchants. The host may obtain user information via the cart to improve interactions with a user. The host may recommend an item to the user that is offered at a lower price and related to an item retained in the user's cart. The host may also recommend items based on a user's purchase history, such as complementary items (e.g., up-sell items) and items other users may recommend. In some aspects, the host may compile best selling lists based on data from multiple electronic marketplaces. The host may also perform user specific operations such as indicate an item in a cart is a duplicate of a previous purchase and monitor a price and/or available quantities of an item in the cart. |
| US11416907B2 |
Unbiased search and user feedback analytics
Performing an unbiased product search. Keywords related to a product are received. A list of products is generated, based on product information in online content received in response to searches based on the keywords. An anonymized list of products is generated from the list of products by masking product brand names of the products in the list of products. For each product in the list of products, a list of online feedback items is generated. Based on credibility analysis and sentiment analysis of feedback items associated with a product, an aggregate rating score is assigned to the product. The list of products is ranked according to the aggregate rating scores. The ranked, anonymized list of products is presented on a user interface. |
| US11416905B2 |
Information processing device, information processing method, and information processing program for associating categories with items using feature points of a reference image
The present invention aims to provide an information processing device, an information processing method, and the like capable of reducing labor of associating an item for sale with a category. The information processing device acquires an image specified by a user. The information processing device extracts a feature value of the specified image. The information processing device acquires category information corresponding to an item for sale represented by the specified image. The information processing device searches for images similar to the specified image, based on the extracted feature value. The information processing device causes at least one of the found images to be displayed as a search result. The information processing device, when the user has selected any one image from the displayed search result, makes a storage unit store the acquired category information in association with sale item identification information corresponding to the selected image. |
| US11416904B1 |
Account manager virtual assistant staging using machine learning techniques
A method for machine learning-based account manager virtual assistant staging includes receiving a message and a classification, generating a staging record, generating a status using staging rules, generating an order when the message classification is order and the status is complete, and transmitting the order. An account manager virtual assistant staging system includes a processor and a memory storing instructions that cause the system to receive a message and a classification, generate a staging record, generate a status using staging rules, generate an order when the message classification is order and the status is complete, and transmit the order. A non-transitory computer readable medium contains program instructions that when executed, cause a computer to receive a message and a classification, generate a staging record, generate a status using staging rules, generate an order when the message classification is order and the status is complete, and transmit the order. |
| US11416896B2 |
Customer journey management engine
Provided is a process, including: obtaining a first training dataset, training a first machine-learning model on the first training dataset, obtaining a set of candidate question sequences, forming virtual subject-entity records, forming a second training dataset, training a second machine-learning model, and storing the adjusted parameters of the second machine-learning model in memory. |
| US11416894B2 |
Peer share community system with movable display screen
An information sharing system with a display screen and a network computing system is disclosed. The display screen may be capable of either being manually moved by a person or move automatically under its own power. The apparatus also includes a power system, a communication subsystem, a memory and a computing device. The communication subsystem communicates with the computing device, the network computing system, and the memory. The network computing system has an end-user display screen. The network computing system is configured to receive media and media secondary information, associate the media and media secondary information to a unique identifier, and show the media and the unique identifier on the display screen. The networking computing system is further configured to receive the unique identifier and an end-user account, and then show the media secondary information on the end-user display screen. |
| US11416893B2 |
Systems and methods for predicting user segments in real-time
Systems and methods including one or more processors and one or more non-transitory storage devices storing computing instructions configured to run on the one or more processors and perform recording one or more actions of a user during an online browsing session; predicting, in real-time, a first user attribute for the user from one or more user attributes during the online browsing session based on the one or more actions of the user during the online browsing session; correlating the first user attribute, as predicted, for the user, wherein a first user preference of one or more user preferences is associated with the first user attribute, as predicted; and mapping each respective user preference of the one or more user preferences to a vector space, wherein: two or more user preferences of the one or more user preferences determined to be more similar to one another are closer together on the vector space than two or more user preferences of the one or more user preferences determined to be less similar to one another. Other embodiments are disclosed herein. |
| US11416892B2 |
Non-transitory computer-readable recording medium, determination method, and information processing apparatus
A server inputs behavior information of a target to a trained machine learning model that learn a plurality of association relations obtained by associating combinations of behaviors generated from a plurality of behaviors included in a plurality of training data items with likelihoods indicating certainties that the combinations of the behaviors are in a specific state, the trained machine learning having been trained by using the plurality of training data items obtained by associating combinations of behaviors of persons corresponding to the specific state. The server specifies a difference between the combination of the behaviors in each of the plurality of association relations and the behavior information of the target based on output results of the trained machine learning model, and determines an additional behavior for causing the target to transit to the specific state based on the likelihood the difference. |
| US11416888B1 |
System for suggesting compliant digital promotion for a regulated product and related methods
A system for determining regulatory compliance of a digital promotion may include a user device and a regulatory offers server. The server may obtain, via the user device, a proposed digital promotion associated with a regulated product, a geographic region, and proposed promotional terms. A corresponding legal jurisdiction corresponding to the geographic region may be determined, and if the promotion is compliant based upon the regulations for the corresponding jurisdiction, the proposed promotion, and the proposed promotional terms may be determined. If the promotion is not compliant, the proposed promotional terms may be revised to generate a suggested compliant promotion based upon the regulations for the corresponding jurisdiction. A compliance indication may be communicated to the user device, and when not compliant, the suggested compliant digital promotion may also be communicated. |
| US11416885B1 |
Digital promotion processing system for generating a digital promotion based upon durable good product replacement dates and related methods
A digital promotion processing system may include user devices each associated with a respective different user and a promotion processing server. The promotion processing server may be configured to store historical purchase data for durable good products purchased by the users. The historical purchase data may include a replacement lifespan and a purchase date. The promotion processing server may also be configured to determine an expected product replacement date for a given durable good product from among the durable good products based upon an elapsed time from the purchase date relative to the replacement lifespan, and upon reaching the expected product replacement date, generate and communicate a digital promotion for a replacement durable good product to a corresponding one of the user devices. |
| US11416880B2 |
Method, apparatus, and computer program product for forecasting demand using real time demand
Provided herein are systems, methods and computer readable media for managing a sales pipeline, and in some embodiments, generating demand based on real time demand and predicted demand. An example method comprises generating a virtual promotion, wherein the virtual promotion comprises a combination of a category or sub-category, a location, and a price range, calculating a probability that a particular consumer would buy the virtual offer in a predetermined time period, wherein the probability is generated at least based on historical data related to the particular consumer and one or more related consumers, determining an estimated number of units to be sold for the virtual offer as a function of at least the probability, the estimated number of units representing a predicted demand, calculating a real time demand, wherein the real time demand is generated based on a plurality of generated identification pairs for the predetermined time period, and determining, using a processor, total demand by summing the predicted demand and the real time demand. |
| US11416878B2 |
Detection of usage of a physical environment
Methods, systems, and apparatuses may provide for the auto-determination of partial usage of a physical environment and use derived intelligence to take various actions. This may allow for partial resulting maintenance of the physical environment based on a single use or use over time. |
| US11416871B2 |
Method for determining data to be transmitted off aircraft for processing of aircraft weight and center of gravity information
An aircraft operation method of providing weight and center of gravity information is used to dispatch the aircraft. The aircraft has telescoping landing gear struts and strut seals that interfere with the free movement of the strut. An event trigger signaling departure is detected from aircraft operations at a loading area. Internal strut pressure is measured and recorded upon detection for a period of time as the aircraft moves away. The recorded pressure measurements are transmitted to a first off-aircraft computer, which determines the total weight and center of gravity of the aircraft and provides the information to an operator of the aircraft. |
| US11416869B2 |
Devices, systems and processes for substantially simultaneous payment verification using multi-factor authentication
Embodiments of devices, systems and processes for substantially simultaneous payment verification using multi-factor authentication are described. A system may include a user payment system (UPS), a point of sale system (POS) communicatively coupled to the user payment system, and an issuing bank system (IBK) communicatively coupled to at least the POS. The IBK system may include an IBK hardware processor configured to execute first non-transient computer executable instructions including instructions for establishing a direct connection between the IBK and the UPS. The instructions may also include those for communicating, using the direct connection, a query to the UPS, receiving a first response, from the UPS, to the query, and based, upon the first response, determining whether to approve a given transaction. The direct connection may use a 5G wireless link. The query may be communicated to substantially simultaneously with receipt of a request to approve the given transaction. |
| US11416864B2 |
System, method, and computer program product for fraud management with a shared hash map
A method, system, and computer program product for fraud management with a shared hash map. A shared hash map may include a plurality of identifiers mapped to a plurality of buckets by at least one hash function. One or more buckets of the plurality of buckets may include at least one blockchain. The at least one blockchain may include fraud data associated with one or more fraudulent transactions. A method may include storing the shared hash map, receiving an update to the shared hash map, and providing a copy of the shared hash map. A method may include storing a local copy of the shared hash map, receiving transaction data associated with a transaction, accessing fraud data in the local copy of the shared hash map, and determining an authorization or a denial of the transaction based on the fraud data. |
| US11416858B2 |
Providing access to a networked application without authentication
A method and apparatus are herein disclosed for allowing suppliers to generate an invoice from a purchase order without requiring them to log in or pre-register with a networked application. Implementation is provided by having a first user provide a first document to a networked application. An electronic notification is dispatched to a receiver for the first document with a unique link to a data entry page within the networked application. The data entry page is sandboxed with limited functionality within the networked application, but accepts data from the receiver to be sent directly into the first user's system. |
| US11416856B2 |
Systems and methods for enhanced data routing based on data prioritization
An arbitraged enhanced payment processing system in association with a distributed enhanced payment processing system includes a merchant point of sale (POS) terminal system and a remote payment management system. The POS terminal system initiates a transaction that includes receiving a payment amount, a purchaser account identifier, a virtual electronic payment indicator, and a merchant ID via a payment client. Subsequently, the POS terminal system outputs the transaction to the remote payment management system which generates a token for the transaction. The payment management system then provides the purchaser account identifier, a merchant account identifier, and the payment amount to a payment processing servicer. Upon receiving a payment processing servicer response, the payment management system outputs the response and token to the POS terminal system. |
| US11416853B1 |
System and method for conducting secure financial transactions
A system and method to conduct secure electronic financial transactions are provided. The system includes one or more processors and one or more memories having stored thereon instructions that, when executed by the one or more processors, cause the one or more processors to identify a first payment source account held by an account holder and a second account held by the account holder; receive transaction data associated with a transaction initiated by the account holder with a merchant using the first payment source account, the transaction having a transaction amount; request via a first network a first transfer of the transaction amount from the first payment source account within a predetermined time; perform a pre-authorization charge of the second account in a pre-authorized amount; transfer the transaction amount to pay the merchant; and if the first transfer is not completed within the predetermined time, request via the second network a second transfer of the pre-authorized amount from the second account; and release the pre-authorization charge of the second account if the transaction amount was successfully transferred from the first account within the predetermined time. |
| US11416849B1 |
Systems and methods for sending and receiving math-based currency via a fiat currency account
A method performed by a processor of a financial institution computing system includes authorizing an account holder to execute transactions in an MBC from a financial account of the account holder that includes funds in a fiat currency. A transaction request is received, including a request to transfer a first amount of funds from the financial account to a recipient. The first amount is defined in MBC. The financial account is debited by a second amount, which is an amount of fiat currency equivalent to the first amount of MBC. A service call is transmitted to the MBC partner. The service call includes instructions to create a temporary account to hold the MBC, to exchange the second amount from fiat currency to MBC, to credit the temporary account with the funds exchanged to MBC, and to transfer the first amount in MBC from the temporary account to the recipient. |
| US11416848B1 |
Bank-driven model for preventing double spending of digital currency transferred between multiple DLT networks using a trusted intermediary
A system and method for preventing the double-spending of digital currency that transfers between multiple distributed ledger technology (DLT) networks. The system and method includes receiving an authorization to monitor transaction requests associated with a first DLT network. The system and method includes detecting a transaction request to transfer the first digital currency from the first DLT network to the second DLT network. The first digital currency is created on the first DLT network based on a unit of fiat currency. The system and method include transferring, responsive to detecting the transaction request, the first digital currency from the first DLT network to the second DLT network. |
| US11416846B2 |
System and method for managing gifts
Disclosed herein are systems, methods, and non-transitory computer-readable storage media for processing gift transactions, related to retaining a social and gratitude-based experience surrounding giving and receiving gifts, monitoring gift recipients on-premises at merchants and providing gift-related notifications, and managing funds in a gift that the recipient does not redeem. A system configured to practice a first method receives an object associated with a gift, receives a tag associated with the object, and transmits the object to the giver. A system configured to practice a second example method uses face identification at the merchant to identify a recipient of a gift. The system can transmit a reminder to the recipient regarding the gift. In a third example method, the system creates a gift and notifies the recipient of the gift. If the recipient never redeems the gift, then the giver is not charged for the gift and no transaction occurs. |
| US11416845B2 |
Systems and methods for managing transactions for a merchant
A method and system for managing payment transactions for a merchant using a computing device coupled to a memory device is described. Each transaction is initiated by a consumer using a payment card. The method includes receiving a registration request from a candidate merchant for enrollment within a manager module wherein the registration request includes registration data associated with the candidate merchant, executing a primary approval process using at least some of the registration data, and transmitting an account request message requesting an opening of a merchant account for the candidate merchant with an acquiring bank upon approval. The method further includes receiving, in real-time, merchant account data associated with the candidate merchant from the acquiring bank upon approval by a secondary approval process wherein the candidate merchant becomes a registered merchant upon the secondary approval. The method further includes managing a first payment transaction submitted by the registered merchant. |
| US11416844B1 |
RFID-enabled payment authentication
Authentication method and systems using RFID-enabled payment cards are disclosed herein where a server receives a request corresponding to authorization of a payment associated with a payment card from an electronic terminal. The server identifies an electronic device of a user associated with the payment card. The server then transmits an instruction to the electronic device to cause an RFID reader of the electronic device to determine whether an RFID tag corresponding to the payment card is located within a predetermined proximity to the electronic device. When the payment card is located within the predetermined proximity, the server executes a first authentication protocol. Moreover, when the payment card is not located within the predetermined proximity, the server executes a second authentication protocol, wherein the second authentication protocol is more restrictive than the first authentication protocol. |
| US11416840B1 |
Computer-based systems utilizing cards with cellular capabilities and methods of use thereof
In various some embodiments a cellular card includes at least one microprocessor. The cellular card is equipped with multiple devices and configured with multiple functionalities to deter use of the cellular card in unsecure or fraudulent transactions. In various embodiments, the cellular card overcomes drawbacks often associated with cards containing batteries such as battery overheating, battery short life time, battery underperformance in extreme temperatures, and other types of drawbacks associated with batteries contained in cards. |
| US11416839B2 |
Checkout device, control method, and storage medium
Provided are a checkout device, a control method, and a storage medium that can smoothly perform a checkout process for a customer in accordance with a status. The checkout device includes: a first input/output unit; a second input/output unit provided to face a different direction from the first input/output unit; and a control unit that selects an input/output unit which accepts input related to a checkout process from the first input/output unit and the second input/output unit based on at least one of status of the checkout device and time. |
| US11416838B2 |
Checkout apparatus
A checkout apparatus includes a memory that stores first information about one or more commodities registered in a registration process, a first interface configured to acquire an image of a predetermined region where registered commodities are to be placed, and a processor configured to identify commodities in the image acquired via the first interface by object recognition, determine whether each of the identified commodities is in the first information stored in the memory, and if one of the identified commodities is not in the first information, output an error signal. |
| US11416834B2 |
System and method for third party payment at point of sale terminals
A point of sale terminal of a merchant includes a third party payment provider display area for payment using a third party payment provider. The point of sale terminal receives an authentication notification for a consumer from the third party payment provider. The consumer is authenticated using one or more of a personal identification number, an image of the consumer, a quick response code scanned from a mobile device of the consumer, or a code received via near field communications with the mobile device of the consumer. The point of sale terminal requests payment from the third party payment provider for a transaction with the consumer using the transaction amount and authentication information. The third party provider display area allows new payment modalities to be used at the point of sale terminal without requiring modification of the instructions for the point of sale terminal. |
| US11416830B2 |
Method and system for automatically creating action plans based on an action plan template
Methods and systems are provided for automatically creating and displaying an action plan generated from an action plan template. An action plan template is created by a template owner, who can then add tasks to the action plan template until all tasks to be included as part of the template have been created. After it has been published, action plan owners can use it during an action plan creation process. An action plan owner can select a particular target record to be associated with a new action plan and specify other action plan details. An application platform can then automatically populate the new action plan with information indicating: a name of the action plan owner, a plurality of tasks a corresponding task owner who is assigned to each task, and a corresponding task deadline that was automatically calculated for each task by the action plan creation module. |
| US11416826B2 |
Productivity entity containers and unified view interface for different productivity entity types
A productivity entity container data structure is created that includes information for a first productivity entity and a link to a second productivity entity. The information for the first productivity entity includes either a link to the first productivity entity or details for the first productivity entity stored directly in the productivity entity container data structure. The first productivity entity and the second productivity entity are of different productivity entity types (e.g., an assigned task associated with a scheduled calendar event). By using the productivity entity container data structure to link together multiple different productivity entities of different productivity entity types, computer-based productivity systems are configured to directly access and display information for related productivity entities of different productivity entity types in a unified-view interface. |
| US11416825B2 |
Managed rooms backbone
A system is described herein. The system includes an agent and a transmitter. The agent is to a capture room specific data signals from peripheral devices within a conference room, operating system data signals, and application data signals, wherein the application data signals are obtained from a conferencing service application and wherein the agent is to package the room specific data signals, the operating system data signals, and the application data signals with system metadata into room health data. The transmitter is to transmit the room health data to a management cloud via a communications broker. |
| US11416819B2 |
Connecting contact center resources using DLT for IOT solutions
Multiple vendors often contribute a portion of their hardware and/or software to a customer to enable a particular feature. When issues occur, a contact center for more than one vendor may be required to perform an action in order to identify a resolution to the issue and apply the resolution. By coordinating multiple contact centers with smart contracts via a distributed leger, rules may be developed for the creation of blocks for notifications, escalations, tasks, and other actions or informational notifications to resolve the issue. Additionally, the blockchain may serve as a permanent record provide a history of actions taken, by whom, and when. |
| US11416817B2 |
Event extraction systems and methods
Events that are described in either structured data (e.g. HTML web page or email) or text in a natural language description can be extracted and entered into one or more calendars on a user's device. In one embodiment, selecting an add event command in a calendar application can cause the calendar application to search, without having received any search input, in a database of extracted events, and events extracted within a predetermined period of time can be suggested as events to add to the calendar. In one embodiment, an extracted event can cause a notification to be displayed to a user. Other embodiments are also described herein. |
| US11416809B1 |
System and method of root cause analysis of objective violations and query analysis
A system and method are disclosed for solving a hierarchy of objective functions using one or more hierarchical optimizations using explanation data stored in a database according to the one or more hierarchical optimizations, retrieving the explanation data, generating a response to a query for a goal violation by parsing the retrieved explanation data, and displaying the response. |
| US11416803B1 |
Automatic retail, display management
Apparatus and associated methods relate to dynamically managing quality of a sample in a public display space. In an illustrative example, a sample quality profile (SQP) may be generated in response to a sample update signal. The sample update signal may, for example, originate from a physical product display location. The sample update signal may, for example include data from a sensor(s) configured to detect a physical attribute(s) corresponding to the sample. The SQP may, for example, correlate the at least one physical attribute with at least one sample quality metric(s) (SQM). A predetermined minimum quality criterion(s) (MQC) corresponding to the product, sample, and/or showcase may, for example, be retrieved and compared to the SQM. If the SQM does not meet the MQC, then a sample request signal may, for example, be generated. Various embodiments may, for example, advantageously maintain an attractive product sample for display to potential customers. |
| US11416799B2 |
Method and system for summarizing user activities of tasks into a single activity score using machine learning to predict probabilities of completeness of the tasks
Activity data of a set of tasks as a training set is obtained from a list of communication platforms associated with the tasks. For each of the tasks in the training set, a set of activity metrics is compiled according to a set of predetermined activity categories based on the activity data of each task. The activity metrics of all of the tasks in the training set are aggregated based on the activity categories to generate a data matrix. A principal component analysis is performed on the metrics of its covariance matrix to derive an activity dimension vector, where the activity dimension vector represents a distribution pattern of the activity metrics of the tasks. The activity dimension vector can be utilized to determine an activity score of a particular task, where the activity score of a task can be utilized to estimate a probability of completeness of the task. |
| US11416793B2 |
Computer system and method for tracking the impact of a change event
Disclosed herein is a software application for tracking the impact of a change event on a budget for a project. In one aspect, a computing system may receive user input defining a given change event that comprises a line item, and setting an estimated revenue for the line item to a dynamic amount that is to track a most-firm cost for the first line item. Based on the received user input and the estimated revenue for the line item, the computing system may create a data record that represents the given change event, detect a more-firm cost available for the line item, and based on detecting the more-firm cost available for the line item, (i) determine an updated most-firm cost for the line item and (ii) determine an updated estimated revenue for the line item to track the updated most-firm cost for the line item. |
| US11416792B2 |
Network system capable of grouping multiple service requests
A network system managing a network service can receive queries and service requests from multiple user devices. The network system can manage the network service such that multiple service requests can be fulfilled by a single service provider. In addition, the network system can dynamically compute parameters associated with the network service. The computation of the parameters can be based on pending service requests or anticipated demand for the network service. |
| US11416787B2 |
Parallel processing for solution space partitions
Systems, devices, methods, and computer-readable media are disclosed for utilizing group theoretic techniques to enable data exchange between a supervisory central processing unit (CPU) and a group of graphical processing units (GPUs). The CPU may be configured to utilize a tabu search metaheuristic to explore a solution space to determine an optimal solution to an optimization problem. More specifically, the CPU may determine a fragmentation of a solution space that yields multiple partitions of the solution space and may assign each partition to a respective GPU configured to calculate a computational result. The CPU may then determine a new fragmentation of the solution space based on the computational results received from the GPUs that yields new partitions of the solution space and may assign each new partition to a respective GPU configured to again generate a computational result based on its assigned new partition. The CPU may continue to determine new fragmentations based on the computational results of the GPUs until stopping criteria are satisfied and a timely, high-quality solution to the optimization problem is determined. |
| US11416785B2 |
Automated interactive support
A method includes generating, at a controller, a snapshot of content displayed at a user interface screen. The content associated with a domain for a particular service. The method also includes performing user interface element recognition on the snapshot to identify a user interface element in the content. The method further includes associating the user interface element with a user interface element intent and associating the user interface element intent with a particular phrase based on the domain. The method also includes generating an automated interactive support prompt based on the particular phrase to be output for user interaction. The user interaction is usable for performance of the particular service. |
| US11416783B2 |
System and method for vehicle allocation to users
A method and a system for allocating a vehicle to a user are provided. An availability of a vehicle is detected in a geographical location for an allocation. Based on the historical travel data or a real-time travel-related intention of a set of users in the geographical area, a user is identified from the set of users. A notification message is transmitted to a user device of the identified user based on the detected availability of the vehicle in the geographical area. A user response message is received from the user device in response to the transmitted notification message. Based on the received user response message associated with the selected user, the vehicle is allocated to the selected user for a ride. |
| US11416781B2 |
Image processing method and apparatus, and computer-readable medium, and electronic device
An image processing method includes: obtaining a target image; performing feature extraction on the target image based on a residual network, to obtain image feature information; and performing recognition processing on the target image according to the image feature information. The residual network includes a plurality of residual blocks that are successively connected, each of the residual blocks including a convolution branch and a residual branch, a size of a convolution kernel of a first convolutional layer in the convolution branch being less than a size of a convolution kernel of a second convolutional layer located after the first convolutional layer, and a convolution stride of the second convolutional layer being greater than a convolution stride of the first convolutional layer and less than a width of the convolution kernel of the second convolutional layer. |
| US11416779B2 |
Processing data inputs from alternative sources using a neural network to generate a predictive panel model for user stock recommendation transactions
A computer-implemented method includes a method comprising using at least one hardware processor to: receive a plurality of data from a plurality of data sources; standardize the plurality of data; tag the standardized plurality of data with one or more companies; train a prediction model to predict a metric for each of the one or more companies based on the standardized plurality of data tagged with that company and historical measurements for that company; and apply the prediction model to new data to predict the metric for at least one of the one or more companies. |
| US11416770B2 |
Retraining individual-item models
Embodiments of the present disclosure include a computer-implemented method and system for determining when to retrain an individual-item model within a recommendation engine. The computer-implemented method includes defining a consumer feature vector having attributes of historical consumers that impact an individual-item model. The computer-implemented method further includes calculating a historical feature vector relating to the historical consumers. The computer-implemented method also includes determining a retraining threshold for the individual-item model and calculating a new feature vector relating to new consumers. The new feature vector containing new attribute values of the new consumers and defined by the consumer feature vector. The computer-implemented method further includes determining a distance between the historical feature vector and the new feature vector and retraining the individual-item model upon determining that the distance between the historical feature vector and the new feature vector exceeds the retraining threshold. |
| US11416769B2 |
Intelligent service request classification and assignment
Approaches presented herein enable intelligent service request classification and assignment learning. More specifically, a request comprising a free form text or spoken description is received from a user. The request description is parsed and classified by a regression-based classifier. The regression-based classifier classifies based on, for example: the description itself; the requestor's history of requests, and/or supplemental demographics about a requestor. Optionally, a user may verify the classification or select from a plurality of returned classifications. A service provider or administrator confirms that a classification is correct. If not, the incorrectly classified request is queued. If so, the correctly classified request is added to a set of training data to be used in classifying future requests. |
| US11416768B2 |
Feature processing method and feature processing system for machine learning
Provided are a feature processing method and feature processing system for machine learning. The feature processing method includes: (A) acquiring a data record, wherein the data record comprises at least one piece of attribute information; (B) for each of the continuous features generated based on at least a some of the attribute information in the at least one piece of attribute information, executing a basic binning operation and at least one additional operation to generate a basic binning feature and at least one additional feature corresponding to each of the continuous features; and (C) generating a machine learning sample at least comprising the generated basic binning feature and at least one additional feature. By means of the above-mentioned method, a plurality of features comprising the binning feature and corresponding to the continuous features can be acquired, so as to make the features constituting the machine learning sample more effective, so as to improve the effect of a machine learning model. |
| US11416762B1 |
Selecting physical qubits for quantum error correction schemes
A method, apparatus and product includes obtaining a logical representation of a quantum circuit and selecting a quantity of physical qubits for a physical representation of the quantum circuit, wherein the selecting of the quantity is based on a utility per-qubit metric that is used to define a utility per-qubit score of the quantum circuit. The utility per-qubit score is determined based on a ratio between a quality score of the quantum circuit when using the quantity of physical qubits and between a cost function of the quantum circuit, wherein the quality score is defined by a quality metric that is monotonically correlated to error rates of logical output qubits. The quantum circuit is synthesized using the quantity of the physical qubits that was selected. |
| US11416761B2 |
Fault-tolerant quantum cat state preparation
A quantum computing system is adapted to prepare a cat state in a quantum circuit with fault tolerance t and circuit depth less than or equal to 4+4t by performing a series of operations that includes: performing a sequence of joint parity measurements on individual pairs of neighboring qubits in a series of qubits entangled to form an initial cat state; repeating the sequence of measurements over at least t-rounds; and disentangling a first set of alternating qubits from the initial cat state, the prepared cat state being formed by a remaining second set of alternating qubits, the second set of alternating qubits being interlaced with the first set of alternating qubits along a line of one-dimensional connectivity, the series of operations being sufficient to guarantee that a prepared cat state is has less than or equal to t number of faults. |
| US11416758B2 |
Smart edge co-processor
A system of smart edge sensors, wherein security and encryption is pushed to the edge of the network. In one example, an electronic device includes several sensors. The device is operated by a microprocessor. A plurality of smart edge devices are each interposed between a respective sensor and the microprocessor and intercepts communication between the sensor and the microprocessor. The smart edge device encrypt any data output by the sensor, and decrypt any data received from the microprocessor. A JTAG access is connected to a co-processor where executes a JTAG dongle to authenticate the sensor and an interface with the sensor. |
| US11416748B2 |
Generic workflow for classification of highly imbalanced datasets using deep learning
Methods, systems, and computer-readable storage media for providing a binary classifier include receiving a biased dataset, the biased data set including a plurality of records, each record being assigned to a class of a plurality of classes, one class including a majority class, performing data engineering on at least a portion of the biased dataset to provide a revised dataset, providing a trained deep autoencoder (DAE) by training a DAE using only records assigned to the majority class from the revised dataset, the trained DAE including a binary classifier that classifies records into one of the majority class and a minority class, validating the trained DAE using validation data that is based on at least a portion of the biased dataset, and providing the trained DAE for production use within a production system. |
| US11416747B2 |
Three-dimensional (3D) convolution with 3D batch normalization
A method of classifying three-dimensional (3D) data includes receiving three-dimensional (3D) data and processing the 3D data using a neural network that includes a plurality of subnetworks arranged in a sequence and the data is processed through each of the subnetworks. Each of the subnetworks is configured to receive an output generated by a preceding subnetwork in the sequence, process the output through a plurality of parallel 3D convolution layer paths of varying convolution volume, process the output through a parallel pooling path, and concatenate output of the 3D convolution layer paths and the pooling path to generate an output representation from each of the subnetworks. Following processing the data through the subnetworks, the method includes processing the output of a last one of the subnetworks in the sequence through a vertical pooling layer to generate an output and classifying the received 3D data based upon the generated output. |
| US11416745B1 |
Adversarial training of neural networks
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for adversarial training of a neural network. One of the methods includes obtaining a plurality of training inputs; and training the neural network on each of the training inputs, comprising, for each of the training inputs: processing the training input using the neural network to determine a neural network output for the training input; applying a perturbation to the training input to generate an adversarial perturbation of the training input; processing the adversarial perturbation of the training input using the neural network to determine a neural network output for the adversarial perturbation; and adjusting the current values of the parameters of the neural network by performing an iteration of a neural network training procedure to optimize an adversarial objective function. |
| US11416743B2 |
Swarm fair deep reinforcement learning
Fair deep reinforcement learning is provided. A microstate of an environment and reaction of items in a plurality of microstates within the environment are observed after an agent performs an action in the environment. Semi-supervised training is utilized to determine bias weights corresponding to the action for the microstate of the environment and the reaction of the items in the plurality of microstates within the environment. The bias weights from the semi-supervised training are merged with non-bias weights using an artificial neural network. Over time, it is determined where bias is occurring in the semi-supervised training based on merging the bias weights with the non-bias weights in the artificial neural network. A deep reinforcement learning model that decreases reliance on the bias weights is generated based on determined bias to increase fairness. |
| US11416741B2 |
Teacher and student learning for constructing mixed-domain model
A technique for constructing a model supporting a plurality of domains is disclosed. In the technique, a plurality of teacher models, each of which is specialized for different one of the plurality of the domains, is prepared. A plurality of training data collections, each of which is collected for different one of the plurality of the domains, is obtained. A plurality of soft label sets is generated by inputting each training data in the plurality of the training data collections into corresponding one of the plurality of the teacher models. A student model is trained using the plurality of the soft label sets. |
| US11416738B1 |
Model reutilization with heterogeneous sensor stacks via sensor data auto-normalization
Techniques for model reutilization with heterogeneous sensor stacks via sensor data auto-normalization are described. A normalization model can be trained and utilized to normalize sensor data generated by a first type of sensor stack so that it can be used with an existing machine learning model that was trained using data from another type or types of sensor stacks having different characteristics. A sensor data can be generated by the sensor stack and provided as an input to the normalization model to yield normalized sensor data. The normalized sensor data can be provided as input to the existing model to generate accurate results despite the sensor stack having different characteristics than the one(s) used to train the machine learning model. |
| US11416733B2 |
Multi-task recurrent neural networks
Methods, systems, and apparatus, including computer programs encoded on computer storage media, relating to multi-task recurrent neural networks. One of the methods includes maintaining data specifying, for a recurrent neural network, a separate internal state for each of a plurality of memory regions; receiving a current input; identifying a particular memory region of the memory access address defined by the current input; selecting, from the internal states specified in the maintained data, the internal state for the particular memory region; processing, in accordance with the selected internal state for the particular memory region, the current input in the sequence of inputs using the recurrent neural network to: generate an output, the output defining a probability distribution of a predicted memory access address, and update the selected internal state of the particular memory region; and associating the updated selected internal state with the particular memory region in the maintained data. |
| US11416731B2 |
Arrangement and method for counting articles
A method and an arrangement for detecting and counting articles are disclosed, performing the steps of:providing a detecting station arranged along a passageway for the articles, the detecting station being adapted to establish at least a scanning radiation beam at a cross section of the passageway;passing articles past the detecting station, the detecting station detecting an article upon sensing at least a partial interruption of the scanning radiation beam; andobtaining a count of the detected articles through the passageway, wherein the detecting station include first and second detecting assembly arranged at a predetermined distance from each other along the direction of travel of the articles, which first and second detecting assembly establish a respective scanning radiation beam on a first, respectively second scanning plane at a corresponding cross section of the passageway, and whereinat least a first predetermined reference section of the articles is detected at each scanning plane;a travelling speed of each article is calculated based on the time used by the at least one reference section of the article to travel the predetermined distance between the first and the second scanning planes;at least a second predetermined reference section of the articles, which is separate from the first reference section, is detected at least at one of the first and second scanning plane; anda count of the articles is obtained by calculating a length thereof from the calculated travelling speed and by calculating the time used by the article to cross at least one of said first and second scanning plane. |