| Document | Document Title |
|---|---|
| US11115212B1 |
Multi-processing node connection in a data store system via encrypted password
A system may include a server and a data store system. The server may include at least one storage device and at least one processor. The server may execute an application and may store an encrypted password. The data store system may include at least one persistent storage device configured to store a data store. The data store system may further include a plurality of processing nodes configured to operate on the data store. The data store system may receive the encrypted password from the application with one of the plurality of processing nodes and may decrypt the encrypted password with the one of the plurality of processing nodes. The data store system may authenticate the decrypted password with the one of the processing nodes and provide the decrypted password to other processing nodes. Each processing node that has the decrypted password may be accessible to the application to operate on the data store. A method and computer-readable medium may also be implemented. |
| US11115209B2 |
Methods and systems for preparing and performing an object authentication
The present invention relates to the field of tracing and anti-counterfeit protection of physical objects, and particularly to preparing and performing a secure authentication of such objects. Specifically, the invention is directed to a method and a system for preparing a subsequent secured authentication of a physical object or group of physical objects by a recipient thereof, to a method and system for authenticating a physical object or group of physical objects, to a method and system of securely providing a time-variant combination scheme for authenticating a physical object or group of physical objects according to the above methods, and to related computer programs corresponding to said methods. The invention is based on the concept of increasing the security level by increasing the information entropy of the data on which the anti-counterfeit protection is based by means of random data communicated to authenticating entities in an algorithmically hidden way. |
| US11115205B2 |
Method and apparatus for trusted computing
Apparatus, method, computer program product and computer readable medium are disclosed for trusted computing. A method includes, at an isolated processor including a trusted execution environment and an isolated storage, receiving data encrypted with a first public key; decrypting the encrypted data with a first private key; performing calculation on the decrypted data by using an approved program; and providing the calculation result, wherein the approved program is authorized by a smart contract, a unique identifier of the smart contract is stored in the isolated processor, both the approved program and the isolated processor are verified by at least one participant of the smart contract, and the first public key and the first private key are generated by the isolated processor. |
| US11115198B2 |
Key generation device, key generation method, and computer program product
According to an embodiment, an information processor includes a memory and one or more hardware processors coupled to the memory. The one or more hardware processors are configured to function as a calculating unit, a determining unit, and a generating unit. The calculating unit is configured to calculate a key length. The determining unit is configured to determine a block size corresponding to a unit of processing in key generation and an outputtable size indicating the size of a key outputtable by the key generation. The generating unit is configured to generate a key having the key length by a hash operation using a matrix having a size determined by the block size and the outputtable size. |
| US11115197B1 |
Secret sharing information management and security system
Various embodiments relate to a method of receiving an original message, share-holder list, and threshold amount. The original message is tokenized resulting in a tokenized message. A plurality of shares are generated from the tokenized message using a message sharing algorithm of a secret sharing scheme. Each of the plurality of shares is signcrypted using a public key and a private key associated with the shared secret provider computing system and a public key of a respective one of the share-holders included in the share-holders list, resulting in a plurality of signcrypted shares. The plurality of signcrypted shares is distributed to the respective ones of the share-holders according to the public key used to signcrypt the respective signcrypted share. The authenticity and data integrity of each of the plurality of signcrypted shares can be determined by using the public key associated and a public/private key pair associated with the share-holder. |
| US11115194B2 |
Gray image visual encryption method
Disclosed is a gray image visual encryption method. According to the method, two processes of generating a shared image in visual cryptography and performing superimposition decoding are placed within one error diffusion feedback loop. That is, at an encoder end, each pixel or image block is sequentially processed in a particular scanning order, a superimposition decoding effect of each pixel or image block on the generated shared image is immediately checked, a difference between a reconstructed target image obtained by superposition and an original secret image is obtained by comparison, and the difference of comparison is fed back and diffused onto a surrounding unquantized pixel or image block, so as to achieve a purpose of improving quality of a secret image reconstructed by decoding; an analysis process corresponds to the process of generating the shared image from the secret image, and a synthesis process corresponds to the process of obtaining the target image from the shared image; according to the method, the synthesis is placed in the analysis, that is, the analysis is based on the synthesis. |
| US11115187B2 |
Apparatus and method for block ciphers for real-time data transmission
The present disclosure relates to a block cipher apparatus and method for real-time data transmission and the block cipher apparatus according to an exemplary embodiment of the present disclosure includes: a block encryption unit which selects a key in accordance with an order of keys having different lengths to encrypt each plaintext block and generate a ciphertext block; and a message authentication unit which generates a message authentication code using a key selected at the time of encrypting a current plaintext block which is encrypted in the block encryption unit and a previous message authentication code generated by a plaintext block before the current plaintext block. |
| US11115181B2 |
Memory device, host device, and memory system
A control circuit causes a first cryptographic module to perform a dummy operation in a command processing period and a data processing period in which a second cryptographic module performs a normal operation while the first cryptographic module does not perform a normal operation. |
| US11115172B2 |
Method for transmitting and receiving multicast/broadcast data in wireless communication system, and apparatus therefor
Disclosed are a method for transmitting and receiving multicast/broadcast data in a wireless communication system, and an apparatus therefore. Specifically, a method by which a station transmits a reference signal for demodulating multicast/broadcast data in a wireless communication system comprises the steps of: mapping a first reference signal within a control channel region consisting of at least one symbol used for transmission of a control channel within a subframe; and mapping a second reference signal transmitted from multiple cells for demodulating a multicast/broadcast channel within a data channel region excluding the control channel region within at least one resource block which has been allocated for transmission of the multicast/broadcast channel which carries the multicast/broadcast data transmitted from the multiple cells within the subframe, wherein scheduling information for allocating at least one resource block where the multicast/broadcast channel is mapped may be transmitted in the control channel. |
| US11115171B2 |
Method for determining length of feedback response information and related product
A novel approach to determining a length of a feedback response is provided. A method comprises the following steps: a terminal receives configuration signaling sent by a network side device, the configuration signaling comprising: indicating the maximum transmission timing value of feedback response information. The terminal dynamically determines a hybrid automatic repeat request feedback time sequence, and determines the total number of bits of a feedback response message to be transmitted according to the maximum transmission timing value. The terminal sends the feedback response message to be transmitted with the total number of bits to the network side device. |
| US11115168B2 |
Virtual gateway for a connected device
A virtual gateway software application may be configured to receive immediate command instructions for local connected devices from each of: a user and a remote server on the Internet; via a wireless LAN or a short-range communication protocol. The application may relay the immediate command instructions to one or more of the connected devices via the wireless LAN or the short-range communication protocol while the device on which the application resides is within the particular building environment. It may store delayed command instructions for the local connected devices from each of: the user, and the remote server on the Internet; and relay one or more of the delayed command instructions from the mobile communication device to one or more of the connected devices via the wireless LAN or the short-range protocol. |
| US11115166B2 |
Radio transmission apparatus and methods for transmitting a single or a plurality of modulation signals from one or more antenna
A radio transmission apparatus determines information indicative of an estimated communications channel condition and generates a single modulation signal or a plurality of modulation signals based on the estimated communications channel condition information. The single modulation signal is transmitted from a first antenna of a plurality of antenna or the plurality of modulation signals are transmitted from the first antenna and at least a second antenna of the plurality of antenna. The plurality of modulation signals include different information from each other and are transmitted over an identical frequency band and at an identical temporal point. The single modulation signal and the plurality of modulation signals contain parameter information indicating a number of modulation signals transmitted at the same time. |
| US11115165B2 |
Method and apparatus for multiple transmit/receive point (TRP) operations
A method includes receiving, by a User Equipment (UE), Transmission Configuration Indicator (TCI) state data in a Physical Download Control Channel (PDCCH) determining multiple Physical Downlink Shared Channels (PDSCHs), where the TCI state data is associated with multiple Demodulation Reference Signal (DMRS) port groups, and obtaining, by the UE, multiple Quasi Co-Location (QCL) assumptions for receiving the PDSCHs based on the DMRS port groups associated with the TCI state data. |
| US11115160B2 |
Non-orthogonal multiple access
Systems, methods, and apparatuses for analyzing and synthesizing wireless communication signals are provided. A receiver might transform a received signal into a basis in which the transformed signal is sparse, which can reduce the complexity of joint detection by facilitating message passing algorithm (MPA) decoding. A transmitter might employ dense codewords in a first basis, which may facilitate certain signal-processing operations and may provide a transmission with a low peak-to-average-power ratio. The codewords can be designed to be sparse when transformed to a second basis. The codewords may be configured for non-orthogonal multiple access. |
| US11115158B2 |
Data acknowledgement in a wireless communication system
Apparatuses, methods, and systems are disclosed for data acknowledgment. One apparatus includes a processor that determines a duration for a downlink (“DL”) burst. The apparatus includes a transmitter that transmits the DL burst having the duration, and signaling indicating a hybrid automatic repeat request acknowledgement (“HARQ-ACK”) codebook size for transmission of HARQ-ACK feedback corresponding to the DL burst. |
| US11115157B2 |
Method and device for scheduling uplink control channel in next generation wireless network
The disclosure provides a method for scheduling an uplink control channel (PUCCH) in a next generation/5G wireless access network. The method of a terminal for scheduling a PUCCH may include: receiving, from a base station, timing relationship setting information between a downlink data channel (PDSCH) and a PUCCH; and scheduling the PUCCH on the basis of the timing relationship setting information. |
| US11115153B2 |
Method for transmitting data in flexible ethernet and device
A method for transmitting data in flexible Ethernet (FlexE) and a device comprising transmitting data in FlexE whereby a first FlexE device receives, according to a first client calendar, data from a second FlexE device; the first FlexE device determines, based on an error data block in the data, that a first timeslot is damaged; the first FlexE device adds a timeslot damage notification to an overhead frame to be sent to the second FlexE device; the first FlexE device receives a second client calendar from the second FlexE device; and the first FlexE device receives, using the second client calendar, the data from the second FlexE device. |
| US11115152B2 |
Transport block size determination for equal size code blocks
According to some embodiments, a method for use in a wireless receiver comprises determining a transport block size, TBS, for a transport block to be communicated between the wireless transmitter and a wireless receiver via a physical channel transmission. The TBS determination uses a formula accounting for cyclic redundancy check, CRC, bits. The method further comprises transmitting the transport block according to the determined TBS. In particular embodiments the formula is based on an approximate transport block size, a number of code blocks, at least one of a number of CRC bits attached to the transport block, and a number of CRC bits added to each of the C code blocks. |
| US11115148B2 |
Technique for selecting a transport block size in a communication system
The disclosure pertains to selecting a Transport Block Size (TBS) in a communication system. An aspect is directed to an apparatus for selecting a Transport Block Size (TBS) for a transmitter of a communication system. The communication system supports variable Transmission Time Interval (TTI) lengths regarding the number of symbols to be transmitted in one TTI. The apparatus is configured to receive first information indicative of a TTI length, receive second information indicative of a number of reference symbols included in the TTI, decode, from the first information, the TTI length, and decode, from the second information, the number of reference symbols included in the TTI. The apparatus is further configured to calculate, based on the TTI length and based on the number of reference symbols included in the TTI, a number of data symbols included in the TTI, calculate, based on an allocation bandwidth and based on the number of data symbols included in the TTI, a number of data Resource Elements (REs) in the TTI, and select the TBS from a data structure, based on the calculated number of data REs. Further aspects of the disclosure pertain to a base station, a UE, methods, computer programs, computer-readable recording media and a system. |
| US11115147B2 |
Multichip fault management
Embodiments of the present disclosure pertain to improved circuit and system architectures for identifying and managing operating statuses and faults in a system having multiple processing circuit chips. Each of the multiple processing circuit chips includes multiple signal rings, one to provide internal communications among circuitry within the circuit chip, and another with inter-chip communications circuitry to provide communications with neighboring circuit chips. One of the multiple processing circuit chips further includes external communications circuitry to provide communications with an external host. |
| US11115146B2 |
Optical signal demultiplexing device, optical signal reception device, and optical signal demultiplexing method
A branch units branches an optical signal by the number of wavelength intervals. Each band division unit generates a band division signal in which a signal band is divided into N division bands and an odd channel and an even channel are separated from each other. Multiplexing units multiplex band division signals of the same signal band, and branch means output the multiplexed signal to an optical receiver. A control unit controls the wavelength selective switch included in the band division units based on information indicating a signal arrangement of the signals in the respective wavelength intervals, thereby causing a signal of a signal band in which a signal of a corresponding wavelength interval is present to be included in each band division signal. |
| US11115145B2 |
Method for operating IoT in cellular system and system therefor
The present disclosure relates to a 5G or pre-5G communication system for supporting a higher data transmission rate beyond a 4G communication system such as LTE. The present disclosure provides a method for supporting a device performing narrow band Internet of things (IoT) communication by a base station in a cellular system, the method comprising the operations of: transmitting a synchronization sequence for synchronization between the base station and the device performing the narrow IoT communication; transmitting system information including a two-bit mode indication field which indicates an operation mode for performing the narrow IoT communication, the operation corresponding to one of a plurality of operation modes; and transmitting a control channel and a data channel on the basis of parameters for the narrow band IoT communication, the parameter being included in the system information, wherein the operation modes include at least one of a standalone mode, a guard-band mode, an in-band mode in which the cellular system and the narrow band IoT communication use a common cell ID, or an in-band mode in which the cellular system and the narrow band IoT communication use different cell IDs. |
| US11115144B2 |
Cell search method in wireless communication system and apparatus therefor
A cell search method of a terminal in a wireless communication system, comprises: a step of receiving a narrow band synchronization signal through a narrow band from a base station; and a step of acquiring time synchronization and frequency synchronization with the base station on the basis of the narrow band synchronization signal and detecting an identifier of the base station, wherein the narrow band has a system bandwidth of 180 kHz and includes twelve carriers arranged at intervals of 15 kHz, and the narrow band synchronization signal consists of a first narrow band synchronization signal and a second narrow band synchronization signal, wherein the first narrow band synchronization signal can be transmitted in a sixth subframe of a radio frame and the second narrow band synchronization signal can be transmitted in a tenth subframe of the radio frame. |
| US11115143B2 |
Electronic apparatus with data transceiving mechanism and data transceiving method
An electronic apparatus with a data transceiving mechanism includes: a processing circuit, configured to generate a data request; a transceiving apparatus, coupled to the processing circuit, configured to transmit the data request to at least one target electronic apparatus; and a monitoring circuit, coupled to the processing circuit and the transceiving apparatus, configured to calculate data related parameters for the data transmitted by or received by the transceiving apparatus in a predetermined time period after the transceiving apparatus transmits or receives the data request. If the data related parameter does not match a predetermined rule, the monitoring circuit substitutes the processing circuit to complete a data transaction and to generate an inform message to the processing circuit. |
| US11115141B2 |
Wired communications device and method for operating a wired communications device
Embodiments of a method and a device are disclosed. In an embodiment, a method for operating a wired communications device involves including a frame boundary bit sequence and a random data sequence as a preamble of a bit stream, encoding the bit stream into an encoded bit stream, and transmitting the encoded bit stream using the wired communications device. |
| US11115134B2 |
Test method implemented by an apparatus comprising at least two radio communication devices
The present invention relates to a test method implemented by an item of equipment (10) comprising at least two radio-communication devices (12, 13) for testing at least one transmitter and receiver of said radio-communication devices. According to the invention, it comprises the following steps implemented for testing a transmitter (120) to be tested of a transmitting radio-communication device (12) and/or a receiver (131) to be tested of a receiving radio-communication device (13) of the same item of equipment (10), a step (E100) of transmitting a test signal in a transmission channel of said transmitter (120) of said transmitting radio-communication device (12), and a step (E200) of detection, in a reception channel corresponding to said transmission channel of said transmitter (120), of the test signal transmitted. |
| US11115132B2 |
Method and apparatus for transmitting electric signals or power using a fiber optic cable
A method for transmitting an optical signal and an electrical signal and/or power in a borehole penetrating the earth includes transmitting the optical signal using a hybrid fiber optic cable disposed in the borehole, the hybrid fiber optic cable includes an optical fiber for transmitting the optical signal. The method also includes transmitting the electrical signal and/or power using the hybrid fiber optic cable, the hybrid fiber optic cable further includes (i) a first electrically conductive sheath circumferentially surrounding the optical fiber and having a first electrical connector and (ii) a second electrically conductive sheath circumferentially surrounding the first electrically conductive sheath and having a second electrical connector for transmitting the electrical signal and/or power. |
| US11115130B1 |
Wavelength control and monitor for dense wavelength division multiplexing (DWDM) silicon photonic receiver
Techniques and circuitry for wavelength monitor and control are disclosed herein. The disclosed wavelength monitor and control circuitry and techniques are designed to realize a multi-channel DWDM optical link by using a photonic receiver that dynamically adjusts resonant wavelengths of the microring drop filter (MDF), as needed. The wavelength monitor and control circuitry can monitor and control the resonant wavelengths of multiple MDFs for a DWDM silicon photonics receiver with minimum power and area overhead. In an embodiment, circuitry for an optical receiver comprises an MDF having resonant wavelength for multiple DWDM channels, and circuitry to control and monitor the resonant wavelength of the MDF in real-time and in manner that compensates for deviation between actual resonant wavelength of the MDF and the incident optical wavelength of the MDF. |
| US11115126B2 |
Fiber communication systems and methods
An injection locked transmitter for an optical communication network includes a master seed laser source input substantially confined to a single longitudinal mode, an input data stream, and a laser injected modulator including at least one slave laser having a resonator frequency that is injection locked to a frequency of the single longitudinal mode of the master seed laser source. The laser injected modulator is configured to receive the master seed laser source input and the input data stream, and output a laser modulated data stream. |
| US11115124B1 |
Adaptive scheduling for periodic data traffic in an optical communications network for a wireless communications system (WCS)
Adaptive scheduling for periodic data traffic in an optical communications network for a wireless communications system (WCS) is disclosed. Herein, an optical line terminator (OLT) in an optical communications network is configured to dynamically adjust a scheduled start time(s) of a scheduled period(s) in a periodic schedule to help reduce a schedule misalignment to below a predefined threshold. More specifically, the OLT is configured to determine the schedule misalignment. Accordingly, the OLT can adjust the respective scheduled start time(s) of the scheduled period(s) based on a temporal step determined based on the determined schedule misalignment to reduce the schedule misalignment to below the predefined threshold. By adapting the periodic schedule based on the determined schedule misalignment, it is possible to reduce scheduling delays for communicating the periodic data traffic, thus making it possible for the optical communications network to support a time-critical application for improved user experience. |
| US11115115B2 |
Non-access stratum connection handling
A wireless device receives, from a non-terrestrial network (NTN) base station, access network information indicating an access network type of a plurality of access network types comprising: a geostationary earth orbit (GEO) access network type; and a low earth orbit (LEO) access network type. Based on the access network type, first non-access stratum (NAS) period among a plurality of NAS period are selected. The plurality of NAS periods comprise: a first value associated with the GEO access network type; and a second value associated with the LEO access network type. A NAS procedure is initiated by sending, to an access and mobility management function (AMF) via the NTN base station, a first NAS request message. A start of the first NAS period is based on the sending. The NAS procedure is aborted in response to an expiration of the first NAS period. |
| US11115114B2 |
Handover of a mobile terminal in a multi-beam satellite based on network conditions
Methods and systems are described for providing satellite beam handover based on predicted network conditions. In embodiments, a satellite communications system retrieves flight plan data for a plurality of aircraft being provided a network access service, identifies, for each aircraft respective candidate satellite beams of the plurality of satellite beams for providing the network access service, each candidate satellite beam having an associated service timeframe for providing the network access service, obtains, for each of the respective candidate satellite beams, a beam utilization score indicative of predicted beam utilization by the plurality of aircraft over the associated service timeframe, selects satellite beams for providing the network access service of each aircraft of the plurality of aircraft based at least in part on the beam utilization scores, and schedules handover of the network access service for the plurality of aircraft to the selected satellite beams. |
| US11115113B2 |
Technique for selecting a UAV application server
A technique for selecting an unmanned aerial vehicle, UAV, application server is disclosed. A computing unit for executing a cellular network entity configured to select a UAV application server residing in a cellular network to be assigned to a UAV connecting to the cellular network comprises at least one processor and at least one memory, wherein the at least one memory contains instructions executable by the at least one processor such that the cellular network entity is operable to trigger (S204) selecting, as part of an attach procedure of the UAV to the cellular network, a UAV application server in the cellular network to be assigned to the UAV. |
| US11115112B2 |
System for transmitting commands and a video stream between a remote controlled machine such as a drone and a ground station
A system for transmitting commands and a video stream between a remote controlled machine such as a drone and a ground station comprises a two-way link between the machine and ground station, at least partially implementing a cellular communication network, said two-way link being provided by means of a cellular modem on the machine side and conveying a compressed video stream produced by a camera and a video encoding module, and information belonging to a group comprising movement control commands and flight data or operating characteristics of the remote controlled machine, the system further comprising means for managing the two-way link capable of ensuring said link is maintained, taking into account the variability in topology and performances of the link resulting from the implementation of the cellular communication network. Application to long-range drones. |
| US11115111B1 |
System architecture and method for high mobility networking including air based nodes and computing devices
A wireless communication network and wireless communication method are disclosed. The network has a plurality of transceivers forming a wireless communication network in which the plurality of transceivers include one or more central nodes and each end node capable of connecting to the one or more central nodes and forming a link. At least some of the transceivers of the network having a plurality of antennas and an array processing element coupled to the plurality of antennas and at least some of the transceivers are housed in an aerial communication node that may be a mini-satellite, a balloon or a drone. |
| US11115105B2 |
Method and apparatus for managing user plane operation in wireless communication system
The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). Embodiments herein achieve a UE for managing a user plane operation in a wireless communication system. The UE includes a user plane management unit coupled to a memory and a processor. The user plane management unit is configured to receive a signaling message from a gNodeB. Further, the user plane management unit is configured to determine whether the signaling message includes control information comprising one of a PDCP re-establish indication and a security key change indication. Further, the user plane management unit is configured to perform the at least one operation for at least one data radio bearer based on the determination. |
| US11115102B2 |
Wireless signal transmitting antenna, wireless signal receiving antenna, wireless signal transmitting system, wireless signal transmitting method, and wireless signal receiving method
According to the present invention, when wireless communication is performed, a signal can be formed into a spiral beam (H), the spiral pitch of the signal can be changed, and a plurality of spiral beams (H) with different spiral pitches can be transmitted and received. The present invention pertains to a wireless signal transmitting antenna (10) including a signal emitting means (A) having N number of antenna elements (A1, . . . , AN) (where N is an integer satisfying N≥2) equally spaced on a circumference of circle, and a signal distribution means (B) for generating, from an input first signal (S), N number of second signals (G1, . . . , GN) having a phase difference from one another and outputting the N number of second signals (G1, . . . , GN) to the N number of antenna elements (A1, . . . , AN), respectively, so that a spiral beam (H) with the equiphase surface inclined spirally is output from the signal emitting means (A). |
| US11115098B2 |
Configuration and design of CQI and MCS tables for 5G communications
User equipment (UE) includes processing circuitry, where to configure the UE for New Radio (NR) communications in an unlicensed spectrum, the processing circuitry is to decode a first configuration message received from a base station, the first configuration message including a channel quality indicator (CQI) table indication identifying a CQI table. A second configuration message is decoded, the second configuration message received separately from the first configuration message and including a modulation and coding scheme (MCS) table indication identifying an MCS table. DCI received via a PDCCH is decoded, the DCI providing a DL grant and an MCS index in the MCS table. DL information received via a PDSCH is decoded using modulation order and target code rate corresponding to the MCS index in the MCS table. |
| US11115095B1 |
Finite-alphabet beamforming for multi-antenna wideband systems
Finite-alphabet beamforming for multi-antenna wideband systems is provided. The combination of massive multi-user multiple-input multiple-output (MU-MIMO) technology and millimeter-wave (mmWave) communication enables unprecedentedly high data rates for radio frequency (RF) communications. In such systems, beamforming must be performed at extremely high rates over hundreds of antennas. For example, spatial equalization applies beamforming in the uplink to mitigate interference among user equipment (UEs) at a base station (BS). Finite-alphabet equalization provides a new paradigm that restricts the entries of a spatial equalization matrix to low-resolution numbers, enabling high-throughput, low-power, and low-cost equalization hardware. Similarly, precoding applies beamforming in the downlink to maximize the reception of a signal transmitted from a BS to a target UE. Finite-alphabet precoding can be applied in the downlink to similarly improve power and cost in precoding hardware. |
| US11115090B2 |
Apparatus and method for jammer resistant protocol stack design
An apparatus and method for providing a protocol stack design which resists active jammers. The apparatus including a transmitter component, the transmitter component including: a rate-2 orthogonal space-time block code (OSTBC) encoder for processing a set of information symbols to produce a set of encoded signals; a precoder module coupled to an output of the rate-2 OSTBC encoder for modifying a signal-to-jammer plus noise ratio (SJNR) of the set of encoded signals; and an eigen-beamformer module coupled to an output of the precoder module, and configured to generate a set of symbols for transmission via a set of eigenmodes of a channel covariance matrix for the transceiver. |
| US11115088B2 |
Antenna array operation control
A method is disclosed for controlling operations of an antenna array comprising two or more controllable sections and antenna ports connected to transceiver circuitry. The method includes determining a scenario of transmission or reception by the antenna array, and configuring the transceiver circuitry responsive to the determined scenario. The scenario is defined in terms of a requirement for a number of users intended as receivers or transmitters, respectively, of the transmission or reception and in terms of one or more of: a path loss requirement, a peak rate requirement, and a traffic capacity requirement. The configuration includes, for the transmission or reception, one or more of: allocating a number of sections of the two or more sections of the antenna array and determining a sub-division of the allocated sections, determining a number of information data layers for multiple-input multiple-output application, and allocating a bandwidth. |
| US11115086B1 |
Reference signal port allocation
Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may receive multiple spatial dimension multiplexed (SDM) communications via a single antenna panel of the UE. The UE may perform phase noise correction for the multiple SDM communications based at least in part on phase tracking reference signals received via a single communication of the multiple SDM communications. Numerous other aspects are provided. |
| US11115085B1 |
MIMO-OFDM system for increasing reliability
A MIMO-OFDM system for increasing reliability includes a transmission terminal that includes Nt transmission antennas and transmits a MIMO signal through relay terminals, and a reception terminal that receives the MIMO signal from the relay terminal through Nr reception antennas, and the transmission terminal extracts a composite channel coefficient from a composite channel generated by matching a channel between the transmission terminal and the reception terminal with a channel between each of a plurality of the relay terminals and the reception terminal, selects the relay terminal corresponding to the composite channel coefficient having a maximized channel capacity from among the plurality of relay terminals by using the extracted composite channel coefficient, and transmits a MIMO signal to the reception terminal through the selected relay terminal. |
| US11115082B2 |
Wireless power transmission/reception device and method used in electronic apparatus
According to one embodiment of the present invention, an electronic apparatus can comprises: at least one antenna; a first circuit for wirelessly receiving or transmitting power by using at least one part of the at least one antenna; a second circuit for performing at least one communication by using at least one part of the at least one antenna; a first electrical path for connecting the at least one antenna to the first circuit; a second electrical path for connecting the at least one antenna to the second circuit; a third electrical path for connecting a point on the first electrical path to a point on the second electrical path; and at least one passive element or active element connected to at least one of the first electrical path, the second electrical path, and the third electrical path. |
| US11115077B1 |
Wireless communication method for modulating data signals in a chirp spread spectrum communication system
A system and methods for transmission and non-coherent detection of data signals modulated by a plurality of overlapping chirps in a chirp spread spectrum communication system (CSS). Data signals input to an adaptive overlapping transmitter are modulated by a plurality of overlapping chirps and transmitted over a wireless communication system to a non-coherent receiver. The coherent receiver includes a chirp matched filter which matches the chirps to an internal chirp signal, a delay filter which delays each chirp, a multiplier which multiplies each delayed chirp by a next chirp, an integrator which sums the amplitudes of the chirps and decision circuitry which determines the polarity of each sum and outputs a stream of ones and zeroes representing the data signals. |
| US11115076B1 |
Transceiver assembly protection element
A transceiver assembly includes a radio frequency (RF) transceiver configured to transmit and receive signals, and a transceiver controller operatively coupled with the transceiver via a transmit path and a receive path. A power amplifier disposed along the transmit path is configured to amplify RF signals for transmission by the transceiver. A power detection line is configured to provide power control feedback to the transceiver controller indicating an amplitude of current flowing from the power amplifier to the transceiver. A directionally-specific protection element disposed along the power detection line is configured to allow the power control feedback to flow to the transceiver controller over the power detection line in a first direction, while preventing at least some electrical noise originating from the transceiver controller from flowing through the power detection line in a second direction, thereby preventing the electrical noise from entering the receive path. |
| US11115075B2 |
Safe case with security choke point control
In accordance with some embodiments, an apparatus that controls security choke points on a personal communication device is provided. The apparatus includes a housing arranged to hold a second device. The apparatus receives a first input and classifies the first input. The apparatus then determines which of a combination of one or more sensors on the second device that the first input is directed to based on an input type classification associated with the first input. The apparatus further disables a first combination of the one or more sensors on the second device in accordance with determining that the first input corresponds to a first input type classification. |
| US11115073B2 |
Method and device for decreasing electromagnetic radiation specific absorption rate
A method includes separately collecting, by a terminal, a transmit power of the terminal at different time points in a second duration after a first duration from a power-on moment to obtain a plurality of transmit powers, calculating an average transmit power of the transmit powers, determining based on the average transmit power, a specific absorption rate (SAR) corresponding to the average transmit power, and decreasing a transmit power of the terminal after the second duration when the terminal determines that the SAR is greater than a preset threshold. |
| US11115067B2 |
Multi-band linearization system
Disclosed are implementations, including a method for digital predistortion of multiband signals that includes receiving an input signal comprising multiple signal portions in different frequency bands, the input signal configured to be processed by a transmit chain, of a power amplification system, comprising at least a power amplifier that produces output with non-linear distortions, with the non-linear distortions of the transmit chain being represented using a set of basis functions derived according to a single-band model of the non-linear distortions. The method further includes performing digital predistortion on signal components derived from the multiple signal portions of the input signal using a reduced set of the basis functions that excludes at least some basis functions for at least some cross-terms resulting from a full expansion of the single-band model applied to the multiple signal portions, to produce a digital predistorted signal provided to the transmit chain. |
| US11115066B2 |
Multi-purpose receiver chain for WiFi applications
An energy-efficient implementation of a WiFi transceiver is proposed in this disclosure. The WiFi transceiver comprises a receive chain comprising a variable receive (Rx) filter circuit and a variable Rx analog-to-digital converter (ADC) circuit. The receive chain is configured to receive a receive signal during a receive mode of operation, having a receive bandwidth associated therewith and receive a transmit signal associated with a transmit chain of the transceiver during a transmit mode of operation, having a transmit bandwidth associated therewith. The WiFi transceiver further comprises a control circuit configured to dynamically adapt a bandwidth of the variable Rx filter and the variable Rx ADC in the receive chain to the receive bandwidth or to the transmit bandwidth, based on the mode of operation. |
| US11115062B2 |
Memory system with adaptive threshold decoding and method of operating such memory system
Memory controllers, decoders and methods perform decoding of a codeword comprising multiple bits. For a select one of those bits, which belongs to at least one component codeword of the codeword, at an iteration of decoding, the following operations are performed. Channel information for the select bit is biased based on degree of the select bit. A reliability indicator of an initial decision as to whether to flip the select bit is computed based on the initial decision and the biased channel information. The reliability indicator is compared with an adaptive threshold, which is determined based on the degree of the select bit and unsatisfied check (USC) information from the initial decision. A decision is then made as to whether to flip the select bit. The decision and syndromes of each component codeword to which the select bit belongs are updated based on the compare operation. |
| US11115060B2 |
Parallel bit interleaver
A bit interleaving method involves applying a bit permutation process to bits of a QC-LDPC codeword made up of N cyclic blocks each including Q bits, and dividing the codeword after the permutation process into a plurality of constellation words each including M bits, the codeword being divided into F×N′/M folding sections (N′ being a subset of N selected cyclic blocks and being a multiple of M/F), each of the constellation words being associated with one of the F×N′/M folding sections, and the bit permutation process being applied such that each of the constellation words includes F bits from each of M/F different cyclic blocks in a given folding section associated with a given constellation word. |
| US11115058B2 |
Coding device, transmitter, decoding device, and receiver
In a coding device (20), a first coding unit (21) generates a parity of an RS code by coding, based on the RS code, each first data sequence existing in a direction different from a row direction of input data, and generates coded data by attaching the parity of the RS code to each first data sequence, thereby consequently expanding a matrix. A second coding unit (22) generates a parity of a BCH code and a parity of an LDPC code by coding, based on the BCH code and the LDPC code, each second data sequence existing in a row direction of the coded data, and generates a plurality of DVB-S2 frames (13) including, per DVB-S2 frame (13), one data sequence existing in the row direction of the coded data, the corresponding parity of the BCH code, and the corresponding parity of the LDPC code. |
| US11115055B2 |
Method and apparatus for encoding and decoding data in memory system
A decoding circuit includes a Bose-Chaudhuri-Hocquenghem (BCH) decoder. The BCH decoder includes a Syndrome stage for generating syndromes based on a BCH encoded word, a Berlekamp-Massey (BM) stage performing a Berlekamp-Massey algorithm on the syndromes to generate Error Location Polynomial (ELP) coefficients, a Chien stage that performs a Chien search on the ELP coefficients using a Fast Fourier Transform (FFT) to generate error bits and iteration information, and a Frame Fixer stage configured to reorder the error bits to be sequential based on the iteration information. The BCH decoder decodes the BCH encoded word using the reordered error bits. |
| US11115054B2 |
Polar code encoding method and apparatus
This application provides a polar code encoding method and apparatus. The method includes: obtaining, by a sending device, a sequence corresponding to a required mother code length; obtaining, by the sending device, a to-be-encoded bit; and performing, by the sending device, polar code encoding on the to-be-encoded bit by using the sequence corresponding to the required mother code length, to obtain an encoded bit, where the sequence is generated based on a basic sequence, and a length of the basic sequence is less than the mother code length. |
| US11115053B2 |
Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 2/15 and 4096-symbol mapping, and bit interleaving method using same
A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 4096-symbol mapping. |
| US11115046B2 |
Closed loop control in a camera module
A system may include an output stage for driving a load at an output of the output stage, a pulse-width modulation mode path configured to pre-drive the output stage in a first mode of operation, a linear mode path configured to pre-drive the output stage in a second mode of operation and a loop filter coupled at its input to the output of the output stage and coupled at its output to both of the pulse-width modulation mode path and the linear mode path. The pulse-width modulation mode path and the linear mode path may be configured such that a first transfer function between the output of the loop filter and the output of the output stage is substantially equivalent to a second transfer function between the output of the loop filter and the output of the output stage. |
| US11115045B2 |
Adaptive analog-to-digital converter for pulsed signals based on multi-bit sigma-delta modulation
A delta sigma modulator includes a summation circuit, at least one integrator, a multi-bit quantizer and a negative feedback circuit. The summation circuit is configured to produce a difference signal between an analog input signal and an analog feedback signal. The integrator is operatively coupled to the summation circuit to integrate the difference signal. The multi-bit quantizer is operatively coupled to the integrator to digitize the integrated signal to generate an N-bit digital output signal, N being an integer greater than 1. The negative feedback circuit operatively couples the multi-bit quantizer to the summation circuit. The negative feedback circuit includes a digital-to-analog converter arrangement for receiving the N-bit digital output signal and providing the analog feedback signal such that digital values of the N-bit digital output signal and values of the analog feedback encoded by the digital values have a non-linear relationship to one another. |
| US11115044B2 |
Loop delay compensation in a delta-sigma modulator
A delta-sigma modulator includes a first integrator and a comparator. The comparator's positive input couples to the first integrator's positive output, and the comparator's negative input couples to the first integrator's negative output. A first current DAC comprises a current source device, and first and second transistors. The first transistor has a first transistor control input and first and second current terminals. The first current terminal couples to the current source device, and the second current terminal couples to the first integrator positive output. The second transistor has a second transistor control input and third and fourth current terminals. The third current terminal couples to the current source device, and the fourth current terminal couples to the first integrator negative output. A first capacitive device couples to the second transistor control input and to both the second current terminal and the first integrator positive output. |
| US11115042B1 |
Low pass filter embedded digital-to-analog converter
A low pass filter embedded digital-to-analog converter including a first switch coupled to a first node that is coupled to a fourth switch and a first capacitor, a second switch coupled to a second node that is coupled to the first capacitor and a third switch, a negative input of a first operational amplifier coupled to a third node that is coupled to the third switch and a second capacitor, and an output port of the first operational amplifier coupled to a fourth node that is coupled to the second capacitor and the fourth switch. |
| US11115041B1 |
Filter apparatus and control method
A system includes an analog-to-digital converter configured to convert an analog signal generated by a digital sensor into a digital signal, and a testing apparatus configured to be enabled after the analog-to-digital converter operates in a testing mode, wherein the testing apparatus comprises a filter configured to receive the digital signal from the analog-to-digital converter, and apply a filtering process to the digital signal, a control circuit configured to terminate the filtering process after an output of the control circuit reaches a predetermined reference value, and a result register configured to receive a result generated by the filter after the control circuit terminates the filtering process. |
| US11115036B1 |
Resistor-capacitor oscillator (RCO) with digital calibration and quantizaton noise reduction
An oscillator including a switched capacitor configured to generate a sawtooth or ramp voltage in response to a switched capacitor drive signal; a low pass filter (LPF) configured to filter the sawtooth or ramp voltage to generate a filtered voltage; a reference voltage generator configured to generate a reference voltage; an integrator configured to integrate a difference between the sawtooth or ramp voltage and the reference voltage to generate a frequency control signal; a voltage controlled oscillator (VCO) configured to generate a first clock based on the frequency control signal; a frequency divider configured to frequency divide the first clock to generate a second clock; and a switched capacitor driver configured to generate the switched capacitor drive signal in response to the second clock. The oscillator may also include a switched capacitor sampler to sample the sawtooth or ramp voltage, wherein the filtered voltage is based on the sampled voltage. |
| US11115031B2 |
Phase-locked loop
The present technology relates to a phase-locked loop that allows a reduction in power consumption.A SAR-ADC that includes two capacitors and outputs a result of comparison between voltages generated from the two capacitors, a current source that charges the two capacitors with current, a first switch that is disposed between one of the two capacitors and the current source and is provided with a phase difference between a first clock of a reference frequency and a second clock having a higher frequency than the first clock, and a second switch that is disposed between another of the two capacitors and the current source and is provided with the second clock are included. The present disclosure can be applied, for example, to a wireless communication device. |
| US11115027B2 |
Direct current powered clockless superconducting logic family using dynamic internal states
Techniques regarding a DSFQ logic family are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a dynamic single flux quantum logic circuit that has a self-resetting internal state and can be powered by direct current. Further, the self-resetting internal state can be characterized by two time constants. |
| US11115026B2 |
Systems and methods for routing data across regions of an integrated circuit
An integrated circuit may include multiple programmable logic regions and a first plurality of routers. Each of the first plurality of routers is coupled to a respective region of a first portion of the programmable logic regions, and each of the first portion of the plurality of regions transmits configuration data to a first set of adjacent regions of the first portion of regions. The integrated circuit may also include a second plurality of routers, and each of the second plurality of routers is coupled to a respective region of a second portion of the regions. Each of the second portion of the regions transmits the configuration data to a second set of adjacent regions of the first portion of regions. The integrated circuit may also include a voltage regulator that distributes a voltage to each of the regions. |
| US11115020B2 |
Signal transmission circuit device, semiconductor device, method and apparatus for inspecting semiconductor device, signal transmission device, and motor drive apparatus using signal transmission device
A signal transmission device includes a first lead frame supporting a signal transmission chip that includes first and second inductor spiral rings, a first bonding pad electrically coupled between the first and second inductor spiral rings, and a guard ring provided to roundly cover the first and second inductor spiral rings in a plan view. Bonding pads are provided outside of the guard ring. A direction of rotation between the first and second inductor spiral rings are different from each other so that the first and second inductor spiral rings are disposed substantially symmetrically about the first bonding pad. A second lead frame supports a semiconductor chip, with the signal transmission chip and the semiconductor chip facing each other. |
| US11115010B1 |
Energy loaded dielectrics, systems including energy loaded dielectrics, and methods for fabrication and use thereof
A dielectric structure is loaded with energy (e.g., charge), which is retained therein until a trigger causes rapid discharge of the loaded energy and generation of an accompanying electromagnetic pulse (EMP). By appropriate design of the dielectric structure and/or trigger, the waveform of the EMP resulting from the rapid discharge can be tailored. Features of the dielectric structure can be modified and/or other devices can be coupled to the dielectric structure to also tailor the EMP, for example, to provide directionality. A modeling unit can predict the discharge in the dielectric structure and/or resulting EMP. The modeling unit can be used to determine charge density spatial distribution within the dielectric structure, shape of the dielectric structure, and/or actuation timing/location necessary to yield a desired waveform for the EMP emanating from the dielectric structure upon discharge. |
| US11115008B2 |
Single event upset-tolerant latch circuit and flip-flop circuit
Provided are a latch circuit and a flip-flop circuit each having more excellent tolerance to single event upset (SEU). The single event upset (SEU)-tolerant latch circuit of the present invention is configured such that three transistors for redundancy are added to each of eight transistors constituting a conventional DICE latch circuit, at respective positions consisting of a serial position, a parallel position and a parallel-serial position so as to form a four-transistor circuit in which a serially duplicated circuit is duplicated in parallel, and each of a first data input part and a second data input part is also made dually redundant. |
| US11115007B2 |
Methods and apparatuses of a two-phase flip-flop with symmetrical rise and fall times
Methods and apparatuses of a two-phase flip-flop with symmetrical rise and fall times are disclosed herein. An example apparatus may include a clock generator circuit including a two-phase flip-flop circuit configured to provide an output signal. The two-phase flip-flop circuit includes a two-phase flip-flop and a driver circuit. The two-phase flip-flop is configured to provide a first driver control signal and a second driver control signal responsive to a clock signal. The first driver control signal and the second driver control signal are complementary. The driver circuit is configured to provide the output signal responsive to the first driver control signal and the second driver control signal. |
| US11115004B1 |
Fractional delay filter for a digital signal processing system
A processing element for implementation in a digital signal processing system is provided. The processing element is configured to receive a first data stream comprising a plurality of digital values where each value represents a sample of an analog signal. The processing element is further configured to receive a second data stream comprising a series of digital values where each value represents a sample of the analog signal. The processing element is configured to filter the first data stream via a first Farrow-structured fractional delay (FD) filter and output a filtered first data stream; filter the second data stream via a second Farrow-structured FD filter and output a filtered second data stream; and temporarily store values from the second data stream and output the stored values to the first Farrow-structured FD filter so that the stored values can be used to filter the first data stream. |
| US11114999B2 |
Filter including acoustic wave resonator
A filter includes: series resonators disposed between an input terminal and an output terminal; and shunt resonators disposed at different nodes between the input terminal and the output terminal, wherein a resonance frequency and an antiresonance frequency of at least one series resonator among the series resonators are respectively located within a reference frequency range of a resonance frequency and an antiresonance frequency of the shunt resonators. |
| US11114998B2 |
Transversely-excited film bulk acoustic resonators for high power applications
There is disclosed acoustic resonators and filter devices. An acoustic resonator includes a substrate having a surface and a Z-cut piezoelectric plate having parallel front and back surfaces, the back surface attached to the surface of the substrate except for a portion of the piezoelectric plate forming a diaphragm that spans a cavity in the substrate. An interdigital transducer (IDT) is formed on the front surface of the single-crystal piezoelectric plate such that interleaved fingers of the IDT are disposed on the diaphragm. The IDT is configured to excite a primary acoustic mode in the diaphragm in response to a radio frequency signal applied to the IDT. A thickness of the interleaved fingers of the IDT is greater than or equal to 0.85 times a thickness of the diaphragm. |
| US11114993B2 |
High frequency multilayer filter
A high frequency multilayer filter may include a plurality of dielectric layers and a signal path having an input and an output. The multilayer filter may include an inductor including a conductive layer formed over a first dielectric layer. The inductor may be electrically connected at a first location with the signal path and electrically connected at a second location with at least one of the signal path or a ground. The multilayer filter may include a capacitor including a first electrode and a second electrode that is separated from the first electrode by a second dielectric layer. The multilayer filter has a characteristic frequency that is greater than about 6 GHz. |
| US11114991B2 |
Analog front-end circuit for conditioning a sensor signal
An analog front-end (AFE) circuit for conditioning a sensor signal is disclosed. The AFE circuit includes a first stage configured to amplify and filter the sensor signal. The first stage comprises a biquadratic filter comprising a first plurality of DC-coupled transconductance amplifiers. The AFE further includes a second stage configured to further amplify and filter the amplified sensor signal, and to compensate a direct current (DC) offset of the first stage. The second stage comprises a second plurality of AC-coupled transconductance amplifiers. Each transconductance amplifier of the first plurality and of the second plurality has a programmable transconductance and comprises a plurality of subthreshold-biased transistors. |
| US11114986B2 |
Constant level-shift buffer amplifier circuits
A push-pull dynamic amplifier is operable in reset and amplification phases. The amplifier includes first NMOS and PMOS input transistors that are electrically coupled to a first input terminal and a first output terminal. Second NMOS and PMOS input transistors are electrically coupled to a second input terminal and a second output terminal. First and second reset switches are electrically coupled to the first and second output terminals, respectively. A power supply switch is electrically coupled to the first and the second PMOS transistors, and a ground switch is electrically coupled to the first and the second NMOS transistors. During the reset phase, the reset switches are closed and the power supply switch and the ground switch are opened. During the amplification phase, the reset switches are opened and the power supply switch and the ground switch are closed. |
| US11114985B2 |
High frequency amplifier
A high frequency amplifier 1 includes an input terminal PIN, an output terminal POUT, a transistor 5 configured to amplify an RF signal applied to the input terminal PIN, a matching circuit 9 for a fundamental of the RF signal and a reflection circuit 7 for a harmonic relative to the fundamental, the matching circuit 9 and the reflection circuit 7 being connected in series between the transistor 5 and the output terminal POUT, an extraction circuit 13 configured to extract a harmonic appearing at the output terminal POUT, processing circuits 15, 17 configured to adjust a phase and intensity of the harmonic extracted by the extraction circuit 13, and a multiplexing circuit 19 configured to multiplex the harmonic processed by the processing circuits 15, 17 to the harmonic reflected by the reflection circuit 7 and give the multiplexed harmonic to the transistor 5. |
| US11114979B2 |
Frequency detector
A frequency detector is used for detecting a frequency difference of a signal to be tested from a first time point to a second time point. The frequency detector includes: an alternating current coupled capacitor configured to receive the signal to be tested; a rectifying circuit electrically connected to the alternating current coupled capacitor; an analog-to-digital converter electrically connected to the rectifying circuit; a control unit electrically connected to the analog-to-digital converter; and a counter electrically connected to the rectifying circuit and the control unit, wherein the control unit is configured to calculate the frequency difference of the signal to be tested from the first time point to the second time point according to outputs of the analog-to-digital converter and outputs of the counter. |
| US11114976B2 |
Modular removable building integrated thermal electric roofing system
An improved modular, removable system of building-integrated solar panel photovoltaics for easy residential and commercial roof installation for generating electrical and thermal energy. |
| US11114975B2 |
Solar tracking system
The present invention relates to a two axis tracking system (100). The present invention includes a frame (102), a solar panel PV module (112), an upper beam (114), a selectively flexible bracket (116), a first supporting pillar (118), a second supporting pillar (140), a lower beam (120), first strut (126), a second strut (146). The first supporting pillar (118) and the second supporting pillar (140) together act as the fixed link. The frame (102) acts as the rotating link and the lower beam (120) acts as the translating link. The first strut (126) and the second strut (146) together act as the fourth link connecting the frame (102) and the lower beam (120). The translation of the lower beam (120) causes rotation of the frame (102) in north-south direction. The PV module (112) is mounted on the frame (102) are rotated in east-west direction by translation motion of the upper beam (114). |
| US11114974B2 |
Surface mount assemblies for a solar panel system
Surface mount assemblies for mounting to a solar panel frame to an installation surface are disclosed. In some embodiments, a base is coupled to a height-adjustable rail mount to slidably couple a track with a fastener assembly that includes of a fastener, spacer, and nut. In some embodiments, a base is coupled to a rail mount and positioned on a base plate to slidably couple to a surface track with a fastener assembly that includes a first fastener slidably coupled to a groove formed by the track, spacer, and second fastener. In some embodiments, a base is coupled to a rail mount for slidably coupling the rail to a height-adjustable base with a fastener. In some embodiments, a two-configuration, track-mounted, rectangular base is designed with a rectangular base having a pair of short-sided legs, a pair of long-sided legs, and a fastener for engaging outer surfaces of a track. |
| US11114971B2 |
Method for controlling a drive motor of an actuator as well as drive motor of an actuator
In a method for controlling a drive motor of an actuator for actuating a valve, the power of the drive motor is supplied by pulse width modulated voltage controlled by a control frequency to adjust the actuator coupled to a valve into a desired position. The control frequency is changed such that a mixture of frequencies is produced. The control frequency is changed in steps. The frequencies of the mixture of frequencies are selected to be near the nominal control frequency. A drive motor of an actuator is provided that is controlled by the described method. |
| US11114961B2 |
Motor driving control device and motor driving control method
A motor driving control device includes a motor driving unit, a position detection unit, a current detection unit and a control unit. The control unit includes a change detecting means configured to detect a predetermined phase change in the position signal, a first switching means configured to sequentially switch energization patterns of the coils with the plurality of phases based on a timing when the phase change is detected, and a second switching means configured to, in a state where the change detecting means does not detect the phase change, when a value of the drive current becomes a predetermined first threshold or more during a monitoring time period after a timing when the predetermined phase change in the position signal is expected, perform an operation to forcibly switch to a next energization pattern regardless of the timing of switching the energization pattern by the first switching means. |
| US11114959B2 |
Electric motor driving system and method
In a so-called dual power source and dual inverter system, in which a pair of first and second inverters controls and drives a motor that includes multiple windings of phases each having open ends based on electric power supplied from a pair of power supplies, a motor driving system capable of appropriately allocating the electric power supplied from the pair of power supplies to the pair of inverters is provided. The motor driving system includes a pair of first and second inverter control circuits to generate a pair of first and second voltage instructions supplied to the first and second inverters based on a torque command, respectively. One of the first and second inverter control circuits includes a power controller that controls sharing of the electric power supplied from the first and second power supplies in accordance with a target electric power instruction. |
| US11114958B2 |
Braking method for an electric motor
An electric motor connected to a switching device is braked from an active operating state by actuating a semiconductor switch arranged in parallel with an electromechanical switch to reduce a current intensity in the electromechanical switch, opening the electromechanical switch, blocking the semiconductor switch for an adjustable period, determining a resulting torque of the electric motor, and determining an actuation time for braking the electric motor based on the resulting torque and actuating the semiconductor switch at the actuation time. The resulting torque is opposite a present direction of rotation of the electric motor at the actuation time. The semiconductor switch is turned on for an adjustable actuation period. Also disclosed are a computer program product and a soft starter configured to implement the described method. |
| US11114954B2 |
Ultrasonic motor having generators formed of cooperating and spaced apart first and second sub-generators
An ultrasonic motor and method are disclosed with an element to be driven and a plate-shaped ultrasonic actuator made of polarized electromechanical material with at least two friction elements arranged on one of its side. The ultrasonic actuator can include at least two generators for acoustic standing waves and each of the generators can include two cooperating and spaced sub-generators, and one respective sub-generator of a generator is located between the sub-generators of an adjacent generator, and the sub-generators of one generator are arranged in mirror image to the sub-generators of an adjacent generator. A polarization direction of the electromechanical material of one of the two sub-generators of one generator differs from the polarization direction of the electromechanical material of the other sub-generator of the same generator. |
| US11114953B2 |
Charge pump-based artificial lightning generator and method for manufacturing same
A method for manufacturing a charge pump-based artificial lightning generator comprises the steps of: forming a second electrode on a prepared substrate; forming a negatively charged body having a sponge structure under the second electrode; removing spherical polymer particles from the negatively charged body using a toluene solution; allowing metal particles to penetrate into the negatively charged body; forming a positively charged body in a location which is at a predetermined distance below the negatively charged body in order to generate charges; nano-structuring the surface of the positively charged body; coating the nano-structured surface of the positively charged body with second metal particles; forming a ground layer for charge separation while maintaining a constant distance in the downward direction from one side of the positively charged body; and forming a first electrode for charge accumulation in a location which is at a predetermined distance below the positively charged body. Accordingly, the present invention can be miniaturized, can produce high-output energy from minute energy such as a wind, a vibration, or a sound, and can remarkably reduce costs incurred according to energy collection. |
| US11114949B2 |
Inverter control board that is configured so that a detection circuit is appropriately arranged
An inverter control board that is configured to be connected to an inverter for performing conversion between direct current power and multiple-phase alternating current power, wherein the inverter has arms, each arm provided for one alternating current phase and comprising a series circuit of a high-side switching element to be connected to a direct-current positive electrode and a low-side switching element to be connected to a direct-current negative electrode. |
| US11114947B2 |
Load identifying AC power supply with control and methods
An improved AC power supply is described. The supply identifies the load through monitoring the current and voltage wave forms and phase relations with the AC Mains. The comparison is done in conditions where the power to the load is programmably varied through use of a control switch located in the line and neutral between the AC mains and the load. The program of controlling the switch is varied to optimize the ability to distinguish similar load types. The switch can be further used to control power to the load that varies according to a set of rules based upon the identity of the load. In a preferred embodiment, the design enables high efficiency with minimal components that may be fully integrated onto silicon. |
| US11114946B2 |
Voltage regulator module
A voltage regulator module includes a circuit board assembly and a magnetic core assembly. The circuit board assembly includes a printed circuit board and at least one switch element. A first concave structure is concavely formed on a second surface of the printed circuit board. At least one protrusion post is disposed within the first concave structure. A pin as a positive output terminal, a pin as a positive input terminal and a pin as a negative output terminal are disposed on the second surface of the printed circuit board. The switch element is disposed on a first surface of the printed circuit board. The magnetic core assembly is accommodated within the first concave structure, and includes at least one opening. The protrusion post is penetrated through the corresponding opening. Consequently, at least one inductor is defined by the at least one protrusion post and the magnetic core assembly collaboratively. |
| US11114942B2 |
Boost converter
A boost converter includes a first inductor, a power switch element, an output stage circuit, a controller, a resonant circuit, and a discharging circuit. The first inductor receives an input voltage. The power switch element includes a parasitic capacitor. The output stage circuit includes a first resistor. The output stage circuit generates an output voltage. The controller detects the resistive voltage of the first resistor, and generates a clock voltage, a first control voltage, and a second control voltage according to the resistive voltage. The resonant circuit is coupled to the first inductor, and is selectively enabled or disabled according to the first control voltage. When the resonant circuit is enabled, the resonant circuit resonates with the first inductor and the parasitic capacitor, so as to fine-tune an inductive current flowing through the first inductor. |
| US11114941B2 |
Reduced voltage ratings for power transistors in a buck converter
A device includes a buck converter coupled to an input node and an output node, and a linear voltage regulator coupled to the input node and to the output node. |
| US11114940B2 |
Half-bridge electronic device comprising two systems for minimizing dead-time between the switching operations of a high level switch and of a low level switch
A half-bridge electronic device comprises a high level switch and a low level switch in series that are connected at a central point, and a first and a second synchronization system: • the first system comprising a first detection circuit configured to interpret a variation, following a falling edge, of the voltage (Vm) at the central point, and the first system being configured to generate a first synchronization signal (ATON-LS) for activating the low level switch; • the second system comprising a second detection circuit configured to interpret a variation, following a rising edge, of the voltage (Vm) at the central point, and the second system being configured to generate a second synchronization signal (ATON-HS) for activating the high level switch. |
| US11114937B2 |
Charge pump circuit
A charge pump unit structure of a charge pump circuit includes a booster circuit unit, a positive pump transfer unit and a negative pump transfer unit. An output terminal of the booster circuit unit is connected to an input terminal of the positive pump transfer unit through a first switch circuit and to an input terminal of the negative pump transfer unit through a second switch circuit. An erase enable signal is connected to control terminals of the positive and negative pump transfer units. A first enable signal is connected to control terminals of the positive pump transfer unit and the first switch circuit. A second enable signal is connected to control terminals of the negative pump transfer unit and the second switch circuit. |
| US11114935B2 |
Switching-mode power supply circuit
A switching-mode power supply circuit includes a boost inductor, a boost capacitor, a storage capacitor, a transformer or DC-DC inductor, a first switching component, an output rectification component, a filter capacitor, a feedback and control circuit, first and second rectification circuits. When first switching component conducts, the boost inductor, boost capacitor and first switching component form a first boost loop, the boost inductor stores energy, and the storage capacitor, first switching component and transformer or DC-DC inductor form a first DC-DC loop. When first switching component cuts off, the boost inductor, boost capacitor, storage capacitor and transformer or DC-DC inductor form a second boost loop, and the transformer or DC-DC inductor, output rectification component and filter capacitor form a second DC-DC loop. The filter capacitor supplies energy to a load. The feedback and control circuit drives the first switching component to turn on/off according to a chopping wave having specific frequency and duty to control a voltage, current or power output to the load. |
| US11114930B2 |
Eddy current brake configurations
Described herein are eddy current brakes and associated methods of their use, particularly configurations that have a kinematic relationship with at least two rotational degrees of freedom used to tune operation of the brake or apparatus in which the brake is located. |
| US11114929B2 |
MEMS device
According to the present invention there is provided a device comprising a MEMS die and, a single magnet, wherein the MEMS die cooperates with the magnet, such that the MEMS die is submerged in a magnetic field provided by the magnet; wherein the magnet is a single multi-pole magnet. |
| US11114925B2 |
Grouped tooth electric motor
An electric motor may comprise a rotor and a stator comprising rotor and stator teeth, respectively. A non-uniform angular spacing or grouping of rotor teeth may facilitate desired rotational speeds of the rotor. |
| US11114923B2 |
Bending-forming jig
A bending-forming jig used in bending and forming a protruding portion of a leg portion of a U-shaped conductor toward a circumferential direction, the protruding portion protruding from an axial end surface of a stator core, the bending-forming jig including a ring portion and a claw portion, the claw portion including a first abutting surface that rises from an axial end surface of the ring portion with the surface directed in the circumferential direction and abuts against a tip portion of the protruding portion from the circumferential direction, and a projecting portion that projects, at a tip end of the claw portion, in the circumferential direction from the abutting surface and abuts against the tip portion of the protruding portion from the axial direction toward the axial end surface of the ring portion. |
| US11114922B2 |
Rotor for an electric motor or generator
A rotor for an electric motor or generator, the rotor comprising a housing having a first surface on which a first set of magnets is mounted; and an annular clamping ring for retaining a second set of magnets to a second surface of the housing, wherein the position of the second set of magnets on the second surface allows the position of the first set of magnets to be determined, wherein the annular clamping ring includes a mounting point for allowing the annular clamping ring to be mounted to the housing for retaining the second set of magnets to the second surface, wherein the cross sectional area of the annular clamping ring is reduced in a region adjacent to the mounting point and wherein the annular clamping ring is mounted over the second set of magnets. |
| US11114921B2 |
Vehicle drive device for lubrication a power transmission and cooling a rotating electric machine
A vehicle drive device is provided with a lubricating path including a first oil pump to pump up an oil stored in the casing by the first oil pump and to supply the oil to the power transmission mechanism for lubricating the power transmission mechanism, and a cooling path that is separated from the lubricating circuit and provided for the rotating electric machine, the cooling path including a second oil pump to pump up the oil stored in the casing by the second oil pump to supply the oil exclusively to the rotating electric machine for cooling the rotating electric machine, the second oil pump is an electric oil pump, and the cooling path is provided with an oil cooler cooling the oil to be supplied to the rotating electric machine. |
| US11114919B2 |
Actuator
An actuator is provided which comprises an actuator housing having an inside surface defining a stator-receiving portion and a stator. The stator-receiving portion comprises a rotor support element, and plurality of guide projections which are spaced-apart about the rotor support element, the plurality of stator-abutment projections being integrally formed with the inside surface. The stator has a plurality of locator recesses which are engagable with the plurality of stator-abutment projections when the stator is received at the stator-receiving portion of the actuator housing to locate the stator relative to the actuator housing. |
| US11114916B2 |
Axial gap-type rotary electric machine and method for producing same
The present invention makes full use of the advantages of a resin molded stator while pursuing advantages related to performance, reliability, and workability. Provided is an axial gap-type rotary electric machine comprising: a stator in which a plurality of core units having a magnetic flux surface in the rotational axis direction are arranged annularly around the rotational axis; a rotor facing the magnetic flux surfaces of the stator in the axial direction; a housing comprising an inner cylinder space in which the stator is accommodated; and a molded resin that covers part or all of the stator and integrally connects the stator and the inner circumference of the inner cylinder space. The housing comprises an annular thick wall section that has a predetermined thickness toward the axial center side and that follows the inner circumference in part of the inner circumference of the inner cylinder space. The axial boundary of the molded resin and the inner circumference of the inner cylinder space is included within the area of a radial projection surface of the thick wall section. |
| US11114915B2 |
Integrated rotor yoke
A rotor yoke includes a casing attachment ring, a sensor ring, and an over-molded body disposed between the casing attachment ring and the sensor ring. The over-molded body couples the sensor ring to the casing attachment mechanism. |
| US11114911B2 |
Brushless motor and stator thereof
A stator of a brushless motor includes a stator core including a plurality of teeth arranged in a circumferential direction thereof, a slot being formed between any adjacent two teeth; and a plurality of phases of windings wound on the teeth and received in the corresponding slots. Each phase of winding includes two leading terminals, adjacent leading terminals of any adjacent two phases of windings extending out of the same slot, which simplifies the winding structure of the stator winding and reduces the short circuit risk between turns of coils of the winding. The windings can be formed by winding a single conductive wire uninterruptedly on the stator teeth. It is easily automated. |
| US11114909B2 |
Motor
A motor includes a stator having a winding, and a rotor. The rotor rotates by receiving a rotational magnetic field generated by drive current supplied to the winding. The winding includes a first winding and a second winding, the first and second windings both being excited at the same timing by the drive current. The first winding and the second winding are connected in series. The rotor includes a first pole section and a second pole section. The second pole section faces the second winding at the rotation position of the rotor at which the first pole section faces the first winding. The magnetic force exerted on the stator by the second pole section is weaker than that exerted by the first pole section. |
| US11114908B2 |
Rotor for electric motor, electric motor and compressor
Disclosed are a rotor for an electric motor, an electric motor, and a compressor. The rotor includes: a rotor core (1), provided with a shaft hole (11) and four magnet grooves (12); and four permanent magnets (2), disposed in corresponding magnet grooves, each permanent magnet including a first surface (21) and a second surface (22). When viewed from a projection surface, the first surface has an arc segment (211), and the second surface has a plurality of straight segments connected in sequence. A thickness H of each permanent magnet on a corresponding magnetic pole centerline, a length L of the second surface projected on the projection surface, and a radius R of the rotor core satisfying the following relationships: 0.24≤H/R≤0.26 and 1.07≤L/R≤1.11. |
| US11114899B2 |
Wireless system for improving performance and prolonging battery lifetime of node by energy harvesting
In wireless system, radio frequency (RF) energy harvesting addresses the problem of limited battery lifetime in wireless nodes. In this invention, a wireless system for improving performance and prolonging battery life time of node, a battery assisted relay (2) framework is introduced. In this battery assisted relay framework, the energy harvested (EH) relay (2) augments the harvested energy with energy drawn from the battery (10) so as to prolong the battery life. Thus the following optimizations become relevant (i) maximizing throughput performance by using fixed small amount of battery energy in every signaling interval, (ii) minimizing battery energy consumption with predefined throughput performance requirement by optimizing a fixed charging time and energy together (best statistically optimum fixed charging time and energy drawn are determined), (iii) minimizing battery energy consumption by allowing channel-dependent energy harvesting duration, and (iv) minimizing battery energy consumption by drawing energy from the battery dependent on channel values. The suggested method and system can increase throughput as well as battery lifetimes, and are thus of practical value. |
| US11114897B2 |
Wireless power transmission system enabling bidirectional energy flow
A wireless power system for powering a television includes a source resonator, configured to generate an oscillating magnetic field, and at least one television component attached to at least one device resonator, wherein the at least one device resonator is configured to wirelessly receive power from the source resonator via the oscillating magnetic field when the distance between the source resonator and the at least one device resonator is more than 5 cm, and wherein at least one television component draws at least 10 Watts of power. |
| US11114895B2 |
Pinless power coupling
A pinless power coupling arrangement comprises at least one pin-less power jack, the power jack comprising a primary coil shielded behind an insulating layer for inductive coupling to a pin-less power plug. The power plug comprises a secondary coil wherein said insulating layer is substantially flat and the power plug and the power jack may be aligned by an alignment means. Various such alignment means are discussed as are enabled surfaces for supporting inductive power jacks and inductive plugs coupled to various appliances. |
| US11114894B2 |
Apparatus system and method of wireless robot charging
A charging apparatus for wireless charging of one or more robotic devices includes a power transmitting unit having a plurality of conducting wires each configured to carry a respective alternating current signal and to generate a time-varying magnetic flux when the conducting wire carries the alternating current signal, a processor configured to detect a presence or an absence of an induction coil of a robotic device within a predetermined distance of a conducting wire and to generate control data based on the result of the detection, and a control unit configured to control at least one of an amplitude and a frequency of each respective alternating current signal supplied to each of the conducting wires based on the control data, where the control unit is configured to increase at least one of an amplitude and a frequency of an alternating current signal supplied to a conducting wire in response to control data indicating the presence of the induction coil within the predetermined distance of the conducting wire. |
| US11114889B2 |
Electronic circuit for redundant supply of an electric load
An electronic circuit for redundant supply of an electric load comprises a plurality of terminals including at least a first terminal, a second terminal and at least one third terminal, wherein the first terminal is configured to be connected to a first energy source for primary supply of the electric load; the second terminal is configured to be connected to a second energy source for secondary supply of the electric load; the at least one third terminal is configured to be connected to the electric load; the electronic circuit further comprises a plurality of electrical components interposed between the first terminal, the second terminal and the at least one third terminal, the electrical components being configured to enable power flow from either the first terminal or the second terminal to the at least one third terminal in dependence of an erroneous supply state for the electric load. |
| US11114883B2 |
Method for controlling a charging device on board an electric or hybrid vehicle
A method controls a battery-charging device including a rectifier stage of three-phase Vienna rectifier type capable of being connected to a single-phase or three-phase electrical power supply grid and linked by first and second DC power supply buses to a DC-to-DC converter stage including first and second LLC resonant converters that are connected to first and second DC power supply bus capacitors, respectively, which are positioned on each of the buses at the output of the rectifier stage. The power supply for the charging device is single phase and the voltage of the first and second DC power supply bus capacitors is regulated independently by the first and second LLC resonant converters so as to provide a fixed regulated voltage on each of the DC power supply buses. |
| US11114882B2 |
Power converter
A power converter includes a plurality of power conversion units connected to one another in parallel, each including an AC/DC converter (rectifier) that converts AC power from an AC input power supply (commercial power supply) into DC power, a DC/DC converter (DC power converter) that converts the DC power from the AC/DC converter, and a current detector that detects charge current flowing from the DC/DC converter as well as discharge current flowing to the DC/DC converter. The power converter further includes a battery (electrical storage unit) that is charged by a subset of DC/DC converters among the DC/DC converters of the plurality of power conversion units, as well as a CPU (controller) that controls the DC/DC converters of the plurality of power conversion units. |
| US11114878B2 |
High-power battery-powered portable power source
A portable power source for power tools. The portable power source includes a housing defining a battery support and an power outlet, a circuit supported by the housing and including an input terminal on the battery support, an output terminal on the power outlet, and an inverter electrically connected between the input terminal and the output terminal, a battery power source including a battery housing supported on the battery support, at least one battery cell, and a battery terminal connected to the battery cell and electrically connectable to the input terminal, power being transferrable from the battery cell to the circuit to be output through the power outlet, and a frame connected to the housing and extending beyond a periphery of the housing and of the supported battery power source, the frame inhibiting contact with the housing and the battery power source. |
| US11114872B2 |
Charging device
A charging device includes: a connector that protrudes from a placement surface; a protective plate; a wall surface intersecting with the placement surface; a support member capable of moving to be in a first orientation in which the protective plate is supported and a second orientation in which the protective plate is not supported; and a lock mechanism that locks the support member in the first orientation. The lock mechanism includes a first protruding part that, when the support member is locked, releases the locking of the support member by being pushed. The support member (i) includes a second protruding part, and (ii) moves from the first orientation to the second orientation by the second protruding part being pushed toward the wall surface in a state where the locking is released. When the support member has moved, the protective plate is capable of moving to the placement stand. |
| US11114871B2 |
Smart wearable device and charger thereof
A smart wearable device and a charger thereof includes the smart wearable device and a charging base configured to charge the smart wearable device. The charging base comprises an elastic case. An open slot for inserting the smart wearable device is formed in the elastic case. A power supply portion is disposed on the charging base. The power supply portion provides the smart wearable device with electrical energy for charging. The smart wearable device is fixed to the charging base by way of a close fit between slot walls on two sides of the open slot and an outer surface of the smart wearable device. |
| US11114870B2 |
Power tool system and battery pack therefor having wireless communicator
A power tool system includes a hand-held power tool having a power tool housing accommodating a motor, and a battery pack interface electrically connected to the motor within the power tool housing. A battery pack includes a battery pack housing accommodating at least one battery cell and a power tool interface electrically connected to the at least one battery cell within the battery pack housing. The power tool interface is configured to be physically and electrically connected to and disconnected from the battery pack interface of the power tool. A wireless communicator is attached to or accommodated within the battery pack housing. The wireless communicator is configured to wirelessly communicate with an external device using radio waves while the power tool interface of the battery pack is physically and electrically connected to the battery pack interface of the hand-held power tool. |
| US11114864B2 |
Method and device for distributing active power for wind farm
A method and device for distributing active power for a wind farm are provided. The method includes: calculating a current total active power variation of the wind farm according to a current frequency variation of a power grid; distributing a current single-unit active power variation to each wind turbine according to a first preset strategy based on the current total active power variation and a single-unit storage energy value in a case that the current total active power variation is greater than zero; distributing the current single-unit active power variation to each wind turbine according to the first preset strategy based on the current total active power variation and a lowerable power value in a case that the current total active power variation is smaller than zero; and controlling each wind turbine to adjust its operating state. |
| US11114863B2 |
Method for starting a hydraulic turbine
The invention concerns a method for coupling to the grid a hydraulic unit having a synchronous generator, a runner, and wicket gates, the method comprises: a) a step of increasing the flow of water into the runner from a time t0 to a time t1 so that the rotation frequency of the rotor of the synchronous generator is, at time t1 equal to the frequency of the grid; b) a step of closing the circuit breaker at time t1, step a) further comprises a sub-step a1) executed from a time t2 to time t1, wherein the flow of water is adjusted so that, at time t1, the phase of the synchronous generator is aligned with the grid phase. |
| US11114859B2 |
Power conversion system, photovoltaic optimizer and power tracking method thereof
An apparatus for photovoltaic power generation can include: an inverter; and at least one photovoltaic optimizer, where input terminals of each photovoltaic optimizer are coupled to output terminals of a photovoltaic panel, and output terminals of each photovoltaic optimizer are coupled in series with each other between input terminals of the inverter; where a maximum power point of the photovoltaic panel is tracked in accordance with an input voltage of the inverter when the photovoltaic optimizer operates in a first mode; and the maximum power point of the photovoltaic panel is tracked in accordance with an output voltage of the photovoltaic panel when the photovoltaic optimizer operates in a second mode. |
| US11114858B2 |
Bidirectional capacitor bank control
The present disclosure relates to controlling a capacitor bank using current measurements from different current sensors depending on the power flow direction. For example, the system may perform capacitor bank control operations using current measurements from a first current sensor coupled to the power line between an initial source and the capacitor bank when power is flowing in a first power flow direction on the power line. The system may determine that power flow on the power line has changed from flowing in the first power flow direction to flowing in a second power flow direction from an updated source, different from the initial source. The system may, upon detecting the change in the power flow direction perform control operations of the capacitor bank using current measurements from a second current sensor between an updated source and the capacitor bank. |
| US11114851B2 |
Energy conserving (stand-by mode) power saving design for battery chargers and power supplies with a control signal
A system is described that turns off a high power, power supply when a device no longer needs high power. A low power, power supply or a rechargeable battery provides power to determine when the device again needs high power. The low power supply consumes a minimum possible power when the device does not need high power and the power rechargeable battery is not charged. That is, the high power and low power, power supplies are turned on or off based on the real time power consumption need of the device and the charged state of the battery. The power need of the device is monitored by a current shunt monitoring circuit and a control signal monitoring circuit. |
| US11114850B2 |
Electrostatic discharge protection circuit
An electrostatic discharge protection circuit includes a first internal circuit formed between a first power line and a first ground line, and configured to operate in a range between a first power and a first ground; a second internal circuit formed between a second power line and a second ground line, and configured to operate in a range between a second power having a level higher than the first power and a second ground; a signal line connecting an output terminal of the first internal circuit and an input terminal of the second internal circuit; and a protection circuit configured to form a bypass path for bypassing a stress due to electrostatic discharge when the electrostatic discharge occurs, between the signal line and the second ground line, to protect a semiconductor device of the second internal circuit from the electrostatic discharge. |
| US11114845B2 |
Adapter system for IC and transient voltage circuit
An adapter system for protection of electronics from voltage spikes induced on connected wires. Said adapter system comprises an enclosure, one or more power line connectors and a suppression elements. Two or more plug sockets comprise at least a first line socket and a neutral socket. Said first line socket connects to a first line. Said neutral socket connects to a neutral. Said adapter system is configured to connect to at least said first line with said one or more power line connectors and suppressing a portion of a power on said first line with said suppression elements. |
| US11114844B2 |
Inrush current limiter circuits and methods of limiting inrush current in a circuit
A DC-DC power converter includes an input, an output, a power circuit coupled between the input and the output to convert a voltage of a DC power received at the input to a different voltage of a DC power supplied at the output, and a control circuit. The DC-DC power converter also includes a resistor coupled in an input current path to receive an inrush current from the input, a switch coupled in parallel with the resistor to selectively bypass the resistor, and a transistor coupled to control the switch in response to a voltage across the resistor. The transistor is coupled to open the switch when the voltage across the resistor is above a specified inrush threshold to permit current flow through the resistor, and to close the switch when the voltage across the resistor is below the specified inrush threshold to bypass the resistor. |
| US11114842B1 |
Dual PWM relay driver with diagnostics for functional safety system
A component includes first and second switches in series and connected between a power source and a coil of contacts of a safety relay. A first controller controls the first switch with a close signal that closes the first switch or a first PWM signal that opens and closes the first switch on each PWM cycle. A second controller controls the second switch with a close signal that closes the second switch or a second PWM signal that opens and closes the second switch on each PWM cycle. A PWM sensing circuit connected to the coil sends a sensed PWM signal to an input of the first and second controllers. The first controller sends the first PWM signal while the second controller sends a close signal and vice-versa. The controllers verify that the received PWM signal matches the sent PWM signal. |
| US11114838B2 |
Ideal diode with active reverse voltage protection
A reverse current inhibitor includes: at least one diode that is bridged by a first variable resistance element; a sensing circuit; a first switching device for switching the first variable resistance element from a first higher resistance to a second lower resistance in response to a forward current that has passed the diode in its forward direction; and a second switching device for switching the first variable resistance element to a higher resistance in response to the sensing circuit detecting a reverse current corresponding to the reverse direction of the diode. The sensing circuit includes a current-voltage converter that includes a sensing resistor and amplifies a voltage drop over the sensing resistor for one sign of the voltage drop only. |
| US11114833B2 |
Wire exterior body and exterior-covered wire harness
A wire exterior body and an exterior-covered wire harness in which damage by an attaching member is prevented are provided. A wire exterior body (3) to be mounted on the outer periphery of an electric wire (wire harness) (2), the wire exterior body being formed of a resin sheet that is bent, includes a plurality of wall parts (4) extending along an extending direction of the electric wire and forming an accommodating part (5) that accommodates the electric wire. Among the plurality of the wall parts (4), at least one wall part (upper lid wall part (45)) has a through-hole (47), penetrating in a thickness direction of the resin sheet, into which an attaching member (61) attachable to a vehicle body is inserted, and a groove (a lower surface groove (48) or an upper surface groove (49)) in which a thickness of the resin sheet is reduced is formed on a part around the through-hole (47) on at least one surface of an upper surface (45c) and a lower surface (45d) facing the thickness direction. |
| US11114829B2 |
Electric connection box
An electric connection box includes a housing, a first lid portion, a groove and a water stop wall. The housing includes an opening. The first lid portion includes a first body wall that closes the opening of the housing, and a first peripheral wall extending from a periphery of the first body wall toward the housing. The groove is provided between the first peripheral wall and a wall portion arranged to be spaced apart from the first peripheral wall. The water stop wall is provided on the first lid portion and configured to cover an opening of two ends of the groove in a longitudinal direction. |
| US11114828B2 |
Electrical receptacle cover
An electrical receptacle cover, comprising a cover base, configured to be affixed to an electrical receptacle assembly. The cover base including a base surface having at least one opening configured to be aligned with an electrical receptacle of the electrical receptacle assembly. The cover base includes a base wall disposed about and extending from a perimeter of the base surface and the base surface and the base wall together define a base cavity. There is a cover lid interconnected with the cover base and it is moveable, via a hinge, from an open position, in which the base cavity is exposed, to a closed position in which the base cover is substantially disposed within the base cavity. |
| US11114825B2 |
Joining method of electric wires
In a joining method of an electric wire, an end of a first conductor is held by a holding surface of a first jig electrode from an outer circumference side and an end of a second conductor is held by a holding surface of a second jig electrode from an outer circumference side to butt and join the ends of the first conductor and the second conductor in the axial direction while heating the ends. Then, a melted material is bulged outward from an outer circumferential surface of a joining portion to a bulge molding portion formed to surround a joining portion of the ends of the first conductor and the second conductor. |
| US11114824B2 |
Prefabricated support for a rack-mountable electrical device and electrical device comprising such a support
A prefabricated support comprises a one-piece body defining a reception housing intended to receive an electrical switching apparatus and also delimiting a passage in which electrical conductors are housed, the body comprising a separating wall, the wall and at least one side of the plate forming a lateral face of the support, the lateral face comprising at least one first fixing member and at least one second fixing member, each second fixing member being of a form complementary to the first fixing member, each first member and each second member being adapted to be engaged with, respectively, another second member and another first member. |
| US11114820B2 |
Push-pull circuit with driving assisted by asymmetric charge sharing
A push-pull circuit for an opto-electronic device includes: an output node; a pull-up circuit that, in operation, controls a falling edge rate of an input signal to the opto-electronic device while sharing charge with the output node; and a pull-down circuit that, in operation, controls a rising edge rate of the input signal to the opto-electronic device while sharing charge with the output node. |
| US11114818B2 |
Photonic chip passed through by a via
A photonic chip includes an optical layer bonded, at a bonding interface, to an interconnection layer, the thickness of the optical layer being smaller than 15 μm, a primary via that extends through the interconnection layer solely between a lower face and the bonding interface, an electrical terminal chosen from the group consisting of an electrical contact embedded in the interior of the optical layer and of an electrical track produced on an upper face, a second via that extends the primary via into the interior of the optical layer in order to electrically connect the primary via to the electrical terminal, this secondary via extending in the interior of the optical layer from the bonding interface to the electrical terminal, the maximum diameter of this secondary via being smaller than 3 μm. |
| US11114817B2 |
Semiconductor laser device
Disclosed herein is a semiconductor laser device utilizing a sub-mount substrate that is capable of having a further sufficient heat dissipation property. The semiconductor laser device comprises: a monocrystalline sub-mount substrate having a crystalline structure including a first crystalline plane (c-plane) having a normal line direction on a first crystalline axis (c-axis) and a second crystalline plane (a-plane) having a normal line direction on a second crystalline axis (a-axis) having a higher thermal conductivity than the first crystalline axis; and a semiconductor laser chip configured to be joined to a side of a first surface of the sub-mount substrate. The first crystalline plane inclines with respect to the first surface of the sub-mount substrate. |
| US11114816B2 |
Diffractive optical element with off-axis incidence in a structured light application
A structured light system may include a semiconductor laser to emit light and a diffractive optical element to diffract the light such that one or more diffracted orders of the light, associated with forming a structured light pattern, are transmitted by the diffractive optical element. The diffractive optical element may be arranged such that the light is to be incident on the diffractive optical element at a substantially non-normal angle of incidence. The substantially non-normal angle of incidence may be designed to cause the diffractive optical element to transmit a zero-order beam of the light outside of a field of view associated with the diffractive optical element. |
| US11114813B2 |
Integrated pumplight homogenizer and signal injector for high-power laser system
A system includes a master oscillator configured to generate a low-power optical beam. The system also includes a planar waveguide (PWG) amplifier having one or more laser diode pump arrays, a planar waveguide, and a light pipe. The one or more laser diode pump arrays are configured to generate pumplight. The planar waveguide is configured to generate a high-power optical beam using the low-power optical beam and the pumplight. The light pipe is configured to substantially homogenize the pumplight and to inject the homogenized pumplight into the planar waveguide. The light pipe is also configured to inject the low-power optical beam into the planar waveguide. |
| US11114812B2 |
Optical tube waveguide lasing medium and related method
Laser waveguides, methods and systems for forming a laser waveguide are provided. The waveguide includes an inner cladding layer surrounding a central axis and a glass core surrounding and located outside of the inner cladding layer. The glass core includes a laser-active material. The waveguide includes an outer cladding layer surrounding and located outside of the glass core. The inner cladding, outer cladding and/or core may surround a hollow central channel or bore and may be annular in shape. |
| US11114810B2 |
Laser device
A laser device includes a first laser medium and a second laser medium that have a first surface and a second surface opposite to the first surface, and receive input of excitation light and seed light from the first surface side to amplify the seed light, a holder that holds the first laser medium and the second laser medium; and a pair of cooling units that cool the first laser medium and the second laser medium according to change in volume of a refrigerant. |
| US11114809B2 |
Fiber optic device operational monitoring
A monitoring device may receive sensor information, associated with an optical device included in a high-power fiber laser, from a set of sensors associated with the optical device. The monitoring device may determine, based on the sensor information, a set of operational properties of the optical device. The set of operational properties may include: a health property that describes a health of one or more components of the optical device, a degradation property that describes degradation of one or more components of the optical device, an environmental property that describes an environment of the optical device, or a process property associated with a process in which the optical device is being used. The monitoring device may identify whether an operational property, of the set of operational properties, satisfies a condition, and may selectively perform a monitoring action based on whether the operational property satisfies the condition. |
| US11114797B2 |
Cage, electrical equipment and partition assembly
A cage includes a housing and a partition assembly mounted in the housing and separating an inner space of the housing into an upper space and a lower space. The partition assembly includes a first support plate and a second support plate arranged horizontally, and at least a pair of support frames disposed between the first support plate and the second support plate to separate the first support plate from the second support plate by a predetermined height. The support frames have a plurality of through holes. The support frames are formed by bending a front end of one of the first support plate and the second support plate. |
| US11114794B2 |
Connector on electric vehicle for charging the electric vehicle
A connector (1) includes a first terminal with a first flange, a second terminal with a second flange, a housing (10) having first and second accommodating portions (14, 16), and a retainer. The first terminal is at a proper position in a front-rear direction in the housing (10) by being in the first accommodating portion (14) with the first flange locked by a first lock in the first accommodating portion (14). The second terminal is at a proper position in a front-rear direction in the housing (10) by being in the second accommodating portion (16) and having the second flange locked by a second lock in the second accommodating portion (16), but is rearward of the proper position in the front-rear direction when the second terminal is in the first accommodating portion (14) and the second flange is locked by the first lock. |
| US11114792B2 |
Contact and connector
A contact includes a pair of side walls, a front end upper wall extending from the side walls, a rear end upper wall extending from the side walls, a lance extending in a rearward direction from a rear end of the front end upper wall, and an extension piece extending in the rearward direction from a rear end portion of the lance. The lance has a catch portion at the rear end portion of the lance. The catch portion is caught in a housing when the contact is inserted into the housing. The extension piece is positioned under the rear end upper wall. |
| US11114791B1 |
Connector
A connector includes a main body, a terminal module, a cable module, a housing and an insulating material. The main body has a first opening and a second opening. The terminal module includes a terminal portion and an insulating portion partially covering the terminal portion. The terminal portion includes plural terminals protruding beyond one side of the insulating portion, a middle portion covered by the insulating portion, and a pin portion exposed from the opposite side of the insulating portion. The cable module has a connecting portion electrically connected to the pin portion. The housing covers the main body and the terminals. The housing has an end portion disposed adjacent to the insulating portion. The end portion is configured with plural third openings. The insulating material which may be poured through the third openings covers the end portion, the connecting portion, the pin portion and the insulating portion, and fills the third openings. |
| US11114788B2 |
PCB direct connector having two-row terminal structure
A PCB direct connector is directly mounted to a circuit board, and the PCB direct connector includes terminal members arranged in two rows to respectively contact upper conductive patterns and lower conductive patterns provided to an upper surface and a lower surface of the circuit board, and a connector housing configured to accommodate the terminal members therein and allow a connector connection portion formed at one side of an end of the circuit board to be fitted into and released from the connector housing. |
| US11114780B2 |
Electronic module with an electrically conductive press-fit terminal having a press-fit section
An electronic assembly includes an electronic module and an electric part. The electronic module includes an electrically conductive press-fit terminal. The electrically conductive press-fit terminal has a press-fit section. The electric part has a contact hole. The press-fit section is inserted in the contact hole and plastically deformed therein, such that the press-fit section both mechanically and electrically contacts the electric part in the plastically deformed state. A corresponding method of assembly is also described. |
| US11114774B2 |
Display device and manufacturing method thereof
A display device includes a display panel. A flexible printed circuit board is electrically connected to the display panel. A first pad is disposed on the display panel. A second pad is disposed on the flexible printed circuit board and overlaps the first pad. A first anisotropic conductive film is disposed between the first pad and the second pad. The first anisotropic conductive film is configured to bond the first pad to the second pad. The first anisotropic conductive film includes a conductive polymer. The first anisotropic conductive film includes at least one first conductive region that electrically connects the first pad and the second pad and at least one first insulating region. |
| US11114773B2 |
Devices, systems, and methods for directional antennas that protect sensitive zones
A set of headphones include a zone that is sensitive to electromagnetic radiation, a first earpiece including a first directional antenna operable at a first frequency and having a first radiation pattern radiating away from the zone, and a second earpiece including a second directional antenna operable at the first frequency and having a second radiation pattern radiating away from the zone. |
| US11114772B2 |
Dual polarized omni-directional antenna and base station including same
The present disclosure includes, in a dual polarized omni-directional antenna and a base station including the same, a plurality of radiating elements disposed to be spaced apart in one direction by the dual polarized omni-directional antenna, and a feed line for providing a feed signal to the plurality of radiating elements, and the plurality of radiating elements include a first radiator for generating one polarization of dual polarization, and a second radiator for generating the other polarization of the dual polarization, respectively, the first radiator is prepared on a first surface, and the second radiator is prepared on a second surface, and a main lobe direction of the first radiator and a main lobe direction of the second radiator are different directions from each other. |
| US11114771B2 |
Antenna device and electronic device including the same
An antenna device for providing a higher data transmission rate in a wireless communication system is provided. The antenna device includes a first radiating body mounted to a side surface of a multiple layer circuit board to transmit and receive a wireless signal and a second radiating body mounted to a top surface of the multiple layer circuit board and electrically connected to the first radiating body to transmit and receive the wireless signal together with the first radiating body. |
| US11114765B2 |
Dipole antenna structure
The present invention provides a dipole antenna structure including a planar antenna element and a reflection plate which is directly under the planar antenna element. The planar antenna element includes a main radiator and secondary radiators. The main radiator is a rectangular metal sheet in which a rectangular opening and two convex portions are provided. A gap is provided between the two convex portions which bisect the rectangular opening into two rectangular portions of equal size, and the gap connects the two rectangular portions. The secondary radiators are arranged on the short sides of the planar antenna element. The antenna is simple in structure, convenient to produce and install, high in signal reception quality, wide in signal coverage, and can enhance signal reception in the UHF band to improve stability of the signal reception. |
| US11114763B2 |
High gain and large bandwidth antenna incorporating a built-in differential feeding scheme
An antenna and a base station including the antenna. The antenna includes a sub-array that includes first and second unit cells and a feed network. The first and second unit cells comprise first and second patches, respectively, having quadrilateral shapes. The feed network comprises a first transmission line terminating below first corners of the first and second patches, respectively; a second transmission line terminating below third corners of the first and second patches, respectively; a third transmission line terminating below a second corner of the first patch and a fourth corner of the second patch; and a fourth transmission line terminating below a fourth corner of the first patch and a second corner of the second patch. The first corners are opposite the third corners on the respective first and second patches and the second corners are opposite the fourth corners on the respective first and second patches. |
| US11114751B2 |
Small cell installation structure
In aspects of a small cell installation structure, a carbon fiber skeleton provides stability and an attachable framework to mount wireless technology equipment. A formable foam material, such as a polyurethane material, is configured as a formable aesthetic housing around the carbon fiber skeleton, and a hardened polymer coating over the formable foam material is adapted to a shape of the formable aesthetic housing. The hardened polymer coating resists environmental conditions that may otherwise hamper performance of the wireless technology equipment. Additionally, an antenna housing module encloses antennas of the wireless technology equipment, is integrated with the carbon fiber skeleton, and is designed to pass millimeter wave (mmW) spectrum wireless signals. |
| US11114750B1 |
Satellite antenna having fiducial devices for compensating physical distortion and associated methods
A satellite antenna includes first and second extensible booms and first and second sets of ribs carried by the respective first and second extensible booms. A Radio Frequency (RF) reflective film is carried by the first and second sets of ribs. First and second phased array antenna feeds are carried by the respective first and second extensible booms and directed toward the RF reflective film. First and second sets of fiducial devices are carried by the respective first and second sets of ribs. At least one camera is directed toward the first and second sets of fiducial devices to sense a physical distortion of the RF reflective film. A controller cooperates with the at least one camera to operate the first and second sets of phased array antenna feeds to account for sensed physical distortion of the RF reflective film. |
| US11114749B2 |
Communication apparatus and method, antenna apparatus, and communication system
A communication apparatus and method, an antenna apparatus, and a communication system that prevent reduced communication characteristics are disclosed. In one example, a coupled antenna element positioned in the vicinity of a communication apparatus is detected, adaptation of impedance is controlled on the basis of the detection result, and wireless communication is performed via the coupled antenna element with the adapted impedance. In addition, an antenna element is excited by a wireless signal from a communication apparatus positioned in the vicinity of the antenna element, and this communication apparatus is notified of being positioned in the vicinity of this antenna element. |
| US11114745B2 |
Antenna package for signal transmission
This application relates to a device for signal transmission (e.g., radio frequency transmission) and a method for forming the device. For example, the method includes: depositing an insulating layer that includes polybenzobisoxazole (PBO) on a carrier; forming a backside layer including polyimide (PI) over the adhesive layer; forming a die-attach film (DAF) over the backside layer; forming one or more through-insulator via (TIV)-wall structures and one or more TIV-grating structures on the second backside layer, placing a die, such as a radio frequency (RF) integrated circuit (IC) die, on the DAF; encapsulating the die, the one or more TIV-wall structures, and the one or more TIV-grating structures, with a molding compound to form an antenna package including one or more antenna regions; and forming a redistribution layer (RDL) structure on the encapsulated package. The RDL structure can include one or more antenna structures coupled to the die. Each of the one or more antenna structures can be positioned over the one or more antenna regions. |
| US11114738B2 |
Tunable resonant circuit comprising a RF resonator geometry disposed on an active material layer such that resonance changes when photon energy is applied
Embodiments of the invention provide a resonant circuit including an active material substrate excitable by photon energy. A busline having a single input and a single output is located on the active material substrate. A RF resonator geometry is located on the active material substrate in electrical communication with the busline. Application of photon energy to the active material substrate changes the resonance of the RF resonator geometry at room temperatures. Alternately, a resonant circuit is provided that include a passive material substrate. An active material thin film is located on the passive material substrate. A busline having a single input and a single output and a RF resonator geometry located on the active material thin film. The RF resonator geometry is in electrical communication with the busline. Application of photon energy to the active material thin film changes the resonance of the RF resonator geometry at room temperatures. |
| US11114732B2 |
Waveguide non-reflective terminator and waveguide circuit
A waveguide unit (2) is closed at one end thereof by a short circuit plane (2a) provided with through holes (3-1 to 3-6). Radio wave absorbers (4-1 to 4-6) absorb a frequency signal being a non-reflective target in the state of being inserted through the through holes (3-1 to 3-6) toward the inside of the waveguide unit (2) and contacting inner surfaces (3′-1 to 3′-6) of the through holes (3-1 to 3-6). |
| US11114728B2 |
Heat applied electrochemical cell separator
A separator for a bobbin-style electrochemical cell is inserted into an interior opening within a ring-shaped cathode in an electrochemical cell can. An expansion force is then applied to an interior surface of the separator to press the separator against the interior walls of the cathode. A tool may then remove various creases and/or wrinkles in the separator and/or may then heat seal at least a portion of the tubular walls of the separator to minimize the void space between the separator and active material (e.g., cathode and/or anode) within the electrochemical cell. |
| US11114727B2 |
Power storage device
A power storage device includes a case, an electrode body, and an electrolyte. The electrode body is located in the case and has a positive electrode, a negative electrode, and a separator located between the positive and negative electrodes. The electrolytefills the case 2. A principal surface of the electrode body is connected to an inner surface of the case. |
| US11114723B2 |
Battery array mounting and supporting brackets
This disclosure details exemplary battery pack designs for use in electrified vehicles. Exemplary battery packs include an enclosure assembly that houses one or more battery internal components. One or more brackets may be used to mount each of the battery internal components within the enclosure assembly. Each bracket may include at least one attachment point for securing the bracket to the enclosure assembly and at least two attachment points for securing the bracket to a support structure of the battery internal component. Fasteners may be received through the brackets and then into either the enclosure assembly or the support structure in order to mount the battery internal component inside the battery packs. |
| US11114722B2 |
Vehicle battery module
A vehicle includes members spaced from each other and elongated along a vehicle-longitudinal axis. A battery module includes end plates spaced from each other along the vehicle-longitudinal axis. Battery cells are sandwiched between the end plates and a connector extends from one end plate to the other end plate. The end plates extend from one of the members to the other of the members. |
| US11114719B2 |
Electric cell potting compound and method of making
A battery module comprising an electric cell and a potting compound associated with the electric cell. The potting compound is formed of a flame retardant component; a first component having an isocyanate reactive compound and water; and a second component having an isocyanate compound. The potting compound is a foam. |
| US11114715B2 |
Enclosure assemblies with improved electromagnetic compatibility
This disclosure details exemplary electrical module designs for use in electrified vehicles. An exemplary electrical module (e.g., a battery pack, control module, etc.) may include a component (e.g., battery array, bussed electrical center, battery electric control module, etc.) and an enclosure assembly that houses the component. The enclosure assembly may include a polymer-based substrate and a metallic foil that is adapted to improve an electromagnetic compatibility of the polymer-based substrate. A compression limiter may be positioned within the enclosure assembly and is adapted to establish a conductive path between the metallic foil and a separate metallic component (e.g., a fastener) of the electrical module. |
| US11114714B2 |
Miniature electrochemical cell having a casing of a metal container closed with a ceramic plate having two via holes supporting opposite polarity platinum-containing conductive pathways
A miniature electrochemical cell having a volume of less than 0.5 cc includes a casing having a header assembly comprising a ceramic plate formed by co-firing a metallic-containing paste in first and second via holes extending through a green-state ceramic. The ceramic plate is joined to a metal ring by a gold-braze to form the header assembly that is secured to an open-ended metal container by a weld to provide the casing. The fill material resulting from sintering the metallic-containing paste provides a first conductive pathway to the anode current collector contacting an anode active material and a second conductive pathway to a cathode current collector contacting a cathode active material. A solid electrolyte activates the anode and cathode while also serving as a separator. Outer surfaces of the first and second conductive pathways are configured for electrical connection to a load. |
| US11114713B2 |
Thermal management systems for battery cells and methods of their manufacture
Thermal management systems for battery cells and methods for their additive manufacture are provided. The thermal management systems include at least one heat pipe that physically contacts the battery cell and conforms to its geometry. Each battery cell is deposited within a separate heat pipe, and each heat pipe is disposed on a base plate, which itself connects to a heat sink. In many embodiments, the heat pipe is a two-phase heat exchanger having three major components: liquid channels, wick elements, and vapor channels. In such embodiments, the wick component comprises a porous body configured to be disposed between the liquid channels and vapor channels. The wick component may be made using a stochastic additive manufacturing process such that the wick component may take any configuration and/or such that the wick component may be directly integrated into the body of the heat pipe as a unitary piece thereof. In other embodiments, the heat pipe is a cavity with flow channels in which fluid can be pumped through. In some such embodiments, the fluid can occupy the heat pipe in a one-phase or two-phase state. This unitary heat pipe is part of a monolithic thermal management system. |
| US11114712B2 |
Battery module having improved cooling structure
A battery module having an improved cooling structure according to an embodiment of the present disclosure comprises: a pouch cell laminate comprising a first pouch cell and a second pouch cell located adjacent to the first pouch cell; and cooling fins configured to surround the circumference of an accommodation portion of each of the first pouch cell and the second pouch cell. |
| US11114710B2 |
Battery module, battery pack including battery module, and vehicle including battery pack
A battery module includes: a plurality of battery cells; a top plate configured to cover an upper side of the battery cells; a bottom plate configured to cover a lower side of the battery cells; a pair of side plates configured to cover both side surfaces of the battery cells; a bus bar unit configured to cover a front side and a rear side of the battery cells, the bus bar being electrically connected to the battery cells; and a pair of heatsinks each having a coolant injection portion and a coolant discharge portion protruding out of the battery module. The pair of heat sinks are provided at the upper side and the lower side of the battery cells, respectively. |
| US11114708B2 |
Battery pack temperature control method and device
A method and apparatus for controlling a temperature of a battery pack, in which, when the battery pack is in an extremely low temperature state during charging/discharging, a PWM signal having a duty ratio value that increases as the temperature increases is outputted to intermittently drive a heat generating unit so that the battery pack stably increases in temperature. |
| US11114703B2 |
Battery pack
A battery pack according to various embodiments is provided. The battery pack includes: a battery including a plurality of battery cells; a first pack terminal and a second pack terminal, each connected to a charger; a cut-off switch arranged on a path through which charge and discharge currents of the battery flow; and a battery manager which monitors a state of the battery, turns off the cut-off switch when there is a risk of the battery being damaged, and determines whether the charger is a dedicated charger, wherein, when the charger is different from the dedicated charger, the battery manager turns off the cut-off switch when a pack voltage that is a voltage between the first pack terminal and the second pack terminal reaches a first reference voltage. |
| US11114701B2 |
Method of producing an electrode-separator winding, electrode-separator winding and button cell with such a winding
A method of producing an electrode-separator winding includes feeding a first current collector, feeding a second current collector, feeding two separators in strip form to a winding device, and winding the first and second current collectors and the separators to form a winding with a sequence, wherein a contact strip is welded on at least one of the contact sections of the current collectors, or at least one of the contact sections is folded over to form a contact strip, and at least one of the separators is reinforced in at least one risk region in which the at least one separator within the completed electrode-separator winding lies against the at least one contact section in which the contact strip is welded on or against the at least one contact section folded over to form a contact strip. |
| US11114697B2 |
Configurations for battery cell packaging
Batteries according to embodiments of the present technology may include a battery cell having a longitudinal body section and a lateral body section extending from and normal to the longitudinal body section. An intersection of the longitudinal body section and the lateral body section may define an interior corner. The battery may also include a pouch extending about the battery cell. The pouch may define a seal where a first section of the pouch is sealed to a second section of the pouch externally to the battery cell about a plurality of sides of the battery cell including at the interior corner. The seal may be folded against the pouch and coupled with the pouch along multiple sides of the battery cell. |
| US11114694B2 |
Lithium battery
A lithium battery includes a cathode including a cathode active material, an anode including an anode active material, and an organic electrolytic solution between the cathode and the anode. The organic electrolytic solution includes a first lithium salt, an organic solvent, an oligomer compound, and a bicyclic sulfate-based compound represented by Formula 1 below: wherein, in Formula 1, each of A1, A2, A3, and A4 is independently a covalent bond, a substituted or unsubstituted C1-C5 alkylene group, a carbonyl group, or a sulfinyl group, in which both A1 and A2 are not a covalent bond and both A3 and A4 are not a covalent bond. |
| US11114692B2 |
Polymer electrolyte for secondary battery and lithium secondary battery comprising the same
The present invention relates to a polymer electrolyte for a secondary battery and a lithium secondary battery comprising the same, and particularly, to a polymer electrolyte for a secondary battery, in which mechanical properties, ionic conductivity, and electrical conductivity are improved by comprising a polymer and an electron-acceptor having at least one double bond, as a dopant, and a lithium secondary battery in which electrochemical stability at high temperature and high voltage is enhanced by comprising the polymer electrolyte. |
| US11114690B2 |
Method of manufacturing solid electrolyte for all-solid cells, solid electrolyte manufactured using the method, and all-solid cell including the solid electrolyte
Disclosed are a method of manufacturing a solid electrolyte, a solid electrolyte manufactured using the method, and an all-solid cell including the solid electrolyte. The method includes preparing an electrolyte admixture including a solid electrolyte precursor and a solvent, drying the electrolyte admixture and removing the solvent from the electrolyte admixture to form a dry electrolyte mixture, and heat-treating the dry electrolyte mixture to form a crystallized solid electrolyte. |
| US11114689B2 |
Solid electrolyte composition, solid electrolyte-containing sheet, all-solid state secondary battery, and methods for manufacturing solid electrolyte-containing sheet and all-solid state secondary battery
Provided are a solid electrolyte composition containing a sulfide-based inorganic solid electrolyte, an active material having a surface coated with an oxide having an ion conductivity, and a dispersion medium, in which the dispersion medium includes a specific polar dispersion medium, a solid electrolyte-containing sheet having a layer containing a sulfide-based inorganic solid electrolyte, an active material having a surface coated with an oxide having an ion conductivity, and a specific polar dispersion medium, an all-solid state secondary battery, and methods for manufacturing a solid electrolyte-containing sheet and an all-solid state secondary battery. |
| US11114686B2 |
Secondary battery including electrode lead exposed within the sealing part and method for manufacturing the same
Disclosed are a secondary battery and a method for manufacturing the same. According to the present invention, since an external protrusion protruding from the outside of an exterior constituting a body of the secondary battery as a component through which a secondary battery according to a related art is electrically connected to external electric equipment is removed, the secondary battery may be reduced in volume under the same capacity. |
| US11114685B2 |
Bonding dies for fuel cell
Bonding dies for producing a fuel cell that can suppress floating of a portion of a resin frame bonded to a membrane electrode assembly include first and second dies facing and contacting respective first and second separators. The first die includes a central receiving portion and an outer periphery receiving portion. The second die includes an inner die that pressurizes a central region of the second separator, and an outer die formed to surround the inner die to thermally compress a peripheral region of the second separator. The inner die extends from a portion corresponding to the central region along an open edge in the resin frame, up to a region closer to an outer periphery side of the electrode assembly than a portion of the resin frame bonded to the membrane electrode assembly, so as to pressurize the resin frame via the other separator. |
| US11114683B2 |
Fuel cell system and method of controlling fuel cell system
An FC (fuel cell) system includes: a compressor supplying air to a CE (cathode electrode) of FC; an OV (outlet valve) connected to a discharge port through which air is discharged from CE; an injector supplying hydrogen gas to an AE (anode electrode) of FC; a CP (circulation pump) provided in a circulation path that returns the hydrogen gas discharged from AE to AE; and a controller controlling power generation of FC. In a case of removing a component that allows air to enter CE when removed, before the component is removed, the controller executes a first step of opening OV, driving the compressor, and supplying air to CE, and a second step of driving CP to cause hydrogen gas that remains inside AE and the circulation path to be circulated in a state in which the hydrogen gas is not supplied to AE from the injector. |
| US11114680B2 |
Redox flow battery system
A reservoir for a redox flow battery comprising: at least one inner tank for electrolyte, the or each inner tank having at least one inner tank wall, an outer, bund tank around the or each inner tank, air circulation gaps or passages between the inner and outer walls or the inner and outer tanks and means for passing cooling air to the air circulation gaps or passages for cooling the electrolyte in or each inner tank. |
| US11114672B2 |
Carbon catalyst, battery electrode, and battery
A carbon catalyst, a battery electrode, and a battery, each exhibits excellent catalytic performance. A carbon catalyst contains two kinds of transition metals and has such a carbon structure that an interplanar spacing d002, which is determined from a Bragg angle of one of three diffraction peaks fbroad, fmiddle, and fnarrow obtained by separating a diffraction peak around a diffraction angle (2θ) of 26° in an X-ray diffraction pattern of powder X-ray diffraction with a CuKα ray, the one diffraction peak being the diffraction peak fbroad, is 0.374 nm or more. |
| US11114670B2 |
Negative electrode and method for preparing negative electrode
A negative electrode according to one embodiment of the present invention comprises a current collector and a negative electrode active material layer disposed on the current collector, wherein the negative electrode active material layer includes a first particle and a second particle, the first particle includes a first core including artificial graphite; and a first shell disposed on the first core, said first shell including an oxide of the artificial graphite, wherein a sphericity of the first particle measured through a particle shape analyzer is from 0.94 to 0.98, the second particle is artificial graphite having sphericity measured through the particle shape analyzer of 0.70 to 0.92, and a weight ratio of the first particle and the second particle is from 1:1 to 1:9. |
| US11114662B2 |
Precursor and method for preparing Ni based cathode material for rechargeable lithium ion batteries
A crystalline precursor compound for manufacturing a lithium transition metal based oxide powder usable as an active positive electrode material in lithium-ion batteries, the precursor having a general formula Li1−a((Niz(Ni1/2 Mn1/2)yCox)1−k Ak)1+aO2, wherein x+y+z=1, 0.1≤x≤0.4, 0.25≤z≤0.52, A is a dopant, 0≤k≤0.1, and 0.03≤a≤0.35, wherein the precursor has a crystalline size L expressed in nm, with 15≤L≤36. Also a method is described for manufacturing a positive electrode material having a general formula Li1+a′M′1−a−O2, with M′=(Niz(Ni1/2 Mn1/2)yCOx)1−k Ak, wherein x+y+z=1.0.1≤x≤0.4, 0.25≤z≤0.52, A is a dopant, 0≤k≤0.1, and 0.01≤a′≤0.10, by sintering the lithium deficient precursor powder mixed with either one of LiOH, LiOH.H2O, in an oxidizing atmosphere at a temperature between 800 and 1000° C., for a time between 6 and 36 hrs. |
| US11114660B1 |
Silicon anodes with water-soluble maleic anhydride-, and/or maleic acid-containing polymers/copolymers, derivatives, and/or combinations (with or without additives) as binders
Systems and methods for batteries comprising a cathode, an electrolyte, and an anode, wherein the anode is a Si-dominant anode that utilizes water-soluble maleic anhydride- and/or maleic acid-containing polymers/co-polymers, derivatives, and/or combinations (with or without additives) as binders. |
| US11114659B2 |
Negative electrode sheet and secondary battery
The present application provides a negative electrode sheet and a secondary battery. The negative electrode sheet includes a negative current collector and a negative electrode film provided on at least one surface of the negative current collector and comprising a negative active substance. The negative electrode sheet also satisfies: 0.3≤a×(1.1/b+0.02×c)≤6.0, where a represents the specific surface area of the negative electrode film, and the unit is m2/g; b represents the compaction density of the negative electrode film, and the unit is g/cm3; c represents the cohesive force between the negative electrode film and the negative current collector, and the unit is N/m. The present application can make the negative electrode sheet have excellent dynamics performance, and meanwhile ensure that the secondary battery has good dynamics performance and cycle performance without sacrificing energy density. |
| US11114655B2 |
Alkaline battery cathode with solid polymer electrolyte
An alkaline battery, and a component cathode including a solid ionically conducting polymer material. |
| US11114652B2 |
Method for manufacturing secondary battery electrode, and secondary battery electrode manufactured thereby
The present invention discloses a method of manufacturing an electrode for a secondary battery by using a single process to notch and cut a unit electrode from an electrode sheet. The method for manufacturing electrodes for a secondary battery includes supplying an electrode sheet in a moving direction (MD), wherein the electrode sheet has a plurality of coated portions and uncoated portions alternately arranged along the MD, wherein each coated portion has an electrode active material, and each uncoated portion does not have an electrode active material; and cutting the uncoated portions to form the plurality of unit electrodes. |
| US11114651B2 |
Apparatus and method for manufacturing curved display panel
An apparatus and a method for manufacturing a curved display panel are provided. The apparatus includes a carrying machine, a flexible bag, a supporting machine, and an infusion equipment. The carrying machine is used to carry a curved cover. The flexible bag is used to fasten a flexible display device. The supporting machine is used to fasten the flexible bag. The infusion equipment is used to infuse a liquid substance into the flexible bag so that the flexible display device is attached the curved cover. The disclosure can avoid gaps presented between the flexible display device and the curved cover. |
| US11114650B2 |
Method and apparatus for producing flexible OLED device including lift-off light irradiation
According to a flexible OLED device production method of the present disclosure, after an intermediate region (30i) and flexible substrate regions (30d) of a plastic film (30) of a multilayer stack (100) are divided from one another, the interface between the flexible substrate regions (30d) and a glass base (10) is irradiated with laser light. The multilayer stack (100) is separated into a first portion (110) and a second portion (120) while the multilayer stack (100) is in contact with a stage (212). The first portion (110) includes a plurality of OLED devices (1000) which are in contact with the stage (212). The OLED devices (1000) include a plurality of functional layer regions (20) and the flexible substrate regions (30d). The second portion (120) includes the glass base (10) and the intermediate region (30i). |
| US11114647B2 |
Pixel element, method for fabricating the same, display control method, and display panel
Disclosed are a pixel element, a method for fabricating same, a display control method, a display panel. The pixel element includes a base substrate, display and non-display areas on the base substrate, a control electrode, an adjustment layer, a transparent electrode in the non-display area, the transparent electrode and the adjustment layer are arranged in a stack, the control electrode is at the interface between display and non-display areas, and surrounds the adjustment layer, and there is a gap area between the control electrode and the adjustment layer; and the adjustment layer includes charged particles configured to move to the control electrode and the transparent electrode under control of first and second electric fields, the first and second electric fields are created after signals are applied to the control electrode and the transparent electrode, and direction of the first electric field is opposite to direction of the second electric field. |
| US11114646B2 |
Organic light emitting display panel and display device
An organic light emitting display panel and a display device are provided. The organic light emitting display panel includes a substrate, a plurality of organic light emitting diode elements in an array on one side of the substrate, a phase compensation film on a side of the organic light emitting diode elements away from the substrate, and a circular polarizer on a side of the phase compensation film away from the organic light emitting diode elements, wherein the phase compensation film compensates for phase retardation amounts of the circular polarizer at all viewing angles, so that a phase retardation amount of light obliquely passing through the circular polarizer and the phase compensation film is substantially consistent with that of light perpendicularly passing through the circular polarizer and the phase compensation film. |
| US11114634B2 |
Photodiode
A photodiode according to example embodiments includes an anode, a cathode, and an intrinsic layer between the anode and the cathode. The intrinsic layer includes a P-type semiconductor and an N-type semiconductor, and composition ratios of the P-type semiconductor and the N-type semiconductor vary within the intrinsic layer depending on a distance of the intrinsic layer from one of the anode and the cathode. |
| US11114632B2 |
Display panels and methods for manufacturing the same
The present disclosure relates to display panels and manufacturing methods thereof. The display panel includes a flexible screen including a display area and a non-display area. The non-display area includes a bending area and an extending area, two ends of the bending area are respectively connected to the display area and the extending area. The extending area and the display area are not coplanar. The display panel further includes an attaching layer having at least one flexible film layer formed on the display area of the flexible screen. The attaching layer extends beyond the display area and covers and supports the bending area and/or the extending area. |
| US11114631B2 |
Flexible display substrate, manufacturing method thereof, and flexible display device
Embodiments of the present disclosure provide a flexible display substrate, a manufacturing method thereof and a flexible display device. The manufacturing method includes: forming a plurality of protrusions on a base substrate; forming a base film at one side of the plurality of protrusions facing away from the base substrate; forming a display structure at a surface of the base film facing away from the base substrate; peeling off the base film along with the display structure from the base substrate, and remaining the plurality of protrusions on the base substrate; and attaching the surface of the base film facing away from the display structure onto an elastic substrate and stretching the elastic substrate so that the base film is fractured at positions of the plurality of concaves. |
| US11114627B2 |
Manufacturing method for flexible display panel and flexible display panel comprising concave tapered organic layer
The invention provides a manufacturing method for flexible display panel, comprising providing an array substrate, the array substrate comprising a semiconductor layer, dividing the flexible display panel into a pixel area and a bending area, adjacent to each other, the pixel area comprising the semiconductor layer; disposing a second groove in the bending area, and the second groove forming a step structure in the array substrate, the step structure extending from inside of the array substrate towards direction opposite to inner wall of the second groove; filling the second groove with an organic material, and the organic material filling the second groove forming a concave tapered groove with flat surface of the array substrate; fabricating a source, a drain, and source/drain wiring on the array substrate, the source and the drain being connected to the semiconductor layer, the source/drain wiring covering the tapered groove. |
| US11114625B2 |
Organic light-emitting device
An organic light-emitting device includes a first electrode; a second electrode; an organic layer between the first electrode and the second electrode, the organic layer including an emission layer, and an electron transport region between the emission layer and the second electrode. The emission layer includes a first compound represented by Formula 1 and a second compound represented by any one of Formulae 2-1 to 2-5. The electron transport region includes a third compound represented by Formula 7. The organic light-emitting device may have low driving voltage, high efficiency, and a long lifespan. |
| US11114622B2 |
Compound and organic light-emitting device including the same
An organic light-emitting device includes: a first electrode; a second electrode facing the first electrode; and an organic layer between the first electrode and the second electrode, the organic layer including an emission layer, wherein the organic layer includes a compound of Formula 1: According to one or more embodiments of the present disclosure, due to the inclusion of the compound of Formula 1, characteristics of an organic light-emitting device may be improved. |
| US11114618B2 |
Organic layer and method of manufacturing the same, directional heat source assembly, and display panel
In one embodiment, there is provided a method of manufacturing an organic layer. The method includes: forming an organic material solution layer on a substrate; and heating, by a directional heat source assembly, at least a first portion of organic material solution of the organic material solution layer that is inside a to-be-treated area of the substrate, to increase an evaporation rate of the first portion of the organic material solution, whereby, reducing a thickness difference, due to different evaporation rates of the first portion of the organic material solution and a second portion of the organic material solution of the organic material solution layer that is outside the to-be-treated area of the substrate, of the organic layer that is cured from the organic material solution layer. |
| US11114616B2 |
Ti-based amorphous alloy and phase change memory device applying the same
Provided are a titanium-based amorphous alloy and a phase-change memory device in which the titanium-based amorphous alloy is applied to a phase-change layer. The titanium-based amorphous alloy may include titanium, antimony, and at least one metallic component. The titanium-based amorphous alloy may be configured as a phase-change material having a reversible phase change between a titanium-based amorphous alloy phase and at least one crystalline phase. |
| US11114612B2 |
Magnetoresistive random access memory and method for fabricating the same
A method for fabricating semiconductor device includes the steps of first forming a magnetic tunneling junction (MTJ) stack on a substrate, in which the MTJ stack includes a pinned layer on the substrate, a barrier layer on the pinned layer, and a free layer on the barrier layer. Next, part of the MTJ stack is removed, a first cap layer is formed on a sidewall of the MTJ stack, and the first cap layer and the MTJ stack are removed to form a first MTJ and a second MTJ. |
| US11114610B2 |
Semiconductor structure, electrode structure and method of forming the same
A semiconductor structure includes an Nth metal layer, a diffusion barrier layer over the Nth metal layer, a first deposition of bottom electrode material over the diffusion barrier layer, a second deposition of bottom electrode material over the first deposition of bottom electrode material, a magnetic tunneling junction (MTJ) layer over the second deposition of bottom electrode material, a top electrode over the MTJ layer; and an (N+1)th metal layer over the top electrode; wherein the diffusion barrier layer and the first deposition of bottom electrode material are laterally in contact with a dielectric layer, the first deposition of bottom electrode material spacing the diffusion barrier layer and the second deposition of bottom electrode material apart, and N is an integer greater than or equal to 1. An associated electrode structure and method are also disclosed. |
| US11114606B2 |
MRAM devices containing a harden gap fill dielectric material
A harden gap fill dielectric material that has improved chemical and physical properties is formed laterally adjacent to a multilayered magnetic tunnel junction (MTJ) pillar and a top electrode structure of a memory structure. The harden gap fill dielectric material can be formed by introducing, via ion implantation, a bond breaking additive into an as deposited gap fill dielectric material layer and thereafter curing the gap fill dielectric material layer containing the bond breaking additive. The curing includes UV curing alone, or UV curing in combination with laser annealing. The curing employed in the present application does not negatively impact the MTJ pillar or top electrode structure. |
| US11114604B2 |
Method of manufacturing MEMS device and MEMS device
Provided is a method of manufacturing a MEMS device including forming, in a metal layer, an opening that enables a first space and a second space to communicate with each other by exposing the metal layer to an etching solution in a state where the metal layer is left at a boundary between the first space and the second space, and covering an inner surface of an opening of each of an adhesive layer and the metal layer by forming a protective layer from an inner surface of the first space to an inner surface of the second space after the opening of the metal layer is formed. |
| US11114602B2 |
Method of forming superconducting layers and traces
Methods and structures corresponding to superconducting apparatus including superconducting layers and traces are provided. A method for forming a superconducting apparatus includes forming a first dielectric layer on a substrate by depositing a first dielectric material on the substrate and curing the first dielectric material at a first temperature. The method further includes forming a first superconducting layer comprising a first set of patterned superconducting traces on the first dielectric layer. The method further includes forming a second dielectric layer on the first superconducting layer by depositing a second dielectric material on the first superconducting layer and curing the second dielectric material at a second temperature, where the second temperature is lower than the first temperature. The method further includes forming a second superconducting layer comprising a second set of patterned superconducting traces on the second dielectric layer. |
| US11114600B2 |
Polycrystalline magnesium silicide and use thereof
Polycrystalline magnesium silicide containing only carbon as a dopant and having carbon distributed at the crystal grain boundaries and within the crystal grains, a thermoelectric conversion material obtained using the polycrystalline magnesium silicide, a sintered compact, a thermoelectric conversion element, and a thermoelectric conversion module, and methods for producing polycrystalline magnesium silicide and a sintered compact. |
| US11114599B2 |
Electronic devices including solid semiconductor dies
Electronic devices including a layer of polymeric material and solid semiconductor dies partially embedded in the layer are provided. The dies have first ends projecting away from the first major surface of the layer. The electronic devices can be formed by sinking the first ends of the dies into a major surface of a liner. A flowable polymeric material is filled into the space between the dies and solidified to form the layer of polymeric material. The first ends of the dies are exposed by delaminating the liner from the first ends of the dies. Electrical conductors are provided on the layer to connect the first ends of the dies. |
| US11114598B2 |
Lamp using semiconductor light-emitting elements
Discussed is a lamp or a lighting device including a wiring substrate; a bus electrode provided on the wiring substrate; a plurality of electrode lines provided on the wiring substrate, and extending from the bus electrode, each electrode line having one end and a central portion located between the one end and the bus electrode; a plurality of semiconductor light-emitting elements aligned along an extending direction of the plurality of electrode lines, and disposed to be spaced apart from adjacent electrode lines of the plurality of electrode lines by varying distances, respectively; and a plurality of transparent electrodes that respectively provide an electrical connection between the plurality of electrode lines and the plurality of semiconductor light-emitting elements, wherein the respective varying distances between the plurality of semiconductor light-emitting elements and each of the adjacent electrode lines decrease toward the central portion of the each electrode line. |
| US11114593B2 |
Optoelectronic modules and optoelectronic molding tools and processes for manufacturing the same
This disclosure describes optoelectronic modules, methods for manufacturing pluralities of discrete optoelectronic modules, and optoelectronic molding tools. The methods include coating a substrate wafer and a plurality of optoelectronic components with a photosensitive material, and further include exposing select portions of the photosensitive material to electromagnetic radiation. The exposed portions delineate at least in part the dimensions of the optical channels, wherein the optical channels are associated with at least one optoelectronic component. In some instances, optical elements are incorporated into the optical channels. In some instances, the exposed portions are the optical channels. In some instances, the exposed portions are spacers between the optical channels. |
| US11114588B2 |
Semiconductor light emitting element
A semiconductor light emitting element according to the present invention is obtained by forming a first semiconductor layer, an active layer, and a second semiconductor layer on a substrate. The semiconductor light emitting element includes a first insulating layer, a first electrode, and a second electrode. The first insulating layer is formed in a position closer to the substrate than the first semiconductor layer in a first direction orthogonal to a surface of the substrate and is formed so as to protrude outward from a first surface being a surface on a side of the substrate of the first semiconductor layer as seen in the first direction. A first region where the first surface and the first insulating layer face each other and a second region where the first surface and the first electrode face each other are spaced apart in a direction parallel to the surface of the substrate. |
| US11114587B1 |
Streamlined GaN-based fabrication of light emitting diode structures
Light Emitting Diodes (LEDs) made with GaN and related materials are used to realize high efficiency devices which emit visible radiation. These GaN-based LEDs consists of a multi-layer structure which include p-type electron confinement layers, and p-type current spreading and ohmic contacts layers located above the active region. The alignment of the etched features which penetrate near or through the active region and the ohmic contact is critical and is currently a technological challenge in the fabrication process. Any errors in this alignment and successive layers will short across the active layers of the device and result in reduced yield of functional devices. The invention described herein provides a method and apparatus to realize the successful alignment and streamlined fabrication of high-density LED array devices. The result is a higher pixel density GaN-based LED device with higher current handling capability resulting in a brighter device of the same area. |
| US11114585B2 |
Advanced electronic device structures using semiconductor structures and superlattices
Semiconductor structures and methods for forming those semiconductor structures are disclosed. For example, a semiconductor structure with a p-type superlattice region, an i-type superlattice region, and an n-type superlattice region is disclosed. The semiconductor structure can have a polar crystal structure with a growth axis that is substantially parallel to a spontaneous polarization axis of the polar crystal structure. In some cases, there are no abrupt changes in polarisation at interfaces between each region. At least one of the p-type superlattice region, the i-type superlattice region and the n-type superlattice region can comprise a plurality of unit cells exhibiting a monotonic change in composition from a wider band gap (WBG) material to a narrower band gap (NBG) material or from a NBG material to a WBG material along the growth axis to induce p-type or n-type conductivity. |
| US11114584B2 |
Optoelectronic component
An optoelectronic component includes an active layer having a multiple quantum well structure, wherein the multiple quantum well structure includes quantum well layers, including Alx1Iny1Ga1-x1-y1N with 0≤x1<0.03, 0≤y1≤0.1 and x1+y1≤1, and barrier layers including Alx2Iny2Ga1-x2-y2N with 0≤x2≤1, 0≤y2≤0.02 and x2+y2≤1, wherein the barrier layers have a spatially varying aluminium content x2, a maximum value of the aluminium content in the barrier layers is x2,max≥0.05, and a minimum value of the aluminium content in the barrier layers is x2,min<0.05. |
| US11114582B2 |
Display apparatus with increased self-alignment efficiency
A display apparatus includes a substrate, a first electrode on the substrate, the first electrode including a first portion that has a flat upper surface and a second portion that protrudes from the first portion and has an inclined surface, a second electrode facing the first electrode in parallel on the substrate, the second electrode including a first portion that has a flat upper surface and a second portion that protrudes from the first portion and has an inclined surface, and a plurality of light-emitting devices separate from each other on the first electrode and the second electrode, the light-emitting devices each having a first end contacting the upper surface of the first portion of the first electrode and a second end contacting the upper surface of the first portion of the second electrode. |
| US11114580B2 |
Photovoltaic devices and method of making
Embodiments of a photovoltaic device are provided herein. The photovoltaic device can include a layer stack and an absorber layer disposed on the layer stack. The absorber layer can include a first region and a second region. Each of the first region of the absorber layer and the second region of the absorber layer can include a compound comprising cadmium, selenium, and tellurium. An atomic concentration of selenium can vary across the absorber layer. The first region of the absorber layer can have a thickness between 100 nanometers to 3000 nanometers. The second region of the absorber layer can have a thickness between 100 nanometers to 3000 nanometers. A ratio of an average atomic concentration of selenium in the first region of the absorber layer to an average atomic concentration of selenium in the second region of the absorber layer can be greater than 10. |
| US11114578B2 |
Image sensors with silver-nanoparticle electrodes
Disclosed herein is an apparatus comprising: an array of avalanche photodiodes (APDs) or an absorption region comprising a semiconductor single crystal such as a CdZnTe single crystal or a CdTe single crystal. The apparatus may be configured to absorb radiation particles incident on an absorption region of the APDs or the semiconductor single crystal and to generate charge carriers. The apparatus may comprise an electrode comprising silver nanoparticles and being electrically connected to the absorption region of the APDs or the semiconductor single crystal. For the APDs, each of the APDs may comprise an amplification region, which may comprise a junction with an electric field in the junction. The electric field may be at a value sufficient to cause an avalanche of charge carriers entering the amplification region, but not sufficient to make the avalanche self-sustaining. The junctions of the APDs may be discrete. |
| US11114577B2 |
Photovoltaic power generation device
This photovoltaic power generation device is provided with: a mounting bracket which is fixed to a roof and on which a frame, arranged on the ridge-side end of a solar cell module, and a frame, arranged on the eave-side end of a solar cell module, are mounted; and a fixing bracket which is arranged in the space between the frame and the frame, and which is fixed to the mounting bracket and holds said frames from above. |
| US11114573B2 |
Optoelectronic module assembly and manufacturing method
An optoelectronic module assembly includes an optoelectronic module. The module includes: an active optoelectronic component in or on a mounting substrate, an optical sub-assembly, and a spacer disposed between the mounting substrate and the optical sub-assembly so as to establish a particular distance between the active optoelectronic component and the optical sub-assembly. The optoelectronic module assembly also includes a recessed substrate including first and second surfaces, wherein the second surface is in a plane closer to the optical sub-assembly than is the first surface. The optoelectronic module is mounted on the first surface. The second surface is for mounting other components. |
| US11114563B2 |
Semiconductor devices with low junction capacitances and methods of fabrication thereof
Semiconductor devices with low junction capacitances and methods of fabrication thereof are described. In one embodiment, a method of forming a semiconductor device includes forming isolation regions in a substrate to form active areas. The sidewalls of the active areas are enclosed by the isolation regions. The isolation regions are recessed to expose first parts of the sidewalls of the active areas. The first parts of the sidewalls of the active areas are covered with spacers. The isolation regions are etched to expose second parts of the sidewalls of the active area, the second parts being disposed below the first parts. The active areas are etched through the exposed second parts of the sidewalls to form lateral openings. The lateral openings are filled with a spin on dielectric. |
| US11114562B2 |
Semiconductor device
A semiconductor device includes: a first gate structure on a substrate; a first drain region having a first conductive type adjacent to one side of the first gate structure; a source region having the first conductive type adjacent to another side of the first gate structure; and a first body implant region having a second conductive type under part of the first gate structure. |
| US11114560B2 |
Silicon carbide semiconductor device and method of manufacturing silicon carbide semiconductor device
A silicon carbide semiconductor device includes a silicon carbide semiconductor substrate, a first semiconductor layer and a first semiconductor region each of a first conductivity type, and a first base region, a second semiconductor layer and a second semiconductor region each of a second conductivity type. The first base region opposes the second semiconductor region in a depth direction. A distribution of point defects in a depth direction from a first surface of the second semiconductor region, opposite a second surface of the second semiconductor region facing toward a front surface of the silicon carbide semiconductor substrate has two peaks at positions deeper than an interface between the first semiconductor layer and the first base region, where a first peak at a deeper position of the two peaks has a greater quantity of the point defects than does a second peak at a shallower position of the two peaks. |
| US11114551B2 |
Fin field-effect transistor having counter-doped regions between lightly doped regions and doped source/drain regions
Fin field-effect transistors are provided. A fin field-effect transistor includes a semiconductor substrate; a plurality of fins on the semiconductor substrate; a gate structure across the fins by covering portions of top and side surfaces of the fins, providing portions of the fins under the gate structure as channel regions; lightly doped regions in the fins at both sides of the gate structure; doped source/drain regions in the fins at both sides of the gate structure; and counter doped regions in fins and between the lightly doped regions and the doped source/drain regions. |
| US11114550B2 |
Recessing STI to increase FIN height in FIN-first process
A method includes forming a gate stack over top surfaces of a semiconductor strip and insulation regions on opposite sides of the semiconductor strip. The insulation regions include first portions overlapped by the gate stack, and second portions misaligned from the gate stack. An end portion of the semiconductor strip is etched to form a recess, wherein the recess is located between the second portions of the insulation regions. An epitaxy is performed to grow a source/drain region from the recess. After the epitaxy, a recessing is performed to recess the second portions of the insulation regions, with the second portions of the insulation regions having first top surfaces after the first recessing. After the recessing, a dielectric mask layer is formed on the first top surfaces of the second portions of the insulation regions, wherein the dielectric mask layer further extends on a sidewall of the gate stack. |
| US11114549B2 |
Semiconductor structure cutting process and structures formed thereby
Methods of cutting fins, and structures formed thereby, are described. In an embodiment, a structure includes a first fin and a second fin on a substrate, and a fin cut-fill structure disposed between the first fin and the second fin. The first fin and the second fin are longitudinally aligned. The fin cut-fill structure includes a liner on a first sidewall of the first fin, and an insulating fill material on a sidewall of the liner and on a second sidewall of the first fin. The liner is further on a surface of the first fin between the first sidewall of the first fin and the second sidewall of the first fin. |
| US11114547B2 |
Field effect transistor with negative capacitance dieletric structures
The structure of a semiconductor device with negative capacitance (NC) dielectric structures and a method of fabricating the semiconductor device are disclosed. A method of fabricating the semiconductor device includes forming a fin structure with a fin base portion and a fin top portion on a substrate, forming a spacer structure in a first region of the fin top portion, and forming a gate structure on a second region of the fin top portion. The spacer structure includes a first NC dielectric material and the gate structure includes a gate dielectric layer with a second NC dielectric material different from the first NC dielectric material. |
| US11114546B2 |
Semiconductor device and formation thereof
A semiconductor device and methods of formation are provided. The semiconductor device includes a gate over a channel portion of a fin. The fin includes a first active area of the fin having a first active area top surface coplanar with a first shallow trench isolation (STI) top surface of a first STI portion of STI, and a second active area of the fin having a second active area top surface coplanar with a second STI top surface of a second STI portion of the STI. The method herein negates a need to recess at least one of the fin, the first STI portion or the second STI portion during device formation. Negating a need to recess at least one of the fin, the first STI portion or the second STI portion enhances the semiconductor device formation and is more efficient than a semiconductor device formation that requires the recessing of at least one of a fin, a first STI portion or a second STI portion. |
| US11114545B2 |
Cap layer and anneal for gapfill improvement
Embodiments disclosed herein relate generally to forming a gate layer in high aspect ratio trenches using a cyclic deposition-etch process. In an embodiment, a method for semiconductor processing is provided. The method includes performing a cyclic deposition-etch process to form a conformal film over a bottom surface and along sidewall surfaces of a feature on a substrate. The method includes forming a dielectric cap layer on the conformal film. The method includes performing an anneal process on the conformal film. |
| US11114544B2 |
Integrated circuit device having fin-type active
An integrated circuit device includes a fin-type active region protruding from a top surface of a substrate and extending in a first direction parallel to the top surface of the substrate, a gate structure intersecting with the fin-type active region and extending on the substrate in a second direction perpendicular to the first direction, a source/drain region on a first side of the gate structure, a first contact structure on the source/drain region, and a contact capping layer on the first contact structure. A top surface of the first contact structure has a first width in the first direction, a bottom surface of the contact capping layer has a second width greater than the first width stated above in the first direction, and the contact capping layer includes a protruding portion extending outward from a sidewall of the first contact structure. |
| US11114537B2 |
Enhancement-mode high electron mobility transistor
Example embodiments relate to enhancement-mode high electron mobility transistors. One embodiment includes a method for manufacturing an enhancement-mode high electron mobility transistor. The method includes providing a stack of layers. The stack of layers includes a substrate, a III-V channel layer over the substrate, a III-V barrier layer on the channel layer, a p-doped III-V layer on the III-V barrier layer, and a Schottky contact interlayer on the p-doped III-V layer. The p-doped III-V layer has a first surface area. The Schottky contact interlayer has a second surface area. The second surface area is less than the first surface area. The second surface area leaves a peripheral part of a top surface of the p-doped III-V layer uncovered. The method also includes depositing a metal gate on the Schottky contact interlayer. |
| US11114535B2 |
Integrated circuit devices and methods of manufacturing the same
A semiconductor device may include a substrate including a fin active region extending in a first direction, a gate structure crossing the fin active region and extending in a second direction crossing the first direction, source/drain regions on the fin active region at opposite sides of the gate structure, a first contact structure electrically connected to one of the source/drain regions, a pair of first contact block structures on opposite first sidewalls, respectively, of the first contact structure in the second direction. |
| US11114534B2 |
Three-dimensional nor array including vertical word lines and discrete channels and methods of making the same
A three-dimensional memory device includes an alternating stack of source layers and drain layers located over a substrate, memory openings vertically extending through the alternating stack, vertical word lines located in each one of the memory openings and vertically extending through each of the source layers and the drain layers of the alternating stack, vertical stacks of discrete semiconductor channels located in each one of the memory openings and contacting horizontal surfaces of a respective vertically neighboring pair of a source layer of the source layers and a drain layer of the drain layers, and vertical stacks of discrete memory material portions located in each one of the memory openings and laterally surrounding a respective one of the vertical word lines. Each memory material portion is laterally spaced from a respective one of the semiconductor channels by a respective gate dielectric layer. |
| US11114533B2 |
Semiconductor device including contacts having different heights and different widths
A semiconductor device includes: a substrate including a first region and a second region; a first gate stack on the first region of the substrate; a first source/drain contact at a first side of the first gate stack, wherein the first source/drain contact is connected to the substrate; a second gate stack on the second region of the substrate; and a second source/drain contact at a first side of the second gate stack, wherein the second source/drain contact is connected to the substrate, wherein a height of the second source/drain contact is greater than a height of the first source/drain contact, and wherein a width of the second source/drain contact is greater than a width of the first source/drain contact. |
| US11114532B2 |
Semiconductor structures and methods of forming the same
A semiconductor structure is provided. The semiconductor structure includes: a substrate; a source structure and a drain structure disposed on the substrate; a gate structure disposed on the substrate and between the source structure and the drain structure; a first field plate disposed on the substrate; a first oxide layer disposed between the substrate and the first field plate; a second field plate disposed on the first field plate, wherein the second field plate is closer to the drain structure than the first field plate; a planarized second oxide layer disposed between the first oxide layer and the second field plate; and a third field plate disposed on the second field plate, wherein the third field plate is closer to the drain structure than the second field plate. |
| US11114527B2 |
Semiconductor device and method for manufacturing same
A terrace insulating film (SL) to be overridden by a gate electrode (G) of an nLDMOS device is configured by LOCOS, and a device isolation portion (SS) is configured by STI. Furthermore, on an outermost periphery of an active region where a plurality of nLDMOS devices are formed, a guard ring having the same potential as that of a drain region (D) is provided. And, via this guard ring, the device isolation portion (SS) is formed in a periphery of the active region, thereby not connecting but isolating the terrace insulating film (SL) and the device isolation portion (SS) from each other. |
| US11114522B2 |
Display device, manufacturing method of display device, and exposure device
A display device includes a plurality of picture elements, wherein a first electrode is formed in each of the plurality of picture elements, a cover layer is formed such that an opening of the first electrode is formed, a spacer in a layer identical to the cover layer is provided between two of the first electrodes, the spacer is formed with a height greater than a height of the cover layer, and an outer edge portion of the spacer is spaced from an outer edge portion of the cover layer. |
| US11114508B2 |
Display panel including image points arranged in rectangular grid and display device
A display panel and a display device are described. The display panel includes three-pixel units representing three different colors. In each pixel unit there are six sub-pixels dividing an anode formed on the pixel unit; in the same pixel unit, anodes of all sub-pixels are insulated from each other; three closest sub-pixels of different colors form a main pixel; and a center point of the main pixel is in one-to-one association with an image point of a display source image, and the image point falls within 10% proximity of the associated center point of the main pixel. The six sub-pixels in each pixel unit are formed simultaneously in a manner of pixel printing. |
| US11114506B2 |
Organic light emitting display panel, display device and manufacturing method thereof
The present application discloses an organic light emitting display panel, a display device and a manufacturing method thereof. The organic light emitting display substrate includes: a reflecting layer disposed on a substrate and a blocking layer disposed on the reflecting layer, where the blocking layer includes retaining walls configured to separate each pixel unit, and a transparent conducting layer, a first electrode, a light emitting layer and a second electrode which is semi-transparent and semi-reflective are arranged in sequence on a side, facing away from the substrate, of the reflecting layer within each pixel unit defined by retaining walls; in a direction vertical to the substrate, the thicknesses of the transparent conducting layers of pixel units with different emitting colors are different, such that the light emitted by each pixel unit is transmitted between the reflecting layer and the second electrode to satisfy the strong microcavity effect. |
| US11114501B2 |
SOI semiconductor structure and method for manufacturing an SOI semiconductor structure
An SOI semiconductor structure, including a substrate layer formed on a back side and a semiconductor layer of a second conductivity type formed on a front side, an insulating layer being disposed between the substrate layer and the semiconductor layer, a three-dimensional Hall sensor structure having a sensor region made up of a monolithic semiconductor body being formed in the semiconductor layer, and the semiconductor body extending from an underside up to the front side, at least three first metallic terminal contacts being formed on the upper side, and at least three second metallic terminal contacts being formed on the underside, the first terminal contacts being offset with respect to the second terminal contacts in a projection perpendicular to the front side, each first terminal contact and each second terminal contact being formed in each case on a highly doped semiconductor contact region of a second conductivity type. |
| US11114500B2 |
Display device and method of manufacturing the same
A display device includes a substrate including a display area having a plurality of pixel areas and a non-display area located around the display area; a circuit element layer including a circuit element in each of the pixel areas and a reference voltage wiring in the non-display area, the reference voltage wiring being electrically coupled to the circuit element; and a display element layer including a first pixel electrode on the circuit element layer in each of the pixel areas, a second pixel electrode located opposite to the first pixel electrode, a plurality of light emitting elements between the first pixel electrode and the second pixel electrode, and a first wiring on the circuit element layer in the non-display area, wherein the first wiring is directly coupled to the reference voltage wiring in the non-display area. |
| US11114497B2 |
Sensor, array substrate containing sensor, display panel containing array substrate
The present disclosure generally relates to the field of detection technology. A sensor includes a base substrate; a voltage dividing photodiode on the base substrate; and a detecting photodiode on the base substrate. The voltage dividing photodiode may include a first electrode and a second electrode arranged in a stack. The detecting photodiode may include a third electrode and a fourth electrode arranged in a stack. The voltage dividing photodiode is configured to operate substantially permanently in a dark state. The detecting photodiode is configured to operate with a reverse bias applied by the first power terminal and the second power terminal, so as to detect a light intensity. |
| US11114495B2 |
Array substrate and method for manufacturing an array sunstrate
The present disclosure provides an array substrate and a method for manufacturing an array substrate. The array substrate includes a substrate, a switch assembly disposed on the substrate and correspondingly disposed beside the switch assembly, a color photoresist layer formed on the switch assembly and the photosensor, and a pixel electrode formed on the color photoresist layers and coupled with the switch assembly. The switch assembly includes a first metal layer. The photosensor includes a first electrode layer formed directly on the substrate and a first amorphous silicon layer disposed above the first electrode layer. The first electrode layer and the first metal layer are disposed on a same layer. |
| US11114494B2 |
Image sensor based on avalanche photodiodes
Disclosed herein is an apparatus comprising: an array of avalanche photodiodes (APDs), each of the APDs comprising an absorption region and an amplification region; wherein the absorption region is configured to generate charge carriers from a photon absorbed by the absorption region; wherein the absorption region comprises a silicon epitaxial layer; wherein the amplification region comprises a junction with an electric field in the junction; wherein the electric field is at a value sufficient to cause an avalanche of charge carriers entering the amplification region, but not sufficient to make the avalanche self-sustaining; wherein the junctions of the APDs are discrete. |
| US11114490B2 |
Light receiving element, ranging module, and electronic apparatus
Disclosed is a light receiving element including an on-chip lens, a wiring layer, and a semiconductor layer disposed between the on-chip lens and the wiring layer. The semiconductor layer includes a photodiode, a first transfer transistor that transfers electric charge generated in the photodiode to a first charge storage portion, a second transfer transistor that transfers electric charge generated in the photodiode to a second charge storage portion, and an interpixel separation portion that separates the semiconductor layers of adjacent pixels from each other, for at least part of the semiconductor layer in the depth direction. The wiring layer has at least one layer including a light blocking member. The light blocking member is disposed to overlap with the photodiode in a plan view. |
| US11114488B1 |
Image sensing devices with reflector arrays
The present invention relates generally to sensing devices. In an embodiment, the present invention provides a SPAD pixel that includes a first region and a second region. An absorption region is configured within the first region. A first reflector array is configured within the second region and below the absorption region. A second reflector array is configured within the second region and below the first reflector array. The SPAD pixel also includes isolation structures configured within the first region. |
| US11114487B2 |
Photoelectric conversion apparatus and imaging system using the same
In a photoelectric conversion apparatus including charge storing portions in its imaging region, isolation regions for the charge storing portions include first isolation portion each having a PN junction, and second isolation portions each having an insulator. A second isolation portion is arranged between a charge storing portion and at least a part of a plurality of transistors. |
| US11114482B2 |
Scalable-pixel-size image sensor
Photodetection elements within an integrated-circuit pixel array are dynamically configurable to any of at least three uniform-aspect-ratio, size-scaled pixel footprints through read-out-time control of in-pixel transfer gates associated with respective photodetection elements and binning transistors coupled between the transfer gates for respective clusters of the photodetection elements and a shared reset node. |
| US11114481B2 |
Capacitor including first electrode, dielectric layer, and second electrode, image sensor, and method for producing capacitor
A capacitor includes a first electrode, a second electrode facing the first electrode, and a dielectric layer disposed between the first and second electrodes and being in contact with each of the first and second electrodes. The dielectric layer has a thickness of 10 nm or more. The first electrode contains carbon. At the interface between the dielectric layer and the first electrode, an elemental percentage of carbon is 30 atomic % or less. |
| US11114479B2 |
Optoelectronics and CMOS integration on GOI substrate
A single chip including an optoelectronic device on the semiconductor layer in a first region, the optoelectronic device comprises a bottom cladding layer, an active region, and a top cladding layer, wherein the bottom cladding layer is above and in direct contact with the semiconductor layer, the active region is above and in direct contact with the bottom cladding layer, and the top cladding layer is above and in direct contact with the active region, a silicon device on the substrate extension layer in a second region, a device insulator layer substantially covering both the optoelectronic device in the first region and the silicon device in the second region, and a waveguide embedded within the device insulator layer in direct contact with a sidewall of the active region of the optoelectronic device. |
| US11114478B2 |
Thin film transistor and manufacture method thereof, array substrate and manufacture method thereof
A thin film transistor and a manufacture method thereof, an array substrate and a manufacture method thereof are provided. The manufacture method of the thin film transistor includes: providing a base substrate; and forming a gate electrode, a first electrode, a second electrode and a semiconductor layer of the thin film transistor on the base substrate. At least one of the gate electrode, the first electrode and the second electrode includes N portions that are stacked in a direction perpendicular to the base substrate, adjacent two of the N portions are in direct contact with each other, and N is a positive integer more than or equal to 2. The method includes: performing N patterning processes to respectively form the N portions. |
| US11114477B2 |
Array substrate and manufacturing method thereof
In a method for manufacturing an array substrate, a first photoresist pattern is formed on a buffer layer of a non-display region and the buffer layer uncovered by the first photoresist pattern is removed to form a first via hole in the non-display region. A second via hole is formed on the basis of the first via hole. The second via hole is connected to the first via hole. By forming the first via hole in the non-display region and forming the second via hole on the basis of the first via hole, completeness of film layers is ensured and product yield is improved. |
| US11114474B2 |
Thin film transistor, manufacturing method thereof, array substrate, and display panel
A thin film transistor (TFT), a manufacturing method thereof, an array substrate and a display panel are disclosed. The manufacturing method includes: providing a base substrate; forming a first electrode, an isolating layer, an active layer and a gate insulating layer on the base substrate; simultaneously forming a second electrode and a gate electrode, wherein the second electrode is connected to the active layer. |
| US11114473B2 |
Method for transferring light emitting elements, display panel, method for making display panel, and substrate
A method for transferring light emitting elements precisely during manufacture of display panels includes providing light emitting elements; providing a first electromagnetic plate defining magnetic adsorption positions; providing a receiving substrate defining receiving areas; providing a second electromagnetic plate; energizing the first electromagnetic plate to magnetically adsorb one light emitting element at one adsorption position; providing a second electromagnetic plate; and transferring the light emitting elements to one receiving area of the receiving substrate. |
| US11114472B2 |
Thin film transistor panel, display device, and method of manufacturing the thin film transistor panel
A transistor panel may include a substrate, a transistor, a first inorganic buffer layer, and an inorganic fluorine-containing buffer layer. The transistor may overlap the substrate and may include a semiconductor layer. The first inorganic buffer layer may be disposed between the substrate and the semiconductor layer. The inorganic fluorine-containing buffer layer may be disposed between the first inorganic buffer layer and the semiconductor layer and may contain fluorine in a range of 0.5 at % to 2 at %. |
| US11114463B2 |
Semiconductor device
A semiconductor device includes gate electrodes stacked along a direction perpendicular to an upper surface of a substrate, the gate electrodes extending to different lengths in a first direction, and each gate electrode including subgate electrodes spaced apart from each other in a second direction perpendicular to the first direction, and gate connection portions connecting subgate electrodes of a same gate electrode of the gate electrodes to each other, channels extending through the gate electrodes perpendicularly to the upper surface of the substrate, and dummy channels extending through the gate electrodes perpendicularly to the upper surface of the substrate, the dummy channels including first dummy channels arranged in rows and columns, and second dummy channels arranged between the first dummy channels in a region including the gate connection portions. |
| US11114460B2 |
Semiconductor memory devices
A semiconductor memory device including a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer between the first and second semiconductor layers, gate electrodes arranged on the second semiconductor layer and spaced apart from each other in a first direction perpendicular to an upper surface of the second semiconductor layer, and channel structures penetrating the first, second and third semiconductor layers and the gate electrodes, each respective channel structure of channel structures including a gate insulating film, a channel layer, and a buried insulating film, the gate insulating film including a tunnel insulating film adjacent to the channel layer, a charge blocking film adjacent to the gate electrodes, and a charge storage film between the tunnel insulating film and the charge blocking film, and the charge storage film including an upper cover protruding toward the outside of the respective channel structure. |
| US11114459B2 |
Three-dimensional memory device containing width-modulated connection strips and methods of forming the same
A three-dimensional memory device includes alternating stacks of insulating layers and electrically conductive layers located over a substrate, a first memory array region and a second memory array region that are laterally spaced apart along the first horizontal direction by an inter-array region therebetween, and memory stack structures extending through the alternating stacks in the first or second memory array region. Each of the alternating stacks includes a respective terrace region in which layers of a respective alternating stack have variable lateral extents within an area of the inter-array region, and a respective array interconnection region laterally offset from the respective terrace region and which continuously extends from the first memory array region to the second memory array region. Each of the alternating stacks has a width modulation along a second horizontal direction that is perpendicular to the first horizontal direction within the area of the inter-array region. |
| US11114455B2 |
Semiconductor device and manufacturing method thereof
A method of manufacturing a semiconductor device includes forming holes passing through a stacked structure, surrounding channel structures, and replacing some of the materials of the stacked structure through the holes. |
| US11114451B1 |
Method of forming a device with FinFET split gate non-volatile memory cells and FinFET logic devices
A method of forming a device with a silicon substrate having upwardly extending first and second fins. A first implantation forms a first source region in the first silicon fin. A second implantation forms a first drain region in the first silicon fin, and second source and drain regions in the second silicon fin. A first channel region extends between the first source and drain regions. A second channel region extends between the second source and drain regions. A first polysilicon deposition is used to form a floating gate that wraps around a first portion of the first channel region. A second polysilicon deposition is used to form an erase gate wrapping around first source region, a word line gate wrapping around a second portion of the first channel region, and a dummy gate wrapping around the second channel region. The dummy gate is replaced with a metal gate. |
| US11114450B2 |
One-time programable memory device having enhanced program efficiency and method for fabricating the same
A one-time programmable (OTP) memory device includes a plurality of unit cells which are respectively located at cross points of word lines and bit lines. Each unit cell includes a selection transistor and a storage transistor coupled in series. The selection transistor includes a drain region and a common junction region separated by a first channel region and includes a selection gate structure disposed on the first channel region. The storage transistor includes a source region and the common junction region separated by a second channel region and includes a floating gate structure disposed on the second channel region. A length of an overlapping region between the source region and the floating gate structure in a channel length direction of the storage transistor is less than a length of an overlapping region between the common junction region and the floating gate structure in the channel length direction. |
| US11114449B2 |
Semiconductor device
[Problem] To provide a semiconductor device suitable for miniaturization. To provide a highly reliable semiconductor device. To provide a semiconductor device with improved operating speed.[Solving Means] A semiconductor device including a memory cell including first to cth (c is a natural number of 2 or more) sub memory cells, wherein: the jth sub memory cell includes a first transistor, a second transistor, and a capacitor; a first semiconductor layer included in the first transistor and a second semiconductor layer included in the second transistor include an oxide semiconductor; one of terminals of the capacitor is electrically connected to a gate electrode included in the second transistor; the gate electrode included in the second transistor is electrically connected to one of a source electrode and a drain electrode which are included in the first transistor; and when j≥2, the jth sub memory cell is arranged over the j−1th sub memory cell. |
| US11114448B2 |
Semiconductor device and method for fabricating the same
The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate having a first region and a second region, a first semiconductor element positioned in the first region of the substrate, a second semiconductor element positioned in the first region of the substrate, a bridge conductive unit electrically connected the first semiconductor element and the second semiconductor element, and a programmable unit positioned in the second region and electrically connected to the bridge conductive unit. |
| US11114446B2 |
SRAM with hierarchical bit lines in monolithic 3D integrated chips
A memory device includes a first plurality of memory cells, a second plurality of memory cells, and a local sense amplifier between the first plurality of memory cells and the second plurality of memory cells, all on a first level, and a local bit line on a second level. The second level is vertically separated by one or more first inter-level dielectric layers from the first level in a first direction and the local bit line is electrically coupled to each memory cell of the first plurality of memory cells and the second plurality of memory cells, as well as the local sense amplifier. The memory device also includes a global bit line on a third level vertically separated by one or more inter-level dielectric layers from the first level in a second direction opposite the first direction, with the global bit line electrically coupled to the local sense amplifier. |
| US11114445B2 |
Semiconductor device
A semiconductor device includes a substrate having an active pattern, a cell region on the substrate and having a cell circuit, and a core region on the substrate having a peripheral circuit. In plan view, the active pattern on the core region includes a plurality of corners. Each of the corners has a rounding index that is equal to or less than about 15 nm. The rounding index is a distance between a respective tip of each of the corners and a right-angled corner. |
| US11114443B2 |
Semiconductor structure formation
Systems, apparatuses, and methods related to semiconductor structure formation are described. An example method may include patterning a working surface of a semiconductor wafer. The method may further include performing a vapor etch on a first dielectric material at the working surface to recess the first dielectric material to a first intended depth of an opening relative to the working surface and to expose a second dielectric material on a sidewall of the opening. The method may further include performing a wet etch on the second dielectric material to recess the second dielectric material to the intended depth. |
| US11114442B2 |
Semiconductor memory device with shallow buried capacitor and fabrication method thereof
A semiconductor device includes a bottle-shaped capacitor cavity extends through a silicon device layer and a buried oxide layer of a substrate. The bottle-shaped capacitor cavity includes an upper portion in the silicon device layer and a widened bottom burrow in the buried oxide layer and underneath the silicon device layer. The widened bottom burrow is wider than the upper portion. A buried capacitor is disposed in the bottle-shaped capacitor cavity. The buried capacitor includes an inner electrode and an outer electrode with the capacitor dielectric layer therebetween. A transistor is disposed on the substrate. The transistor includes a source region and a drain region, a channel region between the source region and the drain region, and a gate over the channel region. The source region is electrically connected to the inner electrode. |
| US11114440B2 |
Semiconductor memory device and method of fabricating the same
Provided are a semiconductor memory device and a method of fabricating the same. The semiconductor memory device may include: a first impurity doped region and a second impurity doped region spaced apart from each other in a semiconductor substrate, a bit line electrically connected to the first impurity doped region and crossing over the semiconductor substrate, a storage node contact electrically connected to the second impurity doped region, a first spacer and a second spacer disposed between the bit line and the storage node contact, and an air gap region disposed between the first spacer and the second spacer. The first spacer may cover a sidewall of the bit line, and the second spacer may be adjacent to the storage node contact. A top end of the first spacer may have a height higher than a height of a top end of the second spacer. |
| US11114435B2 |
FinFET having locally higher fin-to-fin pitch
The disclosed technology generally relates to semiconductor devices, and more particularly to FinFET transistors. In one aspect, at least three fins are arranged to extend in parallel in a first direction and are laterally separated from each other in a second direction by shallow trench isolation structures having a first fin spacing, where at least a portion of each fin protrudes out from a substrate. At least a portion of each of a first fin and a second fin of the at least three fins vertically protrude to a level higher than an upper surface of the shallow trench isolation structures. A third fin is formed laterally between the first fin and the second fin in the second direction, where the third fin has a non-protruding region which extends vertically to a level below or equal to the upper surface of the shallow trench isolation structures. |
| US11114432B2 |
Protection circuit with a FET device coupled from a protected bus to ground
A semiconductor device includes a voltage input circuit node and a ground voltage node. A first transistor is coupled between the voltage input circuit node and the ground voltage node. A triggering circuit is coupled between the voltage input circuit node and the ground voltage node in parallel with the first transistor. The triggering circuit includes a trigger diode. An output of the triggering circuit is coupled to a control terminal of the first transistor. A load is powered by coupling the load between the voltage input circuit node and the ground voltage node. |
| US11114428B2 |
Integrated circuit device
An integrated circuit device includes a memory including a memory cell insulation surrounding a memory stack and a memory cell interconnection unit, a peripheral circuit including a peripheral circuit region formed on a peripheral circuit board, and a peripheral circuit interconnection between the peripheral circuit region and the memory structure, a plurality of conductive bonding structures on a boundary between the memory cell interconnection and the peripheral circuit interconnection in a first region, the first region overlapping the memory stack in a vertical direction, and a through electrode penetrating one of the memory cell insulation and the peripheral circuit board and extended to a lower conductive pattern included in the peripheral circuit interconnection in a second region, the second region overlapping the memory cell insulation in the vertical direction. |
| US11114425B2 |
Packaging of radiation detectors in an image sensor
Disclosed herein is an image sensor comprising: a first package comprising a plurality of radiation detectors mounted on a printed circuit board (PCB); wherein a dead zone of the first package does not extend between neighboring radiation detectors among the plurality of radiation detectors; wherein the radiation detectors have no guard rings or sidewall doping. |
| US11114420B2 |
Uniforming an array of LEDs having asymmetric optical characteristics
An apparatus comprises an array of light emitting diodes (LEDs), each LED in the array having an asymmetric optical characteristic. The asymmetric optical characteristic of a first subset of LEDs in the array is oriented at an angle of 90°, 180°, or 270° with respect to the asymmetrical optical characteristic of a second subset of LEDs in the array. The apparatus may be the array of LEDs or an illumination system comprising a light source comprising the array of LEDs. Methods of manufacturing the apparatus are also provided. |
| US11114416B2 |
Power and temperature management for functional blocks implemented by a 3D stacked integrated circuit
A three-dimensional stacked integrated circuit (3D SIC) having a non-volatile memory die, a volatile memory die, a logic die, and a thermal management component. The non-volatile memory die, the volatile memory die, the logic die, and the thermal management component are stacked. The thermal management component can be stacked in between the non-volatile memory die and the logic die, stacked in between the volatile memory die and the logic die, or both. |
| US11114414B2 |
Wafer structure with capacitive chip interconnection, method for manufacturing the same, and chip structure with capacitive chip interconnection
A wafer structure, a method for manufacturing the same and a chip structure are provided. A first capacitor plate is arranged in a first chip, a second capacitor plate is arranged in a second chip, and the first chip is stacked together via bonding layers with the second chip with a front surface of the first chip facing toward a front surface of the second chip. In this way, a capacitor structure formed by the first capacitor plate, the second capacitor plate and dielectric materials provided therebetween is formed while bonding the first chip and second chip together, and the capacitor plate and the dielectric materials may be formed while forming a device interconnection structure in the chip, such that no additional process is required, thereby improving device integration and process integration. |
| US11114411B2 |
Semiconductor chip transfer method and transfer tool
A method of transferring semiconductor chips includes providing a transfer tool having a plurality of segments, each segment having a liquid receiving area; providing a plurality of semiconductor chips in a regular array on a source carrier; providing a target carrier; selectively arranging liquid drops on the liquid receiving areas of some of the segments; causing the transfer tool to approach the source carrier, each liquid drop contacting and wetting a semiconductor chip; lifting the transfer tool from the source carrier, wherein semiconductor chips wetted by liquid drops are lifted from the source carrier by the transfer tool; causing the target carrier by the transfer tool, to approach the semiconductor chips arranged on the transfer tool contacting the target carrier; and lifting the transfer tool from the target carrier, the semiconductor chips contacting the target carrier remaining on the target carrier |
| US11114406B2 |
Warpage-compensated bonded structure including a support chip and a three-dimensional memory chip
A first semiconductor die and a second semiconductor die can be bonded in a manner that enhances alignment of bonding pads. Non-uniform deformation of a first wafer including first semiconductor dies can be compensated for by forming a patterned stress-generating film on a backside of the first wafer. Metallic bump portions can be formed on concave surfaces of metallic bonding pads by a selective metal deposition process to reduce gaps between pairs of bonded metallic bonding pads. Pad-to-pad pitch can be adjusted on a semiconductor die to match the pad-to-pad pitch of another semiconductor die employing a tilt-shift operation in a lithographic exposure tool. A chuck configured to provide non-uniform displacement across a wafer can be employed to hold a wafer in a contoured shape for bonding with another wafer in a matching contoured position. Independently height-controlled pins can be employed to hold a wafer in a non-planar configuration. |
| US11114404B2 |
Electronic device including electrical connections on an encapsulation block
An integrated circuit chip includes a front face having an electrical connection pad. An overmolded encapsulation block encapsulates the integrated circuit chip and includes a front layer at least partially covering a front face of the integrated circuit chip. A through-hole the encapsulation block is located above the electrical connection pad of the integrated circuit chip. A wall of the through-hole is covered with an inner metal layer that is joined to the front pad of the integrated circuit chip. A front metal layer covers a local zone of the front face of the front layer, with the front metal layer being joined to the inner metal layer to form an electrical connection. The inner metal layer and the front metal layer are attached or anchored to activated additive particles that are included in the material of the encapsulation block. |
| US11114400B2 |
Semiconductor device with improved thermal dissipation and manufacturing methods
A semiconductor device includes a semiconductor die, a redistribution structure, a interconnection structure, and a thermal path structure. The redistribution structure includes an insulation layer over a first surface of the semiconductor die and a conductive trace separated from the first surface by the insulation layer. The conductive trace extends laterally over the first surface from a first end toward a second end that is electrically coupled to a bond pad on the first surface of the semiconductor die. The interconnection structure is coupled to the first end of the conductive trace. The thermal path structure provides a thermal path between the semiconductor die and the interconnection structure. In some embodiment, the thermal path structure comprises a thermal pad that passes through the insulation layer. In other embodiments, the thermal path structure comprises a dummy pad on the first surface of the semiconductor die. |
| US11114399B2 |
Semiconductor wafer with void suppression and method for producing same
A semiconductor wafer suppressed in voids produced in the interface between a passivation film and an electroless nickel plating film, and configured such that an electrode pad is entirely covered by the electroless nickel plating film. The semiconductor wafer includes, on a substrate, an electrode pad and a passivation film covering the upper surface of the substrate and an opening from which the electrode pad is exposed. The semiconductor wafer sequentially includes, on the electrode pad, an electroless nickel plating film, an electroless palladium plating film and an electroless gold plating film. A void, present in the interface between the passivation film and the electroless nickel plating film, has a length from the forefront of the void to the surface of the electrode pad of 0.3 μm or more and a width of 0.2 μm or less. The electrode pad is entirely covered by the electroless nickel plating film. |
| US11114394B2 |
Signal routing carrier
An electronic device and associated methods are disclosed. In one example, the electronic device includes an article having a substrate, a semiconductor die thereon, a routing carrier attached to the substrate, and a transmission pathway electrically connected to the semiconductor die and the substrate, wherein the transmission pathway runs through the routing carrier. In selected examples, the article is made by manufacturing a substrate, attaching a semiconductor die to the substrate, fabricating a routing carrier comprising a transmission pathway, and integrating the routing carrier into the substrate. |
| US11114393B2 |
Electronic package and method for fabricating the same
An electronic package and a method for fabricating the same are provided. A plurality of electronic components are disposed in a packaging structure. At least one antenna structure is stacked via a plurality of conductive elements on the packaging structure. The antenna structure is electrically connected to at least one of the electronic components. The electronic components have different radio frequencies. In mass production, the antenna structures of different antenna types are stacked on the packaging structure, and a radio frequency product of various frequencies can be produced. Radio frequency chips of different frequencies need not be fabricated into a variety of individual packaging modules. Therefore, the production cost is reduced, and the production speed is increased. |
| US11114386B2 |
Semiconductor device and method of manufacturing the same
A semiconductor device includes a single lead frame, a semiconductor element, and a mold material. The semiconductor element is joined onto one main surface of the lead frame. The lead frame includes a die-attach portion, a signal terminal portion, and a ground terminal portion. The die-attach portion, the signal terminal portion, and the ground terminal portion are disposed directly below the mold material so as to be arranged in a direction along one main surface. A groove portion is provided by partially removing the lead frame so as to allow the groove portion to pass therethrough, the groove portion being provided between the die-attach portion and the ground terminal portion adjacent to each other in the lead frame and between the signal terminal portion and the ground terminal portion adjacent to each other in the lead frame. |
| US11114381B2 |
Power distribution network for 3D logic and memory
A semiconductor device is provided. The semiconductor device includes a transistor stack having a plurality of transistor pairs that are stacked over a substrate. Each transistor pair of the plurality of transistor pairs includes a n-type transistor and a p-type transistor that are stacked over one another. The plurality of transistor pairs have a plurality of gate electrodes that are stacked over the substrate and electrically coupled to gate structures of the plurality of transistor pairs, and a plurality of source/drain (S/D) local interconnects that are stacked over the substrate and electrically coupled to source regions and drain regions of the plurality of transistor pairs. The semiconductor device further includes one or more conductive planes formed over the substrate. The one or more conductive planes are positioned adjacent to the transistor stack, span a height of the transistor stack and are electrically coupled to the transistor stack. |
| US11114378B2 |
Semiconductor structure with ultra thick metal and manufacturing method thereof
The present disclosure provides a semiconductor structure having an ultra thick metal (UTM). The semiconductor structure includes a substrate, a metal layer over the substrate, and an UTM over the metal layer. An area density of the UTM is greater than 40% and a thickness of the UTM is equal to or greater than 6 micrometer. The present disclosure provides a method for manufacturing a semiconductor structure having a UTM. The method includes patterning a dielectric layer with a plurality of trenches by a first mask, patterning a photoresist positioning on a mesa between adjacent trenches by a second mask, and selectively plating conductive materials in the plurality of trenches. |
| US11114377B2 |
Transformer, transformer manufacturing method and semiconductor device
A semiconductor device includes a semiconductor substrate, an insulating layer, a transformer formed in the insulating layer, and a wiring. The transformer includes a primary winding conductor, and a secondary winding conductor. The primary winding conductor is provided in a quadrangle spiral shape having a first center axis extending in a direction parallel to the surface of the semiconductor substrate inside the insulating layer, and configured by one conductor film selected from a group consisting of a vacuum deposition film, a chemical vapor deposition film and a sputtered film. The secondary winding conductor is provided in a quadrangle spiral shape having a second center axis inside the insulating layer while being spaced from the primary winding conductor in plan view of the semiconductor substrate, magnetically coupled with the primary winding conductor and configured by a conductor film. |
| US11114374B2 |
Graphene enabled selective barrier layer formation
Interconnect structures and method of forming the same are disclosed herein. An exemplary interconnect structure includes a first contact feature in a first dielectric layer, a second dielectric layer over the first dielectric layer, a second contact feature over the first contact feature, a barrier layer between the second dielectric layer and the second contact feature, and a graphene layer between the second contact feature and the first contact feature. |
| US11114372B2 |
Integrated circuit, circuit board with integrated circuit, and display device using the same
An integrated circuit includes a main body having a top and a bottom; and upper pins placed on the top of the main body, and lower pins placed on the bottom of the main body, in which each of the upper pins has a first protruding portion protruding toward outside from a side or the top of the main body, and each of the lower pins has a second protruding portion protruding toward outside from the side or the bottom of the main body. |
| US11114370B2 |
Semiconductor device packages and methods of manufacturing the same
A semiconductor device package includes a substrate, a redistribution structure, a conductive pad, a conductive element, and a conductive via. The redistribution structure is disposed over the substrate and includes a first dielectric layer and a first conductive layer. The conductive pad is disposed on a first surface of the first dielectric layer. The conductive element is disposed in the first dielectric layer and is electrically connected to the conductive pad. The conductive via extends from the conductive pad toward the substrate through the conductive element and the first dielectric layer. The first conductive layer is separated from the conductive via. |
| US11114365B2 |
Electronic element mounting substrate, electronic device, and electronic module
An electronic element mounting substrate includes a first substrate including a first main surface and a mounting portion in a rectangular shape for mounting an electronic element, positioned on the first main surface and one end portion of the mounting portion in a longitudinal direction being positioned at an outer edge portion of the first main surface and a second substrate positioned on a second main surface opposite to the first main surface, formed of a carbon material, and including a third main surface facing the second main surface and a fourth main surface opposite to the third main surface. A thermal conduction of the mounting portion in a direction perpendicular to in a longitudinal direction is greater than a thermal conduction of the mounting portion in the longitudinal direction, in the third main surface or the fourth main surface, in plan view. |
| US11114363B2 |
Electronic package arrangements and related methods
Electronic package arrangements and related methods are disclosed that provide one or more of improved thermal management and electromagnetic shielding. Electronic packages are disclosed that include arrangements of one or more electronic devices, overmold bodies, and heat spreaders or metal frame structures. The heat spreaders or metal frame structures may be arranged over the electronic devices to form heat dissipation paths that draw operating heat away from the electronic devices in one or more directions including above and below the electronic packages. The heat spreaders or metal frame structures may also be arranged to form electromagnetic shields that reduce crosstalk between the electronic devices within the electronic packages and to suppress unwanted emissions from either escaping or entering the electronic packages. |
| US11114360B1 |
Multi-die device structures and methods
Examples described herein provide techniques for multi-die device structures having improved gap uniformity between neighboring dies. In some examples, a first die and a second die are attached to an interposer. A first gap is defined by and between the first die and the second die. At least one of the first die or the second die is etched at the first gap. The etching defines a second gap defined by and between the first die and the second die. The first die, the second die, and the interposer are encapsulated with an encapsulant. The encapsulant is disposed in the second gap. |
| US11114358B2 |
Semi-conductor package
A semiconductor package includes a substrate, a plurality of electronic components mounted on a first surface of the substrate, and an encapsulant disposed on the first surface of the substrate so that at least one of the plurality of electronic components is embedded in the encapsulant. The substrate includes a flow preventing portion including at least one flow preventing groove disposed in the first surface and adjacent to the encapsulant and/or at least one dam disposed on the first surface and adjacent to the encapsulant. |
| US11114357B2 |
Methods and apparatus for package with interposers
An interposer may comprise a metal layer above a substrate. A dam or a plurality of dams may be formed above the metal layer. A dam surrounds an area of a size larger than a size of a die which may be connected to a contact pad above the metal layer within the area. A dam may comprise a conductive material, or a non-conductive material, or both. An underfill may be formed under the die, above the metal layer, and contained within the area surrounded by the dam, so that no underfill may overflow outside the area surrounded by the dam. Additional package may be placed above the die connected to the interposer to form a package-on-package structure. |
| US11114355B2 |
Power module and method for manufacturing power module
A power module includes a power wiring line provided with a power element, a glass ceramic multilayer substrate provided with a control element to control the power element, and a highly heat-conductive ceramic substrate made of a ceramic material having higher thermal conductivity than a glass ceramic contained in the glass ceramic multilayer substrate. The power wiring line is disposed on the highly heat-conductive ceramic substrate, and the glass ceramic multilayer substrate is disposed directly on the highly heat-conductive ceramic substrate. |
| US11114345B2 |
IC including standard cells and SRAM cells
An IC is provided. The IC includes a plurality of P-type gate-all-around (GAA) field-effect transistors (FETs). At least one first P-type GAA FET includes a plurality of silicon (Si) channel regions vertically stacked over an N-type well region. At least one second P-type GAA FET includes a plurality of silicon germanium (SiGe) channel regions vertically stacked over the N-type well region. |
| US11114344B1 |
IC die with dummy structures
Integrated circuit (IC) dies and method for manufacturing the same are described herein that mitigate pattern loading effects during manufacture. In one example, the IC includes a die body having a first circuit block separated from an adjacent second circuit block by a buffer zone. The first and second circuit blocks have first and second transistors that are at least partially fabricated from a gate metal layer and disposed immediately adjacent the buffer zone. A dummy structure is formed in the buffer zone and is also at least partially fabricated from the gate metal layer. An amount of gate metal layer material in the dummy structure is selected to mitigate differences in the amount of gate metal layer material in regions of first and second circuit blocks that neighbor each other across the buffer zone. |
| US11114339B2 |
Method for reducing metal plug corrosion and device
A method of manufacturing a device includes exposing at least one of a source/drain contact plug or a gate contact plug to a metal ion source solution during a manufacturing process, wherein a constituent metal of a metal ion in the metal ion source solution and the at least one source/drain contact plug or gate contact plug is the same. If the source/drain contact plug or the gate contact plug is formed of cobalt, the metal ion source solution includes a cobalt ion source solution. If the source/drain contact plug or the gate contact plug is formed of tungsten, the metal ion source solution includes a tungsten ion source solution. |
| US11114338B2 |
Fully aligned via in ground rule region
The present disclosure relates to semiconductor structures and, more particularly, to fully aligned via structures and methods of manufacture. The structure includes: a plurality of minimum ground rule conductive structures formed in a dielectric material each of which comprises a recessed conductive material therein; at least one conductive structure formed in the dielectric material which is wider than the plurality of minimum ground rule conductive structures; an etch stop layer over a surface of the dielectric layer with openings to expose the conductive material of the least one conductive structure and the recessed conductive material of a selected minimum ground rule conductive structure; and an upper conductive material fully aligned with and in direct electrical contact with the at least one conductive structure and the selected minimum ground rule conductive structure, through the openings of the etch stop layer. |
| US11114336B2 |
Semiconductor device and manufacturing method thereof
In a method of manufacturing a semiconductor device, a first source/drain structure is formed over a substrate, one or more first insulating layers are formed over the first source/drain structure, a first opening is formed in the one or more first insulating layers, the first opening is filled with a first conductive material to form a first lower contact in contact with the first source/drain structure, one or more second insulating layers are formed over the first lower contact, a second opening is formed in the one or more second insulating layers to at least partially expose the first lower contact, a first liner layer is formed on at least a part of an inner side face of the second opening, and the second opening is filled with a second conductive material to form a first upper contact in contact with the first lower contact without the first liner layer. |
| US11114335B1 |
Semiconductor device structure with air gap structure and method for forming the same
The present disclosure provides a semiconductor device structure with an air gap structure and a method for forming the semiconductor device structure. The semiconductor device structure includes a first conductive contact and a second conductive contact disposed over a semiconductor substrate. The semiconductor device structure also includes a first dielectric layer surrounding the first conductive contact and the second conductive contact, and a second dielectric layer disposed over the first conductive contact, the second conductive contact and the first dielectric layer. The first dielectric layer is separated from the semiconductor substrate by a first air gap structure, the first dielectric layer is separated from the second dielectric layer by a second air gap structure, and the air gap structures reduce capacitive coupling between conductive features. |
| US11114333B2 |
Method for depositing and reflow of a high quality etch resistant gapfill dielectric film
Methods for depositing a gapfill dielectric film that may be utilized for multi-colored patterning processes are provided. In one implementation, a method for processing a substrate is provided. The method comprises filling the one or more features of a substrate with a dielectric material. The dielectric material is a doped silicate glass selected from borophosphosilicate glass (BPSG), phosphosilicate glass (PSG), and borosilicate glass (BSG). The method further comprises treating the substrate with a high-pressure anneal in the presence of an oxidizer to heal seams within the dielectric material. The high-pressure anneal comprises supplying an oxygen-containing gas mixture on a substrate in a processing chamber, maintaining the oxygen-containing gas mixture in the processing chamber at a process pressure at greater than 2 bar and thermally annealing the dielectric material in the presence of the oxygen-containing gas mixture. |
| US11114332B2 |
Semiconductor on insulator structure comprising a plasma nitride layer and method of manufacture thereof
A method is provided for preparing a semiconductor-on-insulator structure comprising a silicon nitride layer deposited by plasma deposition. |
| US11114329B2 |
Methods for loading or unloading substrate with evaporator planet
Implementations of methods of loading an evaporator may include, using a robotic arm, removing a substrate from a cassette and centering the substrate on a substrate aligner. The method may include aligning the substrate using the substrate aligner. The substrate may also include removing the substrate from the substrate aligner using the robotic arm and loading the substrate into a first available pocket of a planet of an evaporator using the robotic arm. The method may also include rotating the planet to a second available pocket after detecting a presence of the substrate in the first available pocket. |
| US11114324B2 |
Defect candidate generation for inspection
Systems and methods for detecting defect candidates on a specimen are provided. One method includes, after scanning of at least a majority of a specimen is completed, applying one or more segmentation methods to at least a substantial portion of output generated during the scanning thereby generating two or more segments of the output. The method also includes separately detecting outliers in the two or more segments of the output. In addition, the method includes detecting defect candidates on the specimen by applying one or more predetermined criteria to results of the separately detecting to thereby designate a portion of the detected outliers as the defect candidates. |
| US11114319B2 |
Heat treatment apparatus and heat treatment method
A heat treatment apparatus includes a heating unit provided around a processing container accommodating a substrate; a plurality of blowing units configured to blow a cooling medium into a space between the processing container and the heating unit; and a shutter configured to simultaneously opens/closes at least two of the plurality of blowing units and including a slit formed corresponding to each of the blowing units. |
| US11114317B2 |
Method for cleaning semiconductor wafer and manufacturing method of semiconductor wafer using the method for cleaning
Provided is a method for cleaning a semiconductor wafer which can effectively reduce deposits on a main surface of a wafer. A method for cleaning a semiconductor wafer of the present disclosure includes supplying ozone water into a cleaning tank from a lower part of the cleaning tank with the ozone water overflowing from the upper part of the cleaning tank to outside the cleaning tank (first step), subsequently, stopping a supply of the ozone water (second step), subsequently, immersing a semiconductor wafer into the ozone water in the cleaning tank (third step), and subsequently, resupplying the ozone water into the cleaning tank from the lower part of the cleaning tank with the ozone water overflowing again from the upper part of the cleaning tank to outside the cleaning tank (fourth step). |
| US11114316B2 |
Substrate treating apparatus
Disclosed is a substrate treating apparatus that treats a substrate with processing liquids. The apparatus includes a substrate holder, an exterior cup, and an interior cup. The interior cup includes an interior cup body, and an interior cup outlet. The exterior cup includes an exterior cup body, an exterior bottom cup, a first drain outlet, a first exhaust port, a second drain outlet, a second exhaust port, and a separation partition. The apparatus further includes an annular member movable upwardly/downwardly, and a drive unit that causes the annular member to move to shift the interior cup body between a collecting position and a retracting position. |
| US11114310B1 |
Embedded packaging method capable of realizing heat dissipation
An embedded packaging method capable of realizing heat dissipation, includes: providing a frame having at least one through hole; attaching a tape on the first surface and placing a device in the through hole; completely filling the through hole with photosensitive insulating material, and completely curing the photosensitive insulating material in a lower portion of the through hole while not completely curing the photosensitive insulating material in an upper portion of the through hole and covered on the second surface; electroplating on the first surface to form a first metal layer, and electroplating on the upper surface and a side surface of the device, an upper surface of the photosensitive insulating material and an upper end face of each of the first copper pillars to form a second metal layer; and etching to obtain a first circuit layer and a second circuit layer, respectively. |
| US11114307B2 |
Method of producing a wafer from an ingot including a peel-off detecting step
A method of producing a wafer includes a peel-off layer forming step to form a peel-off layer in a hexagonal single-crystal ingot by applying a laser beam having a wavelength transmittable through the hexagonal single-crystal ingot while positioning a focal point of the laser beam in the hexagonal single-crystal ingot at a depth corresponding to the thickness of a wafer to be produced from an end face of the hexagonal single-crystal ingot, an ultrasonic wave generating step to generate ultrasonic waves from an ultrasonic wave generating unit positioned in facing relation to the wafer to be produced across a water layer interposed therebetween, thereby to break the peel-off layer, and a peel-off detecting step to detect when the wafer to be produced is peeled off the hexagonal single-crystal ingot by positioning an image capturing unit sideways of the wafer to be produced. |
| US11114304B2 |
Substrate processing method
A substrate processing method includes providing a processing target substrate having a pattern, forming a film on the substrate, forming a reaction layer on a surface layer of the substrate by plasma, and removing the reaction layer by applying energy to the substrate. |
| US11114297B2 |
Method for forming semiconductor film and film forming device
According to one embodiment of the present disclosure, a method for forming a crystallized semiconductor film having a specific grain size on a substrate includes: forming a seed layer on the substrate accommodated in a processing container; vacuuming an interior of the processing container to a medium vacuum or less in a state in which the substrate, on which the seed layer is formed, is accommodated in the processing container; forming an amorphous semiconductor film on the seed layer after vacuuming the interior of the processing container; and crystallizing the amorphous semiconductor film by heat processing. |
| US11114296B2 |
Semiconductor wafer, electronic device, method of performing inspection on semiconductor wafer, and method of manufacturing electronic device
A semiconductor substrate in includes a buffer layer and a first crystalline layer. A bandgap of the first crystalline layer is smaller than a bandgap of a second layer. When a semiconductor wafer is formed as a transistor wafer, a channel of a transistor is formed at or near an interface between the first crystalline layer and the second layer. With a first electrode and a second electrode provided and a third electrode provided, when space charge redistribution, for emitting electrons and holes from a bandgap of a crystal positioned in the spatial region, is achieved by applying negative voltage to the third electrode or by applying positive voltage to the second electrode with the first electrode serving as a reference, an electron emission speed in the space charge redistribution is higher than a hole emission speed. |
| US11114293B2 |
Space-time buffer for ion processing pipelines
A space-time buffer includes a plurality of discrete trapping regions and a controller. The plurality of discrete trapping regions is configured to trap ions as individual trapping regions or as combinations of trapping regions. The controller is configured to combine at least a portion of the plurality of trapping regions into a larger trap region; fill the larger trap region with a plurality of ions; split the larger trap region into individual trapping regions each containing a portion of the plurality of ions; and eject ions from the trapping regions. |
| US11114287B2 |
Radical output monitor for a remote plasma source and method of use
The present application discloses a device for radical monitoring a plasma source for a remote plasma source used in a processing system and includes at least one gas source, a plasma source body having at least one passage having at least one passage surface, a first thermal sensor receiver may be formed within the plasma source body proximate to the passage surface of the passage, a first thermal sensor positioned within the first thermal sensor receiver configured to measure a first temperature of the passage surface, a second thermal sensor receiver formed within the plasma source body proximate to the passage surface of the passage and configured to measure a second temperature of the passage surface of the passage at a second location. |
| US11114285B2 |
Apparatus for exhaust cooling
Embodiments disclosed herein include an abatement system for abating compounds produced in semiconductor processes. The abatement system includes an exhaust cooling apparatus located downstream of a plasma source. The exhaust cooling apparatus includes at least one cooling plate a device for introducing turbulence to the exhaust flowing within the exhaust cooling apparatus. The device may be a plurality of fins, a cylinder with a curved top portion, or a diffuser with angled blades. The turbulent flow of the exhaust within the exhaust cooling apparatus causes particles to drop out of the exhaust, minimizing particles forming in equipment downstream of the exhaust cooling apparatus. |
| US11114280B2 |
Impedance matching with multi-level power setpoint
In one embodiment, the present disclosure is directed to a method of impedance matching where an RF source is providing at least two non-zero pulse levels. For each of the at least two pulse levels, at a regular time interval, a control unit determines a parameter-related value that is based on a parameter related to the load, and repeatedly detects which of the at least two non-zero pulse levels is being provided by the RF source. Upon detecting one of the at least two non-zero pulse levels, for the detected pulse level, the control unit measures the parameter related to the load to determine a measured parameter value, determines the parameter-related value based on the measured parameter value, and alters the at least one EVC to provide the match configuration, the match configuration based on the parameter-related value. |
| US11114277B2 |
Dual cathode ion source
An ion source having dual indirectly heated cathodes is disclosed. Each of the cathodes may be independently biased relative to its respective filament so as to vary the profile of the beam current that is extracted from the ion source. In certain embodiments, the ion source is used in conjunction with an ion implanter. The ion implanter comprises a beam profiler to measure the current of the ribbon ion beam as a function of beam position. A controller uses this information to independently control the bias voltages of the two indirectly heated cathodes so as to vary the uniformity of the ribbon ion beam. In certain embodiments, the current passing through each filament may also be independently controlled by the controller. |
| US11114276B2 |
Apparatus, method, and program for processing and observing cross section, and method of measuring shape
An apparatus for processing and observing a cross-section includes: a sample bed holding a sample; a focused ion beam column radiating a focused ion beam to the sample; an electron beam column radiating an electron beam to the sample, perpendicularly to the focused ion beam; an electron detector detecting secondary electrons or reflection electrons generated from the sample; a irradiation position controller controlling irradiation positions of the focused ion beam and the electron beam based on target irradiation position information showing target irradiation positions of beams on the sample; a process controller controlling a cross-section-exposing process that exposes a cross-section of the sample by radiating the focused ion beam to the sample and a cross-section image-obtaining process that obtains a cross-section image of the cross-section by radiating the electron beam to the cross-section; and an image quality corrector correcting image quality of the cross-section image obtained. |
| US11114275B2 |
Methods and systems for acquiring electron backscatter diffraction patterns
Various methods and systems are provided for acquiring electron backscatter diffraction patterns. In one example, a first scan is performed by directing a charged particle beam towards multiple impact points within a ROI and detecting particles scattered from the multiple impact points. A signal quality of each impact point of the multiple impact points is calculated based on the detected particles. A signal quality of the ROI is calculated based on the signal quality of each impact point. Responsive to the signal quality of the ROI lower than a threshold signal quality, a second scan of the ROI is performed. A structural image of the sample may be formed based on detected particles from both the first scan and the second scan. |
| US11114272B2 |
Pulsed CFE electron source with fast blanker for ultrafast TEM applications
Charged particle beams (CPBs) are modulated using a beam blanker/deflector and an electrically pulsed extraction electrode in conjunction with a field emitter and a gun lens. With such modulation, CPBs can provide both pulsed and continuous mode operation as required for a particular application, while average CPB current is maintained within predetermined levels, such as levels that promote X-ray safe operation. Either the extraction electrode or the beam blanker/deflector can define CPB pulse width, CPB on/off ratio, or both. |
| US11114271B2 |
Sixth-order and above corrected STEM multipole correctors
Correctors for correcting axial aberrations of a particle-optical lens in a charged particle microscope system, according to the present disclosure include a first primary multipole that generates a first primary multipole field when a first excitation is applied to the first primary multipole, and a second primary multipole that generates a second primary multipole field when a second excitation is applied to the second primary multipole. The first primary multipole is not imaged onto the second primary multipole such that a combination fourth-order aberration is created. The correctors further include a secondary multipole for correcting the fourth-order aberration and the sixth-order aberration. Such correctors may further include a tertiary multipole for correcting an eighth-order aberration. |
| US11114265B2 |
Thermal management in high power RF MEMS switches
The present disclosure generally relates to a mechanism for making a MEMS switch that can switch large electrical powers. Extra landing electrodes are employed that provide added electrical contact along the MEMS device so that when in contact current and heat are removed from the MEMS structure close to the hottest points. |
| US11114263B2 |
Magnetic electrical switch
A magnetic electrical switch apparatus includes: a switch assembly that includes: a switch body housing including a stationary contact; a shaft configured to move relative to the switch body housing, the shaft including: a moveable contact; and a first magnet; and a movable support member including a second magnet. The moveable contact and the first magnet are configured to move with the shaft. Moving the movable support member moves the second magnet relative to the first magnet, and a magnetic interaction between the second magnet and the first magnet moves the moveable contact relative to the stationary contact to thereby change a state of the switch assembly. |
| US11114259B2 |
Switch body
The switch body includes: a wiring substrate where first to fourth fixed contact members are formed; and a movable contact member including a pressure receiving part opposite from the second fixed contact member, a first outer edge facing the first fixed contact member, and a second outer edge facing the third fixed contact member. The fourth fixed contact member is formed in a region outside a projection region being a projection of the movable contact member on the wiring substrate and is in a position facing the first outer edge when the second outer edge is moved to a region where the second fixed contact member is formed. |
| US11114256B2 |
Switching apparatus and associated switch
Implementations of the subject matter described herein provide a switching apparatus. The switching apparatus includes: a handle shaft coupled to a handle and arranged rotatable in a circumferential direction in response to an operation to the handle; and a locking plate arranged movable in a first direction in association with a rotation of the handle shaft. The handle shaft and the locking plate are operable to limit the rotation of the handle shaft when the handle shaft arrives at an off position of the switching apparatus. |
| US11114252B2 |
Method for manufacturing perovskite solar cell module and perovskite solar cell module
Disclosures of the present invention mainly describe a method for manufacturing perovskite solar cell module. At first, a laser scribing is adopted for forming multi transparent conductive films (TCFs) on a transparent substrate. Subsequently, by using a first mask, multi HTLs, active layers, and ETLs are sequentially formed on the TCFs. Consequently, by the use of a second make, each of the ETLs is formed with an electrically connecting layer thereon, such that a perovskite solar cell module comprising a plurality of solar cell units is hence completed on the transparent substrate. It is worth explaining that, during the whole manufacturing process, each of the solar cell units is prevented from receiving bad influences that are provided by laser scribing or manufacture environment, such that each of the solar cell units is able to exhibit outstanding photoelectric conversion efficiency. |
| US11114248B2 |
Thin film capacitor and manufacturing method thereof
A thin film capacitor includes a capacitance portion in which a plurality of electrode layers and dielectric layers are alternately laminated, a cover layer, an insulating layer, a via hole in which one electrode layer different from an uppermost electrode layer among the plurality of electrode layers is exposed at a bottom surface thereof, and an opening which is provided inside the via hole and in which the one electrode layer is exposed at a bottom surface thereof, and in which the cover layer and the insulating layer are exposed at a side surface. The opening includes a first opening portion which passes through the insulating layer and a second opening portion which is provided below the first opening portion and passes through the cover layer, and when an inner diameter of the first opening portion is D1 and an inner diameter of the second opening portion is D2, D1>D2. |
| US11114247B2 |
Multilayer ceramic capacitor having a capacitor element body inculding a dielectric layer and an internal electrode layer
The object of the present invention is to provide the multilayer ceramic capacitor having no deterioration of dielectric properties even in case an inhibitor of an internal electrode layer is pushed out to a dielectric layer when sintering. The multilayer ceramic capacitor 1 including a capacitor element body 10 comprising a dielectric layer 2 and an internal electrode layer 3 stacked in an alternating manner, wherein when Za represents Zr concentration of an dielectric particle in a center part 6 of the dielectric layer 2 and Zb represents Zr concentration of a dielectric particle near the internal electrode layer, 0<(Za/Zb)<1 is satisfied. |
| US11114243B2 |
Multilayer ceramic capacitor and method for producing the same
A multilayer ceramic capacitor has a cuboid or substantially cuboid multilayer body including a stack of dielectric layers, inner-electrode layers alternating with the dielectric layers and exposed at end surfaces of the multilayer body, and outer electrodes on the end surfaces and coupled to the inner-electrode layers. The dielectric layers are primarily made of barium titanate. At the interfaces between the dielectric and inner-electrode layers, protective layers containing calcium zirconate cover the inner-electrode layers. |
| US11114242B2 |
Capacitor having an oxide film on a surface of a conductive metal base material
A capacitor including a conductive metal base material having a porous part, a dielectric layer on the porous part, an upper electrode on the dielectric layer, and an oxide film on a surface of the conductive metal base material. The oxide film on the surface of the metal base material operates as an insulating layer between a lower electrode and an upper electrode, and the metal base material and the oxide film are preferably integrated so that separation of the insulating layer can be prevented, and a short circuit between the lower electrode and the upper electrode can be suppressed. |
| US11114241B2 |
Multilayer ceramic electronic component
A multilayer ceramic electronic component includes: a ceramic body including a dielectric layer and first and second internal electrodes alternately exposed to first and second outer surfaces with the dielectric layer interposed therebetween; and first and second external electrodes disposed on the first and second outer surfaces of the ceramic body so as to be connected to the first and second internal electrodes, respectively. The ceramic body further includes a protective layer including a protective layer dummy electrode disposed on at least one of upper and lower portions of the first and second internal electrodes, and the protective layer dummy electrode has a thickness ranging from greater than to 1.2 times or less a thickness of each of the first and second internal electrodes. |
| US11114228B2 |
Magnetic powder composite, antenna and electronic device, and method for producing the same
A magnetic compound having a small dielectric loss and an antenna constituted by the magnetic compound and an electronic device incorporating the antenna are provided by a metal magnetic powder which is well dispersed in a resin having small dielectric loss, and a magnetic powder composite including: a metal magnetic powder; and one or more elements selected from carboxylic acid or its anhydride, aromatic carboxylic acid ester, and a derivative thereof, having a property that real part μ′ permeability is 1.45 or more, tan δμ is 0.1 or less, tan δε is 0.05 or less at a measuring frequency of 2 GHz, when a magnetic powder composite is prepared by adding 5 parts by mass of one or more elements selected from the carboxylic acid or its anhydride, the aromatic carboxylic acid ester, and the derivative thereof to 100 parts by mass of the metal magnetic powder. |
| US11114226B2 |
Ultra-low cobalt iron-cobalt magnetic alloys
A magnetic iron alloy and process of making the same. The alloy includes iron, approximately 2 wt. % to approximately 8 wt. % cobalt, approximately 0.05 wt. % to approximately 5 wt. % manganese, and approximately 0.05 wt. % to approximately 5 wt. % silicon. The alloy may also include up to approximately 0.3 wt. % chromium, up to approximately 2 wt. % vanadium, up to approximately 1 wt. % nickel, up to approximately 0.05 wt. % niobium, and up to approximately 0.02 wt. % carbon. |
| US11114223B1 |
Three-dimensional thermistor platform and a method for manufacturing the same
A three-dimensional thermistor device and a manufacturing method thereof. The three-dimensional thermistor device comprising a thermistor array formed on a base layer extending in first and second directions. Where the thermistor array comprises: thermistor pattern layers and insulating layers stacked alternately on the base layer in a third direction; each thermistor pattern layer including a continuous electrically conductive first trace disposed along a first path extending in both the first and second directions, and each insulating layer including an electrically conductive first via extending through the insulating layer in the third direction to electrically connect the first traces to each other. Where successive electrical connections between the respective first vias on the stacked insulating layers and the respective first traces on the stacked thermistor layers form a continuous electrical first thermistor element extending in the first, second and third directions across multiple of the thermistor pattern layers. |
| US11114214B2 |
Aluminium conductors
A conductor is suitable for use in a high-voltage cable, and includes an aluminium alloy, in which the aluminium alloy comprises one or more of a group 3, 4 or 5 element and/or a lanthanide, each with a concentration in the range of 0.006 to 0.03% (m/m). The conductor has undergone a thermal treatment at a temperature from the range of 185° C. to 315° C. during a period from the range of 12 hours to 24 hours, so that the conductor has a conductivity of 61% IACS or more. |
| US11114210B2 |
Control rod operation monitoring method and control rod operation monitoring system
A control rod operation generates a rod insertion block signal during operation of a reactor. Four neutron detector assemblies including a plurality of LPRMs arranged in an axial direction of a core are arranged adjacent to a plurality of insertion selection control rods, respectively, which are simultaneously inserted into the core. Neutron flux ratio calculation units are arranged in each of the neutron detector assemblies, and ratios (neutron flux ratios BA/AA, CA/AA, and DA/AA) of an average LPRM signal of the respective LPRMs at positions B, C, and D to an average LPRM signal of the respective LPRMs at a position A which is closest to the control rod insertion end of the core are calculated. When the largest neutron flux ratio out of the neutron flux ratios exceeds a set neutron flux ratio, a rod insertion block signal which is generated by a local range rod insertion monitor is output. |
| US11114209B2 |
Nuclear reactor module with a cooling chamber for a drive motor of a control rod drive mechanism
In some embodiments, a nuclear reactor vessel comprises a containment vessel for a reactor pressure vessel (RPV); a control rod drive mechanism (CRDM) located in the containment vessel, the CRDM including drive motors configured to move control rods into and out of a nuclear reactor core located in the RPV; and a partition extending across a portion of the containment vessel configured to retain the drive motors in a separate fluid-tight barrier region within the containment vessel. Other embodiments may be disclosed and/or claimed. |
| US11114208B1 |
Methods and systems for predicting a diagnosis of musculoskeletal pathologies
Disclosed herein is a clinical decision support system for predicting a diagnosis of musculoskeletal pathologies, in accordance with some embodiments. Accordingly, the clinical decision support system may include a communication device, a processing device, and a storage device. Further, the communication device may be configured for transmitting questions to a first device and receiving responses corresponding to the questions from the first device. Further, the communication device may be configured for transmitting a prediction to a second device. Further, the processing device may be communicatively coupled with the communication device. Further, the processing device may be configured for analyzing the responses based on a knowledge repository and generating the prediction of a diagnosis of a musculoskeletal pathology using a machine learning model based on the analyzing. Further, the storage device may be communicatively coupled with the processing device. Further, the storage device may be configured for retrieving the knowledge repository. |
| US11114205B2 |
Infection detection and differentiation systems and methods
Embodiments may include an automated method for evaluating an infection status associated with a blood sample obtained from an individual. Methods may include determining, using a first module, a white blood cell concentration associated with the blood sample. In addition, methods may include determining, using a second module, a monocyte volume measure associated with the blood sample. Methods may include evaluating, using a data processing module, the infection status associated with the blood sample. The data processing module may include a processor and a computer readable medium. The computer readable medium may be programmed with a computer application. This computer application, when executed by the processor, may cause the processor to calculate a parameter using a function comprising the white blood cell concentration and the monocyte volume measure. The computer application may also cause the processor to evaluate the infection status associated with the blood sample based on the parameter. |
| US11114204B1 |
System to determine inpatient or outpatient care and inform decisions about patient care
A computer-based system to determine whether patients should be treated as inpatients or outpatients. The invention makes personalized predictions about the risk and timing of adverse outcomes for the patient, and further assesses how this risk and timing may vary if the patients are treated as inpatients or outpatients. This information informs how patients are assigned to an appropriate therapy. The invention includes logic relevant to predicting patient risk, decoupling patient risk into components inherent to the patient as well as additions/subtractions associated with the choice of treatment, and predicting the timing of adverse outcomes given censored data. The invention can be extended to use in a broad range of other application domains (e.g., matching learners to courses either offered in-classroom or online for education). |
| US11114203B1 |
Senior living engagement and care support platforms
Provided herein is an engagement and care support platform (“ECSP”) computer system including at least one processor in communication with at least one memory device for facilitating senior user engagement. The processor is programmed to: (i) register a user through an application, (ii) register a caregiver associated with the user through the application, (iii) generate a senior profile based upon user personal and scheduling data, (iv) build a daily interactive user interface that reflects the senior profile, (v) display the daily interactive user interface at a first client device associated with the user, (vi) cause the first client device to initiate a daily interaction prompt to the user, (vii) determine whether any user interaction was received in response to the daily interaction prompt, and (viii) transmit a daily update message to a second client device associated with the caregiver, including an indication of whether any user interaction was received. |
| US11114198B2 |
Monitoring an individual's condition based on models generated from e-textile based clothing
Systems and methods for monitoring an individual's condition based on model generated from e-textile based clothing are described. A computer-implemented a method includes: obtaining, by a computer device, sensor data from an e-textile garment worn by a user; generating, by the computer device, a wireframe model of the user based on the sensor data; determining, by the computer device, a user activity; determining, by the computer device, a user condition based on the user activity and a the wireframe model; and automatically contacting, by the computer device, an assistance provider system based on determining the user condition warrants assistance. |
| US11114195B2 |
Surgical instrument with a tissue marking assembly
A surgical instrument includes an end effector and a marking assembly. The end effector includes a first jaw; a second jaw movable relative to the first jaw to grasp tissue therebetween; and a tissue-treatment mechanism configured to apply a tissue treatment to tissue grasped between the first jaw and the second jaw. The marking assembly configured to apply a distinct marking to the tissue unique to each tissue treatment application, wherein the distinct marking distinguishes the tissue treatment application from other tissue treatment applications. |
| US11114190B1 |
Medical treatment application for optimizing medical patients visits based on known preferences and other selection criteria
Medical services are offered by various facilities near a patient's residence. The number of facility options continues to grow and the patients can now identify rankings and offer their own input regarding satisfaction of certain facilities. One example method of operation provides identifying a number of feedback messages associated with a particular medical facility, parsing the feedback messages to identify negative feedback associated with the feedback messages, notifying the medical facility of the negative feedback, and transmitting suggestions to increase productivity and reduce subsequent negative feedback messages for subsequent patient visits to the medical facility. |
| US11114189B2 |
Generating abnormality data for a medical scan via a generic model and a fine-tuned model
A multi-model medical scan analysis system is operable to generate a generic model by performing a training step on image data of a plurality of medical scans and corresponding labeling data. A plurality of fine-tuned models corresponding to one of a plurality of abnormality types can be generated by performing a fine-tuning step on the generic model. Abnormality detection data can be generated for a new medical scan by performing utilizing the generic model. One of the plurality of abnormality types is determined to be detected in the new medical scan based on the abnormality detection data, and a fine-tuned model that corresponds to the abnormality type is selected. Additional abnormality data is generated for the new medical scan by utilizing the selected fine-tuned model. The additional abnormality data can be transmitted to a client device for display via a display device. |
| US11114187B1 |
System and method for managing operating data for a medical environment
Disclosed herein are systems and methods of generating and displaying health-related information to a user, the health-related information being associated with a desired medical operating environment and/or a particular healthcare operating environment and/or an individual such as a patient, caregiver, staff member, etc. |
| US11114186B2 |
Automated clinical documentation system and method
A method, computer program product, and computing system for proactive encounter scanning is executed on a computing device and includes obtaining encounter information of a patient encounter. The encounter information is proactively processed to determine if the encounter information is indicative of one or more medical conditions and to generate one or more result set. The one or more result sets are provided to the user. |
| US11114185B1 |
Method and apparatus for defining a level of assurance in a link between patient records
A method, computing device and computer program product are provided to define a level of assurance in one or more links between patient records that relate to the same person based upon external information. In the context of a method, one or more links are identified between a patient record associated with a person and pre-existing patient records. Each pre-existing patient record has a plurality of demographic attributes associated with a patient. The method identifies one or more links based upon an analysis of the demographic attributes of the person and the respective patients associated with the pre-existing patient records. The method receives external information regarding a relationship between the person and the respective patients associated with the pre-existing patient records or regarding confirmation of an identity of the person. The method also defines a level of assurance in the respective one or more links based upon the external information. |
| US11114179B1 |
Systems and methods for detecting counterfeit memory
A system for testing memory includes logic that is configured to perform various normal memory operations (e.g., erase, read and write operations) on a memory device and to determine operational parameters associated with the memory operations. As an example, the amount of time to perform one or more memory operations may be measured, or a number of errors resulting from the memory operations may be counted or otherwise determined. One or more of the operational parameters may then be analyzed to determine whether they are in a range expected for counterfeit memory. If so, the logic determines that the memory under test is counterfeit (e.g., is recycled or counterfeit) and provides a notification about the authenticity of the memory. The logic may also estimate the age of the memory based on the operational parameters. |
| US11114174B2 |
Memory system processing request based on inference and operating method of the same
A memory system includes a memory device including a plurality of blocks, a buffer storing degradation information regarding at least one of the plurality of blocks, and a memory controller configured to determine a degradation level of the block corresponding to the read request based on the degradation information, in response to a read request from a host, infer a read level corresponding to the read request based on the degradation level, and read data from the memory device based on the read level. |
| US11114166B2 |
Semiconductor memory device
According to one embodiment, a semiconductor memory device includes a bit line electrically connected to a memory cell, a first node electrically connected to the bit line, a first driver configured to increase a voltage of the first node to a first voltage, a first buffer circuit configured to store data based on the voltage of the first node, a bus electrically connected to the first buffer circuit, a first transistor electrically connected between the first node and the bus, and a second buffer circuit electrically connected to the bus. The first buffer circuit is electrically connected to an input terminal of the first driver. The first driver changes a voltage of the bus based on the data stored in the first buffer circuit. |
| US11114165B2 |
Semiconductor devices having increased efficiency in generation of gate-induced drain leakage current without insulation deterioration and methods of operating the same
A semiconductor device includes a source layer; a plurality of channel structures; a plurality of gate electrodes; and a common source line. At least one of the plurality of gate electrodes provides a GIDL line. For an erasing operation, an erasing voltage applied to the common source line reaches a target voltage, and, after the erasing voltage reaches the target voltage, a step increment voltage is applied to the erasing voltage, such that the erasing voltage has a voltage level higher than a voltage level of the target voltage. After the step increment voltage has been applied for a desired time period, the voltage level of the erasing voltage is decreased to the target voltage level for the remainder of the erasing operation. |
| US11114164B2 |
Programming nonvolatile memory cells through a series of predetermined threshold voltages
Adaptive write operations for non-volatile memories select programming parameters according to monitored programming performance of individual memory cells. In one embodiment of the invention, programming voltage for a memory cell increases by an amount that depends on the time required to reach a predetermined voltage and then a jump in the programming voltage is added to the programming voltage required to reach the next predetermined voltage. The adaptive programming method is applied to the gate voltage of memory cells; alternatively, it can be applied to the drain voltage of memory cells along a common word line. A circuit combines the function of a program switch and drain voltage regulator, allowing independent control of drain voltage of selected memory cells for parallel and adaptive programming. Verify and adaptive read operations use variable word line voltages to provide optimal biasing of memory and reference cells during sensing. |
| US11114160B2 |
Memory device for compensating for current of off cells and operating method thereof
A memory device includes a memory cell array including a plurality of memory cells arranged at points where a plurality of word lines and a plurality of bit lines intersect; a sense amplifier configured to amplify, in a read operation mode of the memory device, a voltage difference value between a voltage of a selected word line connected to a selected memory cell of the plurality of memory cells and a reference voltage; and a leakage current compensation circuit connected to a selected word line path between the selected memory cell and the sense amplifier and configured to compensate for a total leakage current generated by unselected memory cells connected to the selected word line in the read operation mode. |
| US11114156B2 |
Read spike mitigation in integrated circuit memory
An integrated circuit memory device, having: a first wire; a second wire; a memory cell connected between the first wire and the second wire; a first voltage driver connected to the first wire; and a second voltage driver connected to the second wire. During an operation to read the memory cell, the second voltage driver is configured to start ramping up a voltage applied on the second wire after the first voltage driver starts ramping up and holding a voltage applied on the first wire. |
| US11114154B2 |
Voltage retention techniques
Various implementations described herein are directed to a device having voltage generator circuitry that provides a temperature-compensated voltage. The device may include amplifier circuitry that receives the temperature-compensated voltage from the voltage generator circuitry and provides an output voltage based on the temperature-compensated voltage. The device may include voltage retention circuitry that receives the output voltage from the amplifier circuitry and provides a retention voltage to memory based on the output voltage. |
| US11114149B2 |
Operation methods of ferroelectric memory
Embodiments of operation methods of ferroelectric memory are disclosed. In an example, a method for reading ferroelectric memory cells is disclosed. The ferroelectric memory cells include a first set of ferroelectric memory cells and a second set of ferroelectric memory cells. In a first cycle, first data in a first ferroelectric memory cell of the first set of ferroelectric memory cells is sensed. In a second cycle subsequent to the first cycle, the sensed first data is written back to the first ferroelectric memory cell, and second data in a second ferroelectric memory cell of the second set of ferroelectric memory cells is simultaneously sensed. |
| US11114145B2 |
Three-dimensional magnetic device and magnetic memory
Disclosed is a three-dimensional magnetic device based on a spin Hall effect which includes an internal electrode, at least one magnetic junction and at least one external electrode. The internal electrode, the at least one magnetic junction and the at least one external electrode have columnar structures. Each of the at least one magnetic junction comprises a magnetic free layer, a magnetic reference layer and a non-magnetic spacing layer between magnetic free layer and magnetic reference layer. The magnetic free layer is in contact with internal electrode, and the magnetic reference layer in each of the at least one magnetic junction is in contact with a corresponding one of the at least one external electrode. The three-dimensional magnetic device may be stacked in a normal direction of the bottom surface of the internal electrode. Magnetization reversal of three-dimensional magnetic device may be realized by a combination of a spin-orbit torque and a spin transfer torque. The magnetic device has advantages of reduced heating, improved reliability and stability, high storage density while ensuring thermal stability. |
| US11114143B2 |
Bipolar decoder for crosspoint memory cells
A memory decoder enables the selection of a conductor of a row or column of a crosspoint array memory. The decoder includes a circuit to apply a bias voltage to select or deselect the conductor. The conductor can be either a wordline or a bitline. The decoder also includes a select device to selectively provide both high voltage bias and low voltage bias to the circuit to enable the circuit to apply the bias voltage. Thus, a single end device provides either rail to the bias circuit. |
| US11114141B2 |
Clock generating circuit and memory device including the same
A memory device includes a clock generating circuit suitable for generating a plurality of internal clock signals based on an external clock signal during an output period of read data, in response to a read command, and a data strobe output circuit suitable for outputting a first data strobe signal to a data strobe pad in response to the internal clock signals, wherein the internal clock signals toggle regardless of the output period of the read data, in response to a test mode signal. |
| US11114138B2 |
Data structures with multiple read ports
A memory structure having 2m read ports allowing for concurrent access to n data entries can be constructed using three memory structures each having 2m−1 read ports. The three memory structures include two structures providing access to half of the n data entries, and a difference structure providing access to difference data between the halves of the n data entries. Each pair of the 2m ports is connected to a respective port of each of the 2m−1-port data structures, such that each port of the part can access data entries of a first half of the n data entries either by accessing the structure storing that half directly, or by accessing both the difference structure and the structure containing the second half to reconstruct the data entries of the first half, thus allowing for a pair of ports to concurrently access any of the stored data entries in parallel. |
| US11114131B2 |
System for creating an interactive video using a markup language
A system creating an interactive video using a markup language is disclosed. The disclosed system receives a video request including a set of source scene IDs arranged in a predetermined ordering. The system retrieves a set of source scenes associated with the set of source scene IDs and generates video scenes in the form of a Hypertext Markup Language (HTML) page for the set of source scenes. Each of the generated video scenes includes one or more interactive HTML elements and one or more animations. The system then generates a scene collection to include the video scenes arranged based on the predetermined ordering and renders the video scenes in the scene collection. |
| US11114130B2 |
Method and device for processing video
The present disclosure provides a method and device for processing a video. The method includes: determining a special effect video frame of a video, where a target feature area of the special effect video frame includes a preset special effect map; and modifying a display effect of the special effect map upon determining that a shielded area exists in the target feature area. |
| US11114129B2 |
Information processing apparatus and information processing method
An information processing apparatus that displays video content on a first display region in a display section as a first video, displays the above-mentioned video content on a second display region in the above-mentioned display section as a second video delayed from the above-mentioned first video by a predetermined time, and sets a first tag inputted by a user into the above-mentioned first video and a second tag inputted by the above-mentioned user into the above-mentioned second video as tags for the above-mentioned video content. |
| US11114127B2 |
Magnetic disk device having first and second assist elements and write operation method
According to one embodiment, a magnetic disk device includes: a disk; a head including a main magnetic pole, a write shield that faces the main magnetic pole in a first direction and is separated from the main magnetic pole by a gap, a first assist element that is disposed in the gap and a second assist element that is disposed in the gap and is positioned relative to the first assist element in a second direction intersecting the first direction; and a controller configured to: cause a first assist energy from the first assist element to be applied to the disk and affect a coercive force of the disk; and cause a second assist energy from the second assist element to be applied to the disk and affect a coercive force of the disk, wherein the first assist energy is different from the second assist energy. |
| US11114126B2 |
Disk drive server
A server box embodiment is disclosed that generally comprises an array of dummy HDDs that share a common set of universal disk drive components in a master components module, or power module. Each dummy HDDs is constructed without expensive onboard chipsets that control the normal functionality of a standard HDD. By sharing expensive chipsets in a master components module (power module) money can be saved in building and selling the dummy HDD server. Embodiments envision a power module possessing the needed chipset functionality that is missing in a dummy HDD. The power module can be made to move from dummy HDD to dummy HDD supplying the necessary chipset in a shared manner when data is being stored or retrieved for client or end-user. |
| US11114125B1 |
Disc device with head placement responsive to shock detection
According to one embodiment, a disk device includes a base, a discoidal recording medium including an innermost circumferential portion and an outer circumferential edge, a head, a head actuator provided pivotably on the base and supporting the head movably, a first sensor which detects a shock and a drive unit which pivots, when the shock detected by the first sensor is greater than a predetermined value and the head is located at a position less than a predetermined distance from the innermost circumferential portion, the head actuator to place the head at a position more than the predetermined distance which satisfies a conditional formula below. D = 9.83 e - 210 t 2 G |
| US11114119B1 |
Thermally-assisted magnetic recording head including a main pole and a plasmon generator
A thermally-assisted magnetic recording head includes a medium facing surface, a main pole, a waveguide, and a plasmon generator. The plasmon generator includes a first metal layer and a second metal layer. The first metal layer includes a plasmon exciting portion on which surface plasmons are excited. The second metal layer is located on the first metal layer, and includes a bottom surface in contact with the first metal layer, a top surface located on a side opposite to the bottom surface, a front end face that is located in the medium facing surface and generates near-field light from the surface plasmons, and a connecting surface that connects the top surface and the front end face. The connecting surface includes an inclined portion inclined relative to a direction perpendicular to the medium facing surface. |
| US11114118B2 |
Disk device
According to one embodiment, a disk device includes a first actuator assembly and a second actuator assembly which are respectively supported by a first bearing unit and a second bearing unit to be rotatable about a support shaft. The first bearing unit includes a first sleeve and a ball bearing. The second bearing unit includes a second sleeve and a ball bearing. The first sleeve includes a first end surface opposed to the second sleeve and an annular first step projecting from the first end surface, and the second sleeve includes a second end surface opposed to the first step with a gap and an annular second step projecting from the second end surface. The second step is opposed to the first step and the first end surface with a gap. |
| US11114117B1 |
Process for manufacturing magnetic head having a servo read transducer structure with dielectric gap liner and a data read transducer structure with an embedded wear layer between thin and thick shield portions
A method, in accordance with one aspect of the present invention, includes forming various layers of a data read transducer structure and of a lower shield layer of a servo read transducer structure in an array with the data read transducer structure in common fabrication steps. The formed dielectric layers of both read transducer structures, coupled with the unique shield structure of the data read transducer structure, work in concert to provide robust resistance to asperity-induced shorting while also lower smaller read gap thickness. |
| US11114110B2 |
Noise attenuation at a decoder
There are provided examples of decoders and decoding methods. One decoder includes: a bitstream reader to provide a version of an input signal as a sequence of frames, each frame subdivided into a plurality of bins, each bin having a sampled value; a context definer to define a context for one bin under process, the context including at least one additional bin in a predetermined positional relationship with the bin under process; a statistical relationship and information estimator to provide statistical relationships between the bin under process and the at least one additional bin; and a value estimator to process and acquire an estimate of the value of the bin. There is included a noise relationship and information estimator providing statistical relationships and information regarding noise, which includes a noise matrix estimating relationships among noise signals among the bin under process and the at least one additional bin. |
| US11114107B2 |
Audio decoder for interleaving signals
A method for decoding an encoded audio bitstream in an audio processing system is disclosed. The method includes extracting from the encoded audio bitstream a first waveform-coded signal comprising spectral coefficients corresponding to frequencies up to a first cross-over frequency for a time frame and performing parametric decoding at a second cross-over frequency for the time frame to generate a reconstructed signal. The second cross-over frequency is above the first cross-over frequency and the parametric decoding uses reconstruction parameters derived from the encoded audio bitstream to generate the reconstructed signal. The method also includes extracting from the encoded audio bitstream a second waveform-coded signal comprising spectral coefficients corresponding to a subset of frequencies above the first cross-over frequency for the time frame and interleaving the second waveform-coded signal with the reconstructed signal to produce an interleaved signal for the time frame. |
| US11114106B2 |
Vector quantization of algebraic codebook with high-pass characteristic for polarity selection
Provided are a vector quantization device, a voice coding device, a vector quantization method, and a voice coding method which enable a reduction in the calculation amount of voice codec without deterioration of voice quality. In the vector quantization device, a first reference vector calculation unit (201) calculates a first reference vector by multiplying a target vector (x) by an auditory weighting LPC synthesis filter (H), and a second reference vector calculation unit (202) calculates a second reference vector by multiplying an element of the first reference vector by a filter having a high pass characteristic. A polarity preliminary selection unit (205) generates a polar vector by disposing a unit pulse having a positive or negative polarity, which is selected on the basis of the polarity of an element of the second reference vector, in the position of said element. |
| US11114104B2 |
Preventing adversarial audio attacks on digital assistants
Aspects of the present invention disclose a method for preventing adversarial audio attacks through detecting and isolating inconsistencies utilizing beamforming techniques and IoT devices. The method includes one or more processors identifying an audio command received by a listening device. The method further includes determining a source location of the audio command utilizing a sensor array of the listening device. The method further includes determining a location of a user in relation to the listening device based on data of an Internet of Things (IoT) device. The method further includes determining an inconsistency between the determines source location and the determined location of the user based at least in part on data of the sensor array and data of the IoT device. |
| US11114103B2 |
Systems, methods, and computer-readable storage media for audio signal processing
Systems and methods are provided for improving audio signal processing by receiving an audio signal; obtaining a plurality of multi-dimensional features based on the audio signal; obtaining a plurality of segment-level representations based on the plurality of multi-dimensional features; obtaining an utterance-level representation based on the plurality of segment-level representations; and recognizing a speaker from the audio signal based on the utterance-level representation. |
| US11114101B2 |
Speech recognition with image signal
A method of speech recognition and person identification based thereon, comprising: recording speech from a speech signal using a microphone; illuminating a speaking mouth; recording a degree of light reflected by the mouth from a reflection signal using a sensor; and recording combined parameters of the speech signal and of the reflection signal, and coupling them to letters associated therewith, per predetermined time duration; comparing a combination occurring in speech of parameters of the speech signal and of the reflection signal to the recorded combined parameters of the speech signal and of the reflection signal which are coupled to letters; and deciding on the basis of the comparison to which letter the combination occurring in the speech of parameters of the speech signal and of the reflection signal corresponds, using block-width modulation of the reflection signal. |
| US11114097B2 |
Notification system, notification method, and non-transitory computer readable medium storing program
Included are calling means (110) for making a call to a communication terminal (200) possessed by a target person, a database (120) configured to store in advance speech data of the target person, comparison means (130) for comparing a tone of speech data transmitted from the communication terminal with a tone of the speech data stored in the database (120), and notification means (140) for issuing a predetermined notification when a difference between the tone of the speech data transmitted from the communication terminal (200) and the tone of the speech data stored in the database (120) is determined to be outside a predetermined range as a result of the comparison by the comparison means (130). With this configuration, it is possible to obtain correct information about a condition of the target person. |
| US11114096B2 |
Mitigation of client device latency in rendering of remotely generated automated assistant content
Implementations relate to mitigating client device latency in rendering of remotely generated automated assistant content. Some of those implementations mitigate client device latency between rendering of multiple instances of output that are each based on content that is responsive to a corresponding automated assistant action of a multiple action request. For example, those implementations can reduce latency between rendering of first output that is based on first content responsive to a first automated assistant action of a multiple action request, and second output that is based on second content responsive to a second automated assistant action of the multiple action request. |
| US11114093B2 |
Intelligent voice recognizing method, apparatus, and intelligent computing device
An intelligent voice recognition method, voice recognition apparatus and intelligent computing device are disclosed. An intelligent voice recognition method according to an embodiment of the present invention obtains a microphone detection signal, recognizes a voice of a user from the microphone detection signal and outputs a response related to the voice on the basis of a result of recognition of the voice, wherein the microphone detection signal includes noise, and a microphone detection signal including only the voice obtained by removing the noise from the microphone detection signal is recognized. Accordingly, only a voice of a user can be effectively separated from a microphone detection signal detected through a microphone of the voice recognition apparatus. One or more of the voice recognition devices, intelligent computing devices, and servers of the present invention may include artificial intelligence modules, drones (Unmanned Aerial Vehicles, UAVs), robots, Augmented Reality (AR) devices, and virtual reality (VR) devices, devices related to 5G services, and the like. |
| US11114091B2 |
Method and system for processing audio communications over a network
A method of processing audio communications over a network, comprising: at a first client device: receiving a first audio transmission from a second client device that is provided in a source language distinct from a default language associated with the first client device; obtaining current user language attributes for the first client device that are indicative of a current language used for the communication session at the first client device; if the current user language attributes suggest a target language currently used for the communication session at the first client device is distinct from the default language associated with the first client device: obtaining a translation of the first audio transmission from the source language into the target language; and presenting the translation of the first audio transmission in the target language to a user at the first client device. |
| US11114089B2 |
Customizing a voice-based interface using surrounding factors
A method, system, and computer program product for applying a profile to an assistive device based on a multitude of cues includes: gathering audio inputs surrounding an assistive device; analyzing, by the assistive device, the audio inputs; determining, based on the analyzing, scenario cues; classifying a current environment surrounding the assistive device from the scenario cues; comparing the current environment to device profiles of the assistive device; determining, based on the comparing, a matching profile; and, in response to determining the matching profile, executing the matching profile on the assistive device. |
| US11114080B2 |
Duct sound absorber
Sound absorption units for fluid ducts include two acoustically coupled pairs of Helmholtz resonators. The two resonators within each pair have identical resonance frequency, however the upstream resonator within each pair is partly filled with an acoustically lossy porous material, so that the upstream resonator within each pair has greater acoustic loss than its coupled downstream resonator. The upstream pair of resonators has a relatively low resonance frequency, while the downstream pair of resonators has a relatively high resonance frequency. The combination of frequency mismatch between the resonator pairs, and loss mismatch within each resonator pair, produces consistently high sound absorption across a broad frequency spectrum. |
| US11114077B2 |
Chromatic-emphasis hybrid-diatonic leverless keyboard
The present invention is a chromatic-emphasis hybrid-diatonic leverless keyboard configured to provide an extension, duplication, or representation of both heptatonic and pentatonic keys on the leverless keyboard. The extension enables the user to shift the physiological center of gravity for the keyboard to the area where pentatonic and heptatonic keys share space and are more isomorphic, thus assisting in gaining and applying understanding of the chromatic equality of the twelve tonalities in standard equal temperament, and in gaining and applying understanding of the one-dimensional nature of music. |
| US11114074B2 |
Media-media augmentation system and method of composing a media product
A media-content augmentation system includes a processing system that receives input data in the form of temporally-varying events data. The processing system resolves the input into one or more categorized contextual themes, correlates the themes with metadata associated with at least one reference media file, and then splices or fades together selected parts of the media file, thus generating as an output, a media product in which transitions between its contextual themes are aligned with selected temporal events in the input data. The temporarily-varying events take the form of a beginning and an end in the case of a sustained feature, or a specific point in time for a hit point. A method aligns sections in digital media files with temporally-varying events data to compose a media product. The system augments a sensory experience of a user by dynamically changing and then playing selected media files within the context of the categorized themes input to the processing system. |
| US11114073B2 |
Storage case for musical accessories
Example aspects of a storage case for musical accessories and a method for using a storage case for musical accessories are disclosed. The storage case for musical accessories can comprise a compartment configured to receive a musical accessory therein, the compartment comprising a floor and a sidewall enclosure extending from the floor, the sidewall enclosure defining an opening distal from the floor; and a lid defining a first orifice configured to receive the musical accessory inserted therethrough, the lid movable between a closed position, wherein the opening is covered by the lid, and an open position, wherein the opening is uncovered by the lid. |
| US11114069B2 |
Private virtualized displays
In some examples, a non-transitory machine readable medium storing instructions executable by a processor to store display information in a private memory hidden from an operating system (OS), and divisibly virtualize a contiguous planar display into a first area as a main display and a second area as a second display separate from the main display, where the continuous planar display is divisibly virtualized responsive to exposure of the display information to the OS or the display information being directly provided to a graphics processing unit (GPU). |
| US11114066B2 |
Path display device and path display method
The operability of path management performed in units of apparatuses subdivided by disaggregation is improved.A path display apparatus 1 which displays a path configured for a plurality of optical network apparatuses subdivided by disaggregation includes a storage unit 10 that stores configuration information 11 indicating a section of each of the optical network apparatuses; a grouping unit 21 that identifies a high-speed port of a route apparatus (DIR: Direction) which is the optical network apparatus, and determines a first group to which optical network apparatuses divided by the identified high-speed port belong, based on the configuration information 11; and a display control unit 22 that displays, on a screen, a symbol of each of the optical network apparatuses, a symbol of the section, and a symbol of the first group. |
| US11114065B1 |
Computer having a remote second display
A personal computer provides a video signal to dual first and second displays, the second display remote from the computer receiving its video signal by telemetry instead of through a video cable. A video signal transmitter connects to the computer through a transmitter cable plugged into a computer display port. The cable from the second display that would otherwise be plugged into the computer video port is instead connected to a video signal receiver. The signal is then transmitted from the computer by the connected transmitter to the receiver connected to the second display. The second display may detachably mount to the back of the first display. |
| US11114064B2 |
Display device and driving method thereof
A display device includes a pixel circuit and receiving antenna units. The pixel circuit is disposed in the active area, and the pixel circuit includes pixel units. The receiving antenna units are electrically connected to the pixel circuit. The receiving antenna units include a first receiving antenna unit and a second receiving antenna unit. The first receiving antenna unit is configured to provide a first data signal to the pixel units in a first part, and the pixel units in the first part are configured to illuminate at a first brightness. The second receiving antenna unit is configured to provide a second data signal to the pixel units in a second part, and the pixel units in the second part are configured to illuminate at a second brightness. |
| US11114059B2 |
System and method for color calibration
Described herein is a color calibration system and method including a display device including a non-volatile memory, a display screen, and a target sensor. The system and method further can include a computing system in communication with the display device and including a processor, a persistent memory, a temporary memory, and a reference sensor. A calibration matrix can be derived using the reference and target data captured by the target and reference sensors. The calibration matrix can be used to calibrate the target sensor using the calibration matrix. |
| US11114058B2 |
Method of V-By-One (VBO) signal processing for saving hardware resources, device, and terminal thereof
A method of V-By-One (VBO) signal processing for saving hardware resources, and a device and terminal thereof are provided. The method includes steps of: obtaining a plurality of VBO signals transmitted through data lanes respectively and having a same descrambling reset flag; resolving each of the VBO signals to obtain a valid data strobe signal; selecting one valid data strobe signal as a synchronization strobe signal and performing time-delay processing to obtain a delay strobe signal; and writing signals alternately into a first register and a second register under control of the synchronization strobe signal and reading signals alternately from the second register and the first register under control of the delay strobe signal based on the same descrambling reset flag. |
| US11114057B2 |
Smart gate display logic
Provided is a method of reducing power consumption by a display device including a display logic for processing pixel data, and a display panel including a plurality of pixels, the method including receiving the pixel data corresponding to the plurality of pixels, determining whether a number of consecutive pixels of the plurality of pixels that correspond to identical data of the pixel data reaches a threshold number, and powering down the display logic when the number of consecutive pixels exceeds the threshold number. |
| US11114055B2 |
Shift register, display panel, and driving method of shift register
Disclosed are a shift register, a display panel, and a driving method for a shift register. The driving method is applied in a display panel using a GOA technology. The display panel has a plurality of cascaded shift registers. The shift register includes an output circuit and a pull-down feedback circuit. The pull-down feedback circuit includes a first switch and a second switch. A control end of the first switch receives a quiescent point voltage signal of a subsequent stage as a feedback signal, so as to pull down the quiescent point voltage to a gate scan signal of a subsequent stage. A control end of the second switch receives a gate scan signal of a subsequent stage as a feedback signal, so as to pull down the gate scan signal of the gate line to a low preset level. |
| US11114053B2 |
Anti-peeping circuit, driving method thereof, and display device
An anti-peeping circuit for a display panel, a driving method thereof, and a display device. The anti-peeping circuit includes a waveform generator. The waveform generator is connected to an anti-peeping electrode of the display panel, and the waveform generator is configured to generate an anti-peeping signal and output the anti-peeping signal to the anti-peeping electrode of the display panel. |
| US11114043B2 |
Blue light compensation film and OLED display
The present invention provides a blue light compensation film and an OLED display. The blue light compensation film of the present invention effectively absorbs blue light with wavelength longer than blue wavelength and excite blue light by using a blue light upconversion luminescent material, and effectively improves color shift white OLED device caused by short lifespan of blue electroluminescent material to achieve blue light compensation of the white OLED device and solve the of yellowing in traditional OLED display with age. The OLED display of the present invention comprises the blue light compensation film to avoid color shift problem and provides good display quality. |
| US11114040B2 |
Pixel driving method
The present application discloses a pixel driving method, comprising: in a pre-charging phase, turning on a second driving branch to write a preset voltage into a second data line, and then turning off the second driving branch and turning on a first driving branch to write the preset voltage into a first data line; in a first data writing phase, keeping the first driving branch to be turned on to write a first data voltage into the first data line, and then turning off the first driving branch; and in a second data writing phase, turning on the second driving branch to write a second data voltage into the second data line. |
| US11114039B2 |
Micro-display device and method of driving same
A micro-display device comprises a silicon substrate in which a plurality of gate lines, a plurality of data lines, a plurality of emission signal lines, and a plurality of subpixels are disposed; a gate driver circuit disposed on a first side of a pixel array to drive the plurality of gate lines; an emission driver circuit driving the plurality of emission signal lines and disposed on a second side of the pixel array different from the first side of the pixel array where the gate driver circuit is disposed; a data driver circuit disposed on a third side of the pixel array to drive the plurality of data lines; a memory storing duty data regarding duty ratios of an emission signal applied to the plurality of emission signal lines; and a control circuit controlling signals applied to the gate driver circuit, the data driver circuit and the emission driver circuit, wherein the control circuit is set to have different emission times with respect to subpixels connected to the plurality of emission signal lines according to the duty data stored in the memory. |
| US11114032B2 |
Display structure, display panel and display device
The present disclosure relates to a display structure, a display panel, and a display device. The display structure includes: a plurality of pixels and a plurality of first driving circuits. The plurality of pixels are provided in a first area of the display structure. The plurality of pixels are arranged based on a preset pattern. An area of the preset pattern is less than that of the first area. Each pixel includes sub-pixels of a plurality of colors, and each sub-pixel includes an organic light emitting diode. The plurality of first driving circuits are provided in a second area outside the first area, connected to the organic light emitting diodes, and configured to drive the organic light emitting diodes to emit light. |
| US11114030B1 |
Fast data programming TFT pixel threshold voltage compensation circuit with improved compensation accuracy
A pixel circuit for a display device provides enhanced performance by performing a partial threshold compensation during programming and performing further compensation independent of programming to achieve a short programming time while ensuring threshold compensation accuracy. The pixel circuit is operated in a relatively shortened duration first combined data programming and threshold compensation phase, and in a relatively prolonged duration second threshold compensation phase for improved compensation accuracy. During the combined programming and threshold compensation phase, a drive transistor is diode connected, and a data voltage is applied to a programming a capacitor that also stores a portion of a threshold voltage of the drive transistor. This permits a short programming time. During the prolonged threshold compensation phase, to further compensate the threshold voltage of the drive transistor for compensation accuracy, the drive transistor remains diode connected and a storage capacitor stores the threshold voltage of the drive transistor. |
| US11114026B2 |
Display apparatus comprising color accuracy enhancement transistor or brightness boosting transistor
A display apparatus includes a plurality of pixels, each of the pixels including an organic light emitting diode, a first transistor providing a driving current to operate the organic light emitting diode, a second transistor including a gate electrode that receives a first scan signal, a first electrode that receives a data signal, and a second electrode electrically connected to the first electrode of the first transistor, a storage capacitor including a first electrode receiving a first power voltage and a second electrode electrically connected to the gate electrode of the first transistor, and a color accuracy enhancement transistor that applies a first back bias voltage to the first transistor in response to a color accuracy enhancement signal. |
| US11114024B2 |
Method for maintaining LED brightness, LED driving circuit and display device
A method for maintaining LED brightness is provided and exemplarily includes steps of: providing a LED driving circuit capable of performing current detection and compensation; performing a detection based on the LED driving circuit to obtain mapping relationships among current, brightness and voltage; and monitoring a current flowing through a LED driven by the LED driving circuit, and performing a compensation according to the monitored current and the mapping relationships to maintain brightness of the LED. Moreover, a LED driving circuit is also provided and includes first through fourth transistors and a capacitor. In addition, a display device adopting the method for maintaining LED brightness or the LED driving circuit is also provided. |
| US11114021B2 |
Display device, method of manufacturing the same, and glass stack
Provided are a display device, a method of manufacturing the same, and a glass stack. The display device includes a light emitting substrate which comprises a base and a light emitting element disposed on the base; an encapsulation substrate which is disposed on the light emitting substrate; a frit which surrounds the light emitting element and is disposed between the light emitting substrate and the encapsulation substrate; and a first coating layer which is disposed between the encapsulation substrate and the frit, and comprises a compound having an intramolecular *—(OCH2CH2)—OH structure, and at least partially contacting the frit. |
| US11114018B2 |
Light emitting display device and method for driving same
The present disclosure relates to a display device and a method for driving the same which can improve color unevenness in a low-grayscale (low-luminance) area and improve color accuracy and grayscale expression, and an image processor of a display device according to an embodiment identifies a low-grayscale area less than a threshold value according to an input maximum luminance and applies a grayscale reproduction mask thereto to reproduce a luminance of the low-grayscale area as a combination of the threshold value and a minimum value. |
| US11114015B2 |
Display substrate, manufacturing method thereof and display device
A display substrate, a manufacturing method thereof, and a display device are provided. The display substrate includes multiple pixel units, multiple scan lines, and multiple data lines. Each pixel unit includes a first sub-pixel, a second sub-pixel, and a third sub-pixel having different colors. Sub-pixels having a same color are in a same sub-pixel row. The data line includes a first sub-data line and a second sub-data line, the first sub-pixels on two sides of each first sub-data line are electrically connected to a same first sub-data line and are driven through a same first sub-data line, and the second sub-pixel and the third sub-pixel in a same column are electrically connected to a same second sub-data line and are driven through a same second sub-data line. |
| US11114012B2 |
Display panel driving circuit and display device
The present discloses provides a display panel driving circuit and a display device. The display panel driving circuit includes a memory; a control chip; and a timing controller including data transmission ends and a control end, the data transmission ends are connected with a control signal output end of a communication switching circuit and a data output end of the memory, and the control end is connected with a controlled end of the communication switching circuit. The timing controller is configured to receive a control signal output by the control chip when controlling the communication switching circuit to be turned on and to read software data of the memory when controlling the communication switching circuit to be turned off. |
| US11114011B1 |
Display driver circuit for high resolution and high frame rate and display device using the same
A display driver circuit for high resolution and high frame rate and a display device using the same are provided. A display driver circuit for high resolution and high frame rate includes a GAMMA output circuit, multiple digital-to-analog converters (DACs), multiple source operation amplifiers and at least a pre-charging circuit. The GAMMA output circuit outputs multiple grayscales of GAMMA voltages. Each DAC receives the GAMMA voltages and provides an output data voltage according to display data. Input terminals of the source operation amplifiers correspondingly coupled to output terminals of the DACs receive the corresponding output data voltages. The pre-charging circuit coupled between the input terminal of at least one of the source operation amplifiers and the output terminal of at least one of the DACs pre-charges the input terminal of the coupled source operation amplifier, so that an output terminal of the coupled source operation amplifier has fast response to the received output data voltage. |
| US11114009B2 |
Controller and display device including the same
Disclosed is a display device including a display panel having a plurality of pixels, each of the pixels including at least two subpixels, the display panel including a first display area and a second display area, the second display area being disposed to overlap an optical module, a memory configured to store shape information of the second display area including position information of a starting point, vertical length information of the second display area, and line-based direction information and width information indicating the border of the second display area, and a controller configured to change an image that is displayed in at least one of the first display area and the second display area using the shape information of the second display area and to perform control such that the changed image is displayed on the display panel. |
| US11114005B2 |
Pixel structure and method for driving the same, display panel and display apparatus
A pixel structure is disclosed. The pixel structure includes: a plurality of scanning lines; a plurality of data lines intersecting the plurality of scanning lines; and a plurality of sub-pixels which are located at respective intersections of the plurality of scanning lines and the plurality of data lines and are arranged in rows and columns. (4n+1)th and (4n+2)th data lines of the plurality of data lines are located on opposite sides of a (2n+1)th column of sub-pixels respectively. (4n+3)th and (4n+4)th data lines of the plurality of data lines are located on opposite sides of a (2n+2)th column of sub-pixels respectively. The (4n+2)th and (4n+3)th data lines of the plurality of data lines are located between the (2n+1)th column of sub-pixels and the (2n+2)th column of sub-pixels, where n is an integer greater than or equal to 0. |
| US11113999B2 |
Data processing method, display device, and computer-readable storage medium
Disclosed is a data processing method, the data processing method includes: determining image data captured in preset grayscale; determining first compensation data of display defect according to the image data; and generating compensation data of the display defect according to the first compensation data and data of the preset grayscale. |
| US11113998B2 |
Generating three-dimensional user experience based on two-dimensional media content
The present application provides methods and systems for generating three-dimensional user experience from two-dimensional media content such as a sequence of image frames received by a mobile device. The mobile device recognizes locations of a moving object in the sequence of image frames and applies a user-selected foreground template to the sequence of image frames by covering at least a portion of each image frame rendered on the display. When there is an overlap between the location of the moving object within one of the sequence of image frames and the predetermined foreground template, the device identifies, within the image frame, at least a portion of the moving object covered by the foreground template, and renders the covered portion of the moving object in front of the foreground template while a remaining portion of the image frame is rendered behind the foreground template. |
| US11113997B2 |
Multi-view display device
A multi-view display device is provided. The multi-view display device includes a display panel having a plurality of pixels disposed in a matrix arrangement, adjacent first and second pixels of the plurality of pixels constituting a group pixel; a barrier disposed on the display panel and having an opening that transmits light and a shielding portion that shields light; and a driver configured to selectively drive the display panel in a normal driving mode, a narrow viewing angle mode, and a multi-view mode by controlling signals applied to the first and second pixels. The opening is overlapped with the first pixel, and the shielding portion is overlapped with the second pixel. |
| US11113996B2 |
Display including bending area and electronic device comprising same
A display according to various embodiments of the present invention may comprise: a touchscreen panel; a display panel disposed under the touchscreen panel and including a first flexible substrate; a drive circuit for driving the touchscreen panel or the display panel; and a second flexible substrate extending outward from the touchscreen panel in a partial layer of the touchscreen panel, wherein the second flexible substrate comprises: a drive circuit area in which the drive circuit is disposed; one or more first wirings connected to the drive circuit and the touchscreen panel; and a bending area which is bent with respect to the touchscreen panel. Various other embodiments may also be possible. |
| US11113995B2 |
Information processing device, display device, and electronic device
An electronic device including a large display region and with improved portability is provided. An electronic device with improved reliability is provided.An information processing device includes a first film, a panel substrate, and at least a first housing. The panel substrate has flexibility and a display region, and the first film has a visible-light-transmitting property and flexibility. The first housing includes a first slit, the panel substrate includes a region positioned between the first film and a second film, the first slit has a function of storing the region, and one or both of the panel substrate and the first film can slide along the first slit. |
| US11113993B2 |
Cleaning system, cleaning devices, instruction insert, and methods therefor
A visual teaching aid (100) assists teaching a cleaning order for a predefined area (106). The visual teaching aid can include a legend portion (103) defining a plurality of portions (105) of the predefined area, while a predefined area portion (104) pictorially illustrates the plurality of portions. The legend portion can define a plurality of sequential numerical indicia (107) indicating a predefined order in which the plurality of portions should be cleaned. The predefined area portion can include a plurality of visual indicators (110) assigned to the plurality of portions on a one-to-one basis. The visual teaching aid can be included with one or more cleaning cloths (300,500) in a cleaning package assembly (700). |
| US11113988B2 |
Apparatus for writing motion script, apparatus for self-teaching of motion and method for using the same
Disclosed herein are an apparatus for writing a motion script and an apparatus and method for self-teaching of a motion. The method for self-teaching of a motion, in which the apparatus for writing a motion script and the apparatus for self-teaching of a motion are used, includes creating, by the apparatus for writing a motion script, a motion script based on expert motion of a first user; analyzing, by the apparatus for self-teaching of a motion, a motion of a second user, who learns the expert motion, based on the motion script; and outputting, by the apparatus for self-teaching of a motion, a result of analysis of the motion of the second user. |
| US11113986B2 |
Story machine, control method and control device therefor, storage medium and story machine player system
The disclosure relates to a story machine, a control method and control device thereof, a storage medium and a story machine player system are provided. The story machine includes circuitry configured to detect movement indication information for indicating a first movement path of the story machine; control the story machine to move along the first movement path based on the detected movement indication information; detect play indication information for indicating multimedia information; control the story machine to stop moving in response to detecting the play indication information; and play the multimedia information based on the detected play indication information. |
| US11113979B2 |
Aerodrome system and method
An aerodrome system for an aerodrome is provided. The aerodrome system comprises a plurality of light emitting elements configured to emit light from a surface of the aerodrome upon which aircraft may take-off, land and manoeuvre; and a controller operatively coupled to each of the light emitting elements so as to selectively control the light emitting elements, wherein the light emitting elements form pixels of a display and the controller is configured to control an image displayed by the display so as to display and demarcate at least one runway for aircraft to take-off or land, wherein the light emitting elements are spaced such that the controller may display the runway with a variable orientation and the controller is further configured to change the image displayed by the display so as to change the orientation of the runway. |
| US11113978B2 |
System and method for determining and displaying optimized aircraft energy level
A system and method of displaying optimized aircraft energy level to a flight crew includes processing flight plan data, in a processor, to determine the optimized aircraft energy level along a descent profile of the aircraft from cruise altitude down to aircraft destination, and continuously processing aircraft data, in the processor, to continuously determine, in real-time, an actual aircraft energy level. The actual aircraft energy level of the aircraft is continuously compared, in the processor, to the optimized aircraft energy level. The processor is use to command a display device to render an image that indicates: (i) the optimized aircraft energy level, (ii) how the actual aircraft energy level differs from the optimized aircraft energy level, and (iii) how the actual aircraft energy level is trending relative to the optimized aircraft energy level. |
| US11113977B2 |
Runway obstacle clearance device and method
The present invention is designed to instrumentation and methods for providing runway obstacle clearance for instrument and non-instrument landing of an aircraft. The device provides a simple method of determining if there are any obstacles within the FAA required path of landing of an aircraft. Typically, there are trees and other obstacles which have to be precisely located to determine if such trees and other obstacles are within the required clearance space for permitted landing of an aircraft. This is particularly important when visual verification of the landing of the aircraft is required. |
| US11113970B2 |
Apparatus and method of safety support for vehicle
A vehicle safety support apparatus includes: a driver monitoring sensor configured to monitor a driver; an external environment monitoring sensor configured to monitor an external environment of a vehicle; and at least one processor configured to: determine whether the vehicle is in an immediate hazard situation based on data acquired from the driver monitoring sensor and the external environment monitoring sensor; determine, in response to determining that the vehicle is in the immediate hazard situation, whether to perform a recovery maneuver or a rescue maneuver based on the data acquired from the driver monitoring sensor and the external environment monitoring sensor to get out of the immediate hazard situation; and perform, in response to determining to perform the rescue maneuver, autonomous driving to move the vehicle to a safe area by taking over a driving control from the driver. |
| US11113969B2 |
Data-to-camera (D2C) based filters for improved object detection in images based on vehicle-to-everything communication
The disclosure describes a method for an ego vehicle. The method includes receiving a vehicle-to-everything (V2X) message that describes an object that is within proximity of an ego vehicle. The method further includes generating a set of data-to-camera (D2C) filters that are specific to the object described by the V2X message. The method further includes applying the set of D2C filters to image data that describes an initial image of the object. The method further includes generating a modified image, based on applying the set of D2C filters to the image data, wherein the modified image includes an indication of (1) a location and a size of the object in the initial image and (2) a type of object in the initial image. |
| US11113963B2 |
Systems and methods for detection of travelers at roadway intersections
A system and method that enables individual travelers, including pedestrians or individuals on smaller conveyances, to communicate their location and direction of travel to signal light controllers at an intersection, enables traffic networks to receive this communication and output the detected data to the corresponding intersection traffic-signal controller to allow for individuals not in standard motor vehicles to be detected by traffic detection systems and to allow for priority of traveler flow either independent of vehicle use, or based on specifics of the vehicle used. |
| US11113961B2 |
Driver behavior monitoring
Systems and methods provide, implement, and use using a computer-vision based methods of context-sensitive monitoring and characterization of driver behavior. Additional systems and methods are provided for unsupervised learning of action values, monitoring of a driver's environment, and transmitting visual information from a client to a server. |
| US11113957B2 |
System and method for providing real-time and predictive speed, traffic signal timing, station dwell time, and departure window information to transit vehicle
Devices, systems, and methods are disclosed for connecting traffic signal control infrastructure, in-service transit vehicles, and back-end computing and service systems, and providing an adaptable user interface, remotely effecting a change on a Portable Electronic Device (PED), verifying location of transit vehicles and tailoring information to the behavior of a transit operator. System determines an “optimal window” for a transit vehicle to travel through a maximum number of consecutive traffic signals during the green vehicular phase. The system determines and sends a recommended speed to traverse the optimal window. In a case where an optimal window is not possible under current circumstances, the system determines and then advises the driver to remain at the current station for a specified dwell time. |
| US11113956B1 |
Vehicle-roadway interface for power and data exchange with roadway sensors system
A vehicle-roadway interface for power and data exchange with roadway sensors system used along a road surface for use with at least one vehicle, with the system comprising at least one active vehicle-based adapter removably mounted to the at least one vehicle and a plurality of passive roadway-based beacons affixed to or within the road surface. The system utilizes an innovative transmitted power system that allows the vehicle-based adapter to provide power to each of the roadway beacons whenever the equipped vehicle passes within proximity of the roadway beacon, while the vehicle is normally traveling along the roadway. Each of the roadway-based beacons communicates in real time with the vehicle-based adapter to detect, collect, transmit, and receive information concerning at least temperature conditions, moisture conditions, lane management, traffic management, record-keeping of passing vehicles, and high-fidelity geographic location coordinates. |
| US11113944B2 |
Walking analysis apparatus and method
A walking analysis method includes measuring impacts due to floor landing occurring during walking; identifying an impact section before floor landing, a free fall section, and an impact peak section by floor landing in an impact graph over time; analyzing at least one impact-related parameter for the impact section before floor landing, the free fall section, and the impact peak section by floor landing; and determining a walking-related accident type according to a result of analyzing the at least one impact-related parameter. Accordingly, by classifying and detecting a variety of accidents that may actually occur, the main walking characteristics that are dangerous in the actual accident can be extracted. |
| US11113939B1 |
Person detection apparatus and method
A system, method and apparatus for detecting the presence of a person in an area monitored by an electronic person detector that may operate both as a security motion sensor and a home automation occupancy sensor. |
| US11113934B2 |
Encoding/decoding apparatuses and methods for encoding/decoding vibrotactile signals
An encoding apparatus for encoding a vibrotactile signal includes a first transforming unit configured to perform a discrete wavelet transform of the signal, a second transforming unit configured to generate a frequency domain representation of the signal, a psychohaptic model unit configured to generate at least one quantization control signal based on the generated frequency domain representation of the sampled signal and on a predetermined perceptual model based on human haptic perception, a quantization unit configured to quantize wavelet coefficients resulting from the performed discrete wavelet transform and adapted by the quantization control signal, a compression unit configured to compress the quantized wavelet coefficients, and a bitstream generating unit configured to generate a bitstream corresponding to the encoded signal based on the compressed quantized wavelet coefficients. The subject matter described herein also includes a corresponding decoding unit, an encoding method and a decoding method. |
| US11113933B1 |
Visual indication system for feedback controller
A device for communicating a system status visually is disclosed. The device comprises a primary indicator and a secondary indicator, and in an embodiment comprises a surround indicator and a tail indicator. Both indicators allow light to pass through a translucent portion to be visible by a user, and the device utilizes illumination elements such as multicolor LEDs to present the indicators in colors to communicate system status or a data category to inform a user about the system with simplified color signals easily perceived at a distance. The device can be configured to accept multiple sensor or signal inputs and control one or more powered devices to effect feedback control of a system variable, e.g. temperature. The tail indicator can change colors to communicate a data category provided by a signal input. The surround indicator can change colors to communicate a system status. |
| US11113922B2 |
Logging, recovery and replay of wagering game instances
A gaming device may be configured for receiving, via a user interface, user input corresponding to a request for play of a gambling game and for determining whether the gambling game is a base game or a sub game. Upon determining that the gambling game is a sub game, the gaming device may be configured for controlling a display system to provide a sequence of images corresponding to an instance of the sub game, for determining sub game data and sub game metadata corresponding to the instance of the sub game, for adding a sub game trace to a game history data structure corresponding to the sub game data and the sub game metadata and for adding a game round index marker to the game history data structure corresponding to the instance of the sub game. |
| US11113920B2 |
Banknote stacking and separating apparatus and banknote processing device
A banknote stacking and separating apparatus includes a frame, and a guide plate and a pressing plate that are disposed on the frame. The frame is provided with an entrance-and-exit for a banknote. One end of the guide plate adjacent to the entrance-and-exit is pivotally connected to the frame, and the guide plate is operative to rotate around an axis of a pivoting shaft and is configured to guide a moving direction of the banknote when the banknote is being collected. The pressing plate is configured to support the collected banknotes and press the banknotes towards the guide plate while the banknotes are being separated. One end of the guide plate far away from the entrance-and-exit is provided with a force-releasing surface configured to support the guide plate when the pressing plate presses the banknotes towards the guide plate. |
| US11113916B2 |
Coin feeding apparatus and money handling apparatus
A coin feeding apparatus comprising: a disk that includes a plurality of protrusions on a surface of the disk, is disposed to be inclined and rotatable, and, when rotating, causes a first coin or a second coin to be caught on and carried upward by the plurality of protrusions, the second coin having a diameter greater than that of the first coin; a cover that forms, between the cover and a surface of the disk, a space for storing a coin therein; and a separation unit that separates one coin out of two of the first coins from the plurality of protrusions so as to cause the one coin to fall into the space, the two first coins being caught on the plurality of protrusions side by side. |
| US11113909B2 |
Door handle and control method thereof
A door handle includes a human body detection sensor, a controller, a servo assembly, and an engaging assembly. The controller is electrically connected with the human body detection sensor and the servo assembly, and the engaging assembly is controlled by the servo assembly. The engaging assembly includes a first engaging state and a second engaging state. When the engaging assembly is in the first engaging state, the door handle is able to drive a lock body connecting shaft to rotate; and when the engaging assembly is in the second engaging state, the door handle is unable to drive the lock body connecting shaft to rotate. |
| US11113907B2 |
Utilizing a short-range wireless communication device to provide keyless access to a safe deposit box
A device receives, from a short-range wireless communication device associated with a safe deposit box, first data identifying a first transaction card, and identifies a bank employee associated with the first data. The device determines whether the bank employee is authorized to access the safe deposit box, and starts a timer when the bank employee is authorized to access the safe deposit box. The device receives, from the short-range wireless communication device, second data identifying a second transaction card, and determines whether the second data is received prior to an expiration of the timer. The device identifies a customer associated with the second data when the second data is received prior to the expiration of the timer, and determines whether the customer is authorized to access the safe deposit box. The device causes the safe deposit box to be unlocked when the customer is authorized. |
| US11113905B2 |
Fault detection system and method for vehicle system prognosis
A fault detection system including one or more sensors onboard a vehicle to detect a characteristic of the vehicle and generate sensor signals corresponding to the characteristic, a processor onboard the vehicle to receive the sensor signals, generate one or more fast Fourier transform vectors based on the sensor signals so that the one or more fast Fourier transform vectors are representative of the characteristic, generate an analysis model from a time history of the fast Fourier transform vectors, and determine, using the analysis model, a degree to which the one or more fast Fourier transform vectors could have been generated by the analysis model, and an indicator to communicate an operational status of the vehicle to an operator or crew member of the vehicle based on the degree to which the one or more fast Fourier transform vectors could have been generated by the analysis model. |
| US11113903B2 |
Vehicle monitoring
Methods, systems, and apparatus for determining a maintenance issue are described. An audio signal is obtained and analyzed to generate an audio signature. A characteristic of a component is identified based on the audio signature and an action is determined based on the characteristic of the component. |
| US11113899B1 |
Correcting anatomical maps
A system includes a display and a processor. The processor is configured to compute a point P′ on a virtual surface of a point cloud representing an anatomical volume, by projecting another point P, which corresponds to a location on an anatomical surface of the anatomical volume, onto the virtual surface. The processor is further configured to define a virtual sphere centered on a virtual line joining P to P′ such that P lies on a spherical surface of the virtual sphere, and to expand the point cloud throughout the virtual sphere or exclude the virtual sphere from the point cloud. The processor is further configured to regenerate the virtual surface such that, by virtue of having expanded the point cloud or excluded the virtual sphere, P lies on the virtual surface, and to display the regenerated virtual surface on the display. Other embodiments are also described. |
| US11113894B1 |
Systems and methods for GPS-based and sensor-based relocalization
Systems are configured for performing GPS-based and sensor-based relocalization. During the relocalization, the systems are configured to obtain radio-based positioning data indicating an estimated position of the system within a mapped environment. The systems are also configured to identify, based on the estimated position, a subset of keyframes of a map of the mapped environment, wherein the map of the mapped environment includes a plurality of keyframes captured from a plurality of locations within the mapped environment, and the plurality of keyframes are associated with anchor points identified within the mapped environment. The systems are further configured to perform relocalization within the mapped environment based on the subset of keyframes. |
| US11113892B2 |
Method and apparatus for on-line and off-line retail of all kind of clothes, shoes and accessories
A method for three-dimension (3D) based shopping, the method may include receiving or generating a 3D representation of at least a part of a body of a certain customer; receiving a query to find a first wearable item that fits the part of the body; searching for the first wearable item; displaying on a display that is accessible to the certain customer a 3D model of the first wearable item when worn over the part of the body; and interacting with the certain customer till a completion of the 3D based shopping. |
| US11113890B2 |
Artificial intelligence enabled mixed reality system and method
The present invention relates to an artificial intelligence based system and method for moderating interaction between interacting users. The attempt is to improve emotional intelligence of users so that a seasoned response and reaction is observed during interaction, even if situations of conflict arise. The disclosure, thus, provides for a mixed reality glass powered assistant that displays the moderated expressions of a customer to the service provider. For the same, the analytical engine upon determining the negative emotions of customer, transforms the image of customer and adds smile to his face, which is presented to the service provider via a mixed reality glass so that he responds back to the customer in a positive manner. |
| US11113889B1 |
Adjustable waveguide assembly and augmented reality eyewear with adjustable waveguide assembly
An adjustable frame assembly for augmented reality eyewear. The frame assembly includes a face portion for supporting at least one waveguide that creates an eye box, a support rest for supporting the face portion on a user, and a coupling for adjusting the position of the face portion relative to the support rest. This enables movement of the waveguide eye box relative to the support rest to position the eye box in front of the wearer's eyes. |
| US11113887B2 |
Generating three-dimensional content from two-dimensional images
A method includes receiving two-dimensional video streams from a plurality of cameras, the two-dimensional video streams including multiple angles of a sporting event. The method further includes determining boundaries of the sporting event from the two-dimensional video streams. The method further includes identifying a location of a sporting object during the sporting event. The method further includes identifying one or more players in the sporting event. The method further includes identifying poses of each of the one or more players during the sporting event. The method further includes generating a three-dimensional model of the sporting event based on the boundaries of the sporting event, the location of the sporting object during the sporting event, and the poses of each of the one or more players during the sporting event. The method further includes generating a simulation of the three-dimensional model. |
| US11113885B1 |
Real-time views of mixed-reality environments responsive to motion-capture data
An immersive content presentation system can capture the motion or position of a performer in a real-world environment. A game engine can be modified to receive the position or motion of the performer and identify predetermined gestures or positions that can be used to trigger actions in a 3-D virtual environment, such as generating a digital effect, transitioning virtual assets through an animation graph, adding new objects, and so forth. The use of the 3-D environment can be rendered and composited views can be generated. Information for constructing the composited views can be streamed to numerous display devices in many different physical locations using a customized communication protocol. Multiple real-world performers can interact with virtual objects through the game engine in a shared mixed-reality experience. |
| US11113881B2 |
Systems and methods for generating a three-dimensional surface from a segmented volume
Systems and methods for generating a three-dimensional surface from a segmented volume including a plurality of voxels are provided. The method includes executing a first pass over a plurality of cells to generate a list of active cells, and executing a second pass over the plurality of active cells to generate a quadrilateral mesh, the quadrilateral mesh including a plurality of points that define a plurality of quadrilaterals. The method further includes executing at least one additional pass over the quadrilateral mesh to generate a smoothed mesh, wherein executing the at least one additional pass includes computing, for at least one point, a balanced curvature for the at least one point based on curvatures at points that neighbor the at least one point and moving the at least one point to a new location based on the computed balanced curvature. The method further includes displaying the smoothed mesh. |
| US11113880B1 |
System and method for optimizing the rendering of dynamically generated geometry
Particular embodiments described herein present a technique for mesh simplification. A computing system may receive a request to render an image of a virtual scene including a virtual object. The system may determine one or more positions of the virtual object relative to one or more of a foveal focus point or a lens, respectively. The system may determine a screen coverage size of the virtual object. The system may then determine a simplification level for the virtual object based on the determined position(s) and the screen coverage size of the virtual object. The system may generate a mesh representation of the virtual object based on the determined simplification level, where the number of polygons used in the mesh representation depends on the determined simplification level. The system may render the image of the virtual scene using at least the generated mesh representation of the virtual object. |
| US11113877B2 |
Systems and methods for generating three dimensional geometry
Systems and methods are described for creating three dimensional models of building objects by creating a point cloud from a plurality of input images, defining edges of the building object's surfaces represented by the point cloud, creating simplified geometries of the building object's surfaces and constructing a building model based on the simplified geometries. Input images may include ground, orthographic, or oblique images. The resultant model may be scaled according to correlation with select image types and textured. |
| US11113870B2 |
Method and apparatus for accessing and transferring point cloud content in 360-degree video environment
A method and an apparatus for transmitting and receiving video content including 3D data are provided. According to an embodiment, a method for transmitting data related to content including an omnidirectional image and a point cloud object is provided. The method includes generating media data and metadata for the content including the omnidirectional image and the point cloud object; and transmitting the generated media data and the generated metadata, wherein the metadata comprises information for specifying sub-spaces of a bounding space related to the point cloud object. |
| US11113869B2 |
Techniques for generating visualizations of ray tracing images
Examples described herein generally relate to generating a visualization of an image. A proprietary structure that specifies ray tracing instructions for generating the image using ray tracing is intercepted from a graphics processing unit (GPU) or a graphics driver. The proprietary structure can be converted, based on assistance information, to a visualization structure for generating the visualization of the image. The visualization of the image can be generated from the visualization structure. |
| US11113865B2 |
Three-dimensional generative design based on two-dimensional sketching
One embodiment of the present invention provides a technique for generating a three-dimensional model from a two-dimensional sketch. The technique includes receiving input indicating a set of points defining a first sketch element and a second set of points defining a second sketch element included in a sketch. The technique further includes identifying one or more design relationships between the first sketch element and the second sketch element. The technique further includes generating a computer model of the sketch that represents a structure linking the first sketch element and the second sketch element according to the one or more design relationships. The technique further includes outputting the first sketch element, the second sketch element, and the structure for display. |
| US11113859B1 |
System and method for rendering three dimensional face model based on audio stream and image data
Disclosed herein includes a system, a method, and a non-transitory computer readable medium for rendering a three-dimensional (3D) model of an avatar according to an audio stream including a vocal output of a person and image data capturing a face of the person. In one aspect, phonemes of the vocal output are predicted according to the audio stream, and the predicted phonemes of the vocal output are translated into visemes. In one aspect, a plurality of blendshapes and corresponding weights are determined, according to the corresponding image data of the face, to form the 3D model of the avatar of the person. The visemes may be combined with the 3D model of the avatar to form a 3D representation of the avatar, by synchronizing the visemes with the 3D model of the avatar in time. |
| US11113858B2 |
System and method for deep compositing of images in web browsers
A system and method display two-dimensional (2D) and cube mapped (360) map environments divided into many different parts that are changeable over a network by end-users in real-time. Large portions of the images are filled with texture layers of different shapes and variants, so that a user can easily switch between the large portions. All of the large portions are saved on one or more render servers as a pack of digital images, and the end-users can communicate with the render servers to download the necessary portions of the images exactly when such portions are needed. The system and method utilize a set of rules that adaptively chooses the best way, in terms of computer performance, of composing the map environment and of changing the shapes and variants of the layers depending on a given environment. |
| US11113857B2 |
Display method and apparatus and electronic device thereof
The present disclosure provides a display method. The display method includes displaying a first image based on a first scene; detecting whether a first condition is satisfied; and displaying a second image based on the first condition being satisfied. The first image is an image corresponding to a first portion of the first scene, the second image includes a character image of a viewer and an image of a second portion of the first scene, and the first portion is different from the second portion. |
| US11113854B2 |
Methods and devices for capturing heuristic information via a sketching tool
In accordance with various embodiments, a method is performed at an electronic device including a display device and one or more input devices. The method includes displaying, on the display device, a first graphing area including a first section presenting a plot of a first set of data points for a first variable and a second section. The method includes detecting, via the one or more input devices, a user input indicative of a path within a second section. The method includes determining, based on the user input indicative of a path within the second section, a second set of data points for the first variable. The method includes determining, based at least on the second set of data points for the first variable, a set of data points for a second variable. The method includes displaying, on the display device, a second graphing area presenting a plot of the set of data points for the second variable. |
| US11113849B2 |
Method of controlling virtual content, terminal device and computer readable medium
A method of controlling virtual content, a terminal device and a computer readable medium are provided. The terminal device includes a display configured to display a virtual object, a camera configured to capture a target image including a marker, at least one processor, and a memory. The memory stores one or more programs configured to be executed by the at least one processor. The one or more programs includes instructions of acquiring the target image including the marker, where a plurality of sub-markers is distributed on the marker; determining a blocked target, wherein the blocked target is a blocked sub-marker of the plurality of sub-markers in the target image; generating a control instruction according to the blocked target; and controlling the displayed virtual object based on the control instruction. |
| US11113847B2 |
Conversion of infrastructure model geometry to a tile format
In example embodiments, techniques are provided for converting geometry of an infrastructure model represented as high-level geometric primitives having a given symbology to low-level primitives, and encoding these low-level primitives into tile contents suited for transmission, and ultimately display upon, on a client device. An architectural split between frontend applications and backend applications may allow conversion of the high level primitives to be performed remote from the client devices by backend applications. Backend applications may be executed on robust hardware devices that execute software in a multi-threaded environment on powerful CPUs. By performing CPU-intensive operations on backend applications, frontend applications on client devices may be required to do little more than submit low-level primitives for rendering on their GPU. |
| US11113845B2 |
Point cloud compression using non-cubic projections and masks
A system comprises an encoder configured to compress attribute information and/or spatial for a point cloud and/or a decoder configured to decompress compressed attribute and/or spatial information for the point cloud. To compress the attribute and/or spatial information, the encoder is configured to convert a point cloud into an image based representation. Also, the decoder is configured to generate a decompressed point cloud based on an image based representation of a point cloud. |
| US11113842B2 |
Method and apparatus with gaze estimation
A gaze estimation method and apparatus is disclosed. The gaze estimation method includes obtaining an image including an eye region of a user, extracting, from the obtained image, a first feature of data, obtaining a second feature of data used for calibration of a neural network model, and estimating a gaze of the user using the first feature and the second feature. |
| US11113841B1 |
Self-learning three-dimensional boundaries from images
Techniques are disclosed. The techniques include receiving, from a camera, an image showing a portion of a physical topography and target object. The techniques include determining, based on the image, a location of the target object shown in the image and a physical characteristic of the target object shown in the image, the physical characteristic being common with at least another target object. The techniques then include determining a three dimensional (3D) position of the target object in a 3D representation of the portion of the physical topography, the 3D position determined based on (i) the location of the target object, and (ii) the physical characteristic. Based on detecting a cluster of 3D positions of target objects (over several images), the techniques involve generating a 3D boundary of a zone of a portion of the physical topography. |
| US11113840B2 |
Systems and methods for detecting objects in images
A method configured to implemented on at least one image processing device for detecting objects in images includes obtaining an image including an object. The method also includes generating one or more feature vectors related to the image based on a first convolutional neural network, wherein the one or more feature vectors includes a plurality of parameters. The method further includes determining the position of the object based on at least one of the plurality of parameters. The method still further includes determining a category associated with the object based on at least one the plurality of parameters. |
| US11113836B2 |
Object detection method, device, apparatus and computer-readable storage medium
Embodiments of object detection method, device, apparatus and a computer-readable storage medium are provided. The method can include: obtaining an enclosing frame of a target object in an input image; according to the enclosing frame, determining a reference frame from a predetermined candidate frame set comprising a plurality of candidate frames; generating a size-related feature according to a size of the reference frame and a size of the enclosing frame; and detecting an object in the input image by applying the size-related feature in a machine learning model. In an embodiment of the present application, the object detection is performed by using a feature related to an object size, that is, the prediction criterion related to the object size is added to an original feature in a machine learning model, thereby further improving the accuracy of the object detection. |
| US11113834B2 |
Computer-implemented method for determining a local deviation of a geometry of an object from a target geometry of the object
Described is determining a local deviation of a geometry of an object from a target geometry of the object on the basis of a digital representation of the object that comprises image information items that each specify a value of a measurand for the object at a defined position of the object. This includes determining the object representation, determining a distance field from the image information items of the object representation that comprises distance values for a specific point of the distance field that specifies the shortest distance of the point from a closest material boundary of the geometry of the object, determining the target geometry of the object, and determining the local deviation of the geometry of the object from the target geometry of the object at a test point on a material boundary predefined by the target geometry. |
| US11113831B2 |
Reducing textured IR patterns in stereoscopic depth sensor imaging
Systems, devices, and techniques related to removing infrared texture patterns used for depth sensors are discussed. Such techniques may include applying a color correction transform to raw input image data including a residual infrared texture pattern to generate output image data such that the output image data has a reduced IR texture pattern residual with respect to the raw input image data. |
| US11113813B2 |
Evaluating a condition of a person
A computer-implemented method is for evaluating a condition of a person. The method includes determining at least one characteristic of a first facial expression of at least a mouth of the person, at a first time, based at least on a first image previously captured; determining at least one characteristic of a second facial expression of at least a mouth of a person, at a second time, based at least on a second image previously captured, the first facial expression and the second facial expression being of a same first type of facial expression; determining at least one difference between the at least one characteristic of the first facial expression determined and the at least one characteristic of the second facial expression determined; and generating an output signal indicating the condition of the person based at least on the at least one difference determined. |
| US11113812B2 |
Quantitative imaging for detecting vulnerable plaque
Systems and methods for analyzing pathologies utilizing quantitative imaging are presented herein. Advantageously, the systems and methods of the present disclosure utilize a hierarchical analytics framework that identifies and quantify biological properties/analytes from imaging data and then identifies and characterizes one or more pathologies based on the quantified biological properties/analytes. This hierarchical approach of using imaging to examine underlying biology as an intermediary to assessing pathology provides many analytic and processing advantages over systems and methods that are configured to directly determine and characterize pathology from underlying imaging data. |
| US11113809B2 |
Group sparsity model for image unmixing
Systems and methods described herein relate, among other things, to unmixing more than three stains, while preserving the biological constraints of the biomarkers. Unlimited numbers of markers may be unmixed from a limited-channel image, such as an RGB image, without adding any mathematical complicity to the model. Known co-localization information of different biomarkers within the same tissue section enables defining fixed upper bounds for the number of stains at one pixel. A group sparsity model may be leveraged to explicitly model the fractions of stain contributions from the co-localized biomarkers into one group to yield a least squares solution within the group. A sparse solution may be obtained among the groups to ensure that only a small number of groups with a total number of stains being less than the upper bound are activated. |
| US11113803B2 |
Inspection of a substrate using multiple cameras
Apparatus for inspection includes an imaging assembly, including a plurality of cameras, which are mounted in different, respective locations in the imaging assembly and are configured to capture respective images of a sample. A motion assembly is configured to move at least one of the imaging assembly and the sample so as to cause the imaging assembly to scan the sample with a scan accuracy that is limited by a predetermined position tolerance. An image processor is coupled to receive and process the images captured by the cameras so as to locate a defect in the sample with a position accuracy that is finer than the position tolerance. |
| US11113801B1 |
Robust image motion detection using scene analysis and image frame pairs
Devices, methods, and computer-readable media describing an adaptive approach to reference image selection are disclosed herein, e.g., to generate fused images with reduced motion distortion. More particularly, an incoming image stream may be obtained from an image capture device, which image stream may comprise a variety of different image captures, e.g., including “image frame pairs” (IFPs) that are captured consecutively, wherein the images in a given IFP are captured with differing exposure settings. When a capture request is received at the image capture device, the image capture device may select two or more images from the incoming image stream for fusion, e.g., including at least one IFP. In some embodiments, one of the images from the at least one IFP will be designated as the reference image for a fusion operation, e.g., based on a robust motion detection analysis process performed on the images of the at least one IFP. |
| US11113792B2 |
Temporal-spatial denoising in ray-tracing applications
Various approaches are disclosed to temporally and spatially filter noisy image data—generated using one or more ray-tracing effects—in a graphically rendered image. Rather than fully sampling data values using spatial filters, the data values may be sparsely sampled using filter taps within the spatial filters. To account for the sparse sampling, locations of filter taps may be jittered spatially and/or temporally. For filtering efficiency, a size of a spatial filter may be reduced when historical data values are used to temporally filter pixels. Further, data values filtered using a temporal filter may be clamped to avoid ghosting. For further filtering efficiency, a spatial filter may be applied as a separable filter in which the filtering for a filter direction may be performed over multiple iterations using reducing filter widths, decreasing the chance of visual artifacts when the spatial filter does not follow a true Gaussian distribution. |
| US11113788B2 |
Multi-space rendering with configurable transformation parameters
Techniques are disclosed relating to rendering graphics objects. In some embodiments, a graphics unit is configured to transform graphics objects from a virtual space into a second space according to different transformation parameters for different portions of the second space. This may result in sampling different portions of the virtual space at different sample rates, which may reduce the number of samples required in various stages of the rendering process. In the disclosed techniques, transformation may occur prior to rasterization and shading, which may further reduce computation and power consumption in a graphics unit, improve image quality as displayed to a user, and/or reduce bandwidth usage or latency of video content on a network. In some embodiments, a transformed image may be viewed through a distortion-compensating lens or resampled prior to display. |
| US11113787B2 |
Image distribution device, image distribution system, image distribution method, and image distribution program
By performing a simple operation on an information processing terminal, a direction of a subject desired to be viewed by a user 40 can be smoothly displayed from various directions. An acquisition unit that acquires a plurality of pieces of moving image data, a data generating unit that generates still image data for each of the plurality of pieces of moving image data, a storage unit that stores the still image data in association with position data and time data, a designated value accepting unit that accepts a position designation value in the still image data desired to be viewed by a user, and a selection unit that selects the still image data on the basis of the position designation value accepted by the designated value accepting unit and transmits the selected still image data to an external display device via a communication network are included, and the selection unit selects the still image data corresponding to the position designation value that has already been designated in a case in which the designated value accepting unit has not accepted the position designation value and selects the corresponding still image data on the basis of a change in the position designation value by using the time data as a reference in a case in which the designated value accepting unit has accepted the position designation value. |
| US11113781B2 |
Image-based pose determination
A steganographic digital watermark signal is decoded from host imagery without requiring a domain transformation for signal synchronization, thereby speeding and simplifying the decoding operation. In time-limited applications, such as in supermarket point-of-sale scanners that attempt watermark decode operations on dozens of video frames every second, the speed improvement allows a greater percentage of each image frame to be analyzed for watermark data. In battery-powered mobile devices, avoidance of repeated domain transformations extends battery life. A great variety of other features and arrangements, including machine learning aspects, are also detailed. |
| US11113778B2 |
System and method for incorporating a wagering activity into an electronic commerce transaction
A system and method is provided for incorporating a wagering activity into an electronic commerce transaction. The system preferably includes a host device in communication with at least a user device and a merchant device via the Internet. If the merchant does not offer the wagering activity, the user may shop for items offered by the merchant via the host's website. When an item is selected by the user, the item is placed in the host's shopping cart (i.e., the host's virtual shopping cart on the merchant's website). If the user decides to participate in a wagering activity, user payment information is used to transfer funds (e.g., a wagering amount) to the host. If the user wins, host payment information is provided to the merchant and used to purchase the item from the merchant. The item is then provided (shipped) to the user. |
| US11113776B1 |
Systems and methods for protecting user identity within online content providing environments
A computer-implemented method for protecting user identity within online content providing environments uses a security content management system (CMS) including at least one processor and a memory. The method includes identifying a request for an online content item associated with an online device. The online device is associated with actual device data. The method also includes determining a first characteristic value associated with the actual device data of the online device. The method further includes generating, by the processor, substitute device data. The substitute device data represents at least the first characteristic value. The method also includes providing the substitute device data to an online content provider. |
| US11113774B2 |
System, method, and apparatus for individual innovator marketing and recognition
Various embodiments disclosed herein relate to the access, management, and targeted display of one or more asset display profiles to a person of interest (e.g., an associated asset creator, a customer, etc.). A method includes interpreting an asset display profile corresponding to a creative asset description and an associated asset creator; determining an asset display context; and in response to the asset display profile and the asset display context, providing an asset display description to an output device. |
| US11113773B2 |
System and method for sharing digital objects
Implementations of systems and methods according to present principles provide new ways to share digital objects in computing environments, improving the user experience and also enhancing communication and relationships among people. The “sharings” can occur as a transfer of an object from one user to another or the transfer of the object into an environment (or vice versa). In one example, a user in a game designs and builds a digital object for a tower and then sells the tower in the game. The tower becomes popular and is used by many other players of the game, including as a part of their own constructions, and also begins to appear in system-generated structures. The creator of the original tower, as well as creators of components constituting the tower, may be provided with compensation for their efforts from such sales of subsequent towers or constructions using such towers. |
| US11113763B2 |
Advisory thresholds and alerts for managing position concentration risk
Management of a position concentration risk of an account includes the establishment of a threshold level for an aggregate trader position. The aggregate trader position may be associated with one or more customer accounts that are managed by one or more clearing firms. An actual parameter value associated with each of the customer accounts is aggregated to determine an aggregate parameter value, which is compared against the established threshold value. If, based on the comparison between the aggregate parameter value and the established threshold value, it is determined that the aggregate parameter value meets or exceeds the established threshold value, an advisory alert is generated, which may be automatic. The advisory alert is then communicated or otherwise provided to one or more authorized entities. |
| US11113752B2 |
On-line session trace system
In various example embodiments, a system and method for enhancing a user's on-line experience by utilizing a computer-implemented on-line session trace system is provided. The on-line session trace system is provided in connection with an on-line trading platform. The on-line session trace system records and stores a state of an on-line session associated with a user identification and permits a user associated with the user identification to commence a further on-line session from a state corresponding to the saved state of a previous on-line session. |
| US11113751B2 |
Systems and methods for predicting lost demand using machine learning architectures
Systems and methods including one or more processors and one or more non-transitory storage devices storing computing instructions configured to run on the one or more processors and perform acts of: providing, via an electronic platform, access to one or more order placement user interfaces; collecting order placement information associated with the one or more order placement user interfaces; analyzing, by a conversion determination network of a machine learning architecture, the order placement information; generating actual conversion information for client sessions based on the actual availability of the order placement options during the client sessions; generating predicted conversion information for the client sessions based on a full availability of all of the order placement options during the client sessions; and generating lost demand information based, at least in part, on the actual conversion information and the predicted conversion information. Other embodiments are disclosed herein. |
| US11113750B2 |
System and method for electronic manifesting in a distribution network
System and method for providing electronic manifesting access for users of a distribution network. A distribution network may provide a user access point, such as by providing application programming interfaces. The access point may provide access the item tracking module upon receipt of valid credentials, such as a user's unique identifier. The access point may receive item information, generate an electronic manifest including the item information and the unique identifier, and allow for tracking the items on the electronic manifest. |
| US11113747B2 |
Systems and methods for distributed grocery fulfillment and logistics
A grocery preparation and fulfillment service management system, the system comprising a purchase order server comprising processing circuitry that hosts at least one ingredients database including ingredient availability data from a plurality of fulfillment servers, a search engine configured to retrieve ingredient availability data from the at least one ingredients database, an ordering interface coupled to the search engine and accessible by a client device over a communication network, the ordering interface configured to create purchase orders based on recipes of dishes and the ingredient availability data, wherein the recipes are retrievable from public computing space and private computing space, and a fulfillment manager module in communication with the plurality of fulfillment servers via the communication network, the fulfillment manager module configured to distribute the purchase orders to the plurality of fulfillment servers and receive offers from the plurality of fulfillment servers to execute the purchase orders. |
| US11113746B1 |
Method, medium, and system for automated product identification
A method, system, and computer program product for automating product identification is provided. The method includes receiving from users, permission to identify and monitor items associated with the users. Local devices located at a first geographical location are detected in response to receiving permission and identification data identifying each device is stored. A user and a user device are detected arriving at the first geographical location and communications between the user device and the local devices are established. The identification data and associated metadata describing the local devices is retrieved and the user and the user device are detected arriving at a second geographical location. A request for locating a specified item is received. In response, the identification data and associated metadata is analyzed and resulting network search results including a list of items and associated descriptions associated with the request are presented to the user. |
| US11113745B1 |
Neural contextual bandit based computational recommendation method and apparatus
Disclosed are systems and methods utilizing neural contextual bandit for improving interactions with and between computers in content generating, searching, hosting and/or providing systems supported by or configured with personal computing devices, servers and/or platforms. The systems interact to make item recommendations using latent relations and latent representations, which can improve the quality of data used in processing interactions between or among processors in such systems. The disclosed systems and methods use neural network modeling in automatic selection of a number of items for recommendation to a user and using feedback in connection with the recommendation for further training of the model(s). |
| US11113739B2 |
System and method for automatic fulfillment
Examples of a method and system for collaborative and private sessions are provided. In some aspects a collaborative shopping session including a first user and one or more other users is established. The establishing of the session including displaying a common interface for the collaborative shopping session at respective computer systems of the first user and each of the one or more other users. A side session is initiated for a second user, the side session having a different interface in which activity within the side session by the second user is not shared with the first user or the one or more other users of the collaborative shopping session. A determination, based on one or more merge criterion, of whether to merge the side session with the collaborative session is made; and the side session is merged with the collaborative session based on the determining. |
| US11113737B2 |
Method and system for managing constraint-based violations in a product data management environment
Managing of constraint-based violations in a Product Data Management (PDM) environment is provided. A method for managing constraint-based violations associated with a product in a PDM system includes obtaining a set of constraints defined for a product from a product database. Constraints that are conflicting with requirement data associated with the product are determined from the set of constraints, and the constraints are grouped into a plurality of logical groups. Each of the logical groups is associated with an independent violation. One or more solutions corresponding to each independent violation are computed based on the logical groups, and conflicts between the constraints and the requirement data corresponding to each independent violation based on the corresponding one or more solutions are resolved. |
| US11113733B2 |
Integrated architecture for performing online advertising allocations
An improved architecture including system and methods for online advertising placement that provide possibly defaulting advertisement tags the opportunity to serve an advertisement ahead of a lower value tag that is guaranteed to fill, resulting in higher CPMs (i.e., Cost Per Mille) for web publishers. The system and methods are configured to deterministically render an advertisement impression from a list of possibly defaulting advertisements in a JavaScript-enabled web browser. The knowledge of the complete outcome of such an “ad chain” at render-time significantly reduces complexity and latency in the supporting ad server. The system and method centers around a novel JavaScript approach to detect when an advertisement has been loaded but not defaulted. Additionally, the system and methods integrate the network and RTB demand channels by looking at all demand sources simultaneously and selecting the buyer from within the user's browser, and address predictive pricing to further enhance the online advertising placement process. |
| US11113725B1 |
Method and system for recommending promotions to consumers
Embodiments provide computer systems, computer-executable methods and one or more non-transitory computer-readable media for offering one or more promotions to consumers using a promotion and marketing service. User input may be received from a first consumer interface associated with a first consumer, the user input including an interest indication relating to a first promotion. An association between the first consumer and a second consumer for sharing of promotions may be programmatically retrieved or generated. Based on the association, it may be determined whether to offer the first promotion to the second consumer based on one or more characteristics associated with the second consumer. Based on a determination that the first promotion should be offered to the second consumer, an indication may be outputted, the indication configured to cause an impression of the first promotion to be generated on a second consumer interface associated with the second consumer. |
| US11113724B1 |
Content selection associated with webview browsers
Methods, systems, and apparatus include computer programs encoded on a computer-readable storage medium for delivering content. A method includes: identifying a webview; providing a script for execution when the webview is initiated, the script causing a device associated with the webview to retrieve a unique identifier associated with the device, encode the unique identifier, construct a URL that includes an advertising system domain and the encoded unique identifier, and pass the encoded unique identifier to the advertising system; passing a cookie for the advertising domain back to the webview for inclusion in the cookie space of the webview; storing information related to interactions of a user of the device when accessing content through different browsers or applications so as to unify the cookie spaces of the different browsers; identifying a request for content as being associated with the device; and using the information to determine content for delivery. |
| US11113723B1 |
Explicit user history input
A communication server is disclosed. The communication server comprises a processor, a memory, and an application stored in the memory. The application, when executed by the processor, receives a request that identifies a subject to remove from a user history of the a user equipment (UE), wherein the user history is compiled based on communication events initiated by the UE and is associated with content that is sent to the UE. The application, responsive to receiving the request from the UE, transmits a user history modification request to a history management server, wherein the communication server disassociates the subject from the user history identified in the request received from the UE. |
| US11113720B2 |
System and a method for surveying advertisements in mobile applications
A method and a system for monitoring an advertisement presented within a mobile application, including: simulating a virtual user interacting with the mobile application, tracing in real-time executable code of the mobile application that processes an advertisement. Where this traced process of advertisement performs: negotiating advertisement display, communicating an advertisement, and displaying an advertisement. The system then directs the advertisement negotiation via a proxy server emulating a location of the virtual user. The system then detects within the process of advertisement an advertisement processed by the executable code. The system then records the advertisement as displayed, and parameters associated with the advertisement. |
| US11113719B2 |
Content demotion
An apparatus, for example a primary device, implements a method that includes receiving promoted content for display at the primary device; predicting a user's behavior with respect to the promoted content by estimating the user's context and preferences, using a neural network; and in response to the prediction of the user's behavior, automatically demoting the promoted content. |
| US11113718B2 |
Iteratively improving an advertisement response model
There are provided systems and methods for iteratively improving an advertisement response model. A payment provider may perform operations that include training an advertisement response model using a training data set. The operations include determining that a first accuracy value corresponding to the advertisement response model is less than a accuracy value threshold. The operations further include identifying, based on executing the advertisement response model using a target data set that is different from the training data set, one or more units from the target data set for which to run the advertising campaign. The operations also include receiving one or more responses corresponding to a run of the advertising campaign with respect to the identified one or more units from the target data set and updating the training data set based on the one or more responses. The operations further include training an advertisement response model using resulting training data and repeating the operations as long as the accuracy value of the resulting model stays below the threshold or until the increase in the accuracy value with each iteration becomes unprofitable with respect to the costs of acquiring responses from further units from the target dataset. |
| US11113715B1 |
Dynamic content selection and optimization
Various embodiments of a framework which allow dynamic testing of many creative content and other messages simultaneously using metrics-based optimization. A “multi-armed bandit” algorithmic approach employed, as an alternative to limited AB-type testing, to automatically select a set of content parameters based on the content parameters' respective probabilities, render the selected parameters to generate content sent to a user, and, after obtaining feedback in the form of user interaction data, update the parameters for future, iterative selection of content parameters. This framework can be used in essentially any setting to allow for the provision of feedback, including user interaction data. |
| US11113712B2 |
Automatic redemption of digital offers with deferred payment
In an embodiment, a computer-implemented method comprises receiving, at a server computer, offer activation request data, the offer activation request data including a loyalty card number and an identification of a digital offer, the digital offer associated with a discount amount; querying, by the server computer, a digital data repository to seek a data record matching the loyalty card number; in response to determining that the data repository has a record matching the loyalty card number, electronically activating the digital offer associated with the identification of the digital offer and associating the activated digital offer with the loyalty card number in the digital data repository; receiving, at the server computer, contextual transaction data; determining, based on the contextual transaction data, that a consumer entity associated with the loyalty card number purchased a product associated with the activated digital offer; determining, by the server computer, that a post-sale product rebate is available for the consumer entity associated with the loyalty card number and in response thereto, generating, by the server computer, a digital payment file based on the discount amount associated with the activated digital offer; using the server computer, transmitting the digital payment file to a third-party payment system that causes a refund amount to be transmitted electronically to the consumer entity associated with the loyalty card. |
| US11113707B1 |
Artificial intelligence identification of high-value audiences for marketing campaigns
A marketing analytics pipeline that receives transaction-level trend reporting of media IP assets distributed on digital service providers (DSPs), the marketing analytics pipeline including a marketing action analytics hub configured to receive the growth and re-engagement opportunities from an opportunity detection analytics hub or from a marketing platform directly and to identify high growth potential audiences using predictive models of engagement; and a marketing platform configured to interact with the marketing action analytics hub and to create marketing campaigns based around the high growth potential audiences and suggest marketing actions to media IP asset managers and owners to deliver to the high growth potential audiences on appropriate marketing channels via targeted marketing campaigns. The marketing action analytics hub uses a geodemographic and interest-based targeting method of generating descriptions of high growth potential audiences. |
| US11113705B2 |
Business forecasting using predictive metadata
A business forecasting tool utilizing metadata is provided. A processor receives one or more sets of business metrics. A processor receives a first metadata descriptor for a first set of business metrics of the one or more sets of business metrics. A processor receives a second metadata descriptor for a second set of business metrics of the one or more sets of business metrics. A processor prepares the first set of business metrics for prediction of a third set of business metrics based on, at least in part, the first metadata descriptor, where the first set and third set each correspond to a different time period. A processor generates a fourth set of business metrics based on, at least in part, the second metadata descriptor, where the second set and fourth set each correspond to a different time period. |
| US11113704B2 |
Systems and methods for interactive annuity product services using machine learning modeling
A server computing device generates an input data set by determining a set of user information, a set of market index information, and available annuity products. A machine learning processor executes a price optimization module to traverse a computer-generated annuity matching model and select a subset of the available annuity products that are associated with product characteristics that match user objectives and generate annuity product recommendations for the user. The processor executes a market simulation module to traverse a computer-generated annuity performance prediction model using the annuity product recommendations and predictions of market performance to generate simulated outcomes for each of the annuity products. A client device generates a graphical user interface for display to the user via a display device, the graphical user interface including visual representations of each of: the annuity product recommendations and the simulated outcomes. |
| US11113696B2 |
Methods and systems for a virtual assistant
An illustrative embodiment disclosed herein is a method including assigning, by a virtual assistant computing device, a transaction intent associated with a mobile device user for a transaction and determining by the virtual assistant computing device, whether the transaction is in accordance with policy. The method further includes sending by the virtual assistant computing device, a policy decision recommendation to the mobile device and receiving, by the virtual assistant computing device, a response from the mobile device indicating whether to perform the transaction. The method further includes facilitating, by the virtual assistant computing device, performance of the transaction and generating, by the virtual assistant computing device, an expense report associated with the transaction. |
| US11113695B2 |
Token-based determination of transaction processing resources
The method comprises receiving a token request, from a first transaction system, for generating a token associated with a user account. Responsive to receiving the token request, generating the token that authorizes use of an initial transaction resource at a second transaction system. The method includes generating transaction preferences that associate the token with a plurality of transaction resources at the second transaction system. The token is transmitted to the first transaction system for use at the first transaction system. The method includes receiving a transaction request, including the token, for using the token for a first transaction. In response to receiving the transaction request, the transaction is processed based on the token, a state of the first user account, and the transaction preferences. The processing of the transaction includes determining whether to revise use of the initial transaction resources to one or more other transaction resources. |
| US11113692B1 |
Secure verification of claims
During a verification technique, claim information for a claim made by an entity (which includes an attribute characterizing an entity) is verified using verification information determined from at least an account of the entity. For example, an individual may pre-register with a provider of the verification technique and authorize the provider to access the account, such as a social network, a financial account, and/or an account associated with a financial application (e.g., an accounting application, an income-tax preparation application, etc.). Subsequently, when the individual makes or provides the claim information associated with the claim, verification information associated with the claim information is aggregated and used to verify that the claim is valid. By verifying the claim, the verification technique may make it easier for individuals to prove their reputable identity attributes without disclosing additional confidential information, thereby maintaining their privacy. |
| US11113690B2 |
Systems and methods for processing data messages from a user vehicle
A payment processor computing device for performing an electronic transaction initiated by a vehicle is described. The payment processor computing device is configured to receive a registration secure token from a vehicle computing device, the registration secure token corresponding to a cardholder and including an account identifier, a vehicle identifier, and a biometric identifier. The payment processor computing device is further configured to store the registration secure token in memory, receive an authorization request message associated with a payment transaction initiated by the cardholder using the vehicle computing device in communication with a merchant computing device wherein the authorization request message includes a transaction secure token, authenticate the authorization request message by matching the transaction secure token to the registration secure token, embed a matching indicator within the authorization request message, and transmit the authorization request message with the embedded matching indicator to an issuer. |
| US11113689B2 |
Transaction policy audit
The present disclosure involves systems, software, and computer implemented methods for transaction auditing. One example method includes receiving receipt data associated with an entity. Policy questions associated with the entity are associated with at least one policy question answer that corresponds to a conformance or a violation of a policy selected by the entity. For each policy question, a machine learning policy model is identified for the policy question that includes, for each policy question answer, receipt data features that correspond to the policy question answer. The machine learning policy model is used to automatically determine a selected policy question answer to the policy question by comparing features of extracted tokens to respective receipt data features of the policy question answers that are included in the machine learning policy model. In response to determining that the selected policy question answer corresponds to a policy violation, an audit alert is generated. |
| US11113686B1 |
System and method for a mobile wallet
A computer-implemented method includes receiving a request for a financial transaction between a mobile wallet of a user and a merchant; generating a displayable and scannable transaction code; sending the transaction code to one of a mobile device or the merchant for the other of the mobile device and the merchant to scan to request a transfer of funds from the mobile wallet of the user to the merchant; generating a verification request to confirm the information included in a transfer request; receiving a verification response confirming the information included in the transfer request; and transferring funds to the merchant upon receiving the verification response. |