最新美国发明专利第2020-12-29期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US10880500B2	Pixel apparatus and CMOS image sensor using the same A pixel apparatus may include a pixel circuit and a voltage attenuator. The pixel circuit includes multiple pixels, each pixel including photoelectric conversion element. The pixel circuit is structured to receive incident light and output an output signal having pixel voltages in response to the received incident light. The pixel circuit operates in at least one of a quad mode outputting the output signal based on photocharges from a single photoelectric conversion element only and a multi-sum mode outputting the output signal based on photocharges from multiple photoelectric conversion elements. The voltage attenuator is coupled to the pixel circuit. The voltage attenuator can be enabled, when the pixel circuit operates in the multi-sum mode, to receive the output signal and adjust the pixel voltages of the output signal by a predetermined ratio determined by the multi-sum mode.
US10880499B2	Information processing device and information processing method [Object] To provide an information processing device and an information processing method that can further shorten a time taken to perform processes related to an output of a captured image.[Solution] Provided is an information processing device including a processing unit configured to process each piece of first data transferred with a first data density and second data transferred with a second data density that is different from the first data density based on pixel signals output from each of a plurality of pixels. The processing unit executes at least one of processing of outputting an image based on the first data and image-processing on the second data based on the first data.
US10880498B2	Image processing apparatus and image processing method to improve quality of a low-quality image An image processing apparatus includes a first combination unit that receives a far-infrared image and multiple reference images obtained by capturing the same object as that of the far-infrared image and generates a first composite signal which is a composite signal of the multiple reference images and a second combination unit that combines the far-infrared image and the first composite signal to generate a quality-improved image of the far-infrared image. The first combination unit generates the first composite signal on the basis of a visible image-far-infrared image correlation amount and a near-infrared image-far-infrared image correlation amount. The first combination unit sets a contribution ratio of a reference image, which has a larger amount of correlation with the far-infrared image, of the two reference images, that is, the visible image and the near-infrared image to a large value and generates the first composite signal.
US10880496B1	Including video feed in message thread Aspects of the present disclosure involve a system comprising a computer-readable storage medium storing a program and method for including a video feed in a message thread. The program and method provide for determining that a message thread is being concurrently displayed on a first device associated with a first user and on a second device associated with a second user, the first user and the second user corresponding to contacts within a messaging application; and transmitting, in response to the determining, image data captured on the first device to the second device, for display within the message thread on the second device.
US10880492B2	HDR image capturing device and control method therefor Provided are a high dynamic range (HDR) image capturing device, which is capable of capturing an HDR image optimized in various situations, and a control method therefor. The HDR image capturing device comprises: an image acquisition unit for capturing and acquiring a predetermined image; a brightness analysis unit for analyzing the brightness of the acquired image; a color analysis unit for analyzing the color of the acquired image; a focus analysis unit for analyzing the focus of the acquired image; and a control unit for controlling the image acquisition unit, the brightness analysis unit, the color analysis unit, and the focus analysis unit according to an HDR capturing mode, which is to be inputted, wherein the control unit can: check whether the image acquisition unit supports the HDR when the HDR capturing mode is input; control the image acquisition unit to perform HDR image capturing, and perform HDR image processing on the captured image when the image acquisition unit supports the HDR; and control the brightness analysis unit, the color analysis unit, and the focus analysis unit so as to analyze the brightness, color, and focus of the acquired image and perform HDR image processing on the captured image according to the analyzed brightness, color, and focus when the image acquisition unit does not support the HDR.
US10880489B2	Monitoring method for goods shelf, monitoring system for goods shelf and goods shelf A monitoring method for a goods shelf, a monitoring system for a goods shelf and a goods shelf are disclosed. The monitoring system for the goods shelf includes an image acquisition device and a controller. The image acquisition device includes a camera that is moveable along the goods shelf, and is configured to acquire an image of commodities on the goods shelf by the camera, and to send the image of the commodities to the controller; the controller is configured to recognize the image, which is acquired by the camera, of the commodities, so as to determine whether or not at least one of a group consisting of commodity shortage and commodity misplacement exists.
US10880488B2	Rapid real-time large depth of field, whole body, multi-spectral optical imaging for skin surveillance and photography Systems and methods for generating high resolution 3D images of the entire human skin comprising at least two sets of cameras, a first set being sensitive to UV light while the second set being sensitive to visible frequencies of light, wherein subsets of each camera set are focused at different focal distances; wherein the system provides a rotatable structure wherein the two sets of cameras are mounted adjacent to the source of light; wherein the rotatable structure is engaged to a program that can define the point of rotation, so as to allow for a reproducible mechanism to take images along the path of rotation.
US10880486B2	Image pickup apparatus and control method thereof An image pickup apparatus aims to control an illuminating part so as to obtain an image of good visibility irrespectively of a state of a zooming operation under dark environment. The image pickup apparatus has an image pickup part including a zoom lens, and a lens driving part configured to drive the zoom lens in an optical axis direction. The image pickup apparatus is capable of performing shooting by using an illuminating part configured to irradiate a subject with light. The image pickup apparatus comprises a control unit configured to control a dimming speed of the illuminating part according to drive information of the zoom lens.
US10880485B2	Imaging apparatus for controlling display of a microphone level meter and mute function during moving image capture The present disclosure relates to an imaging apparatus that images a subject and allows recording of moving image data. A setting unit of the imaging apparatus receives first setting for setting ON or OFF of display of level meter (201) on display unit (190) and second setting for setting ON or OFF of a mute function which is a function of recording a sound indicating silence. When a moving image is captured, a controller of the imaging apparatus is configured such that, if the display of level meter (201) is OFF in the first setting, and further, when the mute function is ON in the second setting, at least one of level meter (201) and mute display (202) is displayed in display unit (190).
US10880483B2	Method and apparatus to correct blur in all or part of an image The effect of blur in digital images of an imaging device is corrected by displaying a preview image of a scene to be captured in a user interface of a device. A user input designates a first subject in the preview image and a plurality of images that include the first subject and a second subject are captured. The plurality of images are processed to obtain a combined image, taking into account at least one of a focal length of a lens of the imaging device and a zoom level of a lens of the imaging device, and the combined image includes the first subject and the second subject, the first subject in the combined image is substantially blur free, and the second subject in the combined image is blurred compared to the first image. The combined image is stored in a memory of the device.
US10880481B2	Image stabilization control apparatus, image capturing apparatus, image capturing system, control method, and storage medium An image stabilization control apparatus acquires information regarding a shutter speed related to image capturing that is to be performed by the image capturing apparatus, and controls to cause a first correction unit and a second correction unit that respectively employ different correction methods, to correct shake of the image capturing apparatus. The image stabilization control apparatus changes the allocation of correction of the shake to the first correction unit and the second correction unit based on information regarding the shutter speed.
US10880479B2	Imaging device including mechanical fixing mechanism responsive to large external force An imaging device includes an image pickup element that captures an object image to generate image data, a sensor holder that holds the image pickup element, a sensor driver that moves the sensor holder in a plane orthogonal to an optical axis, a fixing mechanism that mechanically fixes the sensor holder at a predetermined position, and a controller that controls the fixing mechanism based on a signal indicating a degree of displacement of the image pickup element due to an external force.
US10880474B1	Systems and methods for mobile imaging Various systems and processes may achieve mobile imaging. In particular implementations, systems and processes for mobile imaging may include the ability to capture video data with a number of video cameras mounted on a vehicle, determine positioning information as the cameras capture video data, and place audio marks in the video data of each camera. Each camera may be positioned to obtain a different view relative to the vehicle and adapted to capture video data as the vehicle travels. The positioning information may, for example, be derived from a global positioning system transceiver. The audio marks may be generated a number of times as the vehicle travels, and the time for each activation logged. The captured video data from each camera may be synchronized based on the audio marks and then combined to generate a 360 degree video, as well as related images, which may be correlated with map locations.
US10880473B2	Imaging apparatus with focus breathing correction Provided are an imaging apparatus, a signal processing method for an imaging apparatus, and a non-transitory computer readable recording medium storing a signal processing program for an imaging apparatus capable of capturing a high quality image with a compact configuration. An imaging lens 10A is composed of, in order from an object side, a first lens group G1 that is fixed during variable magnification, a second lens group G2 and a third lens group G3 that move during variable magnification, and a fourth lens group G4 that is fixed during variable magnification. The first lens group G1 is composed, in order from the object side, a first-a lens group G1a that is fixed during focusing, a first-b lens group G1b that moves during focusing, and a first lens group rear group G1c that is fixed during focusing. Fluctuation of an angle of view with focusing is corrected through image processing.
US10880472B1	Smart sensor measurement system A first camera captures a first image of a scene, and a second camera captures a second image capturing thermal distribution across the scene. The first image is processed to detect one or more objects of interest in the scene and to identify respective surface characteristics of the objects. The first image is overlaid with the second image to identify regions of interest in the second image corresponding to the objects of interest in the first image. Values of pixels that belong to respective regions of interest in the second image are converted to temperature values using respective conversion functions that reflect respective emissivity values determined by the identified respective surface characteristics of the corresponding objects of interest in the first image. The temperature values are analyzed to monitor thermal conditions of the one or more objects of interest in the scene.
US10880468B1	Metrology system with transparent workpiece surface mode A metrology system is provided with a transparent workpiece surface mode, for which the system is configured to vary a focus position over a plurality of positions along a Z height direction proximate to a workpiece. An image stack is acquired, wherein each image of the image stack includes a first surface (e.g., an upper surface of the workpiece) that is transparent or semi-transparent and at least a second surface that is at least partially viewable through the first surface. A plurality of focus curves are determined based on the image stack (e.g., with pattern projection utilized for improved contrast), from which first, second, etc. local focus peaks may be determined from each focus curve that correspond to the first, second, etc. surfaces, respectively. An image is displayed (e.g., extended depth of field, 3D) including a selected surface and for which features of the selected/displayed surface may be measured.
US10880467B2	Image sensors with phase detection auto-focus pixels An image sensor pixel array comprises a plurality of image pixel units to gather image information and a plurality of phase detection auto-focus (PDAF) pixel units to gather phase information. Each of the PDAF pixel units includes two of first image sensor pixels covered by a shared micro-lens. Each of the image pixel units includes four of second image sensor pixels adjacent to each other, wherein each of the second image sensor pixels is covered by an individual micro-lens. A coating layer is disposed on the micro-lenses and forms a flattened surface across the whole image sensor pixel array to receive incident light.
US10880466B2	Method of refocusing images captured by a plenoptic camera and audio based refocusing image system A method and system is provided for refocusing images captured by a plenoptic camera. In one embodiment the plenoptic camera is in processing with an audio capture device. The method comprises the steps of determining direction of a dominant audio source associated with an image; creating an audio zoom by filtering out all other audio signals except those associated with said dominant audio source; and performing automatic refocusing of said image based on said created audio zoom.
US10880465B1	Determining capture instructions for drone photography based on information received from a social network Methods, Systems, and Devices are disclosed for using drone imaging to capture images at events. Capture instructions are provided to a drone device to aid in image capture. The capture instructions may include factors-of-interest. The factors-of-interest may include social graph information received from a social network and used to determine subject faces to target for image capture by the drone device. The factors-of-interest may also include current geographical location information of one or more friends identified in the social graph. This information may also be used to locate subjects for image capture. The social graph information may also be used to distribute any images captured to subjects appearing in those images.
US10880464B1	Remote active camera and method of controlling same Provided is a remote active camera including an image capture unit; a gimbal unit that changes a direction in which the image capture unit is directed; a memory in which images having an identification number are stored; a communication unit that transmits acquired images to a remote control apparatus and receives target designation information from the remote control apparatus; a tracking unit that includes a first tracking unit which tracks a position of a preset reference target from a first image, and a second tracking unit which tracks positions of the designation target and the reference target from a second image; and a controller that compares identification numbers of the first and second images, estimates or detects a position value of the designation target on the basis of positions of the designation target and the reference target, and a position of the reference target, and controls the gimbal unit.
US10880459B2	Optical device and imaging device with mechanism for reducing condensation In an optical device, a lens assembly includes a lens for receiving light and a holder for holding the lens. A circuit board performs at least one process based on the received light. A housing has an opening and is configured to house the lens assembly and the circuit board therein such that at least part of the circuit board faces the lens assembly, and the lens assembly is exposed via the opening. A mechanism for defining a passage located around the lens assembly to communicate with the opening. The passage guides air, entering an inside of the housing via the opening, so as not to be directed toward the circuit board.
US10880457B2	Image processing apparatus, image capturing apparatus, image processing method, and storage medium There is provided an image processing apparatus. A setting unit sets a first processing region in a part of a captured range. A selection unit selects a plurality of tracking target points in a first captured image of a plurality of captured images. A detection unit detects a motion vector of each tracking target point between the first captured image and a second captured image subsequently captured after the first captured image. A determination unit determines whether a moving object has appeared in the first processing region. A control unit performs control to iterate a first process set until it is determined that the moving object has appeared in the first processing region, and to iterate a second process set after it is determined that the moving object has appeared in the first processing region.
US10880456B2	Image pickup device and electronic system including the same An image pickup device includes a first camera, a second camera, a first image signal processor (ISP) and a second ISP. The first camera obtains a first image of an object. The second camera obtains a second image of the object. The first ISP performs a first auto focusing (AF), a first auto white balancing (AWB) and a first auto exposing (AE) for the first camera based on a first region-of-interest (ROI) in the first image, and obtains a first distance between the object and the first camera based on a result of the first AF. The second ISP calculates first disparity information associated with the first and second images based on the first distance, moves a second ROI in the second image based on the first disparity information, and performs a second AF, a second AWB and a second AE for the second camera based on the moved second ROI.
US10880455B2	High dynamic range color conversion using selective interpolation Embodiments relate to circuitry for pixel conversion of images for display. A circuit converts input pixel values of an image using a color conversion function. A lookup table memory circuit stores a mapping of color converted values and input pixel values where the mapping represents the color conversion function. The circuit produces a color converted value from the lookup table as a color converted version of a first input pixel value responsive to the first input pixel value being within a first range. The circuit may also produce a color converted version of a second input pixel value by interpolating a subset of the color converted values received from the lookup table responsive to the second input pixel being within a second input range.
US10880453B2	Image processing device and method, program, recording medium, and inkjet printing system An image processing device (100) includes a non-discharge correction processing unit (114) that performs an image correction process for correcting an image defect caused by a non-discharge nozzle in an inkjet head and includes, as different files, a first halftone processing program file (152) that performs first halftone processing for a normal portion, which is an image region other than a non-discharge correction portion to be subjected to non-discharge correction and a non-discharge portion, and a second halftone processing program file (154) that performs second halftone processing for the non-discharge correction portion. The image processing device executes the first halftone processing program file (152) for the normal portion in an input image (102) and executes the second halftone processing program file (154) for the non-discharge correction portion, thereby obtaining a non-discharge-corrected halftone image (104).
US10880449B2	Image reading apparatus and image reading method An image reading apparatus includes: a transporting unit; a reading unit that reads the document that is transported; a detecting unit that is provided upstream of the reading unit in the transporting direction and outputs a detection value that tells a transmittance of the document; and a control unit that clips image data at a document area by comparing values of pixels constituting a read image data generated by the reading unit with a threshold value for division into the document area and a background area; wherein the control unit performs clipping by using a first threshold value if the transmittance told by the detection value is less than a predetermined value, and the control unit performs clipping by using a second threshold value that is less than the first threshold value if the transmittance told by the detection value is not less than the predetermined value.
US10880448B2	Image reading device and image forming apparatus An image reading device includes a reading unit that reads an image formed on a first surface of a medium; a support unit that supports the medium from a second surface opposite to the first surface; and a pressing unit that blows air from a first surface side so as to press a portion of the medium to be read by the reading unit against the support unit.
US10880447B2	Image processing apparatus and image processing method An image processing apparatus includes a size acquisition unit and a decision unit. The size acquisition unit acquires first size information indicating a first sheet size of a first sheet surface read by an image reading unit. The decision unit decides second image information indicating a second image size of a second image to be stored of a second sheet surface different from the first sheet surface based on first image information indicating a first image size of a first image to be stored based on the first size information.
US10880443B2	Communication terminal displays a position of hand-held image forming apparatus representing a line-feed distance with respect to recording medium A communication terminal communicates with an image forming apparatus to be moved on a medium to perform image formation. The communication terminal includes a display and circuitry configured to receive a notification from the image forming apparatus and to display a preview of an image to be formed by the image forming apparatus. The circuitry is further configured to distinguish, on the preview, one of a plurality of lines included in the image to be formed from a rest of the plurality of lines in accordance with a content of the notification and display operation aiding information for aiding an operation of the image forming apparatus in accordance with the content of the notification.
US10880442B2	Electronic device and a non-transitory computer-readable recording medium An image forming apparatus manages restart setting information that defines settings related to restarting of remote connection with a computer, controls remote connection, and changes the restart setting information according to an instruction. When remote connection is terminated as a result of a function that terminates remote connection being executed, if the restart setting information includes a setting for automatically restarting remote connection, remote connection is automatically restarted and, if the restart setting information includes a setting for not automatically restarting remote connection, remote connection is not automatically restarted.
US10880440B2	Echo canceller and method therefor The invention relates to a computer-implemented method for updating at least one frequency-domain filter coefficient Wi,j(k) of an echo canceller having at least one channel and at least one segment per channel, the filter coefficients of the echo canceller being updateable in the frequency domain at a time block m comprising: determining a canceller output Em(k) over the mth time block; determining a canceller error ε(k) over the m−th time block; determining a look-backward error (k); determining a look-forward error {right arrow over (ε)}(k) as {right arrow over (ε)}(k)=Em(k)−λ{right arrow over (Δ)}(k) wherein {right arrow over (Δ)}(k) is based on ∑ i = 0 C - 1 ⁢ ∑ j = 0 S - 1 ⁢ ℰ ⁡ ( k ) ⁢ X i , j , m - ℓ ⁢ * ⁡ ( k ) ∑ a = 0 C - 1 ⁢ ∑ b = 0 S - 1 ⁢  X a , b , m - ℓ ⁡ ( k )  2 + ϵ ⁢ X i , j , m ⁡ ( k ) ; determining an optimal update step-size μi,j,m(k) from said canceller output Em(k) over the mth time block, from said canceller error ε(k) over the m−th time block, from said look-backward error (k), and from said look-forward error {right arrow over (ε)}(k); and updating said at least one filter coefficient Wi,j(k) by using said optimal update step-size μi,j,m(k). The invention further pertains to an echo canceller implementing said method.
US10880435B2	Systems and methods for customer sentiment prediction and depiction A system includes one or more memory devices storing instructions, and one or more processors configured to execute the instructions to perform steps of a method for providing customer sentiment depiction. The system may receive customer information and session information and generate a customer sentiment estimate. The system may then receive an indication of a detected customer voice characteristic and generate an updated customer sentiment estimate that may be transmitted to a customer service terminal for display.
US10880432B1	Non-associative telephony and SMS messaging Systems and methods for managing non-associative communications between devices is provided. A first call chain that indicates a routing between phone numbers is stored. A first phone call or a first SMS text is received from a first session initiation protocol (SIP) provider. Based on information provided by the first SIP provider, (i) a sender identity of the first phone call or the first SMS text; (ii) a receiver identity of the first phone call or the first SMS text; and (iii) an access mode of the call chain are determined. If the receiver identity corresponds to a first phone number in the first call chain, a second phone call or a second SMS text is initiated via a second SIP provider, from a second phone number in the first call chain, based on the sender identity and the access mode.
US10880431B2	Sending notifications based on an active mode of operation of a mobile device Systems and methods are described herein for sending notifications associated with different use or active modes of a mobile device, such as a smart phone, tablet, and so on. For example, a mobile device may be in a busy mode, where a user associated with the mobile device is busy on a call, and/or in an entertainment mode (or other non-communication mode), where the user is utilizing entertainment functions provided by the mobile device (e.g., watching a video, playing a video game, listening to a podcast, and so on).
US10880424B2	Recording method for mobile terminal and mobile terminal The present disclosure provides a recording method for mobile terminal and a mobile terminal. The method includes: when the mobile terminal is in a call with a contact, obtaining information of the contact in the current call with the mobile terminal; determining whether the information of the contact in the current call is found in an automatic recording list preset in the mobile terminal; and activating call recording when the information of the contact in the current call is found in the automatic recording list in the mobile terminal.
US10880422B2	Display assembly and mobile terminal The embodiments of the disclosure provide a display assembly and a mobile terminal, relate to a technical field of mobile terminal. The display assembly includes a display screen and a positioning member. The display screen may include a display panel and a backlight module. The backlight module may include a base plate. The display screen defines a light transmitting hole at least penetrating through the backlight module, the light transmitting hole is configured for accommodate the functional device. The positioning member is formed on a side of the base plate facing away from the display panel and located at a periphery of the light transmitting hole.
US10880409B2	Mixed qualitative, quantitative sensing data compression over a network transport In one embodiment, a device in a serial network de-multiplexes a stream of traffic in the serial network into a plurality of data streams. A particular one of the data streams is associated with a particular endpoint in the serial network. The device determines that data from the particular data stream associated with the particular endpoint should be reported to an entity external to the serial network based on an event indicated by the data from the particular data stream. The device quantizes the data from the particular data stream. The device applies compression to the quantized data to form a compressed representation of the particular data stream. The applied compression is selected based on a data type associated with the data. The device sends a compressed representation of the particular data stream to the external entity as Internet Protocol (IP) traffic.
US10880406B2	Controlling access to data resources on high latency networks A DACD for controlling access to data resources in a high latency network is provided. The DACD includes a high latency network interface for connecting with a remote network, and a local network interface for connecting with a local network. Communications with the local network have a lower latency than communications with the remote network. The DACD is programmed to receive using the local network interface a request including a resource identifier that identifies a data resource which may be safely accessed by at most one server device at a time, query an activation database on the local network with the resource identifier to determine that the resource identifier is in a deactivated status, broadcast using the high latency network interface a broadcast request that includes the resource identifier, and update the activation status for the resource identifier in the database to an activated status for the local network.
US10880405B2	Managing client computing systems using distilled data streams The present disclosure relates to techniques for managing client computing systems, such as a client distributed-computing system. In one embodiment, a desired state of the client distributed-computing system and a current state of the client distributed-computing system are received. Measurement data generated by a plurality of components of the client distributed-computing system is received. The measurement data is processed using one or more analytical or statistical techniques to generate distilled data. Based on one or more policies and the desired state, the distilled data and the current state are analyzed to determine one or more actions predicted to converge the current state of the client distributed-computing system towards the desired state. One or more control commands corresponding to the one or more actions are provided to the client distributed-computing system. The one or more control commands cause the client distributed-computing system to perform the one or more actions.
US10880401B2	Optimization of data access and communication in memory systems A memory system having one or more memory components and a controller. The controller can receive access requests from a communication connection. The access requests can identify data items associated with the access requests, addresses of the data items, and contexts of the data items in which the data items are used for the access requests. The controller can identify separate memory regions for separate contexts respectively, determine placements of the data items in the separate memory regions based on the contexts of the data items, and determine a mapping between the addresses of the data items and memory locations that are within the separate memory regions corresponding to the contexts of the data items. The memory system stores store the data items at the memory locations separated by different memory regions according to different contexts.
US10880395B2	System and method for improvements to a content delivery network Provided is a content delivery method and architecture for ways to improve the caching of content at one or more content providing devices of a Content Delivery Network (CDN). In particular, systems and methods are disclosed that vary the requirements to store resources or content within a caching device using a dynamic popularity threshold. This popularity threshold may be varied based on a measured fullness of the storage capacity of the cache device. In another example, the dynamic popularity threshold may be further varied based on a cache pressure, which is an indication of how often the cache replaces stored items with new items. The adjustment to the popularity threshold for caching particular content at the caching device may thus be based on a number of requests for content received at the device to tune the caching procedure for a particular region of the CDN.
US10880394B2	Transparent cache system and method for transparently caching multimedia content from multiple content providers A system and method for transparently caching content from multiple content providers. For example, one embodiment of a system comprises: a plurality of transparent caches deployed within a corresponding plurality of transportation vessels/vehicles, each transparent cache to store multimedia content from a plurality of different content providers including subscription-based content providers requiring authentication, each transparent cache coupled to a first mobile network interface; a plurality of edge caches of a content service provider (CSP), the edge caches deployed at designated locations at which the transportation vessels/vehicles are expected to pass or arrive, each of the plurality of edge caches to be filled from one or more source caches in accordance with a cache fill policy; a plurality of stationary network interfaces, each stationary network interface coupled to at least one edge cache, each stationary network interface to automatically establish a high speed wireless connection with the first mobile network interface when a corresponding transportation vessel/vehicle passes within range of the stationary network interface; and cache management logic to identify portions of multimedia content from each of the different content providers to be transmitted to a first transparent cache of a first transportation vessel/vehicle, wherein the first transparent cache is to be filled from one or a plurality of the edge caches as the first transportation vessel/vehicle reaches a corresponding one or a plurality of the designated locations.
US10880390B2	Method and apparatus for reducing network resource transmission size using delta compression A near end point of presence (PoP) of a cloud proxy service receives, from a client device, a request for a network resource. A far end PoP from a plurality of PoPs of the cloud proxy service is identified. Responsive to determining that a version of the network resource is stored in the near end PoP, a request for the network resource is transmitted to the far end PoP with a version identifier that identifies that version. The far end PoP receives, from the near end PoP, a response that includes difference(s) between the version of the network resource stored in the near end PoP with a most current version of the network resource. The response does not include the entire network resource. The near end PoP applies the specified difference(s) to the version that it has stored to generate an updated version of the network resource, and transmits it to the client device.
US10880386B2	Method and system for scheduling, indexing, categorizing, and triggering digital content and gifts for future delivery The present method and system is directed generally to a process and system, preferably embodied in an app executable on a personal computing device, wherein a user may generate content and schedule the generated content for future delivery to a designated recipient, living or not living at the time of the scheduling of the delivery. The delivery may be set to occur a known future date, on a future milestone wherein the start date is known or not known, or on the occurrence of a future event of unknown date to the user at the time of delivery scheduling and that may, or may not, occur. The invention relates to an app and web-based system and method that allows users to send digital content and add physical gifts a specified user at a specified time and/or the occurrence of a specified event in the future.
US10880384B1	Multi-tasking resource management Described herein is a system for allocating resources among multiple skills to enable multitasking. The system tracks use of resources using skill sessions. In one case, the system suspends a skill session to release a resource for allocation to another resource. In another case, the system determines if multiple skill sessions can remain active and use resources to provide output to the user at the same time.
US10880382B2	Configuring meaning and state conditions for paired IoT devices An Internet of Things (IoT) pairing controller is described that enables an end-user to customize the implementation of IoT devices. The IoT pairing controller may receive a pairing request to pair a combination of active-active IoT devices or active-passive IoT devices. The IoT pairing controller may facilitate a selection of a pairing signal type that is used to pair the IoT devices, such as light, sound, heat, Bluetooth, and Wi-Fi. An end-user may select multiple pairing signal types, of which the IoT pairing controller may toggle between based on ambient environmental conditions, or as a failsafe confirmation of a “not sensed” pairing condition between IoT devices. The IoT pairing controller may associate client-defined statements with paired (i.e. sensed”) and unpaired (i.e. “not sensed”) pairing conditions of a pair of IoT devices.
US10880378B2	Contextual conversation mode for digital assistant One embodiment provides a method, including: receiving, at an information handling device, an indication to initiate a contextual session associated with a context; receiving, at the device, at least one context input during a duration of the contextual session; and responsive to receiving the at least one context input, extending the duration of the contextual session, wherein the extended duration does not require receipt of subsequent indications. Other aspects are described and claimed.
US10880377B2	Methods and systems for prioritizing events associated with resources of a networked storage system Methods and systems for a networked storage system are provided. One method includes utilizing a training dataset for prioritizing a plurality of events associated with a networked storage system using a plurality of resources. Each event is associated with a plurality of parameters, each parameter associated with a severity level determination for each event; and each event is provided an initial priority score based on a time when each event is selected for resolution. The plurality of parameters may include an event source. The method further includes using the training dataset to identify a weight of each parameter by executing an iterative prediction algorithm; determining a priority score of a new event based on the weight of each parameter; updating the training dataset with the priority score of the new event; and adjusting a resource impacted by the new event, based on the priority score of the new event.
US10880376B1	Downloading chunks of an object from a storage service while chunks of the object are being uploaded A network storage service is disclosed that is configured to provide functionality for enabling individual chunks of an object to be downloaded from the storage service while other chunks of the same object are being uploaded to the storage service. The storage service maintains status data for uploads of storage objects identifying chunks that have completed uploading, chunks that are currently uploading, and chunks that are pending upload. The storage service exposes the status data to client computing devices such as, for instance, via a network services application programming interface. The client computing devices can utilize the status data to download chunks of an object as soon as the chunks have been completely uploaded to the storage service. The storage service can be accessed by way of a content distribution network point of presence in some configurations.
US10880370B2	Virtual network manager system A virtual network manager system comprising a server in communication with a node, the server including at least one virtual network function (VNF), a cluster manager in communication with the server, the cluster manager is configured to detect a change in a health of the VNF on the server and when the change in the health of the VNF occurs generate a signal to a node to perform an action, the action including at least one of throttling traffic to the VNF, rerouting traffic to an alternate VNF, changing a weight value for traffic to the VNF, and generating an alert indicating a relative capacity change at the VNF.
US10880365B2	Information processing apparatus, terminal apparatus, and method of processing information An information processing apparatus includes circuitry configured to receive processing request information indicating contents of a specific processing from a terminal apparatus connected to the information processing apparatus via a network, determine allocation of processing for performing the specific processing indicated in the processing request information by allocating first processing to be performed by the information processing apparatus and second processing to be performed by the terminal apparatus based on terminal information indicating specification of the terminal apparatus, the first processing and the second processing constituting the specific processing, transmit, to the terminal apparatus, allocation information indicating the second processing allocated to the terminal apparatus, and perform the first processing allocated to the information processing apparatus.
US10880363B2	Integrating logic in micro batch based event processing systems A distributed event processing system is disclosed that receives continuous data streams, registers a continuous query against the data streams, and continuously executes the query as new data appears in the streams. In certain embodiments, the distributed event processing system deploys and executes applications (e.g., event processing applications) by distributing the execution of the application on a cluster of machines within the system. In certain embodiments, the system provides users with the ability to specify logical rules in an application. The system processes the logical rules by generating a DAG of transformations representing the logical rules and converts the DAG of transformations into a logical rules Resilient Distributed Dataset (RDD) DAG of transformations. The system processes events in an event batch against the RDD DAG of transformations to generate a set of output results for the user.
US10880360B2	File transmission in a cluster A file is transmitted to a plurality of hosts. The hosts are divided into host groups. A host in each host group is selected as a master host. A data block is received by a master host in a host group. The master host sends the data block to both a master host in a next host group and a next host in the host group in order that the next host in the host group sends the data block to a next host of the next host in the host group, and the master host in the next host group sends the data block to both a master host in a next host group of the next host group and a next host of the next host in the next host group.
US10880356B1	Techniques for switching communication channels This disclosure describes, in part, techniques for switching between communication channels in order to reduce latency of data transmissions. For instance, an electronic device may establish a first network connection with a network device and second network connection(s) with other electronic device(s). The electronic device may then send data received from the network device to the other electronic device(s). In some circumstances, the electronic device may establish a new network connection with the network device, such as on a different communication channel and/or use a different network band. In such circumstances, the electronic device may use one or more techniques to establish new network connections(s) with the other electronic device(s) in order to reduce the latency it takes to send the data received from the network device to the other electronic device(s).
US10880353B2	Systems and methods for cloud storage direct streaming Embodiments of the present disclosure may provide a system comprising a client source device, a server, and a client viewing device. The client source device may be configured to: encode content as a plurality of fragments of at least one quality parameter, send each encoded fragment to a cloud storage, generate metadata associated with each encoded fragment, and provide the generated metadata associated with each encoded fragment. The server may be configured to: receive each encoded fragment, store each encoded fragment into the cloud storage for retrieval, and facilitate an authentication for access to the metadata associated with each encoded fragment. A client viewing device configured to request the authentication for access to the metadata, receive the metadata, determine a desired fragment of the plurality of fragments encoded in a desired quality parameter, and retrieve the desired fragment in the desired quality parameter.
US10880351B1	Systems and methods for adapting content items to endpoint media devices Systems, methods, and machine-readable media for adapting content items to device operations of an endpoint media device are disclosed. A first content composite may be created by one or more processing devices for delivery in a packet stream from a content provider system via one or more networks, where the first content composite may include an adaptable content item corresponding to a set of one or more audio and/or video packets corresponding to audio and/or video content. The first content composite may be transmitted, where, consequent to delivery of the first content composite to a first endpoint media device or a second endpoint media device, the first endpoint media device or the second endpoint media device may perform one operation relating to a second content item of the first content composite, where the adaptable content item may be modified based on the second content item.
US10880349B2	Quality-driven streaming Quality-based optimizations of a delivery process of streaming content may be enabled. The optimization may take the form of quality-based switching. To enable quality-based switching in a streaming client, the client may have access to information about the quality of an encoded segment and/or sub-segment. Quality-related information may include any number of added quality metrics relating to an encoded segment and/or sub-segment of an encoded video stream. The addition of quality-related information may be accomplished by including the quality-related information in a manifest file, including the quality-related information in segment indices stored in a segment index file, and/or providing additional files with quality-related segment information and providing a link to the information from an MPD file. Upon receiving the quality-related information, the client may request and receive a stream that has a lower bitrate, thereby saving bandwidth while retaining quality of the streaming content.
US10880348B2	Methods and devices for controlling streaming over a radio network Method carried out in a radio terminal for playing streaming media, which terminal includes a modem for connecting to a radio network, and a data streaming client including a streaming data buffer for receiving streaming data from a streaming data server through the radio network, the method comprising transferring data buffer size information from the streaming client to the modem; signaling the network, by means of the modem, to indicate streaming service initiation and data buffer size; buffering media data of a streaming media file received through the network according to a buffer scheme adapted dependent on the data buffer size; playing streaming media generated from buffered media data; and signaling the network, by means of the modem, to indicate streaming service termination. A buffer filling signal may be received from the network, which includes a recommendation of a suitable instance for buffer filling, wherein the buffer scheme may be determined dependent on the received signal.
US10880346B2	Streaming spherical video A method includes receiving a first video stream at a playback device, the first video stream having a first quality, receiving at least two second video streams at the playback device, the at least two second video streams each corresponding to a portion of the first video stream, the at least two second video streams having a second quality, the second quality being a higher quality as compared to the first quality, playing back the first video stream at the playback device, selecting a third video stream from the at least two second video streams based on a view perspective of a user of the playback device, and playing back the third video stream together with the first video stream at the playback device.
US10880345B2	Virtual meeting conduct procedure, virtual meeting conduct system, and virtual meeting member interface Proposed is a method of holding virtual meetings, a system for holding virtual meetings, and a virtual meeting participant interface, which provide for the interaction of a plurality of participant automated workstations, and of at least one automated workstation of an authorized speaker, in which control over the holding of a meeting is carried out from the automated workstation of the authorized speaker by means of striking keys on a keyboard, and wherein each participant is allocated a separate key. The proposed group of inventions provides for the simultaneous control of the transmission of audio content and of video content, and the automated workstation of the authorized speaker is used for controlling when which conference participant is granted the right to speak.
US10880343B2	Conferencing system exploiting terminal diversity The technology relates to a method for testing the quality of a VoIP communication link between a multipoint control unit and a terminal, the method being performed at the multipoint control unit providing the capability for terminals to participate in a VoIP session, the method comprising: —sending an audio sample to the terminal,—receiving a reception report from the terminal, the reception report containing reception statistics for the audio sample,—computing a Mean opinion score—i.e. MOS—based on the reception report.
US10880339B2	Broadcast signal transmission device, broadcast signal receiving device, broadcast signal transmission method and broadcast signal receiving method An apparatus for transmitting a broadcast signal, includes a processor to generate a content component for a broadcast service, service signaling information including object flow information for an object flow which carries the content component and signaling information for listing broadcast services, the object flow information including format information representing a payload format of an object, and the service signaling information being carried by transport packets; and a transmitter to transmit the broadcast signal including the signaling information, the service signaling information and the content component.
US10880335B2	Network security systems and methods This disclosure relates to systems and methods for managing connected devices and associated network connections. In certain embodiments, trust, privacy, safety, and/or security of information communicated between connected devices may be established in part through use of security associations and/or shared group tokens. In some embodiments, these security associations may be used to form an explicit private network associated with the user. A user may add and/or manage devices included in the explicit private network through management of various security associations associated with the network's constituent devices.
US10880334B2	Apparatus and method for securely connecting to a remote server A method for securely connecting to a remote server that provides improved Internet security. In the method, a client receives a request to connect to a remote server associated with a domain name. The client, when resolving the domain name, determines whether the remote server supports at least one predetermined IP layer security protocol. The client performs a key exchange protocol with the remote server to generate at least one shared secret in response to determining that the remote server supports the at least one predetermined IP layer security protocol. The client connects to the remote server using the at least one shared secret in the IP layer security protocol.
US10880332B2	Enterprise security management tool Methods and systems for configuring security management settings within an enterprise network are disclosed. One method includes receiving network concordance data at an enterprise security management configuration tool from a plurality of nodes within an enterprise network, and, based on the network concordance data, classifying each of the plurality of nodes based on an affinitization between the two or more nodes. The method also includes defining a profile for one or more nodes or grouped nodes, and defining one or more solutions within the enterprise security management configuration tool, the one or more solutions each including one or more nodes of the plurality of nodes. The method also includes receiving a deployment selection identifying at least one of the one or more solutions, and, in response to the deployment selection, generating a security settings file describing security settings for each of the one or more nodes.
US10880330B2	Systems and methods for detection of infected websites System and method for detecting an infected website are disclosed. A semantic finder receives top-level domains and identifies keywords of the top-level domains representing a predetermined semantics. The keywords are compared with irrelevant bad terms to find at least one irrelevant term. An inconsistency searcher searches the top-level domains and detects at least one fully-qualified domain name carrying the at least one irrelevant term. A context analyzer evaluates context information associated with the irrelevant term, identifies at least one frequently-used term identified in the context information, and determines whether the at least one frequently-used term is unrelated to a generic content of the at least one fully-qualified domain name An irrelevant bad term collector extracts the at least one frequently-used term unrelated to the generic content and adds the extracted frequently-used term to an irrelevant bad term list for detecting the infected website.
US10880327B2	Systems and methods for signaling an attack on contactless cards Example embodiments of systems and methods for data transmission system between transmitting and receiving devices are provided. In an embodiment, each of the transmitting and receiving devices can contain a master key. The transmitting device can generate a diversified key using the master key, protect a counter value and encrypt data prior to transmitting to the receiving device, which can generate the diversified key based on the master key and can decrypt the data and validate the protected counter value using the diversified key. In an embodiment, the transmitting device can signal an attack or potential attack through the counter value. The attack signaling can further include information relating to the attack or potential attack.
US10880325B2	Systems and methods for an artificial intelligence driven smart template The present disclosure describes systems and methods for determining a subsequent action of a simulated phishing campaign. A campaign controller identifies a starting action for a simulated phishing campaign directed to a user of a plurality of users. The simulated phishing campaign includes a plurality of actions, one or more of the plurality of actions to be determined during execution of the simulated phishing campaign The campaign controller responsive to the starting action, communicates a simulated phishing communication to one or more devices of a user. The campaign controller determines a subsequent action of the plurality of actions of the simulated phishing campaign based at least on one of a response to the simulated phishing communication received by the campaign controller or a lack of response within a predetermined time period and initiating, responsive to the determination, the subsequent action of the simulated phishing campaign.
US10880323B2	Method and device for determining data anomaly Computer-implemented methods, non-transitory, computer-readable media, and computer-implemented systems for determination of anomalous data are provided. In a computer-implemented method, a plurality of data packets is received within a predetermined time period, the plurality of data packets comprising a data structure. A historical distribution of historical data including the data structure as the data packets is determined. The plurality of data packets is compared to the historical distribution to generate a comparison result. If it is determined that data anomaly exists in the plurality of data packets according to the comparison result, an alert indicating the data anomaly is generated.
US10880322B1	Automated tracking of interaction with a resource of a message Information of an electronic message to be delivered to an intended recipient is received. For an original resource identifier included in the electronic message, a corresponding alternative resource identifier that can be at least in part used to obtain the original resource identifier is determined. The original resource identifier included in the electronic message is replaced with the corresponding alternative resource identifier to generate a modified electronic message. The modified electronic message with the alternative resource identifier is allowed to be delivered to the intended recipient instead of the electronic message with the original resource identifier. An interaction associated with the original resource identifier is tracked using the alternative resource identifier.
US10880321B2	Method and system for learning representations of network flow traffic Disclosed is an improved method, system, and computer program product for learning representations or embeddings of network flow traffic. The disclosed invention operates on network flow data which are then used as inputs to a deep-learning architecture that learns to embed the data into a vector space.
US10880314B2	Trust relationships in a computerized system Methods and apparatuses for a computerized system are disclosed. A data processing device receives information from at least one source of log information in the computerized system and detects, based at least in part on said received log information, at least one security protocol related event at a first host device, the at least one security protocol related event being initiated by a second host device. Information is then stored for determination of a trust relationship record based on the detected at least one security protocol related event and information of the second host device.
US10880311B1	Digital identification system Methods, systems, and apparatus, including computer programs encoded on computer storage media, to provide digital identification. One of these methods includes comparing the location of a requester of a digital identification to the location of an owner of the digital identification. The method also includes providing information about the digital identification to the requester based at least in part on determining that the requester and the owner are within a predetermined distance.
US10880308B1	Integrated system component and electronic device A computer-implemented method for implementing an integrated device includes operating a component of a security and/or automation system, wherein the component is housed with an electronic device that is connected to electrical wiring of a building, communicating between the component and a control panel of the security and/or automation system, and providing power to the component and the electronic device through the electrical wiring.
US10880305B2	Authentication and access to a device of a fixed line communication device A method is provided accessing a device of a fixed line system comprising: (i) determining at least one measurement result by a measurement function of the device; (ii) comparing the at least one measurement result with at least one predefined value; (iii) conducting a predefined operation if the comparison indicates that the at least one measurement result corresponds to the at least one predefined value; (iv) determining the at least one measurement result by the measurement function, wherein the measurement function is connected or connectable via a connection to a signature function of an access system; (v) wherein the signature function comprises a circuitry that affects parameters measured by the measurement function of the device. Also, a method for access the device via an access system, the device, the access system and a computer program product as well as a computer-readable medium are suggested.
US10880301B2	Identification device and identification method An identification device includes: M transmission antenna elements each of which transmits a first transmission signal to a predetermined area including a first living body; N receivers disposed surrounding the predetermined area, and each including a reception antenna element and receiving, using the reception antenna element, a first reception signal including a reflection signal obtained as a result of the first transmission signal being reflected by the first living body, during a predetermined period; a memory storing teacher signals which are M×N second reception signals obtained about a second living body; and a circuit which calculates a plurality of correlation coefficients from the teacher signals and M×N first reception signals obtained as a result of each of the N receivers receiving the first reception signal, performs biometric authentication of the first living body, and identifies the first living body and the second living body as identical.
US10880298B2	Method for generating a key and access control method The invention relates to a method for generating a cryptographic key for applying an access control method to a resource of a server (20) by a client-terminal (10), the method comprising the following steps: (E1) receiving a test biometric datum (DBtest), (E2) applying a decoding method to the test biometric datum (DBtest) and of a reference datum (Dref) for obtaining a cryptographic key (K′) such that: if the test biometric datum (DBtest) corresponds to the reference biometric datum (DBref), the cryptographic key generated (K′) is the legitimate cryptographic authentication key (Kl), otherwise, the generated cryptographic key (K′) is an illegitimate cryptographic authentication key (Ki) not allowing authentication of the client-terminal (10) at the server (20) during an access control, and (E3) using the generated key for applying an access control method (F3) to a resource of the server (20) by the client-terminal (10).
US10880297B2	Forwarding method, forwarding apparatus, and forwarder for authentication information in Internet of Things Embodiments of the present application disclose a forwarding method, a forwarding apparatus, and a forwarder for authentication information in the Internet of Things. The method is applied to a constrained node and includes: receiving authentication information; determining whether the authentication information is received for the first time; and if the authentication information is received not for the first time, forwarding the authentication information; or if the authentication information is received for the first time, determining whether the authentication information is valid authentication information, and if the authentication information is not valid authentication information, discarding the authentication information, or if the authentication information is valid authentication information, verifying the valid authentication information, and forwarding the valid authentication information after the verification succeeds. The embodiments of the present application can reduce resources of the constrained node, and improve performance of the Internet of Things.
US10880294B2	End-to-end authentication at the service layer using public keying mechanisms In a machine-to-machine/Internet-of-things environment, end-to-end authentication of devices separated by multiple hops is achieved via direct or delegated/intermediated negotiations using pre-provisioned hop-by-hop credentials, uniquely generated hop-by-hop credentials, and-or public key certificates, whereby remote resources and services may be discovered via single-hop communications, and then secure communications with the remote resources may be established using secure protocols appropriate to the resources and services and capabilities of end devices, and communication thereafter conducted directly without the overhead or risks engendered hop-by-hop translation.
US10880293B2	Authentication of vehicle-to-vehicle communications Systems, methods, and devices for authenticating vehicle-to-vehicle communication are disclosed. A method includes receiving sensor data from a first vehicle and receiving secondary sensor data from a second vehicle. The method includes extracting, based on the sensor data and the secondary sensor data, an authentication comprising one or more of: a proximity of the second vehicle to the first vehicle or a common object identified by the sensor data and the secondary sensor data. The method includes determining whether the authentication satisfies a trust threshold of the first vehicle.
US10880291B2	Mobile identity for single sign-on (SSO) in enterprise networks Single sign-on (SSO) techniques of the present disclosure provide for enterprise application user identities that are bound to a mobile identity (e.g. IMSI) associated with a user equipment (UE) for authentication, using general bootstrapping architecture (GBA)/general authentication architecture (GAA) functionality in combination with identity provider (IDP) functionality (e.g. OpenID Connect), all of which may be provided in an enterprise network. The present techniques need not rely on GBA/GAA infrastructure of a mobile network operator (MNO), and have little or no impact or effect on the mobile network.
US10880290B2	Comprehensive authentication and identity system and method A comprehensive authentication and identity system and method are disclosed. A central profile is created for a user which includes user information that can be passed back or otherwise utilized by websites (e.g. for registrations, logins, etc.) The user information may include the user's username, password, contact information, personal information, marketing preferences, financial information, etc. For website registrations, the user may provide a mobile communication number that is utilized to perform a type of mobile communication device verification process. As part of a website login, the user may provide identifiable information (e.g. a username) that is looked up by the system or website to determine a mobile communication number for the user, which is used for a verification process. If the verification process is completed successfully, the user may be logged into the website. For accessing the system directly, a user may go through a mobile communication device verification process.
US10880285B2	Self-driving vehicle test authentication Embodiments of the present disclosure disclose a data authentication method, a data authentication apparatus, and a data authentication system. An embodiment of the data authentication method comprises: in response to receiving an authentication request submitted to authentication nodes in an authentication system for authenticating that a vehicle passes self-driving scene testing, verifying the authentication request, the authentication request containing simulation data regarding self-driving testing of the vehicle in a simulated driving scene and authentication award information; in the case of passing the verifying, generating an award record for an authentication node that completes verification first based on the authentication award information, and writing a verification result and the award record into a distributed data block chain corresponding to the authentication system. The embodiment realizes authentication to the driverless vehicle simulation testing data, which may ensure reliability of the authentication result while reducing the time and cost consumed for the authentication.
US10880283B1	Techniques for remote access to a computing resource service provider Method and apparatus for remotely accessing a computing resource service provider are disclosed. In the method and apparatus, a first computing environment sends, to a second computing environment, a request for information usable for accessing the second computing environment. In response to the request, the information that is usable to remotely access a subset of the computing resources of the second computing environment is made available to a computing system of the first computing environment, whereby the subset of the computing resources is provisioned for a customer of the second computing environment and the customer of the second environment operates the first computing environment.
US10880276B1	System and method for allowing access to an application or features thereof on each of one or more user devices A system and method allows a user to register one or more PINs on one or more user devices, and then authenticates the user to a server via the PIN and a token deposited on the user device being used by the user to allow access to an application on the user device. Individual tokens, or all tokens deposited on the user devices for a user account, may be invalidated, and the user is prevented from authenticating himself or herself via a PIN to allow access to an application on any device for which the last token deposited was invalidated, until the same or different PIN is registered for that device.
US10880275B2	Secure analytics using homomorphic and injective format-preserving encryption Secure analytics using homomorphic and injective format-preserving encryption are disclosed herein. An example method includes encoding an analytic parameter set using a homomorphic encryption scheme as a set of homomorphic analytic vectors; transmitting the set of homomorphic analytic vectors to a server system; and receiving a homomorphic encrypted result from the server system, the server system having utilized the homomorphic encryption scheme and a first injective, format-preserving encryption scheme to evaluate the set of homomorphic analytic vectors over a datasource.
US10880274B2	Method of control of online sharing of digital photographs and video A method for authorizing online sharing of content including a digital photograph or video, includes receiving, at an electronic device, the content, identifying an image of a person in the content, identifying authorization conditions associated with the person, identifying an image of an object or audio in the content, based on both the image of the person identified and the image of the object or audio identified, determining if the authorization conditions associated with the person are met, and in response to determining that the authorization conditions are met, providing online access to the digital photograph or video.
US10880270B1	Network firewall for mitigating against persistent low volume attacks A network firewall detects and protects against persistent low volume attacks based on a sequence of network data having a pattern that matches by some threshold or percentage a sequence of network data from an earlier iteration of the same persistent low volume attack. The attack patterns are derived from tokenizing one or more elements from a captured sequence of network data that is representative of an attack iteration. Counts for different resulting tokens may be stored in a feature vector that represents the attack pattern. If subsequent sequences of network data have a sufficient number of similar token, a pattern match can be identified and the firewall can take protective action including blacklisting the sending clients, blocking the traffic, redirecting the traffic, sending a problem to verify the sender is an actual user, or other actions.
US10880268B2	Decrypting transport layer security traffic without man-in-the-middle proxy A network security platform (NSP) device and interaction method are disclosed. The interaction method provides network packet analysis for secure transmission protocols using ephemeral keys or keys that are negotiated dynamically. The NSP may be part of an Intrusion Protection System, or firewall. The disclosed approach does not use man-in-the-middle proxy. Instead, it includes monitoring connections ends: client and/or server, to intercept the required data or negotiated (or changed) encryption keys. Decrypted data may be sent to an NSP sensor in a secure manner for analysis. Alternatively, intercepted keys used for the encrypt/decrypt operations may be sent to an NSP sensor in a secure manner every time they are changed. The NSP sensor may then use the obtained keys to decrypt traffic prior to providing it to the inspection engines. Embodiments focused on inbound traffic to a web server may coordinate between a web server and an NSP.
US10880264B1	Customer-side and provider-side translation of Internet Protocol addresses without pre-shared prefixes A network device may receive an IPv6 packet that includes an IPv6 source address and an IPv6 destination address. The network device may determine, based on the IPv6 packet including an extension header that includes an address prefix option, whether to translate the IPv6 packet into an IPv4 packet. Additionally, based on a determination to translate the IPv6 packet into the IPv4 packet, the network device generates an IPv4 packet that includes an IPv4 source address and an IPv4 destination address. Because the PLAT unit may make the determination whether to translate the IPv6 packet into an IPv4 packet based on the IPv6 packet including the address prefix option instead of based on the IPv6 source address including a customer-translation (CLAT) source prefix, it may be unnecessary to distribute the CLAT source prefix to the network device.
US10880261B2	Personal web address management system It is realized that improved processes and systems for delivering personal web content are needed. Various aspects and embodiments are related to systems and methods to provide personalized web content for users accessing a personal web addresses. Some embodiments relate to systems and methods of generating personal web addresses and redirecting associated users to a landing page, and generating personalized web content for users on the landing page. Some embodiments relate to systems and methods of tracking activity of a user and associating the activity with a known identify of the user.
US10880249B1	Systems and methods for a filter and message delivery platform Embodiments of the present invention provide improved techniques for securely delivering content and messages to endpoints. Based on a strategic program for delivering the content, the messages may be delivered according to a schedule and to particular endpoints. Embodiments of the present invention provide the ability to apply filters in order to determine a set of endpoints according to the delivery schedule. The messages may be further modified to improve security by adding authentication mechanisms and other attributes that enhance the content delivered to the endpoints.
US10880248B2	Orchestrator agnostic application container visibility A network device is configured to establish a messaging bus with a container networking plug-in, which is associated with a container virtual network. The network device is also configured to obtain, via the messaging bus, networking information for one or more containers hosted at the at least one container-hosting computing device. Based on the networking information, the network device provides visibility of one or more containers below the network device.
US10880246B2	Generating and displaying customized avatars in electronic messages Among other things, embodiments of the present disclosure improve the functionality of electronic messaging software and systems by generating customized images with avatars of different users within electronic messages. For example, users of different mobile computing devices can exchange electronic communications with images generated to include avatars representing themselves as well as their friends, colleagues, and other acquaintances.
US10880239B2	Information transmission control method, apparatus, and system Embodiments of the present invention disclose an information transmission control method, apparatus, and system. Implementation of the method includes: receiving, by a first communications server, information data from a first terminal served by the first communications server; determining, by the first communications server, a target identifier of the information data; and sending the information data to a second communications server if the target identifier belongs to identifier information of the second communications server, so that the second communications server sends the information data to a second terminal corresponding to the target identifier. The first communications server and the second communications server correspond to two communications platforms; and the first communications server determines a target of the information data from a local platform, and then performs cross-platform forwarding, thereby implementing cross-platform instant messaging.
US10880238B2	Chat-based method and system for displaying to the end user greetings or custom messages based on qualifiers The embodiment is a chat-based method to display to the end user a greeting or a custom message based on qualifiers saved in the database. The system allows triggering interaction between a web page visitor and the embodiment user being a webpage or application owner. Real-time processing and conditions set up in the HTTP Server and Customer State server allows associating particular visitors with conditions which may be either inclusive or exclusive based on one or more logical qualifiers. It allows the user of the embodiment to set up a velocity with which agents may be able to respond as an outcome of potential greeting what shall address the issues of queues delaying customer service process.
US10880231B2	Systems and methods for determining routing information for a network request Systems and methods are disclosed for processing a request for network resources in a network comprising at least one endpoint a first pool of destinations. According to certain embodiments, a first request is received from an endpoint. A determination of whether to validate a first destination identifier associated with the first request is made based on at least one of a first timestamp and a first pool identifier associated with the first request. If it is determined to validate the first destination identifier, a target destination identifier is determined, and the first request is forwarded based on the target destination identifier. The requested network resource is received, and is transmitted to the endpoint.
US10880230B2	Application distribution execution system based on network slicing, apparatus applied thereto, and method of operating apparatus Disclosed is technology for a method of allocating different networks to respective services and users by allocating E2E network slices to a core network and a radio network and, more particularly, to technology for a new hybrid application distribution execution environment capable of realizing a virtual network environment (for example, a vDC) but allowing a data service optimized for a communication network used by a terminal to be easily provided (through API exposure).
US10880228B2	Proactive channel agent Automated devices send messages of a first batch sequence individually to a target queue of a receiving node of a cluster of server nodes, the messages having a different sequence number indicative of their relative positions within the batch sequence, and each is associated with a first logic unit of work identifier. In response to determining that a message counter meets a threshold, a force commit packet is generated to include the sequence number of the last batch message sent to the target queue. If the force commit packet sequence number is not the last position number within the batch sequence, a second logic unit of work identifier is associated with a subset sequence of the batch of messages having sequence numbers spanning from the first number to the force commit packet sequence number, and the subset sequence messages are committed to the receiving node target queue.
US10880224B1	Method and apparatus for selecting a voice coding rate based on the air interface efficiency of the serving base station A voice coding rate is selected for a voice call involving a user equipment (UE) device based on an air interface efficiency of the base station serving the UE device. The air interface efficiency of the base station is determined based on at least one of (i) a beamforming capability of the base station, (ii) a multi-user multiple-input multiple-output (MU-MIMO) capability of the base station, or (iii) an antenna configuration of the base station. The voice coding rate could be selected by either the UE device or by the base station. The UE device transmits to the base station during the voice call one or more voice frames that convey voice data coded at the selected voice coding rate. During the voice call, a new air interface efficiency may be determined, and a new voice coding rate may be selected based on the new air interface efficiency.
US10880222B2	Method and apparatus for transmitting a RLC layer status report A method of a terminal may be provided for transmitting an RLC status protocol data unit (PDU). The method may include receiving an RLC data unit from a base station, configuring the RLC status PDU indicating whether the RLC data unit is received, where the RLC status PDU includes at least one of a negative acknowledgement (NACK) sequence number field and a NACK range field; and transmitting the RLC status PDU to the base station.
US10880220B1	Credit mechanisms for packet policing Provided are systems and methods for packet policing for controlling the rate of packet flows. In some implementations, an integrated circuit is provided. The integrated circuit may comprise a memory, a counter, and a pipeline. The integrated circuit may be operable to, upon receiving packet information describing a packet, determine, using the pipeline, a drop status for the packet. Determining the drop status may include determining a previous number of credits available, a number of new credits available, a current number of credits available, and a number of credits needed to transmit the packet. The drop status may be determined by comparing the number of credits needed to transmit the packet against the current number of credits available. The integrated circuit may further update the information stored for a policing context in the memory based on the drop status and the number of credits needed to transmit the packet.
US10880218B2	Load balanced access to distributed endpoints using resiliently advertised global network addresses Systems and methods are described to enable the load-balanced use of globalized network addresses, addressable throughout a network to access a network-accessible service. A set of global access points are provided, which advertise availability of the globalized network addresses. Globalized network addresses can be divided among different pools, and each service can be associated with addresses of more than one pool. To increase resiliency, access points can advertise different pools of addresses to different neighboring devices, creating different pathways to reach the access point. If an error occurs on a neighboring network, a client can try to access the service via an address of a different pool, which can be expected to be routed through a different neighboring network, thus enabling the client to reach the access point.
US10880215B2	Systems and methods for providing I-SID translation in SPB networks Systems, methods, and apparatuses are disclosed herein for providing an Individual Service Instance identifier (“I-SID”) translation service for accessing services on different networks. Packets designated for specific services via an I-SID Tag may be received at an edge network device and a lookup may be performed to locate the service on another network via the I-SID corresponding to the service, the I-SID being mapped at another network. The I-SID may be updated with the newly-located I-SID in order for the packet to reach an appropriate service on the other network.
US10880214B2	Service routing packet processing method and apparatus, and network system A service routing packet processing method and apparatus. The method includes a service node (SN) receives a first service routing packet from a first service router (SR), where the first service routing packet comprises path identification information and identification information of a destination SN, the SN performing service processing on the first service routing packet to obtain a second service routing packet, where the second service routing packet includes the path identification information and identification information of a source SN, and where the value of the identification information of a source SN is the identification information of the destination SN comprised in the first service routing packet, and the SN sending the second service routing packet to the first SR.
US10880213B2	Building management system network with power conservation via adaptive use of network protocols One implementation of the present disclosure is a system including a data network, a source device, and a target device. The data network is configured to wirelessly communicate data, the source device is configured to wirelessly communicate data, and the target device is configured to wirelessly communicate data. The target device and the source device utilize a first medium access control (MAC) protocol during a first time interval of a duty cycle and a second MAC protocol during a second time interval of the duty cycle.
US10880209B2	Controller for, and a method of processing data over, a low-power, wireless software defined networking, SDN, architecture The present subject-matter provide a controller for a low-power, wireless, software defined networking, SDN, architecture. The controller comprises a processor and a memory storing instructions for execution by the processor. The instructions, when executed by the processor cause the controller to implement: a control layer arranged to detect a communication type for processing an application over the network, and translate the communication type into a plurality of phases chosen from a pre-defined set of phases to configure the nodes of the network to respond to the application according to the communication type.
US10880208B1	Offloads for multicast virtual network packet processing in a network interface card Systems and methods of offloading multicast virtual network packet processing to a network interface card are provided. In an example implementation, a network interface card can route packets in a virtual network. The network interface card can be configured to receive a data packet having a multicast header for transmission to a plurality of destination virtual machines. The network interface card can retrieve a list of next hop destinations for the data packet. The network interface card can replicate the packet for each next hop destination. The network interface card can encapsulate each replicated packet with a unicast header that includes a next hop destination virtual IP address indicating the next hop destination and a source virtual IP address, and transmit the encapsulated packets.
US10880207B2	Methods and systems for flow virtualization and visibility Identity information is decoupled from reachability information in packets transferred between hosts of a computer network by replacing forwarding information within said packets with an identifier having a format of the forwarding information, and applying forwarding labels, derived from the identifiers, which are then used in lieu of the forwarding information for conveying the packets within the network. During such conveyance, the packets are treated according to one or more policies prescribed on a basis of the identifier, which may be an IPv6 address. The forwarding labels may be MPLS labels.
US10880206B2	Multipath selection system and method for datacenter-centric metro networks A network adapter for a metro network and a system including the network adapter for the metro network comprising a receiver configured to receive a data packet of a packet data flow at an ingress port; a memory comprising instructions; a processor coupled to the memory and the receiver, the instructions causing the processor to be configured to determine whether a hash value of the data packet matches a flow identifier (ID) in a flow table; and obtain a flow category of the data packet responsive to the hash value of the data packet matching the flow ID; and a transmitter coupled to the processor and configured to transmit the data packet to a spine switch of a plurality of spine switches using the flow category.
US10880203B2	Centralized segment routing dataplane based backup path validation In one embodiment, a server has connectivity to a network that includes a plurality of nodes. The server stores a context identifier that is associated with backup path information stored at a particular node of the plurality of nodes, the backup path information indicating a backup path in the network. The server sends to the particular node a probe packet having a data plane instruction label that includes an identifier of the particular node, the context identifier and server identifier information. The context identifier in the probe packet causes the particular node to retrieve the backup path information and send the probe packet to a next hop node in the backup path based on the backup path information. The server determines whether the probe packet is received at the server after traversing the backup path, and validates the backup path for the particular node accordingly.
US10880201B2	Geographic positioning of data storage for efficient data flow across communication networks Techniques are provided for generating data on the optimum number of storage-hops, the location of the storage-hops, and the bandwidth distributions of the storage-hops to construct a complete flow network for transmitting data from a sender to a receiver via a communication network. The flow network can potentially include hundreds of storage-hops, depending on the time and duration of the data flow. An algorithm is further provided for constructing an unbounded flow network from a bounded set of input parameters. Moreover, the complexity of the algorithm does not depend on the number of storage-hops, so the model is suitable for both crowd supported and data center supported transfers.
US10880197B2	Methods, systems, and computer readable media for testing a network node using source code for programming a packet forwarding plane of the network node According to one method, the method occurs at a network equipment test device. The method includes receiving one or more source code files for programming a packet forwarding plane of a network node; analyzing the one or more source code files to determine test metadata, wherein analyzing the one or more source code files to determine the test metadata includes identifying source code portions that indicate conditions for rejecting or accepting packets and determining the test metadata based on the conditions; generating, using the test metadata, one or more test plans for testing the network node, wherein the one or more test plans define test packets to be sent to the network node for testing the network node's implementation of the conditions for rejecting or accepting packets; and testing the network node using the one or more test plans.
US10880196B2	Bi-directional speed test method and system for customer premises equipment (CPE) devices At a customer premises equipment (CPE) device in a broadband network, an invocation of a speed test by an auto-configuration server (ACS) is obtained. The invocation includes an activity detection threshold and an activity detection period. Responsive to the invocation, average interface utilization for the customer premises equipment (CPE) device is determined over the activity detection period. Responsive to the determining indicating that the average interface utilization for the customer premises equipment (CPE) device over the activity detection period does not exceed the activity detection threshold, the customer premises equipment (CPE) device cooperates with a speed test server to execute a speed test on the customer premises equipment (CPE) device using a speed test tool.
US10880189B2	System and method for a cloud computing abstraction with self-service portal for publishing resources In embodiments of the present invention, improved capabilities are described for a virtualization environment adapted for development and deployment of at least one software workload, the virtualization environment having a metamodel framework that allows the association of a policy to the software workload upon development of the workload that is applied upon deployment of the software workload.
US10880187B2	System and method for calculating distributed network nodes' contribution to service A method for calculating distributed network nodes' contribution to a service according to the present disclosure comprises the steps of: receiving, by a server, details of contribution to a service from a plurality of nodes; verifying, by the server, the received details of contribution to a service; announcing, by the server, the verified details of contribution to a service; and using a block chain including a block that includes the announced details of contribution to a service issued by one of the plurality of nodes, calculating the one node's contribution to a service. According to the present disclosure, it is possible to calculate distributed network nodes' contribution to a service. It is also possible to separately calculate the degrees of contribution of distributed network nodes to a specific service. Further, it is possible to ensure the transparency of the details of calculation of distributed network nodes' contribution to a service.
US10880181B2	Methods and apparatus for analysing performance of a telecommunications network A method for analysing performance of a telecommunications network is disclosed. The method comprises assembling values observed for a network performance parameter over a time window and constructing a time series by associating each performance parameter value with a representation of a time at which the value was observed. The method further comprises encoding the time series to generate a compressed representation of the time series, decoding the compressed representation of the time series to reconstruct the time series, calculating a reconstruction error between the time series and the reconstructed time series, and analysing the reconstruction error to determine if the assembled performance parameter values indicate an anomalous behaviour during the time window. Also disclosed are an apparatus and a computer program product configured to conduct methods for analysing performance of a telecommunications network.
US10880175B2	Developing security policies for deployment to mobile devices Techniques for enterprise policy rehearsals, rollouts, and rollbacks are described herein. The techniques can include a server receiving data associated with computing devices. The server compares the received data to data stored in a data repository. The data in the data repository corresponds to risks identified based on information collected from different computing devices prior to receiving the data associated with the computing devices. A risk profile is generated by the server based on comparing the received data to the repository data for each of the computing devices. The server causes, based on the risk profile for each of the computing devices, one or more responsive actions (e.g., using the risk profiles to prioritize deployment of software to the computing devices).
US10880171B2	Group policy object update compliance and synchronization Embodiments of the present invention provide for group policy object (GPO) update compliance. A method for GPO update compliance includes selecting both a compliance update and also a computing system as an endpoint targeted for receiving the compliance update, directing execution of a remediation process that applies the compliance update onto the selected endpoint and performing a re-scan of the selected endpoint subsequent to the execution of the remediation process. The method further includes executing a GPO update within a threshold period of time after the re-scan and repeating the re-scan after the GPO update and then comparing a log produced by the repeated re-scan after the GPO update with a log produced by the re-scan before the GPO update, detecting an out-of-compliance update in the comparison and responding to the out-of-compliance update by directing a repair of the out-of-compliance update using a domain login for the selected endpoint.
US10880169B2	Multiprotocol border gateway protocol routing validation Systems, methods, and computer-readable media for validating routing table information in a network. A network assurance appliance may be configured to retrieve implemented MP-BGP configuration data from a plurality of nodes in a network fabric and reference MP-BGP configuration data from a network controller. The network assurance appliance compares the implemented MP-BGP configuration data with the reference MP-BGP configuration data and determines that there is a MP-BGP misconfiguration of the implemented MP-BGP configuration data based on differences in the implemented MP-BGP configuration data and the reference MP-BGP configuration data.
US10880167B2	High reliability low latency configuration for wireless communications systems Methods, systems, and devices for wireless communication are described. Wireless communications systems as described herein may be configured to support several service types with different latency, reliability, or throughput rates or standards. One such service type may be referred to as high-reliability, low latency communication (HRLLC). Enhancements to improve HRLLC performance in coexistence with and as a complement to legacy service types, such as LTE are described. These include, for example, downlink and uplink control enhancements, channel state information (CSI) feedback enhancements, physical uplink shared channel (PUSCH) enhancements, and UL power control enhancements to support HRLLC.
US10880162B1	Linking logical broadcast domains Briefly, methods and apparatuses are described that link two or more logical broadcast domains.
US10880159B1	Centralized access of configuration data for computing resources This disclosure describes techniques for a configuration-monitoring service of a service provider network to provide users with the ability to access to configuration data across multiple accounts using a single account or other centralized access point. The configuration-monitoring service may allow users with multiple accounts registered with the service provider network to designate a central account (or “aggregator account”) through which the users can access and review configuration data across multiple accounts (or “source accounts”) and/or multiple regions (or “source regions”). After determining an aggregator account, the configuration-monitoring service may begin collecting configuration data from the source accounts and/or source regions, and transporting the configuration data to the aggregator region to be accessed using the aggregator account. The user may use their aggregator account to view a dashboard that presents the configuration data from the source accounts and/or source regions along with configuration data for the aggregator account.
US10880158B2	Identifying the realization status of logical entities based on a global realization number Some embodiments provide a method for determining a realization status of one or more logical entities of a logical network. The method, each time a particular event occurs, increments the value of a realization number and publishes the incremented value to a set of controllers of the logical network. Upon receiving data that specifies the state of a logical entity of the logical network, the method publishes the logical entity state's data to the set of controllers. In some embodiments, the method queries the set of controllers for a realization status of the state data for a set of logical entities that is published to the set of controllers up to a particular point of time. The submitted query, in some embodiments, includes a particular value of the realization number associated with the particular point of time.
US10880156B2	E-mail status notification system and method A system for alerting e-mail activity status. The system has at least one e-mail server for integrating N e-mail accounts, at least one second server communicating with the e-mail server adapted to monitor at the e-mail server; at least one computer readable medium (CRM) adapted to receiving an e-mail alert wherein the second server identifies activity status in the e-mail server according to a set of predetermined parameters. The second server alerts the CRM on the activity status. The parameters may consist of entries to e-mail accounts type of actions performed in an e-mail account and other activities and events. The invention further comprises methods of applying the aforementioned system.
US10880154B2	Distinguishing between network- and device-based sources of service failures In one example, the present disclosure describes a device, computer-readable medium, and method for distinguishing between network- and device-based sources of service failures in service networks. For instance, in one example, a method includes merging a first set of data with a second set of data to produce a merged data set. The first set of data relates to a customer device connected to a service network and the second set of data relates to the service network. A failure is predicted in the delivery of a service from the service network to the customer device, based on the merged set of data. It is determined whether a source of the failure is rooted in the customer device or in the service network.
US10880152B2	Root cause analysis for unified communications performance issues Methods, systems, and computer-readable medium to perform operations comprising determining a plurality of metrics of data trafficked through a session border controller (SBC), the SBC in communication with an endpoint device and positioned along a data transmission connection between a network and a IP multi-media subsystem (IMS); detecting a jitter performance metric of the data; in response to detecting the jitter, determining that an endpoint network response time (NRT) is degraded; in response to determining that the endpoint NRT is degraded, determining that an endpoint signaling response time (ART) is degraded; and in response to determining that the endpoint ART is degraded, identifying the endpoint device as a root cause of the jitter performance metric of the data.
US10880142B2	Radio communication method, radio terminal device, and base station device A radio communication method includes: by a radio terminal device, generating position indicating signals that are different between blocks of radio resources each of which is an allocation unit of data; mapping the position indicating signals generated and transmission data to the blocks; and transmitting a signal including the blocks; by a base station device, receiving the signal including the blocks of the radio resources; evaluating continuity of the blocks, based on the position indicating signals mapped to the blocks; and demodulating data mapped to the blocks for each radio terminal device, based on an evaluation result.
US10880139B2	Energy determinations for multi-user superposition transmissions Methods, systems, and devices for wireless communication using multi-user superposition (MUST) techniques in conjunction with multiple-input multiple-output (MIMO) techniques are described. A base station may configure an enhancement layer user equipment (UE) and a base layer UE with a transmit power ratio associated with enhancement layer transmissions and base layer transmissions. The base station may then transmit on the base layer and enhancement layer on multiple spatial layers using MIMO techniques. A UE may receive the transmission, determine the total power of the transmission on all spatial layers, and apply a power splitting constraint to determine the distribution of power for the transmission on the different spatial layers. The UE may then determine the transmit power of a transmission on a specific layer based on the power ratio configuration and use this information to demodulate and decode the transmission.
US10880136B2	Synchronizing a digital frequency shift An apparatus and a method for synchronizing a Digital Frequency Shift (DFS) for a signal to be transmitted over a wireless channel are disclosed. For example, the method, by a synchronizer, transmits a DFS trigger to a Digital Front End (DFE) processor and a Local Oscillator (LO) trigger to an LO in a synchronous manner, the method, by the DFE processor, applies a DFS on received data in response to receiving the DFS trigger, the method, by the LO, applies a complementary shift on a carrier signal in response to receiving the LO trigger, the method, by the upconverter, digital-to-analog converts and radio frequency modulates the digital frequency-shifted received data and the complementary-shifted carrier signal. In another example, the method, by the synchronizer, transmits a phase error to a phase error corrector that performs a phase error correction.
US10880134B2	Reception device, reception method, and communication system A reception device includes: a reception unit receiving transmission signals; a splitting unit splitting received signals into real component and imaginary component; a narrowing unit narrowing down possible signal point candidates of real component of the signal and imaginary component of the signal to signal point candidates based on the real component and the imaginary component of the split received signal; a signal point candidate hypothesizing unit hypothesizing one signal point candidate of real component from the signal point candidates of real component obtained by narrowing-down and hypothesizing one signal point candidate of imaginary component from the signal point candidates of imaginary component obtained by narrowing-down; and a signal estimation value calculating unit estimating real component of the signal based on the one hypothesized real component signal point candidate and estimating imaginary component of the signal based on the one hypothesized imaginary component signal point candidate.
US10880133B2	Voltage-mode transmitter driver Devices and methods for finite impulse response (FIR) feed forward equalization (FFE) at a transmitter are provided. A voltage-mode driver circuit has a main driver and an equalization driver. The main driver drives the digital output signal based on a received digital input signal. The equalization function of the equalization driver is enabled or disabled for a short duration of time to provide at least one of FIR equalization and pre-emphasis to the digital output signal. Pre-emphasis is effected by enabling a low-resistance path of the equalization driver based on the digital input signal such that, when the low-resistance path is enabled, it reduces the transmission resistance for a short period of time.
US10880123B1	Segmentation within a broadcast domain in ethernet VPN In one embodiment, a method includes receiving a broadcast, unknown-unicast, or multicast (BUM) frame from a connected device, where the BUM frame is associated with a broadcast domain, determining a segment within the broadcast domain associated with the device, adding to the BUM frame a segment identifier that uniquely identifies the segment within the broadcast domain, and causing the BUM frame to be delivered to one or more recipient network apparatuses in a network associated with the broadcast domain, where the segment identifier added to the BUM frame is configured to be used by the one or more recipient network apparatuses to selectively forward the BUM frame to connected devices that are associated with segment identifier.
US10880122B2	Forwarding packet A method of forwarding a packet and a network device are provided. According to an example of the method, when serving as a previous-hop device of a destination device of a first tunnel, the network device receives a first notification message from the destination device of the first tunnel, where information relating the first tunnel is carried in the first notification message. The network device configures a forwarding entry, where a match domain of the forwarding entry includes the information relating the first tunnel. After an encapsulated data packet is received, and if the encapsulated data packet matches the forwarding entry, the network device decapsulates the encapsulated data packet and then forwards the decapsulated data packet to the destination device of the first tunnel.
US10880116B2	Multi mode interface and detection circuit A communication interface circuit includes a plurality of terminals, two receiver circuits, and a detection circuit. The detection circuit is coupled to at least one of the terminals and detects a communication format, and the detection circuit enables one of the two receiver circuits based on the detected communication format.
US10880112B2	Multicast traffic in a virtual extensible local area network (VXLAN) Multicast traffic in a virtual extensible local area network (VXLAN). In some embodiments, a method is provided. The method includes registering a network device as a virtual extensible local area network (VXLAN) tunnel endpoint (VTEP) of a VXLAN. The VXLAN includes an overlay network and the overlay network is implemented on an underlay network. The method also includes receiving multicast traffic from the multicast source. The method further includes transmitting the multicast traffic to one or more multicast receivers using the underlay network.
US10880108B2	Optimized wireless content loading scheduler Systems and methods for multicasting a dataset to a fleet of vehicles by a deadline based on respective transit schedules of vehicles in the fleet are disclosed. Based on the vehicle transit schedules, a time segment may be determined for delivering at least a portion of the dataset to at least a subset of the vehicles in the fleet. The determination may be based on a maximum number of fleet vehicles that are scheduled to be simultaneously in transit. The determination may be additionally or alternatively based on an available transmission bandwidth, a time segment duration, a minimum transit duration, and/or other criteria. A multicast transmission including at least a portion of the data set is initiated based on the determination. Multiple multicasts and unicasts may achieve the complete transmission of the entire dataset to the entire fleet of vehicles prior to a deadline.
US10880106B1	Active power over ethernet control apparatus with low power consumption An active power over Ethernet control apparatus with low power consumption includes a control unit and a low-power-consumption control circuit. The control unit is installed inside a power sourcing equipment. The low-power-consumption control circuit includes a detecting circuit, a handshaking circuit, and a self-holding circuit. The detecting circuit provides a first control signal. The handshaking circuit receives the first control signal and provides a second control signal. The self-holding circuit receives the second control signal. When a powered device is not connected to the power sourcing equipment, a power-supplying path from the power sourcing equipment to the powered device is disconnected. When the powered device is connected to the power sourcing equipment, the handshaking circuit is controlled by the first control signal and the self-holding circuit is controlled by the second control signal to make the power-supplying path be connected.
US10880104B2	Methods and apparatus to manage timing in a blockchain network In a method for operating a node in a blockchain network, a node in the network automatically determines whether a new block has been committed to a blockchain in the network. In response to determining that the new block has been committed, the node automatically uses a block identifier for the new block to generate a prestochanistic timing value. Also, the node automatically uses the prestochanistic timing value to determine whether to trigger a contingent operation. For instance, the node may automatically use a function that is both prestochastic and deterministic to determine a current expiration value for the node, and the node may use the current expiration value to determine whether registration for the node should be renewed. The node may automatically send a re-registration request to the blockchain network in response to a determination that registration for the node should be renewed. Other embodiments are described and claimed.
US10880103B2	SRAM-based authentication circuit A memory device includes a memory block that includes a plurality of memory bits, wherein each bit is configured to present a first logical state; and an authentication circuit, coupled to the plurality of memory bits, wherein the authentication circuit is configured to access a first bit under either a reduced read margin or a reduced write margin condition to determine a stability of the first bit by detecting whether the first logical state flips to a second logical state, and based on the determined stability of at least the first bit, to generate a physically unclonable function (PUF) signature.
US10880102B2	Method and apparatus for logic cell-based PUF generators Disclosed is a physical unclonable function generator circuit and testing method. In one embodiment, a physical unclonable function (PUF) generator includes: a PUF cell array comprising a plurality of bit cells configured in a plurality of columns and at least one row, wherein each of the plurality of columns is coupled to at least two pre-discharge transistors, and each of the plurality of bit cells comprises at least one enable transistor, at least two access transistors, and at least two storage nodes, and a PUF control circuit coupled to the PUF cell array, wherein the PUF control circuit is configured to access the plurality of bit cells to pre-charge the at least two storage nodes with substantially the same voltages allowing each of the plurality of bit cell having a first metastable logical state; to determine a second logical state; and based on the determined second logical states of the plurality of bit cells, to generate a PUF signature.
US10880101B2	Method and circuit for de-biasing PUF bits A device includes an array including a plurality of bit generating cells arranged in a plurality of rows and columns and a PUF generator. The PUF generator includes a plurality of column multiplexers, each column multiplexer coupled to a plurality of the columns from the array; a plurality of sense amplifiers, each sense amplifier being associated with a respective one of the column multiplexers; and a plurality of de-biasing circuits, each de-biasing circuit associated with a respective column multiplexer and coupled to an output of a respective one of the sense amplifiers. Each de-biasing circuit is operable to provide an output for generating a PUF signature that is dependent on more than one sensed bit from the bit generating cells associated with the columns coupled to the de-biasing circuit's respective column multiplexer, whereby a sensing bias of the sense amplifier to which the de-biasing circuit is coupled is reduced.
US10880100B2	Apparatus and method for certificate enrollment An apparatus includes a processor coupled to a memory wherein the processor and the memory are configured to provide a secure execution environment. The memory includes a shared secret value. The processor is configured to receive a certificate, wherein the certificate includes a device identifier and a digital signature. The processor validates the certificate based on the digital signature and the device identifier, recovers a cryptographic key based on the shared secret value and the device identifier, and performs a cryptographic operation based on the recovered cryptographic key.
US10880088B1	Data communication target control with contact tokens A target transceiver transfers target instructions to a control server that associates a data source with contact information, conditions, and tokens. The target transceiver transfers the contact tokens to a source transceiver for the data source. The source transceiver encrypts and transfers a data target ID and the token to the control server. The control server receives and decrypts the data target ID and the token and identifies the data source, the data target, and the conditions. The control server processes the conditions to select a portion of the contact information and transfers the selected portion of the contact information to the source transceiver. The source transceiver transfers the user data to the target transceiver based on the selected contact information.
US10880087B2	System and method for service-to-service authentication The invention relates to a computer-implemented system and method for service-to-service authentication. The method may comprise deploying the SSA service, deploying a micro service, and providing an SSA client that serves as an interface between the micro service and the SSA service. The micro service can send a request to the SSA service for an authentication token. The SSA service then generates the authentication token for the micro service, which is signed by the SSA service using an SSA service private key. The authentication token can be encrypted so that it is secure when sent by the SSA service to the micro service. The authentication token carries information necessary for the micro service to access a second micro service directly through validation of the authentication token by the second micro service based in part on a private key of the micro service previously generated by the SSA service.
US10880084B2	Utilization of SIM-mobile equipment communication channel for handset applications state monitoring An integrated circuit designed to be inserted into a port of a cellular communication device comprising a storage unit for storing an applet, wherein the applet comprises instructions for downloading to the UE device an application from an application server, obtaining a validation key shared with the application server, validating the application using the validation key, and sending to a cellular network service provider a request to unlock a locked use of the integrated circuit.
US10880083B2	Information processing apparatus and method An information processing apparatus includes a processor configured to receive, respectively from a plurality of external devices, plural pieces of encrypted data encrypted with a random number sequence. The processor generates parity data by using the received plural pieces of encrypted data. The processor stores the generated parity data in a memory. The processor receives a restoration request for restoring first encrypted data from a first external device among the plurality of external devices. The processor receives, respectively from one or more second external devices among the plurality of external devices other than the first external device, one or more pieces of second encrypted data among the plural pieces of encrypted data other than the first encrypted data. The processor restores the first encrypted data by using the received one or more pieces of second encrypted data and the parity data stored in the memory.
US10880082B2	Rekeying keys for encrypted data in nonvolatile memories In some examples, a device includes a memory controller to, during a power-on process of the device: read encrypted data from a nonvolatile memory, decrypt, using a first key, the encrypted data to produce decrypted data, encrypt, using a second key different from the first key produced as part of rekeying, the decrypted data to produce new encrypted data, and write the new encrypted data to the nonvolatile memory. A power-on code is to prevent booting of the device until all data in the nonvolatile memory has been encrypted using the second key.
US10880081B2	Storage device and storage system configured to perform encryption based on encryption key in file unit and method of operating using the same A storage system includes a host device and a storage device. The host device generates a file, and generates a unique file identifier (UFID) for each file, wherein the UFID is based on an identifier of the generated file and at least one logical address corresponding to the generated file. The storage device generates a key for encrypting or decrypting write data corresponding to the generated file based on the UFID and a random number, and encrypts the write data by using the key.
US10880080B1	Cryptographic key generation from biometric data Techniques are described for cryptographic key generation based on biometric data associated with a user. Biometric data, such as fingerprint(s) and/or heartbeat data, may be collected using one or more sensors in proximity to the user. The biometric data may be analyzed to generate a cryptographic key. In some implementations, the key may be employed by the user to access data, access certain (e.g., secure) feature(s) of an application, authenticate the user, digitally sign document(s), and/or for other purpose(s). In some implementations, the key may be re-generated for each access request or authentication instance, based on the user's fingerprint or other biometric data.
US10880075B2	Method and system for fast tracking navigation of blockchains via data manipulation A method for generating a blockchain configured for fast navigation includes: storing a blockchain comprised of a plurality of blocks, each block including a header comprised of a fast track flag, fast track reference, timestamp, and hash value, where the plurality of blocks includes standard blocks having a deactivated fast track flag and fast track blocks having an activated fast track flag; identifying a most recent fast track block based on the timestamp in the fast track blocks; identifying a most recent overall block based on the timestamp included in the plurality of blocks; generating a fast track hash value via hashing the most recent fast track block; generating a chain hash value via hashing the most recent overall block; and writing a new block to the blockchain including a block header comprised of a timestamp, activated fast track flag, the fast track hash value, and the chain hash value.
US10880064B2	System and method for data transmission between a server unit and a remote unit in a communication network There is provided a server unit in a communication network implementing a MIMO wireless communication, the server unit being configured to receive data from a backhaul transport network and perform baseband processing, the server unit being configured to transmit a data signal derived from the processed data to a remote unit over a number of MIMO layers, through a fronthaul link. The data signal transmitted to the remote unit comprising physical user data and physical control data. The server unit comprises a control data mapper configured to select at least one MIMO layer, the control data mapper being further configured to map at least a part of the control data to the at least one selected MIMO layers. The server unit is configured to send a copy of the physical user data on each MIMO layer, and the control data on the selected MIMO layers mapped thereto.
US10880063B2	System and method of UE-centric radio access procedure A method and system for operating a user equipment (UE) wherein a first set of radio access procedures are supported when the UE is in a first operating state, and a second set of radio access procedures are supported when the UE is in a second operating state.
US10880061B2	Method, network device and terminal device for transmitting reference signal Disclosed are a method, a network device, and a terminal device for transmitting a reference signal. The method includes: determining, by the network device of the first cell, a first resource element corresponding to the first cell, and at least one second resource element corresponding to at least one second cell; determining, by the network device, a resource element with the largest time domain resource and a resource element with the largest frequency domain resource among the first resource element and the at least one second resource element; determining, by the network device, a reference signal resource according to the resource element with the largest time domain resource and the resource element with the largest frequency domain resource; and transmitting, by the network device, a reference signal to a terminal device on the reference signal resource.
US10880059B2	Multiple CSI reports for multi-user superposition transmission According to an aspect, a radio access network node supports the transmission of multi-user superposition transmissions, where multi-user superposition transmission comprises transmitting, in each of a plurality of time-frequency resource elements, a modulation symbol intended for a first UE and a modulation symbol intended for a second UE, using the same antennas and the same antenna precoding. The radio access network node receives multiple CSI reports from the first UE for a first reporting instance. One or more of the received multiple CSI reports correspond to one or more respective multi-user superposition transmission states. The radio access network node also determines whether to use multi-user superposition transmission or an orthogonal multiple access transmission for scheduling the first UE in a first scheduling interval, based on the received multiple CSI reports.
US10880057B2	Method and apparatus for determining resource occupation state Disclosed in the present invention are a method and an apparatus for determining resource occupation state. The method comprises: a first node receiving SA information sent by at least one second node, the SA information being used for indicating resource occupation state of the second node; at each state maintenance moment, the first node determining, according to the service transmission cycle of the first node itself and the SA information, the resource occupation state within the state maintenance cycle which has a length of the service transmission cycle of the first node The solutions provided in the embodiments of the present invention can effectively support the sensing of the resource occupation state in various service transmission cycles, and reduce the complexity of resource occupation state maintenance and resource selection.
US10880055B2	Method and system for providing diversity in a network that utilizes distributed transceivers with array processing A communication device that comprises a plurality of distributed transceivers, a central processor and a network management engine may be configured based on one or more diversity modes of operations. The diversity modes of operations may comprise a spatial diversity mode, a frequency diversity mode, and/or a polarization diversity mode. Diversity mode configuration may comprise forming, based on selected diversity mode, a plurality of communication modules from the plurality of distributed transceivers, wherein each of the plurality of communication modules may comprise one or more antennas and/or antenna array elements, and one or more of said plurality of distributed transceivers associated with said one or more antennas and/or antenna array elements. The plurality of communication modules may be utilized to concurrently communicate multiple data streams. The multiple data streams may comprise the same data.
US10880049B2	Method and apparatus for multi-sTTI-based scheduling for transmitting and receiving data channel in LTE Provided is a method of scheduling for improving the performance of data channel detection in order to provide URLLC services in the 3GPP LTE/LTE-A system. In particular, a method of a UE may be provided for transmitting an uplink data channel or receiving a downlink data channel. The method may include receiving repetitive transmission information for the uplink data channel or the downlink data channel from a base station, and receiving the downlink data channel from the base station or transmitting the uplink data channel to the base station, based on the repetitive transmission information. The repetitive transmission information indicates a number of repetitive transmissions for the uplink data channel or the downlink data channel, and the repetitive transmission is performed based on on a unit of a slot or a unit of a sub-slot.
US10880048B2	Method and apparatus for partial retransmission in wireless cellular communication system A communication method and system are provided for converging a 5G communication system with IoT technology. A method by a terminal includes receiving first information related to a number of CBGs for a TB; receiving control information and data including at least one CBG for the TB, each CBG of the at least one CBG including either a first number of CBs or a second number of CBs, wherein the first number is a smallest integer that is larger than or equal to a value obtained by dividing a number of CBs for the TB by the number of CBGs for the TB, and the second number is a largest integer that is smaller than or equal to the value obtained by dividing the number of CBs for the TB by the number of CBGs for the TB; and decoding CBs included in the at least one CBG.
US10880047B2	Systems, methods and devices for link adaptation and reducing hybrid automatic repeat request overhead An apparatus, a system and a method use a class of dynamic switching mechanisms with multiple HARQ block sizes to reduce HARQ retransmission overhead while limiting the increase of HARQ ACK feedback overhead. The apparatus includes a first processing unit configured to estimate an intra-subframe fluctuation level of per-codeblock errors; a second processing unit configured to: map the intra-subframe fluctuation level to a hybrid automatic repeat request (HARQ) block size; determine a HARQ acknowledgement (ACK) format based at least in part on the HARQ block size; indicate the selected HARQ block size to a data transmitter; and generate a HARQ ACK. Per-code block link adaptation can be used to support multiple MCSs for a single user in each subframe with fine time-frequency granularity, with low-bandwidth signaling overhead and without a complete dependency on reference signal (RS) structure.
US10880043B2	Method and computer system for establishing an interactive consistency property Methods and computer systems for establishing an interactive consistency property between receivers of messages. Messages are transmitted to receivers by a sender over a communication network including disjoint communication paths for connecting receivers and sender. Switches include local clocks. Local clocks of non-faulty switches are synchronized to each other with a maximum error (precision), and receivers detect switch failures. Redundant copies of a message are forwarded by sender to each receiver across different disjoint communication paths. A switch of each disjoint path is configured such that redundant copies are forwarded to each receiver with a temporal distance between disjoint paths. That distance is selected such that all non-faulty receivers receive redundant copies in the same receive order, when the switches and communication links of the disjoint paths exhibit no failure. Each receiver concludes from the receive order whether and which redundant copy to accept to satisfy the interactive consistency property.
US10880041B2	Apparatus for transmitting broadcast signal, apparatus for receiving broadcast signal, and method therefor A transmitting device is disclosed. The transmitting device includes a controller that groups a plurality of transmitters into a plurality of groups including three or more groups and a plurality of code units that generate different output streams based on a data stream with respect to the plurality of groups. The controller delivers the output streams to the plurality of groups.
US10880040B1	Scale-out distributed erasure coding Overhead associated with data re-protection during scaling out and/or scaling up of a distributed cloud storage system can be reduced. A coding matrix that is to be utilized for erasure coding in a potential final configuration of the distributed cloud storage can be determined. During initial data protection, a portion of the coding matrix can be utilized to determine coding chunks for protecting data chunks stored within different geographical zones of the distributed cloud storage system. When additional zones are added to the distributed cloud storage system, a larger portion of the coding matrix can be utilized to erasure code the new configuration and accordingly, the existing coding chunks are considered as partially complete. Further, the partially complete coding chunks can be combined with data chunks stored within the newly added zones and coefficients of the larger portion of the coding matrix to generate complete coding chunks.
US10880036B2	Method for transmitting data, terminal device and network device Disclosed are a method for transmitting data, a terminal device and a network device. The method comprises: a terminal device determining an MCS level used to transmit a current target transmission block; the terminal device, according to the MCS level and a TBS mapping relationship when a pre-set first resource parameter is met, determining a first TBS corresponding to the MCS level, wherein the TBS mapping relationship comprises a mapping relationship between the MCS level and the TBS; the terminal device, according to a second resource parameter used to transmit the target transmission block and the first TBS, determining a second TBS; and the terminal device, according to the second TBS, sending the target transmission block to a network device, or receiving the target transmission block sent according to the second TBS of the network device. In this way, the terminal device can effectively obtain TBS information in the case that a value range of the resource parameter used to transmit data is relatively large.
US10880035B2	Unauthorized electro-optics (EO) device detection and response system A system is disclosed to identify authorized EO devices and unauthorized EO devices within a scene. The system responds with a variety of response actions including sending warning messages of the unauthorized EO devices, recording images and position of the unauthorized EO device. The system can further be configured to hamper the operation of the unauthorized EO devices detected within the scene.
US10880034B2	Method, computer program and routing engine for proactive performance-based frequency management Disclosed herein is a method of assigning a wavelength to a given light path in a wavelength switched optical network, as well as a corresponding routing engine and computer program. The method comprises the following step. For each of a plurality of possible wavelengths for said light path, retrieving information from an optical performance database (30) allowing to assess whether the given wavelength meets a predetermined feasibility criterion with regard to said given light path; if the given wavelength is found to meet the predetermined feasibility criterion, determining a set of extended feasible light paths, each of which fully including the given light path, but containing one or more additional nodes; and calculating a first score based on said determined set of extended feasible light paths, wherein said method further comprises a step of choosing, based on said first score, a wavelength that has a first score indicating a low suitability for providing useful extended feasible light paths for future use.
US10880031B2	Method for detecting synchronization signal block, and method, apparatus and system for transmitting synchronization signal block Provided are a method for detecting a synchronization signal block, and a method, apparatus and system for transmitting a synchronization signal block. The method comprises: receiving, by a terminal, a first synchronization signal block transmitted by an access network device; determining, by the terminal, a location of a time-frequency resource of a second synchronization signal block according to preset information comprised in the first synchronization signal block, wherein the first synchronization signal block and the second synchronization signal block are sent using a same beam, or the first synchronization signal block and the second synchronization signal block carry same information; and detecting, by the terminal, the second synchronization signal block.
US10880029B2	System and method for improved data decoding, tracking, and other receiver functions in the presence of interference An apparatus and a method. The apparatus includes an interference mitigation processor, including an input, and an output, the interference mitigation processor configured to sum n msec received correlators over m msec, and analyze the n msec correlators to reduce interference. The method includes summing, by an interference mitigation processor, n msec received correlators over m msec; and analyzing, by an interference mitigation processor, the n msec correlators to reduce interference.
US10880024B2	Reception device, transmission device, and data processing method Provided are a device and a method which are capable of performing selection acquisition and utilization processes for a service worker (SW) that performs data management optimized for each reception device. It is possible to selectively acquire a service worker (SW) of a specific class from service workers (SWs) corresponding to a plurality of classes which are data management programs used in a reception device and have different data management types. For example, use of a service worker (SW) corresponding to a class selected according to an application use state in a reception device is implemented. A reception device acquires access information of a service worker (SW) of a specific class using signaling data in which a token used for efficiently searching for the access information of the service worker (SW) of the specific class is recorded, and acquires the service worker (SW).
US10880021B2	Wireless communication device and operation method of the same A wireless communication device that includes an antenna module, a first communication circuit and a second communication circuit is provided. The first communication circuit performs communication by using a first communication protocol and transmits a test signal via the antenna module. The second communication circuit performs communication by using a second communication protocol and receives the test signal to calculate an isolation index based on an actual received power thereof. The second communication circuit determines that the antenna module includes two antennas when the isolation index is smaller than a threshold value to operate the first and the second communication circuits under a dual-antenna operation mode. The second communication circuit determines that the antenna module includes one antenna when the isolation index is not smaller than the threshold value to operate the first and the second communication circuits under a shared-antenna operation mode.
US10880019B1	Impairment generation A method, system, and apparatus for emulating impairments in a communication system.
US10880015B2	Circuit for multi-path interference mitigation in an optical communication system A circuit and method for mitigating multi-path interference in direct detection optical systems is provided. Samples of an optical signal having a pulse amplitude modulated (PAM) E-field are processed by generating a PAM level for each sample. For each sample, the sample is subtracted from the respective PAM level to generate a corresponding error sample. The error samples are lowpass filtered to produce estimates of multi-path interference (MPI). For each sample, one of the estimates of MPI is combined with the sample to produce an interference-mitigated sample.
US10880013B2	Network communications systems and methods Methods, systems, and devices for network communications to reduce optical beat interference (OBI) in upstream communications are described. For example, a fiber node may provide a narrow band seed source to injection lock upstream laser diodes. Therefore, upstream communications from each injection locked laser diode may primarily include the wavelength associated with each seed source. The seed sources may be unique to each end device and configured to minimize OBI. That is, the upstream laser diodes may be generic, but the received seed source may enable upstream communications at varying wavelengths. The fiber node may provide each seed source by filtering (e.g., by a grating filter) a broadband light source.
US10880010B2	Coherent optical transceiver with programmable application modes Methods of operating an optical communication system in coherent optical transmissions for metro applications. Relative to conventional solutions, the optical communication system can be implemented with reduced cost and can operate with reduced power consumption, while maintaining high data rate performance (e.g., 100G). Furthermore, a programmable transceiver enables compatibility with a range of different types of optical networks having varying performance and power tradeoffs. In one embodiment, the optical communication system uses 100 Gb/s dual-polarization 16-point quadrature amplitude modulation (DP-16QAM) with non-linear pre-compensation of Indium Phosphide (InP) optics for low power consumption.
US10880009B2	Control signal repeater system An example playback device includes a housing having a front side, a back side, a first end, and a second end. The playback device also includes an IR receiver positioned on the front side of the housing, a first IR emitter positioned on the back side of the housing and oriented such that a first IR signal emitted from the first IR emitter is directed toward the second end of the housing, and a second IR emitter positioned on the back side of the housing and oriented such that a second IR signal emitted from the second IR emitter a) is directed toward the first end of the housing and b) crosses the first IR signal emitted from the first IR emitter. The first and second IR emitters are communicatively coupled to the IR receiver within the housing and configured to retransmit an IR control signal received by the IR receiver.
US10880008B2	Downstream node setup Per-port performance optimization may be provided. First, performance data may be received corresponding to each of a plurality of ports. Then it may be determined that performance of at least one of the plurality of ports can be improved based on the received performance data corresponding to the least one of the plurality of ports. Next, in response to determining that the performance of the at least one of the plurality of ports can be improved, at least one of a plurality of components may be adjusted corresponding to the at least one of the plurality of ports to improve performance of the least one of the plurality of ports.
US10880007B1	Simultaneous distributed temperature and vibration sensing using multimode optical fiber Methods, systems, and apparatuses for simultaneous distributed temperature and vibration sensing using a multimode optical fiber (MMF) is disclosed. The distributed temperature and vibration sensing may include a single mode optical fiber (SMF) coupled to an MMF via a connection in which a central axis of the SMF is aligned with a central axis of the MMF. The connections provides of excitation of the fundamental mode within the MMF by light passing from the SMF into the MMF through the connection.
US10880004B2	Variable wavelength filter, and light receiver and light receiving method using variable wavelength filter A wavelength tunable filter, an optical receiver and a method using the wavelength tunable filter are disclosed. According to an aspect of the present invention, an optical receiver module having a wavelength tunable filter is provided. The transmission wavelength or reflective wavelength of the wavelength tunable filter is tunable The optical receiver module includes the wavelength tunable filter, a heat generation unit, and a separation unit. The wavelength tunable filter transmits light of a preset wavelength and tunes the preset wavelength. The heat generation unit is in contact with at least a portion of the wavelength tuning filter. The separation unit has a preset thermal conductivity. The separation unit is in contact with at least another portion of the wavelength tunable filter to support the wavelength tunable filter and separate physically or thermally the wavelength tunable filter from other components of the optical receiver module except for the heat generation unit. The preset wavelength is determined based on a temperature of the heat generation unit.
US10880001B2	System, methods, and devices for distributed physical layer networks Embodiments of the disclosure provide application layer, Medium Access Control (MAC) layer, and physical (PHY) layer functionality by discrete devices, to form a distributed MAC/PHY architecture for communications networks. An application layer (layer-3) device can communicate with a MAC layer (layer-2) device. The layer-2 device may switch IP layer (layer-3) information to MAC layer information. Further the layer-2 device can use addressing information determined or received from the layer-3 device to choose a particular PHY layer (layer-1) device. The layer-2 device can instruct the layer-1 device, to modulate information on one or more frequencies and/or wavelengths over a given physical medium. In an embodiment, the various communications between the devices can occur using a downstream external PHY interface (DEPI) protocol and an upstream external PHY interface (UEPI) protocol. In an embodiment, the monitoring of the devices can be performed using a management plane generic control plane (GCP) protocol.
US10879984B2	User terminal, radio base station and radio communication method The present invention is designed to perform DL sounding adequately in future radio communication systems. The user terminal of the present invention has a receiving section that receives a measurement reference signal, a transmission section that transmits channel state information (CSI) which is generated using the measurement reference signal, and a control section that controls reception of the measurement reference signal based on downlink control information (DCI) received in a same subframe as that of the measurement reference signal.
US10879982B1	Beamforming transmission device and method A beamforming transmission device includes a control unit, at least one radio frequency unit, and at least one signal transmission unit. The control unit is configured to receive a radio frequency signal and channel state information of at least two pieces of user equipment, and to generate a control signal according to the radio frequency signal and the channel state information of the at least two pieces of user equipment. The radio frequency unit is coupled to the control unit. The radio frequency unit is configured to receive the control signal and generate a beamforming signal according to the control signal. The signal transmission unit is coupled to the radio frequency unit. The signal transmission unit is configured to transmit the beamforming signal to the at least two pieces of user equipment.
US10879980B2	Base station and terminal in wireless communication system, and control method therefor This disclosure relates to a 5G or pre-5G communication system to support higher data transmission rate than a 4G communication system such as LTE. A method for controlling a terminal in a wireless communication system according to one embodiment of the present invention comprises: a step of performing beam training; and a first determining step of determining whether to stop a trigger for the beam training according to the result of performing the beam training, on the basis of whether or not a beam having a maximum channel gain is changed. This research was carried out with the support of the “Cross-Ministry Giga Korea Project” of the Korean Government Ministry of Science, ICT and Future Planning.
US10879978B2	Differential phase shifter for hybrid beamforming An arrangement and method for hybrid beamforming includes a differential phase shifter. The phase shifter has substantially parallel elongate conductive input and output radio frequency transmission lines. A movable transverse planar conductive coupling element configured to provide capacitive coupling between itself and the input and output lines. The coupling element is slideably movable along an axis of the said input and output transmission lines.
US10879977B2	Receiver address field for multi-user transmissions in WLAN systems In wireless communications for multi-users, a station may receive a trigger frame including a transmitter address field. When the trigger frame is a multi-user request-to-send (MU-RTS) frame eliciting clear-to-send (CTS) frames from a plurality of stations, the station transmit a CTS frame including a first receiver address field in response to the trigger frame. The first receiver address field may be set equal to the transmitter address field. When the trigger frame elicits data frames from a plurality of stations, the station transmit a data frame including a second receiver address field in response to the trigger frame. The second receiver address field may be set to a destination address. Other methods, apparatus, and computer-readable media are also disclosed.
US10879972B2	Linear precoding in full-dimensional MIMO systems and dynamic vertical sectorization Certain aspects of the present disclosure provide methods and apparatus for linear precoding in full-dimensional MIMO (FD-MIMO) systems. According to aspects, an eNB may compress a larger number of antenna elements to a smaller number of antenna ports. The eNB may use a port precoding matrix to transmit reference signals to a UE, receive feedback regarding CSI based on the reference signals, and transmit data to the UE, based on a mapping of multiple data layers and mapping of antenna ports to the physical antenna elements. Further, aspects include performing elevation beamforming by dynamically forming one or more vertical sectors based on UE feedback in the elevation domain.
US10879969B2	MIMO antenna arrangement A device comprises antennas and a signal processor, and each antenna comprises antenna elements. The signal processor is configured to: receive an input signal for a multiple-input multiple-output (MIMO) operation; generate complex weights; generate feed signals based on the input signal and the complex weights; and provide the feed signals to the antenna elements so that the MIMO operation uses at least two antenna elements from two different antennas.
US10879964B2	Dual beam operation for mobility Technology for a user equipment (UE) operable to communicate with an one or more extended transmission reception points (TRPs) is disclosed. The UE can signal a transceiver of the UE to simultaneously broadcast two or more transmission beams to establish a connection with one or more of an extended eNodeB or one or more extended transmission reception points (TRP), wherein each extended TRP is connected to the UE via an extended interface with the extended eNodeB. The UE can decode, at the UE, higher layer signaling received from the one or more extended TRPs to form beam association, beam addition, beam release, beam change, or a combination thereof between the UE and the one or more extended TRPs.
US10879963B2	Method and device for configuring a single frequency network A telecommunication system is provided comprising a Single Frequency Network, which enables the activation and respectively deactivation of base stations (SCn−SCn+3), each providing a radio cell such as a so-called Small Cell (SCn−SCn+3). Single Frequency Networks provide the advantage that no handover procedures are required for user equipment traversing several radio cells. The subject matter of the present invention provides means for a location based adaption of the transmission parameters for operating the Small Cells (SCn−SCn+3) in dependence of the location of the user equipment to be supplied.
US10879960B2	Communication device An MFP establishes a first communication link L1 by receiving an activation command and sending an OK command. The MFP receives first target data from a portable device by using the first communication link. The MFP generates second target data by processing the first target data. After receiving the first target data, the MFP disconnects the first communication link. The MFP establishes a second communication link by receiving the activation command and sending the OK command. The MFP sends the second target data to the portable device by using the second communication link.
US10879957B2	Device, system and method for selectively receiving data broadcast in a network Disclosed is a device for selectively receiving data broadcast in a network. The device includes first unit for receiving configuration data transmitted in point-to-point mode, second unit for receiving data broadcast by at least one transmitter, by radio and/or by power-line communication, a digital processing sub-assembly, at least one memory for storing at least one datum determining the selectivity of the broadcast, a low-voltage power supply sub-assembly supplied by an energy source and at least one program for determining whether data received by the second unit should be used or ignored by the device, as a function of previously stored data. Also disclosed is a system for allowing devices to selectively receive data broadcast in a network. Additionally disclosed is a method for allowing a device to selectively receive data broadcast in a network.
US10879956B2	Methods and systems for wireless to power line communication Methods, systems, and apparatus for monitoring and controlling electronic devices using wired and wireless protocols are disclosed. The systems and apparatus may monitor their environment for signals from electronic devices. The systems and apparatus may take and disambiguate the signals that are received from the devices in their environment to identify the devices and associate control signals with the devices. The systems and apparatus may use communication means to send control signals to the identified electronic devices. Multiple apparatuses or systems may be connected together into networks, including mesh networks, to make for a more robust architecture.
US10879953B1	Synchronous multichannel frequency hopping of modulated signals An apparatus is comprised of a processor, first and second first Phase-Locked Loop Waveform Generators (PLLWGs), first and second Voltage Controlled Oscillators (VCOs), and a Radio Frequency (RF) switch. The processor generates first and second data program signals to program the first PLLWG and the second PLLWG, respectively, and generates a first and second trigger command signals instructing the first and second PLLWGs to generate first and second analog tuning signals, respectively. The first PLLWG, coupled to the processor, generates the first analog tuning signal. The second PLLWG, coupled to the processor, generates the second analog tuning signal. The first VCO, coupled to the first PLLWG, generates a first channel frequency signal. The second VCO, coupled to the second PLLWG, generates a second channel frequency signal. The RF switch selectively outputs one of a first pre-switch frequency signal and a second pre-switch frequency signal.
US10879951B2	Systems and methods for synchronization by transceivers with OQPSK demodulation System and method for processing an analog signal. For example, a demodulator for processing an analog signal includes one or more analog-to-digital converters configured to receive an analog signal and generate a digital signal based at least in part on the analog signal, and a correlator coupled to the one or more analog-to-digital converters and configured to generate a stream of correlation results including a first plurality of correlation results, a second plurality of correlation results, and a third plurality of correlation results. The first plurality of correlation results is different from the second plurality of correlation results by at least one correlation result, and the second plurality of correlation results is different from the third plurality of correlation results by at least another correlation result.
US10879948B2	Metallic shell, method for manufacturing the same and mobile terminal having the same A metallic shell, a method for manufacturing the metallic shell and a mobile terminal including the metallic shell are provided. The metallic shell includes a body and an insulator. The body has a slot. The insulator is formed in the slot and includes an insulating material. The insulating material includes a plastic material, a first coating and a second coating. The first coating is configured to colour the plastic material to make the insulator exhibit a same colour as that of the body. The second coating is configured to improve luster of the plastic material to make the insulator exhibit a same metallic luster as that of the body.
US10879947B1	Antenna Nx-plexer impedance matching network An Nx-plexer for impedance matching a set of N filters with distinct passbands to an antenna. The Nx-plexer includes a set of reactive elements or networks coupled in series between a proximal node and a distal node, wherein one or more intermediate nodes between the proximal and distal nodes separate one or more distinct pairs of the reactive elements or networks, respectively; a set of filters coupled to the proximal node, the one or more intermediate nodes, and the distal node, respectively, wherein center frequencies of passbands of the filters coupled to the proximal node, the one or more intermediate nodes, and the distal node, are staggered in a particular frequency direction, respectively, wherein the distal node is coupled to an antenna. Different variations of the aforementioned Nx-plexer are also described.
US10879945B2	Methods, systems and devices to improve channel utilization A method that incorporates aspects of the subject disclosure may include, for example, obtaining, by a system comprising a processor, interference information associated with one or more physical resource blocks (PRBs) from each base station of a plurality of base stations. Further, the method can include determining, by the system, from the interference information a strategy for improving a PRB utilization of a first base station of the plurality of base stations. In addition, the method can include conveying, by the system, the strategy to at least one base station of the plurality of base stations. Other embodiments are disclosed.
US10879943B2	Wireless device with MIPI bus The present disclosure relates to a wireless device including a mobile industry processor interface (MIPI) bus, a baseband processing module, and a radio frequency (RF) front-end module. Herein, digital data signals are transmitted bi-directionally between the baseband processing module and the digital front-end module, and RF signals are transmitted bi-directionally between the digital front-end module and an antenna. Each digital data signal is related to a corresponding RF signal. The baseband processing module and the digital front-end module are coupled to the MIPI bus, which is configured to transmit digital control signals between the baseband processing module and the digital front-end module. There is no analog signal transmitted between the baseband processing module and the digital front-end module.
US10879942B2	Demultiplexing apparatus and method of designing the apparatus A demultiplexing apparatus according to the present disclosure includes an amplifier that amplifies transmission signals in three or more communication bands having different frequency bands; multiple signal paths which are commonly provided for an output terminal of the amplifier and on which the signals in the corresponding communication bands are propagated; and multiple transmission-reception filters which are provided on the multiple signal paths, and each of which isolates a transmission signal and a reception signal of the corresponding communication band from each other. The gains of the amplifier in the frequency bands of multiple reception signals are smaller than the gains of the amplifier in the frequency bands of multiple transmission signals.
US10879941B2	Methods and devices for determination of beamforming information There is presented mechanisms for providing information for determining beamforming weights or decoding user data for terminal devices. A method is performed by an RE of an access node. The RE has an interface to an REC of the access node. The method comprises obtaining information from the terminal devices to be used by the REC for determining the beamforming weights or decoding the user data. The method comprises selecting, according to a selection criterion, a part of the information to be provided to the REC in order for the REC to determine the beamforming weights or decode the user data based on the selected part of the information. The method comprises providing the selected part of the information to the REC over the interface.
US10879937B2	Gel codeword structure encoding and decoding method, apparatus, and related device An HC of a code B is first transformed into an HB. A parity bit of the code B is obtained by performing an operation on the HB and an information bit of the code B. The parity bit is used to perform RS coding on a code A, to obtain a parity bit of the code A. A check code of a GEL code is obtained by performing an operation on the parity bits of the code B and the code A. Finally, a single bit parity check bit is added. The code A is defined in a finite field GF (2l1), the code B is defined in a finite field GF (2l2), and l1 and l2 are positive integers. A success rate of decoding the code A in the first row can be improved using this method.
US10879933B2	Reed solomon decoder and semiconductor device including the same A Reed Solomon decoder may include a syndrome calculation (SC) circuit, a key equation solver (KES) circuit, and a Chien search and error evaluation (CSEE) circuit. The SC circuit calculates a syndrome from a codeword. The KES circuit includes a plurality of sub-KES circuit and calculates an error location polynomial and an error evaluation polynomial from the syndrome. The CSEE circuit calculates an error location and an error value from the error location polynomial and the error evaluation polynomial. Each of the plurality of sub-KES circuits, the SC circuit and the CSEE circuit respectively constitute pipeline stages. The Read Solomon decoder may also include a FIFO queue that queues the codeword among a plurality of codewords sequentially received, and an error correction circuit that produces error corrected data using an output from the FIFO queue, the error location, and the error value.
US10879932B2	Encoding method and device, and apparatus The present disclosure relates to encoding method and devices. One example method includes determining N to-be-encoded bits, where the N to-be-encoded bits include information bits and frozen bits, obtaining a first polarization weight vector including polarization weights of N polarized channels, where the N to-be-encoded bits correspond to the N polarized channels, determining positions of the information bits based on the first polarization weight vector, and performing polar encoding on the N to-be-encoded bits to obtain polar-encoded bits.
US10879926B2	Accelerated compression method and accelerated compression apparatus An accelerated compression method and apparatus are provided. The accelerated compression apparatus includes a look-ahead buffer, a string matching processing pipeline and a control circuit. The string to be compressed extracted from the data register is stored to the look-ahead buffer. A string to be compressed includes Q characters, and a repeat flag is stored in the look-ahead buffer for each character in the string to be compressed. P instances are issued in parallel in each issue cycle. When all the characters included in P substrings corresponding to the P instances are identical to each other, the control circuit sets the repeat flags of the start characters corresponding to the last (P−1) instances among the P instances to a set state. An instance in which the repeat flag of any character of the P instances is not set to the set state is sent to the string matching processing pipeline for a matching operation, and an instance in which the repeat flags of all the characters are set to the set state is prevented from being sent to the string matching processing pipeline.
US10879924B2	Delta-sigma modulator and associated signal processing method The present invention provides a delta-sigma modulator and associated signal processing method, wherein the signal processing method includes: generating a first difference signal according to a difference between an input signal and a first feedback signal; filtering the first difference signal to generate a filtered signal; generating a second difference signal according to a difference between the filtered signal and a second feedback signal; quantizing the second difference signal to generate an output signal; using a first DAC to generate the first feedback signal according to the output signal; using a second DAC to generate a first analog signal according to the output signal; delaying the output signal to generate a first delayed output signal; using a third DAC to generate a second analog signal according to the first delayed output signal; and generating the second feedback signal according to the first analog signal and the second analog signal.
US10879923B1	Mixed mode multiply and accumulate unit with current divider Methods and systems to implement a multiply and accumulate (MAC) unit is described. In an example, a device can include a current mode digital-to-analog converter (DAC) configured to multiply an input signal with an input current to generate a signal. The device can further include a current divider coupled to the current mode DAC. The current divider can be configured to divide the signal into at least a first current having a first amplitude and a second current having a second amplitude. The device can further include a mixer configured to multiply the second current with a clock signal to generate a third current. The third signal can be combined with the first signal via a current summing node to generate an output signal. The output signal can be outputted to another device.
US10879922B2	Time-based, current-controlled paired oscillator analog-to-digital converter with selectable resolution An analog to digital converter (ADC) includes voltage inputs, a transconductor configured to convert the voltage inputs into currents, current-controlled oscillators, a counter, and digital logic. The current-controlled oscillators propagate respect currents from the transconductor. The counter is configured to count repeated traversal of one or more oscillators. The digital logic is configured to, based upon results from the counter, provide a code configured to indicate a value of associated voltage input.
US10879920B2	Device and method for absolute voltage measurement A method and a circuit for measuring an absolute voltage signal, such that the circuit comprises: an A/D convertor, and a controller adapted for: a) obtaining a first digital reference value for a first reference signal having a positive temperature coefficient; b) obtaining a second digital reference value for a second reference signal having a negative temperature coefficient; c) obtaining a raw digital signal value for the signal to be measured, while applying a same reference voltage for step a) to c); and d) calculating the absolute voltage value in the digital domain using a mathematical function of the first and second digital reference value, and the raw digital signal value.
US10879919B1	Voltage stabilizing techniques Various implementations described herein are directed to device having multiple stages. The device may include a first stage that converts an analog voltage signal in a power supply domain into a digitally coded signal. The device may include a second stage that generates a derivative of the digitally coded signal, detects an event of the analog voltage signal based on the derivative of the digitally coded signal, and derives a control signal based on the event. The device may include a third stage that injects current into or sinks current from the power supply domain that is associated with the analog voltage signal based on the control signal.
US10879918B1	Atomic beam optical clock with pulse modulated broad-spectrum clock laser detection, and implementation method thereof An atomic beam optical clock with pulse modulated broad-spectrum clock laser detection and an implementation method thereof. The atomic beam optical clock with pulse modulated broad-spectrum clock laser detection includes a power control system, a broad-spectrum narrow-linewidth clock laser system, an atomic beam in an atomic beam vacuum tube, a blue light detection laser system and a photoelectric detection module. By generating a comb-toothed clock laser signal and interacting with the atomic beam, almost all atoms of the lower energy level of clock transition are excited to the upper energy level of the clock transition, and then through the interaction with the detection laser emitted by the blue light detection laser system, a narrow-linewidth fluorescent signal with high signal-to-noise ratio is obtained and sent to the power control system to servo the frequency of the broad-spectrum narrow-linewidth clock laser system.
US10879917B2	Crystal oscillator and method for adjusting oscillation frequency A crystal oscillator and a method are provided for adjusting an oscillation frequency. The crystal oscillator includes: a first oscillator circuit, a frequency control circuit and a crystal; where the first oscillator circuit is configured to output a first drive signal having a first oscillation frequency to drive the crystal, and the frequency control circuit is configured to determine a frequency control amount according to a feature of an electrical signal flowing through the crystal under driving of the first drive signal, and adjust the first oscillation frequency according to the frequency control amount. When the technical solutions are applied to scenarios where the crystal oscillator is enabled to quickly en-oscillate, a natural en-oscillation cycle of the crystal oscillator may be shortened, and the en-oscillation speed is increased.
US10879913B2	Phased locked loop integrated circuit An integrated circuit includes phase locked loop (PLL) circuitry, voltage controlled oscillator (VCO) circuitry, and interface circuitry. The PLL circuitry includes a reference signal input terminal, a reference frequency divider circuit, a reference signal output terminal, a switch, a phase detector, a charge pump, and a control voltage output terminal. The reference frequency divider circuit is coupled to the reference signal input terminal. The switch is coupled to the reference frequency divider circuit and to the reference signal output terminal. The switch is configured to switchably connect the reference frequency divider circuit to the reference signal output terminal. The VCO circuitry includes a control voltage input terminal, a VCO, calibration circuitry, and a calibration input/output (I/O) terminal. The VCO is coupled to the control voltage input terminal. The calibration circuitry is coupled to the VCO. The calibration I/O terminal is coupled to the calibration circuitry.
US10879907B2	Gray code counter One or more gray code counters, counter arrangements, and phase-locked loop (PLL) circuits are provided. A gray code counter comprises a set of cells, such as standard cells, that output a gray code signal. The gray code counter comprises a pre-ready cell that provides an early signal, generated based upon an early clock, to one or more cells to reduce delay. A counter arrangement comprises one or more counter groups configured to provide pixel count levels for pixels, such as pixels of an image sensor array. A counter group comprises a gray code counter configured to provide a gray code signal to latch counter arrangements of the counter group. A PPL circuit comprises a gray code counter configured to generate a gray code signal used by a digital filter to adjust an oscillator. The gray code signal provides n-bit early/late information to the digital filter for adjustment of the oscillator.
US10879902B2	Reconfigurable circuit using nonvolatile resistive switches A reconfigurable circuit includes: a plurality of first lines; one or more second lines; a non-volatile resistive cell coupling one of the first lines with one of the second lines at each cross-point between the first lines and the second lines; and first switch elements including first terminals respectively coupled to the first lines, wherein each of the first switch elements is separately turned on or off in accordance with a control signal applied thereto.
US10879899B2	Clock buffer and method thereof An apparatus includes: a first inverter configured to receive a first clock signal and output a second clock signal, wherein an input pin, an output pin, a power pin, and a ground pin of the first inverter connect to the first clock signal, the second clock signal, a first source node, and a second source node, respectively; a second inverter configured to receive the second clock signal and output a third clock signal, wherein an input pin, an output pin, a power pin, and a ground pin of the second inverter connect to the second clock signal, the third clock signal, the first source node, and the second source node, respectively; a first resistor connected to a first DC (direct-current) voltage to the first source node; and a second resistor connected to a second DC voltage to the second source node.
US10879898B2	Power gating circuit for holding data in logic block A power gating circuit includes a first switch circuit, a gate circuit, and a second switch circuit. The first switch circuit is configured to disconnect a first voltage line from a second voltage line while a logic block connected to the first voltage line is in a first operation state. The gate circuit is configured to output a control signal having a first logical value if a level of a first voltage on the first voltage line is lower than a reference level while the logic block is in the first operation state. The second switch circuit configured to connect the first voltage line to the second voltage line based on the first logical value of the control signal. The reference level is based on a type of a logic gate included in the gate circuit.
US10879893B1	Passive detection of device decoupling Aspects of the present disclosure provide for a method. In at least some examples, the method includes controlling a switch to decouple a first node at which a pull-up signal is present from a second node. The method further includes measuring and storing a value of the pull-up signal as a reference value. The method further includes controlling the switch to couple the first node at which the pull-up signal is present to the second node. The method further includes determining whether a pull-down signal is present at the second node by comparing the reference value to a value of a signal present at the second node.
US10879892B2	Switching element control circuit and power module A switching element control circuit is configured to perform a measurement mode in which a threshold voltage of a switching element is measured and a control mode in which an ON/OFF operation of the switching element is controlled in a switching manner. The switching element control circuit includes: a threshold voltage measurement power source; a third electrode voltage control part; an ON/OFF state determination part; and a memory part which stores the third electrode voltage applied to the third electrode as a threshold voltage of the switching element. The third electrode voltage control part controls, in the control mode, the third electrode voltage based on information including the threshold voltage stored in the memory part at the time of bringing the switching element into an ON state.
US10879891B2	Power supply voltage monitoring circuit and control device A power supply voltage monitoring circuit includes a power supply switching circuit, a series circuit including a first series resistor connected to an input power supply line, a second series resistor connected to a ground potential, and a third series resistor connected between the first series resistor and the second series resistor, a first parallel circuit including a first switching element and connected in parallel to the first series resistor, a second parallel circuit including a second switching element and connected in parallel to the second series resistor, a first determination circuit configured to determine whether a first divided voltage between the first series resistor and the third series resistor is in a normal range, and a second determination circuit configured to determine whether a second divided voltage between the second series resistor and the third series resistor is in a normal range.
US10879886B1	Switch circuit suppressing damage to the switch circuit In general, according to one embodiment, a switch circuit includes first to fourth transistors and first to second resistors. The third transistor includes one terminal coupled to one terminal of the first transistor and another terminal coupled to a control terminal of the first transistor. The fourth transistor includes one terminal coupled to a control terminal of the third transistor, another terminal coupled to another terminal of the first transistor, and a control terminal coupled to the control terminal of the first transistor. The second resistor is coupled between the one terminal of the third transistor and the control terminal of the third transistor.
US10879884B2	Buffer circuit of a semiconductor apparatus A buffer circuit includes a current mode circuit configured to generate output signals by converting a current path depending on input signals and configured to correct a swing width of the output signals by adjusting a current amount depending on a level of a compensation signal. The buffer circuit also includes a compensation signal generation circuit configured to detect a swing width variation of the output signals and configured to generate the compensation signal for correcting a swing width of the output signals to conform to a target value, depending on a detected swing width.
US10879878B1	Drop-in solid-state relay Embodiments of the invention provide for a drop-in solid-state relay replacement for current standard relays. The drop-in solid-state relay may comprise receiving an input power and actuating at least one transistor to provide power to operational equipment. In some embodiments, an optical isolator may be disposed at an output driver stage of the relay circuit to provide electrical isolation between the input stage and the output stage. The drop-in solid-state relay may provide low input voltage, low heat, no noise, and not produce fly-back.
US10879876B2	Resource conserving weighted overlap-add channelizer Systems and methods are provided for channelizing. A first stage can provide a WOLA filter bank that can apply a single multiplier resource to perform window weighting for multiple WOLA filter banks. The first stage can remove mixer-based post FFT adjustment and provide equal functionality with a particular modification of tuning mixers at inputs of second stage FIR paths. The first stage can include a variable decimation, using a particular implementation of variable sample block size.
US10879872B2	BAW resonators with antisymmetric thick electrodes A resonator circuit device. This device can include a piezoelectric layer having a front-side electrode and a back-side electrode spatially configured on opposite sides of the piezoelectric layer. Each electrode has a connection region and a resonator region. Each electrode also includes a partial mass-loaded structure configured within a vicinity of its connection region. The front-side electrode and the back-side electrode are spatially configured in an anti-symmetrical manner with the resonator regions of both electrodes at least partially overlapping and the first and second connection regions on opposing sides. This configuration provides a symmetric acoustic impedance profile for improved Q factor and can reduce the issues of misalignment or unbalanced boundary conditions associated with conventional single mass-loaded perimeter configurations.
US10879870B2	Elastic wave device, front-end circuit, and communication device An elastic wave device includes a piezoelectric substrate and an IDT electrode provided on the piezoelectric substrate. The IDT electrode includes a busbar electrode extending in an elastic wave propagation direction and electrode fingers connected to the busbar electrode and extending in a direction perpendicular or substantially perpendicular to the elastic wave propagation direction. The piezoelectric substrate includes a groove extending along the elastic wave propagation direction. The groove is provided on a side across the busbar electrode in the perpendicular or substantially perpendicular direction from a side at which the electrode fingers are located.
US10879869B2	Microelectromechanical system resonator devices and oscillator control circuits Reference oscillators are ubiquitous in timing applications generally, and in modern wireless communication devices particularly. Microelectromechanical system (MEMS) resonators are of particular interest due to their small size and potential for integration with other MEMS devices and electrical circuits on the same chip. In order to support their use in high volume low cost applications it would be beneficial for MEMS designers to have MEMS resonator designs and manufacturing processes that whilst employing low cost low resolution semiconductor processing yield improved resonator performance thereby reducing the requirements of the oscillator circuitry. It would be further beneficial for the oscillator circuitry to be able to leverage the improved noise performance of differential TIAs without sacrificing power consumption.
US10879868B2	Vibration device, electronic apparatus and vehicle A vibration device includes a first substrate that includes a first surface and a second surface; a second substrate that includes a third surface and a fourth surface; an intermediate substrate that is disposed between the first substrate and the second substrate and that includes a vibration element, a frame surrounding the vibration element, and a coupler linking the vibration element and the frame; a conductive first joining member that is located between the frame and the first substrate and that joins the frame and the second surface; a conductive second joining member that is located between the frame and the second substrate and that joins the frame and the third surface; an internal electrode disposed on the first substrate; and a first conductive member that is disposed between the first substrate and the intermediate substrate and that electrically couples the vibration element and the internal electrode.
US10879867B2	Multiple frequency band acoustic transducer arrays A structure of an acoustic transducer array probe for transmission of acoustic waves from a front radiation surface into an acoustic load material, where said acoustic waves can have frequencies in a high frequency (HF) band and further lower frequency (LF1, . . . , LFn, . . . , LFN) bands with N≥1, arranged in order of decreasing center frequency. The acoustic waves are transmitted from separate high and lower frequency arrays stacked together with matching layers in a thickness dimension into a layered structure, with at least a common radiation surface for said high and lower frequency bands. At least for said common radiation surface at least one lower frequency LFn electro-acoustic structure (n=1, . . . , N) comprises a piezoelectric array with an acoustic isolation section to its front face. The acoustic isolation section includes to the front a section composed of a sequence of L≥3 matching layers with interchanging low and high characteristic impedances, where the front layer of said section is one of i) a lower characteristic impedance layer, and ii) a higher characteristic impedance layer, and where at least one lower characteristic impedance layer is made of a homogeneous material.
US10879866B2	Filter circuit, heating circuit, and semiconductor processing apparatus A filter circuit is connected between a heating source and a load for filtering the load, and includes an inductor branch and a capacitor branch connected in parallel. The inductor branch includes a one-piece structured integrated component, and the integrated component is configured with a transformer function member and an inductor function member. The inductor function member is connected in series between the heating source and the transformer function member for filtering the load. The transformer function member is connected in parallel with the load for transmitting a heating electric signal output by the heating source to the load.
US10879860B2	Magnetic operational amplifier A magnetic operational amplifier having a differential stage includes a first magnetic field effect transistor MAGFET and a differential signal conditioner, the differential signal conditioner including a load stage, a differential input pair connected to the load stage and a biasing current source connected to the differential input pair; the magnetic field effect transistor MAGFET being connected to the load stage as a second differential input pair and the differential signal conditioner including a second biasing current source connected to the magnetic field effect transistor MAGFET.
US10879855B1	Configurable dual vacuum tube triode amplifier Disclosed is a configurable dual vacuum tube triode amplifier. The amplifier comprises two vacuum tube triodes and a user configurable switching component. The user configurable switching component can be positioned into at least a first position and a second position to modify an arrangement of the two vacuum tube triodes to provide varying tonal characteristics of the amplifier. Positioning the user configurable switching component in the first position arranges the two vacuum tube triodes in a cascode configuration to achieve a tonal characteristic of a vacuum tube pentode. Positioning the multi-position user switch in the second position arranges the two vacuum tube triodes in either a single vacuum tube triode configuration to achieve a tonal characteristic of a single vacuum tube triode operating alone or two vacuum tube triodes operating in a parallel configuration to achieve the tonal characteristics of two vacuum tube triodes operating in parallel.
US10879852B2	Power management circuit and related radio frequency front-end circuit A power management circuit and related radio frequency (RF) front-end circuit are provided. In examples discussed herein, a power management circuit can be incorporated into an RF front-end circuit to support RF beamforming in millimeter wave spectrum(s). In this regard, the power management circuit is configured to generate multiple output voltages to drive multiple power amplifier subarrays in the RF front-end circuit. More specifically, the power management circuit is configured to generate the output voltages based on a voltage scaling factor(s) such that each of the output voltages corresponds proportionally to a battery voltage received by the power management circuit. As such, the output voltages can be dynamically controlled based on the voltage scaling factor(s) to maximize operating efficiency of the power amplifier subarrays. As a result, it is possible to reduce heat dissipation of the power amplifier subarrays and improve overall thermal performance of the RF front-end circuit.
US10879850B2	Radio frequency power amplifier for inhibiting harmonic wave and stray, chip and communication terminal Disclosed are a radio frequency power amplifier for inhibiting a harmonic wave and stray, a chip and a communication terminal. The radio frequency power amplifier comprises a power source, an LDO circuit, a harmonic inhibition unit, a stray inhibition unit, an amplifying unit, and a low-pass matching network. On the one hand, by means of the power source being connected to the harmonic inhibition unit, harmonic waves and stray of the power source at a resonant frequency are inhibited. Additionally, by means of the stray inhibition unit reducing the gain of the amplifying unit at a resonant frequency, output of stray is reduced. On the other hand, by means of the low-pass matching network being embedded at an output end of the radio frequency power amplifier, harmonic waves and the stray of a radio frequency signal amplified by the amplifying unit at different frequencies is effectively inhibited.
US10879848B2	Envelope tracking method and mobile terminal Provided are an envelope tracking method and a mobile terminal. The envelope tracking method includes: acquiring coordinates of at least two points of an instantaneous radio frequency envelope each mapped to the same power supply voltage value; mapping the coordinates of the at least two points of the instantaneous radio frequency envelope each mapped to the same power supply voltage value to the same power supply voltage value to generate a mapping relationship; and transmitting data based on the mapping relationship.
US10879845B2	Phase coherent numerically controlled oscillator A phase coherent NCO circuit includes a base frequency NCO, a phase seeding circuit, a scaled frequency NCO, a sine/cosine generator. The base frequency NCO is configured to generate base phase values based on a base frequency control word. The phase seeding circuit is coupled to the base frequency NCO. The phase seeding circuit is configured to generate a seed phase value based on the base phase values and a scale factor value. The scaled frequency NCO is coupled to the phase seeding circuit. The scaled frequency NCO is configured to generate oscillator phase values based on the phase seed value and an oscillator frequency control word. The sine/cosine generator is coupled to the scaled frequency NCO. The sine/cosine generator is configured to generate oscillator output samples based on the oscillator phase values.
US10879841B2	Panel equipped with a photovoltaic device The present invention provides a panel equipped with a photovoltaic device including an even number of columns of photovoltaic modules, the columns being aligned essentially parallel to a longitudinal edge of the panel. Each column includes an electrical pole on each of extremity. The polarity of an electrical pole of one extremity being the inverse of that of the electrical pole of the other extremity, the poles of two adjacent columns being of inverse polarity, the electrical pole being in the form of a male connector when it is of one polarity and in the form of a female connector when it is of the inverse polarity. The male connectors and female connectors arranged so that they interlock with one another when the lower transverse edge of an upper panel overlaps the upper transverse edge of a lower panel. The present invention further provides an assembly of panels, an electrical device connected to a converter including an assembly and a method for the electrical connection to a converter of the panels of the assembly.
US10879838B2	Security and tracking systems including energy harvesting components for providing autonomous electrical power A security system is provided that integrates a unique set of structural features for concealing self-powered sensor and communication devices in aesthetically neutral, or camouflaged, packages that include energy harvesting systems that provide autonomous electrical power to sensors, data processing and wireless communication components in the portable, self-contained packages. Color-matched, image-matched and/or texture-matched optical layers are formed over energy harvesting components, including photovoltaic energy collecting components. Optical layers are tuned to scatter selectable wavelengths of electromagnetic energy back in an incident direction while allowing remaining wavelengths of electromagnetic energy to pass through the layers to the energy collecting components below. The layers uniquely implement optical light scattering techniques to make the layers appear opaque when observed from a light incident side, while allowing at least 50%, and as much as 80+%, of the energy impinging on the energy or incident side to pass through the layer.
US10879837B2	Photovoltaic module and photovoltaic panel This photovoltaic module includes: a power generating element configured to receive light to generate power; and a housing which is closed, the housing having: a concentrating portion provided with a lens configured to concentrate sunlight; a bottom portion in which the power generating element is disposed; and a side wall serving as an outer frame for the bottom portion and supporting the concentrating portion. The side wall is formed from a resin and has at least one vent hole.
US10879836B2	Mounting assembly for mounting a solar panel A mounting assembly for mounting a solar panel to a surface includes a mounting base that is supported on the surface. The mounting base defines an elongated opening that extends along an axis. A module mount can be coupled to the mounting base. The module mount includes a first mount portion that is received within the elongated opening of the mounting base such that the module mount is movable with respect to the mounting base along the axis. A second mount portion is coupled to the solar panel for mounting the solar panel to the surface through the mounting base.
US10879835B2	Integrated electrical and mechanical photovoltaic array interconnection system A mount system for a photovoltaic (PV) panel array allows for ease of installation, flexibility of movement, and the ability to remove and redeploy the system as needed. The system includes a plurality of modules which support a PV panel and a plurality of purlin connectors which interconnect with the modules. The system further includes a plurality of electrical connections which allow each of the modules to be in electrical communication with one another and may further a junction box, also in electrical communication with the modules.
US10879834B2	Temperature monitoring device, temperature monitoring method, information processing program and recording medium A temperature monitoring device of the present invention includes: a current value acquisition portion (50) that acquires a current value supplied for the motor; a calorific value inference portion (20) that infers a calorific value through a first thermal model indicating a relationship between the current value and a calorific value of a servo driver (2); and an anomaly judgment portion (10) that compares the calorific value with a threshold, so as to judge whether there is heating anomaly.
US10879831B1	Method and system for real-time anomaly detection in a motor drive A system and method for real-time detection of anomalies in a motor drive includes a controller receiving one or more signals corresponding to real-time operation of a controlled system. The controller samples the real-time signal during operation of the controlled system and maintains a moving window of the sampled data. A signature of the sampled data within the moving window is then generated. Each signature corresponds to operation of the controlled system within the period of time defined by the moving window. An identifier and a number of occurrences of each signature may be stored with the signature. An initial table of expected signatures may be generated, for example, by executing a training, or learning, period within the control system. The controller compares each real-time signature against the table of expected signatures to detect the occurrence of an anomaly.
US10879829B2	Bearingless electrical machine with floating capacitor A machine drive includes a suspension force inverter, a torque inverter, and a capacitor. The suspension force inverter provides suspension force electrical signals to suspension force electrical terminals. Each suspension force electrical terminal connects to a suspension coil of a stator winding. Each suspension force electrical signal provides a phase to a single suspension force electrical terminal. A single stator winding is associated with each phase. The torque inverter provides torque electrical signals to torque electrical terminals. Each torque electrical signal provides the phase to a single torque electrical terminal. Each torque electrical terminal connects to both the suspension coil and a torque coil of the single stator winding of the associated phase. The capacitor connected in parallel across the suspension force inverter. The torque inverter is connected to a voltage source. The capacitor is connected to the voltage source through the torque invertor and the suspension force inverter.
US10879821B2	Rotor position estimation A motor controller includes current measurement circuitry and estimation circuitry. The current measurement circuitry is adapted to be coupled to a motor, and configured to measure current in the motor. The estimation circuitry is coupled to the current measurement circuitry, and includes a memory, current computation circuitry, and summation circuitry. The memory stores coefficients of a function for estimating current related to variation of inductance of the motor. The current computation circuitry is coupled to the memory, and is configured to compute a compensation current value based on the coefficients. The summation circuitry is coupled to the current compensation circuitry, and is configured to generate a position error signal by subtracting the compensation current value from a measured current value generated by the current measurement circuitry.
US10879820B2	Control device for brushless DC servo motor A control device for a brushless DC servo motor which uses a MR sensor unit and controls the motor with high precision by a closed loop. The motor control device comprises a control unit for controlling power supplied to three pairs of stator coils of U, V and W phases. The control unit generates phase information for each of the U, V and W phases and obtains an absolute origin position of the rotary shaft with respect to the driving signal, when the brushless DC servo motor is driven, based on the synchronization relationship of: a driving signal rising phase from zero; an integrated value peak phase of counter electromotive force to the phase stator coil obtained by driving the motor; and a rising phase of the output signal of the A phase or the B phase output from the MR sensor unit corresponding to zero of the driving signal.
US10879818B2	Linear actuator with a brushless DC motor A linear actuator comprises a brushless DC motor (31), a driver circuit (51) for providing a multiphase voltage signal to the motor (31) and a controller (58) for detecting a rotor position and providing control signals to the driver circuit (51) in dependence thereof. Detector circuitry (61) detects a signal indicative of rotor speed. The controller (58) is configured to control the driver circuit (51) to drive the motor with a first waveform of the multiphase voltage signal, when the indicative signal indicates that the rotor speed does not exceed a predetermined speed; and control the driver circuit (51) to drive the motor with a second waveform of the multiphase voltage signal, when the indicative signal indicates that the rotor speed exceeds the predetermined speed, wherein the second waveform is selected to drive the motor (31) with an efficiency less than the efficiency when driven by the first waveform.
US10879815B2	Systems and methods for controlling multi-level diode-clamped inverters using space vector pulse width modulation (SVPWM) Control systems for a multi-level diode-clamped inverter and corresponding methods include a processor and a digital logic circuit forming a hybrid controller. The processor identifies sector and region locations based on a sampled reference voltage vector V* and angle Θe*. The processor then selects predefined switching sequences and pre-calculated turn-on time values based on the identified sector and region locations. The digital logic circuit generates PWM switching signals for driving power transistors of a multi-level diode-clamped inverter based on the turn-on time values and the selected switching sequences. The control system takes care of the existing capacitor voltage balancing issues of multi-level diode-clamped inverters while supplying both active and reactive power to an IT load. Using the control system, one can generate a symmetrical PWM signal that fully covers the linear under-modulation region.
US10879814B2	Multilevel power converter In a multilevel power converter (20), a power conversion circuit is formed of semiconductor modules (1 to 4), the multilevel power converter (20) includes: a capacitor (5) on the positive electrode side; a capacitor (6) on the negative electrode side; an AC bus (L1); a capacitor bus (L2); a positive electrode bus (L3); and a negative electrode bus (L4), and the semiconductor modules (1 to 4) are arranged such that the inductance in a communication loop is reduced.
US10879811B2	Switching power supply device and semiconductor device A switching power supply device has a switching output stage generating an output voltage from an input voltage by switching operation and a controller controlling the switching output stage based on a feedback voltage commensurate with the output voltage. The switching power supply device can perform switching suspension control whereby it stops switching operation on detecting a light-load condition based on the feedback voltage, though it restarts switching operation on detection of an overvoltage condition during suspension of switching operation.
US10879808B2	Switched-tank DC transformer and voltage ratio switching method thereof A switched-tank DC transformer and a voltage ratio switching method thereof are provided. The switched-tank DC transformer includes an input terminal, an output terminal, 2n inverting switches, 2n rectifying switches, 2n−2 clamping switches, n resonance tanks and n−1 support capacitors. The inverting switches are serially connected in sequence. There is an inverting node between every two neighboring inverting switches. A terminal of the rectifying switch is connected with a rectifying node. A terminal of the two clamping switch is electrically connected with a clamping node. The resonance tank is electrically connected between the inverting node and the rectifying node. The support capacitor is electrically connected between the inverting node and the clamping node. Every support capacitor and every resonance tank is switchable to be in a normal state or a voltage ratio switching state, thus a voltage ratio of the switched-tank DC transformer is allowed to vary correspondingly.
US10879807B2	Flyback converter and control method thereof A conversion device includes a primary side circuit, a secondary side circuit, a transformer, and a control circuit. The primary side circuit includes a primary side switch and is configured to receive an input voltage. The secondary side circuit outputs an output voltage to a load. The transformer comprises a primary winding and a secondary winding, the primary winding is electrically coupled to the primary side circuit and the secondary winding electrically coupled to the secondary side circuit. The control circuit is configured to control a peak value of the current flowing through the primary side switch, to be limited in a band range.
US10879801B2	Power converter with a plurality of switching power stage circuits A power converter can include: first and second terminals; N A-type switching power stage circuits, each having a first energy storage element, where N is a positive integer, a first terminal of a first A-type switching power stage circuit in the N A-type switching power stage circuits is coupled to the first terminal of the power converter, and a second terminal of each of the N A-type switching power stage circuits is coupled to the second terminal of the power converter; one B-type switching power stage circuit; and N second energy storage elements, each being coupled to one of the N A-type switching power stage circuits, and the B-type switching power stage circuit is coupled between a terminal of one of the N second energy storage elements corresponding to the B-type switching power stage circuit and the second terminal of the power converter.
US10879796B2	DC-DC converter with fast voltage charging circuitry for Wi-Fi cellular applications The present disclosure relates to a direct current (DC)-DC converter associated with a radio frequency transceiver, which includes a transceiver capacitor. The disclosed DC-DC converter includes a battery terminal configured to provide a battery voltage, a charge pump coupled to the battery terminal and configured to provide a boosted voltage based on the battery voltage, a power inductor is coupled between the charge pump and the transceiver capacitor, and fast voltage charging circuitry with a fast-path block that is coupled between the charge pump and the transceiver capacitor. Herein, the transceiver capacitor is capable to be charged with the boosted voltage through the power inductor. The fast-path block is parallel with the power inductor and configured to provide an extra charging path to the transceiver capacitor, so as to accelerate a charging speed of the transceiver capacitor.
US10879795B2	Power management circuit with dual charge pump structure The present disclosure relates to a power management circuit (PMC) with a dual charge pump (DCP) structure. The DCP structure includes a first switch network having a first capacitor, a second switch network having a second capacitor, and a connection switch coupled between the first switch network and the second switch network. Herein, the first capacitor and the second capacitor are electrically coupled in series between a battery terminal and a ground terminal or electrically coupled in parallel between the battery terminal and the ground terminal during a charging phase. The first capacitor and the second capacitor are electrically coupled in series between the battery terminal and a pump output terminal, or electrically coupled in parallel between the battery terminal and the pump output terminal, or electrically coupled in parallel between the ground terminal and the pump output terminal during a discharging phase.
US10879794B2	DC-DC controller with DCM control A dc-dc controller is provided. The dc-dc controller includes a current sensing pin, a zero-current comparator, a comparison circuit and a threshold adjustment circuit. The current sensing pin is coupled to an output stage to receive a current sensing signal related to the output current. The zero-current comparator is coupled to the current sensing pin, and receives the current sensing signal and a first preset value to provide a zero-current signal. The comparison circuit is coupled to the zero-current comparator and the current sensing pin, and compares the current sensing signal with a second preset value to provide an adjustment signal. The threshold adjustment circuit is coupled to the comparison circuit and the zero-current comparator, and generates the first preset value according to the adjustment signal.
US10879792B2	Switched capacitor voltage converter for a rechargeable battery in a hearing aid The disclosure presents a method of operating a switched capacitor voltage converter and a switched capacitor voltage converter, where the switched capacitor voltage converter comprises a power source, a bucket capacitance, an output capacitance with output capacitance terminals to be connected to a load and switches. The power source provides an input voltage and the output capacitance provides an output voltage over the output capacitance terminals. The output voltage is different from the input voltage, i.e higher or lower or of opposite polarity. The switches are configured to provide at least two phases, a bucket capacitance charging phase and a bucket capacitance discharging phase. In case of a voltage up-converter in the bucket capacitance charging phase the bucket capacitance is connected to the power source for charging the bucket capacitance while the bucket capacitance is not connected to the output capacitance. In a voltage down-converter in the bucket capacitance charging phase the bucket capacitance and the output capacitance are connected in series with the power source. In a voltage up-converter in the bucket capacitance discharging phase the bucket capacitance is connected in series with the power source for charging the output capacitance. In a voltage down-converter in the bucket capacitance discharging phase the bucket capacitance and the output capacitance are connected in parallel with each other while being disconnected from the power source. Further, a detection circuit is provided that is configured to monitor the output voltage over the output capacitance terminals and to cause switching of at least one of said switches so as to interrupt charging of the output capacitance when output voltage exceeds a predefined reference voltage.
US10879791B2	DC/DC resonant converters and power factor correction using resonant converters, and corresponding control methods Various improvements are provided to resonant DC/DC and AC/DC converter circuit. The improvements are of particular interest for LLC circuits. Some examples relate to self-oscillating circuit and others relate to converter circuits with frequency control, for example for power factor correction, driven by an oscillator.
US10879789B2	System and method for controlling voltage control loop in power converter A circuit for controlling a power converter includes a transient detector that generates a transient detection signal in response to a feedback signal indicating an output signal of the power converter, a gain selector that generates a gain selection signal in response to the transient detection signal, and an amplifier circuit that generates a comparison signal based on the value of the feedback signal, a value of a reference signal, and a gain value of the amplifier circuit, the gain value being adjusted in response to the gain selection signal. The transient detection signal indicates that a value of the feedback signal is in a first range and a specific condition of the feedback signal is detected.
US10879786B2	Power conversion device and control circuit A power conversion device according to one or more embodiments may include: a microcomputer; and an output circuit controlled by the microcomputer, including an output unit that converts an input power into a predetermined power and outputs the predetermined power, an internal power source that supplies a power source to the microcomputer, a driver that drives the output unit by a signal from the microcomputer, and a microcomputer stop transition unit that, when an operation of the power conversion device is stopped, outputs a microcomputer stop signal to the microcomputer and causes an operation of the microcomputer to transition to a stop state. In one or more embodiments, after the microcomputer stop transition unit causes the operation of the microcomputer to transition to a stop state, the microcomputer or the output circuit may stop an output of the internal power source.
US10879780B2	Electromechanical actuator for controlling screens and home automation equipment comprising such an actuator This electromechanical actuator configured for controlling screens includes an electronically-commutated, brushless, DC electric motor, a rotor and a stator of the electric motor being positioned coaxially around an axis of rotation, the rotor including a rotor body provided with magnetic elements distributed over the outer surface of the rotor, the magnetic elements of the rotor being surrounded by the stator, the stator being formed by a stator core including a circular peripheral wall and pole elements supporting windings, the pole elements being distributed on the inside of the peripheral wall. The ratio between the outer diameter of the stator and the inner diameter of same is less than 1.7. Further, the ratio between the axial length of the stator and the outer diameter of the stator is greater than 1.5.
US10879776B2	Joining apparatus for coil ends of segment coils for stator A joining method for coil ends includes: pressing a pair of tapered portions such that a pair of first pressing jigs provided with a pair of detent portions is brought closer to the coil ends along an axial direction of the stator core, the pair of detent portions being fitted to the tapered portions; fixing axial positions of the pair of tapered portions such that the pair of detent portions is fitted to the pair of tapered portions so that the pair of tapered portions is sandwiched in a circumferential direction; fixing radial positions of the pair of tapered portions such that the pair of tapered portions is sandwiched by a pair of second pressing jigs so that the tapered portions of the pair of tapered portions make contact with each other; and welding a contacting portion where the tapered portions make contact with each other.
US10879774B2	Electric power steering system and brush motor thereof An electric power steering system and its brush motor are disclosed. The brush motor includes a stator and a rotor rotatably mounted to the stator. The rotor includes a rotary shaft, a commutator and a rotor core fixed to the rotary shaft, and a rotor winding wound around the rotor core. The commutator includes a plurality of commutator segments. The rotor core includes a plurality of teeth. The rotor winding includes a plurality of winding elements. Adjacent teeth define therebetween wire slots for receiving the winding elements. The winding elements include a plurality of first winding elements and a plurality of second winding elements. The first winding elements are connected in series through the commutator segments. The second winding elements are connected in series through the commutator segments. The first winding elements and the second winding elements are received in different wire slots. Implementation of the present invention can improve the reliability of the product.
US10879772B2	Rotating resistor assemblies A rotating resistor assembly for use in a rotating shaft of an electrical machine can include a first housing configured to contact the rotating shaft and be grounded to the rotating shaft. The first housing can include a first bus bar connection aperture configured to receive a first bus bar. The assembly can include a second housing configured to connect to the first housing. The second housing can be configured to be insulated from the rotating shaft and to be insulated from direct electrical connection with the first housing. The second housing can include a second bus bar connection aperture configured to receive a second bus bar. The assembly can include a suppression resistor disposed between the first housing and the second housing and in electrical communication with the first housing and the second housing to provide an electrical pathway between first housing and the second housing.
US10879771B2	Cooling system and method for electric rotating machine An electric rotating machine includes a machine housing having a mixed condensation chamber, a rotor accommodated in the machine housing, and a stator accommodated in the machine housing in adjacent relationship to the mixed condensation chamber. A cooling device includes a first assembly to expose at least a part of the stator and/or the rotor to a vaporization coolant which vaporizes when contacting the part so as to effect a vaporization cooling, and a second assembly to dispense a liquid condensation coolant into the mixed condensation chamber for contacting the vaporization coolant so as to effect a mixed condensation of the vaporized vaporization coolant with the liquid condensation coolant in the mixed condensation chamber.
US10879769B2	Motor unit A motor unit includes a motor including a rotor to rotate about a motor axis extending in a horizontal direction, a differential connected to the motor, a housing including a housing space to house the motor and the differential, oil in a vertically lower region of the housing space, and an oil passage to feed the oil from the vertically lower region of the housing space to the motor. A pump is fixed to an outer peripheral surface of the housing and is located in a channel of the oil passage. The pump is on an opposite side of the motor axis with respect to the differential when viewed in an axial direction of the motor axis.
US10879767B2	Linear motor cooling system An apparatus includes an electric machine. The electric machine includes an internal housing, an armature coil disposed within the internal housing and separated from the internal housing by a gap, and a magnetic core associated with the armature coil. The apparatus also includes a fan configured to cause air to flow in the gap between the armature coil and the internal housing.
US10879763B2	Electric actuator An electric actuator is provided and includes: a motor unit having a motor shaft extending in an axial direction, a speed reducer connected to one side of the motor shaft in the axial direction, an output section having an output shaft to which rotation of the motor shaft is transmitted via the speed reducer, and a housing accommodating the motor unit, the speed reducer and the output section. The motor shaft and the output shaft are disposed apart from each other in the radial direction of the motor shaft. The motor unit has a first bearing that rotatably supports the motor shaft. The housing has a housing main body formed of resin, and a metal member formed of metal and held by the housing main body. The metal member has a bearing holding section that holds the first bearing, and an output shaft support section that supports the output shaft.
US10879762B2	Actuator and pump using the actuator A actuator and a pump using the actuator are provided. The actuator is used to drive a pump body. The actuator includes a base, a transmission assembly and a motor received in the base. The motor includes a stator, a rotor, and a driving shaft. The driving shaft is connected to the transmission assembly. The base includes a mounting bracket. The mounting bracket is partly embedded in the motor. The actuator has good integrality and a compact structure.
US10879761B2	Rotor and method of manufacturing the same In a rotor of a rotating electric machine, a rotor core is fixed by plastically deforming a shaft having a simple structure. The rotor core is formed by laminating steel sheets provided with shaft holes. The shaft is formed of a hollow metal component and is inserted so as to penetrate through the shaft holes in the steel sheets. A wall surface of the shaft is partially cut in the circumferential direction, and of two wall surface regions aligned in the axial direction with a cut portion in between, the wall surface region positioned on the side farther from the rotor core is plastically deformed in the radial direction. In this way, protruding portions that open the cut portions are formed. End surfaces of the rotor core are pressure bonded and fixed by the cut portions of these protruding portions.
US10879759B2	Stator assembly and stepper drive motor including same A stator assembly, having a stator formed by a plurality of pole pieces by means of injection overmolding, a columnar connection portion protruding outward being provided on an edge of one of the pole pieces; a mounting groove located at a side face of the stator; a coil wound around the stator; a pin connector with a ground pin, the pin connector being press-fitted onto the mounting groove in the direction perpendicular to the axial direction of the stator; and a magnetically conductive ring, the stator, which is mounted with the coil and the pin connector, being pressed into the magnetically conductive ring. The stator assembly has the features of having few parts and being convenient to assemble.
US10879758B2	Electric machine arrangement An electric machine arrangement, with two electric machines, each with a housing, wherein each housing has a machine space with a rotor-stator assembly and a resolver space section forming part of a resolver space that is formed between the machine spaces and is sealed off from the machine spaces. The housings are interconnected with their resolver space sections adjoining each other and complementing each other to form the resolver space. Several pressure equalizing elements are provided, and between the resolver space and at least one of the adjoining machine spaces, a pressure equalizing element is arranged, so that the pressure equalization occurs between the resolver space and the coupled machine space.
US10879757B2	Bearing configuration for an electronic motor Disclosed is an electronic motor with two bearings. The motor is structured so that, when loaded, the majority of the load (e.g., a radial load) is borne by one of the bearings. The bearing that bears a greater load may be larger and, thus, better suited for a heavy load. In some embodiments, the larger bearing may include rolling elements that have respective radii larger than respective radii of rolling elements of the other bearing by a ratio of at least 1.5 (150%). In some embodiments, the larger bearing may have an outer race with a radius that is greater than a radius of the outer race of the smaller bearing by a ratio of at least 1.5. In some embodiments, the motors may include a third bearing between the two bearings. The third bearing may reduce vibration in the motor.
US10879750B2	Claw pole having shaped claw pole segments A claw pole member for an electric machine including a plurality of claw pole segments. Each of the plurality of claw pole segments includes a radial projecting member, an axial outer surface extending to a cantilevered end portion, and an axial inner surface extending axially outwardly of the radial projecting member to a cantilevered end section. A first side surface extends between the axial outer surface and the axial inner surface from the radial projecting member to the cantilevered end portion and the cantilevered end section, and a second side surface extends between the axial outer surface and the axial inner surface from the radial projecting member to the cantilevered end portion and the cantilevered end section. The first and second side surfaces define a taper of the claw pole segment. Each of the first and second side surfaces includes a recessed portion that extends into the claw pole segment.
US10879749B2	Electric motor and stator cooling apparatus An electric motor can include a stator body defining fluid channels extending axially for fluid communication between axial ends of the stator body. Conductive windings can form first loops extending axially outward from the first end of the stator body and second loops extending axially outward from the second end of the stator body. A first cap can be coupled to the first end of the stator body and can include a first wall. The first wall can be between the first loops and the channels. Pins can extend from a side of the first wall that is opposite the first loops. The second cap can be coupled to the second end of the stator body and include a second wall. The second wall can be between the second loops and the channels. Pins can extend from a side of the second wall that is opposite the second loops.
US10879748B2	Stator of rotary electric machine and rotary electric machine A stator of a rotary electric machine comprises: a stator core including multiple slots; multiple coils formed using a winding wound in a distributed fashion so as to pass through the slots; and multiple power lines connected to the coils. The coils have a coil end projecting from an end surface of the stator core. The coils are adjacent to each other in the peripheral direction. A connection between each of the coils and a corresponding one of the power lines is arranged adjacent to a base portion of the coil end on the outer periphery. Each of the power lines starts from the connection to extend along the outer periphery of the coil end to be adjacent to the base portion of the coil end on the outer periphery while extending outwardly in the axis direction from between the coils adjacent to each other in the peripheral direction.
US10879743B2	Foreign object detection in inductive power transfer field A method for determining the presence of a foreign object in an inductive power transfer field in which control circuitry of an inductive power system performs the steps of: providing power to a direct current to alternating current converter; providing power from the converter to a transmitter coil in the inductive power transfer field; waiting for the current in the transmitter coil to stabilize; estimating the reactive power in the transmitter coil; estimating the real power in the transmitter coil; and using the estimated reactive power and estimated real power to determine whether a foreign object is present.
US10879741B2	Wireless power transfer network management Concepts and technologies directed to wireless power transfer network management are disclosed herein. Embodiments of a system can include an optical beamforming transmitter, a processor, and a memory that stores computer-executable instructions that configure a processor to perform operations. The operations can include receiving a power charge message that requests wireless power transfer to charge a battery system of a wirelessly chargeable equipment. The operations can include detecting that the wirelessly chargeable equipment is within a power transfer range of the optical beamforming transmitter. The operations can include determining that the wirelessly chargeable equipment is not stationary. The operations can include tracking movement of the wirelessly chargeable equipment and activating the optical beamforming transmitter that provides wireless power transfer to the wirelessly chargeable equipment while the wirelessly chargeable equipment is within the power transfer range.
US10879739B2	Wireless power transmitter reactive energy control A wireless power transmitter according to some embodiments can include a transmitter circuit configured to be coupled across a series coupled capacitor and transmit coil; and a controller coupled to a node between the capacitor and the transmit coil, the controller configured to adjust a reactive energy in the series coupled capacitor and transmit coil in response to a change in operating frequency.
US10879725B2	Electronic device, power supply device of electronic device, and power supply method Various embodiments of the present disclosure relate to an electronic device including: a first battery for supplying power; an attachable/detachable power supply device including a second battery for supplying power and a DC power connector; and a processor connected to the first battery, and connected to the second battery and the DC power connector when connecting to the power supply device, wherein the power supply device includes at least two MOSFETs for connecting the second battery and an element, for detection of the power supply device, provided to the electronic device when connecting the power supply device. In addition, other examples, which can be identified through the specification, are possible.
US10879724B2	Wireless charging and communication board and wireless charging and communication device Provided are a wireless charging and communication board, and a wireless charging and communication device, the wireless charging and communication board including: a soft magnetic layer; a polymeric material layer arranged on one surface and the other surface of the soft magnetic layer and extending longer than an exposed portion of the soft magnetic layer; and a coil pattern arranged on the polymeric material layer.
US10879723B2	Exchangeable interface charging dock A wireless charging dock has a charging element with a first side and a second side; The first side provided with a wireless charge coil and the second side provided with a wireless charge cavity and a cable groove, the wireless charge cavity and the cable groove dimensioned to receive a wireless charger disc and a charge disc cable therein, respectively. The charging element rotatable between a first position in which the first side is oriented to receive a first type of electronic device for wireless charging and a second position in which the second side is oriented to receive a second type of electronic device for wireless charging.
US10879722B2	Inductive power for seismic sensor node Embodiments of systems and methods for inductively powering seismic sensor nodes are presented. An embodiment of an inductive battery includes a battery cell configured to store charge for use by an external device. The inductive battery may also include a first inductive element coupled to the battery cell, the first inductive element configured to receive current from the battery cell and emit a responsive magnetic field for powering an external device through inductance. In an embodiment the external device is a seismic sensor node.
US10879718B2	Method and device for charging battery A method for charging a battery includes: determining a first charging section, in which a current charging rate of the battery is located, from among a plurality of charging sections predetermined based on a functional relation between a state of charge of the battery and an open circuit voltage of an anode of the battery; and charging the battery for the first charging section with a first charging rate corresponding to the first charging section.
US10879715B2	Method for improving temperature management of battery pack The invention provides a method for improving temperature management of a battery pack. The battery pack may comprise a battery cell charged via at least one supply trace of a PCB (printed circuit board), a protection circuit module mounted on the PCB and coupled to the at least one supply trace, and a plurality of temperature sensors respectively reflecting a temperature of the battery cell and a temperature of the PCB. The method may comprise: measuring a cell temperature and a PCB temperature by the temperature sensors; when charging the battery cell by a charging current and a charging voltage, controlling the charging voltage and the charging current according to the cell temperature, and adjusting the charging current further according to the PCB temperature, so as to constrain the temperature of the PCB.
US10879709B2	Power management system and operating method thereof A power management system includes a battery charging system, a power supplying system, a first switching module, and a second switching module. The power management system is switched between the battery charging system and the power supplying system via the first switching module and the second switching module. With a charging electric energy generated by the waveform generating module, the battery charging system could restore the aging battery or the battery with degraded performance to a better state when the batteries are charging. By sensing a battery state of batteries, the power supplying system provides a supplementing power to the batteries, and the supplementing power and a power of the batteries could be supplied to a load together.
US10879706B2	Battery balancing circuit balancing voltages between battery units with a fly capacitor A battery balancing method and circuit for balancing the voltages between battery units with a fly capacitor. In a first time period of a switching cycle, the first battery unit is used to charge the fly capacitor or the first battery unit is used to discharge the fly capacitor, depending on which of the first battery unit and the fly capacitor having a larger voltage value; and in a second time period of the switching cycle, the second battery unit is used to charge the fly capacitor or the second battery unit is used to discharge the fly capacitor, depending on which of the second battery unit and the fly capacitor having a larger voltage value.
US10879702B2	System and method for performing wind forecasting A system and method for performing novel wind forecasting that is particularly accurate for forecasting over short-term time periods, e.g., over the next 1-5 hours. Such wind forecasting is particularly advantageous in wind energy applications. The disclosed method is anchored in a robust physical model of the wind variability in the atmospheric boundary layer (ABL). The disclosed method approach leverages a physical framework based on the unsteady dynamics of earth's atmosphere, and drives forecasting as a function of previously-observed atmospheric condition data observed at the same location for which a wind forecast is desired.
US10879698B2	Systems and methods for performing building power management A method for performing building power management includes interfacing a power manager with an upstream controller to obtain a demand response event signal; receiving and parsing the demand response event signal; determining a power target based on a payload, and demand response begin and end times specified in the demand response event signal; evaluating whether an average power exceeds or falls below a limit; determining whether a shed action or a restore action is required; determining which variable and fixed electrical loads are to be maintained, shed or restored; interfacing the power manager with a building automation system (BAS); providing the BAS with a load control signal instructing that selected variable and fixed electrical loads are to be shed or restored; and selectively maintaining, shedding or restoring the selected variable and fixed electrical loads responsive to the load control signal.
US10879696B2	Grid control apparatus and method for predicting a time when energy consumption on the grid will exceed normal production capacity A method for predicting when consumption on a grid will exceed production capacity for buildings within the grid including time shifted version for each of the buildings, each version comprising consumption values along with time and temperature values, where the consumption values within each set are shifted by one of a plurality of lag values relative to the time and temperature values; performing a regression analysis on each set to yield corresponding regression model parameters and a corresponding residual; determining a least valued residual indicating a corresponding energy lag for each of the buildings; using temperatures, regression model parameters, and energy lags for all of the buildings to estimate a cumulative consumption, and to predict the time when consumption on the grid will exceed production capacity; and receiving the time, and preparing and commencing exceptional measures required to manage the consumption.
US10879692B2	Semiconductor device and electronic control system having the same There is a need to provide a semiconductor device and an electronic control system including the same while the semiconductor device is capable of continuing normal operation even when a negative surge voltage is applied. According to an embodiment, a driver IC includes an output transistor, a driver control circuit, a negative potential clamp circuit, and an ESD protection circuit. The output transistor is provided between a battery voltage terminal and an output terminal coupled to a load. The driver control circuit switches on-off state of the output transistor by controlling a gate voltage of the output transistor with reference to a voltage of the output terminal. The negative potential clamp circuit turns on the output transistor regardless of control from the control circuit when a negative voltage lower than a predetermined voltage is applied to the output terminal. The ESD protection circuit is provided between battery the voltage terminal and the reference voltage terminal and enters a conduction state when a surge voltage is applied to the battery voltage terminal.
US10879686B2	Overcurrent protection for universal serial bus Type-C (USB-C) connector systems An electronic device includes a first switch configured to connect a VCONN supply terminal of a Universal Serial Bus Type-C (USB-C) controller to a first configuration channel (CC) terminal of the USB-C controller in response to a USB-C connector being in a first orientation. A first current may flow through the first switch. The electronic device also includes an overcurrent component coupled to the first switch. The overcurrent component includes a second switch associated with the first switch. The second switch has a second current associated with the first current. The overcurrent component is configured to determine whether the first current is greater than a threshold current based on the first current and the second current. The overcurrent component is also configured to close the first switch in response to determining that the first current is greater than the threshold current.
US10879682B2	Electrical connection box and wire harness An electrical connection box includes a case including a frame that holds electronic components and a cover that blocks an opening portion of the frame, a power supply connection portion provided inside the case, an external power supply being connected to the power supply connection portion, and a cover portion that covers the power supply connection portion from above, in which the cover portion has a hole portion that communicates a space portion on a side of the power supply connection portion with respect to the cover portion with a space portion above the cover portion inside the case, and is configured to detachably hold a component.
US10879681B2	Coupling for electrical metallic tubing A coupling may include a main body having a first circumferential end and a second circumferential end. The coupling may further include a first tab extending from the first circumferential end and a second tab extending from the second circumferential end, the first tab including a first opening to receive a fastener and the second tab including a second opening to receive the fastener. The coupling may further include a central tab extending from the first circumferential end, the central tab received within a central tab opening of the second circumferential end. In some embodiments, an electrical metallic tubing (EMT) may extend within a central cavity defined by a tubular shape of the main body. The coupling may further include a set screw extending through the first and second tabs for engagement with the EMT.
US10879678B2	Configuring a power distributor using a detachable display A power distributor includes a detachable display and a power distribution unit. The power distribution unit includes a plurality of electrical sockets and a display port available to provide connection to the detachable display. Configuration parameters are stored within the power distribution unit. The detachable display includes a memory that contains configuration information for the power distribution unit. The configuration information can be transmitted through the display port to the power distribution unit and stored by the power distribution unit as the configuration parameters.
US10879673B2	Integrated white light source using a laser diode and a phosphor in a surface mount device package The embodiments described herein provide a device and method for an integrated white colored electromagnetic radiation source using a combination of laser diode excitation sources based on gallium and nitrogen containing materials and light emitting source based on phosphor materials. A violet, blue, or other wavelength laser diode source based on gallium and nitrogen materials may be closely integrated with phosphor materials, such as yellow phosphors, to form a compact, high-brightness, and highly-efficient, white light source. The phosphor material is provided with a plurality of scattering centers scribed on an excitation surface or inside bulk of a plate to scatter electromagnetic radiation of a laser beam from the excitation source incident on the excitation surface to enhance generation and quality of an emitted light from the phosphor material for outputting a white light emission either in reflection mode or transmission mode.
US10879669B2	Photonic crystal laser A photonic crystal laser 10 is a laser that has a configuration, in which a light emitting layer (an active layer 12) that generates light including light of wavelength λL, and a two-dimensional photonic crystal layer 11 including different refractive index regions (holes 111) disposed two-dimensionally on a plate-like base material 112, the different refractive index regions having a refractive index different from a refractive index of the base material, so that a refractive index distribution is formed, are stacked. Each different refractive index region in the two-dimensional photonic crystal layer 11 is disposed at a position shifted from each lattice point of a basic two-dimensional lattice that has periodicity defined to generate a resonant state of light of the wavelength λL by forming a two-dimensional standing wave and not to emit light of the wavelength λL to outside. A positional shift vector Δr↑ representing the shift of the position of the different refractive index region at the each lattice point from the lattice point is expressed by Δr↑=d·sin(±G′↑·r↑+ψ0)·(cos(L(φ+φ0)), sin(L(φ+φ0))) by using a wave number vector k↑=(kx, ky) of light of the wavelength λL in the two-dimensional photonic crystal layer 11, an effective refractive index neff of the two-dimensional photonic crystal layer, an azimuth angle φ from a predetermined reference line extending in a predetermined direction from a predetermined origin of the basic two-dimensional lattice, an arbitrary constant φ0, and a reciprocal lattice vector G′↑=±(kx±\|k↑\|(sin θ cos φ)/neff, ky±\|k↑\|(sin θ sin φ)/neff) expressed by using a spread angle θ of a laser beam, the position vector r↑ of the each lattice point, arbitrary constants d and ψ0, and an integer L excluding 0.
US10879668B1	Solid state laser with conjugated oligomer active material The solid state laser with conjugated oligomer active material uses a lasing medium including a conjugated oligomer embedded in a transparent crystal matrix. The lasing medium preferably also includes a thermally conductive material. A pump laser generates a pump laser beam to impinge on the lasing medium, causing the lasing medium to generate at least one amplified spontaneous emission laser beam. The transparent crystal matrix may be formed from an epoxy thermosetting plastic, such as that formed from a hardener and an epoxy, such as isobornyl acrylate, ethyl 2-cyanoacrylate, ethyl 2-cyano-3,3-bis(methylthio)acrylate, ethyl cyanoacrylate, ethyl cis-(β-cyano)acrylate, poly(bisphenol A-co-epichlorohydrin) or bisphenol A. The conjugated oligomer may be 1,4-bis(9-ethyl-3-carbazo-vinylene)-9,9-dihexyl-fluorene (BECVH-DHF). The thermally conductive material may be molybdenum disulfide (MoS2) or [6,6]-phenyl-C61-butyric acid methyl ester (PCBM 60).
US10879667B2	Laser source for emitting a group of pulses A laser source for emitting a group of pulses, includes a primary laser source suitable for emitting at least one primary laser pulse; at least one interferometer suitable for forming, from the primary laser pulse, a plurality of secondary laser pulses, each interferometer comprising at least one delay line allowing two secondary laser pulses to be temporally separated, by a delay comprised between 50 ps and 10 ns; and a single-mode amplifying optical fiber intended to receive the secondary laser pulses, in order to form as output a group of spatially superposed pulses.
US10879666B2	Optical fiber and fiber laser The present invention comprises a core (11) and a primary coating (12) that is lower in refractive index than the core (11) and that covers the side surface of the core (11) except in a coating-removed section (I0). The side surface of the core (11), in at least part of the coating-removed section (I0), is covered with an intermediate-refractive-index resin part (14) that is lower in refractive index than the core (11) and that is higher in refractive index than the primary coating (12).
US10879665B2	Optical amplifying systems and methods The present disclosure relates to systems and methods for reducing thermal effects in double-clad clad optical fiber amplifying systems via control of the pump absorption. One optical fiber amplifying system for reducing thermal effects includes one or more first optical pump sources, each configured to output radiation of a pump wavelength, a bridge optical fiber, having an input configured to receive the radiation of the pump wavelength output by the one or more first optical pump sources and an output, and an active optical fiber that has a first end substantially directly coupled to the output of the bridge optical fiber and a second end. The active optical fiber is configured to amplify radiation of the first active wavelength when pumped with radiation of the pump wavelength.
US10879664B2	Laser gas regeneration system and laser system A laser gas regeneration system for an excimer laser includes a first pipe capable of supplying a laser chamber with a first laser gas, a second pipe capable of supplying the laser chamber with a second laser gas having a halogen gas concentration higher than that of the first laser gas, a third pipe allowing a gas exhausted from the laser chamber to pass therethrough, a gas refiner that refines the gas having passed through the third pipe, a branch that causes the refined gas to divide and flow into a fourth pipe and a fifth pipe, a first regenerated gas supplier that supplies the first pipe with a gas having divided and flowed into the fourth pipe, and a second regenerated gas supplier that adds a halogen gas to a gas having divided and flowed into the fifth pipe and supplies the second pipe with the halogen-added gas.
US10879658B2	Load connectors for power panel assemblies A power panel for an electrical system includes a chassis having chassis slots for power modules, a bus body coupled to the chassis to connect the power panel to a power source, and first and second module connectors. The first and second module connectors are fixed relative to the bus body to connect the power modules to the bus body. The second module connector is movable relative to the first module connector to accommodate position of the power modules in the chassis slots. Electrical cabinets, power panels, and methods of seating power modules in power panels are also described.
US10879655B2	In-home network splitter with reduced isolation A splitter for use in an in-home network includes an input and a plurality of outputs including at least a first output and a second output. A split point is between the input and the plurality of outputs. A first resistor and a first capacitor are connected in series between the input and the split point. A second resistor and a second capacitor are connected in series between the split point and the first output. A third resistor and a third capacitor are connected in series between the split point and the second output. The input, the first output, and the second output form a resistive Wye-type splitter. A first path exists between the input and the first output. A second path exists between the input and the second output. The first path and the second path have a substantially equal series resistance, series impedance, insertion loss, and isolation.
US10879654B2	RF PCB connector with a surface-mount interface An RF-connector system includes an RF-connector with PCB interface, which contains a housing, a coaxial RF-connector interface, and a PCB contact section together with the PCB. A mechanical connection is made by two wing-shaped surface mount sections of the housing having a plurality of surface mount studs adapted to match with pads on the PCB. The electrical connection to the PCB is made by an inner conductor and at least one matching block electrically connected to the housing and providing a matched impedance at the PCB, which has a strip line with a ground plane.
US10879648B2	Method and system for large silicon photonic interposers by stitching Methods and systems for large silicon photonic interposers by stitching are disclosed and may include, in an optical communication system including a silicon photonic interposer, where the interposer includes a plurality of reticle sections: communicating an optical signal between first and second reticle sections utilizing a waveguide. The waveguide may include a taper region at a boundary between the two reticle sections, the taper region expanding an optical mode of the communicated optical signal prior to the boundary and narrowing the optical mode after the boundary. A continuous wave (CW) optical signal may be received in a first of the reticle sections from an optical source external to the interposer. The CW optical signal may be received in the interposer from an optical source assembly coupled to a grating coupler in the first of the reticle sections in the silicon photonic interposer.
US10879637B2	Connector assembly for high-speed data transmission A cable assembly includes a first cable and a second cable that is arranged co-axial to the first cable. Proximal ends of the first and second cables are provided with a connector assembly. The connector assembly from each proximal end is adapted to connect with one another, or a pair of receptacle ports located within a PCB, the PCB being disposed alongside the co-axially arranged first and second cables.
US10879636B2	Connector and communications device A connector (100) and a communications device is disclosed. The connector includes a connector body (41) and three connecting ends disposed on the connector body. M signal interfaces (51a) inside a first connecting end (42) are in communication with M signal interfaces (51b) inside a second connecting end (43) in a one-to-one correspondence. The first connecting end is connected to a backplane connector (32) on a backplane (31). The second connecting end is connected to one end (45a) of a transmission cable (45), and the other end (45b) of the transmission cable is connected to a communications component (46) on a target board (33a). The backplane is configured to implement communication between X boards (33), and the target board is any one of X boards, where M≥1 and X≥1. A third connecting end (44) is configured to secure the connector body to the target board.
US10879633B2	Connector housing and electrical connector A connector housing comprises a body, an outside surface of the body having a pair of opposite mounting surfaces, a first contact surface, and a second contact surface, and a mounting portion disposed on each of the mounting surfaces. The mounting surfaces, the first contact surface and the second contact surface are perpendicular to each other. A distance between the mounting portion and the first contact surface is equal to a distance between the mounting portion and the second contact surface. The connector housing is interchangeably mounted with the first contact surface on a circuit board or with the second contact surface on the circuit board by a same mounting mechanism engaging the mounting portion.
US10879632B2	Positioning element and contacting element for twin axial cables The invention relates to a positioning element for twin axial cables as well as to a contacting element comprising a positioning element of said type. In an illustrative embodiment of a positioning element for twin axial cables, the positioning element is at least partially electroconductive. Furthermore, the positioning element has at least one recess which is arranged and designed to accommodate a twin axial cable in such a way that an electroconductive connection is established between an outer conductor of the twin axial cable and the positioning element.
US10879631B2	Electric wire with terminal and method of manufacturing the same An electric wire with a terminal and manufacturing method thereof is provided. In the electric wire with the terminal, the protective member, the core wire, and the terminal fitting are integrally connected to each other by ultrasonic vibration applied via the protective member from an ultrasonic horn in a state in which the core wire is sandwiched between the protective member and the terminal fitting. Therefore, there is no possibility that the ultrasonic horn directly presses the core wire, and the edge (particularly, the rear edge) of the pressing portion of the ultrasonic horn is direct in contact with the core wire. Thereby, at the time of ultrasonic bonding, stress concentration due to the edge (particularly the rear edge) of the pressing portion of the ultrasonic horn with respect to the core wire can be relaxed, and disconnection of the core wire can be suppressed.
US10879630B2	Conductor connection terminal A conductor connection terminal, having an insulating-material housing, a spring-force clamping connection point, which is disposed in the insulating-material housing and which has a clamping spring, and comprising a pivotably mounted actuating lever for actuating the clamping spring, wherein the actuating lever is movable from a closed position to an open position and vice versa, wherein the actuating lever has a driver element for deflecting a clamping leg of the clamping spring in order to open a clamping point of the conductor connection terminal, which clamping point is formed with the clamping leg, wherein the conductor connection terminal has at least one spring-holding element, which is not disposed on the actuating lever, for holding the clamping leg in the open position, such that the actuating lever is not loaded with the restoring force of the clamping spring when the clamping point is open.
US10879628B2	Wire-to-wire connector with integrated wire stop A system includes a housing and a contact portion. The housing includes a first portion and a second portion, the first portion interlocking with the second portion so as to enclose a first volume and form a first wire opening within a first end of the housing and a second wire opening within a second end of the housing. The contact portion is disposed within the first volume and includes a first wire receiving portion, a first flexing beam extending from a first surface of the first wire receiving portion towards a second surface of the first wire receiving portion, a second wire receiving portion, a second flexing beam extending from a first surface of the second wire receiving portion towards a second surface of the second wire receiving portion, and a common wire stop disposed between the first wire receiving portion and the second wire receiving portion.
US10879622B2	Three-dimensional antenna array module An apparatus comprising at least a plurality of antenna modules mounted on a printed circuit board (PCB) is disclosed. The PCB includes a plurality of holes embedded with a heat sink. Each antenna module comprises an antenna substrate. Each antenna module further comprises a plurality of three-dimensional (3-D) antenna cells that are mounted on a first surface of the antenna substrate. Each antenna module further comprises a plurality of packaged circuitry that are mounted on a second surface of the antenna substrate. The plurality of packaged circuitry are electrically connected with the plurality of 3-D antenna cells. Furthermore, each antenna module is mounted on the plurality of holes via a corresponding packaged circuitry of the plurality of packaged circuitry.
US10879621B2	Antenna for satellite communication capable of receiving multi-band signal Provided is an antenna for satellite communication capable of receiving multi-band signals. The antenna includes: a main reflector; a first feed horn which is provided on the main reflector and receives a signal of a first band; a first reflector which is disposed to be spaced apart from a reflective surface of the main reflector at a predetermined interval and transmits the signal of the first band to the first feed horn; a second feed horn which is provided on the main reflector and receives a signal of a second band; and a second reflector which is disposed to be spaced apart from the reflective surface of the main reflector at a predetermined interval and transmits the signal of the second band to the second feed horn.
US10879619B2	Microwave system A microwave system comprising a center fed parabolic reflector; a radio transceiver, said transceiver disposed on a circuit board and coupled to a radiator, said radiator disposed on the circuit board and extending orthogonally from a surface of the circuit board. Embodiments also include directors on the circuit board and a sub-reflector comprising a thin plate disposed on a weather proof cover and said sub-reflector having a substantially concave surface with a focus directed towards the radiator. The circuit board may be physically integrated within the feed mechanism of the center fed parabolic reflector and the radio transceiver is configured to provide OSI layer support.
US10879618B2	Wideband substrate integrated waveguide slot antenna A substrate integrated waveguide (SIW) slot antenna may include a substrate that may have a first substrate portion with a first permittivity less than unity and a second substrate portion with a second permittivity. The substrate may include a top surface and a bottom surface. The exemplary SIW slot antenna may further include a first conductive layer disposed on the top surface, a second conductive layer disposed on the bottom surface, a transverse slot on the first conducting layer, waveguide sidewalls that may include a plurality of spaced-apart metal-lined vias traversing the substrate, and a microstrip feed line on the first conducting layer.
US10879617B1	Wideband slot antenna with interdigital back plane An antenna is provided with a plurality of spaced-apart interdigital back plates covered by a slotted plate having a longitudinal slot of varying rectangular parameters. A plurality of spacers are positioned between the interdigital back plates and the slotted plate. A support stiffener connects the interdigital back plates at a trough of each back plate with three rectangular stanchions extending perpendicular from the support stiffener to attach to the slotted plate. A feed point is positioned on a central rectangular stanchion and beneath a central slot of the slotted plate. A feed cowl protects the feed point. The sizing of a slot in the slotted plate depends on an operating wavelength.
US10879615B2	ODU and transmit power control method for ODU Embodiments of this application disclose an ODU and a transmit power control method for an ODU. The ODU includes a controller, a radio frequency processor, a waveguide channel, an antenna, a wave-absorbing block, a detector, and a motor controller. The controller is configured to obtain target transmit power, first transmit power, and a to-be-transmitted first radio frequency signal, and generate a control signal based on a difference between the target transmit power and the first transmit power. The radio frequency processor is configured to: perform frequency conversion on the first radio frequency signal to obtain the second radio frequency signal, and transmit the second radio frequency signal, where the second radio frequency signal is transmitted to the antenna through the waveguide channel. The wave-absorbing block has one end located in the waveguide channel and the other end connected to the motor controller. The motor controller is configured to drive, according to the control signal, the wave-absorbing block to move, so that the first transmit power is consistent with the target transmit power. In this way, according to the embodiments of this application, transmit power can be accurately adjusted, and the ODU can transmit a radio frequency signal at relatively low transmit power.
US10879614B2	Helicoidal, mixed polarization mono-conical antenna A helicoidal, mixed polarization mono-conical antenna has: a supporting structure (2) with a longitudinal axis (2a); ground conductors (3) connected to an area around a first portion (4) of the supporting structure (2) defining a ground plane (21) of the antenna (1) orthogonal to the axis (2a); at least three signal conductors (7), which have respective first ends (8) that are connected to a second portion (5) of the supporting structure (2) and respective second ends (10) that are connected to a third portion (6) of the supporting structure (2) located between the first portion (4) and the second portion (5) along the axis (2a), the conductors wound in a helicoidal manner relative to the axis (2a) and shaped so as to define a substantially frusto-conical volume (12) which is coaxial to the axis (2a) and is oriented with a smaller base towards the first portion (4).
US10879611B2	Antenna device An antenna device includes a ground plate, a patch section parallel to, and spaced apart from, the ground plate, a first short circuit section having a plurality of first conductive elements that electrically connect the patch section and the ground plate, and a second short circuit section having a plurality of second conductive elements electrically connected at one end to the ground plate. The plurality of first conductive elements are arranged in a circle with a first radius from a patch center point and provide a preset inductance. The plurality of second conductive elements are arranged in a circle with a second radius from the patch center point and provide a preset inductance.
US10879610B2	Antenna apparatus and beam adjustment method This application discloses an antenna apparatus, including an antenna array and an adjustable phase shifter. In each row of antenna elements in the antenna array, antenna elements on a same radio frequency RF channel are spaced by M antenna elements, where M is used to determine a quantity of beams in a first beam group and a quantity of beams in a second beam group, and M is an integer greater than 1. When the adjustable phase shifter is at a first angle, the first beam group is obtained; or when the adjustable phase shifter is at a second angle, the second beam group is obtained. This application discloses a beam adjustment method. In this application, a plurality of beams can be formed in a horizontal direction, and the beams are grouped by using an adjustable phase shifter, thereby effectively improving beam adjustment flexibility.
US10879605B2	Antenna arrays having shared radiating elements that exhibit reduced azimuth beamwidth and increase isolation Antenna arrays may include a first plurality of radiating elements responsive to respective pairs of first radio frequency signals and a second plurality of radiating elements responsive to respective pairs of second radio frequency signals. A shared radiating element is also provided, which is responsive to a corresponding pair of first radio frequency signals and a corresponding pair of second radio frequency signals. This shared radiating element may be equivalent in configuration to the first and second pluralities of radiating elements, or may have a unique configuration relative to the first and second pluralities of radiating elements. The first plurality of radiating elements and the second plurality of radiating elements can be aligned as respective first and second spaced-apart and collinear columns of radiating elements, with the shared radiating element disposed about equidistant between the first and second columns.
US10879604B2	Radio-frequency signal grounding device and antenna A radio-frequency signal grounding device for an antenna comprises: a substrate layer; a grounding transmission line on a first side of the substrate layer; a metal layer on a second side of the substrate layer, the metal layer including at least one gap such that the metal layer is divided into at least a first sub-region and a second sub-region, where the gap is configured to block at least one of a low frequency signal and a direct current signal; a metal plate; and a dielectric layer that is disposed between the metal plate and the metal layer. The radio-frequency signal grounding device can achieve good radio-frequency signal grounding and low frequency/direct current signal blocking within a limited space via a multi-coupling design.
US10879603B2	Building material A building material including at least one electrically conductive low emissivity surface provided with an opening for boosting the transmission of an electromagnetic signal through the building material, the opening having a substantially lower electrical conductivity than the low emissivity surface. The edge of the opening provided in said low emissivity surface constitutes at least one closed edge curve, and said opening defines a closed envelope curve so that said opening is within the closed envelope curve, and the surface defined by the closed envelope curve has an area substantially larger than the area of the opening within the closed envelope curve and a length substantially smaller than the length of the closed envelope curve, whereby at least one such low emissivity surface area is formed within the area defined by the closed envelope curve, at which the closed envelope curve is not congruent with the edge curve.
US10879597B2	Antenna for wearable device A wearable device which is mountable on a wrist of a user includes a housing including a metal structure, a display positioned within the housing, wherein the display includes a metal layer positioned within the metal structure and spaced apart from the metal structure by a given gap, a printed circuit board (PCB) positioned within the housing and including a ground region, and a control circuit positioned on the PCB and configured to feed a first point of the metal structure. The metal layer is electrically connected with the ground region of the PCB at a second point spaced from the first point by a given angle.
US10879595B2	Tools and methods for producing nanoantenna electronic devices The present disclosure advances the art by providing a method and system for forming electronic devices. In particular, and by example only, methods are described for forming devices for harvesting energy in the terahertz frequency range on flexible substrates, wherein the methods provide favorable accuracy in registration of the various device elements and facilitate low-cost R2R manufacturing.
US10879593B2	Mobile terminal There is disclosed a mobile terminal including a display unit; a metal bracket comprising a middle frame provided in a rear surface of the display unit; and a side frame partially distant from the middle frame and configured to define a lateral surface; a main board loaded in a rear surface of the bracket; a rear case configured to cover the main board and define an external appearance of a rear surface; and a first conductive pattern formed in an inner surface of the rear case, wherein the main board comprises a first feeding portion connected with the side frame; a second feeding portion connected with the first conductive pattern; and a first grounding portion connected with the side frame and the first conductive pattern and located between the first feeding portion and the second feeding portion.
US10879591B2	Mobile device and antenna structure A mobile device includes a dielectric substrate, a metal layer, a metal housing, a first nonconductive partition, a second nonconductive partition, a first connection element, and a second connection element. The dielectric substrate includes a first protruded portion. The metal layer lies on the dielectric substrate, and includes an upper element and a main element, wherein the upper element is separated from the main element by a first region. The metal housing is substantially a hollow structure, and has a first slit and a second slit, wherein a first projection of the first slit with respect to the dielectric substrate at least partially overlaps the first region, and a second projection of the second slit with respect to the dielectric substrate at least partially overlaps the first protruded portion. The mobile device is capable of operating in multiple bands.
US10879583B2	Electronic device provided with an integrated conductor element and fabrication method An electronic device includes a support plate having a mounting face and an electrical connection network. An integrated circuit chip is mounted on the mounting face and linked to the electrical connection network. An encapsulation block embeds the integrated circuit chip. An additional element made of an electrically conductive material is at least partly embedded within the encapsulation block. The additional conductive element has a main portion extending parallel to the support plate and has a secondary portion that is linked electrically to the integrated circuit chip. An opening is formed in the encapsulation block, and the secondary portion extends into that opening to make the electrical link. The additional conductive element may be an antenna.
US10879573B2	Energy storage apparatus and method of manufacturing energy storage apparatus An energy storage apparatus includes: one or more energy storage devices; and a first outer covering and a second outer covering arranged outside said one or more energy storage devices. The energy storage apparatus further includes: a weld portion which is a joint portion between the first outer covering and the second outer covering formed by joining the first outer covering and the second outer covering to each other by welding; a heat-susceptible object; and a heat shielding portion arranged between the weld portion and the heat-susceptible object.
US10879569B2	Battery pack and vehicle connected to battery pack Disclosed is a battery pack connected to a host system, the battery pack including: a relay connected between a battery terminal of the battery pack and the host system; at least two battery modules, each of which includes a plurality of serially connected cells and generates battery detection information; and a battery management system (BMS), which measures a voltage of the battery terminal when a current having a predetermined value or larger flows in a high current path between the battery pack and the host system, receives at least two pieces of battery detection information from the at least two battery modules, respectively, and determines a coupling state of the battery pack based on the voltage of the battery terminal and the at least two pieces of battery detection information.
US10879568B2	Thin film lithium ion battery A method for forming a thin film lithium ion battery includes, under a same vacuum seal, forming a stack of layers on a substrate including an anode layer, an electrolyte, a cathode layer and a first cap over the stack of layers to protect the layers from air. Under a same vacuum seal, the stack of layers is etched with a non-reactive etch process in accordance with a hardmask, and a second cap layer is formed over the stack of layers without breaking the vacuum seal. Contacts coupled to the cathode and the anode are formed.
US10879566B2	Electrolytic solution and electrochemical device An electrolytic solution includes a sulfone and a magnesium salt dissolved in the sulfone, in which the magnesium salt includes magnesium borohydride (Mg(BH4)2).
US10879565B2	Electrolyte for rechargeable lithium battery and rechargeable lithium battery An electrolyte for a rechargeable lithium battery, including a non-aqueous organic solvent, a lithium salt, and an additive is disclosed. The additive includes a compound represented by Chemical Formula 1. In Chemical Formula 1, each substituent is the same as described in the detailed description.
US10879561B2	Sulfide solid electrolyte A sulfide solid electrolyte that contains lithium, phosphorus, sulfur, chlorine and bromine, wherein in powder X-ray diffraction analysis using CuKα rays, it has a diffraction peak A at 2θ=25.2±0.5 deg and a diffraction peak B at 2θ=29.7±0.5 deg, the diffraction peak A and the diffraction peak B satisfy the following formula (A), and a molar ratio of the chlorine to the phosphorus “c (Cl/P)” and a molar ratio of the bromine to the phosphorus “d (Br/P)” satisfies the following formula (1): 1.2
US10879560B2	Active material and all-solid-state lithium-ion secondary battery An active material according to one aspect of the present invention includes a core region; and a shell region, in which an amount of transition metals in the core region is more than an amount of transition metals in the shell region, and an amount of oxygen deficiency in the shell region is more than an amount of oxygen deficiency in the core region.
US10879548B2	Power generation system, method for controlling power generation system, and power generation apparatus A power generation system includes a plurality of power generation apparatuses. The power generation system is configured to supply electric power to a load by performing interconnecting operation of the plurality of power generation apparatuses sets one of the plurality of apparatuses as a master apparatus and the other power generation apparatus as a slave apparatus. When power consumption by the load is less than electric power, the master apparatus causes the master apparatus and the slave apparatus to generate power in such a manner that the electric power supplied to the load follows the power consumption by the load. The electric power is generated by rated operation of the master apparatus and the slave apparatus.
US10879544B2	System and method for determining state of charge for an electric energy storage device Systems and methods for operating an electric energy storage device are described. The systems and methods may generate a state of charge estimate that is based on negative electrode plating. An overall state of charge may be determined from the state of charge estimate that is based on negative electrode plating and a state of charge estimate that is not based on negative electrode plating.
US10879542B2	Fuel cell A fuel cell includes an MEA, a first separator, and a second separator. A frame member is provided around an outer peripheral portion of an MEA, and held between the first separator and the second separator. The height of an oxygen-containing gas flow field formed by the second separator, from the MEA is larger than the height of a fuel gas flow field formed by the first separator, from the MEA. The central position of the MEA in the thickness direction and the central position of the frame member outer peripheral portion of the frame member in the thickness direction are offset from each other.
US10879541B2	Fuel cell stack A fuel cell stack that can suppress degraded cooling performance due to the presence of air bubbles. The fuel cell stack includes a plurality of stacked fuel cells, each fuel cell having a power generation portion and a pair of separators. The fuel cell stack further includes a plurality of refrigerant channels inside the power generation portion that are provided in a region corresponding to the power generation portion and that allow communication between the refrigerant inlet manifold and refrigerant outlet manifold, and a refrigerant channel outside the power generation portion that is provided in a region above the power generation portion in the gravity direction and that allows communication between the refrigerant inlet manifold and refrigerant outlet manifold. The refrigerant channels inside and outside the power generation portion communicate with each other.
US10879540B2	Layered structure battery with multi-functional electrolyte The present invention provides a thin, bendable, printed, layered primary battery structure without a battery separator. The battery includes a first layer including a printed positive electrode. A second layer includes a negative electrode material which may be a printed negative electrode or a metal foil negative electrode. An adhesive, UV-curable intermediate layer is adhered to the first layer on a first side of the intermediate layer and is adhered to the second layer on a second side of the intermediate layer. The intermediate layer includes a water-soluble electroactive material and a water-soluble viscosity-regulating polymer in an amount sufficient to render the intermediate layer adhesive. The intermediate layer also includes a water-insoluble polymer matrix having sufficient rigidity to prevent contact of the first layer and the second layer. A flexible package encases the first, second, and intermediate layers.
US10879539B2	Mixed metal oxide compounds and electrocatalytic compositions, devices and processes using the same A metal oxide compound of formula (I): MnxMyRu1-(x+y)O2 (I) is a single phase rutile-type structure, where M is Co, Ni, or Fe, or a combination thereof, x>0, y≥0, and 0.02≤(x+y)≤0.30. Related electro-catalysts, devices, and processes are also provided.
US10879536B2	Cathode and lithium battery including cathode A includes a cathode active material including a lithium transition metal oxide, wherein the lithium transition metal oxide includes nickel and a non-nickel transition metal, and an amount of the nickel in the lithium transition metal oxide is about 50 mole percent or greater with respect to a total number of moles of transition metals in the lithium transition metal oxide, a conducting agent including a linear carbonaceous conducting agent, and a binder, wherein the binder includes a first fluorinated binder not including a polar functional group, a second fluorinated binder including a polar functional group, a first non-fluorinated binder including a cyano group, and a second non-fluorinated binder including a cyanoalkyl group.
US10879527B2	Protective layers for electrodes and electrochemical cells Articles and methods including layers for protection of electrodes in electrochemical cells are provided. As described herein, a layer, such as a protective layer for an electrode, may comprise a plurality of particles (e.g., crystalline inorganic particles, amorphous inorganic particles). In some aspects, at least a portion of the plurality of particles (e.g., inorganic particles) are fused to one another. For instance, in some aspects, the layer may be formed by aerosol deposition or another suitable process that involves subjecting the particles to a relatively high velocity such that fusion of particles occurs during deposition. In some cases, the protective layer may be porous.
US10879523B2	Devices, systems, and methods for molten fluid electrode apparatus management An apparatus comprises a plurality of negative electrode reservoirs configured to contain a negative electrode material, at least one positive electrode reservoir configured to contain a positive electrode material and a reaction chamber. A heating system is configured to heat negative electrode material within a selected negative electrode material reservoir and to heat positive electrode material in the at least one positive electrode material reservoir to maintain the electrode materials in the selected reservoirs in a fluid state while maintaining, in a non-fluid state, negative electrode material in a non-selected negative electrode reservoir. An electrode material distribution system is configured to transfer, during a discharge state of the apparatus, fluid negative electrode material from the selected negative electrode reservoir to the reaction chamber.
US10879521B2	Electrode coated with a film obtained from an aqueous solution comprising a water-soluble binder, production method thereof and uses of same A method of preparing an electrochemical electrode which is partially or totally covered with a film that is obtained by spreading an aqueous solution comprising a water-soluble binder over the electrode and subsequently drying same. The production cost of the electrodes thus obtained is reduced and the surface porosity thereof is associated with desirable resistance values.
US10879515B2	Bus bar module A bus bar module includes a plurality of bus bars, a plate-shaped housing case, and a plurality of voltage detection conductors. Each of the bus bars is connected to two or more electrode terminals in an electrode terminal group. The housing case has a plurality of bus bar housing spaces housing the respective bus bars, and has insulation property. The voltage detection conductors are each connected to the bus bars. The bus bars are each disposed in the bus bar housing spaces while separated from the inner peripheral surfaces forming the bus bar housing spaces. The housing case includes a pair of support connecting sections that support the corresponding bus bar with respect to the housing case, in each of the bus bar housing spaces. Each of the support connecting sections has elastic deformation sections allowing elastic deformation in an arrangement direction.
US10879514B2	Polylactam coated separator membranes for lithium ion secondary batteries and related coating formulations The present invention is preferably directed to a polylactam ceramic coating for a microporous battery separator for a lithium ion secondary battery and a method of making this formulation and application of this formulation to make a coated microporous battery separator. The preferred inventive coating has excellent thermal and chemical stability, excellent adhesion to microporous base substrate, membrane, and/or electrode, improved binding properties to ceramic particles and/or has improved or excellent resistance to thermal shrinkage, dimensional integrity, and/or oxidation stability when used in a rechargeable lithium ion battery.
US10879513B2	Nanoporous composite separators with increased thermal conductivity Nanoporous composite separators are disclosed for use in batteries and capacitors comprising a nanoporous inorganic material and an organic polymer material. The inorganic material may comprise Al2O3, AlO(OH) or boehmite, AlN, BN, SiN, ZnO, ZrO2, SiO2, or combinations thereof. The nanoporous composite separator may have a porosity of between 35-50%. The average pore size of the nanoporous composite separator may be between 10-90 nm. The separator may be formed by coating a substrate with a dispersion including the inorganic material, organic material, and a solvent. Once dried, the coating may be removed from the substrate, thus forming the nanoporous composite separator. A nanoporous composite separator may provide increased thermal conductivity and dimensional stability at temperatures above 200° C. compared to polyolefin separators.
US10879512B2	Aromatic polyamide porous membrane, method for preparing and lithium secondary battery having the same The present disclosure provides an aromatic polyamide porous membrane having a uniform internal structure. The internal structure of the membrane is a three-dimensional network porous structure with micron-sized pores. The aromatic polyamide porous membrane of the present disclosure has good thermal stability and is especially suitable for a high energy density lithium-ion power battery, and greatly improves the thermal runaway temperature of the battery. The present disclosure further provides a method for preparing the membrane and a lithium secondary battery having the membrane.
US10879508B2	Fixation of a battery module in a battery module compartment of an energy storage system In an embodiment, an expansion component (e.g., expanding foam element, inflatable pad, a pneumatic or hydraulic mechanism, etc.) is arranged inside of a battery module compartment (e.g., on a bottom interior surface of the battery module compartment). A battery module is inserted into the battery module component and is fixated, or secured, within the battery module compartment at least in part based upon the expanding component which starts to expand or continues to expand after the insertion. In a further embodiment, the battery module may be removed from the battery module compartment after a contraction function (e.g., collapse of the foam element, deflation of the inflatable pad, etc.) of the expansion component is initiated.
US10879505B2	Wearable power supply system Systems and methods for vending one or more portable, user-replaceable power supplies using an enclosure with one or more shelf-type structures. A plurality of charging ports is integrated into the shelf-type structures for charging a power supply for type of user device. A user interface is utilized to select a vending function of the system, a receiving portion accepts and recharges one or more user-returned power supplies, and a delivering portion transfers one or more power supplies to a user in response to a user selecting a power supply delivery vending function using the user interface.
US10879504B2	Electrode feedthru having pin attached to wire therein and method of manufacturing Disclosed herein is an electrode feedthru assembly for an electronic device and method of manufacturing. The feedthru assembly includes a ferrule, an electrode assembly, and an elastomer. The ferrule includes a bore through which the electrode assembly is positioned. The electrode assembly includes an electrode wire attached to a crimp pin. The crimp pin includes a crimp terminal portion and a pin terminal portion, the crimp terminal portion crimped to the a portion of the electrode wire to form a connected portion of the electrode assembly. The elastomer is disposed in the bore of the ferrule between the ferrule and the electrode assembly. The elastomer is configured to electrically isolate the ferrule from the electrode assembly and to encapsulate at least the connected portion of the electrode assembly.
US10879502B2	Electrode assembly comprising reinforcing member capable of minimizing deformation of electrode and stacked structure of unit cell by protecting unit cell from external impact The present disclosure provides an electrode assembly including a unit cell stack having n unit cells stacked with a separation film interposed therebetween and at least one reinforcing member formed from metal that integrally covers at least one of the upper and lower surfaces and at least one side surface of the unit cell stack. In particular, n is an odd number excluding 1. Additionally, in each unit cell, one or more cathodes and one or more anodes are stacked with a separator interposed therebetween. Accordingly, the unit cells are protected against external impacts.
US10879500B2	Organic electroluminescent device and fabrication method thereof A fabrication method of an organic electroluminescent device includes: providing a substrate configured to an anode of the device; fabricating a blue pixel emission layer on one side of the substrate with a universal mask plate; and fabricating a red pixel emission layer and a green emission layer successively on one side of the blue pixel emission layer which backs toward the substrate. The blue pixel emission layer includes an effective emission area and a non-effective emission area. The red pixel emission layer and the green pixel emission layer both are the same layer and arranged on the non-effective emission area. The present disclosure can reduce equipment expenditure in fabricating the emission layers and the complexities of technology.
US10879499B2	Display module, manufacturing method thereof and electronic device The present disclosure proposes a display module, a manufacturing method, and an electronic device. The display module includes a display panel, a polarizing layer on the display panel, a cover layer on the polarizing layer, and an adhesive layer between the polarizing layer and the cover layer. The adhesive layer is a viscosity-releasing adhesive layer.
US10879498B2	OLED display device and manufacturing method thereof An organic light emitting diode (OLED) display device includes an OLED display panel, a first insulating layer disposed on the OLED display panel, a first metal layer disposed on the first insulating layer, a second insulating layer disposed on the first metal layer and the first insulating layer, a second metal layer disposed on the second insulating layer, a black matrix disposed on the second metal layer, a hard mask disposed on the black matrix, and color resists disposed on the OLED display panel. The OLED display panel includes sub-pixels. Openings extend through the second metal layer, the black matrix, and the hard mask and are positioned corresponding to the sub-pixels. Each color resist is disposed in the openings. The present invention can effectively eliminate reflective light under strong light, and provide a manufacturing process implemented with a small number of masks at a lower product cost.
US10879496B2	Organic electroluminescent element having a charge generating layer between adjacent light emitting layers This organic EL element comprises a first light emitting unit that contains a red phosphorescent light emitting layer and a green phosphorescent light emitting layer, a second light emitting unit that contains a blue fluorescent light emitting layer, and a third light emitting unit that contains a blue fluorescent light emitting layer; and this organic EL element has a structure in which a positive electrode, the third light emitting unit, a second charge generating layer, the second light emitting unit, a first charge generating layer, the first light emitting unit and a negative electrode are sequentially laminated in this order. The white light obtained through light emission of the first, second and third light emitting units has one peak wavelength within the red wavelength range, one peak wavelength within the green wavelength range, and one or two peak wavelengths within the blue wavelength range.
US10879495B2	Organic light emitting device and array substrate An organic light emitting device and array substrate are provided. The organic light emitting device includes a light emitting structure layer having a light emitting side and a light extraction layer positioned on the light emitting side of the light emitting structure layer. The light extraction layer includes at least one refractive layer, each of the refractive layers includes a plurality of first light refraction bodies, a plurality of second light refraction bodies, and a polymer layer. In the organic light emitting device and the array substrate of the present invention, light extraction efficiency of the organic light emitting device can be increased by adding the light extraction layer to the organic light emitting structure. Moreover, the structure of the present invention is simple to set up, solving the problems that light extraction is difficult to be realized in prior art and realizing the preparation of a high-efficiency OLED device.
US10879492B2	Display device and manufacturing method thereof A display device according to an embodiment of the present invention includes: an electrode; a light-emitting layer formed on the electrode; and a metal-containing film formed on the light-emitting layer and containing a first metallic element. The metal-containing film includes a metal layer forming an interface of the metal-containing film on the side of the light-emitting layer, formed of a simple substance of the first metallic element or an alloy of the first metallic element and a second metallic element, and a light-transmitting oxide layer forming an interface of the metal-containing film on the opposite side from the interface on the side of the light-emitting layer, formed of an oxide of the first metallic element, and having a light-transmitting property.
US10879489B2	Organic device having protective film and method of manufacturing the same The present invention provides a method of manufacturing an organic device having a protective film, the method including: providing bonding layers (adhesives) on one surface of a first substrate and one surface of a second substrate; providing an organic device on the other surface of the first substrate; and providing the second substrate on the organic device such that the bonding layer (adhesive) provided on the second substrate is in contact with the organic device. Since the organic device having the protective film according to the present invention may be attached to other materials through the bonding layer (adhesive), it is not necessary to apply heat in order to attach the organic device to other materials, and as a result, it is possible to attach the organic device to various materials having various shapes regardless of types and shapes of materials. Further, according to the organic device having the protective film according to the present invention, since the protective film is formed as the substrate having the bonding layer (adhesive) 220 is attached to the organic device 300, no heat is applied to the organic device 300 during the process of forming the protective film, and as a result, it is possible to minimize deformation of the organic device 300 by minimizing physical and chemical stress to be applied to the organic device 300. According to the organic device having the protective film according to the present invention, the two protective film layers for protecting the organic device are manufactured through the same process, and as a result, it is possible to innovatively reduce the process time required to manufacture the organic device having the protective film in comparison with the process in the related art.
US10879483B2	Organic electroluminescent device and illumination device An organic electroluminescent device wherein, among the distribution characteristics of light emitted inside a substrate: the brightness of white light has a maximum value within an angle range of 20-60° from an axis perpendicular to the planar direction of the substrate; the spectral radiance of red light at the maximum emission wavelength and the spectral radiance of green light at the maximum emission wavelength have maximum values within the angle range of 30-70° from the axis perpendicular to the planar direction of the substrate; and the maximum values are greater than the value for spectral radiance of red light at the maximum emission wavelength and the value for the spectral radiance of green light at the maximum emission wavelength, in the axial direction perpendicular to the planar direction of the substrate.
US10879479B2	Systems and methods for organic semiconductor devices with sputtered contact layers Systems and methods for organic semiconductor devices with sputtered contact layers are provided. In one embodiment, an organic semiconductor device comprises: a first contact layer (140) comprising a first sputter-deposited transparent conducting oxide; an electron transport layer (130) interfacing with the first contact layer; a second contact layer (110) comprising a second sputter-deposited transparent conducting oxide; a hole transport layer interfacing with the second contact layer; and an organic semiconductor active layer (120) having a first side facing the electron transport layer and an opposing second side facing the hole transport layer; wherein either the electron transport layer or the hole transport layer comprises a buffering transport layer.
US10879476B1	Organic thin film transistor and method of manufacturing the same An organic thin film transistor (OTFT) is provided. The OTFT includes a substrate, a first electrode layer disposed on a top surface of the substrate, an organic active layer disposed on a top surface of the first electrode layer, a second electrode layer disposed in the organic active layer and including a base electrode, a plurality of pinholes formed in the base electrode and providing charge transfer paths, and a metal oxide configured to surround a surface of the base electrode and the pinholes, and a third electrode layer disposed on the organic active layer.
US10879472B2	Organic compound, and organic light emitting diode and organic light emitting display device including the same An embodiment of the present invention provides an organic compound represented by following Formula: wherein each of X1 to X5 is independently selected from a carbon atom (C) or a nitrogen atom (N), and at least two or three of X1 to X5 are N, wherein each of R1 and R2 is independently selected from a substituted or non-substituted aryl group or a substituted or non-substituted heteroaryl group, and “a” is an integer between zero (0) to 3, and wherein each of L1 and L2 is independently selected from a substituted or non-substituted arylene group or a substituted or non-substituted heteroarylene group, and “b” is zero (0) or 1. The present invention also provides an organic light emitting diode and an organic light emitting display device including the organic compound. The organic compound of the present invention is capable of reducing a driving voltage of an organic light emitting diode and improves a current efficiency and a lifetime of the organic light emitting diode and the organic light emitting display device including the same.
US10879471B2	Organic electroluminescence device and amine compound for organic electroluminescence device An organic electroluminescence device comprising an amine compound is represented by Formula 1 as a hole transport material. where Ar1, Ar2, Ar3, and L1 are as defined in the specification.
US10879470B2	Condensed cyclic compound and organic light-emitting device including the same Provided are condensed cyclic compounds represented by Formula 1: and an organic light-emitting device having the compounds which has decreased driving voltage, higher efficiency, and increased overall lifespan.
US10879469B1	Method of manufacturing a field effect transistor using nanotube structures and a field effect transistor A semiconductor device includes a substrate, a nanotube structure, and a gate structure. The nanotube structure is disposed over the substrate. The nanotube structure includes a semiconducting carbon nanotube (s-CNT) and a first insulating nanotube. The first insulating nanotube has an inert surface on the s-CNT. The gate structure includes a first metallic carbon nanotube (m-CNT) over the nanotube structure.
US10879468B2	Composition, organic photoelectronic element, and production method therefor To provide a layer such as a charge transport layer having a refractive index significantly lowered without impairing electrical conductivity and surface roughness, and a method for producing it. A deposited film composition obtained by co-depositing a fluorinated polymer having a saturated vapor pressure at 300° C. of at least 0.001 Pa and an organic semiconductor material.
US10879466B2	Organic light-emitting display apparatus and method of manufacturing the same An organic light-emitting display apparatus including: a substrate; a plurality of first electrodes spaced apart from each other on the substrate; a plurality of organic functional layers respectively covering an upper surface and side surfaces of the plurality of first electrodes, each of the plurality of organic functional layers including an emission layer; a first bank disposed between the plurality of organic functional layers and not directly contacting the plurality of first electrodes; and a second electrode disposed on the plurality of organic functional layers.
US10879465B2	Method for forming an organic element of an electronic device The present invention relates to a method for forming an organic element of an electronic device having at least two different pixel types including a first pixel type (pixel A) and a second pixel type (pixel B) wherein at least one layer of the pixel A and one layer of pixel B are deposited by applying an ink at the same time, characterized in that the ink for manufacturing a layer for the pixel A and the ink for manufacturing a layer for the pixel B which are deposited at the same time are different and the layer obtained by depositing the ink for manufacturing a layer for the pixel A and the layer obtained by depositing the ink for manufacturing a layer for the pixel B are dried thereafter, wherein the relative difference of the drying time (t1−t2/t1) of both layers being deposited at the same time and being obtained by two different inks for manufacturing a layer for the pixel A and a layer for the pixel B is at most 0.5 wherein t1 is the drying time of the layer of one pixel type and t2 is the drying time of the layer of the other pixel type and t1 is greater than or equal to t2.
US10879464B2	Semiconductor and ferromagnetic insulator heterostructure A first aspect provides a topological quantum computing device comprising a network of semiconductor-superconductor nanowires, each nanowire comprising a length of semiconductor formed over a substrate and a coating of superconductor formed over at least part of the semiconductor; wherein at least some of the nanowires further comprise a coating of ferromagnetic insulator disposed over at least part of the semiconductor. A second aspect provides a method of fabricating a quantum or spintronic device comprising a heterostructure of semiconductor and ferromagnetic insulator, by: forming a portion of the semiconductor over a substrate in a first vacuum chamber, and growing a coating of the ferromagnetic insulator on the semiconductor by epitaxy in a second vacuum chamber connected to the first vacuum chamber by a vacuum tunnel, wherein the semiconductor comprises InAs and the ferromagnetic insulator comprises EuS.
US10879463B2	Phase change memory structure to reduce power consumption A phase change memory (PCM) cell with enhanced thermal isolation and low power consumption is provided. In some embodiments, the PCM cell comprises a bottom electrode, a dielectric layer, a heating element, and a phase change element. The dielectric layer is on the bottom electrode. The heating element extends through the dielectric layer, from a top of the dielectric layer to the bottom electrode. Further, the heating element has a pair of opposite sidewalls laterally spaced from the dielectric layer by a cavity. The phase change element overlies and contacts the heating element. An interface between the phase change element and the heating element extends continuously respectively from and to the opposite sidewalls of the heating element. Also provided is a method for manufacturing the PCM cell.
US10879455B2	Methods of fabricating magneto-resistive random-access memory (MRAM) devices to avoid damaging magnetic tunnel junction (MTJ) structure Methods of fabricating MRAM devices are provided. The method includes forming an etch stop layer over a substrate, and depositing a bottom electrode layer on the etch stop layer. The method also includes patterning the bottom electrode layer to form a bottom electrode. The method further includes depositing a magnetic tunnel junction (MTJ) layer on the bottom electrode, and depositing a top electrode layer on the MTJ layer. In addition, the method includes patterning the top electrode layer to form a top electrode, and patterning the MTJ layer to form an MTJ structure.
US10879453B2	Spin oscillator device and mutually synchronized spin oscillator device arrays A spin oscillator device including a first spin Hall effect nano-oscillator, SHNO, having an extended multilayered magnetic thin-film stack, wherein a nano-constriction, NC, is provided in the magnetic film stack providing an SHNO including a magnetic free-layer and a spin Hall effect layer, and having a nanoscopic region, wherein the NC is configured to focus electric current to the nanoscopic region, configured to generate the necessary current densities needed to excite magnetization auto-oscillations, MAO, in the magnetic free layer, wherein a circumferential magnetic field surrounds the NC, wherein an externally applied field with a substantial out-of-plane component is configured to control the spatial extension of the MAO towards a second spin oscillator device, which is arranged in MAO communication and synchronized to the first NC.
US10879448B2	Resonator and resonator device A resonator includes a vibrator with a base, and multiple vibrating arms extending therefrom. Moreover, a frame surrounds a periphery of the vibrating part and a holding arm couples the vibrator to the frame. The holding arm includes a pair of first support arms that are connected to the base opposite the vibrating arms and a coupling portion that couples the support arms with one another and that is connected to the frame.
US10879447B2	Repeating alternating multilayer buffer layer A buffer layer can be used to smooth the surface roughness of a galvanic contact layer (e.g., of niobium) in an electronic device, the buffer layer being made of a stack of at least four (e.g., six) layers of a face-centered cubic (FCC) crystal structure material, such as copper, the at least four FCC material layers alternating with at least three layers of a body-centered cubic (BCC) crystal structure material, such as niobium, wherein each of the FCC material layers and BCC material layers is between about five and about ten angstroms thick. The buffer layer can provide the smoothing while still maintaining desirable transport properties of a device in which the buffer layer is used, such as a magnetic Josephson junction, and magnetics of an overlying magnetic layer in the device, thereby permitting for improved magnetic Josephson junctions (MJJs) and thus improved superconducting memory arrays and other devices.
US10879446B2	Vertical flux bias lines coupled to vertical squid loops in superconducting qubits Embodiments of the present disclosure relate to quantum circuit assemblies implementing superconducting qubits, e.g., transmons, in which SQUID loops and portions of FBLs configured to magnetically couple to the SQUID loops extend substantially vertically. In contrast to conventional implementations, for a vertical SQUID according to various embodiments of the present disclosure, a line that is perpendicular to the SQUID loop is parallel to the qubit substrate. A corresponding FBL is also provided in a vertical arrangement, in order to achieve efficient magnetic coupling to the vertical SQUID loop, by ensuring that at least a portion of the FBL designed to conduct current responsible for generating magnetic field for tuning qubit frequency is substantially perpendicular to the substrate.
US10879443B2	LED package structure, chip carrier, and method for manufacturing chip carrier The present disclosure provides an LED package structure, a carrier, and a method for manufacturing a carrier. The carrier includes a substrate and an electrode layer disposed on the substrate. The electrode layer includes at least one bonding portion that has a plurality of elongated microstructures recessed in a surface thereof.
US10879442B2	Flexible and light-transmissible light-emitting device and method for manufacturing light-emitting device A light-emitting device according to embodiments of the invention includes a film having light transmissive property to visible light; a conductor layer formed on one surface of the film; and a light-emitting element having electrodes connected to the conductor layer via bumps protruding toward the film. The curvature of the film curved on the outer edge of a contact area of the conductor layer contacting the bumps is defined by a radius of a circle contacting the conductor layer at at least three points on the outer edge of the contact area, and the radius of this circle is 13 μm or larger.
US10879440B2	Light emitting device including light emitting unit arranged in a tube A light-emitting device includes a carrier with a first surface and a second surface opposite to the first surface; and a light-emitting unit disposed on the first surface and configured to emit a light toward but not passing through the first surface. When emitting the light, the light-emitting device has a first light intensity above the first surface, and a second light intensity under the second surface, a ratio of the first light intensity to the second light intensity is in a range of 2˜9.
US10879438B2	Light emitting module and manufacturing method of light emitting module According to one embodiment, a light emitting module includes a first insulating film having optical transparency, a second insulating film arranged facing the first insulating film and having optical transparency, a conductor layer formed on the first insulating film, and a plurality of light emitting elements arranged between the first insulating film and the second insulating film and connected to the conductor layer in a first surface on one side. Each of the plurality of light emitting elements including a first electrode in which a height from a second surface opposite to the first surface is a first height and a second electrode in which a height from the second surface is a second height. The plurality of light emitting elements are arranged such that a distance between the first electrodes of adjacent light emitting elements is smaller than a distance between the second electrodes.
US10879437B2	Wafer-level light emitting diode package and method of fabricating the same Exemplary embodiments of the present invention provide a wafer-level light emitting diode (LED) package and a method of fabricating the same. The LED package includes a semiconductor stack including a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer; a plurality of contact holes arranged in the second conductive type semiconductor layer and the active layer, the contact holes exposing the first conductive type semiconductor layer; a first bump arranged on a first side of the semiconductor stack, the first bump being electrically connected to the first conductive type semiconductor layer via the plurality of contact holes; a second bump arranged on the first side of the semiconductor stack, the second bump being electrically connected to the second conductive type semiconductor layer; and a protective insulation layer covering a sidewall of the semiconductor stack.
US10879436B2	Light emitting device A light emitting device having a light-emitting element, a covering resin covering the light-emitting element, a wavelength converting material contained in the covering resin, and a light diffusing agent contained in the covering resin is provided. The light diffusing agent contains glass particles. A first refractive index n1 of the covering resin at a peak wavelength of a light emitted by the light-emitting element and at 25° C. is in a range of 1.48 to 1.60, a second refractive index n2 of the covering resin at the peak wavelength and at 100° C. is at least 0.0075 lower than the first refractive index n1, and a third refractive index n3 of the light diffusing agent at the peak wavelength and at 25° C. is higher than the first refractive index n1.
US10879433B2	Stabilized quantum dot composite and method of making a stabilized quantum dot composite A stabilized quantum dot composite includes a plurality of luminescent semiconducting nanoparticles embedded in a matrix comprising an ionic metal oxide. A method of making a stabilized quantum dot composite includes forming a mixture comprising a plurality of luminescent semiconducting nanoparticles dispersed in an aqueous solution comprising an ionic metal oxide. The mixture is dried to form a stabilized quantum dot composite comprising the plurality of luminescent semiconducting nanoparticles embedded in a matrix comprising the ionic metal oxide.
US10879431B2	Wavelength converting layer patterning for LED arrays A wavelength converting layer is disclosed that includes a plurality of phosphor grains 50-500 nm in size and encapsulated in cerium free YAG shells and a binder material binding the plurality of phosphor grains, the wavelength converting layer having a thickness of 5-20 microns attached to the light emitting surface.
US10879429B2	Light emitting device A light emitting device includes: a light emitting element having an emission peak wavelength in a range of 430 nm to 470 nm; and a fluorescent member including a fluorescent material that is excited by light from the light emitting element for light emission, wherein a mixture of light from the light emitting element and light from the fluorescent material has a correlated color temperature in a range of 1500 K to 11000 K, as measured according to JIS Z8725, the color deviation duv that is a deviation from the black body radiation track on the CIE1931 chromaticity diagram of the mixture of light and is measured according to JIS Z8725 falls within a range of more than 0 to 0.02 or less at a correlated color temperature of 1500 K to 11000 K, and when a value calculated by integrating a product of the spectral distribution of the mixture of light and each relative intensity of a human standard spectral luminous efficiency over a wavelength range of a human visible region is referred to as an integral value a and when a value calculated by integrating a product of the spectral distribution of the mixture of light and each relative intensity of an insect spectral luminous efficiency over a wavelength range where insects exhibit positive phototaxis is referred to as an integral value b, the insect attracting index I defined as a ratio of the integral value b to the integral value a (b/a) is 50% or more and 99% or less of the insect attracting index I0 at the time when the color deviation duv is 0.
US10879427B2	Method of producing an optoelectronic component, and optoelectronic component A method of producing an optoelectronic component includes providing a carrier; securing a sheet including a wavelength-converting material on a top side of the carrier; arranging a grid structure on a top side of the sheet; arranging an optoelectronic semiconductor chip in an opening of the grid structure on the top side of the sheet; arranging a potting material on the top side of the sheet, wherein the grid structure and the optoelectronic semiconductor chip are at least partly embedded into the potting material, and a composite body including the potting material, the sheet, the grid structure and the optoelectronic semiconductor chip is formed; and detaching the composite body from the carrier.
US10879426B2	Carrier for a component, component and method for producing a carrier or a component A mount (10) and an optoelectronic component (100) with the mount (10) are provided, wherein the mount (10) comprises a moulding (5), at least one through-contact (41, 42) and a plurality of reinforcing fibres (52), wherein the moulding (5) is formed from an electrically insulating moulding material (53), the through-contact (41, 42) is formed from an electrically conductive material, and the reinforcing fibres (52) produce a mechanical connection between the moulding (5) and the through-contact (41, 42) by the reinforcing fibres (52) being arranged in certain regions of the moulding (5) and arranged in certain regions of the through-contact (41, 42). A method for producing a mount or a component with such a mount is also provided.
US10879425B2	Light-emitting device A light-emitting device includes a package, at least one light-emitting element and a light-absorbing member. The package defines a recess having an opening at a light extraction surface of the package. A part of the recess is defined by an upward-facing surface of the package. The light-emitting element is mounted on the upward-facing surface of the package. The light-absorbing member is disposed in the recess, spaced apart from the light-emitting element, and having an exposed surface facing upward toward the light extraction surface, the exposed surface being exposed from the upward-facing surface of the package with the exposed surface and the upward-facing surface of the package being on the same plane.
US10879422B2	Light emitting element A light emitting element includes: a first conductivity type semiconductor rod having a plurality of side surfaces arranged to form a polygonal column shape; an active layer formed of a semiconductor and covering the side surfaces; and a second conductive type semiconductor layer covering the active layer. The active layer includes a plurality of well layers respectively disposed over at least two adjacent side surfaces among the plurality of side surfaces. Adjacent well layers among the plurality of well layers are separated from each other along a ridge line where the at least two adjacent side surfaces are in contact with each other. The active layer further includes a ridge portion formed of a semiconductor and disposed on the ridge line, the ridge portion connecting the adjacent well layers. A bandgap of the ridge portion is wider than a bandgap of each of the plurality of well layers.
US10879415B2	Photodetector, photodetection system, lidar apparatus, vehicle, and method of manufacturing photodetector A photodetector includes a first semiconductor layer and a second semiconductor layer provided on the first semiconductor layer and detecting light. The first semiconductor layer has a cavity portion for reflecting incident light.
US10879411B2	Solar cell module A solar cell module is disclosed. The solar cell module includes a plurality of solar cells each including first electrodes collecting carriers of a first conductive type and second electrodes collecting carriers of a second conductive type opposite the first conductive type, the plurality of solar cells being positioned adjacent to one another, and a plurality of wiring members configured to electrically connect the first electrodes to the second electrodes of adjacent solar cells. The plurality of wiring members are positioned in parallel with one another. The plurality of wiring members include a first wiring member disposed in a corner area of one solar cell having a corner with a curved edge and a second wiring member disposed in a non-corner area of the one solar cell except the corner area.
US10879410B2	Solar cell module A solar cell module includes: a solar cell; a conductive light-reflective film disposed on a back surface side of the solar cell, the conductive light-reflective film extending from an edge portion of the solar cell; an insulating member disposed between a back surface of the solar cell and the conductive light-reflective film; and a back-surface side encapsulant covering the solar cell and the conductive light-reflective film from the back surface side of the solar cell, wherein the insulating member is made of a material harder than a material of the back-surface side encapsulant.
US10879409B2	Crystalline silicon solar cell, production method therefor, and solar cell module A crystalline silicon-based solar cell includes a crystalline silicon substrate having a first principal surface, a second principal surface, and a lateral surface. On the first principal surface is arranged, in the following order, a first intrinsic silicon-based thin-film, a first conductive silicon-based thin-film, a light-receiving-side transparent electrode layer and a light-receiving-side metal electrode. On the second principal surface is arranged, in the following order, a second intrinsic silicon-based thin-film, a second conductive silicon-based thin-film, a back-side transparent electrode layer and a back-side metal electrode. The second conductive silicon-based thin-film has a conductivity-type different from that of the first conductive silicon-based thin-film. Both the first principal surface and the second principal surface are textured. Both the light-receiving-side metal electrode and the back-side metal electrode have a pattern shape. The back-side transparent electrode layer is not provided on a peripheral edge of the second principal surface.
US10879408B2	Methods, materials, and structures for optical and electrical III-nitride semiconductor devices The present invention provides materials, structures, and methods for III-nitride-based devices, including epitaxial and non-epitaxial structures useful for III-nitride devices including light emitting devices, laser diodes, transistors, detectors, sensors, and the like. In some embodiments, the present invention provides metallo-semiconductor and/or metallo-dielectric devices, structures, materials and methods of forming metallo-semiconductor and/or metallo-dielectric material structures for use in semiconductor devices, and more particularly for use in III-nitride based semiconductor devices. In some embodiments, the present invention includes materials, structures, and methods for improving the crystal quality of epitaxial materials grown on non-native substrates. In some embodiments, the present invention provides materials, structures, devices, and methods for acoustic wave devices and technology, including epitaxial and non-epitaxial piezoelectric materials and structures useful for acoustic wave devices. In some embodiments, the present invention provides metal-base transistor devices, structures, materials and methods of forming metal-base transistor material structures for use in semiconductor devices.
US10879402B2	Thin film transistor and display unit A thin film transistor includes a substrate, a semiconductor layer, a first gate insulating film, a second gate insulating film, and a gate electrode. The semiconductor layer is provided in a selective region of the substrate. The first gate insulating film is provided in the selective region of the substrate and covers a surface of the semiconductor layer. The second gate insulating film extends across opposite sides of the first gate insulating film along a channel width direction and covers the first gate insulating film that covers the semiconductor layer. The gate electrode faces the semiconductor layer across the second gate insulating film.
US10879400B2	Field effect transistor and method of manufacturing the same Field effect transistor and manufacturing method thereof are disclosed. Field effect transistor includes a substrate, a fin, spacers, a gate structure, a hard mask pattern, an insulating layer, and a gate contact. The fin protrudes from the substrate and extends in a first direction. The spacers run in parallel over the fin and extending in a second direction perpendicular to the first direction. The gate structure extends between the spacers and covers the fin. The hard mask pattern covers the gate structure and extends in between the spacers. The insulating layer is disposed over the substrate and covers the hard mask pattern, the gate structure and the spacers. The gate contact penetrates the insulating layer and physically contacts the gate structure. A bottom surface of the gate contact is coplanar with top surfaces of the spacers and the hard mask pattern.
US10879399B2	Method of manufacturing semiconductor device comprising doped gate spacer A semiconductor device includes a substrate, at least one source drain feature, a gate structure, and at least one gate spacer. The source/drain feature is present at least partially in the substrate. The gate structure is present on the substrate. The gate spacer is present on at least one sidewall of the gate structure. At least a bottom portion of the gate spacer has a plurality of dopants therein.
US10879388B2	Methods of reducing the electrical and thermal resistance of SiC substrates and device made thereby A power semiconductor device includes a silicon carbide substrate and at least a first layer or region formed above the substrate. The silicon carbide substrate has a pattern of pits formed thereon. The device includes a stop layer that is disposed at least in part laterally between the pits. The device further comprising an ohmic metal disposed at least in the pits to form low-resistance ohmic contacts, wherein the ohmic metal contacts at least parts of the stop layer.
US10879380B2	Method of making semiconductor device comprising flash memory and resulting device A semiconductor device and method for making the semiconductor device comprising a flash memory cell is provided. In accordance with some embodiments, the method includes: patterning a first gate material layer and a gate insulating film over a substrate, the first gate material layer comprising a first gate material, the gate insulating film disposed on the first gate material layer; forming a second gate material layer over the substrate, the gate insulating film, and side walls of the first gate material layer, the second gate material layer comprising a second gate material; etching the second gate material layer to expose the substrate and the gate insulating film and provide a portion of the second gate material layer along each of the side walls of the first gate material layer; and etching the gate insulating film and the first gate material layer so as to form a plurality of gate structures.
US10879379B2	Multi-gate device and related methods Multi-gate semiconductor devices and methods for forming thereof including forming air gaps between the gate and the adjacent source/drain features. A first fin element including a plurality of silicon layers is disposed on a substrate, a first gate structure is formed over a channel region of the first fin element. An air gap is formed such that it is disposed on a sidewall of the portion of the first gate structure. An epitaxial source/drain feature abuts the air gap. A portion of the first gate structure may also be disposed between first and second layers of the plurality of silicon layers.
US10879378B2	Semiconductor structure Provided is a semiconductor structure including a substrate, a doping layer, and a dielectric layer. The substrate has a plurality of fin portions and at least one recessed portion, wherein the at least one recessed portion is located between two adjacent fin portions of the plurality of fin portions and a bottom surface of the at least one recessed portion is lower than a surface of the substrate between the two of the plurality of fin portions. The doping layer is disposed on a sidewall of the plurality of fin portions, the surface of the substrate, and a sidewall and a bottom portion of the at least one recessed portion. The dielectric layer is disposed on the doping layer. A top surface of the doping layer and a top surface of the dielectric layer are lower than a top surface of each of the plurality of fin portions.
US10879369B2	FinFET device and method of manufacture A semiconductor device includes a fin extending from an upper surface of a substrate, a gate stack disposed over the fin, a first dielectric material disposed on a sidewall of the gate stack, an epitaxy region disposed adjacent the fin, a second dielectric material disposed on the epitaxy region and on a sidewall of the first dielectric material, wherein the second dielectric material has a greater thickness in a first portion over the epitaxy region than in a second portion over the epitaxy region disposed closer to the substrate than the first portion, a third dielectric material disposed on the second dielectric material, and a conductive feature extending through the third dielectric material and the second dielectric material to contact the epitaxy region.
US10879367B2	Method for manufacturing semiconductor device A gate electrode (3) is provided on a main surface of a silicon substrate (1) via a gate insulating film (2). A source/drain region (4,5) is provided on sides of the gate electrode (3) on the main surface of the silicon substrate (1). A first silicide (6) is provided on an upper face and side faces of the gate electrode (3). A second silicide (7) is provided on a surface of the source/drain region (4,5). No side-wall oxide film is provided on the side faces of the gate electrode (3). The second silicide (7) is provided at a point separated from the gate electrode (3).
US10879361B2	Method for manufacturing semiconductor structure A method for manufacturing a semiconductor structure including following steps is provided. A dielectric layer is formed on a substrate. A polysilicon layer is formed on the dielectric layer. Ion implantation processes are performed to the polysilicon layer by using a fluorine dopant. Implantation depths of the ion implantation processes are different. A fluorine dopant concentration of the ion implantation process with a deeper implantation depth is smaller than a fluorine dopant concentration of the ion implantation process with a shallower implantation depth. After the ion implantation processes, a thermal process is performed to the polysilicon layer.
US10879360B2	Composite oxide semiconductor and transistor A novel material is provided. A composite oxide semiconductor includes a first region and a second region. The first region contains indium. The second region contains an element M (the element M is one or more of Ga, Al, Hf, Y, and Sn). The first region and the second region are arranged in a mosaic pattern. The composite oxide semiconductor further includes a third region. The element M is gallium. The first region contains indium oxide or indium zinc oxide. The second region contains gallium oxide or gallium zinc oxide. The third region contains zinc oxide.
US10879358B2	Method of fabricating electrically isolated diamond nanowires and its application for nanowire MOSFET A method for fabricating an electrically isolated diamond nanowire includes forming a diamond nanowire on a diamond substrate, depositing a dielectric or a polymer on the diamond nanowire and on the diamond substrate, planarizing the dielectric or the polymer, etching a portion of the planarized dielectric or polymer to expose a first portion of the diamond nanowire, depositing a metal layer to conformably cover the first portion of the diamond nanowire, and implanting ions into a second portion of the diamond nanowire between the first portion of the diamond nanowire and the diamond substrate or at an intersection of the diamond nanowire and the diamond substrate, wherein the ions are implanted at an oblique angle from a first side of the diamond nanowire.
US10879356B2	Method for making a semiconductor device including enhanced contact structures having a superlattice A method for making a semiconductor device may include forming a trench in a semiconductor substrate, and forming a superlattice liner covering bottom and sidewall portions of the trench. The superlattice liner may include a plurality of stacked groups of layers, with each group of layers including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may further include forming a semiconductor cap layer on the superlattice liner and having a dopant constrained therein by the superlattice liner, and forming a conductive body within the trench.
US10879352B2	Vertically stacked nFETs and pFETs with gate-all-around structure A semiconductor structure including vertically stacked n-type field effect transistors (nFETs) and p-type field effect transistors (pFETs) containing suspended semiconductor channel material nanosheets having an isolation layer located between a pFET source/drain (S/D) structure and an nFET S/D region is provided together with a method of forming such a structure. The pFET S/D structure includes a pFET S/D SiGe region having a first germanium content and an overlying SiGe region having a second germanium content that is greater than the first germanium content.
US10879345B2	Semiconductor device including a plurality of electrodes and supporters A semiconductor device includes a plurality of electrode structures formed on a substrate; and an upper supporter group and a lower supporter between upper ends and lower ends of the plurality of electrode structures The upper supporter group includes a plurality of supporters, and at least some of the plurality of supporters each have an upper surface and a lower surface. One of the upper surface and the lower surface has a curved profile, and the other surface has a flat profile.
US10879341B2	Integrated device package comprising a real time tunable inductor implemented in a package substrate Some features pertain to a device package that includes a die and a package substrate. The die includes a first switch. The package substrate is coupled to the die. The package substrate includes at least one dielectric layer, a primary inductor, and a first secondary inductor coupled to the first switch of the die. The first secondary inductor and the first switch are coupled to a plurality of interconnects configured to provide an electrical path for a reference ground signal. The primary inductor is configurable to have different inductances by opening and closing the first switch coupled to the first secondary inductor. In some implementations, the primary inductor is configurable in real time while the die is operational. In some implementations, the die further includes a second switch, and the package substrate further includes a second secondary inductor coupled to the second switch of the die.
US10879340B2	Tiling display device A tiling display device includes a plurality of display modules arranged on one plane. The display module includes a substrate, a signal line, an open hole, a filling layer, and a circuit board. The substrate has a display area in which subpixels are defined. The signal line is positioned on the top surface of the substrate within the display area to deliver a predetermined signal to the subpixels. The open hole is provided to penetrate the substrate within the display area. The filling layer fills the open hole. The circuit board is positioned on the back surface of the substrate and electrically connected to the signal line through the filling layer.
US10879339B2	Display panel having pad disposed on bottom surface of substrate and manufacturing method thereof A display panel including a first array substrate, a first pad, and a second pad is provided. The first array substrate includes a first substrate, a first active element, a first display element, and a second display element. The first substrate has a top surface and a bottom surface disposed opposite to each other. The first active element is disposed on the top surface of the first substrate. The first display element is disposed on the top surface of the first substrate and is electrically connected to the first active element. The second display element is disposed on the top surface of the first substrate and is disposed separately from the first display element. The first pad and the second pad are disposed on the bottom surface of the first substrate, wherein the first active element is electrically connected to the first pad, each of the first pad and the second pad includes an embedded part and a protruded part, the embedded part is located in the first substrate, and the protruded part is protruded from the bottom surface of the first substrate.
US10879337B2	Electronic device and method of manufacturing the same An electronic device including a base structure, a first pattern having at least one projection disposed on the base structure, a first conductive layer including a first portion disposed on the base structure and a second portion disposed on the first pattern and connected to the first portion, an insulating layer disposed on the first conductive layer covering the first portion and exposing the second portion, and a second conductive layer provided on the insulating layer and overlapping the first conductive layer. The second conductive layer is spaced apart from the first portion and is in contact with the second portion. Methods of manufacturing an electronic device capable of reducing the number of process steps in the manufacturing process are also disclosed.
US10879335B2	Display apparatus having grooved terminals A display apparatus includes a display panel having a display substrate on which a plurality of pad terminals is disposed, and a driving unit having a plurality of driving terminals electrically connected to the plurality of pad terminals. Each of the plurality of pad terminals includes a stepped groove that faces a corresponding driving terminal of the plurality of driving terminals or each of the plurality of pad terminals includes an opening hole that faces the corresponding driving terminal of the plurality of driving terminals.
US10879334B2	Flexible display device A flexible display device is disclosed, which may prevent a crack from being generated even though a bending area is folded and prevents a gate driving circuit from being damaged and prevents a gate shift clock line from being shorted even though the crack is generated. The flexible display device comprises a substrate including a display area for displaying an image, a non-display area surrounding the display area, and a bending area. A pixel for displaying an image, an inorganic film for covering the pixel and a first organic film for covering the inorganic film are arranged on an area corresponding to the display area of the bending area, and the first organic film is arranged on an area corresponding to the non-display area of the bending area.
US10879333B2	Organic light emitting display device An organic light emitting display device includes a display unit including a first pixel column and a first data line connected to the first pixel column, a first pad unit including first and second signal pads, a test unit including a first switching element which is connected between the first data line and the first signal pad, and includes a control electrode connected to the second signal pad, a first conductive pattern provided in a different layer from that of the first signal pad and connected to the first signal pad, and a second conductive pattern provided in a different layer from that of the second signal pad and connected to the second signal pad, where the first and second conductive patterns are spaced apart from each other in the same layer, and a width of the first conductive pattern is greater than that of the second conductive pattern.
US10879332B2	Display apparatus A display apparatus includes first and second display areas, first pixels in the first display area, and second pixels in the second display area. Gate lines are connected to the first pixels. First gate electrode lines are connected to the second pixels. First gate driving lines are respectively connected to the first gate electrode lines. A first gate driver outputs first scanning signals to the first pixels via the gate lines. A second gate driver outputs second scanning signals to the second pixels via the first gate driving lines and the first gate electrode lines.
US10879329B2	Semiconductor device, semiconductor substrate, luminescent unit, and display unit A semiconductor device includes a base, a first wiring line, a semiconductor film, a second wiring line, an insulating film, and a semiconductor auxiliary layer. The first wiring line is provided in the first, second, and third regions of the base. The semiconductor film has one or more low-resistance regions, is provided between the first wiring line and the base in the first region, and is in contact with the first wiring line in the second region. The second wiring line is in contact with the first wiring line in the third region. The insulating film is provided between the first wiring line and the semiconductor film in the first region. The semiconductor auxiliary layer is in contact with the semiconductor film at least in the first region, and assists electrical coupling via the first region.
US10879327B2	Organic EL display panel and method of manufacturing the same, organic EL display device and electronic apparatus An organic EL display panel includes a substrate, an interlayer insulation layer formed over the substrate, and an organic EL light emitting section formed over the interlayer insulation layer. The organic EL light emitting section includes a plurality of pixel electrodes arranged in a matrix pattern, a plurality of partition walls each of which is disposed between the pixel electrodes adjacent to each other in a row direction and extends in a column direction, an organic layer including a light emitting layer formed in a region partitioned by the partition walls, and a counter electrode formed on an upper side of the organic layer, and includes a first light emitting section for a first color and a second light emitting section for a second color. The first and second light emitting sections are different in thickness of the organic layer and in digging amount of the interlayer insulation layer in the region partitioned by the partition walls.
US10879321B2	Display device A display device includes: a first substrate including a display region and a non-display region provided at at least one side of the display region; a plurality of pixel units provided in the display region on the first substrate; a metal pattern provided in the non-display region on the first substrate; and a second substrate opposite to the first substrate, the second substrate being joined with the first substrate to encapsulate the display region, wherein the metal pattern includes a material having a high reactivity with oxygen as compared with an organic material.
US10879320B2	Organic light-emitting display panel and display apparatus An organic light-emitting display panel has a display region including a fingerprint recognition region and light-emitting devices for displaying image, the display panel includes a driving device layer, an anode layer, a pixel definition layer, an organic light-emitting layer, and a cathode layer sequentially stacked; and an optical fingerprint recognition sensor located in the fingerprint recognition region and located at a side of the driving device layer away from the anode layer; the pixel definition layer includes sub-pixel openings corresponding to the light-emitting devices, each light-emitting device includes an anode corresponding to one sub-pixel opening, the anode being located in the anode layer and overlapping with a corresponding sub-pixel opening, the organic light-emitting layer is located in each sub-pixel opening, and the cathode layer overlaps with each sub-pixel opening; in the fingerprint recognition region, at least part of the light-emitting devices each have an anode being a transparent electrode.
US10879318B2	Electronic devices having displays with openings An electronic device may have a display. The display may have an active region in which display pixels are used to display images. The display may have one or more openings and may be mounted in a housing associated with the electronic device. An electronic component may be mounted in alignment with the openings in the display. The electronic component may include a camera, a light sensor, a light-based proximity sensor, status indicator lights, a light-based touch sensor array, a secondary display that has display pixels that may be viewed through the openings, antenna structures, a speaker, a microphone, or other acoustic, electromagnetic, or light-based component. One or more openings in the display may form a window through which a user of the device may view an external object. Display pixels in the window region may be used in forming a heads-up display.
US10879313B2	Three-dimensional cross-point memory device containing inter-level connection structures and method of making the same First electrically conductive lines, first pillar structures, second electrically conductive lines, second pillar structures, third electrically conductive lines, third pillar structures, fourth electrically conductive lines, and fourth pillar structures are formed over a substrate. Each pillar structure includes a memory element. Interconnection structures are formed on the first electrically conductive lines. The first electrically conductive lines may have thinned segments located outside the area of the arrays of memory elements, and the interconnection structures may be formed on the thinned segments. Alternatively or additionally, the interconnection structures may include a vertical stack of a first conductive via structure contacting a respective one of the first electrically conductive lines, a conductive pad structure, and a second conductive via structure. Fifth electrically conductive lines may be formed on top surfaces of the second two-dimensional array of memory elements and on top surface of the interconnection structures.
US10879310B2	Memory circuit and formation method thereof The present disclosure, in some embodiments, relates to a method of forming an integrated chip. The method may include forming a control device within a substrate. A first plurality of interconnect layers are formed within a first inter-level dielectric (ILD) structure over the substrate. A first memory device and a second memory device are formed over the first ILD structure. A second plurality of interconnect layers are formed within a second ILD structure over the first ILD structure. The first plurality of interconnect layers and the second plurality of interconnect layers couple the first memory device and the second memory device to the control device.
US10879306B2	Micro semiconductor structure A micro semiconductor structure is provided. The micro semiconductor structure includes a substrate, a plurality of micro semiconductor devices disposed on the substrate, and a first supporting layer disposed between the substrate and the micro semiconductor devices. Each of the micro semiconductor devices has a first electrode and a second electrode disposed on a lower surface of the micro semiconductor devices. The lower surface includes a region, wherein the region is between the first electrode and the second electrode. An orthographic projection of the first supporting layer on the substrate at least overlaps an orthographic projection of a portion of the region on the substrate. The first supporting layer directly contacts the region.
US10879304B2	Active matrix substrate, x-ray imaging panel including same and producing method thereof An active matrix substrate 1 includes a plurality of detection circuitry. The detection circuitry includes a photoelectric conversion layer 15, a pair of a first electrode 14a and a second electrode 14b, a protection film 106, and a bias line 16. The protection film 106 covers a side end part of the photoelectric conversion layer 15, and overlaps with at least a part of the second electrode 14b. The bias line 16 is provided on an outer side of the photoelectric conversion layer 15. An electrode portion of the second electrode 14b that overlaps with the bias line 16 has at least one electrode opening 141h. The bias line 16 is in contact with the electrode portion of the second electrode 14b on an outer side of the photoelectric conversion layer 15, and is in contact with the protection film 106 in the electrode opening 141h.
US10879301B2	Solid-state imaging device An imaging device includes: a photoelectric converter which converts light into signal charges; a charge accumulation region which is electrically connected to the photoelectric converter, and accumulates the signal charges; a transistor having a gate electrode which is electrically connected to the charge accumulation region; and a contact plug which electrically connects the photoelectric converter to the charge accumulation region, is in direct contact with the charge accumulation region, and comprises a semiconductor material.
US10879299B2	Semiconductor device with transistor in semiconductor substrate and insulated contact plug extending through the substrate A semiconductor device including a semiconductor substrate having a first surface and a second surface that face each other, and having an element region and an isolation region, the element region including a transistor in the first surface, and the isolation region including an element isolation layer surrounding the element region; and a contact plug extending from the first surface to the second surface in the isolation region of the semiconductor substrate.
US10879295B2	Detection device A detection device is provided. The detection device includes a substrate having a first surface and a second surface, and the first surface is disposed opposite to the second surface. The detection device also includes a switch element disposed on the first surface, and a light sensing element disposed on the first surface and electrically connected to the switch element. The detection device also includes a first circuit disposed on the second surface. The substrate has a first through-via, and the switch element is electrically connected to the first circuit through the first through-via.
US10879291B2	Stacked sensor with integrated capacitors A three-dimensional (3D) stack is provided and includes a capacitor layer and an integrated circuit (IC) layer. The capacitor layer includes capacitors and capacitor layer connectors respectively communicative with corresponding capacitors. The IC layer is stacked vertically with the capacitor layer and is hybridized to a detector. The IC layer includes IC layer connectors respectively communicative with corresponding capacitor layer connectors.
US10879287B2	Solid-state imaging device, method of manufacturing the same, and electronic device The present technology relates to a solid-state imaging device capable of inhibiting peeling of a fixed charge film while inhibiting dark current, a method of manufacturing the same, and an electronic device. A solid-state imaging device provided with a semiconductor substrate in which a plurality of photodiodes is formed, a groove portion formed in a depth direction from a light incident side for forming an element separating unit between adjacent photoelectric conversion elements on the semiconductor substrate, a first fixed charge film formed so as to cover a surface of a planar portion on the light incident side of the semiconductor substrate, and a second fixed charge film formed so as to cover an inner wall surface of the groove portion formed on the semiconductor substrate is provided. The present technology is applicable to a backside illumination CMOS image sensor, for example.
US10879286B2	Semiconductor device including floating diffusion and extension pattern A semiconductor device and an image sensor, the semiconductor device including a substrate; a photoelectric conversion device in the substrate; a first floating diffusion region adjacent to the photoelectric conversion device; a transfer transistor connected to the photoelectric conversion device and the first floating diffusion region; a reset transistor connected to the first floating diffusion region; a dual conversion gain (DCG) transistor between the first floating diffusion region and the reset transistor; a second floating diffusion region between the DCG transistor and the reset transistor; and an extension pattern, a first portion of the extension pattern being in contact with the second floating diffusion region.
US10879284B2	Imaging device having a pixel electrode overlapping a discharge electrode and associated camera system An imaging device includes a pixel, the pixel including a photoelectric converter which converts light into a signal charge and a charge detection circuit which detects the signal charge. The photoelectric converter includes a photoelectric conversion layer having a first surface and a second surface opposite to the first surface, a pixel electrode on the first surface, a first electrode adjacent to the pixel electrode on the first surface, the first electrode being electrically conductive to the photoelectric conversion layer, and a counter electrode on the second surface, the counter electrode facing the pixel electrode and the first electrode. A shortest distance between the pixel electrode and the first electrode in a plan view is smaller than a shortest distance between the pixel electrode and the first electrode.
US10879283B2	Energy harvesting configurable image sensor An image sensor is provided, the image sensor comprising a plurality of photo-diode pixels arranged in a two-dimensional array, an energy harvesting output bus connected to the plurality of photo-diode pixels, an image sensing output bus connected to the plurality of photo-diode pixels, and a plurality of switching buses connected to the plurality of photo-diode pixels to direct an output of a varying percentage of the plurality of photo-diode pixels to either the energy harvesting output bus or the image sensing output bus.
US10879280B2	Solid-state imaging device and method of manufacturing solid-state imaging device A solid-state imaging device includes: a semiconductor substrate having a light incident surface; a photoelectric converter for each of the pixels; a charge accumulation section for each of the pixels; a first transfer transistor; a wiring layer on side opposite to the light incident surface; a first vertical electrode and a second vertical electrode extending from the surface opposite to the light incident surface to the photoelectric converter; a first light-blocking film in a thickness direction of the semiconductor substrate on at least a portion of a periphery of the photoelectric converter; and a second light-blocking film in a surface direction of the semiconductor substrate between the photoelectric converter and the charge accumulation section. The first vertical electrode and the second vertical electrode are disposed adjacently with a distance therebetween, and the distance is a half or less of a length of one side of the pixel.
US10879278B2	Display substrate, manufacturing method therefor, and display device A display substrate, a manufacturing method thereof, and a display device are provided. The manufacturing method of the display substrate includes: forming a pattern of first transparent conductive layer, forming a passivation layer and forming a second transparent conductive layer on the passivation layer, forming a pattern of second transparent conductive layer, i.e., a slit electrode, the pattern of second transparent conductive layer including a plurality of sub-electrodes arranged at intervals and located in a display region of the display substrate; and removing a portion of the passivation layer which is in the display region and is not covered by the sub-electrodes, forming a pattern of passivation layer. The second transparent conductive layer is polycrystalline ITO.
US10879276B2	Display panel and display device A display panel comprises a display area and a non-display area surrounding the display area. The display area includes gate lines extending in a row direction, data lines extending in a column direction, and an irregular-shaped edge. The irregular-shaped edge includes at least one sub-edge which is recessed towards an inside of the display area to form a notch, and edges of the irregular-shaped edge other than the at least one sub-edge extend in the column direction. The non-display area includes a first sub-area disposed adjacent to the at least one sub-edge. The data lines include at least one irregular-shaped data line, and the at least one irregular-shaped data line includes a winding portion disposed at the first sub-area. The first sub-area includes a compensation electrode, and in a direction perpendicular to the display panel, the compensation electrode is at least partially overlapped with the winding portion.
US10879275B2	Pixel structure A pixel structure includes a pixel electrode, a data selection line and an isolation line. The isolation line is disposed along the pixel electrode. The pixel electrode is configured to store a pixel voltage. The data selection line is configured to transmit a data signal. The isolation line is configured to reduce an influence of an electric field of the data signal on the pixel voltage of the pixel electrode. A projection area of the isolation line is overlapped with a projection area of the pixel electrode.
US10879274B2	Semiconductor device An object is to provide a semiconductor device using an oxide semiconductor having stable electric characteristics and high reliability. A transistor including the oxide semiconductor film in which a top surface portion of the oxide semiconductor film is provided with a metal oxide film containing a constituent similar to that of the oxide semiconductor film and functioning as a channel protective film is provided. In addition, the oxide semiconductor film used for an active layer of the transistor is an oxide semiconductor film highly purified to be electrically i-type (intrinsic) by heat treatment in which impurities such as hydrogen, moisture, a hydroxyl group, or a hydride are removed from the oxide semiconductor and oxygen which is a major constituent of the oxide semiconductor and is reduced concurrently with a step of removing impurities is supplied.
US10879273B2	Active matrix substrate An active matrix substrate includes a thin film transistor having a gate electrode, an oxide semiconductor layer disposed on the gate electrode via a gate insulating layer, and a source electrode and a drain electrode disposed on the oxide semiconductor layer. A plurality of gate bus lines and the gate electrode are made of a first electrically conductive film. At least part of each of the plurality of source bus lines, the source electrode, and the drain electrode have a multilayer structure including a lower layer that is made of a second electrically conductive film and an upper layer that is made of a first transparent electrically conductive film. Between the plurality of source bus lines and the gate insulating layer, a plurality of first oxide strips extending along the first direction are disposed, the first oxide strips being made of the same oxide semiconductor film as the oxide semiconductor layer. Each of the plurality of source bus lines is located on an upper face of the corresponding first oxide strip, and a width of each of the plurality of source bus lines along a second direction is smaller than a width of one corresponding first oxide strip along the second direction.
US10879270B2	Semiconductor integrated circuit device Provided is a semiconductor integrated circuit device including a nanowire field effect transistor (FET) and having a layout configuration effective for making manufacturing the device easy. A standard cell having no logical function is disposed adjacent to a standard cell having a logical function. The standard cell includes nanowire FETs having nanowires and pads. The standard cell further includes dummy pads, which have no contribution to a logical function of a circuit.
US10879269B1	Ferroelectric memory device containing a series connected select gate transistor and method of forming the same A ferroelectric memory unit cell includes a series connection of select gate transistor that turns the ferroelectric memory unit cell on and off, and a ferroelectric memory transistor. Data is stored in a ferroelectric material layer of the ferroelectric memory transistor. The ferroelectric memory unit cell may be a planar structure in which both transistors are planar transistors with horizontal current directions. In this case, the gate electrode of the access transistor can be formed as a buried conductive line. Alternatively, the ferroelectric memory unit cell may include a vertical stack of vertical semiconductor channels.
US10879268B2	Storage device A storage device according to the disclosure includes a first transistor and a second transistor each including a first diffusion layer, a second diffusion layer, and a gate, and that are each able to store a threshold state, a first signal line, a second signal line, a first switch transistor that is turned on and couples the first signal line and the first diffusion layer of the first transistor, a second switch transistor that is turned on and couples the second diffusion layer of the first transistor and the first diffusion layer of the second transistor, and a third switch transistor that is turned on and couples the second diffusion layer of the second transistor and the second signal line.
US10879265B2	Microelectronic devices and related methods Vertical memory blocks for semiconductor devices include a memory cell region including an array of memory cell pillars and at least one via region including a dielectric stack of alternating dielectric materials and at least one conductive via extending through the dielectric stack. Semiconductor devices including a vertical memory block include at least one vertical memory block, which includes slots extending between adjacent memory cells of a three-dimensional array. The slots are separated by a first distance in a first portion of the block, and by a second, greater distance in a second portion of the block. Methods of forming vertical memory blocks include forming slots separated by a first distance in a memory array region and by a second, greater distance in a via region. At least one conductive via is formed through a stack of alternating first and second dielectric materials in the via region.
US10879261B2	Semiconductor memory with stacked memory pillars According to one embodiment, a semiconductor memory includes: a first member extending in a first direction perpendicular to a surface of a substrate, and including a first semiconductor layer; first and second interconnects extending in a second direction parallel to the surface of the substrate, the second interconnect neighboring the first interconnect in a third direction; a second member extending in the first direction and above the first member, the second member including a second semiconductor layer; third and a fourth interconnects extending in the second direction, the fourth interconnect neighboring the third interconnect in the third direction; and a third semiconductor layer between the first and the second members, the third semiconductor layer being continuous with the first and the second semiconductor layers.
US10879260B2	Bonded assembly of a support die and plural memory dies containing laterally shifted vertical interconnections and methods for making the same A bonded assembly includes a first memory die containing a first three-dimensional memory device, a second memory die containing a second three-dimensional memory device, and a support die bonded to the first memory die and comprising a peripheral circuitry configured to control the first three-dimensional memory device and the second three-dimensional memory device. The first memory die includes multiple rows of first-die proximal bonding pads, multiple rows of first-die distal bonding pads, and a plurality of first-die laterally-shifting electrically conductive paths connecting a respective one of the first-die proximal bonding pads and a respective one of the first-die distal bonding pads that is laterally offset from the respective one of the first-die proximal bonding pads. The first memory die and the second memory die can have an identical layout, and electrical connections can be shifted through the first memory die by the offset distance.
US10879259B2	Methods and apparatuses having memory cells including a monolithic semiconductor channel Methods for forming a string of memory cells, apparatuses having a string of memory cells, and systems are disclosed. One such method for forming a string of memory cells forms a source material over a substrate. A capping material may be formed over the source material. A select gate material may be formed over the capping material. A plurality of charge storage structures may be formed over the select gate material in a plurality of alternating levels of control gate and insulator materials. A first opening may be formed through the plurality of alternating levels of control gate and insulator materials, the select gate material, and the capping material. A channel material may be formed along the sidewall of the first opening. The channel material has a thickness that is less than a width of the first opening, such that a second opening is formed by the semiconductor channel material.
US10879254B2	Three-dimensional memory devices having through array contacts and methods for forming the same Embodiments of three-dimensional (3D) memory devices having through array contacts (TACs) and methods for forming the same are disclosed. In an example, a method for forming a 3D memory device is disclosed. A dielectric stack including a plurality of dielectric/sacrificial layer pairs is formed on a substrate. A channel structure extending vertically through the dielectric stack is formed. A first opening extending vertically through the dielectric stack is formed. A spacer is formed on a sidewall of the first opening. A TAC extending vertically through the dielectric stack is formed by depositing a conductor layer in contact with the spacer in the first opening. A slit extending vertically through the dielectric stack is formed after forming the TAC. A memory stack including a plurality of conductor/dielectric layer pairs is formed on the substrate by replacing, through the slit, the sacrificial layers in the dielectric/sacrificial layer pairs with a plurality of conductor layers.
US10879253B2	Semiconductor device and manufacturing method thereof A semiconductor device includes a non-volatile memory. The non-volatile memory includes a first dielectric layer disposed on a substrate, a floating gate disposed on the dielectric layer, a control gate and a second dielectric layer disposed between the floating gate and the control gate. The second dielectric layer includes one of a silicon oxide layer, a silicon nitride layer and a multi-layer thereof. The first dielectric layer includes a first-first dielectric layer formed on the substrate and a second-first dielectric layer formed on the first-first dielectric layer. The second-first dielectric layer includes a dielectric material having a dielectric constant higher than silicon nitride.
US10879252B2	Non-volatile memory cells with floating gates in dedicated trenches A pair of memory cells that includes first and second spaced apart trenches formed into the upper surface of a semiconductor substrate, and first and second floating gates disposed in the first and second trenches. First and second word line gates disposed over and insulated from a portion of the upper surface that is adjacent to the first and second floating gates respectively. A source region is formed in the substrate laterally between the first and second floating gates. First and second channel regions extend from the source region, under the first and second trenches respectively, along side walls of the first and second trenches respectively, and along portions of the upper surface disposed under the first and second word line gates respectively. The first and second trenches only contain the first and second floating gates and insulation material respectively.
US10879249B2	Semiconductor memory device A semiconductor memory device includes a transistor having a gate, a source and a drain and a metal-insulator-semiconductor (MIS) structure. The transistor and the MIS structure are disposed on a common substrate. The MIS structure includes a dielectric layer disposed on a semiconductor region, and an electrode electrically disposed on the dielectric layer and coupled to the drain of the transistor. The electrode includes a bulk portion and a high-resistance portion, both disposed on the dielectric layer. The high-resistance portion has a resistance value in a range from 1.0×10−4 Ωcm to 1.0×104 Ωcm or a sheet resistance in a range from 1.0×102Ω/□ to 1.0×1010Ω/□.
US10879244B2	Integrated circuit device An integrated circuit device is provided. The integrated circuit device includes a fin-type active region that extends in a first direction on a substrate, a gate structure that intersects with the fin-type active region and extends in a second direction, perpendicular to the first direction, on the substrate, and a first contact structure that is disposed on the gate structure, and has a greater width at a top surface than a bottom surface thereof.
US10879243B2	Semiconductor device and method for manufacturing the same A semiconductor device includes a first fin, a first gate electrode, a second fin, a second gate electrode, and a first dielectric capping layer. The first fin extends along a direction. The first gate electrode is across the first fin and has a first notched corner. The second fin extends along the direction. The second gate electrode is across the second fin and has a second notched corner. The first dielectric capping layer has a first portion in between the first notched corner and the second notched corner.
US10879238B2	Negative capacitance finFET and method of fabricating thereof Devices and methods of forming a FET including a substrate having a first fin and a second fin extending therefrom. A high-k gate dielectric layer and a ferroelectric insulator layer are deposited over the first fin and the second fin. In some embodiments, a dummy gate layer is deposited over the ferroelectric insulator layer over the first fin and the second fin to form a first gate stack over the first fin and a second gate stack over the second fin. The dummy gate layer of the first gate stack is then removed (while maintaining the ferroelectric insulator layer) to form a first trench. And the dummy gate layer and the ferroelectric insulator layer of the second gate stack are removed to form a second trench. At least one metal gate layer is formed in the first trench and the second trench.
US10879237B2	Semiconductor device and method of manufacturing the same A semiconductor device includes a first active structure on a substrate including a first epitaxial pattern, a second epitaxial pattern and a first channel pattern between the first epitaxial pattern and the second epitaxial pattern, the first channel pattern including at least one channel pattern stacked on the substrate. A first gate structure is disposed on top and bottom surfaces of the first channel pattern. A second active structure on the substrate and includes the second epitaxial pattern, a third epitaxial pattern and a second channel pattern between the second epitaxial pattern and the third epitaxial pattern in the first direction. The second channel pattern includes at least one channel pattern stacked on the substrate. The number of stacked second channel patterns is greater than the number of stacked first channel patterns. A second gate structure is disposed on top and bottom surfaces of the second channel pattern.
US10879234B2	Vertical noise reduction in 3D stacked semiconductor devices A stacked three dimensional semiconductor device includes multiple thin substrates stacked over one another and over a base substrate. The thin substrates may include a thickness of about 0.1 μm. In some embodiments, a noise suppression tier is vertically interposed between active device tiers. In some embodiments, each tier includes active device portions and noise suppression portions and the tiers are arranged such that noise suppression portions are vertically interposed between active device portions. The noise suppression portions include decoupling capacitors in a power/ground mesh and alleviate vertical noise.
US10879229B2	Integrated circuit, system for and method of forming an integrated circuit A method of forming an integrated circuit structure includes placing a tap cell layout pattern on a layout level, placing a set of standard cell layout patterns adjacent to the tap cell layout pattern, and manufacturing the integrated circuit structure based on at least one of the layout patterns. The placing the first well layout pattern includes placing a first layout pattern extending in a first direction and having a first width, placing a second layout pattern adjacent to the first layout pattern, and having a second width greater than the first width, and placing a first implant layout pattern on a second layout level, extending in the first direction, overlapping the first layout pattern and having a third width greater than the first width.
US10879228B2	Packaging mechanisms for dies with different sizes of connectors A semiconductor package includes a package substrate. A redistribution structure is bonded to the package substrate. A bottommost surface of the redistribution structure is lower than a topmost surface of the package substrate. A conductive connector electrically couples the redistribution structure to the package substrate. The conductive connector physically contacts a sidewall of the redistribution structure. A first integrated circuit die is bonded to the redistribution structure through first bonding structures and is bonded to the package substrate through second bonding structures. The first bonding structures and the second bonding structures have different sizes.
US10879226B2	Stacked dies and methods for forming bonded structures In various embodiments, a method for forming a bonded structure is disclosed. The method can comprise mounting a first integrated device die to a carrier. After mounting, the first integrated device die can be thinned. The method can include providing a first layer on an exposed surface of the first integrated device die. At least a portion of the first layer can be removed. A second integrated device die can be directly bonded to the first integrated device die without an intervening adhesive.
US10879223B2	Display including nanoscale LED module Provided is a display including a very-small light-emitting diode (LED) and a method of manufacturing the same. The display includes a panel in which first and second signal lines are disposed in a lattice form, an LED module including an electrode assembly having a first electrode connected to the first signal line, a second electrode connected to a ground, and a plurality of very-small LEDs connected to the first and second electrodes, and two or more switches which connect the first and second electrodes to the first signal line, wherein the second electrode is connected to a common electrode formed on the panel, at least one other LED module is grounded to the common electrode, and the two or more switches selectively provide a current supplied through the first signal line to the first electrode on the basis of a signal of the first and second signal lines.
US10879217B1	Multi-color LED pixel unit and micro-LED display panel A multi-color light emitting pixel unit includes a first type of light emitting transistor formed on a substrate and including a first segment of a first metal layer and a first segment of a first type of light emitting layer in an order from bottom to top, and a second type of light emitting transistor formed on the substrate and including a second segment of the first metal layer, a second segment of the first type of light emitting layer, a first segment of a second metal layer, a first segment of a second type of light emitting layer in an order from bottom to top, and a first electrical connector connecting the second segment of the first metal layer and the first segment of the second metal layer.
US10879212B2	Processed stacked dies Representative implementations of techniques and methods include processing singulated dies in preparation for bonding. A plurality of semiconductor die components may be singulated from a wafer component, the semiconductor die components each having a substantially planar surface. Particles and shards of material may be removed from edges of the plurality of semiconductor die component. Additionally, one or more of the plurality of semiconductor die components may be bonded to a prepared bonding surface, via the substantially planar surface.
US10879208B2	Chip-on-film and method of manufacturing the same A chip-on-film includes an insulating film including a bonding region for bonding to an external device, a plurality of interconnections disposed on the insulating film and partially extending into the bonding region, and an integrated circuit (IC) chip disposed on the insulating film so as to be electrically connected to the plurality of interconnections. The chip-on-film further includes a solder resist disposed so as to cover the insulating film excluding the bonding region and so as to cover the plurality of interconnections excluding portions extending into the bonding region, and a stepped portion located between the bonding region and the solder resist. The stepped portion forms a boundary against a flow of the solder resist into the bonding region.
US10879206B1	Semiconductor structure and method for forming the same A semiconductor structure includes a first substrate including a die region and a scribe line region adjacent to the die region, a through substrate via disposed in the first substrate in the scribe line region, a first connecting structure disposed over the first substrate in the die region, a second connecting structure disposed over the first substrate in the scribe line region and coupled to the through substrate via, a first bonding structure disposed over the first substrate in the die region and coupled to the first connecting structure, and a second bonding structure disposed over the first substrate in the scribe line region and coupled to the second connecting structure. The through substrate via, the second connecting structure and the second bonding structure are physically and electrically separated from the first connecting structure and the first bonding structure.
US10879205B2	Method of manufacturing semiconductor device A method of manufacturing a semiconductor device includes: applying a bonding resin composition on a semiconductor chip supporting member, the bonding resin composition containing a thermosetting resin and silver microparticles having an average particle size of 10 to 200 nm, the silver microparticles having a protective layer made of an organic compound on surfaces thereof; a semi-sintering step of heating the applied bonding resin composition at a temperature that is lower than a reaction starting temperature of the thermosetting resin and is equal to or more than 50° C. to bring the silver microparticles into a semi-sintered state; and a bonding step including: placing a semiconductor chip on the bonding resin composition containing the silver microparticles in a semi-sintered state, heating at a temperature higher than the reaction starting temperature of the thermosetting resin in a pressure-free state, and bonding the semiconductor chip to the semiconductor chip supporting member.
US10879203B2	Stud bump structure for semiconductor package assemblies A semiconductor package structure comprises a substrate, a die bonded to the substrate, and one or more stud bump structures connecting the die to the substrate, wherein each of the stud bump structures having a stud bump and a solder ball encapsulating the stud bump to enhance thermal dissipation and reduce high stress concentrations in the semiconductor package structure.
US10879201B2	Semiconductor package for wafer level packaging and manufacturing method thereof A semiconductor package includes a semiconductor die and a connection structure. The semiconductor die is laterally encapsulated by an insulating encapsulant. The connection structure is disposed on the semiconductor die, the connection structure is electrically connected to the semiconductor die, and the connection structure includes at least one first via, first pad structures, second vias, a second pad structure and a conductive terminal. The at least one first via is disposed over and electrically connected to the semiconductor die. The first pad structures are disposed over the at least one first via, wherein the at least one first via contacts at least one of the first pad structures. The second vias are disposed over the first pad structures, wherein the second vias contact the first pad structures. The second pad structure is disposed over and contacts the second vias, wherein a vertical projection of each of first pad structures overlaps with a vertical projection of the second pad structure, and an overall area of the vertical projections of the first pad structures is smaller than an area of the vertical projection of the second pad structure. The conductive terminal is disposed over and connects with the second pad structure.
US10879200B2	Sidewall spacer to reduce bond pad necking and/or redistribution layer necking In some embodiments, an integrated chip (IC) is provided. The IC includes a metallization structure disposed over a semiconductor substrate, where the metallization structure includes an interconnect structure disposed in an interlayer dielectric (ILD) structure. A passivation layer is disposed over the metallization structure, where an upper surface of the interconnect structure is at least partially disposed between opposite inner sidewalls of the passivation layer. A sidewall spacer is disposed along the opposite inner sidewalls of the passivation layer, where the sidewall spacer has rounded sidewalls. A conductive structure is disposed on the passivation layer, the rounded sidewalls of the sidewall spacer, and the upper surface of the interconnect structure.
US10879197B2	Package structure and method of fabricating package structure A package structure in accordance with some embodiments may include an RFIC chip, a redistribution circuit structure, a backside redistribution circuit structure, an isolation film, a die attach film, and an insulating encapsulation. The redistribution circuit structure and the backside redistribution circuit structure are disposed at two opposite sides of the RFIC chip and electrically connected to the RFIC chip. The isolation film is disposed between the backside redistribution circuit structure and the RFIC chip. The die attach film is disposed between the RFIC chip and the isolation film. The insulating encapsulation encapsulates the RFIC chip and the isolation film between the redistribution circuit structure and the backside redistribution circuit structure. The isolation film may have a coefficient of thermal expansion lower than the insulating encapsulation and the die attach film.
US10879193B2	Circuit systems Various circuit board systems and methods of use and manufacture thereof are disclosed. A circuit board system can have a first circuit board including a substrate and a first component susceptible to electromagnetic interference carried by the substrate. The system can also include a second circuit board including a second substrate, and a shield engaged to the substrate of the first component, the shield at least partially covering the first component and being configured to protect the first component from electromagnetic interference, wherein the shield couples the substrate of the first circuit board to the substrate of the second circuit board.
US10879192B1	Semiconductor structure and manufacturing method thereof A semiconductor structure and a manufacturing method thereof are provided. A semiconductor structure includes a first semiconductor die, an insulating encapsulation laterally encapsulating the first semiconductor die, an electromagnetic shielding structure enclosing the first semiconductor die and a first portion of the insulating encapsulation, and a redistribution structure. The electromagnetic shielding structure includes a first conductive layer and a dielectric frame laterally covering the first conductive layer. The first conductive layer surrounds the first portion of the insulating encapsulation and extends to cover a first side of the first semiconductor die. The dielectric frame includes a first surface substantially leveled with the first conductive layer. The redistribution structure is disposed on a second side of the first semiconductor die opposing to the first side, and the redistribution structure is electrically coupled to the first semiconductor die and the first conductive layer of the electromagnetic shielding structure.
US10879191B2	Conformal shielding for solder ball array An RF/EMI shield has a substrate, a plurality of solder balls on a first side of the substrate, and a plurality of wire-bonds on a periphery of the first side of the substrate to form a shield which can be soldered in a surface mount process directly around components needing shielding. Each of the plurality of wire-bonds has a width selected as a fraction of the wavelength of interest.
US10879189B2	Semiconductor device and method for manufacturing the same A semiconductor device includes a semiconductor chip having an active surface having connection pads disposed thereon; an encapsulant encapsulating at least portions of the semiconductor chip, a connection member disposed on the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads, a passivation layer disposed on the connection member, and an under bump metallurgy (UBM) layer embedded in the passivation layer and electrically connected to the redistribution layer of the connection member. The UBM layer includes a UBM pad embedded in the passivation layer and having a recess portion, and a UBM via penetrating through a portion of the passivation layer and electrically connecting the redistribution layer of the connection member and the UBM pad to each other.
US10879187B2	Semiconductor package and method of fabricating the same A method of fabricating a semiconductor package includes forming a capping pattern on a chip pad of a semiconductor device. The semiconductor device includes a passivation pattern that exposes a portion of the chip pad, and the capping pattern covers the chip pad. The method further includes forming a redistribution layer on the capping pattern. Forming the redistribution layer includes forming a first insulation pattern on the capping pattern and the passivation pattern, forming a first opening in the first insulation pattern by performing exposure and development processes on the first insulation pattern, in which the first opening exposes a portion of the capping pattern, and forming a redistribution pattern in the first opening.
US10879184B2	Electronic device mounting board, electronic package, and electronic module In one aspect of this disclosure, an electronic device mounting board includes a substrate having a first surface and a second surface opposite to the first surface. The substrate has a first recess located on the first surface and a second recess located on the second surface. The substrate includes an electrode pad. The electrode pad is located in the first recess. The second recess in the substrate contains a reinforcement dividing the second recess into a plurality of recesses. The reinforcement is located separate from the electrode pad or is located to overlap the electrode pad in a plan view.
US10879183B2	Semiconductor device and method of manufacture A device includes a redistribution structure, a semiconductor device on the redistribution structure, a top package over the semiconductor device, the top package including a second semiconductor device, a molding compound interposed between the redistribution structure and the top package, a set of through vias between and electrically connecting the top package to the redistribution structure, and an interconnect structure disposed within the molding compound and electrically connecting the top package to the redistribution structure, the interconnect structure including a substrate and a passive device formed in the substrate, wherein the interconnect structure is free of active devices.
US10879182B2	Assembly substrates including through hole vias and methods for making such Various embodiments are related to substrates having one or more well structures with a trapezoidal cylinder shaped through hole via extending from the bottom of the well structure though the substrate.
US10879179B2	Semiconductor device and manufacturing method thereof In a method for manufacturing a semiconductor device, a first dielectric layer is formed over a substrate, first recesses are formed in the first dielectric layer. Metal wirings extending is a first direction are formed in the first recesses. A mask layer is formed over the metal wirings and the first dielectric layer, which includes a first opening extending in the first direction and is located above a space between adjacent two metal wirings. A first groove corresponding to the first opening is formed between the adjacent two metal wirings by etching the first dielectric layer using the mask layer as an etching mask. A second dielectric layer is formed so that a first air gap is formed in the first groove. A width of the first opening in a perpendicular direction to the first direction is smaller than a space between the adjacent two metal wirings.
US10879171B2	Vertically oriented metal silicide containing e-fuse device One illustrative integrated circuit product disclosed herein includes a vertically oriented semiconductor (VOS) structure positioned above a semiconductor substrate, a conductive silicide vertically oriented e-fuse positioned along at least a portion of a vertical height of the VOS structure wherein the conductive silicide vertically oriented e-fuse comprises a metal silicide material that extends through at least a portion of an entire lateral width of the VOS structure, and a conductive metal silicide region in the semiconductor substrate that is conductively coupled to the conductive silicide vertically oriented e-fuse.
US10879170B2	Semiconductor package and manufacturing method thereof A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a semiconductor die, a molding compound, a polymer layer, a conductive trace, a conductive via and an inductor. The semiconductor die is laterally surrounded by the molding compound. The polymer layer covers the semiconductor die and the molding compound. The conductive trace, the conductive via and the inductor are embedded in the polymer layer. The conductive via extends from a top surface of the conductive trace to a top surface of the polymer layer. The inductor has a body portion extending horizontally and a protruding portion protruded from the body portion. A total height of the body and protruding portions is substantially equal to a sum of a thickness of the conductive trace and a height of the conductive via. The height of the body portion is greater than the thickness of the conductive trace.
US10879169B2	Integrated inductors for power management circuits A power supply package is disclosed, including a power management integrated circuit (PMIC) die with a plurality of switching circuits, and a plurality of integrated 3-dimensional (3D) inductors disposed around the PMIC die. Each 3D inductor corresponds to a switching circuit and is electrically coupled to first and second connections for the corresponding switching circuit. An integrated electromagnetic interference (EMI) shield is disposed between the PMIC and the 3D inductors.
US10879168B2	Transistor with non-circular via connections in two orientations A transistor includes an active region bounded by an outer periphery and formed in a substrate. The active region includes sets of input fingers, output fingers, and common fingers disposed within the substrate and oriented substantially parallel to one another. The transistor further includes an input port, an output port, a first via connection disposed at the outer periphery of the active region proximate the input port and a second via connection disposed at the outer periphery of the active region proximate the output port. The second via connection has a noncircular cross-section with a second major axis and a second minor axis, the second major axis having a second major axis length, the second minor axis having a second minor axis length that is less than the second major axis length. The second major axis is oriented parallel to a longitudinal dimension of the input, output, and common fingers.
US10879165B2	Semiconductor device and method for manufacturing semiconductor device with low-permittivity layers A semiconductor device in which the generation of a distortion of a signal is suppressed, and a method for manufacturing the semiconductor device are disclosed. The semiconductor device includes a transistor region in which a field effect transistor is provided; and an interconnection region in which a metal layer electrically connected to the field effect transistor is provided. The interconnection region includes an insulating layer provided between the metal layer and a substrate, and a low-permittivity layer provided in the insulating layer below the metal layer and having a lower permittivity than the insulating layer.
US10879159B2	Substrate, semiconductor package thereof and process of making same A substrate, a semiconductor package thereof and a process of making the same are provided. The substrate comprises an upper circuit layer and a lower circuit layer, the upper circuit layer comprising at least one trace and at least one pad and the lower circuit layer comprising at least one trace and at least one pad, wherein the trace of the upper circuit layer and the trace of the lower circuit layer are not aligned.
US10879154B2	Flippable leadframe for packaged electronic system having vertically stacked chips and components A leadframe (100) for electronic systems comprising a first sub-leadframe (110) connected by links (150) to a second sub-leadframe (120), the first and second sub-leadframe connected by tiebars (111, 121) to a frame (130); and each link having a neck (151) suitable for bending the link, the necks arrayed in a line (170) operable as the axis for bending the second sub-leadframe towards the first sub-leadframe with the necks operable as rotation pivots.
US10879143B2	Method of manufacturing semiconductor devices, corresponding device and circuit A method of manufacturing semiconductor devices includes providing one or more semiconductor chips having a surface with electrical contact pads and a package mass encapsulating the semiconductor chip. The package mass includes a recessed portion leaving the semiconductor chip surface with the contact pads exposed, the recessed portion having a peripheral wall extending from the surface of the semiconductor chip to the outer surface of the package mass. Electrically-conductive formations are provided extending over the peripheral wall of the recessed portion with proximal ends electrically coupled with the contact pads of the semiconductor chip and distal ends at the outer surface of the package mass. The recessed portion is filled with a further package mass by leaving the distal ends of the electrically-conductive formations uncovered.
US10879142B2	Electronic component An electronic component includes a board, a surface mount device, a nonmagnetic resin layer, a metal shield layer, and a magnetic shield layer. The board includes first and second principal surfaces facing each other, and a magnetic body layer. The surface mount device is mounted on the first principal surface of the board. The nonmagnetic resin layer covers the surface mount device. The metal shield layer covers the nonmagnetic resin layer. The magnetic shield layer covers an entire or substantially an entire surface of the metal shield layer.
US10879138B1	Semiconductor packaging structure including interconnection to probe pad with probe mark and method of manufacturing the same Provided is a semiconductor structure including a substrate, an interconnect structure, a pad, a protective layer, and a bonding structure. The interconnect structure is disposed over the substrate. The pad is disposed over and electrically connected to the interconnect structure. A top surface of the pad has a probe mark and the probe mark has a concave surface. The protective layer conformally covers the top surface of the pad and the probe mark. The bonding structure is disposed over the protective layer. The bonding structure includes a bonding dielectric layer and a first bonding metal layer penetrating the bonding dielectric layer and the protective layer to electrically connect to the pad. A method of manufacturing the semiconductor structure is also provided.
US10879135B2	Overlay error and process window metrology A method for inline inspection during semiconductor wafer fabrication is provided. The method includes forming a plurality of test structures on a semiconductor wafer along two opposite directions. An offset distance between a sample feature and a target feature of each of the test structures increases gradually along the two opposite directions. The method further includes producing an image of the test structures. The method also includes performing image analysis of the image to recognize a position with an extreme of a gray level. In addition, the method includes calculating an overlay error according to the recognized position.
US10879134B2	Techniques for monolithic co-integration of silicon and III-N semiconductor transistors Techniques are disclosed for monolithic co-integration of silicon (Si)-based transistor devices and III-N semiconductor-based transistor devices over a commonly shared semiconductor substrate. In accordance with some embodiments, the disclosed techniques may be used to provide a silicon-on-insulator (SOI) or other semiconductor-on-insulator structure including: (1) a Si (111) surface available for formation of III-N-based n-channel devices; and (2) a Si (100) surface available for formation of Si-based p-channel devices, n-channel devices, or both. Further processing may be performed, in accordance with some embodiments, to provide n-channel and p-channel devices over the Si (111) and Si (100) surfaces, as desired. In accordance with some embodiments, the disclosed techniques may be used to provide co-integrated III-N-based n-type metal-oxide-semiconductor (NMOS) devices and Si-based p-type metal-oxide-semiconductor (PMOS), NMOS, or complementary MOS (CMOS) devices with different step heights or with a given degree of co-planarity, as desired for a given target application or end-use.
US10879121B2	Sawn leadless package having wettable flank leads A method of forming a leadless packaged semiconductor device. First partial sawing leads is performed on a bottom side of an in-process leadless semiconductor package having a leadframe including die pad with a semiconductor chip thereon, and leads defining top and bottom surfaces and having an inner end and an outer end having a bottom corner region. Conductive bond wires connect to and extending between bond pads on the chip and respective leads, a mold compound is around the die pad, leads, chip, and conductive bond wires while exposing the bottom surface and outer end. The first sawing completely severs the leads while forming only a partial cut in the mold compound. A de-flash process is applied to the bottom side. The second sawing aligned to the partial cuts reaches the partial cuts to complete singulation of the package, wherein the second sawing does not touch the leads.
US10879116B2	Method for copper plating through silicon vias using wet wafer back contact A method and apparatus for processing a substrate are provided. In some implementations, the method comprises providing a silicon substrate having an aperture containing an exposed silicon contact surface at a bottom of the aperture, depositing a metal seed layer on the exposed silicon contact surface and exposing the substrate to an electroplating process by flowing a current through a backside of the substrate to form a metal layer on the metal seed layer.
US10879114B1	Conductive fill A conductive fill is provided in an opening of an interconnect layer. A seed layer is formed, a portion of which is then oxidized. The oxygen is removed in a treatment process and the surface of the de-oxidized seed layer is hydrolyzed to form a hydroxyl sublayer and moisturized. The conductive fill is formed over the hydroxyl sublayer.
US10879111B1	Dielectric plugs A method according to some embodiments of the present disclosure includes providing a workpiece that include an opening and a top surface, depositing a dielectric material over the workpiece and into the opening to form a first dielectric layer that has a top portion over the top surface and a plug portion in the opening, treating the first dielectric layer to convert top portion into a second dielectric layer different from the first dielectric layer, and selectively removing the second dielectric layer.
US10879110B2	FinFET structure with controlled air gaps The present disclosure provides an integrated circuit (IC) structure. The IC structure includes first and second fins formed on a semiconductor substrate and laterally separated from each other by an isolation feature, the isolation feature formed of a dielectric material that physically contacts the semiconductor substrate; and a contact feature between the first and second fins and extending into the isolation feature thereby defining an air gap vertically between the isolation feature and the contact feature, the dielectric material of the isolation feature extending from the semiconductor substrate to the contact feature.
US10879106B2	Apparatus with overlapping deep trench and shallow trench and method of fabricating the same with low defect density A method for fabricating conductive deep trenches in conjunction with shallow trench isolations in a semiconductor device. The disclosed method introduces an integrated sequence during which a shallow trench is etched and filled before a deep trench is etched and filled. The disclosed method advantageously reduces cone defects and process complexity associated with the formation of a conductive deep trench within a shallow trench isolation structure. Fabricated under the integrated sequence, the conductive deep trench may extend through a shallow trench dielectric layer and into the substrate, where the top surfaces of both the conductive deep trench and shallow trench dielectric layer are substantially cone free.
US10879101B2	Process apparatus with on-the-fly substrate centering A substrate processing apparatus including a frame defining a chamber with a substrate transport opening and a substrate transfer plane defined therein, a valve mounted to the frame and being configured to seal an atmosphere of the chamber when closed, the valve having a door movably disposed to open and close the substrate transport opening, and at least one substrate sensor element disposed on a side of the door and oriented to sense substrates located on the substrate transfer plane.
US10879098B2	Semiconductor chip holder The various embodiments provide a semiconductor chip holder that holds semiconductor chips. The chip holder protects the semiconductor chips from possible damage during transport and/or storage. The chip holder is flexible and may be wound around a reel for convenient transport and storage. In one embodiment, the chip holder includes a support substrate with receptacles that receive semiconductor chips, a cover layer that seals the receptacles and holds the semiconductor chips within the receptacles, and plugs to securely couple the support substrate and the cover layer together.
US10879092B2	Fault detection using showerhead voltage variation A plasma processing system having a plurality of stations is provided. Each station has a substrate support and a showerhead for supplying process gases. A radio frequency (RF) power supply and a distribution system is provided, where the distribution system is coupled to the RF power supply. A plurality of voltage probes is provided. Each of the plurality of voltage probes is connected in-line between the distribution system and each showerhead of each of the stations. A controller is configured to receive sensed voltage values from each of the plurality of voltage probes and compare the sensed voltage values against a plurality of voltage check bands. Each voltage check band is predefined for a process operation, and the controller is configured to generate an alert when the comparing detects that a sensed voltage value is outside of a voltage check band. The alert is configured to identify a type of fault based on the voltage check band and identify a specific one of the plurality of stations having said type of fault.

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