| Document | Document Title |
|---|---|
| US10326815B2 |
Techniques for scalably sharing video through a streaming server
Techniques are provided for a source computer to generate an encoded video stream having layered sub-streams with differing bitrates while allowing a streaming server to intelligently distribute the appropriate sub-streams to recipients based on their available bandwidth. This may be accomplished by having the source computer generate and send metadata along with the encoded stream to allow the streaming server to detect which data packets belong to each sub-stream. The streaming server is then able to selectively send consistent video sub-streams at appropriate bitrates to each recipient. |
| US10326813B2 |
Processing of live multimedia content and/or data streams over a communication network
A method and associated device for streaming multimedia data over a communication network. Data associated with live multimedia content is received. Portions of the data are processed into data chunks. Each data chunk is associated with the live multimedia content. A request is received for the live multimedia content. The data chunks associated with the live multimedia content are transmitted over the communication network, in response to the request for the live multimedia content. |
| US10326811B2 |
Communication apparatus, communication data generation method, and communication data processing method
It is possible to transmit and receive packets to which additional information applied for deciding a processing order of storage data of communication packets is set and determine a process order in units of packets. A transmission apparatus generates a packet storing NAL units configuring a group of pictures (GOP) serving as a processing unit of encoded data or NAL unit fragments obtained by dividing the NAL unit, sets additional information applied for deciding a processing order of packet storage data as additional packet information, and transmits the resulting packet through a communication unit. A reception apparatus determines a processing priority of packet storage data with reference to the additional packet information, decides the processing order, and performs a process of decoding packet storage data according to the decided order. |
| US10326796B1 |
Dynamic security mechanisms for mixed networks
Provided are methods, including computer-implemented methods or methods implemented by a network device, devices including network devices, and computer-program products for providing dynamic security mechanisms for mixed networks. A mixed network can include an IoT type device and a non-IoT device. Using a configuration of the network, a deception device type can be determined. A second network that includes a deception mechanism corresponding to the deception device type can be determined. A network tunnel from the mixed network to the second network can be configured. The network tunnel enables the deception mechanism to be a node on the mixed network, such that the deception mechanism can be accessed from the mixed network. The deception mechanism can be used to monitor the mixed network for network abnormalities. An action can be taken when the deception mechanism detects an abnormality. |
| US10326788B1 |
Systems and methods for identifying suspicious controller area network messages
The disclosed computer-implemented method for identifying suspicious controller area network messages may include (i) monitoring, for a predetermined period of time, messages sent by an electronic control unit that comprise a controller area network identifier for at least one controller area network device, (ii) observing, in the messages, a set of corresponding patterns that each comprise a content pattern and a timing pattern, (v) detecting a message that comprises the controller area network identifier, wherein a content pattern of the message and a timing pattern of the message do not match any pair of corresponding patterns in the set of corresponding patterns, and (vi) determining that the message is suspicious based at least in part on content pattern of the message and the timing pattern of the message not matching any pair of corresponding patterns in the set. Various other methods, systems, and computer-readable media are also disclosed. |
| US10326777B2 |
Integrated data traffic monitoring system
The present invention includes an integrated data traffic monitoring system monitoring data traffic received from a communication network and destined for a protected network. The monitoring system includes a security appliance and one or more security and monitoring technologies such as hardware and open source and proprietary software products. The security appliance and the security and monitoring technologies may be implemented as separate and distinct modules or combined into a single security appliance. The security and monitoring technologies monitor network data traffic on, or directed to, the protected network. The monitoring system collects data from each of the technologies into an event database and, based on the data, automatically generates rules directing one or more of the technologies to prevent subsequent communications traffic from specific sources from entering the protected network. |
| US10326776B2 |
User behavior profile including temporal detail corresponding to user interaction
A system, method, and computer-usable medium are disclosed for generating a cyber behavior profile comprising monitoring user interactions between a user and an information handling system; converting the user interactions into electronic information representing the user interactions, the electronic information representing the user interactions comprising temporal detail corresponding to the user interaction; and generating a user behavior profile based upon the electronic information representing the user interactions, the generating the user profile including a layer of detail corresponding to the temporal detail corresponding to the user interaction. |
| US10326775B2 |
Multi-factor authentication using a user behavior profile as a factor
A system, method, and computer-usable medium are disclosed for performing a multi-factor authentication operation, comprising: monitoring electronically-observable user behavior; converting the electronically-observable user behavior into electronic information representing the electronically-observable user behavior; generating a user behavior factor based upon the electronic information representing the electronically-observable user behavior; and, using the user behavior factor as a factor of a multi-factor authentication. |
| US10326772B2 |
Systems and methods for anonymizing log entries
The disclosed computer-implemented method for anonymizing log entries may include (1) detecting a data pattern in a group of log entries documenting events performed by at least one process executing on at least one device, (2) identifying, in the data pattern, at least one data field in the log entries that contains variable data, (3) evaluating the data field containing variable data to determine whether the data field contains sensitive data, and (4) in response to determining whether the data field contains sensitive data, applying a data-anonymization policy to the data field to anonymize the log entries. Various other methods, systems, and computer-readable media are also disclosed. |
| US10326769B2 |
Extensible multi-tenant cloud-management system and methods for extending functionalities and services provided by multi-tenant cloud-management system
The current document is directed to an interface and authorization service that allows users of a cloud-director management subsystem of distributed, multi-tenant, virtual data centers to extend the services and functionalities provided by the cloud-director management subsystem. A cloud application programming interface (“API”) entrypoint represents a request/response RESTful interface to services and functionalities provided by the cloud-director management subsystem as well as to service extensions provided by users. The cloud API entrypoint includes a service-extension interface and an authorization-service management interface. The cloud-director management subsystem provides the authorization service to service extensions that allow the service extensions to obtain, from the authorization service, an indication of whether or not a request directed to the service extension through the cloud API entrypoint is authorized. |
| US10326766B2 |
Method and apparatus for optimizing mobile edge computing for nomadic computing capabilities as a service
A system and method for operating an edge compute advisory system comprising a network adapter to receive a compute work request from a client device seeking edge computing resources of a mobile edge computing system, wherein the compute work request includes processing resource requirements to meet the compute work request. A processor to determine a plurality of mobile edge computing systems within a neighborhood range of an estimated client device location, and the network adapter to receive advertisement messages indicating availability of the plurality of mobile edge computing systems and including an address location for secured historical compute trust references for each advertising mobile edge computing system. The processor executing machine readable executable code instructions of the edge compute advisory system to access and receive the historical trust references for a plurality of candidate mobile edge computing resources accessible to the client device location, and determine an optimal candidate mobile edge computing resources partner from among the plurality of candidate mobile edge computing systems based on a minimal level of trust category or rating for the mobile edge computing system. |
| US10326760B2 |
Privacy controls for sensitive discussions
Privacy controls may be implemented using a configurable system of risk categorization for resources, physical security, sensitivity of discussion topics, prioritization of content, and identification of intended participants, by receiving participant profiles including biometric data from a plurality of participants and meeting criteria including an attendance requirement from an initiator of a meeting, scheduling a meeting based on the participant profiles and meeting criteria, generating biometric data by a biometric sensor located at meeting spaces for any participants that attend the meeting, comparing the generated biometric data to the biometric data of the participant profiles of participants identified by the attendance requirement, determining whether the generated biometric data matches the biometric data of the participant profiles of the participants identified by the attendance requirement, and transmitting a message to a computing device of the initiator indicating an outcome of the determination and ensuring enforcement of privacy controls. |
| US10326757B2 |
Technologies for enhancing computer security
A system including: at least one processor; and at least one memory, having stored thereon computer program code that, when executed by the at least one processor, controls the at least one processor to: receive a first sequence of values; segment the first sequence of values into a first subsequence having a first length and a second subsequence having a second length; modify the first subsequence by inserting one or more values into the first subsequence to create a modified first subsequence of a third length; modify the second subsequence by one or more inserting values into the second subsequence to create a modified second subsequence of the third length; combine the modified first subsequence and the modified second subsequence to create a second sequence of values; and output the second sequence of values. |
| US10326753B2 |
Authentication via revocable signatures
Methods, systems and computer program products are provided for authenticating a message via a revocable signature. The method includes, at a signing computer, generating first auxiliary data and second auxiliary data respectively dependent on a public key and a private key of a public-private key pair for the message. The signing computer hashes the message and the first auxiliary data via a chameleon hash algorithm, using a public hash key of a verifier computer, to produce a first hash value. The signing computer signs the first hash value, using a secret signing key of the signing computer, to produce a signature. The signing computer sends the message, the signature and the first auxiliary data to the verifier computer, and stores the second auxiliary data. |
| US10326750B2 |
Cloud queue playhead
An example implementation may involve a computing system receiving, from a media playback system over the network interface, a request to initiate playback of the particular cloud queue at a first media item. The computing system assigns a playhead pointer to a position within the particular cloud queue that corresponds to the first media item and transmits, to the media playback system over the network interface, an instruction that causes one or more playback devices of the media playback system to initiate playback of the particular cloud queue at the first media item. While the one or more playback devices play back the particular cloud queue, the computing system updates the assigned position of the playhead pointer to indicate the currently playing media item of the particular cloud queue. |
| US10326748B1 |
Systems and methods for event-based authentication
In one embodiment, a method is performed by a computer system. The method includes receiving a request to authenticate a user of an enterprise computing system. The method further includes, responsive to the request, selecting a set of previous user-initiated events of the user on the enterprise computing platform. Further, the method includes accessing user-specific event information related to the selected set of previous user-initiated events. In addition, the method includes generating, from at least a portion of the user-specific event information, a user-specific authentication sequence comprising a plurality of event-information requests. Additionally, the method includes administering the user-specific authentication sequence to the user, the administering comprising requiring the user to provide a valid response to each of the event-information requests as a precondition to successful authentication. |
| US10326747B2 |
System and method of providing media content
A method includes receiving, from a set-top box device, data that indicates selected media content from a list of available media content. The method includes locating one or more content sources for the selected media content. The method includes selecting a particular content source from the one or more content sources. The method includes locating an access rules source for the selected media content. The method includes instructing the particular content source to send the selected media content to the set-top box device. The method also includes instructing the access rules source to send an access rule associated with the selected media content to the set-top box device. |
| US10326744B1 |
Security layer for containers in multi-tenant environments
An apparatus comprises at least one container host device implementing containers for respective tenants of a multi-tenant environment. The containers are configured to utilize storage resources of at least one storage platform. A given one of the containers comprises at least one application, and an application file system security layer configured to communicate with the storage platform. The application file system security layer comprises a container storage volume supported by the storage platform, and an encryption engine configured to encrypt and decrypt data of the container storage volume utilizing one or more data encryption keys that are encrypted under a tenant-specific key encryption key. The tenant-specific key encryption key is provided to the application file system security layer by a tenant key manager that is external to the container. The tenant key manager is illustratively controlled by the tenant for which the given container is implemented. |
| US10326736B2 |
Feature-based classification of individual domain queries
In one embodiment, a device in a network determines a first set of domain generation algorithm (DGA) predictions for a particular domain name by analyzing one or more extracted lexical features of the particular domain name using a first ensemble of decision trees. The device determines a second set of DGA predictions for the particular domain name by analyzing one or more extracted cluster features of a cluster of related domain names to which the particular domain name belongs using a second ensemble of decision trees. The device predicts a DGA associated with the particular domain name based on the first and second sets of DGA predictions. The device causes performance of a security action based on the predicted DGA associated with the particular domain. |
| US10326734B2 |
Adaptive identity rights management system for regulatory compliance and privacy protection
Some embodiments are directed to managing transactions in a computer system, which receives information indicating a first node has at least one right with regard to a second node such that the first node is associated with the second node. An identity network is created, based, on the association between the first node and the second node, representing undirected ties between a plurality of nodes, the plurality of nodes including at least the first and second node. Using the identity network, a rights network is created representing directed ties between the plurality of nodes based, at least in part, on the undirected ties of the identity network and the at least one right the first node has with regard to the second node. The rights network is used to determine whether a transaction initiated by the first node is permissible based, at least in part, on the rights network. |
| US10326733B2 |
Systems and methods for facilitating single sign-on for multiple devices
The disclosed computer-implemented method for facilitating single sign-on for multiple devices may include (1) establishing a login session for a user account, (2) in response to establishing the login session, providing, to a device associated with the user account, a session token for the user account, (3) receiving, from at least one client, a request to access resources associated with the user account, (4) determining that the associated device possesses the session token for the user account, and (5) in response to determining that the associated device possesses the session token, providing, to the client, access to the resources associated with the user account. Various other methods, systems, and computer-readable media are also disclosed. |
| US10326732B1 |
Automation system with address generation
An automation system can generate a unique address for a newly connected device to optimize automated capabilities of the system. An automation system can have a first device connected to a host via a network where the first device has a processor. Connection of a second device to the host as part of the automation system prompts factory information from the second device to be imported with the processor r. A unique address is then generated for the second device with an address module of the processor based on the factory information. A first communication may be sent from the host to the second device using the unique address to allow at least one automated activity to be conducted with the second device in response to the first communication. |
| US10326731B2 |
Domain name service information propagation
A computing resource service receives a request from a customer to assign a domain name to a computing resource. The computing resource service may submit a query to a domain name system service to determine whether the domain name has been reserved for the customer. The domain name system service may provide an encrypted alias record corresponding to the requested domain name and specifying one or more identifiers of customers for whom the domain name has been reserved. The computing resource service may decrypt the alias record and determine whether the customer corresponds to one of the one or more identifiers within the alias record. If the customer does correspond to one of the one or more identifiers within the alias record, the computing resource service may assign the domain name to the computing resource. |
| US10326729B2 |
Intelligent social feed generator
An intelligent social feed generator system leverages existing social platforms to generate context specific social feeds having enhanced messages that facilitate context specific user actions. The system implements technical features that analyze messages on existing social platforms to determine a message context and identify responsive user actions. The system generates enhanced messages allowing the user to take such action. The system also dynamically generates an enhanced social feed based on a particular usage context, where the social feed is formed of messages that match the usage context. |
| US10326728B2 |
Origin-based consolidation of related content within social network posts
Multiple social network postings that originate from a single social network user are detected within a social network. The multiple social network postings that originate from the single social network user are analyzed using configured posting relationship identification criteria. Based upon the analysis of the multiple social network postings that originate from the single social network user using the configured posting relationship identification criteria, a determination is made that at least two of the multiple social network postings that originate from the single social network user include related content. The content of the at least two social network postings determined to include the related content is concatenated into a single consolidated social network post. |
| US10326726B1 |
Alert modification based on social media activity
An alert system and method may include receiving a notification message, identifying a content of the notification message, in response to receiving the notification message, analyzing a social media activity of the user to determine that the content of the notification message is relevant to the social media activity of the user, and alerting, by the processor, the user of the notification message in accordance with a modified alert preference. |
| US10326723B2 |
Method and system for disambiguated email notifications
A system comprises email processing circuitry of a mail transfer agent. The email processing circuitry is configured to receive an inbound email message, and detect, based on parsing of the inbound email message, that the inbound email message is intended for multiple recipients and comprises one or both of: a header which determines that notification objects are to be embedded in corresponding output email messages; and body content which determines that notification objects to be embedded in the corresponding output email messages. The email processing circuitry is configured to generate a plurality of unique notification objects. The email processing circuitry is configured to, in response to the detection, package the inbound email message into the outbound email messages, wherein each of the outbound email messages is intended for only one of the multiple recipients and comprises a respective one of the notification objects. |
| US10326721B2 |
Real-time messaging method and apparatus
A system and method for the late-binding of time-based media in real-time. With late binding, the sender may create time-based media before or at the same time an active delivery route to the recipient is discovered. As soon as the route becomes available, the media is transmitted. The existing DNS and email infrastructure is possibly used for route discovery, while any real-time transmission protocol may be used for the actual delivery of the media. “Progressive” emails may also be used for the real-time delivery of time-based media. |
| US10326719B2 |
Occasionally-connected computing interface
Described are computer-based methods and apparatuses, including computer program products, for allowing a user to switch between interfacing with a service through a network or through short message service (SMS). A chat service is executed through which a first user at a first computer can communicate directly with a second user at a second computer. A request is received from the first computer to enable the first user to interface with the chat service through a mobile device of the first user using SMS instead of through the network using the first computer. The chat service is configured to interface with the mobile device through SMS, including communicating chat information through SMS to the first user's mobile device, and communicating control information through SMS to the first user's mobile device such that the first user can control a full functionality of the chat service using SMS. |
| US10326716B2 |
Information processing device and information management device
An information processing device includes a communication unit that, if the order and time interval of an operation performed on a first device representing the information processing device, and an operation performed on a second device representing another information processing device match at least one predetermined pattern representing a predetermined order and a predetermined time interval, performs a communication associated with the predetermined pattern between the first device and the second device. |
| US10326713B2 |
Data enqueuing method, data dequeuing method, and queue management circuit
The disclosure describes a data enqueuing method. The method may include: receiving a to-be-enqueued data packet, dividing the data packet into several slices to obtain slice information of the slices, and marking a tail slice of the data packet with a tail slice identifier; enqueuing corresponding slice information according to an order of the slices in the data packet, and in a process of enqueuing the corresponding slice information, if a slice is marked with the tail slice identifier, determining that the slice is the tail slice of the data packet, and generating a first-type node; and determining whether a target queue is empty, and if the target queue is empty, writing slice information of the tail slice into the target queue, and updating a head pointer of a queue head list according to the first-type node. |
| US10326703B2 |
Dynamic initial congestion window modification
Some embodiments increase throughput across a connection between a host and a client by initializing the congestion window for that connection dynamically using a previously settled value from a prior instance of the connection established between the same or similar endpoints. An initialization agent tracks congestion window values for previously established connections between a host and various clients. For the tracked congestion window values of each monitored connection, the initialization agent stores an address identifying the client endpoint. When establishing a new connection, the initialization agent determines if the new connection is a recurring connection. A new connection is recurring when the new connection client address is similar or related to an address identified for a previous monitored connection. For a recurring connection, the initialization agent initializes the new connection congestion window using a value derived from the tracked congestion window values of the recurring connection. |
| US10326702B2 |
Data service levels
In one embodiment, a method includes sending a request for full-service data to a first Internet protocol (IP) address; determining that a successful response to the request for full-service data was not received; sending a request for limited data to a second IP address based on the determination that a successful response to the request for full-service data was not received; and receiving a successful response to the request for limited data. The limited data includes a subset of the full-service data. |
| US10326701B2 |
Intelligent selection of a designated forwarder and a master router for router redundancy
Techniques for intelligent designated forwarder (DF) and master router selection (for router redundancy) are provided. In one embodiment, a network router that is part of a set of network routers connected to a common LAN segment can retrieve a priority value adapted for use by the network router in electing a DF for multicast traffic. The network router can further check for the presence or absence of one or more routes to one or more multicast sources in a routing table of the network router. The network router can then modify the priority value based on the presence or the absence of the one or more routes and can transmit a multicast routing protocol control packet including the modified first priority value to one or more other network routers in the set of network routers. |
| US10326700B1 |
Hash based per subscriber DNS based traffic classification
Embodiments are directed towards managing name service communications using traffic management computers (TMCs). TMCs may extract values from a name service reply received from one or more name service computers. TMCs may provide a name service key based on the values extracted from the name service reply. Accordingly, if a new flow may be detected further actions may be performed, including: TMCs may extract values from a network packet associated with the new flow; TMCs may provide a flow key based on one or more values from one or more fields of a network packet associated with the new flow; TMCs may compare the flow key to one or more name service keys; and if the comparison may be affirmative, TMCs may apply one or more traffic management policies associated with the affirmative comparison. |
| US10326697B2 |
Storing data in association with a key within a hash table and retrieving the data from the hash table using the key
Computer-implemented methods and systems are provided for storing data in association with a key within a hash table and for retrieving the data from the hash table using the key. The hash table comprises a plurality of storage tables. Each of the storage tables is associated with a respective primary hashing function for determining which of a plurality of buckets of the storage table should be used for storing data associated with a particular key. Each of the buckets is configured to store a limited number of elements. Each element comprises respective stored data and a representation of the respective key associated with the stored data. Each of the storage tables is further associated with a respective secondary hashing function with which the representations of the keys of the elements of that storage table are generated. The secondary hashing function for each of the storage tables is the primary hashing function for at least one of the other storage tables. |
| US10326695B2 |
Ultra high-speed mobile network based on layer-2-switching
Ultra High-Speed Mobile Network based on Layer-2 Switching The present invention provides apparatuses, methods, computer programs, computer program products and computer-readable media regarding Ultra High-Speed Mobile Network based on Layer-2 Switching. Certain aspects of the present invention include receiving, at a first gateway, a data packet from a first host served by the first gateway destined to a second host served by a second gateway, the data packet having a header comprising a layer 3 destination address of the second host and a broadcast layer 2 destination address, searching, by the first gateway, a flow table stored in the first gateway for an identity of the second gateway associated with the layer 3 destination address of the second host, if the identity is found in the flow table, replacing the broadcast layer 2 destination address with the identity of the second gateway serving the second host, and transmitting the data packet to the second gateway. |
| US10326694B2 |
Asymmetric multi-destination traffic replication in overlay networks
Presented herein are hybrid approaches to multi-destination traffic forwarding in overlay networks that can be used to facilitate interoperability between head-end-replication-support network devices (i.e., those that only use head-end-replication) and multicast-support network devices (i.e., those that only use native multicast). By generally using existing tunnel end-points (TEPs) supported functionality for sending multi-destination traffic and enhancing the TEPs to receive multi-destination traffic with the encapsulation scheme they do not natively support, the presented methods and systems minimize the required enhancements to achieve interoperability and circumvents any hard limitations that the end-point hardware may have. The present methods and systems may be used with legacy hardware that are commissioned or deployed as well as new hardware that are configured with legacy protocols. |
| US10326693B2 |
Packet processing method and router
This application discloses a packet processing method and a Label Switching Router (LSR). The method includes receiving, by an Ingress LSR of a first Multiprotocol Label Switching (MPLS) tunnel, a first notification packet that is based on an IGP, where the first notification packet includes an Entropy Label Capability (ELC) flag indicating that the first Egress LSR has ELC. The method further includes, after learning from the first notification packet that the first Egress LSR has ELC, inserting a label into a first packet, to generate a second packet. The label forms an MPLS label stack, which includes, from bottom to top, a first EL, a first ELI, and a first TL. The method further includes sending the second packet to the first Egress LSR through the first MPLS tunnel. |
| US10326692B2 |
Apparatus and method for establishing a repair path
A communication network is configured to operate a remote Loop-Free Alternate (LFA) procedure. Prior to detecting a link failure or switchover event associated with a protected link within a current path between a source node and a destination node of the communication network, a Point of Local Repair (PLR) node is configured for the protected link, and a repair tunnel endpoint node is configured for the PLR node. In response to detecting a link failure or switchover event associated with the protected link, a repair path is established between the source node and the destination node. The repair path is routed via the repair tunnel endpoint node, and the route of the repair path excludes the PLR node and the protected link. |
| US10326690B2 |
Operating a network node configured as part of a link aggregation system
A system and method of operating a network node configured as part of a link aggregation system. The system includes a plurality of first network nodes and a plurality of second network nodes for providing connectivity to first and second networks respectively, and a plurality of links between the first network nodes and the second network nodes. The network node is configured as one of the first network nodes.The network node may be set in one of an active operation mode and a standby operation mode based at least in part on a comparison of a priority with one or more received priorities. The priority may be based on connectivity to an active second network node or links available for selection. The network node may determine that it is isolated from the first network and indicate that isolation in control messages sent to second network nodes. |
| US10326689B2 |
Method and system for providing alternative communication paths
Aspects of the subject disclosure may include, for example, detecting an issue associated with data communications between a first node and a second node of a distributed communications system, wherein the issue is related to a change in a condition between the first node and the second node. Locations of the first and second nodes are determined. An intermediary node is identified, based on the locations of the first and second nodes and the detecting of the issue, wherein equipment of the intermediary node is operable to engage in wireless communications with the first and second nodes, and a redirection of data communications is facilitated between the first and second nodes responsive to the detecting of the issue. The redirection of the data communications places the equipment of the intermediary node in communications between the first node and the second node. Other embodiments are disclosed. |
| US10326687B2 |
Method for remote node discovery and communication channel validation and connection
According to one embodiment, a method, computer system, and computer program product for computer networking is provided. The present invention may include a method of using media access control (MAC) multicast procedures to discover remote node addressability, and InfiniBand® (InfiniBand® and all InfiniBand® based trademarks and logos are trademarks or registered trademarks of System I/O, Incorporated and/or its affiliates) protocols to connect sets of queue pairs in implementing one or more communication channels, comprising preparing hardware to connect point-to-point links between a systems; discovering remote systems on the other side of the links through a discovery process; creating administrative traffic lanes; verifying the connection between nodes; initiating the auxiliary traffic flow interface; negotiating and connecting buffers; and exchanging node descriptors. |
| US10326686B2 |
Apparatus and method for testing installation of network equipment onboard locomotive
An apparatus for testing installation of a network equipment onboard a locomotive of a consist is disclosed. The apparatus includes a housing and a test network equipment is disposed within the housing. The test network equipment includes a first port to connect with an output port of the locomotive via a Multiple Unit (MU) cable. The apparatus includes a user interface to connect with a second port of the test network equipment. The test network equipment establishes a communication with the user interface based on a predefined attribute of the user interface. Upon establishing the communication between the test network equipment and the user interface, the user interface is configured to identify the network equipment, establish one or more communication routes with the network equipment, and determine a status of installation of the network equipment onboard the locomotive using the one or more communication routes. |
| US10326678B2 |
Method and apparatus for controlling power to an electrical load based on sensor data
A load-controlling interfacing device obtains and processes event data, for example, from a touch-screen user interface and/or other devices, and that processes rules based on the event data to control an electrical load, such as a light fixture. During operation, when the interfacing device obtains event data, the interfacing device selects a rule to process based on the event data from the touch-screen user interface. If the interfacing device determines that the rule's condition is satisfied, the interfacing device can process the rule's action description to perform a corresponding action for controlling power to the electrical load. |
| US10326674B2 |
Compressing trace data
Trace data are compressed by storing a compression table in a memory. The table corresponds to results of processing a set of training trace data using a table-driven compression algorithm. The trace data are compressed using the table according to the algorithm. The stored compression table is accessed read-only. The table can be determined by automatically processing a set of training trace data using the algorithm and transforming the compression table produced thereby into a lookup-efficient form. A network device includes a network interface, memory, and a processor that stores the table in the memory, compresses the trace data using the stored compression table according to the table-driven compression algorithm, the stored table being accessed read-only during the compressing, and transmits the compressed trace data via the network interface. |
| US10326673B2 |
Techniques for determining network topologies
In one embodiment, a monitoring device (or module) monitors messages exchanged between nodes in a communication network. The monitoring device further determines, based on time stamp data associated with each message, one or more latency distributions of paired response times between the nodes, and determines a node topology consistent with each of the one or more latency distributions of paired response times between the nodes. In some embodiments, the monitoring device also generates a graph of the node topology showing one or more communication links between the nodes, and annotates each communication link of the one or more communication links with at least one of a mean response time or a median response time based on at least one of the latency distributions. |
| US10326671B2 |
Federated mobile device management
In one example of federated mobile device management, a first management server federates with a second management server based on an exchange of one or more identity authentication certificates between them. After the first and second management servers have federated or affiliated, they can exchange mobile device management data, including compliance policies, rules, resources, etc., with each other. Based on a request from a client device for affiliated mobile device management, the first management server can request and receive device management data from the second management device. The first management server can evaluate the device management data received from the second management device for conformity with a baseline management policy. If it conforms, the first management server can use the device management data from the second management server, at least in part, to manage the client device. |
| US10326668B2 |
Portable and flexible deployment of servers
A method and system of portable and flexible deployment of dedicated and virtual servers. A user input of an order requesting the deployment of a dedicated or virtual server at a specified data center location is received at a user interface. A user input of a selection of a server image pertaining to the server to be deployed is received at a first screen at the user interface. A second screen is presented to the user at the user interface, which enables the user to select one or more geographic locations of two or more distinct geographic locations, from a menu displayed on the second screen, for storing and deploying the selected server image in a data center at each selected geographic location. The server is selected according to the user input of the selected server image. The selected server is deployed. |
| US10326660B2 |
Network virtualization apparatus and method
A network control system for managing a plurality of switching elements that implement a plurality of logical datapath sets. The network control system includes first and second controllers for generating requests for modifications to first and second logical datapath sets. The first controller is further for determining whether to make modifications to the first logical datapath set. The second controller is further for determining whether to make modifications to the second logical datapath set. Each controller is further for receiving logical control plane data that specifies logical datapath sets and for converting the logical control plane data to physical control plane data for propagating to the switching elements. |
| US10326658B2 |
Zone control system and method of automatically configuring the same
A zone control system includes a zone controller (ZC), an apparatus control node, and a sensor. The ZC includes a LAN structure template which records a network topology in a zone where the ZC is installed. The ZC executes calculations of correlation degree for adjacent apparatus control nodes and sensors, automatically connects to the highest correlation degree of the apparatus control nodes, and controls the connected apparatus control nodes to connect to the highest correlation degree of the sensors according to the calculation results and the LAN structure template. Accordingly, the ZC can automatically configure the LAN structure in the zone where the ZC is installed and establish a zone control system in the zone. |
| US10326657B1 |
Multi vendor device support in network management systems
In one example, a network management system (NMS) is configured to enable a target network device to support one more network services by generating a translation template to map a vendor neutral model to a device specific model. The NMS determines similarity scores between nodes in the vendor neutral model and nodes in the device specific model. Based on the similarity scores, the NMS generates a translation template from the vendor neutral model to the device specific model. Using the translation template, the NMS may configure the target network device to support the one or more network services. |
| US10326655B1 |
Infrastructure replication
Technology for capturing a configuration of an infrastructure to enable replication of the infrastructure is provided. In one example, a layout agent may be provided for deployment to an infrastructure, including a server, together with instructions for the layout agent to capture server layout data for the server and to communicate the server layout data to a replication application. The server layout data for the server may be received at the replication application. A system model for the infrastructure may be generated based on the server layout data from the layout agent. The replication of the infrastructure as a replicated infrastructure may be initiated based on the system model. |
| US10326650B2 |
Enforcing rules for bound services in a distributed network management system that uses a label-based policy model
Management instructions for a particular managed server within an administrative domain are generated according to an administrative domain-wide management policy that comprises a set of one or more rules. A bound service executed by the particular managed server is identified. The bound service has different high-level characteristics from other services executed by the particular managed server. Relevant rules within the set of rules are determined that are relevant to the bound service. A set of relevant managed servers that are relevant to the bound service are selected by identifying managed servers of the plurality that are referenced by the relevant rules. Function-level instructions are generated that regulate communication between the bound service and the set of relevant managed servers based on the relevant rules. The function-level instructions are sent to the particular managed server for use in configuring a management module to implement the administrative domain-wide management policy. |
| US10326649B2 |
Application placement through multiple allocation domain agents and flexible cloud scheduler framework
There are provided a method for operating a cloud computing infrastructure. In one embodiment, the method performs allocation domain modeling and provides a cloud scheduler framework that takes as input desired optimization objectives and the workload constraints and efficiently produces a placement solution that satisfies the constraints while optimizing the objectives in a way that adjusts itself depending on the objectives. As the objectives change, e.g., due to actions from system administrators or due to changes in business policies, the system optimizes itself accordingly and still produces efficient and optimized placement solutions. The method constructs an Allocation Domain (AD) that is a particular facet for allocating a logical entity to a physical entity. An AD is created using: variables, functional definitions (functions of variables), and a policy specification that includes a Boolean expression (of the functional definitions). |
| US10326648B2 |
Virtual use of electronic design automation tools
A control server facilitates communication between a tool server hosting an instance of a software tool and a client device employed by a user of the software tool. The client device initially contacts the control server to request the use of the software tool. The control server then arranges for a separate computer to be configured as a tool server that can provide remote access to an instance of the software tool. The control server may provide usage information to the tool server that will control how the software tool may be used. The control server may also provide connection information to the client device, which the client device then can use to establish a connection with the tool server. Using the connection information, the client device then establishes a remote connection with the tool server, allowing the user of the client device to use the software tool hosted on the tool server through the remote connection. |
| US10326643B2 |
Self-configuring fault-tolerant operational group
In an embodiment, a method includes assigning, based on a switch module of a particular node of one or more nodes of a fault-tolerant group, a channel to the particular node. The method further includes determining a number of nodes in the fault-tolerant group by exchanging handshake information between the channel assigned to the particular node and channels assigned to other nodes of the fault-tolerant group. The method further includes initializing the fault-tolerant group with the determined number of nodes based on the exchanged handshake information. |
| US10326642B2 |
Intelligent monitoring and management of network devices
Technologies and implementations for facilitating monitoring and management of network devices are generally disclosed. |
| US10326641B2 |
Using RF energy on an uplink channel to transition an unpowered access point to a power-up state
Apparatuses and methods are disclosed for using RF energy on an uplink channel to transition an unpowered access point to a power-up state. One apparatus 300 includes a processor 305 that receives uplink data from a remote unit 105 over a first uplink channel and determines whether to offload the data traffic of the remote unit 105 to an access point 115, wherein the access point 115 transitions to a power-up state after harvesting radio energy from a second uplink channel. The processor 305 further allocates uplink resources to the remote unit 105 on the second uplink channel in response to determining to offload the data traffic of the remote unit 105 to the access point 115. The apparatus may further include a radio transceiver 325 for receiving uplink data from the remote unit 105 over the first and second uplink channels. |
| US10326637B2 |
Functionality management via application modification
Methods, systems, apparatuses, and/or computer-readable media for providing device management via application modification may be provided. In some embodiments, a request to perform an action may be received. Upon determining that the action is associated with a metered resource, a further determination may be made as to whether the request complies with at least one management policy. In response to determining that the request complies with the at least one management policy, the requested action may be authorized and/or caused to be performed. |
| US10326636B1 |
Miniature on-chip quadrature phase generator for RF communications
An RF frontend circuit includes an RF transceiver and a frequency synthesizer to perform frequency synthetization in a wide frequency spectrum. The frequency synthesizer generates an LO signal to the RF transceiver. The frequency synthesizer includes a quadrature signal generator to generate a quadrature LO signal based on the LO signal. The quadrature signal generator includes a first transformer. A first primary winding of the first transformer is disposed on a first substrate layer of the IC and a secondary winding of the first transformer is disposed on a second substrate layer of an IC. A second transformer is coupled to the first transformer in series. A second primary winding of the second transformer is disposed on the first substrate layer of the IC and a secondary winding of the second transformer is disposed on the second substrate layer of the IC. |
| US10326632B2 |
Blind carrier synchronization method of OFDM wireless communication systems
A synchronizing radio receiver is disclosed, comprising: an analog baseband receive chain and a digital baseband receive chain. The digital baseband receive chain may comprise an analog to digital converter, a frame synchronization module, a frequency synchronization module, and an orthogonal frequency division multiplexing (OFDM) demodulator, wherein the frequency synchronization module is configured to cross-correlate a plurality of in-phase and quadrature samples to generate a synchronization signal and output the synchronization signal to a local oscillator in the analog baseband receive chain. The digital baseband receive chain may also further comprise a carrier frequency offset (CFO)/sampling frequency offset (SFO) correction module coupled to a frequency synchronization module configured to cross-correlate a plurality of in-phase and quadrature samples, with the CFO/SFO correction module configured to apply correction in a digital domain before outputting a corrected signal to the OFDM demodulator. |
| US10326631B2 |
Differential randomization of cell-specific and common pilot subcarriers in multi-carrier, multi-cell wireless communication networks
A multi-carrier cellular wireless network (400) employs base stations (404) that transmit two different groups of pilot subcarriers: (1) cell-specific pilot subcarriers, which are used by a receiver to extract information unique to each individual cell (402), and (2) common pilots subcarriers, which are designed to possess a set of characteristics common to all the base stations (404) of the system. The design criteria and transmission formats of the cell-specific and common pilot subcarriers are specified to enable a receiver to perform different system functions. The methods and processes can be extended to other systems, such as those with multiple antennas in an individual sector and those where some subcarriers bear common network/system information. |
| US10326628B2 |
Signal processing method and apparatus, and device
Embodiments of the present application provide a signal processing method and apparatus, and a device. The embodiments relate to an MU-MIMO system. The signal processing apparatus includes: a signal obtaining module and a sending module. A signal includes N spatial flows, and the signal includes a training field, where the training field includes a first part and a second part. Sub-carriers of an OFDM symbol in the second part of the training field are divided into N training sub-carrier sets TSSs in a division manner that is the same as a division manner of sub-carriers of an OFDM symbol in the first part of the training field, and each spatial flow corresponds to at least one sub-carrier in a TSS, in each frequency domain location, of each OFDM symbol in the second part of the training field. So that precision of the channel estimation is improved. |
| US10326623B1 |
Methods and systems for providing multi-stage distributed decision feedback equalization
Pre-charging two or more sets of nodes to set a differential output of a multi-input summation latch connected to the two or more sets of nodes in a pre-charged state, the two or more sets of nodes comprising a set of data signal nodes and a set of DFE correction nodes, in response to a sampling clock, generating a differential data voltage and an aggregate differential DFE correction signal, and generating a data decision by driving the differential output of the multi-input summation latch into one of two possible output states according to a summation of the differential data voltage signal and the aggregate differential DFE correction signal and subsequently holding the data decision by holding the differential output of the multi-input summation latch in a latched state for a duration determined by the sampling clock. |
| US10326620B2 |
Methods and systems for background calibration of multi-phase parallel receivers
Methods and systems are described for receiving a plurality of signals in a signaling interval at a multi-input comparator (MIC), and responsively generating an analog linear combination of the received signals, amplifying the analog linear combination of the received signals using an integration stage, receiving the amplified differential voltage at two multi-phase receivers, each multi-phase receiver comprising one or more processing slices, each multi-phase receiver operating in a multi-phase processing path for processing the amplified differential voltage, wherein processing the amplified differential voltage includes generating output data decisions and phase-error information using a first multi-phase receiver of the two multi-phase receivers and selectively adjusting local speculative decision feedback equalization (DFE) slicing offsets of a second multi-phase receiver of the two multi-phase receivers according to the output data decisions generated by the first multi-phase receiver. |
| US10326616B2 |
Techniques for routing from an endpoint with simultaneous associations to multiple networks
A node within a wireless endpoint device may be coupled to multiple heterogeneous networks simultaneously. The node is configured to select between the different networks based on various constraints associated with the endpoint device, applications executing on the endpoint device, traffic routed by the endpoint device, and constraints associated with the multiple networks. Based on these different constraints, and based on the current operating mode of the node, the node rates each network, and then selects the network with the highest rating to be used for routing purposes. |
| US10326615B2 |
Cellular-wireless local area network (WLAN) interworking
A device for facilitating cellular-wireless local area network (WLAN) interworking may include at least one processor circuit. The processor circuit may be configured to receive a packet including a first tunnel identifier and addressed to a user equipment (UE). The processor circuit may be configured to identify a radio bearer associated with the first tunnel identifier, where the radio bearer is configured to facilitate transmission of the packet to the UE via cellular communications. The processor circuit may be configured to determine whether the radio bearer has been offloaded over a WLAN. The processor circuit may be configured to, when the radio bearer has been offloaded over the WLAN, identify a second tunnel identifier mapped to the radio bearer; encapsulate the packet based on the second tunnel identifier, where the encapsulated packet includes the second tunnel identifier; and transmit the encapsulated packet to the UE over the WLAN. |
| US10326612B2 |
Packet data protocol
A communication device configured to communicate according to a data protocol in which data is carried in packets over a serial data link and the communication device is arranged: to form packets for transmission over the link in such a way that every packet commences with a first bit value; and between transmitting successive packets to continuously transmit a second bit value opposite to the first bit value over the link. |
| US10326611B2 |
System and method for network deployment and management
Systems and methods are disclosed comprising receiving an upstream service signal from a premises. In an aspect, the systems and methods are configured for providing a wireless signal based on the received service signal external to the premises. |
| US10326609B1 |
System and method for automatic association coordinator module pre-configuration
This document presents a system and method for preference pre-configuration of automatic association coordinator modules used to control lights, audio systems, and any other home automation device. The preferences define and control moods and experiences associated with one or more spaces within a residential or commercial property. Moods and experiences may be defined by the user to present specified settings for audio, lighting, security, or other parameters that contribute to a mood for a given space. Timing and triggers may be created and saved with the moods and experiences to permit automatic, delayed, and cascading ambiance settings for one or more spaces. |
| US10326607B2 |
Method for controlling information apparatus and computer-readable recording medium
A control method according to the present disclosure causes a computer of an information apparatus to: display on a display, a display screen representing a floor plan of one floor including at least two or more rooms; display each device icon representing each of one or more target devices in a region of each room, the one or more target devices including a specific target device that stores a set content when power has been previously turned off; and when selection of the device icon that represents the specific target device in any region of the at least two or more rooms is sensed, and selection of any region in the room, in which the selection of the device icon has been sensed, is sensed, output an on-off control command for controlling an on-off state of power of the specific target device corresponding to the room. |
| US10326606B2 |
Multicast switching system
As compared to the conventional method, a non-blocking multicast switching system is provided in which the number of switches to be operated can be reduced and the path switching can be quick. A multicast switching system with an input stage, a middle stage, and an output stage, including a plurality of input switch elements of receiving/transmitting streams from input sources/to the middle stage, a plurality of middle switch elements of receiving/transmitting streams from the input switch elements/to the output stage, the plurality of middle switch elements being grouped into a plurality of groups and a plurality of output switch elements of receiving/outputting streams from the middle switch elements/to output destinations, wherein the input switch elements transmit the streams to each of the plurality of groups. |
| US10326597B1 |
Dynamic response signing capability in a distributed system
A system that provides responses to requests obtains a key that is used to digitally sign the request. The key is derived from information that is shared with a requestor to which the response is sent. The requestor derives, using the shared information, derives a key usable to verify the digital signature of the response, thereby enabling the requestor to operate in accordance with whether the digital signature of the response matches the response. |
| US10326595B1 |
Load balancing probabilistic robot detection
The systems and methods are directed to load balancing probabilistic robot detection. In some embodiments, a first hashed value of an identifier may be determined based on a first hashing function and a second hashed value of the identifier based on a second hashing function. A first value from an array of integer buckets may be determined using the first hashed value and a second value from the array of integer buckets may be determined using the second hashed value. The first value may be incremented based on determining the first value is less than the second value. The request may be determined to be associated with a robot based on determining the first value is greater than a threshold. Execution of an action may be facilitated based on determining the request is associated with the robot. |
| US10326594B2 |
Customer due diligence system
A computerized method and apparatus are established to identify confidential data of common interest among multiple parties without releasing the confidential data. Furthermore, a computerized network provides different parties at different locations with a mechanism to conduct cooperative activities concerning such confidential data of common interest without exposing that confidential data to possible identity theft. |
| US10326590B2 |
Technologies for trusted device on-boarding
Technologies for trusted device on-boarding include a first computing device to generate a first public Diffie-Hellman key based on a private Diffie-Hellman key and a first unique identifier of the first computing device. The first unique identifier is retrieved from secure memory of the first computing device. The first computing device transmits the first public Diffie-Hellman key to a second computing device and receives, from the second computing device, a second public Diffie-Hellman key of the second computing device. The second public Diffie-Hellman key incorporates a second unique identifier of the second computing device. Further, the first computing device removes a contribution of the second unique identifier from the second public Diffie-Hellman key to generate a modified public Diffie-Hellman key and generates a shared Diffie-Hellman key based on the modified public Diffie-Hellman key and the private Diffie-Hellman key of the first computing device. |
| US10326589B2 |
Message authenticator generating apparatus, message authenticator generating method, and computer readable recording medium
A message authenticator generating apparatus (10), for each integer i, taking as input a key K and a value m′[i] which is generated from a message M, calculates a value c[i] by a block cipher E. The message authenticator generating apparatus (10), taking as input the value c[i] for each integer i, calculates a value w[1], a value w[2], and a value w[3] each maintaining the randomness of the value c[i]. The message authenticator generating apparatus (10), taking as input the value w[2] and the key K, calculates a value K′ by a function e which is a substitution function if the key K is fixed, taking as input the value w[1] and the value K′, calculates a value c by a block cipher E, and taking as input the value w[3] and the value c, calculates an authenticator T by a function d which is a substitution function if the value w[3] is fixed. |
| US10326587B2 |
Ultra-lightweight cryptography accelerator system
A cryptography accelerator system includes a direct memory access (DMA) controller circuit to read and write data directly to and from memory circuits and an on-the-fly hashing circuit to hash data read from a first memory circuit on-the-fly before writing the read data to a second memory circuit. The hashing circuit performs at least one of integrity protection and firmware/software (FW/SW) verification of the data prior to writing the data to the second memory circuit. The on-the-fly hashing circuit includes a bit repositioning circuit to designate an order of bits of a binary word in a register from a most significant bit (MSB) to a least significant bit (LSB) for performing computations without rotating bits in the register, and an on-the-fly round constant generator circuit to generate a round constant from a counter. |
| US10326586B2 |
Encryption/decryption apparatus and power analysis protecting method thereof
An encryption/decryption apparatus and a power analysis protecting method thereof are provided. The encryption/decryption apparatus adapted to perform encryption/decryption operation on digital data includes a data encryption/decryption unit, a random number generator, and a power analysis protecting circuit. The data encryption/decryption unit receives the digital data and performs an encryption/decryption operation on the digital data. The random number generator is used to generate random number data, the random number data has N bits, and N is a positive integer. The power analysis protecting circuit generates M kinds of power signals having different levels according to each bit data of the random number data when the random number data is received by the power analysis protecting circuit, and M is equal to the Nth power of 2. |
| US10326585B2 |
Hash value generation through projection vector split
A system may include an access engine to access an input vector as well as a projection matrix. The projection matrix may include a number of rows equal to a number of hash values to generate from the input vector multiplied by the square root of an inverted sparsity parameter specifying a ratio of the hash universe size from which the hash values are generated to the number of hash values to generate. The projection matrix may include a number of columns equal to the dimensionality of the input vector. The system may also include a hash computation engine to determine a projection vector from the projection matrix and the input vector, split the projection vector into a number of sub-vectors equal to the number of hash values to generate, and generate a hash value from each of the sub-vectors. |
| US10326584B2 |
Carrier synchronization device
A device, a circuit and a method are disclosed herein. The device includes a data receiving circuit and an oscillating signal generator. The data receiving circuit is configured to output a first output signal, a second output signal, and a phase error signal according to an oscillating signal and a modulated signal, in which the phase error signal indicates a phase difference between the oscillating signal and the modulated signal. The oscillating signal generator is configured to delay a phase of a first reference signal according to the phase error signal, to generate the oscillating signal. |
| US10326583B2 |
Low-power data bus receiver
A circuit for receiving and processing a bit stream obtained from an electronic communication bus-system comprises a bit stream processor and bit sampling of the bit stream to provide a sampled output signal. The circuit comprises a frame decoder for decoding a data frame encoded in the sampled output signal, and a clock signal generator for generating a first clock signal for the bit stream processor. The circuit comprises a clock signal downsampler for generating a second clock signal having a lower frequency than the first clock signal, in which the second clock signal is based on a co-occurrence of a clock pulse in the first clock signal and the emission of a bit in the sampled output signal. The bit stream processor is adapted for synchronizing the first clock signal to an external protocol timing of the incoming bit stream. |
| US10326582B2 |
Optical transmitter that includes optical modulator
An optical transmitter includes: an optical modulator, a phase adjustment circuit, first and second synchronization circuits, and first and second drive circuits. The optical modulator includes a first modulation area and a second modulation area that is provided at output side of the first modulation area. The phase adjustment circuit adjusts a phase of a first clock signal so as to generate a second clock signal. The first and second synchronization circuits respectively output first and second electric signals in synchronization with the first and second clock signals. The first and second drive circuits respectively drive the first and second modulation areas with the first and second electric signals. |
| US10326579B2 |
Method and apparatus for receiving ACK/NACK in wireless communication system
Provided are a method and an apparatus for a user equipment, which is allocated a plurality of serving cells, receiving acknowledgement/negative acknowledgement (ACK/NACK) in a wireless communication system. The method comprises: transmitting uplink data through a physical uplink shared channel (PUSCH); and receiving ACK/NACK with respect to the uplink through a physical hybrid-ARQ indicator channel (PHICH), wherein a serving cell that receives the ACK/NACK is selected from one or more serving cells, which the user equipment monitors to detect an uplink grant that schedules the PUSCH. |
| US10326578B2 |
Early termination scheme for blind decoding of a downlink control channel
An early termination system for blind decoding is provided to decrease the computational resources utilized when decoding the physical resources, and decrease the time spent decoding. A blind decoding priority list can be used by the mobile device to preferentially decode specific physical resource elements as it specifies the order of all the candidate physical downlink control channels (PDCCHs). When the physical resource elements are decoded, if there is no more downlink control information in that transmission time interval, the downlink control information can include a termination bit, and the mobile device, upon identifying the termination bit can cease blind decoding of the remainder candidates. In this way, the blind decoding process more quickly identifies the downlink control information, and subsequent blind decoding is halted. |
| US10326577B2 |
Harq design for LTE in unlicensed spectrum utilizing individual ACK/NACK
Methods, systems, and apparatuses are described for wireless communications. In one method, a sequence number corresponding to a data frame and one or more data subframes of the data frame may be transmitted over an unlicensed spectrum to a user equipment (UE), and hybrid automatic repeat request (HARQ) feedback for the one or more data subframes may be received over the unlicensed spectrum, from the UE, when the sequence number corresponding to the data frame is received by the UE in a specified order. In another method, a sequence number corresponding to a data frame and HARQ feedback may be transmitted over an unlicensed spectrum to a UE, and one or more data subframes may be received over the unlicensed spectrum, from the UE, in response to the HARQ feedback when the sequence number corresponding to the data frame is received by the UE in a specified order. |
| US10326568B2 |
Method and apparatus for supporting frequency hopping for low cost user equipment in wireless communication system
A method and apparatus for transmitting a control signal or data for a low cost user equipment (UE) in a wireless communication system is provided. A base station transmits information on frequency hopping for the low cost UE, and transmits the control signal or data to the low cost UE according to the information on frequency hopping. |
| US10326566B2 |
Reference signal transmission using multiple numerology
A method and a device for transmitting reference signals in a wireless communication system are disclosed. For these, a sequence is acquired to be used for the reference signals, and the reference signals are transmitted through subframes comprising a first type subframe and a second type subframe. Here, the first type subframe includes a first number of OFDM symbols and the second type subframe includes a second number of OFDM symbols. And, a first position of OFDM symbol for transmitting the reference signals at the first type subframe is the same as a second position of OFDM symbol for transmitting the reference signals at the second type subframe. |
| US10326559B2 |
Techniques for acknowledgment of transmissions in a wireless communication system
A base station may provide both an uplink grant and a downlink grant in a same transmission time interval (TTI), and may provide an indication in the uplink grant that the TTI includes the downlink grant. A user equipment (UE) that receives the uplink grant may provide feedback using identified feedback resources in an uplink shared channel, and other uplink transmissions may be rate matched around the feedback resources in the uplink shared channel. A base station receiving the feedback may monitor the feedback resources to determine whether the downlink grant or one or more of the downlink transmissions were successfully received at the UE. A base station, in some examples, may monitor different sets of resources to determine whether certain of the uplink grant, downlink grant, downlink transmissions associated with the downlink grant, or any combinations thereof, have been successfully received at the UE. |
| US10326556B2 |
Method and system of frequency correction in LPWAN networks
There is discloses a method of frequency correction during data transmission in a low-power wide-area network (LPWAN). The method is executable by a computing device coupled to the LPWAN. The method comprises: determining an actual frequency of the received message as a mid-point of a given spectrum section, based on the given spectrum section meeting a condition of: the message was successfully received in the given spectrum section, the signal quality metric has a maximum value in the given spectrum section in comparison with all other spectrum sections where that message was also received; calculating an expected frequency of the radio signal based on data contained in the message; determining a received radio signal frequency error as a difference between the actual frequency and the expected frequency of the signal; generating a message send frequency based on the received radio signal frequency error. |
| US10326555B2 |
Polar coding method, apparatus, and device
Embodiments of this application disclose a polar coding method, apparatus, and device, so as to reduce storage overheads of a system. A sequence for polar coding is obtained based on a length M of a target polar code, wherein the sequence comprises L sequence numbers, ordering of the L sequence numbers in the sequence is the same as ordering of the L sequence numbers in a maximum mother code sequence, wherein the maximum mother code sequence is obtained by sorting N sequence numbers of N polarized channels in ascending order or descending order of reliability metrics, wherein L and N are integer power of 2, M is smaller than or equal to L, L is smaller than or equal to N. |
| US10326554B2 |
Transmission method, transmission device, reception method, and reception device
A decoding device includes: a BP decoder that performs BP decoding on an input signal: a maximum likelihood decoder that performs maximum likelihood decoding on a signal subjected to the BP decoding; and a selector that selects one of the input signal, the signal subjected to the BP decoding, and a signal subjected to the maximum likelihood decoding. In a configuration of the decoding device, when a decoder is appropriately operated according to quality of data, a calculation scale can be reduced, and power consumption can be decreased. |
| US10326553B2 |
Systematic code decoding method and apparatus
Embodiments of the present invention disclose a systematic code decoding method and an apparatus. The method includes: extracting a non-erased original packet from an acquired encoded packet that has passed through an erasure channel; and then by using the erased original packet as an unknown variable, obtaining an erased original packet by parsing according to a first equation. Because a quantity F of erased original packets is far less than a total quantity K of original packets, a dimension of the first equation that includes F unknown variables is far lower than a dimension of an equation indicating a correspondence between an encoded packet and an intermediate packet. An operation amount required for parsing the relatively low-dimensional first equation is far smaller, thereby greatly reducing an operation amount required for decoding. |
| US10326550B1 |
Soft FEC with parity check
The present invention is directed to data communication systems and techniques thereof. More specifically, embodiments of the present invention provide an FEC encoder that generates parity symbols that are embedded into FEC blocks. An FEC decoder determines whether to perform error correction based on the parity symbols. When performing error correction, the decoder selects a worst symbol from a segment of symbols, and the worst symbol is corrected. There are other embodiments as well. |
| US10326548B2 |
Base station, user terminal, processor, and communication method
A base station according to an embodiment is a base station configured to perform transmission to a user terminal by use of an unlicensed band. The base station comprises: a controller configured to start the transmission from a boundary of a subframe, but also to start the data transmission from a second-half slot out of a first-half slot and the second-half slot which configure a subframe. The controller is configured to transmit downlink control information in the second-half slot to start the transmission from the second-half slot. The controller is configured to change a modulation scheme to be applied to the transmission, depending on a start timing of the transmission, while fixing a transport block size applied to the subframe. The downlink control information is a PDCCH or an EPDCCH. |
| US10326544B2 |
Receiving public warning system data
A method for receiving public warning system (PWS) data includes receiving, at a user equipment (UE), a public warning system (PWS) message. The UE determines that the PWS message is a type 2 PWS message. The type 2 PWS message indicates that type 2 PWS data is delivered using a type 2 PWS data delivery mechanism. The type 2 PWS data is received using the type 2 PWS data delivery mechanism. |
| US10326542B2 |
Wireless communication device and wireless communication method
According to one embodiment, a wireless communication device includes controlling circuitry configured to adjust a directivity of each of a plurality antennas based on a received power of a first frame for each of the plurality of antennas; and a transmitter configured to transmit a second frame for responding to the first frame after the directivity is adjusted. |
| US10326538B2 |
Remote radio head reciprocity calibration
Embodiments herein describe calibrating a plurality of radio heads having a plurality of wireless antennas. In one embodiment, the plurality of radio heads communicate a calibration signal in a round robin fashion such that each of the radio heads communicates a respective calibration signal to the remaining radio heads. The received calibration signals are then used to calibrate the radio heads. In one embodiment, a controller coupled with the plurality of radio heads calibrates the radio heads. The calibrated radio heads then communicate to one or more client devices. |
| US10326537B2 |
Environmental change condition detection through antenna-based sensing of environmental change
In embodiments of the present invention improved capabilities are described for an antenna-based detection method and system for sensing an environmental change condition. The method and system is adapted such that the states comprising the environmental change condition are capable of being determined at the location of the detection point utilizing only the magnitude component of the antenna impedance as altered by the discrete change in the environmental condition. |
| US10326535B2 |
Communication through modulated electromagnetic emissions
Touch-based communication between users and various electronic devices is provided by encoding data onto the device's EMI. When the device is touched by a user, the data encoded EMI signal travels through their body and into a radio receiver worn by the user, such as via a wrist band. Results show that electronic primitives such as LEDs, buttons, I/O lines, LCD screens, motors and power supplies can be turned into radio transmitters capable of touch communication. Effective data rates range from 5.8 Kbps to 22 bit per image depending on the primitive used. |
| US10326531B2 |
Out-of-band signal detection
An out-of-band (OOB) signal detector is disclosed. The OOB signal detector may include a first node configured to receive an alternating current (AC) portion and a direct current (DC) portion of an electrical signal. The AC portion may include modulated OOB data carried by the electrical signal. The OOB signal detector may also include a current to voltage processing circuit configured to extract the AC portion of the electrical signal. The OOB signal detector may additionally include a limiting amplifier circuit configured to receive the extracted AC portion and to generate an amplified signal based on the extracted AC portion. The OOB signal detector may further include an analog-to-digital convertor circuit configured to sample the amplified signal and to generate a digital sample that represents the modulated OOB data. |
| US10326528B2 |
Optical transceiver and control method for optical transceiver
There is provided an optical transceiver including a laser light source configured to transmit a first optical signal via an optical transmission member having optical fibers, a photodetector configured to receive a second optical signal via the optical transmission member, a visible light source configured to emit visible light which is incident to the optical transmission member, and a control circuit configured to, when the photodetector detects not to receive the second optical signal, control the laser light source to stop transmitting the first optical signal and the visible light source to start emitting the visible light. |
| US10326526B2 |
Method for muxing orthogonal modes using modal correlation matrices
A method for transmitting an orthogonal function processed signal over a communications link on a fiber involves generating at least one mode crosstalk matrix illustrating mode crosstalk between transmitted modes and adjacent modes within the fiber. Adjacent modes to be multiplexed together are selected based on entries within the generated mode crosstalk matrix being less than or equal to a predetermined value. The transmitted modes and the selected adjacent modes are multiplexed together into the orthogonal function processed signal for transmission on the communications link on the fiber. |
| US10326522B1 |
Methods and systems for wireless communications using auxiliary base stations
A method of wireless communication includes receiving a plurality of first downlink signals at a first radio base station, where the plurality of first downlink signals each has a different frequency. The method further includes down-converting the plurality of first downlink signals to a plurality of second downlink signals, where the plurality of second downlink signals have a same frequency. The method also includes transmitting the plurality of second downlink signals to associated user equipments (UEs). |
| US10326518B1 |
Repeater and node utilization
Methods and systems of managing communications through a repeater between a gateway and a plurality of nodes in a long-range wireless wide area network include, in various independent aspects, joining the plurality of nodes to the network through the gateway by transmitting to a join server at least a portion of join request messages received from the plurality of nodes, receiving messages from the gateway and identifying associated nodes of the plurality of nodes to which those messages are then transmitted, and transmitting messages to the gateway with physical layer payloads corresponding to payloads of messages received from the plurality of nodes. |
| US10326512B2 |
Method and apparatus for short-term feedback in multi-input multi-output communications
Embodiments of the present disclosure provide a method and apparatus for multi-input multi-output MIMO communications in a wireless communication network. The method comprises: receiving, from a device, long-term precoding information for the MIMO communication, the long-term precoding information indicating a first group of beams for a first antenna polarization, and a second group of beams for a second antenna polarization (S201); receiving, from the device, short-term precoding information for use in the MIMO communication, the short-term precoding information indicating beams selected respectively from the first group of beams and the second group of beams for different antenna polarizations (S202); constructing a precoding matrix for the MIMO communication according to the long-term precoding information and short-term precoding information (S203); and transmitting data encoded according to the precoding matrix to the device (S204). Embodiments of the present disclosure further provide a method in a receiving side of MIMO, and a corresponding apparatus. |
| US10326511B1 |
Apparatus and method of non-iterative singular-value decomposition
Method for non-iterative singular-value decomposition (SVD). The method includes receiving, by receiver, signal; determining, by channel matrix generator, channel matrix for received signal, where channel matrix has dimension Nrx×Ntx, Nrx is number of receive antennas, Ntx is integer indicating number of transmit antennas; reducing, by singular-value decomposer, dimension of channel matrix to min(Nrx,Ntx)×min(Nrx,Ntx), where min( ) is function that returns coefficient with minimum value; performing, by singular-value decomposer, SVD on dimension-reduced channel matrix to determine singular vectors and corresponding coefficients that maximize singular values of singular vectors; outputting result of SVD based on at least one of when dimension of dimension-reduced channel matrix is less than or equal to 2 and when two greatest singular values of corresponding singular vectors are determined; when result of SVD not output, subtracting, by singular-value decomposer, singular vectors from dimension-reduced channel matrix to reduce rank and returning to performing SVD. |
| US10326509B2 |
Link budget enhancements for single receiver devices
Aspects of the present disclosure provide apparatus and techniques that may be applied in systems that may help enable efficient communication between a base station (BS) and certain devices, such as wearable devices and/or machine type communication (MTC) user equipments (UEs), having a single receiver (RX) for long term evolution (LTE). An exemplary method, performed by a BS, generally includes receiving, from a UE, an indication of a category of the UE, wherein the category of the UE indicates at least one of: a maximum throughput supported by the UE or a number of layers supported by the UE; assuming a number of receivers at the UE based on the category of the UE; determining one or more transmit parameters based on the number of receivers of the UE; and communicating with the UE according to the one or more transmit parameters. |
| US10326505B2 |
Method and apparatus for determining precoding matrix indicator, user equipment, and base station
A precoding matrix indicator (PMI) is determined for a user equipment or a base station, where the PMI corresponds to a precoding matrix W, and the precoding matrix W satisfies a first condition, a second condition, or a third condition; and the PMI is sent to a base station. The precoding matrix indicator can effectively control a beam, especially a beam shape and a beam orientation, in a horizontal direction and a perpendicular direction. |
| US10326503B2 |
Method for transmitting and receiving downlink control information
A method for efficiently transmitting and receiving downlink control information is disclosed. The method includes, at a base station, receiving feedback information including a precoding matrix index (PMI) from a user equipment (UE) and transmitting precoding information having a predetermined bit number according to the number of antenna ports and a transmission mode of the base station. The precoding information of a predetermined transmission mode in the precoding information includes confirmation information indicating that the base station uses a PMI which is recently received from the UE. |
| US10326502B2 |
Method and apparatus for conveying precoding information in a MIMO system
Method and apparatus for conveying precoding information in a control message (M) from a first node (400) to a second node (402), with information on properties of an associated wireless data transmission (D) between the first and second nodes employing spatial multiplexing and precoding for the data transmission. The first node determines precoding parameters (P) for signal transmission to the receiving node, optionally based on feedback reports (F) from the receiving node. The first node encodes control information bits in precoding information fields of the control message by means of values in TBS fields of the control message, such that the TBS field values determine the interpretation of the bits in the precoding information field(s). The control message (M) is then sent to the second node. |
| US10326501B2 |
Multiple-input multiple-output radio transceiver
As disclosed herein is a multiple-input multiple-output (MIMO) radio transceiver which may include a plurality of antennas operatively coupled to a first integrated circuit (IC). The first IC and the plurality of antennas may receive a first radio signal on a first radio frequency (RF) carrier and a second radio signal on a second RF carrier. The first RF carrier and the second RF carrier may be different carriers. The first radio signal and the second radio signal may have different bandwidths. The first IC may demodulate the first received radio signal to produce a first baseband signal and the second received radio signal to produce a second baseband signal. A second IC may be operatively coupled to the first IC and may recover data from at least the first baseband signal and the second baseband signal. |
| US10326493B2 |
Control channel transmission and frequency error correction
Methods and apparatus are provided to enable repetitions of a physical uplink control channel transmission with frequency retuning and to enable frequency offset correction using replicas of received data symbols or received control symbols in repetitions of a channel reception. Methods and apparatus are also provided for multiplexing physical uplink control channel transmissions with different numbers of repetitions and for adjusting a number of repetitions for a channel transmission based on an adjustment of a frequency offset. |
| US10326488B2 |
Electronic device case with inductive coupling features
A protective case includes a shell for receiving and at least partially covering an electronic device. The shell includes a first material and has a back portion and side portions extending from the back portion. The back portion is configured to be adjacent to the back surface of the electronic device when the electronic device is installed. The case also includes a core comprising a second material having a magnetic permeability substantially greater than a magnetic permeability of the first material. The core is affixed to the back portion of the shell at a location that coincides with a center region of the wireless charging coil of the wireless charging circuitry of the installed electronic device. The core increases magnetic coupling between the wireless charging coil of the installed electronic device and a source charging coil when the protective case is placed in proximity to the source charging coil. |
| US10326487B2 |
Portable electronics case with support stand
A case for an electronic device, the case including a back panel, one or more sidewalls, and a support stand selectively extendable from the back panel for supporting the electronic devices in vertical and/or horizontal orientations. The support stand can be selectively extendable between a storage position and a plurality of use positions. The support stand can include positioning mechanism comprising a translating engagement feature and a rotating engagement feature. |
| US10326486B2 |
Methods and apparatus for dynamic control of specific absorption rate
A wireless information handling system includes a specific absorption rate sensor, a wireless communications module, and a wireless controller in communication with the specific absorption rate sensor and the wireless communications module. The wireless communications module is to transmit a signal using a frequency domain including a set of frequencies. The specific absorption rate sensor is to measure the specific absorption rate when transmitting the signal. The wireless communication module is to transmit a subsequent signal using an adjusted frequency domain including a subset of the set of frequencies in response to measuring the specific absorption rate. |
| US10326483B2 |
Method and device for removing self-interference signal in environment using FDR mode
A method for removing a self-interference signal by a device supporting an FDR mode can further comprise the steps of: transmitting a signal to a counterpart node in a predetermined time interval; generating, in an RF stage of the device, a residual self-interference signal after removal of an analog self-interference signal with respect to the signal and then storing same; and receiving from the counterpart node a NACK signal with respect to the transmission of the signal; retransmitting the signal to the counterpart node; and, if decoding of the signal which has been received in the predetermined time interval is successful, using only a part of the stored residual self-interference signal when removing a digital self-interference signal on the basis of the retransmission. |
| US10326481B2 |
Power amplification module
A power amplification module includes a first amplification transistor that receives a first signal outputs an amplified second signal from the collector thereof; and a bias circuit that supplies a bias current to the base of the first amplification transistor. The first bias circuit includes a first transistor that is diode connected and is supplied with a bias control current; a second transistor that is diode connected, the collector thereof being connected to the emitter of the first transistor; a third transistor, the base thereof being connected to the base of the first transistor, and the bias current being output from the emitter thereof; a fourth transistor, the collector thereof being connected to the emitter of the third transistor and the base thereof being connected to the base of the second transistor; and a first capacitor between the base and the emitter of the third transistor. |
| US10326475B2 |
Transmitting method including bit group interleaving
A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low density parity check (LDPC) codeword by LDPC encoding based on a parity check matrix; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the modulator is further configured to map a bit included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol. |
| US10326464B2 |
Self-oscillating multi-ramp converter and method for converting a capacitance into a digital signal
According to various embodiments, a multi-slope converter can have the following: an integrator circuit having a charge store; a clocked comparator; a sensor circuit having a capacitor arrangement and a charging circuit for pre-charging the capacitor arrangement, a discharging circuit; a switch arrangement and a controller circuit for actuating the switch arrangement based on a clock signal; wherein the controller circuit is set up to actuate the switch arrangement such that, alternately: in an integration cycle electrical charge is transferred from the capacitor arrangement of the sensor circuit to the charge store of the integrator circuit, and in a deintegration cycle the charge store of the integrator circuit is discharged by means of the discharging circuit, wherein after the integration cycle a residual charge remains stored in the charge store of the integrator circuit and is taken into consideration during a subsequent integration cycle. |
| US10326455B2 |
Integrated circuit device, electronic device, electronic apparatus, and base station
An integrated circuit device includes a substrate, a joining part provided on the substrate and joined to a vibrator, and a plurality of bonding pads provided on the substrate. The joining part includes an insulating protective film that covers a part of a surface of the substrate, and no insulating protective film is provided between the adjacent bonding pads. |
| US10326454B2 |
All-digital phase locked loop using switched capacitor voltage doubler
An all-digital phase locked loop (ADPLL) receives an analog input supply voltage which is utilized to operate analog circuitry within the ADPLL. The ADPLL of the present disclosure scales this analog input supply voltage to provide a digital input supply voltage which is utilized to operate digital circuitry within the ADPLL. The analog circuitry includes a time-to-digital converter (TDC) to measure phase errors within the ADPLL. The TDC can be characterized as having a resolution of the TDC which is dependent, at least in part, upon the digital input supply voltage. In some situations, process, voltage, and/or temperature (PVT) variations within the ADPLL can cause the digital input supply voltage to fluctuate, which in turn, can cause fluctuations in the resolution of the TDC. These fluctuations in the resolution of the TDC can cause in-band phase noise of the ADPLL to vary across the PVT variations. The digital circuitry regulates the digital input supply voltage to stabilize the resolution of the TDC across the PVT variations. This stabilization of the resolution of the TDC can cause the ADPLL to maintain a fixed in-band phase noise across the PVT variations. |
| US10326447B1 |
Latch circuit preventing output failure due to simultaneous transition of control signal and input signal
Disclosed herein is a latch circuit capable of preventing an output failure caused due to simultaneous transition of a control signal and an input signal. The latch circuit according to the present invention generates a separate control adjustment signal CTR using the control signal Control and the input signal In and uses the control adjustment signal CTR, instead of the control signal for a latch operation. Accordingly, when the control signal and the input signal transition at the same time, the control adjustment signal is processed not to transition during a transition interval of the input signal, thereby preventing a metastability problem that occurred in the existing latch circuit. |
| US10326445B2 |
Sensing apparatus and method based on electromagnetic induction type
A sensing apparatus for determining a pen input point includes a sensing loop unit, including loops, to output a first signal from a pen signal, wherein each loop includes two sub-loops separated by a distance; an area determination loop unit including at least one loop to output a second signal from the pen signal; and a controller to determine input point candidates based on the first signal and determine the input point from the input point candidates based on the second signal, wherein the two sub-loops are in series, wherein one sub-loop of the two sub-loops is disposed inside of an area in which one loop of the area determination loop unit is disposed and another sub-loop of the two sub-loops is disposed outside of the area in which the one loop is disposed, and wherein each loop of the sensing loop unit determines the candidates of the input point. |
| US10326444B2 |
Integrated circuit device and electronic appliance
An H-bridge pre-driver is configured as two blocks so as to suit the width of an H-bridge driver Tr. The two blocks are line-symmetrically placed with a bias circuit interposed therebetween. One of the pre-driver blocks is laid out as a rectangle that is long in one direction and is short in a direction perpendicular to that direction. With this configuration, the pre-driver layout area can be reduced, and the cost of IC can be reduced. Furthermore, the symmetric placement enables matching of the impedance of interconnect from the pre-driver to the driver and stabilization of properties to be achieved. |
| US10326443B2 |
Forward isolation in power amplifier modules using internal regulator
A power amplifier module includes a transistor and transistor control circuitry configured to receive an internal regulator voltage and provide the internal regulator voltage to control the transistor in a stand-by mode of operation. |
| US10326440B1 |
RF switches, integrated circuits, and devices with multi-gate field effect transistors and voltage leveling circuits, and methods of their fabrication
Embodiments of field effect transistor (FET) circuits, RF switches, and devices include source and drain terminals coupled to an active surface of a semiconductor substrate, a channel in the substrate between the source and drain terminals, and a plurality of gate structures coupled to the active surface over the channel. A channel contact is coupled to the active surface over the channel between a first pair of the gate structures, and a first capacitor is electrically coupled between the channel contact and a gate structure of the plurality of gate structures. |
| US10326438B2 |
Driving circuit of a power circuit and a regulator
A regulator converting an input voltage into a supply voltage includes a first differential amplifier, a second differential amplifier, a pass element, and a feedback voltage divider. The first differential amplifier includes a reference voltage with a feedback voltage to generate a first output voltage and a first inverse output voltage. The second differential amplifier compares the first output voltage and the first inverse output voltage to generate a second output voltage. The pass element passes an output current from the input voltage to the supply voltage according to the second output voltage. The feedback voltage divider divides the supply voltage by a feedback factor to generate the feedback voltage. |
| US10326429B1 |
Receiver and common-mode voltage calibration method thereof
A receiver and a common-mode voltage calibration method thereof are provided. The receiver includes sensing circuits, a phase comparator, and a self-calibration circuit. The phase comparator compares phase relationships of the latch results at the output terminals of the sensing circuits during a testing period to produce a phase comparison result. During the testing period, the self-calibration circuit provides the same differential signal to the input terminals of these sensing circuits, and sets common-mode levels at the input terminals of these sensing circuits to be different from one another. The self-calibration circuit determines a calibrated common-mode level based on the phase comparison result. The self-calibration circuit sets the common-mode levels at the input terminals of these sensing circuits to be equal to the calibrated common-mode level during a normal operation period. |
| US10326422B2 |
Parameter processing method, audio signal playing method and device, and audio equalizer
A parameter processing method, an audio signal playing method and device of an audio equalizer, and an audio equalizer are provided. The parameter processing method includes: acquiring a current parameter preset set and a predetermined target parameter preset set of the audio equalizer, linearly processing at least a part of parameters in the current parameter preset set, to enable the parameters processed linearly to be identical to target parameters in the target parameter preset set. |
| US10326420B1 |
Receiver circuits for millimeter wave devices
We disclose a receiver circuit which may be used in mm-wave devices. The receiver circuit comprises a transimpedance amplifier comprising PMOS and NMOS transistors, wherein the back gate voltages provided to the transistors may be adjusted. By adjusting the back gate voltages during device operation, structural variations and temperature variations in the threshold voltages of the transistors may be minimized and the gain compression tolerance of the receiver circuit may be increased. |
| US10326417B1 |
Offset nulling for high-speed sense amplifier
A resistor in a pair of resistors is selectively coupled to a current source through a selection switch during the reset phase of a voltage-mode sense amplifier so that one evaluation node for the voltage-mode sense amplifier is discharged from a power supply voltage by an ohmic voltage drop across the selectively-coupled resistor to null an offset for the voltage-mode sense amplifier. |
| US10326405B2 |
Class-H switching amplifier circuit having supply voltage proportional to an audio signal
An amplifier circuit includes an amplifier and a voltage boost circuit configured to provide a variable supply voltage to the amplifier, the variable supply voltage continuously proportional to an audio input signal, the variable supply voltage configured to follow an output of the amplifier. |
| US10326404B2 |
Low power time amplifier and operating method thereof
A time amplifier includes a first signal regeneration circuit, a second signal regeneration circuit, a first delay circuit configured to receive the second input signal and output the delayed second input signal by a predetermined delay time, and a second delay circuit configured to receive the first input signal and output the delayed first input signal by the predetermined delay time. A corresponding signal regeneration operation is stopped when at least one of the first and second output signals is high. The at least one output signal remains high. |
| US10326403B2 |
Radio receiver for carrier aggregation
A radio receiver circuit configurable to operate in a carrier-aggregation (CA) mode and in a non-CA mode is disclosed. It comprises a first receive path arranged to be operatively connected to an antenna and a second receive path arranged to be operatively connected to the same antenna. It further comprises a control unit operatively connected to the first receive path and the second receive path. In the CA mode, the control unit controls the first receive path to receive a first component carrier (CC) and the second receive path to receive a second CC. In the non-CA mode, the control unit selectively controls the first receive path and the second receive path to both receive the same single CC. |
| US10326397B2 |
Motor control apparatus, sheet conveyance apparatus, document feeding apparatus, document reading apparatus, and image forming apparatus
An apparatus, to control a motor from an instructed phase indicating a motor rotor target phase, includes a detector, a phase determiner, a converter, and a controller. The detector detects a motor winding driving current. The phase determiner determines a rotor rotation phase from the detected driving current. The converter converts a detected current value in a stationary coordinate system into a current value in a rotational coordinate system from the determined rotation phase. The controller includes a first mode for controlling the driving current to cause a determined phase deviation between the instructed and rotation phases to decreased, and a second mode for controlling the driving current from a current having a previously determined magnitude. On switching the mode from the second to the first mode, the first mode target value is set from a driving current value corresponding to a current component represented by the rotational coordinate system. |
| US10326396B2 |
Method for estimating parameters of a DC machine by the laplace transform
A method for estimating parameters of a direct current machine by Laplace transform performed by a computer system. The method includes establishing a transient model of the DC machine and a transfer function based on the transient mode; transforming the transfer function from the time domain to the frequency domain by the Laplace transform to obtain each of an armature current and a rotational speed of the DC machine as a function of frequency; expressing the armature current and the rotational speed as polynomial fractions by polynomial regression, and comparing the functions of the frequency and the polynomial fractions to output values of the armature resistance, the armature inductance, the back electromotive force constant, the moment of inertia and the friction coefficient. As such, the accuracy and operational efficiency in estimating the parameters of the DC machine can be improved. |
| US10326382B2 |
Modulation method for DC to DC converters
Disclosed is a phase-shifted square wave modulation technique for single-phase and three-phase IM2DC applications in HVDC/MVDC systems. A square wave based modulation waveform is applied to each cell of IM2DC and compared to the phase-shifted carrier waveforms to generate device gate signals. As a result, a higher equivalent switching frequency can be achieved, and square wave based arm and AC link waveforms will be generated. In addition, power flow of IM2DC can be controlled by a phase shift angle of the square modulation waveforms between HVS and LVS. The converter cell capacitors can be reduced in size because they are only required to smooth high switching frequency ripple components. In addition, lower TDR can be achieved due to the higher power transferring capability of square waves. |
| US10326380B2 |
Motor drive apparatus with function to detect abnormality in power device
A motor drive apparatus includes: a converter which converts AC power to DC power and to output the DC power to a DC link; an inverter including power devices which converts the DC power to AC power for driving a motor; a capacitor provided in the DC link; a shut-off circuit to open and close an electrical path between the AC power source and the converter; a constant current control unit which performs control in such a manner as to allow a constant current supplied by the capacitor to pass through a detection target power device among the power devices in the inverter; and an abnormality detection unit which detects an abnormality in the detection target power device based on changes in voltage between a collector and an emitter of the detection target power device during a period in which the constant current passes through the detection target power device. |
| US10326379B2 |
Power conversion device
Provided is a power conversion device which suppresses a current unbalance of a plurality of secondary circuit modules provided in parallel and is manufactured in a compact size and at a low cost. The power conversion device of the invention is a DC-DC converter which boosts down and outputs an input voltage, and includes an input circuit which includes a switching element and output circuit modules which include a transformer and a rectifier element. A plurality of the output circuit modules are provided. The plurality of output circuit modules are electrically connected to the input circuit. |
| US10326378B2 |
Inverter assembly
Power inverter assemblies are provided herein for use with motor vehicles. An inverter assembly may have a symmetrical structure configured to convert DC input power to AC output power. The inverter assembly may include a housing enclosing a symmetrical DC input portion, a symmetrical AC output portion, a DC link capacitor, and a gate drive portion having a pair of power modules. The symmetrical DC input portion can include a DC input bus bar sub-assembly to which the DC link capacitor is coupled, and a second DC bus bar sub-assembly that may electrically couple the DC link capacitor with the power modules. The symmetrical AC output portion may include a three phase output AC bus bar sub-assembly to which the power modules can be electrically coupled. A cooling sub-assembly may be provided for cooling the power modules with fluid transfer using a coolant. |
| US10326369B2 |
Method and apparatus for multi-phase DC-DC converters using coupled inductors in discontinuous conduction mode
A converter includes first and second coupled inductors. A first phase includes first high side and low side switches connected to the first inductor. A second phase includes second high side and low side switches connected to the second inductor. In discontinuous conduction mode, the controller determines, in response to the first high side switch being turned on and the second low side switch being turned off, that coupling between the first and second inductors is strong or weak based on whether body diode of the second low side switch will conduct if not prevented from conducting. The controller prevents second low side switch body diode conduction in response to the first high side switch being turned on when the coupling is strong, and does not prevent second low side switch body diode conduction in response to the first high side switch being turned on when the coupling is weak. |
| US10326366B2 |
Zero-voltage switch-mode power converter
A switched-mode power converter includes timing control feedback loop circuits to minimize or eliminate the potential difference across a high-power switch and a low-power switch during their transitions times. A first feedback circuit compares the measured voltage across the high-power switch at the moment the high-power switch closes with the input voltage to the high-power switch to control a low-to-high delay time. A second feedback circuit compares the measured voltage across the low-power switch at the moment the low-power switch closes with the input voltage to the low-power switch to control a high-to-low delay time. A third feedback circuit compares the measured voltage across the low-power switch at the moment the low-power switch opens. The output of the third feedback circuit is provided as inputs to the first and second feedback circuits. The third feedback circuit also controls the frequency of the power converter. |
| US10326363B2 |
Method and apparatus for bypassing current generation in parallel with switching regulator
A device, a circuit, and a method for current bypass are provided. The device includes circuitry detects an overload condition at a switching regulator output, enables a current bypass path including a linear current source in response to detecting the overload condition, and digitizes a difference between a load current and a switching regulator output current. The linear current source generates an active current assist signal based on the digitized difference between the load current and the switching regulator output current. |
| US10326362B2 |
Switching regulator
A switching regulator includes a clamp circuit which clamps the output voltage of the error amplifier to the clamp voltage when an output voltage of an error amplifier is higher than a clamp voltage, a constant voltage generation circuit having one end connected to an output terminal of the error amplifier, and a phase compensation capacitor having one end connected to the other end of the constant voltage generation circuit, and the other end connected to a ground terminal. When the clamp circuit clamps the output voltage of the error amplifier, the constant voltage generation circuit lowers the voltage at one end of the phase compensation capacitor by a prescribed voltage. When the clamped state of the output voltage of the error amplifier is released, the constant voltage generation circuit lowers the voltage of the output terminal of the error amplifier from the clamp voltage by the prescribed voltage. |
| US10326361B2 |
Asynchronous low dropout regulator
A low dropout regulator that produces an output includes a comparison circuit, configured to compare a signal representative of the output and a reference signal to produce a comparison result. The low dropout regulator also includes a loop controller, coupled to the comparison circuit, configured to generate an output circuit control signal based at least in part on the comparison result. The low dropout regulator also includes an output circuit, comprising two or more output stages, configured to adjust a number of active output stages of the two or more output stages based on the output circuit control signal. |
| US10326360B2 |
Power supplying device
A power supplying device is provided to supply power for a plurality of loads. The power supplying device includes a detecting circuit, a controlling circuit, and a constant current circuit. The detecting circuit is electrically connected to a plurality of output terminals, and configured to detect whether the output terminals are electrically connected to the loads. In addition, the detecting circuit is configured to output a detecting signal according to the number of the loads which are connected to the output terminals. The controlling circuit is electrically connected to the detecting circuit, and configured to receive the detecting signal and output a controlling signal according to the detecting signal. The constant current circuit is electrically connected to the controlling circuit and the output terminals, and configured to drive the power supplying device to output the maximum current or part of the maximum current according to the controlling signal. |
| US10326359B2 |
Voltage regulator module using a load-side auxiliary gyrator circuit
The present invention introduces a new compact Voltage Regulator Module (VRM) solution that hybrids a buck converter with a resonant switched-capacitor auxiliary circuit that is connected at the load side. By using a new control concept of the present invention, the auxiliary circuit effectively mimics increased capacitance during loading and unloading transient events, reducing the burden on both the input and output filters, and reduces the current stress. |
| US10326354B2 |
Method and system for DC-DC voltage converters with diminished PWM jitter
An embodiment pertains to a method including determining if an amplitude of an error signal has entered steady state. If the amplitude of the error signal has not entered steady state, then amplify with a high gain the amplitude of the AC component of the error signal. If the amplitude of the error signal has entered steady state, then initiate a timer. Determining if the amplitude of the error signal has remained in steady state while the timer runs. If the amplitude of the error signal has remained in steady state while the timer runs, then amplify with a low gain the amplitude of the AC component of the error signal. |
| US10326351B2 |
Switching regulator and control circuit thereof
A switching regulator includes: a controller power ON reset (POR) circuit, a controller post-POR signal generation circuit, and a pulse width modulation (PWM) signal generation circuit. The controller post-POR signal generation circuit switches the controller post-POR signal to a ready level after a controller pre-POR signal is switched to a controller reset-accomplished level and a driver signal starts switching levels to operate a power switch. The PWM signal generation circuit sets a duty ratio of a PWM signal to a predetermined minimum duty ratio after the controller pre-POR signal is switched to the controller reset-accomplished level and before the controller post-POR signal is switched to a ready level. |
| US10326349B2 |
Magnetic linear actuator
A magnet linear actuator includes a first element and an armature situated on a support, with the armature being movable along a movement axis between a first position engaged with the first element and the second position spaced away from the first element along the movement axis. The actuator further includes a biasing element that biases the armature in a direction generally toward the second position. The first element or the armature is pivotable with respect to the other between a first orientation and a second orientation. In the first orientation, the first element and the armature have a first magnetic attraction to one another that is sufficient to overcome the bias of the biasing element and to retain the armature in the first position. In the second orientation, the first element and the armature have either a magnetic repulsion to one another or a weaker second magnetic attraction. |
| US10326348B2 |
Multi-degree of freedom electromagnetic machine
A multi-degree-of-freedom electromagnetic machine that may be operated as a motor, a generator, or a motor-generator, includes a first structure and a second structure. The first structure comprises a first conductor, a second conductor, and a third conductor, each of which follows a different trajectory. The first, second, and third conductors together form a general shape of a surface. The second structure is disposed adjacent to the first structure and includes a magnet that emanates a magnetic field. The magnet has at least one of its magnetic poles facing the surface. A Lorentz force affects relative movement between the first structure and the second structure when the magnetic field that emanates from the at least one magnetic pole interacts with electrical currents within any of the electrical conductors. |
| US10326340B2 |
Driving apparatus
A driving apparatus having an electric motor configured to rotate a rotating shaft (27) by a supplied current, the driving apparatus comprising: a control board (49) which is positioned relative to the electric motor, and on which electronic components for controlling the electric motor is mounted; a plurality of first terminals (58, 59, 60) which are mounted on the control board (49), the first terminals (58, 59, 60) carrying a current; a plurality of second terminals (44, 45, 46) connected to the respective first terminals (58, 59, 60), the second terminals (44, 45, 46) carrying a current, the second terminals (44, 45, 46) being disposed outside the rotating shaft (27) in a radial direction of the rotating shaft (27) and arranged along a circumferential direction of the rotating shaft (27). |
| US10326338B2 |
Active rectifier for alternator
An active rectifier of a rotary electric machine, in particular an active rectifier for alternators, for example for rectifying alternating currents (AC) to direct currents (DC) for charging batteries on vehicles, is disclosed. The active rectifier may include a plurality of power MOSFET transistors and a detecting and driving circuitry all mounted on a single substrate to form a half-bridge module. A number of at least two and up to N modules may be connected together to serve as a two and up to N-phase rectifier. Each module is connected in a way to rectify currents from one phase of the electric machine and has an individual power supply for the detecting and driving circuitry. The power supply may receive the power from the phase which is being rectified and operates independently of the alternator's voltage regulator. |
| US10326336B2 |
Coolant flow distribution using coating materials
Electronic devices are disclosed including hydrophobic or oleophobic coatings that control coolant flow therein or thereon. In at least one embodiment, an electric machine is provided including a stator core defining a cavity, windings disposed within the cavity and including end windings protruding from the cavity, and one or more layers of an oleophobic coating overlying the end windings and configured to control a flow of coolant over the end windings. A method may include applying one or more layers of a oleophobic coating to end windings of an electric machine stator such that the one or more layers control a flow of coolant over the end windings. The one or more layers may define coolant flow paths, which may direct coolant to areas of the electric machine requiring additional cooling, such as hot spots or neutral points. |
| US10326329B2 |
Canned motor having a high-pressure-resistant can
A pump having a canned motor which has a stator with an internal rotor disposed therein, the stator and the internal rotor being mutually separated fluid-tightly by a can disposed between stator and internal rotor, the stator having stator teeth which extend radially in the direction of the internal rotor and define with appurtenant stator-tooth end faces a receiving space for the internal rotor and the can, the can lying against the stator-tooth end faces, the can having on its surface facing the stator, in stator-tooth gaps which are respectively defined by two mutually adjacent stator teeth, ribs fitted in in a form-locking manner which taper in the radial direction, starting out from a rib root disposed on the can, with regard to a rib thickness defined in the circumferential direction of the can. |
| US10326327B2 |
Claw rotor comprising clip for securing end wire of winding, and associated electrical machine
A claw pole rotor comprises a shaft, first and second polar wheels fastened to the shaft, a winding provided with a winding insulator and surrounded by the first and second polar wheels, a commutator provided with at least one commutator ring, a fan fastened to the first polar wheel and disposed between the winding and the at least one commutator ring, at least one end-of-winding wire being linked to one of the at least one commutator rings, passing through a radial cavity provided between the fan and the first polar wheel. The winding insulator comprises a clip retaining the one end-of-winding wire. The retaining clip is fastened to the winding insulator and comprising crimping means intended to be disposed in the radial cavity to crimp the part of the end-of-winding wire extending into the radial cavity. |
| US10326326B2 |
IPM machine with specialized winding for automotive electric vehicles
Certain aspects relate to designs for an interior permanent magnet (IPM) electrical machine stator having a plurality of continuous windings wound through the stator. Compared to existing designs, the disclosed stator design has an increased number of parallel conductors, an increased number of conductors per slot, increased tooth and slot width and number, and more compacted conductors, resulting in reduction in core losses, reduction in conductor losses, reduced harmonics in flux density, and improved winding reliability. |
| US10326324B2 |
Rotor and motor
A rotor includes a first rotor core, a second rotor core, a permanent magnet and a resin layer. The first rotor core includes a first core base and first claw-shaped magnetic poles arranged at equal intervals on a peripheral portion of the first core base. The second rotor core includes a second core base and second claw-shaped magnetic poles arranged at equal intervals on a peripheral portion of the second core base. The first rotor core and the second rotor core are combined with each other so that the first and second core bases are opposed to each other and the first and second claw-shaped magnetic poles are alternately arranged in the circumferential direction of the rotor. The permanent magnet includes at least a main field magnet. The main field magnet is located between the first and second core bases in the axial direction, and is magnetized in the axial direction. The main field magnet causes the first claw-shaped magnetic poles to function as first magnetic poles, and causes the second claw-shaped magnetic poles to function as second magnetic poles. The resin layer covers at least a portion of a surface of the permanent magnet. |
| US10326323B2 |
Multi-component rotor for an electric motor of an appliance
A motor for a laundry appliance includes a drive shaft coupled to a drum at a first end. The rotor frame is coupled proximate the second end of the drive shaft, where the rotor frame includes at least one polymeric material. A central hub includes a core and a perimetrical ring that extends circumferentially around the core. A plurality of recesses are defined within a planar surface of the perimetrical ring, wherein a portion of the polymeric material is received within the plurality of recesses to secure the rotor frame to the central hub. |
| US10326321B2 |
Stator and motor using the same
A stator which may enhance processability and manufacturing efficiency and a motor using the same are provided according to an embodiment of the present invention. Particularly, a stator which includes a plurality of unit stator cores which are provided with a tooth protruding from a head portion, an insulator coupled to the unit stator core, and a guide portion having a terminal mounting groove provided at an upper end of the insulator, is provided. |
| US10326317B2 |
Method for foreign object detection for an induction charging device and induction charging device
A method for foreign object detection for an induction charging device is described, including an oscillator circuit, in particular, for a hand-held power tool, a resonance frequency and an associated actual quality of the oscillator circuit being detected and the actual quality is subsequently compared to a setpoint quality as a function of the resonance frequency and a decision is made about the presence of a foreign object based on a defined setpoint quality range. The method provides that an upper limit and/or a lower limit of the setpoint quality range and the profile of the actual quality are adapted to one another. Also described is an induction charging device including an oscillator circuit and a control and regulating unit for carrying out the method. |
| US10326312B2 |
Apparatus and method of charging mobile terminal using energy harvesting device
An apparatus for charging a mobile terminal includes an energy harvesting device provided in shoes and generating energy generated by a movement of a human body, a charge control module attached to trousers and controlling charging of a mobile terminal using energy harvested by the energy harvesting device, and a resonant coil module wirelessly transmitting energy harvested by the energy harvesting device to the charge control module, wherein the resonant coil module includes a transmission resonant coil unit provided in the shoes and a reception resonant coil unit provided in the trousers, spaced apart from the transmission resonant coil unit by a predetermined distance, and magnetically coupled to the transmission resonant coil unit. |
| US10326309B2 |
Wireless power system comprising power transmitter and power receiver and method for receiving and transmitting power of the apparatuses
Provided is a transmitter in a wireless power transmission system, the transmitter including a Transmission (Tx) power converter for converting a Direct Current (DC) voltage into a first Alternating Current (AC) voltage, and converting the converted first AC voltage into a second AC voltage by amplifying the converted first AC voltage, a Tx matching circuit for matching an impedance thereof with that of a receiver for receiving the second AC voltage to transmit the second AC voltage, a Tx resonator for resonating the second AC voltage into resonant waves to transmit the second AC voltage to the receiver, and a Tx controller for determining an amplification rate of the first AC voltage and controlling the Tx power converter to convert the first AC voltage into the second AC voltage according to the determined amplification rate. |
| US10326308B2 |
Power transmitting apparatus, power receiving apparatus, control methods therefor, program, and computer-readable storage medium
A power transmitting apparatus transmits power by a first wireless power transmission method, transmits power by a second wireless power transmission method, detects a wireless power transmission method supported by a power receiving apparatus, and determines whether power is transmitted to a first power receiving apparatus by the first power transmission method or the second power transmission method, based on a detected wireless power transmission method supported by the first power receiving apparatus and a detected wireless power transmission method supported by a second power receiving apparatus. |
| US10326307B2 |
Electronic apparatus and operating method thereof
An electronic apparatus and its operating method are provided. The electronic apparatus and its operating method can be configured to drive the capacitor, to detect the received power, and stop driving the capacitor. |
| US10326303B2 |
Transfer switch
A transfer switch transfers electric power provided to an electrical load from a first power source to a second power source. The transfer switch includes a coil arrangement that controls movement of a member to open or close a contactor of the first or second power source. The coil arrangement may be used with two voltage levels. |
| US10326301B2 |
Two-level LED security light with motion sensor
A two-level LED security light with a motion sensor. At night, the LED security light is turned on for a low level illumination. When the motion sensor detects any intrusion, the LED security light is switched from the low level illumination to a high level illumination for a short duration time and then returns to the low level illumination for saving energy. The LED security light includes a power supply unit, a light sensing control unit, a motion sensing unit, a loading and power control unit, and a lighting-emitting unit and at least one external control unit electrically coupled to a controller of the loading and power control unit to receive and convert at least an external control signal into a message signal interpretable by the controller for adjusting at least an operating parameter or changing at least an illumination mode of the two-level LED security light. |
| US10326299B2 |
Moveable surface power delivery system
A method and system for delivering power from an aircraft power system to a tray table is provided. The system may include a moveable assembly in connection with the tray table. Cable may be routed to each tray table through the moveable assembly. The power is processed into a useable form for electronics mounted in the tray table. The tray table may include a wireless charger, and may harvest data from user electronics. The tray table may also push data to the user's electronics. The system may include a wireless communications client to take advantage of the wireless inflight entertainment (IFE) system on board many transportation platforms. |
| US10326297B2 |
Charging system, charging method, and power adapter
The present disclosure discloses a charging system, a charging method and a power adapter. The system includes a power adapter and a terminal. The power adapter includes a first rectifier unit, a switch unit, a transformer, a second rectifier unit, a sampling unit, a control unit and a first isolation unit. The control unit outputs a control signal to the switch unit, and adjusts a duty ratio of the control signal according to a current value and/or voltage value sampled by the sampling unit, such that a third voltage with a third pulsating waveform outputted by the second rectifier unit meets a charging requirement. The terminal includes a battery. When the terminal is coupled to the power adapter, the third voltage is applied to the battery. |
| US10326294B2 |
System and method for green battery conditioning
An information handling system includes an information handling subsystem, a power supply unit operably connected to the information handling subsystem, and a battery power subsystem operably connected to the information handling subsystem and having a controller. The controller configured to enter a learning mode of the battery power subsystem when the information handling subsystem is in a normal power state, enable a regulator output of a regulator of the battery power subsystem to provide power from a battery of the battery power subsystem at a learning mode current limit and at a learning mode voltage level to the information handling subsystem, provide, via the regulator output, power from the battery at a constant learning mode current level and at the learning mode voltage level to the information handling subsystem, and determine that the battery has been discharged to an acceptable discharge level. |
| US10326292B2 |
Battery charger operating method and method usable with plural different power supplies
A method for charging a battery may comprise: setting an initial low charge current level; repetitively interrupting charging in a periodic cycle, and: measuring an open circuit battery voltage when charging is interrupted, determining from the open circuit battery voltage a corresponding predetermined charging current; applying the predetermined charging current; and repeating the periodic cycle. A method may also comprise: setting an initial charge current level, measuring the supply voltage, and decreasing the charge current level if the measured supply voltage is less than a predetermined voltage. |
| US10326290B2 |
Power converting device and method of controlling power converting device
A power converting device converts any of DC voltages outputted from at least two DC power supplies and outputs a converted voltage. A control unit of the power converting device determines whether a first contact and a second contact of a switch are melted and joined together based on a detection signal, before a second DC power supply outputs a second DC voltage. |
| US10326289B2 |
Rechargeable device with short circuit prevention
A rechargeable handheld electrically operated smoking device is provided, including a rechargeable power source; a first charging contact connected to the power source by a MOSFET voltage-controlled switch having a source, drain, and gate terminals; an operational amplifier including a non-inverting input connected to the source terminal, an inverting input connected to the drain terminal, and an output connected to the gate terminal; and a second charging contact connected to the power source, the switch being configured to prevent current flow between the first charging contact and the power source through the switch when a voltage difference therebetween is lower than a first threshold voltage, the device being configured to amplify a voltage difference between the source and drain terminals and apply it to the gate terminal, closed loop feedback is applied to the inverting input, and a biasing resistor is connected between the inverting input and electrical ground. |
| US10326287B2 |
Multiple battery cell monitor having shared control lines and balance switch
Battery systems that can monitor and control multiple battery cells in electronic devices. One embodiment provides a battery system having multiple battery cells controlled by a single battery controller. Each battery cell is connected to a first end of a control path, a second end of the control path is connected to either a positive terminal or a negative terminal of the battery system. Each control path includes a charge control transistor that allows or prevents charging of a battery cell, a discharge control transistor that allows or prevents discharging of a battery cell, and a current sense resistor to sense currents into or out of a battery cell. The charge control transistor and the discharge control transistor can be controlled by control outputs provided by the battery controller. The battery controller also includes a balance switch to provide a low-impedance path between battery cells to reduce offset voltages between them. |
| US10326285B2 |
Charging device, battery device, and method
A charging device that charges a battery device is provided. The battery device includes a memory that stores first degradation information indicating a degradation state of the battery device. The charging device includes: a voltage detection unit that detects a voltage of the battery device; and a control unit that (a) receives the first degradation information from the battery device, (b) determines degradation progress information indicating a progress degree of the degradation state of the battery device, by using a voltage detected by the voltage detection unit, (c) generates second degradation information indicating a degradation state of the battery device, by using the degradation progress information and the first degradation information, and (d) transmits the second degradation information to the battery device to cause the battery device to store the second degradation information in the memory. |
| US10326284B2 |
Control module for DC power network
A power distribution and control module includes a digital data processor and associated memory module operating an energy management program or schema and a battery charging manager program thereon. The energy management schema is operable to determine an instantaneous configuration of the power and distribution and control module, to determine total instantaneous input power available, total instantaneous power demand by connected power loads and to allocate a portion of the input power to power the loads. Thereafter any unallocated power is allocated to charge rechargeable batteries using allocation criteria that are situationally variable. |
| US10326283B2 |
Converter intuitive photovoltaic electrical energy power system
Renewable electrical energy is provided with aspects and circuitry that can harvest maximum power from an alternative electrical energy source (1) such as a string of solar panels (11) for a power grid (10). Aspects include: i) controlling electrical power creation from photovoltaic DC-AC inverter (5), ii) operating photovoltaic DC-AC inverter (5) at maximal efficiency even when MPP would not be, iii) protecting DC-AC inverter (5) so input can vary over a range of insolation and temperature, and iv) providing dynamically reactive capability to react and assure operation, to permit differing components, to achieve code compliant dynamically reactive photovoltaic power control circuitry (41). With previously explained converters, inverter control circuitry (38) or photovoltaic power converter functionality control circuitry (8) configured as inverter sweet spot converter control circuitry (46) can achieve extraordinary efficiencies with substantially power isomorphic photovoltaic capability at 99.2% efficiency or even only wire transmission losses. |
| US10326279B2 |
Subharmonic power line carrier based island detection systems and methods
Systems and methods for identifying an island condition in a power distribution system and disconnecting distributed generators in the case of islanding. The systems and methods are used to enable reliable detection of island formation with high false-trip immunity, for any combination of distributed energy resources, and for distributed energy resources using grid support functions. |
| US10326278B2 |
System for tracking and allocating renewable energy contributions to a modular renewable energy system
A modular photovoltaic (PV) array system includes a PV array installed onto a fleet vehicle such as a trailer, bus etc., a host control system into which a plurality of fleet vehicles can connect to collectively generate electricity, and a subscriber system which collectively tracks energy generation and allocates respective contributions to the system. |
| US10326273B2 |
Surge suppression system for medium and high voltage
A system of surge suppressor units is connected at multiple locations on a power transmission and distribution grid to provide grid level protection against various disturbances before such disturbances can reach or affect facility level equipment. The surge suppressor units effectively prevent major voltage and current spikes from impacting the grid. In addition, the surge suppressor units include various integration features which provide diagnostic and remote reporting capabilities required by most utility operations. As such, the surge suppressor units protect grid level components from major events such as natural geomagnetic disturbances (solar flares), extreme electrical events (lightning) and human-generated events (EMPs) and cascading failures on the power grid. |
| US10326272B2 |
Unified power flow controller utilizing energy saving devices at a point of power consumption
A system and method are provided for regulating voltage received from an electric utility grid. A unified power flow controller is provided at a point of power consumption and includes a terminal electrically coupled to a power source, which receives a grid alternating current and a grid alternating voltage from the electric utility grid. A power converter is electrically coupled to the terminal and includes an active rectifier that converts substantially all of the grid alternating current to a direct current and an inverter that converts the direct current to a load alternating current and a load alternating voltage, the load alternating voltage being less than the grid alternating voltage. A transformer is provided having first terminals electrically coupled to the power source and second terminals electrically coupled to an output of the inverter. The transformer injects the load alternating voltage in series with the grid alternating voltage. |
| US10326270B2 |
DC power transmission device, DC power reception device, and DC power transmission system
[Object] To provide a DC power transmission device capable of supplying properly a previously agreed amount of power between the power transmission side and the power reception side when customers supply power to each other.[Solution] Provided is the DC power transmission device including: a power supply request acquisition unit configured to acquire a power supply request from a DC power reception device, the DC power reception device being configured to receive DC power from a DC bus line; and a transmission power decision unit configured to decide a parameter of DC power to be outputted to the DC power reception device via the DC bus line based on the power supply request and a characteristic of a power storage device, the power storage device being configured to supply DC power to the DC bus line. The parameter includes power transmission time of DC power that reflects a power transmission loss occurred until DC power reaches the DC power reception device. |
| US10326269B2 |
Fault current limiter system with current splitting device
A fault current limiter system including a fault current limiter and a variable shunt current splitting device. The current splitting device includes first and second conductive windings, wherein the first conductive winding is connected in parallel with the fault current limiter and is configured to carry current in a first direction. The second conductive winding is electrically connected in series with the fault current limiter and is configured to carry current in a second direction opposite to the first direction so that the reactance of the first winding is negated by the reactance of the second winding during steady state operation of the fault current limiter system. Thus, a first portion of a steady state current is conveyed through the fault current limiter and a second portion of the current is conveyed through the current splitting device. The steady state current load on the fault current limiter is thereby reduced. |
| US10326268B2 |
Circuit reliability improvement by detecting and mitigating high voltage transient event at supply
A circuit reliability system with a first voltage supply for outputting a first voltage and a second voltage supply for outputting a second voltage. The system also includes: (i) at least one node for providing a potential in response to the first voltage and the second voltage; (ii) monitoring circuitry for detecting the first voltage exceeding a threshold; and (iii) disabling circuitry, for disabling the second voltage supply in response to the monitoring circuitry detecting the first voltage exceeding a threshold. |
| US10326267B2 |
Method and apparatus for protecting a polarity sensitive load
Provided herein are improved apparatuses and methods for protecting polarity sensitive loads in DC power circuits that include a power source, a relay coupled to the power source, and a polarity sensitive load coupled to the relay. A diode can be coupled between the power source and the relay. When the power source provides a DC voltage of a desired polarity, the diode can block a current from flowing to a coil of the relay. Consequently, the relay can provide a current path to the polarity sensitive load. When the power source provides a DC voltage of an incorrect or reverse polarity, the diode can allow a current to flow to the coil of the relay. In turn, the coil of the relay can be energized, causing the relay to disrupt the current path provided to the load, thereby protecting the polarity sensitive load from the reverse polarity condition. |
| US10326265B2 |
Method for limiting the current in devices of “H-bridge” type
A method for limiting the current in a device of “H-bridge” type having a plurality of transistors including the following steps: detection of a failure in a transistor from among the plurality of transistors; disabling of the transistor in which a failure has been detected; detection in the transistors opposite to the transistor, of the discharging of the energy accumulated at output; and disabling of the other transistors of the plurality of transistors. A system for limiting the current in a device of “H-bridge” type having a plurality of transistors is also disclosed. |
| US10326264B1 |
Auto-monitoring redundancy for enhanced miniature circuit breaker reliability
Systems and methods for auto-monitoring a trip solenoid and a switching semiconductor in a circuit breaker comprises determining whether the trip solenoid or the switching semiconductor is open-circuited or otherwise non-operational. The trip solenoid has multiple windings therein and the switching semiconductor has multiple semiconductor switches therein. The circuit breaker automatically performs a designated action if one of the multiple windings or one of the semiconductor switches is determined to be open-circuited or otherwise non-operational. In some embodiments, the circuit breaker is a miniature circuit breaker. |
| US10326263B2 |
Electrical unit adapted to quick install an electrical outlet, breaker box without direct attachment of electrical cables
Disclosed is an electrical unit which is adapted to quick connect electric cables directly to a gang box. The electrical unit allows quick connect of an electrical outlet to the gang box without electrical wires. Further, the electrical outlet having energizable screws. The electrical unit includes plurality of receiving clamps and plurality of receiving prong. The plurality of receiving clamps energize the gang box directly from the cable wires. The neutral wire, ground wire and the supply wire energize the gang box. The plurality of receiving prongs configured on the inside walls of the gang box to directly connect with the receiving clamps with no electrical wiring. The first receiving prong, the second receiving prong and the third receiving prong is configured to press against at least one electrical outlet energizable screw to create a neutral connection, ground connection and a supply connection respectively between the neutral receiving clamp, ground receiving clamp and the supply receiving clamp respectively and the electrical outlet. Further, the electrical unit is adapted to quick connect electric cables directly to a breaker box, a gang box and an electrical outlet. The electrical outlet receives power directly from the electrical cable through the receiving clamps and the receiving prongs with substantially less manual wiring requirements the gang box. The electrical cable receives power directly from the power supply cable through the breaker via the second receiving clamps and the second receiving prongs without manual wiring requirements inside the breaker box. |
| US10326257B2 |
Semiconductor laser device and manufacturing method of the same
A semiconductor laser device having a diffraction grating is disclosed. The semiconductor laser device comprises a first diffraction grating provided on a substrate, a second diffraction grating continuous to one end of the first diffraction grating along an optical waveguide direction, and an active layer provided above the first diffraction grating. The second diffraction grating has a pitch 1.05 times or greater, or 0.95 times or smaller of the pitch of the first diffraction grating. |
| US10326256B2 |
Surface emitting laser and atomic oscillator
A surface emitting laser includes a substrate, a stacked structure provided on the substrate and including a resonator and a first distortion applier connected to the resonator and applying distortion to the active layer, and a second distortion applier provided on the substrate and applying distortion to the active layer. As seen from a stacking direction, the first distortion applier has a first portion and a second portion provided with the resonator in between, as seen from the stacking direction, a longitudinal direction of the second distortion applier and a longitudinal direction of the first distortion applier are the same direction, and a magnitude relationship of a linear expansion coefficient of the second distortion applier to a linear expansion coefficient of the substrate is the same as a magnitude relationship of a linear expansion coefficient of the first distortion applier to the linear expansion coefficient of the substrate. |
| US10326251B2 |
Ultra-low noise mode-locked laser, methods, and applications
A mode-locked laser (MLL) that produces ultra-low phase noise optical and RF outputs, includes two nested resonant optical cavities including an optical fiber-based cavity and an etalon, and a three bandwidth Pound-Drever-Hall (PDH) frequency stabilizer assembly incorporating three different optical bandpass filters. The optical fiber-based cavity is characterized by a free spectral range, FSRfiber, and the etalon is characterized by a free spectral range, FSRfilter, wherein FSRfilter/FSRfiber is an integer equal to or greater than 2. A method of generating ultra-low phase noise optical and RF outputs is disclosed. Optical and RF outputs have a phase noise that is less than −100 dBc/Hz at 1 Hz and less than −150 dBc at 10 KHz. |
| US10326247B2 |
Smart quick connect device for electrical fixtures
A device for connecting an electrical fixture with electrical power supply wiring, and for mounting the fixture on a support includes a plug, a socket, and a sensing unit for at least one of wirelessly communicating a sensed condition and wirelessly receiving a signal, with the sensing unit electrically coupled to at least one of the plug and socket. The socket includes a socket body having at least one internal cavity therein with an electrically conductive contact terminal disposed within the cavity for establishing an electrical connection between the electrical power supply wiring and the socket. The plug is rigidly fixed to the fixture and insertable into the socket, with the plug having at least one male connector electrically connected to the fixture and engageable with the contact terminal within the socket to establish a circuit between the electrical fixture and the electrical power wiring. A releasable latch is carried on the combination of the plug and the socket for releasably mounting the fixture on the support. |
| US10326246B2 |
Electrical connector with filtering function
An electrical connector with filtering function includes a high-speed interface, a filter module and a hood. The high-speed interface includes an insulating body and connecting terminals; the filter module is installed at a rear end of a circular cross-section of the insulating body; the filter module includes a lid with output terminals and grounding terminals and a horizontally configured PCB; and the grounding terminals include a first connecting end electrically connected to the PCB and a second connecting end integrally connected to the first connecting end and attached onto the external surface of the lid. The hood covers the lid and has a screw hole corresponding to the second connecting end for a locking screw being screwed in, and press tightly at the second connecting end to achieve the grounding and shielding of the PCB by the grounding terminal and the electrical connection of the locking screw to the hood. |
| US10326244B2 |
Electrical connector and electrical contact configured to reduce resonance
Electrical connector includes a connector housing and a plurality of electrical contacts coupled to the connector housing. Each of the electrical contacts includes a base section coupled to the connector housing and an elongated mating pin coupled to the base section. The mating pin extends away from the base section along a longitudinal axis to a contact end of the mating pin. The mating pin has an exterior surface that forms a runway configured to intimately engage another contact during a mating operation. The runway includes a wipe zone, a resonance-control zone, and a mating zone. The resonance-control zone is located between the mating zone and the wipe zone. The resonance-control zone has a greater elevation than an elevation of the wipe zone and an elevation of the mating zone such that the resonance-control zone deflects the other contact further away during the mating operation. |
| US10326231B2 |
Modular power supply for engagement with a power cord
A modular power supply for connecting to a power cord includes a housing defining an interior, a cover releasably engaged to the housing to enclose the interior, and a carrier plate within the interior including opposed primary channels configured to receive the power cord. A control assembly is within the interior and includes a logic controller electrically coupled to spikes extending outside of the control assembly and through the primary channels, as well as a charging port electrically coupled to the spikes via the logic controller. The cover is applicable to the carrier plate so as to define a hold that captures the power cord on the spikes in the primary channels when the power cord is applied to the primary channels. |
| US10326226B2 |
Contact with a first cylindrical section, a second cylindrical section, and a transition section and a connector using the same
A contact comprises a first cylindrical section, a second cylindrical section, and a transition section connected between the first cylindrical section and the second cylindrical section. The first cylindrical section has a first peripheral wall with a first diameter and a first protrusion rib disposed on the first peripheral wall. The second cylindrical section has a second peripheral wall with a second diameter less than the first diameter and a second protrusion rib disposed on the second peripheral wall. |
| US10326220B1 |
Magnetically attached electrical connection for a portable device
Presented is an electrical connection mechanism designed to attach magnetically to a portable electronic device. The mechanism is designed specifically for a cylindrical device which incorporates a pushbutton switch. Battery-operated flashlights, laser-pointers and active styli are devices well suited for use with this device. In one embodiment, the device is a portable herbal vaporizer. |
| US10326219B2 |
Connector with a locking mechanism, moveable collet, and floating contact means
A coaxial cable termination device including a barrel having opposed front and rear ends, a collet at the front end of the barrel, and a sleeve mounted over the barrel for reciprocal movement. The sleeve moves between a retracted position, in which the sleeve allows compression of the collet, and an advanced position, in which the sleeve urges compression of the collet. In some embodiments, a locking mechanism locks the sleeve into either of the advanced and retracted positions. In some embodiments, contact means carried loosely within the device maintain contact between the barrel and a mating post to which the device is applied. |
| US10326210B2 |
Enhanced directivity feed and feed array
Disclosed is a shaped horn in conjunction with a dielectric tube for enhanced aperture directivity that can achieve a near optimum efficiency. The shaped horn provides additional mode control to provide an improved off-axis cross-polarization response. The horn shape can be individually optimized for isolated horns or for horns in a feed array. The feed array environment can produce results that lead to a different optimized shape than the isolated horn. Lower off axis cross-polarization can result in improved efficiency and susceptibility to interference. |
| US10326206B2 |
Antenna structure with dielectric loading
An antenna structure is described. The antenna structure includes a first set of conductive elements that form a first portion of the antenna structure, the first set of conductive elements being formed on a first layer of a multi-layer printed circuit board, and a second set of conductive elements that form a second portion of the antenna structure, the second set of conductive elements being formed in parallel to the first set of conductive elements on a second layer of the multi-layer printed circuit board, wherein the first layer and the second layer are inner layers of the multilayer printed circuit board. An apparatus that uses the antenna structure is also described. |
| US10326201B2 |
Antenna apparatus and antenna excitation method
There are provided a communication excitation distribution calculating unit (11) that calculates an excitation distribution W1(t) of a communication beam using an excitation phase distribution S that directs a main lobe of the communication beam in a communication direction; an interference excitation distribution calculating unit (14) that calculates an excitation distribution W2(t) of an interference beam using an excitation phase distribution D that forms a null of an antenna pattern in the communication direction; and an excitation distribution combining unit (20) that combines the excitation distribution W1(t) of the communication beam and the excitation distribution W2(t) of the interference beam. An amplitude/phase controlling unit (30) controls amplitudes and phases of carrier signals to be provided to element antennas (3-1) to (3-K), in accordance with the combined excitation distribution obtained by the excitation distribution combining unit (20). |
| US10326198B2 |
Household appliance wireless communication network adapter
The present invention relates to a household appliance which can be remotely controlled by way of remotely connecting in a wireless communication network. The present invention more particularly relates to a household appliance with a network communication adapter improved in terms of its technical parameters. A household appliance is disclosed, comprising a wireless communication network adapter with an embedded planar antenna in the form of conductor lines integrated into a printed circuit board, the antenna comprising a radiating unit and a ground plane. |
| US10326191B2 |
Spatial power combiner
A spatial power combiner includes several inputs to which are respectively linked a plurality of transmission lines, and an output. A body defines a cavity and the plurality of transmission lines pass longitudinally through the cavity and are disposed around an absorbent member also extending longitudinally in the cavity. A power amplification set includes the spatial power combiner and an amplification structure at the input of the spatial power combiner. |
| US10326189B2 |
Ortho-mode transducer and diplexer
A method includes receiving, through a vertical polarization port of an orthogonal-mode transducer (OMT), a vertical polarized signal from a vertical polarization diplexer, and receiving, through a horizontal polarization port of the OMT, a horizontal polarized signal from a horizontal polarization diplexer. The method also includes receiving, through a common port of the OMT, a circular polarized signal comprising the vertical and horizontal polarized signals. The common waveguide includes a septum polarizer configured to split or combine between the circular polarized signal, and the vertical polarized signal and the horizontal polarized signal. |
| US10326186B2 |
Apparatus for cooling battery
An apparatus for cooling a battery includes a cooling channel disposed to exchange heat with a battery module by cooling water and provided with an inlet into and an outlet through which the cooling water is introduced and discharged; branch channels formed in the cooling channel to be branched in parallel with a longitudinal direction of the cooling channel to make the cooling water introduced through the inlet flow toward the outlet while the cooling water passes through the branch channels; and a plurality of flow guides disposed between the inlet and the branch channels at a predetermined interval along a direction in which the branch channels are branched and guiding the flow of cooling water introduced through the inlet to allow the cooling water to be uniformly introduced into the respective branch channels. |
| US10326180B2 |
Submodule for high voltage battery
A submodule for high voltage batteries, in which a voltage sensing module and an electrode tap of a high voltage battery cell are elastically coupled to each other, thereby protecting the high voltage battery cell from an external force and preventing a contact defect between the electrode tap and the voltage sensing module. A pair of fastening holes, allowing a pair of first bending portions to communicate with each other are also provided. The voltage sensing module includes a first sensing module bolt-fastened to the pair of fastening holes and electrically connected to the first electrode tap and a second sensing module disposed in a direction opposite to the first sensing module, fastened to the pair of second bending portions through hook coupling, and electrically connected to the second electrode tap. |
| US10326179B2 |
Method and device for monitoring a state of at least one predetermined battery cell of a battery
A method for monitoring a state of at least one predetermined battery cell of a battery having a number of series-connected or series-connectable battery cells. In one example, the method includes placing the battery, during a first phase, into a first state in which the battery cells in each case have a predefined charging state, discharging the battery, which is in the first state, during a second phase following the first phase, charging the battery during a third phase, following the second phase, up to a point in time at which at least one battery cell of the battery has the predefined charging state, detecting the voltage provided by the at least one predetermined battery cell at least temporarily, and determining information for detecting the state of the at least one predetermined battery cell by evaluating the detected voltage. |
| US10326178B2 |
Battery pack
A battery pack having a housing and a secondary battery inside the housing, and including a communicator that receives an instruction related to the secondary battery from an external communication terminal device via short-distance wireless communication and a controller that executes an operation in accordance with the instruction by using a status of the secondary battery. The external communication terminal device, by transmitting to the battery pack the instruction, which is related to the status of the secondary battery, acquires a response that is in accordance with the status of the secondary battery from the battery pack, thereby facilitating checking of secondary battery state. |
| US10326177B2 |
Apparatus for controlling the charging of electric vehicle
An apparatus for controlling charging of an electric vehicle includes a switch unit including a first relay and second relays, wherein the first relay is arranged on an electric line through which a first battery is connected in series to a second battery. The first and second batteries supply driving power of the electric vehicle. The plurality of second relays is arranged on charging lines through which charging power is supplied to the first battery and the second battery, respectively. Further, a control unit configured to control the first relay and the plurality of second relays such that the first relay is turned off and the plurality of second relays is turned on to supply the charging power of a charger connected to a charging terminal to the first battery and the second battery, respectively, when the first battery and the second battery are charged. |
| US10326166B2 |
Gel electrolytes and precursors thereof
An example of a gel electrolyte precursor includes a lithium salt, a solvent, a fluorinated monomer, a fluorinated crosslinker, and an initiator. Another example of a gel electrolyte precursor includes a lithium salt, a solvent, and a fluorinated monomer, wherein the fluorinated monomer is methyl 2-(trifluoromethyl) acrylate, tert-butyl 2-(trifluoromethyl)acrylate, or a combination thereof. A gel electrolyte formed from either gel electrolyte precursor may be incorporated into a lithium-based battery. |
| US10326165B2 |
Silicon-based solid electrolyte for rechargeable battery
The present application discloses s an electrochemical cell (battery) comprising a hydrogen storage negative electrode (anode), a positive electrode (cathode) and a solid proton-conducting electrolyte in contact with the electrodes. The solid proton-conducting electrolyte comprises a silicon material which comprises at least 35 at % silicon. |
| US10326164B2 |
High-conduction GE substituted LiAsS4 solid electrolyte
A solid electrolyte for a lithium battery includes Li3+xGexAs1-xS4 where x=0 to 0.50. The value of x can be a range of any high value and any lower value from 0 to 0.50. For example, x can be 0.25 to 0.50, and x can be 0.3 to 0.4, among many other possible ranges. In one embodiment x=0.33 such that the solid electrolyte is Li3.334Ge0.334As0.666S4. A solid electrolyte for a lithium battery can include LiAsS4 wherein ½ to ⅔ of the As is substituted with Ge. A lithium battery and a method for making a lithium battery are also disclosed. |
| US10326158B2 |
Battery module
Disclosed herein is a cylindrical battery module that is capable of effectively discharging heat generated from cylindrical battery cells to the outside and that is capable of stably supporting the battery cells. The cylindrical battery module includes an upper plate provided with a plurality of battery holders for receiving and fixing cylindrical battery cells, the battery holders protruding upward from the upper plate by a predetermined height, a lower plate located under the upper plate, the lower plate being provided with a plurality of battery holders for receiving and fixing cylindrical battery cells, the battery holders protruding downward from the lower plate by a predetermined height, and a middle plate and a cooling plate located between the upper plate and the lower plate. |
| US10326157B2 |
Modified solid oxide fuel cell
A solid oxide fuel cell comprising a cathode, an electrolyte, a functional layer and an anode support. The anode support comprises A-B-C: A is a nitrate, an oxide, a salt or a carbonate selected from the group of: alkali, alkaline oxide, alkaline earth metal or combinations thereof, B is selected from the group of: Fe, Ni, Cu, Co or combinations thereof, and C is selected from the group of: PSZ, YSZ, SSZ, SDC, Ce doped SSZ, GDC or combinations thereof. In the solid oxide fuel cell A ranges from about 0 to about 20 wt % of the anode support, B ranges from about 0.1 to about 70 wt % of the anode support and C ranges from about 0.1 to about 60 wt % of the anode support. |
| US10326153B2 |
System and method for returning material from the Br2 side of an H2/Br2 flow battery back after crossover
A flow battery system includes a first tank having a hydrogen reactant, a second tank having a bromine electrolyte, at least one cell including a hydrogen reactant side operably connected to the first tank through an ¾ feed and return system and a bromine electrolyte side operably connected to the second tank, and a crossover return system. The crossover return system includes a vessel operably connected to the ¾ feed and return system and configured to receive an effluent containing a first portion of the hydrogen reactant and a second portion of the bromine electrolyte, the vessel configured to separate the first portion from the second portion. A first return line returns the first portion of the hydrogen reactant to the first tank and a second return line returns the bromine electrolyte to the second tank. |
| US10326152B2 |
System for measuring the hygrometry of an ion exchange membrane in a fuel cell
A system for measuring a moisture content of an ion-exchange membrane in a fuel-cell stack is provided. The fuel-cell stack includes N electrochemical cells separated by bipolar plates, with N being a natural integer. The system includes a current generator, a voltage measurement device, and an impedance measurement device. The current generator enables a current to be applied to the fuel-cell stack. The voltage measurement device measures voltages of the cells of the fuel-cell stack. The impedance measurement device determines an impedance of an ion-exchange membrane according to a voltage ripple measured by the voltage measurement device across terminals of a corresponding one of the cells of the fuel-cell stack when the current is applied by the current generator. The impedance measurement device is installed in the voltage measurement device. |
| US10326150B2 |
Fuel cell module, fuel cell stack, and method for producing fuel cell module
A fuel cell module includes an electrode membrane assembly and a pair of separators. The electrode membrane assembly includes an electrode portion and a pair of gas diffusion layers. The electrode portion includes a polymer electrolyte membrane, an anode electrode formed on a first surface of the polymer electrolyte membrane, and a cathode electrode formed on a second surface of the polymer electrolyte membrane. One of the pair of gas diffusion layers is in contact with an anode surface of the electrode portion at which the anode electrode is disposed, and the other is in contact with a cathode surface of the electrode portion at which the cathode electrode is disposed. The separators sandwich the electrode membrane assembly from respective the anode surface and the cathode surface. The electrode membrane assembly and each separator are adhered to each other by a plurality of resin portions. |
| US10326149B2 |
Fuel cell system with interconnect
The present invention includes a fuel cell system having a plurality of adjacent electrochemical cells formed of an anode layer, a cathode layer spaced apart from the anode layer, and an electrolyte layer disposed between the anode layer and the cathode layer. The fuel cell system also includes at least one interconnect, the interconnect being structured to conduct free electrons between adjacent electrochemical cells. Each interconnect includes a primary conductor embedded within the electrolyte layer and structured to conduct the free electrons. |
| US10326144B2 |
Hygrophobic conductor layer for electrochemical cell
The present application relates to a layer of an oxidant electrode having hygrophobic and current collecting properties, and electrochemical metal-air cell utilizing the same. |
| US10326140B2 |
Nonaqueous electrolyte battery, battery pack, and vehicle
According to one embodiment, a nonaqueous electrolyte battery including a negative electrode that includes a negative electrode current collector and a negative electrode mixed-materials layer is provided. The negative electrode mixed-materials layer includes a titanium-including metal oxide particle that includes a phase including a carbon material on a surface and a binder that includes an acrylic resin. The negative electrode satisfies Equation (I): α/β>6 (I) α is a peel strength (kN/m) between the negative electrode current collector and the negative electrode mixed-materials layer, and β is a cutting strength (kN/m) in the negative electrode mixed-materials layer. |
| US10326135B2 |
Doped conversion materials for secondary battery cathodes
Battery systems using doped conversion materials as the active material in battery cathodes are provided herein. Doped conversion material may include a defect-rich structure or an amorphous or glassy structure, including at least one or more of a metal material, one or more oxidizing species, a reducing cation species, and a dopant. Methods for fabricating batteries and battery systems with doped conversion material are also provided herein. |
| US10326130B2 |
Use of novel compounds as negative electrode active material in a sodium-ion battery
Precursor compounds of sodium alloy(s), for use as negative electrode active material in a sodium-ion battery, as well as to a negative electrode have the precursor compound of sodium alloy(s), as well as a sodium-ion battery having a negative electrode of this kind. |
| US10326129B2 |
Active material, electrode, nonaqueous electrolyte secondary battery, battery pack and production method of active material
The active material for a nonaqueous electrolyte secondary battery of the present embodiment includes a core particle and a carbon layer. The core particle is formed of silicon particles having a twinned crystal in part of a surface. The carbon layer coats the core particle. |
| US10326128B2 |
Cathode of all-solid lithium battery and secondary battery using the same
Disclose are a cathode of an all-solid lithium battery, and a secondary battery system using the same. The cathode includes a lithium composite, and a method of manufacturing the lithium composite comprises: dispersing a solid electrolyte to be uniformly distributed in the pores of a mesoporous conductor to provide a solid electrolyte composite, and coating the solid electrolyte composite on the surface of a lithium compound including nonmetallic solids such as S, Se, and Te. |
| US10326118B2 |
Battery module including cover assembly
The present invention relates to a battery module for storage of electrochemical cells, including a cover assembly including an inner frame that encloses an end of the cells and applies a compressive force thereto, an intermediate frame that is snap fit to an outer surface of the inner frame and supports ancillary structures of the battery system, and an outer cover that is snap fit to an outer surface of the intermediate frame. |
| US10326110B2 |
Organic light emitting display device
An organic light emitting display device is presented which prevents water from penetrating through an outermost side of a display panel, thereby enhancing reliability of first thin film transistors (TFTs). The organic light emitting display device includes a base substrate, a first buffer layer disposed on the base substrate, a TFT disposed on the first buffer layer in a display area, a second TFT disposed on the first buffer layer in a non-display area, an organic light emitting diode (OLED) disposed on the first TFT, and an encapsulation layer disposed on the OLED, the second TFT, and the first buffer layer. The first buffer layer and the encapsulation layer each include the same material, for example, silicon oxynitride (SiON). |
| US10326108B2 |
Display panel and repairing method thereof
A display panel, includes a base layer and an OLED device layer which is positioned on the base layer. A material of the base layer includes hydrogenated boron nitride nanosheets. |
| US10326107B2 |
Flexible display device
A flexible display device includes a first substrate defining a display region having a pixel array therein and a non-display region outside of the display region; a second substrate on the first substrate to cover the pixel array; at least one circuit attached to one side of the first substrate with a protruded portion protruding outwardly from an edge of the first substrate; and a first protective film below the first substrate and overlapping at least part of the protruded portion of the circuit. |
| US10326106B2 |
Sealing sheet, member for electronic devices, and electronic device
The present invention is a sealing sheet comprising at least a base resin layer and a sealing resin layer, the base resin layer having a microstructure that is provided to one surface of the base resin layer, the sealing resin layer being provided on a side of the base resin layer on which the microstructure is provided, and the microstructure having a protrusion that has a maximum difference in height (H) of 1 to 50 μm and is arranged two-dimensionally on the surface of the base resin layer, and an electronic device member, and an electronic device. The sealing sheet according to the invention exhibits an excellent gas barrier capability that suppresses or reduces the entry of a gas (e.g., water vapor) not only in the vertical direction, but also in the horizontal direction (from the edge) with respect to the surface of the sealing sheet. |
| US10326105B2 |
Packaging assembly and manufacturing method thereof
The present disclosure provides a packaging assembly and a manufacturing method thereof. The packaging assembly comprising a first substrate, a second substrate arranged opposite to the first substrate, an electronic device located between the first substrate and the second substrate, a protective layer covering the electronic device, and a bonding layer for bonding the first substrate and the second substrate so as to realize surface-to-surface packaging. The packaging assembly further comprising an isolation layer located between the bonding layer and the protective layer and adhered to both them, wherein an adhesion force between the material for forming the isolation layer and that for forming the bonding layer is smaller than an adhesion force between the material for forming the protective layer and that for forming the bonding layer. |
| US10326101B2 |
Flexible display device and method of manufacturing the same
A flexible display device and method of manufacturing the same are provided. A flexible display device includes a display region and a non-display region, the display region including a plurality of pixels, the non-display region being outside the display region. The flexible display device further includes: a substrate, a side sealant covering at least part of the non-display region of the substrate, and an intermediate layer between the substrate and the side sealant. |
| US10326100B2 |
Method for manufacturing light-emitting device
To provide a method for manufacturing a lightweight light-emitting device having a light-emitting region on a curved surface. The light-emitting region is provided on a curved surface in such a manner that a light-emitting element is formed on a flexible substrate supported in a plate-like shape and the flexible substrate deforms or returns. |
| US10326090B2 |
Semiconductor composition comprising an inorganic semiconducting material and an organic binder
The present invention relates to a semiconductor composition including an inorganic semiconducting material and an organic binder. The present invention further relates to an electronic device comprising a semiconducting layer consisting of such semiconductor composition. |
| US10326089B2 |
Logic circuit based on thin film transistor
The disclosure relates to a logic circuit. The logic circuit includes a n-type thin film transistor and a p-type thin film transistor. Each thin film transistor includes a substrate; a semiconductor layer including nano-scaled semiconductor materials; a source and a drain, wherein the source and the drain are spaced apart from each other, and electrically connected to the semiconductor layer; a dielectric layer covering the semiconductor layer, wherein the dielectric layer includes a normal dielectric layer and an abnormal dielectric layer stacked on one another, and the abnormal dielectric layer is an oxide dielectric layer grown by magnetron sputtering; and a gate in direct contact with the abnormal dielectric layer. The n-type thin film transistor and the p-type thin film transistor share the same substrate and the same gate. |
| US10326076B2 |
Method of manufacturing display substrate, display substrate and display device
A method of manufacturing a display substrate, a display substrate and a display device are provided. The manufacturing method includes: forming an organic material layer in a display area (10) and a non-display area (11); forming an auxiliary layer (24, 25) in the non-display area (11) before forming the organic material layer. The performances of the auxiliary layer (24, 25) are changed after heating, to allow a portion of the organic material layer corresponding to the auxiliary layer (24, 25) can be easily stripped off. The method further includes removing the portions of the organic material layer corresponding to the auxiliary layer by a heating process. |
| US10326070B2 |
Thermoelectric module, and heat conversion apparatus comprising the same
The embodiments of the present invention relate to a thermoelectric element and a thermoelectric module used for cooling, and the thermoelectric module can be made thin by having a first substrate and a second substrate with different surface areas to raise the heat-dissipation effectiveness. |
| US10326064B2 |
Light emitting device and method of manufacturing same
A light emitting device includes a light emitting element, a light transmissive member, and a cover member. The light transmissive member is disposed on an upper face of the light emitting element. The cover member covers a lateral face of the light emitting element and a lateral face of the light transmissive member, and includes first and second cover members. The first cover member is disposed adjacent to the lateral face of the light emitting element and the lateral face of the light transmissive member, and contains a first light reflecting material and a fluorine-based first resin. The second cover member covers the first cover member, and contains a second light reflecting material and a second resin. A refractive index difference between the first light reflecting material and the first resin is larger than a refractive index difference between the second light reflecting material and the second resin. |
| US10326063B2 |
Light-emitting device and method of preparing same, optical semiconductor element mounting package, and optical semiconductor device using the same
An optical semiconductor element mounting package that has good adhesion between the resin molding and the lead electrodes and has excellent reliability is provided, as well as an optical semiconductor device using the package is also provided. The optical semiconductor element mounting package having a recessed part that serves as an optical semiconductor element mounting region, wherein the package is formed by integrating: a resin molding composed of a thermosetting light-reflecting resin composition, which forms at least the side faces of the recessed part; and at least a pair of positive and negative lead electrodes disposed opposite each other so as to form part of the bottom face of the recessed part, and there is no gap at a joint face between the resin molding and the lead electrodes. |
| US10326062B2 |
UV LED package structure, UV light emitting unit, and method for manufacturing UV light emitting unit
A UV light-emitting unit includes a carrier, a UV LED chip, a side lens, and a water-resistant layer. The UV LED chip is disposed on the carrier, and the UV LED chip has a top surface and a surrounding side surface arranged adjacent to the top surface. The top surface has a center region and an external region arranged around the center region and connected to the surrounding side surface. The side lens is disposed on the carrier. The surrounding side surface of the UV LED chip is covered by the side lens. The water-resistant layer covers an outer surface of the side lens and the external region of the top surface of the UV LED chip. In addition, the present disclosure also discloses a UV LED package structure and a method for manufacturing a UV light-emitting unit. |
| US10326061B2 |
Method of fabricating light emitting device package
A method of fabricating a light emitting device package includes forming a plurality of semiconductor light emitting parts, each having a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer on a growth substrate, forming a partition structure having a plurality of light emitting windows on the growth substrate, filling each of the plurality of light emitting windows with a resin having a phosphor, and forming a plurality of wavelength conversion parts by planarizing a surface of the resin. |
| US10326059B2 |
Thin film light emitting diode
A light emitting device can include a light emitting structure including a p-GaN based layer, an active layer having multiple quantum wells, and an n-GaN based layer; a p-electrode and an n-electrode electrically connecting with the light emitting structure, respectively, in which the n-electrode has a plurality of layers; a phosphor layer disposed on a top surface of the light emitting structure; and a passivation layer disposed between the phosphor layer and the top surface of the light emitting structure, and disposed on outermost side surfaces of the light emitting structure, in which the p-electrode and the n-electrode are disposed on opposite sides of the light emitting structure. Also, the phosphor layer has a two-digit micrometer thickness, and includes a pattern to bond an n-electrode pad on a portion of the n-electrode by a wire, and comprises different phosphor materials configured to emit light of different colors. |
| US10326057B2 |
Light emitting device package, method of manufacturing the same, backlight unit and display device including the same
A light emitting device package includes a package frame in which a recessed portion is defined in a center thereof, the package frame including, an interior wall surrounding the recessed portion, a step portion contacting the interior wall and a bottom surface of the recessed portion, a light source disposed inside the recessed portion and emitting first light, a substrate disposed on the light source, and fixed on an upper surface of the step portion and spaced apart from the light source, a light conversion layer disposed on the substrate and including quantum dots that absorbs the first light and emits second light having a different wavelength from the first light, and barrier layer at least covering the light conversion layer, where barrier layer includes a first inorganic barrier layer and a first organic barrier layer. |
| US10326055B2 |
Diode having vertical structure
A light emitting device includes a first conductive-type layer, an active layer, and a second conductive-type layer; a first electrode on a first surface of the first conductive-type layer, the first electrode having a multilayer structure including Pt; a first pad on the first electrode, the first pad disposed on an edge of the first surface of the first conductive-type layer in a cross-sectional view; and a second electrode and a second pad on a second surface of the second conductive-type layer, the second electrode having a metal layer including Ti. In addition, the first pad include Au, further the second electrode is unitary with the second pad, and also the second electrode includes a reflective layer configured to reflect light from the active layer. |
| US10326054B1 |
Ultraviolet light emitting device doped with boron
In an example, the present invention provides a light-emitting device configured to emit electromagnetic radiation in a range of 210 to 360 nanometers. The device has a substrate member comprising a surface region. The device has a thickness of AlGaN material formed overlying the surface region and an aluminum concentration characterizing the AlGaN material having a range of 0 to 100%. The device has a boron doping concentration characterizing the AlGaN material having a range between 1e15 to 1e20 atoms/centimeter3. |
| US10326053B2 |
Nitride semiconductor light emitting element
A group III nitride semiconductor element includes an active layer between an n-type layer and a p-type layer and has a mesa structure containing the p-type layer, and includes an n electrode on the n-type layer and a p electrode on the p-type layer. The p electrode is obtained by sequentially laminating a first metal layer, a conductive layer and a second metal layer in this order. The resistivity of the conductive layer is higher than the resistivity of the first metal layer. |
| US10326051B2 |
Light emitting device including shaped substrate
Embodiments of the invention include a semiconductor structure (23) including a light emitting layer. A substrate (10) comprising lithium is attached to the semiconductor structure (23). A surface of the substrate (10) forms an angle with a major plane of the semiconductor structure (23) that is between 60° and 75°. |
| US10326048B2 |
Semiconductor device having an internal-field-guarded active region
A semiconductor device comprises a layer sequence formed by a plurality of polar single crystalline semiconductor material layers that each has a crystal axis pointing in a direction of crystalline polarity and a stacking direction of the layer sequence. A core layer sequence is formed by an active region made of an active layer stack or a plurality of repetitions of the active layer stack. The active layer stack has an active layer having a first material composition associated with a first band gap energy, and carrier-confinement layers embedding the active layer on at least two opposite sides thereof, having a second material composition associated with a second band gap energy larger than the first band gap energy. A pair of polarization guard layers is arranged adjacent to the active region and embedding the active region on opposite sides thereof. |
| US10326045B2 |
Micro light emitting diode device and manufacturing method thereof
A method for manufacturing a micro light emitting diode device is provided. A connection layer and epitaxial structures are formed on a substrate. A first pad is formed on each of the epitaxial structures. A first adhesive layer is formed on the connection layer, and the first adhesive layer encapsulates the epitaxial structures and the first pads. A first substrate is connected to the first adhesive layer. The substrate is removed, and a second substrate is connected to the connection layer through a second adhesive layer. The first substrate and the first adhesive layer are removed. The connection layer located between any two adjacent epitaxial structures are partially removed to form a plurality of connection portions. Each of the connection portions is connected to the corresponding epitaxial structure, and a side edge of each of the connection portions protrudes from a side wall surface of the corresponding epitaxial structure. |
| US10326044B2 |
Method and apparatus for processing semiconductor device structures
A method of processing a device wafer comprising applying a sacrificial material to a surface of a carrier wafer, adhering a surface of the device wafer to an opposing surface of the carrier wafer, planarizing an exposed surface of the sacrificial material by removing only a portion of a thickness thereof, and planarizing an opposing surface of the device wafer. A wafer assembly is also disclosed. |
| US10326037B1 |
Photonic energy storage device
An energy storage capsule for storing energy in the form of photons. The body of the capsule may surround a sealed vacuum environment in which several layers of reactive material are contained, including an inner reflective coating, a first photovoltaic cell, an optical amplification medium, a second photovoltaic cell, and an outer reflective coating, provided in that order. The body of the capsule may also be reflective, for example polished aluminum. Light may be emitted from an LED wafer which may be integrated with the surface of the optical amplification medium, directed at the several layers of reactive material. Some photons may be reflected by the reflective material, storing them within the capsule, while others may be absorbed by the photovoltaic cells, powering the LEDs to transmit more photons. The thermal environment of the energy storage capsule may be maintained such that the LEDs can operate at over 100% efficiency. |
| US10326036B2 |
Device with a quantum well layer
A device for guiding and absorbing electromagnetic radiation, the device including: absorbing means for absorbing the electromagnetic radiation; and a coupled to the absorbing means for guiding the electromagnetic radiation to the absorbing means, wherein the waveguide and the absorbing means are formed from a structure including a first cladding layer, a second cladding layer over the first cladding layer, and a quantum-well layer between the first and second cladding layers, the quantum-well layer being formed of a material having a different composition to the first and second cladding layers, wherein the thickness and the composition of the quantum-well layer is optimised to provide an acceptable level of absorption of electromagnetic radiation in the waveguide while providing an appropriate band gap for absorption of the electromagnetic radiation in the absorbing means. |
| US10326034B2 |
Semiconductor laminate and light-receiving element
A semiconductor layer includes a first semiconductor layer containing a III-V group compound semiconductor and having a first conductivity type, a quantum-well structure containing a III-V group compound semiconductor, a second semiconductor layer containing a III-V group compound semiconductor, a third semiconductor layer containing a III-V group compound semiconductor, and a fourth semiconductor layer containing a III-V group compound semiconductor and having a second conductivity type different from the first conductivity type. The first semiconductor layer, the quantum-well structure, the second semiconductor layer, the third semiconductor layer, and the fourth semiconductor layer are stacked in this order. The concentration of an impurity that generates carriers of the second conductivity type is lower in the third semiconductor layer than in the fourth semiconductor layer. The concentration of an impurity that generates majority carriers in the second semiconductor layer is lower in the third semiconductor layer than in the second semiconductor layer. |
| US10326030B2 |
Optical sensor and manufacturing method thereof
Some embodiments of the present disclosure provide an optical sensor. The optical sensor includes a semiconductive block having a front side and a back side, a wave guide region, and a light sensing region. The wave guide region is positioned over the back side of the semiconductive block and having a core layer. The wave guide region is configured to guide an incident light. The light sensing region is positioned in the semiconductive block, having a multi-junction photodiode. The light sensing region is configured to sense emission lights from the wave guide region. |
| US10326028B1 |
Complementary metal-oxide-semiconductor (CMOS) voltage-controlled resistor
A resistor may include a semiconductor layer having a source region, a drain region, and a channel region. The channel region may be between the source region and the drain region. The channel region may have a same polarity as the source region and the drain region. The resistor may further include a first inter-metal dielectric (IMD) layer on the channel region. The resistor may further include a front-side gate shield on the first IMD layer. The front-side gate shield may overlap the channel region. |
| US10326024B2 |
Thin film transistor, array substrate, manufacturing method and display device
A thin film transistor, an array substrate, a manufacturing method and a display device are provided. The thin film transistor includes a substrate and a gate layer, a source layer and a drain layer disposed on the substrate. The source layer and the drain layer are disposed in different layers and the drain layer and the gate layer are disposed in same and one layer. |
| US10326020B2 |
Structure and method for forming strained FinFET by cladding stressors
Various methods and structures for fabricating a strained semiconductor fin of a FinFET device. A strained semiconductor fin structure includes a substrate, a semiconductor fin disposed on the substrate, the semiconductor fin having two fin ends, and a stressor material cladding wrapped around a portion of each of the two fin ends forming a strained semiconductor fin that includes at least one strained channel fin having stressor cladding wrapped around at least one end of the strained channel fin thereby straining the at least one strained channel fin. The stressor cladding can be a compressive nitride stressor to compressively strain a compressively strained silicon germanium fin. The stressor cladding can be a tensile nitride stressor to tensily strain a tensily strained silicon fin. |
| US10326018B1 |
RF switches, integrated circuits, and devices with multi-gate field effect transistors and voltage leveling circuits, and methods of their fabrication
Embodiments of field effect transistor (FET) circuits, RF switches, and devices include source and drain terminals coupled to an active surface of a semiconductor substrate, a channel in the substrate between the source and drain terminals, and a plurality of gate structures coupled to the active surface over the channel. A channel contact is coupled to the active surface over the channel between a pair of the gate structures. A first capacitor is electrically coupled between the channel contact and the source terminal, and a second capacitor is electrically coupled between the channel contact and the drain terminal. |
| US10326017B2 |
Formation of a bottom source-drain for vertical field-effect transistors
In an embodiment, this invention relates to a vertical field-effect transistor component including a bottom source-drain layer and a method of creating the same. The method of forming a bottom source-drain layer of a vertical field-effect transistor component can comprise forming an anchor structure on a substrate. A sacrificial layer can be deposited on a middle region of the substrate and a channel layer can be deposited on the sacrificial layer. A plurality of vertical fins can be formed on the substrate and the sacrificial layer can be removed such that the plurality of vertical fins in the middle region form a plurality of floating fins having a gap located between the plurality of floating fins and the substrate. The bottom source-drain layer can then be formed such that the bottom source-drain layer fills in the gap. |
| US10326016B2 |
High-side power device and manufacturing method thereof
A high-side device includes: a substrate, an epitaxial layer, a high voltage well, a body region, a gate, a source, a drain, and a buried region. A channel junction is formed between the body region and the high voltage well. The buried region is formed in the substrate and the epitaxial layer, and in a vertical direction, a part of the buried region is located in the substrate and another part of the buried region is located in the epitaxial layer. In the channel direction, an inner side boundary of the buried region is between the drain and the channel junction. An impurity concentration of a second conductive type of the buried region is sufficient to prevent the high voltage well between the channel junction and the drain from being completely depleted when the high-side power device operates in a conductive operation. A corresponding manufacturing method is also disclosed. |
| US10326011B2 |
Electronic device including a HEMT
An electronic device can include a bidirectional HEMT. In an aspect, the electronic device can include a pair of switch gate and blocking gate electrodes, wherein the switch gate electrodes are not electrically connected to the blocking gate electrodes, and the first blocking, first switch, second blocking, and second switch gate electrodes are on the same die. In another aspect, the electronic device can include shielding structures having different numbers of laterally extending portions. In a further aspect, the electronic device can include a gate electrode and a shielding structure, wherein a portion of the shielding structure defines an opening overlying the gate electrode. |
| US10326005B2 |
Structure and formation method of semiconductor device structure
Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate and a gate stack covering a portion of the fin structure. The gate stack includes a work function layer and a gate dielectric layer. The semiconductor device structure also includes an isolation element over the semiconductor substrate and adjacent to the gate stack. The isolation element is in direct contact with the work function layer and the gate dielectric layer, and a lower width of the isolation element is greater than an upper width of the isolation element. |
| US10325999B2 |
Contact area to trench silicide resistance reduction by high-resistance interface removal
A method for manufacturing a semiconductor device comprises forming a silicide region on a semiconductor substrate, forming a gate structure on the semiconductor substrate adjacent the silicide region, forming a dielectric layer on the gate structure and on the silicide region, forming a first liner layer on the dielectric layer, removing a portion of the first liner layer and a portion of the dielectric layer to form an opening exposing a top surface of the silicide region, forming a second liner layer on the first liner layer and on sides and a bottom of the opening, removing a portion of the second liner layer from a top surface of the first liner layer and from the bottom of the opening to re-expose a portion of the top surface of the silicide region, and forming a contact layer in the opening directly on the re-exposed portion of the top surface of the silicide region. |
| US10325997B2 |
Vertical III-nitride semiconductor device with a vertically formed two dimensional electron gas
A HEMT device comprising a III-Nitride material substrate, the surface of which follows a plane that is not parallel to the C-plane of the III-Nitride material; an epitaxial layer of III-Nitride material grown on said substrate; a recess etched in said epitaxial layer, having at least one plane wall parallel to a polar plane of the III-Nitride material; a carrier supply layer formed on a portion of the plane wall of the recess, such that a 2DEG region is formed along the portion of the plane wall of the recess; a doped source region formed at the surface of said epitaxial layer such that the doped source region is separated from said 2DEG region by a channel region of the epitaxial layer; a gate insulating layer formed on the channel region of the epitaxial layer; and a gate contact layer formed on the gate insulating layer. |
| US10325996B2 |
Method for producing a doped semiconductor layer
A semiconductor device is produced by providing a semiconductor substrate, forming an epitaxial layer on the semiconductor substrate, and introducing dopant atoms of a first doping type and dopant atoms of a second doping type into the epitaxial layer. |
| US10325995B2 |
Field effect transistor air-gap spacers with an etch-stop layer
Provided herewith are embodiments related to a semiconductor structure and a method for forming the semiconductor structure. A first spacer layer and a second spacer layer are formed opposite a major surface of a substrate. The second spacer layer is removed using the first spacer layer as a stop layer. The removal of the second spacer layer forms an air-gap spacer in an area previously occupied by the second spacer layer. |
| US10325993B2 |
Gate all around device and fabrication thereof
A device includes a nanowire, a gate dielectric layer and a gate electrode. The nanowire has a sidewall. The gate dielectric layer surrounds the nanowire. The gate electrode surrounds the gate dielectric layer and separated from the nanowire. The gate electrode comprises a sloped sidewall inclined with respect to the sidewall of the nanowire. |
| US10325992B2 |
Semiconductor device and method of manufacturing the same
A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate including a trench. The semiconductor device further includes a gate electrode disposed in the trench, and a gate insulating film disposed between the substrate and the gate electrode. The gate electrode includes a gate conductor and a metal element, and an effective work function of the gate electrode is less than an effective work function of the gate conductor. |
| US10325991B1 |
Transistor device
The present disclosure provides a transistor device. The transistor device includes an active region surrounded by an isolation structure, a gate structure disposed over the active region and the isolation structure, and a source/drain disposed in the active region. The gate structure includes a body portion extending in a first direction, a head portion extending in a second direction, and a pair of wing portions disposed at two opposite sides of the body portion. The first direction and the second direction are perpendicular to each other. Each of the wing portions is in contact with the head portion and the body portion. |
| US10325990B2 |
High electron mobility transistor devices and method for fabricating the same
A HEMT device is provided. The HEMT device includes a substrate, a buffer layer, a first epitaxial layer, a second epitaxial layer, an insulating layer, a gate, a source, a drain, a trench, and a metal layer. The buffer layer is formed on the substrate. The first epitaxial layer is formed on the buffer layer. The second epitaxial layer is formed on the first epitaxial layer. The insulating layer is formed on the second epitaxial layer. The gate is disposed in the insulating layer. The source and the drain are disposed in the insulating layer. The trench passes through the insulating layer and the second epitaxial layer, and extends into the first epitaxial layer. The metal layer is formed on the insulating layer to connect to the source, and is filled into the trench to electrically connect to the first epitaxial layer and the source. |
| US10325987B2 |
Monolayer films of semiconducting metal dichalcogenides, methods of making same, and uses of same
Metal-chalcogenide films disposed on a substrate comprising at least one monolayer (e.g., 1 to 10 monolayers) of a metal-chalcogenide. The films can be continuous (e.g., structurally and/or electrically continuous) over 80% or greater of the substrate that is covered by the film. The films can be made by methods based on low metal precursor concentration relative to the concentration of chalcogenide precursor. The methods can be carried out at low water concentration. The films can be used in devices (e.g., electrical devices and electronic devices). |
| US10325984B2 |
Monolithically integrated semiconductor switch, in particular a power circuit breaker
In a semiconductor switch with a monolithically integrated field effect transistor, the source or emitter region of the field effect transistor is connected via a semiconductor region and an n-doped contact region to a first electrical terminal. In the semiconductor region, a semiconductor structure with n-doped channels is formed between the n-doped contact region and the source or emitter region of the field effect transistor; the n-doped channels electrically connect the n-doped contact region with the source or emitter region of the field effect transistor and run between p-doped regions that are connected to the n-doped contact region. The semiconductor switch is suitable as a self-switching load disconnector and has low losses in the switched-on state. |
| US10325983B2 |
Sacrificial layer for channel surface retention and inner spacer formation in stacked-channel FETs
Field effect transistors include a stack of nanosheets of vertically arranged channel layers. A source and drain region is positioned at respective ends of the vertically arranged channel layers. A gate stack is formed over, around, and between the vertically arranged channel layers. The transistor includes a plurality of internal spacers, each formed between the gate stack and a respective source or drain region, with at least one pair of spacers being positioned above an uppermost channel layer. |
| US10325982B1 |
Drain ledge for self-aligned gate and independent channel region and drain-side ridges for SLCFET
A transistor device comprises a base structure and a superlattice of conducting channels overlying the base structure. The superlattice of conducting channels includes source and drain access regions spaced-apart from each other, a ledge between and spaced-apart from the source and drain access regions, and source-side alternating multichannel ridges and trenches that extend from the source access region to the ledge, each ridge having a topside and opposing sidewalls that each extend from the ledge to the source access region. The transistor device includes gate metal that covers each ridge continuously from the ledge to the source access region, such that the gate metal completely covers the topside of the ridge and edges of the conducting channels that intersect the sidewalls of the ridge. |
| US10325977B2 |
Integrated transformers and integrated balanced to unbalanced transformers
A semiconductor element including first and second windings. The first winding is substantially located in a first metal layer of a semiconductor structure and includes a first outer coil, a first inner coil, and a first bridging structure. The first bridging structure, located in a range substantially enclosed by the first inner coil, connects the first outer coil and the first inner coil. The second winding is substantially located in a second metal layer of a semiconductor structure and includes a second outer coil, a second inner coil, and a second bridging structure. The second bridging structure, located in a range substantially enclosed by the second inner coil, connects the second outer coil and the second inner coil. The first bridging structure is substantially located in the second metal layer, and the second bridging structure is substantially located in the first metal layer. |
| US10325973B2 |
Display unit and electronic apparatus
A display unit includes a light emitting layer including a light emitting device; a color filter layer including a color filter corresponding to the light emitting device; and a light blocking layer including a light blocking member arranged to overlap an end of the color filter, a center position of the light blocking member being offset from the end of the color filter. |
| US10325970B2 |
Display device
A display device including a first pixel electrode and a second pixel electrode disposed adjacent to each other on a substrate; a pixel defining layer including a first opening corresponding to the first pixel electrode, a second opening corresponding to the second pixel electrode, and a first convex portion arranged adjacent to the first opening; a first intermediate layer arranged on the first pixel electrode to correspond to the first opening and including a first emission layer; and a first conductive inorganic layer arranged on the first intermediate layer to correspond to the first opening. At least one end of the first conductive inorganic layer extends beyond an end of the first intermediate layer and is disposed on the pixel defining layer between the first opening and the second opening. |
| US10325967B2 |
Organic light emitting display panel, driving method thereof and organic light emitting display apparatus
Embodiments of the present disclosure provide a display apparatus, a fingerprint identification method thereof, and an electronic device. The display apparatus includes: an organic light emitting layer and a fingerprint identification array. The organic light emitting layer includes a plurality of organic light emitting configurations. In a fingerprint identification phase, the plurality of organic light emitting configurations are arranged to emit light according to a first light emitting lattice and shift. A distance between any two adjacent organic light emitting configurations in the first light emitting lattice is greater than or equal to a minimum crosstalk-free distance. The minimum crosstalk-free distance is a maximum radius of a covering region formed on the fingerprint identification array by the light emitted from any organic light emitting configuration and then reflected through the first surface of the cover plate. |
| US10325966B2 |
Display device, module, and electronic device
The display defects of a display device are reduced. The display quality of the display device is improved. The display device includes a display panel and a first conductive layer. The display panel includes a display element including a pair of electrodes. An electrode of the pair of electrodes which is closer to one surface of the display panel is supplied with a constant potential. A constant potential is supplied to the first conductive layer. The second conductive layer provided on the other surface of the display panel is in contact with the first conductive layer, whereby the second conductive layer is also supplied with the constant potential. The second conductive layer includes a portion not fixed to the first conductive layer. |
| US10325964B2 |
OLED merged spacer device
The present disclosure relates to an organic light emitting device including a logic device that comprises a dummy pattern and a merged spacer, and an associated fabrication method. In some embodiments, the organic light emitting device is disposed over a substrate. The logic device is coupled to the organic light emitting device, and comprises a pair of source/drain regions disposed within the substrate and separated by a channel region. A gate structure overlies the channel region and comprises a gate electrode and a dummy pattern separated from the gate electrode by a merged spacer. By arranging the dummy pattern and the merged spacer between the gate electrode and the source/drain regions, a distance between the gate electrode and the source/drain region is enlarged, and therefore reducing the gate induced drain leakage (GIDL) effect. |
| US10325961B2 |
Electroluminescent display, manufacture method thereof, and display device
This disclosure relates to an electroluminescent display, a manufacture method thereof, and a display device. The electroluminescent display device comprises: a substrate, and a plurality of pixel units arranged in an array on the substrate. Each pixel unit comprises a plurality of sub-pixel units. Each pixel unit comprises at least two light-emitting layers connected in series. Furthermore, in each pixel unit, at least one light-emitting layer comprises at least two light-emitting units arranged in parallel and emitting light of different colors. Besides, in each pixel unit, at least one light-emitting unit is configured to be shared by two adjacent sub-pixel units of a corresponding pixel unit. |
| US10325959B2 |
Pixel structure having common sub-pixels and OLED display panel
A pixel structure and an organic light-emitting diode (OLED) display panel incorporating the pixel structure are disclosed. Each pixel unit (110) in the pixel structure includes a first sub-pixel (111), a second sub-pixel (112), a third sub-pixel (113) and two fourth sub-pixels (114). The second sub-pixel (112), the third sub-pixel (113) and the fourth sub-pixels (114) are arranged to define a quadrilateral encompassing the first sub-pixel (111) and be common to four adjacent pixel units (110). The first sub-pixel (111) serves as a primary display element, while each of the second sub-pixel (112), the third sub-pixel (113) and the fourth sub-pixels (114) acts as a secondary display element. As a result, a higher aperture ratio of the primary display element can be obtained at the same PPI and design margin, or an increased design margin and reduced process difficulty can be obtained at the same PPI and aperture ratio. |
| US10325957B2 |
Semiconductor memory device and method of manufacturing the same
According to an embodiment, a semiconductor memory device comprises first wiring lines, second wiring lines, and first variable resistance elements. The first wiring lines are arranged in a first direction and have as their longitudinal direction a second direction intersecting the first direction. The second wiring lines are arranged in the second direction and have the first direction as their longitudinal direction. The first variable resistance elements are respectively provided at intersections of the first wiring lines and the second wiring lines. In addition, this semiconductor memory device comprises a first contact extending in a third direction that intersects the first direction and second direction and having one end thereof connected to the second wiring line. The other end and a surface intersecting the first direction of this first contact are covered by a first conductive layer. |
| US10325956B2 |
Deep trench isolation shrinkage method for enhanced device performance
Some embodiments of the present disclosure relate to a method in which a functional layer is formed over an upper semiconductor surface of a semiconductor substrate, and a capping layer is formed over the functional layer. A first etchant is used to form a recess through the capping layer and through the functional layer. The recess has a first depth and exposes a portion of the semiconductor substrate there through. A protective layer is formed along a lower surface and inner sidewalls of the recess. A second etchant is used to remove the protective layer from the lower surface of the recess and to extend the recess below the upper semiconductor surface to a second depth to form a deep trench. To prevent etching of the functional layer, the protective layer remains in place along the inner sidewalls of the recess while the second etchant is used. |
| US10325955B2 |
CMOS image sensor with backside biased substrate
A CMOS image sensor 101 comprises an active layer 11 of a first conductivity type arranged to be reversed biased and a pixel 20 comprising a photosensitive element comprising a well 22 of a second conductivity type and a well 21 of the first conductivity type containing active CMOS elements for reading and resetting the photosensitive element. The CMOS image sensor further comprises a doped buried layer 111 of the second conductivity type in the active layer beneath the well of the first conductivity type. The buried layer is arranged to extend a depletion region below the well of the second conductivity type also below the well of the first conductivity type. |
| US10325953B2 |
Range sensor and solid-state imaging device
A range sensor includes: an n-type surface-buried region selectively buried in an upper portion of a pixel layer to implement a photodiode and extending from a light-receiving area toward plural portions shielded by a shielding plate along the upper portion of the pixel layer so as to provide a plurality of branches; n-type charge-accumulation regions having a higher impurity concentration than the surface-buried region; a plurality of transfer gate electrodes provided adjacent to the charge-accumulation regions; and an n-type guide region having a higher impurity concentration than the surface-buried region and a lower impurity concentration than the charge-accumulation regions, and provided with one end below an aperture of the shielding plate and other ends extending to a part of the respective transfer gate electrodes. |
| US10325952B2 |
Semiconductor package device and method of manufacturing the same
An image sensor comprises a chip, a first redistribution layer (RDL), a second RDL and a third RDL. The chip has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The first RDL is disposed on the first surface of the chip and extends along the first surface of the chip and beyond the lateral surface of the chip. The second RDL is disposed on the second surface of the chip. The third RDL is disposed on the lateral surface of the chip and connects the first RDL to the second RDL. |
| US10325946B2 |
Packaging method and package structure for image sensing chip
A packaging method and a package for an image sensing chip are provided. The packaging method includes: providing a wafer including a first surface and a second surface opposite to the first surface, where the wafer has multiple image sensing chips arranged in a grid, each of the image sensing chips has an image sensing region and contact pads arranged on a side of the first surface; forming an opening corresponding to each of the contact pads and cutting trenches on a side of the second surface of the wafer, where the contact pad is exposed through the opening; filling the cutting trenches with a first photosensitive ink; and applying a second photosensitive ink on the second surface of the wafer to cover the opening with the second photosensitive ink and form a hollow cavity in the opening. |
| US10325945B2 |
Imaging device including unit pixel cell which includes interconnection between photoelectric converter and signal detection circuit
An imaging device includes a unit pixel cell including: a photoelectric converter that generates a signal charge through photoelectric conversion of incident light, and a signal detection circuit that detects an electric signal according to an amount of the signal charge, wherein the signal detection circuit includes: a first transistor that amplifies the electric signal, a gate of the first transistor being connected to the photoelectric converter, a second transistor having a source and a drain, one of the source and the drain being connected to the photoelectric converter, and a first capacitor having a first end and a second end, the first end being connected to the other of the source and the drain of the second transistor, the second end being connected to a first voltage source. |
| US10325943B2 |
Thin film transistor, display substrate and display panel having the same, and fabricating method thereof
The present application discloses a method of fabricating a thin film transistor, including forming a semiconductor layer having a pattern corresponding to that of the active layer on a base substrate; forming a first photoresist layer on a side of the semiconductor layer distal to the base substrate; the first photoresist layer being in an area corresponding to the channel region, the second doped region, and the fourth doped region; doping a region of the semiconductor layer corresponding to the first doped region and the third doped region using the first photoresist layer as a mask plate; forming a second photoresist layer by removing a portion of the first photoresist layer to expose an initial portion of the semiconductor layer corresponding to at least a portion of the second doped region and at least a portion of the fourth doped region; and doping the initial portion of the semiconductor layer using the second photoresist layer as a mask plate. |
| US10325937B2 |
Thin film transistor substrate with intermediate insulating layer and display using the same
The present disclosure relates to a thin film transistor substrate having two different types of thin film transistors on the same substrate. A thin film transistor substrate includes a substrate; a first thin film transistor disposed on the substrate, the first thin film transistor including a poly crystalline semiconductor layer, a first gate electrode over the poly crystalline semiconductor layer, a first source electrode, and a first drain electrode; a second thin film transistor disposed on the substrate, the second thin film transistor including a second gate electrode, an oxide semiconductor layer over the second gate electrode, a second source electrode, and a second drain electrode; and an intermediate insulating layer including a nitride layer and an oxide layer on the nitride layer, the intermediate insulating layer disposed over the first gate electrode and the second gate electrode and under the oxide semiconductor layer. |
| US10325936B2 |
Display device having light emitting diode disposed in the concave portion of the planarization layer
Disclosed is a light emitting diode display device in which a time taken in a process of connecting a light emitting device to a pixel circuit is shortened. The light emitting diode display device includes a thin film transistor (TFT) array substrate including a concave portion and a light emitting device disposed in the concave portion. The light emitting device includes a first electrode and a second electrode. The light emitting device further includes a first portion, including the first and second electrodes, and a second portion opposite to the first portion, and a distance between the first portion to a floor surface of the concave portion is greater than a distance between the second portion to the floor surface of the concave portion. |
| US10325934B2 |
Display substrate, fabricating method thereof, and display apparatus
The present disclosure provides a display substrate, a fabricating method thereof, and a display apparatus including the display substrate. The display substrate includes a plurality of data lines and a plurality of common electrode lines. Each data line extends substantially along a first direction, and each common electrode line is along the first direction, and is configured such that a common electrode signal along the each common electrode line is substantially uniform. Each common electrode line can be substantially parallel to one data line to thereby substantially avoid a pulling effect on the common electrode signal along the each common electrode line caused by coupling between the each common electrode line and the one data line. |
| US10325923B2 |
Accommodating imperfectly aligned memory holes
Methods of forming 3-d flash memory cells are described. The methods allow the cells to be produced despite a misalignment in at least two sections (top and bottom), each having multiple charge storage locations. The methods include selectively gas-phase etching dielectric from the bottom memory hole portion by delivering the etchants through the top memory hole. The methods further include placing sacrificial polysilicon around the memory hole before forming the bottom stack and removing the sacrificial polysilicon from the slit trench to allow a conducting gapfill to make electrical contact to the polysilicon inside the memory hole. |
| US10325919B1 |
Mask design for embedded memory
Various embodiments of the present application are directed to a method for forming an integrated circuit (IC), and the associated integrated circuit. In some embodiments, a stack of gate dielectric precursor layers is formed on a plurality of logic sub-region and is then selectively removed from at least two logic sub-regions. Then, a gate dielectric precursor layer is formed, and a plasma treatment process and an annealing process are subsequently performed. The gate dielectric precursor layer is then selectively removed from a low-voltage logic sub-region, but not a high-voltage logic sub-region. By removing the stack of gate dielectric precursor layers from the low-voltage logic sub-region prior to performing the plasma treatment process and the annealing process, less gate dielectric precursor material is treated, annealed, and removed from the low-voltage logic sub-region. Thus, the resulting residues are reduced, and the defects introduced by the residues are also reduced or eliminated. |
| US10325918B2 |
Semiconductor device and manufacturing method thereof
A semiconductor device includes a non-volatile memory. The non-volatile memory includes a first dielectric layer disposed on a substrate, a floating gate disposed on the dielectric layer, a control gate and a second dielectric layer disposed between the floating gate and the control gate. The second dielectric layer includes one of a silicon oxide layer, a silicon nitride layer and a multi-layer thereof. The first dielectric layer includes a first-first dielectric layer formed on the substrate and a second-first dielectric layer formed on the first-first dielectric layer. The second-first dielectric layer includes a dielectric material having a dielectric constant higher than silicon nitride. |
| US10325916B2 |
Memory device and method for forming the same
Various embodiments provide memory devices and methods for forming the same. In an exemplary method, a provided substrate has one or more memory cells, a memory cell of which includes a control gate layer. The control gate layer has a first portion and a second portion on the first portion. A silicide layer is formed in the control gate layer and covers at least a sidewall of the second portion. A portion of the silicide layer is removed to reduce a size of the silicide layer in a direction parallel to the substrate. A fourth dielectric layer is formed on the substrate and on the memory cell, and has a top surface higher than a top surface of the memory cell. An opening is formed in the fourth dielectric layer and exposes a portion of the substrate between adjacent memory cells. A conductive structure is formed in the opening. |
| US10325915B2 |
Two-dimensional array of CMOS control elements
An electronic device includes a plurality of CMOS control elements arranged in a two-dimensional array, where each CMOS control element of the plurality of CMOS control elements includes semiconductor devices. The plurality of CMOS control elements each including a PMOS semiconductor device portion comprising a high voltage PMOS device and a low voltage PMOS device and an NMOS semiconductor device portion comprising a high voltage NMOS device and a low voltage NMOS device. The plurality of CMOS control elements are arranged in the two-dimensional array such that the PMOS semiconductor device portion of a CMOS control element of the plurality of CMOS control elements is only adjacent to other PMOS semiconductor device portions of adjacent CMOS control elements of the plurality of CMOS control elements, and such that the NMOS semiconductor device portion of a CMOS control element of the plurality of CMOS control elements is only adjacent to other NMOS semiconductor device portions of adjacent CMOS control elements of the plurality of CMOS control elements. |
| US10325913B2 |
Method, apparatus, and system having super steep retrograde well with engineered dopant profiles
Generally, in one embodiment, the present disclosure is directed to a method for forming a transistor. The method includes: implanting a substrate to form at least one of an n and p doped region; depositing an epitaxial semiconductor layer over the substrate; forming trenches through the epitaxial layer and partially through at least one of an n and p doped region; forming dielectric isolation regions in the trenches; forming a fin in an upper portion of the epitaxial semiconductor layer by partially recessing the dielectric isolation regions; forming a gate dielectric adjacent at least two surfaces of the fin; and diffusing dopant from at least one of the n and p doped regions at least partially into the epitaxial semiconductor layer to form a diffusion doped transition region adjacent a bottom portion of the fin. |
| US10325910B2 |
Semiconductor device containing HEMT and MISFET and method of forming the same
A semiconductor structure with a MISFET and a HEMT region includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer and is different from the first III-V compound layer in composition. A third III-V compound layer is disposed on the second III-V compound layer is different from the second III-V compound layer in composition. A source feature and a drain feature are disposed in each of the MISFET and HEMT regions on the third III-V compound layer. A gate electrode is disposed over the second III-V compound layer between the source feature and the drain feature. A gate dielectric layer is disposed under the gate electrode in the MISFET region but above the top surface of the third III-V compound layer. |
| US10325908B2 |
Compact source ballast trench MOSFET and method of manufacturing
A trench metal-oxide-semiconductor field-effect transistor (MOSFET) device, comprising a substrate of a first conductivity type, a body region of a second conductivity type, a gate electrode formed in a gate trench extending in the body region and substrate, a lightly doped source region and a heavily doped source region formed in the body region, and a source contact extending to the body region formed in a source contact trench next to the gate trench. The lightly doped source region is extended deeper in the body region than the heavily doped source region. The lightly doped source region is adjacent to the source contact trench. A ballast resistor is formed at the lightly doped source region between the heavily doped source region and the body region and a Schottky diode is formed at a contact between the source contact and the lightly doped source region. |
| US10325900B2 |
Integrated circuit and method of fabricating the same
A layout includes a plurality of cells and at least one dummy gate electrode continuously extends across the cells. Since the dummy gate electrode is electrically conductive, the dummy gate electrode can be utilized for interconnecting the cells. That is, some signals may travel through the dummy gate electrode rather than through a metal one line or a metal two line. Therefore, an amount of metal one lines and/or metal two lines for interconnecting the cells can be reduced. |
| US10325898B2 |
Semiconductor device and method of manufacturing semiconductor device
A semiconductor device includes a first active pattern extending in a first direction on a first region and a second region of a substrate, a first dummy gate electrode extending in a second direction crossing the first active pattern between the first region and the second region, a contact structure contacting the first dummy gate electrode and extending in the first direction, and a power line disposed on the contact structure and electrically connected to the contact structure. The power line extends in the first direction. The contact structure overlaps with the power line when viewed in a plan view. |
| US10325897B2 |
Method for fabricating substrate structure and substrate structure fabricated by using the method
There is provided a method for fabricating a substrate structure capable of enhancing process reproducibility and process stability by trimming a bevel region of a substrate using a wafer level process. The method includes providing a first substrate including first and second surfaces opposite each other and a first device region formed at the first surface, providing a second substrate including third and fourth surfaces opposite each other and a second device region at the third surface, bonding the first substrate and the second substrate to electrically connect the first device region and the second device region, and forming a trimmed substrate. The forming the trimmed substrate includes etching an edge region of the second substrate bonded to the first substrate. |
| US10325892B2 |
Light emitting device and manufacturing method thereof
A light emitting diode includes a semiconductor structure, a first electrode, a second electrode, and an extending electrode. The semiconductor structure has at least one sidewall and includes a light emitting layer, a first semiconductor layer, and a second semiconductor layer. The light emitting layer is disposed between the first semiconductor layer and the second semiconductor layer. The first electrode is electrically connected to the first semiconductor layer of the semiconductor structure. The first semiconductor layer is disposed between the light emitting layer and the first electrode. The second electrode is electrically connected to the second semiconductor layer of the semiconductor structure. The second semiconductor layer is disposed between the light emitting layer and the second electrode. The extending electrode is disposed on the sidewall of the semiconductor structure and is electrically connected to the second electrode. |
| US10325889B1 |
Display device including LED devices with selective activation function
A display device includes a substrate, at least one bonding electrode, at least one LED device electrically connected to the bonding electrode, and a transparent conductive layer. The bonding electrode is between the LED device and the substrate. The LED device includes a n type semiconductor layer, a p type semiconductor layer between the n type semiconductor layer and the bonding electrode, and an intermediate layer. The p type semiconductor layer includes a high resistance portion and a low resistance portion enclosed by the high resistance portion. A resistivity of the p type semiconductor layer increases from the low resistance portion toward the high resistance portion. The intermediate layer is between the p type semiconductor layer and the bonding electrode. The transparent conductive layer is electrically connected to the n type semiconductor layer. The LED device is between the transparent conductive layer and the bonding electrode. |
| US10325888B2 |
Manufacturing method of display
A manufacturing method of a display including the following steps is provided. Firstly, a back plate, a first transfer platform and a second transfer platform are provided, wherein a plurality of first light-emitting devices are disposed on the first transfer platform, and a plurality of second light-emitting devices are disposed on the second transfer platform. Secondly, a plurality of first bonding layers are formed at a plurality of first positions of the back plate. Then, the first transfer platform and the back plate are correspondingly docked, so that the first light-emitting devices are bonded on the first positions through the first bonding layers. After that, a plurality of second bonding layers are formed at a plurality of second positions of the back plate. Finally, the second transfer platform and the back plate are correspondingly docked, so that the second light-emitting devices are bonded on the second positions through the second bonding layers. |
| US10325887B2 |
Light emitting device and display device having same
A light emitting element disclosed in an embodiment comprises: a support substrate having a plurality of pads and a black matrix layer outside the plurality of pads; a plurality of light emitting chips, at least one of which is disposed on at least one of the plurality of pads; and a light-transmitting resin layer which is disposed on the support substrate and covers the pads, the black matrix layer, and the light emitting chips. |
| US10325885B2 |
Semiconductor device on string circuit and method of making the same
An elongated light circuit includes an elongated circuit trace and a plurality of micro-sized, unpackaged LEDs disposed sequentially on the circuit trace. A height of the LEDs ranges from about 12.5 microns to about 200 microns. The elongated circuit trace and the LEDs are coated with a protective coating. |
| US10325884B2 |
Apparatuses and methods for scalable memory
Apparatuses and methods are provided for scalable memory. An example apparatus comprises a logic component, a plurality of memory components adjacent to and coupled to one another and the logic component, a plurality of memory component programmable delay lines (PDLs), of the plurality of memory component PDLs associated with a respective one of the plurality of memory components, and a logic component programmable delay line (LPDL) coupled to the logic component and each of the plurality of memory component PDLs. |
| US10325883B2 |
Package-on-package structure and method
A method includes attaching a first semiconductor package on a carrier, wherein the first semiconductor package comprises a plurality of stacked semiconductor dies and a plurality of contact pads, depositing a first molding compound layer over the carrier, wherein the first semiconductor package is embedded in the first molding compound layer, forming a plurality of vias over the plurality of contact pads, attaching a semiconductor die on the first molding compound layer, depositing a second molding compound layer over the carrier, wherein the semiconductor die and the plurality of vias are embedded in the second molding compound layer, forming an interconnect structure over the second molding compound layer and forming a plurality of bumps over the interconnect structure. |
| US10325881B2 |
Vertical semiconductor device having a stacked die block
A semiconductor device vertically mounted on a medium such as a printed circuit board, and a method of its manufacture, are disclosed. The semiconductor device includes a stack of semiconductor die having contact pads which extend to an active edge of the die aligned on one side of the stack. The active edges of the die are affixed to the PCB and the contact pads at the active edge are electrically coupled to the PCB. This configuration provides an optimal, high density arrangement of semiconductor die in the device, where a large number of semiconductor die can be mounted and electrically coupled directly to the PCT, without a substrate, without staggering the semiconductor die, and without using wire bonds. |
| US10325876B2 |
Surface finish for wirebonding
The present disclosure provides embodiments of package devices and methods for making package devices for a semiconductor die. One embodiment includes a die mounting structure having a finished bond pad that includes a copper bond pad and a cobalt-containing layer over a top surface of the copper bond pad, and a wire bond structure that is bonded to a top surface of the cobalt-containing layer of the finished bond pad, where cobalt-containing material of the cobalt-containing layer is located between a bottom surface of the wire bond structure and the top surface of the copper bond pad such that the cobalt-containing material is present under a center portion of the wire bond structure. |
| US10325875B2 |
Edge interconnect packaging of integrated circuits for power systems
Disclosed is an integrated circuit packaging system that includes first and second microchips. Each microchip includes a top surface, a surface, one or more quilt package nodules fabricated on said top surface, and one or more bottom surface connectors. The system also includes a substrate to which the first and second microchips are mounted. The first and second microchips are connected via the quilt package nodules. |
| US10325873B2 |
Chip-stack structure
A chip-stack structure including a first chip and a second chip located on the first chip is provided. The first chip includes a first substrate, a first interconnect structure, a first pad, and a first contact conductor. The first interconnect structure is located on a first surface of the first substrate. The first pad is located on the first interconnect structure. The first contact conductor is located in the first substrate and exposed on a second surface of the first substrate opposite to the first surface. The second chip includes a second substrate, a second interconnect structure, a second pad, and a second contact conductor. The second interconnect structure is located on the second substrate. The second pad is located on the second interconnect structure. The second contact conductor is located in the second substrate, wherein the first contact conductor is directly physically in contact with the second pad. |
| US10325871B2 |
Display device
A display device comprises a control circuit board generating a first control signal; a driver chip package connected to the control circuit board and receiving the first control signal; and a display panel connected to the driver chip package interconnecting the control circuit board and the display panel. The display panel comprises pixels formed and signal lines connected to the pixels. The driver chip package comprises a wire film and a driver chip attached over the wire film. The driver chip is fixed to the display panel to transfer the second control signal to at least one of the plurality of signal lines. The wire film interconnects the driver chip and the control circuit board to transfer the first control signal from the control circuit board to the driver chip. |
| US10325870B2 |
Through-substrate-vias with self-aligned solder bumps
A semiconductor structure and methods of forming the semiconductor structure include a solder bump self-aligned to a through-substrate-via, wherein the solder bump and the through-substrate-via are formed of a conductive metal material, and wherein the through-substrate-via is coupled to a buried metallization layer, which is formed of a different conductive metal material. |
| US10325869B2 |
Semiconductor devices, semiconductor packages, and methods of manufacturing the semiconductor devices
A semiconductor device includes a conductive component on a substrate, a passivation layer on the substrate and including an opening that exposes at least a portion of the conductive component, and a pad structure in the opening and located on the passivation layer, the pad structure being electrically connected to the conductive component. The pad structure includes a lower conductive layer conformally extending on an inner sidewall of the opening, the lower conductive layer including a conductive barrier layer, a first seed layer, an etch stop layer, and a second seed layer that are sequentially stacked, a first pad layer on the lower conductive layer and at least partially filling the opening, and a second pad layer on the first pad layer and being in contact with a peripheral portion of the lower conductive layer located on the top surface of the passivation layer |
| US10325867B2 |
Semiconductor device and radio frequency module formed on high resistivity substrate
A semiconductor device includes a high resistivity substrate, a transistor formed on the high resistivity substrate, and a deep trench device isolation region formed in the high resistivity substrate to surround the transistor. Particularly, the high resistivity substrate has a first conductive type, and a deep well region having a second conductive type is formed in the high resistivity substrate. Further, a low concentration well region having the first conductive type is formed on the deep well region, and the transistor is formed on the low concentration well region. |
| US10325866B2 |
Electronic device packages with conformal EMI shielding and related methods
Electronic device package technology is disclosed. In one example, an electronic device package can include a bottom surface and a side surface extending from the bottom surface. The side surface can be oriented at a non-perpendicular angle relative to the bottom surface. In another example, an electronic device package can include a top planar surface having a first area, a bottom planar surface having a second area, and a side surface extending between the top surface and the bottom surface. The second area can be larger than the first area. In yet another example, an electronic device package can include a substrate defining a plane, an electronic component disposed on the substrate, and a layer of material disposed about a lateral side of the electronic component. The layer of material can be oriented at an angle of less than 90 degrees relative to the plane. |
| US10325862B2 |
Wafer rigidity with reinforcement structure
Reinforcement structures used with a thinned wafer and methods of manufacture are provided. The method includes forming trenches or vias at least partially through a backside of a thinned wafer attached to a carrier wafer. The method further includes depositing material within the trenches or vias to form reinforcement structures on the backside of the thinned wafer. The method further includes removing excess material from a surface of the thinned wafer, which was deposited during the depositing of the material within the vias. |
| US10325861B2 |
Methods and structures for dicing integrated circuits from a wafer
Dicing a semiconductor wafer into chips may include (and structures may result from) forming a lateral chip dicing pattern of vertical metal stack kerf (MSK) structures from a depth below an upper surface of a substrate of a wafer, up through metallization layers of the wafer, to a top surface of the wafer. This dicing pattern may separate or define the perimeters/edges of the chips to be diced. A protective layer over the wafer can be etched to form a pattern of openings to the pattern of MSK structures. Then, a wet etch through the pattern of openings in the protective layer removes the MSK structures and forms lateral chip dicing trench pattern to the depth below the upper surface of the substrate along the intended lateral dicing pattern. A bottom surface of the substrate can be ground to expose the bottom of the trench pattern and dice the chips. |
| US10325857B2 |
Semiconductor device manufacturing method and semiconductor wafer
According to an embodiment, a first resist pattern that includes a mark including a second pattern provided with first components and a third pattern not provided with the first components is formed. Then, a first recessed area is formed on a processing target layer using the first resist pattern. Thereafter, a second resist pattern that includes a fourth pattern is formed. The fourth pattern is formed such that the third pattern and part of the second pattern, which includes at least one row of the first components arranged along a periphery of the third pattern, are exposed. Then, a second recessed area is formed by using the second resist pattern. Thereafter, a position of the processing target layer is recognized by using a stepped portion formed at the second recessed area, in a light exposure apparatus, and a third resist pattern is formed. |
| US10325855B2 |
Backside drill embedded die substrate
A device and method of fabricating are provided. The device includes a substrate having a first side and an opposite second side, a cavity defined within the substrate from the first side, a die coupled to a floor of the cavity and having a conductive pad on a side of the die distal to the floor of the cavity. A laminate layer coupled to the second side of the substrate may be included. A hole may be drilled, at one time, through layers of the device, through the die, and through the conductive pad. The hole extends through and is defined within the laminate layer (if present), the second side of the substrate, the die, and the conductive pad. A conductive material is provided within the hole and extends between and through the laminate layer (if provided), the second side of the substrate, the die, and the conductive pad. |
| US10325854B2 |
Interposer and semiconductor package device
An interposer comprises a first conductive wire having a first terminal and a second terminal, a first oxide layer, and an encapsulant. The first oxide layer covers the first conductive wire and exposes the first terminal and the second terminal of the first conductive wire. The encapsulant covers the first oxide layer and exposes the first terminal and the second terminal of the first conductive wire. |
| US10325853B2 |
Method of forming semiconductor packages having through package vias
A semiconductor device and method for forming the semiconductor device is provided. The semiconductor device includes an integrated circuit having through vias adjacent to the integrated circuit die, wherein a molding compound is interposed between the integrated circuit die and the through vias. The through vias have a projection extending through a patterned layer, and the through vias may be offset from a surface of the patterned layer. The recess may be formed by selectively removing a seed layer used to form the through vias. |
| US10325844B2 |
Modifying execution flow in save-to-return code scenarios
A computer-implemented method includes, in a code transformation system, identifying save-to-return code instructions, function call code instructions, comparison code instructions, and exceptional code instructions. The function call code instructions are associated with the save-to-return code instructions. The comparison code instructions are associated with the save-to-return code instructions. The exceptional code instructions are associated with the comparison code instructions. A predefined proximity range based on a predefined proximity value as well as a proximity eligibility indicator are determined. The proximity eligibility indicator denotes whether the save-to-return code instructions and the comparison code instructions are within the predefined proximity range. Responsive to the proximity eligibility indicator denoting the save-to-return code instructions and the comparison code instructions are within the predefined proximity range, one or more execution flow relationships between the function call code instructions and the exceptional code instructions are created. A corresponding computer program product and computer system are also disclosed. |
| US10325839B2 |
Reduction of stress in via structure
A via structure for electric connection is disclosed. The via structure includes a substrate that has a first surface and a via hole opened to the first surface. The via structure includes also a stress buffer layer disposed on the first surface of the substrate, which has an opening aligned to the via hole of the substrate. The via structure further includes a conductive body formed in the via hole of the substrate at least up to the level of the first surface of the substrate. In the via structure, the stress buffer layer receives the conductive body extending into the opening over the level of the first surface of the substrate and/or covers, at least in part, the edge of the first surface around the via hole of the substrate. |
| US10325826B1 |
Substrate with reservoir for die attach adhesive
A substrate having a die attach area for receiving a semiconductor die includes a recessed area for receiving die attach adhesive. The recessed area prevents die attach adhesive from bleeding into the surrounding area and onto substrate connection sites, where it could compromise a wire bond formed on such a connection site. The recessed area has a zig-zag pattern, which allows for sufficient amounts of adhesive to be used to securely attach the die to the substrate, yet does not enlarge the recessed area such that the package size may be adversely affected. |
| US10325810B2 |
Memory and fabrication method thereof
A memory and a method for fabricating the memory are provided. The method includes forming a plurality of first gate structures on a base substrate. Each first gate structure includes a floating gate structure and a control gate structure. The control gate structure includes a body region and a top region. A size of the top region is smaller than a size of the body region along a direction perpendicular to a length direction of the control gate structure. A sidewall of the top region is connected to a sidewall of the body region. The method also includes forming a dielectric layer on the base substrate and covering the plurality of first gate structures, while simultaneously forming air gaps in the dielectric layer between the adjacent first gate structures. A top of each air gap is above or coplanar with a top surface of the control gate structure. |
| US10325807B2 |
Semiconductor device and method for manufacturing the same
A semiconductor device includes first, second, and third metallization layers, on top of one another, that are disposed above a substrate, wherein each of the first, second, and third metallization layer includes a respective metallization structure formed in a respective dielectric layer, wherein the second metallization layer is disposed between the first and third metallization layers; and a via tower structure that extends from the first metallization layer to the third metallization layer so as to electrically couple at least part of the respective metallization structures of the first and third metallization layers. |
| US10325801B2 |
Mounting table system, substrate processing apparatus, and temperature control method
There is provided a mounting table system which includes: a mounting table rotatably installed so as to mount a substrate thereon; a plurality of heating parts installed in the mounting table, and configured to heat the mounting table; a single power source configured to supply an electric power to the plurality of heating parts; and a power switching part configured to switch from a first heating part among the plurality of heating parts to which the electric power is supplied from the single power source, to a second heating part among the plurality of heating parts, depending on a rotational angle of the mounting table. |
| US10325800B2 |
High temperature electrostatic chucking with dielectric constant engineered in-situ charge trap materials
Techniques are disclosed for methods and apparatuses for increasing the breakdown voltage while substantially reducing the voltage leakage of an electrostatic chuck at temperatures exceeding about 300 degrees Celsius in a processing chamber. |
| US10325794B2 |
Purge device and purge method
A purge device includes a supply flow rate adjuster, which adjusts a supply flow rate of a purge gas supplied to a storage container through a supply pipe, and an intake flow rate adjuster, which adjusts an intake flow rate of the purge gas taken in from an inside of the storage container through a discharge pipe to prevent the pressure of the inside of the storage container from becoming negative relative to an outside of the storage container. The supply flow rate adjuster adjusts the supply flow rate in at least two stages including a first flow rate and a second flow rate that is higher than the first flow rate. When the supply flow rate is the first flow rate, the intake flow rate adjuster sets the intake flow rate to zero. |
| US10325790B2 |
Methods and apparatus for correcting substrate deformity
Embodiments of methods and apparatus for correcting substrate deformity are provided herein. In some embodiments, a substrate support includes a base having an interior volume formed by walls extending upward from the base; a plurality of infrared lamps disposed within the interior volume; a support plate disposed above the plurality of infrared lamps, wherein the support plate includes a support surface to support a substrate; and a cover plate disposed atop the support plate and having a central opening corresponding to the support surface and an exhaust portion at a periphery of a top surface of the cover plate, wherein the exhaust portion includes a plurality of perforations fluidly coupling a space above the cover plate with an exhaust conduit formed in the cover plate. Embodiments of a showerhead assembly and processing equipment incorporating the inventive substrate support and showerhead assembly are additionally provided herein. |
| US10325789B2 |
High productivity soak anneal system
Embodiments described herein relate to apparatus and methods for thermally processing substrates. In one embodiment, a processing system includes a factory interface coupled to a plurality of load lock chambers. The plurality of load lock chambers are coupled to a transfer chamber which houses a robot. A thermal processing chamber is coupled to the transfer chamber and the robot is configured to transfer substrate between the load lock chambers and the thermal processing chamber. A multi-substrate support, which is disposed within the thermal processing chamber, rotates to facilitate efficient substrate thermal processing. A gas curtain apparatus disposed in a port plenum provides environment separation between the processing chamber and the transfer chamber while enabling efficient substrate transfer between the thermal processing chamber and the transfer chamber. |
| US10325788B2 |
Temperature controller of semiconductor wafer and temperature control method of semiconductor wafer
A manipulated variable calculator having a plurality of control loops and configured to calculate manipulated variables to be respectively given to a plurality of temperature adjusters includes: a reference model output generator configured to generate a reference model that generates a response output until reaching a temperature setpoint when, in the plurality of control loops, a manipulated variable of a control loop having the slowest response speed is defined as 100%; a simulator configured to sequentially search for a switching time to determine a manipulated variable pattern; a reference model configured to generate a reference model output based on the searched switching time; and a reference model selecting unit configured to select the reference model depending on a heating responsiveness and a cooling responsiveness of the temperature adjusters. |
| US10325779B2 |
Colloidal silica growth inhibitor and associated method and system
A technique to inhibit the growth of colloidal silica deposits on surfaces treated in phosphoric acid is described. In one embodiment, the disclosed techniques include the use of a colloidal silica growth inhibitor as an additive to a phosphoric acid solution utilized for a silicon nitride etch. In some embodiments, the additive may have chemistry that may contain strong anionic groups. A method and apparatus is provided that monitors the silica concentration and/or the colloidal silica growth inhibitor concentration in the phosphoric acid solution during processing and adjusts the amount of those components as needed. Techniques are provided for a method and apparatus to control the additive concentration to be used as well as the silica concentration in the phosphoric acid solution. The techniques described herein provide a high selectivity etch of silicon nitride towards silicon dioxide without the growth of colloidal silica deposits on the exposed surfaces. |
| US10325777B2 |
Utilizing multiple layers to increase spatial frequency
A chemical material is deposited on a surface of a substrate. A mandrel composition is deposited on a surface of the chemical material. A mandrel hard mask pattern is deposited on a surface of the mandrel composition. The mandrel composition is etched. The mandrel hard mask pattern is removed. A plurality of spacer materials are deposited sequentially onto a surface of the chemical material and a surface of the mandrel composition. A portion of each of the plurality of spacer materials are removed sequentially. A remainder of the mandrel composition is removed. The substrate is etched. The chemical material and at least one of the spacer materials of the plurality of spacer materials are removed. |
| US10325772B2 |
Apparatus and method for wafer cleaning
A wafer cleaning apparatus includes a polishing unit used in chemical mechanical polishing (CMP) of a wafer and a cleaning dispensing unit arranged to direct cleaning fluids toward a far edge of the wafer after the CMP of the wafer. A wafer cleaning method includes CMP of a wafer by a polishing unit and directing cleaning fluids toward a far edge of the wafer after the CMP of the wafer by a cleaning dispensing unit. Another method can include CMP, applying deionized water, and applying pH adjuster having a pH range from about 2 to about 13. |
| US10325770B2 |
Field emission light source
The present invention generally relates to a field emission light source and specifically to a miniaturized field emission light source that is possible to manufacture in large volumes at low cost using the concept of wafer level manufacturing, i.e., a similar approach as used by integrated circuits (IC) and microelectromechanical systems (MEMS). The invention also relates to a lighting arrangement comprising at least one field emission light source. |
| US10325769B2 |
Gas-discharge lamp for a vehicle headlamp
The invention describes a gas-discharge lamp comprising an inner vessel enclosing a pair of electrodes separated by a gap; and an outer vessel enclosing the inner vessel; and wherein the lamp comprises a lateral stripe arranged on the surface of a vessel such that the lateral stripe lies below a horizontal plane through a longitudinal axis through the center of the lamp, and wherein the lateral stripe extends essentially only over a region corresponding to the gap between the electrodes. |
| US10325766B2 |
Method of optimising spectral data
A method of mass spectrometry or ion mobility spectrometry is disclosed. The method comprises: providing a plurality of species of ions; analyzing the ions during a plurality of sequential acquisition periods so as to obtain spectral data relating to the ions; varying the value of an operational parameter of the spectrometer such that it has different values during the different acquisition periods, wherein the spectral data obtained for a given ion varies depending on the value of the operational parameter; storing the spectral data obtained during the different acquisition periods separately; selecting a target ion; and then interrogating the spectral data so as to identify a set of first acquisition periods that include data corresponding to said target ion. Selecting spectral data from only a subset of the first acquisition periods allows the selection of the optimal spectral data for the target ion, while discarding less optimal data. |
| US10325764B2 |
Automated beam check
A method of automatically performing a routine to check the operational state of a mass spectrometer is disclosed wherein the method is performed automatically as a start-up routine upon switching ON the mass spectrometer. The method comprises automatically generating a vacuum within one or more vacuum chambers of a mass spectrometer and automatically generating first ions using an internal ion source, wherein the internal ion source is located within a vacuum chamber of the mass spectrometer or is located within a chamber downstream from an atmospheric pressure interface, and detecting at least some of the first ions or second ions derived from the first ions. The method further comprises automatically determining whether or not the mass spectrometer is in a correct operational state. |
| US10325761B2 |
Magnetic material sputtering target and manufacturing method thereof
Provided is an oxide-containing magnetic material sputtering target wherein the oxides have an average grain diameter of 400 nm or less. Also provided is a method of producing an oxide-containing magnetic material sputtering target. The method involves depositing a magnetic material on a substrate by the PVD or CVD method, then removing the substrate from the deposited magnetic material, pulverizing the material to obtain a raw material for the target, and further sintering the raw material. An object is to provide a magnetic material target, in particular, a nonmagnetic grain-dispersed ferromagnetic sputtering target capable of suppressing discharge abnormalities of oxides that are the cause of particle generation during sputtering. |
| US10325760B2 |
System, method and apparatus for using optical data to monitor RF generator operations
A system and method monitoring a plasma with an optical sensor to determine the operations of a pulsed RF signal for plasma processing including a plasma chamber with an optical sensor directed toward a plasma region. An RF generator coupled to the plasma chamber through a match circuit. An RF timing system coupled to the RF generator. A system controller is coupled to the plasma chamber, the RF generator, the optical sensor, the RF timing system and the match circuit. The system controller includes a central processing unit, a memory system, a set of RF generator settings and an optical pulsed plasma analyzer coupled to the optical sensor and being capable to determine a timing of a change in state of an optical emission received in the optical sensor and/or a set of amplitude statistics corresponding to an amplitude of the optical emission received in the optical sensor. |
| US10325759B2 |
Multiple control modes
Systems and methods for using variables based on multiple states associated with a plasma system are described. A method includes determining whether the state associated with the plasma system is a first, second, or third state and determining a first variable upon determining that the state is the first state. The method further includes determining a second variable upon determining that the state is the second state and determining a third variable upon determining that the state is the third state. The method includes determining whether each of the first variable, the second variable, and the third variable is within a corresponding range from a corresponding threshold. The method includes providing an instruction to change power supplied to a plasma chamber upon determining that the first, second, or third variable is outside the corresponding range from the corresponding threshold. |
| US10325758B2 |
Plasma processing apparatus
A plasma processing apparatus includes a plasma generation unit configured to convert a processing gas supplied into a processing chamber into plasma by an inductive coupling. The plasma generation unit includes a first high frequency antenna formed of a vortex coil arranged adjacent to the processing chamber through a dielectric window, a second high frequency antenna having a natural resonant frequency and formed of a vortex coil arranged at an outer or inner peripheral side of the first high frequency antenna, and an impedance adjustment unit for adjusting a resonant frequency of a circuit viewed from the high frequency power supply toward the first high frequency antenna. The circuit viewed from the high frequency power supply toward the first high frequency antenna is configured to have two resonant frequencies depending on adjustment of the impedance adjustment unit when a frequency of high frequency power is changed. |
| US10325756B2 |
Method for compensating pattern placement errors caused by variation of pattern exposure density in a multi-beam writer
A method for compensating pattern placement errors during writing a pattern on a target in a charged-particle multi-beam exposure apparatus including a layout generated by exposing a plurality of beam field frames using a beam of electrically charged particles, wherein each beam field frame has a respective local pattern density, corresponding to exposure doses imparted to the target when exposing the respective beam field frames. During writing the beam field frames, the positions deviate from respective nominal positions because of build-up effects within said exposure apparatus, depending on the local pattern density evolution during writing the beam field frames. To compensate, a displacement behavior model is employed to predict displacements; a local pattern density evolution is determined, displacements of the beam field frames are predicted based on the local pattern density evolution and the displacement behavior model, and the beam field frames are repositioned accordingly based on the predicted values. |
| US10325753B2 |
Method and system for focus adjustment of a multi-beam scanning electron microscopy system
A scanning electron microscopy system is disclosed. The system includes a multi-beam scanning electron microscopy (SEM) sub-system. The SEM sub-system includes a multi-beam electron source configured to form a plurality of electron beams, a sample stage configured to secure a sample, an electron-optical assembly to direct the electron beams onto a portion of the sample, and a detector assembly configured to simultaneously acquire multiple images of the surface of the sample. The system includes a controller configured to receive the images from the detector assembly, identify a best focus image of images by analyzing one or more image quality parameters of the images, and direct the multi-lens array to adjust a focus of one or more electron beams based on a focus of an electron beam corresponding with the identified best focus image. |
| US10325751B1 |
Thin-film phosphor deposition
An enhanced vision system includes an image intensifier that includes a phosphor screen. The phosphor screen includes a thin-film phosphor layer deposited, patterned, transferred, or otherwise disposed on the substrate using a thin-film deposition technique. A conductive layer is deposited across at least a portion of the phosphor layer. The relatively smooth morphology of the phosphor layer beneficially permits the use of a relatively thin conductive layer. The use of a relatively thin conductive layer advantageously reduces the operating voltage between an electron multiplier and the phosphor screen. A secondary electron emitter may be disposed across at least a portion of the conductive layer. |
| US10325745B2 |
Multiple element fuse
Approaches herein provide a multiple element fuse including a first fuse element having a first pair of terminals joined by a first fusible link, and a second fuse element including a second pair of terminals joined by a second fusible link. The first pair of terminals may be directly physically coupled with the second pair of terminals. In some embodiments, the first pair of terminals and the second pair of terminals are stacked relative to one another and joined by one or more linking elements, thus causing the first fusible link and the second fusible link to extend parallel to one another. In some embodiments, a first plurality of terminal pairs are integrally linked adjacent one another along a same plane, and then subsequently coupled to a second plurality of terminal pairs. |
| US10325744B2 |
Hollow fuse body with notched ends
Hollow bodies and hollow body fuses are disclosed. Furthermore, methods to provide hollow bodies and hollow body fuses are disclosed. In one implementation, a hollow body includes a center portion and an end portion. An endcap may be coupled to the end portion. A cavity is formed between an inside surface of the endcap and an outer periphery of the end portion. A fusible element may be disposed within the hollow body, the fusible element may be further disposed within the cavity formed between the inside surface of the endcap and the outer periphery of the end portion, the fusible element traveling a substantially diagonal path through a center of the cavity. |
| US10325742B2 |
High performance switch for microwave MEMS
The present disclosure provides for a microelectromechanical switch including a first port (e.g., input port), one or more second ports (e.g., output ports), a cantilever beam, and a mechanical spring connected to the cantilever beam for providing a mechanical force to move the cantilever beam. The cantilever beam extends from a first end, which is in contact with either the first port or one of the second ports, to a second end that is switchably connectable to the other of the first port or said one of the second ports. The first and second ports and cantilever beam may be formed in a coplanar waveguide. |
| US10325741B2 |
Electromagnetic relay
An electromagnetic relay including: a relay body that includes a first terminal; a base that includes a second terminal which contacts the first terminal and supports the relay body; an outer cover that covers the relay body; and an elastic member that is attached between the relay body and the outer cover. |
| US10325737B2 |
Fast switch device
Disclosed is a fast switch device including: a reactor that moves to an open position where the switch is opened and a close position where the switch is closed; an open coil portion that drives the reactor to the open position by virtue of an eddy current component; a close coil portion that drives the reactor the close position by virtue of an eddy current component; and a controller that performs control such that an electric current is applied to the close coil portion oppositely to a direction of an electric current flowing through the open coil portion in order to brake the reactor during an open operation for driving the reactor to the open position, and an electric current is applied to the open coil portion oppositely to a direction of an electric current flowing through the close coil portion. |
| US10325736B2 |
Device with movable buttons or switches
A surgical device comprising: (a) one or more functional elements, and (b) a selector assembly including: (i) one or more activation buttons, (ii) one or more circuit board switches, and (iii) a shuttle in communication with the circuit board switches or the one or more activation buttons to move the circuit board switches or the activation buttons between at least a first position and a second position so that the circuit board switches or the activation buttons are moveable relative to each other; wherein the one or more functional elements provide a first function when the circuit board switches or the one or more activation buttons are in the first position, and the one or more functional elements provide a second function when the circuit board switches or the one or more activation buttons are in the second position. |
| US10325734B1 |
Keyboard switch
A keyboard switch includes a key top movable vertically on receiving a depressing force, a plunger engaged with a lower portion of the key top and movable vertically with the key top, a cup rubber disposed under the plunger and supporting the plunger from below, a housing arranged on an outer peripheral side of the plunger and cup rubber, a plate supported on the housing and extending laterally, and a spacer interposed between the plate and key top. The spacer is removably mounted onto the keyboard. |
| US10325733B2 |
Key button and method of manufacturing the same
A key button and a method of manufacturing the same are provided. The key button includes an upper surface, a side surface formed at a certain height along a border of the upper surface, and at least two worked surfaces formed to have a certain slope in a boundary portion between the side surface and the upper surface, wherein at least one first worked surface and at least one second worked surface are formed such that a shortest distance between the upper surface and the side surface differs from each other. |
| US10325730B2 |
High performance layered cathode materials for high voltage sodium-ion batteries
A cathode active material includes NaxMO2 having at least a first phase, a second phase different from the first phase, and a third phase that is different from the first and second phases, wherein each phase is independently selected from Pm or On, where m and n are individually an integer, M is a transition metal or a mixture of transition metals, and x is greater than 0 and less than or equal to 1. |
| US10325729B2 |
Dye-sensitized solar cell module
The present invention provides a dye-sensitized solar cell module having a plurality of dye-sensitized solar cells connected in series, wherein this module has at least one power generation unit in which at least one bypass diode is connected in parallel to n number (where n represents an integer of 1 to 4) of dye-sensitized solar cells among the plurality of dye-sensitized solar cells. |
| US10325725B2 |
Multilayer capacitor and board having the same
A multilayer capacitor includes a capacitor body including a plurality of first and second internal electrodes alternately stacked with dielectric layers interposed therebetween. A first via electrode penetrates through the plurality of first internal electrodes and is exposed at the first surface of the capacitor body. A second via electrode penetrates through the plurality of second internal electrodes, is exposed at the first surface of the capacitor body, and is spaced apart from the first via electrode. First and second external electrodes are on a first surface of the capacitor body, spaced apart from each other, and respectively connected to end portions of the first and second via electrodes. The first and second external electrodes each include a nickel (Ni) layer on the first surface of the capacitor body and a gold (Au) plating layer on the nickel layer. |
| US10325723B1 |
Electronic component
An electronic components includes: a multilayer capacitor including a capacitor body and a pair of external electrodes, an interposer including an interposer body and a pair of external terminals, and an adhesive; wherein the external terminal includes a bonding portion, a mounting portion, and a connection portion; wherein an adhesive is provided between the external electrode and the bonding portion, and falls along the connection portion of the external terminal; wherein 1.55≤(L+T22)/T1 in which T2 is a height at which the adhesive falls along the connection portion of each of the external terminals, L is a length of the bonding portion, and T1 is a height of the electronic component. |
| US10325720B2 |
Method for producing a heavy-current transformer
A method for manufacturing a heavy-current transformer with at least one primary winding and at least one secondary winding with surfaces for contacting connects first inner surfaces of the at least one secondary winding with an I-beam of electrically conductive material of the heavy-current transformer with a first soldering material at a first, higher melting temperature, and subsequently at least one contact plate of electrically conductive material is soldered with exterior surfaces of the at least one secondary winding with a second soldering material at a second melting temperature that is lower as compared to the first melting temperature. |
| US10325714B2 |
Integrated magnetic component and switched mode power converter
The invention related to an integrated magnetic component for a switched mode power converter. The integrated magnetic component comprises a single magnetic core structure formed by magnetic core elements, wherein at least one of the magnetic core elements is a leg-core-element with a flange and one or more legs are arranged on one side of the flange. The magnetic core elements of the single magnetic core structure are linearly stacked. The integrated magnetic component further comprises an isolating transformer with a higher current transformer winding arranged on at least one leg of the magnetic core elements, a lower current transformer winding arranged on at least one leg of the magnetic core elements and a first filter inductor comprising a first filter winding, arranged on at least one leg of the magnetic core elements. Herein the higher current transformer winding and the filter winding comprise at least an edgewise wound winding part. The invention further relates to a switched mode power converter. |
| US10325711B2 |
Coil component
A coil component: including a first planar spiral wiring and a second planar spiral wiring located above the first planar spiral wiring in a laminated direction and interconnected through connection vias to the first planar spiral wiring. The second planar spiral wiring is wound in a direction different from a winding direction of the first planar spiral wiring when viewed in the laminated direction. The first planar spiral wiring and the second planar spiral wiring have respective innermost circumferential overlapping portions overlapping with each other at the innermost circumferential region when viewed in the laminated direction. At least both end parts of the innermost circumferential overlapping portion of the first planar spiral wiring are in an interconnection with at least both end parts of the innermost circumferential overlapping portion of the second planar spiral wiring through the connection vias. |
| US10325704B2 |
Rare earth magnet
A rare earth magnet having a main phase and a sub-phase, wherein the main phase has a ThMn12-type crystal structure; the sub-phase contains at least any one of an Sm5Fe17-based phase, an SmCo5-based phase, an Sm2O3-based phase, and an Sm7Cu3-based phase; assuming that the volume of the rare earth magnet is 100%, the volume fraction of the sub-phase is from 2.3 to 9.5% and the volume fraction of an α-Fe phase is 9.0% or less; and the density of the rare earth magnet is 7.0 g/cm3 or more. |
| US10325700B1 |
Condenser bushing, transformer and method for producing a condenser bushing
A cast condenser bushing includes an electrical conductor; a plurality of condenser layers disposed about the conductor, each condenser layer including a fluted, corrugated electrical insulator and a conductive sheet; and epoxy encapsulating the plurality of condenser layers and forming an epoxy casting, wherein the epoxy is disposed within and between each condenser layer. |
| US10325696B2 |
Flexible cable with structurally enhanced conductors
In an electrical cable of the type having an outer sheath enclosing a conductor assembly comprising a plurality of insulated conductors disposed within a binder, the binder having a crush resistance for protecting the insulated conductors, an improvement in which a strength enhancer is mixed within the conductor insulation such that the binder can be removed without decreasing a crush resistance of the electrical cable. |
| US10325693B2 |
Copper-containing conductive pastes and electrodes made therefrom
Disclosed herein are copper-containing (Cu-containing) conductive pastes, copper (Cu) electrodes formed by firing the Cu-containing conductive paste over a substrate, and articles comprising a structural element with such Cu electrodes, wherein, the Cu-containing conductive paste contains a powder mixture of Cu, Ge, and B particles dispersed in an organic medium. |
| US10325692B2 |
X-ray diffractive grating and X-ray Talbot interferometer
An X-ray diffractive grating includes a phase advance portion and a plurality of phase delay portions. The phase advance portion includes a grating material. In each of the phase delay portions, the thickness of the grating material is less than that in the phase advance portion, and the area occupancy of the phase delay portions in the corresponding two-dimensional grating pattern is 15% or more but less than 45%. The phase delay portions are arranged in a hexagonal lattice shape. |
| US10325688B2 |
Passive heat removal system for nuclear power plant
The present invention relates to a passive heat removal system which circulates cooling fluid to a steam generator via a main water supply line connected to the lower inlet of the steam generator, and a main steam pipe connected to the top outlet of the steam generator, to remove sensible heat of a nuclear reactor coolant system and residual heat of a core. The heat removal system comprises supplementary equipment for receiving surplus cooling fluid or for supplying supplementary cooling fluid in order to maintain the flow rate of the cooling fluid within a predetermined range. The supplementary equipment comprises: a supplementary tank, installed at a height between the lower inlet and the top outlet of the steam generator; a first connection pipe, connected to the main steam pipe and the supplementary tank; and a second connection pipe, connected to the supplementary tank and the main water supply pipe. |
| US10325684B2 |
Method and system for microbiome-derived diagnostics and therapeutics for autoimmune system conditions
A method for at least one of characterizing, diagnosing, and treating an autoimmune disorder in at least a subject, the method comprising: receiving an aggregate set of biological samples from a population of subjects; generating at least one of a microbiome composition dataset and a microbiome functional diversity dataset for the population of subjects; generating a characterization of the autoimmune condition based upon features extracted from at least one of the microbiome composition dataset and the microbiome functional diversity dataset; based upon the characterization, generating a therapy model configured to correct the autoimmune condition; and at an output device associated with the subject, promoting a therapy to the subject based upon the characterization and the therapy model. |
| US10325682B2 |
Test apparatus and methods for ST2 cardiac biomarker
The technology described in this document can be embodied in a test strip for use in measuring a level of an ST2 cardiac biomarker in a blood plasma sample. The test strip includes a base, and a plurality of conjugates, wherein each conjugate includes a reporter group bound to a first antibody that binds to ST2. A conjugate pad disposed along a length of the base and is configured to hold the plurality of conjugates that bind with ST2 to produce conjugate-ST2 complexes. The conjugate pad is further configured to receive the blood plasma sample. The test strip also includes a plurality of second and third antibodies that bind to ST2, and the conjugate-ST2 complexes, respectively. The plurality of second antibodies are bound to a membrane in a test location and the plurality of third antibodies are bound to the membrane in a control location. |
| US10325681B2 |
Physiological alarm threshold determination
A method of reducing nuisance alarms from physiological parameter monitors by determining an alarm threshold adapted to a specific care unit, the patient care unit including a plurality of patients being monitored for the physiological parameter. The method includes analyzing physiological parameter measurements from the care unit to determine a number of alarm events indicated as a function of changing alarm criteria and providing an indication of a change in alarm threshold settings adapted to the care unit that reduces a plurality of false alarms without unacceptably increasing missed true alarms, the indication useable by a care provider facility to program alarm threshold settings in the patient care unit. |
| US10325680B2 |
User interface for an extracorporeal blood treatment machine
A user interface for a machine for extracorporeal blood treatment comprises a touch screen and a controller programmed to display on a screen (16) a display in which two distinct areas are arranged, one of which (161) exhibits a series of touch keys (17). Activation of any one touch key (17) causes visualization of an image in a second area (162) of the screen. The images are displayed alternatively and are at least partly different one from another. Each touch key (17) is associated to an instruction, or to a group of instructions, all concerned with readying the machine for use. Each image is a pictograph of a configuration of the machine, correlated with an instruction associated to the touch key (17) selected. The operator is aided in making the machine ready for treatment. |
| US10325678B2 |
Systems and methods for facilitating patient self-selection
Systems and methods are provided for over the counter statin delivery to a subject. Survey results from the subject are run against a first plurality of filters. When a filter in the first plurality of filters is fired, the subject is deemed not qualified. The survey results are also run against a second plurality of filters. When a respective filter in the second plurality is fired, the subject is provided with a corresponding warning. The method proceeds to a fulfillment process when no filter in the first plurality fires and the subject has acknowledged each warning associated with each fired filter in the second plurality. The fulfillment stores the composition order, communicates a drug facts label for the statin to the subject, and authorizes, upon subject confirmation that the label has been read, provision of the statin to the subject, the authorization including a destination associated with the subject. |
| US10325674B2 |
Apparatus, method, and system for creating phylogenetic tree
According to the present invention, a phylogenetic tree can be created on the basis of frequency data regarding a large number of mutations detected from the samples of a cancer. Each sample to be analyzed contains a mixture of plural clones having different genomes. Mutations having about the same frequencies are grouped to make plural groups, and an analysis is executed based on data listing the mutation frequencies of individual groups (called mutation group frequency data). It is assumed that pairs of clones corresponding respectively to mutation groups such that frequencies of one group is equal to or greater than that of another in all the samples have parent-child relations, and a graph structure having the clones as vertices and the parent-child relations as edges is created. In this graph, parent-child relations contradictory to the mutation group frequency data are removed, and a clone to become a parent is selected in consideration of correlation coefficients among the mutation group frequencies in the samples. |
| US10325672B2 |
Memory apparatus having plurality of information storage tables managed by separate virtual regions and control method thereof
Disclosed are a memory apparatus having a plurality of information storage tables managed by separate virtual regions and a control method thereof. That is, a fault repair is applied in a memory system having a plurality of information storage tables managed by a separate virtual region, so that the entire information storage space is uniformly used for every region to improve a performance of the entire system and maximize efficiency of the information storage space by utilizing the information storage space. |
| US10325669B2 |
Error information storage circuit and semiconductor apparatus including the same
An error information storage circuit configured to write information stored in a plurality of fuse sets to a plurality of fuse latch sets of a core block and/or to write test data to the plurality of fuse latch sets. The test data is internally generated depending on a fuse clock signal, and the test data has values which cause opposite levels to be written in adjacent latches of the plurality of fuse latch sets. |
| US10325667B2 |
Semiconductor storage device
A semiconductor storage device includes a word line and a wiring, a first transistor controlled to connect the word line to the wiring, a first booster circuit configured to boost an output voltage thereof to a first voltage, a second transistor controlled to connect the first booster circuit to the wiring, and a control circuit configured to control the first booster circuit, and the first and second transistors during a read operation. During the read operation, the control circuit controls the first booster circuit to start boosting its output voltage to the first voltage while controlling the second transistor to connect the output of the first booster circuit to the wiring so that a voltage of the wiring rises together with the output voltage. After the output voltage has reached the first voltage, the control circuit controls the first transistor to connect the word line to the wiring. |
| US10325664B2 |
Multi-bit memory system with adaptive read voltage controller
According to an embodiment, a semiconductor memory, on receiving a first command, applies a voltage within a first range and a voltage within a second range to a word line and reads a first bit from a memory cell, and, on receiving a second command, applies a voltage within a third range to the word line and reads a second bit from the memory cell. The controller issues the first command a plurality of times and changes the voltages to be applied to the word line within the first range and the second range in accordance with the plurality of first commands, specifies a first and second voltage within the first and the second range, respectively, and estimates a third voltage within the third range. The voltage applied to read the second bit is the estimated third voltage. |
| US10325663B1 |
Protecting memory cells from in-process charging effects
Systems, methods, circuits, and apparatus including computer-readable mediums for protecting memory cells from in-process charging effects for a memory system, e.g., NAND flash memory. The methods include: forming a first connection to connect a first node of a diode to a memory cell line coupled with one or more memory cells to be fabricated and a second connection to connect a second node of the diode to a control circuit, such that, during fabricating the memory, in-process charges accumulated on the memory cells are discharged to a ground via a conductive path formed by a first voltage caused by the in-process charges forward biasing the diode and then enabling the control circuit to conduct a current to the ground, and after fabricating the memory and during operating the memory, turning off the conductive path by reverse biasing the diode with a second voltage applied on the control circuit. |
| US10325662B2 |
Circuit and method for adjusting select gate voltage of non-volatile memory during erasure of memory cells based on a well voltage
A circuit for adjusting a select gate voltage of a non-volatile memory is provided. The circuit includes a well, a select gate, and an adjustment unit. There is a capacitive coupling between the well and the select gate. The adjustment unit generates a driving voltage for the select gate based on a non-constant voltage. |
| US10325661B2 |
Methods of programming memory
Methods of programming a memory include applying a programming voltage on an access line selected for a programming operation of a single page of the memory, applying a second voltage on an access line unselected for the programming operation, increasing the programming voltage for a first plurality of steps of the programming operation, and increasing the second voltage for a second plurality of steps of a first portion of the programming operation, then decreasing the second voltage at a particular point of the programming operation after completing the second plurality of steps and before completing the first plurality of steps. |
| US10325659B1 |
I/O buffer offset mitigation
Methods of operating an integrated circuit device, and integrated circuit devices configured to perform methods, including applying a particular voltage level to a first input of an input/output (I/O) buffer and to a second input of the I/O buffer, determining whether the I/O buffer is deemed to exhibit offset, and applying an adjustment to the I/O buffer offset while applying the particular voltage level to the first input of the I/O buffer and to the second input of the I/O buffer if the I/O buffer is deemed to exhibit offset. |
| US10325657B2 |
Non-volatile memory devices and methods of programming the same
Methods of programming a non-volatile memory device including N string selection lines, a word line, first and second bit line groups are provided. The method may include sequentially programming first memory cells that are connected to the word line and at least one bit line included in the first bit line group by sequentially selecting the N string selection lines in response to sequentially applied first to N-th addresses, and then sequentially programming second memory cells that are connected to the word line and at least one bit line included in the second bit line group by sequentially selecting one of the N string selection lines in response to sequentially applied N+1-th to 2N-th addresses. |
| US10325655B2 |
Temperature compensation circuits
A temperature compensation circuit may comprise a temperature sensor to sense a temperature signal of a memristor crossbar array, a signal converter to convert the temperature signal to an electrical control signal, and a voltage compensation circuit to determine a compensation voltage based on the electrical control signal and pre-calibrated temperature data of the memristor crossbar array. |
| US10325652B2 |
Cell programming verification
Technology for verifying cell programming for a phase change memory array is disclosed. In an example, a method may include sending a reset pulse to a phase change memory cell. The method may further include sensing a threshold voltage of the phase change memory cell in response to applying first and second verify voltages across the phase change memory cell, where the second verify voltage is lower than the first verify voltage. The method may also include determining whether the threshold voltage of the phase change memory cell was below the first or second verify voltages. |
| US10325650B2 |
Semiconductor storage device
A semiconductor storage device includes an SRAM memory cell composed of a drive transistor, a transfer transistor and a load transistor, an I/O circuit that is connected to bit lines connected to the memory cell, and an operating mode control circuit that switches an operating mode of the I/O circuit between a resume standby mode and a normal operation mode, wherein the I/O circuit includes a write driver that writes data to bit lines, a sense amplifier that reads data from the bit lines, a first switch inserted between the bit lines and the write driver, a second switch inserted between the bit lines and the sense amplifier, a precharge circuit that precharges the bit lines, and a control circuit that controls the first and second switches and the precharge circuit according to a signal from the operating mode control circuit. |
| US10325649B2 |
Ternary sense amplifier and SRAM array realized by the ternary sense amplifier
A ternary sense amplifier and an SRAM array realized by the ternary sense amplifier are provided. The ternary sense amplifier comprises the 1st CNFET transistor, the 2nd CNFET transistor, the 3rd CNFET transistor, the 4th CNFET transistor, the 5th CNFET transistor, the 6th CNFET transistor, the 7th CNFET transistor, the 8th CNFET transistor, the 9th CNFET transistor, the 10th CNFET transistor, the 11th CNFET transistor, the 12th CNFET transistor and the 13th CNFET transistor; the SRAM array comprises a ternary sense amplifier, a ternary memory array, the 1st inverter, the 2nd inverter, the 3rd inverter, the 4th inverter, the 14th CNFET transistor, the 15th CNFET transistor, the 16th CNFET transistor, the 17th CNFET transistor, the 18th CNFET transistor and the 19th CNFET transistor; it features in low power consumption, less postponement and high yield of chips. |
| US10325646B1 |
SRAM physically unclonable function (PUF) circuit and method
The disclosure describes approaches for generating a physically unclonable function (PUF) value. Power is applied to a power control circuit, an SRAM, and a PUF control circuit. After initially powering-up the SRAM, the PUF control circuit signals the power control circuit to disable power to the SRAM. The power control circuit disables power to the SRAM, and then re-enables power to the SRAM after having power to the SRAM disabled for a waiting period. The PUF control circuit reads a PUF value from the SRAM by the PUF control circuit after the enabling of power. |
| US10325645B2 |
Memory controller with clock-to-strobe skew compensation
A clock signal is transmitted to first and second integrated circuit (IC) components via a clock signal line, the clock signal having a first arrival time at the first IC component and a second, later arrival time at the second IC component. A write command is transmitted to the first and second IC components to be sampled by those components at respective times corresponding to transitions of the clock signal, and write data is transmitted to the first and second IC components in association with the write command. First and second strobe signals are transmitted to the first and second IC components, respectively, to time reception of the first and second write data in those components. The first and second strobe signals are selected from a plurality of phase-offset timing signals to compensate for respective timing skews between the clock signal and the first and second strobe signals. |
| US10325644B1 |
Pump circuit in a DRAM, and method for generating a pump current
The present disclosure provides a pump circuit comprising a temperature-sensing module, an oscillating module and a pumping module. The temperature-sensing module is configured to measure a temperature of a dynamic random access memory (DRAM). The oscillating module is coupled to the temperature-sensing module and is configured to generate a clock signal based on the temperature of the DRAM. The pumping module is coupled to the oscillating module and is configured to generate a pump voltage and a pump current to drive the DRAM, wherein the pump current is generated based on an oscillating frequency of the clock signal. When the temperature of the DRAM changes, the oscillating frequency of the clock signal changes based on the temperature of the DRAM, and the pump current correspondingly changes based on the oscillating frequency of the clock signal. |
| US10325643B2 |
Method of refreshing memory device and memory system based on storage capacity
A method of operating a memory device, a first setting signal is received by a first memory device among a plurality of memory devices. The first memory device has a first storage capacity, and the memory devices may be connected to one another by a single channel. A second setting signal is received by a second memory device among the plurality of memory devices. The second memory device has a second storage capacity different from the first storage capacity. N refresh operations are performed by the first memory device based on a first refresh command and the first setting signal during a first refresh period. M refresh operations are performed by the second memory device based on a second refresh command and the second setting signal during a second refresh period. A duration of the second refresh period is substantially the same as a duration of the first refresh period. |
| US10325641B2 |
Detecting location within a network
Systems and methods for detecting the presence of a body in a network without fiducial elements, using signal absorption, and signal forward and reflected backscatter of radio frequency (RF) waves caused by the presence of a biological mass in a communications network. |
| US10325636B1 |
Signal receiver with skew-tolerant strobe gating
A gating signal for masking overhead transitions in a data-strobe signal is generated adaptively based on timing events in the incoming data-strobe signal itself to yield a gating window that opens and closes deterministically with respect to active edges of the data-strobe signal. |
| US10325635B2 |
Devices, methods, and systems supporting on unit termination
The present disclosure includes devices, methods, and systems supporting on unit termination. A number of embodiments include a number of memory units, wherein a memory unit includes termination circuitry, and a memory unit does not include termination circuitry. |
| US10325633B2 |
Storage device and data training method thereof
Disclosed is a storage device. The storage device includes a nonvolatile memory device that receives write data based on a data strobe signal and a data signal and outputs read data based on the data strobe signal and the data signal, and a controller that performs a training operation for training the nonvolatile memory device to align the data signal and the data strobe signal. The controller detects a left edge of a window of the data signal for the training operation. The controller determines a center of the window by using the detected left edge and unit interval length information of the data signal or determines a start point of a detection operation for detecting a right edge of the window by using the detected left edge and the unit interval length information. |
| US10325631B1 |
Power management integrated circuit with dual power feed
A power management integrated circuit (PMIC) receives power from a host and a backup power supply in parallel and uses power from at least one of the host and the backup power supply to operate voltage regulators for a memory system. An enable signal is generated based on whether or not the voltage regulators are powered. The enable signal can be used to keep the backup power supply on while the memory system is in operation. In response to absence of power from the host, the PMIC generates an interrupt signal causing the memory system to shut down safely without data loss. |
| US10325630B2 |
Electronic device capable of operating on demonstration mode and normal mode
An electronic device that includes an external storage medium connection unit to which an external storage medium is connected; a detection unit that detects whether or not demonstration data is stored in the external storage medium connected to the external storage medium connection unit; and an operation mode control unit that causes the device to operate in a demonstration mode in a case where the demonstration data is stored in the external storage medium connected to the external storage medium connection unit, and causes the device to operate in a normal mode in a case where the external storage medium is not connected to the external storage medium connection unit and no demonstration data is stored in the external storage medium connected to the external storage medium connection unit. |
| US10325618B1 |
Perpendicular magnetic recording (PMR) writer with one or more spin flipping elements in the gap
A perpendicular magnetic recording writer has a main pole (MP) with a write gap formed between the MP trailing side and a trailing shield, a side gap between each MP side and a side shield, and a leading gap between the MP leading side and a leading shield. A flux guiding element is formed in at least one gap and comprises an inner non-spin preserving layer adjoining the MP, a middle flux guiding layer (FGL), and an outer spin preserving layer. A key feature is that the FGL has a magnetization that may be aligned anti-parallel to a gap field during a write process when a current of sufficient magnitude is applied from the adjacent shield towards the MP thereby increasing reluctance in the gap and forcing additional flux out of the MP at the air bearing surface to enhance writability on a magnetic recording medium. |
| US10325617B2 |
Electronic device and method for classifying voice and noise
An electronic device includes a first microphone that receives a sound generated for a specific time period, from the outside, a second microphone, which is disposed at a location spaced apart from the first microphone and which receives the sound, an audio converter comprising audio converting circuitry, and a processor electrically connected with the first microphone, the second microphone, and the audio converter. The processor is configured to convert the sound obtained from the first microphone, into a first signal and to convert the sound obtained from the second microphone, into a second signal, using the audio converter, and to determine the sound, which is generated for the specific time period, as a voice or a noise based on a frequency-related correlation between the first signal and the second signal. |
| US10325614B2 |
Voice-based realtime audio attenuation
An example implementation may involve driving an audio output module of a wearable device with a first audio signal and then receiving, via at least one microphone of wearable device, a second audio signal comprising first ambient noise. The device may determine that the first ambient noise is indicative of user speech and responsively duck the first audio signal. While the first audio signal is ducked, the device may detect, in a subsequent portion of the second audio signal, second ambient noise, and determine that the second ambient noise is indicative of ambient speech. Responsive to the determination that the second ambient noise is indicative of ambient speech, the device may continue the ducking of the first audio signal. |
| US10325613B1 |
Acoustic delay estimation
An acoustic signal delay measurement apparatus constituted of: an acoustic signal input terminal; an acoustic signal output terminal; at least one echo input terminal; an adjustable tapped delay line exhibiting a plurality of taps, a first end of the tapped delay line coupled to the acoustic signal input terminal, each of the taps exhibiting a respective predetermined delay; a processor, an output of the processor coupled to a control input of the adjustable tapped delay line; and a plurality of adaptive filters, a first input of each of the plurality of adaptive filters coupled to a respective one of the at least one echo input terminal, a second input of each of the plurality of adaptive filters coupled to a respective one of the plurality of taps and an output of each of the plurality of adaptive filters coupled to a respective input of the processor, wherein the processor is arranged to determine a system delay responsive to: the amount of time it takes for one of the plurality of adaptive filters to converge; and the delay of the tap associated with the converged adaptive filter. |
| US10325611B2 |
Audio decoder, method and computer program using a zero-input-response to obtain a smooth transition
An audio decoder for providing a decoded audio information on the basis of an encoded audio information includes a linear-prediction-domain decoder configured to provide a first decoded audio information on the basis of an audio frame encoded in a linear prediction domain, a frequency domain decoder configured to provide a second decoded audio information on the basis of an audio frame encoded in a frequency domain, and a transition processor. The transition processor is configured to obtain a zero-input-response of a linear predictive filtering, wherein an initial state of the linear predictive filtering is defined depending on the first decoded audio information and the second decoded audio information, and modify the second decoded audio information depending on the zero-input-response, to obtain a smooth transition between the first and the modified second decoded audio information. |
| US10325609B2 |
Coding and decoding a sound signal by adapting coefficients transformable to linear predictive coefficients and/or adapting a code book
A linear predictive coding apparatus is provided that performs linear predictive analysis using a pseudo correlation function signal sequence obtained by performing inverse Fourier transform regarding the η1-th power of the absolute values of the frequency domain sample sequence corresponding to the time-series signal as a power spectrum to obtain coefficients transformable to linear predictive coefficients. The apparatus further adapts values of η for a plurality of candidates for coefficients transformable to linear predictive coefficients stored in a code book and the coefficients transformable to linear predictive coefficients are obtained by the linear predictive analysis. The apparatus further obtains a linear predictive coefficient code corresponding to the coefficients transformable to linear predictive coefficients obtained by the linear predictive analysis, using the plurality of candidates for coefficients transformable to linear predictive coefficients and the coefficients transformable to linear predictive coefficients for which the values of η have been adapted. |
| US10325607B2 |
Coding of multichannel audio content
There are provided decoding and encoding methods for encoding and decoding of multichannel audio content for playback on a speaker configuration with N channels. The decoding method comprises decoding, in a first decoding module, M input audio signals into M mid signals which are suitable for playback on a speaker configuration with M channels; and for each of the N channels in excess of M channels, receiving an additional input audio signal corresponding to one of the M mid signals and decoding the input audio signal and its corresponding mid signal so as to generate a stereo signal including a first and a second audio signal which are suitable for playback on two of the N channels of the speaker configuration. |
| US10325601B2 |
Speaker recognition in the call center
Utterances of at least two speakers in a speech signal may be distinguished and the associated speaker identified by use of diarization together with automatic speech recognition of identifying words and phrases commonly in the speech signal. The diarization process clusters turns of the conversation while recognized special form phrases and entity names identify the speakers. A trained probabilistic model deduces which entity name(s) correspond to the clusters. |
| US10325599B1 |
Message response routing
Systems and methods for extracting contact information from a message are described. A system can receive a message for a recipient, where the message originates from a message source having a first contact identifier (i.e., phone number, text address, etc.). The system can determine text data associated with the content of that message and process the text data to determine that the message refers to a second contact identifier that is different from the first contact identifier. The system may output the message to a recipient device (such as using text-to-speech, etc.) and may store an association between the message source and the second contact identifier. When the recipient speaks a command to reply to the first message or contact the message source, the system may determine the reply is intended for the message source and may route the reply using the second contact identifier included in the first message. |
| US10325593B2 |
Method and device for waking up via speech based on artificial intelligence
A method and a device for waking up via a speech based on artificial intelligence are provided in the present disclosure. The method includes: clustering phones to select garbage phones for representing the phones; constructing an alternative wake-up word approximate to a preset wake-up word according to the preset wake-up word; constructing a decoding network according to the garbage phones, the alternative wake-up word and the preset wake-up word; and waking up via the speech by using the decoding network. Due to the data size for the garbage phones is significantly smaller than the data size for the garbage words, a problem that the data size occupied is too large by using a garbage word model in the prior art is solved. Meanwhile, as a word is composed of several phones, the garbage phones may be more likely to cover all words than the garbage words. Thus, an accuracy of waking up is improved and a probability of false waking up is reduced. |
| US10325590B2 |
Language model modification for local speech recognition systems using remote sources
A language model is modified for a local speech recognition system using remote speech recognition sources. In one example, a speech utterance is received. The speech utterance is sent to at least one remote speech recognition system. Text results corresponding to the utterance are received from the remote speech recognition system. A local text result is generated using local vocabulary. The received text results and the generated text result are compared to determine words that are out of the local vocabulary and the local vocabulary is updated using the out of vocabulary words. |
| US10325589B2 |
Speech recognition using an operating system hooking component for context-aware recognition models
Inputs provided into user interface elements of an application are observed. Records are made of the inputs and the state(s) the application was in while the inputs were provided. For each state, a corresponding language model is trained based on the input(s) provided to the application while the application was in that state. When the application is next observed to be in a previously-observed state, a language model associated with the application's current state is applied to recognize speech input provided by a user and thereby to generate speech recognition output that is provided to the application. An application's state at a particular time may include the user interface element(s) that are displayed and/or in focus at that time, and is determined by an operating system hooking component embedded in the automatic speech recognition system. |
| US10325587B2 |
Noise reducing device, noise reducing method, noise reducing program, and noise reducing audio outputting device
A noise reducing device includes: an acoustic-to-electric conversion section for collecting noise and outputting an analog noise signal; an analog-to-digital conversion section for converting the analog noise signal into a digital noise signal; and a digital processing section for generating a digital noise reducing signal on a basis of the digital noise signal and a desired parameter. The device further includes: a retaining section for retaining a plurality of parameters corresponding to a plurality of kinds of noise characteristics; a setting section for setting one of the plurality of parameters as the desired parameter of the digital processing section; a digital-to-analog conversion section for converting the digital noise reducing signal into an analog noise reducing signal; and an electric-to-acoustic conversion section for outputting noise reducing sound on a basis of the analog noise reducing signal. |
| US10325583B2 |
Multichannel sub-band audio-signal processing using beamforming and echo cancellation
Provided are, among other things, systems, methods and techniques for audio-signal processing. One representative embodiment includes HT sub-band analysis/decomposition modules, e.g., one for each audio channel and one for an echo reference signal. Each HT sub-band analysis/decomposition module includes a Hilbert Transformation module and an analysis/decomposition filter bank and provides sub-band outputs. Echo-cancellation modules, e.g., one for each audio channel, perform echo-cancellation processing on such sub-bands. Beamforming modules, e.g., one for each sub-band, then perform beamforming, e.g., across all audio channels. Finally, a resynthesis stage combines the different sub-band outputs in order to provide a system output signal. |
| US10325579B1 |
Means and method for informing a stringed instrument player of the mechanical status of their instrument's strings and when and whether the strings need to be replaced
A system and method to help players of string instruments with the usability of their instruments, particularly with the detection and assessment of the mechanical status of their instrument's strings and in determining when and/or whether the strings need to be replaced. |
| US10325578B1 |
Musical instrument
A musical instrument is provided. The musical instrument includes at least, but is not limited to, a core portion providing a neck, and headstock portions, a body portion attached to the core portion, the body portion including at least a relief, the relief configured to accommodate an arm of a chair, and a tuning structure secured to the headstock. The musical instrument further includes at least, but is not limited to, a plurality of strings secured to the tuning structure, a bridge portion communicating with the plurality of strings, and a pick up secured to the body portion and interacting with the plurality of strings. |
| US10325577B1 |
Folding marimba
A foldable idiophone musical instrument may have two frames to support accidental tone bars on the first frame and natural tone bars on the second frame. Connecting members may attach to opposite ends of the frames. The connecting members may allow the frames to rotate from 0° to 180° from a horizontal position to collapse or fold the instrument. The connecting members may have a riser portion and a stop block portion. The riser portion may elevate the accidental tone bars above the natural tone bars. The stop block portion may prevent the frames from rotating to less than 0° from the horizontal when in a performance position. |
| US10325569B2 |
Method and apparatus for coding image information for display
The present disclosure discloses a color gamut mapping method, an apparatus, and a storage medium in the technical field of displaying. The method includes: acquiring at least one color gamut type tag for at least one layer; determining at least one color gamut corresponding to the at least one layer, based on the at least one color gamut type tag; for each layer, mapping the layer to a corresponding color gamut by using a color gamut mapping method corresponding to the color gamut type; and superimposing the at least one layer that is mapped to the at least one corresponding color gamut so as to form and output an image to be displayed. |
| US10325566B2 |
Touch device detecting mutual capacitance and self capacitance and driving method thereof
A touch device includes first and second electrodes intersecting each other, and a touch controller. The touch controller is configured to: apply a first driving signal to the first electrodes; selectively apply a second driving signal to the second electrodes; and detect self capacitances of at least one of the first electrodes and a first portion of the second electrodes intersecting the first electrodes. The at least one of the first electrodes is configured to receive the first driving signal, and the first portion of the second electrodes is configured to receive the second driving signal. The touch controller is further configured to detect mutual capacitances between the at least one of the first electrodes and a second portion of the second electrodes intersecting the first electrodes, in which the second portion of the second electrodes is configured not to receive the second driving signal. |
| US10325565B2 |
Array substrate, display panel and liquid crystal display device
An array substrate includes a display region and a non-display region around the display region. The display region comprises a plurality of rows of pixel units arranged sequentially along a first direction and a plurality of gate scanning lines corresponding to the plurality of rows of the pixel units, respectively, and the gate scanning lines extend along a second direction. Cascaded first shift register units are disposed at at least one edge of the non-display region parallel to the second direction, and each of the first shift register units is connected with a corresponding one of the plurality of gate scanning lines; and cascaded second shift register units are disposed at at least one edge of the non-display region parallel to the first direction, and each of the second shift register units is connected with a corresponding one of the plurality of gate scanning line. |
| US10325564B2 |
Clock generation circuit having over-current protecting function, method of operating the same and display device
A clock generation circuit includes: a clock generator to receive a gate pulse signal and to generate at least one gate clock signal corresponding to the gate pulse signal; an over-current protector to detect a current level of the at least one gate clock signal, and to output a shutdown enable signal and at least one switching signal corresponding to the detected current level; and a switching unit including at least one switching device to output the gate pulse signal as the at least one gate clock signal. The clock generator is to generate the at least one gate clock signal in response to the shutdown enable signal, and the at least one switching device is to transmit the gate pulse signal as the at least one gate clock signal in response to the at least one switching signal. |
| US10325556B2 |
Display panel and display unit
A display panel according to an embodiment of the technology is provided with a plurality of pixels. The pixels each include a light-emitting device and a pixel circuit. Each pixel circuit includes a memory circuit. The memory circuit includes a storage capacitor and a first switching transistor. The storage capacitor is configured to store a signal voltage. The first switching transistor is provided between a gate of a driving transistor and the storage capacitor. The memory circuit further includes a second switching transistor. The second switching transistor is provided between the storage capacitor and the first switching transistor, or provided on side opposite to the first switching transistor with respect to the storage capacitor. |
| US10325552B2 |
Organic light emitting display device
Discussed is an organic light emitting display device capable of reducing power consumption and increasing lifespan of the device. The device includes a display panel including pixels in respective pixel regions defined by a plurality of gate lines, data lines and driving voltage lines, wherein each pixel includes an organic light emitting diode which emits light by a current, and a pixel circuit having a driving transistor for controlling a current flowing from the driving voltage line to the organic light emitting diode on the basis of data voltage; and a panel driver for converting frame video data into the data voltage, supplying the data voltage to each pixel, calculating peak luminance value and maximum grayscale value by analyzing the frame video data, and varying the driving voltage based on the peak luminance value and maximum grayscale value. |
| US10325551B2 |
LED driving apparatus, display apparatus and method for driving LED
An LED driving apparatus, a display apparatus and an LED driving method are provided. The LED driving apparatus according to an example embodiment may include a plurality of LEDs configured to represent a different color, respectively, a constant current supply configured to supply constant current to each of the plurality of LEDs, and a controller configured to control the constant current supply to apply constant current to each of the plurality of LEDs at different points in time. |
| US10325549B2 |
Display device, driving method thereof, and image display system
A driving method of a display device includes: receiving a partial display signal from a graphic controller; detecting partial resolution information from the partial display signal; determining a number of activation data lanes from among a plurality of data lanes based on the partial resolution information; generating a lane control signal including information on the number of activation data lanes; outputting the lane control signal to the graphic controller; and receiving image data through the activation data lanes from among the plurality of data lanes from the graphic controller. |
| US10325547B2 |
Display device and method of compensating degradation of a display panel
A display device includes a display panel that includes a pixel, a current sensor that measures a driving current provided to the display panel, and a timing controller that calculates a reference driving current and a degradation ratio of the pixel based on first image data provided to the display panel and compensates second image data based on the driving current, the reference driving current, and the degradation ratio of the pixel. |
| US10325541B2 |
Large-format display systems having color pixels and white pixels
Large-format display systems having color pixels and white pixels are disclosed. In an embodiment, the system includes a video camera, a video processor, and a large-format display that includes the color pixels and the white pixels. The video processor processes the video signal from the video camera, but the video processor does not perform a white-to-RGB conversion. Instead, the information for the white pixels is sent directly to the large-format display to form the color display image. A viewer's visual system performs the white-to-RGB conversion when viewing the color display image. A method of forming the color display image using color pixels and white pixels is also disclosed. Methods of performing color matching using the color pixels and white pixels are also disclosed. |
| US10325540B2 |
Pixel structure, display panel and pixel compensation method therefor
A pixel structure including a pixel array is disclosed. The pixel array includes a plurality of pixels, each including a first sub-pixel, a second sub-pixel, and a third sub-pixel. The pixel array also includes a plurality of pixel dots, each including a plurality of sub-pixels from two adjacent rows of sub-pixels in the pixel array, wherein any two of the adjacent rows of sub-pixels in the pixel array are shared by each other. A first pixel dot includes a first sub-pixel and a plurality of surrounding sub-pixels adjacent to the first sub-pixel, wherein at least one or more of the surrounding sub-pixels and the first sub-pixel are shared by each other. In addition, the first pixel dot includes at least four sub-pixels including at least one first sub-pixel, one second sub-pixel, and one third sub-pixel. |
| US10325537B2 |
System and methods for extraction of threshold and mobility parameters in AMOLED displays
A system reads a desired circuit parameter from a pixel circuit that includes a light emitting device, a drive device to provide a programmable drive current to the light emitting device, a programming input, and a storage device to store a programming signal. One embodiment of the extraction system turns off the drive device and supplies a predetermined voltage from an external source to the light emitting device, discharges the light emitting device until the light emitting device turns off, and then reads the voltage on the light emitting device while that device is turned off. The voltages on the light emitting devices in a plurality of pixel circuits may be read via the same external line, at different times. |
| US10325535B2 |
Circuit for testing display panel, method for testing display panel, and display panel
A method for testing a display panel includes: applying a first level signal to a first sub-pixel and a third sub-pixel of a first pixel unit and applying a second level signal to a second sub-pixel of the first pixel unit; applying the second level signal to a first sub-pixel and a third sub-pixel of a second pixel unit and applying the first level signal to a second sub-pixel of the second pixel unit; and detecting a short circuit between adjacent sub-pixels. The first level signal has a voltage polarity opposite to a voltage polarity of the second level signal. Therefore, it is ensured that any two adjacent sub-pixels have opposite voltage polarities when the short circuit between adjacent sub-pixels of the display panel is detected. The method also provides improved testing abilities to detect an open circuit in a sub-pixel. |
| US10325534B2 |
Display device
A display device including a display panel including a chip mounting region and a driver mounted on the chip mounting region, the driver configured to provide signals to a display region of the display device to display an image on the display region. The display panel includes a first connection line, a second connection wire line, and a third connection wire line sequentially disposed in the chip mounting region; a first shorting bar, a second shorting bar, and a third shorting bar correspondingly connected to the first connection wire line, the second connection wire line, and the third connection wire line; and a bridge wire line configured to electrically connect at least one of the first, second, and third shorting bars and the second connection wire line. Neighboring connection wire lines of the first, second, and third connection wire lines are disposed in different layers. |
| US10325530B2 |
Display device and controlling method for curvature of the same
A method for controlling a curvature of a display device as a control method of the curvature of the display device including a flexible display panel, a curvature change member, a controller, and a photo sensor includes: measuring an amount of a light incident to the flexible display panel by using a photo sensor; confirming a position of a part where the amount of the measured light is more than a predetermined reference value in the flexible display panel when the amount of the measured light is more than the reference value; and changing the curvature around the part where the amount of the measured light is more than the reference value in the flexible display panel by using the curvature change member. |
| US10325529B1 |
Interactive warning systems and methods
An interactive, multi-message, multimedia hazard communication labeling and hazard control system which communicates critical consumer safety information, including: 1) the core or principal hazard (i.e., “FALL HAZARD”); 2) a core or principle signal word (i.e., “DANGER,” “CAUTION,” “WARNING,” etc.) which indicates the level of hazard; 3) the core or principal consequence(s) of interaction with that hazard (i.e., “Failure to follow these instructions may result in serious injury or death!”); 4) the core or principal hazard controls and/or hazard mitigation messages arranged in around the periphery or in close proximity of the principal hazard depicted graphically; 5) the core or principal hazard controls and/or hazard mitigation messages arranged around the periphery or in close proximity of the principal hazard in text format; 6) a quick response (QR) code which provides a scannable, digital link to a web-based platform which provides both specific, as well as, general hazard control information about the control of the core or principal hazard; and 7) a Uniform Resource Locator (URL) which links directly to the web-based information providing digital web-based information about the control of the core or principle hazard. |
| US10325522B2 |
Medical training system and method of employing
A medical training method includes generating an image of a first level of anatomical structures, displaying the image in a correct registration in a first display area on the surface of a portion of a simulated body, detecting a user input associated with the portion of the simulated body, and responsive to said detecting, generating and displaying at least one visual image in a correct registration in the first display area. A system for carrying out such method is also provided. |
| US10325519B2 |
Vehicle tutorial system and method for sending vehicle tutorial to tutorial manager device
A vehicle tutorial system includes a data storage device having at least one vehicle tutorial, an on-board identification sensor, an on-board vehicle communication device, a tutorial manager device located in a cloud computer and/or the remote device, and an on-board vehicle controller. The on-board vehicle controller is programmed to identify the user of the vehicle based on information from the on-board identification sensor, select the vehicle tutorial, select the remote device associated with the user of the vehicle, offer the vehicle tutorial to the user at a first time, and upon the user declining the offer at the first time, send the vehicle tutorial to the tutorial manager device. The tutorial manager device includes a processor programmed to offer the vehicle tutorial to the user at a time later than the first time on the on-board vehicle display or on the remote device. |
| US10325513B2 |
Musical performance assistance apparatus and method
Musical score acquisition section acquires musical score information representing a musical score of a music piece to be practiced by a user. Target portion setting section sets a plurality of portions of the music piece as target portions for training, respectively. Target musical score acquisition section acquires target musical score information indicative of partial musical scores of the respective target portions for training set by the target portion setting section. Display control section controls, on the basis of the target musical score information acquired by the target musical score acquisition section, a display device to display two or more of target musical scores in a side-by-side arrangement. Thus, a user can easily grasp the plurality of target portions for training. |
| US10325508B2 |
Apparatus and associated methods for collision avoidance
An apparatus comprising a hand-portable electronic device including a detection-and-ranging element configured to provide spatial information of one or more physical objects in a space around the hand-held portable electronic device for collision avoidance, the detection-and-ranging element configured to transmit one or more electromagnetic, wireless detection signals and configured to detect one or more reflections of said one or more electromagnetic, wireless detection signals from the one or more objects. |
| US10325502B2 |
Parallel parking assistant
The present disclosure relates to parking systems and parking methods. One parking system may include: a vehicle having an accelerator, brakes, wheels, sensors, a display, a processor, and memory; a parking assist program stored in the memory and configured to: receive dimensions of a parallel parking spot and the vehicle, project, based on the received dimensions, whether the vehicle can: exit the parallel parking spot with a future leading block, and exit the parallel parking spot with a future trailing block. |
| US10325500B2 |
Method and apparatus for detecting blind spot of unmanned vehicle
The present disclosure discloses a method and apparatus for detecting blind zone of an unmanned vehicle. A specific embodiment of the method comprises: receiving a detection initiating request, the detection initiating request including: a position of the vertical shaft, a length of the vertical shaft and a set movement speed of the vertical shaft; detecting the vertical shaft; determining an anticipated detection time based on the position of the vertical shaft and the set movement speed; recording an actual detection time in response to detecting the vertical shaft; determining a missed detection position of the vertical shaft based on a time difference between the actual detection time and the anticipated detection time and the set movement speed, in response to confirming the actual detection time being different from the anticipated detection time; and determining a blind zone based on the length of the vertical shaft and the missed detection position. |
| US10325498B2 |
Vehicle communication through dedicated channel
Methods for broadcasting or receiving information through a channel which is dedicated for vehicular safety use are provided. And electronic devices are provided. One of the methods includes: an electronic device mounted on a vehicle obtaining lane information of the vehicle, where the lane information indicates on which lane the vehicle is travelling; and broadcasting the lane information of the vehicle through a channel which is dedicated for vehicular safety use. By employing the methods, electronic devices can broadcast their lane information, road information or layer information through a channel which is dedicated for vehicular safety use, which may meet requirements in some vehicular safety applications. |
| US10325490B2 |
Providing driving condition alerts using road attribute data
A method and system for providing a driving condition alert to vehicle drivers and others are disclosed. The alert is provided based on road location and attribute data; real-time, historic, and forecast traffic data; real-time, historic, and forecast weather data; and/or scheduled and unscheduled event data. The alert may include information indicating the reason for the alert provided. In addition, the alert may include a relative scale of hazard (e.g., a scale of 1-10 with 1 representing no hazard and 10 representing the highest hazardous condition). As a result of receiving the alert, the driver may adjust their route or driving behavior. |
| US10325486B2 |
System and method for optimized appliance control
In response to a detected presence of an intended target appliance within a logical topography of controllable appliances identity information associated with the intended target appliance is used to automatically add to a graphical user interface of a controlling device an icon representative of the intended target appliance and to create at a Universal Control Engine a listing of communication methods for use in controlling corresponding functional operations of the intended target appliance. When the icon is later activated, the controlling device is placed into an operating state appropriate for controlling functional operations of the intended target appliance while the Universal Control Engine uses at least one of the communication methods to transmit at least one command to place the intended target appliance into a predetermined operating state. |
| US10325482B1 |
Emergency location identfication using wireless devices
Embodiments of the present disclosure include an efficient and accurate method for presenting victim locations to emergency responders. The method disclosed can be used to track individuals still remaining in a building in case of an emergency. The method comprises determining a location for an individual by receiving a device identifier (e.g., combination of numbers and/or characters uniquely identifying a receiving device associated with the individual) and location information, received from one or more beacons, from the receiving device. The method comprises determining a first location associated with the receiving device based on the location information and/or the device identifier. The method comprises determining different locations associated with the individual as the individual moves and determining whether the individual is still within the building. The method comprises, displaying location information and instructions to reach the individual in case of an emergency. |
| US10325480B2 |
Proximity assisted seamless service (PASS)
A mobile communications device for providing proximity-based assistance includes a communications interface, a processor, and a memory that is configured to store instructions thereon that cause a processor to register, at a first time, a user of the mobile device as needing a type of assistance. The instructions also cause the processor to broadcast, at a second time, a request for assistance. The request includes the type of assistance needed. The request is broadcast to helper devices that are within a predetermined proximity of the user. Each of the helper devices is associated with a corresponding user that is registered to assist with the particular type of assistance needed. The instructions cause the processor to receive an indication from a helper device that the corresponding user has accepted the help request, determine that the corresponding user has assisted the user, and notify staff that the user has been assisted. |
| US10325478B2 |
Safe zones in tracking device environments
A tracking system determines if a tracking device is located within a safe zone based on whether a set of safe conditions are satisfied. The set of safe conditions includes a geographic boundary or a geographic location and corresponding threshold distance. The set of safe conditions can also include a time window during which a safe zone is active. When a tracking device is within a safe zone (e.g., geographically and temporally), the tracking device is determined to be safe, and notifications associated with the tracking device can be minimized. The safe zones may be user-selected, user-defined, or determined based on data analytics. If a set of safe conditions are not satisfied, the tracking system generates and sends a notification to the user of the tracking device indicating that the tracking device may be lost. |
| US10325476B2 |
Automatic adjustment of metric alert trigger thresholds
Arrangements relate to the automatic adjustment of an alert trigger threshold associated with a metric. In response to a determination that a predetermined alert trigger threshold associated with a metric is met, an alert notification can be sent to a plurality of users associated with the metric. Feedback on the alert notification can be received from one or more of the plurality of users. The alert trigger threshold can be adjusted based on the received feedback. Such adjusting can be performed using a processor. |
| US10325475B2 |
Abnormality reporting system and electric tool, and communication terminal
A technique capable of immediately reporting to an operator an occurrence of abnormality in an electric tool is provided. A communication terminal 100 includes a communication-terminal-side control unit that determines whether abnormality has occurred in any of electric tools 10, 200, 300, and 400 based on information acquired from the electric tools 10, 200, 300, and 400 via wireless communication. When the communication-terminal-side control unit determines the occurrence of abnormality in any one of the electric tools 10, 200, 300, and 400, the occurrence of abnormality in the electric tool 10, 200, 300, or 400 is reported by at least one of a report unit included in the electric tools 10, 200, 300, and 400 other than the electric tool 10, 200, 300, or 400 in which the occurrence of abnormality is determined and a report unit included in the communication terminal 100. |
| US10325474B2 |
Method, device, and system for fault unit indication
Embodiments of the present disclosure relate to a solution for fault unit indication. In some embodiments, there is provided a method for positioning a fault unit. The method comprises supplying power to a controller and a light emitting diode (LED) circuit by a battery module, wherein the LED circuit includes a plurality of LEDs associated with a plurality of units. The method further comprises transmitting a trigger signal to the controller by the battery module in response to receiving a control signal for triggering positioning, such that an LED of the plurality of LEDs associated with a fault unit is turned on. |
| US10325470B2 |
System for monitoring health status of a person within an enclosed area
A system for monitoring a health status of a person within an enclosed area may include a plurality of sensors distributed about the enclosed area. The sensors may be configured to detect respective different types of inputs based upon activity by the person within the enclosed area. The system may also include a computing device cooperating with the sensors to determine when the health status falls below a threshold status level based upon a timing and sequence in which the sensors are activated from the activity of the person within the enclosed area, and generate an alert based upon the health status falling below the threshold status level. |
| US10325469B2 |
Digital fingerprint tracking
Techniques are described for tracking intruders of a monitored property by the unique identifying characteristics or “digital fingerprints” of electronic devices carried by the intruders. A system detects an alarm event at a monitored property based on output from at least one sensor located at the monitored property. In response to detecting the alarm event at the monitored property, the system initiates a process to gather electronic identifiers for mobile electronic devices located within the monitored property at a time corresponding to the detected alarm event. The system determines electronic identifiers for the mobile electronic devices located within the monitored property at a time corresponding to the detected alarm event. The system stores in electronic storage, information indicating the determined electronic identifiers for the mobile electronic devices located within the monitored property at a time corresponding to the detected alarm event. |
| US10325464B1 |
Systems and methods for security tag detachment or deactivation
Systems and methods for operating a security tag. The methods involve: receiving, by the security tag, an authorization code comprising a security tag identifier signed using a cryptographic key of a plurality of cryptographic keys that are respectively assigned to a plurality of security tags; performing operations by the security tag to verify a signature of the authorization code; and performing detach operations or deactivation operations by the security tag, responsive to the signature's verification. The detach operations cause a mechanical detachment of the security tag from an item. The deactivation operations cause a disablement of a response by the security tag to an interrogation signal from a Radio Frequency Identification (“RFID”) system or an Electronic Article Surveillance (“EAS”) system. |
| US10325462B2 |
Wireless motion monitoring system and method thereof
The present disclosure described herein, a wireless motion monitoring system and method. The motion detection device may comprise at least two sensors, a microprocessor and a memory unit. The motion detection device comprises retrieving a first motion data and a second motion data, filtering noise data, transmitting the filtered motion data to a data processing device, calculating steady-state values and transmitting the steady-state values to the data processing device. The data processing device comprises receiving a first filtered motion data, a second filtered motion data and steady-state values, normalizing the first filtered motion data, calculating velocity and displacement, comparing the displacement with a pre-defined displacement threshold, verifying whether a difference between a last value in the second filtered motion data and the steady-state values is greater than a pre-defined threshold value, validating the movement of the motion detection device and updating a change in status of the motion detection device. |
| US10325458B2 |
System and method for emergency exit LED lighting
A system and method for emergency exit LED lighting. The emergency exit lighting fixture comprises a structure for housing at least one LED light, an LED driver electronically coupled to the LED light(s), a continuous power source, a backup power source, and a test switch. The fixture, in various configurations, may be mounted to a wall, a ceiling, or a doorway. The fixture may be tested remotely. |
| US10325454B2 |
Method for providing notification and electronic device thereof
A method for providing a notification and/or an electronic device thereof are provided. The electronic device may include an output device, a communication circuitry, and a processor. The processor may be configured to receive a first notification from a first external electronic device via the communication circuitry, receive a second notification from a second external electronic device via the communication circuitry, determine whether the first notification and the second notification match, and when the first notification and the second notification match each other, output an output signal corresponding to a selected notification among the first notification and the second notification through the output device and/or an external output device operatively coupled to the electronic device, and disregard a non-selected notification among the first notification and the second notification. |
| US10325452B2 |
Systems and methods for providing a feature game
Described herein is a gaming machine and, a method of gaming thereon, comprising: a symbol selector for selecting a plurality of symbols from a set of symbols for display during play of a base game; an outcome evaluator for monitoring play of the base game, wherein a feature game is triggered in response to a trigger event during the base game, the feature game having at least one predefined rule; a rule modifier for modifying said predefined rule in response to a determination that said at least one predefined rule is to be modified before play of said feature game; and a controller for initiating play of said feature game based on the modified rule. |
| US10325450B2 |
Gaming system and method for providing a plurality of chances of winning a progressive award with dynamically scalable progressive award odds
The gaming system disclosed herein provides a plurality of chances to win a progressive award with the odds of winning the progressive award in at least one chance being based on the wager amount placed. |
| US10325449B2 |
Mechanisms for detection of gambling rule violations
A system for interactive gaming among a plurality of players includes a host computer system and a plurality of player terminals communicably coupled to the host computer system or gaming platform via a network. The plurality of player terminals may be a mobile gaming computing device including non-transitory memory having instructions stored that when executed by a processor causes the gaming device to employ collusion avoidance measures to detect a gambling rule violation by determining the locations of each of a plurality of mobile gaming computing devices and whether each of the plurality of mobile gaming computing devices can participate in the interactive gaming session based on location. The mobile gaming device collecting snapshots of state information during the course of an interactive gaming session, and are submitted to a collusion detection module for analysis. |
| US10325448B2 |
Gaming machine having secondary gaming controller and primary and secondary credit balances
A gaming machine has a main or master gaming controller for presenting primary games based upon wagers of primary credits associated with a primary credit balance. A secondary controller is associated with the gaming machine for presenting secondary games based upon wagers of secondary credits associated with a secondary credit balance. The secondary controller may effectuate transfers of credits between the primary and secondary credit balances. |
| US10325447B2 |
System and method of conducting games of chance as a proxy or basis for another player
To bring the excitement to the people (majority, who are not experts in games), we present the examples, described here, for one person to be able to bet on and be part of the deal and excitement for a third party, as his agent, proxy, or shadow, to bet for him, or instead of him, or as if the first person was doing the game directly, or one betting for another, or one playing for another with the other person's money. That generates more excitement on the game or casino, with more participation, transactions, income, profit, loyalty, and repeat customers. This brings a lot of variations on the game, e.g., stock market model, or derivatives model, or hedge model. This can be applied to sports and table games or fantasy sports. This can be applied to online, real, mobile, fantasy, simulation, computer generated, human based, or casino games or settings. |
| US10325442B2 |
Facilitating direct rider driver pairing for mass egress areas
A transport facilitation can identify a mass egress area within a given region and receive a pick-up request from a rider device within the mass egress area. In response to receiving the pick-up request, the transport facilitation system transmit a match code to the rider device. The system may then receive an indication of the match code from a driver device, the indication signifying a pick-up event between a requesting user of the rider device and an available driver of the driver device within the mass egress area, and record a state for both the rider device and the driver device indicating an initiation of a ride to a destination of the requesting user. |
| US10325432B2 |
Method for setting up multi remote control in vehicle and vehicle thereof
A vehicle includes: a communicator configured to perform wireless communication with a given mobile communication terminal disposed in the vehicle; a display configured to display information relating to multi-remote control for a plurality of mobile communication terminals disposed in the vehicle; and a controller configured to display a plurality of remote control functions through the display in response to a user request for the multi-remote control and to distribute the plurality of remote control functions to the plurality of mobile communication terminals disposed in the vehicle. |
| US10325425B1 |
Systems and methods for using image data to generate vehicle operation logs
Systems and methods for generating vehicle operation logs are provided. According to certain aspects, an electronic device may receive and analyze image data depicting an individual located within a vehicle. The electronic device may also interface with a set of sensors to retrieve or access relevant data related to the operation of the vehicle, such as time and date information, location information, and other data. The electronic device may generate a vehicle operation log that associates the individual depicted in the image data with the vehicle operating parameters. |
| US10325408B2 |
Method and device for presenting multimedia information
A method and a device for presenting multimedia information are disclosed. The method includes: acquiring representation information, the representation information including electromagnetic-field spectral information for representing an object, the electromagnetic-field spectral information being observable for a naked eye and/or acquirable for a device; establishing a four-dimensional time-space model for characterizing the representation information according to the acquired representation information, the four-dimensional time-space model having an attribute for characterizing in a digital form variation of the representation information over time; and presenting the representation information characterized by the four-dimensional time-space model. In the solution, the four-dimensional time-space model has an attribute for characterizing in a digital form variation of the representation information over time. Thereby, the problem of delay in presenting representation information may be solved to some degree. Therefore, the solution may solve the defects of delay in the related art to some degree. |
| US10325407B2 |
Attribute detection tools for mixed reality
Techniques described herein include mixed reality tools, referred to as HoloPaint, that allow use of any of a variety of sensors to determine physical parameters of real objects in a mixed reality environment. HoloPaint may correlate current measurements of the real world with past measurements to perform inventory management, analysis of changes of physical parameters of real objects and environments, and so on. A user may select which parameter to analyze by selecting a particular type of virtual paint, such as for drawing onto an object to be analyzed. |
| US10325405B1 |
Social media sharing in a virtual reality application
A method which allows a user who is viewing panoramic images within a virtual reality (VR) head mounted device to share with a social media network pre-loaded images of the content being viewed and post a comment. Specifically, this invention will allow a user to share an image of a vehicle just viewed or currently being viewed by the user and upload a comment in regards to the vehicle while still maintaining the integrity of the virtual reality experience. |
| US10325401B2 |
Importance sampling for determining a light map
A bounce light map for a scene is determined for use in rendering the scene in a graphics processing system. Initial lighting indications representing lighting within the scene are determined. For a texel position of the bounce light map, the initial lighting indications are sampled using an importance sampling technique to identify positions within the scene. Sampling rays are traced between a position in the scene corresponding to the texel position of the bounce light map and the respective identified positions with the scene. A lighting value is determined for the texel position of the bounce light map using results of the tracing of the sampling rays. By using the importance sampling method described herein, the rays which are traced are more likely to be directed towards more important regions of the scene which contribute more to the lighting of a texel. |
| US10325400B2 |
Virtual viewpoint for a participant in an online communication
Implementations provide an in-person communication experience by generating a changable virtual viewpoint for a participant in an online communication. For instance, techniques described herein capture visual data about participants in an online communication, and create a realistic geometric proxy from the visual data. A virtual scene geometry is generated that mimics an arrangement of an in-person meeting for the online communication. According to various implementations, a virtual viewpoint displays a changing virtual viewpoint, such as based on a change in position of a participants face. |
| US10325387B2 |
Method and apparatus for displaying states
A disclosed state display method includes: determining which of a first period and a second period is dominant in a designated period based on chronological measurement results of vital activities of a subject in the designated period, the first period being a period that has been determined that the subject is in a sleep state, the second period being a period that has been determined that the subject is in a non-sleep state; and changing configuration of a display screen that displays information related to states of the subject in the designated period according to a result of the determining. |
| US10325386B2 |
Visual generation of an anomaly detection image
A method includes formatting for display, on a visual screen, an image comprising a coordinate system and a plurality of data points within the coordinate system, wherein the plurality of data points define historical performance data for a computer system. The method further includes receiving a user input defining a distinguishable area within the coordinate system and an action associated with the distinguishable area. The method additionally includes generating a formula representing the distinguishable area. |
| US10325379B2 |
Sweat pores imaging method and device
A biometric device that may include a sensor that reacts to a chemical element associated with a sweat gland; wherein when the sensor is contacted by an area of a skin of a person, an image that comprises information about locations of sweat glands within the area of the skin of the person is generated by the sensor; an image processor that is configured to generate an authentication result by comparing between (a) the information of the image generated by the sensor and (b) reference information of locations of sweat glands of a given person; wherein the authentication result indicates whether the person is the given person; and a communication module for communicating an authentication result indication. |
| US10325378B2 |
Image processing apparatus, image processing method, and non-transitory storage medium
An image processing apparatus includes: an acquisition unit configured to acquire pieces of silhouette image data of an object viewed from multiple different viewpoints; a generation unit configured to generate, from the pieces of silhouette image data, pieces of low-resolution data representing images with a resolution lower than the pieces of silhouette image data; and an estimation unit configured to, by performing, for a plurality of line segments in space containing the object, processing in which, after a line segment in the space is projected onto a piece of low-resolution data to calculate a first intersection of the line segment with the object, the line segment is projected onto a piece of silhouette image data to calculate a second intersection of the line segment with the object, calculate intervals over which the plurality of line segments intersect the object and estimate a shape of the object. |
| US10325376B2 |
Machine vision for ego-motion, segmenting, and classifying objects
Systems and methods for machine vision are presented. Such machine vision includes ego-motion, as well as the segmentation and/or classification of image data of one or more targets of interest. The projection and detection of scanning light beams that generate a pattern are employed. Real-time continuous and accurate spatial-temporal 3D sensing is achieved. The relative motion between an observer and a projection surface is determined. A combination of visible and non-visible patterns, as well as a combination of visible and non-visible sensor arrays is employed to sense 3D coordinates of target features, as well as acquire color image data to generate 3D color images of targets. Stereoscopic pairs of cameras are employed to generate 3D image data. Such cameras are dynamically aligned and calibrated. Information may be encoded in the transmitted patterns. The information is decoded upon detection of the pattern and employed to determine features of the reflecting surface. |
| US10325370B1 |
Method and system of coregistration of remote sensing images
Certain embodiments of the present disclosure relate to a computer-implemented method and system which include patch-wise coregistration (PWCR) for change detection using remote sensing images which can be taken from satellites, aircraft, UAV and other platforms, where the images can be nadir or off-nadir images and can be acquired from the same or different view-angles. The remote sensing images can be bi-temporal or multi-temporal. VHF satellite images can be used. |
| US10325369B2 |
Method and system for analyzing blood flow condition
The present application relates to a method and system for analyzing blood flow conditions. The method includes: obtaining images at multiple time phases; constructing multiple vascular models corresponding to the multiple time phases; correlating the multiple vascular models; setting boundary conditions of the multiple vascular models respectively based on the result of correlation; and determining condition of blood vessel of the vascular models. |
| US10325366B2 |
Methods and systems for three-dimensional real-time intraoperative surgical margin evaluation of tumor tissues
A method of evaluating a surgical margin of tumor tissues of a living subject includes acquiring images of a specimen of the tumor tissues; calculating a three-dimensional (3D) morphological surface of the specimen from the acquired images and displaying the 3D morphological surface; obtaining, from the 3D morphological surface, a plurality of specimen locations to cover a surface of the specimen; acquiring optical data at each specimen location; evaluating a margin status of the specimen at each specimen location to either positive or negative based on the acquired optical data; and displaying the margin status of the specimen on the 3D morphological surface of the specimen with morphological orientations. |
| US10325365B2 |
Method for measuring a dental object
The invention relates to a method for measuring a dental object (1) using a dental camera (2). During measurement, several optical three-dimensional images (3, 50, 51) of the object (1) are produced. During measurement, an acoustic sound (10, 12) is generated by means of a sound producer (9, 11), said sound (10, 12) being used as feedback for the user and information relating to the current status of a recording of the images (3, 50, 51) and/or relating to image requirements of the dental camera (2) are transmitted to the user. Then, each individual image (3, 50, 51) it is automatically checked by a computer (6) as to whether an overlapping area (7, 8) between the images (3, 50, 51) which are to be combined meets the defined recording requirements for a correct recording. |
| US10325364B2 |
Thickness measurement of substrate using color metrology
A metrology system for obtaining a measurement representative of a thickness of a layer on a substrate includes a camera positioned to capture a color image of at least a portion of the substrate. A controller is configured to receive the color image from the camera, store a predetermined path in a coordinate space of at least two dimension including a first color channel and a second color channel, store a function that provides a value representative of a thickness as a function of a position on the predetermined path, determine a coordinate of a pixel in the coordinate space from color data in the color image for the pixel, determine a position of a point on the predetermined path that is closest to the coordinate of the pixel, and calculate a value representative of a thickness from the function and the position of the point on the predetermined path. |
| US10325361B2 |
System, method and computer program product for automatically generating a wafer image to design coordinate mapping
A system, method, and computer program product are provided for automatically generating a wafer image to design coordinate mapping. In use, a design of a wafer is received by a computer processor. In addition, an image of a wafer fabricated from the design is received by the computer processor. Further, a coordinate mapping between the design and the image is automatically generated by the computer processor. |
| US10325355B2 |
Video signal processing apparatus, video signal processing method, and program
An image processing unit performs gamma correction on a video signal using a gamma characteristic selected from among a plurality of gamma characteristics. Further, in a case where a gamma characteristic used in the gamma correction is changed by selection of the gamma characteristic, the image processing unit calculates a contour correction characteristic corresponding to the changed gamma characteristic and performs contour correction using the contour correction characteristic on the video signal. |
| US10325354B2 |
Depth assisted auto white balance
A method and apparatus for determining an auto white balance (AWB) gain based on determined depth information. The method may include receiving an image captured by an image sensor, determining depth information associated with the captured image, assigning weights to a plurality of illuminants based on the determined depth information, determining an auto white balance gain based on the assigned weights and statistics of the captured image, and applying the auto white balance gain to the captured image. |
| US10325349B2 |
Method and apparatus for enhancing 3D model resolution
Systems and methods of enhancing the resolution of digital terrain models (DTM) for location-based applications and analyses. The DTM enhancement process takes the signature of the input image (e.g., via the input image and a noise surface file with similar characteristics as the sensor used to capture the input image) and applies it to the DTM without including large features such as buildings. The disclosed methods include utilize a process similar to that used for enhancing a DSM based on mapping the changing intensity from the image file to changes in elevation in the DSM using a regression over a local neighborhood of pixels. Further, the disclosed methods do not rely on information about the sensors and are extendable to be able to utilize any types of images. Additionally, the disclosed embodiments are sensor agnostic and can be applied on any type of image collected by any type of sensor. |
| US10325345B2 |
Device for performing image transformation processing and method thereof
An image processing device that transforms an image includes a storage unit configured to store coordinate values in a coordinate system of a pre-transformed image, each of the coordinate value corresponding to a grid point in a coordinate system of a transformed image, a selection unit configured to select a grid point in the vicinity of a target pixel in the transformed image, a calculation unit configured to refer to the pre-transformed coordinate value, corresponding to the selected grid point and stored in the storage unit, and to calculate a pre-transformed coordinate value corresponding to the target pixel, using the referred coordinate value, and an output unit configured to output a pixel value of the coordinate value calculated in the pre-transformed image, as a pixel value of the target pixel in the transformed image. |
| US10325344B2 |
Efficient merging of atomic operations at computing devices
A mechanism is described for facilitating dynamic merging of atomic operations in computing devices. A method of embodiments, as described herein, includes facilitating detecting atomic messages and a plurality of slot addresses. The method further includes comparing one or more slot addresses of the plurality of slot addresses with other slot addresses of the plurality of slot addresses to seek one or more matched slot addresses, where the one or more matched slot addresses are merged into one or more merged groups. The method may further include generating one or more merged atomic operations based on and corresponding to the one or more merged groups. |
| US10325342B2 |
Convolution engine for merging interleaved channel data
Embodiments relate to a configurable convolution engine that receives configuration information to perform convolution and other deep machine learning operations on streaming input data of various formats. The convolution engine may include two convolution circuits that each generate a stream of values by applying convolution kernels to input data. The stream of values may each define multiple channels of image data. A channel merge circuit interleaves the streams of values from the convolution circuits to generate an output stream of output values. The output stream includes the data multiple channels of each input stream arranged in an interleaved manner. |
| US10325339B2 |
Method and device for capturing image of traffic sign
A method for capturing an image of a traffic sign by an image sensor is disclosed. The method may include capturing, by the image sensor, at least one image including the traffic sign, wherein the image sensor is mounted in a vehicle. The method may include detecting, by a processor, the traffic sign in the at least one image. The method may also include in response to detecting the traffic sign, determining, by the processor, at least one direction of the image sensor based on the at least one image and motion of the vehicle. In addition, the method may include adjusting, by the processor, the image sensor to the at least one direction. |
| US10325337B2 |
Watermarked media content in IPTV or iTV networks
A method that incorporates teachings of the present disclosure may include embedding a watermark in media content for presentation at a rendering device using an editor to associate the watermark with one or more metadata pointers that point to additional media content according to an embedded link of the watermark to generate a group of one or more metadata pointers where the watermark includes an embedded link to additional media content used to modify the media content based on a content exchange between the rendering device and a computer. The method may further include storing the group of one or more metadata pointers, where a selection of the watermark invokes access to the altered media content containing the additional media content associated with the watermark, thereby producing the altered media content at the one or more user devices. Other embodiments are disclosed. |
| US10325335B1 |
Facilitating computerized interactions with EMRs
A method for using a health information exchange system which stores patient record data regarding a multiplicity of patients, to serve a first plurality of EMRs each interacting with an EMR community including a set of at least one EMR, the method comprising: for each individual EMR within the first plurality of EMRs, performing a computerized context interception process using a processor to intercept context from the individual EMR and to identify there within an event whereby a health provider using the individual EMR calls up an individual patient's record from said individual EMR; and responsive to identification of the event, using a computerized output device for providing patient record data, pertaining to the individual patient, to the health provider. |
| US10325332B2 |
Incentivizing human travel patterns to reduce traffic congestion
A system for incentivizing travel patterns to reduce traffic congestion includes a negotiator that receives a travel template from a traveler, transmits a set of journey options to the traveler, receives a journey selected from the journey options, and sends a journey contract to the traveler based on the selected journey, a journey generator that determines the set of journey options based on the travel template, the traveler's historical behavior, and current network conditions, a rewards engine that calculates the reward associated with each journey option based on a reduction in cost for the journey, a location arbitrator that receives location information from the traveler as the travelers performs the journey in the journey contract, and a verification engine that verifies, whether the traveler's journey complied the terms of the journey contract, and determines the traveler's reward as calculated by the rewards engine based on a degree of compliance with the contract. |
| US10325328B2 |
Determining intent of a recommendation on a mobile application
Methods and systems are provided for determining the intent of a recommendation made by a user of a mobile application where the application includes a plurality of separable components, any one or more of which the recommendation can apply to. An application in which a user recommendation control is provided for presentation to a user also includes a tag indicating how a recommendation of the application should be interpreted with respect to the components included therein. The tag can be set by the application developer and can be in the form of text (e.g., a keyword or term) or a uniform resource locator (URL). Where a tag references multiple components of an application, a recommending user can be presented with a recommendation intent query. The recommendation intent query allows a user to designate one or more components of the application to which the user's recommendation should be attributed. |
| US10325326B1 |
Endorsing a product purchased offline
An endorsement application can allow a user to endorse a product on a social network website when the product is purchased at a physical merchant point of sale terminal. Users of social network websites have been given the opportunity to endorse products that they have located or purchased online, but purchasers of products in person have not had that opportunity. The endorsement application can operate on a user's mobile device and can recognize a product purchased through near field or other communication using the mobile device. The application can isolate the product identification and product marketing data supplied by the point of sale terminal or other source and offer the user the opportunity to endorse the product on a social network website. If the user endorses the product, the application sends the endorsement to the user's account on the social network website for display to the user's community. |
| US10325325B2 |
Social marketplace digital worth score
A method and system are disclosed for managing catalog resources within a social commerce environment. Users are referred by a plurality of affiliates to a social commerce marketplace system. Once referred, the users are presented with a customized social commerce storefront that is associated with an individual affiliate. Each of the customized social commerce storefronts comprises a micro catalog of purchasable products, which is a subset of a master catalog comprising a set of available products. Social data associated with the user and catalog data associated with the purchasable products is processed to generate product catalog data to the user, which is then provided to the user. The user reviews the social commerce content and selects individual purchasable products for purchase. |
| US10325324B2 |
Social context for offsite advertisements
A social networking system associates one or more objects in the social networking system with a link to content external to the social networking system. This allows information about the object to be used as a proxy for information about the external content. An index associating objects in the social networking system with links to content external to the social networking system is maintained. A received link to external content are parsed into components, such as a domain name, a path, and a query string, and the components are compared to the index to identify an object associated with one or more of the comments of the received link. One or more rules may be applied to increase the likelihood of the identified object having similar subject matter as the external content. |
| US10325322B2 |
System and method for providing a spend memory record
Systems and methods include a database maintained by a financial institution that stores transaction data associated with a previous financial transaction performed via a financial account of a respective account holder, wherein the transaction data comprises a transaction location and a transaction timestamp, a spend memory processor of the financial institution that retrieves the transaction data from the database, interacts with a social linking application programming interface (API) to receive, via a network, social data from a social networking site, wherein the social data comprises a social location and a social timestamp, compares the social data to the transaction data, and creates a spend memory record based on one or more similarities between the social data and the transaction data, and a communication interface of the financial institution that provides the spend memory record to a mobile device associated with the account holder. |
| US10325320B2 |
Retirement planning application
A method includes receiving first user input indicating selection of a guaranteed income option to fund essential retirement expenses. The method further includes receiving second user input indicating selection of an investment option to fund lifestyle retirement expenses. The method also includes receiving third user input indicating selection of an unexpected liability coverage option, wherein the unexpected liability coverage option includes a long-term care funding option, an unexpected legal expense funding option, or any combination thereof. The method includes receiving fourth user input indicating selection of one or more legacy planning options. The method also includes generating a retirement plan based on the first user input, the second user input, the third user input, and the fourth user input. |
| US10325317B2 |
Ideal latency floor
The invention relates to a system and method for providing a latency floor for an electronic trading venue in which market participants who can respond within the value the floor and choose to compete in a specific race to make or take a price may each have a substantially equal chance of winning that race. The system may detect and distinguish individual “races” that occur on an electronic trading venue. Upon detection of the first order (or message) in such a race, the system may create a batch and a timer for that race. As orders pertaining to that race are received, they are added to its batch. Upon the timer reaching a predetermined value, typically the value of the floor, the race is determined to have ended and the orders are drained from the batch for processing (e.g., against the instrument's central limit order book (CLOB)). |
| US10325314B1 |
Payment reporting systems
A system is disclosed for reporting payments to one or more credit bureaus according to instructions provided by a consumer. The system may provide the consumer with one or more user interfaces from which the consumer can select one or more options to report payments made to billers. In some embodiments, the reporting options are included as part of a biller's website or a bill payment center website. The system may enable faster reporting of payments made to some billers and may report payments made to billers who would not otherwise report payments. |
| US10325309B2 |
Omnichannel retailing
A device may determine its location within a store and display the location on a map of the store. A user may provide a shopping list to the device. The device may then display the location of desired items on the map of the store. When an item is located in multiple locations, the device may display one or more of the locations for the item. The device may suggest a route through the store by which the user can find all of the items on the shopping list. The device may recommend products to the user based on items near the device, items on the shopping list, or items identified by the user. The device may have the ability to identify items. The device may communicate with the server to gather information about an identified item. |
| US10325308B2 |
Techniques for filling orders
A system includes N location indicators and a mobile scanning device. The N location indicators are configured to be arranged throughout a store that includes a plurality of stocked items for picking according to one or more electronic customer orders. Each of the N location indicators is configured to transmit a different location signal. The mobile scanning device includes a display. The mobile scanning device is configured to wirelessly receive an electronic customer order comprising a plurality of ordered items indicating which of the stocked items are to be picked, detect at least one of the N location signals, and arrange at least some of the plurality of ordered items on the display based on which of the at least one of the N location signals is detected. |