| Document | Document Title |
|---|---|
| US09608989B2 |
Method, system, trusted service manager, service provider and memory element for managing access rights for trusted applications
A method for granting trusted applications (SP1_WL) of a Service Provider (SP1, SP2)access to applications (appSP1.1, appSP1.2; appSP2.1) of that Service Provider (SP1, SP2) that have been stored in a secure element (SE) comprises: the Service Provider (SP1, SP2) transmits a request (REQ1) for granting access to its applications to a Trusted Service Manager (TSM); the Trusted Service Manager (TSM) generates an access right code (AC1) and transmits it to both the Service Provider (SP1, SP2) and a service manager (SM) in the secure element (SE); the Service Provider (SP1, SP2) generates the trusted application (SP1_WL), provides it with the access right code (AC1) and sends it to the secure element (SE); the trusted application (SP1_WL) connects to the service manager (SM) with the access right code (AC1) whereupon the service manager (SM) grants the wallet (SP1_WL) access to the applications (appSP1.1, appSP1.2; appSP2.1). |
| US09608984B2 |
Accessible files
A computer implemented method for accessing one or more files including scanning a storage device using a processor for one or more signed files in response to the storage device coupling to a machine, authenticating one or more of the signed files, and configuring the processor to access accessible files from the storage device in response to authenticating one or more of the signed files. |
| US09608983B2 |
Authentication system and method for embedded applets
A system and method for authenticating user requests issued from embedded applets running on web-accessible user devices. The server system generates authentication tokens associated with user credentials, in response to user requests for HTML pages that include the embedded applets. The server system stores the authentication tokens on the server system, and includes the authentication tokens in URLs within applet tags in the HTML pages returned to the user devices. When the applets download and request content from the server system, the applets supply the previously included authentication tokens in the URLs that identify the requested content. Upon finding a match between the applet-supplied authentication tokens and the stored authentication tokens, the server identifies the user as a trusted user, and responds with the requested content. This can be used to eliminate HTTP-based authentication challenges for subsequent user access. |
| US09608982B2 |
Identity validation system and associated methods
A computer system and associated methods for verifying user identities online. Identity claims made by a requestor of an online access and/or a trusted transaction may be verified by associating digital credentials to verified personal identification information (PII) retrieved from real world events. PII item(s) may be retrieved from third-party verified identity information sources. Verified personal attributes related to PII items may be identified and correlated with the requestor's digital credentials, and stored to a verified identity record. Additional digital credentials for the same requestor may be similarly identified, correlated, and stored to the verified identity record. A subsequent transaction request by a person claiming the requestor's identity may be compared with the verified identity record. An identity match indicator and/or a match confidence score may be created and used to determine the risk that the identity claim by the person requesting the transaction is false. |
| US09608980B2 |
Environment-aware security tokens
The technology described in this document can be embodied in a computer implemented method that includes receiving, at a processing device, information about one or more assets associated with a network of devices. The method also includes generating, for at least one of the assets, a security token that is based at least on a portion of the received information about the corresponding asset. The security token can be configured to identify a home network defined for the asset, and to restrict access to the corresponding asset upon detecting an occurrence of an unauthorized activity involving the asset. The method further includes storing, in a storage device, information about the security token and information linking the security token to the corresponding asset, and initiating integration of the security token with the corresponding asset. |
| US09608978B2 |
Relationship-based authorization
Methods and apparatus, including computer program products, related to relationship-based authorization. In general, data characterizing a request for authorization to a computer-based resource is received, and the authorization may be provided based on one or more relationships of a requesting principal. A determination may be made as to whether a requesting principal is authorized, which may include determining whether the requesting user has a relationship with a principal that has management rights of the computer-based resource and determining whether the relationship allows for an access, such as a use of the computer-based resource, if the requesting principal has a relationship with the other principal. If there is no such relationship, a determination may be made as to whether an organization of the requesting principal has a relationship with the other principal that allows for the access. |
| US09608977B2 |
Credential validation using multiple computing devices
A tool for credential validation using multiple computing devices. The tool select at least one challenge question. The tool selects two or more user owned devices, wherein selecting the two or more user owned devices includes querying a database for each user owned device associated with a user account. The tool presents the at least one challenge question to the two or more user owned devices. The tool determines whether the at least one response received from the two or more user owned devices is a correct response relative to the at least one challenge question. |
| US09608975B2 |
Challenge-dynamic credential pairs for client/server request validation
Computer systems and methods in various embodiments are configured for improving the security and efficiency of server computers interacting through an intermediary computer with client computers that may be executing malicious and/or autonomous headless browsers or “bots”. In an embodiment, a computer system comprises: a memory; a processor coupled to the memory; a protocol client module that is coupled to the processor and the memory and configured to intercept a first set of instructions that define one or more original operations, which are configured to cause one or more requests to be sent to the server computer when executed by the client computer; a forward transformer module that is coupled to the processor and the memory and configured to: generate, at the intermediary computer system, a first challenge credential to be sent to the client computer; render one or more first dynamic-credential instructions, which when executed by the client computer, cause the client computer to generate a first dynamic credential that corresponds to the first challenge credential and to include the first dynamic credential in the one or more requests from the client computer; modify the first set of instructions to produce a second set of instructions, wherein the second set of instructions include the first challenge credential and the one or more first dynamic-credential instructions, and which when executed by the client computer, cause the first challenge credential to be included in the one or more requests sent from the client computer; send the second set of instructions to a second computer. |
| US09608970B1 |
Sharing keys
The subject matter described in this specification includes a computer-readable medium storing instructions that cause one or more processors to perform various operations including receiving, from a first client device associated with a user account of a first user, a request for sharing a key. The key is associated with the user account of the first user, and permits access to a resource. The operations include generating, at a server, one or more representations of the key, transmitting the representations of the key to the first client device, and receiving, from a second client device associated with a user account of a second user, a request to access the key. The request to access the key is derived from one of the one or more representations of the key. The operations further include communicating, to the second client device, a message indicating whether access to the key has been granted. |
| US09608968B2 |
Connection architecture for a mobile network
A mobile device for accessing content stored on a remote server over a mobile network is provided. The mobile device includes a processor configured to direct the mobile device to receive at least a portion of a list initiated by the remote server, the list identifying folders or files stored on the remote server, process a selection to identify one of the folders or files on the list having the content on the remote server, and send a request directing a management server to initiate a transaction including an identifier indicating the one of the folders or files having the content on the remote server that is to be sent as the attachment to the destination. |
| US09608967B2 |
Method and system for establishing a session key
A system and a method is provided for establishing a session key in a context of communications between entities, the identifiers of which are generated cryptographically and for which one of the entities is highly resource-constrained. It includes assigning to assistant entities of the resource-constrained entity, the highest-consuming asymmetric cryptography operations. |
| US09608962B1 |
Application-aware connection for network access client
Virtual private network (VPN)-related techniques are described. The techniques provide intuitive mechanisms by which a client device more efficiently establishes a VPN connection. In one example, a client device includes a memory, processor(s), and a VPN handler. The VPN handler is configured to monitor actions initiated by one or more applications executable by the programmable processor(s), and determine whether each of the initiated actions requires a VPN connection via which to transmit outbound data traffic corresponding to a respective application of the one or more applications. The VPN handler is further configured to, in response to a detection that at least one initiated action requires the VPN connection via which to transmit the outbound data traffic, automatically establish the VPN connection to couple the client device to an enterprise network, and transmit the outbound data traffic corresponding to the respective application, via the VPN connection. |
| US09608954B2 |
Digital device for providing text messaging service and method for controlling the same
A digital device including a display unit, a communication unit, and a processor to control the display unit, wherein the processor extracts at least one keyword, designates the at least one keyword and extracts at least one application providing additional information. |
| US09608952B2 |
Systems and methods for user device interaction
Systems and methods for receiving a communication on one or more user devices within a vehicle and redirecting the communications based at least in part on one or more user profiles associated with occupants of the vehicle is disclosed. The redirection of the communication may further be based at least in part on one or more sensor signals or a drive characteristic associated with the vehicle. |
| US09608950B2 |
Systems and methods for sharing videos and images in a texting environment
An electronic device displays an image or video associated with a session of a messaging application. The device displays a message received from a user associated with the session over the image or video. In response to receiving a second message, the device displaces display of the first message with display of the second message, and displays the first message at a second location, also over the image or video. The device also displays an image icon associated with the image or video over the image or video. In response to receiving a second image or video, the device displays a second image icon over the first image or video. In response to the user selecting the second image or video, the device replaces display of the first image or video with the second image or video, while maintaining the display of the messages and image icons. |
| US09608948B2 |
Method for presenting an attachment within an email message
A method for presenting an attachment within an email message on a display of a portable electronic device includes displaying the email message using a messaging application, sending a conversion request to an attachment server in order to view the attachment in an attachment viewer of the portable electronic device, receiving a converted attachment from the attachment server; and upon receiving the converted attachment from the attachment server, inserting a thumbnail image in a message body of the email message. |
| US09608943B2 |
Method of queuing signals
Example methods, apparatuses, and/or articles of manufacture are disclosed that may be implemented, in whole or in part, using one or more computing devices to implement a queuing system with an adjustable scalability/reliability level. |
| US09608940B2 |
Ultra low latency network buffer storage
Buffer designs and write/read configurations for a buffer in a network device are provided. According to one aspect, a first portion of the packet is written into a first cell of a plurality of cells of a buffer in the network device. Each of the cells has a size that is less than a minimum size of packets received by the network device. The first portion of the packet can be read from the first cell while concurrently writing a second portion of the packet to a second cell. |
| US09608938B2 |
Method and system for tracking and managing network flows
A method and system for tracking and managing network flows including receiving a first flow counter value for a flow of first flows and determining that the flow is an elephant flow. The method further includes obtaining flow egress port information by determining an egress port on a switch for each of the first flows, obtaining port congestion information for the switch, where the port congestion information includes port congestion data for each egress port, and selecting, based on the port congestion information and the flow egress port information, a new egress port for the flow, and sending a request to update a switch chip on the switch, where the request specifies that subsequently received packets for the flow are to be forwarded out of the new egress port. |
| US09608934B1 |
Efficient bandwidth estimation
Techniques for efficient bandwidth estimation are described herein. In some cases, the bandwidth estimation techniques disclosed herein may, for example, calculate bandwidth based on multiple packet groups transmitted at different times. Additionally, in some cases, the bandwidth estimation techniques disclosed herein may, for example, capture cross traffic and its effects on bandwidth. Furthermore, in some cases, the bandwidth estimation techniques disclosed herein may, for example, employ dynamic self-correcting techniques for more reliable estimates. |
| US09608933B2 |
Method and system for managing cloud computing environment
A management server manages resources in a cloud system having servers and storage subsystems by assigning a category of resources to an application, the category of resources being associated with a first template of virtualized resources, the first template being associated with threshold values and having a first cost for using the first template; monitoring performance of the first template to obtain performance values for the first template; comparing a first performance value of the first template with a first threshold value associated with the first template; and generating a plan for migrating the application to a second template based upon a result of the comparison. The second template is associated with a second threshold value that is greater than the first performance value. The second template has a second cost for using the second template that is less than the first cost. |
| US09608928B1 |
Multiple-speed message channel of messaging system
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for receiving from a plurality of publishers messages of a first channel of a plurality of distinct channels wherein each channel comprises an ordered plurality of messages, storing messages of the first channel in one or more first buffers according to the order, each first buffer having a respective time-to-live, for one or more connections, determining a respective sampling rate based on a data type of the first channel and a determined latency of the connection, receiving from a subscriber through a first connection a request for messages of the first channel, selecting messages in the first buffers according to the order and the sampling rate, and sending the selected messages using the first connection to the subscriber according to the order. |
| US09608920B2 |
Network information extracting system and method thereof
A network information extracting system and method thereof are disclosed. A network message packet transmitted from a communications server is received by a router. The router includes a processor, a memory and a comparator. The processor disassembles the network message packet and extracts company information and a first message. The comparator compares the company information and a company list stored in the storage module. When the company information matches to one of the company lists, the first message is transmitted to a handheld device; when the company information does not match the list, a second message is added to the first message and transmitted to the handheld device. |
| US09608917B1 |
Systems and methods for achieving high network link utilization
Systems and methods for achieving high utilization of a network link are provided. A first communication protocol can be selected for transmitting network flows of a first type. A first quality of service can be assigned to network flows of the first type. A second communication protocol can be selected for transmitting network flows of a second type. A second quality of service, lower than the first quality of service, can be assigned to network flows of the second type. A first percentage of available bandwidth can be allocated to the network flows of both the first and second types. The remaining bandwidth, plus a second percentage of available bandwidth, can be allocated to the network flows of the second type, such that the total allocated bandwidth exceeds the available bandwidth of the network link. |
| US09608916B2 |
Collaborative application classification
Herein described is a collection of traffic classifiers communicatively coupled to a classification aggregator. Traffic classifiers may use conventional techniques to classify network traffic by application name, and thereafter may construct mappings that are used to more efficiently classify future network traffic. Mappings may associate one or more characteristics of a communication flow with an application name. In a collaborative approach, these mappings are shared among the traffic classifiers by means of the classification aggregator so that one traffic classifier can leverage the intelligence (e.g., mappings) formulated by another traffic classifier. |
| US09608914B2 |
Information processing apparatus and information processing method
The information processing apparatus relays a communication between a server providing a service and a terminal provided with the service. The information processing apparatus includes a memory and a processor. The processor executing a process that causes the information processing apparatus to perform receiving a service interruption notification and a service restarting notification of the service provided by the server from a device to monitor an operation state of the service, perform storing data, to a hold unit on the memory, to be transmitted to the server from the terminal when the receiving receives the service interruption notification of the service provided by the server, and perform transmitting the data stored in the hold unit to the server when the receiving receives the service restarting notification of the service provided by the server. |
| US09608911B2 |
Systems and methods for preventing source suppression of routed information in a load-balanced network
Systems, devices, and methods for routing information from one network to a load balancing network are provided. The provided system includes a server, and at least one switch in communication with the server over a physical port. The switch includes a network interface component configured to receive information from the server on the physical port, a memory configured to store the address of the server and a virtual port in an address table, the virtual port pointing to the physical port, and one or more processors coupled to the network interface component and the memory. The one or more processors are configured to identify the physical port on which the information arrives and assign the identified physical port to the virtual port and route information from a different network to the server over the physical port pointed to by the virtual port stored in the address table. |
| US09608910B2 |
Physical uplink control channel (PUCCH) resource allocation (RA) for a hybrid automatic retransmission re-quest-acknowledge (HARQ-ACK) transmission
A user equipment (UE) is disclosed. The UE can identify a downlink control channel. The UE can determine when the downlink control channel is an enhanced physical downlink control channel (EPDCCH). The UE can select an enhanced physical uplink control channel (PUCCH) resource allocation for a hybrid automatic retransmission re-quest-acknowledge (HARQ-ACK) transmission when the downlink control channel is the EPDCCH. |
| US09608904B2 |
System and method for analyzing devices accessing
A method and system for analyzing devices on a network are provided. The method includes: receiving at least one packet from a Customer Premises Equipment (CPE); determining identity metadata associated with the at least one packet; and analyzing the at least one packet to determine a device associated with the at least one packet. The system for analyzing devices on a network includes: a packet processor configured to receive at least one packet from a CPE; a subscriber/session identity module configured to determine identity metadata with the at least one packet; and a device tracker module configured to analyze the at least one packet to determine a device associated with the at least one packet. |
| US09608903B2 |
Systems and methods for recovery from network changes
Systems, methods and apparatus for recovery from network changes. In some embodiments, a first network device may operating in a network comprising a second network device having a designated role according to at least one communication protocol. The first network device may detect a change relating to the second network device and determine whether the change is of a type among one or more selected types of changes. The first network device may further determine whether to inhibit operation of the first network device based at least in part on whether the change is of a type among the one or more selected types of changes. |
| US09608902B2 |
Communication mechanism in a network of nodes with multiple interfaces
A path selection unit selects a network communication path from a plurality of available network communication paths for transmitting data from a hybrid network device to a destination network device. A packet transmit unit determines path connection characteristics associated with the selected network communication path. The packet transmit unit generates a hybrid network packet for transmitting the data to the destination network device based, at least in part, on the path connection characteristics associated with the selected network communication path. The packet transmit unit transmits the hybrid network packet to the destination network device via the selected network communication path. |
| US09608900B2 |
Techniques for flooding optimization for link state protocols in a network topology
Techniques are provided for generating efficient flooding tree paths in a network. At a node device in a network, a unicast message is sent to a plurality of node devices in the network. The node device obtains an identifier associated with each of the node devices in the network. The identifier contains information indicating node connectivity for each of the node devices. A selected node device is then identified. The selected node device is one of the node devices in the network that has a lowest identifier value indicating a lowest number of connected node devices to the selected node device in the network. The selected node device is classified as a root flooding tree node device. A flooding tree is generated by performing a shortest path first operation from the selected node device to the plurality of node devices in the network. |
| US09608899B2 |
Packet-based aggregation of data streams across disparate networking interfaces
System and method for load-balancing a plurality of transmission media. A first plurality of packets of a first stream may be transmitted to a second device on a first transmission medium. It may be determined that current medium utilization of the first transmission medium exceeds a first threshold. The first stream may be selected for transmission on both of the first transmission medium and a second transmission medium based on said determining that current medium utilization of the first transmission medium exceeds the first threshold. A second plurality of packets of the first stream may then be transmitted to the second device using both the first transmission medium and the second transmission medium. A first portion of the second plurality of packets may be transmitted on the first transmission medium and a second portion of the second plurality of packets may be transmitted on the second transmission medium. |
| US09608897B2 |
Method and device for transferring bootstrap message
The present invention discloses a method and a device for transferring a bootstrap message, and relates to the field of communications. The invention is intended to solve a problem in the prior art that a public network tunnel needs to be separately created for a bootstrap message, which consumes a tunnel resource. A technical solution provided in an embodiment of the present invention includes: receiving, by a first provider edge router, a bootstrap message sent by a bootstrap router; sending, by the first provider edge router, to a second provider edge router, a border gateway protocol BGP message including message content of the bootstrap message, so that after receiving the BGP message, the second provider edge router sends, to a customer edge router, the message content included in the BGP message. The embodiments of the present invention are applicable to a next generation multicast virtual private network. |
| US09608892B2 |
Client-side click tracking
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for performing client-side click tracking. In one aspect, a method includes receiving, by a client, a resource from one or more servers. The resource includes (i) a link, (ii) click tracking code, and (iii) local storage monitoring code. The method includes invoking, by the client, the click tracking code and the local storage monitoring code, detecting, by the invoked click tracking code, a selection of the link, and generating, by the invoked click tracking code, a representation of the selection. The method includes storing, by the invoked click tracking code, the representation of the selection in a local storage on the client, determining, by the invoked local storage monitoring code, to communicate the representation of the selection; and communicating, by the invoked local storage monitoring code, the representation of the selection to the one or more servers. |
| US09608891B2 |
Providing simultaneous data calls for client devices on a plurality of subscriptions of a multi-SIM computing device configured with software-enabled access point functionality
Methods, devices, non-transitory processor-readable storage media for mapping different local area network (LAN) connections to different data subscriptions of a software-enabled access point (softAP) computing device. A method executed by a softAP computing device processor may include storing a mapping that associates each in a plurality of LAN connections for the LAN established by the softAP computing device with one of a plurality of wide area network (WAN) connections, connecting a client device to the LAN via one of the plurality of LAN connections, routing data traffic received from the client device to one of the plurality of WAN connections based on the stored mapping, and routing data traffic received via one of the plurality of WAN connections to the client device based on the stored mapping. The softAP computing device may also perform re-routing of data traffic based on whether WAN connections are out-of-service or have bandwidth availability. |
| US09608889B1 |
Audio click removal using packet loss concealment
Methods and systems are provided for removing transient noises (e.g., keyboard “clicks”) detected in an audio signal. An adaptive jitter buffer and packet loss concealer (“JB/PLC”) is deployed on the transmitting side of a system (e.g., a Voice-over-IP (VoIP) system) to remove transient noises detected in an audio signal before the signal is transmitted over a network to the receiving side of the system. By utilizing the adaptation capabilities of the JB/PLC, the methods and systems provided produce better-sounding transient removal than other existing approaches. |
| US09608888B2 |
Transmitting device, method for monitoring memory, and transmission system
A transmitting device includes a memory configured to store information items that indicate whether a packet transmitted through a network is distributed in an input and output device for each of identifiers identifying networks; and a processor coupled to the memory and configured to select, from among the identifiers based on the information items, a selected identifier identifying a network through which the packet is distributed in the input and output device a distributed number of times that is smaller than a predetermined value, generate a monitoring packet to be transmitted through the network identified by the selected identifier, access an entry associated with the network identified by the selected identifier and included in the memory, and detect an error of data in the memory when the monitoring packet is distributed in the input and output device. |
| US09608887B2 |
System, method and program for detecting anomalous events in a utility network
A communication device detects whether anomalous events occur with respect to at least one node in a utility network. The communication device has recorded therein threshold operating information and situational operating information. The threshold operating information includes data indicative of configured acceptable operating parameters of nodes in the network based on respective locational information of the nodes. The situational information includes data indicative of configured operation data expected to be received from nodes in the network during a predetermined time period, based on a condition and/or event occurring during the time period. The communication device receives operation data from nodes in the network, and determines whether the operation data from a node constitutes an anomalous event based on a comparison of the received operation data with (i) the threshold operating information defined for the node and (ii) the situational information. The communication device outputs notification of any determined anomalous event. |
| US09608878B2 |
Method for locating a field device in an automated plant
A method for locating at least one field device in an automated plant, wherein the field device is connected via a network composed of a plurality of distributed field devices, and wherein a mobile terminal is applied for locating the field device. |
| US09608877B2 |
Network discovery apparatus
A network device has a packet input unit, a checking unit, and a discovery unit. The packet input unit is configured to receive ingress packets. The checking unit is configured to determine whether identifying characteristics of received ingress packets match stored identifying characteristics of a packet flow that is stored in a memory, to perform a network action when the identifying characteristic of the received ingress packet matches the stored identifying characteristic. The discovery unit is configured to intercept an egress packet received from the control plane processor, the egress packet corresponding to the received ingress packet, to determine one or more differences in selected portions of a header portion of the received ingress packet resulting from processing at the control plane processor, and to store in the memory a new network action based on the one or more differences. |
| US09608875B2 |
Individually unique key performance indicator management
Individually unique key performance indicator management may be utilized to enhance performance in a network. A warning alarm threshold for a key performance indicator associated with a mobile device may be determined. And upon receiving an alert message indicating that the warning alarm threshold has been exceeded, a network device may be modified. |
| US09608874B2 |
Methods and apparatus to identify network topologies
Methods and apparatus to identify network topologies are disclosed. An example method comprises determining a set of network nodes between a pair of designated nodes in a network based on a configuration of the network and locations of the designated nodes; determining valid combinations of the network nodes by determining whether the combination of available ones of the set of network nodes enables monitoring of the network according to the configuration of the network; and generating performance measurement commands for the valid combinations of the network nodes. |
| US09608866B2 |
Digital link viewer with paging for super-channels
A device may receive optical network information associated with a plurality of super-channels. Each super-channel, of the plurality of super-channels, may include a plurality of optical channels transported as a single optical channel. The device may assign the plurality of super-channels to a plurality of sets of super-channels. The device may receive a request for a subset of the optical network information associated with a set of super-channels of the plurality of sets of super-channels. The device may provide, based on the request, information that identifies the subset of the optical network information associated with the set of super-channels via a user interface. |
| US09608865B2 |
Method, system and logic for configuring a local link based on a remote link partner
Methods and systems are providing for configuring a port on a network device for communication with a port on a remote device. In one example, the network device receives, by a local port, a message from a physical coding sublayer (PCS) transmitter on the remote partner device. In one aspect, a port configuration module partitions the port to transfer data on a plurality of sub-ports each having a second data transfer rate if it is determined, by the network device that a local PCS receiver failed to align data received in the message. In another aspect, the port configuration module aggregates the plurality of sub-ports of the port to transfer data on a port having the first data transfer rate if it is determined, by the network device, that the local PCS receiver detected a code violation error in the message on at least one of the plurality of sub-links. |
| US09608858B2 |
Reliable multipath forwarding for encapsulation protocols
In one embodiment, an ingress router sends a multipath information query across a computer network toward an egress router, and builds an entropy table based on received query responses. The entropy table maps the egress router to one or more available paths to the egress router, and associated entropy information for each respective available path of the one or more available paths. The ingress router may then forward traffic to the egress router using the entropy table to load share the traffic across the one or more available paths using the associated entropy information for each respective available path. In response to detecting a failure of a particular path of the one or more available paths, however, the ingress router then removes the particular path from the entropy table, thereby ceasing forwarding of traffic over the particular path. |
| US09608852B2 |
Base-station control device, wireless communication system, and base station
A control station serving as a base-station control device that issues an operation instruction to each of base stations in a wireless communication system in which a plurality of base stations perform transmission at the same time and the same frequency, wherein a frequency offset of a reception signal from a mobile station that is detected by each of the base stations is collected, and a phase rotation amount that is a rotation amount when the base stations rotate a phase of a transmission signal is determined for each of the base stations so that frequency offsets of the respective transmission signals having been subjected to phase rotation by the respective base stations are the same. |
| US09608847B2 |
Analog distributed antenna system for processing ethernet signal
A device included in an analog distributed antenna system includes a first analog signal processing unit for receiving an analog communication signal, a first modulation/demodulation unit for converting a digital Ethernet signal received from an Ethernet network into an analog Ethernet signal, a multiplexing unit for multiplexing the analog communication signal signal-processed by the analog signal processing unit and the analog Ethernet signal converted by the modulation/demodulation unit, and a transmission unit for transmitting, to other devices included in the analog distributed antenna system, the analog communication signal and the analog Ethernet signal, which are multiplexed by the multiplexing unit. |
| US09608846B2 |
Apparatus and method for transmitting data with conditional zero padding
An apparatus and method for transmitting data with conditional zero padding is provided. In accordance with an embodiment of the disclosure, a transmitter transmits data to a receiver by transmitting symbols such that each symbol is preceded by a cyclic prefix of a fixed length and the symbol conditionally includes enough zero padding to avoid ISI (Inter-Symbol Interference) between consecutive symbols. In some implementations, if the fixed length for cyclic prefixes is long enough to avoid ISI between consecutive symbols, then the symbols may omit zero padding. Otherwise, the symbols may include enough zero padding to avoid ISI between consecutive symbols. The zero padding may be zero tail or zero head. |
| US09608845B2 |
Transmit apparatus and method
A system comprises a transmitter coupled to a receiver through a plurality of transmission lines, wherein the transmitter comprises a continuous time linear equalizer and a voltage mode driver. The continuous time linear equalizer comprises a differential input stage, a RC degeneration network coupled to the differential input stage and a current source coupled to the differential input stage. The continuous time linear equalizer and the voltage mode driver share a same input port and a same output port. |
| US09608842B2 |
Providing, at least in part, at least one indication that at least one portion of data is available for processing
An embodiment may include circuitry that may provide, at least in part, at least one indication that at least one portion of data is available for processing by at least one data processor. The at least one indication may be provided, at least in part, prior to the entirety of the at least one portion of the data being available for the processing by the at least one data processor. The at least one data processor may begin the processing in response, at least in part, to the at least one indication. Many alternatives, variations, and modifications are possible. |
| US09608837B1 |
Method for using portable controlling device for home network
Disclosed is a method for using a portable controlling device for a home network, the method including: deactivating the portable controlling device including a first near communications module and a micro-processor in which firmware for a gateway is programmed, by disconnecting electric power supplied from a central unit that is connected to a communications network; activating the portable controlling device by electric power supplied from a first mobile terminal by connecting the portable controlling device to the first mobile terminal; and pairing the portable controlling device with a device for the home network by wireless near communications when the first mobile terminal and the device for the home network are located within a predetermined distance range for performing a pairing process by the wireless near communications. |
| US09608834B2 |
Secure remote actuation system
A secure remote actuation system may comprise a remote input receptor and a network. The remote input receptor may comprise a user interface for receiving user inputs from a user. The network may store acceptable inputs. The network may further comprise a network device for obtaining the user inputs from the remote input receptor. In the present invention, the network device obtains the user inputs from the remote input receptor while the user is using the user interface. The network then compares the user inputs to the acceptable inputs. |
| US09608830B2 |
Policy and charging control methods for handling multiple-user subscriptions of a telecommunication network
A policy and charging control method enables a privileged user of a multiple-user subscription of a telecommunication network to cause a change to a policy or charging applicable to a non-privileged user of the subscription. The method comprises: (i) accessing (s10), by a communication terminal of the non-privileged user, an authorization control manager (ACM) function, to request a change of policy or charging applicable to the non-privileged user; (ii) transmitting (s20), by the ACM function to a PCRF, the requested change; (iii) notifying (s30) a communication terminal of the privileged user, by the PCRF, of the requested change; and (iv) indicating (s40), by the communication terminal of the privileged user, to the ACM function, at least one of: (a) whether the requested change is approved, and (b) to which extent the requested change is approved. The invention also relates to network nodes, computer programs, and computer program products. |
| US09608827B1 |
Memory cell with de-initialization circuitry
Circuits and approaches for de-initializing memory circuits. In one implementation, a memory circuit includes a plurality of memory cells. Each memory cell includes a pair of cross-coupled inverters and first and second access transistors coupled to the pair of cross-coupled inverters. A first bit line is coupled to the first access transistor, and a second bit line is coupled to the second access transistor. A de-initialization circuit is coupled to the first and second bit lines. The de-initialization circuit is configured and arranged to equalize signal states on the first and second bit lines in response to a de-initialization signal. |
| US09608824B2 |
Using digital fingerprints to associate data with a work
A computing device, during sampling or playback of a work, receives a command to associate data with the work at a particular point in the work. The computing device generates a digital fingerprint of a segment of the work, wherein the segment corresponds to the particular point in the work. The computing device then associates the data with the digital fingerprint. |
| US09608823B2 |
Secure remote kernel module signing
Implementations for a secure remote kernel module signing are disclosed. In one example, the method includes receiving an indicator of a public key associated with a client computing device, determining that the public key associated with the client computing device is in common with a public key associated with a first server computing device, compiling the script, signing the compiled script with a private key that is associated with the public key that is in common with the client computing device and the first server computing device without generating a new private key, and sending the signed compiled script to the client computing device. |
| US09608822B2 |
Method for generating an HTML document that contains encrypted files and the code necessary for decrypting them when a valid passphrase is provided
A computer implemented method for encrypting one or more files and wrapping them in an HTML document. The HTML document contains the encrypted files, the necessary code to decrypt the files, as well as user interface code to receive a passphrase input from a user. The HTML document can be opened using any modern web browser, to obtain the original files using the same passphrase with which the encryption was performed. This offers a convenient way of sharing encrypted files via email or cloud file sharing services using a platform independent file format (without having to install any additional software). |
| US09608815B2 |
Systems, methods, and apparatuses for ciphering error detection and recovery
Systems, methods, and apparatuses are provided for ciphering error detection and recovery. A method may include using a first set of one or more cipher input parameters to decipher ciphered data ciphered using a second set of one or more cipher input parameters. The method may further include comparing a value of at least a portion of the deciphered data to an expected value. The method may additionally include determining an occurrence of a ciphering error when the value of the at least a portion of the deciphered data is not equal to the expected value. The method may also include initiating a ciphering resynchronization procedure in response to the determination that a ciphering error occurred so as to resynchronize at least one of the first set of cipher input parameters with at least one of the second set of cipher input parameters. Corresponding systems and apparatuses are also provided. |
| US09608813B1 |
Key rotation techniques
A plurality of devices have common access to a cryptographic key. The cryptographic key is rotated by providing the devices simultaneous access to both the cryptographic key and a new cryptographic key and then revoking access to the cryptographic key. Keys stored externally and encrypted under the cryptographic key can be reencrypted under the new cryptographic key. Keys intended for electronic shredding can be left encrypted under the old cryptographic key. |
| US09608812B2 |
Common secret key generation device, encryption device, decryption device, common secret key generation method, encryption method, decryption method, and program
Public data including a prime number p, a natural number d, a matrix Q, and a matrix S are acquired by a public data acquisition section, and secret key including natural numbers nA, kA is generated by a shared secret key generation section. A matrix MA (MA=S−kAQnASkA) is calculated by a non-commutative matrix generation section and transmitted to a communication party, and a matrix MB (MB=S−kBQnBSkB) is acquired from the communication party. A matrix MAB (MAB=S−kAMBnASkA) is computed as a common secret key by a shared secret key computation section. An encryption/decryption device is thereby capable of rapid generation of the secure common secret key. |
| US09608801B2 |
Programmable frequency divider providing a fifty-percent duty-cycle output over a range of divide factors
A divider circuit determines whether an input factor (N) is an even number or an odd number. If N is an even number then the input clock is divided by N/2 to generate an intermediate clock. The intermediate clock is further divided by two to generate a div-by-2 clock, which is provided as the output clock with fifty percent duty cycle. If N is an odd number, the input clock is divided by (N/2−0.5) in a first duration and by (N/2+0.5) in a second duration to generate the intermediate clock, which is then divided by two to generate the div-by-2 clock. A delayed clock is generated from the div-by-2 clock, wherein the delayed clock lags the div-by-2 clock by half cycle duration of the input clock. The div-by-2 clock and the delayed clock are combined to generate the output clock with fifty percent duty cycle. |
| US09608797B2 |
Adaptive envelope extracting apparatus, signal decoding apparatus and short-distance contactless communication apparatus applying the adaptive envelope extracting apparatus, and method thereof
An envelope extracting apparatus includes: a clock extracting device arranged to extract a clock signal of a receiving modulation signal according to a first biasing voltage; and an edge detecting device arranged to generate a detecting signal to indicate an envelope edge of the receiving modulation signal according to a delayed clock signal of the clock signal and a second biasing voltage; wherein the second biasing voltage or a delay time of the clock signal is adjustable. |
| US09608790B2 |
Method and apparatus for transmitting receipt acknowledgement in wireless communication system
The present invention discloses a method for transmitting a reception acknowledgement response in a wireless communication system. The method includes receiving an enhanced physical downlink control channel (EPDCCH), determining a physical uplink control channel (PUCCH) resource based on a lowest one of enhanced control channel element (ECCE) indexes configuring the EPDCCH and a HARQ-ACK resource offset (ARO), and transmitting a reception acknowledgement response through the PUCCH resource. When a reception acknowledgement response related to two or more subframes is transmitted in a subframe for transmission of the reception acknowledgement response, a set of possible values for the ARO includes a first ARO value to shift a PUCCH resource of a specific subframe to a PUCCH resource region for at least one subframe prior to the specific subframe. The first ARO value provides a different shift amount depending on a group having the specific subframe among groups related to the two or more subframes. |
| US09608787B2 |
Method and device for notifying reference signal configuration information
A method and a device for notifying reference signal configuration information are disclosed. Channel state information-reference signal (CSI-RS) configuration information is coded, to obtain a CSI-RS configuration information code. A mapping relation between the CSI-RS configuration information code and the CSI-RS configuration information is stored. A CSI-RS configuration information code corresponding to CSI-RS configuration information to be notified is searched in the stored mapping relation between the CSI-RS configuration information code and the CSI-RS configuration information. The searched CSI-RS configuration information code is sent to a user equipment (UE), so that the UE determines CSI-RS configuration information according to the received CSI-RS configuration information code and the mapping relation between the CSI-RS configuration information code and the CSI-RS configuration information. |
| US09608785B2 |
Channel estimation method and apparatus using reference signal
The present invention relates to a wireless communication system, and more specifically, to a method and an apparatus for estimating a channel using a reference signal. According to one embodiment of the present invention, a method in which a terminal estimates a channel in a wireless communication system may comprise the steps of: receiving a cell-specific reference signal (CRS) and a channel state information-reference signal (CSI-RS) from a base station; generating CSI of a channel estimated using the CRS on the basis of a channel estimated using the CSI-RS and a mapping relationship between the CRS port and the CSI-RS port; reporting the generated CSI to the base station; and demodulating data on the basis of the channel estimated using the CRS. |
| US09608784B2 |
Inserting virtual carrier in conventional OFDM host carrier in communications system
A base station communicating data to/from plural mobile terminals over plural OFDM sub-carriers within a coverage area. The base station allocates transmission resources provided by a first group of the plural OFDM sub-carriers within a first frequency band to mobile terminals of a first type and allocates transmission resources provided by a second group of the plural OFDM sub-carriers within a second frequency band to terminals of a second type, the second group being smaller than the first group and the second frequency band selected from within the first frequency band. The base station transmits control information including resource allocation information for terminals of the first type over a first bandwidth corresponding to the combined first and second groups of OFDM sub-carriers and transmits control information including resource allocation information for terminals of the second type over a second bandwidth corresponding to the second group of OFDM sub-carriers. |
| US09608782B2 |
Method, system, access point and computer program product for enhancing the usable bandwidth between of a telecomunications network and a user equipment
A method for enhancing usable bandwidth between an access point of a radio access network of a telecommunications network and a User Equipment of a subscriber of the telecommunications network, in which the User Equipment and the access point are configured to mutually communicate based on a standardized mobile communication technology using carrier aggregation of at least a first communication carrier having a first carrier frequency and a second communication carrier having a second carrier frequency. The first carrier frequency is a standardized and licensed frequency and is related to the standardized mobile communication technology. An antenna device of the access point transmits and/or receives radio frequency signals to and/or from the User Equipment. |
| US09608779B2 |
Methods of data allocation and signal receiving, wireless transmitting apparatus and wireless receiving apparatus
Methods of data allocation and signal receiving, a wireless transmitting apparatus, and a wireless receiving apparatus are provided based on orthogonal frequency division multiplexing (OFDM) technology. The wireless transmitting apparatus obtains a data stream and allocates the data stream to a first sub-carrier set. Each of the first sub-carrier set and a second sub-carrier set has sub-carriers with opposite frequencies to each other, respectively. The second sub-carrier is emptied or allocated according the data stream allocated to the first sub-carrier set. The data stream is converted into an OFDM signal transmitted through a transmitting module. The wireless receiving apparatus includes a single branch receiver for receiving a radio frequency (RF) signal and outputting a baseband signal. Subsequently, the data stream is restored from the baseband signal. |
| US09608770B2 |
Apparatus and method for sending and receiving broadcast signals
Disclosed is an apparatus for transmitting a broadcast signal including: an input formatter module configured to de-multiplex an input stream into at least one data pipe (DP); a BICM module configured to perform error correction on data of the at least one DP; a frame building module configured to generate a signal frame including the data of the DP; and an OFDM generation module configured to generate a transmission signal by inserting a preamble into the signal frame and performing OFDM modulation thereon. |
| US09608769B2 |
Data packet for bidirectional transmission of data packets during data transmission between a first and a second communication appliance, and method for transmitting such a data packet
A data packet for bidirectional transmission of data packets in the case of data transmission between a first and a second communication device and a method for transmitting such a data packet is provided. A data packet that is transmitted from a first to a second communication device to contain a piece of acknowledgement information for all data packets that have already been received from the first communication device previously during this data transmission. |
| US09608766B2 |
Digital broadcasting system and method of processing data in digital broadcasting system
The present invention provides a method of processing data. The method of processing data includes receiving a broadcasting signal where mobile service data are multiplexed with main service data, extracting transmission-parameter-channel signaling information and fast-information-channel signaling information from a data group within the received mobile service data; obtaining first program table information describing virtual channel information of an ensemble and a service provided by the ensemble using the fast-information-channel signaling information, the ensemble the ensemble corresponding to a virtual channel group of the received mobile service data, obtaining information indicating that second program table information, which describes an additional service provided by the ensemble, is included in the ensemble and parsing the second program table information according to the obtained information; and providing the additional service by using the second program table information. |
| US09608759B2 |
Optical communication system with hardware root of trust (HRoT) and network function virtualization (NFV)
An Internet Protocol/Wave Division Multiplex (IP/WDM) network implements Hardware Root of Trust (HRoT) and Network Function Virtualization (NFV). An NFV server generates and transfers IP control data and WDM control data to IP/WDM machines. The IP/WDM machines exchange IP packets between IP ports and WDM interfaces based on the IP control data. The IP/WDM machines exchange the IP packets between the WDM interfaces and WDM ports based on the WDM control data. The IP/WDM machines transmit and receive the IP packets from the WDM ports using different optical wavelengths. The IP/WDM machines transfer HRoT data indicating the optical wavelengths used to exchange the IP packets and indicating encoded hardware keys physically-embedded on the IP/WDM machines. The NFV server receives the HRoT data and process the encoded hardware keys and the optical wavelengths to validate HRoT status of the IP/WDM machines. |
| US09608754B2 |
Systems and methods for synchronization of clock signals
A system may include a transmitting device. The transmitting device may include one or more terminals for receiving a data signal and a first clock signal. A first phase lock loop may lock a phase of an initial periodic signal with a phase of the first clock signal, the first phase lock loop including a divider to generate the initial periodic signal based on the first clock signal. A decimation module may sample the initial periodic signal at a decimated rate of a backplane clock, the backplane clock being asynchronous with a clock that generated the first clock signal. A transmitting data block interface may construct data blocks and provide the data blocks to a receiving device, each of one or more of the data blocks including a portion of the data signal and at least one sample of the initial periodic signal. |
| US09608752B2 |
Systems and methods of transporting internal radio base station (RBS) interface information over a packet switched network
Systems and methods of transporting internal radio base station (RBS) interface information over a packet network are presented. In one exemplary embodiment, in an interworking function (IWF) for communicating packets between a radio equipment (RE) and a radio equipment controller (REC) of a radio base station (RBS), a method may include receiving a packet sent from another IWF and having internal RBS interface information and residence time measurement (RTM) information that characterizes an asymmetry between processing times on links in different directions between the RE and the REC. Further, the method may include determining an asymmetry compensation that compensates for the asymmetry using the RTM information. Also, the method may include applying the asymmetry compensation to a timestamp of the internal RBS interface information to obtain an updated internal RBS interface information. In addition, the method may include transmitting the updated internal RBS interface information to one of the RE and the REC that is attached to the IWF. |
| US09608744B1 |
Receiver system for audio information
A receiver can extract digital data from wireless radio frequency signal. The digital data contains index data and corresponding content digital audio data. The index data can comprise compressed digital audio data. The index data and content digital audio data are stored in memory. The index data can be retrieved from the memory, decompressed and then converted to analog audio signals. A user can use the analog audio signals from the index data to select audio content for playing by the receiver. |
| US09608743B2 |
Methods and devices for determining intermodulation distortions
A method (300) for determining inter-modulation distortions products of a mixing stage includes: driving (301) a signal input of the mixing stage based on an input signal, wherein an amplitude of the input signal is switched between a first level and a second level, and wherein a frequency of switching the amplitude is smaller than a frequency of the input signal; detecting (302) at a signal output of the mixing stage a first output signal responsive to the driving of the signal input with the input signal, wherein the amplitude of the input signal is switched to the first level, and a second output signal responsive to the driving of the signal input with the input signal, wherein the amplitude of the input signal is switched to the second level; and determining (303) the inter-modulation distortions based on the first output signal and the second output signal. |
| US09608742B2 |
Methods and systems for signal fingerprinting
Systems and methods for modulating a telepowering signal in a downlink communication. Embodiments of the present invention provide a fingerprint module to generate a fingerprint signal that can be modulated with a telepowering signal for communication by a transmission module in a downlink communication. The fingerprint signal is reflected by a wayside equipment module and received by the transmission module to enable an additional communication other than the downlink communication and an uplink communication. |
| US09608738B2 |
System and method for broadband doppler compensation
A Doppler compensation system includes a transmitter unit for transmitting a signal, wherein the transmitted signal being associated with an emission time-scale, a receiving unit for receiving a signal, wherein the received signal is associated with a receive time-scale that is not equivalent to the emission time-scale, and a Doppler compensating unit configured to estimate an inverse temporal distortion function, wherein the Doppler compensating unit implements the inverse temporal distortion function to estimate the transmitted signal. |
| US09608731B2 |
Microfabricated optical apparatus
A microfabricated optical apparatus that includes a light source driven by a waveform, a turning mirror, and a beam shaping element, wherein the waveform is delivered to the light source by at least one through silicon via. |
| US09608723B2 |
Carrier-signal power ratio control in direct detection optical systems
System and method embodiments are provided for carrier-signal power ratio (CSPR) control in direct detection optical systems. In an embodiment, a method for CSPR control in a direct detection optical system includes receiving an electrical signal in a receiver (RX) digital signal processor (DSP), wherein the electrical signal is obtained from a corresponding optical signal via a direct detection component; estimating, a CSPR for the electrical signal; generating one of a control signal according to the CSPR; and transmitting the control signal to one of an optical filter and a laser, wherein the wavelength control signal controls causes a center wavelength (CW) of one of the optical filter and the laser to be adjusted such that an offset between the CW of the laser and the CW of the optical filter results in a desired CSPR. |
| US09608720B2 |
System for testing passive optical lines
An optical splitter assembly including a splitter housing, a passive optical power splitter positioned within the splitter housing and a plurality of splitter output pigtails that extend outwardly from the splitter housing. Each of the splitter output pigtails including an optical fiber structure having a first end optically coupled to the passive optical power splitter and a second end on which a fiber optic connector is mounted. Each of the splitter output pigtails having a different test characteristic such that the splitter output pigtails can be individually identified during optical network testing. |
| US09608718B2 |
Method and apparatus for demodulation of a desired signal by constellation-independent cancellation of nonlinear-distorted interference
A method and apparatus are provided for demodulating a received signal containing modulated desired-signal digital data and relayed-interference that results from a nonlinear-distorted interference signal. Estimation of the nonlinear-distorted interference from a pre-distortion interference signal and subsequent cancellation within the received signal of the distorted interference produces a residual-interference signal that is subsequently demodulated to produce estimates of the desired-signal data. The estimation is adapted for changing nonlinear distortion effects. |
| US09608717B1 |
Method and system for communicating between a media processor and network processor in a gateway device
A gateway device includes a media processor module comprising a gateway application module. The gateway device also includes a router module comprising a gateway abstraction module and an interface handler module. The gateway device also includes a shared interface module in communication with the router module and the media processor module. The shared interface module receives a service request signal from the gateway application module. The gateway abstraction module obtains the service request signal from the shared interface module through an interface handler module. The gateway abstraction module communicates a response signal to the media processor module through the shared interface module. The media processor module performs a function in response to the response signal. |
| US09608716B1 |
Satellite transmit antenna ground-based pointing
This disclosure provides systems, methods and apparatus for determining beamforming coefficients that correct for pointing errors. In one aspect, a subsystem of a ground station can receive calibration signals from a satellite. The properties of the calibration signals can be measured and used to determine the pointing error of the satellite. Beamforming coefficients based on the pointing error can be provided by the ground station to the satellite. |
| US09608714B2 |
Global communication network
A method for modifying a communication signal for transmission from a source to a destination includes identifying, by data processing hardware, a target platform for communication with a communication device. The method includes establishing a communication connection between the target platform and the communication device and identifying an available communication channel for communicating data between the target platform and the communication device. The method also includes modifying a communication signal by multiplying the communication signal with a pseudo random noise spreading code. The method also includes causing transmission of the modified communication signal from the communication device to the target platform through the available communication channel. The modified communication signal is transmitted below a thermal noise of the available communication channel. |
| US09608713B2 |
Apparatus and method for removing interference by ICS repeater using standardizer
The present disclosure relates to an interference cancellation method and device of an ICS repeater using a leveler, and may effectively cancel only interference signals by using a leveler without using a magnetic correlation cancellation device or digital filter in order to cancel unnecessary noise signals generated by narrow-band signals and enable an ICS repeater design for an LTE wireless network that needs a short system time delay. |
| US09608710B2 |
Techniques for device-to-device communications
Examples may include techniques to enable user equipment (UE) to establish a device-to-device (D2D) communication link for D2D communications with another UE. In some examples, the D2D communications may occur when either both or at least one UE is within a coverage area for a wireless wide area network (WWAN). In some other examples, both UEs may be outside of the coverage area and may utilize a third UE to provide or relay information for use to establish the D2D communication link. |
| US09608709B1 |
Methods and systems for beamforming and antenna synthesis
System and methods for (i) covering wirelessly a large angular span using combinations of directional antennas, (ii) dynamic synthesis of antenna radiation patterns, and (iii) antenna configuration selection and beamforming. |
| US09608699B2 |
Method and device for transmitting channel state information in wireless communication system
One embodiment of the present invention discloses a method for allowing a terminal to transmit channel state information (CSI) in a wireless communication system in which a plurality of CSI reference signal (CSI-RS) resources are set for a plurality of transmission points, and the method for transmitting the CSI comprises the steps of: determining CSI reference resources; and transmitting CSI calculated from a measured signal on the basis of the CSI reference resources, wherein the CSI reference resources are included in one of at least two CSI subframe sets, the CSI subframe sets are set for each of the plurality of CSI-RS resources, and the CSI subframe sets are commonly set for transmission points which perform cooperative transmission among the plurality of transmission points. |
| US09608694B2 |
Method and device for locating an impairment within a telecommunication line
A method for locating an impairment within a telecommunication line may include determining measurement data related to the telecommunication line and estimating a location of the impairment depending on the measurement data. The measurement data includes crosstalk data including at least one transfer function element of a crosstalk matrix. The transfer function element characterizes a crosstalk transfer function from the telecommunication line towards the at least one further telecommunication line, and the method includes detecting oscillations in the crosstalk transfer function. |
| US09608691B2 |
Fiber-optic node with forward data content driven power consumption
Methods and systems for modulating an amplifier power supply to efficiently attain amplified RF output power with much lower power dissipation than existing amplifiers. In a cable television (CATV) network, a processor receives a signal to be amplified by an amplifier at a location remote from the processor. A bias point of the amplifier may be variably modulated based on peaks of an input signal to reduce amplifier dissipation. |
| US09608685B2 |
Deformable seal for an electronic device
An electronic device that includes a deformable feature designed to seal two or more parts of the electronic device is disclosed. The deformable feature may be designed to deform, in response to a force applied to the deformable feature, with little or no compression. The deformable feature may include a cavity or relief volume extending along the deformable feature to define a space or void in the deformable feature. In response to a force, the deformable feature may deform such that a material (or materials) defining the deformable feature occupies or extends into the space or void, or in a location previously occupied by the space or void. The deformable feature may provide a protective seal between two or more parts that prevents ingress of contaminants, such as a liquid. |
| US09608684B2 |
Network-on-chip based computing devices and systems
Several embodiments of the present technology are related to network-on-chip based integrated circuits, methods of manufacturing or fabricating such integrated circuits, and electronic/computing devices incorporating such integrated circuits. In one embodiment, a computing device includes a substrate, a plurality of computing nodes interconnected by a plurality of interconnects on the substrate to form a wired network. The individual computing nodes include one or more computing processors. The computing device further includes a pair of wireless transceivers individually connected to one of the computing nodes and spaced apart from each other by a network diameter of the wired network. |
| US09608675B2 |
Power tracker for multiple transmit signals sent simultaneously
Techniques for generating a power tracking supply voltage for a circuit (e.g., a power amplifier) are disclosed. The circuit may process multiple transmit signals being sent simultaneously on multiple carriers at different frequencies. In one exemplary design, an apparatus includes a power tracker and a power supply generator. The power tracker determines a power tracking signal based on inphase (I) and quadrature (Q) components of a plurality of transmit signals being sent simultaneously. The power supply generator generates a power supply voltage based on the power tracking signal. The apparatus may further include a power amplifier (PA) that amplifies a modulated radio frequency (RF) signal based on the power supply voltage and provides an output RF signal. |
| US09608671B2 |
Error detection method of variable-length coding code stream and decoding and error detection apparatus
An error detection method of a variable-length coding (VLC) code stream includes at least the following steps: decoding a data frame of the VLC code stream; and determining whether the data frame is erroneous according to length information of the data frame and a bit number of decoded data of the data frame. According to the method, the present invention realizes the objective of performing error detection upon data frames during the decoding process. |
| US09608669B2 |
Latency reduced error correction scheme with error indication function for burst error correction codes
The present discloses provides a decoding method, decoding apparatus and decoder for correcting burst errors. In particular, the decoding method for correcting burst errors comprises: computing an initial syndrome of a received data frame, wherein the data frame is encoded according to cyclic codes for correcting burst errors; determining error correctability of burst error contained in the data frame based on the computed initial syndrome; and processing the burst error in the data frame and outputting the processed data frame based on the determined error correctability. With the decoding method, decoding apparatus, and decoder of the present invention, error correctability of burst errors contained in a data frame can be determined before the data is send out, while having smaller decoding latency through determining the error correctability and error pattern of the burst errors contained in the data frame using initial syndrome of the data frame. |
| US09608668B2 |
Error correcting apparatus, error correcting method, and program
Provided is an error correcting method including: executing, by an error-position detector, a determination process if a received word fails to satisfy a predetermined condition, the received word having a plurality of symbols, the determination process including determining if a determination-target symbol has an error or not, and detecting an error position, the error position being a position of the symbol having an error; changing, by a determination-target changing unit, the position of the determination-target symbol of the received word every time the determination process is executed; detecting, by an undetected-position detector, if the predetermined condition is satisfied, the error position of the symbol, for which the determination process is not executed, based on a relation between the error position and a variable generated from the received word; and correcting, by an error corrector, an error at the error position detected by the error-position detector and the undetected-position detector. |
| US09608667B2 |
Method and apparatus for decoding non-binary parity check code
A method of decoding a non-binary Low Density Parity Check (LDPC) code is provided. The method includes a plurality of messages to perform hard decision for all messages except for one message, and combines the hard-decided values with the one message that is not hard-decided, to update a final output message. |
| US09608666B1 |
Non-concatenated FEC codes for ultra-high speed optical transport networks
A decoder performs forward error correction based on quasi-cyclic regular column-partition low density parity check codes. A method for designing the parity check matrix reduces the number of short-cycles of the matrix to increase performance. An adaptive quantization post-processing technique further improves performance by eliminating error floors associated with the decoding. A parallel decoder architecture performs iterative decoding using a parallel pipelined architecture. |
| US09608662B2 |
Apparatus and method for converting floating-point operand into a value having a different format
A data processing apparatus has floating-point add circuitry to perform a floating-point addition operation for adding or subtracting two floating-point values. The apparatus also has conversion circuitry to perform a conversion operation to convert a first floating-point value into a second value having a different format. The conversion circuitry is capable of converting to an integer or fixed-point value. The conversion circuitry is physically distinct from the floating-point add circuitry. |
| US09608661B2 |
Software programmable cellular radio architecture for wide bandwidth radio systems including telematics and infotainment systems
A cellular radio architecture that includes a programmable bandpass sampling radio frequency front-end and an optimized digital baseband. The architecture includes a multiplexer having signal paths that include a bandpass filter that passes a different frequency band than the other bandpass filters and a circulator that provides signal isolation between the transmit signals and the receive signals. The architecture also includes a receiver module having a separate signal channel for each of the signal paths in the multiplexer, where each signal channel in the receiver module includes a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal. The architecture further includes a transmitter module having a transmitter delta-sigma modulator for converting digital data bits to analog transmit signals, where the transmitter module includes a power amplifier and a switch for directing the transmit signals to one of the signal paths in the multiplexer. |
| US09608658B1 |
Segmented successive approximation register (SAR) analog-to-digital converter (ADC) with reduced conversion time
Certain aspects of the present disclosure provide a segmented successive approximation register (SAR) analog-to-digital converter (ADC). One example ADC generally includes a plurality of SAR ADC circuits each associated with a different voltage range segment of a voltage range for the ADC. Each SAR ADC circuit is configured to receive an analog signal input to the ADC and to output a digital signal based on the analog signal, the digital signal being representative of a voltage level of the analog signal when the voltage level of the analog signal is within the segment associated with the SAR ADC circuit. In certain aspects, the SAR ADC may include logic configured to control a digital output of the ADC based on one or more of the digital signals representative of the voltage level of the analog signal output by one or more of the plurality of SAR ADC circuits. |
| US09608655B1 |
ADC background calibration with dual conversions
An analog-to-digital converter (ADC) system can sample an input voltage for at least a first conversion into a first N1-bit digital value and to use the same input voltage sample for at least a second conversion into a second N2-bit digital value. A difference between a result of the first conversion and a result of the second conversion can be driven toward zero to adjust weights of one or more of the bits to calibrated values for use in one or more subsequent analog-to-digital conversions of subsequent samples of the input voltage. Shuffling, dithering, or the like can help ensure that at least a portion of the decision paths used in the second conversion are different from the decision paths used in the first conversion. Calibration can be performed in the background while the the ADC is converting in a normal mode of operation. |
| US09608651B1 |
Systems and methods of phase-locked loop involving closed-loop, continuous frequency range, auto calibration and/or other features
Systems and methods involving phase-locked-loop (PLL) circuitry are disclosed. In one illustrative implementation, a PLL circuit device may comprise voltage controlled oscillator (VCO) circuitry having a bias signal that sets a frequency range, circuitry that shifts the VCO circuitry to operate in one of the frequency ranges, and other circuitry to compare/calibrate signals and/or set the bias current. According to further implementations, as a function of operation of the circuitry, an operating frequency range of the VCO circuitry may be shifted to a different operating frequency range, and closed-loop, continuous frequency range, auto-calibration or other features may be provided. |
| US09608645B2 |
Phase-lock loop
In one implementation an output signal of an oscillator is varied to be within a desired frequency band with respect to a reference signal, the output signal having a plurality of phases. The implementation may include comparing the output signal with the reference signal, counting falling edges about each phase of the number of phases in a predetermined time period and summing to define a count output; comparing the count output with a product of the number of phases of the output signal and the factor to define a comparison, generating a control signal based upon the comparison, and inputting the control signal to the oscillator to alter the output signal thereof. |
| US09608643B1 |
Delay lock loop
A delay lock loop is provided. A delay unit delays a first clock signal to generate a second clock signal according to the delay factor. An elimination unit delays a third clock signal to generate a fourth clock signal. A phase detection unit generates an indication signal according to a phase difference between the second and fourth clock signals. When a duration of the indication signal being at a first level does not arrive at a pre-determined value and the indication signal is at a second level, the control unit increases the delay factor. When the duration of the indication signal being at the first level arrives at the pre-determined value and the indication signal is at the second level, the control unit reduces the delay factor. |
| US09608642B1 |
Delay lock loop
A delay lock loop including a selection unit, a delay unit, and a phase detection unit is provided. The selection unit receives a non-inverted clock signal and an inverted clock signal and generates a first clock signal and a second clock signal according to an indication signal. The delay unit is coupled to the selection unit. The delay unit includes a delay factor and delays the first clock signal to generate a third clock signal according to the delay factor. The phase detection unit is coupled to the delay unit and the selection unit and generates the indication signal according to a phase difference between the second and third clock signals. The delay unit adjusts the delay factor according to the indication signal. |
| US09608637B2 |
Dynamic voltage level shifters employing pulse generation circuits, and related systems and methods
Dynamic voltage level shifters employing pulse generation circuits are disclosed. In one aspect, a dynamic voltage level shifter includes a dynamic voltage level shifting circuit. The dynamic voltage level shifting circuit includes a pre-charge circuit configured to provide supply voltage of a first voltage domain to a dynamic node in response to a clock signal having pre-charge voltage. An evaluate circuit is configured to provide ground voltage to the dynamic node in response to an input signal having an active voltage while the clock signal has evaluate voltage. A keeper circuit is configured to provide a reduced drive strength to the dynamic node in response to pulse signal. The pulse signal is generated by a pulse generation circuit, wherein a pulse width of the pulse signal correlates to a difference in supply voltages of first and second voltage domains. |
| US09608634B1 |
Toothed-rack physical unclonable function
A physical unclonable function (PUF) located on a supply item for an imaging device is disclosed. The PUF has a toothed rack configured to mate with a gear. During reading operations, the gear turns and translates the PUF linearly under a magnetic sensor. This configuration is inexpensive and robust. Other devices are disclosed. |
| US09608633B1 |
Interface circuit with configurable variable supply voltage for transmitting signals
An interface circuit includes a pre-driver that converts the single-ended signal to an intermediate differential signal having a first voltage swing responsive to a first supply voltage supplied to the pre-driver. An output driver is coupled to receive the intermediate differential signal from the pre-driver to convert the intermediate differential signal to an output differential signal coupled to be received by a load coupled to the output driver. The output differential signal has a second voltage swing responsive to a second supply voltage supplied to the output driver. An internal regulator is coupled to receive a variable supply voltage to supply the second voltage to the output driver. The second supply voltage is generated in response to a bias signal. A replica bias circuit is coupled to receive the variable supply voltage to generate the bias signal. |
| US09608625B2 |
Semiconductor device and semiconductor system
According to one embodiment, a semiconductor device includes: a voltage line to which a first voltage is applied; a first circuit configured to operate by using the first voltage; and a second circuit configured to control a connection between the voltage line and the first circuit. The second circuit includes: at least one first switch circuit configured to connect the first circuit and the voltage line based on a first control signal; and a second switch circuit including a plurality of switch sections configured to connect the first circuit and the voltage line based on a plurality of second control signals different from the first control signal. |
| US09608620B2 |
Control system and control method for controlling a switching device integrated in an electronic converter and switching cell comprising said system
The present invention relates to a control system and control method for controlling a switching device (1) integrated in an electronic converter, the object of which is to extend the working voltage range of the switching devices and thus increase the power of the electronic DC/AC converter which prepares the energy produced by a energy generating system and injects it into the electrical grid. It basically comprises a voltage source (3), a capacitance (7), a first gate resistor (21) and a second gate resistor (22), a first circuit formed by a series resistor (6) with a first diode (5), a second circuit formed by a second diode (4) and a connecting element (8) controlled by a control unit (12) that controls the opening and closing thereof. Another object of the present invention is a switching cell for an electronic converter comprising said control system. |
| US09608618B2 |
Gate driving circuit including a temperature detection circuit for reducing switching loss and switching noise
A temperature detection circuit for detecting a temperature of a switching element, a current source for causing a forward current to flow to the temperature detection circuit, an amplifier circuit for amplifying a forward voltage of the temperature detection circuit, a current adjustment circuit for adjusting a magnitude of a gate current to the switching element on the basis of an output voltage of the amplifier circuit, and a drive circuit for receiving an external signal and turning ON/OFF the switching element, are included. The magnitude of the gate current caused to flow from the current adjustment circuit to the gate electrode of the switching element is adjusted on the basis of a change in a magnitude of the forward voltage corresponding to a change in the temperature of the temperature detection circuit. |
| US09608615B2 |
Negative high voltage hot switching circuit
A biasing circuit includes cascoded transistors including a first transistor and a second transistor. A first gate of the first transistor is coupled to a second gate of the second transistor at a first node. The circuit also includes a voltage control circuit coupled to at least one of the first transistor or the second transistor. The voltage control circuit is configured to change a voltage level of at least one of the first transistor or the second transistor to allow voltage domain transition of an output signal in view of a change in state of an input signal without ramping a supply signal of the biasing circuit. |
| US09608612B2 |
Time amplifier and method for controlling the same
Provided is a time amplifier. The time amplifier includes: an SR latch providing an output at a timing determined according to a time difference between two inputs; and an operation determination unit connected to a power terminal of the SR latch and configured to determine an operation of the SR latch. |
| US09608610B2 |
Reconfigurable voltage desensitization circuit to emulate system critical paths
A circuit for controlling a clock signal may include a voltage source that provides a bias voltage, and at least one delay element having a non-linear capacitive load coupled to an output of the delay element. The non-linear capacitive load receives the bias from the voltage source and controls a delay magnitude applied to a plurality of pulses of the clock signal by the delay element. Based on the bias having a first scaled voltage, the delay magnitude that is applied to the plurality of clock pulses is increased in order to generate a frequency correction to the operating frequency of a microprocessor based on a variation to a microprocessor supply voltage. Based on the bias having a second scaled voltage, the delay magnitude that is applied to the clock pulses is maintained to retain the operating frequency of the clock during the variation to the supply voltage. |
| US09608608B2 |
Power module
A power module includes: a base plane; at least one switch chip assembled on the base plane; and a voltage clamping circuit for clamping a voltage spike occurring on the at least one switch chip, comprising components of a charging loop, wherein the components of the charging loop at least comprise a capacitor, wherein a projection of a center point of at least one of the components of the charging loop on the base plane is located within at least one first circle, defined with a center of the first circle being a center point of the at least one switch chip, and with a radius of the first circle being a product of a maximum one of a length and a width of the at least one switch chip and a first coefficient, which is a multiple of 0.5. |
| US09608606B2 |
Slope control circuit
A slope control circuit is connected between a replica circuit and a controller area network bus. The replica circuit generates an upper and a lower feedback signal. The slope control circuit receives and is driven by the feedback signals for controlling a voltage slope of a high-level output and a low-level output. The slope control circuit comprises an upper and a lower driving circuit, individually connected between the replica circuit, the high-level output and the low-level output. The upper driving circuit and the lower driving circuit respectively include at least one charging and discharging circuit. By controlling the charging and discharging circuit, the present invention controls decreasing voltage slope of the high-level output to be symmetric to increasing voltage slope of the low-level output, and delay time of the circuit switching between different operating modes to be equivalent. |
| US09608605B2 |
Apparatus and scheme for IO-pin-less calibration or trimming of on-chip regulators
A method and apparatus for measuring a voltage are disclosed. In an embodiment a method for controlling a supply voltage includes providing a first periodic signal by providing a reference voltage to an oscillator, providing a second periodic signal by providing the supply voltage (VOUT) of a voltage source to the oscillator, providing a first count by measuring first periods of the first periodic signal, providing a second count by measuring second periods of the second periodic signal and comparing the first count with the second count. |
| US09608602B2 |
Uncertainty aware interconnect design to improve circuit performance and/or yield
Methods and an apparatus related to generating parameters and guidelines used in the manufacture of semiconductor IC devices are described. A method includes measuring a first oscillating signal produced by a first ring oscillator that includes a first interconnect provided in a first interconnect layer of an IC, selecting a first mode of operation for a second ring oscillator circuit that includes a second interconnect disposed in alignment with the first interconnect, selecting a second mode of operation for the second ring oscillator circuit, and determining one or more characteristics of the first interconnect based on a difference in frequency of the first oscillating signal produced when the second ring oscillator circuit is operated in the first mode and frequency of the first oscillating signal when the second ring oscillator circuit is operated in the second mode. |
| US09608585B2 |
Dynamic current source for zero-crossing amplifier units for use in high-speed communication circuits
A zero-crossing amplifier unit for use in high speed analog-digital-converters. A gain stage compares a sampling voltage at an input node with a provided threshold voltage to obtain a gain stage output signal. A voltage controlled current source provides a load current depending on a time window between an initial slope and an end slope of the gain stage output signal. A slope control means increases a duration of a rise and/or fall time of at least one of the initial and end slopes of the gain stage output signal. |
| US09608584B2 |
Calculating and adjusting the perceived loudness and/or the perceived spectral balance of an audio signal
The invention relates to the measurement and control of the perceived sound loudness and/or the perceived spectral balance of an audio signal. An audio signal is modified in response to calculations performed at least in part in the perceptual (psychoacoustic) loudness domain. The invention is useful, for example, in one or more of: loudness-compensating volume control, automatic gain control, dynamic range control (including, for example, limiters, compressors, expanders, etc.), dynamic equalization, and compensating for background noise interference in an audio playback environment. The invention includes not only methods but also corresponding computer programs and apparatus. |
| US09608580B2 |
Biosignal amplifying circuit
A biosignal apparatus is described including an amplifier and a sampler. The amplifier is configured to alternate between an operating state and a low power state based on a periodically changing control signal. The sampler is configured to sample a signal output from the amplifier in response to the amplifier being in the operating state and maintain the sampled signal in response to the amplifier being in the low power state. |
| US09608570B1 |
Amplifier calibration methods and circuits
An amplifier calibration system has a calibration controller, a comparator coupled between an amplifier to be tested and the calibration controller, and an analog test signal generator driven by the calibration controller and coupled to the amplifier input. The system applies a cycle of analog tests to the amplifier input. The cycle has an upward path and a downward path. The upward path includes three signal levels: lowest, medium low, and medium high. The downward path includes: highest, medium high, and medium low. The comparator determines successive polarities of the amplifier's responses to the cycle of analog tests. Based on the polarities, the system determines amplifier characteristics, and calibrates amplifier parameters to change the amplifier characteristics to desired values. Characteristics may include hysteresis, offset, input range values, and other amplifier specifications. |
| US09608568B2 |
Transconductance optimization using feedback-balun-transformer with inductance degeneration combinations
Disclosed are apparatuses and methods to overcome technology limitations to achieve linearity and efficiency performance suitable for practical wireless communications systems. In an embodiment, an amplifier is provided that superimposes the transconductance from a common source amplifier with inductor degeneration with the transconductance from a common source amplifier without degeneration. In an embodiment, an amplifier is provided having a feedback-balun-transformer that provides electro-magnetic coupling between primary, secondary, and negative feedback degeneration inductors and a differential to single-ended conversion output. |
| US09608564B2 |
Metamaterial resonator based device
The present disclosure is directed a metamaterial circuit may further be coupled to a möbius strip resonator or a substrate integrated waveguide. The disclosure is also directed to a device having a tuning circuit and a metamaterial resonator operatively coupled to the tuning circuit. The metamaterial resonator operatively coupled to the tuning circuit may likewise be coupled to a möbius strip resonator or a substrate integrated waveguide. |
| US09608561B2 |
Power generation control apparatus, solar power generation system, and power generation control method
A power generation control apparatus (14) includes a solar cell controller (18) and a range determinator (20). The solar cell controller (18), while changing at least one of an operation current and an operation voltage serving as driving variables within a first range, calculates actual power generated by a solar cell (13). The solar cell controller (18) controls the solar cell (13) to generate power by using a driving variable that maximizes the generated power within the first range. The range determinator (20), based on maximum generated power and at least one of a rated PV curve or an approximation line of the rated PV curve and a rated PI curve or an approximation line of the rated PI curve, updates the first range. |
| US09608560B2 |
Solar power generation apparatus with non-equidirectional solar tracking stages
A solar power generation apparatus with non-equidirectional solar tracking stages. At the beginning of sunrise, a solar power generation module is driven by a link assembly to gradually rotate from an initial position to the sun in a direction reverse to the moving direction of the sun. After the solar power generation module is rotated to a position of first preset elevation and azimuth, where the solar power generation module right faces the sun, the solar power generation module starts pivotally rotating along with the change of the position of the sun. When the sun and the direction of the solar power generation module synchronously move to a position of second preset elevation and azimuth, the solar power generation module is further driven to gradually pivotally rotate back to the initial position in a direction reverse to the moving direction of the sun for next cycle. |
| US09608557B2 |
Method for controlling operation of an electric motor in a height-adjustable furniture arrangement
The present invention relates to a method for controlling operation of an electric motor in a height-adjustable furniture arrangement, wherein operation of the electric motor provides a height-adjusting function in the height-adjustable furniture arrangement. The method comprises the steps of providing, by a power supply unit connected to the electric motor, an incoming power comprising an incoming current and an incoming voltage, transforming the incoming current and the incoming voltage to a motor supply current and a motor supply voltage supplied to the electric motor, measuring load on the electric motor, and when the measured load requires a current higher than the incoming current for providing the height-adjusting function, setting the levels of the motor supply current and/or the motor supply voltage such that the motor supply current is higher than the incoming current and the motor supply voltage is lower than the incoming voltage. |
| US09608555B2 |
Method for actuating a polyphase machine
A method is described for activating a multiphase machine that has a link circuit equipped with a link circuit capacitor, phase windings, and one high-side switch and one low-side switch per phase. The switches associated with the individual phases have control signals applied to them by a control unit. The control unit provides, in successive activation cycles, pulse-shaped control signals for the switches, the pulse widths and pulse onsets of which are respectively varied within an activation cycle in such a way that the link circuit current is reduced. |
| US09608546B2 |
Actuator
An actuator includes a first deformable material layer, a second deformable material layer, and an intermediate layer provided between the first deformable material layer and the second deformable material layer. The first deformable material layer includes a first deformable material containing a first stimulus-responsive compound, which changes its molecular structure and also its color tone according to an oxidation-reduction reaction, a first polymeric material, a first electronically conductive substance having a light transmitting property, and a first electrolyte. The second deformable material layer includes a second deformable material containing a second stimulus-responsive compound, which changes its molecular structure and also its color tone according to an oxidation-reduction reaction, a second polymeric material, a second electronically conductive substance having a light transmitting property, and a second electrolyte. The intermediate layer inhibits electron transfer between the first deformable material layer and the second deformable material layer. |
| US09608545B1 |
Switching interference suppression in motor driving circuits using space vector pulse width modulation (PWM)
Circuits and methods for driving a load are disclosed. An exemplary driving circuit may include a plurality of switching devices and a controller electrically connected to the plurality of switching devices. The controller may be configured to provide a switching signal for controlling switching operations of the switching devices. The controller may also be configured to determine whether the switching signal falls within a predetermined dead zone. When it is determined that the switching signal falls within the predetermined dead zone, the controller may be configured to modify the switching signal by moving a space vector corresponding to the switching signal to a boundary of the predetermined dead zone. In addition, the controller may be configured to provide the modified switching signal to the switching devices. |
| US09608542B2 |
III-nitride power conversion circuit
According to an exemplary embodiment, a III-nitride power conversion circuit includes a gate driver having a plurality of cascaded inverters, each of the plurality of cascaded inverters including at least one III-nitride transistor. At least one of the plurality of cascaded inverters has a cutoff switch and a III-nitride depletion mode load where the cutoff switch is configured to disconnect the III-nitride depletion mode load so as to prevent current from flowing from a supply voltage of the at least one of the plurality of cascaded inverters. The cutoff switch of the at least one of the plurality of cascaded inverters can be driven by one of the plurality of cascaded inverters. The III-nitride power conversion circuit can also include an output driver driven by the gate driver where the output driver has a segmented III-nitride transistor. Furthermore, a selector circuit can be configured to selectively disable at least one segment of the segmented III-nitride transistor. |
| US09608540B2 |
Method and device for controlling an inverter
The invention relates to a method (60) for controlling an inverter (10) using space-vector pulse width modulation, in particular to control an electric machine (14), said inverter (10) being equipped with a plurality of controllable switches (S) and being designed to provide a polyphase electric current (IU, IV, IW), in particular to supply multiphase electric current to an electric machine (14). In said method, a reference phase angle (alpha_R) is predefined, and the inverter (10) is controlled in such a way that a plurality of different successive switching states (V0-V7) is established for the switches (S) in order to provide the electric current (IU, IV, IW) in the form of a current space vector (I*). The inverter (10) is controlled in such a way that the current space vector (I*) is provided at a phase angle (alpha_I) which differs from the reference phase angle (alpha_R), a difference (delta_I) of the phase angle (alpha_I) from the reference phase angle (alpha_R) being determined according to a power loss (PA, PB, PC) and/or a temperature (TA, TB, TC) of at least one of the switches (S). |
| US09608538B2 |
Common zero volt reference AC / DC power supply with positive and negative rectification and method of operation thereof
A common zero volt reference AC/DC power supply with positive and negative rectification, and method of operation thereof. The power supply comprises an input for receiving an AC input voltage and an output for outputting a DC output voltage, the AC input and DC output having a common zero volt reference. The power supply comprises a first rectifier and a second rectifier, for respectively performing a half-wave rectification of a positive half cycle and negative half cycle of the AC input voltage. The power supply comprises control logic for detecting the negative half cycle of the AC input voltage and activating the second rectifier upon the detection. The power supply comprises a power converter for converting a DC rectified voltage received from at least one of the first and second rectifiers into the DC output voltage. |
| US09608536B2 |
Electric-power conversion system including single-phase inverter
The number of constituent components is reduced so as to provide a small-size and inexpensive electric-power conversion system. The electric-power conversion system is provided with an inverter circuit (14) connected with the rear stage of an AC power source, a smoothing capacitor (22) connected with the rear stage of the inverter circuit (14) by way of a rectifying device (20), a charging switch (2) that is connected with the front stage of the inverter circuit (14), that inputs an electric quantity based on an output of the AC power source (1) to the inverter circuit (14) when being turned on, and that cuts off an input of the electric quantity to the inverter circuit (14) when being turned off, and an inrush current prevention circuit (7) having an inrush current prevention switch (3) and an inrush current prevention resistor (4) that is connected in series with the rear stage of the inrush current prevention switch (3); the electric-power conversion system is characterized in that the inrush current prevention circuit (7) is connected in parallel with the charging switch (2). |
| US09608532B2 |
Body diode conduction optimization in MOSFET synchronous rectifier
To maximize power efficiency, dead time between “on” times of a synchronous rectifier (“SR”) MOSFET switch and a main switch for CCM operation in particular in isolated and non-isolated self-driven synchronous DC-DC converters needs to be optimized. To accomplish that objective, the latest conduction time t of a body diode of the SR MOSFET following conduction thereof is determined, compared with a selected fixed optimum period T1, and incrementally or decrementally adjusted in a subsequent switching cycle while t is unequal to T1, depending on whether t is shorter or longer than T1, so that t eventually is made substantially equal to T1 in length. This process is to be repeated continuously. |
| US09608531B2 |
Timing control method and apparatus for synchronous rectifier using estimated duration signal
A timing controller provides adaptive timings to control a synchronous rectifier with a body diode. The timing controller has a ramp generator providing a ramp signal at a first capacitor. The ramp signal corresponds to a discharge time when the body diode is forward biased. A second capacitor records an estimated duration signal. An update circuit is connected between the first and second capacitors, for shorting the first and second capacitor to update the estimated duration signal by charge sharing. A comparator with two inputs coupled to the ramp signal and the estimated duration signal respectively compares the ramp signal and the estimated duration signal to control the synchronous rectifier. |
| US09608530B2 |
Circuit configuration having a resonant converter, and method for operating a resonant converter
A circuit configuration contains a resonant converter feeding energy into a primary winding of a transformer, a control circuit for controlling the resonant converter and a plurality of modules. The modules include a frequency generator controllable with variable frequency, a short circuit monitoring unit configured to protect components of the resonant converter, and an open circuit detection unit. The open circuit detection unit is configured to shut down the resonant converter if a secondary side interacting with the primary winding of the transformer is open circuit, without having information from the secondary side. |
| US09608516B2 |
Battery discharge circuit and discharge method with over discharge protection
A battery discharge circuit has a switching circuit and a controller. The switching circuit is coupled between a battery and a load. The controller is configured to generate a control signal to control the switching circuit. When the battery voltage drops below a first reference voltage, the controller adjusts the control signal to regulate the battery voltage to be equal to the first reference voltage. |
| US09608513B2 |
Methods and systems for improving load transient response in LLC converters
Methods and systems for improving load transient response in LLC converters are provided herein. The method includes coupling a current sensing circuit to an output of the LLC converter, sensing load current of the LLC converter, and increasing a setpoint voltage for a power factor correction (PFC) circuit output based on the sensed load current. |
| US09608511B2 |
Method for charging modular multilevel converter
A method for charging a modular multilevel converter includes: firstly, electrifying DC side of a converter; after voltages of submodules are stabilized, deblocking the converter, turning on all the submodules, then reducing the number of turned on submodules in phase unit; when over-current occurs on a bridge arm, temporarily increasing the number of turned on submodules to suppress the over-current; after the voltages of the sub-modules are stabilized, continuously reducing the number of the turned on submodules until the number of the turned on submodules in the phase unit is finally equal to the number of working submodules of the bridge arm, so as to smoothly transit to a normal operation state. The DC side is charged, such that the voltages of the submodules reach a working voltage before the converter normally operates, and an impacting current is avoided in the charging process by using a proper control strategy. |
| US09608505B2 |
Linear power generator
A linear power generator includes a columnar or cylindrical center yoke made of a soft magnetic material and an outer yoke made of a soft magnetic material. In the center yoke, rod-shaped permanent magnets magnetized in a circumferential direction are arranged in the circumferential direction in an outer circumference of the center yoke such that opposed magnetic poles of the permanent magnets adjacent to each other become identical, the permanent magnets are extended in an axial direction, and the center yoke includes plural center-side projecting portions linearly arranged in the circumferential direction. The cylindrical or columnar outer yoke includes plural winding portions, plural groove portions, and an outer-side projecting portion. The winding portions are arranged in the circumferential direction about a center axis. The groove portions are arranged at positions opposed to the permanent magnets. |
| US09608501B2 |
Rotary electric machine
A rotary electric machine is a rotary electric machine including a stator of a distributed winding type including a plurality of first slots, in each of which winding wires of a plurality of same phases or a winding wire of one phase are arranged, and a plurality of second slots, in each of which winding wires of a plurality of different phases are arranged. The total number of turns in each of the first slots is same as one another. The total number of turns in each of the second slots is same as one another. The total number of turns in the first slot and the total number of turns in the second slot are different from each other. |
| US09608497B2 |
Windscreen wiper motor
The invention relates to a windscreen wiper motor (10), having a housing (12) for accommodating a gearing arrangement which comprises a gear wheel (20) rotatably mounted in a shaft (13), which gear wheel has, on its outer circumference, a toothing (21) which interacts with a counterpart toothing (19) on a drive shaft (15), wherein the shaft (13) is received in a mount (22; 22a to 22c), which is constructed as a bore, of the housing (12) in an eccentric bush (25; 25a to 25c) for setting the distance (a) between the shaft (13) and the drive shaft (15), and wherein a press fit is formed at least in regions between the mount (22; 22a to 22c) and the eccentric bush (25; 25a to 25c). |
| US09608496B2 |
Reaction force compensation device
Provided is a reaction force compensation device capable of compensating for a reaction force caused by a motor that is continuously rotating. The reaction force compensation device is configured to compensate for a reaction force generated when a motor including a stator and a rotor, which is combined with the stator to be rotatable, is driven, and includes a housing disposed below the motor, and a rotation support member disposed between the housing and the rotor and configured to support the stator to be rotatable with respect to the housing. The stator rotates by a reaction force generated when the rotor rotates. |
| US09608495B2 |
Integrated ebike motor and battery assembly
One variation may include a product comprising: an integrated electric bicycle motor comprising: an inrunner ring motor, a rotor mount coupled to the inside of the inrunner ring motor, and at least one battery assembly coupled to the rotor mount. |
| US09608493B2 |
Rotary electric machine and method of manufacturing the same
In a rotary electric machine including a stator and a rotor, the stator includes: a connected core (1) composed of a plurality of cores in which a first core (1b) and a second core (1c) are paired to connect in a belt shape to be rounded into a substantially cylindrical shape by being folded at a core connecting portion (1d) so as to surround the rotor; a plurality of coils in which a first coil (3f) and a second coil (3g) are paired; and a crossover wire (3c) which connects the winding end (3b) of the first coil (3f) to the winding start (3d) of the second coil (3g). The crossover wire (3c) are arranged on the inner diameter side than the core connecting portion (1d). |
| US09608489B2 |
Rotating electrical machine armature
Provided are an armature for rotary electric machine, an insulator therefor, and a coil winding device for winding a conductive wire on a tooth to which the insulator has been attached, wherein in each of all forward-wound coils and reversely-wound coils, a part wound on a first side surface of two side surfaces of each tooth that are opposed to the respective adjacent teeth forms a straight portion in which conductive wires in respective layers of the coil are parallel, a part wound on a second side surface forms a cross portion in which the conductive wire in an upper layer is wound in a crossed manner on the conductive wire in an adjacent lower layer, and an insulator has a guide for guiding the conductive wire along a base of an inner flange of the insulator at a first turn of each coil. |
| US09608486B2 |
Rotating electrical device
A rotating electrical device comprising a circuit section being disposed offset from a motor section to one side or another side, in a direction orthogonal to an axial direction of the motor section as viewed in the axial direction of the motor section; a stator configuring the motor section together with a rotor, the stator comprising a plurality of teeth formed in a radial shape and a plurality of windings that each includes a terminal-end portion that extends in the axial direction of the motor section, the plurality of windings being respectively wound on any of the plurality of teeth such that each of the terminal-end portions is disposed further to a side in the orthogonal direction from a central axis of the motor section where the circuit section is disposed; and a plurality of terminals that wire-in the circuit section and the terminal-end portions of the plurality of windings. |
| US09608484B2 |
Motor and rotor of a motor having a plurality of magnet groups
A motor includes a first rotor and a second rotor which are disposed at opposite sides of a stator, and each of the first rotor and the second rotor includes a plurality of modules, each including a pair of permanent magnets and a connection unit which connects ends of the permanent magnets. |
| US09608482B2 |
Motor stator manufacturing method and structure thereof
A motor stator manufacturing method includes: prefabricating separate detachable coil sets and coil wire ends thereof; arranging connection points on a printed circuit board on which to assemble or reassemble the separate detachable coil sets; selectively connecting or reconnecting the coil wire ends with the connection points of the printed circuit board to form or change into a predetermined design of various motor stator types; and mounting the separate detachable coil sets in a stator seat to form or change into the AC motor stator type. In another embodiment, the method includes: prefabricating the separate detachable coil sets and coil wire ends thereof; mounting the separate detachable coil sets in the stator seat; arranging the connection points on the printed circuit board and assembling or reassembling the printed circuit board with the separate detachable coil sets; and selectively connecting or reconnecting the coil wire ends with the connection points of the printed circuit board to form or change into the predetermined design of various motor stator types. |
| US09608480B2 |
Systems and methods for detecting and identifying a wireless power device
Embodiments are directed to detecting and identifying a type of a wireless power device in a wireless power transfer field. According to one aspect, a method for identifying a type of an object within a power transfer region of a wireless power transmitter configured to transfer power to a device including a wireless power receiver is provided. The method includes monitoring a change in a power drawn by the wireless power transmitter. The method further includes receiving, from the wireless power receiver, a signal indicative of a change in power received by the wireless power receiver. The method further includes identifying the type of the object based on the monitored change in the power drawn and the received signal. |
| US09608479B2 |
Apparatus and method for switch state detection and controlling electrical power
A device includes a connection receiving power from a power source under normal conditions and circuitry configured to determine, based on an input from the connection, when the power from the power source is absent; output, when the power source is absent, a test signal at the connection; and generate a detection signal based on current flow generated following the output of the test signal, wherein the detection signal indicates a position of a switch connecting the circuitry to the connection and the generated detection signal indicates the switch is closed when the current flow is above a threshold. The circuitry is configured such that when the power from the power source is absent, the switch is closed, and plural devices are connected on the supply side of the switch, the plurality of devices on the supply side appear as a substantially open circuit to the test signal. |
| US09608475B1 |
Wireless charger for an electronic device
A wireless charger includes a base having a base opening and an interior cavity defined by upper and lower shells and an inner sidewall extending between the upper and lower shells to define the base opening. An aperture is formed through the inner sidewall between the interior cavity and the base opening and a hinge is connected to the base within the interior cavity and extends through the aperture. The charger further includes a wireless charging assembly pivotably attached to the base by the hinge and moveable between a down position in which the wireless charging assembly is disposed within the base opening and an up position in which the wireless charging assembly extends outside the base. The charging assembly is configured to wirelessly transmit power across the charging surface to a power receiving unit of a portable electronic device. |
| US09608474B2 |
Device and method for the inductive transmission of electrical energy
A device for the inductive transmission of electrical energy, having at least one induction coil which is connected, or connectible, to a consumer and/or to a rechargeable battery, and having a communications device, which encompasses at least one control unit and is configured to modulate the load of the induction coil. It is provided that the communications device has a DC converter, whose output is connected or connectible to the consumer/the battery, and whose input is connected to the induction coil, the control unit controlling the DC converter for a load modulation. |
| US09608471B2 |
Method and apparatus for controlling wireless power transmission
A method and an apparatus for controlling wireless power transmission are provided. An apparatus for controlling wireless power transmission includes a controller configured to determine an output voltage of a power factor correction unit based on charging information of a battery, the power factor correction unit configured to correct an input voltage into the determined output voltage, and output a variable voltage, and a resonance unit configured to transmit power converted from the variable voltage to a wireless power reception apparatus. |
| US09608466B2 |
Charging control method and charging assembly
A charging assembly and a charging control method are provided for charging a battery pack according to an actual voltage of a battery in a battery pack. The charging assembly includes a battery pack having a battery with a rated charging current, a charger having a charging module for outputting an output voltage and an output current, and a charging circuit between the charging module and the battery. A method of operation includes: detecting the output current and the output voltage; calculating an actual voltage value on the battery; and determining whether to decrease or keep the output current or increase the output current of the charging module. |
| US09608465B2 |
Devices, systems, and method for power control of dynamic electric vehicle charging systems
Systems, methods, and apparatus are disclosed for wirelessly charging an electric vehicle. In one aspect, a method of wirelessly charging an electric vehicle is provided. The method includes, obtaining a request from the electric vehicle for a level of charging power to be delivered from a power transmitter to the electric vehicle via a charging field. The method further includes controlling a current or voltage of the power transmitter based on a power efficiency factor and the requested level of charging power. |
| US09608463B2 |
Electronic device
Degradation of a battery is prevented or the degree of the degradation is reduced, and charge and discharge performance of the battery is maximized and maintained for a long time. A reaction product, which is formed on an electrode surface and causes various malfunctions and degradation of a battery such as a lithium-ion secondary battery, is dissolved by application of electrical stimulus, specifically, by applying a signal to supply a current reverse to a current with which the reaction product is formed (reverse pulse current). |
| US09608455B2 |
Wireless power for portable articles
A wireless electrical power system provides access to high voltage and/or low voltage electrical power at portable articles that are positionable at different locations within a work area, and substantially without the use of exposed cabling. The power system includes a portable article that is positionable at two or more locations within a work area. The work area is defined by a plurality of surfaces, at least one of which incorporates a wireless electrical power transmitter. The portable article incorporates a wireless electrical power receiver that is configured to receive electrical power from the wireless power transmitter when the wireless power receiver is sufficiently close to the wireless power transmitter. The portable article further includes an electrical power outlet that provides users in the work area with access to the electrical power. |
| US09608449B2 |
Power system and control method of the power system
Provided is a power system that can arbitrarily set output power while stabilizing output voltages. Connection terminals 13 and 23 of lower power sources 1 and 2 are connected to external connection terminals 41 in parallel. Voltage measurement section 31 measures voltage values of external connection terminals 41 as measured voltage values. Power converters 12 and 22 measure power supply capacities of lower power sources 1 and 2, respectively. Output instruction section 32 adjusts power or currents flowing through connection terminals 13 and 23 based on the measured voltage values and the power supply capacities so that the measured voltage values are included in a predetermined voltage range. |
| US09608447B2 |
Solar photovoltaic three-phase micro-inverter and a solar photovoltaic generation system
The invention provides a solar photovoltaic three-phase micro-inverter, comprising DC terminals, connected with three DC photovoltaic assemblies for receiving DC; three single-phase inverter circuits, having DC input terminals connected with the DC photovoltaic assemblies via the terminals, for converting the DC to AC; AC terminals, connected with the AC output terminals of the inverter circuits and a three-phase AC power grid, for outputting the AC generated by the inverter circuits; wherein DC input terminals of each inverter circuit are connected in parallel with each other, and AC output terminals are connected with one phase of the three-phase AC power grid and a neutral wire via the AC terminals. The invention further provides a solar photovoltaic generation system. The invention connects DC sides of three single-phase inverter circuits in parallel, which can simply eliminate ripple power at DC side input terminals in a three-phase micro-inverter. |
| US09608444B2 |
Effectuating energization and reactivation of particular circuits through rules-based smart nodes
Systems for reducing power usage and/or wastage use sensors to gather information about a circuit and its usage. Triggers are identified based on the information from the sensors, and subsequently used to control power delivery by reversibly effectuating energization and deactivation of particular circuits through smart nodes. |
| US09608440B2 |
Methods and apparatus for determining power distribution system topology using disturbance detection
A disturbance, for example, a frequency variation, is generated in at least a portion of the power distribution network. The disturbance may be generated, for example, by an uninterruptible power supply (UPS) or some other component of the power distribution network, such as a switch. At least one node of the network experiencing the disturbance is identified and a topology of the power distribution network is determined responsive to identifying the at least one node. The at least one node may be identified by detecting a voltage-related artifact corresponding to the disturbance. A phase-locked loop (PLL)—based circuit may be used for fast artifact detection. Groups of devices in the network may be identified from the artifacts, and combinatorial optimization techniques may be used to determine connectivity within such groups. |
| US09608438B2 |
Inverter system for photovoltaic power generation
Provided is an inverter system capable of more economically and efficiently performing photovoltaic power generation by automatically switching an integrated operation and an independent operation of inverters according to voltage values and current values of photovoltaic panels without a separate communication function. The inverter system for photovoltaic power generation according to an exemplary embodiment of the present disclosure is an inverter system which changes direct current power output from a first photovoltaic panel and a second photovoltaic panel to alternating current power and includes: a first inverter and a second inverter, in which all of the outputs of the first and second photovoltaic panels are applied to the first inverter, or the output of the first photovoltaic panel is applied to the first inverter, and the output of the second photovoltaic panel is applied to the second inverter according to output values of the first and second photovoltaic panels. |
| US09608435B2 |
Electronic device and motherboard
An electronic device includes a motherboard and a display. The motherboard includes a south bridge chip, a leak-proof circuit, and a connector. The leak-proof circuit includes a control unit and a first signal transmission unit. The control unit is electrically coupled to a power supply. The first signal transmission unit includes a first electronic switch, a second electronic switch and a first resistor. The second electronic switch is electrically coupled to ground through the first resistor. When the motherboard is turned off and the display is turned on, the power supply does not provide power to the control unit, and the control unit outputs a first control signal to the first and the second electronic switches. The first and the second electronic switches are in pinch-off mode. Signals from the display flow into ground through the second electronic switch and the first resistor. |
| US09608432B2 |
Electric leakage determination circuit for electric leakage circuit breaker
An electric leakage determination circuit for an electric leakage circuit breaker according to the invention comprises a zero current transformer on an alternating-current circuit to provide an electric leakage detection signal upon occurrence of electric leakage, a filter circuit unit connected to an output terminal of the zero current transformer to remove noise, and an electric leakage determination circuit unit comparing a voltage value of the electric leakage detection signal with a first reference voltage value, to be charged with electric charges when the voltage value is not smaller than the first reference voltage value and discharge electric charges when being smaller than the first reference voltage value, and comparing a charged voltage value with a second reference voltage value to determine occurrence of electric leakage when the charged voltage value is not smaller than the second reference voltage value. |
| US09608429B2 |
Logging ESD events
An electrostatic discharge (ESD) logging system includes ESD detection circuitry having at least one input electrically connected coupled to a node of an ESD protection circuit. The ESD detection circuitry provides a detector signal in response to detecting an ESD event at the node of the ESD protection circuit. Capture circuitry is electrically connected to an output of the ESD detection circuitry. The capture circuitry asserts a capture signal to indicate the occurrence of the ESD event in response to the detector signal. A logic circuit provides a logic output in response to the capture signal. |
| US09608427B2 |
Systems and methods for forming a conductive wire assembly
A shuttle assembly is configured to connect an insulated wire to a contact terminal. The shuttle assembly may include a connecting insert defining an exposed wire-crimping chamber. The connecting insert is configured to receive an exposed end of a conductive wire, and is configured to be crimped to the exposed end of the conductive wire. A seal member is connected to the connecting insert, and is configured to be crimped to an insulating cover of the insulated wire. |
| US09608424B2 |
Wildlife protective cover having a conductor/insulator guard and system for power distribution and transmission systems and related methods
A conductor cover apparatus for use with an overhead electrical transmission and distribution system and related methods is provided. The conductor cover apparatus has a center cover member. At least one arm connector is formed on the center cover member, the at least one arm connector having an opening and a first hole positioned between a first external side and a second external side of the at least one arm connector. An extension arm is positioned at least partially interior of the first and second external sides of the at least one arm connector. At least one pin is removably connecting the extension arm to the at least one arm connector, wherein the at least one pin is positioned through the first hole of the at least one arm connector and a first arm hole within the extension arm. |
| US09608421B2 |
Weatherproof outdoor electrical box
The present invention is directed to a weatherproof electrical box for protecting an electrical connection from the elements. The electrical box includes a housing comprising four side walls and a base forming an interior space, a pivotal cover that latches onto the housing, a circumferential flange extending outwardly from the upper end of the housing, and an outer flange. The outer flange can be releasably attached to corrugations on the housing. |
| US09608420B1 |
Flush mounting utility component assembly
A utility component mounting assembly configured to be assembled and installed during building construction or remodeling and to provide access to a variety of residential, commercial, and/or industrial utilities in a manner that is unobtrusive and aesthetically appealing. In some aspects, the utility component mounting assembly is assembled and installed such that there is little or no outward protrusion of any portion of the assembly from a generally planar wall surface. The assembly provides the ability to apply the same final finishing materials to exposed portions of the assembly as to adjacent wall material. The assembly can be readily installed with existing building constructions materials, tools, and skills. The assembly can be mounted in flexible locations on a wall and in a vertical or horizontal orientation. |
| US09608419B2 |
Masonry box positioning support
An electrical box support is provided for coupling to the side wall of an electrical box to support the electrical box in an opening formed in a hollow core building block. The support has a flange at the front edge and tab at a front edge that clips onto the side wall of the electrical box. A spring member extends from a rear side edge and curls toward the front edge. The spring member has an end that is directed toward the front edge and spaced from the flange a distance to contact the inner surface of the block while the flange contacts the outer surface of the block. The tab at the front edge of the support has a hook for engaging an inner edge of the electrical box to couple the support to the electrical box and to prevent sliding of the support on the electrical box. |
| US09608415B2 |
Electrical cabinet with vented exhaust
A vented exhaust system for an electrical cabinet housing high voltage equipment. Very short-time explosions can occur within the electrical cabinet that are the result of a short circuit of the equipment housed within. The vented exhaust system provides for a way to safely release the pressure and hot gasses that can result from the short circuit so that the cabinet does not explode. |
| US09608409B2 |
Laser component assembly and method of producing a laser component
A laser component assembly includes a carrier including first and second component portions wherein each component portion has a chip mounting surface, a lens mounting surface and a stop surface, the stop surface of each component portion includes first and second stop partial surfaces, the first stop partial surface is formed on a first stop element and the second stop partial surface is formed on a second stop element, the chip mounting surface is arranged between the first stop element and the second stop element, the stop surface is oriented perpendicularly to the chip mounting surface, a laser chip arranged on the chip mounting surface, the laser component assembly as a lens bar comprising an optical lens component portion and the lens bar is arranged on the lens mounting surfaces of the component portions and bears against the stop surfaces of the component portions. |
| US09608406B1 |
Wavelength control of a dual-ring laser
An optical source includes a semiconductor optical amplifier that provides an optical signal, and a photonic chip with first and second ring resonators that operate as Vernier rings. When the optical source is operated below a lasing threshold, one or more thermal-tuning mechanisms, which may be thermally coupled to the first ring resonator and/or the second ring resonator, may be adjusted to align resonances of the first ring resonator and the second ring resonator based on measured optical power on a shared optical waveguide that is optically coupled to the first and second ring resonators. Then, when the optical source is operated above the lasing threshold, a common thermal-tuning mechanism may be adjusted to lock the aligned resonances with an optical cavity mode of the optical source based on a measured optical power on an optical waveguide that is optically coupled to the first ring resonator. |
| US09608404B2 |
Constant current control power supply and laser oscillator
A constant current control power supply of an embodiment of the present invention includes a switching regulator that includes a switching circuit having a switching device and a rectifier device, a smoothing circuit having reactors and capacitors, a current detection circuit, and a control circuit, for outputting a constant current in accordance with a command value from a controller. When ON indicates a case where the command value commands an output of a higher current than a predetermined value and OFF indicates a case where the command value commands an output of a lower current than the predetermined value, on condition that a pulse operation alternating between the ON and the OFF is inputted, the control circuit amplifies a variation in the command value by a predetermined amplification factor and adds the amplified variation to the command value, and attenuates the added variation with a predetermined time constant. |
| US09608403B2 |
Dual bond pad structure for photonics
A dual bond pad structure for a wafer with laser die attachment and methods of manufacture are disclosed. The method includes forming a bonding layer on a surface of a substrate. The method further includes forming solder bumps on the bonding layer. The method further includes patterning the bonding layer to form bonding pads some of which comprise the solder bumps thereon. The method further includes attaching a laser diode to selected bonding pads using solder connections formed on the laser diode. The method further includes attaching an interposer substrate to the solder bumps formed on the bonding pads. |
| US09608402B2 |
Packaging structure and method of packaging tunable laser device, and tunable laser device
The present disclosure provides a packaging structure and a method of packaging an tunable laser device, and an tunable laser device. The packaging structure of the tunable laser device may include a TO tube base and a TO tube cap, wherein a first thermal sink is disposed on the TO tube base, a semiconductor laser chip is disposed on a vertical side of the first thermal sink, an aspheric lens is disposed on the TO tube cap, and the semiconductor laser chip is disposed on a central axis of the aspheric lens; and wherein the vertical side of the first thermal sink is a side of the first thermal sink perpendicular to the TO tube base. The tunable laser device according to the present disclosure may be applicable to communication over an optical fiber. |
| US09608396B2 |
Maser assembly
A maser assembly includes a pump light source; a maser material including molecules that are excited through the absorption of light (1) from the pump light source, and which subsequently transfer via intersystem crossing (9) into the sublevels of their triplet ground states, so causing a population inversion between two sublevels (16,18); an electromagnetic structure in which the masing material is disposed, and which supports a microwave mode that is both resonant in frequency with and magnetically coupled to the transition between these two sublevels; and where energy is supplied to the microwave mode through stimulated emission (25) across the transition at such a rate as to exceed the mode's electromagnetic losses, the microwave mode being a maser mode. The assembly includes provisions for effecting substantially continuous maser activity during operation of the assembly. The laser crystal may be a (perdeuterated) pentacene in p-terphenyl which is held at room temperature without an additional magnetic field and the dye molecules in the single crystal may be pumped by blue LED with a frequency conversion to the yellow and green with the help of a Ce:YAG fluorescent pump light concentrator. |
| US09608391B2 |
Flippable electrical connector
A receptacle includes an insulating housing including a base and a mating tongue, upper contacts and lower contacts, a metallic shell and a shielding plate. The contacts include plate contacting sections exposed upon the mating tongue. The shielding plate is disposed in the mating tongue and the base and isolated from the upper and lower contacts. The metallic shell is retained on the base and surrounding the mating tongue to define a mating port which is inserted with a plug connector in either of two insertion orientations. The front sides of the shielding plate is exposed to the front side of the mating tongue and the lateral sides of the shielding plates is exposed to the corresponding lateral sides of the mating tongue for protection under an improper angular mating of the plug connector. |
| US09608387B2 |
Shield connector arrangement
A shield connector 1 having a housing 4 with an insertion hole 14 for accommodating a shielded cable 7, wherein that at least one locking element 5 for tool-less fastening the shield connector 1 to a counterpart device 3 is provided on the housing 4. |
| US09608385B2 |
Connection structure of electronic component and terminal metal fittings
A connection structure of an electronic component and terminal metal fittings includes a relay in which a plurality of terminals are projected from a relay body having a rectangular parallelepiped shape, terminal metal fittings that are fitted in the respective terminals, and a holding member in which the relay and the terminal metal fittings are accommodated. The holding member has a component body accommodating portion that accommodates the relay body, terminal accommodating portions each accommodating the distal end portion of corresponding one of the terminals and corresponding one of the terminal metal fittings, a groove portion that positions an erroneous-insertion prevention projecting portion therein when the relay is inserted in a normal orientation, and a contact portion that is brought into contact with the erroneous-insertion prevention projecting portion when the relay is inserted in an erroneous orientation. |
| US09608381B2 |
Receptacle connector and receptacle connector assembly
A receptacle connector assembly includes a plurality of receptacle connectors stacked up and down and fastened together. The receptacle connector includes a first terminal module, two second terminal modules, two middle shielding plates, two docking modules, and a shielding shell surrounding the first terminal module, the second terminal modules, the middle shielding plates and the docking modules. The first terminal module includes a first base block which has a first fastening portion. Two side surfaces of the first fastening portion protrude upward and outward to form two flanks. Each of the second terminal modules has a second base block. Each of the middle shielding plates is mounted between one of the flanks and the corresponding second base block. The two docking modules are mounted to the first terminal module, the two middle shielding plates and the two second terminal modules. |
| US09608380B2 |
Electrical connector having a ground shield
A contact module is provided for an electrical connector. The contact module includes a carrier and a leadframe held by the carrier. The leadframe includes signal contacts that extend outward from the carrier for mating with corresponding mating signal contacts. A ground shield is mounted to the carrier. The ground shield includes a body configured to extend over at least a portion of the leadframe. The ground shield includes ground contacts configured to mate with corresponding mating ground shields. The ground contacts include groups of spring beams. Each group of spring beams includes at least first and second spring beams that extend from the body of the ground shield in respective different directions. |
| US09608378B2 |
Multistage capacitive crosstalk compensation arrangement
Methods and systems for providing crosstalk compensation in a jack are disclosed. According to one method, the crosstalk compensation is adapted to compensate for undesired crosstalk generated at a capacitive coupling located at a plug inserted within the jack. The method includes positioning a first capacitive coupling a first time delay away from the capacitive coupling of the plug, the first capacitive coupling having a greater magnitude and an opposite polarity as compared to the capacitive coupling of the plug. The method also includes positioning a second capacitive coupling at a second time delay from the first capacitive coupling, the second time delay corresponding to an average time delay that optimizes near end crosstalk. The second capacitive coupling has generally the same overall magnitude but an opposite polarity as compared to the first capacitive coupling, and includes two capacitive elements spaced at different time delays from the first capacitive coupling. |
| US09608373B2 |
Connector assembly and connector product
A connector assembly comprising: a first connector having a housing on which an elastic locking piece is suspended; a second connector having a housing on which a locking member mating with the elastic locking piece is formed so as to lock the first and second connectors together when the first and second connectors are mated together; and a connector position assurance device having a first stopper and a second stopper behind the first stopper. A first mating stopper is formed on the elastic locking piece, and a second mating stopper is formed on the housing of the first connector. The connector position assurance device only can be inserted into a first position under the elastic locking piece of the first connector when the first and second connectors are separate from each other. At the first position, the first stopper of the connector position assurance device is abutted against the first mating stopper of the first connector to prevent the connector position assurance device from being further pushed forward, and at the first position, the second stopper of the connector position assurance device is abutted against the second mating stopper of the first connector to prevent the connector position assurance device from being pulled out backward. |
| US09608372B2 |
Electrical card connector assembly having separate contact modules
An electrical card connector assembly includes an electrical card connector and a printed circuit board. The electrical card connector includes: a first contact module and a second contact module assembled to the printed circuit board along a transverse direction perpendicular to a card-inserting direction; a shielding shell enclosing the contact modules to form a receiving room; a tray movably received in the receiving room along the insertion direction and having a first receiving groove receiving a first card corresponding to the first contact module and a second receiving groove receiving a second card corresponding to the second contact module; an ejector comprising a lever located at a lateral side of the first contact module and a cam located at a rear of the first contact module; and a detecting terminal positioned at a rear of the second contact module beside the cam along the transverse direction. |
| US09608367B2 |
Apparatus providing one or more socket contacts for contacting an inserted flexible, planar connector; a method
An apparatus including a housing: including an upper surface and a socket cavity, the socket cavity extending underneath the upper surface, from an opening at the upper surface, to provide one or more socket contacts; and at least one retainer, within the socket cavity, configured to be automatically actuated to retain a flexible planar connector including connector contacts, for contacting the socket contacts underneath the upper surface, inserted along the socket cavity. |
| US09608362B2 |
Mat seal for an electric connector and molding tool for injection molding of a mat seal
A mat seal for an electrical connector, including: a front face, a rear face opposite to the front face, and a plurality of passageways each adapted to receive a cable to be inserted through the passageway, at least one cavity in at least one of the front face and the rear face, wherein at least two first passageways of the plurality of passageways open into one of the at least one cavity, and wherein at least one second passageway of the plurality of passageways opening into the front face and the rear face of the mat seal. |
| US09608357B1 |
Right angle connector with terminal contact protection
A connector assembly, such as a high voltage electrical connector assembly, includes a first connector having a first housing and an intermediate housing attached to the first housing. The intermediate housing is moveable from a first position to a second position. A flexible retaining arm is configured to hold the intermediate housing in the first position. The connector assembly further includes a second connector having a second housing. The second housing defines a release wedge that engages and flexes the retaining arm, thereby releasing the intermediate housing from engagement with the retaining arm and allowing the intermediate housing to move from the first position to the second position as the first connector is connected to the second connector. A terminal in the first housing is enclosed within the intermediate housing in the first position, and protrudes from an aperture in a surface of the intermediate housing in the second position. |
| US09608355B2 |
Connector having a retainer with outer surface flush with outer surface of the connector housing
A connector includes a terminal, a housing body haying a terminal housing chamber inside which the terminal is housed, an opening portion formed at an outer peripheral surface of the housing body, a retainer having a locking protrusion that protrudes into the terminal housing chamber to lock the terminal housed in the terminal housing chamber when the retainer is fitted to the opening portion, and a hinge that connects the retainer to the housing body so as to allow the retainer to turn between an open position at which the opening portion is opened and a closed position at which the retainer is fitted to the opening portion to close the opening portion. When the retainer is in the closed position, an outer surface of the retainer is flush with the outer peripheral surface of the housing body. |
| US09608353B1 |
Conductive terminal and electrical connector assembly
A conductive terminal is provided which includes a base unit, two elastic contact pieces, a tail unit and two contact plates. The base unit includes a bottom plate extending along a front-rear direction and two side plates integrally extending upwardly from a left and right sides of the bottom plate respectively. The two elastic contact pieces are arranged side by side, each elastic contact piece comprises a connecting portion bent upwardly from a front end of the bottom plate, an arm portion extending rearwardly from the connecting portion, positioned above the bottom plate and spaced apart from the bottom plate, and a first contact portion positioned at a rear end of the arm portion. The tail unit is connected to a rear end of the bottom plate. The two contact plates are respectively bent from two upper edges of two front ends of the two side plates toward each other. |
| US09608352B2 |
Interface for multiple connectors
A device which allows connection of external objects is disclosed. The device comprises: an array of contact pads, each contact pad operable in an active state and an idle state; a space for one or more objects that can be inserted into the device to make contact with at least part of the contact pads when inserted; and a control element electrically connected to the contact pads. The contact pads in the active state are reconfigurable by the control element based on the contact made with at least part of the contact pads by one or more objects inserted into the device. A method and system are also presented. |
| US09608339B2 |
Crimped terminal attached aluminum electric wire
A sheath (4) of an aluminum electric wire (1) is peeled, a distal end of an exposed conductor part (2) is tightened and connected after being placed in a conductor crimping part (13) of a crimped terminal (10) while being recessed to be further inside than the distal end of the conductor crimping part (13), and the distal end section of the conductor crimping part (13) of the crimped terminal (10) which forms an empty space where there is not the conductor part is welded and sealed. |
| US09608338B2 |
Cylindrical body, crimp terminal, and manufacturing method thereof, as well as manufacturing apparatus of crimp terminal
Following the cylindrical bend processing of the shape crimping portion corresponding part corresponding to the crimping section in the sheet-shaped terminal base material, the high bending-rate processing process of bend processing at a bending rate higher than a bending rate for plastically deforming at least a part of a deformation portion to be plastically deformed in a predetermined bend processing shape in the crimping portion corresponding part, and the shaping process of shaping the crimping portion corresponding part into the cylindrical crimping section are performed in this order. |
| US09608335B2 |
Continuous phase delay antenna
Antennas and other transducers for use in transmitting and receiving twisted waves are disclosed. A reflector includes numerous parabolic segments having focal lengths that decrease monotonically with azimuth angle. A feed is used that is located at a focal length associated with one of the segments. Thus, each segment has a phase delay that is related to a difference between the primary focal length and the focal length of the segment. This variation of phase delay with azimuth allows twisted waves to be transmitted and received. |
| US09608329B2 |
Space saving multiband antenna
There is disclosed a multiband antenna device comprising a conductive elongated antenna element configured for electrical connection to a conductive groundplane at a grounding point, and for electrical connection to a radio transmitter/receiver at a feeding point. The antenna element comprises a first portion and a second portion. The first portion is configured to extend in a first direction along a first outside edge of the groundplane, and then in a second direction along a second outside edge of the groundplane. The second portion of the antenna element is configured to double back next to the first portion in a third, substantially counter-parallel direction back along the second outside edge of the groundplane, and then in a fourth direction along the first outside edge of the groundplane. The second portion of the antenna element terminates with a high impedance portion, and the high impedance portion of the antenna element is positioned between the first edge of the ground plane and the first portion of the antenna element so as to form a narrow gap that electromagnetically couples the first and second portions of the antenna element. |
| US09608317B2 |
System, method and apparatus including hybrid spiral antenna
A spiral antenna device includes a plurality of generally polygonal loops. The polygonal loops have respective side counts that decrease progressively as a function of the loop's radial distance from a center of the antenna device. The side count may vary between loops as a multiple of a power of two. |
| US09608312B2 |
Wideband antenna for mobile system with metal back cover
A device is set forth, comprising: a metallic back cover having interior and exterior portions; a chassis disposed on the interior portion of said metallic back cover for mounting components; a metallic edge ring surrounding said metallic back cover and said chassis; a gap extending through the exterior portion of the back cover and through the edge, for defining one dimension of an antenna conducting plane; a ground plane covering the chassis such that said antenna conducting plane and ground plane wrap around the chassis and components mounted thereon; an antenna feed extending through the ground plane to the antenna conducting plane; and a shorting pin connecting the ground plane to the antenna conducting plane. |
| US09608311B2 |
Antenna and terminal device
An antenna and a terminal device include a Printed Circuit Board (PCB), a first main antenna, a second main antenna and a connection component. The first main antenna is printed on the PCB, and the second main antenna is configured outside the PCB and electrically connected to the first main antenna through the connection component. By connecting the antenna printed on the PCB with the antenna configured outside the PCB, the limitation that wiring space is not enough in the existing antenna design is made up, and the utilization of the limited space can be significantly improved when the wiring of the antenna is designed. |
| US09608307B2 |
Semiconductor substrate-based system for an RFID device, RFID device, and method for manufacturing such a semiconductor substrate-based system
A semiconductor substrate-based system for an RFID device, in particular an RFID transponder, having a semiconductor substrate and an electronic circuit system which is structured on the semiconductor substrate is provided. The semiconductor substrate-based system also has a thin-layer battery, likewise structured on the semiconductor substrate, for supplying power to the RFID device. Moreover, an RFID device having a corresponding semiconductor substrate-based system, and a method for manufacturing a corresponding semiconductor substrate-based system are provided. |
| US09608304B2 |
High-frequency signal transmission line, electronic device and manufacturing method of high-frequency signal transmission line
A high-frequency signal transmission line includes a dielectric body including dielectric layers stacked together, a linear signal line provided in the dielectric body, a first ground conductor provided at the dielectric body, at a first side of the signal line in a stacking direction so as to face the signal line, and a subsidiary member provided at the dielectric body, at a second side of the signal line in the stacking direction so as to face a central portion of the signal line in a line-width direction. In a sectional view along a plane perpendicular or substantially perpendicular to an extending direction of the signal line, the signal line is curved such that side portions of the signal line in the line-width direction are farther away from the first ground conductor than a central portion of the signal line in the line-width direction. |
| US09608303B2 |
Multi-layer digital elliptic filter and method
The present invention relates generally to digital elliptic filters, and more particularly, but not exclusively to multi-layer digital elliptic filters and methods for their fabrication. |
| US09608302B2 |
Air battery
An air battery includes a cathode layer and an anode layer sandwiching an electrolyte layer, and an electrically insulative outer case. The cathode layer has a cathode member, a cathode current collector and a liquid tight/gas permeable member. The cathode layer is provided with a contact member between the outer case and the cathode layer, in which the inner end thereof is in contact with the periphery of the cathode current collector, and the outer end thereof is exposed on a cathode-side surface. The outer end of the contact member protrudes outward with respect to a surface of the liquid tight/gas permeable member to an extent reaching at least a plane including an end face of the outer case. Therefore, this air battery can be directly connected to another battery in series, and is suitable for an on-vehicle power source. |
| US09608298B2 |
Battery pack
A battery pack is disclosed. In one aspect, the battery pack includes a battery cell, a temperature sensor configured to measure the temperature of the battery cell, and an inner cover substantially covering the battery cell. The inner cover includes a sensor attachment fixing the temperature sensor to the battery cell. The battery pack has a structure for easily attaching the temperature sensor to the battery cell. |
| US09608294B2 |
Electrode assembly having step portion in stabilized stacking and method of manufacturing the same
An electrode assembly and a method of manufacturing the same are provided. The electrode assembly includes a first electrode laminate formed by stacking one or more electrode units having a first area, and a second electrode laminate formed by stacking one or more electrode units having a second area different from the first area. The first electrode laminate and the second electrode laminate are stacked on each other in a direction perpendicular to a plane and have a step portion formed by a difference in areas of the first and second electrode laminates, the step portion is present on at least one side of four sides of the electrode assembly, at least one step portion includes at least a portion of tape taped across a stacked side, and the portion of tape has a form corresponding to a stepped shape of the step portion. |
| US09608291B2 |
Non-aqueous liquid electrolyte and non-aqueous liquid electrolyte secondary battery
A non-aqueous liquid electrolyte secondary battery using negative-electrode active material having Si, Sn and/or Pb, with high charge-capacity, superior characteristics including discharge-capacity retention rate over long is provided. The non-aqueous liquid electrolyte of the battery contains carbonate having unsaturated bond and/or halogen and compounds such as LiPF6 and/or LiBF4 (first lithium salt) and lithium salt different from the first lithium salt. |
| US09608289B2 |
Electrolytic solution, secondary battery, battery pack, electric vehicle, electric power storage system, electric power tool, and electronic apparatus
A secondary battery includes: a cathode; an anode; and an electrolytic solution including a cyano compound, the cyano compound including a compound represented by R1-O—C(═O)—O—R2 (R1, R2, or both include a cyano-group-containing group), a compound represented by R3-C(═O)—O—R4 (R4 includes the cyano-group-containing group), or both. |
| US09608286B2 |
Method of charging/discharging power through pipelines flown with electrolytes and apparatus using the same
Pipelines are used for charging and discharging power in a redox flow battery (RFB). Inner tube made of ion-exchange material is inserted into each of the pipelines. Conductive sleeves are installed on inside and outside the inner tube. Anode electrolyte and cathode electrolyte flow into corresponding ones of the pipelines of the inner tube. Thereby, wires connected with the conductive sleeves are extended out to be used as electrodes. On charging power, the anode electrolyte and the cathode electrolyte flow forwardly; yet, on discharging power, the anode electrolyte and the cathode electrolyte flow backwardly. Thus, the present invention uses pipelines to add or supplement function of charging/discharging power. Even when the RFB is damaged or failed, power is still charged/discharged for effectively improving or ensuring efficiency of the battery. |
| US09608283B2 |
Stack structure for fuel cell
Provided is a stack structure for fuel cells. The stack structure includes a plurality of fuel cells stacked to generate electricity. The stack structure further includes an interconnector and a frame. The interconnector is divided into a central region supporting and electrically connected with the fuel cells and an edge region outwardly extending from an end of the fuel cell. The frame is disposed to support a side of the fuel cell in the edge region of the interconnector, and has a combined functional layer coated on an entire surface of the frame. |
| US09608277B2 |
Method for manufacturing alloy catalyst for fuel cell
A method for manufacturing an alloy catalyst for a fuel cell is disclosed. The method for manufacturing an alloy catalyst for a fuel cell may include predetermined processes and reaction conditions, such that iridium is alloyed to platinum contained in a cathode carbon support catalyst. Accordingly, time for stabilizing charge on the carbon surface may be reduced and a metal particle size may be controlled, thereby manufacturing high quality products having uniform metal particle distribution and improved durability. In addition, corrosion of a cathode carbon support catalyst in a harsh condition such as vehicle driving may be prevented. |
| US09608276B2 |
Nanostructured PtxMy catalyst for PEMFC cells having a high activity and a moderate H2O2 production
A method of manufacturing a catalyst for a PtxMy-based PEMFC, M being a transition metal, including the steps of: depositing PtxMy nanostructures on a support; annealing the nanostructures; depositing a PtxMy layer at the surface of the nanostructures thus formed; and chemically leaching metal M. It also aims at the catalyst obtained with this method. |
| US09608273B2 |
Binder for battery electrode and electrode and battery using same
The purpose of the present invention is to provide: an aqueous binder having high adhesiveness, that in particular does not exhibit oxidative degradation in an electrode environment, and having little environmental load; and an electrode and a battery that use same. Disclosed is a battery electrode binder containing: (A) a constituent unit derived from a monomer having a hydroxyl group; and (B) a constituent unit derived from a polyfunctional (meth)acrylate having no more than 5 functions. An electrode is prepared using this binder and is used in a battery such as a lithium-ion secondary battery. |
| US09608269B2 |
Condensed polyanion electrode
The invention relates to electrodes that contain active materials of the formula: NaaXbMcM′d(condensed polyanion)e(anion)f; where X is one or more of Na+, Li+ and K+; M is one or more transition metals; M′ is one or more non-transition metals; and where a>b; c>0; d≧0; e≧1 and f≧0. Such electrodes are useful in, for example, sodium ion battery applications. |
| US09608268B2 |
Alkali and alkaline-earth ion batteries with non-metal anode and hexacyanometallate cathode
A battery structure is provided for making alkali ion and alkaline-earth ion batteries. The battery has a hexacyanometallate cathode, a non-metal anode, and non-aqueous electrolyte. A method is provided for forming the hexacyanometallate battery cathode and non-metal battery anode prior to the battery assembly. The cathode includes hexacyanometallate particles overlying a current collector. The hexacyanometallate particles have the chemical formula A′n′AmM1xM2y(CN)6, and have a Prussian Blue hexacyanometallate crystal structure. |
| US09608265B2 |
Precursor of cathode active material for a lithium secondary battery, method for manufacturing the precursor, cathode active material, and lithium secondary battery including the cathode active material
Disclosed are a precursor of a positive active material for a rechargeable lithium battery and a preparation method thereof, and a positive active material and a rechargeable lithium battery including the same, and specifically a precursor for a rechargeable lithium battery is represented by the following Chemical Formula 1, wherein a manganese ion concentration deviation in the precursor is within 3 wt %. NixCoyMn1−x−y−zMz(OH)2 [Chemical Formula 1] (0 |
| US09608264B2 |
Air cathode battery using zinc slurry anode with carbon additive
An air cathode battery is provided that uses a zinc slurry anode with carbon additives. The battery is made from an air cathode and a zinc slurry anode. The zinc slurry anode includes zinc particles, an alkaline electrolyte, with a complexing agent and carbon additives in the alkaline electrolyte. A water permeable ion-exchange membrane and electrolyte chamber separate the zinc slurry from the air cathode. The carbon additives may, for example, be graphite, carbon fiber, carbon black, or carbon nanoparticles. The proportion of carbon additives to zinc is in the range of 2.5 to 10% by weight. The proportion of alkaline electrolyte in the zinc slurry is in the range of 50 to 80% by volume. |
| US09608262B2 |
Silicon composite, making method, and non-aqueous electrolyte secondary cell negative electrode material
A silicon composite comprises silicon particles whose surface is at least partially coated with a silicon carbide layer. It is prepared by subjecting a silicon powder to thermal CVD with an organic hydrocarbon gas and/or vapor at 900-1,400° C., and heating the powder for removing an excess free carbon layer from the surface through oxidative decomposition. |
| US09608258B2 |
Battery manufacturing method
The present invention provides a battery manufacturing method including: a step of preparing a thickener aqueous solution by dissolving a thickener in an aqueous solvent (S10); a kneading step of introducing an active material into the prepared thickener aqueous solution and kneading a result (S20); a diluting step of adding an aqueous solvent to a kneaded material resulting from the kneading step such that the kneaded material is diluted, whereby an active material layer forming paste is obtained from the kneaded material (S30); and a step of obtaining an electrode in which an active material layer is formed on a current collector by coating the current collector with the active material layer forming paste and then drying the paste (S40). |
| US09608254B1 |
Pull bar battery terminal clamp
A battery terminal clamp, comprising a body portion made of a conductive material and having top and bottom planar elements. The battery terminal clamp includes a first pull bar, and also includes a second pull bar positioned below the first pull bar. A threaded element extends through the upper pull bar and the lower pull bar, and facilitates the movement of the upper and lower pull bar towards and away from each other, so as to close and open the clamp. |
| US09608249B2 |
Battery assembly and method of switching connection in battery assembly
A battery assembly includes a fixed bus bar and a first movable bus bar and a second movable bus bar. The fixed bus bar is connected to any of terminals. The first movable bus bar and the second movable bus bar are movable in directions toward and away from a lid portion of a battery cell. When the first movable bus bar is in contact with the fixed bus bar and the second movable bus bar is in non-contact with the fixed bus bar, a plurality of battery cells are connected in series. When the second movable bus bar is in contact with the fixed bus bar and the first movable bus bar is in non-contact with the fixed bus bar, a plurality of battery cells are connected in parallel. |
| US09608246B2 |
Resin composition, separator for non-aqueous electrolyte secondary battery and production method therefor, and non-aqueous electrolyte secondary battery
The present invention provides a resin composition comprising the following resin (a) and filler particles. The use of this composition makes it possible to obtain a separator having excellent heat resistance. Resin (a): a polymer which comprises a structural unit represented by a formula (1), and which has a weight average molecular weight of 200000 to 500000, provided that the polymer does not comprise a structural unit represented by a formula (2), wherein, Mn+ represents a metal ion, and n represents the valence thereof, |
| US09608242B2 |
Battery pack with cells of different capacities electrically coupled in parallel
The disclosed embodiments provide a battery pack for use with a portable electronic device. The battery pack includes a first set of cells with different capacities electrically coupled in a parallel configuration. Cells within the first set of cells may also have different thicknesses and/or dimensions. The first set of cells is arranged within the battery pack to facilitate efficient use of space within a portable electronic device. For example, the first set of cells may be arranged to accommodate components in the portable electronic device. |
| US09608241B2 |
Battery cell for a battery, especially for a traction battery
A battery cell has an electrode plate pack arranged in a casing and provided with a terminal of lead material that extends through a cover opening of the casing cover of the casing. A plastic material cap is placed onto the terminal. The cap has an inner side provided with a circumferentially extending shoulder and an exterior side provided with a circumferentially extending support web. A sealing element is arranged at the inner side of the cap between cap and terminal and is positionally fixed by the circumferentially extending shoulder. The casing cover rests on the circumferentially extending support web. Cap and casing cover are welded to each other. A threaded sleeve of nonferrous metal is embedded in the lead material of the terminal and is aligned with an insertion opening of the cap. The threaded sleeve receives a connecting screw to be passed through the insertion opening. |
| US09608239B2 |
Battery and method for producing the battery
A battery includes an external terminal member and an insulating member on an outer surface of a lid member so that an interval between the insulating member and the lid member is smaller in a long side of the lid member than in a short side. A weld mark is formed over the entire circumference of the lid member to extend across the outer surface of the lid member and an open end face of the case body. The weld mark not only extends across the outer surface of the lid member and the open end face of the case body but also reaches an outer side surface of the case body in a zone of the long side of the lid member facing the insulating member, but does not reach the outer side surface of the case body in a zone except the former zone. |
| US09608233B2 |
Display device
A display device comprises a substrate comprising a first surface and a second surface facing away from the first surface; a protection layer disposed over and bonded to the first surface of the substrate; and a plurality of pixels formed over the second surface of the substrate. The protection layer comprises a concave-convex pattern. |
| US09608232B2 |
Organic electroluminescence display device
The organic electroluminescence display device has a circuit board, an element layer which contains an organic electrode luminescence film and a positive electrode and a negative electrode sandwiching the organic electroluminescence film and which is formed on the circuit board, and a sealing film sealing the element layer. The sealing film contains an inorganic layer covering the element layer and an organic layer formed between a part of the element layer and a part of the inorganic layer. The upper surface of the element layer has an inorganic contact area contacting the inorganic layer and an organic contact area contacting the organic layer. The organic contact area is a hollow in the upper surface of the element layer. The area of the upper surface of the organic layer is smaller than the area of the lower surface contacting the inner surface of the hollow. |
| US09608230B2 |
Organic electroluminescent device and manufacturing method thereof, and display device
An organic electroluminescent device and a manufacturing method thereof, and a display device. The organic electroluminescent device comprises comprising a base substrate, a packaging structure, an organic electroluminescent structure located between the base substrate and the packaging structure, and a flexible printed circuit board; the base substrate being provided with a peripheral wiring structure electrically connected with an internal wiring of the organic electroluminescent structure; the peripheral wiring structure including a welding part. The welding part has a first surface facing the base substrate, at least a portion of the first surface being exposed to electrically connect with a welding terminal of the flexible printed circuit board. |
| US09608224B2 |
Organic light emitting element and display device using the element
A hole transporting region made of a hole transporting material, an electron transporting region made of an electron transporting material, and a mixed region (light emitting region) in which both the hole transporting material and the electron transporting material are mixed and which is doped with a triplet light emitting material for red color are provided in an organic compound film, whereby interfaces between respective layers which exist in a conventional lamination structure are eliminated, and respective functions of hole transportation, electron transportation, and light emission are exhibited. In accordance with the above-mentioned method, the organic light emitting element for red color can be obtained in which power consumption is low and a life thereof is long. Thus, the display device and the electric device are manufactured by using the organic light emitting element. |
| US09608221B2 |
Solar cell having organic nanowires
Example embodiments relate to a solar cell including organic nanowires. The solar cell may include a photoelectric conversion layer formed of a p-type material including an organic material and an n-type material including organic nanowires. |
| US09608220B1 |
Hybrid heterojunction photovoltaic device
A photovoltaic device includes an inorganic substrate having a surface; an organic monolayer disposed onto the surface of the inorganic substrate, the inorganic monolayer having the following formula: ˜X—Y, wherein X is an oxygen or a sulfur; Y is an alkyl chain, an alkenyl chain, or an alkynyl chain; and X covalently bonds to the surface of the inorganic substrate by a covalent bond; a doped organic material layer disposed onto the organic monolayer; and a conductive electrode disposed onto a portion of the doped organic material. |
| US09608216B2 |
Flexible display device and method of manufacturing the same
A flexible display device includes a flexible substrate including a display region and a peripheral region substantially surrounding the display region, the display region including a first display region and a second display region, a first display structure at the first display region of the flexible substrate, the first display structure including nanoparticles, and a second display structure at the second display region of the flexible substrate, the second display structure including silicon. |
| US09608212B2 |
Organic photoelectric devices, image sensors, and electronic devices
Organic photoelectric devices, image sensors, and electronic device, include a first electrode and a second electrode facing each other, and an active layer between the first electrode and the second electrode, wherein the active layer includes a p-type semiconductor compound including a squaraine derivative and an n-type semiconductor compound represented by Chemical Formula 1. |
| US09608210B2 |
Organic compound and organic light emitting diode using the same
Discussed is an organic electroluminescent device including a first charge carrying layer being disposed adjacent to a first electrode; and a second charge carrying layer disposed adjacent to a second electrode, wherein the first charge carrying layer includes an emitting part, a hole injection part and a hole transporting part between the hole injection part and the emitting part, wherein at least one of the hole injection part, the hole transporting part and the emitting part includes a host material having an organic compound of Formula: wherein R is substituted or non-substituted C1 to C12 alkyl, and A and B are symmetrically or asymmetrically positioned in 2-position or 7-position of the fluorene core, and wherein each of A and B is independently selected from substituted or non-substituted aromatic group or substituted or non-substituted heterocyclic group. |
| US09608206B2 |
Organic electroluminescent materials and devices
Disclosed is an organic electroluminescent device including an anode, a cathode, and an emissive layer between the anode and the cathode, the emissive layer including a phosphorescent material and a compound having a repeat unit that contains a novel triphenylene moiety. A preferred group of the novel triphenylene moiety are triphenylenes that are substituted with a non-fused aryl group having one or more meta-substituents, where each meta-substituent is a non-fused aryl group optionally substituted with further substituents selected from the group consisting of non-fused aryl groups and alkyl groups. A further preferred group of compounds are triphenylenes that are substituted with a non-fused heteroaryl group having one or more meta-substituents, where each meta-substituent is a non-fused aryl or heteroaryl group optionally substituted with further substituents selected from the group consisting of non-fused aryl groups, non-fused heteroaryl groups, and alkyl groups. The compounds may be useful in phosphorescent organic light emitting devices. |
| US09608205B2 |
Organic compound and organic light emitting device using the same
The present invention provides an organic light emitting device comprising a first electrode, at least one organic layer and a second electrode, laminated successively, in which at least one layer of the organic layer has a polycyclic aromatic hydrocarbon as a core and comprises at least one of a derivative in which a substituted or unsubstituted C2-30 cycloalkane, or a substituted or unsubstituted C5-50 polycycloalkane is directly fused to the core or fused to a substituent of the core; and a new organic compound usable in the organic light emitting device. Furthermore, the present invention provides a charge carrier extracting, injecting or transporting material which has a polycyclic aromatic hydrocarbon as a core and comprises a derivative in which a substituted or unsubstituted C2-30 cycloalkane, or a substituted or unsubstituted C5-50 polycycloalkane is directly fused to the core or fused to a substituent of the core. |
| US09608204B2 |
Resistive random access memory and manufacturing method thereof
The present disclosure provides a semiconductor structure which includes a conductive layer and a resistance configurable structure over the conductive layer. The resistance configurable structure includes a first electrode, a resistance configurable layer over the first electrode, and a second electrode over the resistance configurable layer. The first electrode has a first sidewall, a second sidewall, and a bottom surface on the conductive layer. A joint between the first sidewall and the second sidewall includes an electric field enhancement structure. The present disclosure also provides a method for manufacturing the above semiconductor structure, including patterning a hard mask on a conductive layer; forming a spacer around the hard mask; removing at least a portion of the hard mask; forming a conforming resistance configurable layer on the spacer; and forming a second conductive layer on the conforming resistance configurable layer. |
| US09608201B2 |
Semiconductor devices having insulating substrates and methods of formation thereof
In one embodiment, a method of forming a current sensor device includes forming a device region comprising a magnetic sensor within and/or over a semiconductor substrate. The device region is formed adjacent a front side of the semiconductor substrate. The back side of the semiconductor substrate is attached over an insulating substrate, where the back side is opposite the front side. Sidewalls of the semiconductor substrate are exposed by dicing the semiconductor substrate from the front side without completely dicing the insulating substrate. An isolation liner is formed over all of the exposed sidewalls of the semiconductor substrate. The isolation liner and the insulating substrate include a different material. The method further includes separating the insulating substrate to form diced chips, removing at least a portion of the isolation liner from over a top surface of the device region, and forming contacts over the top surface of the device region. |
| US09608195B2 |
Magnetic tunnel junction device
A device includes creating an opening in a dielectric layer that is disposed over a bottom electrode layer. A top electrode layer is disposed over the dielectric layer. A magnetic tunnel junction (MTJ) layer is formed in the opening over the bottom electrode layer. |
| US09608193B2 |
Acoustic wave device and method of fabricating the same
An acoustic wave device includes: a piezoelectric substrate of which four sides of an upper surface are approximate cleavage directions; and an electrode that is formed on the upper surface of the piezoelectric substrate, and excites an acoustic wave propagating in a direction different from the approximate cleavage directions. |
| US09608186B2 |
Light-emitting diode module having light-emitting diode joined through solder paste and light-emitting diode
Disclosed are a light emitting diode and a light emitting diode module. The light emitting diode module includes a printed circuit board and a light emitting diode joined thereto through a solder paste. The light emitting diode includes a first electrode pad electrically connected to a first conductive type semiconductor layer and a second electrode pad connected to a second conductive type semiconductor layer, wherein each of the first electrode pad and the second electrode pad includes at least five pairs of Ti/Ni layers or at least five pairs of Ti/Cr layers and the uppermost layer of Au. Thus a metal element such as Sn in the solder paste is prevented from diffusion so as to provide a reliable light emitting diode module. |
| US09608184B2 |
Optical semiconductor element mounting package, and optical semiconductor device using the same
An optical semiconductor element mounting package that has good adhesion between the resin molding and the lead electrodes and has excellent reliability is provided, as well as an optical semiconductor device using the package is also provided. The optical semiconductor element mounting package having a recessed part that serves as an optical semiconductor element mounting region, wherein the package is formed by integrating: a resin molding composed of a thermosetting light-reflecting resin composition, which forms at least the side faces of the recessed part; and at least a pair of positive and negative lead electrodes disposed opposite each other so as to form part of the bottom face of the recessed part, and there is no gap at a joint face between the resin molding and the lead electrodes. |
| US09608176B2 |
Light-emitting device
A light-emitting device is specified, said device comprising: a light-emitting semiconductor element (23) which emits greenish white light (10) during operation of the device, a filter element (4) which has a higher optical transmittance (11) in a spectral region of red light than in a spectral region of blue and green light, wherein the filter element (4) is arranged in such a way with respect to the light-emitting semiconductor element (23) that solely filtered light (12) which passes through the filter element (4) is emitted by the device during operation of the device, and the filtered light (12) is warm-white light. |
| US09608173B2 |
Light-emitting device
The invention relates to reducing effect of light that is emitted from a light-emitting element and then enters between a base and a frame member. A light-emitting device (1) includes a base (11), a frame member (12) and a light-emitting element (13). The light-emitting device (1) further includes an intervening layer (14). The frame member (12) is disposed on the base (11). The light-emitting element (13) is made of a semiconductor material. The light-emitting element (13) is disposed in a region defined by the frame member (12), and mounted on the base (11). The intervening layer (14) contains a plurality of light transmitting particles (14-2) and is disposed between the base (11) and the frame member (12). |
| US09608170B2 |
Method of manufacturing light emitting element
A method of manufacturing a semiconductor light emitting element includes providing a semiconductor stacked layer body; forming an insulating layer on a portion of the semiconductor stacked layer body; forming a light-transmissive electrode covering an upper surface of the semiconductor stacked layer body and an upper surface of the insulating layer, and on a region at least partially overlapping a region for disposing an extending portion in a plan view; forming a light reflecting layer in each of the openings of the light-transmissive electrode; forming a protective layer on a main surface side of the semiconductor stacked layer body; forming a mask on an upper surface of the protective layer except for the region for forming the pad electrode; etching the protective layer to form an opening in the protective layer; and forming a pad electrode in the opening of the protective layer. |
| US09608165B2 |
Light emitting diode and method of fabricating the same
A method of fabricating a light emitting diode (LED) includes: sequentially stacking a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer on a substrate; and separating the substrate into unit chips, and at the same time, forming a concavo-convex structure having the shape of irregular vertical lines in a side surface of the unit chip. |
| US09608162B2 |
Light-emitting device having a patterned surface
A light-emitting device comprises a substrate having a top surface and a plurality of patterned units protruding from the top surface; and a light-emitting stack formed on the substrate and having an active layer with a first surface substantially parallel to the top surface; wherein one of the plurality of patterned units has a vertex, a first inclined surface, and a second inclined surface, and the first inclined surface and the second inclined surface commonly join at the vertex from a cross-sectional view of the light-emitting device. |
| US09608161B2 |
Semiconductor light-emitting device
A semiconductor light-emitting device including an N-type semiconductor layer, a plurality of P-type semiconductor layers, a light-emitting layer, and a contact layer is provided. The light-emitting layer is disposed between the N-type semiconductor layer and the whole of the P-type semiconductor layers. The P-type semiconductor layers are disposed between the contact layer and the light-emitting layer. All the P-type semiconductor layers between the light-emitting layer and the contact layer include aluminum. |
| US09608159B2 |
Method of making a tandem solar cell having a germanium perovskite/germanium thin-film
A method of making a germanium perovskite/crystalline germanium thin-film tandem solar cell including the steps of depositing a textured oxide buffer layer on glass, depositing a Sn—Ge film from a eutectic alloy on the buffer layer; and depositing perovskite elements on the Sn—Ge film, thus forming a perovskite layer based on the Ge from the Sn—Ge film, incorporating the Ge into the perovskite layer. |
| US09608153B2 |
Multilayer white polyester film method for manufacturing said film and use of this film as part of a back sheet for photovoltaic cells
The invention concerns a multilayer biaxially oriented white polyester film (adhesion, absence of chalking, opacity whiteness, reflectance, hydrolysis resistance & light stability) comprising three polyester layers: a core layer and two outer layers and contains TiO2 particles. In this film: at least one layer comprises a PET whose: number average molecular weight is within [18500-40000]; intrinsic viscosity IV is ≧0.70 dL/g; and carboxyl group content is ≦30 eq/T. Additionally, the core layer comprises TiO2 particles in a range of [0.1-40]% w/w; the intrinsic viscosity IV is between [0.5-0.85] dL/g; a small endothermic peak temperature is between 180-230° C.; and at least one light stabilizer is added in at least one of the outer layers, in a total concentration between [0.1-35]% w/w. The invention also includes the method for manufacturing such film and the laminate which is part of the back sheet of a solar cell. |
| US09608152B2 |
Solar cell encapsulant sheet
The present invention relates to a solar cell encapsulant sheet comprising at least one ethylene-based resin selected from the group consisting of an ethylene-α-olefin copolymer, an ethylene homopolymer and an ethylene-unsaturated ester copolymer, 0.001 parts by mass to 5 parts by mass of at least one compound selected from the group consisting of silicon dioxide and zeolite, and 0.001 parts by mass to 5 parts by mass of a silane coupling agent, relative to 100 parts by mass of the ethylene-based resin respectively. |
| US09608148B2 |
Semiconductor element and method for producing the same
A method for producing a semiconductor element includes a step of forming a multiple quantum well in which a GaSb layer and an InAs layer are alternately stacked on a GaSb substrate by MOVPE, wherein, in the step of forming a multiple quantum well, an InSb film is formed on at least one of a lower-surface side and an upper-surface side of the InAs layer so as to be in contact with the InAs layer. |
| US09608145B2 |
Materials, structures, and methods for optical and electrical III-nitride semiconductor devices
The present invention provides materials, structures, and methods for III-nitride-based devices, including epitaxial and non-epitaxial structures useful for III-nitride devices including light emitting devices, laser diodes, transistors, detectors, sensors, and the like. In some embodiments, the present invention provides metallo-semiconductor and/or metallo-dielectric devices, structures, materials and methods of forming metallo-semiconductor and/or metallo-dielectric material structures for use in semiconductor devices, and more particularly for use in III-nitride based semiconductor devices. In some embodiments, the present invention includes materials, structures, and methods for improving the crystal quality of epitaxial materials grown on non-native substrates. In some embodiments, the present invention provides materials, structures, devices, and methods for acoustic wave devices and technology, including epitaxial and non-epitaxial piezoelectric materials and structures useful for acoustic wave devices. In some embodiments, the present invention provides metal-base transistor devices, structures, materials and methods of forming metal-base transistor material structures for use in semiconductor devices. |
| US09608141B1 |
Fluorinated tin oxide back contact for AZTSSe photovoltaic devices
A photovoltaic device includes a substrate, a back contact comprising a stable low-work function material, a photovoltaic absorber material layer comprising Ag2ZnSn(S,Se)4 (AZTSSe) on a side of the back contact opposite the substrate, wherein the back contact forms an Ohmic contact with the photovoltaic absorber material layer, a buffer layer or Schottky contact layer on a side of the absorber layer opposite the back contact, and a top electrode on a side of the buffer layer opposite the absorber layer. |
| US09608140B2 |
Solar cell and solar cell module
To improve the yield of a solar cell in its production process, a solar cell includes a semiconductor substrate including a first main surface and a second main surface corresponding to the backside of the first main surface, a busbar electrode on a line extending in a first direction on the second main surface, and end-portion electrodes each being an extension of the busbar electrode on the second main surface and separated from the busbar electrode, and each of the end-portion electrodes having a larger thickness than that of the busbar electrode. |
| US09608139B2 |
Solar cell
A solar cell according to an embodiment of the invention includes: a substrate; a dopant layer formed at the substrate; an electrode electrically connected to the dopant layer, wherein the electrode includes a plurality of finger electrodes that are parallel to each other; and a ribbon-connected portion formed on the dopant layer, wherein the ribbon-connected portion includes a non-conductive material. A portion of the plurality of finger electrodes is formed on the ribbon-connected portion. |
| US09608136B2 |
Composition for solar cell electrodes and electrode fabricated using the same
A composition for solar cell electrodes includes a conductive powder, a glass frit, an organic vehicle and a thixotropic agent, and has a first thixotropic index (TI I) of about 1.5 to about 4 as represented by the following Equation 1, and a second thixotropic index (TI II) of about 4 to about 8 as represented by the following Equation 2, both the first thixotropic index and the second thixotropic index being measured at 23° C. by a rotary viscometer. [Equation 1] TI I=(viscosity at 1 rpm/viscosity at 10 rpm) [Equation 2] TI II=(viscosity at 10 rpm/viscosity at 100 rpm). |
| US09608128B2 |
Body of doped semiconductor material having scattering centers of non-doping atoms of foreign matter disposed between two layers of opposing conductivities
A method for producing a body (1) consisting of doped semiconductor material having a defined mean free path length (lambda n) for free charge carriers (CP), and a mean free path length (lambda r) for the free charge carriers (CP) which is smaller than the defined mean free path length (lambda n) is disclosed. An epitactic crystal layer (20) consisting of doped semiconductor material is produced on a substrate crystal (10) consisting of semiconductor material having the defined mean free path length (lambda n), said crystal layer having, at least locally, a mean free path length (lambda r) for the free charge carriers (CP) which is smaller than the defined mean free path length (lambda n). The body (1) can also be produced by joining two crystal bodies (10′, 10″) consisting of doped semiconductor material. |
| US09608122B2 |
Semiconductor device and method for manufacturing the same
A highly reliable semiconductor device with stable electrical characteristics and a method for manufacturing the semiconductor device are provided. A separation layer is formed between a source electrode and a drain electrode. The separation layer is formed using a material having a high insulating property. The separation layer between the source electrode and the drain electrode can reduce a difference in level of each of the source electrode and the drain electrode, which can improve coverage with a layer formed over the source electrode and the drain electrode. The separation layer between the source electrode and the drain electrode can prevent an unintended electrical short circuit of the source electrode and the drain electrode. The separation layer can be formed by introducing oxygen to a conductive layer. |
| US09608119B2 |
Semiconductor-metal-on-insulator structures, methods of forming such structures, and semiconductor devices including such structures
Methods for fabricating semiconductor-metal-on-insulator (SMOI) structures include forming an acceptor wafer including an insulator material on a first semiconductor substrate, forming a donor wafer including a conductive material and an amorphous silicon material on a second semiconductor substrate, and bonding the amorphous silicon material of the donor wafer to the insulator material of the acceptor wafer. SMOI structures formed from such methods are also disclosed, as are semiconductor devices including such SMOI structures. |
| US09608114B2 |
Semiconductor device including field effect transistors
A semiconductor device includes a buffer layer on a substrate, the buffer layer having a lattice constant different from that of the substrate, a fin structure upwardly protruding from the buffer layer, a gate electrode crossing over the fin structure, a cladding layer at a side of the fin structure and covering a top surface and sidewalls of the fin structure, and an interfacial layer between the cladding layer and the fin structure, the interfacial layer including a same element as the buffer layer. |
| US09608113B2 |
Semiconductor device structure
A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and a gate stack over the semiconductor substrate. The semiconductor device structure also includes a sealing structure over a sidewall of the gate stack, and a width ratio of the sealing structure to the gate stack is in a range from about 0.05 to about 0.7. The semiconductor device structure further includes an etch stop layer over the semiconductor substrate, the gate stack, and the sealing structure. The etch stop layer is in contact with the sealing structure. |
| US09608105B2 |
Semiconductor structure with a doped region between two deep trench isolation structures
The density of a transistor array is increased by forming one or more deep trench isolation structures in a semiconductor material. The deep trench isolation structures laterally surround the transistors in the array. The deep trench isolation structures limit the lateral diffusion of dopants and the lateral movement of charge carriers. |
| US09608104B2 |
Silicon carbide semiconductor device and method for manufacturing same
A silicon carbide semiconductor device includes: a vertical MOSFET having: a semiconductor substrate including a high-concentration impurity layer and a drift layer; a base region; a source region; a trench gate structure; a source electrode; and a drain electrode. The base region has a high-concentration base region and a low-concentration base region having a second conductivity type with an impurity concentration lower than the high-concentration base region, which are stacked each other. Each of the high-concentration base region and the low-concentration base region contacts a side surface of the trench. |
| US09608100B2 |
High electron mobility transistor and method of manufacturing the same
According to example embodiments, a high electron mobility transistor (HEMT) includes: stack including a buffer layer, a channel layer containing a two dimensional electron gas (2DEG) channel, and a channel supply layer sequentially stacked on each other, the stack defining a first hole and a second hole that are spaced apart from each other. A first electrode, a second electrode, and third electrode are spaced apart from each other along a first surface of the channel supply layer. A first pad is on the buffer layer and extends through the first hole of the stack to the first electrode. A second pad is on the buffer layer and extends through the second hole of the stack to the second electrode. A third pad is under the stack and electrically connected to the third electrode. |
| US09608099B1 |
Nanowire semiconductor device
A method for forming a nanowire device comprises forming a fin on a substrate, depositing a first layer of insulator material on the substrate, etching to remove portions of the first layer of insulator material to reduce a thickness of the first layer of insulator material, epitaxially growing a first layer of semiconductor material on exposed sidewall portions of the fin, depositing a second layer of insulator material on the first layer of insulator material, etching to remove portions of the second layer of insulator material to reduce a thickness of the second layer of insulator material, and etching to remove portions of the first layer of semiconductor material to expose portions of the fin and form a first nanowire and a second nanowire. |
| US09608097B2 |
Insulated gate bipolar transistor amplifier circuit
The present invention provides a lateral IGBT transistor comprising a bipolar transistor and an IGFET. The lateral IGBT comprises a low resistive connection between the drain of the IGFET and the base of the bipolar transistor, and an isolating layer arranged between the IGFET and the bipolar transistor. The novel structure provides a device which is immune to latch and gives high gain and reliability. The structure can be realized with standard CMOS technology available at foundries. |
| US09608091B2 |
Method for manufacturing a semiconductor device
The improvement of the reliability of a semiconductor device having a split gate type MONOS memory is implemented. An ONO film and a second polysilicon film are sequentially formed so as to fill between a first polysilicon film and a dummy gate electrode. Then, the dummy gate electrode is removed. Then, the top surfaces of the first and second polysilicon films are polished, thereby to form a memory gate electrode formed of the second polysilicon film at the sidewall of a control gate electrode formed of the first polysilicon film via the ONO film. As a result, the memory gate electrode high in perpendicularity of the sidewall, and uniform in film thickness is formed. |
| US09608089B2 |
Method of manufacturing thin-film transistor substrate
Provided is a method of manufacturing a thin-film transistor substrate, the method includes forming a semiconductor pattern layer on a substrate. A first insulating film is formed on the semiconductor pattern layer. A metal pattern layer including a gate electrode and first and second alignment electrodes respectively spaced apart from two sides of the gate electrode is formed on the first insulating film. A cover layer covering the gate electrode is formed. The first and second alignment electrodes are removed. A first doping process is performed by doping the semiconductor pattern layer with a first impurity by using the cover layer as a mask. The cover layer is removed. A second doping process is performed by doping the semiconductor pattern layer with a second impurity having a lower impurity concentration than the first impurity by using the gate electrode as a mask. |
| US09608083B2 |
Semiconductor device
A semiconductor device includes a first semiconductor layer formed over a substrate, a second semiconductor layer formed over the first semiconductor layer, a source electrode and a drain electrode formed over the second semiconductor layer, an insulating film formed over the second semiconductor layer, a gate electrode formed over the insulating film, and a protection film covering the insulating film, the protection film being formed by thermal CVD, thermal ALD, or vacuum vapor deposition. |
| US09608079B2 |
Semiconductor device having reduced drain-to-source capacitance
A semiconductor device includes a source finger electrode coupled to a source region in a semiconductor die, a drain finger electrode coupled to a drain region in the semiconductor die, where the source finger electrode includes at least one isolated segment and a main segment having a first portion and a second portion narrower than the first portion, whereby the source finger electrode reduces a drain-to-source capacitance of the semiconductor device. A common source rail is electrically coupled to the at least one isolated segment and the main segment of the source finger electrode. The drain finger electrode includes at least one isolated segment and a main segment having a first portion and a second portion narrower than the first portion. A common drain rail is electrically coupled to the at least one isolated segment and the main segment of the drain finger electrode. |
| US09608077B1 |
Semiconductor structure and method for manufacturing the same
A method for manufacturing a semiconductor structure includes preparing a semiconductor substrate which includes a memory cell region and a peripheral circuit region; forming a buried word line in the semiconductor substrate in the memory cell region; forming a bit line structure over the semiconductor substrate in the memory cell region; forming a dielectric layer in the peripheral circuit region and the memory cell region; forming a first opening in the dielectric layer in the memory cell region; filling a silicon filler in the first opening; forming a second opening in the dielectric layer in the peripheral circuit region; forming a sidewall spacer over a sidewall of the second opening; recessing the silicon filler to form a silicon plug, wherein the silicon plug fills a lower portion of the first opening; and forming a first metal silicide over a top surface of the silicon plug, and concurrently forming a second metal silicide in a lower portion of the second opening. |
| US09608074B2 |
Silicon carbide semiconductor device and method for manufacturing silicon carbide semiconductor device
A silicon carbide semiconductor device includes a silicon carbide substrate, a gate electrode, and a drain electrode. A trench is formed in a second main surface of the silicon carbide substrate. The silicon carbide substrate includes a first conductivity type region, a body region, a source region, and a first second conductivity type region surrounded by the first conductivity type region. The trench is formed of a side wall surface and a bottom portion. An impurity concentration of the first second conductivity type region is lower than an impurity concentration of the first conductivity type region. The first second conductivity type region is provided so as to face a region between a first contact point and a second contact point and be separated apart from a first main surface. |
| US09608073B2 |
Semiconductor device and method of manufacturing semiconductor device
Provided is a semiconductor device comprising: a first conductivity type base layer having a MOS gate structure formed on its front surface side; a second conductivity type first collector layer formed on a rear surface side of the base layer; a second conductivity type second collector layer formed on a rear surface side of the first collector layer with a material the same with that of the base layer, the second collector layer formed to be thinner than the first collector layer and having a higher impurity concentration than that of the first collector layer; a collector electrode formed on a rear surface side of the second collector layer; and a second conductivity type separation layer surrounding the MOS gate structure on a front surface side of the base layer and formed from a front surface of the base layer to a front surface of the first collector layer. |
| US09608071B2 |
IGBT and IGBT manufacturing method
An IGBT manufacturing method is provided. The IGBT has an n-type emitter region, a p-type top body region, an n-type intermediate region, a p-type bottom body region, an n-type drift region, a p-type collector region, trenches penetrating the emitter region, the top body region, the intermediate region and the bottom body region from an upper surface of a semiconductor substrate and reaching the drift region, and gate electrodes formed in the trenches. The method includes forming the trenches on the upper surface of the semiconductor substrate, forming the insulating film in the trenches, forming an electrode layer on the semiconductor substrate and in the trenches after forming the insulating film, planarizing an upper surface of the electrode layer, and implanting n-type impurities to a depth of the intermediate region from the upper surface side of the semiconductor substrate after planarizing the upper surface of the electrode layer. |
| US09608064B2 |
MOSFET structure and method for manufacturing same
Provided is a MOSFET, comprising: a substrate (100); a gate stack (500) on the substrate (100); source/drain regions (305) in the substrate on both sides of the gate stack (500); an interlayer dielectric layer (400) covering the source/drain regions; and source/drain extension regions (205) under edges on both sides of the gate stack (500); wherein insulators, which are not connected each other, are formed beneath the source/drain extension regions (205) under edges on both sides of the gate stack (500). By means of the MOSFET in the present disclosure, negative effects induced by DIBL on device performance can be effectively reduced. |
| US09608062B1 |
Semiconductor structure and method of forming the same
The present invention provides a semiconductor structure including a fin structure formed on a substrate, and an isolation structure formed in the fin structure. The isolation structure includes a trench, and a first dielectric layer disposed in the trench wherein the first dielectric layer includes a body portion in the bottom, a protruding portion in the top with a top surface, and a shoulder portion connecting the body portion and the protruding portion. The protruding portion has a smaller width than the body portion. The semiconductor structure further includes a second dielectric layer covering a top corner of the trench and sandwiched between the protruding portion, the shoulder portion of the first dielectric layer and the upper sidewall of the trench. |
| US09608055B2 |
Semiconductor device having germanium active layer with underlying diffusion barrier layer
Semiconductor devices having germanium active layers with underlying diffusion barrier layers are described. For example, a semiconductor device includes a gate electrode stack disposed above a substrate. A germanium active layer is disposed above the substrate, underneath the gate electrode stack. A diffusion barrier layer is disposed above the substrate, below the germanium active layer. A junction leakage suppression layer is disposed above the substrate, below the diffusion barrier layer. Source and drain regions are disposed above the junction leakage suppression layer, on either side of the gate electrode stack. |
| US09608052B2 |
Sub-pixel arrangement, method for repairing the same, display panel and display device
The present disclosure provides a sub-pixel arrangement including: a first sub-pixel region, a second sub-pixel region, and a connection region. Each electrode arranged in the sub-pixel and configured to implement display control may be connected to a source/drain electrode of the TFT through a via hole within the connection region, so as to cut an electrode material within the via hole to disconnect the electrode from the source/drain electrode when a pixel is to be repaired. The sub-pixel arrangement may facilitate to improve the success rate of repairing the display panels and improve the yield rate of the display panels. |
| US09608045B2 |
Display device
A display device includes a first substrate, an organic EL layer formed on the first substrate and curved in each pixel, and color filters disposed in the respective pixels, and curved to match the organic EL layer. With this configuration, a change in the chromaticity and brightness of the display device depending on a viewing angle of a user is reduced. |
| US09608041B2 |
Semiconductor memory device and method of manufacturing the same
A semiconductor memory device comprising a bit line extending in a first direction, a vertical gate cell including a gate oxide layer and a gate metal layer that are formed in a pillar shape, a lower electrode and a data storage material layer formed on the vertical gate cell, and an interconnection layer formed on the data storage material layer. |
| US09608036B2 |
Solid-state imaging device, with charge holding section between trenched transfer gate sections manufacturing method of same and electronic apparatus
A solid-state imaging device includes a pixel having a photoelectric conversion element which generates a charge in response to incident light, a first transfer gate which transfers the charge from the photoelectric conversion element to a charge holding section, and a second transfer gate which transfers the charge from the charge holding section to a floating diffusion. The first transfer gate includes a trench gate structure having at least two trench gate sections embedded in a depth direction of a semiconductor substrate, and the charge holding section includes a semiconductor region positioned between adjacent trench gate sections. |
| US09608033B2 |
Solid-state image sensor, method of manufacturing the same, and camera
A solid-state image sensor includes a pixel area and a peripheral circuit area. The pixel area includes a first MOS, and the peripheral circuit area includes a second MOS. A method includes forming a gate of the first MOS and a gate of the second MOS, forming a first insulating film to cover the gates of the first and second MOSs, etching the first insulating film in the peripheral circuit area in a state that the pixel area is masked to form a side spacer on a side face of the gate of the second MOS, etching the first insulating film in the pixel area in a state that the peripheral circuit area is masked, and forming the second insulating film to cover the gates of the first and second MOSs and the side spacers. |
| US09608032B2 |
Backside illumination (BSI) image sensor and manufacturing method thereof
A method for manufacturing a BSI image sensor includes following steps: A substrate is provided. The substrate includes a front side and a back side opposite to the front side. The substrate further includes a plurality of isolation structures and a plurality of sensing elements formed therein. Next, the isolation structures are exposed from the back side of the substrate. Subsequently, a thermal treatment is performed to the back side of the substrate to form a plurality of cambered surfaces on the back side of the substrate. The cambered surfaces are formed correspondingly to the sensing elements, respectively. |
| US09608026B2 |
Through via structure, methods of forming the same
Methods of manufacturing an integrated circuit device including a through via structure are provided. The methods may include forming an isolation trench through a substrate to form an inner substrate, which is enclosed by the isolation trench and forming an insulating layer in the isolation trench and on a surface of the substrate. The methods may also include forming a hole, which is spaced apart from the isolation trench and passes through a portion of the insulating layer formed on the surface of the substrate and the inner substrate and forming a conductive layer in the hole and on the insulating layer formed on the surface of the substrate. The methods may be used to manufacture image sensors. |
| US09608019B2 |
Image sensor pixel for high dynamic range image sensor
An image sensor pixel for use in a high dynamic range image sensor includes a first photodiode and a second photodiode. The first photodiode include a first doped region, a first lightly doped region, and a first highly doped region disposed between the first doped region and the first lightly doped region. The second photodiode disposed in has a second full well capacity substantially equal to a first full well capacity of the first photodiode. The second photodiode includes a second doped region, a second lightly doped region, and a second highly doped region disposed between the second doped region and the second lightly doped region. A first aperture sizer is disposed above the second photodiode to limit image light received by the second photodiode to a second amount that is less than a first amount of image light received by the first photodiode. |
| US09608017B2 |
Reversed flexible TFT back-panel by glass substrate removal
The process of fabricating a flexible TFT back-panel includes depositing etch stop material on a glass support. A matrix of contact pads, gate electrodes and gate dielectric are deposited overlying the etch stop material. Vias are formed through the dielectric in communication with each pad. A matrix of TFTs is formed by depositing and patterning metal oxide semiconductor material to form an active layer of each TFT overlying the gate electrode. Source/drain metal is deposited on the active layer and in the vias in contact with the pads, the source/drain metal defining source/drain terminals of each TFT. Passivation material is deposited in overlying relationship to the TFTs. A color filter layer is formed on the passivation material and a flexible plastic carrier is affixed to the color filter. The glass support member and the etch stop material are then etched away to expose a surface of each of the pads. |
| US09608014B2 |
Display device
A display device includes a first substrate, a second substrate disposed opposite to the first substrate, and a gate drive circuit having at least one first capacitor and a gate drive element. The first capacitor is located on the first substrate, and the gate drive element is disposed on the second substrate. The display device can reduce the wiring width of the gate drive circuit, narrow the frame edge and improve the transmissivity of sealant on the gate drive circuit. |
| US09608008B2 |
Active matrix substrate and method for producing same
Each pixel region of an active matrix substrate includes a thin-film transistor, an interlayer insulating layer that includes an organic insulating layer, a transparent connection layer formed on the interlayer insulating layer, an inorganic insulating layer formed on the transparent connection layer, and a pixel electrode formed on the inorganic insulating layer. The transparent connection layer contacts a drain electrode inside of a first contact hole formed in the interlayer insulating layer. The pixel electrode contacts the transparent connection layer inside of a second contact hole formed in the inorganic insulating layer. The first contact hole and the second contact hole do not overlap with one another when a substrate is viewed from a normal direction. Inside the first contact hole, a bottom surface and sidewalls of the first contact hole are covered by the transparent connection layer, the inorganic insulating layer, and the pixel electrode. |
| US09608005B2 |
Memory circuit including oxide semiconductor devices
To provide a semiconductor device with excellent charge retention characteristics, an OS transistor is used as a transistor whose gate is connected to a node for retaining charge. Charge is stored in a first capacitor, and data at the node for retaining charge is read based on whether the stored charge is transferred to a second capacitor. Since a Si transistor, in which leakage current through a gate insulating film occurs, is not used as a transistor connected to the node for retaining charge, charge retention characteristics of the node are improved. In addition, the semiconductor device operates in data reading without requiring transistor performance equivalent to that of a Si transistor. |
| US09608001B2 |
Semiconductor memory device
According to one embodiment, a semiconductor memory device includes a substrate; a first stacked body provided on the substrate, the first stacked body including a plurality of electrode layers and a plurality of insulating layers, each of the plurality of insulating layers being provided between the plurality of electrode layers; a semiconductor film provided in the first stacked body and extending in a stacking direction of the first stacked body; and a second stacked body provided on the substrate and separately from the first stacked body, the second stacked body including a same layer structure as the first stacked body. The second stacked body includes a first contact portion electrically connected to an external portion; and a second contact portion electrically connected to an external portion different from the first contact portion. |
| US09607998B2 |
Semiconductor storage device and method for manufacturing the semiconductor storage device
A semiconductor storage device includes an insulating layer. A ferroelectric capacitor is on the insulating layer and includes a lower electrode, a ferroelectric film, and an upper electrode. An interlayer insulating film is formed on the insulating layer, and has an opening where the ferroelectric capacitor is disposed. A first metal plug is formed in the insulating layer and connected to the lower electrode via the opening. A second metal plug is embedded in the insulating layer outside the ferroelectric capacitor. A hydrogen barrier film covers the ferroelectric capacitor and the interlayer insulating film. An upper surface of the interlayer insulating film is higher than an upper surface of the first metal plug so that a step is therebetween. The lower electrode is formed on the upper surface of the interlayer insulating film, the upper surface of the first metal plug and the step. The upper surface of the interlayer insulating film and the upper surface of the first metal plug are interlinked via a recessed portion of the interlayer insulating film. |
| US09607993B1 |
Capacitor-transistor strap connections for a memory cell
Capacitor strap connections for a memory cell and device structures for making such capacitor strap connections. A deep trench capacitor is formed in a substrate. A collar comprised of an electrical insulator is formed at least partially inside an upper section of a deep trench in which the deep trench capacitor is formed. A portion of the collar is removed to define a notch extending through the collar, and a connection strap is formed in the notch. A fin is formed from a portion of the substrate, and is coupled by the connection strap with an electrode of the deep trench capacitor that is located inside the deep trench. |
| US09607991B2 |
Semiconductor device
To provide a semiconductor memory device which can be manufactured with high yield and which can achieve higher integration. A pair of memory cells adjacent to each other in the bit line direction is connected to a bit line through a common contact hole. The pair of memory cells adjacent to each other in the bit line direction shares an electrode connected to the bit line. An oxide semiconductor layer included in the memory cell is provided to overlap with a word line and a capacitor line. A transistor and a capacitor included in the memory cell are each provided to overlap with the bit line connected to the memory cell. |
| US09607990B2 |
Method to form strained nFET and strained pFET nanowires on a same substrate
A semiconductor is provided that includes an nFET gate structure straddling over a first nanowire stack and a portion of a first SiGe layer having a first Ge content. The first nanowire stack comprises alternating layers of a tensily strained silicon layer, and a second SiGe layer having a second Ge content that is greater than the first Ge content and being compressively strained. Portions of the tensily strained silicon layers extend beyond sidewalls surfaces of the nFET gate structure and are suspended. The structure further includes a pFET gate structure straddling over a second nanowire stack and another portion of the first SiGe layer. The second nanowire stack comprises alternating layers of the tensily strained silicon layer, and the second SiGe layer. Portions of the second SiGe layers extend beyond sidewalls surfaces of the pFET gate structure and are suspended. |
| US09607989B2 |
Forming self-aligned NiSi placement with improved performance and yield
Methods for forming a trench silicide without gouging the silicon source/drain regions and the resulting devices are disclosed. Embodiments include forming first and second dummy gates, each with spacers at opposite sides thereof, on a substrate; forming eSiGe source/drain regions at opposite sides of the first dummy gate; forming raised source/drain regions at opposite sides of the second dummy gate; forming a silicon cap on each of the eSiGe and raised source/drain regions; forming an ILD over and between the first and second dummy gates; replacing the first and second dummy gates with first and second HKMG, respectively; forming a contact trench through the ILD into the silicon cap over each of the eSiGe and raised source/drain regions; and forming a silicide over the eSiGe and raised source/drain regions. |
| US09607988B2 |
Off-center gate cut
A semiconductor device includes a diffusion area, a gate structure coupled to the diffusion area, and a dummy gate structure coupled to the diffusion area. The gate structure extends a first distance beyond the diffusion area, and the dummy gate structure extends a second distance beyond the diffusion area. |
| US09607987B2 |
Methods for forming fins for metal oxide semiconductor device structures
Methods are disclosed for forming fins in transistors. In one embodiment, a method of fabricating a device includes forming silicon fins on a substrate and forming a dielectric layer on the substrate and adjacent to the silicon fins such that an upper region of each silicon fin is exposed. Germanium may then be epitaxially grown germanium on the upper regions of the silicon fins to form germanium fins. |
| US09607986B2 |
Mixed orientation semiconductor device and method
A method of making a semiconductor device begins with a semiconductor wafer that includes a first semiconductor layer overlying a second semiconductor layer. A first trench is etched in the semiconductor wafer. The first trench is filled with insulating material. A second trench is etched within the first trench and through the insulating material, such that insulating material remains along sidewalls of the first trench. The second trench exposes a portion of the second insulating layer. A semiconductor layer can then be grown within the second trench using the second semiconductor layer as a seed layer. |
| US09607984B2 |
Common drain semiconductor device structure and method
In one embodiment, a common drain semiconductor device includes a substrate, having two transistors integrated therein. The substrate also includes a plurality of active regions on a major surface of the substrate. The active regions of each transistor may be interleaved. |
| US09607980B1 |
High voltage transistor
The present invention provides a high voltage transistor including a substrate, a first base region having a first conductivity type, and a first doped region, a second doped region, a second base region and a third doped region having a second conductivity type complementary to the first conductivity type. The first base region, the second doped region, the second base region and the third doped region are disposed in the substrate, and the first doped region is disposed in the substrate. The third doped region, the second base region and the second doped region are stacked sequentially, and the doping concentrations of the third doped region, the second base region and the second doped region gradually increase. |
| US09607979B2 |
Liquid crystal display device and manufacturing method thereof
Provided is a liquid crystal display device according to an embodiment of the present disclosure. The display device includes: a first metal layer, a first insulating layer, a second metal layer, a second insulating layer, and a third metal layer deposited in sequence on a substrate. The first insulating layer and the second insulating layer include a one-hole bridge contact portion for exposing a part of the first metal layer and a part of the second metal layer at one time. The third metal layer is realized to be in contact with the first metal layer and the second metal layer through the one-hole bridge contact portion. |
| US09607974B2 |
Package structure and fabrication method thereof
A method for fabricating a package structure is provided, which includes: providing a first carrier having a circuit layer thereon; forming a plurality of conductive posts on the circuit layer and disposing at least an electronic element on the first carrier; forming an encapsulant on the first carrier to encapsulate the conductive posts, the circuit layer and the electronic element; and removing the first carrier, thereby dispensing with the conventional hole opening process for forming the conductive posts and hence reducing the fabrication costs. |
| US09607971B2 |
Semiconductor device and sensing system
A semiconductor device includes a first substrate that has a sensing portion that detects predetermined information, a second substrate that has a first processing portion that processes data supplied thereto from the sensing portion, and a third substrate having a second processing portion that processes data supplied thereto either from the first substrate or from the second substrate. |
| US09607970B2 |
Light-emitting device having a plurality of concentric light transmitting areas
The light-emitting device of the present invention includes LED chips provided on a ceramic substrate and a sealing material in which the LED chips are embedded. The sealing material contains a fluorescent substance and divided into a first fluorescent-substance-containing resin layer and a second fluorescent-substance-containing resin layer by a first resin ring and a second resin ring. |
| US09607966B2 |
Chip arrangement
A chip arrangement is provided. The chip arrangement includes: a first chip electrically connected to the first chip carrier top side; a second chip electrically connected to the second chip carrier top side; and electrically insulating material configured to at least partially surround the first chip carrier and the second chip carrier; at least one electrical interconnect configured to electrically contact the first chip to the second chip through the electrically insulating material; one or more first electrically conductive portions formed over and electrically contacted to at least one of the first chip carrier top side and second chip carrier top side, and one or more second electrically conductive portions formed over and electrically contacted to at least one of the first chip carrier bottom side and second chip carrier bottom side. |
| US09607963B2 |
Semiconductor device and fabrication method thereof
A semiconductor device is disclosed, which includes: a substrate having a substrate body and a plurality of conductive pads formed on the substrate body, wherein each of the conductive pads has at least an opening formed in a first surface thereof; a semiconductor component having a plurality of bonding pads; a plurality of conductive elements formed between the bonding pads and the conductive pads and in the openings of the conductive pads; and an encapsulant formed between the substrate and the semiconductor component for encapsulating the conductive elements, thereby strengthening the bonding between the conductive elements and the conductive pads and consequently increasing the product yield. |
| US09607962B2 |
Semiconductor device and manufacturing method thereof
A semiconductor device includes a corner constituted by a first side and a second side being perpendicular to the first side; and a plurality of pads including a first pad, arranged along the second side and formed over a semiconductor substrate. The first pad is arranged nearer the corner than other pads of the plurality of pads. The first pad includes a third side, a fourth side being perpendicular to the third side, a fifth side being parallel to the third side and a sixth side being perpendicular to a fifth side. The third side and the fourth side are nearer to the corner than the fifth side and sixth side. A first dummy wiring is formed along the first side. A second dummy wiring is formed along the second side. The first dummy wiring and the second dummy wiring are formed integrally with each other. |
| US09607960B1 |
Bonding structure and flexible device
A bonding structure comprising a contact pad, an anisotropic conductive film (ACF) and a contact structure is provided. The contact pad includes at least one recess, wherein a thickness of the contact pad is T, and a width of the at least one recess is B, The ACF is disposed on the contact pad and includes a plurality of conductive particles; each of the conductive particles is disposed in the at least one recess. A diameter of the conductive particles is A, and A is larger than B and T and satisfies B≦2(AT−T2)1/2. The contact structure is disposed on the ACF and electrically connected to the contact pad via the conductive particles. The disclosure also provides a flexible device including a substrate, a patterned insulating layer, at least one contact pad, ACF, and a contact structure. |
| US09607959B2 |
Packaging device having plural microstructures disposed proximate to die mounting region
An example packaging device includes a substrate having an integrated circuit die mounting region disposed thereon. A plurality of microstructures are disposed proximate a side of the integrated circuit die mounting region. The plurality of microstructures each include an outer insulating layer over a conductive material. An example packaged semiconductor device includes a substrate having an integrated circuit die mounting region disposed thereon. A plurality of columnar microstructures are disposed on the substrate perpendicular to a major surface of the substrate and proximate a side of the integrated circuit die mounting region. An underfill material is disposed between the substrate and the integrated circuit die. |
| US09607956B2 |
Semiconductor device and method of manufacturing the same
A semiconductor device in which reliability of a bonding pad to which a conductive wire is bonded is achieved. A bonding pad having an OPM structure is formed of an Al—Cu alloy film having a Cu concentration of 2 wt % or more. By increasing the Cu concentration, the Al—Cu alloy film forming the bonding pad is hardened. Therefore, the bonding pad is difficult to be deformed by impact in bonding of a Cu wire, and deformation of an OPM film as following the deformation of the bonding pad can be reduced. In this manner, concentration of a stress on the OPM film caused by the impact from the Cu wire can be reduced, and therefore, the breakage of the OPM film can be prevented. |
| US09607954B2 |
Method of manufacturing semiconductor device and semiconductor device
Object is to prevent a coupling failure between a rewiring and a coupling member for coupling to outside. A passivation film and a first polyimide film are formed so as to cover a wiring layer. A first opening portion is formed in the first polyimide film. A rewiring is formed on the first polyimide film so as to be coupled to the wiring layer via the first opening portion. A second polyimide film that covers the rewiring and has a second opening portion communicated with the rewiring is formed. A palladium film is formed as a barrier film by sputtering on a portion of the surface of the rewiring at which the second opening portion exists. A solder ball is coupled to the palladium film. |
| US09607953B1 |
Semiconductor package with isolation wall
A semiconductor device package includes an isolation wall located between a first circuit and a second circuit on a substrate. The isolation wall is configured to reduce inductive coupling between the first and second circuits during operation of the semiconductor device. Encapsulation material covers the substrate, first and second circuits, and the isolation wall. The isolation wall has features, such as indentation, along its upper edge that facilitate a flow of the encapsulation material across the isolation wall during fabrication to largely eliminate interior defects and/or visual defects on the surface of the completed semiconductor device package. For a dual-path amplifier, such as a Doherty power amplifier, the isolation wall separates the carrier amplifier elements from the peaking amplifier elements included within the semiconductor device package. |
| US09607950B2 |
Package substrate and semiconductor package including the same
There is provided a package substrate including: a body unit including a plurality of base substrates and having a mounting region allowing at least one semiconductor device to be mounted thereon; and a plurality of magnetic field shielding units including a ferromagnetic material and provided within the body unit, wherein the plurality of magnetic field shielding units may be respectively disposed on the plurality of different base substrates such that a magnetic field shielding region defined by the plurality of magnetic field shielding units corresponds to the mounting region. |
| US09607949B2 |
Semiconductor device having semiconductor chips in resin and electronic circuit device with the semiconductor device
A semiconductor device includes a first semiconductor unit including a plurality of first semiconductor chips, an organic resin provided between the first semiconductor chips, a wiring layer provided above the first semiconductor chips to electrically connect the first semiconductor chips to each other, and a plurality of connecting terminals provided on an upper portion of the wiring layer and a second semiconductor unit fixed to a wiring layer side of the first semiconductor unit, the second semiconductor unit fixed to a region sandwiched between the connecting terminals, the second semiconductor unit having a second semiconductor chip, the second semiconductor unit electrically connected to the first semiconductor unit. |
| US09607948B2 |
Method and circuits for communication in multi-die packages
Various example implementations are directed to circuits and methods for inter-die communication on a multi-die integrated circuit (IC) package. According to an example implementation, an IC package includes a first semiconductor die having a plurality of communication circuits for communicating data over respective data terminals of the package. The package also includes a second semiconductor die having N contacts for communicating data to and from the semiconductor die. The second semiconductor die includes a logic circuit configured to communicate M parallel data signals with one or more other semiconductor dies of the package, wherein M>N. The second semiconductor die also includes a plurality of serializer circuits, each configured to serialize data from a respective subset of the plurality of the M signal lines to produce serialized data and provide the serialized data to a respective one of the contacts. |
| US09607945B2 |
Semiconductor device comprising power elements in juxtaposition order
A semiconductor device including a multiplicity of large current power elements with each power element divided into a multiplicity of divisional elements and arranged such that the power elements belonging to different power elements are arranged in a repetitive sequential order. The IC chip of the semiconductor device is formed to have output wires extending from the respective divisional elements connected to corresponding output pads without crossing other output wires. Arranged on the IC chip are output bumps in association with the respective output pads. A rewiring layer is provided having output coupling wires for connecting together the bumps that belong to the same power element and connecting them further to an external output electrode. |
| US09607944B1 |
Efficient layout placement of a diode
A semiconductor device includes a plurality of first wires and second wires, a first conductive layer, and a second conductive layer. Each of the first wires forms a closed polygon and surrounds a center, and each of the second wires forms the closed polygon and surrounds the center. The first and second wires are interlaced, and none of the first and second wires are coupled to each other. The first conductive layer, having an entire surface structure, is disposed on the first and second wires and coupled to the first wires. The second conductive layer, having an entire surface structure, is disposed on the first and second wires and coupled to the second wires. The first conductive layer is disposed between the second conductive layer and the first and second wires, and the first and second conductive layers are not coupled to each other. |
| US09607943B2 |
Capacitors
Back end of the line (BEOL) capacitors and methods of manufacture are provided. The method includes forming wiring lines on a substrate, with spacing between adjacent wiring lines. The method further includes forming an air gap within spacing between the adjacent wiring lines by deposition of a capping material. The method further includes opening the air gap between selected adjacent wiring lines. The method further includes depositing conductive material within the opened air gap. |
| US09607939B2 |
Semiconductor package and method of fabricating the same
A semiconductor package is provided, including a semiconductor substrate having a plurality of conductive vias, a buffer layer formed on the semiconductor substrate, a plurality of conductive pads formed on end surfaces of the conductive vias and covering the buffer layer. During a reflow process, the buffer layer greatly reduces the thermal stress, thereby eliminating the occurance of cracking at the interface of conductive pads. A method of fabricating such a semiconductor package is also provided. |
| US09607936B2 |
Copper bump joint structures with improved crack resistance
An integrated circuit structure includes a first work piece and a second work piece. The first work piece includes a semiconductor substrate, and a copper bump over the semiconductor substrate. The second work piece includes a bond pad. A solder is between and adjoining the first work piece and the second work piece, wherein the solder electrically connects the copper bump to the bond pad. The solder includes palladium. |
| US09607922B2 |
Semiconductor device and heat-dissipating mechanism
A semiconductor device includes a semiconductor chip which can be a heat-generating semiconductor chip or a semiconductor relay substrate in which an integrated circuit or wiring is built in. A sintered-silver-coated film is adhered on a surface layer part of the semiconductor substrate, interposed by a silicon oxide film. A heat-dissipating fin (heat sink), which may be copper or aluminum, is bonded on the sintered-silver-coated film, interposed by an adhesive layer. |
| US09607920B2 |
Self-limiting chemical vapor deposition and atomic layer deposition methods
Methods for depositing silicon on a semiconductor or metallic surface include cycling dosing of silane and chlorosilane precursors at a temperature between 50° C. and 300° C., and continuing cycling between three and twenty three cycles until the deposition self-limits via termination of surface sites with Si—H groups. Methods of layer formation include depositing a chlorosilane onto a substrate to form a first layer, wherein the substrate is selected from the group consisting of InxGa1-xAs, InxGa1-xSb, InxGa1-xN, SiGe, and Ge, wherein X is between 0.1 and 0.99. The methods may include pulsing a silane to form a silicon monolayer and cycling dosing of the chlorosilane and the silane. Layered compositions include a first layer selected from the group consisting of InxGa1-xAs, InxGa1-xSb, InxGa1-xN, SiGe, and Ge, wherein X is between 0.1 and 0.99, and a second layer, wherein the second layer comprises Si—H and Si—OH. |
| US09607914B2 |
Molded composite enclosure for integrated circuit assembly
Embodiments of the present disclosure are directed toward a molded composite enclosure for an integrated circuit (IC) assembly. In one embodiment, an enclosure for an integrated circuit (IC) assembly may include a molded lid structure having a body portion, and a side portion that extends from the body portion and forms a cavity configured to house the IC assembly, wherein the body portion and the side portion share a contiguous interior material comprising a polymer and share a contiguous exterior material comprising a metal, the contiguous interior material having an opening formed in the body portion such that the IC assembly can be thermally coupled with the contiguous exterior material through the opening. Other embodiments may be described and/or claimed. |
| US09607913B1 |
Low power, temperature regulated circuit for precision integrated circuits
Various embodiments provide a temperature regulated circuit. The temperature regulated circuit includes a suspended mass that is positioned in an opening of a frame. The suspended mass is suspended from the frame by a plurality of support beams that may be made of thermally insulating material. The suspended mass provides a thermally isolated substrate for an integrated circuit. The suspended mass also includes a temperature sensor configured to measure a temperature of the integrated circuit, and a heater configured to heat the integrated circuit. A controller is positioned on the frame and is configured to receive temperature measurements from the temperature sensor and control the heater based on the temperature measurements. |
| US09607910B2 |
Limiting adjustment of polishing rates during substrate polishing
A method of controlling polishing includes polishing a region of a substrate at a first polishing rate, measuring a sequence of characterizing values for the region of the substrate during polishing with an in-situ monitoring system, determining a polishing rate adjustment for each of a plurality of adjustment times prior to a polishing endpoint time, and adjusting a polishing parameter to polish the substrate at a second polishing rate. The time period is greater than a period between the adjustment times and the projected time is before the polishing endpoint time. The second polishing rate is the first polishing rate as adjusted by the polishing rate adjustment. |
| US09607909B2 |
Analysis device, analysis method, film formation device, and film formation method
An analysis device includes an X-ray generation part configured to generate four monochromatic X-rays with different energies to irradiate a sample, an electrically conductive sample stage configured to place the sample thereon and formed of an electrically conductive material, an electrode configured to detect an electric current carried by irradiating the sample with the four monochromatic X-rays with different energies, and an electric power source configured to apply a voltage between the electrically conductive sample stage and the electrode, wherein the four monochromatic X-rays with different energies are X-rays included within a range from an absorption edge of a compound semiconductor included in the sample to a higher energy side of 300 eV. |
| US09607908B1 |
Method of manufacturing semiconductor device
Provided is a technique capable of uniformizing the characteristics of a film after a plurality of substrates are processed. A method of manufacturing a semiconductor device may include: (a) loading a substrate into a process chamber; (b) processing the substrate by performing: (b-1) supplying and exhausting a process gas into and from the process chamber without activating the process gas; (b-2) supplying and exhausting the process gas into and from the process chamber while activating the process gas; (b-3) measuring an amount of impurity desorbed from the substrate while performing (b-2); and (b-4) measuring a gas exhausted from the process chamber after performing (b-3); (c) calculating a process data based on: a first measurement data obtained by repeating (b-3); and a second measurement data obtained by repeating (b-4); and (d) determining whether to terminate (b) based on the process data. |
| US09607907B2 |
Electric-programmable magnetic module and picking-up and placement process for electronic devices
A picking-up and placement process for electronic devices comprising: (a) providing a first substrate having a plurality of electronic devices formed thereon, the electronic devices being arranged in an array, and each of the electronic devices comprising a magnetic portion; (b) selectively picking-up parts of the electronic devices from the first substrate via a magnetic force generated from an electric-programmable magnetic module; and (c) bonding the parts of the electronic devices picked-up by the electric-programmable magnetic module with a second substrate. |
| US09607905B2 |
Method of measuring breakdown voltage of semiconductor element and method of manufacturing semiconductor element
A method of measuring a breakdown voltage of a semiconductor element includes the steps below. A wafer provided with a plurality of semiconductor elements each having an electrode is prepared. The wafer is divided into a plurality of chips provided with at least one semiconductor element. After the step of division into the plurality of chips, a breakdown voltage of the semiconductor element is measured while a probe is in contact with the electrode of the semiconductor element in an insulating liquid. |
| US09607902B2 |
Semiconductor structures and fabrication methods thereof
A method for forming a semiconductor structure includes sequentially providing a semiconductor substrate having NFET regions and NFET regions; forming an insulation layer on the semiconductor substrate; forming a sacrificial layer on the insulation layer; forming first trenches in the PFET regions, and second trenches in the NFET regions; forming a third trench on the bottom of each of the first trenches and the second trenches; forming a first buffer layer in each of the first trenches and the second trenches by filling the third trenches; forming a first semiconductor layer on each of the first buffer layers in the first trenches and the second teaches; removing the first semiconductor layers in the second trenches; forming a second buffer layer with a top surface lower than the insolation layer in each of second trenches; and forming a second semiconductor layer on each of the second buffer layers. |
| US09607900B1 |
Method and structure to fabricate closely packed hybrid nanowires at scaled pitch
Techniques for forming closely packed hybrid nanowires are provided. In one aspect, a method for forming hybrid nanowires includes: forming alternating layers of a first and a second material in a stack on a substrate; forming a first trench(es) and a second trench(es) in the stack; laterally etching the layer of the second material selectively within the first trench(es) to form first cavities in the layer; growing a first epitaxial material within the first trench(es) filling the first cavities; laterally etching the layer of the second material selectively within the second trench(es) to form second cavities in the layer; growing a second epitaxial material within the second trench(es) filling the second cavities, wherein the first epitaxial material in the first cavities and the second epitaxial material in the second cavities are the hybrid nanowires. A nanowire FET device and method for formation thereof are also provided. |
| US09607896B2 |
Use of repellent material to protect fabrication regions in semi conductor assembly
A method of preparing semiconductor dies from a semiconductor wafer having a plurality of fabrication regions separated by dicing lines on the top side of the wafer, and an adhesive coating on the back side of the wafer, comprises applying a repellent material to the fabrication regions and dicing lines where the adhesive coating is not intended to be printed; applying the adhesive coating to the back side of the wafer; removing the repellent material; and separating the wafer along the dicing lines into individual dies. |
| US09607893B1 |
Method of forming self-aligned metal lines and vias
Disclosed are embodiments of a method, wherein metal lines and vias of an integrated circuit IC) metal level of are formed without requiring separate cut masks to pattern the trenches for the metal lines and the via holes for the vias. Trenches are formed in an upper portion of a dielectric layer. Each trench is filled with a sacrificial material. A mask is formed above the dielectric layer and patterned with one or more openings, each opening exposing one or more segments of the sacrificial material in one or more of the trenches, respectively. A sidewall spacer is formed in each opening and a selective etch process is performed to form one or more via holes that extend through the sacrificial material and through the lower portion of the dielectric layer below. Subsequently, all the sacrificial material is removed and metal is deposited, thereby forming self-aligned metal lines and via(s). |
| US09607891B2 |
Aluminum interconnection apparatus
An aluminum interconnection apparatus comprises a metal structure formed over a substrate, wherein the metal structure is formed of a copper and aluminum alloy, a first alloy layer formed underneath the metal structure and a first barrier layer formed underneath the first alloy layer, wherein the first barrier layer is generated by a reaction between the first alloy layer and an adjacent dielectric layer during a thermal process. |
| US09607889B2 |
Forming structures using aerosol jet® deposition
Method and apparatus for direct writing of passive structures having a tolerance of 5% or less in one or more physical, electrical, chemical, or optical properties. The present apparatus is capable of extended deposition times. The apparatus may be configured for unassisted operation and uses sensors and feedback loops to detect physical characteristics of the system to identify and maintain optimum process parameters. |
| US09607887B1 |
Method of manufacturing semiconductor device
In one embodiment, a method of manufacturing a semiconductor device includes forming a convex portion including an interconnect and a first film above a substrate, forming a second film on the convex portion, and forming a concave portion having a first bottom face of the first film and a second bottom face lower than the upper face of the first film in the second film. The method further includes forming a polymer film in the concave portion by using a polymer that includes first and second portions respectively having first and second affinities for the first film, phase-separating the first and second portions to form a first pattern containing the first portion and located on the first bottom face and a second pattern containing the second portion and located on the second bottom face in the polymer film, and selectively removing the first or second pattern. |
| US09607883B2 |
Trench formation using rounded hard mask
A method embodiment includes forming a hard mask over a dielectric layer, patterning the hard mask to form an opening, forming a passivation layer on sidewalls of the opening, and forming a trench in the dielectric layer by extending the opening into the dielectric layer using an etching process. The sidewalls of the opening are etched to form a rounded profile in the hard mask and a substantially perpendicular profile in the dielectric layer. |
| US09607881B2 |
Insulator void aspect ratio tuning by selective deposition
Disclosed herein is a structure conductive lines disposed in a base layer and separated by a first region. Pillars are each disposed over a respective one of the conductive lines. A dielectric fill layer is disposed over the pillars and extending between the pillars into the first region, and a void is disposed in the dielectric fill layer in the first region between the conductive lines. |
| US09607880B2 |
Silicon-on-insulator substrate and method of manufacturing thereof
A method of manufacturing a silicon-on-insulator (SOI) substrate is provided. The method includes forming an island-shaped insulating layer on a first surface of a first semiconductor substrate in a first region, forming a silicon epitaxial layer on the first surface of the first semiconductor substrate so as to cover the island-shaped insulating layer, forming a trench by etching the silicon epitaxial layer so as to expose the island-shaped insulating layer, and forming a first insulating adhesive layer on the silicon epitaxial layer and the island-shaped insulating layer so as to fill the trench. |
| US09607878B2 |
Shallow trench isolation and formation thereof
One or more methods of forming shallow trench isolation (STI) and resulting semiconductor arraignments are provided. A method of forming STI includes forming a nitride liner in a first opening and second opening and recessing the nitride liner in the first opening and second opening while forming an oxide structure in the first opening and second opening, thus forming a first STI region in the first opening and a second STI region in the second opening. A semiconductor arraignment includes a first STI region in an active area and a second STI region in an isolation area, where a first recessed nitride layer height in the first STI region is different than a second recessed nitride layer height in the second STI region. |
| US09607876B2 |
Semiconductor devices with back surface isolation
Circuits, structures and techniques for independently connecting a surrounding material in a part of a semiconductor device to a contact of its respective device. To achieve this, a combination of one or more conductive wells that are electrically isolated in at least one bias polarity are provided. |
| US09607875B2 |
Adhesive composition, laminate, and stripping method
An adhesive composition for temporarily attaching a substrate to a support plate which supports the substrate, and includes a thermoplastic resin and a release agent. |
| US09607873B2 |
Apparatus and operation method thereof
An apparatus includes a body and a surface for receiving a semiconductor wafer carrier is provided. A nozzle and a venting hole are provided on the surface. The semiconductor wafer carrier has at least one selectively closable capped opening at a bottom, top and/or side surface thereof. The capped opening is configured to couple to, and be accessible by, the nozzle and receive gas output from the nozzle so as to create a substantially oxygen free environment within the semiconductor wafer carrier. The vent hole is configured to allow gas to flow out of the semiconductor wafer carrier. In addition, the apparatus includes a sensor and a controller. The sensor is configured to monitor an ambient condition in the semiconductor wafer carrier, and the controller is configured to adjust a control valve based on the ambient condition so as to control the gas flow or output from the nozzle. |
| US09607872B2 |
Inline system
An inline system including a first apparatus having a first processing unit for processing a workpiece and an unloading area for unloading the workpiece processed by the first processing unit, a second apparatus having a loading area for loading the workpiece unloaded from the unloading area and a second processing unit for processing the workpiece loaded to the loading area, a transfer unit for transferring the workpiece from the unloading area to the loading area, and a position detecting unit for imaging the unloading area to detect the position of the unloading area and also imaging the loading area to detect the position of the loading area. The transfer unit transfers the workpiece from the unloading area to the loading area according to the position of the unloading area and the position of the loading area detected by the position detecting unit. |
| US09607869B2 |
Bonding system
An object of the present disclosure is to reduce a footprint. A bonding system of the present disclosure includes a first processing station, a second processing station, and a carry-in/out station. The first processing station includes a first conveyance region, a coating device, a heating device, and a first delivery block. The second processing station includes a plurality of bonding devices, a second conveyance region, and a second delivery block. Each of the plurality of bonding devices bonds the first substrate to the second substrate. The second conveyance region is a region configured to convey the first substrate and the second substrate to and from the plurality of bonding devices. The second delivery block delivers the first substrate, the second substrate and the superimposed substrate between the first conveyance region and the second conveyance region. |
| US09607860B2 |
Electronic package structure and fabrication method thereof
A method for fabricating an electronic package structure is provided, which includes the steps of: forming a circuit layer on a conductor; disposing an electronic element on the circuit layer; forming an insulating layer on the conductor to encapsulate the electronic element and the circuit layer; and removing portions of the conductor so as to cause the remaining portions of the conductor to constitute a plurality of conductive bumps. As such, when the electronic package structure is disposed on a circuit board through an SMT (Surface Mount Technology) process, the conductive bumps are easily aligned with contacts of the circuit board, thereby effectively improving the yield of the SMT process. |
| US09607856B2 |
Selective titanium nitride removal
Methods are described herein for selectively etching titanium nitride relative to dielectric films, which may include, for example, alternative metals and metal oxides lacking in titanium and/or silicon-containing films (e.g. silicon oxide, silicon carbon nitride and low-K dielectric films). The methods include a remote plasma etch formed from a chlorine-containing precursor. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents react with the titanium nitride. The plasma effluents react with exposed surfaces and selectively remove titanium nitride while very slowly removing the other exposed materials. The substrate processing region may also contain a plasma to facilitate breaking through any titanium oxide layer present on the titanium nitride. The plasma in the substrate processing region may be gently biased relative to the substrate to enhance removal rate of the titanium oxide layer. |
| US09607852B2 |
Methods of dividing layouts and methods of manufacturing semiconductor devices using the same
Target pattern layouts that include lower and upper target patterns are designed. Each lower target pattern is combined with a upper target pattern that at least partially overlaps a top surface thereof to form combination structures. The combination structures are divided into first and second combination structures. A first target pattern is formed from the lower target pattern in the first combination structure and a third target pattern is formed from the upper target pattern in the first combination structure. The first and third target patterns are formed in first and third lithography processes, respectively. A second target pattern is formed from the lower target pattern in the second combination structure and a fourth target pattern is formed from the upper target pattern in the second combination structure. The second and fourth target patterns are formed in second and fourth lithography processes, respectively. |
| US09607850B2 |
Self-aligned double spacer patterning process
Embodiments of the present disclosure are a method of forming a semiconductor device and methods of patterning a semiconductor device. An embodiment is a method of forming a semiconductor device, the method including forming a first hard mask layer over a semiconductor device layer, forming a set of mandrels over the first hard mask layer, and forming a first spacer layer over the set of mandrels and the first hard mask layer. The method further includes forming a second spacer layer over the first spacer layer, patterning the first spacer layer and the second spacer layer to form a mask pattern, and patterning the first hard mask layer using the mask pattern as a mask. |
| US09607839B2 |
NLDMOS transistor and fabrication method thereof
An N-type Lateral Diffused Metal-Oxide-Semiconductor (NLDMOS) transistor is provided. The NLDMOS transistor comprises a P-type substrate; and a semiconductor layer having a deep N-type well region formed on the P-type substrate. Further, the NLDMOS transistor also includes at least a P-type body region and an N-type drift region formed in the deep N-type well region; and an N-type heavily doped drain region formed in the N-type drift region. Further, the NLDMOS transistor includes a P-type doped reverse type region formed below the N-type drift region in the deep N-type well region, being physically connected with the first P-type body region, and preventing carriers from escaping between the N-type source region and external devices. |
| US09607827B2 |
Method of manufacturing semiconductor device, and recording medium
A method of manufacturing a semiconductor device includes performing a cycle a predetermined number of times, the cycle including supplying a first precursor containing a specific element and a halogen group to form a first layer and supplying a second precursor containing the specific element and an amino group to modify the first layer into a second layer. A temperature of the substrate is set such that a ligand containing the amino group is separated from the specific element in the second precursor, the separated ligand reacts with the halogen group in the first layer to remove the halogen group from the first layer, the separated ligand is prevented from being bonded to the specific element in the first layer, and the specific element from which the ligand is separated in the second precursor is bonded to the specific element in the first layer. |
| US09607826B2 |
Semiconductor device manufacturing methods and methods of forming insulating material layers
Semiconductor device manufacturing methods and methods of forming insulating material layers are disclosed. In one embodiment, a method of forming a composite insulating material layer of a semiconductor device includes providing a workpiece and forming a first sub-layer of the insulating material layer over the workpiece using a first plasma power level. A second sub-layer of the insulating material layer is formed over the first sub-layer of the insulating material layer using a second plasma power level, and the workpiece is annealed. |
| US09607825B2 |
Hydrogen-free silicon-based deposited dielectric films for nano device fabrication
Embodiments of the present invention provide hydrogen-free dielectric films and methods of fabrication. A hydrogen-free precursor, such as tetraisocyanatosilane, and hydrogen-free reactants, such as nitrogen, oxygen (O2/O3) and nitrous oxide are used with chemical vapor deposition processes (PECVD, thermal CVD, SACVD, HDP CVD, and PE and Thermal ALD) to create hydrogen-free dielectric films. In some embodiments, there are multilayer dielectric films with sublayers of various materials such as silicon oxide, silicon nitride, and silicon oxynitride. In embodiments, the hydrogen-free reactants may include Tetra Isocyanato Silane, along with a hydrogen-free gas including, but not limited to, N2, O2, O3, N2O, CO2, CO and a combination thereof of these H-Free gases. Plasma may be used to enhance the reaction between the TICS and the other H-free gasses. The plasma may be controlled during film deposition to achieve variable density within each sublayer of the films. |
| US09607824B2 |
Semiconductor device including h-BN insulating layer and its manufacturing method
A semiconductor device includes a support substrate, an insulating layer provided on the support substrate, and a semiconductor element provided on the insulating layer. The insulating layer has a lower insulating layer consisting of amorphous boron nitride, and an upper insulating layer provided on the lower insulating layer and including amorphous boron nitride and an hexagonal system boron nitride (h-BN) particles. |
| US09607822B2 |
Pretreatment method for photoresist wafer processing
Certain embodiments herein relate to methods and apparatus for processing a partially fabricated semiconductor substrate in a remote plasma environment. The methods may be performed in the context of wafer level packaging (WLP) processes. The methods may include exposing the substrate to a reducing plasma to remove photoresist scum and/or oxidation from an underlying seed layer. In some cases, photoresist scum is removed through a series of plasma treatments involving exposure to an oxygen-containing plasma followed by exposure to a reducing plasma. In some embodiments, an oxygen-containing plasma is further used to strip photoresist from a substrate surface after electroplating. This plasma strip may be followed by a plasma treatment involving exposure to a reducing plasma. The plasma treatments herein may involve exposure to a remote plasma within a plasma treatment module of a multi-tool electroplating apparatus. |
| US09607821B2 |
Modified spectrum incandescent lamp
There is herein described a lamp having a light-transmissive envelope, a tungsten-halogen capsule and a coating disposed on the surface of the light-transmissive envelope or doped in the light-transmissive material. The light-transmissive envelope may comprise a light-transmissive material. The tungsten-halogen capsule can be positioned inside the light-transmissive envelope. |
| US09607820B2 |
Ion mobility spectrometer with upstream devices at constant potential
A mass spectrometer includes an ion mobility spectrometer or separator arranged upstream of a collision or fragmentation cell. Ions are separated according to their ion mobility within the ion mobility spectrometer or separator. The kinetic energy of the ions exiting the ion mobility spectrometer or separator is increased substantially linearly with time in order to optimize the fragmentation energy of ions as they enter the collision or fragmentation cell. During the time that the potential of the ion mobility spectrometer or separator is being varied, the potential of ion-optical components upstream of the ion mobility spectrometer or separator such as an ion source, ion guide, quadrupole mass filter, optional second collision or fragmentation cell and an ion trapping device are kept constant. |
| US09607819B1 |
Non-radioactive, capacitive discharge plasma ion source and method
A non-radioactive plasma ion source device includes at least four planar electrodes that define at least three chambers, including a discharger chamber and at least two additional chambers aligned along a major longitudinal axis of the housing. A discharger ionizes at least one of a transport gas and a discharge gas to form ions in the discharger chamber that are directed by a homogeneous electric field generated by the planar electrodes toward an analyte gas outlet. Ionized species of at least one of the transport gas and the discharge gas that are not entrained by a counterflow gas stream are discharged from the discharger chamber to form a stream of ionized particles that ionize a sample gas and thereby form a stream of ionized analyte particles of the same polarity. The ionized analyte particles are entrained with the stream of ionized particles and pass through an analyte gas outlet to an analyzer. |
| US09607807B2 |
Charged particle beam exposure apparatus suitable for drawing on line patterns, and exposure method using the same
There is provided a charged particle beam exposure apparatus which turns an array beam including a plurality of charged particle beams, being arranged side by side in a line in a direction intersecting line patterns, on and off at predetermined blanking timing, and thus performs irradiation when irradiated positions of the charged particle beams arrive at pattern positions. The charged particle beam exposure apparatus improves data processing control by segmenting a sample provided with line patterns into a plurality of exposure ranges each at a predetermined length in a direction of movement, and performing on-off control of the beams based on a point of time when the array beam passes on a reference position set in the exposure region. |
| US09607806B2 |
Charged particle multi-beam apparatus including a manipulator device for manipulation of one or more charged particle beams
The invention relates to a method and a device for manipulation of one or more charged particle beams of a plurality of charged particle beamlets in a charged particle multi-beamlet apparatus. The manipulator device comprises a planar substrate comprising an array of through openings in the plane of the substrate, each of these through openings is arranged for passing the at least one charged particle beamlet there through, wherein each of the through openings is provided with one or more electrodes arranged around the through opening, and a electronic control circuit for providing control signals to the one or more electrodes of each through opening, wherein the electronic control circuit is arranged for providing the one or more electrodes of each individual through opening with an at least substantially analog adjustable voltage. |
| US09607801B2 |
Friction welding of X-ray tube components using intermediate filler materials
A structure and associated process for joining dissimilar materials to form various components of an x-ray tube is illustrated that utilizes one or more intermediate or interfacial filler material members positioned between the primary welding or mating surfaces of the base material components to be joined. The use of the interfacial or intermediate filler material preserves the multiple benefits of friction welding, as well as enabling the joining of highly dissimilar material components, decreasing the required joining temperature, and providing increased microstructural control of the resulting weld or joint. |
| US09607799B2 |
Porous inlay for fuse housing
A fuse may include a housing having a cavity. The fuse may also include a fuse element disposed within the cavity; a plurality of terminals extending out of the housing and electrically connected to the fuse element; and porous material disposed in the cavity adjacent to the fuse element, the porous material having a plurality of pores, the porous material further comprising an open pore structure wherein at least some of the pores are disposed on an outer surface of the porous material facing the fuse element. |
| US09607792B2 |
Knob assemblies with encoder-controlled illumination
A knob assembly includes a repositionable knob having an interior framework and a light-transmissive indicia, at least one light source for projecting light into the knob to back-illuminate the indicia, a position sensor for providing an output dependent on the position of the knob, and a controller receiving the output from the sensor and controlling the intensity of the at least one light source to compensate for any light blocked by the interior framework, and maintain a substantially uniform illumination of the light-transmissive indicia so that it is viewable from the exterior of the knob. |
| US09607789B1 |
Switch assembly and method of operating same
A switch assembly and method of operation comprises a housing having top and bottom ends spaced about a longitudinal axis and a selectively movable knob coupled to a plunger arrangement having a shaft that extends from inside the housing to couple to the knob. The switch assembly also comprises a printed circuit board having at least one wiper for engaging a contact extending from the plunger arrangement. A step shaft projects from the shaft of the plunger arrangement such that when a maintained mode of operation is desired by the switch assembly, the step shaft engages a retaining assembly formed by a portion of the housing, and when a momentary mode of operation is desired by the switch assembly the step shaft is positioned such that is free from engaging the retaining assembly. |
| US09607784B2 |
Cradle assist devices and related kits and methods
Cradle-assist assemblies attached to the breaker cradle housing and/or base or residing at least partially in the breaker cradle housing and/or base include at least one actuator configured to laterally translate the at least one right and the at least one left lock members from the extended lock position to the retracted unlocked position in response to input from a user. The at least one actuator and/or transverse member(s) can be held in a defined position so that the lock members of the cradle can be locked in the respective retracted or extended positions until the cradle assist (internal) lock is manually or automatically released. |
| US09607782B2 |
Electronic housing for switching devices, in particular for low-voltage switching devices
An electronic housing is disclosed for switching devices, including a housing lower part and a housing upper part. In an embodiment, a guide is formed in the interface region between the housing upper part and the housing lower part such that the housing upper part can be slid onto the housing lower part in the X direction via the guide in a fully automatic process. |
| US09607778B2 |
Poly-vinylidene difluoride anode binder in a lithium ion capacitor
A lithium ion capacitor, including: an anode including: a conductive support; a first mixture coated on the conductive support including: a carbon sourced from coconut shell flour; a conductive carbon black; and a PVDF binder in amounts as defined herein, and where the PVDF binder has a weight average molecular weight of from 300,000 to 400,000; and a second mixture coated on the first mixture, the second mixture comprising micron-sized lithium metal particles having an encapsulating shell comprised of LiPF6, mineral oil, and a thermoplastic binder. Also disclosed is a method of making and using the lithium ion capacitor. |
| US09607776B2 |
Ultracapacitor with improved aging performance
An energy storage device such as an electric double layer capacitor has positive and negative electrodes, each including a blend of respective first and second activated carbon materials having distinct pore size distributions. The blend (mixture) of first and second activated carbon materials may be equal in each electrode. |
| US09607774B2 |
AMTEC unit cell with partially opened internal electrode and method for manufacturing the AMTEC cell
Disclosed are an open internal electrode AMTEC unit cell, a method for manufacturing the same and a method for connecting circuits. In order to overcome the difficulty in collecting electricity within a conventional AMTEC unit cell, an internal electrode of which a portion is open to the outside, so that the internal electrode and an external electrode can be electrically connected to each other at the outside of the unit cell, and a metal support is used as the internal electrode, so that the internal electrode has durability and stability, and a solid electrolyte is formed in the form of a thin film, and as a result, the AMTEC unit cell has an improved efficiency and a simpler manufacturing process. |
| US09607770B2 |
Method for producing capacitor
A capacitor having at least an anode body composed of a tungsten sintered compact and having less leakage current under high-voltage conditions and less variation in leakage current values, obtained by a production method including the steps of: compacting a tungsten powder to obtain a compression body; firing the compression body to obtain an anode body; applying voltage to the anode body, which is used as an positive electrode, in an alkaline fluid; chemically converting the surface layer of the anode body into a dielectric; optionally removing water from the anode body; and heat-treating the anode body, whose surface has been chemically converted into a dielectric, at a temperature of 100° C. or more and 260° C. or less. |
| US09607769B2 |
Multilayer ceramic capacitor having terminal electrodes and board having the same
A multilayer ceramic capacitor and a board having the same are provided. The multilayer ceramic capacitor includes a ceramic body including internal electrodes and having lead-out portions exposed to end surfaces thereof, and external electrodes disposed on portions of the end surfaces of the ceramic body to be connected to the lead-out portions of the internal electrodes, terminal electrodes coupled to both end portions of the ceramic body and including horizontal portions disposed below the ceramic body and vertical portions spaced apart from the end surfaces of the ceramic body and connected to the external electrodes. |
| US09607767B2 |
Laminate-type ceramic electronic component
A laminate-type ceramic electric component such as laminated ceramic capacitor which has excellent mechanical strength and also has thermal shock resistance at the same time is provided. A laminate-type ceramic electronic component includes an inner layer part, in which dielectric layers including ABO3 (which represents a perovskite crystal in which A contains at least Ba and B contains at least Ti) as a main component and internal electrode layers are alternately laminated; and a pair of outer layer parts which sandwich the inner layer part, wherein the outer layer parts include a continuous film containing a Ba—Si—Ti—O based crystal phase. |
| US09607760B2 |
Apparatus for rapidly solidifying liquid in magnetic field and anisotropic rare earth permanent magnet
An apparatus for solidifying liquid in a magnetic field includes a magnetic circuit applying the magnetic field greater than or equal to about 1 tesla to a solidified part. |
| US09607759B2 |
Implantable medical device including a molded planar transformer
The present disclosure provides methods and techniques associated with a planar transformer for an apparatus. The planar transformers include a substrate carrying electronic components, an upper core bonded on a first exterior surface of the substrate, and a lower core bonded on a second exterior surface opposed to the first side of the substrate. The electronic components include primary windings and secondary windings associated with the transformer. In some embodiments, the transformer includes encapsulant material that is dispensed over and between the components of the transformer to seal air gaps. |
| US09607758B2 |
Magnetically shielded three-phase rotary transformer
A three-phase transformer including a primary portion and a secondary portion, the primary portion including a first body made of ferromagnetic material and primary coils, the secondary portion including a second body made of ferromagnetic material and secondary coils, the first body defining a first annular slot of axis A and a second annular slot of axis A. The primary coils include a first toroidal coil of axis A in the first slot, a second toroidal coil of axis A in the first slot, a third toroidal coil of axis A in the second slot, and a fourth toroidal coil of axis A in the second slot, the second coil and the third coil being connected in series. |
| US09607756B2 |
Transformer for an inverter system and an inverter system comprising the transformer
A transformer includes a primary winding; a secondary winding; a first electrostatic screen located between the primary winding and the secondary winding and most proximate to the primary winding; and a second electrostatic screen located between the primary winding and the secondary winding and most proximate to the secondary winding. The first electrostatic screen is electrically connectable to a power supply electrically connectable to the primary winding and the second electrostatic screen is electrically connectable to a load electrically connectable to the secondary winding. The invention also includes an inverter system including the transformer. |
| US09607755B2 |
Inductor and inductor core
The inductor core has a higher magnetic permeability than air, and includes an endless channel adapted for containing an inductor winding, where the inductor core extends along a first axis A, and the inductor winding extends completely around the first axis A of the inductor core in such a way that the inductor winding has a number of discrete positions or first sections where it extends in a direction being perpendicular to the first axis A of the inductor core, and wherein the inductor winding, between the discrete positions or first sections, has second sections where it extends at least partly along the first axis A. |
| US09607753B2 |
Multilayer inductor
Disclosed herein is a multilayer inductor. The multilayer inductor according to an exemplary embodiment of the present invention includes a laminate on which a plurality of body sheets are multilayered; a coil part configured to have internal electrode patterns formed on the body sheet; a first gap made of a non-magnetic material located between the multilayered body sheets; a second gap made of a dielectric material located between the multilayered body sheets and located on a layer different from the first gap; and external electrodes formed on both surfaces of the laminate and electrically connected with both ends of the coil part. By this configuration, the exemplary embodiment of the present invention can remarkably improve DC biased characteristics without reducing breaking strength of the inductor. |
| US09607750B2 |
Inductor systems using flux concentrator structures
An apparatus (e.g., an inductor system) includes an elongate magnetic core, at least one coil wrapped around the magnetic core and a spacer configured to separate an inner side of the at least one coil from the magnetic core to provide a coolant passage between the inner side of the at least one coil and the magnetic core. The apparatus further includes at least one flux concentrator body positioned on an outer side of the at least one coil and configured to concentrate a magnetic flux on the outer side of the at least one coil. In some embodiments, the apparatus includes a frame configured to support the magnetic core, the at least one coil and the at least one flux concentrator body. In further embodiments, the at least one flux concentrator body may be mounted on at least one wall of an enclosure or chassis. |
| US09607748B2 |
Micro-fabricated integrated coil and magnetic circuit and method of manufacturing thereof
A micro-fabricated electromagnetic device is provided for on-circuit integration. The electromagnetic device includes a core. The core has a plurality of electrically insulating layers positioned alternatingly between a plurality of magnetic layers to collectively form a continuous laminate having alternating magnetic and electrically insulating layers. The electromagnetic device includes a coil embedded in openings of the semiconductor substrate. An insulating material is positioned in the cavity and between the coil and an inner surface of the core. A method of manufacturing the electromagnetic device includes providing a semiconductor substrate having openings formed therein. Windings of a coil are electroplated and embedded in the openings. The insulating material is coated on or around an exposed surface of the coil. Alternating magnetic layers and electrically insulating layers may be micro-fabricated and electroplated as a single and substantially continuous segment on or around the insulating material. |
| US09607744B2 |
Laser processing apparatus and laser irradiation method
A laser processing apparatus includes a laser irradiation unit has a structure providing an intensity distribution of the laser beam focused on the grain-oriented electrical steel sheet on a cross-section in a direction perpendicular to the scanning direction on the grain-oriented electrical steel sheet so as to satisfy Ib/Ia≦2, where Ra1 and Ra2 are distances between the centroid of the intensity distribution and positions at which the intensity integration value from the centroid of the intensity distribution is 43% of the total intensity integration value, beam intensities Ia1 and Ia2 are intensities of the laser beam corresponding to Ra1 and Ra2, respectively, Ia is the average value of Ia1 and Ia2 and Ib is the beam intensity at the centroid of the intensity distribution. |
| US09607743B2 |
R-T-B based sintered magnet
The present invention provides a permanent magnet with excellent adhesion strength with plated layer and without significant decrease in magnetic properties, compared to the conventional R-T-B based magnet. By means that the R-T-B based magnet as the raw material is applied to heating treatment for a long time, the major phase grains will form core-shell like structures in the R-T-B based magnet in which R1 and Ce are included as an essential of R. When the mass concentration of R1 and Ce in the core portion is set as αR1 and αCe respectively and that of R1 and Ce in the shell portion is set as βR1 and βCe respectively, the ratio (B/A) between the mass concentration ratio of R1 to Ce in the shell portion (βR1/βCe=B) and that of R1 to Ce in the core portion (αR1/αCe=A) is 1.1 or more. |
| US09607742B2 |
R-T-B based alloy strip, and R-T-B based sintered magnet and method for producing same
An R-T-B based alloy strip containing dendritic crystals including a R2T14B phase, wherein on at least one surface, the average value for the widths of the dendritic crystals is no greater than 60 μm, and the number of crystal nuclei in the dendritic crystals is at least 500 per 1 mm square area. |
| US09607740B2 |
Hard-soft magnetic MnBi/SiO2/FeCo nanoparticles
Core-shell-core nanoparticles of an iron-cobalt alloy core, a silica shell and a manganese bismuth alloy core or nanoparticle on the surface of the silica shell (FeCo/SiO2/MnBi) are provided. The core-shell-core nanoparticles are alternative materials to rare-earth permanent magnets because of the hard magnetic manganese bismuth in nanometer proximity to the soft magnetic iron cobalt. |
| US09607739B2 |
Method for bonding flat cable and bonding object, ultrasonic bonding device, and cable
Provided is a method capable of reducing the amount of a coating part remaining between a conductor and a bonding object. A chip comes closer to an anvil so that the flat cable and the terminal are sandwiched between the chip and the anvil. The flat cable and the terminal are pressed so as to come close to each other. When the chip ultrasonically vibrates, vibrations of the chip propagate to the terminal, causing the terminal to ultrasonically vibrate. Then heat is generated in a plate part by friction between the chip and the plate part. The coating part being positioned between the conductor and the plate part melts from the generated heat and is removed. Thereby the conductor and the plate part come into contact with each other resulting in a solid-phase bonding together. |
| US09607736B2 |
Insulated wire
According to one embodiment, an insulated wire is disclosed. The wire includes a conductor and an insulating film formed on the conductor, the insulating film including a first layer of a first polyamideimide containing an adhesion improver; a second layer of a second polyamideimide obtained by reacting an isocyanate component containing 10 to 70 mol % in total of 2,4′-diphenylmethane diisocyanate and dimer acid diisocyanate with an acid component; and a third layer of a polyimide obtained by reacting an acid component containing 50 to 80 mol % of 3,3′,4,4′-biphenyl tetracarboxylic dianhydride and 20 to 50 mol % of pyromellitic anhydride with a diamine component containing 4,4′-diaminodiphenyl ether. |
| US09607732B2 |
Polymeric coatings for coated conductors
Coated conductors including a conductive core at least partially surrounded by a polymeric coating. The polymeric coating has an α-olefin based polymer and an α-olefin based block composite. The α-olefin block composite has block copolymers having hard segments and soft segments. |
| US09607730B2 |
Non-oleic triglyceride based, low viscosity, high flash point dielectric fluids
A vegetable-based dielectric fluid comprising in weight percent of triglycerides based on the weight of the fluid: A. Greater than 0 to 100% of at least one of C14:1 or C16:1 fatty acids; and at least one of: B. No more than (≦) 10% of C18:1 fatty acids; C. No more than (≦) 12% of one or more polyunsaturated fatty acids; and D. No more than (≦) 7% of one or more saturated fatty acids. The dielectric fluid is a useful transformer oil. |
| US09607727B2 |
Anisotropic electroconductive particles
An anisotropic electroconductive particle including a first insulating layer, a first conductive layer disposed on the first insulating layer, and a second insulating layer disposed on the first conductive layer. |
| US09607725B2 |
Graphene structure, method for producing the same, electronic device element and electronic device
Provided are a graphene structure and a method for producing the same in which graphene can be patterned with high precision, and thereby microfabrication of electronic device elements and electronic devices using graphene is possible and the manufacturing cost can be notably reduced. A resist film is precisely patterned on a substrate, hydrophilized films are formed in openings of the resist film, and then GO is selectively fixed on the portions of the hydrophilized films by a chemical bond utilizing the hydrophilicity of the GO, and the GO is reduced to obtain a graphene structure in which graphene is selectively fixed to only the portions of the hydrophilized films. Thus, the graphene structure is constituted by disposing graphene on a substrate and forming a bond, by hydrophilization treatment, between the hydrophilized portion of the substrate and the graphene and/or between the unhydrophobized portion of the substrate and the graphene. |
| US09607723B2 |
Ultra thin radiation window and method for its manufacturing
For manufacturing a radiation window for an X-ray measurement apparatus, and etch stop layer is first produced on a polished surface of a carrier. A thin film deposition technique is used to produce a structural layer on an opposite side of said etch stop layer than said carrier. The combined structure comprising said carrier, said etch stop layer, and said structural layer is attached to a region around an opening in a support structure with said structural layer facing said support structure. The carrier is etched away. |
| US09607714B2 |
Hardware command training for memory using write leveling mechanism
A method of training a command signal for a memory module. The method includes programming a memory controller into a mode where a single bit of an address signal is active for a single clock cycle. The method then programs a programmable delay line of the address signal with a delay value and performs initialization of the memory module. The memory module is then placed in a write leveling mode. A write leveling procedure is then performed and a response to the write leveling procedure is determined from the memory module. A determination is made whether the memory module is in a pass state or an error state based on the response. |
| US09607711B1 |
Semiconductor memory device and operating method thereof
There are provided a semiconductor memory device and an operating method thereof. A semiconductor memory device includes a memory cell array including a plurality of memory strings, a peripheral circuit for performing a program operation on the plurality of memory strings, and a control logic for controlling the peripheral circuit to apply a program voltage increased by at least two steps to a selected word line among a plurality of word lines connected to the plurality of memory strings and sequentially apply an initial setting voltage and a pass voltage to word lines adjacent to the selected word line, wherein the initial setting voltage is decreased as the program voltage is increased. |
| US09607710B2 |
Read-threshold calibration in a solid state storage system
A read-threshold calibration method in a solid state storage system including measuring a threshold voltage distribution of solid state storage elements; determining a threshold voltage; decoding data according to the determined threshold voltage; filtering the threshold voltage distribution of solid state storage elements with a predetermined filter length when the decoding fails; changing the filter length; and repeating the determining, decoding, filtering, and changing steps with the changed filter length until the decoding is successful. |
| US09607706B1 |
Semiconductor memory device
A semiconductor memory device includes a first memory bank and a second memory bank; an address counter unit including: a first address counter suitable for outputting a first counting address signal corresponding to the first memory bank; and a second address counter suitable for outputting a second counting address signal corresponding to the second memory bank; a first output control unit suitable for generating first column address signals in response to the first counting address signal during a data input operation, and generating the first column address signals in response to the second counting address signal during a data output operation; and a second output control unit generating second column address signals in response to the second counting address signal during the data input operation and the data output operation. |
| US09607703B2 |
Memory system
According to one embodiment, a memory system includes a memory and a setting unit. The memory includes a memory cell array and a peripheral circuit. The memory cell array includes a plurality of memory cells, each of which holds an electrical charge. The peripheral circuit is configured to read a value from each memory cell by comparing a quantity of an electrical charge held in the memory cell with a determination threshold. The memory stores first data in the memory cell array. The first data include a plurality of values. The setting unit is configured to change the determination threshold according to the number of values which are different in second data and third data among the plurality of values. The second data are first data before being written to the memory. The third data are first data that have been read from the memory. |
| US09607700B2 |
Non-volatile memory device, memory system, and methods of operating the device and system
The method of operating a non-volatile memory device includes dumping data stored in input latches of a page buffer to other latches of the page buffer to receive second data to be written to a second cell group of a memory cell array from outside the non-volatile memory device during writing of first data to a first cell group of the memory cell array. In the method, receiving of the second data may be finished before the writing of the first data is finished. |
| US09607699B2 |
Memory system including semiconductor memory device and operating method thereof
An operating method of a memory system including first and second one half pages includes acquiring first and second partial data from main data; performing a first program operation to the first one half page of a selected page with the first partial data; and performing a second program operation to the second one half page of the selected page with the second partial data. The first and second partial data may be programmed in the same first column region in the first and second one half pages, respectively. |
| US09607696B2 |
Minimal maximum-level programming
A method for writing data, the method may include evaluating current levels of multiple memory cells that belong to a certain set of memory cells or receiving an indication about the current levels of the multiple memory cells; encoding a new data unit to provide an encoded data unit to be written to the multiple memory cells while minimizing an amount of changes in levels of the maximum cell level among the multiple memory cells required for storing the encoded data unit; and writing the encoded data unit to the multiple memory cells. |
| US09607693B2 |
Semiconductor storage device
A semiconductor storage device according to the present embodiments includes a first bit line and a first word line. A resistance-change memory element is connected to the first bit line and the first word line. A sense node is connected to the first bit line in a data read operation. A first transistor is connected between the sense node and the first bit line. A second transistor connects the first bit line and a power supply to each other in a data write operation. A first operational amplifier has one input connected to the first bit line, other input receiving a reference voltage, and an output connected in common to a gate of the first transistor and a gate of the second transistor. A sense circuit is connected to the sense node. |
| US09607690B2 |
High sum-rate write-once memory
Provided are modified one-hot (MOH) constructions for WOM codes with low encoding and decoding complexity, that achieve high sum-rates. Features include maximizing writing of data information values for successive rewrites, all-zero and all-one cell state vectors that represent a unique data information value that can be written for many generations, a very high number of writes, and does not sacrifice capacity. One embodiment comprises ordered or unordered MOH code that approaches the upper-bound for large n wits. According to the embodiments, before an erasure is needed, the majority of the wits are encoded, which provides level wearing and maximizes life of cells. |
| US09607686B2 |
Semiconductor memory device
A semiconductor memory device includes data path circuits and control circuits alternately disposed along a first direction. A first metal layer is disposed on the data path circuits and control circuits. Each of data path circuits includes a memory cells disposed in rows along the first direction and columns along a second direction crossing the first direction and a read/write circuit disposed at an end of the columns of memory cells. At least one pair of adjacent columns of memory cells has an electrical separation between the gate polysilicon layer the pair of adjacent memory cell columns—that is, gate conductor layer of the adjacent memory columns are electrically distinct. A word line in the first metal layer is segmented along the first direction into separately addressable portions. |
| US09607679B1 |
Refresh control device
A refresh control device is disclosed, which relates to a technology for efficiently storing weak cell refresh addresses. The refresh control device includes a weak cell address storage circuit to store a weak address, a weak cell address control circuit, and a row address control circuit. The weak cell address control circuit outputs a weak enable signal and a row address by comparing a refresh address with the weak address, and only activates the refresh address according to the comparison result or activates both the refresh address and the row address. The row address control circuit controls a refresh operation by selectively activating a word line of a bank in response to the refresh address, the weak enable signal, and the row address. |
| US09607673B1 |
Methods and systems for pin-efficient memory controller interface using vector signaling codes for chip-to-chip communication
Systems and methods are described for transmitting data over physical channels to provide a high speed, low latency interface such as between a memory controller and memory devices. Controller-side and memory-side embodiments of such channel interfaces are disclosed which require a low pin count and have low power utilization. In some embodiments of the invention, different voltage, current, etc. levels are used for signaling and more than two levels may be used, such as a vector signaling code wherein each wire signal may take on one of four signal values. |
| US09607672B2 |
Managing skew in data signals with adjustable strobe
An apparatus for controlling memory includes a memory controller, and a data interface that interfaces with and is in data communication with data lines, each having inherent skew. Each data line carries a data signal. The data lines connect the memory controller to the memory. The apparatus also includes data de-skewers, each associated with a corresponding data line, a strobe interface that interfaces with a strobe line that connects the memory controller to the memory and that applies a timing signal to the strobe line, and a strobe de-skewer connected to the strobe line. Each data de-skewer operates in read or write mode. A particular data line's data de-skewer applies a compensation skew to a data signal carried by that line. |
| US09607670B2 |
Data input circuit and semiconductor memory device including the same
A data input circuit may include a data latch unit suitable for latching input data as latch data in response to first and second latch signals; a data signal generation unit suitable for outputting first and second data signals corresponding to the latch data; a first drive unit suitable for pulling up or down a first input/output data line of an input/output data line pair in response to the first and second data signals; and a second drive unit suitable for pulling up or down a second input/output data line of the input/output data line pair in response to the first and second data signals, wherein the first and second drive units adjust pull-up levels of the first and second input/output data lines in response to a data input control signal. |
| US09607668B2 |
Systems, circuits, and methods for charge sharing
Systems, circuits, and methods are disclosed for charge sharing. In one such example system, a first line is configured to be driven to a first voltage representative of data to be placed on the first line and then precharged to a first precharge voltage. A second line is configured to be driven to a second voltage representative of data to be placed on the second line and then precharged to a second precharge voltage. A charge sharing device is coupled between the first line and the second line. The charge sharing device is configured to selectively allow charge from the first line to flow to the second line after the first and second lines are driven to the respective first and second voltages representative of data to be placed on the respective lines. |
| US09607665B2 |
Providing power availability information to memory
The present disclosure includes apparatuses and methods for providing power availability information to memory. A number of embodiments include a memory and a controller. The controller is configured to provide power and power availability information to the memory, and the memory is configured to determine whether to adjust its operation based, at least in part, on the power availability information. |
| US09607656B1 |
Dynamic multiple video ratings
Techniques are described for providing playback of media content based on dynamic multiple video ratings. Scenes of media content can be associated with content indicators describing the types of activities within the scene. The content indicators can be used to generate ratings for scenes of the media content and the ratings can be used to modify playback of the media content, for example, by skipping playback of scenes. |
| US09607655B2 |
System and method for seamless multimedia assembly
Systems and methods are provided for seamless assembly of video/audio segments. To achieve such seamless assembly during streaming/online progressive download of media, a second segment is downloaded to a client during the presentation of a first segment. The first segment is then attached to the beginning of the second segment, where no jitter or gap results with the transition point either in the video or audio portion of the segments. Hence, the merged segments are presented as a seamless assembly of video/audio segments, where the user is “unaware” that the merged segments are the result of two separate or different segments. To effectuate such gapless assembly of segments, a gapless media file is created for encoding the video and audio segments using a gapless audio encoding scheme, such as Ogg Vorbis, where synchronized, gapless audio tags are interleaved in the video segments. |
| US09607653B2 |
Apparatus, system and method of authomatically creating an age progression video
Embodiments of the present invention relate to a media processing engine that produces an age progression video of a person by using photos of the person. The processing engine sequences and manipulates the photos such that the focus in each chronological photo is on the person. The processing engine uses a sliding window for facial recognition across a wide age range such that pictures of the person at a younger age (e.g., infancy) are positively associated with pictures of the person at an older age (e.g., teenager). In some embodiments, the processing engine is implemented on a remote server that provides a backup or storage service to its members. The photos are located at the remote server. The age progression video can be downloaded and/or shared by a member with others. In some embodiment, the age progression video includes a text caption, such as a message promoting the service. |
| US09607649B1 |
Determining write-induced protrusion as a function of laser power using temperature measurements
A test involves iterations over a series of laser powers of a heat-assisted read/write head. The iterations involve writing to a recording medium at the selected laser power for a sufficient duration to ensure thermal equilibrium of the read/write head at an end of the write. A clearance-control heater of the read/write head is transitioned from a pre-write power before a start of the write to a steady-state write power. The iterations further involve measuring a temperature of the read/write head during the write and adjusting the steady-state write power to achieve a predefined difference between the temperature at the start of the write and the end of the write. The adjusted steady state write power is stored for each iteration. A write-induced protrusion is determined based on the iterations and used for calibration of the read/write head. |
| US09607645B2 |
Magnetic recording device
A magnetic recording device includes: a magnetic recording medium containing a plurality of recording layers; a magnetic recording head for conducting magnetic writing of information in the magnetic recording medium; and a magnetic reproducing head for conducting magnetic reading out of the information from the magnetic recording medium; wherein the magnetic recording head includes a high frequency oscillator for magnetically assisting the magnetic writing of the information so as to change a magnetization of at least one of the plurality of recording layers of the magnetic recording medium, thereby recording a plurality of information different from one another in the magnetic recording medium commensurate with a total amount of magnetization of the plurality of recording layers. |
| US09607644B2 |
Perpendicular magnetic recording medium
A magnetic recording medium having a thick magnetic recording layer of excellent magnetic characteristics is provided. The magnetic recording medium includes a non-magnetic substrate and a magnetic recording layer. The magnetic recording layer includes a plurality of first magnetic recording layers located at odd-numbered positions from the non-magnetic substrate, and one or more second magnetic recording layers located at even-numbered positions from the non-magnetic substrate. The first magnetic recording layers each have a granular structure that has first magnetic crystal grains with an ordered alloy and a first non-magnetic portion surrounding the first magnetic crystal grains and formed of a material having carbon as main component. The second magnetic recording layers each have a granular structure that has second magnetic crystal grains with an ordered alloy and a second non-magnetic portion surrounding the second magnetic crystal grains and formed of a material different from that of the first non-magnetic portion. |
| US09607639B2 |
Magnetic head and system having offset arrays
In one general embodiment, an apparatus includes at least two modules, each of the modules having an array of transducers, wherein the at least two modules are fixed relative to each other, wherein an axis of each array is defined between opposite ends thereof, wherein the axes of the arrays are oriented about parallel to each other, wherein the array of a first of the modules is offset from the array of a second of the modules in a first direction parallel to the axis of the array of the second module such that the transducers of the first module are about aligned with the transducers of the second module in an intended direction of tape travel thereacross; and a mechanism for orienting the modules about an axis orthogonal to the plane in which the arrays reside to control a transducer pitch presented to a tape. |
| US09607637B2 |
Head assembly and magnetic disk device
Head assembly and magnetic disk device, wherein reaction force induced by warpage of driving element during operation can be decreased and unnecessary resonance can be suppressed, in addition, displacement amount of head element can be efficiently obtained. A head assembly includes first buffering part connecting first reinforcing part and first displacement transferring part with flexural rigidity lower than those of first reinforcing part and first displacement transferring part; second buffering part connecting second reinforcing part and main part of flexure with flexural rigidity lower than those of second reinforcing part and main part of flexure; third buffering part connecting third reinforcing part and second displacement transferring part with flexural rigidity lower than those of third reinforcing part and second displacement transferring part; and fourth buffering part connecting fourth reinforcing part and main part of flexure with flexural rigidity lower than those of fourth reinforcing part and main part of flexure. |
| US09607633B1 |
Shingled magnetic recording interband track pitch tuning
Method and apparatus for positioning shingled magnetic recording (SMR) tracks on a rotatable data storage medium. In some embodiments, a first band of partially overlapping tracks is written the medium at a first track pitch. An adjacent, second band of partially overlapping tracks is written to the medium at the first track pitch. The second band has a first written track at a second track pitch with respect to a last written track in the first band. The second track pitch is determined in response to an error rate established for a test track using an adjacent track written at the first track pitch. |
| US09607627B2 |
Sound enhancement through deverberation
Sound enhancement techniques through dereverberation are described. In one or more implementations, a method is described of enhancing sound data through removal of reverberation from the sound data by one or more computing devices. The method includes obtaining a model that describes primary sound data that is to be utilized as a prior that assumes no prior knowledge about specifics of the sound data from which the reverberation is to be removed. A reverberation kernel is computed having parameters that, when applied to the model that describes the primary sound data, corresponds to the sound data from which the reverberation is to be removed. The reverberation is removed from the sound data using the reverberation kernel. |
| US09607626B1 |
Dynamically reconfigurable filter bank
A reconfigurable filter bank system that has an asymmetrical tree structure with multiple stages to generate multiband outputs. Each stage may include cascaded low-pass filters (LPFs), cascaded high-pass filters (HPFs) and/or all-pass filter(s) (APF(s)) having identical phase responses. As the cascaded LPFs, cascaded HPFs and APF(s) have identical phase responses, each frequency band of the multiband output may have an identical phase shift such that the frequency bands are in-phase and can be added together. The multiband outputs of the reconfigurable filter bank may have near-perfect reconstruction (e.g., small number of cross-band ripples) and therefore only minor distortion. In addition, the number of frequency bands and corresponding non-uniform bandwidths (e.g., frequency ranges) may be user-adjustable and/or reconfigurable during device operation. Further, the reconfigurable filter bank may have reduced computational complexity and/or latency. |
| US09607622B2 |
Audio-signal processing device, audio-signal processing method, program, and recording medium
An audio-signal processing device includes a decoding unit that decodes a compressed audio stream to obtain audio signals for a predetermined number of channels; a signal processing unit that generates 2-channel audio signals including left-channel audio signals and right-channel audio signals, on the basis of the predetermined-number-of-channels audio signals; and a coefficient setting unit that sets filter coefficients corresponding to the impulse responses for the digital filters, on the basis of format information of the compressed audio stream. The signal processing unit uses digital filters to convolve impulse responses for paths from sound-source positions of the channels to the left and right ears of a listener with the corresponding predetermined-number-of-channels audio signals and adds corresponding results of the convolutions for the channels to generate the left-channel audio signals and the right-channel audio signals. |
| US09607616B2 |
Method for using a multi-scale recurrent neural network with pretraining for spoken language understanding tasks
A spoken language understanding (SLU) system receives a sequence of words corresponding to one or more spoken utterances of a user, which is passed through a spoken language understanding module to produce a sequence of intentions. The sequence of words are passed through a first subnetwork of a multi-scale recurrent neural network (MSRNN), and the sequence of intentions are passed through a second subnetwork of the multi-scale recurrent neural network (MSRNN). Then, the outputs of the first subnetwork and the second subnetwork are combined to predict a goal of the user. |
| US09607615B2 |
Classifying spoken content in a teleconference
A method and an apparatus for classifying spoken content in a teleconference for a follower of the teleconference is disclosed. The method comprises: detecting a topic to which the spoken content belongs; determining a (overall) correlation degree between the follower and the spoken content at least according to a correlation degree between the follower and the topic; and classifying the spoken content according to the (overall) correlation degree between the follower and the spoken content. With the method and the apparatus, the correlation degree between the spoken content in the teleconference and the follower of the teleconference can be determined automatically, and the spoken content can be classified according to the correlation degree, so that the follower can selectively pay attention to some spoken contents during the teleconference, which reduces a burden of the follower and improves conference efficiency. |
| US09607614B2 |
Terminal, server and information pushing method
The present invention provides a terminal, comprising: a voice recognition unit for recognizing a voice during a call and generating recognition data; a first acquisition unit connected to the voice recognition unit and used for acquiring information correlated with the recognition data; and a display unit connected to the first acquisition unit and used for displaying the correlated information. The present invention also provides a server and an information pushing method. Through the technical schemes of the present invention, information correlated with the call content can be automatically and rapidly acquired according to the call content and presented to a user, thus facilitating timely referring of the user. |
| US09607613B2 |
Speech endpointing based on word comparisons
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for speech endpointing based on word comparisons are described. In one aspect, a method includes the actions of obtaining a transcription of an utterance. The actions further include determining, as a first value, a quantity of text samples in a collection of text samples that (i) include terms that match the transcription, and (ii) do not include any additional terms. The actions further include determining, as a second value, a quantity of text samples in the collection of text samples that (i) include terms that match the transcription, and (ii) include one or more additional terms. The actions further include classifying the utterance as a likely incomplete utterance or not a likely incomplete utterance based at least on comparing the first value and the second value. |
| US09607610B2 |
Devices and methods for noise modulation in a universal vocoder synthesizer
A device may receive an input indicative of acoustic feature parameters associated with speech. The device may determine a modulated noise representation for noise pertaining to one or more of an aspirate or a fricative in the speech based on the acoustic feature parameters. The aspirate may be associated with a characteristic of an exhalation of at least a threshold amount of breath. The fricative may be associated with a characteristic of airflow between two or more vocal tract articulators. The device may also provide an audio signal indicative of a synthetic audio pronunciation of the speech based on the modulated noise representation. |
| US09607609B2 |
Method and apparatus to synthesize voice based on facial structures
Disclosed are embodiments for use in an articulatory-based text-to-speech conversion system configured to establish an articulatory speech synthesis model of a person's voice based on facial characteristics defining exteriorly visible articulatory speech synthesis model parameters of the person's voice and on a predefined articulatory speech synthesis model selected from among stores of predefined models. |
| US09607608B2 |
Voice based diagnostic systems and methods
A method for voice based diagnostics can include receiving a voice command from a user at a computing device, performing, by the computing device, a number of diagnostic tests corresponding to a functionality of the computing device, and sending an audio message to the user, wherein the audio message corresponds to results of the number of diagnostic tests. |
| US09607607B1 |
Ultrasonic transmitter having adjustable output
An ultrasonic transmitter of an ultrasonic occupancy sensing device has adjustable ultrasonic signal output amplitude to prevent overload of an ultrasonic sensor associated with the ultrasonic occupancy sensing device. A circuit for controlling the operating voltage to a power driver of the ultrasonic transmitter allows field adjustment of the output thereof so that an optimal level (amplitude) for the transmitted ultrasonic signal may be found in an area of actual use (e.g., field adjustable). |
| US09607605B2 |
Ultrasonic sensor for capturing value documents and method for manufacturing the same
An ultrasonic sensor and method for using the same are arranged for capturing a value document transported through a capture region of the ultrasonic sensor. The ultrasonic sensor has an ultrasound transmitter arranged for emitting ultrasound into the capture region and an ultrasound receiver arranged for receiving ultrasound from the ultrasound transmitter from the capture region. A control and evaluation circuit is arranged for controlling the ultrasound transmitter and for capturing and evaluating the signals of the ultrasound receiver. A circuit carrier carries the control and evaluation circuit, the ultrasound transmitter, the ultrasound receiver, and conducting paths electrically connecting the control and evaluation circuit to the first and second ultrasonic transducers. The circuit carrier has a U-shaped configuration and two interconnected arm portions, and the ultrasound transmitter is held on one of the two arm portions and the ultrasound receiver on the other of the two arm portions. |
| US09607598B2 |
Acoustic sandwich panel and method
A sandwich panel including a core having a first major side and an opposed second major side, the core defining cavities, a first liner sheet connected to the first major side, the first liner sheet defining apertures, wherein each aperture provides fluid communication with an associated cavity, and a bulk absorber material and/or a thermal conductor material received in at least a portion of the cavities. |
| US09607596B2 |
Pressure transducer
The hammer union pressure transducer engages with a cinch nut of a hammer union coupling to cinch a nose end toward an internal sealing surface of a male component of the hammer union coupling. The transducer includes a connection end removably threaded to the nose end. An anti-rotation device engages the connection end and the nose end, inhibiting inadvertent unthreading. The anti-rotation device is removable or shearable, allowing unthreading of the connection end from the nose end as desired. A recess may be formed on the external sealing surface of the nose end and an insert may be disposed in the recess. The insert, if used, may be formed of a material that is different from a material of the nose end. An upgrade kit may also be employed and includes an adapter plate to connect to the nose end. |
| US09607594B2 |
Multimedia apparatus, music composing method thereof, and song correcting method thereof
A multimedia apparatus, a music composing method thereof, and a song correcting method thereof are provided. A music composing method includes setting a type of musical instrument digital interface (MIDI) data according to a user's input, sensing a user interaction, analyzing the sensed user interaction and determining a beat and a pitch of the user interaction, and generating MIDI data using the set type of MIDI data and the determined beat and pitch. |
| US09607591B2 |
System and method for rendering music
A system and method for rendering music is provided. The method includes: receiving a request for electronic content; parsing the electronic content to determine a music notation element; translating the music notation; creating a music notation object based on the translation; and rendering the music notation object via a browser application. The system includes: a connection module configured to receive a request for electronic content; a parser configured to parse the electronic content to determine a music notation element; an object module configured to translate the music notation and create a music notation object based on the translation; and a rendering module configured to render the music notation object to be displayed by a browser application. |
| US09607588B2 |
Electric guitar
Embodiments of the present disclosure relate generally to guitars or other string instruments that incorporate materials that are lighter than wood. Rather than achieving weight reduction by solely removing wood, which can weaken the structural integrity of the guitar and negatively alter sound quality, this disclosure provides replacement of removed wood with materials commonly used in aerospace. |
| US09607587B2 |
Hammer device and keyboard device for electronic keyboard instrument
A hammer device of an electronic piano with keys which swing in accordance with key depression, includes a hammer support that is made of a synthetic resin and has a fulcrum shaft, and a hammer having a shaft hole part for being fitted on the fulcrum shaft and configured to pivotally move about the fulcrum shaft in a manner interlocked with the swinging key. The fulcrum shaft has an outer peripheral surface formed by a pair of arcuately-curved surface portions opposite to each other and a pair of planar surface portions each extending between the pair of arcuately-curved surface portions and parallel to each other. |
| US09607585B2 |
Real-time video frame pre-processing hardware
A dynamically reconfigurable heterogeneous systolic array is configured to process a first image frame, and to generate image processing primatives from the image frame, and to store the primatives and the corresponding image frame in a memory store. A characteristic of the image frame is determined. Based on the characteristic, the array is reconfigured to process a following image frame. |
| US09607581B2 |
Display apparatus having oblique lines and method of driving the same
Provided is a display device including: a display panel, a timing controller, a gate driver, and a data driver. The display panel includes a display area configured to display an image and a non-display area adjacent to one side of the display area. The display area includes oblique lines, intersectional lines crossing and isolated from at least a part of the oblique lines, and pixels. Pixels coupled to the oblique lines or the intersectional lines and arranged along a line in one direction are defined into pixel rows. The display area further includes a plurality of areas divided by the pixel rows being successive. The number of pixels constituting one of adjacent ones of the pixel rows in at least one of the plurality of areas is different from the number of pixels constituting another thereof. |
| US09607579B2 |
Personal information device on a mobile computing platform
A method and apparatus for integrating a personal information device (PID) on a mobile computer that includes activating a first mode to display data originating with the PID in a first display area of a display. The mobile computer switches to a second mode to display data associated with the second mode in a second display area of the display. |
| US09607577B2 |
Dynamic power and brightness control for a display screen
An image is displayed on an electronic display device at a reduced power level. Power used by the display device is maintained below a predetermined maximum power level by uniformly scaling the initial optical intensity of an image to a lower optical intensity whenever displaying the image at the initial optical intensity would result in power consumption of the display device exceeding the predetermined maximum power level. |
| US09607576B2 |
Hybrid scalar-vector dithering display methods and apparatus
This disclosure provides systems, methods, and apparatus for generating images on a display using a hybrid scalar-vector dithering process. The hybrid scalar-vector dithering process includes a combination of a scalar dithering process and a vector dithering process. In the scalar dithering process, at least one color subfield is dithered based on the data within just that color subfield. In the vector dithering process, data across multiple color subfields is dithered together. In some implementations, the color subfield processed by the scalar dithering process is a composite color subfield, such as white (W), yellow (Y), cyan (C) and magenta (M). The color subfields processed by the vector dithering process can be component color subfields, such as red (R), green (G), and blue (B) color subfields. In some implementations, an identical dither mask is applied in both the vector and scalar portions of the hybrid scalar-vector dithering process. |
| US09607570B2 |
Magnifying tool for viewing and interacting with data visualization on mobile devices
In accordance with various embodiments, a magnifying tool is provided in a user interface for magnifying content displayed on a mobile device and any other device with a restricted or limited viewing screen. A mobile device, including a magnifying tool for magnifying content displayed on the mobile device, can comprise a computer readable storage medium and processor. The mobile device can include a touchscreen operable to receive input from a user and display content. When the mobile device receives a selection of a location on the touchscreen, the mobile device determines a position of the location on the screen, determines a portion of the screen to magnify, and magnifies the portion of the screen and overlays the magnified portion on the screen. |
| US09607569B2 |
Semiconductor device, electronic component, and electronic device
To provide a small driver IC, in a pass transistor logic circuit that converts k-bit digital signals into analog signals, transistors supplied with a first-bit signal are arranged in a line in the channel width direction. The channel width of transistors supplied with second to kth-bit signals is made larger than (e.g., preferably larger than two times and smaller than eight times) that of the transistors supplied with the first-bit signal. The transistors are preferably arranged such that transistors of the same conductivity type are located adjacent to each other wherever possible. |
| US09607568B2 |
Display panel driver and display device
A display panel driver includes: a grayscale amplifier receiving an input grayscale reference voltage and generating an output grayscale reference voltage corresponding to the input grayscale reference voltage; a voltage dividing resistor receiving the output grayscale reference voltage and generating a plurality of grayscale voltages by using the received output grayscale reference voltage; a decoder circuit selecting grayscale voltages from among the plurality of grayscale voltages in response to image data and outputting the selected grayscale voltages; and an output circuit outputting drive voltages corresponding to the selected grayscale voltages to output terminals to be connected to source lines of a display panel. The grayscale amplifier is configured such that the output grayscale reference voltage is adjustable by adjusting an offset voltage of the grayscale amplifier. |
| US09607565B2 |
Display device and method of initializing gate shift register of the same
Disclosed is a display device that comprises: a display panel; a level shifter shifting a start pulse, an initialization pulse, and N (N is an integer equal to or greater than 2)-phase shift clocks to a predetermined voltage; and a gate shift register comprising multiple stages respectively connected to scan lines of the display panel and shifting the start pulse in response to the N-phase shift clocks within a driving period defined by the start pulse to sequentially output a scan pulse, wherein the stages are simultaneously reset in response to the initialization pulse and the N-phase shift clocks within an initialization period preceding the driving period. |
| US09607563B2 |
Liquid crystal display device, method for driving liquid crystal display device, and electronic apparatus
A liquid crystal display device supplies an active scan signal to each scan line while skipping a portion of a plurality of the scan lines, per one horizontal scan period, in a direction of the m-th to the first scan lines, by a first scan line drive circuit, and supplies the active scan signal to each scan line while skipping the portion of the plurality of the scan lines, per one horizontal scan period, in a direction of the m+1-th to the 2m-th scan lines, by a second scan line drive circuit. Therefore, the liquid crystal display device synchronizes with a timing of supplying the active signal with the first scan line drive circuit and the second scan line drive circuit, and supplies a data signal whose polarity is inverted to a positive polarity potential and a negative polarity potential per one horizontal scan period, to a data line. |
| US09607558B2 |
Power management for modulated backlights
Power levels of a backlight are adjusted in a number of ways and based on a number of criteria. The adjustments result in a lower power consumption and, in some cases, may enhance audience attention to important objects in a scene. The adjustments comprise, for example, a combination of ramping down power (lowering final display brightness) in concert with corresponding compensatory LCD adjustments (increasing final display brightness). The adjustments may also include, for example, system dimming after ramp down/LCD adjustments are exhausted, or the shifting of an LDR2HDR curve. |
| US09607557B2 |
Electrowetting display apparatus and method of manufacturing the same
An electrowetting display apparatus includes a first substrate including a first electrode that receives a gray-scale voltage and a second electrode insulated from the first electrode and receiving a reference voltage, a second substrate, a fluid layer, and a color filter. The color filter has a first thickness in an area corresponding to the first electrode and a second thickness in an area corresponding to the second electrode, and the first thickness is larger than the second thickness. Accordingly, a cell gap of the electrowetting display apparatus is reduced, and color reproducibility of the electrowetting display apparatus is improved without sacrificing brightness. |
| US09607553B2 |
Organic light emitting diode display and method for sensing driving characteristics thereof
An organic light emitting diode display and a method for sensing driving characteristics thereof are discussed. The organic light emitting diode display supplies a data voltage of an input image to pixels each including an organic light emitting diode in a driving mode and senses changes in driving characteristics of the pixels in a sensing mode. The organic light emitting diode display in one example includes a low potential power voltage adjustment unit configured to reduce a low potential power voltage of the pixels to a negative voltage in the sensing mode and adjust the low potential power voltage to a ground level voltage in the driving mode, and a sensing unit configured to sense an anode voltage of the organic light emitting diode using an analog-to-digital converter in the sensing mode. |
| US09607552B2 |
Display device and luminance control method therefore
A display device and a luminance control method therefore are provided. The display device comprises a luminance controller that establishes multiple peak luminance control (PLC) points by equally dividing a PLC curve and limits the luminance at the PLC point corresponding to the highest average pixel level (APL) at the initial luminance as the PLC curve slopes downward. |
| US09607550B2 |
Scanning line driving device, display apparatus and scanning line driving method
A scanning line driving device drives scanning lines in a display unit including data lines each connected to a plurality of pixels arranged in a column direction and the scanning lines each connected to a plurality of pixels arranged in a row direction, the pixels arranged at respective intersections of the data lines and the scanning lines. The device is configured to sequentially keep each of the scanning lines in a selected state pursuant to a predetermined order and output a scanning line drive signal, which is set to a low level in a high-luminance display drive and to a high level in a low-luminance display drive, to all the scanning lines during a blanking period between a period in which one scanning line is kept selected and a period in which a next scanning line is kept selected. |
| US09607547B2 |
Organic light emitting display and driving method thereof
Disclosed are an organic light emitting display capable of preventing lowering of brightness and prolonging its a lifespan, and a driving method thereof. The organic light emitting display controls a level of a gate signal, by outputting a gate high voltage after controlling a level of the gate high voltage, according to a level of a threshold voltage sensed from each pixel of a display panel. |
| US09607546B2 |
Display panel and organic light emitting display device having the same
A display panel includes a plurality of pixel circuits. Each of pixel circuits comprises an emission unit including an organic light emitting diode, a pixel driving unit configured to drive an emission unit based on a scan signal and a data signal, and a switch unit configured to control an electrical connection between an emission unit and a pixel driving unit based on an emission signal. A first parasitic capacitance between an emission unit included in a first pixel circuit of pixel circuits and a pixel driving unit included in a first pixel circuit is smaller than a second parasitic capacitance between an emission unit included in a first pixel circuit and a pixel driving unit included in a second pixel circuit of pixel circuits adjacent to a first pixel circuit. |
| US09607543B2 |
Driving circuit
A driving circuit is provided, a driving unit of the driving circuit includes: a control unit utilized to control an output of a stage transmission signal; a stage transmission signal latch unit utilized to receive the stage transmission signal for generating a latch signal; a first and second scanning signal generation units; a first inverted output unit utilized to invert the first scanning signal; a second inverted output unit utilized to invert the second scanning signal. A configuration of a GOA circuit can be simplified. |
| US09607542B2 |
Display panel driving method, driving device and display device
The embodiments of the present invention provide a display panel driving method, a driving device and a display device, which can improve the time delay of the gate driving signals of a partitioned controlled display panel and reduce the production cost. The display panel comprises at least two time sequence controllers and at least two display areas, each of the time controllers corresponding to one of the display areas respectively; the driving method comprises each of the time sequence controllers obtaining a synchronization signal according to an obtained display signal of the corresponding display area, the synchronization signal comprising a starting time of a first line of scanning signals of the corresponding display area, the time sequence controllers adjusting the starting times of the first lines of the scanning signals according to the synchronization signals of at least one display area so as to make the starting times of the first lines of the scanning signals of all display areas are the same. |
| US09607541B2 |
Liquid crystal display device and method for driving same
Provided is a liquid crystal display device capable of reliably reducing power consumption during pause drive by controlling the timing of performing refresh.When there is an image change in externally inputted RGB data, or when the number of consecutive pause frames reaches a predetermined value, if the number of immediately preceding pause frames is less than a threshold BCTH, image signal refresh is performed once, or if the number of pause frames is greater than or equal to the threshold BCTH, boost charge refresh is performed first, and then, the image signal refresh is performed. As a result, it is rendered possible to reduce flicker due to luminance reduction, and it is also rendered possible to eliminate the need to perform refresh consecutively even if the frequency of RGB data is high (e.g., 30 Hz) during pause drive. |
| US09607537B2 |
Display region refresh
In embodiments of display region refresh, a display panel has addressable display regions that display at different display refresh rates. Display data is buffered to update the addressable display regions, and subsequent display data is received to further update the addressable display regions. A display controller can determine display update deltas that indicate pending display updates based on a comparison of the display data to the subsequent display data. A first addressable display region can then be refreshed at display refresh rate based on a first display update delta that corresponds to the first addressable display region, and a second addressable display region can be refreshed at a different display refresh rate based on a second display update delta that corresponds to the second addressable display region. |
| US09607533B1 |
Vented LED display and method of manufacturing
A vented LED display is described including an LED display panel having a plurality of LEDs disposed thereon and defining a plurality of vent slots between the plurality of LEDs, each of the plurality of vent slots having a vent height. The vented LED display also includes a unitary injection-molded vent having a plurality of louvers and coupled to the LED display panel such that each louver corresponds to at least one vent slot and includes a louver length extending downwardly to at least 75% of the vent height of the corresponding vent slot. |
| US09607532B2 |
Movable signage apparatus and method
The present disclosure relates to a system that includes a support member and a sign supported by the support member. The sign may have a generally planar shape and may extend in a plane. The system also includes a repositioning mechanism coupled to the sign and the support member. The repositioning mechanism rotates the sign substantially in-plane. The system may further include a controller for controlling rotation of the sign. In one implementation, the repositioning mechanism is retrofitted on an existing sign and an existing support member. The repositioning mechanism may include a power source attached to the support member that provides power to the repositioning mechanism. The repositioning mechanism may further include a linkage attached to the sign and a transmission for transferring rotational power to the sign, wherein the transmission is interconnected between the power source and the linkage. |
| US09607527B2 |
Converting audio to haptic feedback in an electronic device
In general, in one aspect, a method performed by one or more processes executing on a computer systems includes receiving an audio signal comprising a range of audio frequencies including high frequencies and low frequencies, converting a first portion of the range of audio frequencies into haptic data, shifting a second portion of the range of audio frequencies to a different range of audio frequencies, and presenting at least one of the converted first portion and the shifted second portion to a human user. Other implementations of this aspect include corresponding systems, apparatus, and computer program products. |
| US09607525B2 |
Impact and sound analysis for golf equipment
Golf performance and equipment characteristics may be determined by analyzing the impact between a golf ball and an impacting surface. In some examples, the impacting surface may be a golf club face. The impact between the golf ball and the surface may be measured based on sound and/or motion sensors (e.g., gyroscopes, accelerometers, etc.). Based on motion and/or sound data, various equipment-related information including golf ball compression, club head speed and impact location may be derived. Such information and/or other types of data may be conveyed to a user to help improve performance, aid in selecting golf equipment and/or to insure quality of golfing products. |
| US09607524B2 |
Method and system for generating and evaluating assessment sheets
A method, a system, and a computer program product for creating and evaluating assessment sheets are disclosed. The method includes identifying one or more first location identifiers based on one or more markings provided in a scanned master assessment sheet. A machine-readable code (MRC) is generated based on the one or more first location identifiers. The MRC is then split into a plurality of portions and embedded at various locations on a scanned pre-assessment sheet. The scanned pre-assessment sheet with the embedded MRC is then printed to generate the assessment sheets. Thereafter, one or more second location identifiers are identified based on one or more markings provided by evaluatees in each of the assessment sheets provided to them. The one or more second location identifiers are then compared with the one or more first location identifiers. The result of evaluation is provided based on the comparison. |
| US09607521B2 |
Method for the real time calculation of a planned trajectory, notably of a flight plan, combining a mission, and system for managing such a trajectory
The trajectory coming from a planned trajectory, managed by a system, and from at least one trajectory section sent by a third party system to the system, the method at least comprises: a preliminary step in which a knowledge base is produced comprising the calculation parameters and their field of use for the moving object, several envelopes of parameters being defined within the field of use corresponding to different operational constraints of the moving object; a first step in which the system initializes the planned trajectory according to the parameters of the preliminary step, the calculation parameters of the planned trajectory being contained in one of the envelopes; a second step in which the system receives a trajectory section sent by the third party system in order to be inserted in the planned trajectory by replacing a part of the trajectory; a third step in which the received and accepted section is simplified by segmentation in such a way that its calculation parameters are contained in the at least one of the envelopes; the system carrying out calculations on the basis of the simplified trajectory. |
| US09607520B2 |
Dynamic turbulence engine controller apparatuses, methods and systems
The DYNAMIC TURBULENCE ENGINE CONTROLLER APPARATUSES, METHODS AND SYSTEMS (“DTEC”) transform weather, terrain, and flight parameter data via DTEC components into turbulence avoidance optimized flight plans. In one implementation, the DTEC comprises a processor and a memory disposed in communication with the processor and storing processor-issuable instructions to receive anticipated flight plan parameter data, obtain terrain data based on the flight plan parameter data, obtain atmospheric data based on the flight plan parameter data, and determine a plurality of four-dimensional grid points based on the flight plan parameter data. The DTEC may then determine a non-dimensional mountain wave amplitude and mountain top wave drag, an upper level non-dimensional gravity wave amplitude, and a buoyant turbulent kinetic energy. The DTEC determines a boundary layer eddy dissipation rate, storm velocity, and eddy dissipation rate from updrafts, maximum updraft speed at grid point equilibrium level and storm divergence while the updraft speed is above the equilibrium level and identify storm top. The DTEC determines storm overshoot and storm drag, Doppler speed, eddy dissipation rate above the storm top, and determine eddy dissipation rate from downdrafts. The DTEC then determines the turbulent kinetic energy for each grid point and identifies an at least one flight plan based on the flight plan parameter data and the determined turbulent kinetic energy. |
| US09607516B2 |
Remaining energy supply warning system
A remaining energy supply warning system provides different low fuel level reminders and warnings according to a driving area determined by a navigation apparatus. When within a life domain of the driver, low fuel level reminders and warnings may be set at lower threshold amounts since the driver is well-acquainted with the area. Therefore, the driver of the vehicle will not be bothered by low fuel reminders and warnings when the amount of fuel remaining is still relatively high considering the driver's knowledge of the area. |
| US09607515B2 |
System and method for interacting with digital signage
Various systems and methods for interaction with digital signage are described herein. A system for interacting with digital signage, includes an identification module to identify, at an onboard system in a vehicle, a first roadside digital signage, the first roadside digital signage having first content; a communication module to receive a first option to perform a first action related to the first content; and a presentation module to display the first option via the onboard system. |
| US09607514B2 |
Drive assist device
A drive assist device assists a driver who is driving a vehicle by showing, on a display unit, information related to an indication state of a traffic signal including a remaining time until the indication state of the traffic signal changes. The drive assist device includes a processor configured to output a representation of the remaining time to the display unit. The processor is configured to set the representation of the remaining time to a first representation when the remaining time is greater than a predetermined value and set the representation of the remaining time to a second representation when the remaining time is less than or equal to the predetermined value. The second representation differs from the first representation in at least one of brightness, saturation, and hue. |
| US09607513B1 |
Systems and methods for informing driver of lane passing regulations
A method for informing a driver of a vehicle of lane passing regulations on a road. The method includes detecting a start of a no passing zone on a road, notifying the driver of the no passing zone, detecting an end of the no passing zone, and notifying the driver that the no passing zone has ended. |
| US09607512B2 |
Logical controller for vehicle barrier
A method and system utilize a logic based controller and a user actuatable device to provide a command to the logic based controller. The logic based controller receives the command, which may be prioritized, and processes the command in accordance with predefined logic to determine whether to actuate a vehicle barrier switch to raise or lower a vehicle barrier. |
| US09607511B2 |
Vehicle guidance system, vehicle guidance method, management device, and control method for same
This vehicle guidance system carries out guidance of vehicles that are traveling on roads making up a road network, the vehicle guidance system being provided with: a flow detection unit that detects the flow of vehicles on each of the roads making up a road network, and generates flow information indicating the detection result; a storage unit that creates associations between the flow information for the roads which has been generated by the flow detection unit, and road-identifying information indicating the corresponding roads, and storing the information; a decision unit that, for each of the roads making up the road network, specifies a candidate road that is a road which vehicles flow from the road in question, acquires the flow information that is stored in association with the road-identifying information indicating the specified candidate road in question, and based on the acquired flow information, decides on a flow increase or decrease policy of vehicles on the candidate road; and a guidance unit that carries out guidance of the vehicles, in accordance with the decision by the decision unit. |
| US09607508B2 |
System including a wireless dental instrument and universal wireless foot controller
A wireless, remote foot controller and a wireless instrument in direct communication with one another and method of operation. The remote foot controller can determine the wireless instrument in the hand of the dental professional and can determine whether the instrument is operational in an continuously variable mode or whether the instrument is operational at discrete speeds. The remote foot controller can then respond to activation by a user to provide a predetermined signal that drives the handheld unit with the appropriate signal. The remote foot controller is activated by application of pressure to the foot controller that provides tactile, sensory feedback to the user. The foot controller includes a circuit board, antenna and battery so that it is wireless. The circuit board includes communications protocol to permit the foot controller to communicate with several dental instruments. Although the foot controller is capable of controlling multiple dental instruments, it only controls one dental instrument at a time, usually the most recent device in the hands of the dental professional. |
| US09607507B1 |
User activity-based actions
Described are techniques and systems for determining a state of activity of a user, and performing operations responsive to the state. The state may be determined using environmental data and operational data. The environmental data provides data indicative of the user's level of activity and may include data from sensors such as cameras, microphones, motion sensors, and so forth. The operational data includes data about performance of one or more services which may be associated with the user. The state may indicate that the user is resting, awake, working, exercising, and so forth. For example, while the user is inactive, such as while resting, resource-intensive operations may be performed. By determining when the user is inactive and detecting unusual levels of activity by the service problems such as damage to the service or malicious activity may be identified. |
| US09607506B1 |
Wearable wireless controller
The present invention relates to a wearable universal wireless controller configured to generate control signals for controlling a plurality of devices without the need for hardware or software modification. Such controller comprises a plurality of stretch sensors and switch sensors associated with at least one glove or similar structure configured for being associated with a users' hand. The controller detects finger and hand movements and generates the appropriate communication signal based on values contained in a configuration table. The same wireless controller can control a plurality of devices without the need for reprogramming or mode selections. |
| US09607504B2 |
Apparatus and method for remote control in a short-range network, and system supporting the same
An apparatus and method for remote control in a short-range network system, and a system supporting the same are provided, in which from a remote device that remotely controls the application execution device using a predetermined Control User Interface (CUI), information about capability of the remote device is collected, a CUI request requesting a CUI to be used for remotely controlling a currently executed application and the information about the capability of the remote device are sent to an application server, a CUI matching the capability of the remote device is received from the application server in response to the CUI request, and the received CUI is sent to the remote device. |
| US09607502B1 |
Real-time incident control and site management
Embodiments of a system are disclosed for real-time incident control and site management, which enables update-to-date monitoring of every location of a multi-unit site and efficient direction of operations on a site-wide basis. The system communicates with parties onsite via text messaging or similar means, analyzes the communication to determine a status for each unit of the site, and presents a graphical overview of the site with the status information, which allows a commander using the system to control the actions of the parties onsite in an efficient and effective manner. The system also coordinates with support agencies, such as law enforcement agencies, to facilitate assistance of the parties onsite. |
| US09607500B2 |
System and method for prediction of threatened points of interest
Embodiments that are described herein provide improved methods and systems for predicting threatened POIs. In some embodiments, an automated location tracking system tracks the locations of one or more target individuals. The locations of the target individuals may be tracked, for example, by tracking the cellular phones of the targets, or using various other automated location tracking techniques. Based on the tracked locations, a prediction system anticipates the future locations of the targets. Over time, the system uses this information to progressively narrow down the list of possibly-threatened POIs. |
| US09607493B2 |
Portable security system
An apparatus embodiment includes a security module having a guard frame, a dome slidably engaged with the guard frame, and an alarm system inside the dome. The alarm system includes a controller and a radio frequency transceiver. The security module further includes a suction cup coupled to the dome, a valve in fluid communication with the suction cup and electrically connected to the controller, and a suction cup in fluid communication with the valve. An embodiment may further include a client application including software instructions for arming the alarm system, disarming the alarm system, and opening the valve. The security module may autonomously seek and/or link with another security module, thereby forming an ad hoc communications network to protect an object tethered to the security module by a wireless communications link and/or a security cable. |
| US09607492B2 |
Tactile pattern music generator and player
A device that produces patterned tactile sensations or events discernible to human touch from micro-actuators housed in a fabric, or other pliable material, where such actuated sensations or events are discernible by a user donning the fabric. The device is configured to convert electronically stored music or audio data into a sequence of patterned tactile sensations or events in a matrix across the fabric, providing a tactile representation of the music or audio data to the user. The discernible tactile sensations or events may alternately comprise retractable physical features, electric stimuli, and/or combinations of these. |
| US09607491B1 |
Apparatus for generating a vibrational stimulus using a planar reciprocating actuator
A planar reciprocating actuator (PRA) provides a linear motor configured and optimized for small displacement and oscillation, and can use the effect of a designed mechanical or magnetic spring to increase the amplitude of displacement at certain operating points. The PRA is intended to be used in vibrotactile and haptic applications. The PRA can generate various types of vibratory characteristics that may be perceived as distinct and readily user-identifiable haptic stimuli. |
| US09607489B2 |
Household appliance including information light device
A household appliance includes an information light device that projects light onto a surface to enable a user to determine whether or not the household device is in operation. The information light device may include a light guide. The light guide may be disposed along a side portion of the household appliance. |
| US09607486B2 |
Shopping process including monitored shopping cart basket weight
A computer-implemented process aiding a customer scan and rapid checkout process can include monitoring a shopping cart basket weight. The process includes monitoring, in a computerized processor installed to a shopping cart of a customer, a signal from a weight device configured to monitor the shopping cart basket weight. The process further includes automatically generating a basket weight output value based upon the shopping cart basket weight. The basket weight output value includes one of a check against an expected weight of an item from a database, a billing statement total for a bulk good, a check against an expected total order weight to confirm presence of an un-scanned item in the shopping cart basket, and a check against unsafe use of the shopping cart. The process further includes providing a message based upon the basket weight output value. |
| US09607479B2 |
Tournament gaming system with shared elements
A tournament gaming system offers a wagering game tournament to players and includes displaying game-play series on a first display device and a second display device. A plurality of players, including a first player and a second player, participate in the game-play series. In accordance with respective randomly selected outcomes achieved in the plurality of game-play series, the players are assigned a tournament rank. A tournament element is shared between the first player and the second player in response to a tournament incentive. The tournament element has an effect on the tournament rank. A tournament award is awarded based on the tournament rank. |
| US09607476B2 |
Wagering game having mystery-symbol reveal scheme
A gaming system includes a plurality of simulated reels. Each reel has a plurality of symbol positions, including first symbol positions with reel symbols thereon and second symbol positions with initially transparent regions. The gaming system selects one of the reel symbols to serve as a background symbol, displays a game outcome region through which the simulated reels move, and while the simulated reels are moving, reveals the background symbol through the initially transparent regions of the second symbol positions that move through the game outcome region. For each simulated reel that has stopped moving, each of the second symbol positions located within the game outcome region are filled with the reel symbol corresponding to the background symbol. An award is provided based on the symbols in the game outcome region. |
| US09607474B2 |
Reconfigurable gaming zone
In one embodiment, method of operating a zone-based gaming activity, includes generating, in response to a request, a reconfigurable zone; determining one or more eligible participants; and modifying said zone to change the number of eligible participants. |
| US09607471B2 |
Gaming systems and methods for use in providing random rewards associated with play-for-fun applications
Systems and methods for use in providing a random reward associated with at least one play-for-fun application are disclosed. One exemplary method includes crediting, at the gaming server, gaming activity directed to a play-for-fun application by a player to a player tracking account, issuing at least one coupon associated with a random reward based on at least the gaming activity credited to the player tracking account, tracking, at the gaming server, redemption of the at least one coupon, and awarding the random reward when the coupon is redeemed at a gaming machine in accordance with at least one trigger condition. |
| US09607470B2 |
Performing an automatic fold-out command and assigning player entries in an online card game
A method, computer system, and computer program product to implement an automatic fold-out command in an online card game. The system can automatically assign the player-entry of the player to a new table. |
| US09607468B2 |
Glare reduction for wagering games
A gaming machine has a cabinet with a cabinet frame, a display device, a light source, and a directional transmissible layer with directional light planes arranged parallel to and offset from each other. The display device is located within the cabinet frame and is configured to display a wagering game. The light source is positioned above the display device, within the cabinet frame, and emits direct light and indirect light towards a player position in front of the gaming machine. The indirect light reflects off the display device prior to reaching the player position, causing light glare towards the player position. To reduce or eliminate the light glare, the directional transmissible layer is placed at least in part over the light source such that the directional light planes are horizontally aligned with the display device to prevent at least some of the indirect light from reflecting off the display device. |
| US09607461B2 |
Currency inspection using mobile device and attachments
Currency inspection using mobile devices and attachments are provided herein, as well as methods of use. In some embodiments, an apparatus may be configured to provide selections of currencies to a user via a display of the apparatus, obtain currency attributes for a selected currency, receive currency parameters for suspect currency using a currency evaluation device that is communicatively coupled with the apparatus, the currency evaluation device having a sensor array that comprises one or more sensors that are each configured to determine at least one currency parameter, compare the currency parameters for the suspect currency to the currency attributes, and output a warning message if the suspect currency is potentially counterfeit. |
| US09607459B2 |
Wirelessly charging electronic lock device
A wirelessly charging electronic lock device includes an electronic key and a electronic lock, a key code and a pre-stored matching code are pre-stored in the electronic key, an electronic lock code is pre-stored in the electronic lock, the electronic key includes a wireless charging device and a first wireless signal device, the wireless charging device charges the electronic device by wireless transmission, the electronic lock includes a wireless charging receiving device, a second wireless signal device, and a processing unit, the processing unit is configured to figure out a current matching code, the current matching code is compared with the pre-stored matching code, which is validated as to whether the electronic key matches with the electronic lock. |
| US09607457B2 |
Reuseable keyfob for use prior to sale of keyless vehicle
A keyfob and related method of utilizing a keyfob prior to a sale of a new vehicle to a purchaser having a virtual keyfob are provided. The method broadly includes the steps of pairing a keyfob to a computer of the new vehicle at an assembly plant, using the keyfob to switch a mode of the new vehicle between an assembly mode and a transportation mode, and unpairing the keyfob from the computer upon pairing the computer to the virtual keyfob of the purchaser. The step of unpairing the keyfob may include providing instructions from a remote location to the computer via a wireless network, and from the computer to the virtual keyfob via a local area wireless network. The method may further include the step of re-pairing the keyfob to a computer of a second new vehicle at the first or a third location. |
| US09607455B2 |
System and method for generating a driving profile of a user
The present disclosure generally relates to driving data monitoring, and more particularly to systems and methods for generating a driving profile of a user based on the driving data. In one embodiment, a method for generating a driving profile of a user is disclosed. The method comprises receiving one or more values corresponding to a plurality of variables. The plurality of variables are associated with driving of a vehicle. The method further comprises determining, based on the one or more values, one or more safety scores corresponding to the plurality of variables. The one or more safety scores are associated with a trip that is completed based on one or more conditions. The method further comprises determining a cumulative safety score for the trip based on the one or more safety scores and determining a driving level of the user to generate the driving profile of the user. |
| US09607452B2 |
Electronic module integration for harsh environment machines
A gas turbine engine is provided having a control and health monitoring system that includes an engine control module. At least one electronic component electronically coupled to the engine control module. The at least one electronic component includes an electronic module. The system further includes an isolation rail extending through the gas turbine engine. The at least one control component is electronically coupled to the engine control module through the isolation rail. The electronic module is in thermal communication with isolation rail. |
| US09607445B2 |
System for automated recording of aircraft flight and maintenance information and associated methods
A method for monitoring aircraft operation status comprising receiving aircraft operation data, identifying an aircraft associated with the aircraft operation data, recording the aircraft operation data to an aircraft database, and determining whether the aircraft operation data complies with rules governing aircraft operation. Upon determining the aircraft operation data complies with the rules governing aircraft operation, the compliance is recorded to the aircraft database. Upon determining the aircraft operation data comprises a non-compliance, a non-compliant aircraft system or component associated with the non-compliance is identified, the non-compliance to the aircraft database is recorded, and an action responsive to the non-compliance is performed. |
| US09607443B2 |
Portable race device for displaying real-time race information
The invention comprises systems and devices for calculating and displaying real-time race information to a racer during a race. A portable race device may be worn by a racer. During the race, while within range of a race gate transmission, the race device receives gate crossing times for other race participants, and may calculate and display the current positions and times for a selected race group, and the pace needed for the racer to win, and also may display the projected finish positions and times for a selected race group, and the pace needed for the racer to win. |
| US09607438B2 |
Collaborative augmented reality
Augmented reality presentations are provided at respective electronic devices. A first electronic device receives information relating to modification made to an augmented reality presentation at a second electronic device, and the first electronic device modifies the first augmented reality presentation in response to the information. |
| US09607436B2 |
Generating augmented reality exemplars
Technologies are generally described for automatic clustering and rendering of augmentations into one or more operational exemplars in an augmented reality environment. In some examples, based on a user's context, augmentations can be retrieved, analyzed, and grouped into clusters. Exemplars can be used to render the clusters as conceptual representations of the grouped augmentations. An exemplar's rendering format can be derived from the grouped augmentations, the user's context, or formats of other exemplars. Techniques for grouping the augmentations into clusters and rendering these clusters as exemplars to a user can enhance the richness and meaning of an augmented reality environment along contextually or user-determined axes while reducing the sensorial and cognitive load on the user. |
| US09607435B2 |
Method for rendering an image synthesis and corresponding device
A method and device for rendering a synthesis image comprising generating a plurality of elementary geometries (201 . . . 2i2) from an input geometry, a plurality of vertices being associated with each elementary geometry, each vertex being defined with coordinates; assigning an index value (0, 1 . . . 6, 7) to each elementary geometry of at least a part of the elementary geometries (201 . . . 2i2), the index value being estimated from the coordinates associated with at least one vertex of the elementary geometry, and rendering the synthesis image by using the indexed elementary geometries. |