最新美国发明专利第2017-01-31期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US09559360B2	Virus scaffold for self-assembled, flexible and light lithium battery A variety of compositions that include a metal oxide, films and batteries comprising one or more of the compositions, and methods of making the same.
US09559350B2	Method for producing nonaqueous electrolyte secondary battery The present invention provides a method for producing a nonaqueous electrolyte secondary battery in which the drop in capacity retention rate is controlled by forming a coating in a more favorable state on the surface of the negative electrode active material. This production method comprises a step S10 of preparing a battery assembly in which an electrode assembly is housed within a battery case, the electrode assembly including a positive electrode produced by forming a positive electrode active material layer containing at least a positive electrode active material, and a negative electrode produced by forming a negative electrode active material layer containing at least a negative electrode active material; a first injection step S20 of injecting a nonaqueous electrolyte containing a specified additive into the battery case; a precharging step S30 of forming the additive-derived coating on the surface of the negative electrode active material; a second injection step S40 of injecting a nonaqueous electrolyte not containing an additive into the battery case; and a charge and discharge step S50 of charging and discharging the battery assembly to a predetermined charging and discharge voltage.
US09559348B2	Conductivity control in electrochemical cells Electrochemical cells having desirable electronic and ionic conductivities, and associated systems and methods, are generally described.
US09559345B2	Separator including porous coating layer, method for manufacturing the separator and electrochemical device including the separator A separator includes a non-woven fabric substrate having pores, fine thermoplastic powder located inside the pores of the non-woven fabric substrate, and a porous coating layer disposed on at least one surface of the non-woven fabric substrate. The fine thermoplastic powder has an average diameter smaller than that of the pores and a melting point lower than the melting or decomposition point of the non-woven fabric substrate. The porous coating layer includes a mixture of inorganic particles and a binder polymer whose melting point is higher than the melting or decomposition point of the fine thermoplastic powder. In the porous coating layer, the inorganic particles are fixedly connected to each other by the binder polymer and the pores are formed by interstitial volumes between the inorganic particles. Previous filling of the large pores of the non-woven fabric substrate with the fine thermoplastic powder makes the porous coating layer uniform.
US09559341B2	Rechargeable battery having a vent unit at a joint in a cap plate A rechargeable battery includes an electrode assembly including a first electrode, a second electrode, and a separator between the first electrode and the second electrode. The rechargeable battery also includes a case accommodating the electrode assembly. The rechargeable battery further includes a cap plate including a first plate and a second plate coupled to the first plate along a joint. The cap plate is coupled to an opening of the case. The rechargeable battery also includes a vent unit at the joint where the first plate of the cap plate is coupled to the second plate.
US09559339B2	Secondary battery A secondary battery includes an electrode assembly having a first electrode plate, a second electrode plate, and a separator between the first electrode plate and the second electrode plate; a first electrode terminal; a first collecting plate having a first region contacting the first electrode plate or the second electrode plate, a second region extending at an angle to the first region, and a first reinforcement part that extends at an angle to both the first region and the second region; a case housing the electrode assembly and the first collecting plate; and a cap assembly sealing the case.
US09559338B2	Method for repairing organic light-emitting diode (OLED) display device A method for repairing an organic light-emitting diode (OLED) display device includes: determining the position of foreign particle (13) in a lamination structure (12); removing the foreign particle (13) and layers over the foreign particle (13) and in a recess region to be formed, so as to form a recess (21) in the lamination structure (12), in which an opening of the recess (21) is towards the external environment; and forming a repair structure (31) in the recess (21), in which the refractive index of the repair structure (31) is less than that of the lamination structure (12). The method overcomes the black spot defect caused by the foreign particle, improves the product yield and avoids the waste of cost.
US09559337B2	Method for manufacturing flexible display device The present invention provides a method for manufacturing a flexible display device, which includes the following steps: (1) providing a flexible substrate and a number of clamps; (2) securing edges of the flexible substrate with the number of clamps; and (3) subjecting the flexible substrate to operations of exposure, development, etching, thin film deposition, annealing, and film formation, wherein in each of the operations, the clamps are adjusted in order to adjust flatness and amount of contraction of the flexible substrate and also, the clamps are adjusted to adjust angle of the flexible substrate. The present invention uses the clamps to securely clamp edges of the flexible substrate so that adjustment of the clamps may be conducted in case that deformation and deflection of the flexible substrate occurs in order to reduce the deformation and deflection of the flexible substrate and achieve precise control of accuracy of the manufacturing process thereby preventing the deformation and deflection from affecting the accuracy of the manufacturing process. In different operations, the flexible substrate can be adjusted to be horizontal, inclined, or vertical and the clamps may apply different amounts of forces to control the accuracy and reduce deformation of the substrate. No operations of laminating and peeling are necessary.
US09559332B2	Organic electroluminescence display panel structured to reduce or prevent outgassing from an organic material, and display device including the same An organic electroluminescence (EL) display panel includes a substrate, a thin film transistor on the substrate, an overcoat layer on the thin film transistor and containing an organic material, a first electrode on the overcoat layer, an organic light emitting layer on the first electrode, a second electrode on the organic light emitting layer, and a barrier layer between the overcoat layer and the first electrode and including a first region formed of a single layer and a second region formed of a multilayer.
US09559330B2	Organic light emitting diode display An organic light emitting diode display includes: a substrate; an interlayer insulating layer on the substrate; driving source and drain electrodes on the interlayer insulating layer and facing each other; a planarizing layer on the interlayer insulating layer; a pixel electrode on the planarizing layer and including a reflective electrode; a pixel defining layer on an edge portion of the pixel electrode and the planarizing layer, and including an opening for exposing the pixel electrode and a reflective hole for exposing a part of the interlayer insulating layer; an organic emission layer on the pixel electrode within the opening; a common electrode on the organic emission layer and the pixel defining layer and within the reflective hole, and including a transparent electrode; and an optical sensor under the substrate, in which the reflective hole moves light emitted from the organic emission layer to the optical sensor under the substrate.
US09559329B2	Method for fabricating display device including uneven electrode and display device thereof A display device having an uneven electrode enhances display quality by improving the emission efficiency of the vertically polarized light. The method for fabricating a display device includes forming a thin film transistor on a base substrate, forming a first electrode connected to the thin film transistor, forming a block copolymer layer on the first electrode, patterning the block copolymer layer and forming a uneven first electrode having a plurality of electrode grooves by etching the first electrode exposed by the block copolymer pattern, and forming a light emitting layer on the uneven first electrode.
US09559324B2	Light-emitting element, light-emitting device, display device, electronic device, and lighting device A light-emitting element which uses a plurality of kinds of light-emitting dopants emitting light in a balanced manner and has high emission efficiency is provided. Further, a light-emitting device, a display device, an electronic device, and a lighting device each having reduced power consumption by using the above light-emitting element are provided. A light-emitting element which includes a plurality of light-emitting layers including different phosphorescent materials is provided. In the light-emitting element, the light-emitting layer which includes a light-emitting material emitting light with a long wavelength includes two kinds of carrier-transport compounds having properties of transporting carriers with different polarities. Further, in the light-emitting element, the triplet excitation energy of a host material included in the light-emitting layer emitting light with a short wavelength is higher than the triplet excitation energy of at least one of the carrier-transport compounds.
US09559320B2	Ferro-electric device and modulatable injection barrier Described is a modulatable injection barrier and a semiconductor element comprising same. More particularly, the invention relates to a two-terminal, non-volatile programmable resistor. Such a resistor can be applied in non-volatile memory devices, and as an active switch e.g. in displays. The device comprises, in between electrode layers, a storage layer comprising a blend of a ferro-electric material and a semiconductor material. Preferably both materials in the blend are polymers.
US09559316B2	Display device and method for manufacturing the same A first organic resin layer is formed over a first substrate; a first insulating film is formed over the first organic resin layer; a first element layer is formed over the first insulating film; a second organic resin layer is formed over a second substrate; a second insulating film is formed over the second organic resin layer; a second element layer is formed over the second insulating film; the first substrate and the second substrate are bonded; a first separation step in which adhesion between the first organic resin layer and the first substrate is reduced; the first organic resin layer and a first flexible substrate are bonded with a first bonding layer; a second separation step in which adhesion between the second organic resin layer and the second substrate is reduced; and the second organic resin layer and a second flexible substrate are bonded with a second bonding layer.
US09559313B2	Light-emitting element To provide a light-emitting element which uses a fluorescent material as a light-emitting substance and has higher luminous efficiency. To provide a light-emitting element which includes a mixture of a thermally activated delayed fluorescent substance and a fluorescent material. By making the emission spectrum of the thermally activated delayed fluorescent substance overlap with an absorption band on the longest wavelength side in absorption by the fluorescent material in an S1 level of the fluorescent material, energy at an S1 level of the thermally activated delayed fluorescent substance can be transferred to the S1 of the fluorescent material. Alternatively, it is also possible that the Si of the thermally activated delayed fluorescent substance is generated from part of the energy of a T1 level of the thermally activated delayed fluorescent substance, and is transferred to the S1 of the fluorescent material.
US09559311B2	Anthracene derivative, organic-electroluminescence-device material, organic electroluminescence device, and electronic equipment An anthracene derivative is represented by a formula (1) below, in which at least one of Ar1, Ar2, Ar3, L1, L2 and L3 is a group derived from a skeleton represented by a formula (10) below,
US09559300B2	Resistive random access memory device and manufacturing method thereof In accordance with an embodiment, a resistive random access memory device includes a substrate, first and second wiring lines, and a storage cell. The first and second wiring lines are disposed on the substrate so as to intersect each other. The storage cell is disposed between the first and second wiring lines at the intersection of the first and second wiring lines and includes a first electrode, a resistive switching film on the first electrode, a second electrode on the resistive switching film, and a tantalum oxide (TaOx) layer. The first electrode is electrically connected to the first wiring line. The second electrode is electrically connected to the second wiring line. The tantalum oxide (TaOx) layer is disposed between the first electrode and the resistive switching film and is in contact with the resistive switching film.
US09559299B1	Scaling of filament based RRAM A solid state memory comprises a top electrode, a bottom electrode and an insulating switching medium that is disposed at a thickness based on a predetermined function. The insulating switching medium generates a conduction path in response to an electric signal applied to the device. The thickness of the insulating switching medium is a function of a filament width of the conduction path and operates to prevent rupture of a semi-stable region. The semi-stable region maintains filament structure over time and does not degrade into retention failure. The solid state memory can comprise one or more conducting layers that can operate to control the conductance at an on-state of the memory and offer oxygen vacancies or metal ions to the switching medium. The function of the thickness of the insulating switching medium can vary depending upon the number of conduction layers disposed at the insulating switching medium.
US09559298B2	Semiconductor memory with a multi-layer passivation layer formed over sidewalls of a variable resistance element An electronic device includes a semiconductor memory, wherein the semiconductor memory includes a variable resistance element formed over a substrate, and a multi-layer passivation layer positioned over sidewalls of the variable resistance element and having two or more insulating layers formed over the sidewalls of the variable resistance element.
US09559297B2	Vertical transistor for resistive memory The present disclosure relates to a method of making a memory on semiconductor substrate, comprising: at least one data line, at least one selection line, at least one reference line, at least one memory cell comprising a select transistor having a control gate connected to the selection line, a first conduction terminal connected to a variable impedance element, the select transistor and the variable impedance element coupling the reference line to the data line, the select transistor comprising an embedded vertical gate produced in a trench formed in the substrate, and a channel region opposite a first face of the trench, between a first deep doped region and a second doped region on the surface of the substrate coupled to the variable impedance element.
US09559296B2	Method for providing a perpendicular magnetic anisotropy magnetic junction usable in spin transfer torque magnetic devices using a sacrificial insertion layer A method for providing a magnetic junction usable in a magnetic device and the magnetic junction are described. The method includes providing a free layer, a pinned layer and a nonmagnetic spacer layer between the free layer and the pinned layer. The free layer is switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction. At least one of the step of providing the free layer includes a first plurality of steps and the step of providing the pinned layer includes a second plurality of steps. The first and second plurality of steps include depositing a portion of a layer, depositing a sacrificial layer, annealing the portion of the magnetic junction under the sacrificial layer, and depositing a remaining portion of the layer. The layer may be the free layer, the pinned layer, or both.
US09559294B2	Self-aligned magnetoresistive random-access memory (MRAM) structure for process damage minimization A magnetoresistive random-access memory (MRAM) cell with a dual sidewall spacer structure is provided. The MRAM cell includes an anti-ferromagnetic layer, a pin layer, a free layer, a first sidewall spacer layer, and a second sidewall spacer layer. The pin layer is arranged over the anti-ferromagnetic layer and has a fixed magnetic polarity. The free layer is arranged over the pin layer and has a variable magnetic polarity. The first sidewall spacer layer extends from over the pin layer along sidewalls of the free layer. The second sidewall spacer layer extends from over the anti-ferromagnetic layer along sidewalls of the pin layer and the first sidewall spacer layer. A method for manufacturing the MRAM cell is also provided.
US09559293B2	Integrated circuit including sensor having injection molded magnetic material An integrated circuit includes a magnetic field sensor and an injection molded magnetic material enclosing at least a portion of the magnetic field sensor.
US09559291B2	Acoustic wave device and method of fabricating the same An acoustic wave device includes: a substrate; a piezoelectric film located on the substrate; a lower electrode and an upper electrode facing each other across the piezoelectric film, at least one of the lower electrode and the upper electrode including a first conductive film and a second conductive film formed on the first conductive film; an insulating film sandwiched between the first conductive film and the second conductive film and having a temperature coefficient of an elastic constant opposite in sign to a temperature coefficient of an elastic constant of the piezoelectric film; and a third conductive film formed on edge surfaces of the insulating film and the second conductive film and causing electrical short circuits between the first conductive film and the second conductive film.
US09559287B2	Orthotropic bimorph for improved performance synthetic jet Piezoelectric actuators for synthetic jets and other devices are disclosed having orthotropic piezoelectric bimorphs with increased out-of-plane displacements for greater responsiveness to applied electric fields. In some embodiments, the piezoelectric actuators may include interdigitated electrodes applied to a surface of a piezoelectric plate to produce greater in-plane strains in the plate and greater out-of-plane displacements of a flexible diaphragm of the synthetic jet. In other embodiments, the actuator includes an orthotropic piezoceramic plate having a greater d coupling coefficient in one in-plane direction and in the other in-plane direction to cause desired diaphragm out-of-plane displacements when an electric field is applied by electrodes.
US09559285B2	Piezoelectric actuator and head suspension A piezoelectric actuator includes an actuator base that supports a load beam and has an opening accommodating a piezoelectric element, a receiver member that is laid on and fixed to the actuator base and forms a receiver that faces the opening and receives the piezoelectric element, an adhesive part formed of a liquid adhesive that is filled in a space defined by the piezoelectric element, an inner circumference of the opening, and the receiver and adheres the piezoelectric element to the inner circumference of the opening and the receiver, and a suppressing zone that is formed along an overlapping area where the actuator base and receiver member overlap each other and suppresses penetration of the liquid adhesive due to a capillary phenomenon into the overlapping area.
US09559283B2	Integrated circuit cooling using embedded peltier micro-vias in substrate A semiconductor device package and method for manufacturing the same, includes a semiconductor substrate including a plurality of embedded thermoelectric couples. The embedded thermoelectric couples can be in trenches and extend partially into the substrate from the handle side of the substrate. An n-type pillar and a p-type pillar are electrically connected using a conducting contact plate to form each of the partially embedded thermoelectric couples. A series connection layer electrically connects the plurality of thermoelectric couples on the handle side. A power source provides electrical current to the series connection layer allowing current to flow through the plurality of the series connected thermoelectric couples. A heat sink is positioned adjacent to the connected thermoelectric couples for transferring heat away from the device side to the heat sink using the thermoelectric couples.
US09559280B2	Thermoelectric conversion device A thermoelectric conversion device includes a Heusler alloy film having a structure of B2 or L21 in notation of A2BC and a pair of electrodes on the Heusler alloy film to output an electromotive force generated by a thermal gradient in the Heusler alloy film. The thermoelectric conversion device further includes an electrode for applying an electric field or a voltage to the Heusler alloy film to increase and control an electric conductivity and a Seebeck coefficient S of the Heusler metal film. The device can control to increase an electric conductivity and Seebeck coefficient S by applying an electric field or a voltage through an insulation film to the Heusler alloy film. The device may have a shared connection to select one of outputs of a plurality of thermoelectric conversion devices arranged in a matrix or increase an electromotive force as an output.
US09559279B1	Semiconductor light emitting device According to one embodiment, a semiconductor light-emitting device includes a semiconductor layer including a first semiconductor layer, a second semiconductor layer, a light emitting layer, a first surface, and a second surface; an n-side electrode including a first n-side electrode and a second n-side electrode; a first contact unit; a second contact unit; an n-side interconnect unit; a p-side electrode; and an insulating film. The insulating film includes a first insulating portion, a second insulating portion, a third insulating portion, and a fourth insulating portion.
US09559277B2	Light emitting diode module structure and manufacturing method thereof A light emitting diode module structural and a manufacturing method thereof are disclosed. The manufacturing method includes the steps as follows. A base and a light emitting diode die are provided. The light emitting diode die may include a first semiconductor layer and a second semiconductor layer. The light emitting diode die is disposed on the base. A buffer layer is formed to cover the light emitting diode die. A first opening and a second opening are formed on the first semiconductor layer and the second semiconductor layer, respectively. The second opening exposes the second semiconductor layer by penetrating the first semiconductor layer. A conductive pattern layer is formed on the buffer layer, and is electrically connected with the first semiconductor layer and the second semiconductor layer via the first opening and the second opening, respectively.
US09559270B2	Light-emitting device and method of producing the same A light-emitting device can prevent light from leaking through an unwanted area (or an unintended area) and can improve color unevenness and brightness unevenness. A method of producing such a light-emitting device, can include: disposing a plurality of light-emitting elements on a surface of a supporting substrate; forming a reflecting layer on the respective light-emitting elements along peripheries of the light-emitting elements facing an area between the light-emitting elements; forming a wavelength conversion layer so as to embed the plurality of light-emitting elements therein on the supporting substrate; and irradiating the wavelength conversion layer with laser beams to remove the wavelength conversion layer disposed at the area between the light-emitting elements.
US09559256B2	Method for manufacturing a semiconductor structure and semiconductor component comprising such a semiconductor structure A method for manufacturing at least one semiconductor structure, and a component including a structure formed with the method, the method including: providing a substrate including at least one semiconductor silicon surface; forming an amorphous silicon carbide layer in contact with at least one part of the semiconductor silicon surface; forming the at least one semiconductor structure in contact with the silicon carbide layer, the structure including at least one part, as a contact part, in contact with the surface of the silicon carbide layer, which includes gallium.
US09559253B2	Method of manufacturing nitride semiconductor element A method of manufacturing a nitride semiconductor element includes preparing a wafer having a nitride semiconductor layer which includes p-type dopants, forming an altered portion by condensing laser beam on the wafer, and after the forming an altered portion, forming a p-type nitride semiconductor layer by subjecting the wafer to annealing.
US09559251B2	Light emitting device having transparent electrode and method of manufacturing light emitting device Provided are a light emitting device including a transparent electrode having high transmittance with respect to light in a UV wavelength range as well as in a visible wavelength range and good ohmic contact characteristic with respect to a semiconductor layer and a method of manufacturing the light emitting device. A transparent electrode of a light emitting device is formed by using a resistance change material which has high transmittance with respect to light in a UV wavelength range and of which resistance state is to be changed from a high resistance state into a low resistance state due to conducting filaments, which current can flow through, formed in the material if a voltage exceeding a threshold voltage inherent in a material applied to the material, so that it is possible to obtain high transmittance with respect to light in a UV wavelength range.
US09559249B2	Microwave-annealed indium gallium zinc oxide films and methods of making the same A microwave-annealed indium gallium zinc oxide (IGZO) film and methods of making the same are disclosed. The methods may comprise: depositing an IGZO film onto a substrate; and microwave annealing the IGZO film to produce a microwave-annealed IGZO film.
US09559243B2	Ink composition for manufacturing light absorption layer including metal nano particles and method of manufacturing thin film using the same Disclosed are an ink composition for manufacturing a light absorption layer including metal nano particles and a method of manufacturing a thin film using the same, more particularly, an ink composition for manufacturing a light absorption layer including copper (Cu)-enriched Cu—In bimetallic metal nano particles and Group IIIA metal particles including S or Se dispersed in a solvent and a method of manufacturing a thin film using the same.
US09559241B2	Panel, method for producing panel, solar cell module, printing apparatus, and printing method A printing apparatus according to the present invention includes a printing section configured to print ink on a surface of a substrate. The printing section prints conductive ink containing a conductive material by offset printing and prints conductive ink containing a conductive material different from the conductive material on the conductive ink by offset printing. Preferably, the printing apparatus further includes a conveyor configured to convey the substrate. Further, the printing section preferably includes a first printing machine configured to print first conductive ink and a second printing machine configured to print second conductive ink.
US09559237B2	Optoelectric devices comprising hybrid metamorphic buffer layers In one aspect, semiconductor structures are described herein. A semiconductor structure, in some implementations, comprises a first semiconductor layer having a first bandgap and a first lattice constant and a second semiconductor layer having a second bandgap and a second lattice constant. The second lattice constant is lower than the first lattice constant. Additionally, a transparent metamorphic buffer layer is disposed between the first semiconductor layer and the second semiconductor layer. The buffer layer has a constant or substantially constant bandgap and a varying lattice constant. The varying lattice constant is matched to the first lattice constant adjacent the first semiconductor layer and matched to the second lattice constant adjacent the second semiconductor layer. The buffer layer comprises a first portion comprising AlyGazIn(1-y-z)As and a second portion comprising GaxIn(1-x)P. The first portion is adjacent the first semiconductor layer and the second portion is adjacent the second semiconductor layer.
US09559234B2	Solar cell apparatus Disclosed is a solar cell apparatus. The solar cell apparatus includes a substrate including a transmission area and a non-transmission area extended in one direction, respectively, and disposed in parallel to each other, a solar cell disposed in the non-transmission area, and a refractive part provided in the transmission area and refracting at least a portion of an incident light to the non-transmission area.
US09559233B2	Solar cell interconnection A solar cell can include a conductive foil having a first portion with a first yield strength coupled to a semiconductor region of the solar cell. The solar cell can be interconnected with another solar cell via an interconnect structure that includes a second portion of the conductive foil, with the interconnect structure having a second yield strength greater than the first yield strength.
US09559232B1	Folding deployment system for solar panels A folding deployment system for solar panels provides a portable solar collecting power station that can be easily packaged and deployed for use in diverse environments. A solar array frame extends and contracts in accordion fashion. Solar panels mounted on the solar array frame are pivotally moveable from an upright position in a stowed position inside a container to a substantially horizontal position outside the container in a deployed position.
US09559229B2	Multi-junction solar cell The disclosure provides a multi-junction solar cell structure and the manufacturing method thereof, comprising a first photovoltaic structure and a second photovoltaic structure; wherein at least one of the first photovoltaic structure and the second photovoltaic structure comprises a discontinuous photoelectric converting structure.
US09559223B2	Solar cell apparatus and method of fabricating the same According to the embodiment, there is provided a solar cell apparatus. The solar cell apparatus includes a back electrode layer on a substrate, a light absorbing layer on the back electrode layer, a buffer layer on the light absorbing layer, a front electrode layer on the buffer layer, and a connection part making contact with the front electrode layer, passing through the light absorbing layer, and making contact with the back electrode layer. The connection part includes a material different from a material constituting the front electrode layer.
US09559219B1	Fast process flow, on-wafer interconnection and singulation for MEPV A method including providing a substrate comprising a device layer on which a plurality of device cells are defined; depositing a first dielectric layer on the device layer and metal interconnect such that the deposited interconnect is electrically connected to at least two of the device cells; depositing a second dielectric layer over the interconnect; and exposing at least one contact point on the interconnect through the second dielectric layer. An apparatus including a substrate having defined thereon a device layer including a plurality of device cells; a first dielectric layer disposed directly on the device layer; a plurality of metal interconnects, each of which is electrically connected to at least two of the device cells; and a second dielectric layer disposed over the first dielectric layer and over the interconnects, wherein the second dielectric layer is patterned in a positive or negative planar spring pattern.
US09559216B2	Semiconductor memory device and method for biasing same Techniques for providing a semiconductor memory device are disclosed. In one particular embodiment, the techniques may be realized as a semiconductor memory device including a plurality of memory cells arranged in an array of rows and columns. Each memory cell may include a first region coupled to a source line, a second region coupled to a bit line, and a body region capacitively coupled to at least one word line via a tunneling insulating layer and disposed between the first region and the second region.
US09559214B2	Semiconductor device A semiconductor device includes a first electrode, a first insulating layer having a first opening reaching the first electrode and having a ring-shaped first side wall exposed to the first opening, an oxide semiconductor layer on the first side wall, the oxide semiconductor layer being connected with the first electrode, a gate insulating layer on the oxide semiconductor layer, the oxide semiconductor layer being between the first side wall and the gate insulating layer, a gate electrode facing the oxide semiconductor layer on the first side wall, the gate insulating layer being between the oxide semiconductor layer and the gate electrode, and a second electrode above the first insulating layer, the second electrode being connected with the oxide semiconductor layer.
US09559213B2	Semiconductor device Provided is a transistor which includes an oxide semiconductor film and has stable electrical characteristics. In the transistor, over an oxide film which can release oxygen by being heated, a first oxide semiconductor film which can suppress oxygen release at least from the oxide film is formed. Over the first oxide semiconductor film, a second oxide semiconductor film is formed. With such a structure in which the oxide semiconductor films are stacked, the oxygen release from the oxide film can be suppressed at the time of the formation of the second oxide semiconductor film, and oxygen can be released from the oxide film in later-performed heat treatment. Thus, oxygen can pass through the first oxide semiconductor film to be favorably supplied to the second oxide semiconductor film. Oxygen supplied to the second oxide semiconductor film can suppress the generation of oxygen deficiency, resulting in stable electrical characteristics.
US09559212B2	Semiconductor device and method for manufacturing the same An object is to increase field effect mobility of a thin film transistor including an oxide semiconductor. Another object is to stabilize electrical characteristics of the thin film transistor. In a thin film transistor including an oxide semiconductor layer, a semiconductor layer or a conductive layer having higher electrical conductivity than the oxide semiconductor is formed over the oxide semiconductor layer, whereby field effect mobility of the thin film transistor can be increased. Further, by forming a semiconductor layer or a conductive layer having higher electrical conductivity than the oxide semiconductor between the oxide semiconductor layer and a protective insulating layer of the thin film transistor, change in composition or deterioration in film quality of the oxide semiconductor layer is prevented, so that electrical characteristics of the thin film transistor can be stabilized.
US09559208B2	Liquid crystal display device and electronic device including the same A liquid crystal display device is provided in which the aperture ratio can be increased in a pixel including a thin film transistor in which an oxide semiconductor is used. In the liquid crystal display device, the thin film transistor including a gate electrode, a gate insulating layer and an oxide semiconductor layer which are provided so as to overlap with the gate electrode, and a source electrode and a drain electrode which overlap part of the oxide semiconductor layer is provided between a signal line and a pixel electrode which are provided in a pixel portion. The off-current of the thin film transistor is 1×10−13 A or less. A potential can be held only by a liquid crystal capacitor, without a capacitor which is parallel to a liquid crystal element, and a capacitor connected to the pixel electrode is not formed in the pixel portion.
US09559202B2	Method for forming metal semiconductor alloys in contact holes and trenches A semiconductor device is provided that includes a gate structure on a channel region of a substrate. A source region and a drain region are present on opposing sides of the channel region. A first metal semiconductor alloy is present on an upper surface of at least one of the source and drain regions. The first metal semiconductor alloy extends to a sidewall of the gate structure. A dielectric layer is present over the gate structure and the first metal semiconductor alloy. An opening is present through the dielectric layer to a portion of the first metal semiconductor alloy that is separated from the gate structure. A second metal semiconductor alloy is present in the opening, is in direct contact with the first metal semiconductor alloy, and has an upper surface that is vertically offset and is located above the upper surface of the first metal semiconductor alloy.
US09559199B2	LDMOS with adaptively biased gate-shield An LDFET is disclosed. A source region is electrically coupled to a source contact. A lightly doped drain (LDD) region has a lower dopant concentration than the source region, and is separated from the source region by a channel. A highly doped drain region forms an electrically conductive path between a drain contact and the LDD region. A gate electrode is located above the channel and separated from the channel by a gate dielectric. A shield plate is located above the gate electrode and the LDD region, and is separated from the LDD region, the gate electrode, and the source contact by a dielectric layer. A control circuit applies a variable voltage to the shield plate that: (1) accumulates a top layer of the LDD region before the transistor is switched on; and (2) depletes the top layer of the LDD region before the transistor is switched off.
US09559197B2	Hetero-junction semiconductor device and method of manufacturing a hetero-junction semiconductor device A hetero-junction semiconductor device includes: a channel layer that includes a first semiconductor; a barrier layer that is provided on the channel layer and includes a semiconductor having a band gap larger than a band gap of the first semiconductor; a source electrode and a drain electrode that are provided on the barrier layer and are ohmic contacted to the barrier layer; a p-type semiconductor layer provided on the barrier layer, the p-type semiconductor layer being provided in a region between the source electrode and the drain electrode on the barrier layer; an n-type semiconductor layer that is provided on the p-type semiconductor layer; and a gate electrode that is joined to the n-type semiconductor layer. A joint interface between the p-type semiconductor layer and the n-type semiconductor layer has a concavo-convex structure.
US09559196B2	Semiconductor wafer, method of producing semiconductor wafer, electronic device, and method of producing electronic device A semiconductor wafer includes a base wafer, a first semiconductor portion that is formed on the base wafer and includes a first channel layer containing a majority carrier of a first conductivity type, a separation layer that is formed over the first semiconductor portion and contains an impurity to create an impurity level deeper than the impurity level of the first semiconductor portion, and a second semiconductor portion that is formed over the separation layer and includes a second channel layer containing a majority carrier of a second conductivity type opposite to the first conductivity type.
US09559195B2	Semiconductor device A semiconductor device of the present invention includes a semiconductor layer, a plurality of gate trenches formed in the semiconductor layer, a gate electrode filled via a gate insulating film in the plurality of gate trenches, an n+-type emitter region, a p-type base region, and an n−-type drift region disposed, lateral to each gate trench, in order in a depth direction of the gate trench from a front surface side of the semiconductor layer, a p+-type collector region disposed on a back surface side of the semiconductor layer with respect to the n−-type drift region, an emitter trench formed between the plurality of gate trenches adjacent to each other, and a buried electrode filled via an insulating film in the emitter trench, and electrically connected with the n+-type emitter region, and the emitter trench is disposed at an interval of 2 μm or less via an n−-type drift region with the gate trench.
US09559190B2	Semiconductor structure and manufacturing method thereof A semiconductor structure includes a substrate and a metal gate. The metal gate includes a metallic filling layer and disposed over the substrate. The semiconductor structure further includes a dielectric material over the metallic filling layer and separating the metallic filling layer from a conductive trace. The conductive trace is over the dielectric material. The semiconductor structure further includes a conductive plug extending longitudinally through the dielectric material and ending with a lateral encroachment inside the metallic filling layer along a direction. The lateral direction is substantially perpendicular to the longitudinal direction of the conductive plug.
US09559184B2	Devices including gate spacer with gap or void and methods of forming the same Devices and structures that include a gate spacer having a gap or void are described along with methods of forming such devices and structures. In accordance with some embodiments, a structure includes a substrate, a gate stack over the substrate, a contact over the substrate, and a spacer disposed laterally between the gate stack and the contact. The spacer includes a first dielectric sidewall portion and a second dielectric sidewall portion. A void is disposed between the first dielectric sidewall portion and the second dielectric sidewall portion.
US09559182B2	Self-aligned dual-metal silicide and germanide formation A device having an epitaxial region and dual metal-semiconductor alloy surfaces is provided. The epitaxial region includes an upward facing facet and a downward facing facet. The upward facing facet has a first metal-semiconductor alloy surface and the downward facing facet has a second metal-semiconductor alloy surface, wherein the first metal-semiconductor alloy is different than the second metal-semiconductor alloy.
US09559181B2	Structure and method for FinFET device with buried sige oxide The present disclosure provides a semiconductor device that includes a substrate of a first semiconductor material; a fin feature having a first portion, a second portion and a third portion stacked on the substrate; an isolation feature formed on the substrate and disposed on sides of the fin feature; semiconductor oxide features including a second semiconductor material, disposed on recessed sidewalls of the second portion, defining dented voids overlying the semiconductor oxide features and underlying the third portion; and a gate stack disposed on the fin feature and the isolation feature. The gate stack includes a gate dielectric layer extended into and filling in the dented voids. The first and third portions include the first semiconductor material having a first lattice constant. The second portion includes the second semiconductor material having a second lattice constant different from the first lattice constant.
US09559169B2	Thin film transistor array substrate and organic light-emitting diode display employing the same A thin film transistor (TFT) array substrate and an organic light-emitting diode display employing the same are disclosed. In one aspect, the substrate includes at least one TFT, the TFT including a substrate and a semiconductor pattern comprising a source region, a channel region, and a drain region. The TFT also includes a gate insulating layer covering the semiconductor pattern, a side gate electrode electrically insulated from the semiconductor pattern and formed over at least one side of the channel region, and a top gate electrode formed over the gate insulating layer so as to partially overlap the semiconductor pattern, the side gate electrode and the top gate electrode electrically connected to each other.
US09559165B2	Semiconductor structure with strained source and drain structures and method for forming the same A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate and a first gate structure and a second gate structure formed over the substrate. The semiconductor structure further includes first recesses formed in the substrate adjacent to the first gate structure and first strained source and drain structures formed in the first recesses. The semiconductor structure further includes second recesses formed in the substrate adjacent to the second gate structure and second strained source and drain structures formed in the second recesses. In addition, each of the first recesses has a shape of a trapezoid, and each of the second recesses has a shape of an inverted trapezoid.
US09559161B2	Patterned back-barrier for III-nitride semiconductor devices A compound semiconductor device includes a III-nitride buffer and a III-nitride barrier on the III-nitride buffer. The III-nitride barrier has a different band gap than the III-nitride buffer so that a two-dimensional charge carrier gas channel arises along an interface between the III-nitride buffer and the III-nitride barrier. The compound semiconductor device further includes a source and a drain spaced apart from one another and electrically connected to the two-dimensional charge carrier gas channel, a gate for controlling the two-dimensional charge carrier gas channel between the source and the drain, and a patterned III-nitride back-barrier buried in the III-nitride buffer. The patterned III-nitride back-barrier extends laterally beyond the gate towards the drain and terminates prior to the drain so that the patterned III-nitride back-barrier is laterally spaced apart from the drain by a region of the III-nitride buffer.
US09559160B2	Common-substrate semiconductor devices having nanowires or semiconductor bodies with differing material orientation or composition Common-substrate semiconductor devices having nanowires or semiconductor bodies with differing material orientation or composition and methods to form such common-substrate devices are described. For example, a semiconductor structure includes a first semiconductor device having a first nanowire or semiconductor body disposed above a crystalline substrate. The first nanowire or semiconductor body is composed of a semiconductor material having a first global crystal orientation. The semiconductor structure also includes a second semiconductor device having a second nanowire or semiconductor body disposed above the crystalline substrate. The second nanowire or semiconductor body is composed of a semiconductor material having a second global crystal orientation different from the first global orientation. The second nanowire or semiconductor body is isolated from the crystalline substrate by an isolation pedestal disposed between the second nanowire or semiconductor body and the crystalline substrate.
US09559159B2	Low-temperature polysilicon membrane and preparation method thereof, thin-film transistor and display device A method for preparing an LTPS membrane, including: forming an amorphous silicon (a-Si) layer (S3) on a substrate (S1) by a patterning process, in which the a-Si layer (S3) comprises a plurality of convex structures (S32) and etched areas (S31) which are disposed along circumference of the plurality of convex structures and partially etched; and performing excimer laser crystallization (ELC) on the a-Si layer (S3) and obtaining the LTPS membrane. A thin-film transistor (TFT) and a display device are further disclosed, which are used for overcoming poor uniformity of the polysilicon membrane prepared by the ELC technology.
US09559155B2	Organic light emitting display device with short-circuit prevention Disclosed is an organic light emitting display device. The organic light emitting display device includes a white organic light emitting diode (OLED) formed in an emission area of each of a plurality of sub-pixels, a driving thin film transistor (TFT) configured to supply a driving current to the white OLED, a storage capacitor configured to include a first terminal coupled to the driving TFT and a second terminal coupled to an anode electrode of the white OLED, and a color filter formed in the emission area. At least one of a top metal of the storage capacitor and a top metal of the driving TFT is formed to not overlap the color filter.
US09559144B2	Magnetic random access memory element having tantalum perpendicular enhancement layer The present invention is directed to a spin transfer torque (STT) MRAM device having a perpendicular magnetic tunnel junction (MTJ) memory element. The memory element includes a perpendicular MTJ structure in between a non-magnetic seed layer and a non-magnetic cap layer. The MTJ structure comprises a magnetic free layer structure and a magnetic reference layer structure with an insulating tunnel junction layer interposed therebetween, an anti-ferromagnetic coupling layer formed adjacent to the magnetic reference layer structure, and a magnetic fixed layer formed adjacent to the anti-ferromagnetic coupling layer. At least one of the magnetic free and reference layer structures includes a non-magnetic perpendicular enhancement layer, which improves the perpendicular anisotropy of magnetic layers adjacent thereto.
US09559141B2	Manufacturing method of using hydrogen plasma processing on a semiconductor wafer Hydrogen plasma processing is performed on a semiconductor wafer having a wiring formed in a region except a photodiode formation region of a pixel part and in a peripheral circuit part, from the side of a face where the wiring is formed. The hydrogen plasma processing uses a plasma etching apparatus which applies high-frequency power to an upper electrode for exciting hydrogen plasma and applies high-frequency power to a lower electrode for supplying hydrogen ions existing in the hydrogen plasma to the semiconductor wafer by electric field drift. Thereby, in the photodiode formation region of the pixel part, hydrogen ions become likely to be supplied by the electric field drift, and, in the region except the photodiode formation region and in the peripheral circuit part, the wiring restricts the movement of hydrogen ions and hydrogen ions become difficult to be supplied.
US09559140B2	Image sensor and method of fabricating the same Example embodiments disclose an image sensor and a fabricating method thereof. An image sensor may include a semiconductor layer with a light-receiving region and a light-blocking region, the semiconductor layer including photoelectric conversion devices, a light-blocking layer on a surface of the semiconductor layer, color filters on the semiconductor layer and the light-blocking layer, and micro lenses on the color filters. The color filters are absent from an interface region between the light-receiving region and the light-blocking region.
US09559139B2	Integrated scintillator grid with photodiodes Various embodiments of a structure implemented in an X-ray imaging system are described. In one aspect, a structure implemented in an X-ray imaging system includes a silicon wafer including a first side and a second side opposite the first side. The silicon wafer also includes an array of photodiodes on the first side of the silicon wafer with the photodiodes electrically isolated from each other as well as an array of grid holes on the second side of the silicon wafer. Each grid hole of the array of grid holes is aligned with a respective photodiode of the array of photodiodes. The structure also includes a layer of scintillating material disposed over the array of grid holes on the second side of the silicon wafer. The structure further includes a layer of reflective material disposed on the layer of scintillating material.
US09559135B2	Conduction layer for stacked CIS charging prevention A semiconductor device includes a first semiconductor chip comprising a first metallic structure and a second semiconductor chip comprising a second metallic structure. The second semiconductor chip is bonded with the first semiconductor chip by a first conductive plug. A second conductive plug extends from the first metallic structure and into a substrate of the first semiconductor chip. The first conductive plug connects the first metallic structure and the second metallic structure, wherein a conductive liner is along a sidewall of the first conductive plug or the second conductive plug.
US09559131B2	Solid-state imaging device and method for manufacturing solid-state imaging device, and electronic device A solid-state imaging device includes a first-conductivity-type semiconductor well region, a plurality of pixels each of which is formed on the semiconductor well region and is composed of a photoelectric conversion portion and a pixel transistor, an element isolation region provided between the pixels and in the pixels, and an element isolation region being free from an insulation film and being provided between desired pixel transistors.
US09559130B2	Depth sensing pixel, composite pixel image sensor and method of making the composite pixel image sensor A method of making a composite pixel image sensor includes forming an image sensing array; and forming a depth sensing pixel. The depth sensing pixel includes a depth sensing photodiode; a first photo storage diode; and a first transistor configured to selectively couple the depth sensing photodiode to the first photo storage diode. The depth sensing pixel further includes a second photo storage diode different from the first photo storage device; and a second transistor configured to selectively couple the depth sensing photodiode to the second photo storage device. The depth sensing pixel further includes a first transfer gate configured to selectively couple the first photo storage diode to a first output node. The depth sensing pixel further includes a second transfer gate configured to selectively couple the second photo storage diode to a second output node. The method includes bonding the image sensing array to the depth sensing pixel.
US09559127B2	Thin film transistor array panel A thin film transistor array panel includes an insulation substrate; a gate line and a first electrode on the insulation substrate; a gate insulating layer on the gate line and the first electrode; a data line on the gate insulating layer; a passivation layer on the gate insulating layer and the data line; and a second electrode on the passivation layer. Relative permittivity (ε) of the gate insulating layer is more than about 15, and a thickness of the gate insulating layer is about 2000 angstroms.
US09559125B2	Array substrate, display device, and method for manufacturing the array substrate An array substrate includes a substrate and data lines and scan lines arranged on the substrate. The data lines and the scan lines define plural pixel regions. A thin film transistor is arranged in each pixel region and includes a gate electrode, a source electrode, a drain electrode, and an active region. The gate electrode is arranged above the active region. The source electrode and the drain electrode are arranged at two opposite sides of the active region respectively. A light shielding metal layer is further arranged in each pixel region. The light shielding metal layer and the data lines are arranged in the same layer on the substrate. The light shielding metal layer is arranged under the active region and at least partially overlaps with the active region. The data line is close to the source electrode and does not overlap with the active region at least partially.
US09559119B2	High voltage metal oxide semiconductor field effect transistor integrated into extremely thin semiconductor on insulator process An electrical device including a first semiconductor device in a first region of the SOI substrate and a second semiconductor device is present in a second region of the SOI substrate. The first semiconductor device comprises a first source and drain region that is present in the SOI layer of the SOI substrate, raised source and drain regions on the first source and drain regions, and a first gate structure on a channel region portion of the SOI layer. The second semiconductor device comprises a second source and drain region present in a base semiconductor layer of the SOI substrate and a second gate structure, wherein a gate dielectric of the second gate structure is provided by a buried dielectric layer of the SOI substrate and a gate conductor of the second gate structure comprises a same material as the raised source and drain region.
US09559117B2	Three-dimensional non-volatile memory device having a silicide source line and method of making thereof A memory device and a method of making a memory device that includes a stack of alternating layers of a first material and a second material different from the first material over a substrate, where the layers of the second material form a plurality of conductive control gate electrodes. A plurality of NAND memory strings extend through the stack, where each NAND memory string includes a semiconductor channel which contains at least a first portion which extends substantially perpendicular to a major surface of the substrate and at least one memory film located between the semiconductor channel and the plurality of conductive control gate electrodes. A source line including a metal silicide material extends through the stack.
US09559107B2	Structure and method for BEOL nanoscale damascene sidewall-defined non-volatile memory element An exposed edge of a conductive liner in a Damascene trench provides a high aspect ratio geometry of a non-volatile memory cell that can be scaled to arbitrarily small and nanoscale areas and thus provides an extremely compact non-volatile memory array layout that is applicable to any non-volatile memory technology such as resistive memory (RRAM), magnetic memory (MRAM), phase change memory (PCRAM) and the like. The high aspect ratio of the non-volatile memory cell area offsets the sharp increase in filament forming voltage required in conductive bridge memories (CBRAMs) as the non-volatile memory cells are scaled to very small sizes. The compact memory cell layout is also tolerant of lithographic overlay errors and provides a high degree of uniformity of electrical characteristics which are tunable by maskless and non-lithographic processes.
US09559105B2	Signal processing circuit A signal processing circuit includes a memory and a control portion configured to control the memory. The control portion includes a volatile memory circuit including data latch terminals, a first non-volatile memory circuit electrically connected to one of the data latch terminals, a second non-volatile memory circuit electrically connected to the other of the data latch terminals, and a precharge circuit having a function of supplying a potential that is a half of a high power supply potential to the one and the other of the data latch terminals. Each of the first non-volatile memory circuit and the second non-volatile memory circuit includes a transistor having a channel formation region including an oxide semiconductor and a capacitor connected to a node that is brought into a floating state by turning off the transistor.
US09559104B2	Mask read-only memory array, memory device, and fabrication method thereof A mask read-only memory array is provided. The mask read-only memory array includes a semiconductor substrate having a surface; and a heavily doped layer formed on the surface of semiconductor substrate. The mask read-only memory array also includes a plurality of lightly doped discrete regions formed on the heavily doped layer, and a metal silicide layer formed on the lightly doped discrete regions. Wherein the metal silicide layer and the plurality of reverse type lightly doped discrete regions form a plurality of Schottky diode memory cells. Further, the mask read-only memory array includes conductive vias formed one a partial number of the plurality of Schottky diode memory cells for applying column selecting voltage to select certain memory cells.
US09559103B2	Memory device including selectively disposed landing pads expanded over signal line Provided is a memory device. The memory device includes a substrate including a cell area and a peripheral area; gate line stacks and bit line stacks configured to vertically cross in the cell area; buried contacts disposed in areas, which are simultaneously shared by neighboring gate line stacks and neighboring bit line stacks; expanded landing pads including expanded portions connected to the buried contacts and expanded over adjacent bit line stacks, and disposed in a row; landing pads spaced apart from the expanded landing pads as a column, connected to the buried contacts, and having horizontal widths smaller than those of the expanded landing pads; and first storage nodes connected to the expanded portions of the expanded landing pads, and second storage nodes connected to the landing pads.
US09559099B2	Apparatus and method for FinFETs A FinFET device comprises an isolation region in a substrate, wherein the isolation region comprises a plurality of non-vertical sidewalls, a first V-shaped groove, a second V-shaped groove and a third V-shaped groove formed in the substrate, a first cloak-shaped active region over the first V-shaped groove, wherein a top surface of the first cloak-shaped active region comprises a first slope, a second cloak-shaped active region over the second V-shaped groove, wherein a top surface of the second cloak-shaped active region is triangular in shape and a third cloak-shaped active region over the third V-shaped groove, wherein a top surface of the third cloak-shaped active region comprises a second slope.
US09559098B2	Semiconductor device including voltage dividing diode In a semiconductor device connected to a mutual-inductive load, a voltage dividing diode is provided in series to an ST-MOS circuit so that an anode thereof is connected to a GND terminal and a cathode thereof is connected to the back gate of each of lateral nMOSFETs forming the ST-MOS circuit. This can inhibit parasitic transistors in the lateral nMOSFETs from malfunctioning to enable the voltage at an ST terminal to be reliably maintained at a normal voltage.
US09559097B2	Semiconductor device with non-isolated power transistor with integrated diode protection A semiconductor device configured with one or more integrated breakdown protection diodes in non-isolated power transistor devices and electronic apparatus, and methods for fabricating the devices.
US09559095B2	Semiconductor device A semiconductor device is provided. The semiconductor device includes a first transistor on a first side of a shallow trench isolation (STI) region and a second transistor on a second side of the STI region. The first transistor includes a first conductive portion having a second conductivity type formed within a well having a first conductivity type, a first nanowire connected to the first conductive portion and a first active area, and a first gate surrounding the first nanowire. The second transistor includes a second conductive portion having the second conductivity type formed within the well, a second nanowire connected to the second conductive portion and a second active area, and a second gate surrounding the second nanowire. Excess current from an ESD event travels through the first conductive portion through the well to the second conductive portion bypassing the first nanowire and the second nanowire.
US09559094B2	Semiconductor device and integrated circuit A semiconductor device includes a first semiconductor region that has an external profile including at least one corner, and that includes a semiconductor of a first conductivity type, and a first insulation region that surrounds an outer periphery of the first semiconductor region, and that includes an insulator that, at a corner portion corresponding to the corner, has a depth deeper than a depth at a location other than the corner portion. The semiconductor device further includes a second semiconductor region that surrounds an outer periphery of the first insulation region, and that includes a semiconductor of a second conductivity type, and a second insulation region that surrounds an outer periphery of the second semiconductor region, and that includes an insulator that is deeper than the depth of the first insulation region at the location other than the corner portion.
US09559084B2	Light-emitting device with multi-color temperature and multi-loop configuration A light-emitting device with multi-color temperature and multi-loop configuration is provided. The light-emitting device may include a substrate, multiple light sources disposed on the substrate, a light-emitting unit covering the light sources, a first circuit and a second circuit. Each light source may be configured to emit a respective primary radiation. The light-emitting unit may include multiple loops, each of which covering at least one of the light sources. Each loop may be adjacent to and in contact with at least another loop. A first number of the light sources covered by one or more odd-numbered loops of the loops may be electrically connected to the first circuit. A second number of the light sources covered by one or more even-numbered loops of the loops may be electrically connected to the second circuit.
US09559082B2	Three-dimensional vertical memory comprising dice with different interconnect levels The present invention discloses a three-dimensional vertical memory (3D-MV). It comprises at least a 3D-array die and at least a peripheral-circuit die. The 3D-array die comprises a plurality of vertical memory strings. The number of interconnect levels in the peripheral-circuit die is more than the number of interconnect levels in the 3D-array die, but substantially less than the number of memory cells on each of the vertical memory strings in the 3D-array die.
US09559081B1	Independent 3D stacking Packages and 3D die stacking processes are described. In an embodiment, a package includes a second level die hybrid bonded to a first package level including a first level die encapsulated in an oxide layer, and a plurality of through oxide vias (TOVs) extending through the oxide layer. In an embodiment, the TOVs and the first level die have a height of about 20 microns or less.
US09559079B2	Semiconductor stack packages A semiconductor stack package includes a printed circuit board (PCB), a first semiconductor chip, and a second semiconductor chip. The first and second semiconductor chips are disposed side-by-side on a first surface of the PCB to be spaced apart from each other. Each of the first and second semiconductor chips includes a command/address (CA) chip pad and a data input/output (DQ) chip pad. The CA chip pad of the first semiconductor chip is electrically coupled to the CA chip pad of the second semiconductor chip through a CA bonding wire.
US09559073B2	Base film and pressure-sensitive adhesive sheet provided therewith To prevent bumps on the circuit side of a bump-bearing wafer from getting crushed when grinding the back side of said wafer while protecting the circuit side with a surface-protection sheet, and also to minimize the formation of dimples and cracks on the side being ground.[Solution] This base film for a pressure-sensitive adhesive sheet bonded to a semiconductor wafer comprises: (A) a layer obtained by using energy rays to cure a formulation containing a urethane (meth)acrylate oligomer and a thiol-group-containing compound; and (B) a layer comprising a thermoplastic resin.
US09559071B2	Mechanisms for forming hybrid bonding structures with elongated bumps Embodiments of mechanisms for forming a package structure are provided. The package structure includes a semiconductor die and a substrate. The package structure includes a pillar bump and an elongated solder bump bonded to the semiconductor die and the substrate. A height of the elongated solder bump is substantially equal to a height of the pillar bump. The elongated solder bump has a first width, at a first horizontal plane passing through an upper end of a sidewall surface of the elongated solder bump, and a second width, at a second horizontal plane passing through a midpoint of the sidewall surface. A ratio of the second width to the first width is in a range from about 0.5 to about 1.1.
US09559069B2	Semiconductor device, integrated circuit structure using the same, and manufacturing method thereof A semiconductor device includes a substrate, a semiconductor structure, a metal pad, and a stress releasing material. The semiconductor structure is disposed on the substrate. The metal pad is disposed on the semiconductor structure. The metal pad includes a through hole therein. The stress releasing material is disposed in the through hole.
US09559067B2	Methods and apparatus of guard rings for wafer-level-packaging A method of forming a semiconductor device includes forming a passivation layer on top of a guard ring and an active area of a circuit device, forming a passivation contact within the passivation layer, the passivation contact being over and electrically connected to the guard ring, forming a post-passivation interconnect (PPI) guard ring over the passivation layer and electrically connected to the passivation contact, and forming a first polymer layer over the PPI guard ring, the first polymer layer extending along a sidewall of the PPI guard ring.
US09559066B2	Systems and methods for detecting and preventing optical attacks The present disclosure outlines various systems and methods for detecting an optical fault injection within an electronic device and/or preventing the optical fault injection from introducing an exploitable abnormality within the electronic device. These various systems and methods can include systems and methods that can detect or prevent laser injection attacks, which can include one or more small footprint complementary metal oxide silicon (CMOS) light detection circuits, or structures that can shield one or more transistors from a bottom side laser injection attack.
US09559065B2	Semiconductor arrangement, method for producing a semiconductor module, method for producing a semiconductor arrangement and method for operating a semiconductor arrangement A semiconductor arrangement includes upper and lower contact plates and basic chip assemblies. Each chip assembly has a semiconductor chip having a semiconductor body with upper and lower spaced apart sides. An individual upper main electrode and an individual control electrode are arranged on the upper side. The chip assemblies have either respectively a separate lower main electrode arranged on the lower side of the semiconductor chip of the corresponding basic chip assembly, or a common lower main electrode, which for each of the chip assemblies is arranged on the lower side of the semiconductor body of that chip assembly. An electrical current between the individual upper main electrode and the individual or common lower main electrode is controllable by its control electrode. The chip assemblies are connected to one another with a material bonded connection by a dielectric embedding compound, forming a solid assembly.
US09559057B1	Semiconductor device and method for manufacturing the same According to one embodiment, a semiconductor device comprises a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, a gate electrode, a gate interconnect, a second insulating layer, and a first electrode. The first semiconductor region includes a first region and a second region provided around the first region. The gate interconnect is provided on the second region. The gate interconnect includes a first portion and a second portion provided around the second portion. A thickness in the first direction of the second portion is thinner than a thickness in the first direction of the first portion. A length in the second direction of the gate interconnect is longer than a length in the third direction of the gate electrode. The first electrode contacts the gate interconnect.
US09559052B2	Semiconductor device and manufacturing method of the same A semiconductor device includes an interlayer insulating film INS2, adjacent Cu wirings M1W formed in the interlayer insulating film INS2, and an insulating barrier film BR1 which is in contact with a surface of the interlayer insulating film INS2 and surfaces of the Cu wirings M1W and covers the interlayer insulating film INS2 and the Cu wirings M1W. Between the adjacent Cu wirings M1W, the interlayer insulating film INS2 has a damage layer DM1 on its surface, and has an electric field relaxation layer ER1 having a higher nitrogen concentration than a nitrogen concentration of the damage layer DM1 at a position deeper than the damage layer DM1.
US09559048B2	Circuit carrier and method for producing a circuit carrier A circuit carrier is disclosed that includes a base body having two flat sides and a plurality of narrow sides, a first conductor track applied to a first flat side of the base body, and a leadframe arranged in the interior of the base body. A method for producing the circuit carrier is also disclosed.
US09559047B2	Passive component as thermal capacitance and heat sink Representative implementations of devices and techniques provide improved thermal performance of a chip die disposed within a layered printed circuit board (PCB). Passive components may be strategically located on one or more surfaces of the PCB. The passive components may be arranged to conduct heat generated by the chip die away from the chip die.
US09559046B2	Semiconductor device and method of forming a fan-in package-on-package structure using through silicon vias A semiconductor device is made by providing a first semiconductor die having a plurality of contact pads formed over a first surface of the first semiconductor die and having a plurality of through-silicon vias (TSVs) formed within the first semiconductor die. A second semiconductor die is mounted to the first surface of the first semiconductor die using a plurality of solder bumps. At least one of the solder bumps is in electrical communication with the TSVs in the first semiconductor die. The second semiconductor die is mounted to a printed circuit board (PCB) using an adhesive material. A plurality of solder bumps is formed to connect the contact pads of the first semiconductor die to the PCB. An encapsulant is deposited over the first semiconductor die and the second semiconductor die. An interconnect structure is formed over a back surface of the PCB.
US09559045B2	Package structure and method for manufacturing the same Provided is a package structure including a circuit board, a plurality of first contact pads, a plurality of metal pillars and at least one chip. The first contact pads are disposed on the circuit board. The chip is disposed on one portion of the first contact pads. The metal pillars are disposed on the other portion of the first contact pads, where the chip is surrounded by the metal pillars. A method for manufacturing the package structure is also provided.
US09559041B2	Semiconductor device and process for fabricating the same A thin stacked semiconductor device has a plurality of circuits that are laminated and formed sequentially in a specified pattern to form a multilayer wiring part. At the stage for forming the multilayer wiring part, a filling electrode is formed on the semiconductor substrate such that the surface is covered with an insulating film, a post electrode is formed on specified wiring at the multilayer wiring part, a first insulating layer is formed on one surface of the semiconductor substrate, the surface of the first insulating layer is removed by a specified thickness to expose the post electrode, and the other surface of the semiconductor substrate is ground to expose the filling electrode and to form a through-type electrode. A second insulating layer if formed on one surface of the semiconductor substrate while exposing the forward end of the through-type electrode, and bump electrodes are formed on both electrodes.
US09559035B2	Semiconductor device A semiconductor device includes a laminated substrate having circuit boards, an insulating plate, and a metal plate laminated, and warped convexly to the circuit board side; semiconductor chips fixed to the corresponding circuit boards; a base plate having a predetermined disposition region in which the laminated substrate is disposed, grooves disposed in the outer periphery of the disposition region, and projections disposed in positions in the disposition region adjacent to and inside the grooves. The grooves has on the projection side an inclination corresponding to an inclination caused by the warp of the laminated substrate. A joining material fills the space between the metal plate and the disposition region and covers the grooves and projections.
US09559032B2	Method for forming MOS device passivation layer and MOS device The present invention provides a method of forming a passivation layer of a MOS device, and a MOS device. The method of forming a passivation layer of a MOS device includes: forming a substrate; forming a dielectric on the substrate; patterning the dielectric to expose a part of the substrate; forming a metal on the exposed part of the substrate, and the dielectric; forming a TEOS on the metal; forming a PSG on the TEOS; and forming a silicon nitrogen compound on the PSG. Therefore, the cracks problem of the passivation can be alleviated.
US09559030B2	Electronic component and method of manufacturing the same An electronic component has a circuit board with a main surface, a chip having a sensor facing the main surface, bump electrodes disposed between the main surface and the chip so as to be placed inside of the edges of the chip in a plan view of the main surface, a dam provided between the main surface and the chip so as to extend at least from the edges of the chip to outer positions of the bump electrodes in a plan view of the main surface, and an under-fill material provided at least in a clearance between the dam and the chip. Between the main surface and the sensor, a space is formed in a region enclosed by the bump electrodes in a plan view of the main surface. The under-fill material is disposed outside of the space in a plan view of the main surface.
US09559029B2	Semiconductor device and method of forming interconnect structure for encapsulated die having pre-applied protective layer A semiconductor device has a protective layer formed over an active surface of a semiconductor wafer. The semiconductor die with pre-applied protective layer are moved from the semiconductor wafer and mounted on a carrier. The semiconductor die and contact pads on the carrier are encapsulated. The carrier is removed. A first insulating layer is formed over the pre-applied protective layer and contact pads. Vias are formed in the first insulating layer and pre-applied protective layer to expose interconnect sites on the semiconductor die. An interconnect structure is formed over the first insulating layer in electrical contact with the interconnect sites on the semiconductor die and contact pads. The interconnect structure has a redistribution layer formed on the first insulating layer, a second insulating layer formed on the redistribution layer, and an under bump metallization layer formed over the second dielectric in electrical contact with the redistribution layer.
US09559025B2	Scan testable through silicon VIAs The disclosure describes a novel method and apparatus for testing different types of TSVs in a single die or different types of TSV connections in a stack of die. The testing is facilitated by test circuitry associated with each type of TSV. The test circuitry includes a scan cell adapted for testing TSVs.
US09559024B2	Power semiconductor module A power semiconductor module, including a housing and a substrate having at least one conductive path is located, at least one power semiconductor device arranged on said conductive path at least one contact, a self-sustaining system for detecting a physical parameter or a chemical substance, a device for wireless transmitting data provided by the sensor, and an energy source. The sensor detects at least one of current, voltage magnetic fields, mechanical stress, and humidity. The power semiconductor module may be part of an electronic device.
US09559022B1	Method of manufacturing semiconductor device A method of manufacturing a semiconductor device, includes: forming a film, wherein the act of forming a film includes: transferring a substrate to a process chamber; supplying a first gas to the substrate; and supplying a second gas to the substrate by converting the second gas to plasma with a first high-frequency wave; and performing an adjustment after the act of forming the film, wherein the act of performing includes: measuring a charging condition of the substrate, setting a second high-frequency wave based on the measured charging condition, supplying a third gas to the substrate by converting the third gas to plasma with the second high-frequency wave, and adjusting the charging condition of the substrate.
US09559020B2	Method for postdoping a semiconductor wafer A method for treating a semiconductor wafer having a basic doping is disclosed. The method includes determining a doping concentration of the basic doping, and adapting the basic doping of the semiconductor wafer by postdoping. The postdoping includes at least one of the following methods: a proton implantation and a subsequent thermal process for producing hydrogen induced donors. In this case, at least one of the following parameters is dependent on the determined doping concentration of the basic doping: an implantation dose of the proton implantation, and a temperature of the thermal process.
US09559019B2	Metrology through use of feed forward feed sideways and measurement cell re-use Metrology may be implemented during semiconductor device fabrication by a) modeling a first measurement on a first test cell formed in a layer of a partially fabricated device; b) performing a second measurement on a second test cell in the layer; c) feeding information from the second measurement into the modeling of the first measurement; and after a lithography pattern has been formed on the layer including the first and second test cells, d) modeling a third and a fourth measurement on the first and second test cells respectively using information from a) and b) respectively.
US09559016B1	Semiconductor device having a gate stack with tunable work function A method for fabricating a gate stack of a semiconductor device comprises forming a first dielectric layer over a channel region of the device, forming a first nitride layer over the first dielectric layer, depositing a scavenging layer on the first nitride layer, forming a capping layer over the scavenging layer, removing portions of the capping layer and the scavenging layer to expose a portion of the first nitride layer in a n-type field effect transistor (nFET) region of the gate stack, forming a first gate metal layer over the first nitride layer and the capping layer, depositing a second nitride layer on the first gate metal layer, and depositing a gate electrode material on the second nitride layer.
US09559010B2	Asymmetric high-k dielectric for reducing gate induced drain leakage An asymmetric high-k dielectric for reduced gate induced drain leakage in high-k MOSFETs and methods of manufacture are disclosed. The method includes performing an implant process on a high-k dielectric sidewall of a gate structure. The method further includes performing an oxygen annealing process to grow an oxide region on a drain side of the gate structure, while inhibiting oxide growth on a source side of the gate structure adjacent to a source region.
US09559006B2	Light emitting device and method of manufacturing light emitting device A light emitting device includes a semiconductor light emitting element including a semiconductor stacked-layer body and an electrode disposed on a first surface of the semiconductor stacked-layer body; a resin member disposed on a first surface side of the semiconductor stacked-layer body; and a metal layer disposed in the resin member and electrically connected to the electrode. A recess is defined in an upper surface of the resin member. The metal layer is projected from the upper surface of the resin member, and is disposed to surround at least a portion of the recess.
US09559004B2	Semiconductor device and method of singulating thin semiconductor wafer on carrier along modified region within non-active region formed by irradiating energy A semiconductor device comprises a carrier including an adhesive disposed over the carrier. The semiconductor device further comprises a semiconductor wafer including a plurality of semiconductor die separated by a non-active region. A plurality of bumps is formed over the semiconductor die. The semiconductor wafer is mounted to the carrier with the adhesive disposed around the plurality of bumps. Irradiated energy is applied to the non-active region to form a modified region within the non-active region. The semiconductor wafer is singulated along the modified region to separate the semiconductor die. The semiconductor wafer is singulated along the modified region by applying stress to the semiconductor wafer. The adhesive is removed from around the plurality of bumps after singulating the semiconductor wafer. The semiconductor wafer includes a plurality of semiconductor die comprising through silicon vias. The modified region optionally includes a plurality of vertically stacked modified regions.
US09559002B2	Methods of fabricating semiconductor devices with blocking layer patterns A semiconductor device includes a circuit device on a substrate and a first insulating interlayer on the substrate and covering the circuit device. An electrode structure extends through the first insulating interlayer and at least partially through the substrate. An etch-stop layer pattern is disposed on a sidewall of the electrode structure on a side of the first insulating layer opposite the substrate. A blocking layer pattern is disposed on the etch-stop layer pattern. The device further includes an interconnection structure including a via portion passing through the blocking layer pattern to contact the through electrode structure and a wiring portion on the via portion and having a different width than the via portion. The semiconductor device may further include a contact plug electrically connected to the circuit device through the first insulating interlayer. The contact plug and the through electrode structure may include different metals.
US09559001B2	Chip package and method for forming the same According to an embodiment of the invention, a chip package is provided, which includes: a substrate having an upper surface and a lower surface; a hole extending from the upper surface toward the lower surface; an insulating layer located overlying a sidewall of the hole; and a material layer located overlying the sidewall of the hole, wherein the material layer is separated from the upper surface of the substrate by a distance and a thickness of the material layer decreases along a direction toward the lower surface.
US09559000B1	Hybrid logic and SRAM contacts The method includes forming a first opening in a dielectric layer exposing a source drain region of an SRAM device and forming a second opening in the dielectric layer exposing a source drain region of a logic device, forming a third opening in the dielectric layer exposing a gate of the SRAM device and forming a fourth opening in the dielectric layer exposing a gate of the logic device, forming a first sidewall spacer in the third opening and forming a second sidewall spacer in the fourth opening, recessing a portion of the first sidewall spacer without recessing the second sidewall spacer, forming a strapped contact in the first and third openings, the strapped contact creates an electrical connection between the source drain region of the SRAM device and the gate of the SRAM device, the electrical connection is directly above a remaining portion of the first sidewall spacer.
US09558998B2	Systems and methods for producing flat surfaces in interconnect structures In interconnect fabrication (e.g. a damascene process), a conductive layer is formed over a substrate with holes, and is polished to provide interconnect features in the holes. To prevent erosion/dishing of the conductive layer at the holes, the conductive layer is covered by a sacrificial layer (possibly conformal) before polishing; then both layers are polished. Initially, before polishing, the conductive layer and the sacrificial layer are recessed over the holes, but the sacrificial layer is polished at a lower rate to result in a protrusion of the conductive layer at a location of each hole. The polishing can continue to remove the protrusions and provide a planar surface.
US09558993B2	Pattern structures in semiconductor devices and methods of forming pattern structures in semiconductor devices A pattern structure in a semiconductor device includes an extending line and a pad connected with an end portion of the extending line. The pad may have a width that is larger than a width of the extending line. The pad includes a protruding portion extending from a lateral portion of the pad. The pattern structure may be formed by simplified processes and may be employed in various semiconductor devices requiring minute patterns and pads.
US09558991B2	Formation of isolation surrounding well implantation Embodiments of present invention provide a method of making well isolations. The method includes forming a hard-mask layer on top of said substrate; forming a first resist-mask on top of a first portion of the hard-mask layer and applying the first resist-mask in forming a first type of wells in a first region of the substrate; forming a second resist-mask on top of a second portion of the hard-mask layer and applying the second resist-mask in forming a second type of wells in a second region of the substrate; applying the first and second resist-masks in transforming the hard-mask layer into a hard-mask, the hard-mask having openings aligned to areas overlapped by the first and second regions of the substrate; etching at least the areas of the substrate in creating deep trenches that separate the first and second types of wells; and filling the deep trenches with insulating materials.
US09558990B2	Semiconductor device and method for forming the same A semiconductor device and a method for forming the same can block a moving path of electrons between neighbor buried gates. A semiconductor device includes a device isolation film formed to define an active region over a semiconductor substrate. The semiconductor device also includes a plurality of buried gates formed over the active region, and a barrier film formed between neighboring buried gates from the plurality of buried gates.
US09558989B2	Method for manufacturing semiconductor device After embedding a silicon oxide film within a second trench that opens in a semiconductor substrate using a silicon nitride film as a hard mask, the silicon oxide film over the silicon nitride film is polished, and then, wet etching is performed before a step for removing the silicon nitride film, and thereby the upper surface of the silicon oxide film within a first trench opened in the silicon nitride film is retreated.
US09558987B2	Gap-fill methods Gap-fill methods comprise: (a) providing a semiconductor substrate having a relief image on a surface of the substrate, the relief image comprising a plurality of gaps to be filled; (b) applying a gap-fill composition over the relief image, wherein the gap-fill composition comprises a non-crosslinked crosslinkable polymer, an acid catalyst, a crosslinker and a solvent, wherein the crosslinkable polymer comprises a first unit of the following general formula (I): wherein: R1 is chosen from hydrogen, fluorine, C1-C3 alkyl and C1-C3 fluoroalkyl; and Ar1 is an optionally substituted aryl group that is free of crosslinkable groups; and a second unit of the following general formula (II): wherein: R3 is chosen from hydrogen, fluorine, C1-C3 alkyl and C1-C3 fluoroalkyl; and R4 is chosen from optionally substituted C1 to C12 linear, branched or cyclic alkyl, and optionally substituted C6 to C15 aryl, optionally containing heteroatoms, wherein at least one hydrogen atom is substituted with a functional group independently chosen from hydroxyl, carboxyl, thiol, amine, epoxy, alkoxy, amide and vinyl groups; and (c) heating the gap-fill composition at a temperature to cause the polymer to crosslink. The methods find particular applicability in the manufacture of semiconductor devices for the filling of high aspect ratio gaps.
US09558986B2	Semiconductor structure and manufacturing method thereof A semiconductor structure includes a semiconductor substrate, a first doped region, a second doped region and a dielectric. The first doped region and the second doped region respectively has an aspect ratio and a dopant concentration uniformity along a depth in the semiconductor substrate. The dielectric is between the first doped region and the second doped region. The dopant concentration uniformity is within 0.2% and the aspect ratio of the semiconductor substrate is greater than about 10.
US09558982B2	Minimal contact edge ring for rapid thermal processing Embodiments of the disclosure generally relate to a support ring that supports a substrate in a process chamber. In one embodiment, the support ring comprises an inner ring, an outer ring connecting to an outer perimeter of the inner ring through a flat portion, an edge lip extending radially inwardly from an inner perimeter of the inner ring to form a supporting ledge, and a substrate support extending upwardly from a top surface of the edge lip. The substrate support may be a continuous ring-shaped body disposed around a circumference of the edge lip. The substrate support supports a substrate about its entire periphery from the back side with minimized contact surface to thermally disconnect the substrate from the edge lip. Particularly, the substrate support provides a substantial line contact with the back surface of the substrate.
US09558981B2	Control systems employing deflection sensors to control clamping forces applied by electrostatic chucks, and related methods A control system that includes deflection sensors which can control clamping forces applied by electrostatic chucks, and related methods are disclosed. By using a sensor to determine a deflection of a workpiece supported by an electrostatic chuck, a control system may use the deflection measured to control a clamping force applied to the workpiece by the electrostatic chuck. The control system applies a clamping voltage to the electrostatic chuck so that the clamping force reaches and maintains a target clamping force. In this manner, the clamping force may secure the workpiece to the electrostatic chuck to enable manufacturing operations to be performed while preventing workpiece damage resulting from unnecessary higher values of the clamping force.
US09558979B2	Method for manufacturing semiconductor device A wafer chuck holds a wafer on a surface thereof such that an image of the wafer can be formed from light reflected by the surface of the wafer chuck. The surface of the wafer chuck is a planar surface that has a reflectivity equal to or greater than 40%, and/or a whiteness index value equal to or greater than 90. The wafer chuck can include a ceramic containing aluminum oxide having a purity equal to or greater than 95%. The planar surface of the wafer chuck is such that light illuminating the surface of the wafer chuck is reflected by the surface of the wafer chuck through the wafer. The wafer chuck can be used with an apparatus for cutting the wafer, and the light reflected by the surface can be used to form an image of the wafer used identifying cutting lines on the wafer.
US09558977B2	Transport device with rotating receiving part A transport device simultaneously transports a plurality of articles with a simple device configuration. The transport device includes a chucking device that holds a magazine. An overhead carriage that transports the magazine held by the chucking device includes article storage parts that each accommodate the magazine held by the chucking device. The article storage parts include rotary tables that receive, from the chucking device, the magazine held by the chucking device. The rotary tables having received the magazines from the chucking device move from the chucking device to the article storage parts.
US09558975B2	System and method for transferring articles between vacuum and non-vacuum environments A system for transferring articles between an atmospheric pressure environment and a vacuum pressure environment. The system may include a vacuum enclosure having a wall separating the atmospheric pressure environment from the vacuum pressure environment. A transfer shaft may extend through the wall from the atmospheric pressure environment to the vacuum pressure environment. The transfer shaft may include an atmospheric transfer port disposed within the atmospheric pressure environment, a vacuum transfer port disposed within the vacuum pressure environment, and an intermediate port disposed adjacent a channel in the wall. The system may further include a movable transfer carriage disposed within the transfer shaft, the transfer carriage having an access port for providing access to an interior of the transfer carriage. The system may further include an air bearing on the transfer carriage configured to expel gas for maintaining a gap between the transfer carriage and the transfer shaft.
US09558974B2	Semiconductor processing station and method for processing semiconductor wafer A semiconductor processing station is provided. The semiconductor processing station includes a first platform, a second platform and a vacuum tunnel, wherein the first platform has a first load lock and a first plurality of chambers, and the second platform has a second load lock and a second plurality of chambers, and the vacuum tunnel connects the first and the second load locks.
US09558971B2	Substrate holding apparatus and substrate cleaning apparatus A substrate holding apparatus capable of reducing an amount of deflection of a substrate, such as a wafer, is disclosed. The substrate holding apparatus includes: a plurality of chucks configured to hold a peripheral edge of a substrate; at least one support member disposed below the substrate; and an actuating device configured to bring the chucks into contact with the peripheral edge of the substrate while elevating the support member to bring the support member into contact with a lower surface of the substrate, and configured to move the chucks in a direction away from the peripheral edge of the substrate while lowering the support member to separate the support member away from the lower surface of the substrate.
US09558970B2	Device and method for drying separated electronic components The invention relates to a device for at least partially drying separated electronic components comprising: a carrier for the electronic components; a moisture-absorbing material; and a holder covered with the moisture-absorbing material, wherein the holder and the carrier are displaceable relative to each other such that the electronic components for drying can be brought into contact with the moisture-absorbing material.
US09558969B2	Method and device for pumping of a process chamber A pumping device intended to be connected to a process chamber (2) includes a dry primary vacuum pump, an auxiliary pump mounted so that the auxiliary pump bypasses a check valve on the vacuum pump, a first valve device connected to a purging device for purging the dry primary vacuum pump and intended to be connected to a gas supply, a second valve device mounted so that the second valve device bypasses a check valve upstream from the auxiliary pump, and a controller configured to control the first and second valve devices on the basis of an operating status of the process chamber in such a way that the first valve device is at least partially closed and the second valve device is open when the process chamber is operating at ultimate vacuum. Also a method for pumping of a process chamber by way of such a pumping device.
US09558968B2	Single or multi chip module package and related methods A method of forming a semiconductor device package. Implementations may include providing an adhesive tape; contacting at least one electrical contact of at least one die with an adhesive surface of the adhesive tape; mechanically and electrically coupling at least one clip with the at least one die and contacting an electrical contact of the at least one clip with the adhesive surface; one of overmolding and encapsulating the at least one die and a majority of the at least one clip with one of a mold compound and an encapsulating compound, respectively, wherein the at least one electrical contact of the at least one die and the electrical contact of the at least one clip are not one of overmolded and encapsulated, forming the semiconductor device package; removing the semiconductor device package from the adhesive surface; and including no leadframe in the package.
US09558967B2	Method of manufacturing semiconductor device An improvement is achieved in the reliability of a semiconductor device by preventing a dielectric breakdown between two semiconductor chips facing each other. During the manufacturing of first and second semiconductor chips, the process of planarizing the upper surfaces of insulating films is performed. Then, the first and second semiconductor chips are stacked via an insulating sheet with the respective insulating films of the first and second semiconductor chips facing each other such that the respective coils of the first and second semiconductor chips are magnetically coupled to each other.
US09558966B2	Semiconductor device packages, packaging methods, and packaged semiconductor devices Semiconductor device packages, packaging methods, and packaged semiconductor devices are disclosed. In some embodiments, a package for a semiconductor device includes an integrated circuit die mounting region and a molding material around the integrated circuit die mounting region. An interconnect structure is over the molding material and the integrated circuit die mounting region. A protection pattern is in a perimeter region of the package around the interconnect structure. The protection pattern includes a first conductive feature that is vertical within the package near a second conductive feature. The first conductive feature has a first width, and the second conductive feature has a second width. The second width is greater than the first width.
US09558965B2	Semiconductor device with thin profile WLCSP with vertical interconnect over package footprint A semiconductor wafer has a plurality of first semiconductor die. A second semiconductor die is mounted to the first semiconductor die. The active surface of the first semiconductor die is oriented toward an active surface of the second semiconductor die. An encapsulant is deposited over the first and second semiconductor die. A portion of a back surface of the second semiconductor die opposite the active surface is removed. Conductive pillars are formed around the second semiconductor die. TSVs can be formed through the first semiconductor die. An interconnect structure is formed over the back surface of the second semiconductor die, encapsulant, and conductive pillars. The interconnect structure is electrically connected to the conductive pillars. A portion of a back surface of the first semiconductor die opposite the active surface is removed. A heat sink or shielding layer can be formed over the back surface of the first semiconductor die.
US09558964B2	Method of fabricating low CTE interposer without TSV structure A microelectronic assembly including a dielectric region, a plurality of electrically conductive elements, an encapsulant, and a microelectronic element are provided. The encapsulant may have a coefficient of thermal expansion (CTE) no greater than twice a CTE associated with at least one of the dielectric region or the microelectronic element.
US09558946B2	FinFETs and methods of forming FinFETs An embodiment is a method including forming a fin on a substrate, forming a first doped region in a top portion of the fin, the first doped region having a first dopant concentration, and forming a second doped region in a middle and bottom portion of the fin, the second doped region having a second dopant concentration, the second dopant concentration being less than the first dopant concentration.
US09558944B2	System, method and reticle for improved pattern quality in extreme ultraviolet (EUV) lithography and method for forming the reticle A reticle for use in an extreme ultraviolet (euv) lithography tool includes a trench formed in the opaque border formed around the image field of the reticle. The trench is coated with an absorber material. The reticle is used in an euv lithography tool in conjunction with a reticle mask and the positioning of the reticle mask and the presence of the trench combine to prevent any divergent beams of radiation from reaching any undesired areas on the substrate being patterned. In this manner, only the exposure field of the substrate is exposed to the euv radiation. Pattern integrity in neighboring fields is maintained.
US09558939B1	Methods for making a semiconductor device including atomic layer structures using N2O as an oxygen source A method for making a semiconductor device may include forming a plurality of spaced apart structures on a semiconductor substrate within a semiconductor processing chamber, with each structure including a plurality of stacked groups of layers. Each group of layers may include a plurality of stacked base silicon monolayers defining a base semiconductor portion and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions. Furthermore, the oxygen monolayers may be formed using N2O as an oxygen source.
US09558938B2	Method of manufacturing nitride semiconductor template A method of manufacturing a nitride semiconductor template that includes a base substrate of a sapphire substrate and a nitride semiconductor layer represented by a general formula AlxGa1-xN (0.3≦x≦1) includes: contacting the base substrate with a water vapor atmosphere, nitriding a surface of the base substrate by contacting the base substrate with a nitrogen raw material to form a nitrided area on the surface of the base substrate, and growing a nitride semiconductor layer on the nitrided area.
US09558935B2	Hydrogen-free silicon-based deposited dielectric films for nano device fabrication Embodiments of the present invention provide hydrogen-free dielectric films and methods of fabrication. A hydrogen-free precursor, such as tetraisocyanatosilane, and hydrogen-free reactants, such as nitrogen, oxygen (O2/O3) and nitrous oxide are used with chemical vapor deposition processes (PECVD, thermal CVD, SACVD, HDP CVD, and PE and Thermal ALD) to create hydrogen-free dielectric films. In some embodiments, there are multilayer dielectric films with sublayers of various materials such as silicon oxide, silicon nitride, and silicon oxynitride. In embodiments, the hydrogen-free reactants may include Tetra Isocyanato Silane, along with a hydrogen-free gas including, but not limited to, N2, O2, O3, N2O, CO2, CO and a combination thereof of these H-Free gases. Plasma may be used to enhance the reaction between the TICS and the other H-free gasses. The plasma may be controlled during film deposition to achieve variable density within each sublayer of the films.
US09558932B2	Lateral wafer oxidation system with in-situ visual monitoring and method therefor Wafer oxidation apparatus for selective oxidation of a semiconductor workpiece has an oxidation chamber. The oxidation chamber is heated by external infrared heating lamps. A chuck assembly is disposed within the oxidation chamber and configured to be approximately thermally isolated from the oxidation chamber. Carrier gas pathways deliver heated carrier gasses to the oxidation chamber at variable rates for oxidation uniformity.
US09558930B2	Mixed lithography approach for e-beam and optical exposure using HSQ In one aspect, a method of forming a wiring layer on a wafer is provided which includes: depositing a HSQ layer onto the wafer; cross-linking a first portion(s) of the HSQ layer using e-beam lithography; depositing a hardmask material onto the HSQ layer; patterning the hardmask using optical lithography, wherein the patterned hardmask covers a second portion(s) of the HSQ layer; patterning the HSQ layer using the patterned hardmask in a manner such that i) the first portion(s) of the HSQ layer remain and ii) the second portion(s) of the HSQ layer covered by the patterned hardmask remain, wherein by way of the patterning step trenches are formed in the HSQ layer; and filling the trenches with a conductive material to form the wiring layer on the wafer.
US09558929B2	Polymer on graphene A top-gated graphene field effect transistor can be fabricated by forming a layer of graphene on a substrate, and applying an electrochemical deposition process to deposit a layer of dielectric polymer on the graphene layer. An electric potential between the graphene layer and a reference electrode is cycled between a lower potential and a higher potential. A top gate is formed above the polymer.
US09558926B2	Apparatus and method for rapid chemical analysis using differential desorption The present invention is directed to a method and device to generate a chemical signature for a mixture of analytes. The present invention involves using a SPME surface to one or both absorb and adsorb the mixture of analytes. In an embodiment of the invention, the surface is then exposed to different temperature ionizing species chosen with appropriate spatial resolution to desorb a chemical signature for the mixture of analytes.
US09558925B2	Device for separating non-ions from ions A device for separating non-ions from ions is disclosed. The device includes a plurality of electrodes positioned around a center axis of the device and having apertures therein through which the ions are transmitted. An inner diameter of the apertures varies in length. At least a portion of the center axis between the electrodes is non-linear.
US09558921B2	Magnetron sputtering apparatus A magnetron sputtering apparatus includes a vacuum chamber, a cathode target that rotates on the outer side of a backing plate in the vacuum chamber, a magnetic circuit that is spaced from the outer side of the cathode target and defines an opening through which a plasma including a target material removed from the cathode target is ejected, and a yoke around the outer side of the cathode target, the yoke supporting the magnetic circuit.
US09558913B2	System for detecting and counting ions A system for detecting and counting ions comprises a source of atoms, a hot filament ion source, means for generating an electric field and a magnetic field, and means for detecting and counting the ions, and the filament comprises a portion that is concave along its longitudinal and/or transverse axis.
US09558911B2	Method for analyzing and/or processing an object as well as a particle beam device for carrying out the method The application relates to a method for analyzing, in particular for imaging, and/or processing of an object as well as a particle beam device for carrying out this method. In particular, the particle beam device of this application is an electron beam device and/or an ion beam device. The method in particular comprises the control unit providing a first control parameter, wherein a beam guiding unit is controlled using the first control parameter for guiding the particle beam and/or wherein a moving unit is controlled using the first control parameter for moving an object holder, correlating a position of the object holder in a second coordinate system to the object position on the surface of the object, identifying a first coordinate transformation between the first coordinate system and the second coordinate system, identifying an orientation position of a distinctive feature on the surface of the object and identifying first coordinates of the orientation position in the first coordinate system, the control unit providing a second control parameter, wherein the second control parameter is used for at least one of: controlling the beam guiding unit for guiding the particle beam, controlling the moving unit for moving the object holder or controlling a detector, identifying again the orientation position of the distinctive feature and identifying second coordinates of the orientation position in the first coordinate system, comparing the first coordinates with the second coordinates, identifying a local displacement of the first coordinates to the second coordinates, identifying a second coordinate transformation using the first coordinate transformation and the local displacement and identifying a position of an area to be analyzed and/or processed on the surface of the object.
US09558910B2	Sample holder for electron microscope A sample holder for an electron microscope has multiple sample stands, can allow at least one sample stand to move, and enables multiple samples for a transmission electron microscope to be prepared by a focused ion beam apparatus. A holder tip opening is provided in a tip of the sample holder. A back end of the sample holder has a knob, a rolling mechanism, a coarse adjustment mechanism, and a connector. By pressing the knob, fixation of the rolling mechanism is canceled, and the back end from the rolling mechanism and the tip of the sample holder will rotate. This rolling mechanism enables arrangement of the samples to be rotated in both the observing of a sample and the preparing of a sample for a transmission electron microscope with the focused ion beam apparatus. Moreover, the sample stand is movable by the coarse adjustment mechanism and the fine adjustment mechanism.
US09558909B2	Multifunctional ultrafast electron gun of transmission electron microscope The present invention discloses a multifunctional ultrafast electron gun of a transmission electron microscopy. The ultrafast electron gun of a transmission electron microscope comprises: a laser source, an electron gun body and a laser introducing module. The electron gun body comprises: an electron gun sleeve comprising a first section sleeve and a second section sleeve; and, a cathode, an acceleration electrode and an anode arranged in up-down order, wherein the cathode and the acceleration electrode are located within the first section sleeve and the anode is located within the second section sleeve. The laser introducing module includes an introducing module sleeve sealedly connected between the first section sleeve and the second section sleeve and provided with a laser incoming window in a side thereof; and a laser reflective mirror located in the introducing module sleeve, which is configured to face right the laser incoming window and configured adjacent to a central axis of the introducing module sleeve, and the reflective face of which is configured to make an angle of 45° with the central axis of the introducing module sleeve. The multifunctional ultrafast electron gun of a transmission electron microscopy according to the present invention achieve the best coherence performance of the electrons obtained in the case of the photoelectron emission compared with those in the prior art.
US09558907B2	Cold field electron emitters based on silicon carbide structures A cold cathode field emission electron source capable of emission at levels comparable to thermal sources is described. Emission in excess of 6 A/cm2 at 7.5 V/μm is demonstrated in a macroscopic emitter array. The emitter has a monolithic and rigid porous semiconductor nanostructure with uniformly distributed emission sites, and is fabricated through a room temperature process which allows for control of emission properties. These electron sources can be used in a wide range of applications, including microwave electronics and x-ray imaging for medicine and security.
US09558902B2	Trigger device for a power switch A trigger device for a power switch includes a bi-metal which is arranged near to a current path of a power switch in order to control triggering, as well as a bi-metal mounting device into which the bimetal is inserted and which is designed to enclose the bi-metal, in an arrangement substantially parallel to a current path of a power switch, such that heat radiated from the current path heats the bi-metal more or less across its whole length.
US09558897B2	Actuator control method and actuator control device An actuator control method and an actuator control device that incorporate an element of feedback control in time optimal control, including: a calculation step of calculating a switching time at which an acceleration output is switched to a deceleration output and an end time of the deceleration output expressed by time elapsed from a calculation time at which calculation for control is performed using a maximum acceleration and a maximum deceleration, which are measured in advance, at the time of the maximum output of control force of an actuator; a control output step of setting the control force of the actuator to a maximum acceleration output from the calculation time to the switching time, setting the control force of the actuator to a maximum deceleration output from the switching time to the end time, and ending the output of the control force at the end time, and an update step of calculating and updating the switching time and the end time by repeating the calculation step at each preset time.
US09558894B2	Advanced electrolyte systems and their use in energy storage devices An ultracapacitor that includes an energy storage cell immersed in an advanced electrolyte system and disposed within a hermetically sealed housing, the cell electrically coupled to a positive contact and a negative contact, wherein the ultracapacitor is configured to output electrical energy within a temperature range between about −40 degrees Celsius to about 210 degrees Celsius. Methods of fabrication and use are provided.
US09558886B2	Electronic component A laminate body includes a plurality of ceramic layers and capacitor conductors embedded in the laminate body so as to be opposed to each other via one of the ceramic layers. The capacitor conductors are made of an Al-based material, and the capacitor conductors include narrow portions, respectively, which function as fuse elements. The narrow portions have an average width smaller than an average width of portions of the capacitor conductors other than the narrow portions. As a result, the electronic component has an improved capability to protect its function as a capacitor when a short circuit occurs between capacitor conductors.
US09558884B2	Power transmission apparatus A power transmission apparatus includes a cover part attached to one of a power transmitter and an electronic apparatus, the power transmitter including a primary-side coil connected to an alternating-current power supply and a primary-side resonant coil configured to receive power from the primary-side coil by electromagnetic induction, the electronic apparatus including a secondary-side coil; and a secondary-side resonant coil disposed in the cover part, and configured to transmit to the secondary-side coil the power received from the primary-side resonant coil by magnetic field resonance generated between the primary-side resonant coil and the secondary-side resonant coil.
US09558883B2	Power transmitter and method for controlling power transmission Methods and apparatus are provided for detecting a non-intended object of power reception by a power transmitter. Power transmission for communication is performed, when the load change is sensed that has a value greater than or equal to a predetermined threshold. It is determined whether a subscription request, for subscribing to a network is received within a predetermined time period. The power transmission for communication is stopped when the subscription request is not received within the predetermined time period. Power is transmitted to a power receiver that has transmitted the subscription request, when the subscription request is received within the predetermined time period. It is determined whether a leakage power value exceeds an allowable range, when the power state report is received from the power receiver. The transmission of the power to the power receiver is stopped, when the leakage power value exceeds the allowable range.
US09558882B2	Power feeding coil unit and wireless power transmission device A power feeding coil unit includes a power feeding coil, and an auxiliary coil. The auxiliary coil is arranged not to interlink with a magnetic flux that interlinks with a power receiving coil that is arranged to face the power feeding coil during power feeding. An axial direction of the auxiliary coil is nonparallel to an opposing direction of the power feeding coil and the power receiving coil. A direction of circulation of a magnetic flux generated by the auxiliary coil is opposite to a direction of circulation of a magnetic flux generated by the power feeding coil.
US09558875B1	Electronic device with signal line routing to minimize vibrations An electronic device may have a source of magnetic field such as a magnet that produces a static magnetic field. A flexible printed circuit may have a flexible tail that surrounds a central portion. The central portion may overlap the magnet. Electrical components may be mounted to the central portion. To prevent undesired vibrations and noise due to interactions between magnetic fields induced by signals flowing in signal lines in the flexible printed circuit and the static magnetic field, the signal lines may be vertically stacked or may be routed along a curved path that does not overlap the magnet. The tail may serve as a service loop that allows a portion of a housing for the device and electrical components mounted to the central portion in alignment with windows in the housing to be detached for servicing.
US09558869B2	Negative differential resistance device Apparatus and methods related to negative differential resistance (NDR) are provided. An NDR device includes a spaced pair of electrodes and at least two different materials disposed there between. One of the two materials is characterized by negative thermal expansion, while the other material is characterized by positive thermal expansion. The two materials are further characterized by distinct electrical resistivities. The NDR device is characterized by a non-linear electrical resistance curve that includes a negative differential resistance range. The NDR device operates along the curve in accordance with an applied voltage across the pair of electrodes.
US09558867B2	Flame retardant thermoplastic elastomers A flame-retardant thermoplastic elastomer compound is disclosed having polyphenylene ether, a hydrogenated styrene block copolymer, at least one solid non-halogenated phosphorus containing flame retardant, and a nucleated olefinic polymer. The compound has a before-aging tensile elongation of >200% and an after-aging tensile elongation residual of at least 75%, according to the UL 62 test, which makes it useful as an insulation layer, a jacketing layer, or both for protected electrical lines such as alternating current wire and cable products, accessory cables, and variety of injection molded electrical or electronic parts.
US09558866B2	Wire harness A wire harness including a metal pipe into which an electrical wire is inserted, a metal braided section that covers the electrical wire drawn out from the metal pipe and is formed by braiding metal bare wires that are made of a different type of metal from that of the metal pipe, and a joint pipe to one end of which the metal pipe is connected and to the other end of which the metal braided section is connected. The joint pipe is made of the same type of metal as the metal braided section or of an insulating material.
US09558864B2	Multi-drive common control bus connector system An electrical bus assembly includes a frame and a plurality of bus bar carriers connected to the frame. The bus bars are supported by the bus bar carriers in parallel spaced-apart relation. A first retainer cap is secured to a first one of the plurality of bus bar carriers located adjacent a first end of the frame. A second retainer cap is secured to a second one of the plurality of bus bar carriers located adjacent a second end of the frame. The first and second retainer caps limit axial movement of the bus bars relative to the plurality of carriers sufficiently to prevent escape of the bus bars from the carriers. A bus bar connector is also disclosed for supplying power to or from the bus bars. An electrical bus system includes a first and second bus bar assemblies and a jumper connector assembly.
US09558863B2	Electrically conductive polymers with enhanced conductivity An electrically conductive polymer linked to conductive nanoparticle is provided. The conductive polymer can include conductive monomers and one or more monomers in the conductive polymer can be linked to a conductive nanoparticle and can include a polymerizable moiety so that it can be incorporated into a polymer chain. The electrically conductive monomer can include a 3,4-ethylenedioxythiophene as a conductive monomer. The electrically conductive polymer having the conductive nanoparticle can be prepared into an electrically conductive layer or film for use in electronic devices.
US09558857B2	Systems and methods for dry storage and/or transport of consolidated nuclear spent fuel rods In one embodiment, a system and method for dry storage comprises removing spent fuel rods from their fuel rod assemblies and placing the freed fuel rods in a storage cell of a dry storage canister with a high packing density and without a neutron absorber material present.
US09558853B2	Porous UO2 sintered pellets and method for fabricating porous UO2 sintered pellets and electrolytic reduction using same A method for fabricating porous UO2 sintered pellets to be fed into the electrolytic reduction process for the purpose of metallic nuclear fuel recovery is provided, which includes forming a powder containing U3O8 by oxidizing spent nuclear fuel containing uranium dioxide (UO2) (step 1), fabricating green pellets by compacting the powder formed in step 1 (step 2), fabricating UO2+x sintered pellets by sintering the porous U3O8 green pellets fabricated in step 2 at 1200 to 1600° C., in an atmospheric gas (step 3), and forming UO2 sintered pellets by cooling the UO2+x sintered pellets to room temperature, and reduction the same at 1000 to 1400° C., in a reducing atmosphere (step 4).
US09558840B2	Semiconductor device A semiconductor device includes a memory circuit, a first FIFO, a second FIFO and an input/output circuit. The memory circuit outputs data. The first FIFO receives data from the memory circuit and outputs data synchronously with a first clock signal. The second FIFO receives data output from the first FIFO and outputs data synchronously with the first clock signal. The input/output circuit outputs data output from the second FIFO. The second FIFO is disposed closer to the input/output circuit than the first FIFO.
US09558830B2	Semiconductor device The number of level shifters is reduced in a decode circuit of a nonvolatile memory. A semiconductor device is configured with an electrically rewritable nonvolatile memory cell array, and a decode circuit which generates a selection signal to select a driver for a memory gate line (word line). The decode circuit includes a level shifter to step up a signal after predecode. The selection signal is generated by decoding predecode signals which are stepped up by the level shifter in the logical operation circuit. A logic gate to invert the logical level of the predecode signal depending on an operation mode is provided in the preceding stage of each level shifter. When decoding the stepped-up predecode signal, the logical operation circuit performs a different logical operation depending on the operation mode.
US09558822B2	Resistive memory device and method of operating the resistive memory device In operating a resistive memory device including a number of memory cells, a write pulse is applied to each of the plurality of memory cells such that each of the memory cells has a target resistance state between a first reference resistance and a second reference resistance higher than the first reference resistance. The resistance of each of the memory cells is read by applying a verify pulse to each of the plurality of memory cells. A verify write current pulse is applied to each of the memory cells that has resistance higher than the second reference resistance, and a verify write voltage pulse is applied to each of the memory cells that has resistance lower than the first reference resistance.
US09558820B2	Resistive crosspoint memory array sensing A method includes applying a voltage bump across a combined memory device comprising a volatile selector switch and a nonvolatile switch, in which the voltage bump changes a state of the volatile selector switch from a high resistance to a low resistance but does not change a state of the nonvolatile switch. A read voltage that is lower than the voltage bump across the combined memory device to read a state of the nonvolatile switch.
US09558816B2	Method for regulating reading voltage of NAND flash memory device A method of adjusting read voltages for a NAND flash memory device includes an operation of reading first page data from a first page corresponding to a paired page of a second page, an operation of simultaneously changing the first test read voltage and the third test read voltage to read second page data from a second page, an operation of performing a bitwise operation on the first page data and the second page data an operation of counting a number of memory cells corresponding to a first threshold voltage state and a fourth threshold voltage state by using a result of the bitwise operation, and an operation of setting a first read voltage and a third read voltage as a voltage corresponding to a section in which a change in the number of memory cells is a lowest value.
US09558814B2	Hybrid analog and digital memory device A memory cell including a floating gate transistor including a floating gate, and an analog sensor element adjacent to the floating gate, where an electrical characteristic of the analog sensor element is affected by an amount of charge on the floating gate.
US09558812B2	SRAM multi-cell operations A multi-memory cell operator includes a non-destructive memory array, an activation unit and a multiple column decoder. The non-destructive memory array has first and second bit lines per column. The activation unit activates at least two cells in a column of the memory array at the same time thereby to generate multiple Boolean function outputs of the data and of complementary data of the at least two cells on the first bit line and different multiple Boolean function outputs of the data and of the complementary data on the second bit line. The multiple column decoder at least activates the first and second bit lines of multiple selected columns for reading or writing. The multiple column decoder also includes a write unit to write the output of the first bit line, the second bit line or both bit lines of the selected columns into the memory array.
US09558809B1	Layout of static random access memory array A column of a static random access memory (SRAM) array includes a first subarray including a first plurality of SRAM cells and a second subarray including a second plurality of SRAM cells. Each of the first and second plurality of SRAM cells includes first through fourth source active regions by which source regions of transistors thereof are formed. The column of the SRAM array includes a first bitline formed by the third source active regions of the first plurality of SRAM cells, a second bitline formed by the third source active regions of the second plurality of SRAM cells and spaced apart from the first bitline, and a third bitline formed by a metal layer extending over the third source active regions of the first and second plurality of SRAM cells and electrically connected to the second bitline but not to the first bitline.
US09558808B2	DRAM security erase A memory includes a DRAM array having memory cells, wordlines and bitlines coupled to the memory cells, and sense amplifiers. The memory can be configured to perform a method in which a wordline of the DRAM array is set to an active state. While the wordline is active, signals develop on the respective bitlines according to the flows of charge between the memory cells coupled to the wordline and the respective bitlines. The sense amplifiers connected to the respective bitlines can remain inactive such that the sense amplifiers do not amplify the signals to storable signal levels. Then, when the wordline is set again to the inactive state, insufficient charge remains in the memory cells coupled to the wordline such that the data stored in memory cells coupled to the wordline are erased. These steps can be repeated using each of a remaining number of wordlines of all or a selected range of the DRAM array so as to erase the data stored in all of the DRAM array or a selected range.
US09558807B2	Apparatuses and systems for increasing a speed of removal of data stored in a memory cell Embodiments include apparatuses, methods, and systems including a circuit which may increase a speed of removal of data stored in a memory cell. In embodiments, the circuit may include a control logic to detect a signal and a boost circuit coupled to the control logic to allow the control logic to disable an operation of the boost circuit in response to detection of the signal. A discharge device may be coupled to the boost circuit to accelerate leakage of a leakage current in response to the detection of the signal. In the embodiment, the leakage current is a leakage current of a memory cell coupled to the discharge device and acceleration of the leakage of the leakage current and the disablement of the operation of the boost circuit may increase a speed of erasure of data in the memory cell. Other embodiments may also be described and claimed.
US09558805B2	Memory modules and memory systems A memory module includes a plurality of memory devices and a buffer chip. The buffer chip manages the memory devices. The buffer chip includes a refresh control circuit that groups a plurality of memory cell rows of the memory devices into a plurality of groups according to a data retention time of tire memory cell rows. The buffer chip selectively refreshes each of the plurality of groups in each of a plurality of refresh time regions that are periodically repeated and applies respective refresh periods to the plurality of groups, respectively.
US09558801B2	Data holding circuit including latch circuit and storing circuit having MTJ elements and data recovery method A data holding circuit includes: a latch circuit having a first terminal and a second terminal, a logical value held at the first terminal being changed according to a value to be held by the data holding circuit, and the second terminal holding an inverted logical value of the logical value held at the first terminal; and a storing circuit which stores the logical values held at the first terminal and the second terminal in response to a write signal, and sets the logical values held at the first terminal and the second terminal to the stored logical values in response to a read signal, wherein the storing circuit includes two Magnetic Tunnel Junction elements which are connected in series between the first terminal and the second terminal and in reverse directions to each other.
US09558798B2	Receiving circuit, memory interface circuit, and receiving method A receiving circuit that receives differential data strobe signals between a controller and a memory, the receiving circuit includes: a first receiver that compares one of the differential data strobe signals to the other, output a high logic value when the one of the differential data strobe signals is higher than the other, and output a low logic value when the one is lower than the other; a second receiver that compares one of the differential data strobe signals to a strobe reference voltage, output a high logic value when the one of the differential data strobe signals is higher than the strobe reference voltage, and output a low logic value when the one of the differential data strobe signals is lower than the strobe reference voltage; and a determination circuit that outputs a logical OR of an output of the first receiver and an output of the second receiver.
US09558797B2	Method and apparatus for controlling current in an array cell A method and an apparatus for controlling current in an array cell is disclosed. The method includes applying a supply voltage to a first access point of a transistor, precharging a second access point of the transistor to a predetermined voltage, applying a control voltage to a third access point of the transistor, and discharging the second access point of the transistor to turn on the transistor which causes a current flow through the array cell connected to the transistor.
US09558794B2	Semiconductor memory device including peripheral circuit for performing program and read opeartions and operating method thereof A semiconductor memory device includes a memory cell array including a plurality of pages; a peripheral circuit suitable for performing a program operation and a read operation on the memory cell array; and a control logic suitable for controlling the peripheral circuit to apply first and second pass voltages respectively to first and second word lines adjacent to a selected word line during a program verify operation or the read operation.
US09558792B2	Voltage generating circuit A circuit includes a first transistor of a first type, a second transistor of a second type, a sense amplifier, a first data line coupled with a first terminal of the sense amplifier, and a second data line coupled with a second terminal of the sense amplifier. The second type is different from the first type. A first terminal of the first transistor is configured to receive a supply voltage. A second terminal of the first transistor, a third terminal of the first transistor, a second terminal of the second transistor, a third terminal of the second transistor are coupled together and are configured to carry a voltage. A first terminal of the second transistor is configured to receive a reference supply voltage. The first and second data lines are configured to receive a voltage value of the voltage.
US09558791B2	Three-dimensional static random access memory device structures Systems and methods are provided for fabricating a static random access memory (SRAM) cell in a multi-layer semiconductor device structure. An example SRAM device includes a first array of SRAM cells, a second array of SRAM cells, a processing component, and one or more inter-layer connection structures. The first array of SRAM cells are formed in a first device layer of a multi-layer semiconductor device structure. The second array of SRAM cells are formed in a second device layer of the multi-layer semiconductor device structure, the second device layer being formed on the first device layer. The processing component is configured to process one or more input signals and generate one or more access signals. One or more inter-layer connection structures are configured to transmit the one or more access signals to activate the first device layer or the second device layer for allowing access to a target SRAM cell.
US09558787B2	Media application backgrounding A media application is disclosed. The media application provides a playback of a media item that includes a video portion and an audio portion. The media application stops the playback of the video portion of the media item while continuing to provide the audio portion of the media item. The media application resumes the playback of the video portion of the media item in synchronization with the audio portion being provided.
US09558784B1	Intelligent video navigation techniques Automatic replay or skip ahead functionality can be configured to intelligently navigate to a portion of a video a user desires to view. The context at which a user selects intelligent navigation can be analyzed to determine where to initiate automatic replay or skip ahead. The context for intelligent navigation can be based on scene or shot segmentation data, closed captioning, aggregate video navigation data from a community of users of shared demographic traits and/or interest, and/or other metadata. In the case of automatic replay, playback of a portion of a video can include enhancements for that portion, such as providing closed captioning, display at a decreased frame rate (“slow motion”), zooming in/out on a portion of the frames of a video segment, among other enhancements.
US09558783B2	System and method for displaying tape drive utilization and performance data A system includes a utilization calculation module, a performance calculation module, an input module and an output module. The input module to receive a user-selection of tape drives and time ranges over which to calculate utilization data and calculate performance data. The utilization module to calculate utilization data of the selected tape drives over the selected time ranges. The performance module to calculate performance data of the selected tape drives over the selected time ranges. The output module to generate single data points representing output of utilization data and performance data of the respective selected tape drives, and to analyze the data points to determine whether to highlight the data points in a first user-definable display region representing higher utilization and performance tape drives relative to data points in a second user-definable display region representing lower utilization and performance tape drives.
US09558781B1	Method for selecting individual discs from tightly spaced array of optical discs A cylindrical array of tightly spaced optical discs are each positioned vertically on edge to form a horizontal stack. Lifting a subset of optical discs enables that subset of optical discs to be grasped by their perimeters with much more room for robotic grippers between adjacent optical discs. An optical disc storage container includes a molded tray for vertically aligning a plurality of optical discs into the cylindrical array. The molded tray includes a bottom surface and side surfaces to support the optical discs and one or more openings formed in the bottom surface. A lifting mechanism is positioned along the one or more openings and is configured to lift the subset of optical discs a short distance relative to the remaining optical discs in the array, thereby enabling robotic grippers to grab the portion of the lifted optical disc protruding from the non-lifted optical disc array.
US09558779B2	System on chip (SoC) based on phase transition and/or phase change material System on chips (SoCs) of a microprocessor electrically connected with electronic memory devices and/or optically connected with a optical memory device are disclosed along with various embodiments of building block of the microprocessor and the electronic memory devices, wherein the microprocessor can comprise digital unit and/or neural networks based unit.
US09558774B1	Recording head with electrically removable component An apparatus includes a slider of a magnetic recording transducer comprising a plurality of electrical bond pads. A component is coupled to a pair of the electrical bond pads. A sensor is coupled to the pair of the electrical bond pads in parallel with the component. The sensor is configured to sense for one or more of thermal asperities of a magnetic recording medium, voids of the medium, spacing changes between the slider and the medium, and contact between the slider and the medium. The sensor is configured to be rendered non-functional in response to the sensor receiving a predetermined signal. The component is configured to remain operable after the sensor is rendered non-functional.
US09558770B2	Slot waveguide that couples energy to a near-field transducer A dual-slot waveguide receives energy from a coupling waveguide. The dual-slot waveguide includes first and second light propagating regions of low-index material located side-by-side in a direction normal to a light propagation direction. Inner sides of the first and second light propagating regions are separated by a first region of a high-index material. Second and third regions of the high-index material surround outer sides of the first and second light propagating regions. A near-field transducer receives portions of the energy from the first and second light propagating regions.
US09558769B1	Anti-reflection waveguide for heat-assisted magnetic recording A system, according to one embodiment, includes a magnetic head having: a near field transducer, an optical waveguide for illumination of the near field transducer, and an anti-reflection block positioned along the optical waveguide farther from a media facing side of the magnetic head than the near field transducer. The anti-reflection block is positioned a distance from the near field transducer to destructively interfere with light reflected away from the near field transducer. Other systems, methods, and computer program products are described in additional embodiments.
US09558767B2	Current-perpendicular-to-plane magneto-resistance effect element The CPPGMR element of the present invention has an orientation layer 12 formed on a substrate 11 to texture a Heusler alloy into a (100) direction, an underlying layer 13 that is an electrode for magneto-resistance measurement stacked on the orientation layer 12, a lower ferromagnetic layer 14 and an upper ferromagnetic layer 16 each stacked on the underlying layer 13 and made of a Heusler alloy, a spacer layer 15 sandwiched between the lower ferromagnetic layers 14 and the upper ferromagnetic layers 16, and a cap layer 17 stacked on the upper ferromagnetic layer 16 for surface-protection. This manner makes it possible to provide, inexpensively, an element using a current-perpendicular-to-plane giant magneto-resistance effect (CPPGMR) of a thin film having a trilayered structure of a ferromagnetic metal/a nonmagnetic metal/a ferromagnetic metal, thereby showing excellent performances.
US09558766B1	Controlling spacing between a read transducer and a recording medium using a write coil While a heat-assisted, magnetic recording medium is being read from, power is applied to a write coil of a read/write head to control a spacing between a read transducer and the recording medium via thermal expansion induced by a write pole magnetically coupled to the write coil. A coefficient of thermal expansion proximate the read transducer is higher than a coefficient of thermal expansion proximate the write pole to increase a deformation at the read transducer relative to the write pole. Optionally, a media-facing surface of the read/write head may include a recess encompassing at least the write pole to prevent contact between the write pole and the recording medium while controlling the spacing.
US09558764B2	Waveguide of a write head with reduced cross sectional area proximate a near-field transducer A write head includes a near-field transducer near a media-facing surface of the write head. The write head includes a waveguide having a core with a first side disposed proximate to the near-field transducer. The core overlaps the near-field transducer at a substrate-parallel plane. The core includes one of a step or a taper on a second side facing away from the first side. The step or the taper causes a reduced thickness of the core normal to the substrate-parallel plane. The write head includes a cladding layer that encompassing the second side of the core and that fills in the step or the taper.
US09558751B2	Media content marking and tracking methods and apparatus A system, method, and apparatus for media content marking and tracking are disclosed. An example method includes determining an identification code responsive to a request from a third-party client, generating an audio file including the identification code, transmitting the audio file to the third-party client enabling the third-party client to embed the audio file including the identification code into media content, receiving content information associated with the media content from the third-party client, storing the content information in correspondence to a stored copy of the identification code, receiving a message including the identification code from a consumer device that detected the identification code within the media content, determining the identification code corresponds to the content information, transmitting the content information to the consumer device, receiving an event from the consumer device based on the content information, and making data associated with the event graphically available for the third-party client.
US09558746B1	Large vocabulary binary speech recognition This invention describes methods for implementing human speech recognition. The methods described here are of using sub-events that are sounds between spaces (typically a fully spoken word) that is then compared with a library of sub-events. All sub-events are packaged with it's own speech recognition function as individual units. This invention illustrates how this model can be used as a Large Vocabulary Speech Recognition System.
US09558743B2	Integration of semantic context information In one implementation, a computer-implemented method includes receiving, at a computer system, a request to predict a next word in a dialog being uttered by a speaker; accessing, by the computer system, a neural network comprising i) an input layer, ii) one or more hidden layers, and iii) an output layer; identifying the local context for the dialog of the speaker; selecting, by the computer system and using a semantic model, at least one vector that represents the semantic context for the dialog; applying input to the input layer of the neural network, the input comprising i) the local context of the dialog and ii) the values for the at least one vector; generating probability values for at least a portion of the candidate words; and providing, by the computer system and based on the probability values, information that identifies one or more of the candidate words.
US09558738B2	System and method for speech recognition modeling for mobile voice search Disclosed herein are systems, methods, and non-transitory computer-readable storage media for generating an acoustic model for use in speech recognition. A system configured to practice the method first receives training data and identifies non-contextual lexical-level features in the training data. Then the system infers sentence-level features from the training data and generates a set of decision trees by node-splitting based on the non-contextual lexical-level features and the sentence-level features. The system decorrelates training vectors, based on the training data, for each decision tree in the set of decision trees to approximate full-covariance Gaussian models, and then can train an acoustic model for use in speech recognition based on the training data, the set of decision trees, and the training vectors.
US09558736B2	Voice prompt generation combining native and remotely-generated speech data An electronic device includes a processor and a memory coupled to the processor. The memory stores instructions that, when executed by the processor, cause the processor to perform operations including determining whether a text prompt received from a wireless device corresponds to first synthesized speech data stored at the memory. The operations include, in response to a determination that the text prompt does not correspond to the first synthesized speech data, determining whether a network is accessible. The operations include, in response to a determination that the network is accessible, sending a text-to-speech (TTS) conversion request to a server via the network. The operation further include, in response to receiving second synthesized speech data from the server, storing the second synthesized speech data at the memory.
US09558733B1	Audibly indicating secondary content with spoken text A system and method for adding audio indicators, such as an audio tone, to audio data corresponding to text. The audio indicator corresponds to secondary content in text, such as a footnote. The system will insert and/or modify a textual indicator at a location in the text corresponding to the secondary content. The system will then process the textual indicator during text-to-speech processing of the text so that an audio tone is output at a moment in speech data corresponding to the location of the secondary content in the text. A speech synthesis markup language may be used to create and/or modify the textual indicator.
US09558726B2	Automatic composition apparatus, automatic composition method and storage medium An automatic composition apparatus includes a processing unit. The processing unit performs (i) a calculation process of calculating a matching level of each chord progression data item for a motif including a plurality of note data items, with reference to a plurality of note connection rules each of which defines a connection relation of consecutive note types, and (ii) a melody generating process of generating a melody based on the motif and the chord progression data items which matching levels are calculated.
US09558722B2	Non-geared linear tuning hardware for acoustic guitars and related methods A non-geared linear tuning and anchoring system for strings of a stringed musical instrument employing plug-ended strings inserted into the shaft of a string retainer and tensioned by retracting the slidable string retainer within a channel aligned with the strings.
US09558717B2	Display apparatus The present application relates to a display apparatus having a panel including sub-pixels, data lines, and horizontal lines; a sensing circuit to collect sensing data by sensing for external compensation in the horizontal lines; a calculator to determine a characteristic change of each of the sub-pixels using the sensing data to calculate an external compensation value; a data aligner to receive input image data, and when the input image data corresponds to a horizontal line where the sensing is performed, to convert the input image data into compensation image data based on a compensation value; and a data driver to output a compensation data voltage corresponding to the compensation image data to a data line corresponding to the sensed horizontal line before and after the sensing is performed, and output a sensing data voltage to the data line while the sensing is performed.
US09558716B2	Method and apparatus for contextual query based on visual elements and user input in augmented reality at a device An approach is provided for enabling a contextual query based on visual elements and user input in augmented reality at a device. The approach includes a method for receiving at least one input specifying content information, wherein the input is received via at least one user interface presenting image data. The method further includes processing and/or facilitating a processing of the image data to cause, at least in part, an identification of one or more visual elements. The method also includes causing, at least in part, a construction of at least one query based, at least in part, on the content information and the one or more visual elements.
US09558715B2	Interactive passenger cabin unit and method for controlling presentations thereon A passenger cabin unit of a passenger transportation vehicle includes a display device configured to present visual effects, information and images. The display device is disposed so as to completely or substantially cover surfaces of the passenger cabin unit which are visible from inside the passenger cabin unit. The display device is divided into first display regions and a second display region. Each of the first display regions is assigned to a respective individual passenger or group of passengers. A plurality of passenger command input devices are each disposed in a respective one of the first display regions and are each configured to be operated by the respective individual passenger or group of passengers to control visual presentation. A crew command input device is configured to be operated by cabin crew to control visual presentation on some or all of the first display regions and on the second display region.
US09558704B2	GOA circuit and liquid crystal display The disclosure discloses a GOA circuit and a liquid crystal display. The GOA circuit comprises a plurality of GOA units, each sequentially charging the Nth-staged horizontal scanning lines and the (N+1)th-staged horizontal scanning lines in the display region. The GOA unit comprises N-staged pull-up control circuits, (N+1)-staged pull-up control circuits, N-staged pull-up circuits, (N+1)-staged pull-up circuits, N-staged pull-down circuits, (N+1)-staged pull-down circuits, and a pull-down holding circuit. The pull-down holding circuit holds the voltage level of the Nth-staged gate signal point and the Nth-staged horizontal scanning line to the low level after the Nth-staged horizontal scanning line is charged, and holds the voltage level of the (N+1)th-staged gate signal point and the Nth-staged horizontal scanning line to the low level after the (N+1)th-staged horizontal scanning line is charged. By way of such configuration, the two-staged GOA units share a common pull-down holding circuit to further reduce the power consumption.
US09558699B2	Liquid crystal display and driving method of the same A lateral electric field type liquid crystal display includes: an array substrate that includes: a plurality of signal lines and a plurality of scan lines arranged in a matrix to form pixel areas; and a common electrode formed to face pixel electrodes with interposing an insulating film; a counter substrate that faces the array substrate; and a liquid crystal material that is interposed between the array substrate and the counter substrate, wherein the liquid crystal material responds to an electric field parallel to a surface of the array substrate, and wherein in a vertical blanking period, which is a blanking period of a vertical period for sequentially applying scan signals to all of the scan lines, a common electrode potential is changed so that a potential difference between the common electrode potential and the pixel electrode potential becomes smaller than that before the vertical blanking period.
US09558695B2	Image display apparatus and control method therefor An image display apparatus according this invention includes: a light-emitting unit configured to emit light; a display panel configured to display an image by transmitting the light from the light-emitting unit at a transmittance based on an input image signal; and a control unit configured to set a plurality of lighting periods respectively having different lengths on a frame-by-frame basis and control lighting and extinction of the light-emitting unit in such a manner that the light-emitting unit is lit during the lighting periods and extinguished during a period other than the lighting periods, wherein the control unit makes the number of lighting periods within one frame larger when a brightness of the image is bright than when the brightness of the image is dark.
US09558692B2	Organic light emitting display device and driving method thereof An organic light emitting display device includes a display unit including pixels coupled to scan lines and data lines, first and second power lines coupled to the pixels, a DC-DC converter configured to output first and second power sources to the pixels via the first and second power lines, respectively, and a short-circuit-sensing circuit configured to detect whether a short-circuit between the first and second power lines occurs, and configured to control an operation of the DC-DC converter when the short-circuit is detected, wherein voltage levels of the first and second power sources are configured to be changed in a frame period, the frame period including a reverse voltage application period in which the voltage level of the second power source is higher than that of the first power source.
US09558690B2	Electronic device and display method thereof An electronic device includes a display panel including a plurality of sub-pixels, a distance sensor which senses a viewing distance between the display panel and a user, and a control unit which compares the viewing distance with a first critical distance and controls the display panel based on a result of comparison between the viewing distance and the first critical distance, where when the viewing distance is less than the first critical distance, the control unit controls the display panel such that all of the sub-pixels are activated and the display panel displays an image at a basic resolution, and when the viewing distance is greater than the first critical distance, the control unit controls the display panel such that a first number of sub-pixels are inactivated and the display panel displays an image at a first resolution lower than the basic resolution.
US09558682B2	Tamper evident security seal A seal housing body, extruded AL or molded plastic or metal, has cavity portions communicating through an interface region formed by one at least one frangible projection protruding from the first body into the cavity, a first cavity portion for receiving a locking body, the second cavity portion forming a shackle receiving passageway. The locking body has a channel inclined relative to and in communication with the passageway. A spring in the channel urges a shackle locking ball up the channel partially into the interface region, the ball, having a diameter sufficient to pass through the passageway, is captured in the channel by the at least one projection. The locking body has indicia and/or flanges, at one or both opposing ends, to provide tampering evidence. The channel is offset from the locking body's central plane forming a single channel side wall to preclude trapping the ball by tampering.
US09558679B2	Ultra-bright passivated aluminum nano-flake pigments An organic release agent is vacuum deposited over a substrate and surface treated with a plasma or ion-beam source in a gas rich in oxygen-based functional groups to harden a very thin layer of the surface of the deposited layer in passivating environment. Aluminum is subsequently vacuum deposited onto the hardened release layer to form a very flat and specular thin film. The film is exposed to a plasma gas containing oxygen or nitrogen to passivate its surface. The resulting product is separated from the substrate, crushed to break up the film into aluminum flakes, and mixed in a solvent to separate the still extractable release layer from the aluminum flakes. The surface treatment of the release layer greatly reduces wrinkles in the flakes, improving the optical characteristics of the flakes. The passivation of the flake material virtually eliminates subsequent corrosion from exposure to moisture.
US09558676B2	Method for simulating specific movements by haptic feedback, and device implementing the method The invention relates to a method for simulating the movements of a virtual vehicle, a user being in physical contact with a simulator including a force-feedback haptic interface, wherein said physical contact corresponds to at least one physical point of contact between the haptic interface and the body of the user that is representative of a virtual point of contact between the user and the virtual vehicle. Said method comprises at least two steps. A first step involves determining a linear acceleration vector (formula (I)) and a linear velocity vector (formula (II)) at the virtual point of contact between the user and the virtual vehicle, said vectors being representative of the movement of the vehicle at said point. A second step involves deducing a three-dimensional force vector (formula (III)) from the linear acceleration vector (formula (I)) and linear velocity vector (formula (II)), said force vector being predetermined by a linear combination of said linear acceleration and velocity vectors, the corresponding force being applied via the haptic interface substantially at the physical point of contact. The invention also relates to a device for simulating movements of a vehicle.
US09558673B2	Automated package delivery to a delivery receptacle Improving automated package delivery to mobile delivery receptacles to allow accurate and reliable package deliveries comprises a delivery receptacle for an automated package delivery via an unmanned aerial delivery device. The delivery receptacle is notified of a pending delivery and travels to a receiving location. The delivery receptacle emits infrared (“IR”) beacons from one or more IR beacon transmitters. An aerial delivery device detects the IR beacon and uses the beacons to navigate to the delivery receptacle. The delivery receptacle receives IR beacon responses from the aerial delivery device and continually or periodically directs the IR beacons in the direction of the aerial delivery device. The aerial delivery device deposits the package in the delivery receptacle. After receiving the package, the delivery receptacle transports the package to a secure location, such as into a garage.
US09558672B2	Dynamic aircraft threat controller manager apparatuses, methods and systems The DYNAMIC AIRCRAFT THREAT CONTROLLER MANAGER APPARATUSES, METHODS AND SYSTEMS (“DATCM”) transforms flight profile information, terrain, weather/atmospheric data and flight parameter data via DATCM components into comprehensive hazard avoidance optimized flight plans. Comprehensive hazard avoidance includes synergistic comprehensive turbulence and airfoil-specific icing data. In one implementation, the DATCM comprises a processor and a memory disposed in communication with the processor and storing processor-issuable instructions to receive anticipated flight plan parameter data, obtain weather data based on the flight plan parameter data, obtain atmospheric data based on the flight plan parameter data, and determine a plurality of four-dimensional grid points based on the flight plan parameter data. The DATCM may then determine comprehensive hazards mappings. With (near) real-time comprehensive hazard information and/or predictive turbulence/icing forecast specific to airfoil type and/or profile parameters, the DATCM may allow aircraft to avoid areas where comprehensive hazard is greater than a predetermined threshold and/or avoid areas where turbulence/icing may occur.
US09558671B2	Method and a device for aiding the guidance of an aircraft Method and device for aiding the guidance of an aircraft having to comply with at least one time constraint. The device can determine and present on a screen of the flight deck an offset in distance (ΔD) between the aircraft (AC) and a reference aircraft (Aref) which is defined to fly along the flight plan (TV) at an optimal speed to comply with the time constraint.
US09558665B2	Method and system for avoidance of parking violations Disclosed is a system and method for alerting users on how to avoid receiving parking violation citations. A location determining apparatus identifies a location of a user. A database stores historical parking violation citations, real-time crowdsourced parking violation citations, and other parking violation related information with a verification algorithm and an inference algorithm. Parking intent is determined by a user's location and speed and once the determination is made, the database is polled to identify whether potential parking violations exist, where an alert will be sent. A forum functionality allows information exchange and idea sharing about parking violation citations and avoidance thereof. Crowdsourced parking violation related data is gathered using an incentive method with rewards and a parking ticket payment module collects parking violation-related information for the database. Historical weather data is used to predict the impact on current parking situations.
US09558662B2	Traveling environment evaluation system A display section classifies evaluation values of a first traveling environment into a plurality of classes to obtain levels of ease of driving and displays the levels of ease of driving for each of unit areas including one or a plurality of areas. The display section displays levels of ease of driving calculated based on evaluation values of a second traveling environment as replacement for first unit areas including areas in a level of ease of driving displaced from a median.
US09558661B2	Method for traffic flow prediction based on spatio-temporal correlation mining The disclosure includes a method for traffic flow prediction based on data mining on spatio-temporal correlations. The method includes establishing a prediction model, data mining on spatio-temporal correlations, and traffic flow prediction based on spatio-temporal correlated data. The prediction model can be a linear regression model with multiple variables. The data mining on spatio-temporal correlations is based on a multi-factor linear regression model and by means of the optimization method in terms of sparse representation. The data from the spatio-temporal correlated sensors that are relevant to the prediction task are determined automatically. The traffic flow prediction based on spatio-temporal correlated data refers to that the prediction is performed with the input to the prediction model to be the data from the spatio-temporal correlated sensors.
US09558658B2	Method for transforming probe data across transportation modes Disclosed herein is a method. A relationship between a first probe type and a second different probe type is determined. The first probe type includes one of a deficient probe or an abundant probe. The second different probe type includes the other of the deficient probe or the abundant probe. A time estimate based on data corresponding to the deficient probe and/or the abundant probe is provided. Abundant probe information is converted to deficient probe information based on the time estimate.
US09558657B2	Lane level congestion splitting A controller receives probe data from a vehicle traveling on a path segment. The probe data may be collected by a mobile device. The path segment may be a multilane roadway. The controller identifies a first lane of the path segment from the probe data. The controller associated a forked route with the first lane of the path segment. The controller calculates different traffic values for the lanes of the path segment. One traffic value may be calculated directly from speeds derived from the path data. Another traffic value may be calculated by the probe data and a historical relationship.
US09558656B1	Traffic based driving analysis A driving analysis server may be configured to receive vehicle operation data from vehicle sensors and telematics devices of a first vehicle, and may use the data to identify a potentially high-risk or unsafe driving behavior by the first vehicle. The driving analysis server also may retrieve corresponding vehicle operation data from one or more other vehicles, and may compare the potentially high-risk or unsafe driving behavior of the first vehicle to corresponding driving behaviors in the other vehicles. A driver score for the first vehicle may be calculated or adjusted based on the comparison of the driving behavior in the first vehicle to the corresponding driving behaviors in the other vehicles.
US09558653B2	Home appliance and method of controlling the same A home appliance and a method of controlling the same are provided. The home appliance may include a controller that processes state data. The state data may include raw data representing an operation state of the home appliance. The controller may also output diagnosis result data representing whether or not an error has occurred in the home appliance. A tag device including a tag storage device may store the state data and the diagnosis result data, and a transmitting and receiving device may transmit the state data and the diagnosis result data when an external device is tagged.
US09558650B2	Surveillance method, surveillance apparatus, and marking module A surveillance method, a surveillance apparatus, and a marking module are applied to an active burglarproof system. The surveillance method includes the following steps. Determine whether a first wireless signal related to a marking module is received in a first sensing region, to produce a first determination result. Determine whether the first wireless signal is received in a second sensing region, to produce a second determination result. Selectively generate a warning signal according to the first determination result and the second determination result.
US09558646B2	Prompt circuit and cup utilizing the same A prompt circuit in a drinking cup includes a processor, temperature sensing and weight sensing units, and a prompt unit. The temperature sensing unit displays to a user the temperature of the liquid. The weight sensing unit detects a weight of liquid in the cup, and transmits the weight to the processor. The prompt unit includes a communication unit and a speaker unit. When any change of the weight of liquid in the cup within a first preset time is less than a preset value, the processor outputs a first control signal, to control the speaker unit to output an alarm. When the weight of liquid in the cup in unchanged for a preset time period after the speaker unit has output the alarm, the processor outputs a second control signal to the communication unit and the communication unit outputs a reminding message to a user.
US09558643B2	Emergency alert assembly An emergency alert assembly includes a base unit that may be positioned within a control room of a maritime vessel. A base control circuit is positioned within the base unit. A plurality of actuators, a base transceiver, a display, a gps and an alarm are coupled to the base unit and the base control circuit. The base transceiver may be in electromagnetic communication with an external communications network. The base transceiver selectively initiates an alarm sequence when an individual falls overboard. The gps marks the coordinates of the maritime vessel when the base transceiver initiates the alarm sequence. The alarm emits an audible alert when the base transceiver initiates the alarm sequence. A power supply is coupled to the base unit and the base control circuit. A detection network monitors a perimeter of the maritime vessel. The detection network detects when the individual falls overboard.
US09558639B2	Systems and methods of intrusion detection Systems and methods of the disclosed embodiments provide a sensor to detect a side from which a door or window is being opened, and a controller communicatively coupled to the sensor to determine the side from which the door or window is being opened, and to generate a security exception based on the determination of the side from which the door or window is being opened.
US09558631B2	Slot machine game and system with improved jackpot feature A system for awarding a progressive prize includes a bank of gaming machines accepting different bets per play as selected by a player. A random number is selected from a predetermined fixed range of numbers that does not change during play of a gaming machine. The player is allotted one or more numbers for each credit bet. The allotted numbers represent a subset of the predetermined fixed range of numbers. A feature game is triggered for the progressive prize based on a numerical comparison between the selected random number and the number(s) allotted to the player. Certain embodiments provide a trigger condition for a feature outcome based on an event having a probability related to credits bet per game at a gaming machine. A probability of success in the feature game may be higher than a probability of success in the base game.
US09558630B2	Gaming system and method for enabling a player to select progressive awards to try for and chances of winning progressive awards The present disclosure provides a gaming device, a gaming system and a method for operating a gaming device or gaming system with a plurality of progressive awards. The gaming device enables a player to select one of the progressive awards. The player's selection of which progressive award to play for is based, at least in part, on a relative probability of the player winning the selected progressive award compared to the relative probabilities of the player winning the non-selected progressive awards. After selecting which award to play for, the gaming device either provides the selected progressive award to the player or modifies the relative probability that the player will win the selected progressive award with one or more of any award selections remaining. Such a configuration enables the player to strategically select which award to play for and the order that the player will play for the awards.
US09558629B2	Gaming system and method for providing a plurality of chances of winning a progressive award The gaming system disclosed herein provides a player one or more chances or opportunities to win the same progressive award. In these embodiments, the gaming system provides the player one or more opportunities to win a progressive award in association with a first game sequence. If the player does not win the progressive award in association with the first game sequence, the gaming system determines whether to provide the player any additional chances or opportunities to win the same progressive award in a second game sequence.
US09558625B2	Systems and methods for recommending games to anonymous players using distributed storage While a player is playing one game on a gaming machine, the systems and methods described herein recommend other games to the player based on the player's real time game play, if the player is anonymous. Upon the player selecting a different game, the system may automatically transfers the player's credits between games or gaming machines. Each gaming machine may carry out one or more game.
US09558623B2	System and method of revealing the outcomes of real world wagers through geolocation reveals The invention relates to systems and methods of placing real-world wagers, obtaining outcomes of the real-world wagers, facilitating user interactions with various interactive media, and revealing the outcomes of the real-world wagers through location-based reveals to give an appearance that the outcomes of the real-world wagers resulted from the user location even though the outcomes resulted from the real-world wagers. The system may associate certain locations with a reveal such that when a user enters, is determined to be at, and/or leaves a reveal location, a reveal opportunity may be presented to the user. For example, the system may invite the user to make a purchase at a nearby partner retailer for a chance to win a payout or be guaranteed to win a payout and/or may simply obtain a particular payout (e.g., via cash, item, etc.) when a user enters a particular location.
US09558619B2	Systems and methods for carrying out an uninterrupted game with temporary inactivation A mobile gaming device may be a player's own personal tablet, smartphone, PDA, etc., with an application program installed via the internet for carrying out a remote gaming session. All gaming functions are carried out by a stationary gaming terminal communicating with the mobile device, such as by using WiFi. The mobile device operates as a user interface. If the communications link is temporarily broken during a game, the mobile device will create the appearance that the game is continuous, such as by continuing to spin reels, until communications are re-established. The reels will stop once the mobile device receives the final outcome from the gaming terminal. The player may pause the game to temporarily suspend the minimum game frequency rules. The mobile device may switch between gaming terminals. For 3D video, the original format may be adjusted for the mobile device. The gaming terminal may be a gaming machine.
US09558616B2	Gaming machine The gaming machine includes: a cabinet having a display window; one or more reels disposed in the cabinet so that the or each reel is visible from outside the cabinet through the display window, the or each of the one or more reels being provided with a reel band having symbols; and a light application device configured to apply visible light representing visual information which enables recognition of information related to games to the reel band. The or each of one or more reels has a mirror layer which reflects the visible light from the light application device. The light application device is disposed in an area outside the window frame of the display window so that the visible light is applied to the reel, on the side of the reel band.
US09558614B2	Dynamically configurable gaming machine and gaming system A gaming machine includes a cabinet having a main video display mounted on a front side of the cabinet. The gaming machine also includes at least one additional video display mounted on the front side of the cabinet either above or below the game video display. The player controls include a separate player control touch screen mounted on a deck projecting forwardly at the front side of the gaming machine cabinet, and facing upwardly to present reconfigurable player touch controls for the gaming machine. These controls may be reconfigured within a game or to change the game presentations on the machine in response to player commands or gaming network conditions.
US09558612B2	System and method for augmented reality gaming Disclosed is a method for enabling an augmented reality interaction system and a mobile device to overlay a virtual 3D component over a physical 3D component with which the virtual 3D component interacts. The method includes: enabling a user to capture a live camera image of a gaming machine cabinet via a camera on the mobile device; determining if there are image tags on the gaming machine cabinet in the live camera image; producing a virtual rendering of the gaming machine cabinet; determining virtual 3D components to be displayed over an image of a virtual gaming machine cabinet; comparing a virtual depth rendering of the virtual 3D components to a virtual depth rendering of the virtual gaming machine cabinet; and overlaying virtual 3D components without the subtracted elements onto a live camera image of the virtual gaming machine cabinet on a display of the mobile device.
US09558610B2	Gesture input interface for gaming systems Systems, methods and apparatus for providing a gesture input interface. In some embodiments, a 3-dimensional display of a game is rendered by a gaming system, where at least one game component is projected out of a screen of a display device and into a 3-dimensional space between the screen and a player. The gaming system may receive, from at least one contactless sensor device, location information indicative of a location of at least one anatomical feature of the player. The gaming system may analyze the location information indicative of the location of the at least one anatomical feature of the player in conjunction with a state of the game to identify an input command associated with the at least one game component, and may cause an action to be taken in the game, the action being determined based on the input command associated with the at least one game component.
US09558607B2	Relay attack prevention using RSSIPPLX The disclosed invention relates to a passive keyless entry receiver system having an application controller that is activated upon receipt of an entire payload of a data packet to determine if peak RSSI levels for a plurality of RSSI steps within the payload match an expected sequence of peak RSSI levels (i.e., if a fingerprint is genuine). The receiver system has a receiver that receives a wireless signal having a data packet with a plurality of power levels within a plurality of RSSI steps of the payload. The receiver system writes a plurality of peak RSSI levels to a plurality of RSSI peak payload registers that store the peak RSSI levels for RSSI steps of the payload. Once an entire payload of a data packet has been received an application controller determines if the peak payloads correspond to an expected sequence of power levels.
US09558604B2	System for permitting secure access to a restricted area A wireless device access system employs short-range wireless communication to require the proximity of a user device to a restricted area prior to communicating an unlock request. The access system authenticates the unlock request and the proximity of the user to the restricted area prior to transmitting an unlock command to an access governor. Additionally, the wireless device may require the proximity of a user token prior to operation and/or the access system may include an override within the restricted area blocking any unlock command.
US09558602B1	Smart switch for providing container security A system, apparatus, and method for a smart switch are provided. The smart switch may be integrated into various types of security devices and intelligently protect the devices from unwanted manipulation. In one particular embodiment, the smart switch may use location information from a GPS receiver to determine whether the device is in a safe zone, and the smart switch may intelligently enable or disable certain changes of the current operational status of the security device. Alternatively, pre-set time period, RFID authorization, environmental factors, or a combination of several factors may be used by the smart switch to determine whether users may change the operational status of the security device.
US09558597B2	Road emergency activation A vehicle system includes a processing device programmed to monitor an operating state of a vehicle and the operation of at least one subsystem module. Depending on the operating state of the vehicle, the processing device can detect a subsystem module failure. If a failure is detected, the processing device can perform a remedial action. The remedial action taken may be based on the type of failure detected.
US09558596B2	Alerting patient at dosing times and tracking medicine use Dosing times for medication may be tracked by taking into account preset dosing sequences and when users indicate that they have taken the medication. The medication may also be kept in its original container. An encoder disk may be attached to a medicine container. The encoder disk may be encoded with a dosing frequency that indicates how frequently the medication should be taken, as well as any other desired information. A base station may be configured to accept and hold one or more medicine containers. The base station may be configured to read the encoded dosage from the encoder disk, an RFID tag, a barcode, or another component capable of conveying dosing information, and detect when the medicine container is removed from and placed on the base station. The base station may also include various indicators of its current state.
US09558595B2	Methods and systems for intersecting digital images Methods and systems for providing an intersection effect are disclosed. For example, there is disclosed a method for intersecting a first digital image and a second digital image. In this method the first and second digital images are mixed to produce a first composite image in which the first digital image is layered on top of the second digital image. The first and second digital images are also mixed to produce a second composite image in which the second digital image is layered on top of the first digital image. The first composite image and the second composite image are then mixed using a wipe pattern to produce a target digital image that is the intersection of the first digital image and the second digital image. The wipe pattern is a function of a difference in depth between the first digital image and the second digital image.
US09558592B2	Visualization of physical interactions in augmented reality A system and method for visualization of physical interactions are described. Objects in a scene are captured with a viewing device. Physical characteristics of the objects are computed using data from at least one sensor corresponding to the objects. A physics model of predicted interactions between the one or more objects is generated using the physical characteristics of the objects. An interaction visualization is generated based on the physics model of the predicted interactions between the one or more objects. An image of the one or more objects is augmented with the interaction visualization in a display of the viewing device.
US09558583B2	Systems and methods for tracking positions between imaging modalities and transforming a displayed three-dimensional image corresponding to a position and orientation of a probe Systems and methods are provided for transforming a displayed three-dimensional image corresponding to a position and orientation of a field of view of an imaging probe. A three dimensional image of a tissue in a first co-ordinate space can be displayed. A field of view of an imaging probe in a second co-ordinate space can be configured, where the imaging probe has a plurality of transmitters removably connected to it, the transmitters operable to determine the position and orientation of the field of view relative to the positions of the transmitters in the second co-ordinate space. The first and second co-ordinate spaces can be co-registered, and the position and orientation of the field of view in the second co-ordinate space can be transformed to the first co-ordinate space. The three-dimensional image can be displayed to correspond to the transformed position and orientation of the field of view.
US09558578B1	Animation environment Methods, systems, and apparatus, including computer programs encoded on computer storage media, for animation. An animation application creates an animation environment. An input device receives input from a user to the animation application. An output device displays output to the user of the animation application. The animation application is configured to have a mode of operation that includes displaying, through the output device, a 3D animation view of the animation environment overlain by a 2D edit view of the animation environment.
US09558574B2	Method and system for conflating raster and vector data Embodiments of the present invention provide for accurate relative location information to be preserved between vector and raster data sources during non-linear transformation. In a method according to an embodiment of the present invention, raster and vector data are received that corresponds to maps and conflated in a multi-step process. Objects of at least one of vector data are identified and conflated. For example, in an embodiment of the present invention, vertices of vector objects are identified. In a subsequent step, raster data is conflated by applying a non-linear transformation to the raster data using identified vertices of vector data from before and after conflation as control points. The resulting hybrid map is output that is advantageously accurate in general but is further advantageously accurate at critical points.
US09558573B2	Optimizing triangle topology for path rendering A technique for efficiently rendering path images tessellates path contours into triangle tans comprising a set of representative triangles. Topology of the set of representative triangles is then optimized for greater rasterization efficiency by applying a flip operator to selected triangle pairs within the set of representative triangles. The optimized triangle pairs are then rendered using a path rendering technique, such as stencil and cover.
US09558570B2	Iterative reconstruction for X-ray computed tomography using prior-image induced nonlocal regularization Disclosed is a method for performing X-ray Computed Tomography scanning, the method including acquiring a plurality of images of an object, obtaining an initial image from the plurality of images, calculating NonLocal weight of the initial image, utilizing a current image estimation and registered prior image, performing a successive over-relaxation optimization to yield a new image estimation with an intensity of the new image estimation equal or greater than zero, performing a cycle update, generating an image of the object utilizing the new image estimation obtained from the optimization, and outputting a resultant image.
US09558569B2	Method and system for substantially reducing cone beam artifacts based upon image domain differentiation in circular computer tomography (CT) Cone beam artifacts arise in circular CT reconstruction. The cone beam artifacts are substantially removed by reconstructing a reference image from measured data at circular source trajectory, differentiating the reference image; generating synthetic data by forward projection of the differentiated reference image along a pre-determined source trajectory, which supplements the circular source trajectory to a theoretically complete trajectory, reconstructing a correction image from the synthetic data and optionally applying a scaling factor. Ultimately, the cone beam artifact is substantially reduced by generating a corrected image using the reference image and the correction image that has been optimally scaled based upon the adaptively determined scaling factor value.
US09558566B2	Lossless compression of fragmented image data Lossless compression of fragmented image data is disclosed. In some embodiments, a stream of information is received, wherein the stream of information comprises a sequence of tuples and wherein each of the tuples comprises data elements corresponding to one of a plurality of input channels. A channel transformer is employed to rearrange the data elements into a plurality of output channels for an output stream wherein the output channels have higher compressibility than the input channels. The compressed output stream is stored.
US09558559B2	Method and apparatus for determining camera location information and/or camera pose information according to a global coordinate system An approach is provided for processing and/or facilitating a processing of one or more images to determine camera location information, camera pose information, or a combination thereof associated with at least one camera capturing the one or more images, wherein the camera location information, the camera pose information, or a combination thereof is represented according to a global coordinate system. The approach involves causing, at least in part, an association of the camera location information, the camera pose information, or a combination thereof with the one or more images as meta-data information.
US09558558B2	Interactive follow-up visualization A system and method directed to receiving a first data set corresponding to patient data at a first time, receiving a second data set corresponding to patient data at a second time, segmenting a first region of interest in the first data set and a second region of interest in the second data set, the first and second regions corresponding to one another and aligning the first region of interest with the second region of interest to highlight a first contour indicating a change in size, shape and orientation between the first and second regions of interest.
US09558553B2	Image acquisition and management using a reference image A reference image of one or more objects is displayed on the display of a mobile device in a manner that allows a user of the mobile device to simultaneously view the reference image and a preview image of the one or more objects currently in a field of view of a camera of the mobile device. An indication is provided to the user of the mobile device whether the camera of the mobile device is currently located within a specified amount of a distance at which the reference image was acquired. In response to a user request, the camera acquires a second image of the one or more objects and optionally a distance between the camera and the one or more objects at the time the second image was acquired is recorded. An image management application provides various functionalities for accessing and managing image sequences.
US09558549B2	Image processing apparatus, method of controlling the same and storage medium An image processing apparatus comprises: shape obtaining means for obtaining information indicating a surface shape of a target object; discrimination means for discriminating a contact portion and a noncontact portion between the target object and an imaging surface of an ultrasonic probe which captures an ultrasonic image of the target object; position and orientation obtaining means for obtaining information indicating a position and orientation of the ultrasonic probe at the time of imaging; and alignment means for estimating deformation of the target object based on information indicating the surface shape, a discrimination result obtained by the discrimination means, and information indicating the position and orientation, and aligning the surface shape with the ultrasonic image.
US09558547B2	System and method for determining whether an apparatus or an assembly process is acceptable An apparatus is scanned to obtain a 3-dimensional image of the apparatus. A 2-dimensional cross-sectional image for a section of the 3-dimensional image is generated using a processor. The 2-dimensional cross-sectional image is compared with the processor to a preferred 2-dimensional cross-sectional image or to preferred dimensions for the 2-dimensional cross-sectional image. The processor determines if the apparatus or the process for making the apparatus is acceptable based on the comparison.
US09558544B2	Method and apparatus for authentication of a coin or other manufactured item A method includes: capturing an image of a coin, locating an acquisition area of the image using a landmark of the coin, the acquisition area comprising a feature unique to the coin and generating a digital representation of the acquisition area.
US09558542B2	Method and device for image processing A method for image processing includes determining an application picture of a target application and an actual environment for the target application as triggered by a preview event, obtaining a background picture according to the actual environment, performing an image processing on at least one of the application picture or the background picture so that a significance of the application picture is higher than a significance of the background picture, and outputting a combination of the application picture and the background picture in a preview environment.
US09558541B2	Method of correcting image overlap area, recording medium, and execution apparatus Disclosed herein is a method of correcting an image overlap area. More specifically, the method includes steps of identifying an overlap area between images projected by a plurality of projectors, determining a difference in at least one of brightness and color between the overlap area and non-overlap area of images, analyzing RGB information of a projected image, and controlling brightness or color of an image projected on the overlap area or the non-overlap area in response to the RGB information.
US09558536B2	Blur downscale Systems, apparatuses, and methods for generating a blur effect on a source image in a power-efficient manner. Pixels of the source image are averaged as they are read into pixel buffers, and then the source image is further downscaled by a first factor. Then, the downscaled source image is upscaled back to the original size, and then this processed image is composited with a semi-transparent image to create a blurred effect of the source image.
US09558535B2	Image processing device, image processing method, image processing program, and image display device An image processing device according to one embodiment of the invention includes a contour direction estimating unit, a direction evaluating unit, a reference region weighting processing unit, and a composition operation unit. The contour direction estimating unit estimates a contour direction in which signal values of pixels are constant values for each pixel, the direction evaluating unit decides an evaluation value of each reference pixel of the pixel based on the contour direction of the pixel estimated by the contour direction estimating unit and the contour direction of each reference pixel serving as a pixel in a reference region corresponding to the pixel for each pixel, the reference region weighting processing unit decides a weighting coefficient of the reference pixel based on the contour direction of the pixel estimated by the contour direction estimating unit and the direction of each reference pixel of the pixel from the pixel, and the composition operation unit smoothes a signal value of the pixel based on the evaluation value decided by the direction evaluating unit and the weighting coefficient decided by the reference region weighting processing unit using a signal value of the reference pixel of the pixel.
US09558534B2	Image processing apparatus, image processing method, and medium An object of the present invention is to provide an image restoration function which ensures physical accuracy, while reducing computational cost, by eliminating a division into local regions. The present invention provides an image processing apparatus including: an initial solution generating unit configured to generate an initial solution of a restored image and an initial solution of a transmittance distribution; and an iterative processing unit configured to receive input data on the generated initial solution of the restored image and input data on the generated initial solution of the transmittance distribution, and to repeat updating of one of the transmittance distribution and the restored image, using the transmittance distribution and the restored image, in such a way as to alternate the updating of the transmittance distribution with the updating of the restored image independently for each pixel.
US09558532B2	Jagged edge reduction using kernel regression An image decoder includes a base layer to decode at least a portion of an encoded video stream into a first image having a first image format. The image decoder can generate a color space prediction by scaling a color space of the first image from the first image format into a color space corresponding to a second image format. The image decoder includes an enhancement layer to decode the encoded video stream to generate a second image in the second image format based, at least in part, on the color space prediction.
US09558530B2	Method and apparatus for an inter-cell shortest communication Novel method and system for distributed database ray-tracing is presented, based on modular mapping of scene-data among processors. Its inherent properties include matching between geographical proximity in the scene with communication proximity between processors.
US09558528B2	Adaptive video direct memory access module A method, computing device, and non-transitory computer-readable medium for arbitrating data for channels in a video pipeline. The method includes determining arbitration weights for the channels. The method also includes determining which channels have arbitration weights above a threshold. The method further includes issuing data to the channels with arbitration weights above the threshold. The method also includes decrementing arbitration weights for channels for which data is issued. The method further includes repeating the determining, issuing, and decrementing until no channels have arbitration weights above the threshold.
US09558525B2	Process communication method and system An embodiment of the invention is implemented in a web browser that facilitates the visualization of dependencies between digital information and situations where changes in one piece of information or project can affect another. In such an embodiment, the user is presented with two personalized home page windows: a hierarchy view and a graph view. The hierarchy view is used to navigate through a hierarchy of documents or other digital information. The graph view is used to graphically display certain dependencies and is further used to graphically display changes to any dependencies.
US09558520B2	System and method for geocoded insurance processing using mobile devices Pursuant to some embodiments, insurance systems, methods and devices are provided which include a data storage device for storing, updating and providing access to loss risk score data, a computer processor for executing program instructions and for retrieving the loss risk score data from the data storage device, a memory, coupled to the computer processor, for storing program instructions for execution by the computer processor, a geocoding engine comprising program instructions stored in the memory for geocoding historical loss data and a plurality of loss risk factors, a scoring engine comprising program instructions stored in the memory for calculating a loss risk score for each of a plurality of geographical locations based on said historical loss data and said plurality of loss risk factors, and a communication device, coupled to the computer processor, to output loss risk score data based on geographical location.
US09558517B2	System and method for supporting mobile unit connectivity for computer server to process specific orders The present invention is an applications gateway that offers multiple functions and features for specific geographic venue locations, while providing easy access to advertising, purchasing, and redemption opportunities for that specific geographic venue location. Venue locations can be stadiums, shopping malls, amusement parks, open air spaces where people can congregate, and/or buildings, which most often require the presence of a concentration of people. The venue location may correlate to the location of the hand-held mobile unit or it may be a remote geographic venue location not near the location of the hand-held mobile unit. Access to the gateway application is through a hand-held mobile unit, which can include a mobile phone, smartphone device, or portable computer having a wireless radio transmission connection. (e.g. iPhone, Droid, iPad, Slate, etc.)
US09558515B2	Recommending food items based on personal information and nutritional content The present invention extends to systems, methods, and computer program products for recommending food items based on personal information and nutritional content. A registered customer has members in a customer group. The registered customer provides nutritional information for members of the group (e.g., family members) to a merchant computer system. The merchant computer system uses the nutritional information to recommend food items to the customer. As a customer shops, the merchant computer system compares the nutritional content of the shopping cart items with nutritional needs of the customer. Recommendations are furnished to the customer based on the shopping cart content and the nutritional needs of the customer.
US09558511B2	Method and system for providing electronic content to a user A method and system for providing a user with digital content includes a user interface provided to a user for allowing the user to be presented with the digital content. The method and system includes receiving authentication information from the user and authenticating the user if the authentication method correctly corresponds with previously stored information of the user. As a result, the user has access to the digital content, wherein the digital content is information from a third party, e.g., a vendor of goods or services or information provider, based on a user profile which comprises user preferences. The digital content is then presented to the user interface.
US09558502B2	Systems and methods to reward user interactions In one aspect, a system includes a transaction handler, a data warehouse to store transaction data recording transactions processed at the transaction handler and to store account data identifying an account of a user, and a portal to receive a user selection of a first portion of an advertisement announcing a reward. The portal is to track user interactions associated with the advertisement to determine whether the user is qualified for the reward. Upon a determination that the user has completed the user interactions for the reward, the transaction handler is to provide the reward to the account of the user via statement credit.
US09558499B2	Methods and systems for assessing psychological characteristics A method for assessing a pre-cognitive emotional response from a test subject, using responses obtained during the first moments of brain activity after presentation of a stimulus, includes exposing the test subject to a visual stimulus for between approximately 500 milliseconds and approximately 1 second, and receiving an input from the subject while the subject is exposed to the visual stimulus or within approximately 300 milliseconds after the subject is first exposed to the stimulus. The method further includes storing, in response to receiving the input, a user response that identifies one of a plurality of emotional reactions that is associated with the visual stimulus. Each of the exposing, receiving, and storing acts is repeated for a plurality of visual stimuli. The method further includes determining, based on each of the stored user responses, one or more dominant emotional characteristics of the subject.
US09558496B2	Accessing transaction documents According to one embodiment of the present invention, a system accesses transaction documents. A unique code is generated for each transaction for one or more products, wherein the unique code is associated with a transaction document including transaction information and each product is associated with a product code. The system stores the unique code and corresponding one or more product codes associated with each transaction, and accesses one or more transaction documents based on an identifier of at least one product associated with a corresponding transaction of the one or more transaction documents. Embodiments of the present invention further include a method and computer program product for accessing transaction documents in substantially the same manners described above.
US09558494B2	Devices, systems, and methods for tokenizing sensitive information Devices, systems, and methods for tokenizing sensitive information are provided herein. Methods may include the steps of receiving sensitive information via an input device, the input device being communicatively coupled to a transaction terminal, tokenizing the sensitive information at the input device to generate a token, and associating the token and the sensitive information together in a storage medium associated with the input device.
US09558484B2	System and method for electronic prepaid account replenishment A method for crediting a customer account maintained by a vendor of services in response to payment received from a customer is disclosed herein. The method includes issuing, to the customer, a membership account number associated with at least the customer account. A membership account number and a payment corresponding to a requested amount of a service offered by the vendor are received from the customer at a point-of-sale. The method further includes generating, at the point-of-sale, an authorization message including at least the membership account number and embedded transaction information identifying the service offered by the vendor and the requested amount. The embedded transaction information is then communicated from the point-of-sale to a database server. The customer account is credited, in response to the embedded transaction information, based upon an amount of the payment. The method also includes electronically transferring funds based upon the amount of the payment from a first account associated with the point-of-sale to a second account associated with the vendor.
US09558482B2	Point of sale (POS) docking station system and method for a mobile barcode scanner gun system with mobile tablet device or stand alone mobile tablet device A POS docking station for a mobile scanner gun system or mobile tablet (tablet) processes POS sales transactions. An upper housing assembly enclosure houses the “tablet” in a “cradle fashion” fitting snuggly around the “tablet”, providing stability and form fit integration. An electrical connector integrates the upper housing to a printed circuit board (PCB1) to the “tablet”. A base housing assembly includes a scanner trigger button, a base mounting plate, a primary printed circuit board (PCB2) with at least one USB, Ethernet, Serial port, scan switch interface and an external power supply port, and a tilting and rotational mechanism. PCB1 is connected to PCB2 through an interface cable connecting the POS docking station to the “tablet”. USB, Ethernet, Serial ports, scan switch interface and power supply within the base housing assembly are fully operable to the “tablet”, and can be connected to a variety of store systems POS peripheral devices.
US09558481B2	Secure account provisioning A mobile payment system and method are described that facilitates the secure and real time user authentication and activation of a mobile payment account for a user portable electronic device over a communications network.
US09558479B1	Systems and methods for verification of identity and location Techniques for verifying identity and/or location of a customer. One embodiment involves receiving a customer-provided address from a customer in a communication via a computer network or telephone network. The customer is a person or entity paying to receive calls from a resident of a controlled access residential institution. The embodiment further involves accessing a computer system to identify location information associated with the customer, the location information derived from additional information within or about the communication and determining a reliability estimate of the customer-provided address by comparing the customer-provided address with the location information associated with the customer that was identified based on the additional information. The embodiment may involve notifying a telecommunications provider, the controlled access residential institution, or law enforcement based on the reliability estimate of the customer-provided address.
US09558475B2	Location based to-do list reminders A method and apparatus for determining when to remind a user about a task in a to-do list based on the user's current geo-location are disclosed. The illustrative embodiment employs a to-do list in which tasks have an associated geo-location, and optionally, a priority and/or a due date. The illustrative embodiment determines whether to remind the user about a task in the to-do list based on information including the following: the user's current location; the user's speed and direction of travel; the geo-locations of tasks in the to-do list; the priorities of tasks in the to-do list; and the due dates of tasks in the to-do list.
US09558472B1	Inventory facility This application describes fabric storage totes, as well as techniques for use of fabric totes in an infrastructure that uses mechanical systems to transport the fabric totes and/or access inventory items in the fabric totes. The fabric totes may include a fabric base and side walls, with a hardened material support structure. Additionally, the fabric totes may include two handles made of a substantially hard material. The fabric totes may be accessed and transported, manually and/or mechanically, via interaction with the handles.
US09558471B2	Kinematic asset management A system for managing kinematic assets is disclosed. In one embodiment, the system comprises an electronic identification device associated with an asset. The system further comprises a container comprising a reader disposed within the container for receiving a unique identification of the identification device. The container further comprises a reader node for maintaining an inventory record comprising the asset and for generating a report when the asset is not detected by said reader. The report further comprises a location of the container when said report is generated. The system further comprises a kinematic asset management platform comprising an asset registry for storing data conveyed by the report and a reports engine for generating a second report conveying the location of said container when the report is generated.
US09558468B2	Transportation route management Monitoring systems in accordance with the disclosure store one or more reporting behavior profiles that include parameters that determine when a monitoring device associated with a shipping container initiates transmission of a status message to a remote location, e.g., an operations center, a government interface, or a commercial interface. At least a portion of the parameters of the reporting behavior profiles are dependent on a location of the monitoring system. The reporting behavior profiles can cause the monitoring device to initiate a message based on many conditions. For example, the report conditions can include when the present location deviates from a predetermined route of the reporting behavior profile, when the present location of the container remains unchanged for a certain time, when a security condition of the container changes, when an environmental condition of the container changes, etc.
US09558467B1	Systems and/or methods for grid-based multi-level digitization of enterprise models Certain example embodiments relate to techniques for creating/updating a computerized model usable with an enterprise modeling platform. The computerized model is defined with a first modeling language. An image of a hand-drawn model existing on a physical substrate and following rules of a second modeling language is acquired. Multi-level image processing is performed on the image, the different levels corresponding to recognitions of (a) structures in the image corresponding to objects in the hand-drawn model, (b) object types for the identified structures, (c) text associated with the identified structures, and (d) connections between at least some of the identified structures. A digitized, iteratively-reviewed version of the hand-drawn model is generated and transformed into the computerized model using rules defining relationships between elements in the different modeling languages. Generation includes presenting, on a level-by-level basis, results of the recognitions; and accepting user modification(s) to the results on that basis.
US09558466B2	Methods for calculating return on investment for a contact center and devices thereof A method, non-transitory computer readable medium, and account manager device comprises obtaining a plurality of inputs associated with the contact center in response to a request to calculate the return on investment associated with the contact center, wherein the plurality of inputs includes one or more contact center historical data and one or more contact center projected data. At least a part of the obtained one or more contact center historical data is compared against the one or more contact center projected data to identify one or more improvement areas in the contact center. One or more costs to implement the identified one or more improvement areas in the contact center are determined. The return of investment associated to the contact center is determined based on the one or more determined costs. The determined return on investment associated to the contact center is provided.
US09558465B1	Annotations-based generic load generator engine A generic transaction generator framework for testing a network-based production service may work in conjunction with a product-specific transaction creator module that executes transactions on the service. The transaction creator module may include runtime-discoverable information to communicate product specific details to the framework. Runtime-discoverable information may identify initialization methods, terminate methods, transaction types, transaction methods, transaction dependencies as well as testing parameters, such as transaction rate, testing period and a desired distribution of transaction types. The framework may generate and execute various test transactions and collect performance metrics regarding how well the service performed the test transactions.
US09558463B2	In-field device for de-centralized workflow automation In one example, a system is provided. The system includes a portable, in-field unit including: a tag reader to acquire an ID tag identifier from a tag located in or on a physical item positioned within functional range of the in-field unit tag reader; a digital processor arranged for executing software code stored in the in-field unit responsive to the acquired ID tag identifier, the stored software code including—a customer application layer; and a database adapter component configured to provide database services to the processor; wherein the database services include accessing a stored database to acquire stored data associated with the acquired ID tag identifier.
US09558461B2	Task assignments to workers Network presence is used to assign a worker to a task. In today's networked environment, workers may be remotely located but still accomplish tasks. As long as workers have network access, the workers may be assigned tasks for completion. As tasks are completion, the network presences of the workers are determined, and the tasks may be assigned based on the network presences.
US09558460B2	Methods of analyzing software systems having service components A method of inspecting the structure of a software system composed of service solution provider having service components analyzes the relationships between services and components applying a fitness algorithm to ascertain characteristics of the system and its components and creates a human readable representation of the software system or software service provider.
US09558458B2	Method for allocating spatial resources A method for allocating spatial resources including steps of: providing a store layout; assigning categories to locations in the store layout, calculating a total score for the first store layout; and implementing the category assignments in a store.
US09558457B2	Method and system for automatically identifying optimal meeting locations A method and system for automatically identifying optimal meeting locations. The method includes receiving a plurality of meeting parameters associated with one or more participants. The method also includes identifying a list of optimal meeting locations relevant to one or more of the plurality of meeting parameters. The method further includes ranking the list of optimal meeting locations. Further, the method includes enabling a user to select an optimal meeting location from the list of optimal meeting locations. The system includes one or more electronic devices and a user electronic device. The user electronic device includes a communication interface, a memory, and a processor.
US09558454B2	System and method for model-based inventory management of a communications system A method for management entity operations includes receiving a request to collect data for an entity in a communications system, collecting the data for the entity utilizing a set of protocols selected using knowledge defined by a first data model of a data model list derived from an information model of the communications system, and saving the data collected.
US09558452B2	Hierarchical statistical model for behavior prediction and classification Technologies are generally provided far a hierarchical, feature teed statistical model that cm be used for personalized classification or predictions within a community of users. Personalization refers to learning about the habits and characteristics of individual users and adapting user experiences based on that learning. The model may be used in a communication application to predict user actions on incoming email messages and to help users triage email by making personalized suggestions based on the model predictions. A community of users associated together with the communication application may be incorporated together into a single model to enable for continuous fine-grain interaction between intelligence learned from the community of users as a whole and that learned from individual users. The single model may allow a seamless progression between predictions for a completely new user based on community observations and highly personalized predictions for a long-term user based on individual observations.
US09558449B2	System and method for identifying a target area in a multimedia content element A system and method for detecting a target area of user interest within a multimedia content element are provided. The method includes receiving the multimedia content element from a user computing device; partitioning the multimedia content element into a number of partitions, each partition having at least one object therein; generating at least one signature for each partition of the multimedia content element, wherein each of the at least one signatures for each partition represents a concept; determining a context of the multimedia content element based on the concepts; and identifying at least one partition of the multimedia content as a target area of user interest based on the context of the multimedia content element.
US09558447B2	Computer-implemented systems utilizing sensor networks for sensing temperature and motion environmental parameters; and methods of use thereof Computer-implemented systems utilizing sensor networks for sensing temperature and motion environmental parameters, and performing at least operations of electronically establishing, based on pattern recognition criteria, correspondence of a plurality of representative features a plurality of characteristics of an occurrence, where a first instance of the occurrence occurred within a first time period of a plurality of time periods; electronically discovering, based on the correspondence, a second instance of the occurrence in an environment during a second time period of the plurality of time periods; and electronically causing, based on the discovery of the second instance of the occurrence, a change in the environment via an electronically-controlled device.
US09558444B2	Neural processing unit The subject matter disclosed herein provides methods, apparatus, and articles of manufacture for neural-based processing. In one aspect, there is provided a method. The method may include reading, from a first memory, context information stored based on at least one connection value; reading, from a second memory, an activation value matching the at least one connection value; sending, by a first processor, the context information and the activation value to at least one of a plurality of microengines to configure the at least one microengine as a neuron; and generating, at the at least one microengine, a value representative of an output of the neuron. Related apparatus, systems, methods, and articles are also described.
US09558435B2	Communication apparatus being selectively powered by a main power supply or a back-up power supply depending on the operating mode of the communication apparatus A main power supply supplies a supply target including a network connector with power for allowing the supply target to operate. The network connector operates by using power supplied from the main power supply. A network-event detector detects an electrical change in the telephone network as a network event. A backup power supply is provided separately from the main power supply and is charged with power supplied from the main power supply during operation of the main power supply. A normal-mode setter operates by using power supplied from the backup power supply in a stopped mode, and to set an operational mode to a normal mode in response to occurrence of a voltage reduction state in a backup voltage. A forcing discharger discharges charged power of the backup power supply in response to the network-event detector detecting the network event in the stopped mode, thereby generating the voltage reduction state.
US09558432B2	Buffer management technology in image forming apparatus An image forming apparatus having a second storage device such as an HDD mounted thereon, when it receives an input of a job, determines a necessity of an input processing of image data into the second storage device, a necessity of an output processing of image data from the secondary storage device, and a timing of the input processing and the output processing in the job. Then, the image forming apparatus switches an output buffer, which is an area set in a primary storage of the image forming apparatus and is used for the output processing of image data from the secondary storage device, to a buffer for use in the input processing or to a buffer for use in the output processing in accordance with a result of the determination.
US09558431B2	Optical scanning apparatus An optical scanning apparatus includes an optical box having a top surface that is constituted by a single lid. A first surface of the top surface is disposed closer to a rotary polygon mirror than a second surface and is disposed closer to a bottom surface of the optical box than an edge portion of a light deflector positioned farthest from the bottom surface. A third surface of a convex portion of the top surface is positioned farther from the bottom surface than the first surface. A lower edge portion of the convex portion is disposed outside a circumscribed circle of the rotary polygon mirror.
US09558429B2	Printing apparatus, control method of printing apparatus, and storage medium In a case where a job for executing both one-sided printing and two-sided printing is received, printing is controlled based on whether or not a predetermined type of sheets in which there is an order between the sheets are used for the received job whereby productivity is improved in a case where the predetermined type of sheets are not used for the received job, and a mismatch between content of a page and an order of the sheets does not occur in a case where the predetermined type of sheets is used for the received job.
US09558428B1	Inductive image editing based on learned stylistic preferences An automatic image editing system is a sophisticated and intelligent computer-based image editing system that automatically applies edits to attributes of captured images in accordance with the preferences and editing style of any given user. The system initially learns a user's image editing style with examples of user-edited images. The system continues to learn or adjust to the user's evolving image editing style through feedback of subsequent manual edits by the user to attributes of computer implemented automatically edited images.
US09558423B2	Observer preference model A computer implemented method for predicting preferences of an observer for two images, the method comprising the steps of: receiving the first image and an associated salience map indicating regions of the first image that are likely to be scrutinized by the observer; receiving a content masking map indicating differences between the first image and the second image that the observer is likely to be able to perceive; determining a number of preference measures; and processing the salience map and the content masking map to determine a distribution of a set of values of the preference measures predicting the preferences of the observer for the first image and the second image, the set of values of the preference measures having a number of degrees of freedom.
US09558417B2	Distributed document processing A system for document processing including decomposing an image of a document into at least one data entry region sub-image, providing the data entry region sub-image to a data entry clerk available for processing the data entry region sub-image, receiving from the data entry clerk a data entry value associated with the data entry region sub-image, and validating the data entry value.
US09558414B1	Method for calculating a response time A method for calculating a response time is described. The response time is required in order to direct the attention of a vehicle's driver at the traffic on the road. The driver is monitored by sensors and a state of attentiveness of the driver is ascertained. The state of attentiveness is used to calculate a value, to which an anticipated response time is assigned. Further a method for operating a motor vehicle, a computer program product and a correspondingly equipped motor vehicle are described.
US09558413B2	Bus detection for an autonomous vehicle Methods and systems are provided that may allow an autonomous vehicle to discern a school bus from image data. An example method may include receiving image data indicative of a vehicles operating in an environment. The image data may depict sizes of the vehicles. The method may also include, based on relative sizes of the vehicles, determining a vehicle that is larger in size as compared the other vehicles. The method may additionally include comparing a size of the determined vehicle to a size of a school bus and based on the size of vehicle being within a threshold size of the school bus, comparing a color of the vehicle to a color of the school bus. The method may further include based on the vehicle being substantially the same color as the school bus, determining that the vehicle is representative of the school bus.
US09558412B2	Vehicle exterior environment recognition device A vehicle exterior environment recognition device includes an image acquiring module that acquires an image, a traffic sign identifying module that identifies a circle of a predetermined radius centering on any one of pixels in the image as a traffic sign, a traffic sign content recognizing module that recognizes content of the identified traffic sign, and a traffic sign content determining module that uses at least one template for one certain country to integrate traffic sign integration points based on correlation evaluation values with the content of the recognized traffic sign, uses a template for each of a plurality of countries corresponding to the content of the traffic sign having the traffic sign integration points to integrate total points by country based on overall evaluation values of the content of the recognized traffic sign, and conclusively determines a currently-traveling country.
US09558408B2	Traffic signal prediction An aerial image relates to a geographic area. The aerial image is analyzed to identify at least one traffic signal in the geographic area. Based at least in part on analyzing the aerial image, a timing prediction is determined for the at least one traffic signal.
US09558399B1	Feedback device to improve arm swing A device configured to provide biofeedback on arm swing during walking, running, or other movement activities is disclosed herein. The device includes motion sensing means configured to sense the motion of an arm of a user during a movement activity and output one or more signals based upon the sensed arm motion; computational means configured to compute an arm swing angle of the arm of the user using the one or more signals outputted by the motion sensing means; and one or more signaling devices operatively coupled to the motion sensing means and computational means, the one or more signaling devices configured to emit one or more signals to the user that are based upon the computed arm swing angle of the user so as to provide biofeedback to the user regarding arm swing. The use of two devices, one on each arm of a user is also disclosed herein.
US09558398B2	Person behavior analysis device, person behavior analysis system, person behavior analysis method, and monitoring device for detecting a part of interest of a person A behavior analysis/monitoring device includes: a person detection unit configured to detect a person(s) from image information obtained by capturing images covering an area around an item placement area; a part-of-interest detection unit configured to detect, for each person detected by the person detection unit, a part of interest set in a part of an upper body of the person excluding hands and arms; a position measurement unit configured to measure a position of the part of interest detected by the part-of-interest detection unit; and an item pick-up action determination unit configured to obtain a displacement of the part of interest based on the position of the part of interest obtained by the position measurement unit and to determine whether each person detected by the person detection unit performed an item pick-up action based on the displacement of the part of interest of the person.
US09558394B2	Histogram of hosoya index (HoH) features for quantitative histomorphometry Methods, apparatus, and other embodiments associated with classifying a region of cancerous tissue using a Histogram of Hosoya are described. One example apparatus includes a set of logics that acquires an image of a region of tissue demonstrating cancerous pathology, constructs a cell graph of the region of tissue, decomposes the cell graph into a set of subgraphs, computes a Hosoya Index for a subgraph, constructs a Histogram of Hosoya for the image based on the distribution of the subgraphs, and classifies the image based on the Histogram of Hosoya. Embodiments of example apparatus may generate and display the Histogram of Hosoya for the image. A prognosis for the patient may be provided based on the distribution of the histogram.
US09558393B2	Image processing device and storage medium for image processing An image processing device inputs a bright field linage of a tissue slice in which a cell nucleus is stained and a fluorescent image of the tissue slice in which a specific biological substance is stained with a fluorescent staining reagent (S10), extracts a cell nucleus from the image of the cell nucleus (S20), extracts a fluorescent bright point from the fluorescent image (S30), specifies a cell nucleus to which the fluorescent bright point is assigned on the basis of the distance between the cell nucleus and the fluorescent bright point, and assigns the fluorescent bright point with the cell nucleus (S40).
US09558392B2	Finger vein authentication system Provided is a finger vein authentication which recognizes, compares and distinguishes a user's finger vein at low capacity/high speed through a method for analyzing a level set curvature.In order to achieve the above object, there is provided a finger vein authentication system including a light source unit configured to emit near-infrared light; an optical filter unit configured to allow only light with a specific wavelength in light incident from the light source unit to penetrate therethrough; a CCD camera unit configured to capture an image including an user's finger and then to convert the captured image into an electrical signal; a memory unit configured to store a level set curvature program, the level set curvature program performing an operation for extracting a finger vein pattern from the image including the finger using a level set curvature; and a control unit configured to drive the level set curvature program.
US09558389B2	Reliable fingertip and palm detection Embodiments of a system and method for detecting a palm of a hand using an image are generally described herein. A method for detecting a palm of a hand may include determining a plurality of cumulative distance values from pixels in a set of image pixels to pixels in a plurality of finger template matches, wherein the set of image pixels includes a set of image pixels on detected edges in the image. The method may include selecting a set of finger template matches from the plurality of finger template matches, corresponding to a set of smallest cumulative distance values from the plurality of cumulative distance values. The method may include refining the set of finger template matches to create refined finger templates, bundling refined finger templates to create a bundle of refined finger templates, and verifying that the bundle of refined finger templates includes a valid palm detection.
US09558388B2	Coding device and position-determining device and position-determining method In order to increase safety, a computer-implemented method is proposed for determining the position of a lift cabin in a lift shaft with the aid of a coding device, wherein a section of the code band and/or of the bearing device is recorded with an optical detection device as a pixel image consisting of pixels and the instant of the recording being measured and assigned to the pixel image, wherein the position is determinable analytically from position markers of the code band by way of an algorithm and wherein at least one checking method which uses, inter alia, a calculated extrapolated position is carried out.
US09558387B2	Systems and methods for decoding and using data on cards Systems and methods for decoding and using data on cards are disclosed. According to one disclosed embodiment, a system for decoding and using data on cards includes: a network interface; a scanner configured to scan a passive data source on the identification card and transmit a scanner signal associated with the passive data source; a processor coupled to the scanner and the network interface, the processor configured to: receive the scanner signal; process the scanner signal and determine data stored in the passive data source.
US09558386B2	Encoded information reading terminal configured to pre-process images An encoded information reading (EIR) terminal can comprise a microprocessor, a memory, and an EIR device including a two-dimensional imager. The EIR device can be configured to output raw message data containing an encoded message and/or outputting a decoded message corresponding to an encoded message. The EIR terminal can be configured, responsive to acquiring an image containing decodable indicia, to pre-process the acquired image and transmit the pre-processed image to an external decoding computer for decoding the decodable indicia.
US09558384B2	Antenna apparatus and communication terminal instrument In an antenna apparatus, a power feed antenna includes a coil conductor and connected to a power feed circuit, a first booster conductor coupled to the coil conductor of the power feed antenna through an electromagnetic field, the first booster conductor having a planar plate shape, and a second booster conductor coupled to the first booster conductor through an electromagnetic field and coupled to the power feed antenna through an electromagnetic field. Thus, the antenna apparatus is much less influenced by nearby metallic objects and a shape of an included radiation plate may be more freely determined without requiring a highly accurate positional relationship between the radiation plate and the coil conductor.
US09558383B2	Intermodulation mitigation technique in an RFID system When multiple readers for RF transponders have to be placed in close proximity, such as in adjacent lanes of a highway toll barrier, they can be set to operate at different frequencies. When signals from two adjacent ones of the readers interfere, the resulting signal includes interference terms whose frequencies equal the sum of the reader frequencies and the difference between the reader frequencies. To remove such interference terms while passing the desired terms, a tag includes a low-pass or other frequency-selective filter.
US09558382B2	Method for an acquisition of data from external digital sensors with an RFID smart tag and a tag integrated circuit for carrying out said method A microprogram for performing communication between an RFID smart tag and external digital sensors (EDS1, EDSK) is loaded in a buffer (Bu). A hard-wired dedicated processing unit (DPU) of the tag reads, decodes and executes said microprogram through the digital communication interface (DCI). The sensor data is stored at beginning locations of said buffer (Bu), wherefrom they are read by an RFID interrogator. The tag functionality in an application is settable with the RFID interrogator to an automatic data logger or RFID wireless sensor. The tag is adjustable to various types of digital sensors from various manufacturers. A hardwired dedicated processing unit makes it possible that the tag saves more energy, has smaller dimensions and is faster.
US09558381B2	Pairing method for wireless scanner via RFID A wireless scanner is described that performs a pairing operation with a wireless scanner base before commencing scanning operations in a wireless scanner network. Radio frequency identification (RFID) is used to achieve the pairing operation of the wireless scanner with the wireless scanner base by using an RFID tag associated with the wireless scanner base. The RFID tag in the wireless scanner base may contain pairing information such as a network address of the wireless scanner base for use in automatically establishing a wireless communication session with the wireless scanner base in accordance with another wireless protocol.
US09558380B2	Card connector A card connector is provided for receiving a card. The card connector includes a housing assembly and a tray. The housing assembly includes a housing and a plurality of contacts extending upward from the housing, with each of the plurality of contacts having a card connecting pad. The tray includes a frame and a pair of plates extending inward from opposite sides of the frame. Each plate of the pair of plates includes a supporting portion extending inward from the frame and a covering portion extending further inward and away from the supporting portion.
US09558379B2	Card reader A card reader may include a conveying passage; a magnetic head structured to abut with a magnetic stripe on the card; a head moving mechanism structured to move the magnetic head in a widthwise direction of the conveying passage between an abutting position and a retreated position; an IC contact block having a plurality of IC contact springs to contact a plurality of external connection terminals of an IC chip formed on the card; and a contact block moving mechanism structured to move the IC contact block between a contact position retreated position. The conveying passage may be formed with an opening part through which the magnetic head is passed. The magnetic head may be located at the head abutting position and is abutted with the one face of the card at a time when the IC contact springs and the external connection terminals are contacted with each other.
US09558378B2	Always-available embedded theft reaction subsystem A system to provide an always-on embedded anti-theft protection for a platform is described. The system in one embodiment comprises an arming logic to move the platform to an armed mode when receiving an arming command, a disarming logic to move the platform to an unarmed mode when receiving a disarming command, the disarming logic active while the platform is in a low power state, and a power transition logic to move the system from the low power state to an ON state in response to a user request, the power transition logic to present a log-in screen when the platform is armed, and to move the platform to the ON state without a log-in screen when the platform is unarmed.
US09558375B2	Protection of registers against unilateral disturbances A device includes one or more registers and circuitry. The circuitry subjects a key having a number of bits to a first function which takes a selection value into account, generating a result having a number of bits which is twice the number of bits of the key, and stores the result in the one or more registers. In response to a call for the key, the circuitry subjects the result stored in the one or more registers to a second function which takes the selection value into account to generate a response having a same value as the key.
US09558374B2	Methods and systems for securing stored information Methods and systems for securing information are provided. The method includes generating a hash key by an input/output (I/O) processing module interfacing with a processor executable application to encrypt a block of data of a data container to secure and store the data container; generating cipher text for the block of data encrypted with the hash key; using an encryption key to encrypt the hash key for the block of data; providing the cipher text and the encrypted hash key by the I/O processing module to a storage system for storage; where the I/O processing module segregates the encrypted hash key from the cipher text and maintains the encrypted hash key as part of metadata for the cipher text; and storing the cipher text with the encrypted hash key as the metadata for the cipher text for the block of data.
US09558373B2	3D graphics system using encrypted texture tiles A 3D graphics system uses encryption keys to decrypt received and stored texture tiles of a texture in accordance with received and stored texture tile status data which indicates whether a texture tiles is encrypted or not and which one of the encryption keys is used. The decrypted texture tiles are rendered and at least a plurality of the rendered tiles is encrypted. The encrypted rendered tiles are stored in a frame buffer. Buffer tile status data is stored which indicates whether a rendered tile is encrypted or not before storage in the frame buffer, and which one of the encryption keys has been used. The encrypted rendered tiles stored in the frame buffer are decrypted in accordance with the buffer tile status data.
US09558371B2	System for network administration and local administration of privacy protection criteria Cookie files are screened in a client machine, wherein a cookie file includes a cookie file source. A request from a subscriber is received at a server to send a list of untrusted cookie file sources to the client machine. The list of untrusted cookie file sources is downloaded from the server to the client machine. The downloaded list of untrusted cookie file sources is used to detect cookie files received at the client machine from cookie file sources on the downloaded list by comparing the cookie file source of any received cookie file to the untrusted cookie file sources on the downloaded list.
US09558370B2	Cloud key directory for federating data exchanges Embodiments are directed to providing attribute-based data access. In an embodiment, a data request specifies one or more search data attributes describing requested data that is to be found in a data store. The data store is configured to provide access to secured data according to access controls defined by one or more clients. The secured data includes data that is associated with a particular client and that is encrypted using attribute-based encryption, which associates the data with one or more encryption data attributes and that enables the data to be provided if conditions in the corresponding access controls are met. The particular portion of data is provided based on determining that the conditions in the corresponding access controls are met, and that at least one of the search data attributes is determined to be relevant to at least one of the encryption data attributes.
US09558362B2	Data encryption using an external arguments encryption algorithm Data encryption using an external arguments encryption algorithm: it is an encryption system which uses symmetrical secret key algorithms but the operating arguments thereof and/or the actual encryption/decryption algorithm is/are unknown before use and is/are created at the time of encryption and then destroyed but is/are stored in an independent or non-independent computer or non-computer system (paper, human memory, other non-computer media, etc.) of the system which encrypts or decrypts the data/message for the subsequent reuse thereof at the time of decryption. It will be used as a client/server system, wherein the client uses a set of variable arguments and/or the actual algorithm which is/are stored, however, outside the actual client in the server. The operating arguments and/or the actual encryption/decryption algorithm may be generated/used both by the client and by the server but is/are stored exclusively in the server (whether this is a computer or non-computer storage system) in a manner independent of the client, which makes it possible to control and/or limit the use thereof.
US09558353B2	Wireless router remote firmware upgrade A wireless router receives a firmware update from a remote server, and destructively overwrites router firmware in flash memory in a chunk-wise manner, and then writes a kernel memory before going live with upgraded firmware. Some routers authenticate the firmware image. In some cases, image chunks are re-ordered into an executable order after receipt and before finishing their final arrangement in the flash memory. In some routers, a maximum firmware image size is at least two chunk sizes smaller than the flash memory storage capacity. Some routers remap ROM to RAM memory. Some decompress data from flash into a RAM. Some save text file configuration settings in flash before rebooting. Some detect a user's inactive billing status and redirect a web browser to a billing activation page.
US09558352B1	Malicious software detection in a computing system A computer system identifies malicious Uniform Resource Locator (URL) data items from a plurality of unscreened data items that have not been previously identified as associated with malicious URLs. The system can execute a number of pre-filters to identify a subset of URLs in the plurality of data items that are likely to be malicious. A scoring processor can score the subset of URLs based on a plurality of input vectors using a suitable machine learning model. Optionally, the system can execute one or more post-filters on the score data to identify data items of interest. Such data items can be fed back into the system to improve machine learning or can be used to provide a notification that a particular resource within a local network is infected with malicious software.
US09558347B2	Detecting anomalous user behavior using generative models of user actions A method for detecting abnormal behavior of users is disclosed. Processors identify from a log of user activity, a first number of actions performed by a user over a first time period that match a pattern of user activity for a task associated with one or more roles of the users. Processors also identify from the log of user activity, a second number of actions performed by the user over a second time period that match the pattern of user activity. Processors calculate an amount of deviation between the first number of actions and the second number of actions. The deviation identifies a difference between amounts of time spent in the one or more roles. Processors then determine whether the amount of deviation between the first number of actions and the second number of actions exceeds a threshold for abnormal behavior.
US09558346B1	Information processing systems with security-related feedback An information processing system implements a security system. The security system comprises a classifier configured to process information characterizing events in order to generate respective risk scores, and a data store coupled to the classifier and configured to store feedback relating to one or more attributes associated with an assessment of the risk scores by one or more users. The classifier is configured to utilize the feedback regarding the risk scores to learn riskiness of particular events and to adjust its operation based on the learned riskiness, such that the risk score generated by the classifier for a given one of the events is based at least in part on the feedback received regarding risk scores generated for one or more previous ones of the events.
US09558343B2	Methods and systems for controlling access to resources and privileges per process To control privileges and access to resources on a per-process basis, an administrator creates a rule that may be applied to modify a token of a process. The rule may include an application-criterion set and changes to be made to the groups and/or privileges of the token. The rule may be set as a policy within a group policy object (GPO), where a GPO is associated with one or more groups of computers or users. When a GPO containing a rule is applied to a computer, a driver installed on the computer may access the rule(s) anytime a logged-on user executes a process. If the executed process satisfies the criterion set of a rule, the changes contained within the rule are made to the process token, and the user has expanded and/or contracted access and/or privileges for only that process.
US09558342B2	Secured repair data package An arrangement for storing a data set in an ECU in a vehicle control system, wherein the arrangement includes a computer connected to the vehicle, where the computer is adapted to execute an access application, where the access application includes vehicle specific information and service action specific information, and where the information is encrypted, where the arrangement is adapted to decrypt the vehicle specific information and the service action specific information, to unlock the vehicle ECU by sending a password from the computer to the ECU, to perform a service action by storing service action specific information in the ECU, to lock the ECU by sending a lock command to the ECU from the computer, and to corrupt the access application software such that it cannot be used again.
US09558327B2	Trial access for media files from a media list A portable media device includes a processor and a memory. The memory stores instructions that when executed cause the processor to access a media file stored in the portable media device based on a trial access term for the media file, determine that a trial period within the trial access term for the media file has expired, and set the media file as inaccessible to the portable device in response to determining that the trial period within the trial access term has expired.
US09558325B2	Method and system for determining analyte levels Methods and apparatus for analyte level estimation are provided for filtering measurement data. In an embodiment, a present predicted analyte level estimate is determined. A present corrected analyte level estimate is determined based at least in part on the determined present predicted analyte level estimate and a received present monitored analyte measurement data. One or more of the medication infusion rate or the received present monitored analyte measurement data are filtered using a rate variance filter, wherein when the medication infusion rate exceeds a predetermined threshold level, the rate variance filter is adjusted from a predetermined setting to a modified setting to be responsive to changes in the present monitored analyte measurement data after a predetermined time period lapses.
US09558321B2	Systems and methods for smart tools in sequence pipelines A tool in a bioinformatics pipeline can include a smart wrapper and an executable. The smart wrapper can cause the executable to analyze the sequence data it receives and can also selectively change to the pipeline when circumstances warrant. In certain aspects, a system for genomic analysis includes a processor coupled to a non-transitory memory. The system is operable to present to a user a plurality of genomic tools organized into a pipeline. At least a first one of the tools comprises an executable and a wrapper script. The system can receive instructions from the user and sequence data—instructions that call for the sequence data to be analyzed by the pipeline—and select, using the wrapper script, a change to the pipeline.
US09558320B2	Physiogenomic method for predicting drug metabolism reserve for antidepressants and stimulants Disclosed herein are compositions and methods relevant to a novel Drug Metabolism Reserve Physiotype to determine the metabolic capacity of a human individual. The Drug Metabolism Reserve Physiotype allows the determination of the innate metabolic capacity of the patient relevant to antidepressant and stimulant treatment and can be predicted and diagnosed simply from a blood sample. In the disclosed method, an individual is genotyped for a plurality of polymorphisms in a gene encoding CYP2C9, a gene encoding CYP2C19 and a gene encoding CYP2D6, and the genotypes are used to produce four novel indices, which relate to the metabolic capacity of the human individual.
US09558319B1	Method for deducing a polymer sequence from a nominal base-by-base measurement A method of processing sequencing data obtained with a polymer sequencing system identifies the most likely monomer sequence of a polymer, regardless of stochastic variations in recorded signals. Polymer sequencing data is recorded and two or more distinct series of pore blocking signals for a section of the polymer are recorded. A value is assigned to each series of pore blocking signals to obtain multiple trial sequences. The probability that each of the trial sequences could have resulting in all of trial sequences is calculated to determine a monomer sequence with the highest probability of resulting in all of the trial sequences, termed the first iteration sequence. The first iteration sequence is systematically altered to maximize the combined probability of the first iteration sequence leading to all the trial sequences in order to obtain a most likely sequence of monomers of the polymer.
US09558318B2	Systems and methods for quantifying the impact of biological perturbations Systems and methods are described for quantifying the response of a biological system to one or more perturbations. First and second datasets corresponding to a response of a biological system to first and second treatments are received. A plurality of computational network models that represent the biological system are provided, each model including nodes representing a plurality of biological entities and edges representing relationships between the nodes in the model. A first set of scores is generated, representing the perturbation of the biological system based on the first dataset and the plurality of models, and a second set of scores representing the perturbation of the biological system based on the second dataset and the plurality of computational models. One or more biological impact factors are generated based on each of the first set and second set of scores that represent the biological impact of the perturbation on the biological system.
US09558317B2	System and method for limiting the engine torque of a four-wheel-drive vehicle A system for limiting engine torque of a four-wheel-drive motor vehicle, including an actuator that is controlled and configured to distribute the engine torque to the drive wheels, a computer calculating at least one variable characteristic of an operation of the vehicle, and a module for limiting the engine torque. In addition, the limitation system includes a mechanism for deactivating the module for limiting the engine torque according to the variable characteristic of the operation of the engine.
US09558315B2	Method of generating write data, multi charged particle beam writing apparatus, and pattern inspection apparatus In one embodiment, a method of generating write data generates write data for a multi charged particle beam writing apparatus. The method includes dividing a polygonal figure included in design data into a plurality of figure segments including trapezoids each having a pair of parallel opposite sides extending in a first direction, the trapezoids being connected in a second direction orthogonal to the first direction such that adjacent trapezoids share the side extending in the first direction as a common side, and generates the write data including position information of a common vertex of a first trapezoid and a second trapezoid next to the first trapezoid expressed by a displacement in the first and second directions from a position of a common vertex of the second trapezoid and a third trapezoid next to the second trapezoid.
US09558311B2	Surface region selection for heat sink placement A method for determining an area of a region for receiving a heat sink on a surface of a chip-supporting substrate is disclosed. The method can include determining, in response to a specified voltage drop associated with substrate wiring, a first set of wiring cross-sectional areas and corresponding lengths that satisfy the specified voltage drop. The method can also include determining, by selecting, in response to a specified thermal resistance associated with substrate wiring and insulating layers, from the first set, a second set of wiring cross-sectional areas and corresponding lengths that satisfy the specified thermal resistance. The method can also include selecting, from a set of placement areas corresponding to the second set of wiring cross-sectional areas and corresponding lengths, a heat sink placement area that is greater than a lower size for a placement area and less than an upper size for a placement area.
US09558310B2	Method and system for template pattern optimization for DSA patterning using graphoepitaxy A method for design template pattern optimization, comprises receiving a design for a fin field effect transistor (FinFET) device, wherein the design includes a configuration of fins, creating a design template pattern for the design for use in connection with directed self-assembly (DSA) patterning using graphoepitaxy, and optimizing the design template pattern to minimize pattern density gradients, wherein the design template pattern includes a plurality of guiding lines for guiding a block-copolymer deposited during the DSA patterning and the optimizing comprises altering the guiding lines.
US09558306B2	Retiming a design for efficient parallel simulation An approach for simulating a circuit design partitions the circuit design into pipeline regions that include one or more pipeline levels. A path length is computed for each combinational region within a pipeline region to compute an achievable timing goal for each pipeline region. A target retiming goal is determined for the set of pipeline regions based on the computed achievable timing goals of the pipeline regions. A pipeline region is identified from the set of pipeline regions that does not satisfy the target timing goal. A measure of slack is computed for each pipeline level in the identified pipeline region. Using the computed slack, path lengths of combinational regions in the pipeline levels of the identified pipeline region are iteratively retimed. The resulting circuit design is simulated using the retimed path lengths if the retimed critical path of the pipeline region satisfies the target timing goal.
US09558301B1	Model-to-data and data-to-model traceability A device, method and tangible computer-readable medium are provided for detecting output discrepancies between representations of a block in two system models. For example, a first representation of a block may represent a default configuration and may execute in a first model. A second representation of the block may represent a user-modified configuration for the block and may execute in a second model. The user may execute the first and second models and may compare results using an exemplary embodiment. The embodiment may allow the user to define criteria and weightings for the criteria and to use the criteria for generating objective functions and constraints. The objective functions and constraints may be used to evaluate the performance of the two models. The embodiment may further perform trace back operations with respect to a model to determine a location in the model that produces an output discrepancy.
US09558295B2	System for data extraction and processing A system for extracting and interpreting information received in a human-readable format, typically PDF, assigning field tags to the extracted information and transferring the tagged information to a data processing system so that the tagged information can be uploaded to the system automatically. The system provides an incoming document with a time stamp to enable differentiation of the incoming document from other incoming documents, then, the incoming document may be spilt into sections to enable processing of each section individually. Subsequently, context and information are extracted by allowing a processing engine to apply a predetermined set of rules so that the extracted information to be ascribed meaning and assigned a field tag depending on its meaning. The system generates an editable output which is sent to a user.
US09558292B2	Distilling popular information of a web page Implementations and techniques for distilling popular parts of a web page are generally disclosed. In some examples the techniques include receiving, at a computing device, an indication of a clipboard operation on the web page, responsive to the received indication, obtaining information corresponding to data stored as content of the clipboard operation, storing the obtained information, determining a number of times the obtained information is stored, and setting a popularity level for the obtained information based, at least in part, on the determined number of times.
US09558291B2	Image processing system, processing method, image processing apparatus, and relay apparatus An image processing system includes: a relay apparatus; a service providing apparatus for an electronic-file storing service; and an image processing apparatus, which are connected to a network. The image processing apparatus includes: a first-address-get-request transmitting unit that transmits a request for getting a first address representing a location of an electronic file to be downloaded from the service providing apparatus to the relay apparatus; a first downloading unit which, upon receiving the first address from the relay apparatus after the request for getting the first address is transmitted, downloads the electronic file stored at the first address; and a storage control unit that controls a storage unit to store the electronic file downloaded by the first downloading unit. The relay apparatus includes: a first-address-get-program storage unit; a first-address getting unit; and a first-address transmitting unit.
US09558287B2	Automatic removal of inappropriate content The disclosure generally describes computer-implemented methods, software, and systems for automatically removing inappropriate content. One example method includes: identifying a report of inappropriate content received from a user, the report identifying a content item the user has identified as inappropriate and an identification of the user, determining whether to automatically remove the content item based at least in part on the identity of the user, and removing the content item upon determining that the content should be removed. In some instances, the user is associated with a report weight. The report weight can be based, at least in part, on a business role of the user. Determining whether to automatically remove the content item may include determining that the user or a business role of the user is associated with an automatic removal rule, and removing the content item upon determining that the report is associated the user.
US09558286B2	Methods, systems, and products for generating mashups Methods, systems, and products simplify widgets for graphical mashups, such as digital dashboards and other user interfaces. When a software widget is a component of a graphical mashup, the widget is completely defined using a single file. The single file specifies both source data and presentation of the source data. Because the widget is completely defined by the single file, the single file allows faster processing of the widget.
US09558285B2	Treatment controller A content modification system includes a treatment controller which may be hosted at a web server. The treatment controller receives a request for content from a user. One example of a request is an HTTP request for a web page. The treatment controller determines a representation of the requested content and receives a modification instruction for modifying the requested content. The treatment controller is operable to modify the representation according to the instructions and render the representation to a predetermined format for delivery to the user.
US09558284B2	Website with enhanced book memos A website is augmented to indicate the presence of saveable enhanced book memos. A user can save an enhanced book memo to their memobook database, then view their saved book memos, either at the website, or using a downloaded program when not at the website. The enhanced book memos can include text and/or multimedia files that are not present on the website.
US09558281B2	System and method for screencast creation and abridging based on user web browsing A computer-implemented method and system are provided for sharing web pages. The method includes: executing one or more programs stored in a memory of the computer system for generating a representation of a web page that is displayed in a window of a web browser in a user interface of the client computer system; recording the web page over a period of time, the recording including web page changes resulting from input events; recording each input event along with a time stamp associated with the event and associating the time stamp with the event, wherein the recording of the web page, input events, and time stamps are placed in a screencast file; extracting from the screencast file portions related to selected time stamps of the recorded input events; and assembling the portions to generate a combined web page recording.
US09558272B2	Method of and a system for matching audio tracks using chromaprints with a fast candidate selection routine A computer-implemented method of matching of a first incoming audio track with an indexed audio track, the method executable at a server, the method comprising: selecting the indexed audio track as a candidate audio track from a plurality of indexed audio tracks; validating the candidate audio track against the first audio track.
US09558268B2	Method for semantically labeling an image of a scene using recursive context propagation A method semantically labels an image acquired of a scene by first obtaining a local semantic feature for each local region in the image. The local semantic features are combined recursively to form intermediate segments until a semantic feature for the entire image is obtained. Then, the semantic feature for the entire image is decombined recursively into intermediate segments until an enhanced semantic feature for each local region is obtained. Then, each local region is labeled according to the enhanced semantic feature.
US09558267B2	Real-time data mining A significant recent trend in the internet and mobile telephony has been the dominance of user generated content. As such, in mobile technology have permitted users to upload content onto the internet, whereby sites provide an easily accessible and manageable medium for users to share their thoughts and form a portal for media-rich exchanges. It has been found that much of what is exchanged by users in such settings is context-sensitive, ranging from users' moods and opinions, to communication about users' plans. Broadly contemplated herein, in accordance with at least one embodiment of the invention, is the employment of data mining in information repositories settings to efficiently classify an information stream in real-time and thereby discern user intent.
US09558265B1	Facilitating targeted analysis via graph generation based on an influencing parameter Provided is a process including: obtaining a graph comprising nodes and edges, each of the edges having a value indicating an amount of similarity between objects corresponding to the two linked nodes; selecting a parameter for influencing the graph; assessing each of the nodes based on the selected influencing parameter, wherein assessing comprises, with respect to each adjacent node in the graph sharing an edge with the node: determining the value indicating the amount of similarity between the object corresponding to the node and the object corresponding to the adjacent node; and determining a score related to the edge shared with the node, the score determined based on the similarity-amount value and a value of the selected influencing parameter for the node, such that edges are removed, weakened, added, or strengthened; and preparing, based on the graph, instructions to display at least part of the graph.
US09558264B2	Identifying and displaying relationships between candidate answers Mechanisms are provided for identifying commonalities between candidate answers generated by a Question and Answer (QA) system in response to an input question. The mechanisms receive a plurality of candidate answers for an input question from the QA system and identify terms present in the candidate answers. The mechanisms determine relationships between terms in each of the candidate answers and determine a common relationship between a first term and a second term, the common relationship being common amongst at least a subset of the plurality of candidate answers, based on the determined relationships between terms in each of the candidate answers. The mechanisms present the plurality of candidate answers and the common relationship to a user.
US09558256B2	Middleware data log system A method of maintaining a data store is disclosed. The data store is distributed across a plurality of storage provider instances, including a master storage provider instance and a plurality of additional storage provider instances. A master data log is updated to reflect a change to the data store. The master data log is synchronized with a plurality of replicas of the master data log. The change is propagated across the plurality of additional storage provider instances based on an analysis of the replicas.
US09558254B2	Automatic wireless device data maintenance A computer-implemented method includes downloading data elements from a wireless device. The method includes determining whether a user account exists in storage and determining whether the user account currently has stored data elements of the same type as the downloaded data elements associated therewith. The method further includes comparing the downloaded data elements to the stored data elements. This method also includes storing any downloaded data elements not currently existing in the data elements associated with the user account and not in conflict with data elements associated with the user account. The method further includes resolving conflicts between downloaded data elements and currently existing data elements, to establish which of the conflicting elements is representative of a proper version of the element. Finally, the method includes storing the proper version of the element resulting from each conflict resolution.
US09558251B2	Transformation functions for compression and decompression of data in computing environments and systems One or more transformation functions can be used in connection or together with one or more compression/decompression techniques. A transformation function can transform data (e.g., a data object) into a form more suitable for compression and/or decompression. As a result, data can be compressed and/or decompressed more effectively. In addition, multiple data objects can be associated with various transformation functions and/or compression/decompression techniques. As a result, different approaches can be taken with respect to compression and decompression of data objects in an effort to find an optimum approach for compression of data objects that may vary significantly from each other and change over time. It will be appreciated that the objects can be associated with transformation functions in a dynamic manner to accommodate changes to data. Also, an extendible and/or extensible system can allow for growth and adaption of new data in forms not currently present or expected.
US09558248B2	Unified searchable storage for resource-constrained and other devices The present disclosure describes a data indexing and search service that resides locally on a computing device (e.g., a mobile phone) and that can host data for multiple applications on the device. By centralizing the storage of data as well as the search and query functions, unified search queries can be performed by the service.
US09558247B2	Storage device and stream filtering method thereof A storage device may include a main storage part including one or more memories; and a controller configured to control an overall operation of the main storage part. The controller includes a filter manager configured to store data format information and a filtering condition provided from a host; one or more stream filters configured to search and project data stored in the one or more memories in parallel in response to a control of the filter manager to produce searched and projected data; and a merge filter configured to merge the searched and projected data of the one or more stream filters in response to the control of the filter manager.
US09558245B1	Automatic discovery of relevant data in massive datasets An approach for discovery of relevant data in massive datasets. Compare datasets including compare key fields, compare data fields and a core dataset including target data field(s) and core field(s) are received. The compare datasets are categorized into direct and indirect related dataset pools based on the target data field(s) correlation strength with matching compare and core fields. The direct related dataset pool and the core dataset are transformed into reduction datasets based on statistical measure of values of target data fields, shared key fields and compare data fields. Target correlations of the reduction datasets are creating based on a reduction compare and target data fields. Statistical relationship strength of core dataset and the direct related dataset pool are created based on a statistical mean of target correlations and a relevancy data store is created.
US09558244B2	Systems and methods for social recommendations Computer-implemented systems, methods, and media for making a recommendation or a non-recommendation to a user comprising: a software module configured to calculate a social distance between a first and a second user; a software module configured to allow the first and the second user to rate a plurality of items using a gamified rating model; a software module configured to analyze a degree of similarity between the first and the second user based on the ratings of the plurality of items by the first and the second user; a software module configured to make a recommendation or a non-recommendation to the first user based on the social distance and the degree of similarity between the first and the second user, and the ratings of the plurality of items; and a software module configured to present the recommendation or non-recommendation in a manner that comprises a ranked list.
US09558240B2	Extending relational algebra for data management Methods are provided for improving the ability to apply modeling techniques similar to relational algebra to an expanded number of workflows. By allowing a relational algebra type modeling technique to be applied to an expanded number of workflows, an increased number of data processing workflows can be more readily improved, such as by automatic modification of the sequence of tasks in a workflow, to reduce the execution costs for a workflow. The relational algebra type modeling technique can also allow for identification of portions of data processing workflows or queries that share a common input and output.
US09558237B2	Systems and methods for automated combination and conjugation of indicia Systems and methods of automated conjugation of indicia are disclosed. The system includes at least one database; a database management system, having a graphical user interface, adapted for running a query search at said database; a storage medium for storing primary indicia objects and secondary indicia objects set, retrieved from the database. The system further includes an algorithmic analysis mapping module, adapted to analyze the primary indicia objects and the secondary indicia objects to generate metadata representative therefore; a matching module adapted to compare the metadata representative of the primary and secondary indicia objects, as well as a conjugating module, adapted to conjugate at least one primary indicia object with at least one secondary indicia object.
US09558234B1	Automatic metadata identification A system determines whether text of a document includes a document identifier and uses the document identifier to locate metadata in a database when the text of the document includes the document identifier. The system compares the metadata to the text of the document and associates the metadata with the text of the document when at least some of the metadata matches the text of the document.
US09558230B2	Data quality assessment According to one embodiment of the present invention, a system assesses the quality of column data. The system assigns a pre-defined domain to one or more columns of the data based on a validity condition for the domain, applies the validity condition for the domain assigned to a column to data values in the column to compute a data quality metric for the column, and computes and displays a metric for a group of columns based on the computed data quality metric of at least one column in the group. Embodiments of the present invention further include a method and computer program product for assessing the quality of column data in substantially the same manners described above.
US09558229B2	Transaction private log buffering for high performance of transaction processing For each data change occurring transaction created as part of a write operation initiated for one or more tables in a main-memory-based DBMS, a transaction log entry can be written to a private log buffer corresponding to the transaction. All transaction log entries in the private log buffer can be flushed to a global log buffer upon completion of the transaction to which the private log buffer corresponds.
US09558224B2	Automaton hardware engine employing memory-efficient transition table indexing An automaton hardware engine employs a transition table organized into 2n rows, where each row comprises a plurality of n-bit storage locations, and where each storage location can store at most one n-bit entry value. Each row corresponds to an automaton state. In one example, at least two NFAs are encoded into the table. The first NFA is indexed into the rows of the transition table in a first way, and the second NFA is indexed in to the rows of the transition table in a second way. Due to this indexing, all rows are usable to store entry values that point to other rows.
US09558219B2	Database storage reclaiming program The computer retrieves a list of the data elements contained in a database. The computer performs a static and dynamic analysis on the list to determine which data elements have been active in a static or dynamic Structured Query Language (SQL) statement, then removes active data elements from the list. The computer performs a dependency test to determine which data elements on the list are depended on by data objects not on the list and removes those data elements which are depended on. The computer analyzes application code to extract SQL statements and determine whether data elements on the list are active in application code SQL. Any data elements on the list which are active in application code SQL are removed from the list and the remaining data elements on the list are sorted in descending order based on size.
US09558216B2	Moving tables across nodes in an in-memory database instance The present disclosure involves systems, software, and computer implemented methods for moving a table from a source node to a destination node. In one example, the method includes receiving metadata associated with an in-memory database table stored at a source node. A table container is created responsive to receiving the metadata. The destination node sequentially requests, from the source node, portions of the table, wherein the table is serialized at the source node to provide a serialized sequence of table portions. Sequentially requesting comprises sending a request for a next portion of the table after processing a received portion, which includes receiving a portion of the serialized table, deserializing the received portion, adding the deserialized portion to the created table container, and in response to an end of file indication associated with the received portion, ending the requests and finalizing the table.
US09558213B2	Refinement shape content search Visual incongruity in search result sets may be reduced at least in part by searching an optimized visually significant subset of a category tree that categorizes a collection of content. The category tree may be optimized at build time at least in part by pruning with respect to visual coherence and by the size of the content collection subset referenced by particular categories. Content collection subset sizes both too large and too small can detract from the visual significance of a particular category. The visually significant subset of the category tree may be further optimized at query time by intersecting the visually significant subset with the query-associated sub-tree(s) and further pruning categories in the visually significant subset that have child categories in the visually significant subset. Searching with respect to the optimized visually significant subset can also improve search efficiency.
US09558212B2	Apparatus, image processing method and computer-readable storage medium for object identification based on dictionary information An apparatus extracts feature information from an object of image data. The apparatus registers the extracted feature information in a dictionary. The apparatus refers to the dictionary and determines a similarity between feature information registered in the dictionary and the extracted feature information. The apparatus does not use, of feature information to be registered in the dictionary, feature information not satisfying a predetermined evaluation criterion in similarity determination.
US09558204B2	System and method for managing information retrievals for integrated digital and analog archives on a global basis A system and method for managing information retrievals from all of an enterprises' archives across all operating locations. The archives include both digital and analog archives. A single “virtual archive” is provided which links all of the archives of the enterprise, regardless of the location or configuration of the archive. The virtual archive allows for data aggregation (regardless of location) so the a user can have data from multiple physical locations on a single screen in a single view. A single, consistent and user friendly interface is provided through which users are able to access multiple applications through a single sign-on and password. Logical tables that are used to direct information retrieval requests to the physical archives. The retrieved information is reformatted and repackaging to resolve any incompatibility between the format of the stored information and the distribution media.
US09558201B2	Storage-network de-duplication Techniques are provided for de-duplication of data. In one embodiment, a system comprises de-duplication logic that is coupled to a de-duplication repository. The de-duplication logic is operable to receive, from a client device over a network, a request to store a file in the de-duplicated repository using a single storage encoding. The request includes a file identifier and a set of signatures that identify a set of chunks from the file. The de-duplication logic determines whether any chunks in the set are missing from the de-duplicated repository and requests the missing chunks from the client device. Then, for each missing chunk, the de-duplication logic stores in the de-duplicated repository that chunk and a signature representing that chunk. The de-duplication logic also stores, in the de-duplicated repository, a file entry that represents the file and that associates the set of signatures with the file identifier.
US09558200B2	Capacity forecasting for a deduplicating storage system A system for managing a storage system comprises a processor and a memory. The processor is configured to receive storage system information from a deduplicating storage system. The processor is further configured to determine a capacity forecast based at least in part on the storage system information. The processor is further configured to provide a compression forecast. The memory is coupled to the processor and configured to provide the processor with instructions.
US09558194B1	Scalable object store A computer implemented method, computer program product, and system for providing, via a storage provisioning engine, a scalable objects store enabled to store objects across multiple heterogeneous file arrays; wherein file arrays are enabled to be actively added to the object store without pausing the file arrays; and wherein data representing the objects enabled to be balanced across the heterogeneous file arrays based.
US09558193B2	Detecting behavioral patterns and anomalies using activity data Activity data is analyzed or evaluated to detect behavioral patterns and anomalies. When a particular pattern or anomaly is detected, a system may send a notification or perform a particular task. This activity data may be collected in an information management system, which may be policy based. Notification may be by way e-mail, report, pop-up message, or system message. Some tasks to perform upon detection may include implementing a policy in the information management system, disallowing a user from connecting to the system, and restricting a user from being allowed to perform certain actions. To detect a pattern, activity data may be compared to a previously defined or generated activity profile.
US09558189B2	Integrated architecture and network for archiving, processing, association, distribution and display of media A media management framework comprises an integrated architecture and online networking service for aggregating a user's various media files to enable a customized distribution of those media files. User media files are processed, archived, aggregated, and distributed for display in customized story streams. Additional media files are pulled from other sources, such as social media feeds and the public domain, to create a customized distribution and a comprehensive user experience centered on a user's media files based on specified user preferences. The customized distribution also includes modifying story streams based on learning of additional user preferences from continued user interaction and continuously grouping inference associations from one or more of activities, people, objects, times, dates, and locations.
US09558186B2	Unsupervised extraction of facts A system and method for extracting facts from documents. A fact is extracted from a first document. The attribute and value of the fact extracted from the first document are used as a seed attribute-value pair. A second document containing the seed attribute-value pair is analyzed to determine a contextual pattern used in the second document. The contextual pattern is used to extract other attribute-value pairs from the second document. The extracted attributes and values are stored as facts.
US09558184B1	System and method for knowledge modeling A computer-integratable global knowledge modeling system comprising electronic means for expressing a plurality of entity representations interconnected by relations is described, wherein the entity representations, comprising modeling base elements and rules, are organized according to a fine-grained hierarchical or fractal structure, the relations between entity representations being highly detailed; a plurality of variants, representing each a particular point of view, are associated to at least a part of an entity representation in order to customize the corresponding entity representation; and the knowledge modeling system is usable in an adaptive computer-executable artifact.
US09558183B2	System and method for the localization of statistical classifiers based on machine translation A system and method for localizing a spoken dialog system is disclosed. Source data from a source language spoken dialog system is accessed, including semantic annotations and transcriptions of a plurality of utterances. The transcriptions are machine-translated into a target language. Semantic classifiers are trained on the machine translated transcriptions and the source language semantic annotations.
US09558182B1	Smart terminology marker system for a language translation system A terminology marker system integrates a terminology analytical component for quantifying the amount of linguistic noise found in the translation output as measured against a dictionary; further, correlating the noise measured on a continuous basis enables the analytical component to build terminology predictive models used in a feedback loop to upstream components of the supply chain to improve future translation of new content. The system also provides a smart terminology assessment component for assessing linguistic assets and improving the quality of those assets to assist in translation. The system also provides a smart terminology evaluation component that is able to analyze MT output to make smart decisions on reducing the amount of post editing corrections needed for delivering a persistent level of translation quality. The integration and configuration of the system component within a translation supply chain assists in delivering a reliable level of translation quality by reducing the linguistic noise across all components of the supply chain.
US09558181B2	Facilitating a meeting using graphical text analysis Embodiments relate to facilitating a meeting. A method for facilitating a meeting of a group of participants is provided. The method generates a graph of words from speeches of the participants as the words are received from the participants. The method partitions the group of participants into a plurality of subgroups of participants. The method performs a graphical text analysis on the graph to identify a cognitive state for each participant and a cognitive state for each subgroup of participants. The method informs at least one of the participants about the identified cognitive state of a participant or a subgroup of participants.
US09558178B2	Dictionary based social media stream filtering A method is provided in a computer processing system that reads and displays a social media stream accessible by a plurality of users. A system is also provided that reads and displays a social media stream accessible by a plurality of users. The method includes receiving, by a processor-based dictionary manager, at least one dictionary configuration. Each dictionary configuration specifies at least one dictionary from a set of dictionaries and respective settings for the at least one dictionary. The method further includes filtering, by a filter, the social media stream using the at least one dictionary configuration to provide at least one filtered social media stream. The respective settings for the at least one dictionary include a respective dictionary influence polarity and a respective polarity magnitude for the respective dictionary influence polarity.
US09558171B2	Formatting tables for display on computing devices of varying screen size The subject matter disclosed herein provides methods for formatting a table for display on a computing device. A table having one or more rows and one or more columns may be accessed. The rows may correspond to one or more data records. The data records may have one or more data values distributed across the columns. The columns may be associated with one or more column labels and one or more priority values. A size of a display screen on a computing device may be determined. A table may be formatted by moving a column label and a data value in at least one column into an area between successive data records. The formatting may be based on the display screen size and an associated column priority value. The formatted table may be caused to be displayed on the computing device. Related apparatus, systems, techniques, and articles are also described.
US09558157B2	Sensor system for independently evaluating the accuracy of the data of the sensor system A sensor system, having a plurality of sensor elements configured such that they sense at least to some extent different primary measured variables use at least to some extent different measurement principles, a signal processing device. The signal processing device is configured to evaluate the sensor signals from the sensor elements at least to some extent collectively and rates the information quality of the sensor signals, wherein the signal processing device provides a piece of information about the accuracy of at least one datum of a physical variable. The signal processing device is configured such that the information about the accuracy is described in at least one characteristic quantity or a set of characteristic quantities.
US09558154B2	Method and measuring device for suppressing interference signals A measuring device for suppressing an interference signal contains a mixer, an analog-digital converter, a scaling device and a substitution device. The mixer is embodied to mix a first signal with a first intermediate frequency and to mix a second signal with a second intermediate frequency. The analog-digital converter is embodied to digitize the first signal mixed with the first intermediate frequency to form a first test signal and to digitize the second signal mixed with the second intermediate frequency to form a second test signal is embodied to displace at least the first test signal and/or the second test signal in its frequency in such a manner that they provide a common mid-frequency. The substitution device is embodied to combine the first test signal and the second test signal with a removal of interference-signal peak-value regions which correspond to the interference signal, to form a combined test signal.
US09558153B2	Mould manufacturing control system Embodiments of the invention provide methods, systems, computer programs and the like that provide for mould manufacturing control. Embodiments of the invention employ management communication and integration amongst a plurality of devices or process stations included in a lineal moulding manufacturing process. Once customer orders are received, the orders are analyzed by a manufacturing application server and used to create job instructions for producing the one or more orders. The job instructions are then transmitted to one or more production device(s). The production devices execute the job instructions and report back to the server. The server maintains status information for any jobs being performed and can provide real time information regarding the jobs to any of the production devices.
US09558148B2	Method to optimize network data flows within a constrained system Methods, apparatus, and software for optimizing network data flows within constrained systems. The methods enable data to be transferred between PCIe cards in multi-socket server platforms, each platform including a local socket having an InfiniBand (IB) HCA and a remote socket. Data to be transmitted outbound from a platform is transferred from a PCIe card to the platform's IB HCA via a proxied datapath. Data received at a platform may employ a direct PCIe peer-to-peer (P2P) transfer if the destined PCIe card is installed in the local socket or via a proxied datapath if the destined PCIe card is installed in a remote socket. Outbound transfers from a PCIe card in a local socket to the platform's IB HCA may selectively be transferred using an either a proxied data path for larger data transfers or a direct P2P datapath for smaller data transfers. The software is configured to support each of local-local, remote-local, local-remote, and remote-remote data transfers in a manner that is transparent to the software applications generating and receiving the data.
US09558144B2	Serial bus electrical termination control Some embodiments include apparatuses and methods having a node to couple to a serial bus, and a controller to provide a control signal to one of a first circuit path and a second circuit path in order to change electrical termination of a signal at the node between a first electrical termination through the first circuit path during a first mode of the controller and a second electrical termination through the second circuit path during a second mode of the controller. The controller can be arranged to provide the control signal to the first and second circuit paths during the first and second modes without providing another control signal from the controller to the first and second circuit paths during the first and second modes.
US09558142B2	Split transaction protocol for a bus system A method of and apparatus for communicating between a host and an agent. The method includes the step of performing a first transaction between a host controller and a hub. The hub is operable to perform a single transaction with an agent based on the first transaction. The method then includes the step of performing a second transaction between the host controller and the hub. The second transaction is based on the single transaction.
US09558140B2	Method for addressing the participants of a bus system A robust method for addressing each of the participants of a bus system comprising a control unit, and a bus and a plurality of addressable participants connected to the bus, comprising the steps of a) pre-selecting a first number of participants, b) selecting from the pre-selected participants a second number of participants, and c) assigning one or more addresses to them, and repeating the steps a) to c). The selection and pre-selection is based on current sources, specific threshold values, and measurement error. The bus system and addressable device (are also claimed.
US09558139B2	System interconnect dynamic scaling handshake using spare bit-lane A communications technique using spare bit-lanes to communicate changes in interface physical link layer bandwidth and/or active width provides for dynamic adjustment of power consumption of interface links without requiring a separate control path for exchanging the change information. One or more spare bit-lanes are used to communicate an indication of the operating frequency/active width change to the physical link layer of the remote side of the interface and an acknowledgement is sent back to provide complete handshaking of the operating characteristic change. The method can determine whether or not a spare bit-lane is available and prevent making the change if a spare bit-lane is not available until the interface is repaired and a spare bit-lane can then be used for communicating operating changes in operating frequency/active width.
US09558138B2	Computing system with unified storage, processing, and network switch fabrics and method for making and using the same A system and method for making and using a computing system with unified storage, processing, and network switch fabrics are provided. Processing nodes, either physical or virtual, are associated with intra-module ports, inter-module ports, and local storage spaces. A plurality of processing nodes are linked through intra-module ports to form processing modules. A plurality of the processing modules are further connected through inter-module ports to form the computing system. Several inter-module connection schemes are described, each of which can be adapted to use with existing network packet routing algorithms. Each processing node need only to keep track of the states of its directly connected neighbors, obviating the need for a high-speed connection to the rest processing nodes within the system. As a result, dedicated network switching equipment is not needed and network capacity grows naturally as processing nodes are added.
US09558136B2	Variable series resistance termination for wireline serial link transistor A variable series resistance termination circuit for wireline serial link transceivers is provided. Some embodiments include a pad for coupling to a wireline serial link and a termination circuit. The termination circuit includes a plurality of resistive components coupled in series with the pad and a plurality of switches. Each switch is to couple one or more of the plurality of resistive components in series between the pad and a termination voltage node when the switch is closed. A subset of the plurality of switches can be selectively closed to establish a resistive component of an impedance of the termination circuit.
US09558135B2	Flashcard reader and converter for reading serial and parallel flashcards A flash memory card reader and a single converter chip for reading both serial and parallel flash cards. The read has connectors for both serial and parallel data transfer flash memory cards. The reader has a single chip converter. The converter supports both serial I/O and parallel I/O. The serial I/O transfers data in multiple modes. Both single-bit and multi-bit serial data transfers modes are supported. The reader may have multiple slots, one have a connector for serial and one having a connector for parallel flash memory cards.
US09558134B2	In-vehicle sensor, in-vehicle sensor system, and method of setting identifiers of in-vehicle sensors in in-vehicle sensor system An in-vehicle sensor (1) connected to a communication bus CAN includes a bus connection connector (40) including external communication terminals T3, T4, and external setting terminals T5, T6 each of which is brought into one of a plurality of connection states; judgment means S1-S7 for judging the connection states of the external terminals for setting T5, T6 when electric power is supplied in a state in which the bus connection connector (40) is connected to the communication bus CAN; identifier generation means S8 for generating an identifier ID of the in-vehicle sensor (1) based on the judged connection states; a nonvolatile storage section (11) for storing the identifier ID; communication means (10) for performing communications through the communication bus CAN using the stored identifier ID; and storing means S9 for storing a first generated initial identifier IDS in the storage section (11) as the identifier ID.
US09558133B2	Minimizing latency from peripheral devices to compute engines Methods, systems, and computer program products are provided for minimizing latency in a implementation where a peripheral device is used as a capture device and a compute device such as a GPU processes the captured data in a computing environment. In embodiments, a peripheral device and GPU are tightly integrated and communicate at a hardware/firmware level. Peripheral device firmware can determine and store compute instructions specifically for the GPU, in a command queue. The compute instructions in the command queue are understood and consumed by firmware of the GPU. The compute instructions include but are not limited to generating low latency visual feedback for presentation to a display screen, and detecting the presence of gestures to be converted to OS messages that can be utilized by any application.
US09558131B1	Integrated circuit with bonding circuits for bonding memory controllers An IC that includes a first memory controller, a second memory controller, and a first bonding circuit coupled to the first memory controller, where the first bonding circuit is a hard logic bonding circuit and is operable to coordinate memory control functions of the first memory controller and the second memory controller. In one implementation, the first memory controller is an N bits wide memory controller, the second memory controller is an M bits wide memory controller, and the first bonding circuit is operable to coordinate the memory control functions of the first memory controller and the second memory controller such that the first and second memory controllers together function as an N+M bits wide memory controller, where N and M are positive integers.
US09558129B2	Circuits for and methods of enabling the access to data A circuit for enabling access to data is described. The circuit comprises a memory device storing data blocks having a first predetermined size; and a direct memory access circuit coupled to the memory device, the direct memory circuit accessing a data payload having a second predetermined size which is greater than the first predetermined size; wherein the direct memory access circuit accesses the data payload in response to a descriptor having a plurality of addresses corresponding to a predetermined number of the data blocks stored in the memory device. A method of enabling the access to data is also disclosed.
US09558125B2	Processing of un-map commands to enhance performance and endurance of a storage device A storage device and method enable processing of un-map commands. In one aspect, the method includes (1) determining whether a size of an un-map command satisfies (e.g., is greater than or equal to) a size threshold, (2) if the size of the un-map command satisfies the size threshold, performing one or more operations of a first un-map process, wherein the first un-map process forgoes (does not include) saving a mapping table to non-volatile memory of a storage device, and (3) if the size of the un-map command does not satisfy the size threshold, performing one or more operations of a second un-map process, wherein the second un-map process forgoes (does not include) saving the mapping table to non-volatile memory of the storage device and forgoes (does not include) flushing a write cache to non-volatile memory of the storage device.
US09558124B2	Data storage system with passive partitioning in a secondary memory A data storage system may be configured at least with a primary memory that is coupled to a host via a controller and coupled to at least one external interface. The controller may be adapted to passively partition a secondary memory into cache and user memory space regions in response to the secondary memory engaging the at least one external interface and the cache region can be allocated as cache for the primary memory by the controller.
US09558123B2	Retrieval hash index Systems and methods are provided that facilitate retrieval of a hash index in an electronic device. The system contains an addressing component that generates a hash index as a function of an exclusive-or identity. The addressing component can retrieve the hash index as a function of a tag value. Accordingly, required storage area can be reduced and electronic devices can be more efficient.
US09558119B2	Main memory operations in a symmetric multiprocessing computer Main memory operation in a symmetric multiprocessing computer, the computer comprising one or more processors operatively coupled through a cache controller to at least one cache of main memory, the main memory shared among the processors, the computer further comprising input/output (‘I/O’) resources, including receiving, in the cache controller from an issuing resource, a memory instruction for a memory address, the memory instruction requiring writing data to main memory; locking by the cache controller the memory address against further memory operations for the memory address; advising the issuing resource of completion of the memory instruction before the memory instruction completes in main memory; issuing by the cache controller the memory instruction to main memory; and unlocking the memory address only after completion of the memory instruction in main memory.
US09558118B2	Tracing mechanism for recording shared memory interleavings on multi-core processors A memory race recorder (MRR) is provided. The MRR includes a multi-core processor having a relaxed memory consistency model, an extension to the multi-core processor, the extension to store chunks, the chunk having a chunk size (CS) and an instruction count (IC), and a plurality of cores to execute instructions. The plurality of cores executes load/store instructions to/from a store buffer (STB) and a simulated memory to store the value when the value is not in the STB. The oldest value in the STB is transferred to the simulated memory when the IC is equal to zero and the CS is greater than zero. The MRR logs a trace entry comprising the CS, the IC, and a global timestamp, the global timestamp proving a total order across all logged chunks.
US09558116B2	Coherence de-coupling buffer A coherence decoupling buffer. In accordance with a first embodiment, a coherence decoupling buffer is for storing tag information of cache lines evicted from a plurality of cache memories. A coherence decoupling buffer may be free of value information of the plurality of cache memories. A coherence decoupling buffer may also be combined with a coherence memory.
US09558114B2	System and method to store data in an adjustably partitionable memory array The disclosure relates to an electronic memory system, and more specifically, to a system for storing data in an adjustably partitionable memory array, and a method to store data in an adjustably partitionable memory array. According to an embodiment of the disclosure, a system to store data in an adjustably partitionable memory array is provided, the system including a plurality of memory cells arranged in an array of rows and columns, a plurality of bit lines, and a plurality of switches, wherein each bit line is electrically coupled to a column of memory cells and each bit line comprises a switch configured to allow the respective bit line to be partitioned by opening of the switch.
US09558107B2	Extending useful life of a non-volatile memory by health grading In at least one embodiment, a controller of a non-volatile memory array determines, for each of a plurality of regions of physical memory in the memory array, an associated health grade among a plurality of health grades and records the associated health grade. The controller also establishes a mapping between access heat and the plurality of health grades. In response to a write request specifying an address, the controller selects a region of physical memory to service the write request from a pool of available regions of physical memory based on an access heat of the address and the mapping and writes data specified by the write request to the selected region of physical memory.
US09558106B1	Testing service with control testing The techniques described herein provide software testing of a candidate software system. In some examples, a testing service compares at least one candidate response to at least a first control response to obtain one or more candidate test differences. The testing service may compare at least a second control response of the plurality of control responses to at least one of the first control response of the plurality of control responses or a third control response of the plurality of control responses to obtain one or more control test differences. The testing service may then analyze the one or more candidate test differences based on the one or more control test differences to generate an evaluation of whether one or more of the candidate test differences are due to differences between the candidate software system and the control software system that generated the first control response.
US09558099B2	Staged program compilation with automated timing closure When compiling high-level, graphical code (e.g. LabVIEW™ code) to a different representation (e.g. different software code or hardware FPGA), information relating to characteristics of the design may be collected/captured from the compilation process, and automatically provided to all the earlier stages of the compilation process to obtain more optimal results. Without automated feedback of this information, users have to manually identify, produce, and provide the feedback information, or forego the process altogether, having to assume that the tool has produced the best possible results when that may not be the case. To correct timing, failed constraints paths may be parsed and compared to delays obtained during a previous compile, and previous adjustments that didn't yield desired results may be undone. The longest delay that didn't result from an undone path may then be identified, and adjusted, and the process may be repeated until all paths are predicted to pass.
US09558096B2	Method and apparatus for supporting performance analysis Aspects of the disclosure provide a method to support performance analysis. The method includes compiling bytecodes to generate native codes corresponding to the bytecodes in an electronic device, generating a file to include the bytecodes and the corresponding native codes in the file, collecting symbol information to map symbols in the bytecodes with offsets of corresponding native codes, and including the symbol information in the file to enable profiling.
US09558094B2	System and method for selecting useful smart kernels for general-purpose GPU computing The present systems and methods leverage aspects of GPU architecture to improve the operational efficiency of the GPU. In one aspect, a set of complementary GPU kernels is identified. From among the tested GPU kernels, a set of α-kernels, may be determined wherein a kernel may be labeled as an α-kernel if it achieves the best performance among all tested kernels for at least one set of parameter values. An intelligent selection algorithm may be used to determine at least one best α-kernel from among the set of α-kernels, wherein the determining by the intelligent selection algorithm includes selecting the at least one best α-kernel based on the parameter values of the selected datasets.
US09558093B2	Visual tools for failure analysis in distributed systems Visual tools are provided for failure analysis in distributed systems. Errors from synthetic measurements and usage data associated with a cloud based service are aggregated by a management application. The errors are processed to create a distribution that segments the errors based on components of the cloud based service. A failed component that generates a subset of the errors associated with a failure is highlighted. The failed component is one of the components of the cloud based service. The distribution is provided in a visualization to identify the failure by emphasizing the failed component with a failure information in proximity to the failed component.
US09558090B2	Non-intrusive monitoring and control of integrated circuits A method of monitoring operations of a set of ICs. The method loads a first set of configuration data into a first IC for configuring a group of configurable circuits of the first IC to perform operations of a user design. The method receives a definition of an event based on values of a set of signals in the user design and a set of corresponding actions to take when the event occurs. The set of signals includes at least one signal received from a second IC. The method generates an incremental second set of configuration data based on the definition of the event and the set of corresponding actions. While the first IC is performing the operations of the user design, the method loads the incremental second set of configuration data into the first IC and monitors the signals received from the second IC at the first IC.
US09558084B2	Recovery control in mirrored disks A method for operating a mirrored disk storage system, comprises a determiner component for determining a repair characteristic of a pair of mirrored disks, a comparator for comparing said repair characteristic of a first of said pair with said repair characteristic of a second of said pair, and a cancelling component for cancelling a repair action for said one of said first or said second of said pair that is not selected by said selector.
US09558082B2	VM availability during migration and VM network failures in host computing systems Techniques for virtual machine (VM) availability during migration network failure and VM network failure in a first host computing system in a failover cluster are described. In one example embodiment, migration and VM network failure in the first host computing system is identified, wherein the first host computing system being configured to migrate VMs using the migration network and to route network traffic of VMs via the VM network. A migration network is then temporarily configured for the first host computing system over a management network in the virtual datacenter, wherein the management network being used to manage host computing systems by virtual management software (VMS) residing in a management server. The VMs running on the first host computing system are then migrated to at least one other host computing system in the failover cluster via the migration network temporarily configured on the management network.
US09558076B2	Methods and systems of cloud-based disaster recovery In one embodiment, a computer-implemented method includes the step of communicatively coupling with an application-server local area network (LAN). The physical servers are discovered in the application-server LAN. The applications running in one or more physical servers in the application-server LAN are discovered. The application data and the application metadata are captured. The application data and the application metadata are parsed. The unique data blocks of the application data and the application metadata are identified. The unique data blocks are uploaded to a cloud-computing platform. It is determined that the one or more physical servers running the application data and the application metadata is no longer available in the application-server LAN. A cloud-based appliance in the cloud-computing platform is placed in an operational state. An application associated with the application data and the application metadata is identified.
US09558074B2	Data replica control A replica control system includes software to control replication in virtual environments. The replica control system identifies a plurality of data blocks within an underlying storage volume in response to a request to update a replica of a target storage volume, identifies changed data blocks of the plurality of data blocks within the underlying storage volume, and identifies a subset of the changed data blocks with which to update the replica of the target storage volume based on a characteristic of the changed data blocks.
US09558073B2	Incremental block level backup Disclosed are systems, computer-readable mediums, and methods for incremental block level backup. An initial backup of a volume is created at a backup server, where creating the initial backup includes retrieving an original metadata file from a metadata server, and retrieving a copy of all data of the volume based on the original metadata file. A first incremental backup of the volume is then created at the backup server, where creating the first incremental backup includes retrieving a first metadata file, where the first metadata file was created separately from the original metadata file. A block identifier of the first metadata file is compared to a corresponding block identifier of the original metadata file to determine a difference between the first and original block identifiers, and a copy of a changed data block of the volume is retrieved based on the comparison of the first and original block identifiers.
US09558070B2	Maintaining high availability of a group of virtual machines using heartbeat messages Embodiments maintain high availability of software application instances in a fault domain. Subordinate hosts are monitored by a master host. The subordinate hosts publish heartbeats via a network and datastores. Based at least in part on the published heartbeats, the master host determines the status of each subordinate host, distinguishing between subordinate hosts that are entirely inoperative and subordinate hosts that are operative but partitioned (e.g., unreachable via the network). The master host may restart software application instances, such as virtual machines, that are executed by inoperative subordinate hosts or that cease executing on partitioned subordinate hosts.
US09558065B2	Memory system including cache According to one embodiment, a memory system comprises a first storage device containing a nonvolatile semiconductor memory and a controller configured to control the first storage device. Data from a data processor is written to the first storage device, the data is written to a second storage device. The controller transmits information indicating that data to be read is absent in the first storage device to the data processor when a read error occurs, the read error disables reading of data from the first storage device in response to a read request supplied from the data processor.
US09558063B2	Semiconductor device and error correction method A device is provided with: memory cell array including plurality of first and second memory cells and one or more third memory cells; judging circuit that judges plurality of data values held by selected first and second memory cells of the first and second memory cells, by referring to reference potential corresponding to reference data held by a selected third memory cell; and error detection and correction circuit that detects whether or not there is error in the judged data values of the first and/or second memory cells, with judged data value of the first and second memory cells as error correcting code. When the error detection and correction circuit detects that there is error exceeding error correction capability in the judged data values, control is performed to write reference data to the selected third memory cell.
US09558062B2	Cyclic redundancy check (CRC) false detection reduction in communication systems The present disclosure presents a method and an apparatus for reducing cyclic redundancy check (CRC) false detections at a user equipment (UE). For example, the method may include receiving a data packet at the UE, determining whether a state metric value for each of a plurality of vector elements of a last path metric vector of the data packet is less than or equal to a first threshold, incrementing a counter when the state metric value of a vector element of the plurality of vector elements is less than or equal to the first threshold, determining whether the counter is lower than a second threshold, and providing the data packet to an upper layer protocol entity of the UE when a CRC pass for the data packet is determined and the counter is lower than the second threshold. As such, reduced CRC false detections at a UE may be achieved.
US09558061B2	Information processing apparatus and information processing method An information processing apparatus capable of generating a partition including a plurality of units having hardware devices and the partition operating as an information processing unit by combining the units, the information processing apparatus comprising a processor executing a process that causes the information processing apparatus to perform selecting, upon occurrence of a fault in the partition, a unit as a processing target of a dump process of acquiring dump data from the units included in the partition with the occurrence of the fault, executing the dump process for the unit selected by the selecting and generating the partition by combining the units completing the execution of the dump process.
US09558060B1	End use self-help delivery system A self-repairing enterprise workstation that selects a workstation repair script based on a currently experienced workstation problem, retrieves the workstation repair script from a repair script repository, and executes the retrieved repair script in a user context of the workstation to repair the problem. The self-repairing enterprise workstation comprises an automated computer repair application stored in the memory, that when launched by an operating system of the workstation in response to the receipt of an input selection of a custom URL moniker downloads a script associated with the URL moniker from a repair script repository, executes the script in a user context of the automated computer repair application, repairs a problem experienced by the self-repairing enterprise workstation.
US09558056B2	Organizing network performance metrics into historical anomaly dependency data The technology disclosed relates to organizing network performance metrics into historical anomaly dependency data. In particular, it relates to calculating cascading failure relationships between correlated anomalies detected in a network. It also relates to illustrating to a network administrator causes of system failure by laying out the graph to show a progression over time of the cascading failures and identify root causes of the cascading failures. It also relates to ranking anomalies and anomaly clusters in the network based on attributes of the resources exhibiting anomalous performances and attributes of the anomalous performances. It further relates to depicting evolution of resource failures across a network by visually coding impacted resources and adjusting the visual coding over time and allowing replay over time to visualize propagation of anomalous performances among the impacted resource.
US09558052B2	Safe scheduler for finite state deterministic application A safety system monitors faults in an embedded control system. The embedded control system is modeled to produce one or more model check values by calculating how many clock cycles will pass between an initialization time point and at least one event time point for a specific event. The initialization time point is a certain point in an initialization function of a scheduler in the embedded control system. The at least one event time point is an expected number of clock cycles to pass before a specific event occurs. In operation, the embedded control system is initialized, a current clock cycle counter value is retrieved at a certain point in the initialization, and either an occurrence or an absence of an occurrence of a scheduled event is recognized. A current clock cycle value is recorded upon the recognition, and a mathematic check value is produced from the clock cycle value stored at the certain point in the initialization and the clock cycle value recorded upon the recognition. Subsequently, the model check value is compared to the mathematic check value, and action is taken based on the comparison.
US09558050B2	General middleware bridge and method thereof There are disclosed a general middleware bridge supporting an interoperability operation between devices on different middlewares and a method thereof. The general middleware bridge according to the present invention includes: a conversion rule collector collecting message conversion rules for an interoperability operation between different middleware devices; a conversion rule register registering the message conversion rules for each message type; and a message converter interconverting messages from the middleware devices on the basis of the message conversion rules and transferring the converted messages for each message type.
US09558048B2	System and method for managing message queues for multinode applications in a transactional middleware machine environment A middleware machine environment can manage message queues for multimode applications. The middleware machine environment includes a shared memory on a message receiver, wherein the shared memory maintains one or more message queues for the middleware machine environment. The middleware machine environment further includes a daemon process that is capable of creating at least one message queue in the shared memory, when a client requests that the at least one message queue be set up to support sending and receiving messages. Additionally, different processes on a client operate to use at least one proxy to communicate with the message server. Furthermore, the middleware machine environment can protect message queues for multimode applications using a security token created by the daemon process.
US09558043B2	System and method for abstracting and orchestrating mobile data networks in a network environment A method is provided in one example and includes receiving data from a network element, determining a candidate data processing task for the received data based upon a first similarity metric between the received data and data currently associated with the candidate data processing task, and sending the received data to the candidate data processing task.
US09558040B2	Memory manager with enhanced application metadata A memory management system is described herein that receives information from applications describing how memory is being used and that allows an application host to exert more control over application requests for using memory. The system provides an application memory management application-programming interface (API) that allows the application to specify more information about memory allocations that is helpful for managing memory later. The system also provides an ability to statically and/or dynamically analyze legacy applications to give applications that are not modified to work with the system some ability to participate in more effective memory management. The system provides application host changes to leverage the information provided by applications and to manage memory more effectively using the information and hooks into the application's use of memory. Thus, the system provides a new model for managing memory that improves application host behavior and allows applications to use computing resources more efficiently.
US09558038B2	Management system and management method for managing information processing apparatus A system to which the present invention has been applied includes a plurality of information processing apparatuses connected to each other and a management device that divides a first number of pieces of management data needed for management of the plurality of information processing apparatuses into a second number of pieces of management data, the second number being equal to or greater than the first number, and that transmits the second number of pieces of management data obtained by the division respectively to the plurality of information processing apparatuses.
US09558037B2	Systems and methods to allocate application tasks to a pool of processing machines Systems and methods are provided to allocate application tasks to a pool of processing machines. According to some embodiments, a requestor generates a scope request including an indication of a number of compute units to be reserved. The requestor also provides an application request associated with the scope. A subset of available processing machines may then be allocated to the scope, and the application request is divided into a number of different tasks. Each task may then be assigned to a processing machine that has been allocated to the application request. According to some embodiments, each task is associated with a deadline. Moreover, according to some embodiments an overall cost is determined and then allocated to the requestor based on the number of compute units that were reserved for the scope.
US09558035B2	System and method for supporting adaptive busy wait in a computing environment A system and method can support queue processing in a computing environment such as a distributed data grid. A thread can be associated with a queue in the computing environment, wherein the thread runs on one or more microprocessors that support a central processing unit (CPU). The system can use the thread to process one or more tasks when said one or more tasks arrive at the queue. Furthermore, the system can configure the thread to be in one of a sleep state and an idle state adaptively, when there is no task in the queue.
US09558024B2	Obtaining virtual machine images from virtualization environments Techniques are described for facilitating sharing and reuse of executable software images between multiple execution environments. In at least some situations, the executable software images are virtual machine images (e.g., images that are bootable or otherwise loadable by a virtual machine in a particular virtualization environment, and that each include operating system software and/or software for one or more application programs, optionally along with one or more hard disks or other representations of stored data). The described techniques may include use of an image conversion tool that is configured to support interactions with multiple distinct types of source execution environments to extract executable software images from those environments, and to modify extracted software images for execution in one or more distinct types of destination execution environments, optionally as directed by one or more users via a GUI provided by the image conversion tool.
US09558020B2	Method of processing javascript (JS) API requests Some embodiments of the invention provide a novel server for processing application programming interface (API) requests. In some embodiments, the API server is written in JavaScript. For example, in some embodiments, the API-accessible objects of this server are each defined in terms of a JavaScript file and a JSON (JavaScript Object Notation) file. At runtime, a runtime processor instantiates each JavaScript object from its associated JavaScript and JSON files. Once instantiated, the JavaScript object can be used to process API requests that refer to the JavaScript object. Some embodiments use novel JSON file structures that allow these embodiments to define rich JavaScript models.
US09558009B1	Expedited find sector to decrease boot time A system may be provided that includes a random access memory, a non-volatile solid state memory, a serial non-volatile semiconductor memory, and a memory controller. The non-volatile solid state memory may include a boot block and a code partition. The serial non-volatile semiconductor memory stores a last written boot sector identifier. The memory controller may be configured to read the last written boot sector identifier from the serial non-volatile semiconductor memory and find a last written boot sector of the boot block based on the last written boot sector identifier read from the serial non-volatile semiconductor memory.
US09558003B2	Reconfigurable processor for parallel processing and operation method of the reconfigurable processor A reconfigurable processor and an operation method of the reconfigurable processor may include: a status register configured to store a status value used to determine at least one execution mode in a processor; a parallel processing scheduler configured to schedule at least one of a very long instruction word (VLIW) logic and a coarse grained architecture (CGA) logic to be used based on the stored status value; a VLIW register configured to store processed data according to the VLIW logic; and a CGA register configured to store processed data according to the CGA logic.
US09558001B2	Prioritizing instructions based on type Methods and reservation stations for selecting instructions to issue to a functional unit of an out-of-order processor. The method includes classifying each instruction into one of a number of categories based on the type of instruction. Once classified an instruction is stored in an instruction queue corresponding to the category in which it was classified. Instructions are then selected from one or more of the instruction queues to issue to the functional unit based on a relative priority of the plurality of types of instructions. This allows certain types of instructions (e.g. control transfer instructions, flag setting instructions and/or address generation instructions) to be prioritized over other types of instructions even if they are younger.
US09557999B2	Loop buffer learning Methods, apparatuses, and processors for tracking loop candidates in an instruction stream. A load buffer control unit detects a backwards taken branch and starts tracking the loop candidate. The control unit tracks taken branches of the loop candidate, and keeps track of the distance to each taken branch from the start of the loop. If the distance to each taken branch stays the same over multiple iterations of the loop, then the loop is stored in a loop buffer. The loop is then dispatched from the loop buffer, and the front-end of the processor is powered down until the loop terminates.
US09557998B2	Systems, apparatuses, and methods for performing delta decoding on packed data elements Systems, apparatuses, and methods for performing delta decoding on packed data elements of a source and storing the results in packed data elements of a destination using a single packed delta decode instruction are described. A processor may include a decoder to decode an instruction, and execution unit to execute the decoded instruction to calculate for each packed data element position of a source operand, other than a first packed data element position, a value that comprises a packed data element of that packed data element position and all packed data elements of packed data element positions that are of lesser significance, store a first packed data element from the first packed data element position of the source operand into a corresponding first packed data element position of a destination operand, and for each calculated value, store the value into a corresponding packed data element position of the destination operand.
US09557996B2	Digital signal processor and method for addressing a memory in a digital signal processor In a digital signal processor comprising at least one vector execution unit and at least a first memory unit a third unit is arranged to provide addressing data in the form of an address vector to be used for addressing the first memory unit, said third unit being connectable to the first memory unit through the on-chip network, in such a way that data provided from the third unit can be used to control the reading from and/or the writing to the first memory unit. This enables fast reading from and writing to a memory unit of data in any desired order.
US09557993B2	Processor architecture and method for simplifying programming single instruction, multiple data within a register The present disclosure provides a processor, and associated method, for performing parallel processing within a register. An exemplary processor may include a processing element having a compute unit and a register file. The register file includes a register that is divisible into lanes for parallel processing. The processor may further include a mask register and a predicate register. The mask register and the predicate register respective include a number of mask bits and predicate bits equal to a maximum number of divisible lanes of the register. A state of the mask bits and predicate bits is set to respectively achieve enabling/disabling of the lanes from executing an instruction and conditional performance of an operation defined by the instruction. Further, the processor is operable to perform a reduction operation across the lanes of the processing element and/or generate an address for each of the lanes of the processing element.
US09557987B2	Automatic formatting of computer program source code A method and system is provided for auto formatting changes to computer program source code stored in a code repository. The code comprises a plurality of separately identifiable sections each of which includes non-functional formatting information which differs between at least some of the sections. In response to a user input request a selected source code section is extracted and edited via a user interface. A set of formatting rules is determined automatically from at least the code section being edited. This set of rules is one of a plurality of possible sets corresponding to the separately identifiable sections. The edited code is then formatted according to the determined set of formatting rules and stored in the code repository.
US09557986B2	Systems and methods for customizing and programming a cloud-based management server Systems and methods for managing Software-as-a-Service (SaaS) provided by a virtual machine are described. The system may include a management application, and may receive a feature package from the virtual machine. The feature package may be associated with a function supported by the virtual machine. The system may integrate the feature package into the management application, and transmit a first command to the virtual machine for executing the function at the virtual machine. The first command may be generated by the management application based on the feature package.
US09557977B2	Extending superword level parallelism A computer identifies one or more pairs of scalar statements and performs a cost analysis of operations of each of the one or more pairs of scalar statements to determine both a benefit and a cost of operations. The computer determines, based, at least in part, on the cost analysis, a gain for each of the one or more pairs of scalar statements. The computer creates based, at least in part, on the gain, a sorted list of each of the one or more pairs of scalar statements and selects a first pair from the sorted list. The computer issues a query to a hash table using a statement of the first pair and selects from results received from the query, a second pair. The computer then extends, based, at least in part, on the second pair, the first pair to create a pack.
US09557976B2	Adaptable and extensible runtime and system for heterogeneous computer systems A method for accelerating processing of program code in a heterogeneous system may be provided. It may include identifying at runtime a code region having an acceleration potential, creating a dependency graph of the program code, expanding the dependency graph based on a first set of predefined rules to generate variants of the code region, and determining segments within the variants based on a second set of predefined rules. The segments may be dedicated and assigned and compiled for use to/by a specific execution unit such that a cost function is minimized.
US09557975B2	Adaptable and extensible runtime and system for heterogeneous computer systems A method for accelerating processing of program code in a heterogeneous system may be provided. It may include identifying at runtime a code region having an acceleration potential, creating a dependency graph of the program code, expanding the dependency graph based on a first set of predefined rules to generate variants of the code region, and determining segments within the variants based on a second set of predefined rules. The segments may be dedicated and assigned and compiled for use to/by a specific execution unit such that a cost function is minimized.
US09557971B2	Dynamic software assembly An improved system and method for updating software is described. The system, upon detecting one or more changes within the set of eligibility attribute values associated with the one or more particular components of previously-provided software, selects a replacement component. The component is selected based on one or more changed eligibility attribute values within the set of eligibility attribute values, and the metadata of the user device. Using the replacement component, the replacement software is constructed and sent to the user device.
US09557966B2	Generating a predictive data structure A method, apparatus, and/or computer program product generates a predictive data structure for an application when operating offline in a network connected data processing system, the application comprising source code having an execution path. The method comprises: determining an exit point within the source code of the application; determining, from the exit point, an execution path comprising at least one conditional statement; identifying one or more branches of the at least one identified conditional statement and for each identified branch determining an expected response; for each determined expected response, generating a data structure from the response; continuing along the execution path of the source code from the exit point and replacing each request for a resource in the source code with a pointer to the generated data structure; and executing the source code with the pointer to the generated data structure from the determined exit point.
US09557964B2	Random number generator and method for generating random number thereof A random number generator and a method for generating random number thereof are provided. The random number generator is used for generating a random sequence and includes a linear-feedback shift register (LFSR) circuit, an oscillating circuit, a delay circuit and a logic operation circuit. The LFSR circuit receives the random sequence to generate a plurality of first control signals and a plurality of second control signals. The oscillating circuit receives the first control signals to generate a random clock signal. The delay circuit receives an alternating current signal and the second control signals to generate a random delay sampling signal. The logic operation circuit receives the random clock signal and the random delay signal to generate the random sequence.
US09557956B2	Information processing apparatus, information processing method, and program An information processing apparatus is provided which includes a metadata extraction unit for analyzing an audio signal in which a plurality of instrument sounds are present in a mixed manner and for extracting, as a feature quantity of the audio signal, metadata changing along with passing of a playing time, and a player parameter determination unit for determining, based on the metadata extracted by the metadata extraction unit, a player parameter for controlling a movement of a player object corresponding to each instrument sound.
US09557954B2	Display panel using direct emission pixel arrays A display panel includes a carrier substrate, a system interconnect, and a plurality of display modules disposed across the carrier substrate. The display modules are each communicatively coupled to the system interconnect to each output a different portion of an overall image communicated via the system interconnect. Each of the display modules includes an array of direct emission display pixels and a module interconnect to couple the array of direct emission display pixels to the system interconnect. The array of direct emission display pixels of a given display module of the plurality of display modules is distinct and separate from the array of direct emission display pixels of other display modules of the plurality of display modules.
US09557952B2	Electronic apparatus, control method, and storage medium According to one embodiment, an electronic apparatus includes a virtual identification information generator and a display controller. The virtual identification information generator generates a virtual identification information item to virtualize the display, for each of two or more external devices wirelessly connected to the electronic apparatus by use of a wireless communication module, based on specific identification information of the display including information indicative of properties of the display. The display controller displays image signals transmitted from the external devices on a display. The display image signals are generated by the external devices based on the virtual identification information items.
US09557949B2	Print scheduling and processing method, apparatus and system A print scheduling and processing method, apparatus and system are disclosed. Embodiments of the invention adopt such a method that at least one print processing apparatus satisfying a print requirement of a user is determined; upon reception of a print request sent from an idle print processing apparatus, the idle print processing apparatus sending the print request is notified of a print task of the user if it is determined that the idle print processing apparatus is included among the at least one print processing apparatus satisfying the print requirement of the user.
US09557948B2	Information processing apparatus for activating a printer driver upon completion of user authentication The present invention provides solution of a matter of authentication to be performed when print service is accessed using a printer driver so that content data is printed.The print service distributes a printer driver capable of transmitting authority information representing that user's authority for using the print service is transferred to the printer driver, the content data, and a print setting to a client.
US09557947B2	Controlling changing of print setting for structured document Whether all pages have the same print settings is determined before print settings are changed in a print preview, and the setting change is permitted only when all pages have the same print settings. In each layer of XPS data to be processed, whether the print setting information is not added to the element of the layer or whether the print setting information added to the element of the layer is shared by all elements of the layer is determined. A change in the print setting information by the user is accepted if one of the conditions is satisfied. When the print settings are changed, the setting change is not reflected on individual print tickets. The change is reflected on the entire job by adding a print ticket reflected with the setting change on the top element.
US09557943B2	Portable communication device, image forming system and method of controlling portable communication device A portable communication device includes an image sensing portion, a display portion (display panel), a touch panel portion, a storage portion that stores personal information on a user, a wireless communication portion and a processing portion that recognizes an address included in a code display member by shooting the code display member, that makes the wireless communication portion acquire data in the address as data on an application form, that adds the personal information to the data acquired by the wireless communication portion to generate print data on the application form in which an item has been entered and that makes the wireless communication portion transmit the generated print data to an image forming apparatus.
US09557936B2	Protection of memories, datapath and pipeline registers, and other storage elements by distributed delayed detection and correction of soft errors This invention is data processing apparatus and method. Data is protecting from corruption using an error correction code by generating an error correction code corresponding to the data. In this invention the data and the corresponding error correction code are carried forward to another set of registers without regenerating the error correction code or using the error correction code for error detection or correction. Only later are error correction detection and correction actions taken. The differing data/error correction code registers may be in differing pipeline phases in the data processing apparatus. This invention forwards the error correction code with the data through the entire datapath that carries the data. This invention provides error protection to the whole datapath without requiring extensive hardware or additional time.
US09557934B2	IC card, information processing method, computer readable recording medium and program An IC card is provided with an IC module. The IC module is provided with a memory section and a control section. The memory section stores information that shows a file structure. The control section receives a first command, transmits a first response containing the information showing the file structure in response to reception of the first command, receives a second command which is transmitted in response to the first response and which includes a first data searched from the information showing the file structure, and sets up the first data in response to reception of the second command.
US09557933B1	Selective migration of physical data The system described herein allows for picking data to be moved from one physical location to another using certain criteria, such as expected activity level, to achieve load balancing or load optimization. Migrating data for a logical device includes subdividing the logical device into subsections, where each of the subsections corresponds to a particular address range of the logical device that is mapped to a physical device containing corresponding data and copying data for a first subsection from a first physical device to a second, different, physical device, where data for a second subsection is maintained indefinitely on the first physical device after copying the data for the first subsection to the second physical device. The first physical device may be provided in a different geographic location than the second physical device.
US09557929B2	Data recovery operations, such as recovery from modified network data management protocol data The systems and methods herein permit storage systems to correctly perform data recovery, such as direct access recovery, of Network Data Management Protocol (“NDMP”) backup data that was modified prior to being stored in secondary storage media, such as tape. For example, as described in greater detail herein, the systems and methods may permit NDMP backup data to be encrypted, compressed, deduplicated, and/or otherwise modified prior to storage. The systems and methods herein also permit a user to perform a precautionary snapshot of the current state of data (e.g., primary data) prior to reverting data to a previous state using point-in-time data.
US09557928B2	Autonomic reclamation processing on sequential storage media Various embodiments for autonomic reclamation of data stored on at least one sequential storage media are provided. In one exemplary embodiment, active data is identified, read out, and stored in a sequential order by starting at a beginning block address of the at least one sequential storage media. At least one of a start address, an end address, and a data length of all original blocks of the active data in a backup application is defined. A new start address for each original block of active data to be written to the backup application is generated. A mapping is yielded and sent from the backup application to a sequential storage media device having the at least one sequential storage media, and the active data is read from each original block address in sequential order.
US09557926B2	Integrity of an address bus A memory device has a controller, an address integrity feature, and an address register. The controller is configured to store error correction data in the address register when the address integrity feature is enabled.
US09557921B1	Virtual volume converter In one aspect, a method includes providing virtual volumes (VVols) and mappings from the VVols to corresponding data storage devices to an I/O filter in a first virtual machine (VM), sending control path commands sent from the first VM to a control-path manager VM, the first VM and the control-path manager VM being run on a VM host, intercepting an I/O for a VVol using the I/O filter and sending the intercepted I/O to a data storage device mapped to the VVol.
US09557914B2	Electronic device, unlocking method, and non-transitory storage medium An object is to provide a technology for preventing content of an unlocking operation from being easily recognized by another person even when the unlocking operation is seen by the other person. In order to achieve the object, there is provided an electronic device (10) including an input reception unit (11) that receives an input from a user through an operation to indicate a predetermined region using a predetermined object, and a lock unit (12) that locks a predetermined function, and unlocks the lock when the input reception unit (11) receives an input caused by a first operation and an input caused by a second operation in parallel.
US09557913B2	Virtual keyboard display having a ticker proximate to the virtual keyboard A method comprising receiving an input of a character from a virtual keyboard rendered on a display, and displaying the input character left of a cursor located within a ticker rendered on the display proximate to the virtual keyboard, wherein the cursor has a set position located towards a centre of the ticker.
US09557912B2	Display device and controlling method thereof Disclosed are a display device and controlling method thereof. The present invention includes a communication unit configured to perform a communication with a terminal device located in a preset distance, the communication unit configured to receive terminal device's information including an identifier of the terminal device, a controller determining whether a card included in a card group exists by searching the card group associated with the received terminal device's identifier, and a display unit, wherein if the card included in the searched card group exists, the controller displays a main card and wherein if the card included in the searched card group does not exist, the controller outputs a notification message.
US09557908B1	Methods and systems for rendering in a multi-process browser using a shared memory area Systems and methods for rendering web content in a browser are described herein. An embodiment includes a web rendering engine in a rendering engine process to generate one or more requests to selectively redraw one or more regions of content retrieved by a browser process. A renderview then generates a bitmap based on the requests and content retrieved by the browser process. The bitmap may then be stored by the renderview in a shared memory area where it may be accessed by a renderview host in the browser process. The renderview host may then provide the bitmap to a backing store associated with a display device for display to a user. In another embodiment, the shared memory area between the browser process and the rendering engine process may be used to achieve efficient scrolling of a web page through rate limited rendering of content.
US09557906B2	Visualization information bar Among other things, one or more techniques and/or systems are provided for maintaining an information bar associated with a visualization. The visualization may correspond to an interface configured to display one or more entities (e.g., a map interface may display location entities, such as coffee shops, and/or direction entities, such as portions of a route, within a map). Responsive to the visualization being populated, the information bar may be populated with one or more information panels corresponding to the one or more entities. For example, a first information panel may comprise coffee specials and hours of operation for a first coffee shop entity populated within the visualization. Responsive to a selection of an entity within the visualization, a corresponding information panel may (automatically) be scrolled to and/or highlighted within the information bar. In this way, the information bar may display information panels corresponding to entities of the visualization.
US09557905B2	System and method for user input A medical diagnostic imaging system comprises a user interface comprising at least one physical control. The system also comprises a camera positioned to view the physical control. The system further comprises a processor connected to the camera and configured to detect a manipulation involving the physical control and associate the manipulation with a desired user input for controlling the imaging system.
US09557904B2	Information processing apparatus, method for controlling display, and storage medium When an information processing apparatus detects an operation in which three different points on a displayed image are touched and, while fixing one of the three points, the remaining two points are moved, the information processing apparatus displays side by side the image enlarged or reduced in response to the movement of the two points and the image neither enlarged nor reduced.
US09557898B2	Syndication of slideshow content through a web feed Systems and methods are provided for syndicating slideshow content in a web feed. Data is obtained for a content feed associated with a web page in response to a request by a user of a content feed reader. A slideshow within the web page is identified based on analysis of the obtained data according to a schema definition for syndication of slideshow content. A first set of properties for the slideshow is extracted from the obtained data, based on the schema definition. A set of slides of the slideshow is identified based on the first set of properties. A second set of properties for the set of slides is also extracted from the obtained data. The content feed including the set of slides of the slideshow and one or more properties of the second set are displayed to the user via the content feed reader.
US09557896B1	Cloud-based tool for creating video interstitials An interstitial creator identifies a playlist of media items, the playlist comprising pointers to the media items. The interstitial creator receives a request to insert an interstitial at a location in the playlist, wherein the location is after a first media item and before a second media item. In response to the request, the interstitial creator provides an interstitial creation interface and receives, through the interstitial creation interface, interstitial configuration parameters. The interstitial creator creates the interstitial based on the received interstitial configuration parameters and inserts a pointer to the interstitial into the playlist at the location.
US09557892B2	Systems and methods for organizing and displaying hierarchical data structures in computing devices Systems and methods for organizing and displaying data structures in computing devices are provided herein. An exemplary method includes generating a GUI that includes a first plurality of selectable objects that are arranged in a first layout on the GUI, receiving a selection of one of the first plurality selectable objects, replacing the first plurality of selectable objects with a second plurality of selectable objects that are arranged in a second layout on the GUI, the second layout being different in visual appearance from the first layout, transforming the first plurality of selectable objects into a first set of icons that are arranged in an arcuate pattern, the first set of icons being shrunken versions of the first plurality of selectable objects, and displaying the first set of icons on a first layer of the GUI above the second plurality of selectable objects that are displayed on a second layer.
US09557883B1	Preventing modification of an email In an approach for preventing the modification of an email by the recipients of the email, a processor receives an indication that an email message is composed. A processor receives an indication that modification of contents of the email message, by one or more recipients of the email message, is to be prevented. A processor converts the contents of the email message from editable text to a non-editable format. A processor sends the converted email message to a recipient.
US09557881B1	Graphical user interface for tracking and displaying user activities over a predetermined time period A system for generating a graphical user interface for tracking and displaying user activities over a predetermined time period is provided. The system includes a presentation component configured to display a graphical user interface that facilitates receiving user input regarding daily activities of the user, wherein the interface comprises a chart comprising a plurality of input compartments defined by a plurality of concentric circles divided into a plurality of slices, wherein each of the concentric circles are associated with a different input category and each of the slices are associated with a different time frame of a time period.
US09557879B1	System for inferring dependencies among computing systems Systems and methods are described for identifying, tracking, and customizing dependencies between components of a computing environment. By providing greater insight and transparency into dependencies, the systems and methods can facilitate modeling the underlying architecture of applications and computer hardware. As a result, IT personnel can better track relationships between components. Custom filtering tools can also provide IT personnel with tools to switch from different types of dependency views that focus on application-oriented views, hardware-oriented views, or other custom views. Model annotation tools can also enable IT personnel to customize a dependency model to reflect real-world application and hardware monitoring conditions.
US09557877B2	Advanced playlist creation Media players and associated methods are described that may allow a user to initiate playback of content or other media assets based on information associated with content. A media player may receive information associated with content from a user selection of a song, movie, photo, or the like. Based on the information, the media player may procure other additional content to be added to a playlist. The media player may automatically add to a playlist or modify a playlist with content that matches a user's preferences for artists, albums, genres, or the like. The user may interact with the media player to determine what content is added and how a playlist should be mixed. The user may specify how much of any content procured by the media player should be present in the playlist without the need to specify each individual item that constitutes a playlist.
US09557876B2	Hierarchical user interface In one embodiment, a method includes presenting a hierarchical user interface on a screen of an electronic device, the hierarchical user interface having one or more content sections at a first level and each content section having one or more content items at one or more second levels above the first level; adjusting a layout of the content sections or the content items of each content section based on a size, orientation, or aspect ratio of the screen of the electronic device; and enabling a user to view the content sections and the content items of each content section.
US09557872B2	Capacitive rotary encoder A human machine interface includes a capacitive touch screen having a capacitive sensor. The capacitive touch screen displays text characters and/or graphical information. A control device is rotatably coupled to a structure such that the control device is superimposed over the screen. The control device includes at least one electrically conductive element. The control device rotates about an axis substantially perpendicular to the screen such that the at least one electrically conductive element follows the rotation of the control device. The capacitive sensor senses a rotational position of the at least one electrically conductive element.
US09557871B2	Transparent conductive coating for capacitive touch panel or the like This invention relates to a transparent conductive coating that is substantially transparent to visible light and is designed to have a visible reflectance which more closely matches that the visible reflectance of the underlying substrate. In certain example embodiments, the transparent conductive multilayer coating includes a silver layer(s) and may be used as an electrode(s) in a capacitive touch panel so as to provide for an electrode(s) transparent to visible light but without much visibility due to the substantial matching visible reflection design.
US09557866B2	Capacitive touch panel and touch display apparatus Embodiments of the present invention disclose a capacitive touch panel and a touch display apparatus, which includes a substrate and at least a transparent electrically conductive layer; the transparent electrically conductive layer includes a plurality of electrode groups, each of electrode groups includes a plurality of electrodes in series, each of electrode groups connects to a sensing lead at one side, at lease one of the electrode groups is arranged along a direction away from the sensing lead, and capacitances formed between the electrodes of the at least one of the electrode groups and common electrodes are reduced gradually along the direction. The capacitive touch panel and touch display apparatus according to embodiments of the present invention are configured such that the farther away from the sending lead the electrode is, the smaller the capacitance of the electrode is, thus the signal delay of the electrode far away from the sending lead is improved and the touch sensitivity is improved.
US09557864B2	Integrated LCD touch screen to determine a touch position based on an induced voltage superimposed on both the scan signal of the gate line and a timing pulse of the signal line The present invention provides an array substrate, a liquid crystal display device comprising the same, and a method for forming the same. The array substrate comprises a gate line, a data line, a signal line and a pixel electrode formed thereon. The gate line intersects the data line to define a plurality of pixel regions in which the pixel electrodes are formed. Each of the pixel electrodes overlaps the signal line to form a first sensing capacitor and overlaps the gate line to form a second sensing capacitor.
US09557860B2	Switchable area enhancement for flexible capacitive sensing Embodiments of the invention generally provide an input device having a plurality of sensor electrodes that can be configured to be scanned in a first direction or a second direction. The input device includes a set of sensor electrodes and first and second sets of buses. The first buses are oriented in a first direction and the second buses are oriented in a second direction. The input device also includes a set of switching elements that are each configured to couple one of the sensor electrodes to either a bus in the first set of buses or a bus in the second set of buses. These embodiments allow the sensor electrodes to be scanned in a variety of patterns for flexible sensing functionality.
US09557859B2	Method of making touch sensitive device with multilayer electrode and underlayer Method of making a touch sensor including one or more multilayer electrodes and an underlayer disposed on a substrate. The underlayer is disposed between the multilayer electrodes and the substrate. The multilayer electrodes including at least two transparent or semitransparent conductive layers separated by a transparent or semitransparent intervening layer. The intervening layer includes electrically conductive pathways between the first and second conductive layers to help reduce interfacial reflections occurring between particular layers in devices incorporating the conducting film or electrode.
US09557858B2	Inputting fingertip sleeve An inputting fingertip sleeve includes a sleeve and a conductive layer. The sleeve includes at least one opening configured to receive a finger and includes a closed end. The sleeve includes an inner surface and an outer surface. The closed end of the sleeve includes at least one through hole located between the inner surface and the outer surface. The conductive layer is located on the outer surface of the sleeve and covers the closed end and the at least one through hole. The conductive layer includes a carbon structure.
US09557857B2	Input device with force sensing and haptic response Devices and methods are provided that facilitate improved input device performance. The devices and methods utilize a first electrode disposed on a first substrate, a second electrode coupled to a first side of a piezoelectric material and a third electrode coupled to a second side of the piezoelectric material. The second electrode and the third electrode are configured to facilitate actuation of the piezoelectric material, while the first electrode and the second electrode define at least part of a variable capacitance that facilitates force determination. A spacing element is coupled to the first substrate and defines a spacing between the first electrode and the second electrode. A transmission element is coupled to the third electrode and configured such that a force biasing the transmission element causes the second electrode to deflect relative to the first electrode, thus changing the variable capacitance.
US09557856B2	Optical detector An optical detector (110) is disclosed, the optical detector (110) comprising: at least one spatial light modulator (114) being adapted to modify at least one property of a light beam (136) in a spatially resolved fashion, having a matrix (132) of pixels (134), each pixel (134) being controllable to individually modify the at least one optical property of a portion of the light beam (136) passing the pixel (134); at least one optical sensor (116) adapted to detect the light beam (136) after passing the matrix (132) of pixels (134) of the spatial light modulator (114) and to generate at least one sensor signal; at least one modulator device (118) adapted for periodically controlling at least two of the pixels (134) with different modulation frequencies; and at least one evaluation device (120) adapted for performing a frequency analysis in order to determine signal components of the sensor signal for the modulation frequencies.
US09557853B2	Touch detecting circuit and semiconductor integrated circuit using the same A touch detecting circuit includes a discharging circuit, a detecting circuit, and a calibration circuit that is configured with a calibration capacitor connected to a terminal and a current source which is connected to the terminal and can be controlled so as to be on and off, that can be connected via the terminal to a sensing capacitor which is disposed on a touch panel, is provided. In the beginning, the sensing capacitor is charged to a predetermined voltage by the charging circuit, thereafter, in a process of discharging, a portion of charge amount that is discharged is used to charge the calibration capacitor, and another portion is discharged via the current source, and the rest is input to the detecting circuit. The detecting circuit measures the charge amount that is input.
US09557850B2	Dynamic artifact compensation systems and methods One embodiment describes an electronic display. The electronic display includes display driver circuitry that display an image frame on the electronic device using a first display pixel and a second display pixel, touch sensing circuitry that detect user interaction with the electronic display, and a timing controller. The timing controller receives image data, in which the image data describes a target grayscale value of the first pixel and the second pixel to display the image frame, instructs the display driver circuitry to display a first portion of the image frame by writing the image data to the first display pixel, instructs the touch sensing circuitry to determine whether a user touch is present on a surface of the electronic display after the first portion of the image frame is displayed, determines grayscale value displayed by the second display pixel to display a previous image frame, and instructs the display driver circuitry to display a second portion of the image frame by writing adjusted image data to the second display pixel when the displayed grayscale value differs from the target grayscale value of the second pixel by more than a threshold amount.
US09557846B2	Pressure-sensing touch system utilizing optical and capacitive systems A hybrid touch system that utilizes a combination of a capacitive touch system for position sensing and an optical touch system for pressure sensing is disclosed. The optical touch system includes a transparent sheet having a surface, at least one light source and at least one detector which are operably arranged relative to the transparent sheet to transmit light through the sheet and to detect the transmitted light. Performing position sensing using the capacitive touch system simplifies the pressure-sensing optical touch system.
US09557845B2	Input device for and method of communication with capacitive devices through frequency variation A computing device configured to receive data from a peripheral device, such as a stylus. The computing device includes a processor, a touch interface, such as a touch screen, in communication with the processor and configured to detect an input corresponding to an object approaching or contacting a surface. The computing device further includes a touch filter in communication with the touch interface and a peripheral filter in communication with the touch interface. The touch filter is configured to reject a peripheral frequency corresponding to a peripheral signal of the peripheral device and the peripheral filter is configured to reject a touch frequency component corresponding to a touch signal corresponding to a touch input.

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