Document Document Title
US09531341B2 Method and apparatus for converting single-ended signals into differential signals
An electronic apparatus comprises a first stage that functions as a single-ended to differential converter for signals in a low frequency range and a second stage that is electrically connected to the first stage and functions as a single-ended to differential converter for signals in a high frequency range.
US09531331B2 Amplifier compensating drift after sudden decrease of drain current
An RF amplifier that compensates the drift appearing after a sudden decrease of the drain current is disclosed. The RF amplifier detects the drain current by the bias control unit that feeds the change of the drain current back to the gate bias of the FET. The bias control unit responds to the sudden increase of the drain current by a relatively longer time constant; while, to the sudden decrease thereof by the second time constant enough shorter than the first time constant to compensate the drift appearing after the sudden decrease of the drain current.
US09531330B2 Low noise amplifier for multiple channels
An amplifier system has an amplifier for amplifying a plurality of input signals from a plurality of different channels, and a plurality of demodulators each operatively coupled with the amplifier for receiving amplified input signals from the amplifier. Each demodulator is configured to demodulate a single amplified input channel signal from a single channel of the plurality of different channels. The system thus also has a plurality of filters, coupled with each of the demodulators, for mitigating the noise.
US09531329B2 Power amplifier and transmission apparatus
A power amplifier according to the present invention includes: an apparatus housing (10) having a hole (11) for maintenance formed therein; a transmission line unit (12) disposed in a location covered by the apparatus housing (10), a transmission line length of the transmission line unit being adjusted depending on a frequency band of an input signal; and an element (13) that requires no adjustment of a transmission line even when an adjustment of the transmission line unit (12) is required along with a change in the frequency band of the input signal. The transmission line unit (12) is disposed near a surface of an apparatus that is accessible from outside through the hole (11) for maintenance, and the element (13) that requires no adjustment of the transmission line is buried in a location within the apparatus housing that is inaccessible through the hole for maintenance (11).
US09531328B2 Amplifiers with a short phase path, packaged RF devices for use therein, and methods of manufacture thereof
An embodiment of a packaged radio frequency (RF) amplifier device includes a transistor and an inverse class-F circuit configured to harmonically terminate the device. The transistor has a control terminal and first and second current carrying terminals. The control terminal is coupled to an input lead of the device, and the first current carrying terminal is coupled to a voltage reference. The inverse class-F circuit is coupled between the second current carrying terminal and an output lead. The inverse class-F circuit includes a shunt circuit coupled between a cold point node and the voltage reference, where the cold point node corresponds to a second harmonic frequency cold point for the device. The shunt circuit adds a shunt negative susceptance at a fundamental frequency F0 to the inverse class-F circuit.
US09531321B2 System and method of online filtering of photovoltaic signals
A system for online filtering of photovoltaic (PV) output signals includes a programmable filter that is programmed to decompose measured PV output power into an estimated low-frequency signal component, based substantially on movement of the sun and an estimated high-frequency signal component, based substantially on cloud shading. An open loop controller generates a reactive power compensation signal based on at least one of the low-frequency signal component and the high-frequency signal component. The low-frequency signal component is defined by a positive portion of a sine curve that is based substantially on movement of the sun.
US09531319B2 Clamps for solar systems
A solar power system can include a rail and a solar module disposed on the rail. A clamp assembly can couple the solar module to the rail. The clamp assembly can have a clamped configuration in which the solar module is secured to the rail and an unclamped configuration. The clamp assembly can comprise an upper clamp member, a lower clamp member coupled to the rail, and a stabilization member mechanically engaging the upper clamp member and the lower clamp member. The stabilization member can prevent rotation of the lower clamp member relative to the rail when the clamp assembly is in the clamped and unclamped configurations. In the unclamped configuration, the stabilization member can be biased such that the upper clamp member is disposed at a sufficient clearance above the rail to permit the insertion of the solar module between the upper clamp member and the rail.
US09531312B2 Vehicle and method of controlling vehicle
A vehicle includes a feeding system supplying an electric power to an external device disposed outside the vehicle, a controller controlling the operation of the feeding system, and an information output unit outputting predetermined information. The controller performs the processing of determining whether or not feeding can be performed from the feeding system to the external device. When the feeding from the feeding system to the external device is prohibited, the controller causes the information output unit to output prohibition information about the prohibition of the feeding including the contents of a determination processing.
US09531310B2 System and method for computing motor speed and rotor position using hall sensor
A method and system for computing a motor speed and a rotor position using a hall sensor are provided. The method improves precision for computing the speed of the motor rotating at a high speed and the rotor position using the hall sensor based on configurations, such as the hall sensor mounted in the motor as a position sensor, a motor controller configured to receive a signal of the hall sensor to operate the motor, and a microcomputer configured to store a time when the motor controller senses the timing of a change in the signal of the hall sensor.
US09531309B2 Drive device
A drive device that includes a current sensor that detects a current flowing in the wheel driving rotary electric machine; and shunt resistors that detect currents flowing in the respective second switching element units for the corresponding phases between the direct-current power supply and the second switching element units for the respective phases, wherein a ratio of a period during which current detection can be performed by the current sensor to a control period of the first inverter is higher than a ratio of a period during which current detection can be performed by the shunt resistors to a control period of the second inverter.
US09531308B2 Fan motor power supply
A fan having one fan blade; a fan motor for rotating the fan blade; a motor control electrically coupled with the fan motor for controlling operational characteristics of the fan motor; and a power supply having a step-down high efficiency buck converter, a step-down low drop-out linear regulator, and/or a step-down switching regulator are described. The power supply may receive a first input voltage and lower the first input voltage to a second lower voltage. The fan motor is electrically coupled to be driven by the first input voltage and the motor control is electrically coupled to operate using the second lower voltage from the power supply. The motor control may include a microcontroller, level shifters electrically coupled to the microcontroller, and drivers electrically coupled to the level shifters and configured to drive the fan motor.
US09531304B2 Method and device for operating an electrical machine having separate excitation
A method and a device for operating an electrical machine having separate excitation, especially a synchronous machine. With the aid of a sensor system, a variable characterizing a rotor temperature and/or a stator temperature are/is determined, and an excitation current and stator currents for the electrical machine are specified by a control unit as a function of the variable characterizing the rotor temperature and/or the stator temperature, at least in specifiable operating ranges.
US09531292B2 Arrangement, method and computer program product concerned with tapping of power from a DC power line to an AC power line
An arrangement for tapping power from a DC power line to an AC power line includes power transfer modules between two DC potentials, each including a first branch with a string of converter cells in parallel with a second branch including a capacitor and being connected to an AC phase. There is at least one control unit that controls the arrangement considering one or more of a) distributing appropriate AC and DC voltages in converter output voltages of all series connected modules, b) maintaining/setting cell capacitor voltages in specific range and allowing boost mode operation, c) performing possible balancing of the introduced capacitor and d) employing an alternate approach of using passive filters to mitigate low order harmonics.
US09531289B2 Electro-mechanical kinetic energy storage device and method of operation
An electro-mechanical kinetic energy storage device includes an input port, an output port, and a tertiary port separate from and magnetically coupled to the input port and the output port. The input port is configured to receive a first input electrical energy from a first electrical source for inducing mechanical energy into the electro-mechanical kinetic energy storage device. The output port is configured output a first converted electrical energy to a first load in which the outputted electrical energy is generated from the induced mechanical energy. The tertiary port is configured to receive a second input electrical energy from a second electrical source for inducing the mechanical energy, and output a second converted electrical energy to a second load, the second converted electrical energy generated from the induced mechanical energy.
US09531287B1 Recreational vehicle transformer
A transformer with a receptacle uniquely adapted on one side to receive the plug on the end of the power cord of a U.S. built 30 A RV and a plug on the other side adapted to connect to receptacles in foreign campgrounds and thereby convert 220 volts of electricity to 110 volts. The transformer also employs a circuit breaker in the hot lead from the circuit employed in the transformer.
US09531285B2 PFC power system with power managed main and standby voltage outputs
A power system is disclosure. The power system includes a processor, a power supply device, and a power-managing module. The power supply device includes a converter and a controller, the converter has a main power output for outputting a main voltage and a standby power output for outputting a standby voltage, and the controller is electrically connected to the converter. The power-managing module is communicating with the electronic device and the power supply device and includes a switch and a power manager, the switch is electrically connected to the main power output and the electronic device, and the power manager is electrically connected to the electronic device, the switch, and the controller. When the electronic device is in a standby operation mode, the power manager makes the switch turn off to prevent to main voltage from conducting to the electronic device.
US09531284B2 Pseudo-constant frequency control for voltage converter
A pseudo-constant portion of a switching cycle (ON time or OFF time) is constant over short periods of time but the pseudo-constant portion is controlled over longer periods of time in a slow frequency control loop to maintain a desired frequency. The average frequency is maintained at or near a desired frequency but when there is a transient, local disturbance, or load change, or other occurrence, then for a short period of time the frequency will vary as the non pseudo-constant portion of the switching cycle changes to address the transient or other occurrence. The frequency control loop will slowly adjust the pseudo-constant portion of the switching cycle to return to the desired frequency.
US09531283B2 Power supply apparatus
A power supply apparatus including a multi-outputs power supply circuit and a first regulating circuit is provided. The multi-outputs power supply circuit has a plurality of output terminals. The multi-outputs power supply circuit provides a first voltage from one output terminal among the output terminals and provides a second voltage from another one output terminal among the output terminals, where a rated voltage value of the first voltage is greater than a rated voltage value of the second voltage. The first regulating circuit is coupled between the one output terminal and the another one output terminal, where the first regulating circuit is enabled when the first voltage exceeds a first threshold, and begins to regulate the second voltage after being enabled.
US09531277B2 Switching converter, control circuit thereof, AC/DC converter, power adapter and electronic device
A control circuit used in a switching converter having a coil, a switching transistor, and a detection resistor, includes: a current detection terminal configured to receive a detection voltage obtained by superimposing a voltage detection signal on a current detection signal; a sample hold circuit configured to sample-hold the detection voltage in an OFF period of the switching transistor to generate a sample hold voltage; a variable amplifier configured to amplify a difference between the sample hold voltage and the detection voltage; a duty controller configured to generate a pulse modulation signal; a driver configured to control the switching transistor based on the pulse modulation signal; and an overcurrent protection circuit configured to compare the detection voltage with a predetermined threshold voltage and change the pulse modulation signal to an OFF level of a switching transistor when the detection voltage is identical to the predetermined threshold voltage.
US09531272B2 Two-phase interleaved converter and method of controlling the same
A two-phase interleaved converter includes two sub-circuits, a voltage controller, a current controller, a balancing controller and a phase shifter. The voltage controller receives the output voltage of the two sub-circuits and outputs a signal in proportion to the level of the output voltage. The current controller receives the output signal of the voltage controller and an inductor current from one of the two sub-circuits and outputs a control signal that controls one of the two sub-circuits which is in charge of one phase. The balancing controller receives values of currents output from the two sub-circuits and calculates a difference between the values of the currents output from the two sub-circuits to control a duty ratio of the control signal applied to one of the two sub-circuits. The phase shifter shifts a phase of the control signal output from the balancing controller.
US09531268B2 Switching power supply and electronic control unit
A switching power supply converts an input voltage to a predetermined output voltage by controlling a switching device. The switching power supply includes a controller and a current detector. The controller controls the switching device. The current detector detects electric current flowing through the switching device. The controller starts a forced-OFF action to forcedly turn OFF the switching device when the current detected by the current detector exceeds a predetermined threshold and then ends the forced-OFF action at a start of a predetermined switching period.
US09531266B2 Power supply circuitry and adaptive transient control
A control circuitry can be configured to receive an error signal indicating a difference between an output voltage of the power supply and a desired setpoint for the output voltage. According to one configuration, depending on the error signal, the control circuitry initiates switching between operating the control circuitry in a pulse width modulation mode and operating the control circuitry in a pulse frequency modulation mode to produce an output voltage. Operation of the control circuitry in the pulse frequency modulation mode during a transient condition, such as when a dynamic load instantaneously requires a different amount of current, enables the power supply to satisfy current consumption by the dynamic load. Subsequent to the transient condition, the control circuitry switches back to operation in the pulse width modulation mode.
US09531260B2 Voltage doubler and voltage doubling method for use in PWM mode
An apparatus and a method for generating a pulse width modulated, PWM, voltage doubler signal is presented The apparatus comprises a voltage source, a capacitor, an output node, a switchable circuit assembly for connecting the voltage source, the capacitor and the output node, and a controller for the switchable circuit assembly which is adapted to be switchable between a first circuit configuration in which the capacitor is connected in parallel to the voltage source so as to be chargeable by the voltage source, and a second circuit configuration in which the capacitor is connected in series between the voltage source and the output node, and wherein the control means is adapted to control the switchable circuit assembly to switch to the first circuit configuration in the first period, and to switch to the second circuit configuration in the second period.
US09531259B2 Power supply circuit
In a power supply circuit having input and output terminals, an error amplifier has first and second paths independent of each other to output a control voltage, a first MOS transistor is interposed between the input terminal and an intermediate node, and a step-up section steps up a voltage supplied from the intermediate node and outputs the stepped-up voltage to the output terminal. The step-up section includes a capacitor, a second MOS transistor, a third MOS transistor, and a drive circuit. The first end of the capacitor is connected to the intermediate node. The second MOS transistor is interposed between the input terminal and a second end of the capacitor. The third MOS transistor is interposed between the second end of the capacitor and a ground. The drive circuit drives the second and third MOS transistors in a complementary manner based on a clock signal.
US09531257B2 Power factor corrector with high power factor at low road or high mains voltage conditions
A power factor corrector raises power factor at low loads or high mains voltages by modifying the switch timing or the current received by the power converter. It achieves this by increasing the switch-on time of a control switch during the falling time so that the majority of the switch-on time during a mains period occurs during the falling time, to thereby control the current received by the converter to compensate for current received by the intermediate filter. Some embodiments may employ a feedback system to produce one or more error signals that modify the control signal used to control the operation of the converter. Various embodiments may also include additional stages that limit the compensation range of the error signal.
US09531256B2 AC-DC converter with adjustable output
An electrical adapter can include a rectifying circuit configured to receive an AC power input, a power factor corrector (PFC) circuit coupled with an output of the rectifying circuit, and a capacitive component coupled with an output of the PFC circuit. The electrical adapter can further include a DC-DC converter circuit coupled with an output of the capacitive component and configured to provide a power output of the electrical adapter, and an impedance-measuring circuit coupled with the power output and configured to measure impedance of a cable connected to the power output. The DC-DC converter circuit can be configured to adjust power of the power output based on the measured impedance.
US09531253B2 Soft-start for isolated power converter
Current flowing through an inductor on a primary side of a voltage converter is sensed and compared to a threshold peak current value to determine when to end an ON portion of the voltage converter. The secondary side of the voltage converter supplies an indication of output voltage for use in determining the threshold peak current value. On start-up the primary side detects when the indication of output voltage is supplied by the secondary side across on isolation channel. Prior to detecting the indicating is being supplied, the primary side uses an increasing threshold peak current as the threshold peak current value. After detection that the indication of output voltage is being provided by the secondary side, the threshold peak current value is based on the indication of the output voltage.
US09531247B2 Inertial energy storage system and hydro-fluoro-ether power transformer scheme for radar power systems and large PFN charging
A multi-port storage system includes a dynamo-electric machine with integral rotor inertia forming a primary energy storage system. The dynamo-electric machine has a primary stator winding configured to accept multiple AC input power sources, and has at least two secondary stator windings configured to deliver electric power to multiple loads at different power, frequency and voltage levels. A secondary energy storage system is coupled to the primary energy storage system, and is configured to convert its stored energy to electric power. The dynamo-electric machine is configured to enhance and buffer the secondary energy storage system, and is configured to improve the conversion of the stored energy to electric power. The system may include a step-up transformer responsively coupled to one of the secondary stator windings. The step-up transformer may comprise a single phase or polyphase step-up transformer having internal cooling and electrical insulation between the secondary windings comprising a hydro-fluoro-ether (HFE) vapor and liquid fluid.
US09531244B2 Conducted emissions filters
Conducting emission suppression in a power circuit for an electric motor comprises a negative temperature co-efficient resistor and capacitor connecting one of the power lines to ground. The NTC resistor is self-stabilizing so that changes in the load current are automatically compensated for.
US09531238B2 Modular actuation device for an aerodynamic control surface of a missile
A modular actuation device for an object, such as an aerodynamic control surface of a missile. The modular actuation device can include an outer support structure configured to couple with an external support member, such as a structural portion of a missile. The modular actuation device can also include an electric motor to provide an input torque and having an outer casing coupled to the outer support structure. The modular actuation device can further include an epicyclic gear train disposed within the outer support structure and operably coupled to the electric motor to receive the input torque. The epicyclic gear train can be configured to provide an output torque to move the object. In addition, the modular actuation device can include a torque output member disposed at least partially within the outer support structure and coupled to the epicyclic gear train to receive the output torque. The torque output member can be configured to couple with the object.
US09531236B2 Arrangement of axial and radial electromagnetic actuators
Systems, methods, and devices for generating electromagnetic forces may involve generating an axial control magnetic flux in an axial control magnetic circuit comprising a first axial pole, a second axial pole, and an axial actuator target, the axial actuator target coupled to a body having a rotational axis. A radial control flux can be generated in a radial control magnetic circuit comprising a first radial pole, a second radial pole, and a radial actuator target. An electrical compensation current can be applied to an electrical bias flux leveling coil to cancel or nearly cancel any changes of the magnetic flux leaking from either the first or the second axial poles into the radial poles, electrical bias flux leveling coil wound around the rotational axis and located axially between the radial poles and the closest of the first or the second axial poles.
US09531230B2 Motor bearing for electric submersible motors
A motor bearing for an electric submersible motor is described. An electric submersible motor includes a rotatable motor shaft extending longitudinally through a submersible motor, a bearing sleeve secured to the rotatable motor shaft in between two adjacent rotor sections, a motor bearing radially outward from the bearing sleeve and pressed against a stator bore, wherein the motor bearing comprises a series of magnets dispersed around an outer diameter of the motor bearing, and an insulation layer covering a surface of each magnet of the series of magnets, wherein the insulation layer faces the stator bore. A motor bearing includes a series of recessions dispersed around an outer axial surface of a motor bearing, a magnet inset in each recession of the series of recessions, and an insulation layer coating a surface of each of the magnets.
US09531228B2 Electric rotating machine
The electric rotating machine has the structure in which, for each one of the slots formed in its stator core, each of the innermost and outermost electrical conductors housed in the slot includes a R-chamfered portion formed in a bent portion thereof projecting outside from the slot and bent along a circumferential direction of the stator core. The R-chamfered portion is located at a radially inner or outer corner of the bent portion at which a side surface of the bent portion on the side being circumferentially bent intersects with a side surface of the bent portion on the radially inner or outer side. The R-chamfered portion is formed of a curved surface having a curvature radius larger than a curvature radius of the other three corners of the bent portion.
US09531225B2 Electric rotating machine
The electric rotating machine includes a stator having an inner hole, a rotor disposed in the inner hole of the stator with a gap with an inner periphery of the stator and formed with magnet housing holes each housing a permanent magnet as a magnetic pole embedded in the outer periphery of the rotor, and a shaft pressure-inserted into a center hole of the rotor. The rotor includes, for each adjacent two of the magnet housing holes, a beam portion formed radially outside the magnet housing holes, a projecting portion projecting radially inward to define the center hole, an extension portion formed radially outside the projecting portion and radially outside the magnet holes, and a plate-shaped bridge portion connecting the beam portion and the extension portion.
US09531223B2 Method for manufacturing stack of laminations
The stack of laminations consists of punched laminations (5), which are bonded together by an adhesive agent. The adhesive agent is composed of an adhesive (4) and an initiator (15), which consists of methacrylates, derivative imines and methacrylic esters. The completely cured adhesive bond has long-term resistance when exposed to a temperature of at least over 80° C. The adhesive (4) is applied over the full surface area and in a contacting manner to one side of the lamination (5) and the initiator (15) is applied to the same side and/or to the other side of the lamination (5). The initiator (15) reacts with the adhesive (4) when contact is made and establishes the adhesive connection between laminations (5) lying against one another. The adhesive agent may, however, also be an adhesive (4) that cures by itself when heat is applied.
US09531222B2 Stator core having convex protruding portion coinciding with adjacent coils
A stationary portion of a motor includes a stator core, insulators, and coils. The stator core includes a core back having an annular shape, and a plurality of teeth extending radially inward from the core back. A radially inner end portion of each tooth has a circumferential width substantially equal to or smaller than a circumferential width of a remaining portion of the tooth. The core back includes a protruding portion protruding radially inward between adjacent teeth, a cut extending radially outward from the protruding portion, and a through hole extending in an axial direction through the core back defined at a radially outer end portion of the cut. The protruding portion increases a radial dimension of the core back to achieve a reduction in magnetic reluctance in the vicinity of the cut.
US09531217B2 Power reception device, power transmission device and power transfer system
A power reception device includes: a vehicle-side resonant portion mounted on a vehicle and resonating, through an electromagnetic field, with a facility-side resonant portion provided in an external facility; and a vehicle-side support including a first support member supporting the vehicle-side resonant portion, and a second support member spaced apart from the vehicle-side resonant portion and supporting the first support member, wherein a dielectric tangent of the first support member is smaller than a dielectric tangent of the second support member.
US09531213B2 Wireless power transmission device
A wireless power transmission device includes a main body, a first transmitter coil and a second transmitter coil. The second transmitter coil is partially stacked over the first transmitter coil. If the wireless power transmission device is operated in a detecting mode, a magnetic flux oriented in the direction toward the top surface of the main body is generated by the first transmitter coil. The magnetic flux is attenuated by the second transmitter coil. Consequently, the electromagnetic wave is inhibited. If the wireless power transmission device detects that an electronic device is located near the first transmitter coil, the first transmitter coil is controlled to be in a charging mode to transmit the magnetic flux to the electronic device, and the magnetic flux is no longer attenuated by the second transmitter coil.
US09531212B2 Secondary battery system and charge and discharge method for the same
A secondary battery has a progressively degrading SOC that is an SOC at which the battery performance degrades during storage, and is charged and discharged by a controller. An information processor holds a first threshold value set in advance and lower than the progressively degrading SOC of the secondary battery, and a second threshold value set in advance and higher than the progressively degrading SOC, makes the controller continue an operation to charge the secondary battery from the first threshold value to the second threshold value at the time of charging the secondary battery based on the value of the SOC of the secondary battery detected by the controller, and makes the controller continue an operation to discharge the secondary battery from the second threshold value to the first threshold value at the time of discharging the secondary battery based on the value of the SOC of the secondary battery detected by the controller.
US09531210B2 Monitor and control module and method
A method and module for monitoring a voltage of a power cell, sampling and holding a voltage of the power cell, and balancing a voltage of the power cell. In accordance with an embodiment, an interface circuit is capable of operation in a plurality of operating modes. In accordance with another embodiment, the interface circuit is coupled to a filter section.
US09531208B2 Charging and communicating with battery operated toys
Methods and a system for the recharging of battery-operated devices, whereby the recharging process is made less burdensome and inconvenient to the users of the devices. Embodiments provide for incorporating recharging into the normal usage patterns for the devices using activities consistent with predetermined intended usage of the devices, thereby causing the user to perceive less inconvenience. Other embodiments provide for systematically detecting and wirelessly recharging devices, whereby the burden to the users may be reduced or entirely eliminated.
US09531206B2 Protective cover and protective cover set with wireless charging function
A protective cover cooperating with a wireless charging dock is provided. The protective cover includes a first cover and a second cover. An electronic device is disposed at the first cover and electrically connected thereto. The second cover is connected to the first cover and thus the second cover can cover the first cover. The second cover includes at least one folding line and at least one charging module, and the charging module receives the inducting power from the wireless charging dock. The second cover can be folded along the folding line to form a folding state. The charging module includes a state sensing module, a power compensating module and a control module. The charging module can adjust a power compensating value and transmit the power compensating value to the wireless charging dock.
US09531202B2 Battery management system and method for charging lithium-ion battery cells in an information handling system
A computer-implemented method enables capacity based pre-charging and age based permanent failure detection in a battery. The method comprises detecting, via a controller, a real time cell voltage for at least one cell in the battery. The controller determines if the real time cell voltage is less than a normal operating cell voltage. In response to the real time cell voltage being less than the normal operating cell voltage, a capacity based pre-charge value is calculated based on a full charge capacity and at least one cell parameter of the cell. A pre-charge time is calculated based on the capacity based pre-charge value. A pre-charge voltage is identified. The battery management controller is triggered to pre-charge the battery using the calculated pre-charge time and the identified pre-charge voltage.
US09531198B2 High permittivity low leakage capacitor and energy storing device
A method is provided for making a high permittivity dielectric material for use in capacitors. Several high permittivity materials in an organic nonconductive media with enhanced properties and methods for making the same are disclosed. A general method for the formation of thin films of some particular dielectric material is disclosed, wherein the use of organic polymers, shellac, silicone oil, and/or zein formulations are utilized to produce low conductivity dielectric coatings. Additionally, a method whereby the formation of certain transition metal salts as salt or oxide matrices is demonstrated at low temperatures utilizing mild reducing agents. Further, a circuit structure and associated method of operation for the recovery and regeneration of the leakage current from the long-term storage capacitors is provided in order to enhance the manufacturing yield and utility performance of such devices.
US09531188B2 False-trigger free power-rail ESD clamp protection circuit
A false-trigger free power-rail ESD clamp protection circuit includes an ESD impact detection component, a discharge transistor, a discharge transistor turn-on channel, and a discharge transistor shutoff channel. The circuit, in a smaller layout area, has very strong electrostatic charge discharge capability under ESD impact, little power leakage during normal power-up, and relatively strong false-trigger immunity capability for quick power-up.
US09531185B2 Current limiting control method for diode neutral-point-clamped three-level inverter and related circuit
The present disclosure discloses a current limiting control method for a diode neutral-point-clamped three-level inverter and a related circuit. When a current in switching tubes is lowered to a value not greater than a first preset current value, the current limiting control method for a diode neutral-point-clamped three-level inverter and the related circuit drive an inside switching tube of the switching tubes to be turned on; after a first delay time, drive another inside switching tube to be turned on; after a second delay time, control an inside switching tube to be turned off and the other inside switching tube to be normally turned on; and control all the switching tubes to be turned on or off according to a control time sequence of the diode neutral-point-clamped three-level inverter circuit.
US09531184B2 Systems and methods for protecting electrical wire connections from overheating
Systems and methods for protecting electrical wire connections from overheating are provided. In some embodiments, methods for protecting electrical wire connections from overheating are provided, the methods comprising: detecting a signal responsive to a temperature of an electrical wire connection using a temperature sensor; comparing the signal to a threshold; and disconnecting power to a circuit when the comparison indicates that the temperature is over a given value. In some embodiments, systems for protecting electrical wire connections from overheating are provided, the systems comprising: a temperature sensor that detects a signal responsive to a temperature of an electrical wire connection using a temperature sensor; an operational amplifier that compares the signal to a threshold; and a relay that disconnects power to a circuit when the comparison indicates that the temperature is over a given value.
US09531181B2 Current sensing circuit
A current sensing circuit comprises a first input terminal and a second input terminal for introducing a subject current from a device coupled between the first and second input terminals; a first amplifier having a first input node coupled to the first input terminal via a protection resistor, a second input node coupled to the second input terminal, and a first output node coupled to the first input node via a capacitor, wherein the first amplifier has a current sensing path for sensing the subject current and converting the subject current into an output voltage that changes with the subject current; and a protection circuit coupled between the first and second input nodes of the first amplifier, wherein the protection circuit is configured to draw a protection current from the first input terminal through the protection resistor to at least partially offset the subject current.
US09531176B2 Metallic floor box with non-metallic riser with flange
An in-floor electrical floor-box assembly includes a rectangular metallic housing and a non-metallic riser with integral flange assembly having a rectangular flange that mates with the rectangular housing and an integral cylindrical riser for providing access to the electrical components through a round cover and finish flange. A low-voltage divider assembly separates cables carrying different voltages within the riser to reduce interference between the cables and any one of a variety of sub-plates having different configurations for accommodating a variety of multi-service or single service electrical functionality can be incorporated with the box.
US09531175B2 Method and apparatus for an electrical box block bracket
An electrical box block bracket can include a face place and rotatable members extending from each of two opposing edges of the face plate. The face plate can also include a aperture providing a passageway through the face plate and sized and shaped to receive a mud ring and/or electrical junction box. Each rotatable member can be rotatable about an axis defined by the intersection between the face plate and the respective rotatable member. Each rotatable member can also include an adjustable tab disposed along the surface of the rotatable member. The adjustable tab can rotate from a first position aligned with the surface of the rotatable member to a second position at an angle to the surface of the rotatable member such that the tab can be folded over at least a portion of an outer wall or rib of a construction block.
US09531168B2 Arc resistant electrical enclosure
Electrical enclosures are provided that include arc resistant features designed to add structural strength for arc containment, to inhibit arc propagation, and/or to direct the release of pressure within and/or from the enclosure in order to provide arc resistant electrical enclosures. In general, the arc resistant features may be designed to provide enclosures where in the event of an arc fault, the doors and covers remain closed, parts are not ejected from the enclosure, holes are not produced in the enclosure, indicators located in close proximity to the enclosure do not ignite, and/or grounding connections remain effective. Further, the foregoing features may be designed to provide electrical enclosures that comply with industry guides and standards for arc resistant ratings.
US09531167B2 Device and method for connecting an RF generator to a coaxial conductor
The present disclosure presents a device and method for connecting an RF generator to a coaxial conductor. The device includes a substrate, a radio frequency generator on the substrate, and a coaxial conductor coupled to a first surface of the substrate. The coaxial conductor includes a conductive core and a conductive shield around the conductive core and is configured to transmit the radio frequency signal to a radiation device. The device includes a cap coupled to the substrate and extending from a second surface of the substrate opposite the first surface. The cap includes an outer wall and a center post. The outer wall is electrically connected to the conductive shield of the coaxial conductor and the center post is electrically connected to the conductive core of the coaxial conductor. An output pad of the radio frequency generator is electrically connected to the conductive core.
US09531165B2 Method for actuating a spark gap
A method for actuating a spark plug, in which the spark plug is assigned a first ignition coil and second ignition coil. Triggered by a start signal, the primary winding of the first ignition coil is charged, and the primary winding of the second ignition coil is charged with a delay D, for which 0≦D, by supplying a direct current, wherein, while each primary winding, is charged, the respective secondary winding is blocked; the primary current supplied to the primary windings is measured; after a period T, the primary winding of the first ignition coil is discharged, and with the delay D the primary winding of the second ignition coil is discharged; the secondary current flowing through the spark plug is measured; thereafter the primary windings of the first and second ignition coil start to be charged alternately when the secondary current falls below a threshold; the primary windings are discharged alternately when the primary current reaches an upper threshold; the above steps are repeated until the duration of discharge between two electrodes of the spark plug 1 reaches a predefined value Z.
US09531164B2 Optical device structure using GaN substrates for laser applications
An optical device includes a gallium nitride substrate member having an m-plane nonpolar crystalline surface region characterized by an orientation of about −2 degrees to about 2 degrees towards (000-1) and less than about 0.5 degrees towards (11-20). The device also has a laser stripe region formed overlying a portion of the m-plane nonpolar crystalline orientation surface region. A first cleaved c-face facet is provided on one end of the laser stripe region, and a second cleaved c-face facet is provided on the other end of the laser stripe region.
US09531163B2 Semiconductor laser diode
A semiconductor laser diode includes a substrate. A semiconductor layer sequence on the substrate has at least one active layer designed for generating laser light that is emitted along an emission direction during operation. At least one filter layer has a main extension plane that is parallel to a main extension plane of the active layer and that is designed to scatter and/or absorb light that propagates in the semiconductor layer sequence and/or the substrate in addition to the laser light.
US09531161B2 Light-emitting assembly having a semiconductor layer sequence having an active zone on a columnar structure
An assembly has a columnar structure arranged with one end on a substrate, wherein the structure is at least partly covered with a semiconductor layer structure having an active zone that generates electromagnetic radiation, the active zone has a band gap for a radiative recombination, and the band gap decreases along a longitudinal axis of the structure in a direction of a free end of the structure such that a diffusion of charge carriers in the direction of the free end of the structure and a radiative recombination of charge carrier pairs in the region of the free end of the structure are supported.
US09531160B2 Two-dimensional photonic crystal surface-emitting laser
A two-dimensional photonic crystal surface emitting laser has a laminated structure including: a two-dimensional photonic crystal (2DPC) layer in which refractive index distribution is formed by two-dimensionally arranging air holes in a plate-shaped base member; and an active layer for generating light with wavelength λL by receiving an injection of electric current. The two-dimensional photonic crystal surface emitting laser emits a laser beam in the direction of an inclination angle θ from normal to the 2DPC layer.
US09531159B2 Directional semiconductor waveguide coupler
An optical, directional coupler has a first input, a second input, a first output, and a second output. The coupler is made with a shoulder disposed on a substrate and a first ridge and a second ridge disposed on the shoulder. The first ridge extends from the first input to the first output. The second ridge extends from the second input to the second output. The shoulder, the first ridge, and the second ridge taper to provide coupling and are modified to select a coupling ratio.
US09531155B2 Switched radio frequency (RF) driver for tunable laser with multiple in-line sections
A tunable laser with multiple in-line sections generally includes a semiconductor laser body with a plurality of in-line laser sections each configured to be driven independently to generate laser light at a wavelength within a different respective wavelength range. The wavelength of the light generated in each of the laser sections may be tuned, in response to a temperature change, to a channel wavelength within the respective wavelength range. A switch module may be configured to couple a signal from a laser driver to a selected one of the plurality of in-line laser sections, wherein the signal modulates the laser light generated by the in-line laser section. The selected in-line section may be DC biased to a lasing state and the non-selected in-line sections may be DC biased to a non-lasing or transparent state.
US09531145B2 Branched electrical system
A branched electrical system is adapted for providing multiple users with access to high and/or low voltage electrical power in work areas or high density seating areas, such as stadium or theater seating, work rooms, lecture halls, and public transportation vehicles. The system includes a main line and a plurality of branch lines, each branch line having at least one high voltage or low voltage electrical receptacle that is accessible to a user located at the seating, such as for powering a portable electronic device. The branch lines may be coupled to the main line via a splice or other electrical-mechanical connection.
US09531142B2 Electrical connector and stacked electrical connector formed by the same
An electrical connector includes a first body, multiple first conducting terminals and multiple second conducting terminals received in the first body, a first fixing block, and a second fixing block. Each first conducting terminal has a first extending portion, and a first welding portion extending downward from the first extending portion. Each second conducting terminal has a second extending portion, and a second welding portion extending downward from the second extending portion. The first extending portions and the second extending portions are disposed in a front and back manner. The first extending portions are insert injection molded at the first fixing block. The second extending portions are insert injection molded at the second fixing block. The first fixing block and the second fixing block cooperatively position the first welding portions and the second welding portions. A stacked electrical connector formed by two or more of the electrical connectors.
US09531141B2 Electrical receptacle connector
An electrical receptacle connector includes an insulated housing, flexible terminals, and flat terminals. The insulated housing includes a base portion and a tongue portion. The flexible terminals and the flat terminals are held in the base portion and disposed at an upper surface of the tongue portion. The flat terminals are arranged in front of the flexible terminals and include two pairs of signal terminals and a ground terminal between the signal terminals. Each flat terminal includes a flat contact portion, a tail portion, and a body portion between the flat contact portion and the tail portion. The body portion of the ground terminal includes two first widening portions extended outward from two sides thereof. A first distance is defined between each first widening portion and the body portion of the corresponding nearest signal terminal. A second distance is defined between the two signal terminals for each pair thereof.
US09531139B2 Connector and connector connection structure
A connector includes a metal terminal part on which conductive wires exposed outside at an end of an electric cable are pressure-contacted; and a housing for accommodating a pressure-contact part A of the end of the electric cable and the metal terminal part. The housing 10 has an electric cable insertion hole, a wall of which is contactable with an outer circumferential surface of an insulating cover of the electric cable. The housing also has a filling space in communication with the electric cable insertion hole. The filling space is located in positional correspondence with the pressure-contact part A; and the filling space is filled with a filler such that the filler covers the pressure-contact part A.
US09531138B2 Plug connector assembly having supporting member to support internal printed circuit board
A plug connector assembly (1) includes: a mating member (10) for receiving a mating connector; a printed circuit board (20) electrically connected with the mating member; an outer shell (60) enclosing the printed circuit board; a light member mounted on the printed circuit board; and a light pipe (50) mounted on the printed circuit board to transmit light emitted from the light member to an outer side of the outer shell; wherein the outer shell comprises at least one supporting member (624) extending inwardly to support the printed circuit board in order to prevent the printed circuit board from movement during mounting the light pipe to the printed circuit board.
US09531135B2 Telecommunications jack with switchable circuit configurations
Telecommunications jacks and methods of their use and construction are described. One telecommunications jack is adapted to receive a plug, and includes a housing defining a port for receiving the plug, as well as first, second, third, fourth, fifth, sixth, seventh and eighth consecutively arranged contact springs adapted to make electrical contact with the plug when the plug is inserted into the port of the housing along a first axis. The jack includes first, second, third, fourth, fifth, sixth, seventh and eighth wire termination contacts for terminating wires to the jack, and a circuit board arrangement including first and second circuits, the circuit board arrangement including a circuit board moveable in a direction non-parallel with the first axis between first and second positions. In the first position the circuit board electrically connects contact springs to wire termination contacts in a first configuration, and in the second position the circuit board connects contact springs to wire termination contacts in a second configuration.
US09531127B2 Power feed connector
A power feed connector includes: a tubular case that has a front end opening portion being open at a front end in a central axis direction; a connector main body that is accommodated inside the tubular case and is slidable in the central axis direction; an operation lever portion that has a first end being disposed inside the tubular case; a link mechanism that is directly connected to the connector main body and the operation lever portion and converts a turning motion of the operation lever portion into a linear motion of the connector main body in the central axis direction; and a grip portion that is integrally provided with the tubular case and extends in a direction intersecting the central axis direction.
US09531122B2 Connector
The connector of the present invention includes a case 2 receiving passed through cables 9 and passed through a cylindrical member 8, a side surface of the case when aligned axially with the direction of insertion into the cylindrical member 8 having an outer peripheral surface portion 21 with a shape corresponding to the inner peripheral surface 81 of the cylindrical member 8, and an engaging surface portion 23 having an engaging piece 35 for engaging another connector and forming a space S for arranging the cables 9 between the engaging surface and the inner peripheral surface 81 of the cylindrical member 8.
US09531119B2 Connectors and methods of connecting devices with flexible sleeves
There is disclosed magnetic connectors and electronic devices including such connectors. A connector may include a magnet rotatable about at least one axis of the magnet; wherein the magnet rotates to magnetically engage a magnet of another connector to form an electrical connection between the two magnets. A connector may also include a cylindrical magnet to magnetically engage a magnet of another connector; and a sleeve wrapped around at least part of the magnet, the sleeve comprising a contact for forming an electrical connection with a contact on the other connector. A connector may be adapted for selective connection with other connectors. A connector may be adapted such that a moveable magnet may move between an engaged position proximate a contacting surface of the connector and a disengaged position recessed from a contacting surface, wherein the moveable magnet is biased to the disengaged position.
US09531118B2 Electrical power coupling with magnetic connections
An electrical power coupling includes a pair of power coupling parts, each having a base and a coupling portion that is movable relative to said base. Each coupling portion has first and second electrical contacts that are spaced laterally outboard, by respective first and second distances, from centers of the coupling portions. Magnetic elements attract the respective coupling portions to one another when the coupling portions are positioned closely to one another. Each coupling portion moves relative to its respective base to align the coupling portions with one another and establish electrical connections between the first electrical contacts and between the second electrical contacts. Optionally, at least two electrical contacts are arcuate or circular in shape.
US09531116B2 Electrical device having an explosion-proof plug-in connection
An electrical device has a plug-in connection device (15), which is used to open and close an electrical circuit (24). The plug-in connection device (15) contains at least two contact/mating-contact pairs (22, 23), which have different ignition protection types. At least one of the two contact/mating-contact pairs is designed to interrupt the current running through said contact/mating-contact pair without triggering an explosion. (Ignition protection type Ex d or Ex i.) The other contact/mating-contact pair (23) opens and closes in the currentless state. Therefore, the other contact/mating-contact pair can have a second ignition protection type, such as Ex e.
US09531111B2 Audio jack connector with a sealing assembly assembled on an insulative houseing
An audio jack connector including: an insulative housing including a mounting face, a receiving space, an insertion opening communicating with the receiving space, and a number of passageways extending from the mounting face along a bottom-to-up direction, a through hole defined in each of the passageways and communicating to the receiving space; a number of contacts retained in corresponding passageways and extending into the receiving space through the through holes; and a sealing assembly assembled on the mounting face, the sealing assembly including a gasket covering on the mounting face for sealing the passageways and a cover assembled with the gasket to press and hold the gasket, the gasket having a number of passing holes exposing a soldering end of each of the contacts.
US09531106B2 Connector mechanism and electronic device using the same
An electronic device comprises a case and a connector mechanism. The case comprises a bottom plate, a lateral plate and a pivoting base. The lateral plate is connected to the bottom plate, the lateral plate has an opening and the pivoting base is connected to the lateral plate. The connector mechanism comprises an electrical connector, a cover member and an elasticity-adjusting member. The electrical connector comprises an insulating base and a plurality of conductive terminals installed in the insulating base. A slot is formed in the insulating base and exposed to the opening. The cover member comprises a cover portion, a pivoting portion and an elastic portion all connected together, wherein the pivoting portion is positioned between the elastic portion and the cover portion while being disposed on the pivoting base.
US09531104B1 Joint connector
A joint connector includes a housing having a plurality of mounting passages into which a plurality of wires are horizontally inserted from the outside to the inside, and a fastening hole formed in the upper surface thereof and in communication with the mounting passages of the housing, a terminal inserted into the mounting passages of the housing and having a plurality of connection parts connected to an external circuit through the plurality of wires, and a holder vertically inserted into the fastening hole of the housing and having a plurality of fastening protrusions formed on a bottom surface thereof to fasten the terminal to the housing.
US09531103B2 Charging connector
A charging connector includes: a source-side terminal connected to a source side; an inner housing for receiving the source-side terminal; an intermediate terminal having a power source connection electrically connectable to and electrically disconnectable from the source-side terminal and an inlet connection electrically connectable to and electrically disconnectable from an inlet-side terminal connected to a side of a vehicle inlet; and a cassette housing that receives the intermediate terminal, is assembled to the inner housing, and is mateable with the vehicle inlet.
US09531101B2 Connector
The connector comprises a holding member and a contact which is held by the holding member. The contact has a fixed portion, a first spring portion and a second spring portion. The fixed portion is held by and fixed on the holding member. The first spring portion extends from the fixed portion. The first spring portion includes two pressed portions, a movable starting point and a movable end portion which is movable. When an inserting object is moved along a moving direction which is a forward direction or a rearward direction, the pressed portions are pressed by a press portion to be moved downward perpendicular to the moving direction. The inserting object is a card or a card adapter. The inserting object has the press portion. The second spring portion is provided with a free end and a contact point. When the inserting object is moved in the moving direction, the second spring portion is moved downward together with a movement of the movable starting point so that the inserting object is prevented from being brought into contact with the free end of the second spring portion.
US09531094B2 Receiving socket for receiving and making contact with an electronic module
The invention relates to a receiving socket for receiving and making contact with an electronic module (60) comprising an electronic circuit (70) which is electrically connected to a first contact tongue (80) and to a second contact tongue (90). The receiving socket comprises a first electrical contact area (22) for making contact with the first contact tongue (80) of the module, a second electrical contact area (32) for making contact with the second contact tongue (90) of the module and a contact element (40) which electrically connects the first contact area (22) to the second contact area (32) for the purpose of transferring an electrical signal when the module is removed. The first contact tongue (80) of the module can be received between the first electrical contact area (22) and the contact element (40). The second contact tongue (90) of the module can be received between the second electrical contact area (32) and the contact element (40).
US09531091B2 Cable connecting structure of battery pack
A cable connecting structure of a battery pack, the battery pack which is provided in a vehicle, the cable connecting structure includes: a plurality of cable side connectors which are provided at ends of a plurality of cables, respectively, and which are connected to the battery pack; and a plurality of battery pack side connectors to which the cable side connectors are detachably mounted, and which are arranged in parallel along a peripheral direction of a peripheral wall of the battery pack. In a state where the cable side connectors are mounted to the battery pack side connectors, portions of the cables which are respectively withdrawn from the cable side connectors are extended along the peripheral wall.
US09531088B2 Crimp terminal, connection structural body, and method of manufacturing connection structural body
A barrel portion which allows the pressure-bonding connection of an aluminum core wire exposed on a distal end of an insulated wire covered with an insulating cover is formed into a cylindrical shape by bending barrel portion corresponding portions of a terminal base material in a terminal developed state about a terminal axis. In abutting end portions where the barrel portion corresponding portions abut each other, a welded part which welds the end portions is formed along a long length direction of the insulated wire. The welded part is formed on an upper surface concave portion and a projecting portion where an amount of plastic deformation of a conductor pressure-bonding section generated along with the pressure-bonding of the conductor pressure-bonding section becomes larger compared to other portions in a circumferential direction of the conductor pressure-bonding section.
US09531082B2 Antenna arrangement
(EN)Antenna arrangement comprising at least two discrete antennas (1, 2) mechanically attached to each other to forma combined base station antenna (6), wherein at least two discrete antennas (1, 2) in said combined base station antenna (6) are located alongside each other, wherein a conducting element (10) is arranged between the alongside each other located discrete antennas (1, 2).
US09531081B2 Reflector antenna for a synthetic aperture radar
A reflector antenna for synthetic aperture radar, having a reflector including a reflector surface, a vertex, and an optical axis. The reflector antenna also as a plurality of antenna elements arranged side by side and in a row, for transmitting radar transmission signals and receiving radar reception signals produced from a reflection on a surface. The reflector is designed as a one-dimensional defocused reflector having two focal planes. The optical axis coincides with the line of inter-section of two imaginary planes extending at right angles to one another. The reflector has, in a first (X-) plane, a first (X-) focal plane that extends at right angles thereto and to the optical axis, and, in a second (Y-) plane, a second (Y-) focal plane which extends at right angles thereto and to the optical axis. The second (Y-) focal plane is at a greater distance from the vertex than the first (X-) focal plane.
US09531075B2 Antenna apparatus and communication system
An antenna apparatus can include a transmission medium that is positioned within layers of an antenna apparatus that are positioned adjacent to a first upper layer that is configured to include a signal receiving and transmission element (e.g. an antenna, patch antenna, etc.). The transmission medium can include or otherwise be connected to one or more resonators so that only a signal within a pre-selected band is passable through the transmission band. Any signal in a band outside of the pre-selected band may not be passable through the transmission medium due at least in part to the resonators. In some embodiments, the transmission medium may be part of a stripline or a microstrip. Embodiments of the apparatus may also be configured to block backward radiation emittable from the antenna to help prevent a body of a person near that device from absorbing such radiation.
US09531073B2 Communication terminal apparatus and antenna device
An antenna device which includes a coil conductor and a booster conductor. The coil conductor is defined by wound loop-shaped conductors and includes a first opening at a winding center and two ends connected to a feeding circuit. The booster conductor includes a coupling conductor portion and a frame-shaped radiation conductor portion. The coupling conductor portion includes a second opening overlapped at least partially by the first opening, is split in a portion thereof by a slit, and is electromagnetically coupled to the coil conductor. The frame-shaped radiation conductor portion includes a third opening and is connected to the coupling conductor portion.
US09531071B2 Antenna structures having resonating elements and parasitic elements within slots in conductive elements
Electronic devices may include radio-frequency transceiver circuitry and antenna structures. The antenna structures may include antenna resonating elements such as dual-band antenna resonating elements that resonate in first and second communications bands. The antenna structures may also contain parasitic antenna elements such as elements that are operative in only the first or second communications band and elements that are operative in both the first and second communications bands. The antenna resonating elements and parasitic elements may be mounted on a common dielectric carrier. The dielectric carrier may be mounted within a slot or other opening in a conductive element. The conductive element may be formed from conductive housing structures in an electronic device such as a portable computer. The portable computer may have a clutch barrel with a dielectric cover. The dielectric cover may overlap and cover the slot and the dielectric carrier.
US09531070B2 Extending beamforming capability of a coupled voltage controlled oscillator (VCO) array during local oscillator (LO) signal generation through accommodating differential coupling between VCOs thereof
A method includes implementing a coupled Voltage Controlled Oscillator (VCO) array with a number of VCOs, and mixing Local Oscillator (LO) signals generated through the number of VCOs of the coupled VCO array with signals from antenna elements of an antenna array to introduce differential phase shifts in signal paths coupled to the antenna elements during performing beamforming with the antenna array. The method also includes accommodating differential coupling between the VCOs to improve immunity to noise and/or interference during the beamforming compared to the VCOs accommodating single-ended coupling therebetween.
US09531063B2 Planar inverted-F antenna
The planar inverted-F antenna includes a first substrate made of a dielectric material, a grounding electrode disposed on a first surface of the first substrate; an emitting electrode disposed to be opposite to the grounding electrode so as to sandwich the first substrate, wherein the emitting electrode has an S-shape, and has a short-circuiting point short-circuited to the grounding electrode at an edge portion thereof, and a feed point at which power is fed and which is located away from the short-circuiting point by a distance at which the characteristic impedance of the planar inverted-F antenna for electric waves with a certain design wavelength has a certain value; and a second substrate disposed to cover the entire emitting electrode together with the first substrate and made of a dielectric material.
US09531061B2 Electronic device antenna with reduced lossy mode
An electronic device may be provided with an antenna. The antenna may have an antenna resonating element and an antenna ground. An adjustable inductor may be coupled between the antenna resonating element and the antenna ground. An antenna feed may have a positive feed terminal coupled to the antenna resonating element and a ground antenna feed coupled to the antenna ground. The adjustable inductor may have first and second inductors coupled to respective first and second ports of a switch. The switch may have a third port coupled to the antenna ground. A capacitor may have a first terminal coupled to ground and a second terminal coupled to the first inductor at the first port of the switch. An inductor may be coupled between the antenna resonating element and antenna ground at a location between the adjustable inductor and the antenna feed.
US09531060B2 Electronic device
According to one embodiment, an electronic device includes a housing, a first antenna, a second antenna, a distributor and a communication module. The first antenna is in a first region of the housing. The second antenna is in a second region of the housing. The distributor is configured to distribute a same signal to the first antenna and the second antenna. The communication module is configured to perform communication by using the first antenna when an antenna of an external device approaches the first region and to perform communication by using the second antenna when the antenna of the external device approaches the second region.
US09531057B2 Multi-part radio apparatus
An apparatus including an antenna; a first part including a first ground plane portion; a second part including a second ground plane portion; a first electrical connection between the first part and the second part; and a second electrical connection between the first ground plane portion and the second ground plane portion that includes a reactive component.
US09531056B2 Patch antenna and wireless communication device using the same
A patch antenna includes an irradiation plate, a grounding point and a feeding point. The irradiation plate has a long edge. The grounding point is located at the long edge. The feeding point is located at the long edge. The grounding point and the feeding point are symmetrical with respect to a center of the long edge.
US09531055B2 Removal of spurious microwave modes via flip-chip crossover
A coplanar waveguide device includes a coplanar waveguide structure disposed on a substrate, at least one qubit coupled to the coplanar waveguide structure and an add-on chip having a metallized trench, and disposed over the substrate.
US09531049B2 Systems and methods for radio frequency (RF) energy wave switching using asymmetrically wound ferrite circulator elements
Systems and methods for RF energy wave switching using asymmetrically wound ferrite circulator elements are provided. In one embodiment, a ferrite circulator waveguide switched system comprises: a plurality of ferrite circulator elements coupled together sequentially, the ferrite circulator elements including: a first ferrite circulator element that defines a first port of the switched system; a second ferrite circulator element that defines a second port of the switch system; and an asymmetrically wound ferrite circulator element coupled between the first and second ferrite circulator elements and to an isolation element; and a latch wire threaded through the first ferrite circulator element and the asymmetrically wound ferrite circulator element, wherein the latch wire is wound through the first ferrite circulator element and the asymmetrically wound ferrite circulator element such that a current pulse through the latch wire magnetizes both the first ferrite circulator element and the asymmetrically wound ferrite circulator element.
US09531047B2 Metal/oxygen battery with growth promoting structure
In one embodiment, an electrochemical cell includes a negative electrode, a porous separator adjacent to the negative electrode, and a positive electrode separated from the negative electrode by the porous separator, the positive electrode including a conductive matrix and a plurality of insulator particles extending from the conductive matrix.
US09531045B2 Battery cooler
A battery cooler includes at least one support plate and at least one structure plate coupled to the at least one support plate. The at least one structure plate includes a flow channel for receiving a fluid therein. A cross-section of the flow channel has a width greater than a height thereof. The flow channel includes a plurality of webs, wherein one of the webs is disposed adjacent another one of the webs in respect of a direction of flow of the fluid, and the webs decrease the cross-section of the flow channel.
US09531044B2 Battery having reduced condensate formation due to water separation
A battery includes an essentially airtight housing having an air-permeable opening for pressure compensation. The battery also includes a plurality of battery cells arranged in the housing. The battery also includes an active cooling device configured to cool the battery cells in the housing. The cooling device includes a coolant and a distributor block configured to distribute the coolant. The battery also includes an air duct integrated in the distributor block. The air duct is configured and arranged such that the air-permeable opening of the housing is connected to ambient air via the air duct.
US09531040B2 Battery system and method for evaluating battery system
A battery system includes: a secondary battery; a memory portion that stores information which includes a measurement frequency, a measurement temperature, and an initial limiting capacitance of one secondary battery; a temperature measuring section; a power supply section which applies an AC signal of 0.5 mHz to 10 mHz, to the secondary battery at 40° C. to 70° C.; a measuring portion which measures an impedance of the secondary battery by the AC signal; and a calculating portion that calculates the degree of degradation of the secondary battery.
US09531039B2 Battery management system for a battery cell with a pressure-sensitive film sensor
A battery management system is configured for use with a battery having at least one battery cell with a cell housing and an electrode winding arranged inside the cell housing. The battery management system includes a battery state detection mechanism. The electrode winding is covered at least partially by a pressure-sensitive film sensor. The battery state detection mechanism is configured to read in a measured value, provided by the pressure-sensitive film sensor, or a variable derived from this measured value. The battery state detection mechanism uses the measured value/variable as an evaluation parameter to determine the battery state. The battery state detection mechanism is configured to determine a swelling force from swelling of the electrode winding due to the state of charge thereof by using the measured value/variable. The swelling force is used to further determine the state of charge or state of health of the battery cell.
US09531036B2 Garnet-type ion conducting oxide, complex, lithium secondary battery, manufacturing method of garnet-type ion conducting oxide and manufacturing method of complex
An all-solid lithium secondary battery 20 includes a solid electrolyte layer 10 composed of a garnet-type oxide, a positive electrode 12 formed on one surface of the solid electrolyte layer 10 and a negative electrode 14 formed on the other surface of the solid electrolyte layer 10. This all-solid lithium secondary battery 20 includes an integrally sintered complex of the solid electrolyte layer 10 and the positive electrode active material layer 12a. This complex is obtained by integrally sintering a stacked structure of an active material layer and a solid electrolyte layer. The solid electrolyte layer includes: abase material mainly including a fundamental composition of Li7+X−Y(La3−x,Ax) (Zr2−Y,TY)O12, wherein A is one or more of Sr and Ca, T is one or more of Nb and Ta, and 0≦X≦1.0 and 0≦Y<0.75 are satisfied, as a main component; and an additive component including lithium borate and aluminum oxide.
US09531031B2 Bipolar battery assembly
The invention relates to an article comprising: a) one or more stacks of battery plates comprising one or more bipolar plates; b) located between each plate is a separator and a liquid electrolyte; further comprising one of more of the features: 1) c) the one or more stacks of battery plates having a plurality of channels passing transversely though the portion of the plates having the cathode and/or the anode deposited thereon; and d) i) one or more seals about the periphery of the channels which prevent the leakage of the liquid electrolyte into the channels, and/or posts located in one or more of the channels having on each end an overlapping portion that covers the channel and sealing surface on the outside of the monopolar plates adjacent to the holes for the transverse channels and applies pressure on the sealing surface of the monopolar plates.
US09531027B2 Method and apparatus for generating electrical power using sunlight and microorganisms
Systems and methods are presented for generating and storing electric power in which a microbial solar cell is provided in a sealed container with photosynthetic organisms that generate reactants of the microbial fuel cell and the products of the microbial fuel cell from sunlight received through the container.
US09531026B2 Process for producing fluorinated ion exchange resin fluid
To provide a process for forming a polymer electrolyte membrane having good durability and few wrinkles, a polymer electrolyte membrane capable of forming a catalyst layer, or a catalyst layer; a process for producing a fluorinated ion exchange resin fluid, or a paste for forming a catalyst layer, which can be used for such a forming process; and a process for producing a membrane/electrode assembly for a polymer electrolyte fuel cell having good durability and power generation properties. A fluorinated ion exchange resin fluid obtained by subjecting a powder or pellets of a fluorinated ion exchange resin having cation exchange groups to hydrogen peroxide treatment, followed by mixing with a solvent, is used.
US09531023B2 Exhaust state control device for fuel cell for mobile unit
An exhaust state control device for a fuel cell for a mobile unit includes an exhaust gas temperature sensor (17) that measures the temperature of exhaust gas in a discharge passage that discharges the exhaust gas from the main body of the fuel cell, and an ambient temperature sensor (19A) that measures the temperature of ambient air to which exhaust gas is to be discharged. If, based on the difference between the exhaust gas temperature and the ambient temperature, it is determined that white smoke is generated, it is determined whether a condition to reduce white smoke is satisfied. When a first condition is satisfied, a process to reduce white smoke is activated. When a second condition, which requires further reduction of white smoke than under the first condition, is satisfied, a process to suppress the generation of white smoke is activated.
US09531022B2 Fuel cell system and control method thereof
A fuel cell system comprises a fuel cell stack, a circulation flow path of a cooling medium, a pump provided in the circulation flow path, a supply-side temperature sensor provided to detect a supplied cooling medium temperature, a discharge-side temperature sensor provided to detect a discharged cooling medium temperature, and a cold-start controller configured to control a circulation volume of the cooling medium by the pump at a cold start of the fuel cell stack. The cold-start controller estimates a fuel cell internal temperature and selectively sets the circulation volume of the cooling medium between a reduced volume and a normal volume, based on a magnitude relationship between the internal temperature and the discharged cooling medium temperature. When the supplied cooling medium temperature becomes equal to the discharge cooling medium temperature after setting the circulation volume, the cold-start controller sets the circulation volume of the cooling medium to an increased volume (maximum circulation volume).
US09531020B2 Method of operating a heater
A method is provided for operating a heater including a heater housing extending along a heater axis; a plurality of fuel cell stack assemblies disposed within the heater housing along the heater axis and having a plurality of fuel cells which convert chemical energy from a fuel cell fuel into heat and electricity through a chemical reaction with a fuel cell oxidizing agent; and a plurality of combustors disposed within the heater housing along the heater axis. The method includes supplying a combustor fuel to the plurality of combustors, combusting the combustor fuel to produce a heated combustor exhaust when the fuel cell stack assemblies are substantially electrochemically inactive, and using the heated combustor exhaust to elevate the temperature of the fuel cell stack assemblies to be electrochemically active.
US09531017B2 Method of operating a fuel cell
The present invention relates to a method of determining the net water drag coefficient (rd) in a fuel cell. By measuring the velocity of the fluid stream at the outlet of the anode, rd can be determined. Real time monitoring and adjustments of the water balance of a fuel cell may be therefore achieved.
US09531014B2 Stainless steel for fuel cell separators
A stainless steel having a low surface contact resistance for fuel cell separators is provided. The stainless steel has a Cr content of 16 to 40 mass % or more. The stainless steel includes a region having a fine textured structure on its surface, and the area percentage of the region is 50% or more, preferably 80% or more. The region having a fine textured structure is a region which has a structure having depressed portions and raised portions at an average interval between depressed portions or raised portions of 20 nm or more and 150 nm or less when observed with a scanning electron microscope.
US09530997B2 Partition including buffering pad disposed on frame for pouch type secondary battery
A pouch type secondary battery includes a pouch having a receiving part receiving an electrolyte therein and a sealing part formed by sealing an outer circumference of the receiving part in order to seal the receiving part and an electrode tab connected to one side of the pouch so as to be protruded, and at least one partition provided between at least two pouch type secondary batteries. The partition comprises: an electrode tab supporting part supporting the electrode tab; a frame extended from the electrode tab supporting part, supporting the sealing part, and having the receiving part inserted thereinto; and a buffering pad attached to an inner side of the frame at which the receiving part is seated so as to be disposed between the frame and the receiving part. The buffering pad has a cross-sectional shape in which one side of a rectangular frame is opened.
US09530991B2 Viscous sealing glass compositions for solid oxide fuel cells
A sealant for forming a seal between at least two solid oxide fuel cell components wherein the sealant comprises a glass material comprising B2O3 as a principal glass former, BaO, and other components and wherein the glass material is substantially alkali-free and contains less than 30% crystalline material.
US09530990B2 Plasma curing of PECVD HMDSO film for OLED applications
Methods for forming an OLED device are described. An encapsulation layer having a buffer layer sandwiched between barrier layers is deposited over an OLED structure. The buffer layer is deposited on the first barrier layer and is cured with a fluorine-containing plasma at a temperature less than 100 degrees Celsius. The second barrier layer is then deposited on the buffer layer.
US09530989B2 Organic light emitting diode display and manufacturing method thereof
Disclosed are an organic light emitting diode display and a manufacturing method thereof, and more particularly, an organic light emitting diode display capable of minimizing resistance increase of a second electrode and improving light extraction efficiency at the same time by forming a separate reflector, and a manufacturing method thereof.
US09530985B2 Method for producing an organic el display device
A method includes: forming, in a first substrate, a display area in which a plurality of pixels including an organic EL light-emitting layer are arrayed; forming, in a second substrate, a plurality of opening areas respectively located in correspondence with the plurality of pixels and a light-blocking area that demarcates the plurality of opening areas; providing a dam material such that the dam material encloses the display area; dripping a filler material to an area enclosed by the dam material; and attaching the first substrate and the second substrate to each other, and fusing together dripped portions of the filler material, thereby bonding the both substrates to each other. The both substrates are attached to each other while being positionally aligned such that borders between the dripped portions of the filler material that is generated by the fusion are located in an area corresponding to the light-blocking area.
US09530982B2 Packaging method and packaging structure of substrate
The present invention provides a packaging method of a substrate and a packaging structure. The method includes: (1) providing a substrate and a packaging cover plate; (2) coating a loop of first enclosing resin on the packaging cover plate; (3) coating a loop of second enclosing resin on an external circumferential area of the first enclosing resin on the packaging cover plate; (4) laminating the packaging cover plate and the substrate together; (5) applying ultraviolet (UV) light to irradiate the first enclosing resin and the second enclosing resin for curing; and (6) carrying out cutting operations on the substrate and the packaging cover plate to remove portions of the substrate and the packaging cover plate that contact the second enclosing resin so as to achieve packaging of the substrate with the packaging cover plate.
US09530981B2 Sealing method for flat panel display device
A method of sealing a flat panel display device by using laser and a charge-coupled device (CCD) camera. The sealing method includes applying a sealant around a light-emitting unit on a substrate and covering above the light-emitting unit with the encapsulating substrate; irradiating light onto a sealant area to harden the sealant for the first time (first hardening); monitoring a hardening state of the sealant; and further irradiating light onto a region of the sealant in a bad hardening state based on the monitoring result to harden the region of the sealant in the bad hardening state (second hardening). The sealing method may prevent a sealing flaw caused from insufficient laser irradiation dosage, and thus ensure a more stable sealed structure. This may improve quality of the flat-plan-display-device.
US09530979B2 Substrate for organic electronic device
The present application relates to a substrate for an organic electronic device (OED), an organic electronic device, a method of manufacturing the substrate or OED and lighting device. The substrate for an OED of the present application may be improved in durability by preventing penetration of external materials such as moisture or oxygen, and thus an OED having excellent light extraction efficiency may be formed. Also, since the substrate may be stably attached to an encapsulating structure sealing the OED, the device may have excellent durability with respect to abrasion of an electrode layer or pressure applied from an external environment. In addition, a surface hardness of an external terminal of the OED may be maintained at a suitable level.
US09530977B2 Tunneling nanotube field effect transistor and manufacturing method thereof
A tunneling nanotube field effect transistor includes: an insulating layer disposed on a substrate; a gate electrode disposed on the insulating layer; a source electrode and a drain electrode disposed on the insulating layer on respective adjacent sides of the gate electrode; and a carbon nanotube extending through the gate electrode, wherein the carbon nanotube is supported by the source electrode, the gate electrode, and the drain electrode, wherein the carbon nanotube includes a first portion adjacent to the source electrode and a second portion adjacent to the drain electrode, and wherein the source electrode and the gate electrode are spaced apart by an exposed section of the first portion, and the drain electrode and the gate electrode are spaced apart by an exposed section of the second portion.
US09530973B2 Organometallic complex and organic light-emitting diode including the same
Embodiments are directed to an organometallic complex and an organic light-emitting diode including the organometallic complex. The organometallic complex may be represented by Formula 1:
US09530968B2 Light emitting element and light emitting device
The present invention provides a light emitting element whose driving voltage is low, and a light emitting element having longer lifetime. Moreover, the invention provides a light emitting element with high manufacturing yield. A light emitting element has a layer containing an organic material and an inorganic material, wherein activation energy of electrical conductivity of the layer containing the organic material and the inorganic material, is 0.01 eV or more and less than 0.30 eV. Preferably, the activation energy of electrical conductivity of the layer containing the organic material and the inorganic material, is 0.01 eV or more and less than 0.26 eV. More preferably, the activation energy of the electrical conductivity of the layer containing the organic material and the inorganic material, is 0.01 eV or more and less than 0.20 eV.
US09530964B2 Method of manufacturing display and apparatus for manufacturing the display for the same
In a method of manufacturing a display, the method includes: forming a display device on a substrate attached to a first surface of a carrier; arranging, on a second surface of the carrier, a shield that corresponds to at least a portion of edge areas of the substrate and comprises non-transparent shielding areas; and irradiating light onto the second surface of the carrier to separate a portion of the substrate from the carrier.
US09530960B2 Memory device and manufacturing method therefor
According to one embodiment, a memory device includes a substrate, a conductive wire provided above the substrate to extend in a first direction and including an end portion decreases in width toward a distal end, and a contact connected to the conductive wire at least a side surface of the end portion. The end portion includes, in the contact, a first portion having a shortest distance from an outer peripheral surface of the contact and a second portion extending from the first portion and having a distance from the outer peripheral surface of the contact longer than the shortest distance.
US09530951B2 Optoelectronic device
A method for producing an optoelectronic device comprises steps for providing a package with a first surface and a second surface, wherein an electrically conductive chip carrier is embedded in the package and is accessible at the first surface and at the second surface, and for applying an insulation layer on the second surface of the package by means of aerosol deposition.
US09530949B2 Bonding LED die to lead frame strips
In one embodiment, an LED bulb includes a plurality of metal lead frame strips, including at least a first strip, a second strip, and a third strip. First LED dies have their bottom electrodes electrically and thermally connected to a top surface of the first strip. Second LED dies have their bottom electrodes electrically and thermally connected to a top surface of the second strip. The top electrodes of the first LED dies are wire bonded to the second strip, and the top electrodes of the second LED dies are wire bonded to the third strip to connect the first LED dies and second LED dies in series and parallel. The strips are then bent to cause the LED dies to face different directions to obtain a wide emission pattern in a small space. The strips are then enclosed in a thermally conductive bulb having electrical leads.
US09530948B2 Light emitting device having multi-layered electrode structure
A light-emitting device, comprising: a substrate; a semiconductor stacking layer comprising a first type semiconductor layer on the substrate, an active layer on the first semiconductor layer, and a second semiconductor layer on the active layer; and an electrode structure on the second semiconductor layer, wherein the electrode structure comprises a bonding layer, a conductive layer, and a first barrier layer between the bonding layer and the conductive layer; wherein the conductive layer has higher standard oxidation potential than that of the bonding layer.
US09530946B2 Light emitting diode
A siloxane compound comprises a plurality of siloxane repeating units and at least a portion of the siloxane repeating units are cyclosiloxane repeating units conforming to a specified structure. A process for producing such siloxane compounds is also provided. A process and kit for producing a cross-linked silicone polymer using the described siloxane compounds is also provided. A light emitting diode (LED) comprises an encapsulant, and the encapsulant comprises a cross-linked silicone polymer produced from the described siloxane compounds.
US09530943B2 LED emitter packages with high CRI
A color-tunable LED emitter with high CRI can be made by mounting multiple LED chips onto a ceramic substrate that has been patterned with metal contacts and paths so as to connect the LED chips into multiple independently addressable LED groups. Each LED group can produce light of a different color, allowing the color of the emitter to be tuned by adjusting the relative amount of operating current supplied to each LED group. At least some of the LED groups include LEDs coated with a broad spectrum phosphor that can reduce the sharpness of spectral peaks, thereby improving CRI and particular components of CRI, such as R9.
US09530942B2 Slim LED package
Disclosed herein is a slim LED package. The slim LED package includes first and second lead frames separated from each other, a chip mounting recess formed on one upper surface region of the first lead frame by reducing a thickness of the one upper surface region below other upper surface regions of the first lead frame, an LED chip mounted on a bottom surface of the chip mounting recess and connected with the second lead frame via a bonding wire, and a transparent encapsulation material protecting the LED chip while supporting the first and second lead frames.
US09530937B2 Light-emitting device, light-emitting device package, and light unit
A light-emitting device, according to one embodiment, comprises: a light-emitting structure comprising a first conductive semiconductor layer, an active layer which is underneath the first conductive semiconductor layer, and a second conductive semiconductor layer which is underneath the active layer; a reflective electrode which is arranged under the light-emitting structure; a first metal layer which is arranged under the reflective electrode and is electrically connected to the second conductive semiconductor layer; a second metal layer which is arranged under the reflective electrode and is insulated from the first metal layer; and a contact portion for electrically connecting the second metal layer and the first conductive semiconductor layer.
US09530935B2 Method for fabricating a plurality of opto-electronic semiconductor chips, and opto-electronic semiconductor chip
A method for fabricating optoelectronic semiconductor chips and optoelectronic semiconductor chips are disclosed. In embodiments the method comprises depositing a semiconductor layer sequence having an active, the active region being arranged between a first semiconductor layer and a second semiconductor layer on a growth substrate, attaching the semiconductor layer sequence to a carrier and forming a plurality of recesses extending through the carrier, the second semiconductor layer and the active region into the first semiconductor layer. The method further comprises forming first contacts on a first main surface of the carrier, the first main surface facing away from the semiconductor layer sequence, wherein the first contacts are electrically conductively connected to the first semiconductor layer in the region of the recesses and singulating the carrier and the semiconductor layer sequence into the plurality of optoelectronic semiconductor chips, wherein each semiconductor chip has at least one recess.
US09530934B1 Light-emitting device
A light-emitting device includes a semiconductor stack; a pad electrode comprising a periphery disposed on the semiconductor stack; and a finger electrode connected to the pad electrode, wherein the finger electrode includes a first portion extended from the periphery of the pad electrode and a second portion away from the pad electrode, the first portion includes a first side and a second side, the first side is opposite to the second side, the first side comprises a first arc having a first curvature radius, and the first curvature radius is larger than 10 μm.
US09530931B2 Light-emitting semiconductor chip
A semiconductor chip includes a semiconductor body with a semiconductor layer sequence. An active region intended for generating radiation is arranged between an n-conductive multilayer structure and a p-conductive semiconductor layer. A doping profile is formed in the n-conductive multilayer structure which includes at least one doping peak.
US09530930B2 Method of fabricating semiconductor devices
Vertical high power LEDs are the technological choice for the application of general lighting due to their advantages of high efficiency and capability of handling high power. However, the technologies of vertical LED fabrication reported so far involve the wafer-level metal substrate substitution which may cause large stress due to the mismatch between metal substrate and LED layer. Moreover, the metal substrate has to be diced to separate LED dies which may cause metal contamination and thus increase the leakage current. These factors will lower the yield of LED production and increase the cost as well. The present invention is to disclose a novel method for the fabrication of GaN vertical high power LEDs and/or a novel method for the fabrication of GaN vertical high power LEDs which is compatible to mass production conditions. The novelty of the invention is that the island metal plating is conducted with the help of pattern formation techniques. Due to the small area of the islands, the stress generated between LED layer and metal islands is much less significant. Furthermore, due to the island metal plating and through the application of temporary supporting carriers the LED dies will be separated at the end of the fabrication process automatically or simply by applying slight mechanical stress or stretching the adhesive tape. This advantage avoids the metal dicing step and reduces the possibility of metal contamination and leakage current generation. Therefore, high yield and low cost will be realized using this novel method in LED production.
US09530928B2 Semiconductor nanocrystal probes for biological applications and process for making and using such probes
A semiconductor nanocrystal compound and probe are described. The compound is capable of linking to one or more affinity molecules. The compound comprises (1) one or more semiconductor nanocrystals capable of, in response to exposure to a first energy, providing a second energy, and (2) one or more linking agents, having a first portion linked to the one or more semiconductor nanocrystals and a second portion capable of linking to one or more affinity molecules. One or more semiconductor nanocrystal compounds are linked to one or more affinity molecules to form a semiconductor nanocrystal probe capable of bonding with one or more detectable substances in a material being analyzed, and capable of, in response to exposure to a first energy, providing a second energy. Also described are processes for respectively: making the semiconductor nanocrystal compound; making the semiconductor nanocrystal probe; and treating materials with the probe.
US09530927B2 Light emitting devices with built-in chromaticity conversion and methods of manufacturing
Various embodiments of light emitting devices with built-in chromaticity conversion and associated methods of manufacturing are described herein. In one embodiment, a method for manufacturing a light emitting device includes forming a first semiconductor material, an active region, and a second semiconductor material on a substrate material in sequence, the active region being configured to produce a first emission. A conversion material is then formed on the second semiconductor material. The conversion material has a crystalline structure and is configured to produce a second emission. The method further includes adjusting a characteristic of the conversion material such that a combination of the first and second emission has a chromaticity at least approximating a target chromaticity of the light emitting device.
US09530926B2 Automated flexible solar cell fabrication and interconnection utilizing rolls expanded metallic mesh
A method for forming photovoltaic cells comprises providing a first roll of a photovoltaic material and a second roll of an expanded metallic mesh. The photovoltaic material comprises a photoactive material adjacent to a flexible substrate, and the expanded metallic mesh comprises a plurality of openings. Next, an electrically insulating material is provided adjacent to an edge portion of the photovoltaic material. The photovoltaic material from the first roll can then be brought in proximity to the expanded mesh from the second roll to form a nascent photovoltaic cell. The electrically insulating material can be disposed between the expanded metallic mesh and the photovoltaic material. Next, the nascent photovoltaic cell is cut into individual sections to form a plurality of photovoltaic cells.
US09530924B2 Method of manufacturing solar cell module
An aspect of the invention is a method of manufacturing a solar cell module in which wiring members are electrically connected to front and back electrodes on front and back sides of a solar cell with resin adhesion films. The total area of the front electrode is smaller than that of the back electrode. The method includes: arranging the resin adhesion films on the front and back electrodes; arranging a first cushion sheet and a lower press member below the lower resin adhesion film and arranging a second cushion sheet being thicker than the first cushion sheet and an upper press member above the upper resin adhesion film; pressing the press members against each other thereby bonding the resin adhesion films to the solar cell; and releasing the pressure to the press members and moving the first and second cushion sheets away from the solar cell.
US09530923B2 Ion implantation of dopants for forming spatially located diffusion regions of solar cells
Diffusion regions of a solar cell are formed using a blanket layer of film that is doped with dopants of a first conductivity type. Dopants of a second conductivity type are implanted in select regions of the blanket layer of film to form dopant source regions of the second conductivity type. Diffusion regions of the solar cell are formed by diffusing dopants of the first conductivity type and dopants of the second conductivity type from the blanket layer of film into an underlying silicon material. The blanket layer of film may be a P-type dopant source layer doped with boron, with phosphorus being implanted in select regions of the P-type dopant source layer to form N-type dopant source regions in the P-type dopant source layer.
US09530922B2 Overvoltage protection components in an optoelectronic circuit on SOI
An overvoltage protection component may be in a SOI layer, a portion of the SOI layer forming the core of an optical waveguide. This component may be made of semiconductor regions of different doping types and/or levels, at least one of these regions corresponding to at least a portion of the waveguide core.
US09530917B2 Polyester film, solar cell backsheet, and solar cell
An object of the present invention is to provide a polyester film whose wet heat resistance is not reduced even when incorporated into a solar cell backsheet or solar cell. The polyester film according to the present invention has a peak count SPc_L (400 nm) of 100 to 700 and a peak count SPc_H (4,000 nm) of not more than 10 on at least one surface, the polyester film having an amount of terminal carboxyl groups of 0 to 20 eq/ton.
US09530913B2 Solar cell
Provided is a solar cell having improved photoelectric conversion efficiency. The solar cell (1) contains: a substrate (10) comprising a semiconductor material having one type of conductivity; a first semiconductor layer (12n) having the one type of conductivity; and a second semiconductor layer (17n) having the one type of conductivity. The first semiconductor layer (12n) is arranged on one main surface of the substrate (10). The second semiconductor layer (17n) is arranged on the other main surface of the substrate (10). The solar cell (1) is configured such that the strength of the electric field formed by the second semiconductor layer (17n) is greater than the strength of the electric field formed by the first semiconductor layer (12n).
US09530912B2 Three-dimensional patterning methods and related devices
Three-dimensional patterning methods of a three-dimensional microstructure, such as a semiconductor wire array, are described, in conjunction with etching and/or deposition steps to pattern the three-dimensional microstructure.
US09530911B2 Solar cell structures for improved current generation and collection
In one aspect, optoelectronic devices are described herein. In some implementations, an optoelectronic device comprises a photovoltaic cell. The photovoltaic cell comprises a space-charge region, a quasi-neutral region, and a low bandgap absorber region (LBAR) layer or an improved transport (IT) layer at least partially positioned in the quasi-neutral region of the cell.
US09530908B2 Hybrid vapor phase-solution phase growth techniques for improved CZT(S,Se) photovoltaic device performance
A hybrid vapor phase-solution phase CZT(S,Se) growth technique is provided. In one aspect, a method of forming a kesterite absorber material on a substrate includes the steps of: depositing a layer of a first kesterite material on the substrate using a vapor phase deposition process, wherein the first kesterite material includes Cu, Zn, Sn, and at least one of S and Se; annealing the first kesterite material to crystallize the first kesterite material; and depositing a layer of a second kesterite material on a side of the first kesterite material opposite the substrate using a solution phase deposition process, wherein the second kesterite material includes Cu, Zn, Sn, and at least one of S and Se, wherein the first kesterite material and the second kesterite material form a multi-layer stack of the absorber material on the substrate. A photovoltaic device and method of formation thereof are also provided.
US09530907B2 Optical module and method of manufacturing optical module
An optical module includes an optical semiconductor device and a stem including a lead terminal configured to perform at least one of transmitting an electric signal to the optical semiconductor device or transmitting an electric signal output from the optical semiconductor device. The optical module also includes a substrate having a ground layer, a first opening through which the lead terminal passes, and a connecting portion configured to electrically connect the stem and the ground layer. The connecting portion is formed on one of an edge portion of the substrate and a surface of the substrate on a side on which the substrate is arranged on the stem.
US09530905B2 Microstructure enhanced absorption photosensitive devices
Techniques for enhancing the absorption of photons in semiconductors with the use of microstructures are described. The microstructures, such as holes, effectively increase the absorption of the photons. Using microstructures for absorption enhancement for silicon photodiodes and silicon avalanche photodiodes can result in bandwidths in excess of 10 Gb/s at photons with wavelengths of 850 nm, and with quantum efficiencies of approximately 90% or more. Their thickness dimensions allow them to be conveniently integrated on the same Si chip with CMOS, BiCMOS, and other electronics, with resulting packaging benefits and reduced capacitance and thus higher speeds.
US09530901B2 Decoupling finFET capacitors
A semiconductor device including field-effect transistors (finFETs) and fin capacitors are formed on a silicon substrate. The fin capacitors include silicon fins, one or more electrical conductors between the silicon fins, and insulating material between the silicon fins and the one or more electrical conductors. The fin capacitors may also include insulating material between the one or more electrical conductors and underlying semiconductor material.
US09530900B1 Schottky diode and method for manufacturing the same
A Schottky diode is provided, which includes a well of a first conductive type and a lightly doped region of a second conductive type on the well, wherein the first conductive type is opposite to the second conductive type. The Schottky diode includes a heavily doped region of the second conductive type on the well, and a gate structure on a part of the lightly doped region. The gate structure includes a gate electrode and a gate dielectric layer. The lightly doped region not covered by the gate structure and the heavily doped region are disposed at two opposite sides of the gate structure, respectively. The Schottky diode includes a first contact electrically connecting the heavily doped region and a first electrode, a second contact electrically connecting the gate electrode and a second electrode, and a third contact electrically connecting the lightly doped region and the second electrode.
US09530899B2 Semiconductor memory device and method of manufacturing the same
A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes insulation layers and gate electrodes alternately stacked on a substrate, a vertical channel vertically passing through the insulation layers and the gate electrodes, and a threshold voltage controlling insulation layer, a tunnel insulation layer and a charge storage layer disposed between the vertical channel and the gate electrodes, wherein the threshold voltage controlling insulation layer is disposed between the charge storage layer and the vertical channel and including a material configured to suppress an inversion layer from being formed in the vertical channel.
US09530896B2 Display device using an oxide semiconductor
Provided are a reliable high performance thin film transistor and a reliable high performance display device. The display device has: a gate electrode which is formed on a substrate; a gate insulating film which is formed to cover the substrate and the gate electrode; an oxide semiconductor layer which is formed on the gate electrode through the gate insulating film; a channel protective layer which is in contact with the oxide semiconductor layer and formed on the oxide semiconductor layer; and source/drain electrodes which are electrically connected to the oxide semiconductor layer and formed to cover the oxide semiconductor layer. A metal oxide layer is formed on an upper part of the channel protective layer. The source/drain electrodes are formed to be divided apart on the channel protective layer and the metal oxide layer.
US09530895B2 Semiconductor device
To suppress a decrease in on-state current in a semiconductor device including an oxide semiconductor. A semiconductor device includes an insulating film containing silicon, an oxide semiconductor film over the insulating film, a gate insulating film containing silicon over the oxide semiconductor film, a gate electrode which is over the gate insulating film and overlaps with at least the oxide semiconductor film, and a source electrode and a drain electrode which are electrically connected to the oxide semiconductor film. In the semiconductor device, the oxide semiconductor film which overlaps with at least the gate electrode includes a region in which a concentration of silicon distributed from an interface with the insulating film is lower than or equal to 1.1 at. %. In addition, a concentration of silicon contained in a remaining portion of the oxide semiconductor film except the region is lower than the concentration of silicon contained in the region.
US09530894B2 Semiconductor device
A semiconductor device including an oxide semiconductor in which on-state current is high is provided. The semiconductor device includes a first transistor provided in a driver circuit portion and a second transistor provided in a pixel portion; the first transistor and the second transistor have different structures. Furthermore, the first transistor and the second transistor are transistors having a top-gate structure. In an oxide semiconductor film of each of the transistors, an impurity element is contained in regions which do not overlap with a gate electrode. The regions of the oxide semiconductor film which contain the impurity element function as low-resistance regions. Furthermore, the regions of the oxide semiconductor film which contain the impurity element are in contact with a film containing hydrogen. The first transistor provided in the driver circuit portion includes two gate electrodes between which the oxide semiconductor film is provided.
US09530888B2 MOCVD growth of highly mismatched III-V CMOS channel materials on silicon substrates
Embodiments of the present disclosure generally relate to a semiconductor device including layers of group III-V semiconductor materials. In one embodiment, the semiconductor device includes a phosphorous containing layer deposited on a silicon substrate, wherein a lattice mismatch between the phosphorous containing layer and the silicon substrate is less than 5%, a group III-V compound nucleation layer deposited on the phosphorous containing layer at a first temperature, the group III-V compound nucleation layer having a first thickness, a group III-V compound transition layer deposited on the group III-V compound nucleation layer at a second temperature higher than the first temperature, the group III-V compound transition layer having a second thickness larger than the first thickness, and the group III-V compound nucleation layer is different from the group III-V compound transition layer, and an active layer deposited on the group III-V compound transition layer.
US09530883B2 Insulated gate semiconductor device having a shield electrode structure and method
A semiconductor device includes a semiconductor region with a charge balance region on a junction blocking region, which has a lower doping concentration. A trench structure having an insulated shield electrode and an insulated gate electrode is provided in the semiconductor region. The semiconductor device further includes one or more features configured to improve operating performance. The features include terminating the trench structure in the junction blocking region, providing a localized doped region adjoining a lower surface of a body region and spaced apart from the trench structure, disposing a notch proximate to the lower surface of the body region, and/or configuring the insulated shield electrode to have a wide portion adjoining a narrow portion.
US09530880B2 DMOS transistor with trench schottky diode
A DMOS transistor integrates a trench Schottky diode into the body contact of the transistor where the body region surrounding the Schottky metal layer forms a guard ring for the Schottky diode.
US09530879B2 Semiconductor device and field effect transistor with controllable threshold voltage
A semiconductor device including a field effect transistor including a substrate, a lower barrier layer provided on the substrate, a channel layer provided on the lower barrier layer, an electron supplying layer provided on the channel layer, a source electrode and a drain electrode provided on the electron layer, and a gate electrode provided between the source electrode and the drain electrode. The lower barrier layer includes a composition of In1-zAlzN (0≦z≦1). The channel layer includes a composition of AlxGa1-xN (0≦x≦1). A recess is provided in a region between the source electrode and the drain electrode, wherein the recess goes through the electron supplying layer to a depth that exposes the channel layer, and the gate electrode is disposed on a gate insulating film that covers a bottom surface and an inner wall surface of the recess.
US09530877B2 Enhancement mode III-nitride transistor
According to one embodiment, a III-nitride transistor includes a conduction channel formed between first and second III-nitride bodies, the conduction channel including a two-dimensional electron gas. The transistor also includes at least one gate dielectric layer having a charge confined within to cause an interrupted region of the conduction channel and a gate electrode operable to restore the interrupted region of the conduction channel. The transistor can be an enhancement mode transistor. In one embodiment, the gate dielectric layer is a silicon nitride layer. In another embodiment, the at least one gate dielectric layer is a silicon oxide layer. The charge can be ion implanted into the at least one gate dielectric layer. The at least one gate dielectric layer can also be grown with the charge.
US09530875B2 High-voltage vertical power component
A vertical power component includes a silicon substrate of a first conductivity type with a well of the second conductivity type on a lower surface of the substrate. The first well is bordered at a component periphery with an insulating porous silicon ring. An upper surface of the porous silicon ring is only in contact with the substrate of the first conductivity type. The insulating porous silicon ring penetrates into the substrate down to a depth greater than a thickness of the well.
US09530872B2 Semiconductor element and method for manufacturing the same
An object is to provide a thin film transistor and a method for manufacturing the thin film transistor including an oxide semiconductor with a controlled threshold voltage, high operation speed, a relatively easy manufacturing process, and sufficient reliability. An impurity having influence on carrier concentration in the oxide semiconductor layer, such as a hydrogen atom or a compound containing a hydrogen atom such as H2O, may be eliminated. An oxide insulating layer containing a large number of defects such as dangling bonds may be formed in contact with the oxide semiconductor layer, such that the impurity diffuses into the oxide insulating layer and the impurity concentration in the oxide semiconductor layer is reduced. The oxide semiconductor layer or the oxide insulating layer in contact with the oxide semiconductor layer may be formed in a deposition chamber which is evacuated with use of a cryopump whereby the impurity concentration is reduced.
US09530871B1 Method for fabricating a semiconductor device
A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a fin-shaped structure thereon; forming an epitaxial layer on the fin-shaped structure; forming a first contact etch stop layer (CESL) on the epitaxial layer; forming a source/drain region in the epitaxial layer; and forming a second CESL on the first CESL.
US09530869B2 Methods of forming embedded source/drain regions on finFET devices
One illustrative method disclosed herein includes, among other things, forming a layer of insulating material in the source/drain regions of the device, wherein the layer of insulating material has an upper surface that is substantially planar with an upper surface of a gate cap layer, recessing the layer of insulating material such that its recessed upper surface exposes a surface of the fin, performing another etching process to remove at least a portion of the fin and thereby define a recessed fin trench positioned above the recessed fin, and forming an epitaxial semiconductor material that is at least partially positioned in the recessed fin trench.
US09530867B2 Method for manufacturing a super-junction structures having implanted regions surrounding an N epitaxial layer in deep trench
A method for manufacturing a super junction trench MOSFET by growing a first epitaxial layer of a first conductivity type upon a heavily doped substrate layer of a first conductivity type; forming a deep trench mask covering a top surface of the first epitaxial layer; applying a trench mask to form a deep trench extending into the substrate layer by successively dry oxide etch and dry silicon etch; and carrying out angle ion implantations of the first conductivity type dopant and driving-in to form a first type column regions with column shape within the first epitaxial layer; and carrying out angle ion implantations of a second conductivity type dopant and diffusion to form a second type column regions with column shape adjacent to sidewalls of the deep trench, in parallel with and surrounding the first type column regions; and removing the hard mask.
US09530863B1 Methods of forming vertical transistor devices with self-aligned replacement gate structures
One illustrative method disclosed herein includes, among other things, forming a vertically oriented channel semiconductor structure, forming a layer of a bottom spacer material around the vertically oriented channel semiconductor structure and forming a sacrificial material layer above the layer of a bottom spacer material. In this example, the method further includes forming a sidewall spacer adjacent the vertically oriented channel semiconductor structure and above an upper surface of the sacrificial material layer, removing the sacrificial material layer so as to define a replacement gate cavity between a bottom surface of the sidewall spacer and the layer of a bottom spacer material, and forming a replacement gate structure in the replacement gate cavity.
US09530862B2 Semiconductor device having metal gate and manufacturing method thereof
A manufacturing method of semiconductor devices having metal gate includes following steps. A substrate having a first semiconductor device and a second semiconductor device formed thereon is provided. The first semiconductor device includes a first gate trench and the second semiconductor device includes a second gate trench. A first work function metal layer is formed in the first gate trench and the second gate trench. A portion of the first work function metal layer is removed from the second gate trench. A second work function metal layer is formed in the first gate trench and the second gate trench. The second work function metal layer and the first work function metal layer include the same metal material. A third work function metal layer and a gap-filling metal layer are sequentially formed in the first gate trench and the second gate trench.
US09530861B2 Method for manufacturing semiconductor device
The present invention discloses a method for manufacturing a semiconductor device, comprising the steps of: forming a dummy gate stack structure on a substrate, wherein the dummy gate stack structure contains carbon-based materials; forming source/drain region in the substrate on both sides of the dummy gate stack structure; performing etching to remove the dummy gate stack structure until the substrate is exposed, resulting in a gate trench; and forming a gate stack structure in the gate trench. In accordance with the method for manufacturing a semiconductor device of the present invention, the dummy gate made of carbon-based materials is used to substitute the dummy gate made of silicon-based materials, then no oxide liner and/or etch blocking layer needs be added while the dummy gate is removed by etching in the gate last process, thus the reliability of device is ensured while the process is simplified and the cost is reduced.
US09530852B2 Semiconductor device and manufacturing method thereof
It is an object to provide a semiconductor device in which a short-channel effect is suppressed and miniaturization is achieved, and a manufacturing method thereof. A trench is formed in an insulating layer and impurities are added to an oxide semiconductor film in contact with an upper end corner portion of the trench, whereby a source region and a drain region are formed. With the above structure, miniaturization can be achieved. Further, with the trench, a short-channel effect can be suppressed setting the depth of the trench as appropriate even when a distance between a source electrode layer and a drain electrode layer is shortened.
US09530851B1 Semiconductor device and manufacturing methods thereof
The present invention provides a semiconductor device, including at least two gate structures, and each gate structure includes a gate, a spacer and a source/drain region, the source/drain region disposed on two sides of the gate. A first dielectric layer is disposed on the substrate and between two gate structures, where the first dielectric layer has a concave surface, and the first dielectric layer directly contacts the spacer. A floating spacer is disposed on the first dielectric layer and on a sidewall of the gate, and at least one contact plug is disposed on the source/drain region, where the contact plug directly contacts the floating spacer.
US09530848B2 Method of manufacturing transistor and semiconductor device including the same
Provided is a semiconductor device including a pillar, a gate electrode having a first conductive pattern surrounding the pillar and a plurality of second conductive patterns which protrude from the first conductive pattern and are arranged to be spaced apart from each other, and an insulating pattern interposed between the pillar and the first conductive pattern.
US09530847B2 Semiconductor device with field electrode and field dielectric
A semiconductor device includes a field electrode structure that includes a field electrode and a field dielectric surrounding the field electrode. The field dielectric includes a first dielectric layer and a second dielectric layer having a smaller band gap and/or a lower conduction band edge than the first dielectric layer. A semiconductor body includes a transistor section that surrounds the field electrode structure and directly adjoins the first dielectric layer. The transistor section includes a source zone, a first drift zone section and a body zone separating the source zone and the first drift zone section. The body zone forms a first pn junction with the source zone and a second pn junction with the first drift zone section.
US09530845B2 Frequency multiplier based on a low dimensional semiconductor structure
A frequency multiplier based on a low dimensional semiconductor structure, including an insulating substrate layer, a semiconductor conducting layer arranged on the surface of the insulating substrate layer, an insulating protective layer arranged on the surface of the semiconductor conducting layer, an insulating carving groove penetrating the semiconductor conducting layer, an inlet electrode arranged on the side surface of the semiconductor conducting layer, and an outlet electrode arranged on the side surface corresponding to the access electrode is provided. The semiconductor conducting layer comprises two two-dimensional, quasi-one-dimensional, or one-dimensional current carrying channels near to and parallel to each other. The frequency multiplier has advantages that the structure is simple, the process is easy to implement, no extra filter circuit needs to be added, dependence on material characteristics is little, and the selection range of materials is wide.
US09530844B2 Transistor structures having reduced electrical field at the gate oxide and methods for making same
A transistor device having reduced electrical field at the gate oxide interface is disclosed. In one embodiment, the transistor device comprises a gate, a source, and a drain, wherein the gate is at least partially in contact with a gate oxide. The transistor device has a P+ region within a JFET region of the transistor device in order to reduce an electrical field on the gate oxide.
US09530837B2 Integrated circuitry and methods of forming transistors
Some embodiments include integrated circuits having first and second transistors. The first transistor is wider than the second transistor. The first and second transistors have first and second active regions, respectively. Dielectric features are associated with the first active region and break up the first active region. The second active region is not broken up to the same extent as the first active region. Some embodiments include methods of forming transistors. Active areas of first and second transistors are formed. The active area of the first transistor is wider than the active area of the second transistor. Dielectric features are formed in the active area of the first transistor. The active area of the first transistor is broken up to a different extent than the active area of the second transistor. The active areas of the first and second transistors are simultaneously doped.
US09530835B1 Integrated circuits with guard ring structures for nonplanar transistor devices
Integrated circuits with guard rings are provided. Integrated circuits may include functional circuitry that is sensitive to random noise sources. The functional circuitry may be formed using nonplanar transistor devices such as FinFET devices. A nonplanar guard ring may be provided that help isolate the functional circuitry from the interfering noise sources. The nonplanar guard ring may include edges that are formed using long rectangular strips of diffusion regions and/or smaller interleaved L-shaped diffusion regions. At least two columns of multiple interlocking pairs of L-shaped diffusion regions or at least one column of staggered L-shaped diffusion regions can be formed along an edge of the nonplanar guard ring to help ensure proper noise leakage protection between adjacent L-shaped diffusion regions along that edge.
US09530834B1 Capacitor and method for fabricating the same
A method for fabricating capacitor is disclosed. The method includes the steps of: providing a material layer; forming a patterned first conductive layer on the material layer, forming a first dielectric layer on the patterned first conductive layer; forming a second conductive layer and a cap layer on the first dielectric layer; removing part of the cap layer to form a spacer on the second conductive layer; and using the spacer to remove part of the second conductive layer for forming a trench above the patterned first conductive layer and fin-shaped structures adjacent to the trench.
US09530832B2 Electro-optical device and electronic apparatus
An electro-optical device includes a scanning line and a data line intersecting each other, a pixel circuit provided at a position corresponding to an intersection of the scanning line and the data line, and a power supply wiring line that supplies a given potential. The pixel circuit includes a light emitting element and a driving transistor configured to control a current flowing through the light emitting element. A gate electrode of the driving transistor is electrically connected via a first relay electrode to a given node. The first relay electrode is formed in the same layer as the power supply wiring line and the data line. The first relay electrode is surrounded on at least three sides by the power supply wiring line.
US09530828B2 Organic EL display unit
There is provided an organic EL display unit having superior light emission efficiency and superior display performance. This display unit includes two or more kinds of organic light-emitting devices, each of the organic light-emitting devices having a laminated configuration in which a first electrode layer, an organic layer, and a second electrode layer are laminated in order on a base, and the organic light-emitting devices configured to emit light of different colors. The organic layer includes a common light-emitting layer and an individual light-emitting layer, the common light-emitting layer shared by all of the kinds of organic light-emitting devices, and the individual light-emitting layer provided in only a kind configured to emit specific color light of the kinds of organic light-emitting devices. Some of the kinds of organic light-emitting devices each include a transparent conductive layer between the first electrode layer and the organic layer.
US09530827B2 Light-emitting display device and method of manufacturing the same
A light-emitting display device includes a substrate having a plurality of pixels. A first electrode is provided on the substrate for each pixel, and a pixel defining layer defines each of the pixels. The pixel defining layer has an opening to expose the first electrode. A charge injection layer is on the first electrode, and a surface processing layer is on the charge injection layer. The surface processing layer extends from inside the opening of the pixel defining layer to a top surface of the pixel defining layer. The surface processing layer including a plurality of grooves in a portion extending on the top surface of the pixel defining layer. A charge transport layer is on the surface processing layer, a light-emitting layer is on the charge transport layer, and a second electrode is on the light-emitting layer.
US09530825B2 Display panel
A display panel which can avoid RC delay is provided. The display panel comprises photosensitive transistors, data lines electrically connected with source electrodes of the photosensitive transistors, first electrodes electrically connected with drain electrodes of the photosensitive transistors, and light emitting diodes, wherein the photosensitive transistors are arranged in rows the direction of which is perpendicular to the extension direction of the data lines, and the light emitting diodes are arranged in rows, each row of light emitting diodes are arranged along the direction perpendicular to the extension direction of the data lines, and are used for simultaneously turning on all of the photosensitive transistors in a corresponding row.
US09530824B2 Monolithic three dimensional memory arrays with staggered vertical bit line select transistors and methods therfor
A monolithic three-dimensional memory array is provided that includes a plurality of global bit lines disposed above a substrate, each global bit line having a long axis, a plurality of vertically-oriented bit lines disposed above the global bit lines, a plurality of word lines disposed above the global bit lines, a plurality of memory cells coupled between the vertically-oriented bit lines and the word lines, and a plurality of vertically-oriented bit line select transistors coupled between the vertically-oriented bit lines and the global bit lines, each vertically-oriented bit line select transistor comprising a width and a thickness. Vertically-oriented bit line select transistors disposed above adjacent global bit lines are offset from one another in a direction along the long axis of the global bit lines. The width of each vertically-oriented bit line select transistor is greater than the thickness of the vertically-oriented bit line select transistors.
US09530823B2 Memory device and method for manufacturing the same
A memory device according to an embodiment includes an ion metal layer containing a first metal, an opposing electrode, a resistance change layer disposed between the ion metal layer and the opposing electrode, a first layer disposed in a central portion of a space between the ion metal layer and the resistance change layer, and a second layer disposed in an end portion of the space. The first layer contains a second metal. The second layer contains the second metal, and at least one selected from oxygen and nitrogen.
US09530821B2 Light-emitting device, method for designing light-emitting device, method for driving light-emitting device, illumination method, and method for manufacturing light-emitting device
A light-emitting device that can implement a natural, vivid, highly visible and comfortable appearance of colors and appearance of objects as if the objects are seen outdoors is provided. The light-emitting device can change the appearance of colors of the illuminated objects so as to satisfy the requirements for various illuminations. Furthermore, the appearance of colors of the light-emitting device which currently exists or is in use, and which includes a semiconductor light-emitting device of which appearance of colors is not very good, is improved. A method for driving the light-emitting device, an illumination method by the device, and a method for manufacturing the light-emitting device are also provided. These features are achieved by the light-emitting device that incorporates light-emitting elements and satisfies predetermined requirements, in which φSSL(λ) emitted from the light-emitting device satisfies a predetermined condition.
US09530818B2 Image sensor integrated circuit package with reduced thickness
An image sensor die may include a pixel array formed in an image sensor substrate. The image sensor die may be mounted to a thin metal interconnect layer that has been deposited on a sacrificial carrier substrate. The thin metal interconnect layer may include one or more metal layers that are patterned to form metal traces that serve as contact pads, signal lines, and other interconnects in the interconnect layer. The image sensor die may be wire bonded, flip-chip mounted, or otherwise mechanically and electrically coupled to the metal interconnect layer. The sacrificial carrier substrate may be etched or otherwise removed to expose the metal interconnects on the metal interconnect layer. An array of solder balls may be formed on the exposed metal interconnects to form a ball grid array package, or the exposed contact pads may be plated to form a leadless chip carrier package.
US09530813B2 Seal ring structure with rounded corners for semiconductor devices
Seal ring structures are provided with rounded corner junctions or corner junctions that include polygons. The seal rings surround generally rectangular semiconductor devices such as integrated circuits, image sensors and other devices. The seal ring includes a configuration of two sets of generally parallel opposed sides and the corner junctions are the junctions at which adjacent orthogonal seal ring sides are joined. The seal rings are trench structures or filled trench structures in various embodiments. The rounded corner junctions are formed by a curved arc or multiple line segments joined together at various angles. The corner junctions that include one or more enclosed polygons include polygons with at least one polygon side being formed by one of the seal ring sides.
US09530811B2 Elevated photodiode with a stacked scheme
A device includes an image sensor chip having formed therein an elevated photodiode, and a device chip underlying and bonded to the image sensor chip. The device chip has a read out circuit electrically connected to the elevated photodiode.
US09530804B2 Display device
A display device with excellent display quality is provided. The display device includes a transistor over a first substrate, an inorganic insulating film in contact with the transistor, and an organic insulating film in contact with the inorganic insulating film. The transistor includes a gate electrode over the first substrate, an oxide semiconductor film overlapping with the gate electrode, a gate insulating film in contact with one surface of the oxide semiconductor film, and a pair of electrodes in contact with the oxide semiconductor film. The inorganic insulating film is in contact with the other surface of the oxide semiconductor film. The organic insulating film overlaps with the oxide semiconductor film with the inorganic insulating film provided therebetween and is separated. Note that the thickness of the organic insulating film is preferably greater than or equal to 500 nm and less than or equal to 10 μm.
US09530800B2 Array substrate, display panel and method for preparing array substrate
The invention provides an array substrate, a display panel and a method for preparing an array substrate. The array substrate includes multiple low temperature poly-silicon (LTPS) thin film transistors arranged in an array. Each LTPS thin film transistor includes: a substrate; a LTPS layer, a source, a drain and a first conductive layer disposed on a same surface of the substrate, the source and the drain respectively being arranged at two sides of the LTPS layer and electrically connected with the LTPS layer, the drain being electrically connected with the first conductive layer; an insulating layer disposed on the LTPS layer, the source, the drain and the first conductive layer; a gate disposed on the insulating layer and corresponding to the LTPS layer; a passivation layer disposed on the gate; and a second conductive layer disposed on the passivation layer and corresponding to the first conductive layer.
US09530796B2 Semiconductor-on-insulator integrated circuit with interconnect below the insulator
An integrated circuit assembly comprises an insulating layer, a semiconductor layer, a handle layer, a metal interconnect layer, and transistors. The insulating layer has a first surface, a second surface, and a hole extending from the first surface to the second surface. The semiconductor layer has a first surface and a second surface, the first surface of the semiconductor layer contacting the first surface of the insulating layer. The handle layer is coupled to the second surface of the semiconductor layer. The metal interconnect layer is coupled to the second surface of the insulating layer, the metal interconnect layer being disposed within the hole in the insulating layer. The transistors are located in the semiconductor layer. The hole in the insulating layer extends to at least the first surface of the semiconductor layer. The metal interconnect layer electrically couples a plurality of the transistors to each other.
US09530791B1 Multilevel memory stack structure with joint electrode having a collar portion and methods for manufacturing the same
A three-dimensional memory device including multiple stack structures can be formed with a joint region electrode, which is an electrode formed at a joint region located near the interface between an upper stack structure and a lower stack structure. A memory stack structure is formed through the multiple stack structures. The joint region electrode laterally surrounds a portion of the memory stack structure in proximity to the interface between different stack structures. The joint region electrode includes a layer portion having a thickness and a collar portion that laterally surrounds the memory stack structure and having a greater vertical extent than the thickness of the layer portion. The increased vertical extent of the collar portion with respect to the vertical extent of the layer portion provides enhanced control of a portion of a semiconductor channel in the memory stack structure located near the interface between different stack structures.
US09530790B1 Three-dimensional memory device containing CMOS devices over memory stack structures
Peripheral devices for a three-dimensional memory device can be formed over an array of memory stack structures to increase areal efficiency of a semiconductor chip. First contact via structures and first metal lines are formed over an array of memory stack structures and an alternating stack of insulating layers and electrically conductive layers. A semiconductor material layer including a single crystalline semiconductor material or a polycrystalline semiconductor material is formed over first metal lines. After formation of semiconductor devices on or in the semiconductor material layer, metal interconnect structures including second metal lines and additional conductive via structures are formed to electrically connect nodes of the semiconductor devices to respective first metal lines and to memory devices underneath.
US09530788B2 Metallic etch stop layer in a three-dimensional memory structure
A dielectric liner, a bottom conductive layer, and a stack of alternating layers including insulator layers and spacer material layers are sequentially formed over a substrate. A memory opening extending through the stack can be formed by an anisotropic etch process that employs the bottom conductive layer as an etch stop layer. The memory opening is extended downward by etching through the bottom conductive layer and the dielectric liner, while minimizing an overetch into the substrate. A memory stack structure can be formed in the memory opening. Subsequently, a backside contact trench can be formed through the stack employing the bottom conductive layer as an etch stop layer. The spacer material layers can be removed to form backside recesses, which are filled with a conductive material to form electrically conductive layers. The remaining portion of the bottom conductive layer can be employed as a source select gate electrode.
US09530787B2 Batch contacts for multiple electrically conductive layers
A stepped structure is formed on a stack of an alternating plurality of insulator layers and material layers such that at least two material layers have vertically coincident sidewalls. In one embodiment, the material layers can be electrically conductive layers, and a contact via structure can contact the vertically coincident sidewalls. In another embodiment, a sacrificial spacer can be formed on the vertically coincident sidewalls, and the material layers and the sacrificial spacer can be replaced with a conductive material. A contact via structure can be formed on a set of layers electrically shorted by a vertical conductive material portion that is formed in a volume of the spacer. The contact via structure can provide electrical contact to multiple electrically conductive layers.
US09530785B1 Three-dimensional memory devices having a single layer channel and methods of making thereof
A memory stack structure for a three-dimensional device includes an alternating stack of insulator layers and spacer material layers. A memory opening is formed through the alternating stack. A memory material layer, a tunneling dielectric layer, and a silicon oxide liner are formed in the memory opening. A sacrificial liner is subsequently formed over the tunneling dielectric layer. The layer stack is anisotropically etched to physically expose a semiconductor surface of the substrate underneath the memory opening. The sacrificial liner may be removed prior to, or after, the anisotropic etch. The silicon oxide liner is removed after the anisotropic etch. A semiconductor channel layer can be deposited directly on the tunneling dielectric layer as a single material layer without any interface therein.
US09530778B1 Semiconductor devices having metal gate and method for manufacturing semiconductor devices having metal gate
Semiconductor devices having metal gate include a substrate, a first nFET device formed thereon, and a second nFET device formed thereon. The first nFET device includes a first n-metal gate, and the first n-metal gate includes a third bottom barrier metal layer and an n type work function metal layer. The n type work function metal layer directly contacts the third bottom barrier layer. The second nFET device includes a second n-metal gate and the second n-metal gate includes a second bottom barrier metal layer, the n type work function metal layer, and a third p type work function metal layer sandwiched between the second bottom barrier metal layer and the n type work function metal layer. The third p type work function metal layer of the second nFET device and the third bottom barrier metal layer of the first nFET device include a same material.
US09530777B2 FinFETs of different compositions formed on a same substrate
Methods and structures for forming finFETs of different semiconductor composition and of different conductivity type on a same wafer are described. Some finFET structures may include strained channel regions. FinFETs of a first semiconductor composition may be grown in trenches formed in a second semiconductor composition. Material of the second semiconductor composition may be removed from around some of the fins at first regions of the wafer, and may remain around fins at second regions of the wafer. A chemical component from the second semiconductor composition may be driven into the fins by diffusion at the second regions to form finFETs of a different chemical composition from those of the first regions. The converted fins at the second regions may include strain.
US09530776B2 FinFET semiconductor device with germanium diffusion over silicon fins
A method for manufacturing a semiconductor device is described that comprises providing a substrate, forming a plurality of fins having a first semiconductor material, replacing a first portion of at least one of the fins with a second semiconductor material, and distributing the second semiconductor material from the first portion to a second portion of the at least one of the fins.
US09530774B2 Semiconductor package for III-nitride transistor stacked with diode
One exemplary disclosed embodiment comprises a two-terminal stacked-die package including a diode, such as a silicon diode, stacked atop a III-nitride transistor, such that a cathode of the diode resides on and is electrically coupled to a source of the III-nitride transistor. A first terminal of the package is coupled to a drain of the III-nitride transistor, and a second terminal of the package is coupled to an anode of the diode. In this manner, devices such as cascoded rectifiers may be packaged in a stacked-die form, resulting in reduced parasitic inductance and resistance, improved thermal dissipation, smaller form factor, and lower manufacturing cost compared to conventional packages.
US09530768B1 Gate-coupled NMOS device for electro-static discharge protection
A gate-coupled NMOS device according to an embodiment includes a P-type well region, an N-type well region, and N-channel MOS transistor, an N+-type tap region, a first conductive layer, and a second conductive layer. The N-type well region surrounds the P-type well region. An inner side of the N-type well region directly contacts a side of the P-type well region. The N-channel MOS transistor is disposed in the P-type well region. The N+-type tap region is disposed in the N-type well region. The first conductive layer is disposed on the N-type well region by interposing a first insulation layer and constitutes a MOS capacitor with the N-type well region and the first insulation layer. The second conductive layer is disposed on the N-type well region by interposing a second insulation layer and constitutes a resistor. A first end portion of the first conductive layer directly contacts a first end portion of the second conductive layer.
US09530767B2 Semiconductor light emitting element
According to one embodiment, a semiconductor light emitting element includes a base body, first to sixth semiconductor layers, a first conductive layer, and a first pad layer. The first semiconductor layer is separated from the base body and includes first and second semiconductor regions arranged with each other. The second semiconductor layer is provided between the second semiconductor region and the base body. The third semiconductor layer is provided between the second semiconductor region and the second semiconductor layer. The fourth semiconductor layer is separated from the base body, arranged with the first semiconductor layer. The fifth semiconductor layer is provided between the base body and one portion of the fourth semiconductor layer. The sixth semiconductor layer is provided between the fifth semiconductor layer and the one portion. The first conductive layer includes first, second, and third conductive regions. The first pad layer includes a first pad region.
US09530761B2 Package systems including passive electrical components
A package system includes at least one active circuitry disposed over a substrate. A passivation structure is disposed over the at least one active circuitry. The passivation structure has at least one opening that is configured to expose at least one first electrical pad. At least one passive electrical component is disposed over the passivation structure. The at least one passive electrical component is electrically coupled with the at least one first electrical pad.
US09530760B2 Light emitting device having plurality of light emitting elements and light reflective member
A light emitting device includes: a base member; and a plurality of light emitting elements mounted on the base member. The plurality of light emitting elements includes: at least one first light emitting element having a side surface uncovered by a light reflective member; and at least one second light emitting element having a side surface covered by the light reflective member.
US09530756B2 Semiconductor apparatus having electrical connections with through-via and a metal layer and stacking method thereof
A semiconductor apparatus may include a first metal layer including a first unit pad. The semiconductor apparatus may include a second metal layer including first and second unit pads. The semiconductor apparatus may include a first through-via coupling the first unit pad of the first metal layer to a first bump; and a second through-via coupling the first unit pad of the second metal layer to a second bump. The second unit pad of the second metal layer may be disposed in a first direction from the first unit pad of the second metal layer, and may be electrically coupled to the first unit pad of the second metal layer.
US09530754B2 Chip package and chip assembly
A chip package is provided. The chip package may include an electrically conductive carrier; at least one first chip including a first side and a second side opposite of the first side, with its second side being electrically contacted to the electrically conductive carrier; an insulating layer over at least a part of the electrically conductive carrier and over at least a part of the first side of the chip; at least one second chip arranged over the insulating layer and next to the first chip; encapsulating material over the first chip and the second chip; and electrical contacts which extend through the encapsulation material to at least one contact of the at least one first chip and to at least one contact of the at least one second chip.
US09530750B2 Method of clamping a semiconductor assembly
The present invention relates to a method of clamping a semiconductor assembly with a desired compression force equally distributed across the opposing surfaces of the devices and associated components of the semiconductor assembly.
US09530744B2 Semiconductor device and method of manufacturing the same
A semiconductor device includes a wiring substrate including a first electrode in which a cross-sectional shape is an inverted trapezoidal shape, a semiconductor chip including a second electrode in which a cross-sectional shape is an inverted trapezoidal shape, a metal bonding material bonding a tip end of the first electrode and a tip end of the second electrode which face each other, and an underfill resin filled between the wiring substrate and the semiconductor chip, the underfill resin covering a side face of each of the first electrode and the second electrode and a side face of the metal bonding material.
US09530738B2 Semiconductor device and method of forming interconnect structure and mounting semiconductor die in recessed encapsulant
A semiconductor device has conductive pillars formed over a carrier. A first semiconductor die is mounted over the carrier between the conductive pillars. An encapsulant is deposited over the first semiconductor die and carrier and around the conductive pillars. A recess is formed in a first surface of the encapsulant over the first semiconductor die. The recess has sloped or stepped sides. A first interconnect structure is formed over the first surface of the encapsulant. The first interconnect structure follows a contour of the recess in the encapsulant. The carrier is removed. A second interconnect structure is formed over a second surface of the encapsulant and first semiconductor die. The first and second interconnect structures are electrically connected to the conductive pillars. A second semiconductor die is mounted in the recess. A third semiconductor die is mounted over the recess and second semiconductor die.
US09530735B2 Semiconductor device and method of manufacturing the same
A method of manufacturing a semiconductor device includes forming stepped stack structures each including conductive patterns stacked in a shape of steps while exposing respective ends thereof and surrounding channel layers, the stepped stack structures being separated from one another by slits, forming first and second contact plugs connected to the ends of the conductive patterns to extend along an extending direction of the channel layers, and simultaneously forming, using a spacer patterning technology (SPT), bit lines connected to one or more of the channel layers and extending along a first direction, first connecting lines extending along a second direction intersecting the first direction, and contact pads extending from the first connecting lines to be connected to the first contact plugs.
US09530730B2 Configurable routing for packaging applications
Various structures having a fuse and methods for forming those structures are described. An embodiment is a method. The method comprises attaching a first die to a first side of a component using first electrical connectors. After the attaching, at least one of (i) the first die comprises a first fuse, (ii) the first side of the component comprises a second fuse, (iii) a second side of the component comprises a third fuse, the second side being opposite the first side, or (iv) a combination thereof. The method further comprises after the attaching the first die to the first side of the component, blowing the first fuse, the second fuse, the third fuse, or a combination thereof.
US09530724B2 Compact power quad flat no-lead (PQFN) package
Some exemplary embodiments of a multi-chip module (MCM) power quad flat no-lead (PQFN) semiconductor package utilizing a leadframe for electrical interconnections have been disclosed. One exemplary embodiment comprises a PQFN semiconductor package comprising a leadframe, a driver integrated circuit (IC) coupled to the leadframe, a plurality of vertical conduction power devices coupled to the leadframe, and a plurality of wirebonds providing electrical interconnects, including at least one wirebond from a top surface electrode of one of the plurality of vertical conduction power devices to a portion of the leadframe, wherein the portion of the leadframe is electrically connected to a bottom surface electrode of another of the plurality of vertical conduction power devices. In this manner, efficient multi-chip circuit interconnections can be provided in a PQFN package using low cost lead frames.
US09530714B2 Low-profile chip package with modified heat spreader
An integrated circuit system includes a heat spreader that is thermally coupled to a semiconductor chip and has a cavity or opening formed in the heat spreader. The cavity or opening is positioned so that capacitors and/or other passive components mounted to the same packaging substrate as the semiconductor chip are at least partially disposed in the cavity or opening. Because the passive components are disposed in the cavity or opening, the integrated circuit system has a reduced package thickness.
US09530709B2 Methods of manufacturing a printed circuit module having a semiconductor device with a protective layer in place of a low-resistivity handle layer
A printed circuit module having a protective layer in place of a low-resistivity handle layer and methods for manufacturing the same are disclosed. The printed circuit module includes a printed circuit substrate with a thinned die attached to the printed circuit substrate. The thinned die includes at least one device layer over the printed circuit substrate and at least one deep well within the at least one device layer. A protective layer is disposed over the at least one deep well, wherein the protective layer has a thermal conductivity greater than 2 watts per meter Kelvin (W/mK) and an electrical resistivity of greater than 103 Ohm-cm.
US09530705B2 4 port L-2L de-embedding method
Some embodiments relate to a wafer. The wafer includes a first dummy component comprising two or more first dummy component transmission lines. One of the first dummy component transmission lines operably couples a first signal test pad to a second signal test pad, and an other of the first dummy component transmission lines operably couples a third signal test pad to a fourth signal test pad. A second dummy component comprises two or more second dummy component transmission lines. One of the second dummy component transmission lines operably couples a fifth signal test pad to a sixth signal test pad, and an other of the second dummy component transmission lines operably couples a seventh signal test pad to an eighth signal test pad. Other embodiments are also disclosed.
US09530704B2 Polishing apparatus and wear detection method
There is provided a polishing apparatus capable of detecting uneven wear occurring on a polishing pad and detecting an appropriate replacement timing of the polishing pad. The polishing apparatus detects, every predetermined time, a value of rotation speed or a value of rotation torque of a table drive shaft for rotationally driving a polishing table or a dresser drive shaft for driving a dresser, or a value of swing torque of a dresser swing shaft for driving the dresser; calculates a change quantity thereof based on the value of the detected rotation speed, the value of the detected rotation torque, or the value of the detected swing torque; determines whether or not the change quantity exceeds a predetermined value; and notifies a user of a warning when a determination is made that the change quantity exceeds the predetermined value.
US09530692B2 Method of forming through wiring
Provided is a method of forming a through wiring, including forming a first insulating film on a first surface and a second surface of a substrate; forming a through hole to pass through the first insulating film formed on the first surface side and the substrate; forming a second insulating film formed from a material different from that of the first insulating film on an inner wall of the through hole; forming a conductive film on the first insulating film formed on the second surface; forming an opening in the first insulating film by processing the first insulating film formed on the second surface; and filling an inner portion of the through hole with a conductive material by electrolytic plating using the conductive film exposed at the bottom portion of the through hole as a seed layer.
US09530684B2 Method and structure to suppress finFET heating
Embodiments of the present invention provide structures and methods for heat suppression in finFET devices. Fins are formed in a semiconductor substrate. A graphene layer is formed on a lower portion of the sidewalls of the fins. A shallow trench isolation region is disposed on the structure and covers the graphene layer, while an upper portion of the fins protrudes from the shallow trench isolation region. The graphene layer may also be deposited on a top surface of the base semiconductor substrate. The graphene serves to conduct heat away from the fins more effectively than other dielectric materials.
US09530682B2 System and apparatus for holding a substrate over wide temperature range
An apparatus to support a substrate may include a base, a clamp portion to apply a clamping voltage to the substrate, and a displacement assembly configured to hold the clamp portion and base together in a first operating position, and to move the clamp portion with respect to the base from the first operating position to a second operating position, wherein the clamp portion and base are separate from one another in the second operating position.
US09530681B2 Method to provide the thinnest and variable substrate thickness for reliable plastic and flexible electronic device
An electronic device is formed by depositing polyimide on a glass substrate. A conductive material is deposited on the polyimide and patterned to form electrodes and signal traces. Remaining portions of the electronic device are formed on the polyimide. A second polyimide layer is then formed on the first polyimide layer. The glass substrate is then removed, exposing the electrodes and the top surface of the electronic device.
US09530677B2 Substrate processing apparatus and semiconductor device manufacturing method
A substrate processing apparatus comprises a processing chamber for storing a substrate and performing a specified processing on the substrate, a substrate holding jig for holding the substrate in the processing chamber, a placement stand capable of moving the substrate holding jig inside and outside the processing chamber while mounting the substrate holding jig, a substrate holding jig movement mechanism for moving the substrate holding jig to a location different from the placement stand while holding the substrate holding jig, and a substrate holding jig movement suppression mechanism for suppressing vertical and horizontal movement of the substrate holding jig in order to keep the substrate holding jig mounted on the placement unit of the substrate holding jig movement mechanism.
US09530667B2 Method for roughness improvement and selectivity enhancement during arc layer etch using carbon
A method of patterning a silicon containing ARC (anti-reflective coating) layer underlying a patterned layer is described that includes establishing a flow of a process gas to a plasma processing system, selecting a process condition that increases an etch selectivity of the silicon containing ARC layer relative to the patterned layer, igniting plasma from the process gas using a plasma source in accordance with the process condition, and exposing the substrate to the plasma to extend the feature pattern of the patterned layer into the silicon containing ARC layer. The process gas includes a first gaseous molecular constituent composed of C, F and optionally H, a second gaseous molecular constituent composed of C, F, and optionally H, and a third gaseous molecular constituent composed of C and an element selected from the group consisting of H and F.
US09530663B1 Method for forming a pattern
A method for forming a pattern includes steps of forming a patterned core layer on a substrate, conformally forming a spacer layer on the patterned core layer to form first concave portions, performing an etch back process to expose the patterned core layer, removing the exposed patterned core layer to form second concave portions, filling up the first concave portions and the second concave portions with a directed self-assembly material, and activating a directed self-assembly process, so that the directed self-assembly material is diffused to the perimeter of the concave portions to form a hole surrounding by the directed self-assembly material in each concave portions.
US09530662B2 Methods for fabricating integrated circuits using directed self-assembly including a substantially periodic array of topographical features that includes etch resistant topographical features for transferability control
Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming a substantially periodic array of a plurality of topographical features including a plurality of etch resistant topographical features and at least one graphoepitaxy feature. The plurality of etch resistant topographical features define a plurality of etch resistant confinement wells and the at least one graphoepitaxy feature defines a graphoepitaxy confinement well that has a different size and/or shape than the etch resistant confinement wells. A block copolymer is deposited into the confinement wells. The block copolymer is phase separated into an etchable phase and an etch resistant phase. The etch resistant topographical features direct the etch resistant phase to form an etch resistant plug in each of the etch resistant confinement wells.
US09530658B2 Continuous plasma etch process
A method for processing a substrate in a process chamber is provided. A plurality of cycles is provided to process the substrate, wherein each cycle comprises the steps of providing a flow of a first process gas into the process chamber, stopping the flow of the first process gas into the process chamber, providing a flow of a first transition gas into the process chamber, wherein the first transition gas neutralizes a component of the first process gas, stopping the flow of the first transition gas into the process chamber, providing a flow of a second process gas into the process chamber, stopping the second process gas into the process chamber, and maintaining a continuous plasma during the cycle.
US09530656B2 Temperature control in RF chamber with heater and air amplifier
Systems, methods, and computer programs are presented for controlling the temperature of a window in a semiconductor manufacturing chamber. One apparatus includes an air amplifier, a plenum, a heater, a temperature sensor, and a controller. The air amplifier is coupled to pressurized gas and generates, when activated, a flow of air. The air amplifier is also coupled to the plenum and the heater. The plenum receives the flow of air and distributes the flow of air over a window of the plasma chamber. When the heater is activated, the flow of air is heated during processing, and when the heater is not activated, the flow of air cools the window. The temperature sensor is situated about the window of the plasma chamber, and the controller is defined to activate both the air amplifier and the heater based on a temperature measured by the temperature sensor.
US09530655B2 Slurry composition for chemical mechanical polishing of Ge-based materials and devices
A CMP slurry composition which provides for a high Ge- or SiGe-to-dielectric material selectivity a low rate of Ge or SiGe recess formation includes an oxidant and a germanium removal rate enhancer including at least one of a methylpyridine compound and a methylpyridine derivative compound. In some examples, the slurry composition also includes an etching inhibitor. In some cases, the slurry composition may include an abrasive, a surfactant, an organic complexant, a chelating agent, an organic or inorganic acid, an organic or inorganic base, a corrosion inhibitor, or a buffer. The slurry composition may be distributed onto a surface of a polishing pad disposed on a platen that is configured to rotate. Additionally, a workpiece carrier configured to house a substrate may bring the substrate into contact with the rotating polishing pad and thereby polish the substrate utilizing the slurry composition.
US09530654B2 FINFET fin height control
Fin height control techniques for FINFET fabrication are disclosed. The technique includes a method for controlling the height of plurality of fin structures to achieve uniform height thereof relative to a top surface of isolation material located between fin structures on a semiconductor substrate. The isolation material located between fin structures may be selectively removed after treatment to increase its mechanical strength such as by, for example, annealing and curing. A sacrificial material may be deposited over the isolation material between the fin structures in a substantially uniform thickness. The top portion of the fin structures may be selectively removed to achieve a uniform planar surface over the fin structures and sacrificial material. The sacrificial material may then be selectively removed to achieve a uniform fin height relative to the isolation material.
US09530652B2 Method for producing patterned metal nanowires, electrode using the patterned metal nanowires, and transistor using the patterned metal nanowire electrode
The present invention relates to a method of producing patterned silver nanowire, comprising: coating a photosensitive polyamide acid polymer solution on a silica substrate and dried; using a photomask to paste on the photosensitive polyamic acid and illuminates by ultraviolet; using a developer to obtain a patterned polyamide acid template; coating a metal nanowire suspension on the patterned template; and removing the metal nanowire outside of the patterned polyamic acid. The present invention also discloses an electrode using the patterned metal nanowire and a transistor using the patterned metal nanowire electrode.
US09530650B2 Method of creation of defects using X-ray radiation and electric field and its application
The goal is the improvement of technologies of modification of material properties by decreasing expenditures of energy and time and extending possibilities for modification of the materials by creating and maintaining a metastable state, which is characterized by a change in the structure of the material. The invention belongs to the technological field of manufacturing materials with desired properties, and in part to the field of methods of defect generation in crystals, and it can be applied in industries that apply the process of material doping with impurities in order to manufacture materials having a desired concentration of defects and an increased concentration of charge carriers, to create a metastable structural state of the material, as well as to measure energy and doses of radio waves.
US09530647B2 Devices including ultra-short gates and methods of forming same
Provided are devices including ultra-short gates and methods of forming same. Methods include forming a first gate pattern on a semiconductor that includes a first recess having a first width. A dielectric spacer is formed on a sidewall of the first recess to define a second recess in the first recess that has a second width that is smaller than the first width. A gate having the second width is formed in the second recess.
US09530640B2 Oxide semiconductor film
An oxide semiconductor film includes indium (In), cerium (Ce), zinc (Zn) and oxygen (O) elements, and a molar ratio of the In, Ce, and Zn as In:Ce:Zn is in a range of 2:(0.5 to 2):1. A method for making a oxide semiconductor film includes a step of forming an oxide film on a substrate by using a sputtering method and a sputtering target comprising In2CexZnO4+2x, wherein x=0.5˜2.
US09530631B2 Compact mass spectrometer
A miniature mass spectrometer is disclosed comprising an atmospheric pressure ionisation source and a first vacuum chamber having an atmospheric pressure sampling orifice or capillary, a second vacuum chamber located downstream of the first vacuum chamber and a third vacuum chamber located downstream of the second vacuum chamber. An ion detector is located in the third vacuum chamber. A first RF ion guide is located within the first vacuum chamber and a second RF ion guide is located within the second vacuum chamber. The ion path length from the atmospheric pressure sampling orifice or capillary to an ion detecting surface of the ion detector is ≦400 mm. The mass spectrometer further comprises a tandem quadrupole mass analyser, a 3D ion trap mass analyser, a 2D or linear ion trap mass analyser, a Time of Flight mass analyser, a quadrupole-Time of Flight mass analyser or an electrostatic mass analyser arranged in the third vacuum chamber. The product of the pressure P1 in the vicinity of the first RF ion guide and the length L1 of the first RF ion guide is in the range 10-100 mbar-cm and the product of the pressure P2 in the vicinity of the second RF ion guide and the length L2 of the second RF ion guide is in the range 0.05-0.3 mbar-cm.
US09530630B2 Thermionic power generator
A thermionic power generator includes an emitter generating thermions and a collector collecting the thermions. The emitter includes an emitter substrate having an electric conductivity, a low resistance layer stacked to the emitter substrate and made of an n-type diamond semiconductor that includes phosphorus as a donor, and an electron emission layer stacked to the low resistance layer and made of an n-type diamond semiconductor that includes nitrogen as a donor. The collector includes a collector substrate having an electric conductivity and is disposed opposite to the emitter via a clearance. The electron emission layer has a thickness equal to or less than 40 nm.
US09530626B2 Method and apparatus for ESC charge control for wafer clamping
A plasma processing method and apparatus are provided in which current spikes associated with application of a voltage to an electrostatic chuck (ESC) are minimized or reduced when the processing plasma is present. According to an example, the voltage is applied to the ESC after the processing plasma is struck, however the voltage is ramped or increased in a step-wise manner to achieve the desired final ESC voltage. In an alternate embodiment, the ESC voltage is at least partially applied before striking of the plasma for processing the wafer. By reducing current spikes associated with application of the voltage to the ESC during the presence of the processing plasma, transfer or deposition of particles on the wafer can be reduced.
US09530618B2 Plasma system, chuck and method of making a semiconductor device
A chuck, a system including a chuck and a method for making a semiconductor device are disclosed. In one embodiment the chuck includes a first conductive region configured to be capacitively coupled to a first RF power generator, a second conductive region configured to be capacitively coupled to a second RF power generator and an insulation region that electrically insulates the first conductive region from the second conductive region.
US09530617B2 In-situ charging neutralization
Some embodiments relate to a method for semiconductor processing. In this method, a semiconductor wafer is provided. A surface region of the semiconductor wafer is probed to determine whether excess charge is present on the surface region. Based on whether excess charge is present, selectively inducing a corona discharge to reduce the excess charge. Other techniques are also provided.
US09530612B2 Charged particle beam system and method of operating a charged particle beam system
The present disclosure relates to a charged particle beam system comprising a charged particle beam source, a charged particle column, a sample chamber, a plurality of electrically powered devices arranged within or at either one of the charged particle column, the charged particle beam source and the sample chamber, and at least one first converter to convert an electrical AC voltage power into an electrical DC voltage. The first converter is positioned at a distance from either of the charged particle beam source, the charged particle column and the charged particle chamber, and all elements of the plurality of electrically powered devices, when operated during operation of the charged particle beam source, are configured to be exclusively powered by the DC voltage provided by the converter.
US09530610B2 Blanking aperture array device for multi-beams, and fabrication method of blanking aperture array device for multi-beams
A method for fabricating a blanking aperture array device for multi-beams includes forming, using a substrate over which a first insulating film, a first metal film, a second insulating film, and a second metal film are laminated in order, electrodes and pads on the second metal film, removing a part of the second metal film, removing the second insulating film using, as a mask, the electrodes, the pads, and a remaining part of the second metal film, and forming openings each being between a pair of electrodes, wherein, a part of the second metal film is etched such that some part of it remains in regions each connecting one of the electrodes and one of the pads, and a region in which entire openings are formed except the openings themselves is configured by the electrodes, pads, and first and second metal films such that the insulating film is not exposed.
US09530607B2 Supply of a liquid-metal target in X-ray generation
Closed-loop circulation for providing liquid metal to an interaction region at which an electron beam is to impact upon the liquid metal to produce X-rays is presented. In a method, the pressure of the liquid metal is raised to at least 10 bar using a high-pressure pump. The pressurized liquid metal is then conducted to a nozzle and ejected into a vacuum chamber in the form of a spatially continuous jet. After passage through the vacuum chamber, the liquid metal is collected in a collection reservoir, and the pressure of the liquid metal is raised to an inlet pressure, e.g. using a primer pump, suitable for the inlet of the high-pressure pump. Also, a corresponding circulation system and an X-ray source provided with such circulation system.
US09530601B2 Thermo magnetic trip unit for a circuit breaker and circuit breaker
A thermo magnetic trip unit is disclosed for a circuit breaker, in particular for a molded case circuit breaker. In an embodiment, the thermo magnetic trip unit includes a braid plate, a load plate and a heater arranged between the braid plate and the load plate, whereby the braid plate, the load plate and the heater form a current path. In an embodiment, the thermo magnetic trip unit further includes a bimetal positioned on the heater, a rotatable trip bar and an energy storage spring, whereby the trip bar can release the energy storage spring after being touched by the bimetal with certain power. Further, the bimetal is an arched or curved snap action bimetal which snaps over to an opposite direction as soon as a certain temperature is reached. Further, a circuit breaker, in particular molded case circuit breaker, including such thermo magnetic trip unit, is disclosed.
US09530598B2 Relay and flag assembly for use with relays
A relay and a method of assembling a relay are provided. The relay comprising: a relay switch configured to operate in a first switch mode and a second switch mode; a flag structure for indicating an operative status of the relay switch, the flag structure capable of being orientated in a first position for indicating the relay switch being in the first switch mode and in a second position for indicating the relay switch being in the second switch mode; a card structure coupled to the flag structure for changing the orientation of the flag structure from the first position to the second position or from the second position to the first position; and a base plate coupled to the flag structure and the card structure, the base plate comprising an open ended slot for allowing part of the flag structure to be received therein.
US09530594B2 Integrated particle trap in a tank of a dead tank circuit breaker
A tank for a dead tank circuit breaker includes a body having an interior volume defined by an interior surface. A particle trap structure includes a pair of recessed surfaces in a bottom portion of the interior surface. Each recessed surface is disposed in spaced relation with respect to the interior surface so as to define a channel. A raised surface is spaced from the recessed surfaces and separates the recessed surfaces. The channels are constructed and arranged to trap foreign particles in the interior volume, with the raised surface being constructed and arranged to raise an electric field in the interior volume to be above the channels so as to eliminate electrical activity that would affect the particles in the channels.
US09530591B2 Safety system for high voltage network grounding switch
The present invention is directed to a safety system integrated into a liquid-insulated high voltage network grounding switch, including modifications to the switch structure to provide an arrangement that is more efficiently installed with greater precision than found in conventional arrangements. The result is a switch assembly that adheres to updated IEEE/ANSI Standards, while still fitting into existing vault space meant to accommodate earlier switch gear.
US09530589B2 Key board of mobile phone
A key board of mobile phone applied in key circuit of mobile phone is provided. A first electrode, a second electrode and a third electrode are disposed on a printed circuit board (PCB), the second electrode is disposed around the first electrode in circular form, tooth profile structures disposed matched with the third electrode are extended from an outer side of the second electrode, the third electrode is connected with the first electrode, the setting can be applied to various types of keys. The key board of the mobile phone can not only be applied to the dome keys, but also the carbon granule keys. If customers need different designs of keys, the new keys are needed to be redesign, and a new main board is not necessary to design, which greatly saves development time and lowers the cost.
US09530586B2 Touch switch device with illuminator
A touch switch device with an illuminator for detecting a close approach or contact of a human body to an operation surface includes: a wiring board having a light-emitting device and a detection electrode on a one surface side; a light guide plate located on the one surface side of the wiring board to emit light from the light-emitting device to the outside from the operation surface opposite the wiring board; and a detector connected with the detection electrode to detect change in electrostatic capacity to be generated at the detection electrode when a human body closely approaches or contacts the operation surface to produce a detection signal corresponding to the detected condition. An operation part is displayable on a surface of the light guide plate to serve as the operation surface, and the operation part is positioned corresponding to a position of the detection electrode.
US09530584B2 Common switch device for vehicle
A common switch device for a vehicle capable of serving as a communicative switch module and a non-communicative switch module includes a switch module including a plurality of common switches. A connector module is detachably coupled with the switch module. The connector module includes a housing installed with a printed circuit board (PCB) in which a communication chip is built in. A plurality of connectors mounted on the PCB, each being connected to one of the common switches of the switch module, and separately connected to the communication chip.
US09530583B2 Device for an outdoor switching apparatus
This invention concerns a device for an outdoor switching apparatus of an electrical power line, the switching apparatus being enclosed within a case. The device includes a wall made of electrically conductive material capable of blocking sun rays. The device also includes a fastening assembly for fastening the wall with respect to the case in a position for blocking, at least partially, sun rays from hitting the case during day time. The fastening assembly has at least one spacer made of insulating material for spacing the wall with respect to the case, thus delimiting an air gap between the wall and the case. The device also includes at least one electrical connector for electrically connecting the wall to circuitry of the switching apparatus, located inside the case, for powering and voltage monitoring.
US09530582B2 Energized parts guard
An energized parts guard is disclosed includes a panel of substantially rigid, electrically insulative material wherein the substantially rigid panel further includes a first one or more apertures and a second one or more apertures. The first one or more apertures are so dimensioned to accept one or more circuit breakers inserted into the first one or more apertures such that there is less than a 12.5 millimeter gap between the panel and the circuit breaker on at least two sides of the one or more circuit breakers. The second one or more apertures are positioned to facilitate access to at least one terminal of each of the one or more circuit breakers when the one or more circuit breakers are inserted into the first one or more apertures.
US09530580B2 Drive for a switching device
A drive, for a switching device including a contact system with a fixed and a moving contact, including an actuator for operating the moving contact for closing or opening the contact system, and also a mechanical transmission device arranged between the moving contact and the actuator. The transmission device includes a toggle joint mechanism formed by a folding lever, pivotable about a stationary bearing, and a coupling element, connected to the folding lever via a moving bearing. The toggle joint mechanism is pivotable between a first end position and a second end position. When the changeover is made from the first to the second end position or vice versa, a maximum extended position occurs. The coupling element holds the moving contact in that position which closes the contact system in the first end position and in that position in which the contact system is open in the second end position.
US09530579B2 Bypass switch
Provided is a bypass switch with the closing time shortened. A bypass switch using a vacuum valve having a fixed contact and a movable contact includes: an insulating rod having one end side connected to the movable contact; a closing spring fitted to the other end side of the insulating rod, and having a closing function to close the contacts and a contact-pressing function to apply pressure to the contacts; and an operation unit having a latch function to keep a contact-opened state, and connected to the other end side of the insulating rod, wherein the insulating rod, the closing spring, and the operation unit are arranged in series along the axial direction of the vacuum valve.
US09530577B2 Circuit breaker
A circuit breaker, including a circuit breaker body, a handle, a bottom box, and a bearing plate. The circuit breaker body includes an upper cover, and a notch groove is formed on the upper cover. Two ends of the notch groove are positioned in the on/off position corresponding to the circuit breaker. The handle extends out of the notch groove. A circuit breaker actuating mechanism, a wire inlet end, and a wire outlet end are arranged on the bottom box. The circuit breaker actuating mechanism is triggered by the handle. The bearing plate is arranged between the upper cover and the bottom box and combined with an electrical operating mechanism. The handle is switched in the on/off state during the operation of the electrical operating mechanism under the control of an automatic closing control unit.
US09530572B2 Solar cell device
A photovoltaic cell including: (a) a housing including an at least partially transparent cell wall having an interior surface; (b) an electrolyte, disposed within the cell wall, and containing an iodide based species; (c) a transparent electrically conductive coating disposed on the interior surface; (d) an anode disposed on the conductive coating, the anode including: (i) a porous film containing titania, the porous film adapted to make intimate contact with the iodide based species, and (ii) a dye, absorbed on a surface of the porous film, the dye and the porous film adapted to convert photons to electrons; (e) a cathode disposed on an interior surface of the housing, and disposed substantially opposite the anode; (f) electrically-conductive metallic wires, disposed at least partially within the cell, the wires electrically contacting the anode and the electrically conductive coating, and (g) a second electrically conductive coating including an inorganic binder and an inorganic electrically conductive filler, the second coating bridging between and electrically communicating between each of the wires and the transparent coating, the wires adapted to boost collection of a current generated by the cell.
US09530569B2 Method for manufacturing solid electrolytic capacitor element
The present invention provides a method for manufacturing a solid electrolytic capacitor element, wherein a dielectric layer, a semiconductor layer, a carbon layer and a silver layer are sequentially formed on a tungsten base material. This method is characterized in that: the formation of the carbon layer is carried out by laminating a carbon paste on the semiconductor layer; the carbon paste is an aqueous resin solution containing carbon particles; and a repair formation treatment is carried out after the formation of the carbon layer but before the formation of the silver layer. The time duration of the repair formation treatment is 1-40 minutes; the current density is 0.05-2.5 mA/piece; and the treatment temperature is 0-40° C.
US09530568B2 Method of manufacturing conductive polymer microparticle dispersion and method of manufacturing electrolytic capacitor containing the conductive polymer microparticle dispersion
At least one monomer selected from thiophenes and their derivatives is oxidatively polymerized with an oxidizing agent in a solvent mainly composed of water in the presence of a polyanion as a dopant. This conductive polymer microparticle dispersion is manufactured by using, as the polyanion, a polystyrene sulfonic acid and/or its salt each having a Hazen color number in the range of 10 to 1000, inclusive, when the hue of a 2% aqueous solution thereof is measured by the APHA method.
US09530563B2 Dielectric ceramic composition and dielectric element
The present invention relates to a dielectric ceramic composition which is complex oxides represented by the following formula (1), {[(BisNat)a(BiuKv)bBac]1-dAd}xTi1-dNbdO3 (1), wherein, in formula (1), A represents at least one element selected from the group consisting of Li, Na and K, and a, b, c, d, s, t, u, v and x are numbers respectively satisfying the following formulae, 0.10≦a≦0.95, 0.00
US09530561B2 Monolithic ceramic capacitor, monolithic ceramic capacitor array, and monolithic ceramic capacitor mounting structure
A monolithic ceramic capacitor includes a plurality of first and second inner electrodes in a ceramic body. A direction in which the first and second inner electrodes are stacked is a stacking direction, a direction perpendicular or substantially perpendicular to the stacking direction in the ceramic body is a length direction, and a direction perpendicular or substantially perpendicular to the stacking direction and the first direction is a width direction. The ceramic body includes an effective portion, a first outer layer portion, a second outer layer portion, a first side portion, and a second side portion. A ratio A/B is about 0.04 or less when a dimension of each of the first side portion and the second side portion in the width direction is A and a dimension of the effective portion in the stacking direction is B.
US09530559B2 Multi-turn electrical coil and fabricating device and associated methods
A coil former provides for restricted cross-over locations for a coil resulting in an optimum wire packing at all points within the coil. The coil former has a first side wall in a spaced relation to an opposing second side wall, wherein a cavity formed between the side walls accommodates multiple turns of wire for forming a coil. A block is fixed between the opposing first and second side walls and has its peripheral wall surface tapered from the first wall surface inwardly toward the opposing second wall surface for preferentially receiving and positioning turns of wire forming the coil.
US09530558B2 Energy receiver, detection method, power transmission system, detection device, and energy transmitter
An energy receiver includes: a power receiver coil configured to wirelessly receive power transmitted from a power transmitter; a detection section configured to detect a foreign object; and a power storage section configured to supply power to the detection section during detection of the foreign object.
US09530557B2 Working machine powered in a non-contact manner
There is provided a working machine including a guide beam having a power transmitter; at least one working head comprising a power receiver and configured to move along the guide beam, wherein the power receiver receives power from the power transmitter in a non-contact manner in which the power receiver and the power transmitter are not physically connected, and wherein the working head operates by the received power in the non-contact manner.
US09530556B2 Multiple resonant cells for wireless power mats
A method of configuring windings in an inductive charging pad array by using capacitors for impedance control and configuring windings to reduce the stray magnetic fields produced.
US09530548B2 Method for manufacturing Sr ferrite particle for sintered magnet, method for using Sr ferrite particle, Sr ferrite sintered magnet and method for manufacturing same, and motor and generator
Provided is a method for producing Sr ferrite particles for sintered magnets, the method includes: a mixing step of mixing an iron compound, a strontium compound, and an alkali metal compound which includes at least one of K and Na as a constituent element and which does not include Cl and S as the constituent element to prepare a mixture; and a calcining step of firing the mixture at 850° C. to 1100° C. to obtain Sr ferrite particles in which an average particle size of primary particles is 0.2 to 1.0 μm. In the mixing step, the alkali metal compound is mixed in such a manner that a total amount of K and Na becomes 0.03 to 1.05% by mass in terms of K2O and Na2O with respect to a total amount of a powder of the iron compound and a powder of the strontium compound.
US09530546B2 Chip resistor and method of producing the same
[Subject]To provide a chip resistor free from chipping of corner portions thereof and a method of producing the chip resistor.[Solution] The chip resistor (1) includes: a board (2) having a device formation surface (2A), a back surface (2B) opposite from the device formation surface (2A) and side surfaces (2C-2F) connecting the device formation surface (2A) to the back surface (2B), a resistor portion (56) provided on the device formation surface (2A), a first connection electrode (3) and a second connection electrode (4) provided on the device formation surface (2A) and electrically connected to the resistor portion (56), and a resin film (24) covering the device formation surface (2A) with the first connection electrode (3) and the second connection electrode (4) being exposed therefrom. Intersection portions (11) of the board (2) along which the back surface (2B) intersects the side surfaces (2C-2F) each have a rounded shape.
US09530542B2 Shielded cable
A shielded cable includes an insulated wire including a conductor wire and an insulation formed around the conductor wire, and a shield layer formed around the insulated wire and including a shield wire. The shield wire includes a tubular member including a conductive material and defining a gap therein, and a magnetic powder is filled in the gap.
US09530541B2 Cable with spring steel or other reinforcement member(s) for stable routing between support points
An apparatus includes a cable having at least one signal transport line and at least one reinforcement member. The at least one signal transport line is configured to transport one or more signals through the cable. The at least one signal transport line and the at least one reinforcement member are twisted in a common direction around a central axis of the cable, where the central axis extends in a longitudinal direction along a length of the cable. A twist rate of the at least one signal transport line substantially equals a twist rate of the at least one reinforcement member. At least part of each signal transport line is physically located between adjacent twists of each reinforcement member in the longitudinal direction of the cable.
US09530539B2 Readily strippable cable
A cable having conductors that may be easily exposed in preparation for electrical connection, without requiring the use of tools, is provided. The cable has an insulating layer having at least one relatively weak portion that extends along the length of the cable, which allows the insulating layer to split as the wires are pulled apart, thereby exposing the wires without the use of tools. The wires themselves may, similarly, have a weakened portion thus allowing the conductors themselves to be exposed in preparation for electrical connection, without requiring the use of tools.
US09530537B2 Halogen-free propylene-based insulation and conductor coated with same
The present disclosure is directed to a halogen-free composition and conductors coated with the halogen-free composition. The halogen-free composition includes (A) from 70 wt % to 85 wt % of a polymeric component and (B) from 30 wt % to 15 wt % of a halogen-free flame retardant. The polymeric component (A) includes (i) a propylene homopolymer or a mini-random copolymer with greater than 40% crystallinity and (ii) an ethylene/a-olefin copolymer. The halogen-free composition has a density less than 1.15 g/cc. The halogen-free composition also has a scrape abrasion resistance of greater than or equal to 350 cycles as measured in accordance with ISO 6722.
US09530536B2 Non-halogen multilayer insulated wire and method for producing the same
A non-halogen multilayer insulated wire includes a conductor, an inner layer covering the conductor, and an outer layer formed on the external surface of the inner layer. The inner layer includes a polyolefin resin composition including 60 to 95 parts by mass of a high density polyethylene, 5 to 40 parts by mass of an ethylene copolymer, and 0.1 to 1 part by mass of a metal damage inhibitor. The outer layer includes a polyester resin composition that includes a base polymer mainly including a polyester resin, and further includes, relative to 100 parts by mass of the base polymer, 50 to 150 parts by mass of a polyester block copolymer, 0.5 to 5 parts by mass of a hydrolysis inhibitor, 0.5 to 5 parts by mass of an inorganic porous filler, and 10 to 30 parts by mass of magnesium hydroxide.
US09530535B2 Hydrogen-free amorphous dielectric insulating thin films with no tunneling states
A hydrogen-free amorphous dielectric insulating film having a high material density and a low density of tunneling states is provided. The film is prepared by e-beam deposition of a dielectric material on a substrate having a high substrate temperature Tsub under high vacuum and at a low deposition rate. In an exemplary embodiment, the film is amorphous silicon having a density greater than about 2.18 g/cm3 and a hydrogen content of less than about 0.1%, prepared by e-beam deposition at a rate of about 0.1 nm/sec on a substrate having Tsub=400° C. under a vacuum pressure of 1×10−8 Torr.
US09530530B2 Scintillator panel, radiation detector, and methods for manufacturing the same
A method is provided for manufacturing a scintillator panel including a substrate and a scintillator layer containing a plurality of crystals formed by depositing a scintillator material on a deposition surface of the substrate. The method includes depositing the scintillator material on the deposition surface of the substrate such that the scintillator material incidents on the deposition surface obliquely with respect to the normal to the deposition surface, and varying the angle between a reference direction on the deposition surface and a projected incident direction that is obtained by projecting the direction of the scintillator material incident onto the deposition surface. In the vapor deposition, the amount of the scintillator material deposited on the deposition surface changes according to the angle between the projected incident direction and the reference direction.
US09530528B2 X-ray tube aperture having expansion joints
An x-ray tube electron shield is disclosed for interposition between an electron emitter and an anode configured to receive the emitted electrons. The electron shield includes expansion joints to accommodate thermal expansion.
US09530525B2 Locking fastener for securing components in a nuclear reactor
A threaded fastener includes a head, a threaded shank extending from a bottom face of the head along a longitudinal axis of the fastener, and an annular flange oriented transverse to the longitudinal axis and surrounding the bottom face of the head. A surface has a receiving hole in which the shank of the threaded fastener is disposed with the bottom face of the head contacting the surface. The surface further has a crimping recess spaced apart from the receiving hole. A portion of the annular flange overlaps and is deformed into the crimping recess. The fastener may be a screw or bolt. In the case of a bolt, a nut engages the distal end of the threaded shank. The nut also includes an annular flange that is deformed into a crimping recess on a surface proximate to the nut.
US09530524B2 Localised energy concentration
A method of producing a localized concentration of energy comprises creating at least one shockwave (10) propagating through a non-gaseous medium (8) so as to be incident upon a pocket of gas (2) within the medium (8). The pocket of gas (2) is attached to a surface (6) comprising a depression (4) shaped so as partially to receive the gas pocket (2). An apparatus for producing a localized concentration of energy comprises a non-gaseous medium (8) having therein a pocket of gas (2). The pocket of gas (2) is attached to a surface (6) comprising a depression (4) shaped so as partially to receive the gas pocket (2). The apparatus further comprises means for creating at least one shockwave (10) propagating through the medium (8) so as to be incident upon the pocket of gas (2).
US09530523B2 Thermal disturb as heater in cross-point memory
The present disclosure relates to thermal disturb as heater in cross-point memory. An apparatus includes a memory controller. The memory controller is configured to identify a target memory cell in response to at least one of a selection failure and a set fail memory read error associated with the target memory cell. The memory controller is further configured to apply a first sequence of recovery pulses to a first number of selected adjacent memory cells adjacent the target memory cell, the first sequence of recovery pulses configured to induce heating in the target memory cell.
US09530520B2 Shift register unit, GOA circuit, array substrate and display device
A shift register unit, a GOA circuit, an array substrate and a display device are provided. The shift register unit comprises an input module, a charging module, a reset module, a first switch module T1 and a second switch module T2. A output terminal of the input module is connected to gate line Gi through T1 and connected to gate line Gi+3 through T2, gates of T1 and T2 are connected to a first clock signal line and a second clock signal line having a phase difference of half of a cycle. The gate lines Gi−1 and Gi+2 are connected to the input terminal of the input module through the charging module; the gate lines Gi+1 and Gi+4 are connected to the input terminal and the output terminal of the input module through the reset module. One shift register unit is shared by two gate lines, which reduces the area occupied by the GOA circuit on the array substrate, and satisfies the requirement of narrow frames of the array substrate.
US09530519B2 Scan driver and display device including the same
A scan driver and a display device including the scan driver are provided. The scan driver is configured to drive a plurality of pixels with a plurality of gate signals and includes a plurality of stages, each of the stages including one or more regions, each of the regions including: a plurality of sub-drivers configured to generate ones of the gate signals and to transmit the ones of the gate signals to ones of the pixels; and a driver commonly coupled to the sub-drivers and configured to concurrently supply a common signal to each of the sub-drivers, the driver of one of the one or more regions being configured to receive the common signal of one of the one or more regions of a previous one of the stages during forward direction driving or of a next one of the stages during reverse direction driving.
US09530518B2 Semiconductor device
A control circuit controls execution of first-stage processing for increasing a threshold voltage of both or one of a first storage element and a second storage element until the threshold voltage of the first storage element and the second storage element attains to a prescribed write verify level when a request for erase of twin cell data is received. The control circuit controls execution of second-stage processing for lowering a threshold voltage of the first storage element and the second storage element until the threshold voltage of the first storage element and the second storage element attains to a prescribed erase verify level after the first-stage processing is performed.
US09530515B2 Determining read voltages for reading memory
A method of reading data at a data storage device that includes a non-volatile memory includes identifying a first set of storage elements of a first word line of the non-volatile memory that satisfy a condition. The condition is based on one or more states of one or more storage elements. The method includes determining a first read voltage corresponding to the first set of storage elements of the first word line and determining a second read voltage corresponding to a second set of storage elements of the first word line that do not satisfy the condition. The method includes reading data from the first word line by applying the first read voltage to the first set of storage elements of the first word line and applying the second read voltage to the second set of storage elements of the first word line.
US09530514B1 Select gate defect detection
Detecting defects in select gates of memory cell strings is disclosed. An electrical short between adjacent select gates may be detected. The select gate may comprises a transistor having an adjustable threshold voltage. An operation configured to change a threshold voltage of one select transistor and to maintain a threshold voltage of an adjacent select transistor may be performed. The select transistors may be flagged in response to the threshold voltage of either select transistor failing to meet a target threshold voltage in response to the operation. The operation may be an erase operation or a program operation.
US09530510B2 Nonvolatile semiconductor memory device
A nonvolatile semiconductor memory device includes a control circuit configured to control a soft program operation of setting nonvolatile memory cells to a first threshold voltage distribution state of the nonvolatile memory cells. When a characteristic of the nonvolatile memory cells is in a first state, the control circuit executes the soft program operation by applying a first voltage for setting the nonvolatile memory cells to the first threshold voltage distribution state to first word lines, and applying a second voltage higher than the first voltage to a second word line. When the characteristic of the nonvolatile memory cells is in a second state, the control circuit executes the soft program operation by applying a third voltage equal to or lower than the first voltage to the first word lines and applying a fourth voltage lower than the second voltage to the second word line.
US09530504B2 Memory cells using multi-pass programming
A method is provided for programming non-volatile memory cells. The non-volatile memory cells are accessible by a plurality of word lines. The method includes using a four-pass programming technique to program a block of the non-volatile memory cells.
US09530503B2 And-type SGVC architecture for 3D NAND flash
A memory device includes a plurality of strings of memory cells. A plurality of stacks of conductive strips includes first upper strips configured as first string select lines for the strings in the plurality of strings, second upper strips configured as second string select lines for the strings in the plurality of strings, and intermediate strips configured as word lines for the strings in the plurality of strings. The memory device includes control circuitry coupled to the first string select lines and the second string select lines, and configured to select a particular string in the plurality of strings by applying a first turn-on voltage to a first string select line in the first string select lines coupled to the particular string, and a second turn-on voltage to a second string select line in the second string select lines coupled to the particular string.
US09530502B2 Configuration memory storing data by injecting carriers in gate insulating layer of MISFET
A configuration memory includes: memory cell including first and second MISFETs, each of the first and second MISFETs having a gate insulating layer, a source, a drain, and a gate, one of the source and the drain of the first MISFET being connected to a first bit line, the gate of the first MISFET being connected to a first word line, one of the source and the drain of the second MISFET being connected to a second bit line, the gate of the second MISFET being connected to the first word line; a sense amplifier having an output terminal and connected to the first and second bit lines; and a control circuit which is configured to write data in the memory cell by injecting carriers in the gate insulating layer of the first MISFET.
US09530501B2 Non-volatile static random access memory (NVSRAM) having a shared port
A nonvolatile memory device includes a shared port block, a plurality of decoded address signals, a read signal, and a read word line. The shared port block includes a shared port communicatively coupled to a block, the block comprising a plurality of memory cells, wherein the shared port is operable to sense a voltage level at each of the plurality of memory cells. The plurality of decoded address signals are communicatively coupled to the block. Each of the plurality of decoded address signals is operable to enable a corresponding one of the plurality of memory cells. The read signal is communicatively coupled to the shared port. The read signal is operable to enable a read operation associated with the block. The read word line signal is communicatively coupled to the shared port block. The read word line signal is operable to enable the read operation.
US09530500B2 Converting an XY TCAM to a value TCAM
Approaches for an integrated circuit ternary content addressable memory (TCAM) are provided. A system includes an array of XY TCAM cells and respective translation circuits connected to respective pairs of the XY TCAM cells. The system also includes a memory controller structured to provide control signals to the respective translation circuits. The memory controller and respective translation circuits are structured to control the array of XY TCAM cells to perform single cycle update and single cycle search operations.
US09530499B2 Semiconductor memory device and information processing device
According to one embodiment, a semiconductor memory device includes a memory and a controller. The memory stores data pieces and search information including entries, where each entry is associated with a search key for specifying one data piece and a real address at which the data piece is stored. Upon reception of a first command, the controller, when the first command specifies a search key, outputs one data piece corresponding to one entry which includes the search key, and when the first command specifies one real address, outputs one data piece corresponding to one entry including the real address.
US09530498B2 Optical data store and method for storage of data in an optical data store
An optical data store is specified, having a data storage layer with a non-toxic and biodegradable polymer as light-sensitive storage medium which has photo-inducible anisotropy, for the induction of which a threshold value of the optical intensity has to be exceeded. The light-sensitive material is preferably bacteriorhodopsin which, by way of example, is immobilized in a manner embedded in a suitable matrix material or, if appropriate, in a crosslinked manner. The storage medium permits a high storage density and can be applied in a simple manner, for instance by printing onto a substrate.
US09530495B1 Resistive switching memory having a resistor, diode, and switch memory cell
In one embodiment, a semiconductor memory device includes a plurality of resistive switching memory cells, where each resistive switching memory cell can include: (i) a programmable impedance element having an anode and a cathode; (ii) an access transistor having a drain coupled to a bit line, a source coupled to the programmable impedance element cathode, and a gate coupled to a word line; (iii) a well having a first diffusion region configured as the source, a second diffusion region configured as the drain, and a third diffusion region configured as a well contact; and (iv) a diode having a cathode at the second diffusion region, and an anode at the third diffusion region, where the diode is turned on during an erase operation on the programmable impedance element.
US09530490B2 Compaction process for a data storage device
A data storage device may include a memory die. The memory die may include a memory. A method may include selecting a source compaction block of the memory for a compaction process. The source compaction block stores data. The method may further include writing the data to a destination compaction block of the memory at a rate that is based on a number of multiple blocks of the memory associated with the compaction process.
US09530488B1 Methods, apparatus and system determining dual port DC contention margin
At least one method, apparatus and system disclosed involves testing a dual port memory cell in a memory device. A semiconductor wafer is processed for providing a dual port memory device. An inline DC contention margin test is performed for testing a contention margin related to a write operation into a cell of the memory device. A determination is made as to whether the contention margin is within a predetermined range. A responsive action is performed in response to determining that the contention margin is outside the predetermined range.
US09530480B2 Semiconductor memory device
A semiconductor memory device is capable of executing a first mode having a first latency and a second mode having a second latency longer than the first latency. The semiconductor memory device includes: a pad unit configured to receive an address and a command from an outside; a first delay circuit configured to delay the address by a time corresponding to the first latency; a second delay circuit including shift registers connected in series and configured to delay the address by a time corresponding to a difference between the first latency and the second latency; and a controller configured to use the first delay circuit and the second delay circuit when executing the second mode.
US09530479B2 Method and apparatus for increasing the reliability of an access transistor coupled to a magnetic tunnel junction (MTJ)
A method is disclosed for writing a magnetic tunnel junction (MTJ) of a magnetic memory array by switching a magnetic orientation associated with the MTJ from anti-parallel to parallel magnetic orientation. One end of the MTJ is coupled to a bit line while the opposite end of the MTJ is coupled to one end of an access transistor. The method includes the steps of applying a gate voltage that is approximately a sum of a first voltage and a second voltage to a gate of the access transistor with the second voltage being less than the first voltage; raising the bit line to the first voltage; and applying the second voltage to the opposite end of the access transistor to program the MTJ while maintaining a voltage difference between the gate and the one end of the access transistor to be less than or equal to the first voltage.
US09530477B2 Apparatuses and methods for setting a signal in variable resistance memory
An example of a method reads a spin torque transfer (STT) memory cell, and writes the STT memory cell using information obtained during the reading of the STT memory cell to set a pulse to write the STT memory cell. An example of an apparatus includes a STT memory cell and read/write circuitry coupled to the STT memory cell to determine a read current (IREAD) through the STT memory cell and to set a pulse to write the STT memory cell using IREAD. Additional embodiments are disclosed.
US09530475B2 Independently addressable memory array address spaces
Examples of the present disclosure provide devices and methods for accessing a memory array address space. An example memory array comprising a first address space comprising memory cells coupled to a first number of select lines and to a number of sense lines and a second address space comprising memory cells coupled to a second number of select lines and to the number of sense lines. The first address space is independently addressable relative to the second address space.
US09530473B2 Apparatuses and methods for timing provision of a command to input circuitry
An apparatus or method may include provision of a command to a data block. An example apparatus includes a command circuit configured to provide a command signal in an internal clock time domain based at least in part on a memory access command received in an external clock time domain. The example apparatus further includes a command path delay configured to delay the command signal. The example apparatus further includes a data strobe generator circuit configured to receive the command signal and a data strobe signal. A plurality of clock edges of the data strobe signal correspond to received data bits associated with the memory access command. The data strobe generator circuit is configured to control input circuitry to capture the data associated with the memory access command based at least in part on the data strobe signal and the command signal.
US09530472B1 Data alignment device
A data alignment device includes a buffer configured to buffer a data strobe signal, output a data strobe pulse signal, and buffer inputted data, a latch configured to latch the data in correspondence to the data strobe pulse signal, a first delay configured to delay the data strobe pulse signal and output a delayed signal, a divider configured to divide the delayed signal at a time of activation of a division control signal and generate a plurality of divided signals, a control circuit configured to receive a command signal, a clock, the data strobe signal, and the plurality of divided signals, and control the division control signal for controlling an enable state of the divider, and an alignment circuit configured to align output data in correspondence to the plurality of divided signals.
US09530467B1 Semiconductor memory device and operating method thereof
Disclosed are a semiconductor memory device and an operating method thereof. The semiconductor memory device may include a memory cell array, a page buffer group, and a control logic. The memory cell array may include a first memory string and a second memory string, which have different channel lengths. The page buffer group may perform a sensing operation on the memory cell array in response to a page buffer sensing signal. The control logic may control the page buffer group to perform the sensing operation, and, during the sensing operation and output the adjusted page buffer sensing signal, may adjust a voltage level of the page buffer sensing signal according to a selected memory string.
US09530465B2 Semiconductor memory device
A semiconductor memory device includes a first global line suitable for inputting/outputting data from/to a first bank, a second global line suitable for inputting/outputting data from/to a second bank, a multi-purpose register (MPR) suitable for loading data having a predetermined value on the first global line in a training mode, a first data input/output (I/O) unit suitable for inputting/outputting data between one of the first and second global lines and a first data pad and selectively transferring data loaded on the first global line to the second global line in response to a bandwidth option in the training mode, and a second data I/O unit enabled in response to the bandwidth option, suitable for inputting/outputting data between the second global line and a second data pad.
US09530462B2 Memory cell with decoupled read/write path
A memory cell with a decoupled read/write path, the memory cell includes a switch comprising a gate, a first terminal and a second terminal, a resistive switching device connected to the gate of the switch, and a conductive path between the gate of the switch and the second terminal.
US09530451B2 Reducing network bandwidth usage in a distributed video editing system
Techniques are disclosed for reducing the amount of network bandwidth used by a distributed video editing system. A server dynamically chooses from among several encoding options, depending on the context and network conditions. The server makes every attempt to transmit a given video frame only once over the network. Depending on network performance, the quality of the transmitted video may vary. A frame identification technique is used to improve efficiency to avoid duplication of rendering work. On the client, the frame identity is used by the client to cache the frames individually, at varying qualities. These frames are cached on the client indefinitely. When the client prepares to play a frame, it examines its local cache of frames and chooses either a local cached frame or requests a remote frame at a different quality, based on the context.
US09530442B1 Enhanced low overhead data protection in data storage drives
To provide enhanced operation of data storage devices and systems, various systems, apparatuses, methods, and software are provided herein. In a first example, a data storage device is presented that performs a write process to store data on a storage medium of the data storage device responsive to one or more write operations received over a host interface. The data storage device monitors a quality of the write process and determines when the quality of the write process falls below a threshold quality. Responsive to the quality of the write process falling below the threshold quality, the data storage device indicates the quality of the write process to a data protection node that determines data parity information for the data to compensate for the quality of the write process. The data storage device receives the data parity information and stores the data parity information.
US09530441B2 Suspension assembly, head suspension assembly and disk device with the same
According to one embodiment, a suspension assembly includes a support plate, a trace member on the support plate and a drive element mounted on the trace member. The trace member includes a metal plate, and a multilayered member on the metal plate. The multilayered member includes a first insulating layer, a conductive layer stacked on the first insulating layer, a second insulating layer stacked on the conductive layer. The multilayered member includes a mount portion on which the drive element is mounted, and a branching portion arranged along the mount portion with a gap therebetween. At least one portion of the branching portion is formed into a thin portion having a thickness less than other portions of the multilayered member.
US09530437B2 Magnetic head, head gimbal assembly, and magnetic recording and reproducing apparatus
A magnetic head has a magnetic head slider that includes a recording element that generates a recording signal magnetic field, a microwave magnetic field generating element that generates a microwave magnetic field, a terminal electrode, and a first transmission line that interconnects the terminal electrode and the microwave magnetic field generating element. A second transmission line is connected to the terminal electrode, the second transmission line being used to transmit a microwave signal from the outside of the magnetic head slider to the magnetic head slider. A capacitor connected to the first transmission line is provided between the terminal electrode and the microwave magnetic field generating element. Accordingly, in the magnetic head, a microwave signal is efficiently propagated.
US09530436B1 Methods and systems for providing data security in data storage devices
A data storage device comprising a storage media and a controller is disclosed. The controller is configured to receive a write command including a logical address and new data associated with the logical address, to write the new data to a new physical address on the storage media, and to remove old data associated with the logical address from an old physical address on the storage media, wherein the new physical address and the old physical address are different.
US09530434B1 Reducing octave errors during pitch determination for noisy audio signals
Octave errors may be reduced during pitch determination for noisy audio signals. Pitch may be tracked over time by determining amplitudes at harmonics for individual time windows of an input signal. Octave errors may be reduced in individual time windows by fitting amplitudes of corresponding harmonics across successive time windows to identify spurious harmonics caused by octave error. A given harmonic may be identified as either being associated with the same pitch as adjacent harmonics in the given time window or being spurious based on parameters of the fitting function.
US09530426B1 Filtering sounds for conferencing applications
A conferencing system includes a near-eye display device that displays video received from a remote communication device of a communication partner. An audio stream is transmitted to the remote communication device. The audio stream includes real-world sounds produced by one or more real-world audio sources captured by a spatially-diverse microphone array and virtual sounds produced by one or more virtual audio sources. A relative volume of background sounds in the audio stream is selectively reduced based, at least in part, on real-world positioning of corresponding audio sources, including real-world and/or virtualized audio sources.
US09530424B2 Upsampling using oversampled SBR
An encoder (250) comprises a core encoder (252) for encoding a low frequency component of the audio signal at the signal sampling rate (fs_in) and a spectral band replication-referred to as SBR-encoding unit (153, 254) for determining a plurality of SBR parameters. A plurality of the SBR parameters is determined such that a high frequency component of the audio signal can be approximated based on the low frequency component of the audio signal and the plurality of SBR parameters. A multiplexer (155) is adapted to generate an overall bitstream comprising the core encoded bitstream, the plurality of SBR parameters and an indication of one or more SBR encoder settings applied by the SBR encoder (153, 254); wherein the generated overall bitstream does not indicate that the core encoded bitstream has been determined by encoding the low frequency component at the signal sampling rate (fs_in).
US09530422B2 Bitstream syntax for spatial voice coding
An encoding system (100) encodes a first (E1) and further (E2, E3) audio signals as a layered bitstream (B), wherein a quantizer for each frequency band of each signal is selected using a rate allocation rule based on signal-specific rate allocation data, a spectral envelope of the signal and a reference level (EnvE1Max), which is determined based on the spectral envelope of the first signal and is not necessarily included in the bitstream. Further disclosed is a decoding system for reconstructing the audio signals based on the bitstream. In embodiments, the bitstream has a basic layer (BE1), which contains data that enable decoding of the first audio signal, and a spatial layer (Bspatial) facilitating decoding of the further audio signal(s). In embodiments, the encoding system prepares the bitstream subject to a basic-layer bitrate constraint and a total bitrate constraint.
US09530421B2 Encoding and reproduction of three dimensional audio soundtracks
The present invention provides a novel end-to-end solution for creating, encoding, transmitting, decoding and reproducing spatial audio soundtracks. The provided soundtrack encoding format is compatible with legacy surround-sound encoding formats, so that soundtracks encoded in the new format may be decoded and reproduced on legacy playback equipment with no loss of quality compared to legacy formats.
US09530415B2 System and method of providing speech processing in user interface
Disclosed are systems, methods and computer-readable media for enabling speech processing in a user interface of a device. The method includes receiving an indication of a field and a user interface of a device, the indication also signaling that speech will follow, receiving the speech from the user at the device, the speech being associated with the field, transmitting the speech as a request to public, common network node that receives and processes speech, processing the transmitted speech and returning text associated with the speech to the device and inserting the text into the field. Upon a second indication from the user, the system processes the text in the field as programmed by the user interface. The present disclosure provides a speech mash up application for a user interface of a mobile or desktop device that does not require expensive speech processing technologies.
US09530407B2 Spatial audio database based noise discrimination
Methods, systems, and computer-readable and executable instructions for spatial audio database based noise discrimination are described herein. For example, one or more embodiments include comparing a sound received from a plurality of microphones to a spatial audio database, discriminating a speech command and a background noise from the received sound based on the comparison to the spatial audio database, and determining an instruction based on the discriminated speech command.
US09530406B2 Apparatus and method for recognizing voice
An apparatus and a method for recognizing a voice include a plurality of array microphones configured to have at least one microphone, and a seat controller configured to check a position of a seat provided in a vehicle. A microphone controller is configured to set a beam forming region based on the checked position of the seat and controls an array microphone so as to obtain sound source data from the set beam forming region.
US09530404B2 System and method of automatic speech recognition using on-the-fly word lattice generation with word histories
A systems, article, and method of automatic speech recognition using on-the-fly word lattice generation with word histories.
US09530403B2 Terminal and server of speaker-adaptation speech-recognition system and method for operating the system
Provided are a terminal and server of a speaker-adaptation speech-recognition system and a method for operating the system. The terminal in the speaker-adaptation speech-recognition system includes a speech recorder which transmits speech data of a speaker to a speech-recognition server, a statistical variable accumulator which receives a statistical variable including acoustic statistical information about speech of the speaker from the speech-recognition server which recognizes the transmitted speech data, and accumulates the received statistical variable, a conversion parameter generator which generates a conversion parameter about the speech of the speaker using the accumulated statistical variable and transmits the generated conversion parameter to the speech-recognition server, and a result displaying user interface which receives and displays result data when the speech-recognition server recognizes the speech data of the speaker using the transmitted conversion parameter and transmits the recognized result data.
US09530399B2 Electronic device for providing information to user
The present disclosure relates to an electronic device and a method which may visually provide information to a user, and notify the user of the information through other senses (e.g., a tactile sense, a hearing sense, etc.). The method includes performing voice guidance of information displayed on the touch screen in a predetermined order, detecting a user's input through the touch screen, and changing the order and performing the voice guidance in the changed order, when the detected user's input is a direction change input.
US09530396B2 Visually-assisted mixing of audio using a spectral analyzer
Processor-implemented methods and systems for visually-assisted mixing of audio using a spectral analyzer are disclosed. The system calculates and displays a spectral view for each track in an arrangement in a multi-track view. A user can then request modification of the spectral view. In response to this request for modification, the system automatically adjusts associated mixing parameters for the modified track so that the spectral output of the track substantially matches the user-requested modified spectral view. This allows a user to visually mix an arrangement by imputing a desired spectral result and having the program make the changes necessary to achieve it.
US09530394B1 Ergonomic instrument strap
An ergonomic instrument strap designed to eliminate pressure points on a user's shoulder, neck, and back, and wear points on the strap. Unique curves in a portion of the strap draw the downward force out toward user's arm while shifting the strap off a user's shoulder blade, reducing fatigue on neck, back, and shoulder muscles. A wider portion over the shoulder helps to distribute force over wider area, reducing stress load on any one point. Additional layers of cloth and padding help to prevent strong downward forces, increasing comfort for the user. May be left orientation, right orientation, or reversible. Strap may include end pieces. Strap end pieces contain pockets with opening facing the user's body to allow the user to quickly recover if a pick is lost. Side opening prevents pick falling into pocket and becoming irretrievable. Strap may contain zero, one, or two end pieces.
US09530392B2 Method for increasing the shape and effective thickness of the neck of a stringed musical instrument
A method of adjusting the effective thickness and/or shape of the neck of a string instrument involves use of spacer device consisting of a precisely molded or shaped material such as wood, metal, or plastic that covers the palm of the hand between the thumb and index finger including the web, thenar compartment, central compartment and hypothenar compartment as well as distal and proximal palmer area used to precisely thicken and modify the shape of the neck of a stringed musical instrument. The spacer device may be bonded to a holder such as the palm area of a fingerless glove or to a strap device covering the palm of the hand using hook and loop bonding material or an adhesive. Alternatively the device may be directly attached to the neck of the instrument or attached to the palm of the hand or held in place by the pressure of the palm on the neck of the instrument. The wooden spacer has a low enough coefficient of friction to slide freely along the neck of a string instrument.
US09530388B1 Mechanism for changing a pitch of a guitar string of an electronic guitar
A mechanism for changing a pitch of a string of an electric guitar having a string supporting bridge mounted on the guitar body, and said bridge having a transverse flange. To be inexpensive and easy to mount on the guitar without requiring neither removal of components from the guitar nor making of new holes in the guitar body, the mechanism comprises a base, an actuating lever device pivotally attached to said base and including string engagement means for connecting a first one of the guitar strings thereto and for varying tension on said first one of the strings by pivoting said actuating lever device relative to said base, and clamping means carried by said base and operable to removably clamp said base to said flange.
US09530387B2 Adjusting direct memory access transfers used in video decoding
An apparatus having a first memory and a circuit is disclosed. The first memory may be configured to store a list having a plurality of read requests. The read requests generally (i) correspond to a plurality of blocks of a reference picture and (ii) are used to decode a current picture in a bitstream carrying video. The circuit may be configured to (i) rearrange the read requests in the list based on at least one of (a) a size of a buffer in a second memory and (b) a width of a data bus of the second memory and (ii) copy a portion of the reference picture from the second memory to a third memory using one or more direct memory access transfers in response to the list.
US09530385B2 Display device, display device control method, and recording medium
A display device includes: a reduction section (15) for displaying, in a case where (i) a part of a content contained in a page is visually recognizable by magnifying and displaying the page at a magnification ratio (8) and (ii) a user conducts a turn-over operation (1), an entire page to be displayed in accordance with the turn-over operation (1); and a magnification section (16) for magnifying a given part of the page at the magnification ratio (8).
US09530381B1 Display with light sensor feedback
In some examples, a display includes a plurality of pixels and a plurality of light sensors. As one example, a respective light sensor may be associated with each pixel. The light sensor output can provide an accurate indication of a current optical state of each of the plurality of pixels. For instance, output from a light sensor proximate to a particular pixel may be used when determining a pixel control signal to be applied for updating the particular pixel to a next optical state. The light sensors may be located below, above, laterally adjacent to, or within one or more pixel elements of each pixel. Additionally, in some examples, one or more light sources may be provided to normalize the output from the light sensors to compensate for variations in ambient lighting and the like.
US09530379B2 Power converters and e-paper devices using the same for providing a plurality of voltages
A display device including an e-paper device and a power converter is provided. The e-paper device displays information. The power converter generates a plurality of output voltages respectively at a plurality of output terminals and provides the plurality of output voltages to the e-paper device. The power converter includes a transformer and a plurality of diodes. The transformer has a primary winding and a plurality of secondary windings. The diodes are electrically connected between the secondary windings and the output terminals for generating the output voltages, respectively.
US09530378B2 Driving circuit of display apparatus
A driving circuit, for driving a display panel of a display apparatus, includes a control module, a gamma-voltage generation module, and a conversion outputting module. The control module provides a first control voltage and a second control voltage which are adjustable. The first control voltage is higher than the second control voltage. The gamma-voltage generation module generates a gamma voltage according to the first control voltage and the second control voltage. The conversion outputting module converts the gamma voltage into a driving voltage and outputs it to the display panel. When the display panel is over-loaded, the control module adjusts the first control voltage and/or the second control voltage to change the gamma voltage generated by the gamma-voltage generation module, and the driving voltage outputted by the conversion outputting module is changed accordingly to adjust a curve of a panel voltage on the display panel versus time.
US09530377B2 Discharging control method, related driving method and driving device
A discharging-control method, for a display system drove by a power and comprising a panel with a plurality of pixels and a gate driving module, wherein the gate driving module generates a plurality of gate driving signals according to gate-high voltage and gate-low voltage and the plurality of gate driving signals is switched between the gate-high voltage and the gate-low voltage for switching the conducting statuses of a plurality of transistor switches of the plurality of pixels, includes switching the plurality of gate driving signals to the gate-low voltage in a power-off period, wherein the power is turned off in the power-off period; and generating at least one raising voltage at a receiving path of the gate-low voltage or a plurality of output paths of the plurality of gate driving signals, for raising the voltage level of the plurality of gate driving signals and conducting the plurality of transistor switches.
US09530375B2 Scan driving circuit
A scan driving circuit is disclosed, and the scan driving circuit has a pull-up control module, a pull-up module, a pull-down module, a pull-down maintaining module, a down-stream module, a bootstrap capacitor, and a constant-voltage low-level source; the constant-voltage low-level source includes a first constant-voltage low-level source which provides a first low-level and a second constant-voltage low-level source which provides a second low-level; and an absolute value of the first low-level is smaller than an absolute value of the second low-level. The reliability of the scan driving circuit is thus improved.
US09530367B2 GOA circuit based on LTPS semiconductor TFT
The present invention provides a GOA circuit based on LTPS semiconductor TFT, comprising a plurality of GOA units which are cascade connected, and N is set to be a positive integer and an Nth GOA unit comprises a pull-up control part (100), a pull-up part (200), a first pull-down part (400) and a pull-down holding part (500); the pull-down holding part (500) utilizes a high/low voltage reverse design and comprises a first, a second and a third DC constant low voltage levels (VSS1, VSS2, VSS3) which are sequentially abated and a DC constant high voltage level (H), the influence of electrical property of the LTPS semiconductor TFT to the GOA driving circuit, and particularly the bad function due to the electric leakage issue can be solved; meanwhile, the existing issue that the second node voltage level and the pull-down holding circuit part in the GOA circuit based on the LTPS semiconductor TFT cannot be at higher voltage level in the non-functioning period can be solved to effectively maintain the first node (Q(N)) and the output end (G(N)) at low voltage level.
US09530362B2 Ambient light adaptive displays with paper-like appearance
An electronic device may include a display having an array of display pixels and having display control circuitry that controls the operation of the display. The display control circuitry may operate the display in different modes. In a paper mode, display control circuitry may use stored spectral reflectance data to adjust display colors such that the colors appear as they would on a printed sheet of paper. In a low light mode when the ambient light level is below a threshold, the light emitted from the display may be adjusted to mimic the appearance of an incandescent light source. In a bright light mode when the ambient light level exceeds a threshold, the light emitted from the display may be adjusted to maximize readability in bright light. The target white point of the display may be adjusted based on which mode the display is operating in.
US09530354B2 Active matrix organic light emitting diode pixel unit circuit and display panel
The present invention provides an active matrix organic light emitting diode, AMOLED pixel unit circuit and a display panel for integrating a touch screen circuit into the AMOLED pixel unit circuit, and manufacturing an AMOLED display panel having the functionality of a touch screen. The AMOLED pixel unit circuit comprises a driving module, configured to amplify a induction signal generated by a touch sensing module, output the induction signal through a induction signal output module, and drive a light emitting module; the light emitting control module, configured to control the light emitting module to emit light; a threshold compensation module, configured to compensate a threshold voltage of the driving module; a charging module, configured to charge the threshold compensation module; the touch sensing module, configured to generate the induction signal and output the induction signal to the driving module; and the induction signal output module, configured to output the induction signal amplified by the driving module.
US09530352B2 OLED luminance degradation compensation
A system and method are disclosed for determining a pixel capacitance. The pixel capacitance is correlated to a pixel age to determine a current correction factor used for compensating the pixel drive current to account for luminance degradation of the pixel that results from the pixel aging.
US09530349B2 Charged-based compensation and parameter extraction in AMOLED displays
A system reads a desired circuit parameter from a pixel circuit that includes a light emitting device, a drive device to provide a programmable drive current to the light emitting device, a programming input, and a storage device to store a programming signal. One embodiment of the extraction system turns off the drive device and supplies a predetermined voltage from an external source to the light emitting device, discharges the light emitting device until the light emitting device turns off, and then reads the voltage on the light emitting device while that device is turned off. The voltages on the light emitting devices in a plurality of pixel circuits may be read via the same external line, at different times. In-pixel, charge-based compensation schemes are also discussed, which can be used with the external parameter extraction implementations.
US09530347B2 OLED display modules for large-format OLED displays
OLED display modules for large-format displays are disclosed. The OLED display module includes a matrix of OLEDs, with each OLED having an anode and a cathode, and an OLED drive circuit having electrical connections defined by rows and columns that electrically connect to the OLEDs in the OLED matrix. Groups of adjacent rows are arranged in parallel and groups of adjacent columns are arranged in parallel, thereby defining super pixels each having an array of four or more OLEDS, wherein the OLEDs in a given super pixel cannot be individually activated. The modules can be combined to form the large-format display.
US09530345B2 Gate drive on array unit and method for driving the same, gate drive on array circuit and display apparatus
Provided are a GOA unit and driving method, a GOA circuit and a display apparatus. A first node control unit (31) pulls a first node (PU) to a voltage at a first level terminal (CN) under the control of a first input terminal (IN), or to a voltage at a second level terminal (CNB) under the control of a second input terminal (INPUT). A second node control unit (32) pulls a second node (PD) to a voltage at a third level terminal (VGH) under the control of the first level terminal (CN), the second level terminal (CNB), a second clock signal terminal (CK2) and a third clock signal terminal (CK3), or to a voltage at a fourth level terminal (VGL) under the control of the first node (PU). An output unit (33) outputs a signal at the first clock signal terminal (CK1) under the control of the first node (PU), or pulls the output terminal (OUTPUT) to the voltage at the fourth level terminal (VGL) under the control of the second node (PD).
US09530341B2 Array substrate, driving method of array substrate and display device
The present invention provides an array substrate, a driving method of the array substrate and a display device comprising the array substrate. The array substrate comprises a display region and a non-display region, multiple groups of source lines and a plurality of gate lines are arranged in the display region, the multiple groups of source lines and the plurality of gate lines are intersected with each other to divide the display region into a plurality of pixel regions, and each pixel region corresponds to a group of source lines, wherein a first electrode and a second electrode are arranged in each pixel region, and the first electrode and the second electrode are adjacent and electrically isolated from each other.
US09530340B2 Calibrator for a display screen
There is disclosed a calibrator configured to calibrate a color of a screen of a display device includes an absorption plate formed of a transformable material, comprising a bottom surface attached to the screen of the display device in a vacuum absorption method; a control portion configured to leave space a first portion of the absorption plate from the screen of the display device; a fixed portion configured to press a second portion of the absorption plate to the screen of the display closely; a rotary portion configured to rotatably coupled to the fixed portion in a horizontal direction and to move the control portion in a vertical direction of the display device, when it is rotated; and a circuit unit mounted in the fixed portion to calibrate the color of the display device, such that the calibrator may be fixed in a precise position of the screen and that the screen calibration can be performed precisely and that the calibrator can be attached even to a tilted screen and used widely.
US09530338B2 Driving circuit having built-in-self-test function
A driving circuit includes at least one reference voltage source, at least one offset unit, and at least one buffer module. The at least one reference voltage source generates a reference voltage. The at least one offset unit generates an offset voltage, wherein the offset voltage and the reference voltage form a judging voltage range. The at least one buffer module has a first input end, a second input end, and an output end, wherein the first input end receives an analog voltage; the at least one reference voltage source is connected with the second input end; the at least one buffer module, according as whether the analog voltage is within the judging voltage range, outputs a pass logic signal or a fail logic signal at the output end. Particularly, the buffer module has Built-In-Self-Test (BIST) function and can increase test efficiency and voltage accuracy.
US09530336B2 System and method for monitoring a signage system of a transit vehicle
A sign-monitoring system includes at least one electronic sign and a controller comprising a processor and memory. The electronic sign includes a pixel array, the pixel array including a plurality of pixels. The electronic sign further includes an embedded controller coupled to the at least one electronic sign. The embedded controller develops diagnostic information for the at least one electronic sign, the diagnostic information including information related to a number of malfunctioning pixels in the plurality of pixels. The controller is communicably coupled to the embedded controller and receives at least a portion of the diagnostic information from the embedded controller. In addition, the controller assesses the at least a portion of the diagnostic information to develop health information. The assessment involves evaluating the information related to the number of malfunctioning pixels.
US09530331B2 System and method for selecting and altering a training session
The disclosed embodiments include a system and method for improving corporate employee work performance. The disclosed embodiments provide an innovative approach to optimizing the talent and resources within an organization including, but not limited to, an individual employee, teams of employees, and to executives within the organization. Through the application of a multivariate model based on physiological, affective, and behavioral systems, the disclosed embodiments attempt to improve an employee's vitality, vibrancy, wellness, and overall work performance.
US09530330B2 Device for visualizing military operations
A device for visualizing military operations for depicting a scenario for a plurality of action subjects represents each action subject by a representative. The device for visualizing military operations has a memory unit, a first representation unit, and a computing unit. The computing unit is designed to control the first representation unit in such a way that a scenario stored in the memory unit together with the action subjects represented by the representatives are reproduced.
US09530329B2 System and method for conducting multi-layer user selectable electronic testing
A multi-layer user-selectable electronic testing (MUSET) system provides a cascaded set of alternative testing formats for test-takers to select a testing format that best accommodates their level of ability. Test-takers can answer fill-in-the-blank (FITB) items on a computer or other input device. If the test-taker is less confident of their understanding, they can select multiple-choice (MC) or true/false (T/F) testing formats. The MUSET system measures, tracks, and stores the amount of time it takes to answer test items, to switch testing formats, and to change answers. Test-takers indicate a confidence level that they have in the correctness of their answer. The MUSET system determines confidence characteristics, latency characteristics, and hesitancy characteristics of the test-taker and gathers additional parameters to build a performance profile of the test-taker's skills/traits/abilities. The performance profile is analyzed to guide and inform evaluators regarding individual performance, trends over time, differences between test-taker subsets, and analyses of test items.
US09530326B1 Systems and methods for in-situ generation, control and monitoring of content for an immersive 3D-avatar-based virtual learning environment
A method comprises displaying, to a user, via an electronic display, an avatar corresponding to the user disposed in front of a virtual control board disposed within a virtual environment; receiving, from the user, input via one or more input apparatus associated with the electronic display, such input corresponding to selection of an item from a menu associated with the virtual control board; receiving, from the user, input corresponding to placement of the selected item on the virtual control board; creating, in the virtual environment in response to the placement of the selected item, a to-scale object corresponding to the selected item; and displaying, on the virtual control board disposed within the virtual environment, an icon corresponding to the created object and animating such icon to reflect status changes of the created object.
US09530323B1 Aircraft systems and methods to monitor proximate traffic
An aircraft system for an own-ship aircraft includes an ADS-B unit configured to receive ADS-B messages with flight information from other aircraft over a plurality of time periods, the other aircraft including a first aircraft. The system further includes a database configured to store at least a portion of the flight information associated with the other aircraft over the plurality of time periods. The system further includes a processing unit configured to compare the flight information for a current time period to the flight information for a previous time period to identify missing flight information from the current time period relative to the previous time period, the missing flight information including the flight information associated with the first aircraft, and initiate an annunciation to an operator of the own-ship aircraft based on the missing flight information associated with the first aircraft.
US09530321B2 Flight management method and system
A method and system, for flight management of an aircraft flying on a trajectory shifted with respect to a flight plan comprising a plurality of constrained waypoints, comprises a step of determining and displaying at least one point of the trajectory, termed decision point, beyond which the aircraft can no longer rejoin a constrained waypoint of the flight plan by determining a point of intersection between the trajectory and a rejoining trajectory steering towards the selected constrained waypoint, the rejoining trajectory complying with at least one predefined criterion.
US09530320B2 Flight object communications system
Systems and methods for processing aircraft flight information and flight plan information are described. Specific techniques are described for managing flight data in real time, sharing flight data between a plurality of systems, dynamically managing flight information, generating flight plan information, providing flight plan information to a user, and closing flight plan discontinuities.
US09530319B2 Method and device for determining an operational distance of an unspecified termination segment of an aircraft flight plan
The device includes a receiving unit for receiving at least a start point of an unspecified termination segment, an orientation of the unspecified termination segment and a start point of a following segment, a first computation unit for calculating a median plane passing through the start point of the following segment and perpendicular to this following segment, a second computation unit for calculating an operational distance, called calculated operational distance, as a function of the position of the start point of the unspecified termination segment relative to the median plane, using geometric data, and a transmission unit for providing at least one user means with the calculated operational distance.
US09530318B1 Touchscreen-enabled electronic devices, methods, and program products providing pilot handwriting interface for flight deck systems
Embodiments of a touchscreen-enabled electronic device (referred to as a “digital pilot notepad”), methods, and program products facilitating the entry of handwritten pilot data into one or more flight deck systems are disclosed. In one embodiment, the digital pilot notepad includes an avionics interface over which alphanumeric input data is transmitted to a flight deck system, a touchscreen device, and a controller operably coupled to the avionics interface and to the touchscreen device. The controller is configured to digitally capture a handwritten pilot note written on the touchscreen device by a pilot, convert the handwritten pilot note to alphanumeric input data in a format compatible with the flight deck system, and subsequently submit the alphanumeric input data to the flight deck system over the avionics interface.
US09530317B2 Movement-measurement-processing system, movement-measurement-processing method, and movement-measurement-processing program
A peripheral aircraft selection means maps a region in a 3D space defined by a start point of period information of the aircraft of interest, a point having the coordinate values of passage position coordinates at an end point of the period information and a lower limit arrival time, and a point having the coordinate values of passage position coordinates at the end point of the period information and an upper limit arrival time onto a 2D plane by use of a first projection matrix. The peripheral aircraft selection means then selects a peripheral aircraft which can abnormally near to the aircraft of interest by determining how the resultant region crosses with a circle whose center is a passage position of the peripheral aircraft and whose radius is a determination standard threshold as to whether abnormal nearing will occur.
US09530313B2 Negative image for sign placement detection
Systems, methods, and apparatuses are described for a negative image or false positive profile for sign locations. Image data or another type of optical data is collected along a path by a collection device such as a camera. The data is analyzed to identify one or more false positive locations along the path at which signs for other paths may be detected. The false positive locations may be described in the negative image or false positive profile. Additional or subsequent optical data may be analyzed based on the negative image or false positive profile may be analyzed to identify at least one confirmed sign position.
US09530306B2 Information notification method, information terminal, and program
A usual setting state in accordance with a current in-house state and a device state is selected using an acquired in-house state and a device state from a plurality of setting states classified in advance in accordance with in-house states and device states. When the selected usual setting state and the acquired setting state differ from each other, a first notification that notifies a user of the difference is performed and a state of an information terminal is transitioned to a state where an input for remotely controlling a second device can be accepted.
US09530305B2 System for obtaining performance information
A system for obtaining performance information is provided and includes a condition detector configured to output the performance information as an optical signal, an optical probe wirelessly disposed in signal communication with the condition detector, the optical probe including a photodiode configured to receive the optical signal and to output an electrical signal accordingly, a data converter, which is coupled to the optical probe and configured to convert the electrical signal into data representative of the performance information and a computing device, which is coupled to the data converter and configured to allow for analysis, display and/or storage of the data representative of the performance information.
US09530302B2 Keypad projection
A method for security and/or automation systems is described. In one embodiment, the method may include detecting a proximity of a user at a home automation device. The method may further include projecting an external display of home automation system information from the home automation device onto a surface. In some embodiments, the external display may be projected based, at least in part, on the detected proximity of the user at the home automation device.
US09530297B2 Commodity information input apparatus, exit detection apparatus, and system including the same
In accordance with one embodiment, a gate apparatus comprises an information reception module configured to receive information from an RFID tag attached to a commodity, and a notification module configured to notify an operator of an unsettled message indicating that the commodity is not settled if the information received by the information reception module does not include settlement information indicating that the commodity is settled.
US09530294B2 Methods and apparatus for pairing items for security
An item of value comprises an assembly of parts. The parts comprise a component that has value independent of the item, and an assembly security system that is operable to communicate with a central security system via a wide area network. The component comprises a component security system that is operable to communicate with the assembly security system. The assembly security system is operable to perform operations comprising (a) saving component data that identifies the component as part of the item; (b) after saving the component data, monitoring the component, via the component security system, to automatically determine whether the component has left a predetermined zone of proximity, relative to the item; and (c) in response to determining that the component has left the predetermined zone of proximity, automatically notifying the central security system that the component has left the predetermined zone of proximity. Other embodiments are described and claimed.
US09530291B2 Systems and methods for providing qualitative indication of vibration severity while recording
A mobile computing system for providing qualitative indication of vibration recordings of a vibrating machine to a user includes a memory, a display device, and at least one processor configured to receive a vibration recording including a vibration level from a sensor computing device. Collection of the vibration recording is initiated by the user while at the vibrating machine. The processor is also configured to determine a plurality of threshold sets applicable to the vibration recording and select, by the processor, a first available threshold set from the plurality of threshold sets. The processor is also configured to compare the vibration level of the vibration recording to the first threshold set and display to the user a visual qualitative indication of the vibration recording using the display device, thereby enabling the user to determine a quality of the vibration recording while at the vibrating machine.
US09530290B2 Apparatuses and methods for providing visual indication of dynamic process fuel quality delivery conditions with use of multiple colored indicator lights
Embodiments of the present disclosure include a fuel dispensing apparatus for delivering fuel from a fuel source, and related components, systems, and methods. As fuel is delivered from the fuel source, fuel quality is monitored using one or more fuel quality sensor devices, which detect one or more corresponding fuel quality characteristics. In response to the detected fuel quality characteristics, a visual indication of fuel quality is provided at a visual indication device. The visual indication includes a unique combination of a color component and a frequency component, thereby allowing a user of the fuel dispensing apparatus to quickly determine fuel quality status as the fuel is delivered from the fuel source.
US09530289B2 Payment processing with automatic no-touch mode selection
A “no-touch” mobile checkout experience frees consumers from the need to manually locate and activate a mobile payment application in order to complete a transaction. The consumer simply brings his mobile device within close range of an interface console, which in various embodiments prompts the device to launch an application that causes display of a payment token without user action. If the consumer's device is not NFC-capable, the interface console can read a displayed token optically in the usual fashion.
US09530276B2 Single sign-on for wager gaming players over a wide-area network
When the player identifies herself to a gaming machine at a casino, for example by inserting a player tracking card into the card reader, she is, at generally the same time, logging onto a game provider's backend system (the game provider being different from the casino operator). This concurrent sign-on to the game provider's system is done in a non-intrusive, transparent, and passive manner. The player is not distracted from the normal steps leading to game play on the machine until she is ready to redeem points with the game provider or for some reason additional authentication is needed from the player. By virtue of this single sign-on to the game provider network, in addition to continuing game play across different casinos, the player can publish events to the Internet, such as on social networking sites, take advantage of offers targeted specifically for her, or facilitate responsible gaming programs.
US09530273B2 Gaming system and method providing a slot game employing a randomly selected set of reels
Various embodiments of the present disclosure are directed to a gaming system and method providing a slot game employing a set of randomly selected reels. In one embodiment, the gaming system is configured to operate a slot game associated with a plurality of adjacently arranged reels including a plurality of symbols. Each of a plurality of the reels is associated with one of a plurality of different features and an indicator representing that feature. The gaming system begins sequentially displaying the reels and any corresponding indicators. The gaming system selects a set of two or more of the reels and stops sequentially displaying the reels such that the selected reels are displayed. The gaming system generates and displays a plurality of the symbols on the selected reels, determines whether any winning symbol combinations are displayed, determines any awards associated with any displayed winning symbol combinations, and displays any determined awards.
US09530267B1 Coin hopper having an improved coin pushing design
A coin hopper includes a hopper body including a housing having an accommodation chamber defined in a funnel-shaped coin box thereof and a coin outlet for guiding coins out of the accommodation chamber individually, a rotating wheel having multiple coin-pushing blades extended from a wheel base thereof and a coin-receiving space defined between each two adjacent coin-pushing blades, each coin-pushing blade having an abutment edge extending along one lateral side thereof for stopping one coin in one coin-receiving space and a pushing edge extending along an opposite lateral side thereof, a power drive adapted for rotating the rotating wheel to let coins be ruffled by coin-pushing blades and forced into coin-receiving spaces and then guided by arc-shaped abutment edges to move out of each coin-receiving space upwardly toward coin outlet one after another, and a coin-dispensing mechanism including a spring-loaded lever for pushing coins out of coin outlet individually.
US09530264B2 Using low power radio to control a higher power communication interface
An integrated access control system for wirelessly managing an access point comprises a wirelessly operable electronic door lock coupled to the access point, a computing device controlled and operated by a first user, and a multi-radio host device located at or adjacent to the access point, the host device being in communication with the electronic door lock and the computing device. Each of the computing device and the host device comprises a memory configured to store instructions to enable the device to wirelessly communicate with the electronic door lock and the other device, a processor configured to execute the instructions, a low power wireless communication radio, and a high power wireless communication radio, wherein the host device and computing device are selectively capable of bidirectional communication via each of a low power radio communication channel and a high power radio communication channel. The host device further comprises at least one mechanism for detecting and/or capturing the presence of a second user accessing the access point, and the computing device further comprises a display and a user interface. The host device is configured to send event and/or system notifications to the computing device and receive operational and/or configuration commands from the computing device via the low power radio communication channel, and the host device is further configured to selectively operate the host device high power wireless communication radio to transmit an image and/or video captured by the host device at least one mechanism to the computing device in response to a command from the computing device via the low power radio communication channel.
US09530260B1 Smart key registration notification system
A notification system and method for registration of a new key. The system includes an electronic control unit (ECU) adapted to receive and store information regarding the registration of a new key, a processor in communication with the ECU, the processor adapted to determine if a notification should be provided to the user regarding the registration of a new key, the ECU adapted to control where the notification is displayed and a display screen in communication with the ECU, the display screen adapted to display a notification to the user that the new key has been registered.
US09530259B2 Method and device for displaying operating states of units of a vehicle
A method for displaying operating states of units of a vehicle wherein a control device generates graphics data which control a display device so that a first graphics object is displayed with a representation of the vehicle in a first state, and that a second graphics object is generated with a graphical representation of the vehicle unit which is displayed in the changed graphical representation of the vehicle so that the arrangement of the second graphics object of the vehicle unit in the first graphics object of the vehicle substantially corresponds to the real arrangement of the vehicle unit in the vehicle. Also disclosed is a corresponding device for carrying out this method and to a vehicle with such a device.
US09530258B2 System of components with sensors and method for monitoring the system of components
A system comprising a plurality of components operating under essentially identical conditions, wherein each of the components is equipped with at least one sensor for measuring the same operating parameter for each of the components, and a monitoring unit configured to receive and process the signals of the sensors and to generate maintenance data based on the sensor signals. The monitoring unit is configured to calculate a parameter quantifying deviations between the measured operating parameters.
US09530253B2 Dynamically managing parking space utilization
A system or computer usable program product for dynamically managing parking space utilization including receiving a dynamic feed of available parking spaces across a set of sectors, each parking space associated with a parking control device, each sector having a preferred utilization rate; utilizing a processor to determine that a parking utilization rate of a first sector exceeds a preferred utilization rate for the first sector; upon receiving a location based parking space reservation request from a user, the request capable of being fulfilled from a plurality of sectors, providing a list of available parking spaces meeting the request including associated prices dynamically generated, wherein parking spaces in the first sector are priced higher than parking spaces in other sectors; and upon selection of one of the provided list of available parking spaces by the user, allocating the selected parking space to the user at the provided associated price and notifying the parking control device associated with the selected parking space.
US09530249B2 Computer-readable storage medium having image processing program stored therein, image processing apparatus, image processing system, and image processing method
When an image of a marker existing in a real space is taken by using an outer camera, an image of a plurality of virtual characters which is taken by a virtual camera is displayed on an upper LCD so as to be superimposed on a taken real image of the real space. The virtual characters are located in a marker coordinate system based on the marker, and when a button operation is performed by a user on a game apparatus, the position and the orientation of each virtual character are changed. Then, when a button operation indicating a photographing instruction is provided by the user, an image being displayed is stored in a storage means.
US09530244B2 Method and apparatus for shadow estimation and spreading
A computer-implemented method for creating an image that depicts shadowing for a specified light source even though the input data is not three-dimensional and is limited to elevation data that associates an elevation value with each of a plurality of spatial coordinates. Plumb line walls are generated between elevation points of neighboring grid cells for each elevation point meeting a specified delta elevation criterion. A shadow map is accumulated based on visibility of each pixel to the light source position, and then, in a subsequent pass through the coordinate pixels of the data, an image is created in a tangible medium with each pixel correspondingly visible or shadowed, either totally or partially. Values along one dimension may be spread over a Z-buffer range to optimally resolve visibility features.
US09530243B1 Generating virtual shadows for displayable elements
A computing device can present a plurality of displayable elements, some of which appear to be on top of or overlaying others. The computing device can determine which displayable elements should cast virtual shadows on which other displayable elements based, at least in part, on a respective virtual depth value associated with each of the displayable elements. In general, a displayable element with a higher depth value can cast a shadow on a displayable element with a lower depth value. The device can select a first displayable element for which a virtual shadow is to be generated. The device can acquire a graphical representation of the first displayable element. The computing device can then apply a blurring technique, a color filtering process, and a transparency filtering process to the graphical representation to generate a virtual shadow for the first displayable element. Then the device can draw or display the shadow.
US09530242B2 Point and click lighting for image based lighting surfaces
A computer implemented method of interacting with a three dimensional image based lighting surface to adjust its lighting properties, comprising defining an image plane and a user viewpoint for the lighting surface; rendering and displaying a scene containing an object in situ within the lighting surface; by way of a user interaction with the displayed scene, receiving an identification of a point on the image plane; tracing a ray from the user viewpoint through the identified point on the image plane and either, determining a surface intersection point of the ray with the surface or determining an object intersection point of the ray with the object and tracing a further ray, and determining a surface intersection point of the further ray with the surface, and adjusting the lighting properties of the surface at or in the region of the surface intersection point.
US09530241B2 Clipping of graphics primitives
Techniques for performing clipping of graphics primitives 60 with respect to a clipping boundary 65 are described. The clipping step 10 may be performed separately for each tile of a graphics frame to be rendered, after a primitive list for the tile has been read from a primitive memory 38. Clipping may be performed only for larger primitives whose size exceeds a given threshold. Clipping of a primitive 60 to the clipping boundary 65 may be performed inexactly so that only a single clipped primitive is generated which may extend beyond the clipping boundary. A clipped primitive generated by clipping may be used for a depth function calculation of a primitive setup operation and not for an edge determination.
US09530240B2 Method and system for rendering virtual views
A method including receiving a first image of a scene captured from a first perspective, the first image including an object and a background; segmenting the first image to extract a first two-dimensional contour of the object; approximating a plurality of three-dimensional locations of a plurality of points on the first contour; generating a three-dimensional billboard of the object based on the three-dimensional locations; and projecting the first image onto the three-dimensional billboard.
US09530239B2 Maintaining 3D labels as stable objects in 3D world
Architecture that enables the preservation of label readability in a scene (e.g., map, map tiles, graphical background, etc.) by way of label orientation relative to a fixed heading on a plane or curved surface. After identifying an initial fixed heading, movement of the camera (e.g., zoom-in, zoom-out, position change, etc.) in the scene along that heading without changing the camera heading as measured relative to a fixed point does not alter label orientation. In a mapping implementation, after identifying an initial fixed camera heading over terrain of the Earth, movement of the camera (e.g., zoom-in, zoom-out, position change, etc.) in the scene without changing the camera heading as measured relative to some fixed point does not change label orientation. The orientation of labels may be changed if the heading of the camera is altered, but this change is delayed until camera movement quiesces.
US09530236B2 Time code display device and time code display method
A time code display device includes a time code extraction unit that extracts a left image time code from a left image signal that constitutes a stereoscopic image and a right image time code from a right image signal that constitutes the stereoscopic image; a time code comparison unit that compares the left image time code with the right image time code and outputs a comparison result including information on agreement or disagreement between the left and right image time codes; and a display determination unit that determines to display the left and right image time codes in the same manner when the comparison result indicates agreement therebetween, determines to display the left and right image time codes in different manners when the comparison result indicates disagreement therebetween, and displays the left and right image time codes on a display unit.
US09530235B2 Aligning panoramic imagery and aerial imagery
Systems and methods for aligning panoramic imagery of a geographic area captured from a perspective at or near ground level and aerial imagery captured from an oblique perspective are provided. More particularly, a facade plane can be detected in a panoramic image based at least in part on geometric data associated with the image. The panoramic image can also have an associated image pose. An aerial image depicting the same facade can then be identified. The aerial image can be associated with an image pose and geometric data of the depicted imagery. The panoramic image can be warped into an image having a perspective associated with the aerial image. One or more feature matches between the warped image and the aerial image can be identified using a feature matching technique. The matched features can be used to align the panoramic image with the aerial image.
US09530234B2 Method for generating digital content by combining photographs and text messages
Methods and apparatus are provided for generating a content of a display apparatus. A user touch is received. An area corresponding to the received user touch is detected. A object is inserted and displayed into the detected area.
US09530233B2 Action records associated with editable content objects
A program manages various different parts of editable content, including one or more objects. Various different actions can be performed on an object to edit or change the object in some manner. A program presenting the editable content maintains one or more object action records, each object action record being a record of actions performed on a particular object of the editable content. A program can also maintain a document action record that includes indications of actions performed on parts of the editable content that are not objects having an associated object action record, as well as optionally actions performed on the objects having an associated object action record. In response to a user request to undo an action on a particular object, the actions in the object action list associated with the particular object are undone without undoing any intervening actions performed on other parts of the editable content.
US09530230B2 Method and system for utilizing transformation matrices to process rasterized image data
A method and system render rasterized data by receiving non-rasterized page description language data and a corresponding transformation matrix representing transformation operations to be performed. The non-rasterized page description language data is rasterizing to create rasterized data. The corresponding transformation matrix is decomposed into a plurality of individual transformation operation matrices and a discrete transformation operation value, from a corresponding individual transformation operation matrix, is generated for each transformation operation to be performed upon the rasterized data. The transformation operations are performed upon the rasterized data based upon the generated discrete transformation operation values.
US09530227B2 Methods for generating visual data from nodes containing identity data for persons from a set point of view
Computer implemented methods for constructing dynamic relationships between data for presentation on a display are provided. The data is obtained from one or more data sources and managed as a plurality of nodes. The nodes increase or decrease in number over time. One method includes setting a point of view from one of the nodes of the plurality of nodes, and the setting of the point of view acting to order certain ones of the plurality of nodes to produce a representation from the point of view. The method generates visual data that illustrates the representation of the plurality of nodes from the set point of view and provides the visual data for rendering on a display of a device. Certain ones of the nodes contain unique identity data for individuals, and the nodes are associated with other nodes based on relationships between the individuals.
US09530221B2 Context aware moving object detection
An image capture system includes: an image capture unit configured to capture a first image frame comprising a set of pixels; and a processor coupled to the image capture unit and configured to: determine a normalized distance of a pixel characteristic between the first image frame and a second image frame for each pixel in the first image frame; compare the normalized distance for each pixel in the first image frame against a pixel sensitivity value for that pixel; determine that a particular pixel of the first image frame is a foreground or background pixel based on the normalized distance of the particular pixel relative to the pixel sensitivity value for the particular pixel; and adapt the pixel sensitivity value for each pixel over a range of allowable pixel sensitivity values.
US09530220B2 Spatial and temporal alignment of video sequences
Some embodiments allow a video editor to spatially and temporally align two or more video sequences into a single video sequence. As used in this application, a video sequence is a set of images (e.g., a set of video frames or fields). A video sequence can be from any media, such as broadcast media or recording media (e.g., camera, film, DVD, etc.). Some embodiments are implemented in a video editing application that has a user selectable alignment operation, which when selected aligns two or more video sequences. In some embodiments, the alignment operation identifies a set of pixels in one image (i.e., a “first” image) of a first video sequence and another image (i.e., a “second” image) of a second video sequence. The alignment operation defines a motion function that describes the motion of the set of pixels between the first and second images. The operation then defines an objective function based on the motion function. The operation finds an optimal solution for the objective function. Based on the objective function, the operation identifies a transform, which it then applies to the first image in order to align the first image with the second image.
US09530219B2 System and method for detecting trachea
Disclosed are systems, devices, and methods for detecting a trachea, an exemplary system comprising an imaging device configured to obtain image data and a computing device configured to generate a three-dimensional (3D) model, identify a potential connected component in a first slice image, identify a potential connected component in a second slice image, label the first slice image as a top slice image, label the connected component in the top slice image as an active object, associate each connected component in a current slice image with a corresponding connected component in a previous slice image based on a connectivity criterion, label each connected component in the current slice image associated with a connected component of the preceding slice image as the active object, and identify the active object as the trachea, based on a length of the active object.
US09530218B2 Method for classification and segmentation and forming 3D models from images
A method of classification and segmentation of an image using modules on a computer system includes receiving a plurality of models having features suitable for classifying each pixel of the image into a respective one of a plurality of categories, using a classifier to provide a score for each pixel in the image for each category and using a segmenter to segment the image into image segments, wherein each image segment is a contiguous set of pixels having at least one common feature. For each image segment a set of average probabilities for each category is determined, and for each image segment, a most likely category to which the image segment belongs is determined by the maximum average probability resulting in a labeled segment image, which is used to identify any empty areas as incorrect holes. Then any empty areas that are identified as incorrect holes are filled.
US09530217B2 Segmentation of an image based on color and color differences
An input image is partitioned into a plurality of image regions based on color and color differences. The partitioning comprises assigning a color difference value to plurality of locations within the input image. The partitioning further comprises assigning each of the plurality of locations to an image region of the plurality of image regions, where the assigning occurs according to a particular order. The particular order is based at least in part on color difference values associated with the plurality of locations. The input image may comprise markup. Data representing at least a particular portion of the markup in the input image based on the partitioning is identified. Data representing at least the portion of the markup may be used in a visualization of a customizable product or a manufacturing control associated with a customizable product.
US09530212B2 Image frame conversion method and video frame conversion method and apparatus
An image frame conversion method and a video frame conversion method and apparatus are provided. The video frame conversion method includes: extracting a longest line segment of a 2D video frame; determining a first depth image of the 2D video frame according to a direction of the longest line segment; determining motion information of the 2D video frame according to a video frame adjacent to the 2D video frame; determining a second depth image of the 2D video frame according to the motion information; and generating, according to the first depth image, the second depth image, and the 2D video frame, a 3D video frame corresponding to the 2D video frame.
US09530210B2 Distance calculator and distance calculation method
In order to be able to measure a distance with disparity resolution of a stereo camera or less and precisely measure a relative distance to a target even in the event of degradation of the imaging condition, a distance calculator includes a monocular distance calculation section 203, a stereo distance calculation section 204, a blurriness level calculation section 201, a distance estimation section 202, and an output distance calculation section 206. The monocular distance calculation section 203 calculates the distance to a target based on image information captured by a camera 101 or 102. The stereo distance calculation section 204 calculates the distance to the target based on image information captured by the two cameras 101 and 102. The blurriness level calculation section 201 calculates the blurriness level of the image information captured by the image information captured by the cameras 101 and 102. The distance estimation section 202 estimates the distance to the target at the time of capturing of images by the cameras 101 and 102. The output distance calculation section 206 calculates the distance to the target to be output. The output distance calculation section 206 selects, as the distance to be output, the distance calculated by the monocular distance calculation section 203 or the distance calculated by the stereo distance calculation section 204 based on the blurriness level and the estimated distance.
US09530209B2 Method of determining the location of tip timing sensors during operation
A combination probe is positioned at a location in a stationary portion of a turbo machine that defines a gas flow path and is configured to detect a moving portion of the turbo machine within the gas flow path. The combination probe includes a tip timing sensor configured to sense when the moving portion is located proximate to the location of the probe, and an optical component configured to have a field of view that includes the moving portion when the moving portion is located proximate to the location of the probe. There is also an image capture device coupled to the optical component to capture an image of the field of view. The image can be used to determine the particular blade tip location within the field of view which is also the blade tip location sensed by the tip timing sensor.
US09530208B1 Registration of low contrast images
The registration of images captured at multiple locations, for purposes such as location mapping, can be improved by utilizing multiple image capture elements pointing in at least two different directions or having different viewable ranges. At least one primary image is captured at each location. If the primary image is not able to be correlated with at least one other image based on one or more matching features, image information captured by at least one other camera at substantially the same times as those images can be analyzed to attempt to determine a change in position and/or orientation of the device between those times, which can assist in correlating the primary images. In some embodiments, motion or orientation determining elements can assist in the determination of device movement, and in at least some embodiments can reduce the amount of image information to be processed for a match.
US09530206B2 Automatic 3D segmentation and cortical surfaces reconstruction from T1 MRI
An apparatus and method for performing automatic 3D image segmentation and reconstruction of organ structures, which is particularly well-suited for use on cortical surfaces is presented. A brain extraction process removes non-brain image elements, then classifies brain tissue as to type in preparation for a cerebrum segmentation process that determines which portions of the image information belong to specific physiological structures. Ventricle filling is performed on the image data based on information from a ventricle extraction process. A reconstruction process follows in which specific surfaces, such as white matter (WM) and grey matter (GM), are reconstructed.
US09530204B2 Method of preparing biological specimen
A sufficient amount of biological molecules are collected from a desired region in a tissue section with a single operation. Provided is a method of preparing a biological specimen including a sectioning step of sectioning biological tissue along a single cutting plane; a staining step of staining a first tissue section of two tissue sections that have been sectioned in the sectioning step; a stained-image capturing step of acquiring a stained image of the stained tissue section; a non-stained-image capturing step of acquiring a non-stained image in which, with respect to a second tissue section that has been sectioned in the sectioning step, division lines that divide the tissue section into a plurality of segments are defined; and associating steps of associating the non-stained image and the stained image with each other.
US09530203B2 Image processing apparatus and image processing method
An image processing apparatus according to an embodiment includes a lung field region extracting unit, a lung field bottom region extracting unit, and a detecting unit. The lung field region extracting unit is configured to extract, based on pixel values of pixels constituting a three-dimensional medical image capturing a chest of a subject, a lung field region from the three-dimensional medical image. The lung field bottom region extracting unit is configured to extract a lung field bottom region from the lung field region. The detecting unit is configured to detect a vertex position of the lung field bottom region on the head side of the subject.
US09530201B2 Method for the non-destructive testing of a blade preform
An automated method for the non-destructive testing of a woven preform for the manufacture of a turbine engine part and including a plurality of first marker threads intertwined with second marker threads, the first and second threads having light-reflecting properties that are different from those of the threads of the preform and being woven with the threads of the preform so as to form a surface grid on a given area of the preform. The method includes determining, with a plurality of consecutive steps, the spatial coordinates of the intersections between the first and second marker threads.
US09530198B2 Method for controlling X-ray image diagnosis apparatus and X-ray generation device
To provide a method for controlling an X-ray image diagnostic apparatus and an X-ray generation device equipped with an ABS system tracking movement of an object position without an operator performing setting operation for a region of interest (ROI), the determination condition storage unit (6i) storing ROI position determination conditions in which image statistical information is used for defining conditions to determine a position of an ROI in an X-ray image out of plural blocks generated by dividing the X-ray image into plural regions, the first block statistical information calculation unit (6f) calculating the image statistical information for each of plural blocks, and the region-of-interest position selection unit (6g) selecting a block that serves as an ROI from among plural blocks using the ROI position determination conditions and the image statistical information of each block are provided. A feedback value to be used in controlling the brightness value of the ROI is calculated based on the brightness value of the ROI, and irradiation conditions are determined so that the feedback value reaches a target brightness value.
US09530196B2 Reducing heel effect in dual energy x-ray images
In some examples, a method to reduce heel effect distortion in dual energy x-ray images includes receiving flood field images generated by x-rays at different energy levels and generating one or more normalize images based on the flood field images. The method may also include applying the one or more normalize images to one or more x-ray images and combining the x-ray images to generate a dual energy x-ray image with reduced heel effect distortion.
US09530195B2 Interactive refocusing of electronic images
A method is performed to refocus a digital photographic image comprising a plurality of pixels. In the method, a set of images is computed corresponding to the digital photographic image and focused at different depths. Refocus depths for at least a subset of the pixels are identified and stored in a look-up table. At least a portion of the digital photographic image is refocused at a desired refocus depth determined from the look-up table.
US09530194B2 Method for processing highlights and saturated regions in a digital image
A method for performing highlight restoration on a digital image includes comparing the pixels in the image with a saturation level value to identify saturated pixels. A saturation map of saturated pixels is generated. Each selected saturated pixel is identified as a restorable pixel only if at least one color channel of the pixel is unsaturated. For each restorable pixel, a group of the closest unsaturated pixels above, below, to the left, and to the right of the select saturated pixel is identified. A replacement pixel value is generated for each saturated color channel of the restorable pixel, using a combination of the pixel values of the unsaturated color channels of the restorable pixel and the pixel values of the corresponding color channels of the nearby unsaturated pixels.
US09530191B2 Methods and systems for detection and estimation of mosquito noise
Aspects of the present invention are related to systems and methods for detection and estimation of mosquito noise in an image or in a video sequence. A mosquito-noise estimate, at a pixel location, may be computed based on an image ring parameter, a statistical value of noise estimates in a first region associated with the pixel location, a maximum activity value in a second region associated with the pixel location and a noise estimate at the pixel location.
US09530185B2 Image processing apparatus, imaging apparatus, image processing method and storage medium
At least one image processing apparatus is provided which allows performing a demosaicing process on a polychrome image signal with high accuracy. The at least one image processing apparatus performs an interpolation process in each of a plurality of defined directions on a mosaic image signal and acquires an evaluation value representing a correlation in each of a horizontal direction and a vertical direction for each of a plurality of pixels of the image signal having undergone the interpolation process. The evaluation values for at least one pixel of interest are corrected based on the evaluation values for peripheral pixels if a predetermined condition including a condition that it is determined that the at least one pixel of interest is an isolated point is satisfied. Then, the image signal after the at least one pixel of interest is interpolated based on the corrected evaluation values.
US09530183B1 Elastic navigation for fixed layout content
Techniques are described for presenting fixed layout content in which different scaling factors are used for different portions of an original image such that a user viewing the content on a smaller screen can selectively enlarge different portions of the image while still being able to see all the content in the original page or portion of the surrounding context.
US09530182B2 Method for displaying information in particular in a vehicle and display unit for a vehicle
A method for displaying information in a vehicle wherein a control device can generate graphics data which control a display surface such that, in a first display mode, graphic objects and/or buttons for visualizing information of a first vehicle unit are displayed and, in a second display mode, graphic objects and/or switches for visualizing information of a plurality of vehicle units are displayed. In a transition from the first display mode to the second display mode the representation of the graphic objects and/or buttons for visualizing information of the first vehicle unit are decreased in size and changed, and surface graphic objects and/or buttons for visualizing information of other vehicle units are redisplayed and the graphic objects and/or buttons for visualizing information of other vehicle units are moved. Also disclosed is a display unit for carrying out the method.
US09530178B2 Non-volatile storage for graphics hardware
Methods and systems may provide for an apparatus having a graphics processing unit (GPU) and a non-volatile memory dedicated to the GPU. If a request for content is detected, a determination may be made as to whether the non-volatile memory contains the content.
US09530171B2 Forensic authentication system and method
A forensic authentication system includes an imaging device to capture an image of a printed mark and a non-printed area of a substrate directly adjacent to the printed mark, and a processor to run computer readable instructions. The processor can run computer readable instructions to utilize a model to define a substrate region that corresponds with at least a portion of the non-printed area of the substrate directly adjacent to the printed mark; and computer readable instructions to generate a substrate signature for the defined substrate region. Each of the computer readable instructions is embedded on a non-transitory, tangible computer readable medium.
US09530170B2 User device, a second screen system and a method for rendering second screen information on a second screen
Rendering second screen information on a second screen device. A user device receives information characterizing the source of a content data stream and the content data stream; generates a watermark payload using a plurality of parameters comprising the information and a time of the user device; and inserts a watermark comprising the watermark payload into the content data stream that is rendered. The second screen device captures the watermark and extracts the watermark payload and then at least one of the plurality of parameters; generates, using the at least one extracted parameter, a request that is sent the request to a server; receives information from the server in response to the request; and displays the received information on a screen of the second screen.
US09530169B2 Demand response automated load characterization systems and methods
Demand response automated load characterization systems and methods are described herein. One method includes identifying a plurality of load models that include a variable that influences an energy demand, normalizing the plurality of load models, aggregating the normalized plurality of load models to generate an aggregated model for the variable.
US09530165B2 Financial transaction system
A financial transaction system includes: an ATM process substituting server connected to a backbone server that executes a user accounting process through a communication mechanism capable of concealing content of communication; and a transaction screen WEB server connected to the ATM process substituting server and capable of connecting to a user communication terminal. The transaction screen WEB server transmits, to the communication terminal, transaction screen data for the user to input transaction necessary information, receives, from the communication terminal, transaction necessary information data inputted in accordance with the transaction screen data, and transmits the transaction necessary information data to the ATM process substituting server. The ATM process substituting server transmits the transaction necessary information data to the backbone server and transmits a message requesting the user for a specified transaction process. The system provides quick, easy transactions without needing to input a second personal identification number or one time password.
US09530164B2 Financial-service structured content manager
A financial-service system that manages content objects includes a chronicles platform with a chronicle associated with a loan request. A content manager determines a set of content objects to be associated with the chronicle and generates a bucket for each content object of the set of content objects. Each bucket is associated with a name and is configured to receive an associated content object. The chronicle is populated with the generated buckets. An interface that detects a user action and that thereafter receives or generates a content object, which is detected by the content manager and associated with a bucket. The content manager causes the bucket to receive the content object and presents representations of the buckets to a user. Representations of one or more buckets that have received a content object differ from representations of one or more other buckets that have not received a content object.
US09530163B2 Automated color selection method and apparatus
An automated method and apparatus for providing color selection capability to a user, wherein a first display is generated on a display apparatus of a plurality of color families displayed in a plurality of rows and a plurality of columns. Upon selection of a particular color family, a second display is generated comprising an enlarged display of the particular selected color family and a thumbnail navigation frame displaying the plurality of color families and a link enabling return to the first display, the enlarged display including a plurality of color chips of the particular color family. A third display may further be generated in response to a selection of a particular color chip on the second display, the third display having an enlarged display of the particular color chip, the thumbnail navigation frame displaying the plurality of color families, and the link enabling return to the first display.
US09530162B2 Hide sorting systems and methods
Methods and systems for sorting hides are provided. In particular, one or more embodiments comprise a tanning control system that enhances the traceability of hides by capturing and utilizing data related to the unloading, tanning, sorting, and packaging of hides. Furthermore, one or more embodiments enable the tanning control system to improve efficiency by sorting hides based, at least in part, on data generated during prior tanning processes. Additionally, one or more embodiments facilitate the tanning control system in customizing the sorting and packaging of hides based, at least in part, on one or more hide characteristics and/or customer specifications.
US09530161B2 Automatic extraction of multilingual dictionary items from non-parallel, multilingual, semi-structured data
User interfaces receive a first plurality of user queries and result sets that are in a category, exhibit a constraint, and exhibit user behavior. Also received are a second plurality of user queries and result sets that that are in the category, exhibit the constraint, and exhibit user behavior. The second user queries and results are received either from a plurality of user interfaces coupled to a second system, or from the second system itself. Responsive to detecting that the first plurality of user queries and result sets and the second plurality of user queries and result sets satisfy respective thresholds, a signal indicates that at least one of the first plurality of user queries and at least one of the second plurality of user queries are translations of each other.
US09530159B2 Methods, systems, and computer-readable media for placing orders
Included are embodiments for customized ordering. At least one embodiment of a method includes receiving an indication to send a previously created customized order to a vendor and retrieving at least one component of the customized order according to the indication. Some embodiments include determining the vendor associated with the customized order and sending the at least one component of the customized order to the vendor in a first manner, the vendor being configured to receive the customized order.
US09530155B2 Automatically adding gratuity to amount charged in electronic transaction
A method includes receiving a payment object for payment of a certain amount owed by a first party to a second party. The payment object carries sufficient account information for the payment from an account associated with the payment object. The second party communicates the account information from the payment object and an identification of the second party for receipt by a third party; and receives in return data that is indicative of a gratuity to be charged against the account. The second party prints a document that includes the certain amount owed and the gratuity, as indicated by the data received by the second party, and presents the document for signature by the first party. The printed document preferably includes the total of the amount owed and the gratuity. The payment object may be a credit card, charge card, debit card, rebate card, or stored-value card.
US09530150B2 Compensation model for network services
A compensation model is disclosed for compensating a network service provider. A networked system is also disclosed for presenting advertising during on-line interactions between a user and a service of a network (e.g., the Internet, interactive cable, and/or a LAN). Advertisements (ads) are presented to a networked user unrequestedly during user interactions with the service. The user can activate the ads (via hyperlinks) for receiving additional advertising. The system gathers user data and/or develops user profiles for selectively presenting ads, promotionals, discounts, etc. targeted to receptive users. In exchange for viewing such selective presentations, on-line access to the service is provided, the service including, e.g., (a) playing on-line interactive games (e.g., blackjack and poker), (b) providing access to the network itself (e.g., an Internet service provider), and/or (c) providing access to substantially any interactive service accessible via (b). The system can provide free/reduced cost network services to the user for viewing unrequested advertising. The system can be provided for a casino.
US09530148B2 Priori scheduling of multiple assets within a collection of asset delivery opportunities
Embodiments of the invention provide systems and methods for constructing a schedule well before the time of an asset delivery opportunity that associates a collection of one or more assets, potentially from multiple advertisers or asset providers, that are planned to play in each asset delivery opportunity. Specific rules for each device also determine which asset each will play, thereby ensuring that campaigns of total asset delivery and asset delivery pacing are approximately fulfilled. This scheduling can be accomplished using marketing data associated with each user device and can be prepared in a practicable period of time using reasonable processing resources.
US09530147B2 Independent targeted sponsored content management system and method
A system may include a database configured with individual partitions, one of the partitions corresponding to a sponsored content campaign of a social network. The system may further include multiple servers each communicatively coupled to the database, and each configured to implement a campaign having a campaign termination criterion. Each of the servers may include a processor configured to track sponsored content event data received from a user device based on the campaign and transmit the event data to the database and terminate the campaign based on a comparison of the event data as received from a partition of the database corresponding to the campaign and an estimation of event data not received from the database. The database may be configured to store the event data as received from the servers in the partition corresponding to the campaign upon receipt of the event data.
US09530146B2 Marketing the use of an acidic soft drink to enhance the efficacy of a gluten-digesting enzyme
This invention relates to a method of marketing a gluten-digesting enzyme supplement comprising providing an effective amount of a gluten-digesting enzyme to a person desirous of maintaining or enhancing gastro intestinal comfort or delaying the onset of gastrointestinal discomfort; or desirous of reducing gluten exposure, and informing the gluten sensitive individuals of the ability to increase the efficacy of the supplement by drinking one serving of an acidic soft drink having a pH in a range from 2 to 3.5. Furthermore, it relates to a kit comprising a gluten-digesting enzyme supplement and instructions for use in combination with an acidic soft drink having a pH in a range from 2 to 3.5.
US09530142B2 Method and system for creating a multifunctional collage useable for client/server communication
A system for mining data about activity performed within a virtual shopping cart includes a server node for serving the virtual shopping cart and for enabling activity within the virtual shopping cart, and a module running on the server for analyzing activity performed within the virtual shopping cart and for recording results of the analysis. The activity data mined is aggregated with other data mined over time relative to the same shopping cart such that preference data related to product types, product styles, merchants, brands, colors, and sizes may be determined to help fine tune product offerings.
US09530138B2 Method and system for authorizing card account transactions by geographic region
A method and system for authorizing card account transactions by geographic region by providing data for a user interface displaying geographic regions and merchant locations each corresponding to the location of a merchant where a transaction using a card account may be initiated, receiving a user interface selection representing a request to authorize or restrict card account transactions, receiving authorization requests for desired transactions, and authorizing or restricting the transactions in accordance with the request.
US09530137B2 Method and apparatus for secure access payment and identification
According to one aspect, the invention provides a system for authenticating identities of a plurality of users. In one embodiment, the system includes a first handheld device including a wireless transceiver which is configured to transmit authentication information, a second device including a wireless receiver, where the second device is configured to receive the authentication information.
US09530133B2 Adaptive secondary authentication criteria based on account data
An authentication challenge system for performing secondary authentication for an account associated with an online store is described. In one embodiment, the authentication challenge system includes a question generation engine, which can derive a series of questions based upon activity associated with a user account of an online store; a network interface, which can transport the series of one or more questions derived by the question generation engine to authenticate the user to the online store; a confidence engine, which can determine a required confidence level for a successful authentication, and can compute a confidence score of the user identity; and a quality engine, which can adjust the question generation engine and the confidence engine based upon an analysis of question and answer metrics across multiple accounts of the online store. The online store can include digital media, such as music, movies, books or applications for electronic computing devices.
US09530131B2 Transaction processing using a global unique identifier
A Globally Unique IDentifier (GUID) is used to match an authorization request with an authorization response for a transaction between a merchant and a consumer upon an account within a payment processing system where the payment amount is unknown until after the merchant receives the authorization response that includes the GUID. After receiving the authorization response and when the payment amount is known, the merchant forms a transmission that has information for delivery to an issuer of the account. This information is sufficient for the issuer to forward the payment amount from the account to pay the merchant for the transaction. While including the GUID and the payment amount, the information does not include an identifier of the account.
US09530123B1 Prediction of component maintenance
One or more processors determine wear for a robotic device. The one or more processors divide a direction of travel of a robotic device into zones. Each zone has an associated counter that counts how many times the robotic device has entered a given zone. The one or more processors update a count for a zone in response to the robotic device entering that zone. The one or more processors determine a level of wear for a component associated with the robotic device. The level of wear is based, at least in part, on a total of counts for the zones.
US09530122B1 Product defect diagnostic processing
A device identifier associated with a device may be determined. A diagnostic processing identifier associated with diagnostic processing to be performed for the device may be identified or generated. In addition, a diagnostic processing route that designates an order in which the device is to be routed between one or more diagnostic stations for diagnostic processing may be determined. Diagnostic processing of the device may be conducted and information indicating results of the diagnostic processing may be received. The information may indicate one or more defects identified as part of the diagnostic processing. Additional processing, such as processing to determine whether a defective device is repairable, may be performed based at least in part on the results of the diagnostic processing.
US09530118B2 Messaging client-based reminders
Implementing messaging client-based reminders includes monitoring, via a computer processor, a communication exchange for a communication session and determining an occurrence of an alarm event from contents of the communication exchange in response to the monitoring. Upon determining the occurrence of the alarm event, a reminder is generated and a timer is set indicating a time value corresponding to a time expression in the communication exchange. Upon expiration of the timer, the reminder is transmitted.
US09530117B2 Method and apparatus for transforming user requests and responses based on a persona
A Persona Based Interface associates a user's persona with a simple instant message request to a remote service. When the Persona Based Interface receives a simple instant message request from a user, the Persona Based Interface transforms the user's request based on the persona, and forwards the request to the remote service. After receiving a response to the request, the Persona Based Interface transforms the response into a simple instant message based on the persona.
US09530116B2 Finite state machine-based call manager for web-based call interaction
Systems, methods, devices, and non-transitory storage media provide a web-based graphical user interface to allow a user to control a softphone of a user device. A context handler operates on the user device and manages a page context of the web-based graphical user interface. A call manager operates as a RESTful web service on the user device. The context handler and the call manager communicate using JavaScript Object Notation with Padding (JSONP) messages. The call manager includes a finite state machine that indicates a current state of the softphone. The call manager generates application programming interface calls to the softphone in response to receiving JSONP messages. The user interface is updated to reflect the current state of the softphone based on execution of user selections by the softphone. The context handler chunks data into multiple JSONP messages if data exceeds a data size limitation of the JSONP.
US09530106B2 System and method for digital multi-lateral proofreading during a meeting
A digital multi-lateral system and method for proofreading a composition during a meeting. The system comprises a multi-screened monitor unit having a first screen and at least one oppositely facing second screen mounted in a common housing, images of a selected composition being viewable simultaneously on the first screen and the at least one second screen, a computer coupled to the monitor unit and provided with a dedicated software module for interfacing with the monitor unit, one or more primary and secondary co-author input devices, and means for transmitting signals generated by each co-author input device to the computer. Correction data is transmitted by a co-author input device to the computer, which transmits corrected image data simultaneously to the first and second screens. In one embodiment, the monitor unit receives VGA data and USB video data from the computer and transmits the same to the first and second screens, respectively.
US09530103B2 Combining of results from multiple decoders
Embodiments include a method, apparatus, and a computer program product for combining results from multiple decoders. For example, the method can include generating a network of paths based on one or more outputs associated with each of the multiple decoders. The network of paths can be scored to find an initial path with the highest path score based on scores associated with the one or more outputs. A weighting factor can be calculated for each of the multiple decoders based on a number of outputs from each of the multiple decoders included in the initial path with the highest path score. Further, the network of paths can be re-scored to find a new path with the highest path score based on the scores associated with the one or more outputs and the weighting factor for each of the multiple decoders.
US09530102B2 Multimodal input processing
Exemplary embodiments described herein provide methods, mediums, and systems for recognizing a formalism type present in an input and generating an output that is consistent with the formalism type. In order to generate an output that is consistent with the formalism type, exemplary embodiments analyze elements of the input together. Such a holistic analysis determines or uses a likelihood that the different elements coexist together in a given formalism type. Based on this holistic analysis, an appropriate formalism type that is consistent with the coexistence of the elements may be selected. After the appropriate formalism type is selected, the input may be processed to generate an output consistent with the formalism type. The output may be computer-based representations of the input defined according to a program associated with the identified formalism type, and/or the input may be translated or transformed into another representation.
US09530095B2 Method and system for exploring the associations between drug side-effects and therapeutic indications
A system and method for analyzing chemical data including a processor and one or more classifiers, stored in memory and coupled to the processor, which further includes an indication predictive module configured to predict whether a given chemical treats a particular indication or not and a side effect predictive module configured to predict whether a given chemical causes a side-effect or not. A correlation engine is configured to determine one or more correlations between one or more indications and one or more side effects for the given chemical and a visualization tool is configured to analyze the one or more correlations and to output results of the analysis.
US09530092B2 Haptic-based artificial neural network training
In a method for training an artificial neural network based algorithm designed to monitor a first device, a processor receives a first data. A processor determines a first service action recommendation for a first device using the received first data and an artificial neural network (ANN) algorithm. A processor causes a second device to provide haptic feedback using the received first data. A processor receives a second service action recommendation for the first device based on the haptic feedback. A processor adjusts at least one parameter of the ANN algorithm such that the ANN algorithm determines a third service action recommendation for the first device using the received first data, wherein the third service action recommendation is equivalent to the second service action recommendation.
US09530090B2 Secure RFID tag or sensor with self-destruction mechanism upon tampering
A circuit board anti-tamper mechanism comprises a circuit board having a frangible portion, a trigger having a trigger spring, a trigger arming mechanism actuated by the trigger wherein the trigger arming mechanism is initially non-actuated, a force producing mechanism, a latch providing mechanical communication between the trigger arming mechanism and the force producing mechanism, wherein the latch initially retains the force producing mechanism in a refracted position. Arming pressure applied to the trigger sufficient to overcome the trigger spring force will actuate the trigger arming mechanism, causing the anti-tamper mechanism to be armed. Subsequent tampering with the anti-tamper mechanism results in a decrease of pressure on the trigger below the trigger spring force, thereby causing the trigger arming mechanism to actuate the latch, thereby releasing the force producing mechanism to apply force to the frangible portion of the circuit board, thereby breaking the circuit board.
US09530088B2 Radio frequency identification devices
Radio frequency identification (RFID) devices are provided including a contactless internal voltage generator configured to generate a rectification voltage responsive to a radio frequency (RF) input signal and an internal voltage responsive to the generated rectification voltage and a reference voltage; a clock generator configured to sense an amount of current to a sink path of the contactless internal voltage generator and to generate a clock signal using a variable resistance value, the variable resistance value based on the amount of current sensed; and an internal circuit driven by the internal voltage and the clock signal.
US09530084B2 Image processing apparatus capable of ascertaining printing reduction effect, control method therefor, storage medium, and image processing system
An image processing apparatus which makes it possible to ascertain the concrete number of recording sheets that have been saved. Data is stored in an HDD of the image processing apparatus. The stored data is deleted based on an instruction from a user or a lapse of a predetermined time period. A deletion log including information indicative of whether the print data has not been printed or has been printed is recorded based on deletion of the data.
US09530083B2 Input tray selection mechanism
A method is disclosed. The method includes receiving a print job data stream, selecting an appropriate input tray from which to print the print job based on a set of rules indicated in one or more tables and performing an action indicated in the one or more tables.
US09530082B2 Objectionable content detector
A arbitrated image classifier can be trained to identify whether an image contains specified features, such as sexual, violent, or other potentially objectionable content. An arbitrated image classifier can include a configuration of classifiers and an arbitrator that determines a final image classification based on classification results from the classifiers. An arbitrated image classifier can be trained to identify image features by dividing images labeled as including or not including a specified feature into portions, which are provided to the classifiers of the arbitrated image classifier. The arbitrator of the arbitrated image classifier can determine a result for whether or not the image includes the specified feature. If the final result does not match the image label, parameter values for various of the classifiers or the arbitrator combining procedure can be adjusted. A trained arbitrated image classifier can then be used to determine whether new images include the particular feature.
US09530077B2 Image analysis
A computer-implemented method for identifying features in an image. The method comprises fitting a plurality of second models to the image, the plurality of second models together modelling a region of interest, wherein each part of the region of interest is modelled by at least two of the plurality of second models; and identifying the features in the image based upon the fit of the plurality of second models.
US09530076B2 Method and system for matching an image using normalized feature vectors
A method, system and computer program product for encoding an image is provided. The image that needs to be represented is represented in the form of a Gaussian pyramid which is a scale-space representation of the image and includes several pyramid images. The feature points in the pyramid images are identified and a specified number of feature points are selected. The orientations of the selected feature points are obtained by using a set of orientation calculating algorithms. A patch is extracted around the feature point in the pyramid images based on the orientations of the feature point and the sampling factor of the pyramid image. The boundary patches in the pyramid images are extracted by padding the pyramid images with extra pixels. The feature vectors of the extracted patches are defined. These feature vectors are normalized so that the components in the feature vectors are less than a threshold.
US09530069B2 Method and system for detecting and recognizing text in images
Various embodiments of the present invention relate to a method, system and computer program product for detecting and recognizing text in the images captured by cameras and scanners. First, a series of image-processing techniques is applied to detect text regions in the image. Subsequently, the detected text regions pass through different processing stages that reduce blurring and the negative effects of variable lighting. This results in the creation of multiple images that are versions of the same text region. Some of these multiple versions are sent to a character-recognition system. The resulting texts from each of the versions of the image sent to the character-recognition system are then combined to a single result, wherein the single result is detected text.
US09530067B2 Method and apparatus for storing and retrieving personal contact information
Method for a wearable device worn by a first user to generate or retrieve a personal contact record when encountering a second user is disclosed. The method of generating the personal contact record includes capturing a facial photograph of the second user and generating a face information; capturing a card photograph of a business card and performing OCR to obtain a card information; retrieving time and location information to obtain an encounter information; and generating the personal contact information. The method of retrieving the personal contact record includes capturing a facial photograph of the second user; searching through a contact database comprising facial images associated with identities of persons, and attempting to match the captured facial photograph with one of the facial images in the contact database to determine the identity of the second user, and providing messages. Wearable devices for performing the above methods are also disclosed.
US09530062B2 Fused raised pavement marker detection for autonomous driving using lidar and camera
An in-vehicle system for estimating a lane boundary based on raised pavement markers that mark the boundary. The in-vehicle system includes a camera for obtaining image data regarding reflective raised pavement markers and non-reflective raised pavement markers, an image processor for processing frames of image data captured by the camera, a lidar detector for obtaining lidar data regarding reflective raised pavement markers, and a lidar processor for processing frames of lidar data captured by the lidar detector. The image processor generates a first probabilistic model for the lane boundary and the lidar processor generates a second probabilistic model for the lane boundary. The in-vehicle system fuses the first probabilistic model and the second probabilistic model to generate a fused probabilistic model and estimates the lane boundary based on the fused probabilistic model.
US09530061B2 Extraction method for extracting a pitching scene and device for the same
An extraction method includes acquiring a captured baseball game footage that includes a plurality of frames; and extracting, as a frame representing a first pitching scene of a plate appearance, a frame corresponding to an initial state of a ball count from among frames representing pitcher pitching scenes included in the captured baseball game footage.
US09530059B2 Personal augmented reality
Image data comprising an image of an environment is received from a mobile video device located at the environment. An image of a marker is extracted from the received image for use in identifying the location of the mobile video device. A location associated with the marker is extracted from a database and the extracted location is sent as the location of the mobile video device. Also received is a request for information about an item in the environment that is of interest to a user of the mobile video device. A location in the environment associated with the item of interest is identified, and the information indicating the location of the item is transmitted to the mobile device for display within an image of the environment on the mobile video device. The item of interest may be displayed as an augmented reality within an image of the environment.
US09530053B2 Method and apparatus for detecting or checking an arrangement of laboratory articles on a work area of a laboratory work station
A method of detecting an original arrangement of laboratory articles of a laboratory work station records reference digital images with a digital camera. An image is displayed and visible regions with characteristic features are selected by a user within an input device. Reference image sections and corresponding reference image parameter files are produced and stored. A current arrangement of laboratory articles is compared with a previously recorded original arrangement. Detection of the current arrangement occurred by recording current digital images with a digital camera and creating current image sections defined by X/Y parameters of the reference image parameter files from the current digital images. A computer-based comparison of the processed current image sections with the processed reference image sections occurred and an analysis of this comparison and the display of agreements, deviations and errors is found.
US09530050B1 Document annotation sharing
A Mixed Media Reality (MMR) system and associated techniques are disclosed. The MMR system provides mechanisms for forming a mixed media document that includes media of at least two types (e.g., printed paper as a first medium and digital content and/or web link as a second medium). The present invention provides a system, method, and computer program product for annotating unindexed documents. Captured digital images of unknown paper documents or portions associated with a user are received with annotations. Features are extracted from the captured digital image and are stored, along with the captured digital image and the annotations.
US09530038B2 Indicia-reading system
Indicia-reading systems include an auxiliary reading apparatus with wireless charging capability. The systems are configured to couple, transfer, and receive energy wirelessly between a base charging station and auxiliary indicia reader via resonating coils that include an impedance matching network. Wireless charging capability can save space at the point-of-sale and add convenience for the operator.
US09530036B2 Methods for monitoring objects in a surgical field
Apparatus and methods for identifying and counting objects having identifiers entering and exiting a surgical field are provided. In one embodiment, the apparatus has an entry scanner, a hand held scanner and an exit scanner for generating a detection field and for receiving data which identifies said objects. In another embodiment, the apparatus has a plurality of lower antennas and an upper antenna for generating a detection field and for receiving data which identifies said objects. Various surgical devices with identifiers and methods for preventing electromagnetic coupling between and protecting objects and identifier are also provided. The invention further provides apparatus and methods comprising a handheld scanner and a mat adapted to underlie a patient during a surgical procedure.
US09530035B2 Methods and systems for using RFID in biological field
Biological reagent carrier devices and methods are disclosed, which employ RFID techniques to associate information with biological reagents.
US09530029B2 Method for producing a memory-card-reading body, corresponding memory-card-reading body and memory-card-reading terminal
A method is provided for producing a memory-card-reading body having a generally rectangular parallelepiped shape, including a slot for inserting a memory card, and including, on a rear face, a receiving element for receiving a memory card connector. The receiving element has a predetermined volumetric shape. The method includes the following successive steps: production of a flexible printed circuit including at least two areas which are an area including at least one strip conductor, and at least one contact area; and formation of the receiving element by overmoulding the flexible printed circuit.
US09530028B2 Identifiers for mass serialization
An example method includes generating a set of identifiers for a mass serialization; associating one or more of the identifiers of the set of identifiers with an object; and storing the set of identifiers and an association of the one or more identifiers with an object. Each identifier in the set of identifiers may have a representation of at least two different characters. The representation of each identifier in the set may have a predetermined length, and a number of one of the characters in the representation may be within a predefined range.
US09530027B2 Device lock for transit
Generally, this disclosure describes providing theft deterrence for a device while in transit. The system may include lock state circuitry configured to receive and store an unlock token, the unlock token configured to indicate that an associated device has successfully completed transit from a source to a destination; and lock state read circuitry configured to request the unlock token from the lock state circuitry and to determine whether the associated device has successfully completed transit from the source to the destination based on the unlock token.
US09530026B2 Privacy protection for participatory sensing system
Provided is a method that may be used for privacy protection. The method comprises: generating a pseudonym at a user equipment in association with sensed data; calculating a unique value based upon the pseudonym using a first algorithm; sending the unique value and the sensed data to a server; receiving from the server a certificate, wherein the certificate is calculated based at least in part on the unique value using a second algorithm; and sending at least the pseudonym and the certificate to a certification center via a secure channel, for obtaining a reward associated with the sensed data; wherein the certification center is internal or external to the server. By this method, a user's identify may be protected.
US09530014B2 Method and a device for making a computer application secure
In one embodiment, a security method for making secure a computer application being executed on a terminal is disclosed. In one embodiment the security method comprises obtaining information to the effect that the application is about to invite a user of the terminal to input data, accessing a binary file representative of a secret image known to the user of the terminal, the binary file being stored in a secure element of the terminal, constituting a complex image in the secure element, the complex image being obtained from the secret image and from dynamic data that is inaccessible to said terminal, and displaying the complex image on a screen of the terminal.
US09530013B2 Supporting the use of a secret key
A first installation stores key identifications with allocation to a respective user and a second installation stores secret keys which each can be found by means of a key identification. The first installation authenticates a user who logs onto the first installation via a user device, creates a temporary identifier, allocates the identifier to the user and transmits the identifier to the user device. The second installation receives a request for a secret key from the user device together with the identifier and requests a key identification from the first installation, wherein the received identifier is transmitted. The first installation determines a user allocated to the received identifier, identifies a key identification stored for the determined user and transmits the key identification to the second installation. This second installation determines a secret key based on the received key identification and transmits the secret key to the user device.
US09530011B2 Method and system for provision of cryptographic services
An encryption service system comprises an API for receiving requests from one or more calling applications. Each request comprises information identifying the operations to be performed on data to be processed and information identifying the origin and target of the data. The encryption service system further comprises a cryptographic server for processing the requests and determining, for each request, an encryption policy to be applied.
US09530008B2 System and method for a processing device with a priority interrupt
In accordance with an embodiment, a method of operating a processor includes operating in a first operating mode that prohibits access to a protected memory area, receiving a priority interrupt (PI) signal, operating in a second operating mode in response to receiving the PI signal, and executing a first routine by asserting a semi-privileged interrupt (SPI). Access to the protected memory area is permitted in the second operating mode, and the first routine operates in the second operating mode and is interruptible by the PI signal.
US09530005B2 Techniques for secure data management in a distributed environment
Techniques for secure data management in a distributed environment are provided. A secure server includes a modified operating system that just allows a kernel application to access a secure hard drive of the secure server. The hard drive comes prepackaged with a service public and private key pair for encryption and decryption services with other secure servers of a network. The hard drive also comes prepackaged with trust certificates to authenticate the other secure servers for secure socket layer (SSL) communications with one another, and the hard drive comes with a data encryption key, which is used to encrypt storage of the secure server. The kernel application is used during data restores, data backups, and/or data versioning operations to ensure secure data management for a distributed network of users.
US09530002B1 Verifying the integrity of a computing platform
Systems and techniques are described for verifying the integrity of a computing platform. Specifically, a software image can be generated that, when executed at a computing platform, verifies integrity of the computing platform. Next, the software image can be sent to the computing platform. The computing platform can execute the software image, thereby enabling the verification of the integrity of the computing platform.
US09530001B2 System and method for below-operating system trapping and securing loading of code into memory
A system for protecting an electronic device against malware includes a memory, an operating system configured to execute on the electronic device, and a below-operating-system security agent. The below-operating-system security agent is configured to trap an attempted access of a resource of the electronic device, access one or more security rules to determine whether the attempted access is indicative of malware, and operate at a level below all of the operating systems of the electronic device accessing the memory. The attempted access includes attempting to write instructions to the memory and attempting to execute the instructions.
US09530000B2 Secure privilege level execution and access protection
The subject disclosure is directed towards using one or more of hardware, a hypervisor, and privileged mode code to prevent system mode code from accessing user mode data and/or running user mode code at the system privilege level, or vice-versa. Also described is (in systems with a hypervisor) preventing non-hypervisor code from running in hypervisor mode or accessing hypervisor-only data, or vice-versa. A register maintained by hardware, hypervisor, or system mode code contains data access and execution polices for different chunks of addressable space with respect to which requesting entities (hypervisor mode code, system mode code, user mode code) have access to or can execute code in a given chunk. When a request to execute code or access data with respect to an address is received, the request is processed to determine to which chunk the address corresponds. The policy for that chunk is evaluated to determine whether to allow or deny the request.
US09529996B2 Controlling mobile device access to enterprise resources
A system is disclosed that includes components and features for enabling enterprise users to securely access enterprise resources (documents, data, application servers, etc.) using their mobile devices. An enterprise can use some or all components of the system to, for example, securely but flexibly implement a BYOD (bring your own device) policy in which users can run both personal applications and secure enterprise applications on their mobile devices. The system may, for example, implement policies for controlling mobile device accesses to enterprise resources based on device attributes (e.g., what mobile applications are installed), user attributes (e.g., the user's position or department), behavioral attributes, and other criteria. Client-side code installed on the mobile devices may further enhance security by, for example, creating a secure container for locally storing enterprise data, creating a secure execution environment for running enterprise applications, and/or creating secure application tunnels for communicating with the enterprise system.
US09529994B2 Call stack integrity check on client/server systems
Computer systems and methods in various embodiments are configured for improving the security and efficiency of client computers interacting with server computers through supervising instructions defined in a web page and/or web browser. In an embodiment, a computer system comprising one or more processors, coupled to a remote client computer, and configured to send, to the remote client computer, one or more instructions, which when executed by the remote client computer, cause a run-time environment on the remote client computer to: intercept, within the run-time environment, a first call to execute a particular function defined in the run-time environment by a first caller function in the run-time environment; determine a first caller identifier, which corresponds to the first caller function identified in a run-time stack maintained by the run-time environment; determine whether the first caller function is authorized to call the particular function based on the first caller identifier.
US09529991B2 Systems and methods for multi-factor remote user authentication
What is disclosed is a handheld multi-factor remote user authentication card device in the form factor of a prior art one factor of “what you have” security card. The handheld multifactor card-device has innovative features that enable this single card device itself to function and accomplish a multifactor remote user authentication of “what you know”, “what you have”, “where you are” and “what you are”, factors to a network. The authentication logic dynamically adjusts what factors are applicable for specific security application enabling a universal remote authentication card-device.
US09529990B2 Systems and methods for validating login attempts based on user location
A computer-implemented method for validating login attempts based on user location may include (1) detecting a login attempt by a user to log into a user account, where the login attempt originates from an atypical location, (2) determining that the atypical location is inconsistent with a pattern of past login locations for the user, (3) retrieving location information that indicates a current location of the user from at least one third-party Internet resource, (4) determining, based on the location information, that the atypical location of the login attempt matches the current location of the user, and (5) trusting that the login attempt legitimately originates from the user based at least in part on the atypical location matching the current location of the user. Various other methods, systems, and computer-readable media are also disclosed.
US09529988B2 Dossier packaging
The subject technology discloses configurations for receiving a request from a user to log into a communications server in which the request includes user credentials. The user is authenticated based on the included user credentials in the request. The user is then permitted to log into the communications server if the user is successfully authenticated. An input selecting a person of interest is received. The subject technology retrieves information associated with the selected person of interest. A dossier of information including the retrieved information associated with the selected person of interest is generated. The subject technology transmits the generated dossier to the user or an indicated recipient.
US09529986B2 Utilizing multiple computing devices to verify identity
A tool for identify verification using computing device collaboration. The tool generates a hash based, at least in part, on device specific information for one or more user owned devices. The tool determines whether a hash for the initial device matches the hash for at least one of the one or more user owned devices, and if so, sends, one or more challenge questions to the initial device, wherein the one or more challenge questions include at least one challenge question based on the device specific information for the one or more user owned devices. The tool determines whether each of one or more responses to the one or more challenge questions is correct.
US09529985B2 Global authentication service using a global user identifier
An authentication device may provide an authentication code to a third party device. The third party device may provide a third party service to which a client device has requested access. The authentication device may receive the authentication code from a mobile device that is different from the client device. The authentication device may determine a third party device identifier included in the authentication code. The third party device identifier may identify the third party device that provides the third party service. The authentication device may determine a transaction identifier included in the authentication code. The authentication device may selectively provide the transaction identifier to the third party device, identified by the third party device identifier, to cause the third party device to selectively permit the client device to access the third party service.
US09529984B2 System and method for verification of user identification based on multimedia content elements
A method and system for verifying an identity of a user accessing a user device are provided. The method includes receiving a request to verify the user identity accessing the user device; receiving a plurality of multimedia identification signals from the user device; querying a deep-content-classification (DCC) system to find a match between at least one concept structure associated with the user and the plurality of received multimedia identification signals, wherein the concept structure is created during a sign-in procedure; and sending an authentication notification upon determination of a match between the at least one concept structure and the plurality of received multimedia identification signals.
US09529983B2 Solid state memory unit and method for protecting a memory including verification of a sequence of requests for access to physical blocks
A solid state memory unit and method for protecting a solid state memory having a microprocessor are disclosed. The method may include receiving user-input requests for access to blocks of the solid state memory, the blocks of the solid state memory storing ordered virtual files. The user-input requests may have a respective sequence of virtual file position values. The method may include comparing the sequence of virtual file position values with a predetermined sequence of virtual file position values to verify the user-input requests, and when the sequence of virtual file position values equals the predetermined sequence of virtual file position values, responding to, via the microprocessor, requests for access to the blocks of the solid state memory to decrypt and transfer requested files stored. The predetermined sequence may correspond to a predetermined sequence of requests for access to files that can be selected by the user.
US09529982B2 Method and apparatus to manage user account of device
A method and apparatus to manage a user account. The method includes: setting a plurality of authorization accounts defining usage right regarding functions of the device; mapping at least one of the plurality of authorization accounts to a user authentication account of the device, based on an input of a user; and executing an application installed in the device using a result of the mapping the authorization account and the user authentication account, without stopping running of an operation system of the device.
US09529981B2 Methods and systems for setting access to a list of class entities
In an embodiment, a feature is an aspect of a class which represents information, data, behaviors, or capabilities encapsulated by the class. An accessing class may be given access to one or more specified features encapsulated by an accessed class, without gaining access to other features encapsulated by the accessed class. Accordingly, special access may be granted only to the behavior and data specifically designed for the accessing class, without allowing the accessing class access to all private data and behaviors of the accessed class, and without allowing all classes in a package access to the accessed class.
US09529978B2 Cloud E-DRM system and service method thereof
A digital rights management system and a service method thereof, and an enterprise digital rights management (E-DRM) system for document security installed in a cloud system are provided. The present systems can be implemented to be used in a variety of environments without being affected by the type or environment of a user terminal using a method which allows the client to use a contents data through a virtual machine system, and the E-DRM system is configured to include a cloud system, a security system and a virtual machine system.
US09529974B2 System and method for detecting, collecting, analyzing, and communicating event-related information
A system and method involves detecting operational social disruptive events on a global scale, assigning event staging and warnings to express data in more simplistic terms, modeling data in conjunction with linguistics analysis to establish responsive actions, generating visualization and modeling capabilities for communicating information, and modeling propagation of events for containment and forecasting purposes.
US09529969B2 Event based tracking, health management, and patient and treatment monitoring system
The present invention relates to an event based tracking, health management, and patient and treatment monitoring system, and, more particularly, to an event based tracking, health management, and patient and treatment monitoring software system including a unique/custom scanable code (e.g., a quick-response (“QR”) code) created for a specific positive/negative event which is tied to at least one specific phone number or other unique identifier of a mobile device, and a software application stored on the mobile device which enables the mobile device to (i) scan the unique QR code (on a card or other item), and (ii) log QR code data indicating the completion (positive) or non-completion (negative) of the event (and related information) in real time into a particular profile in a database (e.g., in a cloud server) for event validation and authentication, health management, and/or patient and treatment monitoring, and for reporting the QR code data (and related information) to authorized clients.
US09529966B2 Energy expenditure
Aspects relate to calculating energy expenditure values from an apparatus configured to be worn on an appendage of a user. Steps counts may be quantified, such as by detecting arm swings peaks and bounce peaks in motion data. A search range of acceleration frequencies related to an expected activity may be established. Frequencies of acceleration data within a search range may be analyzed to identify one or more peaks, such as a bounce peak and an arm swing peak. Novel systems and methods may determine whether to utilize the arm swing data, bounce data, and/or other data or portions of data to quantify steps. The number of peaks (and types of peaks) may be used to choose a step frequency and step magnitude. At least a portion of the motion data may be classified into an activity category based upon the quantification of steps.
US09529965B2 Clutch slip recovery system and method
A system and method for transferring torque from a prime mover to a transmission includes a coupling device, a hydraulic control system and a control module. The coupling device includes a torque converter clutch (TCC), where the coupling device is located between an output of the prime mover and an input of the transmission. The TCC is actuated between a fully engaged position, a slip mode where slip occurs, and a fully disengaged position. The hydraulic control system includes a controller device that communicates an actuation pressure to the TCC. The actuation pressure actuates the TCC between the fully engaged position, the slip mode, and the fully disengaged position. The controller is in communication with the TCC, the output of the prime mover, the input of the transmission, and the controller device of the hydraulic control system. The controller regulates the actuation pressure.
US09529956B2 Active region design layout
The integrated circuit (IC) device includes a substrate, an isolation feature, a first gate structure, a second gate structure, a first contact feature and a first supplementary active region. The isolation feature is disposed in the substrate, and the isolation feature defines a boundary between a first active region and a second active region of the substrate. The first gate structure is disposed over the first active region. The second gate structure is disposed over the second active region. The first contact feature is disposed over the first active region, in which a portion of the first active region is disposed between the first gate structure and the isolation feature. The first supplementary active region is disposed adjacent to the portion of the first active region, in which a thickness of the first supplementary active region is substantially in a range from 5 nm to 10 nm.
US09529952B1 Speculative circuit design component graphical user interface
In one embodiment, a tangible, non-transitory, computer-readable medium, includes instructions to receive a first circuit design, determine one or more variations of the first circuit design using register retiming with speculative circuit design changes, determine one or more performance improvements of the variations when fed clock signals over the first circuit design, determine one or more tradeoffs of the one or more variations of the first circuit design in comparison to the first circuit design, display a summary of the one or more variations of the first circuit design, the one or more performance improvements, and the one or more tradeoffs, and provide a user-selectable user interface element to enable selection of the first circuit design, at least one of the one or more variations of the first circuit design, or a combination thereof.
US09529951B2 Synthesis tuning system for VLSI design optimization
In one aspect, a method for tuning input parameters to a synthesis program is provided which includes the steps of: (a) selecting a subset of parameter settings for the synthesis program based on a tuning optimization cost function; (b) individually running synthesis jobs in parallel for each of the parameter settings in the subset; (c) analyzing results from a current iteration and prior iterations, if any, using the cost function; (d) using the results from the current iteration and the prior iterations, if any, to create combinations of the parameter settings; (e) running synthesis jobs in parallel for the combinations of the parameter settings in a next iteration; and (f) repeating the steps (c)-(e) for one or more additional iterations or until an exit criteria has been met.
US09529949B1 Generating intertwined pseudo-random circuit paths referenced to an area
Mechanisms for generating a micro node circuit path are disclosed. A first nodal list is generated that identifies a grid of macro nodes at a first resolution that is referenced to an area. The first nodal list is modified to identify a reference macro node circuit path through the grid of macro nodes. A second nodal list is generated that identifies a grid of micro nodes that is referenced to the area at a second resolution that is a greater resolution than the first resolution. The second nodal list is modified to identify at least one derived micro node circuit path that extends through a plurality of the micro nodes based on an offset with respect to the reference macro node circuit path.
US09529939B2 Surfacing algorithm for designing and manufacturing 3D models
Techniques are described for decomposing three-dimensional (3D) geometry into an assemblable collection of two-dimensional (2D) panels. Importantly, the 3D geometry is automatically encoded into the 2D panels, allowing the 3D geometry to be recreated simply by joining the 2D panels at the appropriate seams and creating the appropriate bends/folds in each panel. Further, each panel has edges, vertices, and faces which can be encoded in the panelization, allowing assembly instructions to be algorithmically generated, Doing so allows users to be provided with a step-by-step instructions carried out to realize the 3D geometry encoded in the 2D panels.
US09529936B1 Search results using query hints
Systems and methods are provided that allow a user to send a search query and a hint associated with the search query to a search system. Suggested queries are associated with hints prior to the suggested queries being provided to a user interface that allows a user to enter search information into a search field. After receiving input into the search field, the input is sent to a search system and suggested queries with their associated hints are returned. In response to selecting a suggested query, the suggested query and the associated hint are returned to the search service. The search service then provides search results based on the suggested query and the associated hint.
US09529935B2 Efficient link management for graph clustering
One embodiment of the present invention provides a computing system. The computing system includes a processor and a memory. The memory stores instructions which when executed by the processor cause the processor to perform a method. The method comprises identifying a first vertex and a second vertex in a graph as candidates for a link between the first and the second vertices. The first and second vertices represent elements in a data set. The method further comprises determining a link indicator based on a first link count, which indicates a sum of respective weights of links of a vertex, associated with the first vertex and a second link count associated with the second vertex. The method also includes determining whether to connect the first and second vertices with a link based on the link indicator's conformity with a link threshold, which determines whether to connect two vertices using a link.
US09529932B2 XML node labeling and querying using logical operators
A method includes labeling XML document and determining the relationship between the nodes in the document by inputting data from a XML tree structure, visiting the nodes of the XML document by breath-first traversal in level order, assigning a label to each node in the form of , where the level is the level where the node exists and the number is a unique identifying number generated by using a masking technique, creating a mask for each level, and storing the label and mask created for each level in the memory. The method further includes determining the relationship between nodes by using logical operators.
US09529931B2 Image display device and memory management method of the same
According to the present disclosure, there is disclosed an image display device and a memory management method thereof. According to an embodiment of the present disclosure, when a plurality of web pages are loaded and thus the memory space is insufficient, the loaded web pages may be implemented to be unloaded based on unloading priorities assigned by user preference, thereby minimizing data loss and securing insufficient memory space. Furthermore, when approaching an excess of memory capacity as a plurality of web pages are executed, it may be notified to the user in advance and the assigned unloading priorities may be provided to allow the user's selective unloading, thereby providing the user's convenience and enhancing the use efficiency of a web browser.
US09529929B1 Systems, apparatus, methods of operation thereof, program products thereof and methods for web page organization
Systems, apparatus, methods of operation thereof, program products thereof and methods for web site organization, which comprises a plurality of web pages having common content. The system can be comprised of a plurality of web pages having common content and one or more web pages that do not have common content. Each of the plurality of web pages comprising common content can have non-common content, that is content, which is not common to each of the plurality of web pages having common content. There is a common content memory location for storing the common content. There is at least one non-common content memory location for storing the non-common content. The common content comprises an insertion location. The system comprises a generator of each of the particular web pages comprising common and non-common content. The generator comprises a web site location identifier, a parameter and an inserter or insert means at the insert location. The parameter identifies the particular non-common content storage location to generate a particular web page comprising common and non-common content. The generator inserts the particular non-common content into the common content permitting the system to display a web page corresponding to a combination of the common content and the non-common content. This system permits modification of many web pages through modifying only one memory location, that is the one corresponding to the common content, when the modification relates to the common content.
US09529928B2 Intelligent categorization of bookmarks
System, method, and computer program product, comprising, responsive to accessing a first electronic page in a browser, collecting metadata from the first electronic page, determining: (i) a set of existing data structures to store bookmarks for electronic pages in the browser, each data structure in the set of existing data structures representing an associated category for electronic pages, and (ii) a preference for using the existing data structures to store bookmarks for electronic pages, and, responsive to receiving an indication to bookmark the first electronic page, identifying, based on the metadata, the existing data structures, and the preference for using the existing data structures, a first data structure in which to store the bookmark for the first electronic page, presenting the first data structure for approval, and responsive to receiving approval for the first data structure, storing a bookmark for the first electronic page in the first data structure.
US09529926B2 Snapshot refreshment for search results page preview
Methods, systems, and programming for refreshing web page URL snapshots are disclosed. A plurality of URLs is received. URLs from the plurality of URLs are selected to schedule for refreshment of snapshots corresponding to web pages associated with the URLs. A plurality of snapshots is generated, each snapshot associated with a corresponding URL of the selected URLs scheduled for refreshment. The plurality of snapshots is provided for display, wherein each snapshot is a viewable and actionable link to the corresponding URL the snapshot is associated with.
US09529913B2 Computing system with dynamic web page feature
An example method involves accessing web-traffic data associated with a web page hosted by a first computing-device, wherein the web page comprises meta-tag data; using the accessed web traffic data to determine that the first computing-device received a threshold amount of requests that are (i) for the web page and (ii) associated with a search term; responsive to the determining, modifying the meta-tag data based on the search term; and transmitting the modified meta-tag data to a second computing-device, wherein the second computing-device is configured for (i) receiving the modified meta-tag data, (ii) receiving a request for a list of search results based on a set of search terms, (iii) responsive to receiving the request, using the set of search terms and the modified meta-tag data to perform a web search, thereby generating a list of search results, and (iv) transmitting the list of search results to a third computing-device.
US09529912B2 Metadata querying method and apparatus
Embodiments of the present invention provide a metadata querying method and apparatus. The method includes: sampling at least one piece of first metadata from to-be-searched-for metadata; using at least a part of feature values in each piece of the sampled first metadata as an index, and searching a sparse index table preset in a memory for a corresponding container identifier; selecting, according to the number of times that a same container identifier is found, a container corresponding to a container identifier that meets a set condition; loading metadata in the selected container into a metadata cache; and searching the metadata cache for a data block that is the same as the to-be-searched-for metadata. In the embodiments of the present invention, querying performance can be improved and occupied memory space can be reduced.
US09529910B2 Systems and methods for an expert-informed information acquisition engine utilizing an adaptive torrent-based heterogeneous network solution
A system for operating an expert-informed information acquisition engine utilizing an adaptive torrent-based heterogeneous network solution includes a memory storing computer-executable instructions; at least one processor configured to access the at least one memory and execute the computer-executable instructions to: receive user-defined tags associated with a first user; access interaction data associated with one or more second users and the first user; receive user-defined tags associated with one or more second users; identify a lexicon based on the user-defined tags; receive a query from the first user, wherein the query; rank one or more documents based on the lexicon; and display one or more documents based on the lexicon, with already-seen results removed.
US09529905B2 Information processing device, information processing method, program, and information storage medium
To be able to change settings for selective changing control of a program as a target for sound input/output flexibly. A background music (BGM) sound selection managing section obtains priority values set to a plurality of programs, respectively. The BGM sound selection managing section performs control such that a program selected from among the plurality of programs on a basis of the obtained priority values becomes a target for selective sound input/output from/to an outside.
US09529904B2 Utility-based ontology evolution
Exemplary embodiments of the present invention disclose a method, computer program product, and system for updating an ontology when a set of evidences and a set of constraints are given as inputs. Exemplary embodiments categorize concepts into three sets, a definitely relevant set, a possibly relevant set, and an irrelevant set. Exemplary embodiments store the concepts from the definitely relevant set in the ontology and the concepts from the possibly relevant set in a residual ontology. Exemplary embodiments match concepts in the set of evidences to the concepts in the ontology or the concepts in the residual ontology. Exemplary embodiments determine to enhance the strength of the existing concepts in the ontology or the existing concepts in the residual ontology. Exemplary embodiments determine to expand the ontology or the residual ontology. Exemplary embodiments remove the concepts from the ontology or the residual ontology utilizing the set of constraints.
US09529901B2 Hierarchical linguistic tags for documents
Systems, methods, and other embodiments associated with linguistic tags for documents are described. In one embodiment, a method includes receiving a document. The example method includes applying a language tag value to a language tag of the document and applying a locale tag value to a locale tag of the document. The language tag and the locale tag are assigned positions in a hierarchy of linguistic tags such that the language tag inherits from the locale tag. The example method may also include storing the document, the language tag value, and the locale tag value in a memory.
US09529900B2 Visual interface browser
The present disclosure describes viewing visual interface documents through a visual interface browser. A visual interface browser is caused to be displayed on a user device. A visual interface document representing a technical interface specification is retrieved from a repository in response to user selection of a technical interface icon through the visual interface browser. Sub-document technical data associated with the visual interface document is retrieved from the repository. The visual interface document including sub-document technical data is caused to be displayed on the user device. Notes associated with the visual interface document and associated with an authenticated user of the user device are caused to be displayed on the user device.
US09529897B2 Computer-implemented method and system for combining keywords into logical clusters that share similar behavior with respect to a considered dimension
A computer-implemented method and system for combining keywords into logical clusters that share a similar behavior with respect to a considered dimension are disclosed. Various embodiments are operable to order a list of keywords from high activity to low activity, partition the list into at least two sets, a head partition including keywords with an activity level above a predefined threshold, a tail partition including the remainder of the keywords in the list, model the keywords in the head partition based on a set of variables, score the keywords in the head partition based on the modeling, and cluster head partition keywords with tail partition keywords having at least one common variable into at least one keyword cluster.
US09529896B2 Hierarchical online-content filtering device and method
A system and method identifies structures within a presentation and detects undesired content in those structures. A decision is made whether to remove portions of the presentation containing the undesired content or the entire presentation, based on determining the domination of the undesired content within the structures of the presentation. The presentation can be reconstructed by being rendered without the undesired content or the structures containing the undesired content.
US09529895B2 Method and system for discovering dynamic relations among entities
Method, system, and programs for detecting dynamic relationship and discovering dynamic events. Data from a first data source is first received. At least one dynamic relation candidate is identified and each dynamic relation candidate involves multiple entities. The at least one dynamic relation candidate is identified based on temporal properties with respect to the entities exhibited in the data from the first data source. Dynamic relations are then extracted by corroborating the temporal properties of the entities involved in the at least one dynamic relation candidate with that of the same entities exhibited in data from a second data source. Then, a dynamic event that gives rise to the dynamic relations among different entities is detected.
US09529894B2 Context based passage retreival and scoring in a question answering system
According to an aspect, a question answering computer system determines a set of search terms for a given question. A plurality of passages that each includes at least one search term in the set of search terms is identified in response to a search of a document for search terms in the set of search terms. A passage from the plurality of passages is selected. A context based score of the selected passage that indicates the likelihood that the selected passage contains an answer to the question is generated based on criteria that specify a relationship among the set of search terms, content of the passage, and content of at least one other passage in the plurality of passages.
US09529891B2 Method and system for rapid searching of genomic data and uses thereof
A method, apparatus and system for transforming genomic data into a computer database environment comprising a forward lookup table and a plurality of reverse lookup tables which relate consecutive overlapping reference sequence segments to reference sequences stored in the forward lookup table enables rapid and precise matching of undefined biological sequences with reference sequences.
US09529889B2 Information terminal with application prioritization
An information terminal, which is mounted on a vehicle and executes multiple applications, includes a categorizer, a selector, and an executer. The categorizer categorizes the applications into categories. The selector selects a priority application to be executed with high priority from each category according to a driving situation of the vehicle. The executer executes the priority application selected by the selector.
US09529888B2 System and method for efficiently providing media and associated metadata
An electronic device with one or more processors, memory and a display obtains a file header for a file corresponding to a plurality of clusters, where the file header includes a cluster index. The device receives a request to seek to a respective position within the file and, in response to receiving the request: identifies a cluster of the plurality of clusters that includes content that corresponds to the respective position based on the cluster index; obtains a cluster header associated with the cluster based on information retrieved from the cluster index, where the cluster header includes a content index; and after obtaining the cluster header, identifies respective content within the cluster corresponding to the respective position based on the content index. The device provides at least a portion of content corresponding to the file to a presentation device for presentation to a user, starting with the respective content.
US09529887B2 Efficient detection of information of interest using greedy-mode-based graph clustering
One embodiment of the present invention provides a computing system, which identifies, for graph clustering, first and second sets of vertices in a graph. A respective vertex in the first set of vertices is an exemplar. A respective vertex in the second set of vertices is not an exemplar and not associated with a vertex identifier. The system assigns a vertex identifier of a first vertex in the first set to a second vertex in the second set based on type and strength of relationship between the vertices. The vertices represent elements in a data set. The vertex identifiers of the first and second vertices do not change before convergence. The system allocates the first vertex and the second vertex to a first vertex cluster associated with the vertex identifier, and detects convergence based on modularity associated with vertex clusters representing information of interest in the data set.
US09529884B2 Usage based synchronization of note-taking application features
Methods are disclosed for, within a note-taking application, selectively synchronizing different notebook components with a centralized server. In one particular embodiment, different notebook components are assigned different synchronization rates based on usage characteristics. The different notebook components are synchronized more or less frequently relative to each other based on the assigned synchronization rates.
US09529877B1 Method for identifying correspondence between a COBOL copybook or PL/1 include file and a VSAM or sequential dataset
A method for matching format defining data structures with data-containing structures involves analyzing attributes of data-containing structures; analyzing format defining data structures using record level metrics comprising record level consistency values, record uninitialized data values and record match values; identifying a set of data-containing structures containing data elements having formats substantially corresponding to a format defining data structure and using file level metrics, based upon results of the record level metrics; ranking the set based upon correspondence between one or more of: a) data types within the set and data types within the format defining data structures, or b) values within the set and definitions within the format defining data structures, to obtain a subset that may correspond to at least one of the format defining data structures; and identifying a format defining data structure usable to access a data-containing structure and thereby obtain valid data therefrom.
US09529872B2 Asynchronous data processing
A method, a system, and computer-readable medium for processing of data are disclosed. An acknowledgement is received to store business object data. Based on the acknowledgement, an indication that the business object data is stored in a repository is generated. Processing of the business object data to enable storage in the repository continues while generating such indication.
US09529868B1 Document processing system and method
A system comprises a data storage system, data analysis logic, and user interface logic. The data analysis logic is configured to analyze the documents and to identify documents that satisfy search criteria received from a user. The user interface logic is configured to generate a user interface. The user interface logic is also configured to generate a plurality of charts for display to the user. The user can interact with the charts to specify modified search criteria. The user interface logic is configured to receive modified search criteria from the user via one of the charts and update the remaining charts to reflect the modified search criteria.
US09529866B2 Efficiently handling large data sets on mobile devices
A system, method, and computer program product are provided for efficiently fetching and displaying large datasets on mobile devices, such as devices running the iPhone™ operating system. The method fetches data for a mobile device from a server and displays a plurality of data rows in a ListView within a user interface on the mobile device. The method stores primary keys on the mobile device until their corresponding data rows are to be displayed. The method reacts to user inputs such as scrolling actions and touch screen gestures to efficiently fetch and display list view subsets of large datasets. The method facilitates quick response times when navigating through large lists of data on a mobile device by: fetching displayable or visible rows of data in a data list view, preloading the visible rows on the mobile device; and binding the visible rows to user interface elements on the mobile device.
US09529864B2 Data mining electronic communications
User insights derived from communication data may be provided. Communications associated with a user may be collected and analyzed to derive insights about the user. The insight may then be provided to the user, such as for modifying an application functionality, creating a message processing rule, providing new information to the user, and updating an application display or user interface.
US09529863B1 Normalizing ingested data sets based on fuzzy comparisons to known data sets
Embodiments are directed towards normalizing ingested data sets based on fuzzy comparisons to known data sets. Raw data sets that each include raw records may be provided to an ingestion engine. Ingestion rules and known data sets may be provided based on the raw records. The ingestion engine may be employed to iteratively execute the ingestion rules. A comparison of the raw records to the known data sets may be performed. Contents of the raw records may be transformed into model record values and stored in model records. A score value that indicates a confidence level that the model records are correct may be provided. An association of the one or more ingestion rules used to transform the raw record contents into the model record values for each of the one or more model records may be added to a data model.
US09529859B2 Capturing and presenting site visitation path data
Node sequence data, such as website visitation records, are filtered, analyzed, and summarized in reports. An administrator can designate particular target paths of interest in terms of a checkpoint node sequence. Node sequences are filtered based on the checkpoint node sequence, without regard to any additional or tangential nodes appearing in the sequences. In addition, node sequences can be specified in terms of specific nodes of interest along with wild cards. Reports depict the relative frequency of occurrence of node sequences using visual indicators such as line thickness and/or color.