| Document | Document Title |
|---|---|
| US09431933B2 |
Inverter apparatus
Provided is an inverter apparatus capable of preventing occurrence of overcurrent in an AC motor and stably controlling driving of the AC motor. The inverter apparatus controlling the AC motor included in an electric compressor includes a shunt resistor for detecting current flowing in the AC motor, and a limit value control unit controlling a current limit value for a detected current detected at the shunt resistor. The limit value control unit determines whether the number of times the detected current becomes equal to or more than the first threshold within a first predetermined time is equal to or more than a first number of times. The limit value control unit decreases the current limit value when the number of times the detected current becomes equal to or more than the first threshold within the first predetermined time is equal to or more than the first number of times. |
| US09431930B2 |
Emergency stop method for hybrid construction equipment and brake control device
The present disclosure relates to an emergency stop method for hybrid construction equipment and a brake control device, and more particularly, to an emergency stop method for hybrid construction equipment and a brake control device, which may confirm a failure occurrence location of the hybrid construction equipment, absorb inertial energy of the swing body using several functions for each generated failure location so as to stably stop the swing body in an emergency manner, and when the failure occurs in the hybrid construction equipment, create the brake pattern by using the swing speed or the front information, control a brake of the swing body by controlling a voltage control valve or a hydraulic valve in accordance with the created brake pattern, such that a user may smoothly stop the swing body in accordance with a desired stop speed profile. |
| US09431929B2 |
Asynchronous fluidic impulse strain-based energy harvesting system
Energy harvesting systems and devices are provided that harvest energy from external asynchronous force impulses using fluidic force transfer of the external force impulses to a plurality of compliant piezoelectric layers that seal a corresponding plurality of inner cavities. Each inner cavity can contain a compressible gas. Direct fluidic force transfer can be accomplished via a compressible or incompressible fluid between an external cover and the compliant piezoelectric layers. |
| US09431928B2 |
Power production in a completed well using magnetostrictive materials
A device for generating electrical energy from mechanical motion includes a magnetostrictive generator configured to be mechanically coupled to a power conveyance path in a well bore. The power conveyance path is configured to experience an axial force change, and the magnetostrictive generator includes at least one magnetostrictive element that experiences a corresponding force change that results in a change in magnetic permeability in the at least one magnetostrictive element resulting, and is configured to experience a change in magnetic flux in a least one component that is electromagnetically coupled to at least one conductive coil, and the conductive coil is configured to generate electricity due to these magnetic flux changes. |
| US09431924B2 |
Power source inverter for use with a photovoltaic solar panel
An improved topology is presented for a single phase power source inverter that is designed to minimize double frequency ripple. The inverter circuit includes: a capacitor coupled in parallel across a direct current (DC) voltage source; a bridge circuit having three legs electrically connected in parallel with the voltage source and each other, such that each leg of the bridge circuit being comprised of two switches coupled in series with each other; a low pass filter electrically connected between the bridge circuit and a load; an auxiliary inductor having a first terminal electrically connected to one leg of the bridge circuit and a second terminal electrically connected to another leg of the bridge circuit and the load; and a controller that drives the switches of the bridge circuit in a manner that maintains instantaneous power transfer across the bridge circuit constant. |
| US09431922B2 |
ARC fault protection for power conversion
An apparatus and system for arc fault protection during power conversion. In one embodiment, the apparatus comprises a power converter comprising a first and a second pair of DC input terminals, coupled in series, for coupling to a first and a second DC source, respectively; an input bridge; an inductor; a first and a second arc fault protection capacitor, wherein (i) the series combination of the first and the second pair of DC input terminals is coupled across the input bridge, (ii) a first terminal of the inductor is coupled between the first and the second pair of DC input terminals, (iii) a second terminal of the inductor is coupled between switches on one leg of the input bridge, and (iv) the first and the second arc fault protection capacitors are coupled across the first and the second pair of DC input terminals, respectively. |
| US09431921B2 |
Controlling capacitive snubber as function of current in inverter
One or more systems and/or techniques are provided for electrically coupling and/or decoupling a capacitive snubber component to/from an inverter as a function of a current in the inverter. A current sensing component may be configured to measure the current in the inverter and/or determine whether the current in the inverter exceeds a desired threshold. The desired threshold may be set at a value sufficient to reset the capacitive snubber component. When the current in the inverter is above the desired threshold, the capacitive snubber component may be coupled to the inverter. When the current in the inverter is below the desired threshold, the capacitive snubber component may be decoupled from the inverter. In this way, little to no energy stored in the capacitive snubber component may be dissipated in the inverter when the current in the inverter drops below a level sufficient to reset the capacitive snubber component. |
| US09431918B2 |
Grounding scheme for modular embedded multilevel converter
A power converter includes at least one leg with a first string including a plurality of controllable semiconductor switches, a first connecting node, and a second connecting node, wherein the first string is operatively coupled across a first bus and a second bus. The at least one leg also includes a second string operatively coupled to the first string via the first connecting node and the second connecting node, wherein the second string includes a plurality of switching units. The first string includes a first branch and a second branch, wherein the second branch is operatively coupled to the first branch via a third connecting node and the third connecting node is coupled to a ground connection. |
| US09431917B2 |
Switching power supply including a rectifier circuit having switching elements, and electric power converter
An electric power converter includes a bridge circuit, a transformer, a rectifier circuit, and a smoothing circuit. The rectifier circuit includes a first secondary-side diode disposed in a first current path extending between one end of a secondary winding and a first terminal of the smoothing circuit, a second secondary-side diode disposed in a second current path extending between the other end of the secondary winding and the first terminal of the smoothing circuit, a third secondary-side diode, a fourth secondary-side diode, a first secondary-side switching element, and a second secondary-side switching element. The first secondary-side switching element and the second secondary-side switching element are connected in common to a first node at which the first current path and the second current path are connected to each other. |
| US09431915B2 |
Power conversion apparatus and refrigeration air-conditioning apparatus
Provided is a power converter for converting electric power between a power source and a load, including: a boosting device including a boost rectifier configured to prevent a backflow of a current from the load side to the power source side, the boosting device being configured to change a voltage of electric power supplied from the power source to a predetermined voltage; a commutation device configured to perform a commutation operation of directing a current flowing through the boosting device to another path; and a controller configured to perform control related to the voltage change of the boosting device and control related to the commutation operation of the commutation device, in which the commutation device is configured to flow, when the commutation device performs the commutation operation, a current generating a voltage causing reverse recovery of the boost rectifier to the commutation device side. |
| US09431914B2 |
Electrical circuit for delivering power to consumer electronic devices
An electrical circuit for providing electrical power for use in powering electronic devices is described herein. The electrical circuit includes a primary power circuit and a secondary power circuit. The primary power circuit receives an alternating current (AC) input power signal from an electrical power source and generates an intermediate direct current (DC) power signal. The intermediate DC power signal is generated at a first voltage level that is less than a voltage level of the AC input power signal. The secondary power circuit receives the intermediate DC power signal from the primary power circuit and delivers an output DC power signal to an electronic device. The output DC power signal is delivered at an output voltage level that is less than the first voltage level of the intermediate DC power signal. |
| US09431909B2 |
Synchronous rectifier controller for a switched mode power supply
Consistent with an example embodiment, a synchronous rectifier controller for a switched mode power supply comprises a transformer with a secondary side winding and a synchronous rectifier transistor with a gate, a source and a drain; the source and drain provide a conduction channel coupled to the secondary side winding. The controller comprises an input terminal for receiving an input signal related to a voltage at the drain, an output terminal configured to provide an output signal for setting a logic state of the gate, and circuitry having a first threshold and a second threshold. The circuitry is configured to generate the output signal and determine a time period in accordance in accordance with a comparison between the input signal and the first threshold; and in accordance with a comparison between the input signal and the second threshold, set the first threshold in accordance with the time period. |
| US09431907B2 |
Switching regulator incorporating operation monitor
A switching regulator includes a first switching element and a second switching element in a pair to be switched over to convert an input voltage to a certain constant voltage, and an operation monitor to monitor an operation state of the first switching element, in which a switching of the second switching element is changed according to a result of the monitoring by the operation monitor. |
| US09431905B2 |
Multiphase buck converter and multiphase buck conversion method
A multiphase buck converter (10) is disclosed, comprising: —a first buck converter branch (SD1, L1) comprising a first core section (COR1), a first power section (PWR1) having a first output node (LX1), a first coil (11) having a first end connected to the first output node (LX1), the first power section (PWR1) being adapted to be controlled by the first core section (COR1) for providing to the coil (L1) a coil current (I1), the first core section (COR1) and the first power section (PWR1) being integrated in a chip (IC); —a second buck converter branch (SD2, L2) comprising a second core section (COR2), a second power section (PWR2) having a second output node (LX2), a second coil (L2) having a first end connected to the second output node (LX2), the second power section (PWR2) being adapted to be controlled by the second core section (COR2) for providing to the second coil (L2) a second coil current (I2), the second core section (COR2) and the second power section (PWR2) being integrated in said chip (IC); —a feedback loop adapted to balance said coil currents (I1,I2). The feedback loop comprises a control block (C_B) that, in order to balance said coil currents, is adapted to compare a first average voltage at the first output node (LX1) with a second average voltage at the second output node (LX2) and control the first (SD1, L1) and second branch (SD2, L2) in order to make said first and second average voltages equal to each other. The control block (C_B) is integrated in said chip (IC) and has a first input directly connected to said first output node (LX1) and a second input directly connected to said second output node (LX2). The control block (C_B) is adapted to directly obtain said first and second average voltages from the instantaneous voltages of the first (LX1) and second (LX2) output nodes. |
| US09431904B2 |
DC/DC converter efficiency improvement for low current levels
The present document relates to efficient DC/DC converters with a modular structure for providing different levels of output currents. A controller for controlling a power converter which is configured to convert electrical power at an input voltage into electrical power at an output voltage is described. The power converter comprises first and second inverter stages comprising high side switches and low side switches which are arranged in series between the input voltage and a reference voltage. The midpoints between the high side switches and the low side switches are coupled. The electrical power at the output voltage is drawn from the midpoint. The controller is configured to determine an indication of a requested level of the electrical power at the output voltage, and to activate or deactivate the second inverter stage based on the indication of the requested level of the electrical power at the output voltage. |
| US09431903B2 |
DC-DC converter and organic light emitting display including the same
A DC-DC converter includes a first power source generator, the first power source generator including an input port and a first output port, the first power source generator being configured to receive an input power source to the input port, and being configured to generate a first power source, the first power source being output to the first output port, and a selecting unit, the selecting unit being configured to selectively transmit, to the first power source generator, one of: a feedback voltage, the feedback voltage being input from an external feedback wiring line via a feedback terminal, and a voltage of the first output port. |
| US09431902B2 |
Sensorless current sense for regulating inductor current in a buck converter
A device and method for sensing an inductor current in an inductor is provided that generates a voltage signal proportionate to the inductor current if the inductor is connected to a positive supply and simulates the inductor current if the inductor is not connected to the positive supply. The voltage signal may be generated by sampling an input voltage from the inductor onto a capacitor if the inductor is connected to the positive supply. The inductor current may be simulated by generating a simulation current and pushing the simulation current onto the capacitor. |
| US09431900B2 |
Dynamic operating frequency control of a buck power converter having a variable voltage output
A switch controller for a variable output voltage power converter includes a pulse width modulator (PWM) output producing a pulsed signal for driving a power converter switch. A mode selector output is connected to a multiplier. A period selector output is connected to the multiplier and to a PWM input. The multiplier output is connected to another PWM input. A comparator output is connected to a period selector input. The period selector outputs a nominal cycle time to the PWM when an operating on-time state is greater than a minimum operating on-time. The period selector outputs an updated cycle time greater than the nominal cycle time when the operating on-time state is less than the minimum operating on-time causing the PWM to output a pulsed signal with the updated cycle time and a duty cycle equal to a duty cycle of an immediately preceding pulsed signal. |
| US09431896B2 |
Apparatus and method for zero voltage switching in bridgeless totem pole power factor correction converter
Power factor correction (PFC) apparatus, controllers, and methods for operating bridgeless totem pole power factor correction converters in which AC input voltage polarity is detected for designation of active and freewheeling switches of the totem pole circuit, a nominal freewheeling switch on-time is determined according to a Volt×Second balance relationship, and the voltage across the designated active switch is sensed and used to selectively modify or offset the nominal freewheeling switch on-time to provide a computed freewheeling switch on-time for the next switching cycle to facilitate zero voltage switching of the active switch. |
| US09431892B1 |
High voltage start-up circuit with adjustable start-up time
A high voltage start-up circuit with adjustable start-up time, wherein, the drain electrode of the first NMOS transistor is connected with a first terminal of the first resistor, a gate electrode of the second NMOS transistor and a negative terminal of the diode; a source electrode of the first NMOS transistor, together with a positive terminal of the diode, is connected to the power ground; a drain electrode of the second NMOS transistor, together with a second terminal of the first resistor, is connected with a port SW of a chip; a source electrode of the second NMOS transistor, together with a first terminal of the second resistor, is connected with a power port VDD of the chip. The circuit can adjust the start-up time and the restart time of the chip flexibly. |
| US09431891B2 |
Systems and methods for two-level protection of power conversion systems
Systems and methods are provided for protecting a power conversion system. A system controller includes a two-level protection component and a driving component. The two-level protection component is configured to detect an output power of a power conversion system and generate a protection signal based on at least information associated with the output power. The driving component is configured to generate a drive signal based on at least information associated with the protection signal and output the drive signal to a switch associated with a primary current flowing through a primary winding of the power conversion system. The driving component is further configured to generate the drive signal corresponding to a first switching frequency to generate the output power equal to a first power threshold and generate the drive signal corresponding to a second switching frequency to generate the output power equal to a second power threshold. |
| US09431890B2 |
Apparatuses and methods for converting single input voltage regulators to dual input voltage regulators
Apparatuses and methods for providing output power are disclosed. In an example method, a control signal is received at an output stage. The control signal may be provided by a control circuit. The method further includes providing a first power to a filter responsive to the received control signal having a first value, and providing a second power to the filter responsive to the received control signal having a second value. The method further includes decoupling the first power and second power from the filter responsive to the received control signal having a third value. |
| US09431888B1 |
Single-phase to three phase converter AC motor drive
Methods and systems for power conversion. An energy storage capacitor is contained within an H-bridge subcircuit which allows the capacitor to be connected to the link inductor of a Universal Power Converter with reversible polarity. This provides a “pseudo-phase” drive capability which expands the capabilities of the converter to compensate for zero-crossings in a single-phase power supply. Conversion between, e.g., single phase and three phase power is enabled, in either direction, without sacrificing workload performance. |
| US09431885B2 |
Voice coil motor
Disclosed is a voice coil motor, the motor including a mover having a bobbin equipped with a lens and a coil block secured to an outer circumference of the bobbin; a stator having a magnet that is disposed in such a way as to face the coil block; elastic members coupled to a lower end of the bobbin and connected to both ends of the coil block; a base supporting the elastic members and the stator; and a cover can covering the mover, the stator and the base, with an opening being formed in the cover can to expose the lens therethrough, wherein each of the elastic members includes a terminal portion that extends between the cover can and a side surface of the base, the terminal portion including a short-circuit prevention portion so as to inhibit a short-circuit between the terminal portion and the cover can. |
| US09431880B2 |
Device for monitoring the lifetime of the fan bearings
The present invention is a device for monitoring a lifetime of fan bearings, which is applied to a fan, comprising a base, at least one sensing unit, a processing unit, and a control plate. The base has a bearing sleeve receiving bearings. The sensing unit is selectively disposed on the bearing sleeve or on the bearing. The processing unit generates an informing signal based on comparison of a received temperature sensed signal generated by the sensing unit sensing the bearing temperature and an internal predetermined temperature value. By means of the device design of the present invention, the effects of effectively monitoring the bearings and predicting the remaining lifetime can be achieved. |
| US09431879B2 |
Generator motor and electric vehicle using same
To uniformly cool down armature windings along the circumferential direction of a stator in a generator motor. A generator motor includes a stator 1 fixed to the inner diameter side of a housing 18, a rotor 130 rotatably supported by bearings 5, and armature windings wound around the teeth of a stator core 110. Each of brackets 200 provided via the bearings 5 has a passage 201, 202 through which cooling oil flows and injection holes 204 which communicate with the passage and inject cooling oil at positions opposite to winding ends of the armature windings. Cooling oil is injected toward the winding ends of the armature windings from the injection holes 204 of the brackets 200 arranged on opposite axial sides of a shaft 6. In the flow rate distribution of the oil from the plurality of the injection holes 204, the flow rate of the oil from any of the injection holes 204 is set to be greater as the position of the injection hole 204 is higher above the level of the shaft 6. The arrangement pitch among the injection holes 204 provided on each of the brackets 200 is dense in a vertically upper portion of the bracket 200, and gradually sparser in a portion thereof closer to the level of shaft 6. |
| US09431877B2 |
Concentric ring generators
A concentric generator usable with a gas turbine engine having a shaft. Disclosed embodiments include a generator with a rotor integral with the gas turbine shaft and a stator mounted concentrically with respect to the rotor. The stator may be mounted inside the turbine engine housing, or outside the turbine housing. In some embodiments, both the rotor and stator are mounted outside the turbine housing and rotation of the turbine shaft is translated to the rotor via a transmission. |
| US09431873B2 |
Motor having a braking function and used in linear actuator
A motor, which has a braking function and is used in a linear actuator includes a main body, a rotation shaft, a braking means and a stopping means. The rotation shaft penetrates the center of the main body. The braking means includes a braking ring and a helical ring. The braking ring includes a plurality of curved plates. The helical ring surrounds outer edges of the curved plates. Each curved plate is put on the outer periphery of the rotation shaft. The stopping means is disposed between the main body and the braking means for restricting the rotation of any of the curved plates. By this arrangement, a better braking and decelerating function can be achieved. |
| US09431872B2 |
Motor having a braking function and used in linear actuator
A motor, which has a braking function and is used in a linear actuator includes a main body, a rotation shaft, a braking means and a stopping means. The rotation shaft penetrates the center of the main body. The braking means includes a braking ring and a helical ring. The braking ring includes a plurality of curved plates. The helical ring surrounds outer edges of the curved plates. Each curved plate is put on the outer periphery of the rotation shaft. The stopping means is disposed between the main body and the braking means for restricting the rotation of any of the curved plates. By this arrangement, a better braking and decelerating function can be achieved. |
| US09431870B2 |
Motor having a braking function and used in linear actuator
A motor, which has a braking function and is used in a linear actuator includes a main body, a rotation shaft, a braking means and a stopping means. The rotation shaft penetrates the center of the main body. The braking means includes a braking ring and a helical ring. The braking ring includes a plurality of curved plates. The helical ring surrounds outer edges of the curved plates. Each curved plate is put on the outer periphery of the rotation shaft. The stopping means is disposed between the main body and the braking means for restricting the rotation of any of the curved plates. By this arrangement, a better braking and decelerating function can be achieved. |
| US09431858B2 |
Generator rotor and method of assembling
Generator rotor comprising a rotor rim and a plurality of permanent magnet modules arranged at one of an inner and outer circumference of said rotor rim, wherein the rotor rim comprises a plurality of rotor rings separated by gaps between them, and attached to each other via a plurality of axial strips fixed to the other of the inner and outer, the permanent magnet modules comprise a base and one or more rows of magnets mounted on a top surface of said base, and wherein the permanent magnet modules are fixed to the strips by a plurality of fasteners extending through the gaps between the rotor rings. |
| US09431857B2 |
Permanent magnet rotor arrangement incorporating profiled tubes for permanent magnets
A permanent magnet rotor arrangement includes a rotor and a plurality of nonmagnetic, axially extending profiled tubes defining a closed channel and affixed circumferentially along the outer rim of the rotor. A plurality of permanent magnet pole pieces are arranged in the channels. A single pole piece is arranged in each channel. The cross-sectional profile of the pole piece does not correspond to the cross-sectional profile of the channel. |
| US09431855B1 |
Timed charge-up and illumination
Exit and egress lighting, emergency lighting or emergency light fixture, having internal supercapacitor power sources are recharged after a power outage using a staggered power up process. For example, once an emergency light fixture detects a power-on transition from power being unavailable on a power source to power being available from the power source, the fixture waits a predetermined time to recharge a supercapacitor based on a charge time delay value. The predetermined time may be selected to be unique for one or several emergency light fixtures so as to distribute a combined peak power demand of the fixtures. After the predetermined time has expired, the supercapacitor is electrically coupled to a power source to in order to recharge the supercapacitor. |
| US09431850B2 |
Power supply unit having plurality of secondary batteries
The power supply unit includes a lead secondary battery (first battery) that is capable of being charged with power generated by an alternator (power generator); a lithium secondary battery (second battery) that is electrically connected in parallel to the lead secondary battery, capable of being charged with power generated by the alternator (power generator), and has higher output density or higher energy density than the lead secondary battery; and a switching means that is electrically connected between the alternator and the lead secondary battery, and the lithium secondary battery, and switches between conduction and blocking. The switching means is configured by a plurality of MOS-FETs (semiconductor switches) being connected in series such that respective parasitic diodes present in the semiconductor switches face opposite directions. |
| US09431843B2 |
Multimedia terminal device for high-speed charging and method of controlling the same
A multimedia terminal device for high-speed charging that allows for high-speed charging of a portable electronic device connected to a multimedia terminal and a method of controlling the same are provided. The multimedia terminal device includes a power converter that is configured to convert a voltage from a battery to a voltage for the high-speed charging and to supply the converted voltage to the multimedia terminal. In addition, a switching circuit is configured to select a high-speed charging mode when an engine is driven and a low-speed charging when the engine is stopped. |
| US09431840B2 |
Charger and driving method thereof
A charger for charging a high voltage battery and a low voltage battery, includes a bidirectional buck boost converter, a first full duty converter and a second full duty converter. The bidirectional buck boost converter is configured to supply power to the high voltage battery or supply power to the low voltage battery from the high voltage battery. The first full duty converter is configured to generate charging power by using an AC commercial power supply. The second full duty converter is connected to the first full duty converter and the bidirectional buck boost converter and configured to generate charging power in the low voltage battery. |
| US09431838B2 |
Apparatuses and related methods for charging control of a switching voltage regulator
Charging systems and related methods are disclosed for switching voltage regulators. A charging controller may be configured to generate a control signal indicating a first level of an output current generated by a switching voltage regulator for charging an energy storage device, determine that an output voltage exceeded a predetermined threshold, and generate the control signal indicating a new level of the output current that is reduced from the first level. A method of controlling charging of an energy storage device may comprise monitoring an output voltage charging an energy storage device, comparing a reference signal and a current sense signal to generate a PWM control signal that determines an output current for a switching voltage regulator generating the output voltage, and decrementing the reference signal in response to the output voltage exceeding a predetermined level for a maximum charging voltage for the energy storage device. |
| US09431837B2 |
Integrated battery management system and method
A battery system includes a housing and a plurality of battery cells disposed in the housing. The battery system also includes a battery management system and configured to monitor one or more operational parameters of the battery system. The battery management system is electrically coupled to a positive terminal and a negative terminal of the battery system. Additionally, the battery system includes a multi-conductor connector disposed in an outer surface of the housing and electrically coupled to the battery management system. Further, the battery system includes a state of charge indicator configured to provide an indication of a state of charge of the battery system. The state of charge indicator includes a first multi-conductor connector configured to couple to the multi-conductor connector of the battery system. |
| US09431832B2 |
Stationary electrical storage system and control method
A stationary electrical storage system includes: a stationary storage battery including nickel metal hydride secondary batteries; and a controller repeatedly carrying out charging with an external power supply and discharging to supply electric power to a load, stopping discharging to the load when an SOC of any secondary battery has become a first threshold, and stopping charging from the external power supply when an SOC of any secondary battery has become a second threshold. The controller additionally charges the whole stationary storage battery such that the secondary battery other than the secondary battery having the lowest SOC is allowed to be charged to a fully charged level beyond the second threshold by not stopping charging when the SOC of the any secondary battery has become the second threshold and the SOC of the secondary battery having the lowest SOC becomes higher than or equal to the second threshold. |
| US09431827B2 |
Load isolation consumption management systems and methods
Disclosed herein are power management systems for controlling recorded electrical demand by isolating loads from a utility distribution grid connection. The loads are isolated when an energy storage system (ESS) is placed in series between the loads and the grid, with a charger that keeps the ESS from depleting and a power converter that provides energy to the loads from the ESS. A system controller may be enabled to manage the charging of the ESS by the charger relative to a consumption metric. In some embodiments, the loads are categorized, controlled, or curtailed by the controller and may be isolated from other loads. Some embodiments include bypass features or bimodal connections. Additional methods of control to prevent depletion of the ESS are also set forth. Systems herein can prevent or limit demand charges, protect the utility grid from backflow and other dangers, and raise the customer's effective utility service limit. |
| US09431823B2 |
ESD protection circuit
In an ESD protection circuit, the overvoltage detection circuit detects application of an overvoltage to a power supply node. A clamp circuit connects the power supply node to a ground node to clamp a voltage of the power supply node. A voltage regulation circuit drops the voltage of the power supply node to generate a predetermined regulated voltage to be supplied to the overvoltage detection circuit as a power supply voltage. At the predetermined regulated voltage, the overvoltage detection circuit is not activated at Power-On, and is activated under ESD events. A voltage compensation circuit compensates for the voltage of the detection signal, so that the voltage of the detection signal becomes equal to the overvoltage, when the overvoltage is applied to the power supply node. |
| US09431822B1 |
Over-current protection device
An over-current protection device includes two metal foils and a PTC material layer laminated therebetween. The PTC material layer has a volumetric resistivity between about 0.07 Ω-cm and 0.45 Ω-cm. The PTC material layer comprises a crystalline polymer and first and second conductive fillers dispersed therein. The first conductive filler is carbon black powder. The second conductive filler is selected from the group consisting of metal powder and conductive ceramic powder and has a volumetric resistivity less than 0.1 Ω-cm. The weight ratio of the second conductive filler to the first conductive filler is less than 4. The resistance jump R300/Ri of the over-current protection device is in the range from 1.5 to 5, where Ri is an initial resistance and R300 is a resistance after tripping 300 times. |
| US09431819B2 |
Methods and systems of impedance source semiconductor device protection
An electrical network configured to suppress voltage transients is disclosed. The network includes a capacitor and an electrical impedance in parallel with a diode. The capacitor is in series with the parallel connected diode and electrical impedance, and the electrical network is configured to suppress voltage transients occurring across the series combination of the capacitor and the parallel connected diode and electrical impedance. |
| US09431817B2 |
Battery isolation circuit
Various embodiments relating to a battery isolation circuit for disconnecting a battery from a load are disclosed. In one embodiment, a battery isolation circuit includes a power switch, a protection circuit module (PCM), and a drive diverter. The power switch may be operatively intermediate a battery and a load. The PCM may be operatively connected to the power switch. The PCM may be configured to selectively drive the power switch to electrically connect the battery to the load. The drive diverter may be configured to interrupt the PCM from driving the power switch in order to electrically disconnect the battery from the load in response to activation of a user-operable switch. |
| US09431811B2 |
Insulative cover for covering case of busbar module
An insulative cover for covering a case of a busbar module is provided. The insulative cover includes a central cover and side covers. The central cover covers a voltage detection wire accommodating part of the case. The side covers cover busbar accommodating parts of the case. And the side covers are provided at opposite sides of the central cover with hinges between the central cover and the side covers, respectively. In a state where the side covers are folded onto the central cover through the hinges respectively, one and the other of the side covers are locked to each other with a first locking mechanism, respectively. |
| US09431809B2 |
Anchoring device
An anchoring device for fastening guide wires on a roof has a base. The base has a mounting surface, a support, and carriers to which the wire guides are attached. The carriers are rotatably connected to the support and can be fixed in any desired relative position to the support, so that the anchoring device has many possibilities for holding the guide wires. The support has a number of parts which are present between the carriers, whereby between two adjacent parts of one or more carriers can be clamped. The wire guides are at different distances d1 and d2 from the central axis of the support and are at distances D1, D2 and D3 from each other. |
| US09431806B2 |
Waterproof box and electric junction box equipped with same
Provided is a waterproof box capable of increasing the amount of water discharged from a double wall without reducing the rigidity of a body case. A waterproof box is provided with a body case and an upper cover attached to the body case so as to cover an opening of the body case. A peripheral wall of the body case has a double-wall structure including an outer wall and an inner wall. Liquid penetrating from a seam between the upper cover and the outer wall passes between the outer wall and the inner wall and is discharged to the outside of the body case. A wide width portion and a narrow width portion which have mutually different gaps between the outer wall and the inner wall are formed in the body case. |
| US09431805B2 |
Temporary fixation boss and electrical junction box
A temporary fixation boss includes: a shaft portion; a flared portion; and claw portions. The shaft portion has a diameter smaller than a diameter of an insertion hole. The flared portion is provided at one end of the shaft portion in a manner to be flared in multi steps from an outer periphery of the shaft portion throughout the whole circumference of the shaft portion. The claw portions are so formed that a distance from the shaft center of the shaft portion to a tip end of the claw portions in a radial direction of the shaft portion is larger than a distance from the shaft center to a tip end of the flared portion, and smaller than a distance from the shaft center to the inner edges of the insertion hole when the shaft center is aligned with the center axis of the insertion hole. |
| US09431803B2 |
Cable assembly curvature limiter
The present invention concerns a cable assembly curvature limiter for limiting the curvature of a cable assembly in a transition from a vertical direction to a horizontal direction. The invention further concerns an offshore facility comprising the cable assembly curvature limiter and a method of suspending the cable assembly from an upper level of an offshore facility. |
| US09431800B2 |
Gas-insulated electric device
A gas-insulated electric device, by which a cross-sectional area of a central conductor can be reduced. The gas-insulated electric device includes an insulation tube that ranges to portions facing to ground potential portions for a central conductor and to upper-lower portions along the grounding potential portions, and is coaxially arranged along the central conductor in a state where a gap intervenes between the central conductor and the insulation tube; a conductive layer that is formed on an inner surface of an insulation tube and is electrically connected to the central conductor; and a ground layer that is formed on an inner surface or an outer surface of the insulation tube and is grounded; in which heat generated from the central conductor is radiated by convecting the insulation gas through the gap between the central conductor and insulation tube. |
| US09431796B2 |
Method for manufacturing spark plug
A method for manufacturing a spark plug includes a transfer step of transferring a first tip to a joining position where the first tip is joined to a tip-mating member. The transfer step includes a step of performing positional correction for the first tip before the first tip reaches the joining position. |
| US09431793B2 |
Semiconductor laser device
A semiconductor laser device in an embodiment includes a compound semiconductor layer and a silicon layer. The compound semiconductor layer includes an active layer emitting laser light and has a first mesa structure. The silicon layer is bonded with the compound semiconductor layer. A diffraction grating is provided on a surface of the silicon layer which faces the compound semiconductor layer, and includes a main diffraction grating and two sub-diffraction gratings. The main diffraction grating extends in a longitudinal direction of the first mesa structure; the sub-diffraction gratings are disposed on both sides of the main diffraction grating. |
| US09431790B2 |
Intracavity pumped OPO system
An OPO system is provided. The OPO system includes a pump laser and an OPO. The OPO is internal to the pump laser. |
| US09431784B2 |
Method of fabricating a flat cable
A flat cable has a plurality of electric wires disposed in parallel, and a fiber member woven to thread through each of the electric wires along a juxtapositional direction of the electric wires. The fiber member is made of a fiber having an elastic recovery rate after elongation of 80% or more and 95% or less. The fiber has an initial modulus of 20 cN/dtex or more and 30 cN/dtex or less. |
| US09431783B1 |
Electronic system with power bus bar
A system includes a backplane and an auxiliary connector mounted to the backplane. The auxiliary connector is configured to mate with a corresponding mating auxiliary connector of an electrical power supply. A power connector is mounted directly to the backplane. The power connector is configured to mate with a corresponding mating power connector of the electrical power supply. A power bus bar is mounted to the backplane. The power bus bar is engaged in electrical contact with the power connector. |
| US09431778B1 |
Dust tolerant connectors
Methods and systems may provide for debris exclusion and removal apparatuses for connectors which have inverting end caps with a multi-axis lever configuration, inverting end caps with enlarged handle and/or side rail configurations, rotating end cap configurations, poppet valve configurations, O-ring configurations, filament barrier configurations, retractable cover configurations, clamshell end cap configurations, or any combination thereof. Apparatuses may also provide for an intelligent electrical connector system capable of detecting damage to or faults within a plurality of conductors and then rerouting the energy through a non-damaged spare conductor. |
| US09431774B2 |
Universal serial bus socket and related electronic device
A USB socket is disposed on a casing for connecting to a USB plug. The USB socket includes a piercing structure, a substrate and a plurality of terminals. The piercing structure is formed on a surface of the casing, and a main board is disposed inside the casing. An internal wall of the piercing structure can buckle the USB plug when the USB plug inserts into the piercing structure. The substrate is disposed on the main board and located inside the piercing structure. An integrated circuit is disposed on the substrate. The plurality of terminals is disposed on the substrate and coupled to the integrated circuit. The USB plug is electrically connected to the substrate and the terminals when the USB plug inserts into the piercing structure. |
| US09431773B2 |
Probe-type connector
A probe-type connector includes an insulating body having a receiving space and a plugging slot which both communicate with each other, a probe set received in the receiving space and including a probe terminal, an insulating part, and an elastic part, and a connecting plate plugged into the insulating body corresponding to the plugging slot and having a connecting portion. The probe terminal has a connecting segment, and a flexible connecting arm extending from the connecting segment toward the plugging slot. The insulating part is connected between the connecting segment and the elastic part that enables the insulating part and the probe terminal to reciprocate in the receiving space. The flexible connecting arm is electrically connected to the connecting portion. Therefore, the probe terminal can transmit electrical signals directly to the connecting plate, which can be applied to the transmission of high-frequency signals or electrical energy. |
| US09431771B1 |
Electromagnetically shielded connector system
An electromagnetically shielded connector system includes a first and second connector. The first connector further includes a first terminal and a first electromagnetic shield surrounding the first terminal. The first shield defines a flexible interface contact projecting from an end of the first shield. The second connector further includes a second terminal configured to mate with the first terminal and a second electromagnetic shield surrounding the second terminal. The second shield is configured to be electrically connected with the first shield at least via the flexible interface contact. The second shield is surrounded by a supporting member. At least a portion of an outer surface of the second shield is in intimate contact with the supporting member. The second shield is configured to be disposed intermediate the interface contact and the supporting member. The interface contact is formed and configured to exert a normal spring force on the second shield. |
| US09431766B1 |
Keyed power connector
A keyed power connection system is disclosed. The keyed power connection system may have connectors and terminal studs. Each connector may have a captive fastener and may have a connector keying portion comprising a keyed aperture forming an opening in and defined by a connector body of the connector and having a keyed connector diameter. The connector may receive and be selectably connected to a terminal stud having a keyed stud diameter. The keyed stud diameter and the keyed connector diameter may correspond to ameliorate the risk of connecting a connector to a mismatched terminal stud. The captive fastener may engage the terminal stud to retain the connector in position relative to the terminal stud. |
| US09431764B2 |
Thin card plug
A plug connector comprises a housing, a plurality of first terminals, a plurality of second terminals and a pair of side plates. The housing has a base and a tongue extending forwardly from the base. The base has a mating limit portion connecting the tongue. Each first terminal has a resilient contact portion extending out of a plate surface of the tongue. Each second terminal has a flat plate contact portion positioned along and exposed from the plate surface and positioned in front of the resilient contact portions. The pair of side plates are provided, one along each side of the tongue, and the two side plates extend along a first, for-aft, direction above the plate surface so as to help protect the resilient contact portions. |
| US09431763B2 |
Frictional locking receptacle with release operated by actuator
A method and apparatus for securing an electrical connection formed by a mating structure including prongs of a male assembly and receptacles of a female assembly are provided. In certain embodiments, the electrical connection can be secured by frictional engagement between the plug and receptacle housings. This can be accomplished by forcing a wedge into an interface between the housings or expanding a locking element, such as an elastomeric ring, into the interface. Such locking and releasing of the secure connection can be actuated using a locking nut. |
| US09431759B2 |
Feedthrough connector for hermetically sealed electronic devices
Disclosed herein is one embodiment of an apparatus that includes a housing that defines an interior cavity. The housing also includes a spring aperture. The apparatus further includes a spring coupled to the housing over the spring aperture, with the spring having a deflection portion and a feedthrough aperture. The apparatus also has an electrical connector coupled to the spring and extending through the feedthrough aperture and the spring aperture. The electrical connector may have a plurality of electrical traces extending from a location external to the housing to a location within the interior cavity of the housing. |
| US09431758B2 |
Connector with grommet
A connector (10) includes a housing (30) and terminal-fitted wires (40) are mounted in the housing (30). Each terminal-fitted wire (40) has a terminal (41) with a wire connecting portion (42) connected to a wire (W). The connector (10) also has a retainer (50) with a wire holding portion (55) arranged along the wire connecting portions (42). A grommet (70) surrounds and protects the retainer (50) and the terminals (41). The grommet (70) includes a mounting portion (74) that intersects the wire holding portion (55), and a tie band (80) is mounted around the mounting portion of the grommet (70). |
| US09431757B2 |
Connection socket for oven temperature sensor
A connection socket for oven temperature sensor, comprising: a shell with one end being sleeved and fixed on a plug guide hole seat, and the other end of the shell being internally disposed and fixedly provided with an inner ceramic plate and an outer ceramic plate; and a long elastic contact clip and a short elastic contact clip being respectively connected with the long lead and the short lead, both the long elastic contact clip and the short elastic contact clip being provided with a lug boss, wherein the lug bosses are clamped by the inner ceramic plate and the outer ceramic plate. |
| US09431756B2 |
Waterproof connector
A waterproof connector is mateable with a mating connector along a mating direction. The waterproof connector comprises a first housing, a second housing and a primary sealing member. The second housing is movable relative to the first housing in a plane perpendicular to the mating direction. The primary sealing member has a first fixed portion, a second fixed portion and a middle portion. The first fixed portion is fixed to the first housing, and the second fixed portion is fixed to the second housing. The first fixed portion is connected to the second fixed portion via the middle portion with no break in a cross-section in parallel to the mating direction. The middle portion is looped with no break in a plane perpendicular to the mating direction. |
| US09431754B2 |
Electrical connector structure capable of reducing relative movement between signal modules
An electrical connector structure includes a housing and signal modules mounted therein. Each signal module includes an insulating body, conductive terminals and a ground shield. The insulating body has a first side having a guide projection, and a second side opposite to the first side and having a guide groove. When a first signal module has been mounted in the housing, a second signal module is guided and moved to mount into the housing by the guide groove of the second signal module receiving the guide projection of the first signal module, or by the guide projection of the second signal module sliding into the guide groove of the first signal module, whereby reducing relative movement between signal modules in the housing. The signal modules may be mounted one by one in the housing, or may be stacked side by side and then mounted in the housing as a whole. |
| US09431747B1 |
Flash drive and protective cover mounting structure
A flash drive and protective cover mounting structure includes a flash drive consisting of a casing, a memory module, a electrical connector and a positioning member, and a protective cover including a substantially U-shaped and relatively larger outer cover component having a smooth outer surface and a substantially U-shaped and relatively smaller inner cover component mounted in the outer cover component pivotally connected to the casing and biasable relative to the casing between an open position to expose the electrical connector and a closed position to shield the electrical connector. |
| US09431741B2 |
Socket contact
A socket contact which is reduced in manufacturing costs and has a spring member difficult to be removed from a socket contact body. The socket contact includes a socket contact body, and a spring member fitted on the socket contact body. The spring member includes an elastic annular portion and at least one protruding portion provided on the elastic annular portion. A hollow cylindrical contact portion of the socket contact body for receiving a pin contact therein is formed with at least one slit that extends in a receiving direction in which the contact portion receives the pin contact therein, and a hole that receives the protruding portion for limiting the movement of the spring member in a direction parallel to the receiving direction. |
| US09431736B2 |
Card edge connector and card edge connector assembly
A card edge connector includes a first insulator, a second insulator, first terminals, second terminals, and a circuit transferring board. The first insulator has a plug space, first terminal holes, and second terminal holes. The second insulator abuts against the first insulator and has first slotted holes, second slotted holes, and a slot. The first terminals are disposed within the first terminal holes and the first slotted holes, and the second terminals are disposed within the second terminal holes and the second slotted holes. The circuit transferring board is inserted into the slot. The circuit transferring board has first conductive portions and second conductive portions, where back contact portions of the first and second terminals are electrically coupled to the first and second conductive portions, thereby solving a problem of a conventional welded connection. The present invent also provides a card edge connector assembly. |
| US09431734B2 |
Receptacle connector connected to a printed circuit board
A receptacle connector (100) includes an insulative housing (1), a number of contacts (2) retained in the insulative housing, a metal shield (3) covering the insulative housing, a metal plate (4) assembled to the metal shield along a vertical direction perpendicular to the mating direction, and an insulative cover (5) fully molded over the metal shield and partly molded over the metal plate. The metal plate defines a pair of closed slits (412) behind a rear face of the insulative housing. The insulative cover terminates at the closed slits in a mating direction along which a mating plug connector is inserted. |
| US09431726B2 |
Multi-core cable
A multi-core cable 1 includes plural shielded electric wires 10 for signal transmission. The plural shielded electric wires 10 are bundled so as to make contact with the adjacent shielded electric wires 10, and sheaths 14 of the plural shielded electric wires 10 are respectively removed at the same position in the length direction, and outer conductors 13 of the plural shielded electric wires 10 at the position at which the sheaths 14 are removed are bundled by a metal wire 30 and the bundled portion is soldered and fastened. |
| US09431723B2 |
Female terminal fitting
A female terminal fitting (10) is provided with a tubular main body portion (20) into which a mating male tab (90) is to be inserted, and a resilient contact piece (21) deflectably arranged in the main body portion (20). The resilient contact piece (21) is resiliently deformed toward a base wall (22) of the main body portion (20) to resiliently come into contact with the male tab (90) when the male tab (90) is inserted into the main body portion (20). An excessive deflection regulating piece (33) for regulating excessive deflection of the resilient contact piece (21) by coming into contact with the base wall (22) of the main body portion (20) is integrally provided to the resilient contact piece (21). |
| US09431721B2 |
Contact element
A contact element for creating an electrical contact between a first and a second electrical or electronic component, including a one-piece, elongated, and flat body. The body may include a first end segment, a second end segment opposite the first end segment, an insulation displacement connection site in the first end segment, and a lamellae contact with two lamellae being located at the second end segment. At least one lamella may be resilient. |
| US09431718B2 |
Antenna device including triplate line including central conductor and ground plates
An antenna device has a feed line including a triplate line. Each triplate line has a central conductor and two ground plates sandwiching the central conductor via an air layer. At least a part of the triplate line is configured such that the two ground plates sandwich a center substrate including a wiring pattern as the central conductor provided on a dielectric substrate via the air layer. |
| US09431717B1 |
Wideband dual-arm antenna with parasitic element
Antenna structures and methods of operating the same of a wideband dual-arm antenna of an electronic device are described. One wideband antenna includes a first feeding arm coupled to a radio frequency (RF) feed and a second feeding arm coupled to the RF feed. At least a portion of the second feeding arm is parallel to the first feeding arm. The wideband dual-arm antenna further includes a third arm coupled to the ground plane. The third arm is a parasitic ground element that forms a coupling to the first feeding arm and the second feeding arm. The parasitic element increases a bandwidth of the wideband antenna. |
| US09431714B2 |
Antenna structures
An antenna formed on a semiconductor structure having a substrate with electrical circuits thereon operationally related to the functionality of an antenna and one or more metallic structures formed by a through silicon via, microbump, copper pillar, or redistribution layer proximate to the substrate. The one or more metallic structures form a radiating element of the antenna. Exemplary antennas thus formed can include a slot antenna, a WLAN slot antenna, a planar invented F antenna (PIFA), a spiral antenna, a dipole antenna, a Yagi antenna, a planar dipole antenna, a vertical dipole antenna, a patch antenna, a helical antenna, a loop patch antenna, and combinations thereof. |
| US09431713B2 |
Circularly-polarized patch antenna
In one example, a patch antenna includes a conductive ground plane layer, a conductive circular patch layer, a dielectric layer, a grounding connection, and a RF feed. The conductive circular patch layer includes a plurality of voids. The dielectric layer is disposed between and contacts each of the ground plane layer and the circular patch layer. The grounding connection extends from the ground plane layer through the dielectric layer and contacts the circular patch layer at a grounding location of the circular patch layer. The RF feed extends through the ground plane layer and the dielectric layer and contacts the circular patch layer at a RF feed location of the circular patch layer. The RF feed location is offset from a central axis of the circular patch layer. |
| US09431704B2 |
Antenna apparatus and method for electronically pivoting a radar beam
An antenna apparatus for a radar sensor having a plurality of individual antenna devices that interact through interference to generate and/or receive a radar beam at a predetermined angle of transmission and/or reception. The individual antenna devices are provided with a radar signal and are arranged such that a first angle of transmission and/or reception of the radar beam is determined via an analog beam formation and a second angle of transmission and/or reception of the radar beam is determined via a digital beam formation. The antenna apparatus further includes a feed device configured to generate the radar signal. In addition, the radar beam can be electronically pivoted. Also, an aircraft can include the antenna apparatus. |
| US09431702B2 |
MIMO antenna system having beamforming networks
An antenna system connected to a radio in a Multiple-Input, Multiple-Output (MIMO) arrangement and configured to communicate in an area of coverage. The antenna system includes a plurality of antenna elements. The plurality of antenna elements further includes a first plurality of antenna elements configured to communicate on a first frequency band and a second plurality of antenna elements configured to communicate on a second frequency band. A plurality of MIMO-configured radio ports on the radio communicates radio signals to and from the antenna elements. A beam-forming network is connected to at least two of the first plurality of antenna elements and to at least two radio ports. The beam-forming network is configured to form space diversity beams in the area of coverage. |
| US09431699B2 |
Structures for forming conductive paths in antennas and other electronic device structures
Electronic devices may be provided that contain conductive paths. A conductive path may be formed from an elongated metal member that extends across a dielectric gap in an antenna. The antenna may be formed from conductive structures that form an antenna ground and conductive structures that are part of a peripheral conductive housing member in the electronic device. The gap may separate the peripheral conductive housing member from the conductive structures. A conductive path may also be formed using one or more springs. A spring may be welded to a conductive member and may have prongs that press against an additional conductive member when the spring is compressed. The prongs may have narrowed tips, curved shapes, and burrs that help form a satisfactory electrical contact between the spring prongs and the additional conductive member. |
| US09431696B2 |
Communication device with ground plane antenna
A communication device including a ground element, a dielectric substrate, and an antenna element is provided. The dielectric substrate is disposed nearby the ground element and has a first surface and a second surface. The antenna element includes a first metal portion and a second metal portion. The first metal portion is disposed on the first surface and has a feeding point. The second metal portion is disposed on the second surface. The first metal portion is electrically connected to the second metal portion through a conductive via-hole, and the conductive via-hole is located at or nearby a first edge of the first metal portion. The first edge is away from the ground element. The projection of the second metal portion on the first surface is covered by the first metal portion. |
| US09431695B2 |
Vehicle-mounted replacement antenna
A vehicle-mounted replacement antenna includes an antenna holder, an antenna element, a connecting shaft and a concealed screw. The concealed screw is embedded into a concealed screw hole of a cylindrical portion of the antenna holder, and a distal end of the concealed screw is pressed against a bottom surface of a ring groove of a hook shaft portion, so that the antenna holder is mounted on the connecting shaft so as to be prevented from rotation. Or the concealed screw is screwed into the concealed screw hole, and the distal end of the concealed screw is spaced from a bottom surface of the ring groove and hooked on a side surface of the ring groove, so that the antenna holder is mounted on the connecting shaft so as to be rotatable and unremovable. |
| US09431694B2 |
Systems and methods for a dual band antenna for an internal medical device
A dual band antenna mounted to a case of an implantable medical device (IMD) for implant within a patient is provided. The dual band antenna includes a first antenna sub-structure (FAS) and a second antenna sub-structure (SAS) each separately tuned to match a corresponding first and second resonant frequency, by adjusting at least one of relative lengths of the FAS and SAS, a capacitance of the FAS, a location of the SAS relative to the FAS and a cross-sectional area of conducting elements forming the components of the antenna. The FAS is formed as an inverted E-shaped antenna having three branches. The first branch of the antenna is capacitive, a second branch provides a radio frequency signal feed and a third branch provides a shunt to ground. The SAS is formed as a mono-pole antenna that is formed integral with, and extends from, the FAS. |
| US09431693B2 |
Mobile terminal
Disclosed herein is a mobile terminal including a terminal body comprising a circuit board formed to process radio signals, a first and a second member configured to form an external appearance of the terminal and disposed to cover a lateral surface of the circuit board, a power feed connecting portion to allow the first member and the circuit board to be power feed connected, and a ground connecting portion to allow the first member and the circuit board to be ground connected. Accordingly, an electrical element and an antenna are disposed adjacent to each other, allowing the effective use of a space within the terminal. |
| US09431692B2 |
Tracking biological and other samples using RFID tags
A box mapper has (i) a frame configured to receive a sample box of RFID-tagged sample vials and (ii) a set of antennae configured to read the vial RFID tags of the sample vials to determine the identity and position of each sample vial in the sample box. In one embodiment, the set of antennae include two mutually orthogonal subsets of biphase digit antennae. |
| US09431691B2 |
Voltage tunable filters
A suspended line resonator and a tunable filter comprising multiple suspended line resonators. A microstrip resonator and a tunable filter comprising multiple microstrip resonators. A suspended substrate resonator and a tunable filter comprising multiple suspended substrate resonators. |
| US09431690B2 |
Dielectric waveguide filter with direct coupling and alternative cross-coupling
A dielectric waveguide filter comprising a block of dielectric material covered with an exterior layer of conductive material. A plurality of stacked resonators are defined in the block of dielectric material by one or more slots in the block of dielectric material and an interior layer of conductive material that separates the stacked resonators. First and second RF signal transmission windows in the interior layer of conductive material provide for both direct and cross-coupling RF signal transmission between the stacked resonators. In one embodiment, the waveguide filter is comprised of separate blocks of dielectric material each covered with an exterior layer of conductive material, each including one or more slots defining a plurality of resonators, and coupled together in a stacked relationship. |
| US09431688B2 |
Method for heating a high voltage vehicle battery
An exemplary system and method for use in cold environments in order to heat a high voltage vehicle battery, such as the type commonly found in hybrid vehicles. Some high voltage vehicle batteries—like those based on lithium-ion chemistries—perform better when their battery temperature is in a certain temperature range. In an exemplary embodiment, a battery heating system includes a switch, a battery heater and a high voltage vehicle battery, and initially uses electrical power from an external power source to heat the battery and then uses electrical power from an internal power source to heat the battery. The switch determines which power source is used to heat the battery, and may be dictated by whether the battery heating system is plugged into the external power source and/or a vehicle propulsion system is active, to cite several possibilities. |
| US09431687B2 |
Heating assemblies and systems for rechargeable batteries
Heating assemblies for one or more rechargeable batteries include a flexible heating element positionable about the one or more rechargeable batteries, a temperature sensor configured to sense a temperature adjacent the one or more rechargeable batteries, and a control circuit configured to receive the sensed temperature from the temperature sensor. The control circuit is configured to connect the charger to the flexible heating element for allowing power to flow from the charger to the flexible heating element in response to the sensed temperature adjacent the one or more rechargeable batteries falling below a defined threshold temperature. The temperature sensor is adjacent the flexible heating element. The flexible heating element is configured to receive power from a charger that is operable for charging the one or more rechargeable batteries. Systems including the one or more heating assemblies are also disclosed. |
| US09431679B2 |
Electrode assembly having stepped portion, as well as battery cell, battery pack, and device including the electrode assembly
There is provided an electrode assembly comprising at least one stacked and folded type electrode stack in which a plurality of electrode units having electrode tabs are stacked in a state that the electrode units are separated by a sheet of separating film. The stacked and folded type electrode stack includes at least one stepped portion formed of electrode units having different areas and stacked on one another. |
| US09431677B2 |
Block copolymer including a polyanion based on a TFSILi anion monomer as a battery electrolyte
The invention relates to a BA diblock or BAB triblock copolymer, in which the A block is a non-substituted poly-oxyethylene chain having a mean molecular weight that is no higher than 100 kDa, and the B block is an anionic polymer which can be prepared using one or more monomers selected from among the vinyl monomers and derivatives thereof, said monomers being substituted with a (trifluoromethylsulfonyl)imide (TFSI) anion. The invention also relates to the uses of such a copolymer, in particular for preparing an electrolyte composition for lithium metal polymer (LMP) batteries. |
| US09431675B2 |
Material consisting of composite oxide particles, method for preparing same, and use thereof as electrode active material
A positive electrode material, having particles having a complex oxide OC1 core, an at least partial complex oxide OC2 coating, and an adhesive carbon surface deposit. The material is characterized in that the complex oxide OC1 is an oxide having a high energy density and in that the oxide OC2 is an oxide of a metal having a catalytic effect on the reaction of the carbon deposit, the oxide having good electronic conductivity. The presence of the OC2 layer facilitates the deposit of a carbon adhesive layer at the surface of the oxide particles, and improves the conductivity of the material when the latter is used as an electrode material. The electrode material can particularly be used in the manufacture of a lithium battery. |
| US09431674B2 |
Balanced stepped electrode assembly, and battery cell and device comprising the same
There are provided an electrode assembly, and a battery cell, a battery pack, and a device. The electrode assembly includes a combination of two or more types of electrode units having different areas, wherein the electrode units are stacked such that steps are formed, and electrode units are formed such that a positive electrode and a negative electrode face one another at an interface between the electrode units. |
| US09431673B2 |
Fuel cell
A cell unit of a fuel cell includes a first membrane electrode assembly, a first metal separator, a second membrane electrode assembly, and a second metal separator. A resin frame member is provided integrally with an outer circumference of the first membrane electrode assembly. An oxygen-containing gas supply passage, a fuel gas supply passage, a coolant supply passage, an oxygen-containing gas discharge passage, a fuel gas discharge passage, and a coolant discharge passage extend through the resin frame member in a stacking direction. At each of both ends of the resin frame member in a longitudinal direction, a pair of projections are provided. The projections protrude toward both sides in a lateral direction. |
| US09431659B2 |
Electrode binder for secondary battery and electrode for secondary battery comprising the same
Provided are an electrode binder for a secondary battery including an amine-based compound expressed by Chemical Formula 1 below and water-based binder particles including at least one carboxyl group as an end group, a method of preparing the same, and an electrode for a secondary battery including the electrode binder for a secondary battery |
| US09431657B2 |
Active material, nonaqueous electrolyte battery, and battery pack
According to one embodiment, an active material containing a monoclinic oxide is provided. The monoclinic oxide is represented by the formula LixTiNb2O7 (0≦x≦5). A unit cell volume of the monoclinic oxide is 795 Å3 or more. |
| US09431652B2 |
Anode active material for lithium secondary battery, method of preparing the same, and lithium secondary battery including the anode active material
Provided are an anode active material including silicon oxide particles (SiOx, where x satisfies 0 |
| US09431646B2 |
Rechargeable battery having connection member
A rechargeable battery includes: an electrode assembly including a first electrode and a second electrode; a case accommodating the electrode assembly; a cap plate coupled to the case; and a connection member electrically connecting the first electrode and the cap plate, wherein the connection member is configured to be deformed to electrically disconnect the first electrode and the cap plate. |
| US09431645B2 |
Electricity storage device and electricity storage module
An electricity storage device includes a case, an electrode assembly housed in the case, and a positive electrode (negative electrode) terminal sending and receiving electricity to and from the electrode assembly. The positive electrode (negative electrode) terminal includes a cylindrical part having a part projecting outside the case. The outer peripheral surface of the cylindrical part has a male screw with which a nut for fastening the positive electrode (negative electrode) terminal to the case is threadedly engaged from the outside of the case. The inner peripheral surface of the cylindrical part has a female screw having a screw direction opposite the male screw. |
| US09431644B1 |
Preconditioned bus bar interconnect system
A method is provided for interconnecting the batteries in a battery pack in a manner that is designed to minimize damage and contamination of the contact surfaces of the interconnect and the battery terminal, thereby minimizing connection resistance and increasing interconnect reliability. |
| US09431641B2 |
Separator for nonaqueous secondary battery, and nonaqueous secondary battery
An object of the invention is to provide a separator for a nonaqueous secondary battery, which has good adhesion to electrodes and is also capable of ensuring sufficient ion permeability even after attachment to an electrode. The separator for a nonaqueous secondary battery of the invention includes a porous substrate and an adhesive porous layer formed on at least one side of the porous substrate and containing a polyvinylidene-fluoride-based resin. The separator for a nonaqueous secondary battery is characterized in that the polyvinylidene-fluoride-based resin has a weight average molecular weight of 600,000 to 3,000,000. |
| US09431639B2 |
Battery and a package for a battery
A package for a battery is provided. The package includes a first material layer; a black material layer including a blackbody material; and a metal layer, wherein the black material layer has a color different than the metal layer and is provided between the first material layer and the metal layer. A battery including the package is further provided. |
| US09431632B2 |
Surface light source device having specific structure; lighting device and backlight device containing the same
A surface light source device is provided that has high light extraction efficiency and high mechanical strength and can suppress a change in color tone at different viewing angles. To that end, the surface light source device includes: an organic EL element including a luminescent layer; and a light-emitting surface structure layer that is disposed in contact with one of the surfaces of the organic EL element and defines a concave-convex structure on the surface on the device light-emitting surface side. The concave-convex structure includes a plurality of concave portions having oblique surfaces and flat portions disposed around the concave portions. The surface light source device further includes a diffusing member on which the light emitted from the luminescent layer is incident, the diffusing member allowing the incident light to pass therethrough or reflecting the incident light in a diffused manner. |
| US09431631B2 |
Plasma curing of PECVD HMDSO film for OLED applications
Methods for forming an OLED device are described. An encapsulation layer having a buffer layer sandwiched between barrier layers is deposited over an OLED structure. The buffer layer is deposited on the first barrier layer and is cured with a fluorine-containing plasma at a temperature less than 100 degrees Celsius. The second barrier layer is then deposited on the buffer layer. |
| US09431628B2 |
Organic light emitting display device and its packaging method
The present disclosure relates to an organic light emitting device, which includes: a cover plate, a substrate and an organic light emitting diode. The cover plate has a carbon nanotube layer thereon. The organic light emitting diode and the substrate are packaged on the cover plate by adhesive applied around the carbon nanotube layer. The organic light emitting display device provided by the present disclosure has a good packaging effect, a good tightness and a good heat dissipation performance. |
| US09431626B2 |
Organic light emitting display device
An organic light emitting display device includes first and second electrodes facing each other on a substrate, a charge generation layer formed between the first and second electrodes, a first light emitting stack formed between the charge generation layer and the first electrode, and a second light emitting stack formed between the charge generation layer and the second electrode, wherein a hole injection layer of a light emitting stack to realize blue color of the first and second light emitting stacks is formed by doping a host formed of hexaazatriphenylene (HAT-CN) with 0.5% to less than 10% of a dopant formed of a hole transporting material based on a volume of the hole injection layer. |
| US09431622B2 |
Quantum dot optoelectronic device and methods therfor
An optoelectronic device and method for fabricating optoelectronic device, comprising: forming a quantum dot layer on a substrate including at least one electronically conductive layer, including a plurality of quantum dots which have organic capping layers; and removing organic capping layers from the quantum dots of the quantum dot layer by physically treating the quantum dot layer, the physical treatment including both thermal treatment and plasma processing. |
| US09431618B2 |
Display device
A display device, an electronic device, or a lighting device that is unlikely to be broken is provided. A flexible first substrate and a flexible second substrate overlap with each other with a display element provided therebetween. A flexible third substrate is bonded on the outer surface of the first substrate, and a flexible fourth substrate is bonded on the outer surface of the second substrate. The third substrate is formed using a material softer than the first substrate, and the fourth substrate is formed using a material softer than the second substrate. |
| US09431612B2 |
Methods for tailoring electrode work function using interfacial modifiers for use in organic electronics
The present invention is directed to methods for tailoring the work function of electrodes in organic electronics using interfacial modifiers comprising functionalized semiconducting polymers and/or small molecules. |
| US09431611B2 |
Production method for organic electroluminescent element
The present invention aims at providing a method for producing an organic electroluminescent element, by which a non-light-emitting region can be formed without any accompanying discoloration of a resin substrate. The method for producing an organic electroluminescent element includes a stacking step, in which a first electrode, an organic functional layer and a second electrode are formed by stacking on a resin substrate, and a light irradiation step, in which a prescribed region of the organic functional layer is irradiated with light being free from wavelength components at 340 nm or less. |
| US09431610B2 |
Methods of manufacturing a phase change memory device including a heat sink
A phase change memory device includes a phase change memory unit and a heat sink. The phase change memory unit includes a phase change material layer pattern, a lower electrode beneath the phase change material layer pattern configured to heat the phase change material layer pattern, and an upper electrode on the phase change material layer pattern. The heat sink configured to absorb heat from the phase change memory unit. The heat sink has a top surface lower than a top surface of the upper electrode and is spaced apart from the phase change memory unit. |
| US09431607B2 |
Metal-oxide-based conductive-bridging random access memory (CBRAM) having the solid electrolyte doped with a second metal
A resistive random access memory device includes a first electrode made of inert material; a second electrode made of soluble material, and a solid electrolyte, the first and second electrodes being respectively in contact with one of the faces of the electrolyte, the second electrode to supply mobile ions circulating in the solid electrolyte to the first electrode to form a conductive filament between the first and second electrodes when a voltage is applied between the first and second electrodes, the solid electrolyte including a region made of a first metal oxide that is doped by a second metal, distinct from the first metal and able to form a second metal oxide, the second metal selected such that the first metal oxide doped by the second metal has a band gap energy less than or equal to that of the first metal oxide not doped by the second metal. |
| US09431604B2 |
Resistive random access memory (RRAM) and method of making
The present disclosure provides a resistive random access memory (RRAM) cells and methods of making the same. The RRAM cell includes a transistor and an RRAM structure electrically connected to the transistor. The RRAM structure includes a bottom electrode having a via portion and a top portion, a resistive material layer over the bottom electrode and having a same width as the top portion of the bottom electrode, and a top electrode over the resistive material layer and having a smaller width than the resistive material layer. |
| US09431603B1 |
RRAM device
The present disclosure relates to an integrated circuit device having an RRAM cell, and an associated method of formation. In some embodiments, the integrated circuit device has a bottom electrode disposed over a lower metal interconnect layer. The integrated circuit device also has a resistance switching layer with a variable resistance located on the bottom electrode, and a top electrode located over the resistance switching layer. The integrated circuit device also has a spacer having a lateral portion that surrounds the bottom electrode at a position that is vertically disposed between the resistance switching layer and a bottom etch stop layer and a vertical portion abutting sidewalls of the resistance switching layer and the top electrode. The integrated circuit device also has a top etch stop layer located over the bottom etch stop layer abutting sidewalls of the spacer and overlying the top electrode. |
| US09431600B2 |
Magnetic domain wall shift register memory devices with high magnetoresistance ratio structures
A device includes a seed layer, a magnetic track layer disposed on the seed layer, an alloy layer disposed on the magnetic track layer, a tunnel barrier layer disposed on the alloy layer, a pinning layer disposed on the tunnel barrier layer, a synthetic antiferromagnetic layer spacer disposed on the pinning layer, a pinned layer disposed on the synthetic antiferromagnetic spacer layer and an antiferromagnetic layer disposed on the pinned layer, and another device includes a seed layer, an antiferromagnetic layer disposed on the seed layer, a pinned layer disposed on the antiferromagnetic layer, a synthetic antiferromagnetic layer spacer disposed on the pinned layer, a pinning layer disposed on the synthetic antiferromagnetic layer spacer, a tunnel barrier layer disposed on the pinning layer, an alloy layer disposed on the tunnel barrier layer and a magnetic track layer disposed on alloy layer. |
| US09431598B2 |
Sol-gel precursors and methods for making lead-based perovskite films
A simple, economical sol-gel method was invented to produce thick and dense lead zirconate titanate (PZT) thin films that exhibit the stoichiometric chemical composition and unprecedented electrical and dielectric properties. The PZT films are the foundation of many microelectromechanical systems (MEMS) and nanoelectromechanical systems (NEMS) for micro/nano sensors and actuators applications. |
| US09431596B2 |
Electronic device
Embodiments of the present disclosure refers to an electronic device, comprising a first bracket that is made of a first material having a thermal conductivity greater than a first threshold and has therein at least one passage including a chamber; wherein the first bracket and the chamber define a closed space in which a cooling medium having a thermal conductivity greater than a second threshold is able to circulate; and wherein the chamber is provided with a driving body at at least one side wall of the chamber and the driving body is deformable under a perdetermined condition to change a capacity of the chamber so as to drive the cooling medium to flow. |
| US09431595B2 |
Vibration wave driving device, image pickup device, optical apparatus, liquid discharge device, and electronic apparatus
A vibration wave driving device including a lead-free piezoelectric material that can be driven with high reliability over a wide operating temperature range, an image pickup device including the vibration wave driving device, and an optical apparatus including the vibration wave driving device are provided. The vibration wave driving device generates a vibration wave by applying an AC voltage to a piezoelectric element, and includes the piezoelectric element and a capacitor that satisfy 20[° C.]≦T∈(Cmax)−T∈(Pmax)≦75[° C.] and 0.50≦∈(Cc)/∈(Cmax)≦0.80. |
| US09431593B2 |
Thermoelectric conversion material and production method therefor
The present invention provides a thermoelectric conversion material capable of being produced in a simplified manner and at a low cost and excellent in thermoelectric conversion characteristics and flexibility, and provides a method for producing the material. The thermoelectric conversion material has, on a support, a thin film of a thermoelectric semiconductor composition containing thermoelectric semiconductor fine particles, a heat-resistant resin and an ionic liquid. The method for producing a thermoelectric conversion material having, on a support, a thin film of a thermoelectric semiconductor composition containing thermoelectric semiconductor fine particles, a heat-resistant resin and an ionic liquid comprises a step of applying a thermoelectric semiconductor composition containing thermoelectric semiconductor fine particles, a heat-resistant resin and an ionic liquid onto a support and drying it to form a thin film thereon, and a step of annealing the thin film. |
| US09431591B1 |
LED package with reflecting cup
The present disclosure provides a light emitting diode package which includes a plurality of electrodes, an LED die, a reflecting cup, and a phosphor layer. The LED die are electrically connected with the electrodes. The LED die includes a top light emitting surface and a plurality of lateral sides extending downward from the top light emitting surface. The reflecting cup is formed on the electrodes and surrounds the LED die. The reflecting cup includes an inner surface. The inner surface contacts with bottom portion of the LED die. A cavity is defined between the inner surface and other portion except the bottom portion of the LED die. The phosphor layer covers and seals the LED die. |
| US09431588B2 |
Semiconductor device and method for manufacturing the same
Provided is an optical semiconductor device includes: a light-emitting layer having a first main surface, a second main surface opposed to the first main surface, a first electrode and a second electrode which are formed on the second main surface; a fluorescent layer provided on the first main surface; a light-transmissive layer provided on the fluorescent layer and made of a light-transmissive inorganic material; a first metal post provided on the first electrode; a second metal post provided on the second electrode; a sealing layer provided on the second main surface so as to seal in the first and second metal posts with one ends of the respective first and second metal posts exposed; a first metal layer provided on the exposed end of the first metal post; and a second metal layer provided on the exposed end of the second metal post. |
| US09431587B2 |
LED light system
A light system, wherein a first device that partly converts radiation of a first group is disposed in front of a portion of the first group, wherein the first device includes a phosphor-containing layer that converts a portion of primary radiation into secondary radiation having a longer wavelength, wherein the second group emits radiation having a greater wavelength than the first group, a second device that partly converts primary radiation of the first group, the second device being in front of a portion of the first group, wherein a converter exhibits a temperature dependence based on a different temperature dependence of the refractive index of a phosphor and a matrix embedding the phosphor, and the phosphor and matrix have at room temperature a difference in the refractive index is small and at operating temperature the difference in the refractive index is at least 1.5 times that at room temperature. |
| US09431585B2 |
Wavelength converted light emitting device
Embodiments of the invention include a semiconductor light emitting device (10) capable of emitting first light having a first peak wavelength and a semiconductor wavelength converting element (12) capable of absorbing the first light and emitting second light having a second peak wavelength. The semiconductor wavelength converting element (12) is attached to a support (51) and disposed in a path of light emitted by the semiconductor light emitting device. The semiconductor wavelength converting element is patterned to include at least two first regions (46) of semiconductor wavelength converting material and at least one second region (48) without semiconductor wavelength converting material disposed between the at least two first regions. |
| US09431580B2 |
Method for producing an optoelectronic component, and an optoelectronic component
A method for producing an optoelectronic component comprising the steps of providing a semiconductor layer sequence having at least one active region, wherein the active region is suitable for emitting electromagnetic radiation during operation, and applying at least one layer on a first surface of the semiconductor layer sequence by means of an ion assisted application method. |
| US09431576B2 |
Lighting device
A lighting device includes a plurality of light-emitting diodes including a first light-emitting diode with a non-rectangular shape in a top view, a submount to which each of the plurality of light-emitting diodes is coupled, and a plurality of conductive elements formed between the submount and the plurality of light-emitting diodes to electrically connecting at least a portion of the plurality of light-emitting diodes with each other in series. |
| US09431575B2 |
Light-emitting device
The embodiment relates to a light-emitting device, a method of manufacturing the same, a light-emitting device package, and a lighting system. A light-emitting device according to the embodiment may include: a first conductive semiconductor layer; a gallium nitride-based superlattice layer on the first conductive semiconductor layer; an active layer on the gallium nitride-based superlattice layer; a second conductive gallium nitride-based layer on the active layer; and a second conductive semiconductor layer on the second conductive gallium nitride-based layer. The second conductive gallium nitride-based layer may include a second conductive GaN layer having a first concentration, a second conductive InxAlyGa(1-x-y)N (0 |
| US09431574B2 |
Light-emitting device including color filter and black matrix
A light-emitting device includes a pixel having a transistor provided over a substrate, and a light-emitting element. The transistor includes a single-crystal semiconductor layer which forms a channel formation region, a silicon oxide layer is provided between the substrate and the single-crystal semiconductor layer, a source or a drain of the transistor is electrically connected to an electrode of the light-emitting element, and the transistor is operated in a saturation region when the light-emitting element emits light. Further, in the light-emitting device, a gray scale of the light-emitting element is displayed by changing a potential applied to the gate of the transistor. |
| US09431571B2 |
Method of manufacturing thin-film photovoltaic module
A method of manufacturing a thin-film photovoltaic module in which a photoelectric conversion element is deposited on a substrate, includes removing the photoelectric conversion element at a frame shape area from sides of the substrate toward inside with a predetermined width by a first removing step of scanning a first photoelectric conversion element removing device at the area along the sides of the substrate to remove the photoelectric conversion element for the predetermined width, and a second removing step of scanning a second photoelectric conversion element removing device within the area along the sides of the substrate to remove the photoelectric conversion element that is not removed in the first removing step at a width narrower than the predetermined width and without superimposing a center line of a scanning path on a center line of a scanning path of the first photoelectric conversion element removing device. |
| US09431569B2 |
Zinc blende cadmium—manganese—telluride with reduced hole compensation effects and methods for forming the same
Embodiments provided herein describe methods for forming cadmium-manganese-telluride (CMT), such as for use in photovoltaic devices. A substrate including a material with a zinc blend crystalline structure is provided. CMT is formed above the substrate. During the formation of the CMT, cation-rich processing conditions are maintained. The resulting CMT may be more readily provided with p-type dopants when compared to conventionally-formed CMT. |
| US09431568B2 |
Optical receiver method and apparatus
A method for making an optical receiver assembly that can receive optical signals via an input optical fiber and can generate output electrical signals, including the following steps: providing an open-ended cavity formed of insulating material, such as a ceramic, comprising a base, peripheral sidewalls, and an open end opposite the base, the outside surface of the base defining a first surface and the inside surface of the base defining a second surface; disposing a first conductive region on a portion of the first surface and a second conductive region on a portion of the second surface; mounting, on the first surface, a semiconductor photodetector device having an active region for communicating optically with the input optical fiber, and coupling an electrical output of the photodetector device with the first conductive region; mounting, on the second surface, an amplifier that is electrically coupled with the second conductive region and produces the output electrical signals; and providing at least one conductive via through the thickness of the base and between the first and second conductive regions for coupling the electrical output of the photodetector device with the amplifier. |
| US09431566B2 |
Photo detector and methods of manufacturing and operating same
A photo detector comprising a first doped impurity region (adapted to receive a first voltage) disposed in or on a substrate; a body region, juxtaposed the first doped impurity region; a gate (adapted to receive a second voltage) spaced from a first portion of the body region; a light absorbing region, juxtaposed a second portion of the body region, includes a material which, in response to light incident thereon, generates carrier pairs including a first and second type carriers; a contact region (adapted to receive a third voltage) juxtaposed the light absorbing region; wherein, in response to incident light, the gate attracts first type carriers of the carrier pairs to the first portion of the body region which causes second carriers from the first doped impurity region to flow to the contact region, and the contact region attracts second type carriers. |
| US09431564B2 |
Photoconductive switch
A photoconductive switch comprising a photoconductive material and first and second contacts provided on said photoconductive material, wherein said first and second contacts comprise a plurality of interdigitated tracks, the tracks of each contact being separated from the tracks of the other contact by a photoconductive gap, the tracks being curved such that the minimum photoconductive gap measured in a first direction remains substantially similar regardless of the orientation of the first direction. |
| US09431563B2 |
Solar cell element and method for manufacturing solar cell element
A solar cell element includes a semiconductor substrate which includes a first semiconductor region positioned on a first main surface and a second semiconductor region in a surface layer portion of a second main surface, and an electrode in line shape disposed on the second main surface. The second semiconductor region includes a first concentration region being separated from the electrode by a predetermined distance in plan view, and a second concentration region including a high concentration region where a dopant concentration is higher than that in the first concentration region and exists along a longitudinal direction of the electrode. |
| US09431556B2 |
Long wavelength infrared sensor materials and method of synthesis thereof
A dilute nitrogen alloy of InNxSb1-x epilayers strained to an epitaxial substrate useful for Long Wavelength Infrared (LWIR) Focal Plane Arrays, and method of fabricating. Strained materials of composition InNxSb1-x exhibiting increased Auger lifetimes and improved absorption properties. |
| US09431555B2 |
Solar cell and method for manufacturing same
A solar cell is provided with: an n-type region formed over a substrate; a p-type region formed over the substrate and the n-type region; and mark sets for judging positional deviation between the n-type region and the p-type region. The mark sets respectively include first marks, and second marks, which are formed within the first marks. |
| US09431549B2 |
Nonvolatile charge trap memory device having a high dielectric constant blocking region
An embodiment of a nonvolatile charge trap memory device is described. In one embodiment, the device comprises a channel comprising silicon overlying a surface on a substrate electrically connecting a first diffusion region and a second diffusion region of the memory device, and a gate stack intersecting and overlying at least a portion of the channel, the gate stack comprising a tunnel oxide abutting the channel, a split charge-trapping region abutting the tunnel oxide, and a multi-layer blocking dielectric abutting the split charge-trapping region. The split charge-trapping region includes a first charge-trapping layer comprising a nitride closer to the tunnel oxide, and a second charge-trapping layer comprising a nitride overlying the first charge-trapping layer. The multi-layer blocking dielectric comprises at least a high-K dielectric layer. |
| US09431547B2 |
Semiconductor device
A semiconductor device having a structure which can prevent a decrease in electrical characteristics due to miniaturization is provided. The semiconductor device includes, over an insulating surface, a stack in which a first oxide semiconductor layer and a second oxide semiconductor layer are sequentially formed, and a third oxide semiconductor layer covering part of a surface of the stack. The third oxide semiconductor layer includes a first layer in contact with the stack and a second layer over the first layer. The first layer includes a microcrystalline layer, and the second layer includes a crystalline layer in which c-axes are aligned in a direction perpendicular to a surface of the first layer. |
| US09431542B2 |
Semiconductor structure
A semiconductor structure includes a top gate, an oxide semiconductor channel layer, a first dielectric layer, a second dielectric layer, a source and a drain. The oxide semiconductor channel layer is disposed between the top gate and a substrate. The first dielectric layer is disposed between the top gate and the oxide semiconductor channel layer. The second dielectric layer is disposed between the first dielectric layer and the oxide semiconductor channel layer. The source and the drain are disposed on two opposite sides of the oxide semiconductor channel layer and located between the first dielectric layer and the substrate. A portion of the oxide semiconductor channel layer is exposed between the source and the drain. A portion of the first dielectric layer and a portion of the second dielectric layer directly contact with and entirely cover the portion of the oxide semiconductor channel layer. |
| US09431541B2 |
Semiconductor device
To give favorable electrical characteristics to a semiconductor device. To provide a semiconductor device in which a change in electrical characteristics is suppressed. To provide a highly reliable semiconductor device. The semiconductor device includes a first insulating layer; a second insulating layer including an opening portion, over the first insulating layer; a semiconductor layer over the first insulating layer; a source electrode and a drain electrode that are apart from each other in a region overlapping with the semiconductor layer; a gate electrode overlapping with the semiconductor layer; and a gate insulating layer between the semiconductor layer and the gate electrode. The first insulating layer includes oxide, and the opening portion of the second insulating layer is positioned inside the semiconductor layer when seen from a top surface side and at least part of the opening portion is provided to overlap with the gate electrode. |
| US09431540B2 |
Method for making a semiconductor device with sidewall spacers for confining epitaxial growth
A method for making a semiconductor device includes forming laterally spaced-apart semiconductor fins above a substrate. At least one dielectric layer is formed adjacent an end portion of the semiconductor fins and within the space between adjacent semiconductor fins. A pair of sidewall spacers is formed adjacent outermost semiconductor fins at the end portion of the semiconductor fins. The at least one dielectric layer and end portion of the semiconductor fins between the pair of sidewall spacers are removed. Source/drain regions are formed between the pair of sidewall spacers. |
| US09431536B1 |
Semiconductor device structure with raised source/drain having cap element
Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a gate stack over a semiconductor substrate and a source/drain structure adjacent to the gate stack. The semiconductor device structure also includes a cap element over the source/drain structure. The cap element has a top surface and a side surface. A width ratio of the top surface to the side surface of the cap element is in a range from about 0.125 to about 1. |
| US09431535B2 |
Semiconductor devices having tensile and/or compressive stress and methods of manufacturing
Semiconductor devices are provided which have a tensile and/or compressive strain applied thereto and methods of manufacturing. The structure includes a gate stack comprising an oxide layer, a polysilicon layer and sidewalls with adjacent spacers. The structure further includes an epitaxially grown straining material directly on the polysilicon layer and between portions of the sidewalls. The epitaxially grown straining material, in a relaxed state, strains the polysilicon layer. |
| US09431528B2 |
Lithographic stack excluding SiARC and method of using same
A lithographic stack over a raised structure (e.g., fin) of a non-planar semiconductor structure, such as a FinFET, includes a bottom layer of spin-on amorphous carbon or spin-on organic planarizing material, a hard mask layer of a nitride and/or an oxide on the spin-on layer, a layer of a developable bottom anti-reflective coating (dBARC) on the hard mask layer, and a top layer of photoresist. The stack is etched to expose and recess the raised structure, and epitaxial structure(s) are grown on the recess. |
| US09431523B2 |
Local thinning of semiconductor fins
After formation of gate structures over semiconductor fins and prior to formation of raised active regions, a directional ion beam is employed to form a dielectric material portion on end walls of semiconductor fins that are perpendicular to the lengthwise direction of the semiconductor fins. The angle of the directional ion beam is selected to be with a vertical plane including the lengthwise direction of the semiconductor fins, thereby avoiding formation of the dielectric material portion on lengthwise sidewalls of the semiconductor fins. Selective epitaxy of semiconductor material is performed to grow raised active regions from sidewall surfaces of the semiconductor fins. Optionally, horizontal portions of the dielectric material portion may be removed prior to the selective epitaxy process. Further, the dielectric material portion may optionally be removed after the selective epitaxy process. |
| US09431522B2 |
Methods of manufacturing FINFET semiconductor devices using sacrificial gate patterns and selective oxidization of a fin
A method of manufacturing a semiconductor device includes patterning a substrate to form an active fin, forming a sacrificial gate pattern crossing over the active fin on the substrate, forming an interlayer insulating layer on the sacrificial gate pattern, removing the sacrificial gate pattern to form a gap region exposing the active fin in the interlayer insulating layer, and oxidizing a portion of the active fin exposed by the gap region to form an insulation pattern between the active fin and the substrate. |
| US09431518B2 |
Patterning of vertical nanowire transistor channel and gate with directed self assembly
Directed self-assembly (DSA) material, or di-block co-polymer, to pattern features that ultimately define a channel region a gate electrode of a vertical nanowire transistor, potentially based on one lithographic operation. In embodiments, DSA material is confined within a guide opening patterned using convention lithography. In embodiments, channel regions and gate electrode materials are aligned to edges of segregated regions within the DSA material. |
| US09431511B2 |
Method for producing a semiconductor device comprising a Schottky diode and a high electron mobility transistor
A semiconductor device includes a Schottky diode and a High Electron Mobility Transistor (HEMT) formed on a III-nitride stack. The III-nitride stack includes at least a lower and an upper III-nitride layer forming a heterojunction therebetween, so that a 2-dimensional electron gas (2DEG) layer may be formed in the lower layer. The 2DEG layer serves as a charge carrier for the diode and the HEMT. A doped III-nitride layer may be present between a portion of the anode of the diode and the III-nitride stack, and the portion may be located between the diode's Schottky junction and the cathode. A further layer of doped III-nitride material may be present between the gate electrode of the HEMT and the III-nitride stack. The thickness of the III-nitride layers is not equal, so that the turn-on voltage of the diode and the threshold voltage of the HEMT may be tuned according to specific requirements. The disclosure also involves a method of producing such a semiconductor device. |
| US09431510B2 |
Metal-semiconductor wafer bonding for high-Q devices
Methods and apparatus for metal semiconductor wafer bonding for high-Q devices are provided. An exemplary capacitor includes a first plate formed on a glass substrate, a second plate, and a dielectric layer. No organic bonding agent is used between the first plate and the glass substrate, and the dielectric layer can be an intrinsic semiconductor. A extrinsic semiconductor layer that is heavily doped contacts the dielectric layer. The dielectric and extrinsic semiconductor layers are sandwiched between the first and second plates. An intermetallic layer is formed between the first plate and the dielectric layer. The intermetallic layer is thermo compression bonded to the first plate and the dielectric layer. The capacitor can be coupled in a circuit as a high-Q capacitor and/or a varactor, and can be integrated with a mobile device. |
| US09431509B2 |
High-K metal gate
An integrated circuit containing metal replacement gates may be formed by forming a nitrogen-rich titanium-based barrier between a high-k gate dielectric layer and a metal work function layer of a PMOS transistor. The nitrogen-rich titanium-based barrier is less than 1 nanometer thick and has an atomic ratio of titanium to nitrogen of less than 43:57. The nitrogen-rich titanium-based barrier may be formed by forming a titanium based layer over the gate dielectric layer and subsequently adding nitrogen to the titanium based layer. The metal work function layer is formed over the nitrogen-rich titanium-based barrier. |
| US09431506B2 |
Metal-oxide-semiconductor (MOS) transistor structure integrated with a resistance random access memory (RRAM) and the manufacturing methods thereof
The present invention belongs to the technical field of semiconductor memories, in particular to a metal oxide semiconductor (MOS) transistor structure integrated with a resistance random access memory (RRAM). The MOS transistor structure comprises a MOS transistor and a RRAM formed on a substrate, wherein a gate dielectric layer of said MOS transistor extends to the surface of a drain region of said MOS transistor; and the part of the gate dielectric layer on the surface of the drain region of said MOS transistor forms a resistance-variable storage layer of said RRAM. In this invention, the high-quality dielectric layer of the MOS transistor and the resistance-variable storage layer of the RRAM are obtained by primary atomic layer deposition which integrates the RRAM and MOS transistor together without increasing steps. This process is simple and can combine the shallow trench isolation or field oxygen isolation and ion implantation or diffusion of source electrode and drain electrode to make integration convenient. |
| US09431501B2 |
Method for producing semiconductor device and semiconductor device
A semiconductor device includes a third first-conductivity-type semiconductor layer on a semiconductor substrate; a first pillar-shaped semiconductor layer formed on the semiconductor substrate and including a first first-conductivity-type semiconductor layer, a first body region, a second first-conductivity-type semiconductor layer, a first second-conductivity-type semiconductor layer, a second body region, a second second-conductivity-type semiconductor layer, and a third second-conductivity-type semiconductor layer; a first gate insulating film around the first body region; a first gate around the first gate insulating film; a second gate insulating film around the second body region; a second gate around the second gate insulating film; an output terminal made of a semiconductor and connected to the second first-conductivity-type semiconductor layer and the first second-conductivity-type semiconductor layer; and a first contact that connects the first gate and the second gate. The second first-conductivity-type semiconductor layer and the first second-conductivity-type semiconductor layer are further formed in the output terminal. |
| US09431496B2 |
Dual work function buried gate-type transistor, method for forming the same, and electronic device including the same
A transistor includes: a source region and a drain region that are formed in a substrate to be spaced apart from each other; a trench formed in the substrate between the source region and the drain region; and a buried gate electrode inside the trench, wherein the buried gate electrode includes: a lower buried portion which includes a high work-function barrier layer including an aluminum-containing titanium nitride, and a first low-resistivity layer disposed over the high work-function barrier layer; and an upper buried portion which includes a low work-function barrier layer disposed over the lower buried portion and overlapping with the source region and the drain region, and a second low-resistivity layer disposed over the low work-function barrier layer. |
| US09431493B2 |
Methods of forming charge-trapping regions
Some embodiments include methods of forming charge-trapping zones. The methods may include forming nanoparticles, transferring the nanoparticles to a liquid to form a dispersion, forming an aerosol from the dispersion, and then directing the aerosol onto a substrate to form charge-trapping centers comprising the nanoparticles. The charge-trapping zones may be incorporated into flash memory cells. |
| US09431492B2 |
Integrated circuit devices including contacts and methods of forming the same
Integrated circuit devices including contacts and methods of forming the same are provided. The devices may include a fin on a substrate, a gate structure on the fin and a source/drain region in the fin at a side of the gate structure. The devices may further include a contact plug covering an uppermost surface of the source/drain region and a sidewall of the gate structure. The contact plug may include an inner portion including a first material and an outer portion including a second material different from the first material. The outer portion may at least partially cover a sidewall of the inner portion, and a portion of the outer portion may be disposed between the sidewall of the gate structure and the sidewall of the inner portion. |
| US09431491B2 |
Semiconductor device and method of manufacturing the same
A semiconductor device including an active cell region formed over the surface of a silicon substrate and including a vertical MOSFET, a drain electrode formed over the surface of the silicon substrate and leading out the drain of the vertical MOSFET from the back surface of the silicon substrate, an external drain terminal formed over the drain electrode, and a source electrode formed over the active cell region so as to be opposed to the drain electrode at least along three sides at the periphery of the external drain terminal over the active cell region and connected to the source of the vertical MOSFET. |
| US09431488B2 |
Composite substrate of gallium nitride and metal oxide
The present invention discloses a novel composite substrate which solves the problem associated with the quality of substrate surface. The composite substrate has at least two layers comprising the first layer composed of GaxAlyIn1-x-yN (0≦x≦1, 0≦x+y≦1) and the second layer composed of metal oxide wherein the second layer can be removed with in-situ etching at elevated temperature. The metal oxide layer is designed to act as a protective layer of the first layer until the fabrication of devices. The metal oxide layer is designed so that it can be removed in a fabrication reactor of the devices through gas-phase etching by reactive gas such as ammonia. |
| US09431477B2 |
Method of forming a group III-nitride crystalline film on a patterned substrate by hydride vapor phase epitaxy (HVPE)
A method of depositing a high quality low defect single crystalline Group III-Nitride film. A patterned substrate having a plurality of features with inclined sidewalls separated by spaces is provided. A Group III-Nitride film is deposited by a hydride vapor phase epitaxy (HVPE) process over the patterned substrate. The HVPE deposition process forms a Group III-Nitride film having a first crystal orientation in the spaces between features and a second different crystal orientation on the inclined sidewalls. The first crystal orientation in the spaces subsequently overgrows the second crystal orientation on the sidewalls and in the process turns over and terminates treading dislocations formed in the first crystal orientation. |
| US09431474B2 |
Metal-insulator-metal stack and method for manufacturing the same
A method for manufacturing a metal-insulator-metal (MIM) stack is described. The method includes forming a temporary stack by depositing a bottom electrode comprising at least one metal layer; depositing a dielectric comprising at least one layer of a dielectric material having a first dielectric constant value; and depositing a top electrode comprising at least one metal layer. The step of depositing the bottom and/or top electrode includes depositing a non-conductive metal oxide layer directly in contact with the dielectric; and after the step of depositing the bottom and/or top electrode's non-conductive metal oxide layer and the dielectric, subjecting the temporary stack to a stimulus, which transforms the non-conductive metal oxide into a thermodynamically stable oxide having conductive properties or into a metal, and the dielectric material into a crystalline form having a second dielectric constant value higher than the first dielectric constant value, thereby creating the final MIM stack. |
| US09431472B2 |
Organic light-emitting diode (OLED) display and method of manufacturing the same
An organic light-emitting diode (OLED) display and a method of manufacturing the same are disclosed. In one aspect, the OLED display includes a plurality of pixels, each of the pixels including at least one wiring configured to receive an electrical signal and a storage capacitor formed on the same layer as the wiring. The wiring includes a first conductive pattern layer, an intermediate insulation pattern layer, and a second conductive pattern layer that are sequentially stacked. The first and second conductive pattern layers are electrically connected to each other through a first via hole. |
| US09431465B2 |
Light-emitting device and method for manufacturing the same
An object is to improve reliability of a light-emitting device. A light-emitting device has a driver circuit portion including a transistor for a driver circuit and a pixel portion including a transistor for a pixel over one substrate. The transistor for the driver circuit and the transistor for the pixel are inverted staggered transistors each including an oxide semiconductor layer in contact with part of an oxide insulating layer. In the pixel portion, a color filter layer and a light-emitting element are provided over the oxide insulating layer. In the transistor for the driver circuit, a conductive layer overlapping with a gate electrode layer and the oxide semiconductor layer is provided over the oxide insulating layer. The gate electrode layer, a source electrode layer, and a drain electrode layer are formed using metal conductive films. |
| US09431464B2 |
Organic electroluminescence device, semiconductor device, and electronic apparatus
An organic electroluminescence device includes a substrate, an organic electroluminescence element provided at a pixel region of the substrate, a connection terminal provided at a terminal region of the substrate, and a temperature sensor provided above the substrate, in which the temperature sensor is provided between the pixel region and the terminal region. |
| US09431458B2 |
Semiconductor devices and methods of manufacturing the same
A semiconductor device includes a first electrode on a substrate, a selection device pattern, a variable resistance layer pattern, a first protective layer pattern, a second protective layer pattern and a second electrode. The selection device pattern is wider, in a given direction, than the variable resistance layer pattern. The first protective layer pattern is formed on a first pair of opposite sides of the variable resistance layer pattern. The second protective layer pattern is formed on a second pair of opposite of the variable resistance layer pattern. The second electrode is disposed on the variable resistance layer pattern. |
| US09431452B1 |
Back side illuminated image sensor pixel with dielectric layer reflecting ring
An image sensor includes a photodiode proximate to a front side of semiconductor material to accumulate image charge. A metal layer reflector structure is disposed in a dielectric layer proximate to the front side of the semiconductor material. A contact reflecting ring structure is disposed in the dielectric layer between the metal layer reflector structure and a contact etch stop layer disposed over the front side of the semiconductor material. The contact reflecting ring structure defines a portion of a light guide in the dielectric layer such that light that is directed through a back side of the semiconductor material, through the photodiode, and reflected from the metal layer reflector structure back through the photodiode is confined to remain within an interior of the contact reflecting ring structure when passing through the dielectric layer between the photodiode and the metal layer reflector structure. |
| US09431451B2 |
Array-type light-receiving device
An array-type light-receiving device includes a substrate including a main surface, a rear surface, and a plurality of recesses formed in the rear surface, the rear surface including an incident plane on which incident light is received; a stacked semiconductor layer disposed on the main surface of the substrate, the stacked semiconductor layer including a light-receiving layer; and a plurality of pixel regions each of which includes the light-receiving layer. The plurality of recesses are each depressed from the rear surface in a thickness direction of the substrate. In addition, each of the plurality of recesses has a bottom surface and a side surface, the bottom surface facing at least one of the plurality of pixel regions, the side surface including a tapered region inclined at a predetermined inclination angle with respect to an in-plane direction of the main surface. |
| US09431444B2 |
Single-plate color imaging element including color filters arranged on pixels
A color imaging element including color filters arranged on pixels, wherein the color filter array includes a basic array pattern including first filters corresponding to a first color that most contributes to obtaining luminance signals and second filters corresponding to two or more second colors other than the first color, the basic array pattern repeatedly arranged in the horizontal and vertical directions, one or more first filters are arranged in each line in horizontal, vertical, and oblique directions of the color filter array, one or more second filters are arranged in each line in the horizontal and vertical directions of the color filter array in the basic array pattern, and a proportion of the number of pixels of the first color corresponding to the first filters is greater than proportions of the numbers of pixels of each color of the second colors corresponding to the second filters. |
| US09431443B1 |
Image sensor with heating effect and related methods
An image sensor including a semiconductor layer. A light absorber layer couples with the semiconductor layer at a pixel of the image sensor and absorbs incident light to substantially prevent the incident light from entering the semiconductor layer. The light absorber layer heats a depletion region of the semiconductor layer in response to absorbing the incident light, creating electron/hole pairs. The light absorber layer may include one or more narrow bandgap materials. |
| US09431441B1 |
Image sensor pixel structure
A back side illumination image sensor pixel structure includes a substrate having a front side and a back side opposite to the front side, a sensing device formed in the substrate to receive an incident light through the back side of the substrate, two oxide-semiconductor field effect transistor (OS FET) devices formed on the front side of the substrate, and a capacitor formed on the front side of the substrate. The two OS FET devices are directly stacked on the sensing device and the capacitor is directly stacked on the OS FET devices. The two OS FET devices overlap the sensing device, and the capacitor overlaps both of the OS FET devices and the sensing device. |
| US09431440B2 |
Optical sensor
An integrated circuit device includes an active semiconductor substrate comprising an array of photodiodes. The integrated circuit device also includes a dielectric layer disposed adjacent to the active semiconductor substrate proximate to the array of photodiodes. The dielectric layer has a first side adjacent to the active semiconductor substrate and a second side opposite from the active semiconductor substrate. The dielectric layer includes a layer of at least substantially opaque material. The layer of at least substantially opaque material defines an aperture configured to permit electromagnetic radiation incident upon the second side of the dielectric layer to reach the array of photodiodes. |
| US09431438B2 |
Display device and method for fabricating the same
A display device according to an embodiment includes a plurality of driving blocks including a plurality of gate lines and a gate shorting structure spaced apart from the gate lines by an amount equal to a trimming region; an equipotential line extending from one of the driving blocks to an adjacent driving block, part of which is removed by the amount equal to the trimming region; a gate dummy line extending from at least one of the driving blocks; a plurality of data lines intersecting the gate lines; and an active layer disposed between the gate dummy line and the data lines, wherein some part of the active layer that overlaps the gate dummy line but does not overlap the data lines is removed. |
| US09431436B2 |
Array substrate and manufacturing method thereof
A method of manufacturing an array substrate is disclosed. A first conductive pattern, a first insulating layer, a second conductive pattern, and a second insulating layer on a base substrate is successively formed. The second insulating layer and the first insulating layer are patterned with a double-tone mask. At least a half lap joint via hole in the second insulating layer, and at least a full lap joint via hole in both the first insulating layer and the second insulating layer is formed. The second conductive pattern corresponds to a part of the half lap joint via hole, and the first conductive pattern corresponds to the whole of the full lap joint via hole. A third conductivity pattern is formed on the surface of the second conductivity pattern and the first insulating layer and a fourth conductive pattern is formed on the surface of the first conductive pattern. |
| US09431433B2 |
TFT array substrate, display panel and display device
A TFT array substrate, a display panel and a display device are disclosed. The TFT array substrate includes a substrate, a display area and a peripheral area surrounding the display area. The display area and the peripheral area are arranged above the substrate. The peripheral area comprises a signal line and a shielding layer arranged above the signal line, and the shielding layer covers the signal line to shield EMI caused by a signal on the signal line. The TFT array substrate, the display panel and the display device can protect the display panel against EMI caused by the signal on the signal lines in the peripheral area, thereby improving stability and reliability of the TFT array substrate, the display panel and the display device, and enhancing sensitivity of a cellphone having the display panel. |
| US09431432B2 |
Array substrate, method for manufacturing the same, display device
The embodiments of the present invention disclose an array substrate, a method for manufacturing the same, and a display device. With the solutions of the embodiments, aperture rate is increased, and gate signal delay caused by increased connection resistance of gate line is alleviated. The array substrate of the present invention includes a thin film transistor; a substrate; a common electrode provided on the substrate; a gate line comprising a plurality of separate segments arranged to be spaced apart from each other and connected with each other through a bridge; and a common electrode line provided to be spaced apart from the gate line, the gate line and the common electrode line being in the same layer, wherein the common electrode line comprises a connection segment extending through a gap between separate segments to electrically connect with the common electrode directly. |
| US09431431B2 |
Semiconductor device and fabrication method thereof
This invention provides a semiconductor device having high operation performance and high reliability. An LDD region 707 overlapping with a gate wiring is arranged in an n-channel TFT 802 forming a driving circuit, and a TFT structure highly resistant to hot carrier injection is achieved. LDD regions 717, 718, 719 and 720 not overlapping with a gate wiring are arranged in an n-channel TFT 804 forming a pixel unit. As a result, a TFT structure having a small OFF current value is achieved. In this instance, an element belonging to the Group 15 of the Periodic Table exists in a higher concentration in the LDD region 707 than in the LDD regions 717, 718, 719 and 720. |
| US09431429B2 |
Semiconductor device
An object is to provide a semiconductor device using an oxide semiconductor having stable electric characteristics and high reliability. A transistor including the oxide semiconductor film in which a top surface portion of the oxide semiconductor film is provided with a metal oxide film containing a constituent similar to that of the oxide semiconductor film and functioning as a channel protective film is provided. In addition, the oxide semiconductor film used for an active layer of the transistor is an oxide semiconductor film highly purified to be electrically i-type (intrinsic) by heat treatment in which impurities such as hydrogen, moisture, a hydroxyl group, or a hydride are removed from the oxide semiconductor and oxygen which is a major constituent of the oxide semiconductor and is reduced concurrently with a step of removing impurities is supplied. |
| US09431424B1 |
Method for creating metal gate resistor in FDSOL and resulting device
Fabricating FEOL metal gate resistor structures and the resulting device are disclosed. Embodiments include providing a Si layer-insulator layer-Si substrate stack; forming STI regions at first through fourth sides of a rectangular active-area of the Si layer, the first side opposing the third, the STI extending into the substrate; recessing the STI below the insulator upper surface; undercutting the active-area, forming channels in the insulator along and under perimeter edges of the active-area; conformally forming a high-k dielectric on all exposed surfaces; forming metal on the high-k dielectric and filling the channels; removing the metal except for the filled channels and a portion over each of the STI at the first and third sides and overlapping the active-area; and forming low-k spacers on exposed opposing sidewalls of the metal portions and exposed vertical surfaces of the high-k dielectric on edges of the active-area and the filled channels. |
| US09431422B2 |
Semiconductor constructions and NAND unit cells
Some embodiments include methods of forming semiconductor constructions. Alternating layers of n-type doped material and p-type doped material may be formed. The alternating layers may be patterned into a plurality of vertical columns that are spaced from one another by openings. The openings may be lined with tunnel dielectric, charge-storage material and blocking dielectric. Alternating layers of insulative material and conductive control gate material may be formed within the lined openings. Some embodiments include methods of forming NAND unit cells. Columns of alternating n-type material and p-type material may be formed. The columns may be lined with a layer of tunnel dielectric, a layer of charge-storage material, and a layer of blocking dielectric. Alternating layers of insulative material and conductive control gate material may be formed between the lined columns. Some embodiments include semiconductor constructions, and some embodiments include NAND unit cells. |
| US09431420B2 |
Semiconductor devices including vertical cell strings that are commonly connected
A semiconductor device includes bit lines on a substrate, a gate structure provided between the substrate and the bit lines, a common source line provided between the gate structure and the bit lines, and channel structures connecting the bit lines to the common source line. Each of the channel structures may include a plurality of first vertical portions penetrating the gate structure and being connected to the bit lines, a second vertical portion penetrating the gate structure and being connected to the common source line, and a horizontal portion provided between the substrate and the gate structure to connect the first and second vertical portions to each other. |
| US09431415B2 |
Semiconductor device with vertical memory
A semiconductor device includes a peripheral circuit region on a substrate, a polysilicon layer on the peripheral circuit region, a memory cell array region on the polysilicon layer and overlapping the peripheral circuit region, the peripheral circuit region being under the memory cell array region, an upper interconnection layer on the memory cell array region, and a vertical contact through the memory cell array region and the polysilicon layer, the vertical contact connecting the upper interconnection layer to the peripheral circuit region. |
| US09431409B2 |
Method of making a three-dimensional memory array with etch stop
A three dimensional memory device including a substrate and a semiconductor channel. At least one end portion of the semiconductor channel extends substantially perpendicular to a major surface of the substrate. The device also includes at least one charge storage region located adjacent to semiconductor channel and a plurality of control gate electrodes having a strip shape extending substantially parallel to the major surface of the substrate. The plurality of control gate electrodes include at least a first control gate electrode located in a first device level and a second control gate electrode located in a second device level located over the major surface of the substrate and below the first device level. The device also includes an etch stop layer located between the substrate and the plurality of control gate electrodes. |
| US09431404B2 |
Techniques providing high-k dielectric metal gate CMOS
A semiconductor device includes a dielectric layer on a substrate, a P-type transistor having a first gate stack embedded in the dielectric layer, and an N-type transistor having a second gate stack embedded in the dielectric layer. The first gate stack includes a first metal gate electrode, a first gate dielectric layer underlying the first metal gate electrode, and a first cap layer between the first gate dielectric layer and the first metal gate electrode. The second gate stack includes a second metal gate electrode, a second gate dielectric layer underlying the second metal gate electrode, and a second cap layer between the second gate dielectric layer and the second metal gate electrode. The first and second gate stacks are adjacent, and the first and second metal gate electrodes are separated from each other by the first and second cap layers. |
| US09431400B2 |
Semiconductor memory device and method for manufacturing the same
A highly integrated DRAM is provided. A bit line is formed over a first insulator, a second insulator is formed over the bit line, third insulators which are in a stripe shape and the like are formed over the second insulator, and a semiconductor region and a gate insulator are formed to cover one of the third insulators. The bit line is connected to the semiconductor region through first contact plugs. Then, a conductive film is formed and subjected to anisotropic etching to form word lines at side surfaces of the third insulators, and a second contact plug is formed to be connected to a capacitor at a top of the one of the third insulators. By synchronizing the word lines, electric charge is accumulated or released through the capacitor. With such a structure, the area of a memory cell can be 4F2. |
| US09431397B2 |
Method for fabricating a multi-gate device
A device includes a wafer substrate including an isolation feature, at least two fin structures embedded in the isolation feature, and at least two gate stacks disposed around the two fin structures respectively. A first inter-layer dielectric (ILD) layer is disposed between the two gate stacks, with a dish-shaped recess formed therebetween, such that a bottom surface of the recess is below the top surface of the adjacent two gate stacks. A second ILD layer is disposed over the first ILD layer, including in the dish-shaped recess. The second ILD includes nitride material; the first ILD includes oxide material. |
| US09431395B2 |
Protection of semiconductor-oxide-containing gate dielectric during replacement gate formation
Semiconductor-oxide-containing gate dielectrics can be formed on surfaces of semiconductor fins prior to formation of a disposable gate structure. A high dielectric constant (high-k) dielectric spacer can be formed to protect each semiconductor-oxide-containing gate dielectric. Formation of the high-k dielectric spacers may be performed after formation of gate cavities by removal of disposable gate structures, or prior to formation of disposable gate structures. The high-k dielectric spacers can be used as protective layers during an anisotropic etch that vertically extends the gate cavity, and can be removed after vertical extension of the gate cavities. A subset of the semiconductor-oxide-containing gate dielectrics can be removed for formation of high-k gate dielectrics for first type devices, while another subset of the semiconductor-oxide-containing gate dielectrics can be employed as gate dielectrics for second type devices. The vertical extension of the gate cavities increases channel widths in the fin field effect transistors. |
| US09431389B2 |
ESD transistor for high voltage and ESD protection circuit thereof
An ESD transistor and an ESD protection circuit thereof are provided. An ESD transistor includes a collector region disposed on a surface of a substrate, a sink region disposed vertically below the collector region, and a buried layer protruding horizontally further than the sink region under the sink region. |
| US09431382B2 |
Semiconductor device arrangement with a first semiconductor device and with a plurality of second semiconductor devices
Disclosed is a semiconductor device arrangement including a first semiconductor device having a load path, and a plurality of second transistors, each having a load path between a first and a second load terminal and a control terminal. The second transistors have their load paths connected in series and connected in series to the load path of the first transistor, each of the second transistors has its control terminal connected to the load terminal of one of the other second transistors, and one of the second transistors has its control terminal connected to one of the load terminals of the first semiconductor device. |
| US09431380B2 |
Microelectronic assembly having a heat spreader for a plurality of die
A method of manufacturing a microelectronic assembly (100) and a microelectronic device (4100) that include a stacked structure (101). The stacked structure includes a heat spreader (104), at least one die (106) thermally coupled to at least a portion of one side of the heat spreader, at least one other die (108) thermal coupled to at least a portion of an opposite side of the heat spreader, at least one opening (401) in the heat spreader located in a region of between the two die, an insulator (603) disposed in the at least one opening, and electrically conductive material (1308, 1406) in an insulated hole (705) in the insulator. The heat spreader allows electrical communication between the two die through the opening while the insulator isolates the electrically conductive material and the heat spreader from each other. |
| US09431378B2 |
Light-emitting diodes
A light-emitting diode includes a carrier including a metallic basic body having an outer face including a mounting face; and at least two light-emitting diode chips affixed to the carrier at least indirectly at the mounting face, wherein the at least two light-emitting diode chips are embedded in a reflective coating covering the mounting face and side faces of the at least two light-emitting diode chips, the at least two light-emitting diode chips have radiation exit surfaces facing away from the carrier, and the at least two light-emitting diode chips protrude with radiation exit surfaces out of the reflective coating, or the reflective coating terminates flush with the radiation exit surfaces of the at least two light-emitting diode chips. |
| US09431372B2 |
Multi-chip package
A multi-chip package includes first and second semiconductor chips that are sequentially stacked, each of the first and second semiconductor chips including an operation block for an internal operation, third and fourth semiconductor chips that are sequentially stacked over the second semiconductor chip and rotated 180 degrees in a horizontal direction with respect to the first and second semiconductor chips, each of the third and fourth semiconductor chips including an operation block, and through chip vias for transmitting predetermined signals between the operation blocks of the first to fourth semiconductor chips. |
| US09431371B2 |
Semiconductor package with a bridge interposer
There are disclosed herein various implementations of semiconductor packages including a bridge interposer. One exemplary implementation includes a first active die having a first portion situated over the bridge interposer, and a second portion not situated over the bridge interposer. The semiconductor package also includes a second active die having a first portion situated over the bridge interposer, and a second portion not situated over the bridge interposer. The second portion of the first active die and the second portion of the second active die include solder balls mounted on a package substrate, and are configured to communicate electrical signals to the package substrate utilizing the solder balls and without utilizing through-semiconductor vias (TSVs). |
| US09431369B2 |
Antenna apparatus and method
An antenna apparatus comprises a semiconductor die comprising a plurality of active circuits, a molding layer formed over the semiconductor die, wherein the semiconductor die and the molding layer form a fan-out package, a first dielectric layer formed on a first side of the semiconductor die over the molding compound layer, a first redistribution layer formed in the first dielectric layer and an antenna structure formed above the semiconductor die and coupled to the plurality of active circuits through the first redistribution layer. |
| US09431368B2 |
Three dimensional device integration method and integrated device
A method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element may include one of a substrate used for thermal spreading, impedance matching or for RF isolation, an antenna, and a matching network comprised of passive elements. A second thermal spreading substrate may be bonded to the remaining portion of the semiconductor device. Interconnections may be made through the first or second substrates. The method may also include bonding a plurality of semiconductor devices to an element, and the element may have recesses in which the semiconductor devices are disposed. |
| US09431364B2 |
Multi-chip package assembly with improved bond wire separation
A multi-chip package is disclosed that has a construction capable of preventing and/or reducing electrical shorts caused by shifts in bond wires. The multi-chip package includes a die attach formed between connection points of a bond wire. The die attach is made of a non-conductive material and can be constructed so as to support or encompass a portion of the bond wire. By contacting the bond wire, the die attach restricts the motion of the bond wire by acting as a physical barrier to the bond wire's movement and/or as a source of friction. In this manner, undesired position shifts of the bond wires can be prevented, reducing device failures and allowing for improved manufacturing allowances. |
| US09431362B2 |
Semiconductor module
A semiconductor module includes a first semiconductor chip including a first signal line and a first ground, a mounting board or a second semiconductor chip including a second signal line and a second ground, a signal line coupling bump that couples the first signal line and the second signal line with each other, a first ground coupling bump that couples the first ground and the second ground with each other, a signal line side insulating film including a capacitance that causes a series resonance with an inductance by the signal line coupling bump at a target frequency and a ground side insulating film including a capacitance that causes a series resonance with an inductance by the first ground coupling bump at a target frequency. |
| US09431359B2 |
Coaxial solder bump support structure
A solder bump support structure and method of manufacturing thereof is provided. The solder bump support structure includes an inter-level dielectric (ILD) layer formed over a silicon substrate. The ILD layer has a plurality of conductive vias. The structure further includes a first insulation layer formed on the ILD layer. The solder bump support structure further includes a pedestal member formed on the ILD layer which includes a conductive material formed above the plurality of conductive vias in the ILD layer coaxially surrounded by a second insulation layer. The second insulation layer is thicker than the first insulation layer. The structure further includes a capping under bump metal (UBM) layer formed over, and in electrical contact with, the conductive material and formed over at least a portion of the second insulation layer of the pedestal member. |
| US09431357B2 |
Wiring board and high frequency module using same
A high frequency module wiring board includes a wiring section for high frequency transmission, and a solder resist layer formed upon the wiring section. The solder resist layer covers the wiring section so as to have an opening section at a part of the wiring section in a region extending within a predetermined distance from an input/output terminal of a chip component. |
| US09431354B2 |
Activating reactions in integrated circuits through electrical discharge
Embodiments of the present invention provide integrated circuits and methods for activating reactions in integrated circuits. In one embodiment, an integrated circuit is provided having reactive material capable of being activated by electrical discharge, without requiring a battery or similar external power source, to produce an exothermic reaction that erases and/or destroys one or more semiconductor devices on the integrated circuit. |
| US09431352B2 |
Chip with shelf life
A semiconductor structure including a recess within a silicon substrate of an integrated circuit (IC) chip, wherein the recess is located near a circuit of the IC chip, and a metal layer in a bottom portion of the recess, wherein a portion of the silicon substrate is located below the metal layer in the bottom portion of the recess and above the circuit. |
| US09431350B2 |
Crack-stopping structure and method for forming the same
A crack-stopping structure includes a semiconductor wafer comprising a plurality of dies defined by a plurality of scribe line regions, a plurality of metal patterns formed in the scribe line regions, and a plurality of groups of through silicon holes (TSHs) formed in the scribe line regions. The wafer further includes a front side and a back side, and the TSHs respectively include at least a bottom opening formed in the bottom side of the wafer. The groups of TSHs are formed between the metal patterns and the dies. |
| US09431348B2 |
Semiconductor device manufacturing method and manufacturing device for marking a crystal defect
A marker which is a reference of a coordinate position defining a region of a chip that is manufactured in a semiconductor substrate is formed. A crystal defect on the semiconductor substrate is detected. The coordinate position of the detected crystal defect is detected on the basis of the marker. Therefore, it is possible to detect the position of a semiconductor chip including the crystal defect among the semiconductor chips manufactured on the semiconductor substrate. As a result, it is possible to easily detect the position of the semiconductor device including the position of the crystal defect on the semiconductor substrate. |
| US09431347B2 |
Wiring board and method for manufacturing the same
A wiring board includes a first insulation layer, first conductive patterns formed on the first insulation layer and including first mounting pads positioned to mount a semiconductor element, a wiring structure positioned in the first insulation layer and having a second insulation layer, second conductive patterns formed on the second insulation layer, and second mounting pads connected to the second conductive patterns, and third mounting pads formed on the first insulation layer above the second mounting pads and connected to the second mounting pads such that the third mounting pads are positioned to mount the semiconductor element and form a distance between adjacent first and third mounting pads which is greater than a distance between adjacent first mounting pads. |
| US09431346B2 |
Graphene-metal E-fuse
A structure including an Mx level including a first Mx metal, a second Mx metal, and a third Mx metal abutting and electrically connected in sequence with one another, the second Mx metal including graphene, and an Mx+1 level above the Mx level, the Mx+1 level including an Mx+1 metal and a via, the via electrically connects the third Mx metal to the Mx+1 metal in a vertical orientation. |
| US09431340B2 |
Wiring structure for trench fuse component with methods of fabrication
The present disclosure generally relates to a wiring structure for a fuse component and corresponding methods of fabrication. A wiring structure for a fuse component according to the present disclosure can include: a first electrical terminal embedded within a doped conductive layer, the doped conductive layer being positioned between two insulator layers of an integrated circuit (IC) structure; a dielectric liner positioned between the first electrical terminal and the doped conductive layer; a second electrical terminal embedded within the doped conductive layer; wherein each of the first electrical terminal and the second electrical terminal are further embedded in one of the two insulator layers, and the dielectric liner is configured to degrade upon becoming electrically charged. |
| US09431338B2 |
Bypass capacitor circuit and method of providing a bypass capacitance for an integrated circuit die
A bypass capacitor circuit for an integrated circuit (IC) comprises one or more capacitive devices, each arranged in a segment of a seal ring area of a die, which comprises the IC. A method of providing a bypass capacitance for an IC comprises providing a semiconductor wafer device comprising a plurality of dies, each comprising an IC; arranging one or more capacitive devices in a seal ring area of at least one of the IC; dicing the semiconductor wafer device; in a test mode, for each of the one or more capacitive devices, enabling the capacitive device, determining an operability parameter value indicative of an operability of the capacitive device, and storing the operability parameter in a memory device; and in a normal operation mode, providing a bypass capacitance to the IC depending on a capacitance of one or more of the capacitive devices having an associated operability parameter value indicative of a non-defectiveness of the corresponding capacitive device. |
| US09431332B2 |
Semiconductor package
A semiconductor package comprising: a semiconductor chip comprising a first surface on a first side of the semiconductor chip and a second surface on a second side of the semiconductor chip, wherein the first side and the second side are opposite sides of the semiconductor chip; a through-electrode penetrating the semiconductor chip between the first surface and the second surface; a passivation layer formed on the second surface of the semiconductor chip; and an electrode pad formed on an upper surface of the passivation layer and electrically connected to the through-electrode, wherein the passivation layer comprises a first passivation layer formed on the second surface of the semiconductor chip and a second passivation layer formed on an upper surface of the first passivation layer, and the electrode pad penetrates the second passivation layer to contact the upper surface of the first passivation layer. |
| US09431331B2 |
Semiconductor device and method of forming penetrable film encapsulant around semiconductor die and interconnect structure
A semiconductor device has a plurality of bumps formed over a carrier. A semiconductor die is mounted to the carrier between the bumps. A penetrable film encapsulant layer having a base layer, first adhesive layer, and second adhesive layer is placed over the semiconductor die and bumps. The penetrable film encapsulant layer is pressed over the semiconductor die and bumps to embed the semiconductor die and bumps within the first and second adhesive layers. The first adhesive layer and second adhesive layer are separated to remove the base layer and first adhesive layer and leave the second adhesive layer around the semiconductor die and bumps. The bumps are exposed from the second adhesive layer. The carrier is removed. An interconnect structure is formed over the semiconductor die and second adhesive layer. A conductive layer is formed over the second adhesive layer electrically connected to the bumps. |
| US09431330B2 |
System and method for metal matrix mounting scheme
An integrated circuit assembly element formed via an additive manufacturing technique, such as mixing a conductive material with a memory metal to form a portion of a substrate in desired locations, such as along the footprint of die, are discussed herein. In operation (e.g. in response to thermal cycling of the assembly) the memory metal contracts while the conductive material expands. The result is an element having reduced thermal expansion, which can be net zero coefficient of thermal expansion and/or be catered to the coefficient of thermal expansion of a desired material, such as the silicon die. |
| US09431329B2 |
High efficiency module
A module (1) includes a first functional device (2) and a second functional device (3). The first functional device (2) includes a base electrode, an emitter electrode and a collector electrode. The second functional device (3) includes at least one electrode. The module (1) further includes a conductive frame (4). One of the base electrode, the emitter electrode, and the collector electrode of the first functional device (2) is directly connected to the frame (4). The electrode of the second functional device (3) is also directly connected to the frame (4). The frame (4) includes a portion serving as a terminal for external connection. |
| US09431324B2 |
Semiconductor device having contact structures
A semiconductor device includes: a substrate having a plurality of active regions; a plurality of bit lines extending in a first direction, the plurality of bit lines being separate from the substrate with an insulating layer therebetween; a plurality of first insulating lines extending in a second direction that is different from the first direction, wherein the plurality of first insulating lines intersect the plurality of bit lines and have upper surfaces having levels which are higher than those of upper surfaces of the plurality of bit lines relative to the substrate; and a plurality of first contact structures connected to the plurality of active regions, the plurality of first contact structures being disposed in an area defined by the plurality of bit lines and the plurality of first insulating lines. |
| US09431316B2 |
Semiconductor device and method of forming channels in back surface of FO-WLCSP for heat dissipation
A semiconductor device has semiconductor die mounted to a temporary carrier. An encapsulant is deposited over the die and carrier. A channel is formed in a back surface of the die, either while in wafer form or after mounting to the carrier. The channel corresponds to a specific heat generating area of the die. The channel can be straight or curved or crossing pattern. The carrier is removed. An interconnect structure is formed over the encapsulant and die. The semiconductor die are singulated through the encapsulant. A TIM and heat sink are formed over the channel and encapsulant. Alternatively, a conformal plating layer can be formed over the channel and encapsulant. A conductive via can be formed through the encapsulant, and TSV formed through the die. The die with channels can be mounted over a second semiconductor die which is mounted to the interconnect structure. |
| US09431315B2 |
Chemical sensor package for highly pressured environment
A package for a chemical sensor including an encapsulation and a pressure balancing structure is disclosed. The encapsulation encapsulates a chemical sensor and has a hole for exposing a chemical sensitive part of the chemical sensor. The pressure balancing structure balances pressure applied to the chemical sensor at the chemical sensitive part. |
| US09431310B2 |
Simulation method, simulation program, process control system, simulator, process design method, and mask design method
A simulation method includes acquiring processing conditions for performing an etching process using plasma on a surface of a wafer covered by a mask having a predetermined mask thickness and aperture ratio, calculating, based on the conditions, a flux amount of a reaction product that enters the surface, calculating, based on mask information including the thickness and the aperture ratio and the flux amount, an etching rate of the wafer, calculating, based on the conditions and the etching rate, a dissociation fraction of the product, calculating, based on the information and the etching rate, a solid angle at a predetermined evaluation point set on the surface, the solid angle corresponding to a view area in which plasma space can be seen from the evaluation point, and calculating, based on the etching rate, the dissociation fraction, the solid angle, and the aperture ratio, a control index for evaluating a surface shape. |
| US09431309B2 |
Method for wafer level reliability
A method for ensuring wafer level reliability is provided. The method involves: forming a gate oxide layer having a thickness of less than 50 Å on a semiconductor substrate; forming a PMOS element having a channel length of less than 0.13 μm on the semiconductor substrate; and assessing hot carrier injection (HCI) for the PMOS element. |
| US09431308B2 |
Critical size compensating method of deep groove etching process
A critical dimension compensating method of a deep trench etching process includes: obtaining an etching critical dimension difference; compensating an masking layer layout for wafer etching according to a distance between an etching position and the center position of the wafer, and the etching critical dimension difference; and performing a deep trench etching to the wafer according to the compensated masking layer layout. The dimension of the etching patterns of the masking layer layout is compensated by using half of the critical dimension difference as the compensation value, such that the etch rate difference and the etching dimension difference caused by uneven distribution of the critical dimension at different wafer locations during the deep trench etching process are improved, thus greatly improving the uniformity of the critical dimension of the deep trench etching structure. |
| US09431302B2 |
Low-cost CMOS structure with dual gate dielectrics and method of forming the CMOS structure
Impurity atoms of a first type are implanted through a gate and a thin gate dielectric into a channel region that has substantially only the first type of impurity atoms at a middle point of the channel region to increase the average dopant concentration of the first type of impurity atoms in the channel region to adjust the threshold voltage of a transistor. |
| US09431301B1 |
Nanowire field effect transistor (FET) and method for fabricating the same
A semiconductor structure includes a plurality of semiconductor fins located on a semiconductor substrate, in which each of the semiconductor fins comprises a sequential stack of a buffered layer including a III-V semiconductor material and a channel layer including a III-V semiconductor material. The semiconductor structure further includes a gap filler material surrounding the semiconductor fins and including a plurality of trenches therein. The released portions of the channel layers of the semiconductor fins located in the trenches constitute nanowire channels of the semiconductor structure, and opposing end portions of the channel layers of the semiconductor fins located outside of the trenches constitute a source region and a drain region of the semiconductor structure, respectively. In addition, the semiconductor structure further includes a plurality of gates structures located within the trenches that surround the nanowire channels in a gate all around configuration. |
| US09431299B2 |
Package substrate dividing method
A package substrate is divided into a plurality of device packages. An adhesive tape is attached to a back side of the substrate by cutting the substrate along a plurality of division lines formed on a front side of the substrate. The substrate includes a device portion partitioned into a plurality of device package regions by the division lines, and a marginal portion surrounding the device portion. A first ultraviolet light is applied to reduce the adhesive force of the adhesive tape in the marginal portion. The adhesive tape is partially peeled from the substrate in the marginal portion, and the substrate is cut along each division line by using a cutting blade to thereby divide the substrate into the device packages. In the dividing step, the marginal portion separated from the substrate is scattered by rotation of the cutting blade and thereby removed from the adhesive tape. |
| US09431296B2 |
Structure and method to form liner silicide with improved contact resistance and reliablity
A contact structure with improved contact resistance and reliability is provided by forming an inner spacer between a contact liner and dielectric layers laterally surrounding the contact structure. The inner spacer severs as a barrier to prevent diffusion of metals from the contact liner into the dielectric layers. |
| US09431295B2 |
Interconnect structure including a modified photoresist as a permanent interconnect dielectric and method of fabricating same
An interconnect structure is provided that may include at least one cured permanent patterned dielectric material located on a surface of a substrate. The at least one cured permanent patterned dielectric material is a cured product of a patterned photoresist that includes a dielectric enabling element therein. The structure further includes at least one conductively filled region embedded within the at least one cured permanent patterned dielectric material. |
| US09431293B2 |
Selective local metal cap layer formation for improved electromigration behavior
A method of forming a wiring structure for an integrated circuit device includes forming a first metal line within an interlevel dielectric (ILD) layer, and forming a second metal line in the ILD layer adjacent the first metal line; masking selected regions of the first and second metal lines; selectively plating metal cap regions over exposed regions of the first and second metal lines at periodic intervals such that a spacing between adjacent metal cap regions of an individual metal line corresponds to a critical length, L, at which a back stress gradient balances an electromigration force in the individual metal line, so as to suppress mass transport of electrons; and wherein the metal cap regions of the first metal line are formed at staggered locations with respect to the metal cap regions of the second metal line, along a common longitudinal axis. |
| US09431290B2 |
Semiconductor device and manufacturing method therefor
A semiconductor device manufacturing method is disclosed by which electron beam irradiation is accomplished at a low cost while exhibiting uniform characteristics. A wafer stack consisting of multiple stacked wafers is irradiated with an electron beam from both the front surface and reverse surface. As such, a semiconductor device manufacturing method is provided whereby the electrical characteristics are extremely uniform between wafers, and costs are reduced by reducing the number of electron beam irradiations. |
| US09431288B2 |
System and method for test key characterizing wafer processing state
Disclosed herein is a method for forming a test key system for characterizing wafer processing states, the method comprising forming a plurality of shallow trench isolation structures (STIs) on a substrate of a wafer and in a scribe line of the wafer and forming a test key on the substrate of a wafer and in the scribe line of the wafer. Forming the test key comprises forming at least one test key group having a plurality of test key series, each of the plurality of test key series having a plurality of test pads, each one of the plurality of test key series having a first physical characteristic different from the first physical characteristic of other test key series the at least one first test key group. |
| US09431284B2 |
Device for machining a substrate and a method for this purpose
In a device for machining, in particular etching and/or developing, substrates, in particular wafers, in particular etching and/or developing, having a turntable, the turntable has a Venturi gap. |
| US09431283B2 |
Direct electrostatic assembly with capacitively coupled electrodes
A system and method manipulate micro objects. A field generator is configured to generate a force field varying in both space and time to manipulate the micro objects on a substrate. The substrate is not permanently affixed to the field generator and allows the force field to pass through the substrate. |
| US09431277B2 |
Substrate treatment method and substrate treatment apparatus
A substrate treatment method for treating a substrate including a first silicon nitride film provided on a front surface thereof and a silicon oxide film provided on the first silicon nitride film to remove the first silicon nitride film and the silicon oxide film from the substrate includes: a first phosphoric acid treatment step of supplying a phosphoric acid aqueous solution having a predetermined first concentration to the substrate held by a substrate holding unit to treat the substrate with the first concentration phosphoric acid aqueous solution for the removal of the first silicon nitride film; and a second phosphoric acid treatment step of supplying a phosphoric acid aqueous solution having a second concentration lower than the first concentration to the substrate to treat the substrate with the second concentration phosphoric acid aqueous solution for the removal of the silicon oxide film after the first phosphoric acid treatment step. |
| US09431274B2 |
Method for reducing underfill filler settling in integrated circuit packages
Embodiments of the present disclosure are directed to techniques and configurations for an integrated circuit (IC) package having an underfill layer with filler particles arranged in a generally random distribution pattern. In some embodiments, a generally random distribution pattern of filler particles may be obtained by reducing an electrostatic charge on one or more components of the IC package assembly, by applying a surface treatment to filler to reduce filler electrical charge, by applying an electric force against the filler particles of the underfill material in a direction opposite to a direction of gravitational force, by using an underfill material with a relatively low maximum filler particle size, and/or by snap curing the underfill layer at a relatively low temperature. Other embodiments may be described and/or claimed. |
| US09431271B2 |
Heat dissipating device
A heat dissipating device includes a base and a plurality of heat dissipating fins. The base includes a substrate and a box, wherein the substrate and the box are formed integrally and the box has an accommodating space therein. Each of the heat dissipating fins includes a heat dissipating portion, a fixing portion and an overflow-proof structure. The fixing portion is fixed in the base. The overflow-proof structure is connected between the heat dissipating portion and the fixing portion. A width of the overflow-proof structure is larger than a width of the heat dissipating portion and larger than a width of the fixing portion. |
| US09431257B2 |
Salicided structure to integrate a flash memory device with a high κ, metal gate logic device
An integrated circuit for an embedded flash memory device is provided. A semiconductor substrate includes a memory region and a logic region adjacent to the memory region. A logic device is arranged over the logic region and includes a metal gate separated from the semiconductor substrate by a material having a dielectric constant exceeding 3.9. A flash memory cell device is arranged over the memory region. The flash memory cell device includes a first memory cell gate, a second memory cell gate, and a dielectric region arranged between neighboring sidewalls of the first and second memory cell gates. A silicide contact pad is arranged over a top surface of the first memory cell gate. The silicide contact pad is recessed relative to top surfaces of the dielectric region, the second memory cell gate and the metal gate. A method of manufacturing the integrated circuit is also provided. |
| US09431256B2 |
Semiconductor device and manufacturing method thereof
A method for manufacturing a semiconductor device includes the following steps. At first, two gate stack layers are formed on a semiconductor substrate, wherein each of the gate stack layers includes a top surface and two side surfaces. A conductive material layer is deposited to conformally cover the top surface and the two side surfaces of each of the gate stack layers. Then, a cap layer is deposited to conformally cover the conductive material layer. Finally, the cap layer and the conductive material layer above the top surface of each of the gate stack layers are removed to leave the cap layer adjacent to the two side surfaces of each of the gate stack layers and covering a portion of the conductive material layer. |
| US09431252B2 |
Tunneling field effect transistor (TFET) formed by asymmetric ion implantation and method of making same
An embodiment integrated circuit device and a method of making the same. The embodiment method includes forming a first nitride layer over a gate stack supported by a substrate, implanting germanium ions in the first nitride layer in a direction forming an acute angle with a top surface of the substrate, etching away germanium-implanted portions of the first nitride layer to form a first asymmetric nitride spacer confined to a first side of the gate stack, the first asymmetric nitride spacer protecting a first source/drain region of the substrate from a first ion implantation, and implanting ions in a second source/drain region of the substrate on a second side of the gate stack unprotected by the first asymmetric nitride spacer to form a first source/drain. |
| US09431251B2 |
Semiconductor device having a double deep well and method of manufacturing same
A method of forming a semiconductor device includes patterning a first mask over a substrate defining a first opening. The substrate includes a first dopant type. The method includes implanting ions having a second dopant type through the first opening to form a first deep well. The method includes patterning a second mask over the substrate defining a second opening. The method includes implanting ions having the second dopant type through the second opening to form a second deep well, wherein an energy for implanting ions to form the second deep well is lower than an energy for implanting ions to form the first deep well. The method includes implanting ions having the first dopant type into the substrate to form a first well, wherein the energy for implanting ions to form the second deep well is greater than an energy for implanting ions to form the first well. |
| US09431247B2 |
Method for ion implantation
A method for an ion implantation is provided. First, a non-parallel ion beam is provided. Thereafter, a relative motion between a workpiece and the non-parallel ion beam, so as to enable each region of the workpiece to be implanted by different portions of the non-parallel ion beam successively. Particularly, when at least one three-dimensional structure is located on the upper surface of the workpiece, both the top surface and the side surface of the three-dimensional structure may be implanted properly by the non-parallel ion beam when the workpiece is moved across the non-parallel ion beam one and only one times. Herein, the non-parallel ion beam can be a divergent ion beam or a convergent ion beam (both may be viewed as the integrated divergent beam), also can be generated directly from an ion source or is modified from a parallel ion beam, a divergent ion beam or a convergent ion beam. |
| US09431236B2 |
Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium
A method of manufacturing a semiconductor device includes forming a thin film containing a specific element, oxygen, carbon, and nitrogen by performing a cycle a predetermined number of times. The cycle includes supplying a specific element-containing gas, supplying a carbon-containing gas, supplying an oxidizing gas, and supplying a nitriding gas. The act of supplying the nitriding gas is performed before the act of supplying the specific element-containing gas, and the act of supplying the carbon-containing gas and the act of supplying the oxidizing gas are not performed until the act of supplying the specific element-containing gas is performed. |
| US09431228B2 |
Ion lens for reducing contaminant effects in an ion guide of a mass spectrometer
An ion lens for reducing contaminant effects in an ion guide of a mass spectrometer is provided. The ion lens comprises a structural member comprising an orifice of a given radius, the structural member for supporting the ion lens at an exit region of the ion guide. The ion lens further comprises a conical member extending from the structural member, the conical member being hollow and comprising a given cone angle, and a base of the given radius, a perimeter of the base connected to a perimeter of the orifice. The conical member further comprises an aperture through an apex of the conical member, the aperture for receiving ions there through from the ion guide. |
| US09431227B2 |
Sample transferring apparatus for mass cytometry
In a mass cytometer or mass spectrometer, a sample of elemental tagged particles is transferred from a dispersion to a gas flow through a carrier aerosol spray for atomization and ionization by inductively coupled plasma (ICP) source. The configuration of the sample transfer apparatus allow for total consumption of the sample by passing the sample spray through a deceleration stage to decelerate the spray of particles from its high velocity expansion. Following the deceleration stage, the decelerated sample of particles can be accelerated and focused through an acceleration stage for transferring into the ICP. This effectively improves the particle transfer between the sample spray and the ICP. |
| US09431226B2 |
High-voltage power unit and mass spectrometer using the power unit
An output terminal of a positive voltage generating circuit and an output terminal of a negative voltage generating circuit are connected in series, and an output terminal of the negative voltage generating circuit is connected to a ground via a resistor. A switching circuit and a series connection circuit of resistors are connected in parallel to each other between the output terminals of the positive voltage generating circuit and the negative voltage generating circuit. The switching circuit is on-off driven by a voltage signal taken from a junction point between the resistors, and the switching circuit is on-off driven by a voltage signal taken from a junction point between the resistors. Accordingly, when the polarity of an output voltage is switched, electric charges accumulated up to that point are discharged through the switching circuit of a voltage OFF-side polarity, so that the voltage quickly falls. |
| US09431223B2 |
Imaging mass spectrometry method and device
A method of performing imaging mass spectrometry of a sample. The method comprises performing a first mass analysis of the sample using a first mass analyzer comprising a multi-pixel ion detector to obtain first mass spectral data representative of pixels of the sample. The method further comprises identifying clusters of pixels sharing one or more characteristics of first mass spectral data. The method also comprises performing a second mass analysis of the sample using a second mass analyzer to obtain second mass spectral data at at least one location in each cluster, wherein the number of locations is significantly less than the number of pixels in each cluster, said second mass analysis being of higher resolution than said first mass analysis. Also a mass spectrometry apparatus configured for carrying out the method. |
| US09431222B2 |
Device and method for measuring an energy particle beam
The present invention relates to a dosimetry device for an energy particle beam from a source and including at least two ionization chambers, each of which includes a collector electrode and a polarization electrode, said electrodes in each ionization chamber being separated by a gap including a fluid, an energy beam from a single source passing through said ionization chambers, the device being characterized in that said ionization chambers have different charge collection efficiency factors. Said calculation algorithm for the dose rate deposited by said beam is based on the measurement of an output signal in each ionization chamber of the device and on a □gain□ factor related to a first ionization chamber, said □gain□ factor being theoretically predetermined on the basis of said intrinsic and/or extrinsic parameters of said ionization chambers. |
| US09431219B1 |
Method for making guiding lines with oxidized sidewalls for use in directed self-assembly (DSA) of block copolymers
A method that uses both electron beam (e-beam) lithography and directed self-assembly (DSA) of block copolymers (BCPs) makes guiding lines with oxidized sidewalls for use in subsequent DSA of BCPs. A series of films is deposited on a substrate including a first cross-linked polymer mat layer, a layer of resist, an etch stop layer resistant to oxygen reactive-ion-etching, a second cross-linked polymer mat layer, and an e-beam resist. After patterning and etching the second mat layer, a BCP self-assembles onto the patterned second mat layer and one of the BCP components is removed. Then the second mat layer is etched, using the remaining BCP component as an etch mask. Additional etching steps then create guiding lines of the first mat layer with oxidized sidewalls. The resulting guiding lines have better quality and lower roughness than guiding lines made with just e-beam lithography. |
| US09431216B2 |
ICP source design for plasma uniformity and efficiency enhancement
An ICP A plasma reactor having an enclosure wherein at least part of the ceiling forms a dielectric window. A substrate support is positioned within the enclosure below the dielectric window. An RF power applicator is positioned above the dielectric window to radiate RF power through the dielectric window and into the enclosure. A plurality of gas injectors are distributed uniformly above the substrate support to supply processing gas into the enclosure. A circular baffle is situated inside the enclosure and positioned above the substrate support but below the plraity of gas injectors so as to redirect the flow of the processing gas. |
| US09431206B2 |
X-ray generation tube, X-ray generation device including the X-ray generation tube, and X-ray imaging system
Provided is a high-output X-ray generation tube in which thermal damage to a target is reduced. The X-ray generation tube includes a target, an electron source, and a grid electrode having multiple electron passage apertures disposed between the target and the electron source. A source-side electron beam on the electron source side with respect to the grid electrode has a current density distribution, and the grid electrode has an aperture ratio distribution so that a region of the source-side electron beam in which a current density is largest is aligned with a region of the grid electrode in which an aperture ratio is smallest. |
| US09431204B2 |
Light source with gas discharge lamp
A light source (7) with a gas-discharge lamp includes a control module (16) with a driver circuit, an ignition module (17) for producing a substantially high voltage, and a gas-filled burner (18) in which an electric arc is ignited and maintained between two electrodes (19, 20). The control module (16), ignition module (17), and burner (18) are attached to a mutual support system (21) and combined in a single unit. Lighting equipment (1) for a motor vehicle includes at least one light source (7). |
| US09431203B2 |
Reflowable circuit protection device
A circuit protection device includes a housing, which includes first and second electrodes. The device includes a conductive slider inside the housing. At a first location within the housing, the slider provides an electrical connection between the first and second electrodes. At a second location within the housing, the slider does not provide the electrical connection. A spring is secured to and stretched between the slider and an inner side of the housing such that the spring is held in tension in an expanded state. The slider is held at the first location by a solder between the slider and the first and second electrodes. After the device is armed, detection of an over-temperature condition causes the solder to begin to melt and the spring to compress and pull the slider to the second location within the housing, thus severing the electrical connection between the first and second electrodes. |
| US09431202B2 |
Magnetic trip device of a thermal magnetic circuit breaker having an adjustment element
A magnetic trip device of a thermal magnetic circuit breaker and a thermal magnetic circuit breaker including such a magnetic trip device, and also a method for adjusting a magnetic field area of a magnetic trip device of a thermal magnetic circuit breaker, are disclosed. In at least one embodiment, the magnetic trip device includes at least an armature locator moveable arranged at a pin in order to adjust a magnetic field area, and an armature element fixed on a lower surface of the armature locator in order to interact with a yoke, arranged near a current conductive element for conducting electric energy. The armature locator includes an adjustment element arranged between a spring element and the yoke. The spring element surrounding at least a part of the pin is arranged between the armature element and the yoke. |
| US09431200B2 |
Electromagnetic relay
An electromagnetic relay includes a housing, a fixed contact provided within the housing, a movable contact movable to contact or be separated from the fixed contact, and a driving unit configured to drive the movable contact to be in contact with or separated from the fixed contact, and including a coil, a yoke disposed within the coil and having an inner section for forming a magnetic path inside and outside of the coil, a movable core disposed within the coil to be attractable by the inner section, and a shaft having one end connected to the movable core and another end connected to the movable contact, capable of facilitating an assembling process of a shaft and a movable core by eliminating a welding process. |
| US09431198B2 |
Circuit-breaker pole part with a heat transfer shield
A pole part of a circuit-breaker arrangement having an insulation housing for accommodating a vacuum interrupter insert containing a pair of corresponding electrical switching contacts, wherein a fixed upper electrical contact is connected to an upper electrical terminal molded in the insulation housing and a movable lower electrical contact is connected to a lower electrical terminal of the insulation housing via an electrical conductor which is operated by an adjacent pushrod. The lower electrical terminal is connected to a ring shaped heat transfer shield arranged along the inner wall or at least partly inside the wall of the insulation housing surrounding the pushrod and/or the distal end of the movable lower electrical contact. |
| US09431196B2 |
Switch
A roll for rotating a movable contact of a rotary switch, and a method of mounting a switch are provided. The roll includes a first slot going along the diameter of the roll and open from the top of the roll for receiving the movable contact for contacting with a stationary contact of the rotary switch, and a second slot arranged perpendicular to the first slot for receiving teeth of an upper roll to be mounted together with the roll. |
| US09431194B2 |
Supporting structure of closing resistor for high voltage circuit breaker
The present invention relates to a supporting structure of a closing resistor for a high voltage circuit breaker, capable of stably supporting the closing resistor not to be twisted even by an impact applied upon a closing operation. A supporting structure of a closing resistor for a high voltage circuit breaker according to one embodiment includes a fixed part main circuit conductor, a supporting conductor installed on an upper surface of the fixed part main circuit conductor, a connecting conductor connected to one end of the supporting conductor, a closing resistor unit coupled to one side of the fixed part main circuit conductor in a spaced manner, and a coupling conductor provided to couple the supporting conductor to the closing resistor unit. The supporting conductor and the connecting conductor are provided with a coupling rib and a coupling groove, respectively, to be coupled to each other in an inserting manner. |
| US09431192B2 |
Actuator biased by a horizontal member
An exemplary embodiment of an electrical device is disclosed. The electrical wiring device preferably includes a frame, a rocker, and a resilient member. In use, the rocker pivotally rotates through a range of travel, for example, from a first position to a second position. As the rocker moves, the resilient member imparts a force on the rocker, biasing the rocker in the first position and the second position. In a particularly preferred embodiment, the resilient member extends horizontally across the electrical wiring device (e.g., along a minor axis of the rocker). |
| US09431187B2 |
Switch actuation device
A switch actuation device for use in connection with electrical switch mechanism having an actuatable structure. The device includes an actuation mechanism in operable communication with the actuatable structure for use in urging the actuatable structure of the electrical switch mechanism from a first position to a second position. An actuatable electrical switch arrangement is also disclosed. |
| US09431184B2 |
Circuit breaker
A vacuum interrupter includes a fixed contact and a movable contact; a driving unit including a main shaft and a plurality of links interlocked with the main shaft, to supply a driving force to open and close the vacuum interrupter; a power transmission unit to transmit a driving force of the driving unit to the movable contact; an over-current relay to detect a fault current and to output a trip signal to break a large-scaled current conduction; a trip unit to generate and transmit a mechanical operation force to the driving unit when a trip signal is output from the over-current relay; and a Thomson drive including a Thomson coil and a repulsive plate, to rotate the main shaft to an opening position or to transmit the trip signal to the trip unit, to promptly breaking a fault current. |
| US09431182B2 |
Double contact point switch and a magnetic connector having the double contact point switch
Provided are a double contact point switch and a magnetic connector having the same. The double contact point switch includes: a pin part; an additional terminal part; and an elastic part applying elastic force to the pin part, wherein the pin part includes a front contact point and a rear contact point, the pin part moves rearward when external force is applied to the front contact point of the pin part and again moves forward when the external force of the front contact point disappears, by the elastic part, and the rear contact point contacts the additional terminal part when the pin part moves rearward. As a result of this configuration, it is possible to confirm whether or not a contact of a magnetic connector was made without installing a separate signal terminal in the magnetic connector. |
| US09431181B2 |
Energy storage devices including silicon and graphite
A novel hybrid lithium-ion anode material based on coaxially coated Si shells on vertically aligned carbon nanofiber (CNF) arrays. The unique cup-stacking graphitic microstructure makes the bare vertically aligned CNF array an effective Li+ intercalation medium. Highly reversible Li+ intercalation and extraction were observed at high power rates. More importantly, the highly conductive and mechanically stable CNF core optionally supports a coaxially coated amorphous Si shell which has much higher theoretical specific capacity by forming fully lithiated alloy. Addition of surface effect dominant sites in close proximity to the intercalation medium results in a hybrid device that includes advantages of both batteries and capacitors. |
| US09431180B2 |
Energy storage arrangement
An energy storage arrangement includes at least two rechargeable energy storage devices connected in parallel. A first energy storage device has a plurality of lead-based storage elements, and a second energy storage device has a plurality of lithium-based storage elements. Between charge state limits of 0 to 100% a charge state interval is achieved in which the nominal voltage of the second energy storage device is in a range between the maximum charging voltage and the nominal voltage of the first energy storage device. |
| US09431179B2 |
Solid electrolytic capacitor manufacturing method
A method of manufacturing a solid electrolytic capacitor chip, which includes mounting a solid electrolytic capacitor element on the front surface side of a cathode lead of a lead frame serving as a cathode terminal; electrically connecting an anode and a cathode of the solid electrolytic capacitor element respectively to an anode terminal and the cathode terminal of the lead frame; and injecting an exterior resin from a resin injection port of a mold by transfer molding so as to seal the solid electrolytic capacitor element with the exterior resin. The resin injection port is located such that the exterior resin injected from the injection port branches and flows toward both the front surface side and the rear surface side and of the lead frame. |
| US09431175B2 |
Method of identifying direction of stacking in stacked ceramic capacitor
In a method of identifying a direction of stacking in a stacked ceramic capacitor, while density of magnetic flux generated from a magnetism generation apparatus is measured with a magnetic flux density measurement instrument, a stacked ceramic capacitor is caused to pass between a magnetism generation apparatus and the magnetic flux density measurement instrument and variation in magnetic flux density at least at the time of passage of the stacked ceramic capacitor is measured. Based on a result of measurement of magnetic flux density, a direction in which a plurality of internal electrodes are stacked in the stacked ceramic capacitor is identified. |
| US09431171B2 |
Method for molding powder mold product
The present invention relates to a method for molding a powder mold product according to which a powder mold product of uniform quality can be molded with excellent productivity. The present invention includes the steps of: preparing raw material powder 3 (a preparing step); interposing a mold assembly-use lubricant between an outer circumferential face 12s of a first punch (a lower punch 12) and an inner circumferential face 10s of a die 10, the lower punch 12 and the die 10 in this state being relatively shifted to apply the mold assembly-use lubricant to the inner circumferential face 10s of the die 10 (an applying step); and packing the raw material powder 3 into a cavity, a powder mold product 100 being molded by the raw material powder 3 being pressed (a molding step). In the applying step, while the mold assembly-use lubricant is discharged from a supply port 12i provided to the lower punch 12 and the discharged mold assembly-use lubricant is collected from a drain port 12o provided to the lower punch 12, the mold assembly-use lubricant is applied to the inner circumferential face 10s of the die 10. |
| US09431170B2 |
0.2Ss class special-type high-voltage measuring current transformer
A 0.2Ss class special-type high-voltage measuring current transformer belongs to a field of current transformer. An iron core includes two kinds of “L”-shaped sheets with the same size, wherein a ratio of a long side to a short side of each “L”-shaped sheet is 3:2; a first kind of the “L”-shaped sheets are permalloy sheets (1) and a second kind of the “L”-shaped sheets are cold rolled silicon steel sheets (2); and required windings are wound on each side of the iron core. Sheets of the iron core of the current transformer include the permalloy sheets and the cold rolled silicon steel sheets, which improves performance of the iron core. Utilizing structural characteristics of the iron core of different materials, a fractional turn compensation of coils is formed, which realizes a precise measurement. |
| US09431165B2 |
Inductor
An inductor including: a core having a winding core portion for winding a winding wire and two flange portions disposed on both ends of the winding core portion; and a winding wire wound around the winding core portion for multiple layers, the winding wire including: a forward winding layer having multiple turns on the winding core portion along a forward direction from one of the two flange portions toward the other flange portion; a backward winding layer following the forward winding layer and having at least one turn on the forward winding layer along a backward direction opposite to the forward direction; and a return winding portion following the backward winding layer and passing over the backward winding layer in the forward direction to reach the winding core portion on the forward direction side of the forward winding layer within less than 1/2 turn. |
| US09431164B2 |
High efficiency on-chip 3D transformer structure
A transformer structure includes a first coil having two sections of spiral, with a top section including a plurality of metal layers occupying top X metal layers and a bottom section including a plurality of metal layers occupying bottom Z metal layers, where X and Z represent a number of metal layers having a specific number selected to provide a particular performance of the first coil. A second coil of the transformer is disposed between the two sections of the first coil and includes a plurality of metal layers where Y represents a number of vertically adjacent metal layers, with the specific number chosen to provide the particular performance, such that a sum X+Y+Z represents a total number of vertical metal layers for the transformer structure. |
| US09431163B2 |
Transformer
A transformer includes a first coil spiraling inwardly in a second direction. A second coil spirals along the first coil on the outside relative to the first coil. First and second external electrodes are provided in third and fourth directions relative to a first line passing through a gravity center of the first coil and an outer end thereof, respectively, the third direction being perpendicular to the first line, and the fourth direction being opposite thereto. First and second lead-out conductors are connected to the outer end of the first and the second coil, respectively, and electrically connected to the first and the second external electrodes, respectively. Both coils spiral along each other throughout their lengths. By spiraling in the second direction, the first coil is, at the outer end, oriented in a fourth direction. |
| US09431160B2 |
Superconducting magnet
A superconducting magnet includes a superconducting coil, a helium tank that accommodates the superconducting coil and stores liquid helium therein, a radiation shield that surrounds a periphery of the helium tank, a vacuum vessel that accommodates the radiation shield, an exhaust port that is connected to the helium tank and exhausts gasified helium, a lead that electrically connects an external power supply and the superconducting coil and is attachable to and removable from the vacuum vessel, a connector that connects the lead and the superconducting coil, and a thermal conductive member having one end in contact with at least one of the connector and the exhaust port, and having the other end located outside the vacuum vessel and attachable to and removable from the vacuum vessel. |
| US09431158B2 |
Barrel-shaped fireproof and explosion-proof surge protection device with over-temperature protection function
The invention provides a barrel-shaped fireproof and explosion-proof surge protection device with the function of over-temperature protection, comprising a barrel-shaped housing, a barrel-shaped varistor and a cylindrical temperature protector, wherein the barrel-shaped housing houses the outer wall of the barrel-shaped varistor, the barrel-shaped varistor comprises a barrel-shaped varistor chip, an outer electrode, and an inner electrode, wherein the outer electrode is connected with an outer pin while the inner electrode is connected with an inner pin, the cylindrical temperature protector is arranged in the barrel space of the barrel-shaped varistor and is provided with two leading foots which are led out independently, or one of which is connected with the inner electrode of the barrel-shaped varistor and is led out, or one of which is connected with the inner electrode of the barrel-shaped varistor but is not led out. |
| US09431157B2 |
Conductor cover applicator with spool
Applicators and methods for applying a conductor cover to a cable, the conductor cover being tubular and split longitudinally to define a first longitudinal edge and a second longitudinal edge. The applicator comprises: a structural element; a spool connected to rotate relative to the structural element, the spool being sized to store the conductor cover in a pre-application state where the conductor cover is wrapped one or more times around the spool with the first longitudinal edge and the second longitudinal edge of the conductor cover spread open and perpendicular to a spool axis; and a lock for holding the conductor cover in the pre-application state. |
| US09431156B2 |
Extremely low resistance materials and methods for modifying or creating same
In some implementations of the invention, existing extremely low resistance materials (“ELR materials”) may be modified and/or new ELR materials may be created by enhancing (in the case of existing ELR materials) and/or creating (in the case of new ELR materials) an aperture within the ELR material such that the aperture is maintained at increased temperatures so as not to impede propagation of electrical charge there through. In some implementations of the invention, as long as the propagation of electrical charge through the aperture remains unimpeded, the material should remain in an ELR state; otherwise, as the propagation of electrical charge through the aperture becomes impeded, the ELR material begins to transition into a non-ELR state. |
| US09431154B1 |
Heat resistant self extinguishing communications cable and cord
Heat resistant and flame retardant self-extinguishing cables and cords made with wires containing a special surrounding material used with portable communications equipment that must be able to operate in extremely hostile environments such as a fire so as to allow continual communications. These fire and heat resistant cables and cords are comprised of a special mixture of materials to manufacture a protective element to surround the communication wires. |
| US09431151B2 |
Guarded coaxial cable assembly
A guarded coaxial cable assembly including a micro-coaxial cable and at least one rail. |
| US09431142B2 |
Methods of coating substrates with electrically charged conductive materials, electrically conductive coated substrates, and associated apparatuses
Methods include applying an electric charge to a coating material that includes carbon nanotubes and a carrier, such as paint, and depositing the electrically charged coating material to a substrate. In some methods, the applying includes utilizing an electrostatic sprayer. In some methods, the substrate is isolated from ground during the depositing. In some methods, the substrate is an insulator. Some methods result in regions of carbon nanotubes that are substantially longitudinally aligned after the depositing. Coated substrates may include a coating with carbon nanotubes that are substantially longitudinally aligned and in some examples that are arranged in a zig-zag pattern. Aircraft, spacecraft, land vehicles, marine vehicles, wind turbines, and apparatuses that may be susceptible to lightning strikes or other types of electromagnetic effects and that include a coated substrate also are disclosed. |
| US09431138B2 |
Method of generating specified activities within a target holding device
A method for producing uniform activity targets according to an embodiment of the invention may include arranging a plurality of targets in a holding device having an array of compartments, each target being assigned to a compartment based on a known flux of a reactor core so as to facilitate an appropriate exposure of the targets to the flux based on target placement within the array of compartments. The holding device may be positioned within the reactor core to irradiate the targets. The method may be used to produce brachytherapy and/or radiography targets (e.g., seeds, wafers) in a reactor core such that the targets have relatively uniform activity. |
| US09431136B2 |
Stable startup system for nuclear reactor
A stable startup system includes a reactor vessel containing coolant, a reactor core submerged in the coolant, and a heat exchanger configured to remove heat from the coolant. The stable startup system further includes one or more heaters configured to add heat to the coolant during a startup operation and prior to the reactor core going critical. |
| US09431135B2 |
Nuclear reactor fluence reduction systems and methods
Nuclear fuel assemblies include at least one fluence control structure for use in a nuclear reactor core with other nuclear fuel assemblies. Such flux-limiting assemblies and structures may be positioned outside of or around the other nuclear fuel assemblies in the core so as to reduce neutron flux beyond the fluence controlled nuclear fuel assemblies, and fluence control structures may be positioned at an outside edge of the core. Fluence control structures limit neutron flux with non-fuel materials in structures like fuel rods and inserts, channels, shield curtains, etc. at particular positions in fuel assemblies. An engineer may select and/or install fluence-limiting fuel assemblies with flux-limiting characteristics in cores having neutronics profiles expected to benefit from such flux limitation. |
| US09431133B2 |
Digital test system
A highly flexible, compact, lightweight, and portable testing system for use with radiation testing activities. The testing system is coupled to a device under test (DUT), which can be positioned in such a way that the top of the die package is exposed to the direct ion beam during radiation testing. A variety of sensors, onboard memory systems, programmable interfaces, onboard control systems, data output devices, and different types of interfaces are also provided which provide an ability to perform testing procedures while having a maximum ability to orient the DUT and perform a wide variety of testing currently unavailable. |
| US09431123B2 |
Method controlling read sequence of nonvolatile memory device and memory system performing same
To control a read sequence of a nonvolatile memory device, a plurality of read sequences are set and the read sequences respectively correspond to operating conditions different from each other. The read sequences are performed selectively based on sequence selection rates respectively corresponding to the read sequences. Read latencies of the respective read sequences are monitored and the sequence selection rates are adjusted based on monitoring results of the read latencies. |
| US09431118B1 |
System, method and computer program product for processing read threshold information and for reading a flash memory module
A method comprising: generating or receiving read threshold information indicative of multiple read thresholds values that were applied when reading multiple flash memory cells that belong to multiple rows of a flash memory module; and generating a compressed representation of reference read thresholds to be applied during future read operations of the flash memory cells in response to the read threshold information. |
| US09431115B2 |
Erase system and method of nonvolatile memory device
An erase system and method of a nonvolatile memory device includes supplying an erase voltage to a plurality of memory cells of a nonvolatile memory, performing a read operation with a read voltage to word lines of the plurality of memory cells, and performing an erase verification operation with an erase verification voltage to at least one of the word lines of the plurality of memory cells, the erase verification voltage lower than the read voltage. |
| US09431114B2 |
Semiconductor device and method of operating the same using state code
A method of operating a semiconductor device includes dividing an operation of the semiconductor device into a plurality of periods, and determining a plurality of state codes respectively corresponding to the periods; performing the operation according to a received command; when a pause command is received, pausing the operation and storing a state code of the plurality of state codes corresponding to a paused period among the plurality of periods; and performing the operation starting from a period determined according to the stored state code when a resumption command is received. |
| US09431107B2 |
Memory devices and methods of manufacture thereof
Memory devices and methods of manufacture thereof are disclosed. In one embodiment, a memory device includes a transistor having a gate disposed over a workpiece. The transistor includes a source region and a drain region disposed in the workpiece proximate the gate. The memory device includes an erase gate having a tip portion that extends towards the workpiece. The erase gate is coupled to the gate of the transistor. |
| US09431104B2 |
Reconfigurable circuit and method of programming the same
A reconfigurable circuit according to an embodiment includes: first wiring lines; second wiring lines crossing the first wiring lines; resistive change elements disposed in intersection regions of the first and second wiring lines, each of the resistive change elements including a first terminal connected to the one of the first wiring lines and a second terminal connected to the one of the second wiring lines, and being switchable between a low-resistance state and a high-resistance state; a first control circuit controlling a voltage to be applied to the first wiring lines; a second control circuit controlling a voltage to be applied to the second wiring lines; and current limiting elements corresponding to the second wiring lines, and controlling current flowing through the resistive change elements connected to the corresponding second wiring line. |
| US09431102B2 |
Apparatus and method for reading a phase-change memory cell
An apparatus and a method of reading a phase-change memory cell are described. A circuit includes a current ramp circuit. A current forcing module is coupled to the current ramp circuit. A selector device emulation circuit is coupled to the current forcing module by a voltage adder. The voltage adder is to sum an output from the selector device emulation circuit and a high impedance voltage source. A method includes forcing a current ramp into both a bitline and a dummy bitline, the dummy bitline having a voltage. The method also includes triggering a comparator when the current ramp provides a storage voltage with a predefined value, the storage voltage is associated with the phase-change memory cell, and the predefined value is independent from a resistance value of the phase-change memory cell and is added in series to the voltage of the dummy bitline. Other apparatuses and methods are disclosed. |
| US09431100B1 |
Device and method for storing or switching
A method for storing or switching. The method comprises: arranging a first layer including a first molecular network having a first 2D lattice structure and a second layer including a second molecular network having a second 2D lattice structure at a distance from each other such that the first and the second molecular network interact electronically via molecular orbital interactions, and rotating the first layer relative to the second layer by a rotation angle with a rotation device, wherein an electrical resistance between the first molecular network and the second molecular network changes as a function of the rotation angle, thereby storing information by switching the electrical resistance. |
| US09431095B1 |
High-density integrated circuit memory
A memory circuit includes an input stage having N input ports and N output ports, wherein N is an integer greater than one. The memory circuit further includes an N:1 port multiplexer coupled to the N output ports of the input stage and configured to time division multiplex the N output ports to one multiplexed port. The memory circuit also includes a random access memory matrix and a 1:N port multiplexer. The memory circuit is coupled to the multiplexed port. The 1:N port multiplexer is coupled to the random access memory matrix and is configured to de-multiplex signals received from the random access memory matrix into N output ports. |
| US09431084B2 |
Determining and storing bit error rate relationships in spin transfer torque magnetoresistive random-access memory (STT-MRAM)
Systems and methods to manage memory on a spin transfer torque magnetoresistive random-access memory (STT-MRAM) are provided. A particular method may include determining a performance characteristic using relationship information that relates a bit error rate to at least one of a programming pulse width, a temperature, a history-based predictive performance parameter, a coding scheme, and a voltage level also associated with a memory. The performance characteristic is stored and used to manage a write operation associated with the memory. |
| US09431082B2 |
Magneto-electronic component, and method for the production thereof
A magneto-electronic component, having one or more elongate elements of a magnetic material, electrically conductive contacts, at least one insulating thin layer, on which the one or more elongate elements of the magnetic material and the electrically conductive contacts are arranged, and an additional insulating thin layer structured and arranged to cover at least the one or more elongate elements and partially cover the electrically conductive contacts to form an arrangement. At least the one or more elongate elements is connected to the contacts and the contacts are connectable to a current source in an electrically conducting manner. The arrangement is jointly rolled-up to form a rolled-up arrangement having a rolled-up region. At least the electrically conductive contacts are partially located outside the rolled-up region of the rolled-up arrangement. |
| US09431076B2 |
Memory system, semiconductor device and methods of operating the same
A memory system, a semiconductor memory device and methods of operating the same may perform a read operation on the basis of flag data stored in a flag register, without reading the flag data stored in a memory array, when performing the read operation, so that a time taken for the read operation may be reduced. |
| US09431075B2 |
Memory macro configuration and method
A memory macro comprises a plurality of memory array segments, each having a predetermined number of data inputs and outputs. A segment decoder circuit is configured to: receive a first value indicating a number of memory partitions among which the memory array segments are to be divided, and output a plurality of signals for selectively activating one or more of the plurality of memory array segments to be accessed based on the first value. A plurality of output drivers are coupled to the segment decoder circuit and to respective ones of the outputs. The plurality of output drivers are configured to selectively output data from the respective outputs of each of the respective activated memory array segments. |
| US09431074B2 |
Shiftable memory supporting bimodal storage
A shiftable memory supporting bimodal data storage includes a memory having built-in shifting capability to shift a contiguous subset of data stored in the memory from a first location to a second location within the memory. The shiftable memory further includes a bimodal data storage operator to operate on a data structure comprising the contiguous subset of data words and to provide in-place insertion of a data value using the built-in shifting capability. |
| US09431073B2 |
Low power memory device
A memory device includes a memory cell unit, a bit line unit and a buffering unit. The memory cell unit includes a plurality of memory cell groups. Each memory cell group includes at least one memory cell for storing data therein. The bit line unit includes a plurality of first bit lines each coupled to the at least one memory cell of a respective memory cell group, and a second bit line for transmitting to-be-read data. The buffering unit includes a plurality of two-state buffers. Each two-state buffer has an input terminal coupled to a respective first bit line, and an output terminal coupled to the second bit line. The memory device does not require a sense amplifier, and thus consumes relatively small power. The memory device can operate at a relatively high frequency when properly configured. |
| US09431071B2 |
Bit-line sense amplifier capable of compensating mismatch between transistors, and semiconductor memory device including the same
A bit-line sense amplifier may include a pull-up driving circuit, a pull-down driving circuit and a latch-type sense amplifier. The pull-up driving circuit including a plurality of PMOS transistors connected between a power supply voltage line and a first driving power supply line, and may be configured to provide a first driving current on the first driving power supply line in response to an up control signal. The pull-down driving circuit may be configured to provide a second driving current on a second driving power supply line in response to a down control signal. The latch-type sense amplifier may be connected between the first driving power supply line and the second driving power supply line, and may be configured to sense and amplify a voltage difference between a bit line and a complementary bit line. |
| US09431068B2 |
Dynamic random access memory (DRAM) with low variation transistor peripheral circuits
A dynamic random access memory (DRAM) can include at least one DRAM cell array, comprising a plurality of DRAM cells, each including a storage capacitor and access transistor; a body bias control circuit configured to generate body bias voltage from a bias supply voltage, the body bias voltage being different from power supply voltages of the DRAM; and peripheral circuits formed in the same substrate as the at least one DRAM array, the peripheral circuits comprising deeply depleted channel (DDC) transistors having bodies coupled to receive the body bias voltage, each DDC transistor having a screening region of a first conductivity type formed below a substantially undoped channel region. |
| US09431067B2 |
Volatile memory backup system including all-solid-state battery
The present invention provides a volatile memory backup system including an all-solid-state battery. The backup system includes a volatile memory, a nonvolatile memory connected to the volatile memory so as to transfer data therebetween, an all-solid-state battery connected to the volatile memory and the nonvolatile memory, the battery continuously or intermittently supplying a current to the volatile memory during a power failure to retain data in the volatile memory, and a controller connected in parallel with the battery, the controller intermittently supplying a peak current to the volatile memory during the power failure and intermittently transferring divided volumes of data in the volatile memory to the nonvolatile memory by the peak current and a current from the battery temporarily increased in association with the peak current to store the data in the nonvolatile memory, thereby gradually accumulating the data in the volatile memory into the nonvolatile memory. |
| US09431063B2 |
Stacked memory having same timing domain read data and redundancy
A stacked memory is disclosed including a first integrated circuit memory chip having first storage locations and a second integrated circuit memory chip disposed in a stacked relationship with the first integrated circuit memory chip. The second integrated circuit memory chip has second storage locations. Redundant storage is provided including a first storage area dedicated to storing failure address information of failure address locations in the first or second integrated circuit memory chips. The redundant storage includes a second storage area dedicated to storing data corresponding to the failure address locations. Matching logic matches incoming data transfer addresses to the stored failure address information. |
| US09431061B1 |
Data write deferral during hostile events
Technology is disclosed for deferring storage operations (e.g., writes or reads) during hostile events. When a data storage device experiences a hostile event, e.g., a vibration, shock, etc. contact by a head of the data storage device with a disk surface can cause errors or indeed damage. The technology can cause a data storage device to suspend storage operations until the hostile event is no longer detected. |
| US09431059B2 |
Information processing method and electronic device thereof
An information processing method applied in an electric device is disclosed. The method comprises: acquiring at least one play parameter for characterizing a playing history of a first video from the network side and/or a storage unit of an electric device; generating and displaying a play progress bar corresponding to the first video on a display unit of the electric device based on the at least one play parameter, wherein the play progress bar has at least a first portion displayed in a first pattern and a second portion displayed in a second pattern different from the first pattern. Such solution provided by the invention provides a new display approach for the play progress bar, and addresses the technical problem that a video can only be segmented or prompted by the play progress bar of the video according to the content of the video. This new display method of the play progress bar does not depend on the content of the video itself and may reflect intuitively how much the user who once played a video is interested in different segments of the video. |
| US09431058B2 |
Video playing system and method thereof, and computer-readable recording medium
A video playing system and a method thereof are described. When the video playing system randomly plays sections of a multimedia video, it can control scheduled events in-between so as to ensure the user does not miss important events when an important blocking effect exists in the multimedia video schedule. During the random playing of the multimedia video, the video playing system will detect the scheduled event(s) between an original playing position and a new playing position. Then, the video playing system will execute the earliest scheduled event between the original playing position and the new playing position, or execute all of the scheduled events in sequence. |
| US09431057B2 |
Media Production application
Some embodiments provide a media production application. The application receives a script of a media project and parses the script to identify (i) story sections of the media project and (ii) characters in the media project. The application automatically creates data structures for the story sections and the characters, and associations between the story sections and the characters. The application receives several different types of data related to production of a media project and automatically schedules production activities for the media project based on the different types of data. For each location at which one or more story sections will be filmed, the application receives a photo of the location. The application displays a graphical outline of the media project in which each story section is represented by a thumbnail of the photo of the location at which the story section will be filmed. |
| US09431056B2 |
Selective shingled magnetic recording scheme
A selective band management scheme for storage devices is disclosed that may be used in connection with shingled magnetic recording (SMR). SMR uses bands consisting of tracks separated by guard regions. The replacement of a defective sector may be attained by selecting a suitable guard region and by displacing the selected guard region onto the physical location of the defective sector. The boundaries of the bands may be shifted. The portion of the disk surface that is necessary for the guard regions may simultaneously function as a spare sector area for defective sectors without additional space requirements. In at least one embodiment, guard regions are selectively placed onto tracks with an elevated number of primary defects by means of an optimization algorithm. |
| US09431055B2 |
Localized dispersed storage memory system
A method includes a processing module receiving data to store and determining error coding dispersal storage function parameters based on an error profile of one or more hard drives. The method continues with the processing module encoding at least a portion of the data in accordance with the error coding dispersal storage function parameters to produce a set of data slices. The method continues with the processing module defining addressable storage sectors within the one or more hard drives based on a number of data slices within the set of data slices to produce a set of addressable storage sectors. The method continues with the processing module storing data slices of the set of data slices in corresponding addressable storage sectors of the set of addressable storage sectors. |
| US09431052B2 |
Two dimensional magnetic recording systems, devices and methods
The present disclosure describes systems and techniques relating to storage devices, such as storage devices that employ Two Dimensional Magnetic Recording (TDMR). According to an aspect of the described systems and techniques, a device includes: a first read channel to process a first input signal obtained from a Two Dimensional Magnetic Recording (TDMR) storage medium using a first read head, wherein the first read channel includes a first analog to digital converter (ADC); a second read channel to process a second input signal obtained from the TDMR, storage medium using a second read head, wherein the second read channel includes a second ADC; and a single digital timing loop (DTL) for both the first read channel and the second read channel, wherein the single DTL is configured to control interpolation of timing of sampling for the first and second ADCs. |
| US09431050B1 |
Preamplifier common-mode noise rejection for two-dimensional magnetic recording
An apparatus for two-dimensional magnetic recording includes an array reader with a number of magnetoresistive read sensors configured to read data from a storage medium. The magnetoresistive read sensors have a number of connection terminals, with at least one of the connection terminals being shared by more than one of the magnetoresistive read sensors. The apparatus also includes a number of low-noise amplifiers connected to the connection terminals, each configured to amplify a differential signal from a different one of the magnetoresistive read sensors. The apparatus also includes a number of impedance balancing networks connected to a subset of the connection terminals. |
| US09431043B2 |
Integrated compound DBR laser for HAMR applications
Embodiments disclosed herein generally relate to a magnetic write head including a media facing surface and a surface opposite the media facing surface. The magnetic write head further includes a reflector extending from the surface opposite the media facing surface toward the media facing surface. A semiconductor laser diode gain region protrudes out of the surface opposite the media facing surface, and the reflector helps optimizing the optical energy generated in the semiconductor laser diode gain region to be a single mode over a large current and temperature range. |
| US09431042B2 |
Balanced multi-trace transmission in a hard disk drive flexure
Various embodiments concern a flexure comprising a base metal layer. The base metal layer can have a void between a first lateral side and a second lateral side. The flexure can further comprise a plurality of traces in an array. The plurality of traces can extend over the void and between the first and second lateral sides. The plurality of traces can comprise a pair of outer traces respectively located on lateral ends of the array and at least one inner trace between the pair of outer traces. The plurality of traces and the first and second lateral sides can be spaced relative to each other such that adjacent traces of the plurality of traces capacitively couple to each other and the pair of outer traces capacitively couple with each other through the first and second lateral sides. |
| US09431040B1 |
Magnetic recording transducer
A magnetic recording transducer comprises a magnetoresistive sensor having a left side, a right side opposite to the left side, a left junction angle at the left side, a right junction angle at the right side, and a track width. The right junction angle and the left junction angle are characterized by a junction angle difference of not more than six degrees. The track width is less than one hundred nanometers. The magnetic recording transducer further comprises a left hard bias structure residing adjacent to the left side of the magnetoresistive sensor, and a right hard bias structure residing adjacent to the right side of the magnetoresistive sensor. |
| US09431035B2 |
Method of shaping a trailing edge of a slider
A slider comprising a body having an air bearing surface (ABS), wherein the ABS extends between a leading edge and a trailing edge of the body. The slider comprises a transducer supported by the body and positioned near the trailing edge, wherein the transducer comprises a pole tip partially extending from the body. The slider comprises a surface defined in the body and forming the trailing edge, wherein the surface comprises a plurality of segments. A first segment of the plurality of segments extends from the ABS and is offset from a portion of the pole tip recessed within the body. The first segment is offset from the pole tip portion by a lesser extent than any other of the plurality of segments. |
| US09431026B2 |
Time warp activation signal provider, audio signal encoder, method for providing a time warp activation signal, method for encoding an audio signal and computer programs
An audio encoder has a window function controller, a windower, a time warper with a final quality check functionality, a time/frequency converter, a TNS stage or a quantizer encoder, the window function controller, the time warper, the TNS stage or an additional noise filling analyzer are controlled by signal analysis results obtained by a time warp analyzer or a signal classifier. Furthermore, a decoder applies a noise filling operation using a manipulated noise filling estimate depending on a harmonic or speech characteristic of the audio signal. |
| US09431022B2 |
Semiconductor device and voice communication device
A semiconductor device for realizing higher-precision noise elimination includes: a decoder which decodes an encoded input signal; a determining unit which determines whether or not a voice signal is included in the input signal; a suppressor which performs a suppressing process for suppressing a noise component included in the input signal on the basis of a result of determination by the determining unit; and a first storage for storing, as a determination criterion value used for the determination, a first criterion value which specifies the proportion of a voice signal with respect to voice distortion noise. |
| US09431020B2 |
Methods for improving high frequency reconstruction
The present invention proposes a new method and a new apparatus for enhancement of audio source coding systems utilizing high frequency reconstruction (HFR). It utilizes a detection mechanism on the encoder side to assess what parts of the spectrum will not be correctly reproduced by the HFR method in the decoder. Information on this is efficiently coded and sent to the decoder, where it is combined with the output of the HFR unit. |
| US09431016B2 |
Tamper-resistant element for use in speaker recognition
A tamper-resistant element for use in speaker recognition, the tamper-resistant element being adapted for storing data representing speaker information based on speaker recognition enrollment data and for checking whether information based on a speaker recognition testing signal matches the speaker information. The tamper-resistant element is also adapted for carrying out a data integrity check. Also, a system including such a tamper-resistant element and method for speaker recognition. |
| US09431012B2 |
Post processing of natural language automatic speech recognition
A post-processing speech system includes a natural language-based speech recognition system that compares a spoken utterance to a natural language vocabulary that includes words used to generate a natural language speech recognition result. A master conversation module engine compares the natural language speech recognition result to domain specific words and phrases. A voting engine selects a word or a phrase from the domain specific words and phrases that is transmitted to an application control system. The application control system transmits one or more control signals that are used to control an internal or an external device or an internal or an external process. |
| US09431006B2 |
Methods and apparatuses for automatic speech recognition
Exemplary embodiments of methods and apparatuses for automatic speech recognition are described. First model parameters associated with a first representation of an input signal are generated. The first representation of the input signal is a discrete parameter representation. Second model parameters associated with a second representation of the input signal are generated. The second representation of the input signal includes a continuous parameter representation of residuals of the input signal. The first representation of the input signal includes discrete parameters representing first portions of the input signal. The second representation includes discrete parameters representing second portions of the input signal that are smaller than the first portions. Third model parameters are generated to couple the first representation of the input signal with the second representation of the input signal. The first representation and the second representation of the input signal are mapped into a vector space. |
| US09431005B2 |
System and method for supplemental speech recognition by identified idle resources
Disclosed herein are systems, methods, and computer-readable storage media for improving automatic speech recognition performance. A system practicing the method identifies idle speech recognition resources and establishes a supplemental speech recognizer on the idle resources based on overall speech recognition demand. The supplemental speech recognizer can differ from a main speech recognizer, and, along with the main speech recognizer, can be associated with a particular speaker. The system performs speech recognition on speech received from the particular speaker in parallel with the main speech recognizer and the supplemental speech recognizer and combines results from the main and supplemental speech recognizer. The system recognizes the received speech based on the combined results. The system can use beam adjustment in place of or in combination with a supplemental speech recognizer. A scheduling algorithm can tailor a particular combination of speech recognition resources and release the supplemental speech recognizer based on increased demand. |
| US09431003B1 |
Imbuing artificial intelligence systems with idiomatic traits
Speech traits of an entity imbue an artificial intelligence system with idiomatic traits of persons from a particular category. Electronic units of speech are collected from an electronic stream of speech that is generated by a first entity. Tokens from the electronic stream of speech are identified, where each token identifies a particular electronic unit of speech from the electronic stream of speech, and where identification of the tokens is semantic-free. Nodes in a first speech graph are populated with the tokens to develop a first speech graph having a first shape. The first shape is matched to a second shape of a second speech graph from a second entity in a known category. The first entity is assigned to the known category, and synthetic speech generated by an artificial intelligence system is modified based on the first entity being assigned to the known category. |
| US09431000B2 |
Vehicle wheel
A vehicle wheel includes an additional air chamber member on an outer circumferential surface of a well functioning as a Helmholtz resonator in a tire air chamber. The additional air chamber includes a body including an additional air chamber and a communication through hole for communication between the additional air chamber with a tire air chamber, and a fastening part for fastening the body between the first vertical wall surface and the second vertical wall surface. An upper surface of the body inclines to have an upward slope from a side of the first vertical wall surface to a side of the second vertical wall surface. The upper surface of the body is formed to extend along and inside or outside in a wheel diametrical direction a line connecting from the top of the vertical wall to the top of the hump on the side of the second vertical wall. |
| US09430997B2 |
Interactive instruments and other striking objects
Systems, methods, and devices for providing interactive striking objects (e.g., drumsticks) and performing actions in response to striking motions of the striking objects are disclosed. In some embodiments, the systems and methods provide an interactive drumstick, which includes a lighting display located at a tip portion of the interactive drumstick, a motion detector contained at least partially within the drumstick, a processor and memory contained at least partially within the drumstick, and an interactive system stored within the memory of the drumstick. The interactive system includes a striking motion module that determines striking motions of the drumstick with respect to a virtual percussion instrument based on accessing information measured by the motion detector, and a display module that causes the lighting display to present a certain type of illumination based on the striking motions determined by the striking motion module. |
| US09430996B2 |
Non-fourier spectral analysis for editing and visual display of music
System and method for identifying tones present in a short segment of digitized music stream, and for reporting simultaneously and quantitatively their respective magnitude and phase in near real time. Also captured are pitch deviations from the nominal tones of a predetermined music scale. The resulting spectral data can be scrolled manually from frame to frame to facilitate detail music evaluation and editing. The apparatus can also operate at real time to display notes being played, or to tone-activate audio-visual music enhancement and display with automatic synchronization. |
| US09430994B2 |
Guitar neck joint
A neck joint for guitars providing a secure joint with tight mechanical bonding that can be removable and maintainable. It is configurable so that it is adjustable in two directions to accommodate variations in string height and neck angle. |
| US09430993B2 |
Keyboard lid opening and closing apparatus and keyboard instrument
The present invention includes a keyboard lid which is constituted by a front lid and a rear lid whose lengths in the front-rear direction of a keyboard section provided in an instrument case are different from each other being foldably connected to each other by a coupling member, and openably and closably covers the keyboard section; a rotary fulcrum section which supports the rear end portion of the rear lid such that the rear lid is rotatable with respect to the instrument case, and by which the keyboard lid is mountain-folded and the front lid is held upright above the rear portion of the keyboard section when the keyboard lid exposes the keyboard section; and a guide section which guides the front end portion of the front lid in the front-rear direction of the keyboard section. Accordingly, the keyboard lid can be stably and smoothly opened or closed. |
| US09430989B2 |
Image display control apparatus, image display apparatus, non-transitory computer readable medium, and image display method for displaying images on a divided display
An image display control apparatus includes a division unit and a display controller. The division unit divides a rectangular display area into plural rectangular sub-areas in a direction in which one side of the display area extends. The display controller performs display control to enlarge or reduce rectangular images so that while aspect ratios of the images are maintained, a length of each of the sub-areas in the direction in which the one side of the display area extends is equal to or substantially equal to a length of each of the images in the direction in which the one side of the display area extends, and to display at least some of the enlarged or reduced images in the sub-areas. |
| US09430988B1 |
Mobile device with low-emission mode
A mobile electronic device is disclosed with a low emission mode that limits the emission of light from the display to frequency ranges that have low reflection off of human skin. The display may be limited to images and text displayed in a red color. The low emission mode may also prevent sound from the mobile electronic device and allow text based sending and receiving of information in a low lit environment with minimal or no disturbance to users around the user of the mobile electronic device. |
| US09430983B2 |
Power reduction technique for digital display panel with point to point intra panel interface
A system and method are disclosed to control the power consumption of column drivers in a display system. A video input signal is received which has an active video period and a vertical blanking period between frames. A timing controller transmits a first video frame to a column driver. The timing controller transmits a column driver disable command during a vertical blanking period. Prior to the subsequent active video period, the timing controller transmits a column driver enable command. The timing controller proceeds to transmit a second video frame to the column driver. In one embodiment, the timing controller determines whether to disable and enable the column driver based on a refresh rate, the refresh rate calculated by the timing controller from the video input signal. |
| US09430977B2 |
Video signal processing circuit, video display device, and video signal processing method
The video signal processing circuit which analyzes video signals inputted from outside, performs conversion processing for image quality adjustment on the video signals based on a result of analysis, transmits those towards a video display unit includes: a feature value/maximum value calculation module which calculates a feature value that is a numerical value showing a degree of brightness of the video signals; a gradation conversion threshold value calculation module which calculates a threshold value regarding conversion of the gradation based on a threshold value calculation expression that is formed based on the feature value and a conversion coefficient set in advance; and a gradation conversion module which performs gradation conversion based on a linear function that increases linearly by taking a region of the gradation equal to or higher than the threshold value among the video signals as a target. |
| US09430975B2 |
Array substrate and the liquid crystal panel
An array substrate and a liquid crystal panel are disclosed. Each of the pixel cells of the array substrate includes at least two pixel electrodes and at least two switch circuits. The first pixel electrode connects to the corresponding scanning line and corresponding data line of the pixel cell via the first switch circuit. The second pixel electrode connects to the corresponding scanning line of the pixel cell via the second switch circuit. The second pixel electrode connects to the first switch circuit at least via the second switch circuit such that the second pixel electrode is connected to the corresponding data line of the pixel cell. In this way, the color distortion in wide viewing angle and the display performance are enhanced. |
| US09430974B2 |
Multi-primary display with spectrally adapted back-illumination
Some embodiments of the invention provide a device, system and method for displaying a color image. According to some exemplary embodiments of the invention a device for displaying a color image may include an illumination source including a plurality of light-producing elements able to produce light of each of m different wavelength spectra, wherein m is equal to or greater than three. The device may also include an array of attenuating elements able to spatially selectively attenuate the light produced by the illumination source according to an attenuation pattern corresponding to a gray-level representation of the color image, and an array of color sub-pixel filter elements able to receive selectively attenuated light from the array of attenuating elements, each sub-pixel filter element able to transmit light of one of n different primary colors, wherein n is equal to or greater than four. |
| US09430964B2 |
Organic light emitting display device and method for driving the same
Disclosed is an organic light emitting display device and a method for driving the same to prevent luminance variations caused by degradation variations, and to prevent picture quality from being deteriorated by residual images caused by the luminance variations. The device includes a display panel having a plurality of sub-pixels, each sub-pixel having an organic light emitting diode; a memory which stores accumulated data of each sub-pixel therein; and a panel driver which accumulates input data of each sub-pixel every accumulation period, stores the accumulated data in the memory, generates a degradation compensation gain value of each sub-pixel, generates modulated data of each sub-pixel by modulating the input data of each sub-pixel in accordance with the degradation compensation gain value of each sub-pixel, converts the modulated data into the data voltage, and supplies the data voltage to each sub-pixel. |
| US09430961B2 |
Data driver
A data driver is disclosed. The data driver includes a first latch unit including a plurality of first latches configured to store data, a selector configured to select and/or output data in two or more first latches, a level shifter unit configured to convert a voltage level of the data in the two or more selected first latches and output the voltage level-converted data, and a second latch unit including a plurality of second latches configured to store the voltage level-converted data. |
| US09430958B2 |
System and methods for extracting correlation curves for an organic light emitting device
A system and method for determining and applying characterization correlation curves for aging effects on an organic light organic light emitting device (OLED) based pixel is disclosed. A first stress condition is applied to a reference pixel having a drive transistor and an OLED. An output voltage based on a reference current is measured periodically to determine an electrical characteristic of the reference pixel under the first predetermined stress condition. The luminance of the reference pixel is measured periodically to determine an optical characteristic of the reference pixel. A characterization correlation curve corresponding to the first stress condition including the determined electrical and optical characteristic of the reference pixel is stored. The stress condition of an active pixel is determined and a compensation voltage is determined by correlating the stress condition of the active pixel with curves of the predetermined stress conditions. |
| US09430952B2 |
Determining comprehensiveness of question paper given syllabus
A mechanism is provided in a data processing system for determining comprehensiveness of a question paper given a syllabus of topics. An answer and evidence generator of a question answering system executing on the data processing system finds one or more answers based on the syllabus of topics for each question in the question paper. The answer and evidence generator identifies evidence for the one or more answers in the syllabus for each question in the question paper. A concept identifier of the question answering system identifies a set of concepts in the syllabus corresponding to the evidence for each question in the question paper to form a plurality of sets of concepts. The mechanism determines a value for a comprehensiveness metric for the question paper with respect to the syllabus of topics based on the plurality of sets of concepts. |
| US09430950B2 |
Transportation vehicle system and charging method for the transportation vehicle system
A plurality of transportation vehicles travel with power from an energy storage member along a predetermined travel route under control of a ground controller. A charging area having charging equipment for charging the energy storage member of the transportation vehicle is provided in the travel route, and the transportation vehicles report a position and remaining capacity of the energy storage member to the ground controller. The ground controller controls a transportation vehicle having remaining capacity of a threshold value or less to travel to the charging area for charging the energy storage member, and controls transportation vehicles in the charging area to travel to positions outside the charging area in accordance with transportation requests. |
| US09430939B2 |
System and method for providing an in-vehicle transmitter having multi-colored LED
A wireless control system for wireless control of a remote electronic system is configured to provide information to a user using a multi-colored LED. The system includes a transmitter circuit configured to transmit a wireless control signal having control data which will control the remote electronic system, a multi-colored light emitting diode display configured to provide an indication of a state of the wireless control system, and a control circuit coupled to the trainable transmitter circuit configured to transmit the wireless control signal through the trainable transmitter circuit based on the state of the wireless control system. |
| US09430938B2 |
Monitoring device with selectable wireless communication
One or more sensors are coupled to a monitoring device which has a unique user ID. The one or more sensors acquire user information selected from of at least one of, a user's activities, behaviors and habit information. ID circuitry including ID storage, a communication system that reads and transmits the unique ID from an ID storage, a power source and a pathway system to route signals through the circuitry is at the monitoring device. A multi-protocol wireless controller coupled to one or more wireless interfaces is at the monitoring device and characterizes available networks to determine current network information. A wireless connectivity assistant is at the monitoring device and selects one of the available networks based on the current network information and at least one of user preferences, application requirements and system information. A telemetry system is in communication with the monitoring device. |
| US09430930B2 |
Device having a moisture sensor
Described herein is a device including a collection element having a base with an upper surface surrounded by one or more raised edges near a perimeter of the base, the upper surface having a concavity. The device has a sensor positioned in fluid communication with the concavity in the upper surface of the base. The sensor is configured to detect moisture and to trigger a notification of a user that moisture has been detected by the sensor. The user can be remote from the device and the notification triggered of the moisture detected can be sent remotely to the user. Related apparatus, system, methods and/or articles are described. |
| US09430927B2 |
Environmental detection sound system
An environmental detection sound system includes a wireless communications unit, a system chip wirelessly communicating to an external operation device; an audio compilation unit, an output unit, a detector module and a data processing unit; wherein the system chip receives a control signal and a sound source signal, converts the sound source signal to a programming audio signal and then outputs the programming audio signal; the audio compilation unit receives the programming audio signal, converts the programming audio signal to an audio signal, and then outputs the audio signal; the output unit receives and plays back the audio signal; the detector module detects an environment and outputs a detection value; the data processing unit receives the detection value and produces a warning audio and a warning message to remind listeners to timely improve environmental conditions when the detection value exceeds a standard value, so as to maintain safety and health. |
| US09430926B2 |
Rescue time tracker
This document relates to systems and techniques for providing response to emergency situations, such as traffic accidents, cardiac arrest, or other medical emergencies. |
| US09430915B2 |
Gaming system, gaming device and method including a community trail game
In various embodiments, the gaming system, gaming device, and gaming method disclosed herein provides a community game having a trail or path. The community game enables a plurality of players to each simultaneously pick one or more directions of movement along the trail or path (i.e., pick or designate a destination position which that player wants to move to). If the picked directions of movement for more than one player result in more than one player each designating the same destination position, the gaming system determines which player is moved to the designated destination position (and is provided a displayed award or outcome associated with that position) and which player is moved to an alternative position (and is provided a displayed award or outcome associated with that alternative position). |
| US09430913B2 |
Gaming system and method providing a slot game and enabling accumulation of graphical image symbols
Various embodiments of the present disclosure provide a gaming system and method providing a slot game and enabling accumulation of graphical image symbols. Generally, in various embodiments, the gaming system enables a player to accumulate graphical image symbols during play of the slot game and, when a complete set of the graphical image symbols is accumulated such that a graphical image associated with that complete set is displayed, provides a feature to the player. The gaming system of the present disclosure thus encourages players to continue play of the slot game to attempt to accumulate a complete set of the graphical image symbols such that the gaming system provides the feature. |
| US09430911B2 |
Gaming system and a method of gaming
A gaming method and system, the method comprising providing one or more reels in a spinning reel game, the reels being displayed as three dimensional and displayed as provided with game symbols along and around the reels, displaying spinning of the reels and thereby sequentially displaying at least some of the game symbols displayed as provided along the reels, displaying rotating of the reels and thereby sequentially displaying at least some of the game symbols displayed as provided around the reels, stopping the spinning and the rotating of each of the reels at a respective stop position, and determining a game outcome based on at least some of the game symbols displayed when each of the reels is in its respective stop position. |
| US09430910B2 |
Lottery system and methods thereof
The invention relates to a system and methods of conducting a lottery, the system comprising a gaming server in communication with a wireless communication device associated with a wireless network, wherein the gaming server in response to receiving a request from a lottery subscriber, generates chance units by debiting an amount from a billing system associated with the wireless network, quantifies the debited amount into chance units and credits the chance units into a chance unit account. The chance units are used thereof by the lottery subscriber to submit entries in lotteries. The invention further provides for methods of registering lottery subscribers, submitting entries in lotteries and performing a lottery draw. |
| US09430909B2 |
Location-based wagering via remote devices
Location based wagering method sand systems. An online wagering service can be invoked via a mobile device. A determination can be then made regarding the location of the mobile device and a jurisdiction (e.g., state, county, city, etc.) associated with that location. The mobile device and hence a user can be authorized to access the online wagering service based on the location of the mobile device. Based on the location, it can also be determined if use of the online wagering service is allowed in the jurisdiction along with prescribed limitations of use in that jurisdiction. Wagering options are then presented via the mobile device, which conform to the laws and/or regulations of the jurisdiction. |
| US09430907B2 |
Incorporating a secondary game with a loyalty program
A wagering game system and its operations are described herein. In some embodiments, the operations can include providing a secondary game for presentation. A game objective for the secondary game is associated with a set of achievements attainable via wagering games available for play via a wagering game machine. The operations can further include detecting attainment of one of the set of achievements via one of the wagering games. The attainment of the one of the set of achievements causes completion of the game objective for the secondary game. The operations can further include awarding a prize associated with a customer loyalty program based on the completion of the game objective. |
| US09430906B2 |
Wagering game having adjacent-reel functionality enhancements
According to one aspect of the present invention, a method of conducting a wagering game on a gaming system includes receiving a wager in response to an input via at least one input device. The method also includes displaying, on at least one display device, a randomly selected outcome of a wagering game in a display area. The display area includes a plurality of reels with a plurality of symbols forming an array. The plurality of symbols includes at least one special symbol. In response to the randomly selected outcome including a special symbol on adjacent ones of the plurality of reels, the method includes changing the functionality of the special symbols on the adjacent ones of the plurality of reels to create a modified array. |
| US09430901B2 |
System and method for wireless gaming with location determination
In accordance with the teachings of the present invention, a system and method for wireless gaming with location determination are provided. In a particular embodiment of the present invention, the system includes a gaming server; a wireless network at least partially covering a property, the wireless network comprising a plurality of signal detection devices; and a gaming communication device operable to transmit and receive gaming information to and from the gaming server via the wireless network. A location of the gaming communication device on the property may be determined based upon a signal received by the plurality of signal detection devices from the gaming communication device. Based upon the location of the gaming communication device on the property, a predetermined functionality of the gaming communication device may be enabled. |
| US09430894B2 |
Banknote handling apparatus
A banknote handling apparatus 100 includes: a taking-in unit 10 which takes banknotes in one by one; a transport unit 70 which transports each banknote from the taking-in unit 10; a recognition sensor 20 which obtains information related to the fitness of the banknote transported by the transport unit 70; and a memory unit 55 which stores a threshold value for an unfit note factor for determining the fitness of a banknote. A control unit 50 of apparatus 100 determines the fitness of the banknote by comparing the threshold value and a detected value of the unfit note factor based on the information obtained by the recognition sensor 20, and counts the number of times the unfit note factor has been used to determine the banknote as an unfit note. An output unit 35 outputs the unfit note factor and the number of times of reason. |
| US09430892B2 |
Locker rental system using external codes
A locker rental system includes electronic lockers centrally managed by a locker manager. The locker manager is in communication with a separate external system, which handles admissions and sales for a venue. Users are provided with a unique external identification (ID) code for purposes such as admission to the venue. Determinative sequences of the external ID codes are provided to the locker manager as validation codes. When the external ID code is scanned, the locker manager validates the external ID code using the validation codes. A valid external ID code may be used to rent and access lockers in the locker system. In some implementations, locker rights may be sold through the external system and details of the transaction provided to the locker manager. If the external ID code is valid, the locker manager generates a rental plan. |
| US09430889B2 |
Method for protecting a hands-free access and/or starting system of a vehicle by modifying the speed of signal reception
Method for improving the security of communication between the electronic key and vehicle to prevent interception by a third-party item of electronic equipment by highlighting in such event, a time delay in acknowledgement of this signal by the key. This method includes, before authorizing the access to and/or starting of the vehicle, additional steps of adapting the amplitude of a coded identification request signal received by the key to reach the detection threshold of the key as soon as possible; measuring the sum of the duration of the emission of the coded interrogation signal and of the duration of the response signal of the electronic key; comparing the sum of the measured durations to a reference duration, and triggering an alarm relating to the conditions of access to and/or starting of the vehicle when the separation between this sum of durations and the reference duration is above a preset threshold. |
| US09430887B2 |
Hybrid vehicle management system, hybrid vehicle control apparatus, and hybrid vehicle control method
A management system is provided for managing a hybrid vehicle having an engine and a motor/generator as power sources. The management system includes an acquisition unit and an area identifying unit. The acquisition unit acquires engine operating information from a plurality of vehicles, during the operation of the motor/generator. The engine operating information includes a moving distance or an engine operating time from the start of to the stop of the engine, and an engine operating position indicating the point at which the engine is operating. The area identifying unit identifies on map data an engine start-up suppressing area in which the start of the engine is suppressed based on the engine operating information. |
| US09430881B2 |
Measurement probe with heat cycle event counter
A system comprising a measurement device and a handheld device is disclosed, the system adapted to withstand, detect, record, and display heat cycle event counts. The measurement device comprises a sensor for measuring and a heat cycle detection unit. The heat cycle detection unit comprises a temperature or pressure responsive element, a detection module, data interface, and data memory. The handheld device comprises a screen, a button, a communication circuit, and a processing system. The communication circuit is configured to communicate with the measurement device and a computing device and the processing system is configured to receive non-measurement information from the measurement device, display the received information on the screen, and cycle the received information displayed on the screen based on an actuation of the button, wherein the handheld device is used to display a heat sterilization cycle count of the measurement device. |
| US09430879B2 |
Methods and apparatuses for creating orientation markers and 3D ultrasound imaging systems using the same
Methods and systems for creating an orientation marker in a 3D ultrasound imaging system are disclosed. |
| US09430873B2 |
Slice data generation device, slice data generation method, and non-transitory computer-readable storage medium storing computer program that causes computer to act as slice data generation device or to execute slice data generation method
A slice data generation device generates slice data representing a cross-section obtained as a result of cutting a three-dimensional model and includes a reading section that reads information on a polygon mesh, a change section that changes phase information on the read polygon mesh such that a contour polyline that represents a contour obtained as a result of slicing the polygon mesh read by the reading section into round slices is capable of being acquired, a correction section that acquires the contour polyline from the polygon mesh, the phase information on which has been changed by the change section, and corrects the acquired contour polyline such that an area inside the acquired contour polyline is capable of being painted out; and a paint-out data generation section that paints out the area inside the contour polyline corrected by the correction section. |
| US09430867B2 |
Image processing apparatus and method utilizing a lookup table and spherical harmonic coefficients
An image processing apparatus may include a storage unit to store a lookup table (LUT) including information on corresponding relations between an occlusion vector related to at least one point of a 3-dimensional (3D) object and a spherical harmonics (SH) coefficient; and a rendering unit to determine a first SH coefficient corresponding to a first occlusion vector related to a first point of the 3D object using the LUT and to determine a pixel value of the first point using the first SH coefficient. |
| US09430866B2 |
Derivative-based selection of zones for banded map display
A graphics or image rendering system, such as a map image rendering system, determines a viewing window of a map surface to be displayed, wherein the viewing plane is at an angle of incidence with respect to the map surface. The method generally determines a depth boundary along the map surface where a height projection of a depth increment of a first unit of area is lower than a threshold height increment at a non-zero angle of incidence and at a single zoom level magnification. The method renders the first unit of area within the depth boundary and a second unit of area outside the depth boundary. The first unit of area is rendered at a first density of map data and the second unit of area is rendered at a second density of map data that is lower than the first density of map data. |
| US09430865B2 |
Real-time dynamic non-planar projection apparatus and method
Disclosed herein is a real-time dynamic non-planar projection apparatus and method, which can reduce visual errors, such as distortion of a screen image or deviation from a border area, upon projecting screen images from a projector onto the surface of a non-planar object that is moved in real time. The presented real-time dynamic non-planar projection apparatus includes a preprocessing unit for preprocessing data related to a static part of a screen image to be projected onto a non-planar surface. A real-time projection unit classifies non-planar objects in the screen image to be projected onto the non-planar surface into a rigid body and a non-rigid body using data output from the preprocessing unit, respectively renders the rigid body and the non-rigid body depending on a viewer's current viewpoint, and projects rendered results onto the non-planar surface via projection mapping. |
| US09430863B1 |
System, method, and computer program product for constructing a hierarchical acceleration data structure that supports ray tracing of motion blur
A system, method, and computer program product are provided for constructing a hierarchical acceleration data structure that supports ray tracing of motion blur. In use, scene description data associated with an image to be generated is received. Additionally, a hierarchical acceleration data structure for performing ray tracing on the scene description data is constructed, where the hierarchical acceleration data structure supports ray tracing of motion blur. |
| US09430851B2 |
Method for converting paths defined by a nonzero winding rule
A method converts a two-dimensional input path defined according to a nonzero winding rule to an equivalent output path. Degenerate segments and degenerate contours of the input path are removed. Intersections of the input path are determined. Contours of the input path that include intersections are marked. Unmarked interior contours are removed. Intersections are linked. The marked contours are walked to form new contours. Marked contours and degenerate contours are removed. The new contours and the unmarked contours are collected to form the equivalent output path. The equivalent output path can be rendered using either the nonzero winding rule or an even-odd parity rule. |
| US09430850B1 |
System and method for object dimension estimation using 3D models
A method for estimation of dimensions of an object present on images obtained from a set of N cameras and representing the same scene from different viewpoints, based on a 3D object model. The method comprises determining (302) a 3DMM model. It further comprises matching (303) the 3DMM model to each of N images of the set in order to determine a set of parameters hi, ρi, λi, wherein hi describes the orientation of the matched model with respect to the i-th image; ρi describes the 3D shape of the model matched to the i-th image and λi describes the appearance/texture of the model matched to the i-th image. The method comprises calculating (304) relative positions of the cameras, from which the images were collected, based on 3D transformations Hij of the matched 3DMM model from the i-th image to the matched 3DMM model from the j-th image; and calculating (305) the total matching error Ec for the model as a sum of matching errors of a model described by parameters hc, ρc, λc to individual images: E c = ∑ i = 1 N E i The method further comprises estimating (306) the dimensions of the object based on locations of characteristic points from vector s, calculated as: s = s _ + ∑ k p k · s ^ k wherein s is the vector of the average 3DMM model shape, ρk are elements of vector ρc, and ŝk are eigenvalue vectors of the 3DMM model. |
| US09430847B2 |
Method for stereo visual odometry using points, lines and planes
A method determines a motion between a first and second coordinate system, by first extracting a first set of primitives from a 3D image acquired in the first coordinate system from an environment, and extracting a second set of primitives from a 3D image acquired in the second coordinate system from the environment. Motion hypotheses are generated for different combinations of the first and second sets of primitives using a RANdom SAmple Consensus procedure. Each motion hypothesis is scored using a scoring function learned using parameter learning techniques. Then, a best motion hypothesis is selected as the motion between the first and second coordinate system. |
| US09430845B2 |
Semiconductor device, image segmentation method, and image processor
A semiconductor device in which components each serving as a basic constitutional unit are arranged in order to find a solution of an interaction model. The semiconductor device includes multiple units each of which has: a first memory cell for scoring a value indicating a state of one node of the interaction model; a second memory cell for storing an interaction coefficient indicating an interaction from another node connected to the one node; a third memory cell for storing a flag for fixing a value of the first memory cell; a first arithmetic circuit that decides a next state of the one node based on a value indicating a state of the other node and the interaction coefficient; and a second arithmetic circuit that decides whether or not to record a value indicating the next state in the first memory cell according to a value of the flag. |
| US09430838B2 |
Interactive movable object tracing system and interactive movable object and tracing method thereof
An interactive object tracing system includes an interactive object including a control unit, a first communication module and a first display module and a portable communication device including a control module, a second communication module and an image capture module. The first display module, the second communication module and the image capture module are respectively used for displaying a specific color light, exchanging information, and capturing an image of the interactive object. A color information of the background of the interactive object is analyzed and a control signal is generated. The control signal is transmitted to the first communication module, so that the specific color light is displayed by the first display module according to the control signal so as to be easily identified. Therefore, the tracing accuracy is enhanced, the fabricating cost and the product size are reduced, and the intentions of using and purchasing of users are raised. |
| US09430834B2 |
Visual perception matching cost on binocular stereo images
In a method, a first image of a subject is taken from a first viewpoint. The first image of the subject is composed of a first plurality of pixels. A second image of the subject is taken from a second viewpoint. The second image of the subject is composed of a second plurality of pixels. Pixels in the first plurality of pixels in the first image correspond to pixels in the second plurality of pixels in the second image. Corresponding pixels lie on first epipolar lines in the first image and on second epipolar lines in the second image. The first and second images are rectified to make the first and second epipolar lines parallel to one another and to place corresponding pixels in the first and second images on one of a plurality of pairs of common scanlines. For at least one pair of common scanlines, a corresponding pixel is found in the second image for each pixel in the first image such that a visual perception matching cost (VPMC) is minimized. |
| US09430832B2 |
Differential phase contrast imaging with energy sensitive detection
For correcting differential phase image data 52, differential phase image data 52 acquired with radiation at different energy levels is received, wherein the differential phase image data 52 comprises pixels 60, each pixel 60 having a phase gradient value 62a, 62b, 62c for each energy level. After that an energy dependent behavior of phase gradient values 62a, 62b, 62c of a pixel 60 is determined and a corrected phase gradient value 68 for the pixel 60 is determined from the phase gradient values 62a, 62b, 62c of the pixel 60 and a model for the energy dependence of the phase gradient values 62a, 62b, 62c. |
| US09430826B2 |
Method for reducing direct hit artifacts and x-ray facility
A method for reducing artifacts produced by x-ray radiation directly striking a measuring pixel of a CMOS detector after crossing a scintillator, wherein, for an x-ray image recorded using the CMOS detector, artifact image points are extracted by applying a local, edge-obtaining smoothing operator that evaluates image data of neighboring image points located in the vicinity of a considered image point and comparison with the image to which the smoothing operator was applied, and their image data is corrected. |
| US09430825B2 |
Image processing apparatus, control method, and computer readable storage medium for analyzing retina layers of an eye
An image processing apparatus, which analyzes retina layers of an eye to be examined, comprising, means for extracting a feature amount, which represents an anatomical feature in the eye to be examined, from a projection image obtained from a tomogram of the retina layers and a fundus image of the eye to be examined, means for determining a type of the anatomical feature based on the feature amount, means for deciding layers to be detected from the retina layers according to the determined type of the anatomical feature, and detecting structures of the decided layers in the tomogram, and means for modifying the structure of the layer included in a region having the anatomical feature of the structures of the layers detected by the layer structure detection means. |
| US09430818B2 |
Analytical motion blur rasterization with compression
A rasterizer, based on time-dependent edge equations, computes analytical visibility in order to render accurate motion blur. An oracle-based compression algorithm for the time intervals lowers the frame buffer requirements. High quality motion blurred scenes can be rendered using a rasterizer with rather low memory requirements. The resulting images may contain motion blur for both opaque and transparent objects. |
| US09430817B2 |
Blind image deblurring with cascade architecture
Blind image deblurring with a cascade architecture is described, for example, where photographs taken on a camera phone are deblurred in a process which revises blur estimates and estimates a blur function as a combined process. In various examples the estimates of the blur function are computed using first trained machine learning predictors arranged in a cascade architecture. In various examples a revised blur estimate is calculated at each level of the cascade using a latest deblurred version of a blurred image. In some examples the revised blur estimates are calculated using second trained machine learning predictors interleaved with the first trained machine learning predictors. |
| US09430815B2 |
Image correction system, image correction method, and program recording medium
This image correction system corrects image data from pixels, is connected to at least two different input pathways, and is provided with: a pixel value relationship extraction means that extracts the pixel value relationship among neighboring pixels from image data that is the subject of correction; a pixel value relational expression estimation means that estimates a relational expression representing the difference in characteristics in each pixel from the pixel value relationship between neighboring pixels; and a pixel value correction means that forms a corrected image by correcting the pixel values of the image data that is the subject of correction using the relational expression. |
| US09430814B2 |
Move based and sonic based super resolution
A camera system for producing super resolution images is disclosed. The camera system may include a lens, a detector array configured to capture an image focused through the lens onto a focal plane, and a transducer coupled to one of the lens and the detector array. The transducer may be configured to impart motion to the one of the lens and the detector array over a predetermined time period, and the detector array may capture a plurality of images over the predetermined time period. |
| US09430813B2 |
Target image generation utilizing a functional based on functions of information from other images
An image processing system comprises an image processor configured to construct a designated functional based on a plurality of functions each associated with a corresponding portion of image information relating to at least first and second images, and to generate a target image utilizing the constructed functional. For example, the functions may comprise a set of functions ƒ1(A1), ƒ1(A1), . . . , ƒ1(A1) of pixels from respective input images A1, A2, AL of the image information, and the functional may be a function F(X) of the set of functions ƒ1,(A1) ƒ2(AL), ƒL(AL) where X denotes the target image and is generated by minimizing the functional F(X). The input images may be received from one or more image sources and the target image may be provided to one or more image destinations. |
| US09430809B2 |
Multi-platform image processing framework
A method for compiling image processing instructions is described. The method receives multiple image processing instruction sets. The method, for each received image processing instruction set, produces several image processing instruction sets, where two different produced image processing instruction sets that are associated with a same received image processing instruction set are for processing by at least two different processing units. |
| US09430808B2 |
Synchronization points for state information
Techniques for synchronization points for state information are described. In at least some embodiments, synchronization points are employed to propagate state information among different processing threads. A synchronization point, for example, can be employed to propagate state information among different independently-executing threads. Accordingly, in at least some embodiments, synchronization points serve as inter-thread communications among different independently-executing threads. |
| US09430805B2 |
System and method for delivering medical examination, treatment and assistance over a network
A system for delivering medical examination, diagnosis, and treatment services includes a plurality of health care practitioner terminals, each having a display device, a plurality of patient terminals in audiovisual communication with any of the health care practitioner terminals, a call center, in communication with the patient terminals and the health care practitioner terminals, routing a call from a patient at one of the patient terminals to an available health care practitioner at one of the health care practitioner terminals, so that the available health care practitioner may carry on a two-way conversation with the patient and visually observe the patient, and a protocol database containing a plurality of protocol segments such that a relevant segment of the protocol may be displayed in real time on the display device of the health care practitioner terminal for use by the available health care practitioner in making an assessment of the patient. |
| US09430800B2 |
Method and apparatus for trade interaction chain reconstruction
The subject matter discloses a method for trade interaction chain reconstruction comprising: identifying a swap deal, the swap deal includes two or more of the received interactions and involves two or more participants; selecting a first interaction of the received interactions, said first interaction involves at least two participants of the two or more participants, said first interaction is stored on a computerized device; obtaining a first plurality of interactions of the received interactions that involve the at least two participants of the two or more participants; determining a first plurality of relevance scores between the first plurality of interactions and the first interaction; and associating interactions of the first plurality of interactions to be relevant to the swap deal according to the determined first plurality of relevance scores. |
| US09430799B2 |
Mixed banking transactions
A method of fulfilling a transaction between a bank and a customer of the bank makes available a form used in a banking transaction to a customer digital device. The form has a plurality of fields. The method scans, within a physical bank branch, an encoded visual display on the client digital device. The encoded visual display has an encoded version of the form and some but not all of the plurality of fields completed with client data. The method further decodes the encoded visual display using a decoding algorithm to produce the form and completed and uncompleted fields. At least one datum may be added, within the physical bank branch, to at least one uncompleted field of the form, and the banking transaction may be processed based on the form with the at least one client datum within the at least one field of the form. |
| US09430798B1 |
Method and system for allocating deposits over a plurality of depository institutions
A method, system, and program product, the method comprising: (1) aggregated account information FDIC aggregated deposit accounts held in a plurality of banks; (2) client account information: (1) obtaining a client available deposit amount, Di; (2) determining, a bank number tier, Ti, for the client account, from among a plurality of tiers based, at least in part, on a level of funds associated with the respective client or relative to tier ranges, wherein each tier has a number of banks associated therewith or a function for computing the number of banks associated therewith; (3) allocating the client available deposit amount, Di, across a number of banks, NT, equal to the number associated electronically with the tier, Ti; and generating data to transfer funds to or from one or more of the banks. |
| US09430795B2 |
Display control device, display control method, search device, search method, program and communication system
An information processing apparatus may include a control unit to control display of parts information of a plurality of items, to generate search information according to feedback from a user for the parts information, and to control display of a search result according to the search information. |
| US09430794B2 |
System and method for providing a buy option in search results when user input is classified as having a purchase intent
Disclosed herein are systems, methods, and computer-readable storage devices for unifying access to multiple websites or other information sources such that the user only needs to visit one location, and utilize one input search field. That one location can be a website, an application, a search bar in a web browser, etc. Rather than navigating to a website to perform a search in the context of that website, a user can instead navigate to or open a generalized search field. Via the generalized search field, the system can implicitly or explicitly process and analyze the input from the user and the resulting context. Thus, the user goes to the website second, after the search is entered. This approach reduces the number of interactions, starting when the user opens a browser or application, to get to a purchase or a search result. |
| US09430793B2 |
Dictionary generation device, dictionary generation method, dictionary generation program and computer-readable recording medium storing same program
A dictionary generation device according to one embodiment includes a determination unit configured to (A) refer to an item database that stores a plurality of records containing an item name/item description including a noun sequence, an item category, and a shop selling the item as fields and determine whether the noun sequence included in the item name/item description of each record is set corresponding to the item category, (B) count the number of selling shops in a record containing the noun sequence for each item category and calculate a shop intensity of each noun sequence based on the counted number of selling shops, (C) determine whether one item category uniquely derived from the noun sequence exists based on the shop intensity for each item category, and (D) determine the noun sequence as a definitive category word when the one item category exists. |
| US09430790B2 |
System and method of providing a buy option in a social media network
Disclosed herein are methods for providing a buy option to social networking communications. The method includes receiving a posting of text, an image or a video through Facebook, identifying data associated with the posting and determining whether the data identifies a product within a database of products for sale from the posting entity. When the determination indicates that there is no reference to the product in the product database, the method includes transmitting the posting through Facebook without a buy now button. When the determination indicates that the posting references the product, thus indicating a sale-related intent, the method includes transmitting the posting through Facebook with a buy option, receiving a purchase interaction associated with the buy option and processing a purchase of the product. |
| US09430789B2 |
Method for verifying the age or location of a player before initiating play of an internet-based game
A method for verifying the age or location of a player of an Internet-based lottery game entails providing lottery tickets for purchase by players at an authorized retail location, the lottery tickets having a game authorization code that is entered by the initiate play of the Internet-based lottery game on an internet enabled device. The age of the player is verified at the retail location and a separate verification password is entered via a terminal that is in communication with to the lottery system central computer, with the password linked to the game authorization code. Upon initiating play of the game via a web site, the player enters the verification password separately from the game authorization code. An Internet game server communicates with the lottery system central computer to ensure that the entered verification password corresponds to the linked verification password prior to permitting play of the Internet-based lottery game. |
| US09430784B1 |
System for E-commerce accessibility
Disclosed are a system and a method enabling E-Commerce transactions without redirecting a user's computer from one electronic publishing page to another electronic publishing page. |
| US09430783B1 |
Prioritization of messages within gallery
In some embodiments, a computer implemented method of processing messages may include creating a gallery using messages received from user devices; scanning the messages to identify a selected message of messages; receiving, from an owner of the brand, a prioritization of the selected message; prioritizing, in response to the prioritization, the selected message in the gallery; and supplying the gallery to a user device for display to a user of the user device. |
| US09430781B1 |
Network based indoor positioning and geofencing system and method
A network based indoor positioning and geofencing system and method is described. Beacons are disposed within a physical premises and each beacon transmits a signal containing identifying information. A networked indoor positioning module receives measured reference points that include a measured beacon identifier and a measured signal strength. The networked indoor positioning module uses the measured reference points to generate calculated signal strength values for at least one detected beacon. At least one geofence is associated with the physical premises and the geofence includes some of the calculated signal strength values. A wireless device receives a beacon identifier and a beacon signal strength, when the wireless device is in or near a geofence associated the physical premises. The networked indoor positioning module determines that the wireless device is within at least one geofence by comparing the received beacon identifier and the received beacon signal strength with the calculated signal strength values corresponding to the detected beacon. |
| US09430777B1 |
Incentive generator for shipping efficiency
Disclosed are various embodiments for generating incentives for users accessing an electronic commerce system that maximizes shipping consolidation for a merchant in the electronic commerce system. An incentive generator determines the shipping address for a user on the electronic commerce system. The incentive generator identifies at least one previously scheduled order to destinations located within a predefined area relative to the user shipping address. The incentive generator gathers the target delivery dates of identified previously scheduled deliveries and generates at least one incentive for the user to select a delivery date substantially similar to the target delivery dates. The at least one incentive is based at least in part on the destination of the previously scheduled order, a target delivery date of the previously scheduled order, and a shipping capacity threshold. |
| US09430771B2 |
System for verifying an item in a package
A system verifying an item in a package comprises a package producer and a verifier. The package producer produces a package with a label, wherein the package includes an item each with one or more selected tag identifiers that are placed in a location on the item. The verifier verifies the item using 1) the one or more selected tag identifiers as detected using a spectral measurement or 2) a location or a shape of the one or more selected tag identifiers on the item, and 3) the label as read using a label reader. |
| US09430761B2 |
Electronic system for the protection and control of license transactions associated with the alteration of replicated read only media and its bound licensed content
Distribution of content stored on read only media, and a system and method by which a consumer who purchased content stored on read only media implements a process in the field by which they alter the storage media. A system and tools are used by the consumer to identify, authenticate, disable, and confirm alteration in exchange for compensation, the acquisition of new usage rights to content, or the ability to restore access to or copy content to new media. The process may be conducted by the consumer in the field without assistance and or visual inspection, or be partially conducted in conjunction with an authorized intermediary. Furthermore, the process may restore access to content stored on new media without the need to transfer copies of content. |
| US09430760B2 |
Content data distribution system, on-vehicle apparatus, server, communication terminal, and license issuing method
An on-vehicle apparatus transmits first license request information to content to be purchased, to a server, and receives content data, to which a first license issued by the server based on the first license request information is added, from the server. The server transmits the content data, to which the first license is added based on the first license request information, to the on-vehicle apparatus, transmits second license request urging information to a communication terminal based on driving end notification information, and issues a second license to the content data based on the second license request information. The communication terminal transmits driving end notification information to the server based on determination that driving of a vehicle having the on-vehicle apparatus mounted thereon is ended, and transmits second license request information according to the second license request urging information to the server. |
| US09430754B2 |
Storage medium, information processing method and information processing system
A game apparatus includes a CPU, and a relationship diagram displaying screen is displayed on a second LCD according to an instruction from a first user of the game apparatus. On the relationship diagram displaying screen, a display manner of an arrow displayed between a user image of the first user and a user image of a second user of another game apparatus is changed. The thickness and the color of the arrow on the side of the user image of the second user are set on the basis of the degree of transmission of the message data transmitted by the first user to the second user. Furthermore, the thickness and the color of the arrow on the side of the user image of the first user are set on the basis of the degree of reception of the message data received by the first user from the second user. |
| US09430753B2 |
Inventory tracking
The present disclosure extends to maintaining an item inventory status at an inventory cache management system. The inventory cache may be refreshed regularly by a threshold-based triggering mechanism. In embodiments, as item inventory breaches certain thresholds, the inventory cache may be refreshed with increased frequency to mitigate overselling or underselling scenarios and reduce overall network traffic for items having relatively high inventory levels. |
| US09430748B1 |
Verifying historical artifacts in disparate source control systems
A computer program product for verifying historical artifacts in disparate source control systems. A processor is configured to: obtain historical artifacts from a target repository; obtain historical artifacts from a source repository; and verify the historical artifacts in the target repository match the historical artifacts in the source repository. Verification further causes the processor to: compare commit data in the historical artifacts in the target repository with commit data in the historical artifacts in the source repository; and evaluate whether each commit data event in the historical artifacts in the target repository is equivalent to the corresponding commit data event in the historical artifacts in the source repository. Evaluation causes the processor to: log a commit data event in the historical artifacts in the target repository which is not equivalent to a corresponding commit data event in the historical artifacts in the source repository; and review the logging results. |
| US09430746B2 |
Combining measurements based on beacon data
Usage data representing the access of a set of resources on a network is accessed. The usage data is based at least in part on information received from client systems sent as a result of beacon instructions included with the set of resources. First and second sets of usage data representing access by client systems classified as a first type and a second type, respectively, are determined based on the accessed usage data. Counts of unique visitors accessing the network resources from each of the first and second types of client systems, based on the first and sets of usage data, respectively, are each determined. A total count of unique visitors accessing the network resources from the first and second types of client systems is determined based on data representing the usage overlap of devices of the first type with devices of the second type. |
| US09430742B2 |
Method and apparatus for extracting entity names and their relations
According to one embodiment of the invention, a method includes generating a person-name Information Gain (IG)-Tree and a relation IG-Tree from annotated data. The method also includes tagging and partial parsing of an input document. The names of the persons are extracted within the input document using the person-name IG-tree. Additionally, names of organizations are extracted within the input document. The method also includes extracting entity names that are not names of persons and organizations within the input document. Further, the relations between the identified entity names are extracted using the relation-IG-tree. |
| US09430741B2 |
System and method for optimizing teams
A system, method and program product for optimizing a team to solve a problem. The system includes: a team building system for building a fundamental analytic team from a database of analysts to solve an inputted problem, wherein the fundamental analytic team includes at least one cluster of analysts characterized with specificity and at least one cluster of analysts characterized with sensitivity; and a problem analysis system that collects sensor data from the fundamental analytic team operating within an immersive environment, wherein the problem analysis system includes a system for evaluating the sensor data to identify a bias condition from the fundamental analytic team, and includes a system for altering variables in the immersive environment in response to a detected bias condition. |
| US09430734B2 |
Method and system for validating energy measurement in a high pressure gas distribution network
A method and system for validating energy measurement in a high pressure gas distribution network. The method comprises the steps of calculating a validation energy value using an artificial neural network (ANN) engine based on measured parameters associated with a gas flow in the gas distribution network; measuring an actual energy value of the gas flow; and comparing the validation energy value and the actual energy value, wherein the actual energy value is validated if the validation energy value and the actual energy value are substantially equal. |
| US09430733B2 |
Unique security device for the identification or authentication of valuable goods, fabrication process and method for securing valuable goods using such a unique security device
A security device for the identification or authentication of valuable goods is described, including a thin material layer (22, 26) presenting a stochastic pattern including micro/submicrostructures, where the latter are arranged in blobs (2) each of which presents a complexity factor Cx = L 2 4 π · A , where L is the perimeter of the blob and A its area, and wherein blobs having a Cx value greater than or equal to 2 cover at least 5%, preferably at least 15%, of the device surface. According to a preferred embodiment, the material layer may include a film including at least a first and a second polymers arranged respectively within a first and a second phases defining the micro/submicrostructures. Preferred processes of fabrication are also disclosed, as well as a method for securing a valuable good based on such a security device. |
| US09430731B2 |
IC card
An integrated circuit card includes a substrate and an integrated circuit carried by the substrate. A first sector is delimited by a first weakening line on the substrate, with the first sector being able to be separated from the substrate. A second sector is delimited by a second weakening line inside the first sector, with the second sector being able to be separated from the substrate and having the integrated circuit thereon. A disposable frame-piece is defined between the first and second weakening lines of the first and second sectors, and has a ring form. A breakage lug is arranged with respect to the disposable frame-piece to break the disposable frame-piece so that it is no longer intact, during separation of the second sector from the substrate. |
| US09430729B2 |
Broadband progressive tag
In one embodiment, an RFID apparatus is provided, which includes an input circuit that has an input impedance used for receiving RF signals. An RF-signal converter provides an apparatus-operating power signal in response to receiving the RF signals. An impedance circuit provides and selects impedance values in response to at least one select signal provided by a state-machine logic circuit. The state-machine logic circuit provides the select signal(s) in response to the apparatus-operating power signal for selecting the impedance values and therein permit the input impedance to be changed for tuning the RFID apparatus. |
| US09430727B2 |
Data storage device, apparatus and method for using same
A data storage device serving as a portable card, magnetically encodeable card, or a magnetic credit card is shown. The data storage device includes a substrate having at least one surface. A high density, magnetically coercive material layer is disposed on or is deposited on the substrate for storing magnetic signals. The magnetically coercive material may have an axis of magnetization that is oriented in a predetermined direction relative to the at least one surface of the substrate. A layer of non-magnetically material is disposed on the substrate for defining an exchange break layer. A relatively hard, abradeable protective coating is formed on the magnetic material layer and has a thickness between a maximum thickness that materially attenuates magnetic signals passing between the magnetic material layer and a transducer and a minimum thickness enabling the protective coating to be abraded by usage in an ambient natural atmosphere operating environment. |
| US09430726B2 |
High capacity 2D color barcode and method for decoding the same
A 2D color barcode layout is disclosed. The barcode includes a 2D array of data cells, four corner locators, and border reference cells forming four borders between the corner locators that substantially surround the array of data cells. Each data cell and border reference cell has one of four primary colors (e.g. CMYK). Most border reference cells have the same size as the data cells, except for yellow ones which are longer. The border reference cells form a repeating color sequence along the borders, and are used during decoding to calculate (1) the channel offset (a spatial offset) of each primary color at different locations along the borders and (2) the reference (average) color values of each primary color. During decoding, the color values of each data cell is measured while taking into account channel offset which is calculated by interpolating the channel offset of the border reference cells. |
| US09430725B2 |
Unique identifier insert for perishable or consumable tooling
A device for tracking a consumable or perishable tool is provided including a connector configured to couple to a body of the consumable or perishable tool such that the connector remains in constant contact with the consumable or perishable tool for a life of the tool. The connector includes an exposed unique identifier configured to provide identification information about the tool when access by an asset management software. |
| US09430721B2 |
System for displaying printer information
A system includes a printer including a plurality of functional modules and a controller configured to control the print process, a storage device configured to store information regarding supporting an operator to interact with a functional module of the plurality of functional modules other than the local user interface of the printer, a presence detection system configured to detect a presence of an operator near or at the functional module, and an information presentation device configured to present information within a perception reach of the operator. The system includes a computer device connected to the presence detection system, the storage device, the printer and the information presentation device. The computer device is configured to retrieve, upon detection of a presence of an operator near or at the functional module by the presence detection system, status information of the status of the functional module of the printer from the controller and support information regarding supporting an operator to interact with the functional module from the storage device, and to select part of the support information taking into account the status information, and to provide the selected information to the information presentation device in order to present the selected information to the operator within the perception reach of the operator. |
| US09430717B2 |
Three dimensional polyline registration using shape constraints
A system and method are provided for registering a coordinate system for a shape sensing system to a coordinate system for pre-procedural or intra-procedural imaging data. A stable curvature in a shape reconstruction is identified and matched to another curvature, where the other curvature is from another shape construction from a subsequent time or from imaging data from another imaging modality. The matched curvatures are aligned, aligning the coordinate systems for the respective curvatures. |
| US09430709B2 |
Liveness detection
An image of a portion of a person's body is accessed, the image having been captured by an image capture device. Using the image, measurements of characteristics in the image are obtained, the characteristics in the image having been selected based on a statistical analysis of characteristics (i) in a plurality of first images taken directly of a person and (ii) in a plurality of second images taken of an image of a person. Based on a liveness function, a score for the image is determined using the obtained measurements of the characteristics in the image. A threshold value is accessed. The score of the image is compared to the accessed threshold value. Based on the comparison of the score of the image to the accessed threshold value, the image is determined to be have been taken by the image capture device imaging the portion of the person's body. |
| US09430707B2 |
Filtering device and environment recognition system
A filtering device includes an evaluation value deriving module that derives, for a pair of generated images having mutual relevance, multiple evaluation values indicative of correlations between any one of blocks extracted from one of the images and multiple blocks extracted from the other image, respectively, a reference waveform part setting module that sets a reference waveform part of a transition waveform comprised of the multiple evaluation values, the reference waveform part containing the evaluation value having the highest correlation, and a difference value determining module that determines whether one or more similar waveform parts similar to the reference waveform part exist in the transition waveform, and determines, based on the result of the determination, whether the evaluation value with the highest correlation is valid as a difference value. |
| US09430700B2 |
System and method for optimizing tracker system
The present invention relates to the field of computation and simulation and covers methods to optimize the fiducial marker positions in optical object tracking systems, by simulating the visibility. The method for optimizing tracker system which is realized to simulate camera and fiducial positions and pose estimation algorithm parameters to optimize the system comprises the steps of; acquire mesh data representing possible active marker positions and orientations on a tracked object, pose data representing possible poses of tracked object, camera positions and orientations; compute visibility of each node from all camera viewports and generate a visibility value list; select the node with highest visibility count as a marker placement node; remove nodes closer to the selected node than a threshold; remove the pose(s) having a predetermined number of selected nodes; does percentage of all poses have predetermined number of selected nodes?; project selected node positions on the image plane of each camera viewport and calculate the pose of the mesh using the tracker algorithm to be optimized; calculate pose error and pose coverage by comparing algorithm results with initial data; record and output results; and select among the results a parameter set satisfying at least one constraint. |
| US09430694B2 |
Face recognition system and method
A face recognition method is provided. The method includes dividing an input video into different sets of frames and detecting faces of each frame in the input video. The method also includes generating face tracks for the whole video. Further, the method includes applying a robust collaborative representation-based classifier to recover a clean image from complex occlusions and corruptions for a face test sample and perform classification. In addition, the method also includes outputting the video containing the recognized face images. |
| US09430692B2 |
Fingerprint minutia display input device, fingerprint minutia display input method, and fingerprint minutia display input program
A fingerprint minutia display input device includes: an image output controller for displaying a fingerprint image and a pointer for designating a minutia; and a minutia input setting unit for displaying a minutia display mark on the minutia; wherein the fingerprint minutia display input device includes a gray-scale value adjustment unit for setting the gray-scale intensity of the entire fingerprint image on which the pointer is positioned, the setting being performed within a range of a display gray-scale width constituted with upper-limit and lower-limit gray-scale values. The screen output controller includes a gray-scale width update function for displaying an updated output display of the fingerprint image in the set display gray-scale width, and a gray-scale width fixing/holding function for fixedly holding the set display gray-scale width as a set display gray-scale width for the minutia display input when there is no new setting information regarding the display gray-scale width. |
| US09430684B2 |
Driver's license detector
A license detector system enables a person such as a police officer to monitor vehicles on the road to ensure drivers have valid licenses. Within each valid license is an RFID tag which contains specific information and each RFID tag is able to send that information to a detector when requested. To use the system, the police officer aims the detector at a vehicle, initiates the signal to be received by the RFID tag within the license and waits to receive a signal back from the RFID tag. If a signal is received, then a valid license has been detected within the vehicle. However, if no signal or an invalid signal is received by the detector, then no one, specifically the driver of the car, has a valid license. Upon discovering such information, the police officer should be justified in stopping the vehicle and taking the necessary police action. |
| US09430677B2 |
Memory management systems and methods for embedded systems
Methods and systems are provided for managing static memory associated with software of an embedded system. The method includes performing one or more steps on one or more processors. The steps include selectively assigning memory objects to static memory segments based on access of the memory object by the software; managing data of the memory segments based on the assigning; and selectively restoring the data of the memory segments based on the managing. |
| US09430674B2 |
Secure data access
Embodiments for preventing data loss and allowing selective access data include systems and methods that determine that a file has been created or received; determine a fingerprint of the file, wherein the fingerprint is a record of the file for comparison to the file at a later time; determine at least one permitted use related to the file, wherein the permitted uses comprises a permitted user and a permitted action; determine that the file is being accessed by a user; determine whether the user is a permitted user of the file based on an identity of the user; compare the file to the associated fingerprint of the file when the user is a permitted user; determine the action being taken by the user when the file matches the associated fingerprint; and permit the action to occur when the action is a permitted action of the file. |
| US09430671B2 |
Method and apparatus for privacy protected clustering of user interest profiles
According to an implementation of the present subject matter, apparatus and methods for privacy protected clustering of user interest profiles are described. The method includes generating at least one interest profile segment based on an interest profile of an end user (404). Further, semantic terms corresponding to the at least one interest profile segment are obtained based on interaction with a semantic metadata database coupled to a user device of the end user (406), wherein the semantic terms are obtained from amongst one or more semantic terms provided in the semantic metadata database. Each of the at least one interest profile segment are subsequently transformed into at least one semantic representation (408). Further, a cluster identifier is assigned to the at least one interest profile segment based on the at least one semantic representation, wherein the cluster identifiers are generated using locality sensitive hashing (LSH) technique (410). |
| US09430667B2 |
Managed wireless distribution network
A managed wireless distribution network includes multiple devices that communicate with one another via multiple wireless networks (e.g., multiple Wi-Fi networks). Each device in the managed wireless distribution network can host at least one wireless network and/or join at least one wireless network. Content in the managed wireless distribution network is protected so that the content cannot be consumed unless permission to consume the content is obtained. Devices can host portions of protected content regardless of whether they can consume the protected content, and can obtain portions of protected content via the wireless networks of the managed wireless distribution network without having to access a content service over the Internet. |
| US09430664B2 |
Data protection for organizations on computing devices
An application on a device can communicate with organization services. The application accesses a protection system on the device, which encrypts data obtained by the application from an organization service using an encryption key, and includes with the data an indication of a decryption key usable to decrypt the encrypted data. The protection system maintains a record of the encryption and decryption keys associated with the organization. The data can be stored in various locations on at least the device, and can be read by various applications on at least the device. If the organization determines that data of the organization stored on a device is to no longer be accessible on the device (e.g., is to be revoked from the device), a command is communicated to the device to revoke data associated with the organization. In response to this command, the protection system deletes the decryption key. |
| US09430663B2 |
Dynamic filtering and precision alteration of query responses responsive to request load
Embodiments relate to processing a request from a user device for access rights for a resource. An access management system can send a request to query a (e.g., cached or authoritative) data store for available access rights. The query may include an exact-match or fuzzy query. A set of access-right results responsive to the query can be identified. The system may transmit a communication to the user device that identifies the set, or a subset thereof. Upon receiving a selection of a result, the system can facilitate assigning access rights corresponding to the identified result to the user. In some instances, a level of precision at which a characteristic of an access-right result is identified and/or whether or how access rights are held depends on a request load. |
| US09430661B2 |
Image forming apparatus performing control of browsing of a file by a terminal, terminal, file browsing control system, image forming method, and recording medium
There is provided an image forming apparatus that eliminates the need for separately preparing an encrypted file for each user. To achieve this, the image forming apparatus performs control of browsing of a browsing file that is browsed at a terminal. The document acquisition portion of the image forming apparatus acquires document data. The document encryption portion encrypts the document data with a public key as the browsing file. The position information setting portion sets position information to permit browsing of the browsing file encrypted by the document encryption portion in a viewer for causing the browsing file to be browsed at the terminal. In the case where it has been determined that the position information coincides with a current position, a browsing execution portion at the terminal uses a secret key to decrypt the browsing file for causing it to be browsed. |
| US09430657B2 |
Data encryption system and method
A data encryption method is implemented by a data encryption system including a processing unit and a plurality of operating units which are electrically connected to the processing unit. Each operating unit includes an encryption element and a memory element storing a plurality of encryption programs. Each encryption program has a different combination of encryption algorithm and encryption mode. The data encryption method includes steps of: selecting one of the encryption programs randomly by each encryption element; receiving, by each encryption element, one of a plurality of keys randomly generated; inputting an unencrypted data; dividing the unencrypted data into a plurality of unencrypted data blocks by the processing unit; and encrypting the unencrypted data blocks according to the selected encryption programs and received keys by the encryption elements, respectively, to generate an encrypted data. A data encryption system is also disclosed. |
| US09430656B2 |
Device for carrying out a cryptographic method, and operating method for same
A device for carrying out a cryptographic method has an input interface for receiving input data, an output interface for outputting output data, and a cryptographic unit for carrying out the cryptographic method. A first functional unit is provided which is designed to convert at least a portion of the input data into transformed input data using a first deterministic method, and to supply the transformed input data to the cryptographic unit, and/or a second functional unit is provided which is designed to convert at least a portion of output data of the cryptographic unit into transformed output data using a second deterministic method, and to supply the transformed output data to the output interface. |
| US09430653B2 |
Protection of user data in hosted application environments
A method of converting an original application into a cloud-hosted application includes splitting the original application into a plurality of application components along security relevant boundaries, mapping the application components to hosting infrastructure boundaries, and using a mechanism to enforce a privacy policy of a user. The mapping may include assigning each application component to a distinct virtual machine, which acts as a container for its assigned component. |
| US09430650B2 |
Method for managing memory space in a secure non-volatile memory of a secure element
The invention relates to a method for managing non-volatile memory space in a secure processor comprising a secure non-volatile internal memory, the method comprising steps of: selecting data elements to remove from the internal memory, generating, by the secure processor, a data block comprising the selected data elements, and a signature computed from the selected data elements using a secret key generated by the secure processor, transmitting the data block by the secure processor, and storing the transmitted data block in an external memory. |
| US09430646B1 |
Distributed systems and methods for automatically detecting unknown bots and botnets
Techniques may automatically detect bots or botnets running in a computer or other digital device by detecting command and control communications, called “call-backs,” from malicious code that has previously gained entry into the digital device. Callbacks are detected using a distributed approach employing one or more local analyzers and a central analyzer. The local analyzers capture packets of outbound communications, generate header signatures, and analyze the captured packets using various techniques. The techniques may include packet header signature matching against verified callback signatures, deep packet inspection. The central analyzer receives the header signatures and related header information from the local analyzers, may perform further analysis (for example, on-line host reputation analysis); determines using a heuristics analysis whether the signatures correspond to callbacks; and generally coordinates among the local analyzers. |
| US09430645B2 |
Method and system for analysis of security events in a managed computer network
An event retrieval and analysis system compares counts of event data for a device to stored profile counts to determine if alerts should be triggered. Event data can be retrieved by a sensor. Rules for analyzing the event data can be retrieved based on the device. The event data is analyzed based on the rules to determine recordable events. Recordable events are organized into categories representing a type or severity of attack. Current event counts are calculated by summing the recordable events for each category. A normal profile is retrieved for the device and compared to the current event count. A percentage change trigger can be retrieved from a threshold matrix based on the current event count. The percentage increase of the current event count over the normal profile is calculated and compared to the percentage change trigger to determine if an alert is triggered by the analysis system. |
| US09430640B2 |
Cloud-assisted method and service for application security verification
A method, device, and system for browser-based application security verification is disclosed. A client device requests a browser-based application from a web server. An application security module of the client device intervenes and transmits an application verification request to a cloud service system. The cloud service system retrieves data regarding the security of the application and source from cloud resources and a local database of the cloud server. The cloud service system then uses the data to authenticate the source and verify the security of the browser-based application. The cloud service system provides the client device with a recommendation regarding the security of the browser-based application and updates its local database. The client device may then consider the recommendation in determining whether to download or execute the browser-based application and provide feedback to the cloud service system. The client device may also perform a local security analysis after receiving the cloud service system's recommendation. |
| US09430635B2 |
Secure display element
Techniques for securely displaying sensitive information against attempts to capture such information via screenshots are introduced. Similar to the pieces of a puzzle, a plurality of images that collectively represent a keypad (for example) are generated and each image represents a different part of the characters. The generated images are to be displayed to a human user in a sequential fashion at at least a predetermined minimum frame rate, such that the plurality of images sequentially displayed are perceivable by the human user collectively as the keypad. In each of the plurality of images, at least a part of the characters of the keypad is disguised or concealed, and in some embodiments, to the extent that not a single character of the keypad is recognizable by a human or a machine. Further, bogus data can be selectively inserted to enhance security. |
| US09430634B1 |
Authentication using gesture passwords
A technique provides user authentication using a smart device (e.g., a smart phone, a tablet, etc.). The technique involves displaying, by processing circuitry of a smart device, a password prompt on a touch screen of the smart device. The password prompt includes a motion video of touch screen gestures to prompt a user of the smart device to enter a gesture password. The technique further involves receiving, by the processing circuitry, a trial gesture password entered by the user via the touch screen. The trial gesture password includes a user-entered sequence of touch screen gestures. The technique further involves performing, by the processing circuitry, multiple gesture password confirmation operations to verify that the user is able to re-enter the trial gesture password via the touch screen over time to authenticate the user to the smart device. |
| US09430628B2 |
Access authorization based on synthetic biometric data and non-biometric data
A method of selectively authorizing access includes obtaining, at an authentication device, first information corresponding to first synthetic biometric data. The method also includes obtaining, at the authentication device, first common synthetic data and second biometric data. The method further includes generating, at the authentication device, second common synthetic data based on the first information and the second biometric data. The method also includes selectively authorizing, by the authentication device, access based on a comparison of the first common synthetic data and the second common synthetic data. |
| US09430626B1 |
User authentication via known text input cadence
A system, method, and computer-readable storage device for receiving data representative of an input sample comprising a user's motion while entering information into a data input device, calculating a statistical summary of the input sample representative data, and comparing, using geometric and geospatial constructs, the calculated statistical summary of the input sample representative data to statistical summaries of representative data of previous input samples in a stored profile of a selected user to generate an indication whether the user is the selected user. |
| US09430625B1 |
Method and system for voice match based data access authorization
A request is received to access protected data from a data access requesting party. Authentication text to be read aloud is then generated and transferred to a first computing system associated with the data access requesting party. The authentication text is then displayed on the first computing system. The access requesting party is then requested to read the authentication text aloud and first audio data is obtained from a first audio detection capability associated with the first computing system and second audio data is obtained from a second audio detection capability associated with a second computing system associated with a data access requesting party. The authentication text is then compared to the first audio data and the second audio data and, if the data matches, the data requesting party is provided access to the protected data. |
| US09430622B2 |
Mini appliance
In one embodiment, a mini appliance comprises: one or more low-power, low-heat, and low sound processors; one or more memories; and one or more software modules performing one or more system-management functionalities. |
| US09430619B2 |
Media decoding control with hardware-protected digital rights management
Innovations in the area of hardware-protected digital rights management (“DRM”) systems are presented. For example, a hardware-protected DRM system includes a trusted layer and untrusted layer. In the untrusted layer, a control module receives source media data that includes encrypted media data. The control module processes metadata about the media data. The metadata, possibly exposed by a module in the trusted layer, is not opaque within the untrusted layer. In the trusted layer, using key data, a module decrypts encrypted media data, which can be the encrypted media data from the source media data or a transcripted version thereof. A module in the trusted layer decodes the decrypted media data. A host decoder in the untrusted layer uses the metadata to manage at least some aspects of the decoding, rendering and display in the trusted layer, without exposure of decrypted media data or key data within the untrusted layer. |
| US09430618B2 |
Messaging administration based on digital rights management services
A method for servicing messages with digital documents accessed and displayed by a client application, including the steps of establishing a database of message queues each associated with one or more digital documents and containing one or more messages, and upon authorizing a user's request for accessing and using a digital document, providing a message queue associated with the digital document. |
| US09430616B2 |
Extracting clinical care pathways correlated with outcomes
Systems and methods for data analysis include constructing patient traces as a set of medical events for each patient of a patient population, the patient population being segmented based on patient outcomes. Medical events in one or more of the patient traces are reduced to provide processed patient traces. The processed patient traces are clustered to identify a cluster of patient traces. A process model is mined, using a processor, representing an aggregation of treatment pathways in the patient traces from the cluster. Patterns from patient traces are identified that are discriminative of patient outcomes. At least one of the patterns is represented with respect to the process model to identify treatment pathways correlated with the patient outcomes. |
| US09430614B2 |
Interventional information brokering medical tracking interface
A method, system, and program product are provided for providing a medical tracking interface. The method comprises the steps of: receiving tracking data from at least one tracking tool in any one of a plurality of data formats; converting the tracking data to a uniform data format; and outputting the tracking data in the uniform data format to an IGI application. |
| US09430613B1 |
System and method for providing access to electronically stored medical information
A system and method of providing access to electronically stored medical information that appoints third party care takers as records custodians with access to a group of individuals' medical information remotely and securely via an electronic device so the medical information and/or personal records may be provided to medical providers during a medical emergency, thereby speeding up the process of one or more group members receiving required medical treatment. |
| US09430605B2 |
Adjusting sizes of connectors of package components
A device includes a plurality of connectors on a top surface of a package component. The plurality of connectors includes a first connector having a first lateral dimension, and a second connector having a second lateral dimension. The second lateral dimension is greater than the first lateral dimension. The first and the second lateral dimensions are measured in directions parallel to a major surface of the package component. |
| US09430603B1 |
Scaling voltages in relation to die location
The method includes identifying, by one or more computer processors, a location that corresponds to an integrated circuit chip on a wafer. The method further includes identifying, by one or more computer processors, an on-chip variation of the integrated circuit chip. The method further includes determining, by one or more computer processes, a desired voltage for the integrated circuit chip based upon the identified on-chip variation of the integrated circuit chip. The method further includes adjusting, by one or more computer processors, the voltage of the integrated circuit chip via a voltage regulated on the integrated circuit chip based upon the determined desired voltage. |
| US09430602B2 |
Semiconductor integrated circuit device and method for designing layout of the same having standard cells, basic cells and a protective diode cell
A method for designing a layout of a semiconductor integrated circuit device includes placing a plurality of standard cells respectively constituting a plurality of functional blocks in a part of a logic circuit placement region, placing a plurality of basic cells in a part of regions of the logic circuit placement region in which no standard cells are placed, and placing at least one diode cell in at least a part of regions of the logic circuit placement region in which no standard cells and no basic cells are placed, the diode cell including a first and a second diode, the first diode being connected between a gate electrode of a predetermined transistor and a first power supply line and the second diode between the gate electrode and a second power supply line. |
| US09430595B2 |
Managing model checks of sequential designs
A method, system or computer usable program product for model checking a first circuit model including determining whether the first circuit model is functionally equivalent to one of a set of prior circuit models stored in persistent memory, and in response to determining functional equivalence, utilizing a processor to provide test results for the functionally equivalent prior circuit model. |
| US09430589B2 |
Safety automation builder
A safety automation builder that assists in development of compliant safety functions for industrial safety systems is provided. The safety automation builder imports a system drawing or image of a user's manufacturing line, machine, or production area, and guides the user through a workflow that facilitates configuration of safety functions for each hazardous access point. The safety automation builder leverages a library of safety devices and encoded knowledge of industrial safety standards to guide the user toward selection of suitable safety devices for mitigating risks associated with the access points. Once configured, the safety automation builder can export the safety function data to an external verification system for confirmation that the configured safety functions comply with the prescribed industrial safety standards. |
| US09430588B2 |
Assembly connection method for attaching virtual parts in a computer aided design software environment
A method and apparatus that allows the user of a computer aided design (CAD) system to connect three-dimensional parts to create a three-dimensional assembly using connections that completely define the attachment between the parts attached to each other by that connection. The user can simultaneously define the orientations of the parts and their behavior. “Behavior” includes whether parts are rigidly connected or allowed to move relative to one and other, and if allowed to move, the nature and limits on that movement. Within any movement allowed, the user may specify key discrete orientations known to be important to the function of the assembly, such as orientations that limit movement within the assembly. The connection method creates a smaller, more consistent representation of the underlying constraints of the assembly, improving the reliability, performance, and ease of use of a CAD system in which it is used. |
| US09430581B2 |
Method and system for detecting slow page load
A method and system for detecting slow page load is provided. An example system comprises a page request detector, a time-out module, a time-out monitor, and a lightweight page requestor. The page request detector may be configured to detect a request for a web page. The time-out module may be configured to commence a time-out period in response to a request for a web page. The time-out module cooperates with the time-out monitor that may be configured to determine that rendering of a rich version of the requested web page has not commenced at an expiration of the time-out period. The lightweight page requestor may be configured to cause a lightweight version of the requested page to be provided to the client system when the time-out monitor determines that the rendering of a rich version of the requested web page has not commenced at an expiration of the time-out period. |
| US09430578B2 |
System and method for anchoring third party metadata in a document
Systems and methods disclosed herein relate to a method of storing metadata for a file on a cloud based storage system. A server may receive a request from a third party application to store metadata for a file. The server may determine a metadata type based on the request. The server may associate the metadata value with an application identifier. The application identifier may identify a third party application. The server may store the metadata value based on the determined metadata type. The stored metadata may be associated with the application identifier and the stored metadata value may include information related to an anchor. The anchor may be an attribute of the file, and anchor can change respectively as the attribute changes. |
| US09430575B2 |
System and method of enhancing consumer ability to obtain information via bar codes
A system and method to use bar codes to facilitate obtaining information as to a product or service are provided. A smart phone, with a downloaded scanning application, can scan a bar code associated with a product or service. Information can be extracted from the code by the phone and the scanning application and forwarded automatically to a web server, via one or more computer networks. The server can analyze the information and extract other, responsive data from its data base. The responsive data can be downloaded to the scanning device for use with the product or service. |
| US09430572B2 |
Method and system for user profiling via mapping third party interests to a universal interest space
Method, system, and programs for mapping data. Information related to users and their interests is obtained by a first application from a second application. An interest space is determined based on one or more sources of information, each of which provides a plurality of concepts. A data structure is created with respect to the interest space, where the data structure has a plurality of attributes each of the attributes corresponds to a concept in the interest space. One or more interests for each of the users based on information obtained from the second application. Each user interest corresponds to an attribute in the structure. A user profile is generated for each user by mapping the interests of the user to the corresponding attributes in the structure. |
| US09430570B2 |
Systems and methods for determining information and knowledge relevancy, relevant knowledge discovery and interactions, and knowledge creation
Systems and methods for determining user specific information and knowledge relevancy, relevant knowledge and information discovery, user intent and relevant interactions via intelligent messaging, collaboration, sharing and information categorization, further delivering created knowledge accessible through a personalized user experience. |
| US09430568B2 |
Method and system for querying information
Performing a query includes receiving a user input, determining a first set of query keywords based at least in part on the user input, obtaining, based on at least some of the first set of query keywords, a user feedback log that includes historical query results, determining a second set of query keywords based on the user feedback log, and making a query based on at least some of the second set of query keywords. |
| US09430566B2 |
Control of web content tagging
The integrity of an existing tag set associated with a web module is protected by reviewing user-generated proposed additions to the tag set to determine whether the proposed addition is appropriate. An initial test is made to determine whether a proposed addition is trivial; e.g., includes strings of the same character. If the proposed addition is not found to be trivial, it is assessed to determine its relatedness to the existing tag set. The proposed addition is made a part of the tag set only if it is found to be sufficiently related to the existing tag set. |
| US09430563B2 |
Document processing employing probabilistic topic modeling of documents represented as text words transformed to a continuous space
A set of word embedding transforms are applied to transform text words of a set of documents into K-dimensional word vectors in order to generate sets or sequences of word vectors representing the documents of the set of documents. A probabilistic topic model is learned using the sets or sequences of word vectors representing the documents of the set of documents. The set of word embedding transforms are applied to transform text words of an input document into K-dimensional word vectors in order to generate a set or sequence of word vectors representing the input document. The learned probabilistic topic model is applied to assign probabilities for topics of the probabilistic topic model to the set or sequence of word vectors representing the input document. A document processing operation such as annotation, classification, or similar document retrieval may be performed using the assigned topic probabilities. |
| US09430562B2 |
Classifier indexing
Provided are, among other things, systems, methods and techniques for document-based processing. In one implementation, a document is input; features are extracted from it; an index is queried using at least a subset of the extracted features and, in response, identifications for selected document classifiers are received from a larger pool of document classifiers; the document is processed using individual ones of the selected document classifiers, thereby generating corresponding classifier outputs; and then, based on such classifier outputs, (1) the document is categorized within a computer database and/or (2) feedback information is provided to a user. |
| US09430561B2 |
Formation of topic profiles for prediction of topic interest groups
An analysis system analyzes known user affinities to identify particular objects that serve as useful predictors of whether a given user will have an affinity for a given topic, even if the user has not previously expressly specified an affinity for that topic. Specifically, both the topic group of users associated with a given topic and the category group of users associated with the topic's more general category are identified. For each of a set of objects, degrees of divergence between the topic group and the category group are evaluated for a criterion evaluated with respect to the object. A topic profile is created based on objects for which there is a high degree of divergence. |
| US09430559B2 |
Document retrieval using internal dictionary-hierarchies to adjust per-subject match results
Techniques for managing big data include retrieval using per-subject dictionaries having multiple levels of sub-classification hierarchy within the subject. Entries may include subject-determining-power (SDP) scores that provide an indication of the descriptive power of the entry term with respect to the subject of the dictionary containing the term. The same term may have entries in multiple dictionaries with different SDP scores in each of the dictionaries. A retrieval request for one or more documents containing search terms descriptive of the one or more documents can be processed by identifying a set of candidate documents tagged with subjects, i.e., identifiers of per-subject dictionaries having entries corresponding to a search term, then using affinity values to adjust the aggregate score for the terms in the dictionaries. Documents are then selected for best match to the subject based on the adjusted scores. Alternatively, the adjustment may be performed after selecting the documents by re-ordering them according to adjusted scores. |
| US09430558B2 |
Automatic data interpretation and answering analytical questions with tables and charts
A method providing an answer to at least one analytical question containing at least one table or at least one chart is provided. The method may include receiving an input question. The method may also include extracting a plurality of information from the input question based on a natural language analysis. The method may further include forming a well-defined sentence. The method may include extracting at least one table or at least one chart associated with the input question. The method may include forming at least one mathematical equation. The method may also include solving the at least one mathematical equation. The method may include determining the answer to the input question in natural language based on the solved at least one mathematical equation. The method may further include narrating the determined answer to the input question in natural language. |
| US09430556B2 |
System for self-distinguishable identifier and generation
Disclosed herein is a framework for generating and providing self-distinguishable identifiers as to users. In accordance with one aspect, an entry is retrieved from an object, wherein the entry includes one or more fields. The one or more fields may be concatenated to create a concatenated string. The framework may then determine if the concatenated string is unique from other concatenated strings in a listing of the object. If the concatenated string is determined to be not unique, a unique sequence identifier may be added to the concatenated string. |
| US09430551B1 |
Mirror resynchronization of bulk load and append-only tables during online transactions for better repair time to high availability in databases
In a mirrored database system, mirror resynchronization of bulk load and append-only tables during ongoing transactions is optimized for quick repair and high availability by catching up any changes to primary database tables that have not been made to mirror database tables during the transaction itself, and making changes due to ongoing transactions when the databases are synchronized to the resynchronization process. |
| US09430547B2 |
Implementation of clustered in-memory database
An in-memory database system and method for administrating a distributed in-memory database, comprising one or more nodes having modules configured to store and distribute database partitions of collections partitioned by a partitioner associated with a search conductor. Database collections are partitioned according to a schema. Partitions, collections, and records, are updated and removed when requested by a system interface, according to the schema. Supervisors determine a node status based on a heartbeat signal received from each node. Users can send queries through a system interface to search managers. Search managers apply a field processing technique, forward the search query to search conductors, and return a set of result records to the analytics agents. Analytics agents perform analytics processing on a candidate results records from a search manager. The search conductors comprising partitioners associated with a collection, search and score the records in a partition, then return a set of candidate result records after receiving a search query from a search manager. |
| US09430546B2 |
Systems and methods for managing delta version chains
A system, a method, and a computer program product for managing delta version chains are provided. A version chain having a plurality of versions of data is provided. A first delta-compressed version and a second delta-compressed version corresponding to a first version of data in the version chain and a second version of data in the version chain, respectively, are selected. A third delta-compressed version configured to be independent of at least one of the first delta-compressed version and the second delta-compressed version and further configured to contain at least one third instruction determined based on at least one of the following: the first insert instruction, the second insert instruction, the first copy instruction, and the second copy instruction, is generated. |
| US09430537B2 |
Method and system for limiting share of voice of individual users
Example embodiments describe a system and method for limiting shares of voice of individual users in a result set. In example embodiments, a user providing each publication in a result set of a search is identified. Sorting criteria indicating a number of publications a same user is allowed within a number of consecutive publications of the result set are reviewed. Using the sorting criteria, a sorted result set is generated by sorting the plurality of publications in accordance with the sorting criteria. The sorted result set is provided to a searching user. |
| US09430528B2 |
Grid queries
Aspects of the subject matter described herein relate to grid queries. In aspects, a client sends search criteria that represent two or more dimensions to a service. The service obtains results that satisfy the search criteria and performs intersection operations to populate a data grid. The data grid is then returned to the client for output on an output device of the client. The client may provide a user interface that allows quick updating of the search criteria to obtain a new data grid. |
| US09430526B2 |
Method and system for temporal aggregation
A method, database system and computer program are disclosed for optimizing a SQL query, in which the SQL query seeks to aggregate temporal database information. The method includes determining whether two rows of information have a common grouping value, and if so, determining both temporal overlap and temporal non-overlap components of the two rows, aggregating each of the temporal overlap components of the two rows, and separating the temporal non-overlap components of the two rows. |
| US09430524B1 |
RLE-aware optimization of SQL queries
SQL queries are optimized to operate directly on compressed data (and obtain the correct result) rather than requiring that the data be first decompressed prior to processing a query. Certain characteristic pattern trees are mapped against a logical input query plan that includes certain logical operators such as a DECOMPRESS that precedes a JOIN or a GROUPBY in association with a COUNT to identify instances in the plan that match a characteristic pattern. Upon locating a match, the input query plan is transformed into a logically equivalent plan that operates correctly on compressed data, by analyzing the interplay of the semantics of logical query operations with the compressed data and substituting less costly structures and operations. DECOMPRESS operations are moved to operate subsequent to a JOIN or eliminated altogether, and COUNT operations are replaced by a different operation, such as SUM, that is logically equivalent for compressed data. |
| US09430518B2 |
Spiritual research system and method
A computerized system and method are presented that provide access to a research archive for researching fundamental texts of a variety of spiritual and religious domains. The research archive is oriented around ideas having snippets from the fundamental texts. Each idea is associated with a single life issue tag and a religious or spiritual domain. Each idea is further associated with a fixed number of commentaries that comment on the snippet from the point of view of the religious domain and its relationship to the associated life issue tag. The fixed number of commentaries are each written with respect to a particular role. |
| US09430514B1 |
Locking metadata associated with catalog items
Disclosed are various embodiments for locking metadata associated with catalog items. An identifier of an item in the item catalog and update metadata associated with the item are received. Responsive to the receipt, it is determined whether a lock against modification is associated with the identified item. Responsive at least in part to the determination that the identified item is associated with a lock, the identified item is left unmodified in the item catalog rather than modifying the identified item in accordance with the update metadata. |
| US09430513B1 |
Methods and apparatus for archiving system having policy based directory rename recording
Methods and apparatus for archiving files in a content addressable storage (CAS) system with support for folder renames on the CAS and optimizing the same by filtering unnecessary folder renames from being recorded on the CAS based on folder rename flush policy. |
| US09430512B2 |
Method and/or system for manipulating tree expressions
Embodiments of methods and/or systems of manipulating tree expressions are disclosed. |
| US09430509B2 |
Event timeline generation
A method selects events from an event log for presentation along a timeline. The method may receive information associated with the timeline to define an interval of interest and a partition size, and divide the timeline into a plurality of segments based on the partition size. The method may further identify each segment having at least one relevant event within the segment, where a relevant event is an event which starts within a segment and overlaps with the interval of interest. The method may determine parameters associated with at least one relevant event for each identified segment, and provide the determined parameters along with an index which designates each identified segment. The determined parameters may be provided to a client to generate the timeline of the at least one relevant event. An apparatus can implement the method to select events from an event log which are associated with a defined time interval. |
| US09430505B2 |
Automated data warehouse migration
Systems, apparatus, computer-readable storage media, and methods are disclosed for allowing analysis, migration, and validation of data from a source environment (such as an RDBMS system) to a target environment (such as a data warehouse (DW) appliance). In one example, a method comprises analyzing a source database, a source ETL environment, a target database, and a target ETL environment to produce configuration data, the configuration data being used for generating a mapping of the source database to a target database in the target database environment, a mapping of the source DDL code to target DDL code in the target database environment, and a mapping of source ETL code to target ETL code for the target database environment, and migrating at least one table from the source database, at least a portion of the source DDL code, and at least a portion of the source ETL code to the target database environment, where the migrating is based at least in part on the mapping generated using the configuration data. |
| US09430501B1 |
Time sanitization of network logs from a geographically distributed computer system
Time correction records are created for correcting timestamps of network logs to identify timing of network events in a predetermined time reference frame, the network logs being created by logging devices generating the timestamps in device time reference frames. For each logging device, one or more network events are generated or identified at respective event times in the predetermined time reference frame, each network event having a corresponding event-related network log from the logging device and a respective timestamp in a device time reference frame. For each network event, a respective difference value is calculated as a difference between the event time and a respective timestamp from a network log. For each logging device, a selection function is applied to the difference values to calculate a correction value, and the correction value is stored along with an identifier of the logging device in a time correction record. |
| US09430499B2 |
Automated feature extraction from imagery
Embodiments of the invention are directed to a computer-implemented system and method of identifying human settlements in imagery comprising receiving an image, segmenting the image into a plurality of superpixels, analyzing statistical parameters of at least two or more of the plurality of superpixels, where the statistical parameters includes entropy data, and identifying groups of superpixels having at least a predetermined cluster density and a predetermined entropy. Some embodiments further include clipping the image to only include the identified groups of superpixels having the predetermined cluster density and entropy, analyzing statistical parameters of the clipped image, analyzing geometric factors of the clipped image, determining one or more settlements based on the statistical parameters and geometric factors of the superpixels, and identifying a shape and area of the one or more settlements based on the statistical parameters and geometric factors of the clipped image. |
| US09430497B2 |
Trip replay for an aquatic geographic information system
A method of replaying measured data points includes receiving positions of a watercraft from a monitoring system, receiving sonar pings of a water body from the monitoring system at the positions of the watercraft, and aligning each of the sonar pings to each of the watercraft positions at which each of the sonar pings was taken. The method also includes generating a sonar image using the of sonar pings, providing a map of the water body, displaying the map including a pathway with an indicating point with the pathway representing the watercraft positions, and displaying the sonar image including an indicating line alongside of the contour map wherein the indicating line on the sonar image corresponds to the indicating point on the pathway. |
| US09430488B2 |
File update tracking
Embodiments are directed towards managing and tracking item identification of a plurality of items to determine if an item is a new or existing item, where an existing item has been previously processed. In some embodiments, two or more item identifiers may be generated. In one embodiment, generating the two or more item identifiers may include analyzing the item using a small item size characteristic, a compressed item, or for an identifier collision. The two or more item identifiers may be employed to determine if the item is a new or existing item. In one embodiment, the two or more item identifiers may be compared to a record about an existing item to determine if the item is a new or existing item. If the item is an existing item, then the item may be further processed to determine if the existing item has actually changed. |
| US09430484B2 |
Data redundancy in a cluster system
A cluster system includes a plurality of computing nodes connected to a network, each node including one or more storage devices. The cluster system stores data and at least one of data replicas or erasure-coded segments across the plurality of nodes based on a redundancy policy. Further, configuration information, which may be indicative of a data placement of the data and the data replicas or erasure-coded segments on the plurality of nodes, is provided to each of the plurality of nodes. Additionally, each of the nodes may act as a first node which is configured to determine, upon a change of the redundancy policy, updated configuration information based on the change of the redundancy policy and to send a message including information indicating the change of the redundancy policy to the other nodes of the plurality of nodes. |
| US09430483B1 |
Automatic file system migration to a network attached storage system
Techniques for automatic file system migration to a network attached storage (NAS) device or system. For example, a method comprises the following steps. A first network attached storage system and a second network attached storage system are designated. A file system on the first network attached storage system is selected to migrate to the second network attached storage system, at least one criterion of the file system on the second network attached storage system is defined, and a configuration of the second network attached storage system is automatically determined based on the defined criterion. |
| US09430480B1 |
Active-active metro-cluster scale-out for unified data path architecture
A technique for providing active-active access to pooled block-based objects and pooled file-based objects by multiple storage processors over distance in a metro-cluster includes virtualizing locally attached LUNs and making the virtualized LUNs available to all the storage processors in the metro-cluster. Storage pools and internal file systems operate on each of the storage processors and coordinate with one another to maintain consistent storage allocation and a consistent file system image across all storage processors in the metro-cluster. The resulting arrangement allows storage processors in the metro-cluster to access both block-based data objects and file-based data objects in an active-active manner, while maintaining consistency across all storage processors and allowing customers to benefit from the advantages of pooled data objects. |
| US09430478B2 |
Anchor image identification for vertical video search
Anchor images and information associated therewith are accumulated during a Web crawling operation. One or more rules are applied to the accumulated candidate anchor images to filter out candidate anchor images that are not appropriate for use as the anchor image for a particular target video. The remaining candidate anchor image is then selected as the anchor image for the particular video. |
| US09430475B2 |
Method for providing information to a user of a motor vehicle
A method is disclosed in which a configuration code identifying the type and specification of a vehicle (1) is stored in a memory device (2) during manufacture of the vehicle (1). Information relating to one or more types of vehicle is uploaded into a mass storage device (3) located on the vehicle from an external data source (4). The stored configuration code is then used to select from the information stored on the mass storage device (3) only the information relating to the particular vehicle (1) so that only relevant information can be accessed by a user of the vehicle (1). The method may also include restricting the information provided if the vehicle speed is above a predetermined vehicle speed. |
| US09430474B2 |
Automated multimedia content recognition
An automated content recognition system accurately and reliably generates content identification information for multimedia content without accessing the multimedia content or a reliable source of the multimedia content. The system receives content-based queries having fingerprints of multimedia content. The system compares the individual queries to one another to match queries and thereby form query clusters that correspond to the same multimedia content. The system aggregates identification information from the queries in a cluster to generate reliable content identification information from otherwise unreliable identification information. |
| US09430465B2 |
Hybrid, offline/online speech translation system
A hybrid speech translation system whereby a wireless-enabled client computing device can, in an offline mode, translate input speech utterances from one language to another locally, and also, in an online mode when there is wireless network connectivity, have a remote computer perform the translation and transmit it back to the client computing device via the wireless network for audible outputting by client computing device. The user of the client computing device can transition between modes or the transition can be automatic based on user preferences or settings. The back-end speech translation server system can adapt the various recognition and translation models used by the client computing device in the offline mode based on analysis of user data over time, to thereby configure the client computing device with scaled-down, yet more efficient and faster, models than the back-end speech translation server system, while still be adapted for the user's domain. |
| US09430462B2 |
Guided article authorship
A method includes, determining a target publication, identifying one or more content suggestions associated with the target publication, and causing a user to be prompted to input content. The input content satisfies at least a portion of the one or more content suggestions. |
| US09430458B2 |
List-based interactivity features as part of modifying list data and structure
Embodiments are provided that include interactive electronic list features and functionality, but are not so limited. In an embodiment, a method is configured to enable users to directly manipulate list content and/or structure in context. A system of an embodiment includes at least one client and a server system to manage aspects of electronic lists, including providing visualization features that correspond with pre-selection, post-selection, and/or editing states or inputs. Other embodiments are also disclosed. |
| US09430455B2 |
Methods and systems for intelligent form-filling and electronic document generation
Methods and systems are disclosed for intelligent form-filling and electronic document generation. One method may include generating a decision tree representing questions which facilitates the completion of a form having one or more data fields. The method may comprise: inputting the questions into a computing device, wherein the questions relate to data to be filled into the one or more data fields of the form; arranging an order of the questions in the computing device based on possible answers given; and using the computing device to automatically generate the decision tree based on the questions, the possible answers, and the order of the questions. |
| US09430454B2 |
Real-time document sharing and editing
Methods, systems and apparatus, including computer program products, for real-time document sharing and editing. In one aspect, a method includes comparing a first user's and a second user's changes to a document, the document being edited by the first user and the second user concurrently; and notifying the first user of a conflicting change and content of any conflicting change to the document made by the first user but not Made to the document because of the conflicting change. In another aspect, a method includes recording a saved position of a cursor of a user editing a client-side copy of a document; receiving an update to the document and generating an updated client-side copy of the document; using the saved position to determine an updated position of the cursor; and displaying to the user the updated client-side copy of the document with the cursor displayed at the updated position. |
| US09430452B2 |
Memory model for a layout engine and scripting engine
Various embodiments provide an interface between a Web browser's layout engine and a scripting engine. The interface enables objects from the layout engine to be recognized by a memory manager in the scripting engine and interact in a streamlined, efficient manner. In accordance with one or more embodiments, the interface allows browser layout engine objects to be created as objects that are native to the scripting engine. Alternately or additionally, in some embodiments, the native objects are further configured to proxy functionality between the layout engine and the scripting engine. |
| US09430451B1 |
Parsing author name groups in non-standardized format
The present invention is directed to a method and corresponding system for parsing author name text strings in documents. The method and system may electronically scan a document that contains an author name text string comprising a set of initials, one or more author surnames, and punctuation. The author name text string may be in non-standardized format. The method and system may identify a character sequence in the document as potentially being the author name test string based on (i) a sequence of title-case words, capital letter, and punctuation, and (ii) the character sequence ending with a recognized indicator. The method and system may parse the identified character sequence by converting any punctuation and whitespace between terms in the character sequence to a single space character, identifying a pattern of surname and set of initials comprising each author name contained in the character sequence, and marking up the components of surname and set of initials comprising each author name. The method and system may use the marked up character sequence to identify and correct errors in punctuation and capitalization in the character sequence, and output an updated character sequence in standardized format. |
| US09430450B1 |
Automatically adapting accessibility features in a device user interface
A method of scaling font size on a user interface of a mobile communication device. The method comprises presenting a message in a first font size on a display of the mobile communication device, and after a predefined delay of time, presenting the message in a second font size on the display of the mobile communication device, where the second font size is larger than the first font size. The method further comprises receiving a selection of a font size and, based on the font size selection, determining and presenting an altered flow of screens and icons automatically in the user interface of the mobile communication device with the selected font size. |
| US09430448B2 |
System and methods for the cluster of media
A computer implemented method for the cluster of media, the method comprises, selecting a media search source via a user interface; providing a form-based interface that allow the entry of inputs to form a media search query; submitting the media search query to the media search source; receiving a media search result for viewing on the user interface based on the media search query, the media search result comprising media items; displaying the media search result in a collection depository on the user interface; and clustering the media items into one or more stacks having a variable number of the media items, wherein the method is performed by one or more processors adapted to execute instructions stored on one or more memory components of the computer, is described herein. |
| US09430447B1 |
Presenting media content based on parsed text
Methods and systems are provided for presenting media content based on parsed text. Text may be received and a referenced media entity may be identified in the text. A search may be conducted for media content related to the referenced media entity. A content item may be identified based on a result of the search, and the content item may be presented to a first user. The referenced media entity may be a song, a book, an author, an actor, an artist, an album, a song, a producer, a person, a title, a movie, a concert, a show, a television program, a video, a newspaper, a magazine, a celebrity, a personality, and a character. Additionally, user information about the first user may be received and presentation of the content item may be based on the user information about the first user. |
| US09430445B2 |
Document editor and method for editing document
The present invention provides a document editor and a method for editing document to facilitate the collaboration between users. The document editor comprises a user interface for editing and displaying document information; a dispatcher for identifying objects in the user interface and their identifiers according to object definition, and providing the object information to the user interface; and at least one connector, for communicating with remote or local service using the identifier and address of at least one of the objects, to exchange the object information with the remote or local service and transfer the information to the dispatcher. According to the document editor and the method for editing document, a user could obtain more information of the object embedded in the document and effectively avoid operation failure on the object. |
| US09430438B2 |
Communication bus with zero power wake function
A two wire bidirectional bus system is provided in which at least one of the slave nodes is configured to enter into a sleep mode, thereby minimizing power drainage, whenever the bus master stops transferring data over the bidirectional bus, and to wake up whenever the bus master begins to transfer data over the bidirectional bus. |
| US09430434B2 |
System and method for conserving memory power using dynamic memory I/O resizing
Systems and methods are disclosed for conserving power consumption in a memory system. One such system comprises a DRAM memory system and a system on chip (SoC). The SoC is coupled to the DRAM memory system via a memory bus. The SoC comprises one or more memory controllers for processing memory requests from one or more memory clients for accessing the DRAM memory system. The one or more memory controllers are configured to selectively conserve memory power consumption by dynamically resizing a bus width of the memory bus. |
| US09430433B1 |
Multi-layer distributed network
Apparatuses and processes for distributing signals in an integrated circuit are disclosed. An embodiment to use a custom layer together with a base layer on an integrated circuit for testing the integrated circuit includes having a structured network on the base layer. The custom layer connects the network to logic elements on the integrated circuit. The network may be evenly distributed across the base layer of the integrated circuit. Even distribution of the network may reduce skew of the test signals. Buffers are also placed along the structured network. The buffers may be placed to ensure a deterministic test signals distribution. Unused buffers in the base layer may be tied off to reduce current leakage. |
| US09430432B2 |
Optimized multi-root input output virtualization aware switch
In one implementation, an optimized multi-root input-output virtualization (MRIOV) aware switch configured to route data between multiple root complexes and I/O devices is described. The MRIOV aware switch may include two or more upstream ports and one or more downstream ports. Each of an upstream port and a downstream port may include a media access controller (MAC) configured to negotiate link width and link speed for exchange of data packets between the multiple root complexes and the I/O devices. Each of an upstream port and a downstream port may further include a clocking module configured to dynamically configure a clock rate of processing data packets based one or more negotiated link width and negotiated link speed, and a data link layer (DLL) coupled to the MAC configured to operate at the clock rate, wherein the clock rate is indicative of processing speed. |
| US09430427B2 |
Structured block transfer module, system architecture, and method for transferring
Structured block transfer module, system architecture, and method for transferring content or data. Circuit allowing content in one memory to be shifted, moved, or copied to another memory with no direction from a host., the circuit comprising: a connection manager, at least one copy engine, and a connection between the connection manager and the copy engine. Method for transferring the contents of one of a number of blocks of source memory to one of a number of possible destination memories comprising: selecting source memory; selecting available destination memory; marking the selected destination as no longer available; copying contents of selected source memory into selected destination memory; and marking selected source as available. |
| US09430423B2 |
Embedded multimedia card (eMMC), host controlling eMMC, and method operating eMMC system
An eMMC includes flash memory including an extended card specific data (CSD) register (“EXT_CSD register”), and an eMMC controller that controls operation of the flash memory. The eMMC controller is receives a clock from a host via a clock line, receives a SEND_EXT_CSD command from the host via a command line, and provides the host with eMMC information stored in the EXT_CSD register via a data bus in response to the SEND_EXT_CSD command, the eMMC information including maximum operating frequency information for the eMMC. |
| US09430419B2 |
Synchronizing exception control in a multiprocessor system using processing unit exception states and group exception states
A data processing apparatus is provided with a plurality of processing units executing respective streams of program instructions corresponding to respective processing threads. Exception control circuitry controls exception processing for a group of the processing units in response to an exception triggering event. Each of the processing units moves only once and in sequence between normal, in-exception, and done-exception states in response to a given exception event. A group of processing units moves in sequence between states normal, triggering, and completing in response to the exception event. A counter value is used to track the number of processing units which have entered exception processing and then to track the number of processing units which have completed their exception processing. |
| US09430418B2 |
Synchronization and order detection in a memory system
Embodiments relate to out-of-synchronization detection and out-of-order detection in a memory system. One aspect is a system that includes a plurality of channels, each providing communication with a memory buffer chip and a plurality of memory devices. A memory control unit is coupled to the plurality of channels. The memory control unit is configured to perform a method that includes receiving frames on two or more of the channels. The memory control unit identifies alignment logic input in each of the received frames and generates a summarized input to alignment logic for each of the channels of the received frames based on the alignment logic input. The memory control unit adjusts a timing alignment based on a skew value per channel. Each of the timing adjusted summarized inputs is compared. Based on a mismatch between at least two of the timing adjusted summarized inputs, a miscompare signal is asserted. |
| US09430417B2 |
Sequential memory access operations
Methods of operating a memory include performing a memory access operation, obtaining an address corresponding to a subsequent memory access operation prior to stopping the memory access operation, stopping the memory access operation, sharing charge between access lines used for the memory access operation and access lines to be used for the subsequent memory access operation, and performing the subsequent memory access operation. |
| US09430416B2 |
Pattern-based service bus architecture using activity-oriented services
A pattern-based service bus includes a plurality of bus endpoints, a bus-hosted service, and a bus storage component. The plurality of bus endpoints interact with bus participants external to the pattern-based service bus, wherein each of the plurality of bus endpoints are identified by a unique address, and type of interaction to be provided by the bus endpoint. The bus-hosted service implements patterns that define allowed interactions between each of the plurality of bus endpoints and the bus-hosted service, wherein the implemented patterns can be utilized by the plurality of bus endpoints to interact with the bus-hosted service. The bus storage component interacts with the bus-hosted service to store information relevant to operation of the pattern-based service bus. |
| US09430413B2 |
Detecting state loss on a device
This document describes techniques for detecting state loss on a device. These techniques permit a computer connected to a device to forgo, in many cases, reinitializing the device when returning to a normal-power mode. |
| US09430412B2 |
NVM express controller for remote access of memory and I/O over Ethernet-type networks
A method and system for enabling Non-Volatile Memory express (NVMe) for accessing remote solid state drives (SSDs) (or other types of remote non-volatile memory) over the Ethernet or other networks. An extended NVMe controller is provided for enabling CPU to access remote non-volatile memory using NVMe protocol. The extended NVMe controller is implemented on one server for communication with other servers or non-volatile memory via Ethernet switch. The NVMe protocol is used over the Ethernet or similar networks by modifying it to provide a special NVM-over-Ethernet frame. |
| US09430408B2 |
Apparatuses for securing program code stored in a non-volatile memory
An embodiment of an apparatus for securing program code stored in a non-volatile memory is introduced. A non-volatile memory contains a first region and a second region. Two NVMMCS (non-volatile memory management controllers respectively coupled to the two regions. A programming command-and-address decoder is coupled to the NVMMCS. The programming command-and-address decoder instructs the first NVMMC to erase data from the first region when receiving a command to erase the first region via a programming interface, and instructs the second NVMMC to erase data from the second region when receiving a command to erase the second region via the programming interface. |
| US09430407B2 |
Method and system for secure storage and retrieval of machine state
A machine state vector is received at a memory. The machine state vector has a machine state and a machine identifier. Write access qualification is met if the machine state entry is an initial write, or if the machine identifier matches the machine identifier of a stored machine state vector, and machine identifier and machine state are stored in the memory. A fetch machine state request is received, having a requestor machine identifier. A machine state retrieval qualification is met by the requestor machine identifier matching the stored machine identifier, and the machine state is retrieved. |
| US09430396B2 |
Updating persistent data in persistent memory-based storage
A processor includes a processing core to execute an application including instructions encoding a transaction with a persistent memory via a volatile cache that includes a cache line associated with the transaction, the cache line being associated with a cache line status, and a cache controller operatively coupled to the volatile cache, the cache controller, in response to detecting a failure event, to, in response to determining that the cache line status that the cache line is committed, evict contents of the cache line to the persistent memory, and in response to determining that the cache line status indicating that the cache line is uncommitted, discard the contents of the cache line. |
| US09430395B2 |
Grouping and dispatching scans in cache
A method, system, and computer program product for grouping and dispatching scans in a cache directory of a processing environment is provided. A plurality of scan tasks is aggregated from a scan wait queue into a scan task queue. The plurality of scan tasks is determined by selecting one of (1) each of the plurality of scan tasks on the scan wait queue, (2) a predetermined number of the plurality of scan tasks on the scan wait queue, and (3) a set of scan tasks of a similar type on the scan wait queue. A first scan task from the plurality of scan tasks is selected from the scan task queue. The scan task is performed. |
| US09430394B2 |
Storage system having data storage lines with different data storage line sizes
A storage system includes a data storage device having a plurality of data storage lines, a tag storage device having a plurality of address tags each associated with one data storage line allocated in the data storage device, and a controller. The controller sets a first number of address tags and configures a first number of data storage lines to serve as a first data storage line with a first data storage line size, and sets a second number of address tags and configures a second number of data storage lines to serve as a second data storage line with a second data storage line size. The second data storage line size is different from the first data storage line size. |
| US09430391B2 |
Managing coherent memory between an accelerated processing device and a central processing unit
Existing multiprocessor computing systems often have insufficient memory coherency and, consequently, are unable to efficiently utilize separate memory systems. Specifically, a CPU cannot effectively write to a block of memory and then have a GPU access that memory unless there is explicit synchronization. In addition, because the GPU is forced to statically split memory locations between itself and the CPU, existing multiprocessor computing systems are unable to efficiently utilize the separate memory systems. Embodiments described herein overcome these deficiencies by receiving a notification within the GPU that the CPU has finished processing data that is stored in coherent memory, and invalidating data in the CPU caches that the GPU has finished processing from the coherent memory. Embodiments described herein also include dynamically partitioning a GPU memory into coherent memory and local memory through use of a probe filter. |