最新美国发明专利
Document Document Title
US09391223B2 Photovoltaic sheathing element with a flexible connector assembly
The present invention is premised upon an assembly including at least a photovoltaic sheathing element capable of being affixed on a building structure, the sheathing element including at least: a photovoltaic cell assembly, a body portion attached to one or more portions of the photovoltaic cell assembly; at least a first and a second connector assembly disposed on opposing sides of the sheathing element and capable of directly or indirectly electrically connecting the photovoltaic cell assembly to at least two adjoining devices that are affixed to the building structure and wherein at least one of the connector assemblies includes a flexible portion; one or more connector pockets disposed in the body portion the pockets capable of receiving at least a portion of the connector assembly.
US09391220B2 System and method for interfacing large-area electronics with integrated circuit devices
A system and method for interfacing large-area electronics with integrated circuit devices is provided. The system may be implemented in an electronic device including a large area electronic (LAE) device disposed on a substrate. An integrated circuit IC is disposed on the substrate. A non-contact interface is disposed on the substrate and coupled between the LAE device and the IC. The non-contact interface is configured to provide at least one of a data acquisition path or control path between the LAE device and the IC.
US09391219B2 Photovoltaic apparatus
A photovoltaic apparatus includes a support substrate; a back electrode layer on the support substrate; a light absorbing layer on the back electrode layer; and a front electrode layer on the light absorbing layer, wherein the support substrate comprises: a base layer; a first stepped portion on the base layer; and a second stepped portion disposed aside the first stepped portion on the base layer, and wherein the second stepped portion is thicker than the first stepped portion.
US09391214B2 Varactor structure
A MOS varactor structure comprising a semiconductor body having a well region and a plurality of gate electrodes and a plurality of cathode electrodes arranged over the well region, wherein the gate electrodes comprise elongate pads, and the plurality of cathode contacts are connected by a cathode connection pattern, the cathode connection pattern comprising a plurality of arms, each of the plurality of arms arranged to extend over a part of a respective gate electrode pad.
US09391213B2 Thin film transistor and display device using the same
In a bottom gate thin film transistor using a first oxide semiconductor layer as a channel layer, the first oxide semiconductor layer and second semiconductor layers include In and O. An (O/In) ratio of the second oxide semiconductor layers is equal to or larger than that of the first oxide semiconductor layer, and a film thickness thereof is thicker than that of the first oxide semiconductor layer.
US09391206B2 Methods of forming transistors
Some embodiments include methods of forming transistors. Recesses are formed to extend into semiconductor material. The recesses have upper regions lined with liner material and have segments of semiconductor material exposed along lower regions. Semiconductor material is isotropically etched through the exposed segments which transforms the recesses into openings having wide lower regions beneath narrow upper regions. Gate dielectric material is formed along sidewalls of the openings. Gate material is formed within the openings and over regions of the semiconductor material between the openings. Insulative material is formed down the center of each opening and entirely through the gate material. A segment of gate material extends from one of the openings to the other, and wraps around a pillar of the semiconductor material between the openings. The segment is a gate of a transistor. Source/drain regions are formed on opposing sides of the gate.
US09391202B2 Semiconductor device
The semiconductor device including: a semiconductor layer extending in a first direction, the semiconductor layer including a pair of source/drain regions and a channel region, a gate extending on the semiconductor layer to cover the channel region, and a gate dielectric layer interposed between the channel region and the gate, a corner insulating spacer having a first surface and a second surface, the first surface extending in the second direction along a side wall of the gate, the first surface covering from a side portion of the gate dielectric layer to at least a portion of the side wall of the gate, and the second surface covering a portion of the semiconductor layer, and an outer portion insulating spacer covering the side wall of the gate above the corner insulating spacer, the outer portion insulating spacer having a smaller dielectric constant than the corner insulating spacer, may be provided.
US09391198B2 Strained semiconductor trampoline
A method of forming a strained trampoline including: forming a strain inducing layer on a semiconductor-on-insulator (SOI), the SOI having a semiconductor layer on an insulator layer and the insulator layer is on a handle substrate; forming a opening through the semiconductor layer and the insulator layer using a patterned hardmask; forming a trampoline support in the opening; forming a trench through the strain inducing layer and through the semiconductor layer exposing a portion of the insulator layer, a strained trampoline is a portion of the semiconductor layer with a boundary defined by the trampoline support and the trench; and removing the insulator layer through the trench, where the strained trampoline is supported by the trampoline support.
US09391192B2 Field effect semiconductor component and method for producing it
What is provided is a field effect component including a semiconductor body, which extends in an edge zone from a rear side as far as a top side and which includes a semiconductor mesa, which extends in a vertical direction, which is perpendicular to the rear side and/or the top side. The semiconductor body in a vertical cross section further includes a drift region, which extends at least in the edge region as far as the top side and which is arranged partly in the semiconductor mesa, and a body region, which is arranged at least partly in the semiconductor mesa and which forms a pn junction with the drift region. The pn junction extends between two sidewalls of the semiconductor mesa.
US09391191B2 Trench FET having merged gate dielectric
In one implementation, a trench field-effect transistor (trench FET) includes a semiconductor substrate having a drain region, a drift zone over the drain region, and depletion trenches formed over the drain region. Each depletion trench includes a depletion trench dielectric and a depletion electrode. The trench FET can further include a respective bordering gate trench situated alongside each depletion trench, each bordering gate trench having a gate electrode and a gate dielectric. The gate dielectric is merged with the depletion trench dielectric between the depletion electrode and the gate electrode.
US09391188B2 Semiconductor device and method for fabricating semiconductor device
Disclosed is a semiconductor device and a method for fabricating the semiconductor device. The method for fabricating the semiconductor device comprises steps of: forming a side cliff in a substrate in accordance with a gate mask pattern, the side cliff being substantially vertical to a substrate surface; forming a dielectric layer on the substrate that comprises the side cliff; etching the dielectric layer to have the dielectric layer left only on the side cliff, as a dielectric wall; and burying the side cliff by a substrate growth, the burying is performed up to a level higher than the upper end of the dielectric wall.
US09391187B2 Semiconductor heterojunction device
In an example embodiment, a heterojunction device comprises a substrate, a multilayer structure disposed on the substrate. The multilayer structure has a first layer having a first semiconductor disposed on top of the substrate; a second layer has a second semiconductor is disposed on top of the first layer defining an interface between them. The second semiconductor differs from the first semiconductor such that a 2D Electron Gas forms adjacent to the interface. A first terminal couples to a first area of the interface between the first and second layers and a second terminal couples to a second area of the interface between the first and second layers; an electrically conducting channel comprises a metal or a region of the first layer with a higher defect density than another region of the first layer. The channel connects the second terminal and a region of the first layer such that electric charge can flow between them.
US09391186B2 Semiconductor device
A semiconductor device may include: a first semiconductor layer having a first band gap; a second semiconductor layer including first and second regions separately disposed on an upper surface of the first semiconductor layer and having a second band gap wider than the first band gap; and a third semiconductor layer disposed between the first and second regions of the second semiconductor layer, extending up to at least a portion of the first semiconductor layer. The third semiconductor layer may have a channel region doped with an impurity.
US09391185B2 III-nitride power semiconductor device
A III-nitride power semiconductor device that includes a two dimensional electron gas having a reduced charge region under the gate thereof.
US09391183B2 Semiconductor device
A semiconductor device is disclosed that comprises semiconductor regions and an insulating film. A groove extends from a top surface of a semiconductor region and reaching a semiconductor region. In plan view, a body of a bottom electrode is formed in a strip form, and extends in an extending direction of the groove, and the connection portion extends in a depth direction of the groove and is connected to an end of the body in the extending direction of the body. The body of the bottom electrode is arranged in the groove, and the connection portion of the bottom electrode is arranged in the connection groove. In plan view, a length of the groove in the extending direction of the groove is larger than a width of the groove, and the width of the groove is larger than a gap between the groove and an adjacent groove.
US09391177B1 Method of fabricating semiconductor structure
The present invention provides a method for improving gate coupling ratio of a flash memory device and a protruding floating gate is formed. First, a substrate having a plurality of isolation structures is formed. Then, a first conductive layer is formed overlaying the substrate. A chemical-mechanical polishing process is performed to planarize the first conductive layer. After that, a portion of the isolation structures is removed, and a second conductive layer is formed overlaying the first conductive layer and the isolation structures. Finally, a lithography process with a photomask can be used to define a mask that covers the first conductive layer and the second conductive layer, and then an insulating layer is deposited overlaying the substrate, so that a third conductive layer is formed overlaying the insulating layer.
US09391176B2 Multi-gate FETs having corrugated semiconductor stacks and method of forming the same
The present disclosure provides, in various aspects of the present disclosure, a semiconductor device which includes a semiconductor stack disposed over a surface of a substrate and a gate structure partially formed over an upper surface and two opposing sidewall surfaces of the semiconductor stack, wherein the semiconductor stack includes an alternating arrangement of at least two layers formed by a first semiconductor material and a second semiconductor material which is different from the first semiconductor material.
US09391172B2 Methods of shaping a channel region in a semiconductor fin using doping
Provided is a method of fabricating a transistor. The method includes forming a fin portion protruding upward from a substrate, forming a device isolation pattern on the substrate to cover a lower portion of a sidewall of the fin portion, forming a trench in the device isolation pattern, the trench exposing a top surface and sidewalls of a channel region of the fin portion, and injecting a Group-IV element into the channel region of the fin portion to increase the volume of the channel region.
US09391170B2 Three-dimensional field-effect transistor on bulk silicon substrate
A field-effect transistor (FET) on bulk substrate and a method of fabricating the same is discussed herein. The FET includes a dielectric layer disposed on the bulk substrate and a fin structure and a gate structure disposed on the dielectric layer. The dielectric layer includes alternating first and second dielectric regions. The fin structure includes a channel region interposed between a source region and a drain region. The gate structure is capacitively coupled to the fin structure and positioned between the source region and the drain region. Improved performance characteristics of FET is primarily achieved with the dielectric layer providing electrical isolation of the fin structure from the bulk substrate.
US09391169B2 Thin film transistor and manufacturing method thereof and display comprising the same
Provided is a TFT with an improved gate insulator, having an insulator substrate, a gate layer, a gate insulator layer, a active semiconductor layer, and a source and drain electrode layer, wherein the gate insulator layer includes a first silicon nitride film, a second silicon nitride film disposed on the first silicon nitride film and a third silicon nitride film disposed on the second silicon nitride, and compared to the second silicon nitride film, each of the first silicon nitride film and the third silicon nitride film is much thinner and has a lower content of N—H bond. Also provided is a display including said TFTs. According to the present disclosure, an improved gate insulator layer capable of withstanding higher voltage can be achieved due to the laminated structure and accordingly a TFT with excellent reliability can be formed.
US09391165B2 Semiconductor device and method of manufacturing the semiconductor device
A semiconductor device includes a semiconductor region, a first well region which has a first conductive type, a second well region which has a second conductive type, a source region, a drain region, a channel region, and a gate insulation film. The first well region and the second well region are formed in the semiconductor region adjacent to each other. The source region is on the first well region; the drain region is on the second well region. The semiconductor region has a first region, a second region, and a third region. A dopant concentration of the second conductive type in the third region is higher than a dopant concentration of the second conductive type in the first region.
US09391157B2 Semiconductor transistor device
A semiconductor device including an oxide semiconductor that is miniaturized and has favorable electrical characteristics is provided. The semiconductor device includes an oxide semiconductor film and a blocking film; a source electrode and a drain electrode electrically connected to the oxide semiconductor film; a gate insulating film in contact with the oxide semiconductor film, the source electrode, and the drain electrode; and a gate electrode in contact with the gate insulating film. The blocking film contains the same material as the oxide semiconductor film, is on the same surface as the oxide semiconductor film, and has a higher conductivity than the oxide semiconductor film.
US09391155B2 Gate structure integration scheme for fin field effect transistors
In one embodiment, a semiconductor device is provided that includes a gate structure present on a channel portion of a fin structure. The gate structure includes a dielectric spacer contacting a sidewall of a gate dielectric and a gate conductor. Epitaxial source and drain regions are present on opposing sidewalls of the fin structure, wherein surfaces of the epitaxial source region and the epitaxial drain region that is in contact with the sidewalls of the fin structure are aligned with an outside surface of the dielectric spacer. In some embodiments, the dielectric spacer, the gate dielectric, and the gate conductor of the semiconductor device are formed using a single photoresist mask replacement gate sequence.
US09391148B2 SiC single crystal substrate
A single crystal SiC substrate capable of forming a good epitaxial thin film thereon to give a high-quality epitaxial substrate is provided. The single crystal SiC substrate has a CMP-treated surface and has 5 or fewer lattice defects measuring 30 nm or more in a direction parallel to the polished surface and 50 nm or more in a direction perpendicular to the polished surface as counted within a depth of 100 nm from the polished surface in a direction perpendicular to the polished surface and a length of 10 μm in a direction parallel to the polished surface when observed in cross-section using a transmission electron microscope under the 00L reflection or the h-h0 reflection, where L and h are each an integer other than 0.
US09391146B2 Oxide semiconductor
To provide an oxide semiconductor with a novel structure. Such an oxide semiconductor is composed of an aggregation of a plurality of InGaZnO4 crystals each of which is larger than or equal to 1 nm and smaller than or equal to 3 nm, and in the oxide semiconductor, the plurality of InGaZnO4 crystals have no orientation. Alternatively, such an oxide semiconductor is such that a diffraction pattern like a halo pattern is observed by electron diffraction measurement performed by using an electron beam with a probe diameter larger than or equal to 300 nm, and that a diffraction pattern having a plurality of spots arranged circularly is observed by electron diffraction measurement performed by using an electron beam with a probe diameter larger than or equal to 1 nm and smaller than or equal to 30 nm.
US09391143B2 Method for low temperature bonding and bonded structure
A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperature chemical bonding of materials such as silicon, silicon nitride and SiO2. The surfaces to be bonded are polished to a high degree of smoothness and planarity. VSE may use reactive ion etching or wet etching to slightly etch the surfaces being bonded. The surface roughness and planarity are not degraded and may be enhanced by the VSE process. The etched surfaces may be rinsed in solutions such as ammonium hydroxide or ammonium fluoride to promote the formation of desired bonding species on the surfaces.
US09391142B2 Semiconductor device
A semiconductor device of this embodiment includes: a first semiconductor layer including AlXGa1-XN; a second semiconductor layer provided above the first semiconductor layer, and including undoped or n-type AlYGa1-YN; a first and second electrodes provided above the second semiconductor layer; a third semiconductor layer provided above the second semiconductor layer between the first electrode and the second electrode, is at a distance from each of the first and second electrodes, and including p-type AlZGa1-ZN; a control electrode provided above the third semiconductor layer; a fourth semiconductor layer provided above the third semiconductor layer between the first electrode and the control electrode, is at a distance from the control electrode, and including n-type AlUGa1-UN; and a fifth semiconductor layer provided above a portion of the third semiconductor layer between the control electrode and the second electrode, is at a distance from the control electrode, and including n-type AlUGa1-UN.
US09391137B2 Power semiconductor device and method of fabricating the same
Provided are a power semiconductor device and method of fabricating the same, in particular a power semiconductor device such as an Insulated Gate Bipolar Transistor (IGBT) including a cell region with a trench structure formed to include a dummy trench and a first trench and a termination region with a termination ring formed surrounding the cell region. Such a power semiconductor device is designed to operable with high power conditions such as when an operating voltage is 600 V, 1200 V and so on.
US09391134B2 Fin field effect transistor, semiconductor device including the same and method of forming the semiconductor device
A fin field effect transistor includes a first fin structure and a second fin structures both protruding from a substrate, first and second gate electrodes on the first and second fin structures, respectively, and a gate dielectric layer between each of the first and second fin structures and the first and second gate electrodes, respectively. Each of the first and second fin structures includes a buffer pattern on the substrate, a channel pattern on the buffer pattern, and an etch stop pattern provided between the channel pattern and the substrate. The etch stop pattern includes a material having an etch resistivity greater than that of the buffer pattern.
US09391129B2 Display device
A display device comprising including a plurality of pixels arranged in the shape of a matrix above a substrate, and a plurality of thin film transistors arranged corresponding to each of the plurality of pixel having an organic EL layer, the device comprising; a planarized film covering the thin film transistor and a wire connected with the thin film transistor; a reflecting layer formed above the planarized film; a light path length expanded layer covering the reflecting layer; and a pixel transparent electrode formed above the light path length expanded layer.
US09391126B2 Flat panel display and method of manufacturing the same
A flat panel display is disclosed. In one embodiment, the display includes a first substrate and an organic light emitting device formed over the first substrate, wherein the organic light emitting device comprises a first electrode layer, an organic light emitting layer, and a second electrode layer, and wherein the organic light emitting layer is interposed between the first and second electrode layers. The display also includes a second substrate attached to the first substrate by the use of a sealant and an In-Plane Switching (IPS) mode electrode layer formed between the first and second substrates, wherein the IPS mode electrode layer is closer to the second substrate than the first substrate, wherein the IPS mode electrode layer has first and second surfaces opposing each other, and wherein the first surface is closer to the second substrate than the first surface. The display further includes a first alignment layer formed on the second surface of the IPS mode electrode layer and a liquid crystal layer filled in a space formed between the first substrate and the second substrate, wherein at least part of the liquid crystal layer is formed over the organic light emitting device.
US09391123B2 Organic light emitting diode display
An OLED display includes pixels, each including a first light emission region having a first area and a first perimeter and a second light emission region disposed neighboring the first light emission region and having a second area and a second perimeter. The first area, the first perimeter, the second area, and the second perimeter respectively satisfy an equation of A1*P2=A2*P1, where A1 is the first area, P1 is the first perimeter, A2 is the second area, and P2 is the second perimeter.
US09391122B2 Organic EL display device
In an organic EL display device, a resistance of a cathode electrode of OLEDs is substantially reduced while maintaining a higher opening ratio of pixels as an entire display area. A reference power supply line is formed on a glass substrate, and receives a reference potential for driving the OLED. The OLED is formed on the glass substrate where the reference power supply line is formed, and has a structure in which a lower electrode, an organic material layer, and an upper electrode that is a cathode electrode common to plural pixels are laminated on each other in the order from the bottom. In some of the plural pixels, a cathode contact that penetrates through the organic material layer, and electrically connects the upper electrode to the reference power supply line is formed within an opening area corresponding to a W sub-pixel.
US09391120B2 Semiconductor memory device having unequal pitch vertical channel transistors used as selection transistors
A semiconductor device comprises a set of selection transistors, such as in a three-dimensional memory structure or stack having resistance change memory cells arranged along vertical bit lines. Each selection transistor has a non-shared control gate and a shared control gate. The transistor bodies may have an unequal pitch and a common height. Some of the transistor bodies can be misaligned with the vertical bit lines to fit the transistors to the stack. A method for programming the three-dimensional memory structure includes forming one or two channels in a transistor body to provide a current to selected memory cells. Programming can initially use one channel and subsequently use two channels based on a programming progress. A method for fabricating a semiconductor device includes etching a gate conductor material so that shared and non-shared control gates have a common height.
US09391117B2 Light emitting diode package
One embodiment comprises first and second light-emitting chips, each comprising: a package body having a cavity; first to fourth lead frames disposed inside the package body; a first semiconductor layer; an active layer; and a second semiconductor layer and emitting light of a different wavelength from each other, wherein each of the first to fourth lead frames comprises: an upper surface part exposed to the cavity; and a side surface part bent from one side portion of the upper surface part and exposed by one surface of the package body. In addition, the first light-emitting chip is disposed on the upper surface part of the first lead frame, and the second light-emitting chip is disposed on the upper surface part of the third lead frame.
US09391112B2 Semiconductor apparatus
A semiconductor apparatus includes a conductive member penetrating through a first semiconductor layer, a first insulator layer, and a third insulator layer, and connecting a first conductor layer with a second conductor layer. The conductive member has a first region containing copper, and a second region containing a material different from the copper is located at least between a first region and the first semiconductor layer, between the first region and the first insulator layer, and between the first region and the third insulator layer. A diffusion coefficient of the copper to a material is lower than a diffusion coefficient of the copper to the first semiconductor layer and a diffusion coefficient of the copper to the first insulator layer.
US09391111B1 Stacked integrated circuit system with thinned intermediate semiconductor die
An intermediate integrated circuit die of a stacked integrated circuit system includes an intermediate semiconductor substrate including first polarity dopants is thinned from a second side. A first well including first polarity dopants is disposed in the intermediate semiconductor proximate to a first side. A second well including second polarity dopants is disposed in the intermediate semiconductor substrate proximate to the first side. A deep well having second polarity dopants is disposed in the intermediate semiconductor substrate beneath the first and second wells. An additional implant of first polarity dopants is implanted into the intermediate semiconductor substrate between the deep well and the second side of the intermediate semiconductor substrate to narrow a depletion region overlapped by the additional implant of first polarity dopants. The depletion region is between the deep well and the second side of the intermediate semiconductor substrate.
US09391109B2 Uniform-size bonding patterns
A semiconductor device, and a method of fabrication, is introduced. In an embodiment, one or more passivation layers are formed over a first substrate. Recesses are formed in the passivation layers and a first plurality of bonding pads and a second plurality of bonding pads are formed in the recesses. In an embodiment, the first plurality of bonding pads have a first width and a first pitch, and the second plurality of bonding pads have the first width and are grouped into clusters. The first plurality of bonding pads and the second plurality of bonding pads in the first substrate are aligned to a third plurality of bonding pads in a second substrate and are bonded using a direct bonding method.
US09391108B2 Photoelectric conversion apparatus and imaging system using the photoelectric conversion apparatus
In a photoelectric conversion apparatus including a charge holding portion, a part of an element isolation region contacting with a semiconductor region constituting the charge holding portion extends from a reference surface including the light receiving surface of a photoelectric conversion element into a semiconductor substrate at a level equal to or deeper than the depth of the semiconductor region in comparison with the semiconductor region.
US09391107B1 Image sensor
An image sensor device includes a substrate having an active array region and a peripheral circuit region, a plurality of light-sensing elements disposed within the active array region, a first dielectric layer on the substrate, and a second dielectric layer on the first dielectric layer. A recess region is provided in the second dielectric layer to reveal a top surface of the first dielectric layer within the active array region. An angle between a sidewall of the second dielectric layer that defines the perimeter of the recess region and the top surface of the first dielectric layer is less than 90 degrees.
US09391106B2 Solid-state imaging apparatus
A solid-state imaging apparatus includes: a solid-state imaging device photoelectrically converting light taken by a lens; and a light shielding member shielding part of light incident on the solid-state imaging device from the lens, wherein an angle made between an edge surface of the light shielding member and an optical axis direction of the lens is larger than an incident angle of light to be incident on an edge portion of the light shielding member.
US09391105B2 Solid-state imaging device and imaging apparatus
A solid-state imaging device includes: unit pixels each having a light-receiving element which is divided into line widths shorter than or equal to a wavelength of light; a plurality of light-transmissive films in a concentric structure; and an effective refractive index distribution. Among the light-transmissive films, a light-transmissive film closest to a center of the concentric structure has an outer edge in a shape of a true circle, and a light-transmissive film far from the center of the concentric structure has an outer edge in a shape of an oval, a ratio of a long axis to a short axis of the oval increases as the light-transmissive film is farther away from the center of the concentric structure, and a direction of the long axis of the oval is orthogonal to a vector which connects the center of the concentric structure and a center of the solid-state imaging device.
US09391100B2 Display substrate and fabricating method thereof, mask plate, and mask plate group
The present disclosure provides a display substrate and a mask plate, the display substrate comprising a plurality of sub display substrates, each of the sub display substrates comprising a plurality of pixel units, each pixel unit comprising a pixel electrode, a common electrode and a source-drain channel, wherein, from the center of the display substrate to the edge of the display substrate, the plurality of sub display substrates are arranged from large to small according to the overlapping area of the pixel electrode and the common electrode and/or the plurality of sub display substrates are arranged from small to large according to the width to length ratio of the source-drain channel of the sub display substrate. The present disclosure can avoid electrical badness of the sub display substrates located at the edges.
US09391098B2 Method of manufacturing a display device
An object of the present invention is to improve yield when manufacturing a display device. A method of manufacturing a display device for displaying an image using a display element includes exposing a first surface of a glass substrate o an aqueous solution containing hydrogen fluoride, forming an organic resin film having a polar group above the first surface of the glass substrate, forming a layer including a display element for displaying an image above the organic resin film, and bonding an opposing substrate so as to cover the display element.
US09391096B2 Semiconductor device and method for manufacturing the same
To provide a highly reliable semiconductor device. The semiconductor device includes a first oxide layer over an insulating film; an oxide semiconductor layer over the first oxide layer; a gate insulating film over the oxide semiconductor layer; and a gate electrode over the gate insulating film. The first oxide layer contains indium. The oxide semiconductor layer contains indium and includes a channel formation region. The distance from the interface to the channel formation region is 20 nm or more, preferably 30 nm or more, further preferably 40 nm or more, still further preferably 60 nm or more.
US09391092B2 Circuit structures, memory circuitry, and methods
A circuit structure includes a substrate having an array region and a peripheral region. The substrate in the array and peripheral regions includes insulator material over first semiconductor material, conductive material over the insulator material, and second semiconductor material over the conductive material. The array region includes vertical circuit devices which include the second semiconductor material. The peripheral region includes horizontal circuit devices which include the second semiconductor material. The horizontal circuit devices in the peripheral region individually have a floating body which includes the second semiconductor material. The conductive material in the peripheral region is under and electrically coupled to the second semiconductor material of the floating bodies. Conductive straps in the array region are under the vertical circuit devices. The conductive straps include the conductive material and individually are electrically coupled to a plurality of the vertical circuit devices in the array region. Other implementations are disclosed.
US09391091B2 MOSFET with work function adjusted metal backgate
An SOI substrate, a semiconductor device, and a method of backgate work function tuning. The substrate and the device have a plurality of metal backgate regions wherein at least two regions have different work functions. The method includes forming a mask on a substrate and implanting a metal backgate interposed between a buried oxide and bulk regions of the substrate thereby producing at least two metal backgate regions having different doses of impurity and different work functions. The work function regions can be aligned such that each transistor has different threshold voltage. When a top gate electrode serves as the mask, a metal backgate with a first work function under the channel region and a second work function under the source/drain regions is formed. The implant can be tilted to shift the work function regions relative to the mask.
US09391089B2 Method of manufacturing semiconductor device including nickel-containing film
A method of manufacturing a semiconductor device is provided. A substrate including a structure in which a hole is formed is prepared. Precursors including a nickel alkoxide compound are vaporized. A nickel-containing layer is formed in the hole by providing the vaporized precursors including the nickel alkoxide compound onto the substrate.
US09391087B2 Nonvolatile semiconductor memory device
A nonvolatile semiconductor memory device includes first and second word line groups, each including a plurality of stacked word lines above a substrate, a first memory string including a first memory column through the first word line group, a second memory column through the second word line group, and a first memory connection portion electrically coupling the first and second memory columns, and a second memory string including a third memory column through the first word line group, a fourth memory column through the second word line group, and a second memory connection portion electrically coupling the third and fourth memory columns. The first memory connection portion is formed in a first layer of the substrate and the second memory connection portion is formed in a second layer of the substrate that is lower than the first layer.
US09391085B2 Self-aligned split gate flash memory having liner-separated spacers above the memory gate
Some embodiments of the present disclosure relate to a split gate memory cell which includes a select gate and a memory gate. The select gate has a planar upper surface disposed over a semiconductor substrate and is separated from the substrate by a gate dielectric layer. The memory gate has a planar upper surface arranged at one side of the select gate and is separated from the substrate by a charge trapping layer. The charge trapping layer extends under the memory gate. A first spacer is disposed above the memory gate and is separated from the memory gate by a first dielectric liner. The first dielectric liner extends upwardly along an upper sidewall of the charge trapping layer; and source/drain regions are disposed in the semiconductor substrate at opposite sides of the select gate and the memory gate.
US09391082B2 Memory arrays with a memory cell adjacent to a smaller size of a pillar having a greater channel length than a memory cell adjacent to a larger size of the pillar and methods
The disclosure is related to memory arrays and methods. One such memory array has a substantially vertical pillar. A memory cell adjacent to the pillar where the pillar has a first size has a greater channel length than a memory cell adjacent to the pillar where the pillar has a second size larger than the first size.
US09391080B1 Memory bit cell for reduced layout area
An approach for providing SRAM bit cells with miniaturized bit cells, without local interconnection layers, with improved lithographic printability, and enabling methodology are disclosed. Embodiments include providing first color structures, in a M1 layer, including a first word line, a first bit line, a second bit line, a first ground line, a second ground line, a second latch line or a combination thereof, wherein the first color structures include side edges longer than tip edges; providing second color structures, in the M1 layer, including a second word line, a first power line, a second power line, a first latch line or a combination thereof, wherein the second color structures include side edges longer than tip edges; and forming a bit cell including the first color structures and the second color structures, wherein adjacent tip edges include a first color structure tip edge and a second color structure tip edge.
US09391079B2 Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making
An integrated circuit including a link or string of semiconductor memory cells, wherein each memory cell includes a floating body region for storing data. The link or siring includes at least one contact configured to electrically connect the memory cells to at least one control line, and the number of contacts in the string or link is the same as or less than the number of memory cells in the string or link.
US09391073B2 FinFET device and method for manufacturing the same
A FinFET device and a method for manufacturing the same. The FinFET device includes a plurality of fins each extending in a first direction on a substrate; a plurality of gate stacks each being disposed astride the plurality of fins and extending in a second direction; a plurality of source/drain region pairs, respective source/drain regions of each source/drain region pair being disposed on opposite sides of the each gate stack in the second direction; and a plurality of channel regions each comprising a portion of a corresponding fin between the respective source/drain regions of a corresponding source/drain pair, wherein the each fin comprises a plurality of protruding cells on opposite side surfaces in the second direction.
US09391070B2 Semiconductor device
A semiconductor device includes first electrode, first semiconductor layer of first conductivity type on the first electrode, second semiconductor layer of second conductivity type on the first semiconductor layer, third semiconductor layer of the first conductivity type on second semiconductor layer, fourth semiconductor layer of the second conductivity type selectively located on the third semiconductor layer, gate electrode through the third and fourth semiconductor layers and into the second semiconductor layer and insulated therefrom, second electrode on the fourth semiconductor layer, fifth semiconductor layer of the second conductivity type between the first electrode and the second semiconductor layer, sixth semiconductor layer of the first conductivity type on the second semiconductor layer contacting the second electrode, and seventh semiconductor layer of the first conductivity type in the second and sixth semiconductor layers, such that the bottom thereof is closer to the first electrode than the bottom of the gate insulating film.
US09391068B2 Power rectifier using tunneling field effect transistor
A power rectifier includes a stage having a first Tunneling Field-Effect Transistor (“TFET”) having a source, a gate, and a drain, a second TFET having a source, a gate, and a drain, a third TFET having a source, a gate, and a drain, and a fourth TFET having a source, a gate, and a drain such that the source of the first TFET, the source of the second TFET, the gate of the third TFET, and the gate of the fourth TFET are connected, the gate of the first TFET, the gate of the second TFET, the source of the third TFET and the source of the fourth TFET are connected, the drain of the first TFET and the drain of the third TFET are connected, and the drain of the second TFET and the drain of the fourth TFET are connected. Alternative embodiments are also disclosed.
US09391067B2 Multiple silicide integration structure and method
A structure and method for providing a multiple silicide integration is provided. An embodiment comprises forming a first transistor and a second transistor on a substrate. The first transistor is masked and a first silicide region is formed on the second transistor. The second transistor is then masked and a second silicide region is formed on the first transistor, thereby allowing for device specific silicide regions to be formed on the separate devices.
US09391057B2 Integrated circuit on SOI comprising a transistor protecting from electrostatic discharges
An integrated circuit includes first and second electronic components, a buried UTBOX insulating layer, first and second ground planes plumb with the first and second electronic components, first and second wells, first and second biasing electrodes making contact with the first and second wells and with the first and second ground planes, a third electrode making contact with the first well, a first trench isolation separating the first and third electrodes and extending through the buried insulating layer as far as into the first well, and a second trench isolation that isolates the first electrode from the first component, and that does not extend as far as the interface between the first ground plane and the first well.
US09391056B2 Mask optimization for multi-layer contacts
A method for mask optimization, the method including moving any features of a gate contact mask that are in violation of a spacing rule to a second layer contact mask, splitting an elongated feature of the second layer mask that is too close to a feature moved to the second layer mask from the gate contact mask, and connecting two split features of a first layer contact mask, the split features corresponding to the elongated feature of the second layer mask.
US09391053B2 Non-shrink varistor substrate and production method for same
Disclosed are a non-shrink varistor substrate and a method of manufacturing the same, wherein the non-shrink varistor substrate includes: a reinforcement layer formed of a ceramic material; a thin bonding layer formed on the surface of the reinforcement layer; a first varistor layer formed on the thin bonding layer and including a plurality of inner electrode layers therein; and an outer electrode layer formed on the first varistor layer and electrically connected to the inner electrode layers by a conductive material loaded in a via hole formed through the first varistor layer, the thin bonding layer and the reinforcement layer, and also wherein bondability and bonding reliability can be enhanced upon heterobonding of the reinforcement layer and the varistor layer.
US09391052B2 Semiconductor device
There is provided a semiconductor device. The semiconductor device includes: a first board; a second board joined to the first board; a connection terminal provided between the first board and the second board and electrically connecting the first board and the second board; and an electronic component on at least one of the first board and the second board. The connection terminal serves as an antenna.
US09391050B2 Semiconductor light emitting device and fabrication method for same
The purpose of the present invention is to provide a double-sided light emitting type semiconductor light emitting device that can be easily fabricated even if a semiconductor light emitting element is flip-chip mounted, and to provide a fabrication process for the same. The semiconductor light emitting device has a plurality of lead frames, a plurality of semiconductor light emitting elements connected to the plurality of lead frames, and a covering member that covers the plurality of semiconductor light emitting elements. The semiconductor light emitting device is characterized in that the edge of one lead frame among the plurality of lead frames is disposed in close proximity to the edge of another lead frame so as to form a gap, and the plurality of semiconductor light emitting elements are flip-chip mounted on the front surface and rear surface of the one lead frame and the other lead frame so as to straddle the gap.
US09391048B2 Semiconductor package
A semiconductor package, comprising: a substrate; a first semiconductor chip; and at least one second semiconductor chip. The first semiconductor chip and the at least one second semiconductor chip are stacked on the substrate; the first semiconductor chip is electrically connected with the substrate; and an electrical connection of each second semiconductor chip is formed through a secondary input/output buffer of the first semiconductor chip.
US09391038B2 Semiconductor device and power supply unit utilizing the same
A semiconductor device has pluralities of grid array terminals forming a grid array structure, e.g. a BGA structure, in which the output end of a built-in switch circuit is connected to multiple terminals of the grid array structure, thereby reducing the current that flows through each of the multiple terminals below a permissible level and minimizing the heat due to contact resistances of the multiple terminals in contact with the IC socket of the semiconductor device. Each pair of nearest neighbors of the multiple terminals is interposed by at least one further array terminal. The multiple terminals are all located at the outermost peripheral terminal positions of the grid array structure. Thus, the heat generated in the respective multiple terminals connected to the switch circuit is reduced, thereby minimizing the possibility of hazardous melting of the terminals.
US09391034B2 Interfacial alloy layer for improving electromigration (EM) resistance in solder joints
ProblemTo improve the electromigration (EM) resistance of a solder joint.SolutionThe present invention provides a unique structure for an interfacial alloy layer which is able to improve the electromigration (EM) resistance of a solder joint, and a unique method of forming this structure. More specifically, in this unique structure, a controlled interfacial alloy layer is provided on both sides of a solder joint. In order to form this structure, aging (maintenance of high-temperature conditions) is performed until an interfacial alloy layer of Cu3Sn has a thickness of at least 1.5 μm.
US09391033B2 Semiconductor device
The semiconductor device has the CSP structure, and may include a plurality of electrode pads formed on a semiconductor integrated circuit in order to input/output signals from/to exterior; solder bumps for making external lead electrodes; and rewiring. The solder bumps may be arranged in two rows along the periphery of the semiconductor device. The electrode pads may be arranged inside the outermost solder bumps so as to be interposed between the two rows of solder bumps. Each trace of the rewiring may be extended from an electrode pad, and may be connected to any one of the outermost solder bumps or any one of the inner solder bumps.
US09391028B1 Integrated circuit dies having alignment marks and methods of forming same
Dies having alignment marks and methods of forming the same are provided. A method includes forming trenches on a first side of a first workpiece, a die of the first workpiece being interposed between neighboring trenches. A portion of the die is removed to form an alignment mark, the alignment mark extending through an entire thickness of the die. A second side of the first workpiece is thinned until the die is singulated, the second side being opposite the first side.
US09391026B2 Semiconductor packages and methods of packaging semiconductor devices
Package substrate, semiconductor packages and methods for forming a semiconductor package are presented. The package substrate includes a base substrate having first and second major surfaces and a plurality of via contacts extending through the first to the second major surfaces of the base substrate. A first conductive layer having a plurality of openings is disposed over the first surface of the base substrate and via contacts. The openings are configured to match conductive trace layout of the package substrate. Conductive traces are disposed over the first conductive layer. The conductive traces are directly coupled to the via contacts through some of the openings of the first conductive layer.
US09391022B2 Semiconductor device and a method of manufacturing the same
For simplifying the dual-damascene formation steps of a multilevel Cu interconnect, a formation step of an antireflective film below a photoresist film is omitted. Described specifically, an interlayer insulating film is dry etched with a photoresist film formed thereover as a mask, and interconnect trenches are formed by terminating etching at the surface of a stopper film formed in the interlayer insulating film. The stopper film is made of an SiCN film having a low optical reflectance, thereby causing it to serve as an antireflective film when the photoresist film is exposed.
US09391021B2 Chip package and method for fabricating the same
A method for fabricating chip package includes providing a semiconductor chip with a metal bump, next adhering the semiconductor chip to a substrate using a glue material, next forming a polymer material on the substrate, on the semiconductor chip, and on the metal bump, next polishing the polymer material, next forming a patterned circuit layer over the polymer material and connected to the metal bump, and then forming a tin-containing ball over the patterned circuit layer and connected to the patterned circuit layer.
US09391020B2 Interconnect structure having large self-aligned vias
A wavy line interconnect structure that accommodates small metal lines and enlarged diameter vias is disclosed. The enlarged diameter vias can be formed using a self-aligned dual damascene process without the need for a separate via lithography mask. The enlarged diameter vias make direct contact with at least three sides of the underlying metal lines, and can be aligned asymmetrically with respect to the metal line to increase the packing density of the metal pattern. The resulting vias have an aspect ratio that is relatively easy to fill, while the larger via footprint provides low via resistance. An interconnect structure having enlarged diameter vias can also feature air gaps to reduce the chance of dielectric breakdown. By allowing the via footprint to exceed the minimum size of the metal line width, a path is cleared for further process generations to continue shrinking metal lines to dimensions below 10 nm.
US09391019B2 Scalable interconnect structures with selective via posts
Interconnect structures including a selective via post disposed on a top surface of a lower level interconnect feature, and fabrication techniques to selectively form such a post. Following embodiments herein, a minimum interconnect line spacing may be maintained independent of registration error in a via opening. In embodiments, a selective via post has a bottom lateral dimension smaller than that of a via opening within which the post is disposed. Formation of a conductive via post may be preferential to a top surface of the lower interconnect feature exposed by the via opening. A subsequently deposited dielectric material backfills portions of a via opening extending beyond the interconnect feature where no conductive via post was formed. An upper level interconnect feature is landed on the selective via post to electrically interconnect with the lower level feature.
US09391016B2 MIM capacitor structure
The present disclosure relates to an integrated chip having a MIM (metal-insulator-metal) capacitor and an associated method of formation. In some embodiments, the integrated chip has a MIM capacitor disposed within a capacitor inter-level dielectric (ILD) layer. An under-metal layer is disposed below the capacitor ILD layer and includes one or more metal structures located under the MIM capacitor. A plurality of vias vertically extend through the capacitor ILD layer and the MIM capacitor. The plurality of vias provide for an electrical connection to the MIM capacitor and to the under-metal layer. By using the plurality of vias to provide for vertical connections to the MIM capacitor and to the under-metal layer, the integrated chip does not use vias that are specifically designated for the MIM capacitor, thereby decreasing the complexity of the integrated chip fabrication.
US09391015B2 Method for forming a three-dimensional structure of metal-insulator-metal type
A method for forming a capacitive structure in a metal level of an interconnection stack including a succession of metal levels and of via levels, including the steps of: forming, in the metal level, at least one conductive track in which a trench is defined; conformally forming an insulating layer on the structure; forming, in the trench, a conductive material; and planarizing the structure.
US09391010B2 Power line filter for multidimensional integrated circuits
An interposer element in a multidimensional integrated circuit with stacked elements has one or more conductors, especially power supply lines, coupled through decoupling networks defining low impedance shunts for high frequency signals to ground. The interposer has successive tiers including silicon, metal and dielectric deposition layers. The decoupling network for a conductor has at least one and preferably two reactive transmission lines. A transmission line has an inductor in series with the conductor and parallel capacitances at the inductor terminals. The inductors are formed by traces in spaced metal deposition layers forming coil windings and through vias connecting between layers to permit conductor crossovers. The capacitances are formed by MOScaps in the interposer layers. An embodiment has serially coupled coils with capacitances at the input, output and junction between the coils, wherein the coils are magnetically coupled to form a transformer.
US09391009B2 Semiconductor packages including heat exhaust part
According to example embodiments, a semiconductor package includes a lower package, upper packages on the lower package and laterally spaced apart from each other, a lower heat exhaust part between the lower package and the upper packages, an intermediate heat exhaust part between the upper packages and connected to the lower heat exhaust part, and an upper heat exhaust part on the upper packages and connected to the intermediate heat exhaust part.
US09391007B1 Built-up lead frame QFN and DFN packages and method of making thereof
Consistent with an example embodiment, a semiconductor device comprises a device die having bond pads providing connection to device die circuitry. The semiconductor device includes a QFN package (quad-flat-pack no-leads) built-up substrate lead frame having, a sub-structure of I/O terminals and a die attach area, the I/O terminals and die attach area enveloped in a molding compound; the die attach area has exposed areas to facilitate device die attachment thereon and the terminal I/O terminals provide connection to the device die bond pads. I/O terminals are electrically coupled with one another and to the die attach area with connection traces. The coupled I/O terminals and connection traces facilitate electroplating of exposed vertical surfaces of the I/O terminals during assembly, said connection traces being severed after assembly. Molding compound encapsulates the device die on the built-up substrate lead frame. The exposed vertical surfaces of the I/O terminals enhance the solderability of the assembled QFN device during placement onto a printed circuit board.
US09391002B2 Semiconductor sensor chips
Semiconductor sensor chips are provided. In some embodiments, a semiconductor sensor chip can include at least one wire bond pad on one side thereof, at least one bond pad on another, opposite side thereof, and at least one through-silicon via (TSV) extending therebetween and electrically connected to the bond pads on opposite sides of the chip. Each of the bond pads can have a wire attached thereto. In some embodiments, a semiconductor sensor chip can include a pressure sensor, a substrate, and a resistor in a well that provides p-n junction isolation from a body of the substrate. In some embodiments, a semiconductor sensor chip can include a plurality of wire bonds pads with a wire soldered to each of the bond pads. Each of the wires can be soldered with a longitudinal length thereof soldered to its associated bond pad.
US09390998B2 Heat spreading substrate
Heat spreading substrate. In accordance with an embodiment of the present invention, an apparatus includes a thermally conductive, electrically insulating regular solid, a first electrically conductive coating mechanically coupled to a first edge of the regular solid and a second electrically conductive coating mechanically coupled to a second edge of the regular solid. The first and the second electrically conductive coatings are electrically isolated from one another and the faces of the first electrically conductive coating, the second electrically conductive coating and the regular solid are substantially co-planar. The primary and secondary surfaces of the regular solid may be free of electrically conductive materials.
US09390997B2 Semiconductor chip and stacked type semiconductor package having the same
The disclosure relates to a semiconductor chip and a stacked type semiconductor package having the same. The semiconductor chip includes: a semiconductor chip body having a first surface formed with a plurality of bonding pads and a second surface which is opposite to the first surface, a plurality of first and second through electrodes that pass through the semiconductor chip body and one ends thereof are electrically connected to the bonding pads, an insulating layer formed over the second surface of the semiconductor chip body such that the other ends of the first and second through electrodes are not covered by the insulating layer, and a first heat spreading layer formed over the insulating layer.
US09390996B2 Double-sided cooling power module and method for manufacturing the same
A double-sided cooling power module may include a lower-end terminal, at least one pair of power semiconductor chips mounted on the lower-end terminal, at least one pair of horizontal spacers mounted on the at least one pair of power semiconductor chips, an upper-end terminal mounted on the at least one pair of horizontal spacers, and at least one pair of vertical spacers disposed between the upper-end terminal and the lower-end terminal.
US09390991B2 Semiconductor device and method of forming wafer level ground plane and power ring
A semiconductor die has active circuits formed on its active surface. Contact pads are formed on the active surface of the semiconductor die and coupled to the active circuits. A die extension region is formed around a periphery of the semiconductor die. Conductive THVs are formed in the die extension region. A wafer level conductive plane or ring is formed on a center area of the active surface. The conductive plane or ring is connected to a first contact pad to provide a first power supply potential to the active circuits, and is electrically connected to a first conductive THV. A conductive ring is formed partially around a perimeter of the conductive plane or ring and connected to a second contact pad for providing a second power supply potential to the active circuits. The conductive ring is electrically connected to a second THV.
US09390990B2 Molding composition for semiconductor package and semiconductor package using the same
Disclosed herein are a molding composition for a semiconductor package including a liquid crystal thermosetting polymer resin and graphene oxide to thereby effectively decrease coefficient of thermal expansion (CTE) and warpage and maximize an effect of thermal conductivity, and a semiconductor package using the same.
US09390989B2 Enhanced modularity in heterogeneous 3D stacks
A computer program product for generating and implementing a three-dimensional (3D) computer processing chip stack plan. The computer readable program code includes computer readable program code configured for receiving system requirements from a plurality of clients, identifying common processing structures and technologies from the system requirements, and assigning the common processing structures and technologies to at least one layer in the 3D computer processing chip stack plan. The computer readable program code is also configured for identifying uncommon processing structures and technologies from the system requirements and assigning the uncommon processing structures and technologies to a host layer in the 3D computer processing chip stack plan. The computer readable program code is further configured for determining placement and wiring of the uncommon structures on the host layer, storing placement information in the plan, and transmitting the plan to manufacturing equipment. The manufacturing equipment forms the 3D computer processing chip stack.
US09390988B2 Method for soldering a cap to a support layer
One embodiment discloses a method for soldering a cap for an integrated electronic device to a support layer, including the steps of: providing a support layer; providing a cap including a core of a first material and a coating layer of a second material, the first and second material being respectively wettable and non-wettable with respect to a solder, the coating layer being arranged so as to expose a surface of the core; coupling the cap with the support layer; and soldering the surface of the core to the support layer, by means of the solder.
US09390987B2 Semiconductor module including a terminal embedded in casing wall and bent over thick portion of lid
Aspects of the invention provide a semiconductor module that can be manufactured without using a bending jig for bearing the stress in bending process of the terminal and scarcely generates cracks in the resin parts of the semiconductor module. In some aspects of the invention, a semiconductor module can include a casing made of a resin material accommodating a semiconductor chip, a terminal one end of which is electrically connected to the semiconductor chip and the other end of which is projecting out of the casing and bent and a lid made of a resin material fitted on an opening of the casing, a part of end region of the lid being in contact with the terminal and being a thick part with a thickness thicker than a thickness of other parts of the lid.
US09390985B2 Semiconductor arrangement and formation thereof
Forming a semiconductor arrangement includes non-destructively determining a first spacer height of a first sidewall spacer adjacent a dummy gate and a second spacer height of a second sidewall spacer adjacent the dummy gate based upon a height of a photoresist as measured using optical critical dimension (OCD) spectroscopy. When the photoresist is sufficiently uniform, a hard mask etch is performed to remove a hard mask from the dummy gate and to remove portions of sidewall spacers of the dummy gate. A gate electrode is formed between the first sidewall spacer and the second sidewall spacer to form a substantially uniform gate. Controlling gate formation based upon photoresist height as measured by OCD spectroscopy provides a non-destructive manner of promoting uniformity.
US09390983B1 Semiconductor device and method for fabricating the same
A semiconductor device includes: a plurality of stacked semiconductor layers; a plurality of composite doped regions separately and parallelly disposed in a portion of the semiconductor layers along a first direction; a gate structure disposed over a portion of the semiconductor layers along a second direction, wherein the gate structure covers a portion of the composite doped regions; a first doped region formed in the most top semiconductor layer along the second direction and being adjacent to a first side of the gate structure; and a second doped region formed in the most top semiconductor layer along the second direction and being adjacent to a second side of the gate structure opposite to the first side thereof.
US09390977B2 Method for manufacturing a fin=shaped field effect transistor capable of reducing a threshold voltage variation
A method for manufacturing a semiconductor device includes forming a trench defining a plurality of active fins in a substrate, forming a sacrificial layer on the plurality of active fins, forming a sacrificial oxide layer, and removing the sacrificial oxide layer. The forming the sacrificial oxide layer includes heat-treating the sacrificial layer and surfaces of the plurality of active fins.
US09390974B2 Back-to-back stacked integrated circuit assembly and method of making
An integrated circuit assembly includes a first substrate and a second substrate, with active layers formed on the first surfaces of each substrate, and with the second surfaces of each substrate coupled together. A method of fabricating an integrated circuit assembly includes forming active layers on the first surfaces of each of two substrates, and coupling the second surfaces of the substrates together.
US09390973B2 On-chip RF shields with backside redistribution lines
Structures of a system on chip and methods of forming a system on chip are disclosed. In one embodiment, a method of fabricating the system on chip includes forming a through substrate opening from a back surface of a substrate, the through substrate opening disposed between a first and a second region, the first region comprising devices for RF circuitry and the second region comprising devices for other circuitry. The method further includes forming patterns for redistribution lines on a photo resist layer, the photo resist layer disposed under the back surface, and filling the through substrate opening and the patterns for redistribution lines with a conductive material.
US09390972B2 Method of fabricating semiconductor device including a substrate having copper interconnects
A method of fabricating a semiconductor device including a substrate having a copper interconnect exposed on a surface of an insulation film, wherein a layer of an anti-corrosion agent composed of organic material is formed on the surface of the copper interconnect. The method includes removing the layer of the anti-corrosion agent by heating the substrate; and forming a thin layer including manganese oxide on the surface of the copper interconnect by supplying a gas containing an organic compound of manganese to the substrate.
US09390969B2 Integrated circuit and interconnect, and method of fabricating same
The disclosure relates generally to integrated circuits (IC), IC interconnects, and methods of fabricating the same, and more particularly, high performance inductors. The IC includes at least one trench within a dielectric layer disposed on a substrate. The trench is conformally coated with a liner and seed layer, and includes an interconnect within. The interconnect includes a hard mask on the sidewalls of the interconnect.
US09390968B2 Low temperature thin wafer backside vacuum process with backgrinding tape
Vacuum processing, such as a backside metallization (BSM) deposition, is performed on a taped wafer after a gas escape path is formed between a base film of the tape and the wafer frontside surface following backgrind. Venting provided by the gas escape path reduces formation of bubbles under the tape. The gas escape path may be provided, for example, by a selective pre-curing of tape adhesive, to breach an edge seal and place the wafer frontside surface internal to the edge seal in fluid communication with an environment external to the edge seal. With the thinned wafer supported by the pre-cured tape, BSM is then deposited while the wafer and tape are cooled, for example, via a cooled electrostatic chuck.
US09390966B2 Methods of forming wiring structures and methods of fabricating semiconductor devices
Methods of forming a wiring structure are provided including forming an insulating interlayer on a substrate and forming a sacrificial layer on the insulating interlayer. The sacrificial layer is partially removed to define a plurality of openings. Wiring patterns are formed in the openings. The sacrificial layer is transformed into a modified sacrificial layer by a plasma treatment. The modified sacrificial layer is removed by a wet etching process. An insulation layer covering the wiring patterns is formed on the insulating interlayer. The insulation layer defines an air gap therein between neighboring wiring patterns.
US09390959B2 Semiconductor package with stator set formed by circuits
A semiconductor package is provided, including a substrate having a top surface, a bottom surface opposing the top surface, a via communicating the top surface with the bottom surface, and a stator set formed by circuits; an axial tube axially installed in the via of the substrate; a plurality of electronic components mounted on the top surface of the substrate and electrically connected to the substrate; an encapsulant formed on the top surface of the substrate for encapsulating the electronic components and the axial tube; and an impeller axially coupled to the axial tube via the bottom surface of the substrate. In the semiconductor package, the stator set is formed in the substrate by a patterning process. Therefore, the thickness of the semiconductor package is reduced significantly.
US09390957B2 Substrate transfer apparatus and method, and substrate processing apparatus
Provided are a substrate transfer apparatus and method and a substrate processing apparatus. The substrate transfer apparatus includes: a body portion; an arm part coupled to the body portion, the arm part moving to allow the substrate to be transferred; a suction part provided with the arm portion, the suction part suctioning and fixing the substrate; and a control part controlling an operation of the substrate transfer apparatus, wherein the control part changes a suction point on the substrate to re-attempt suction when suction of the substrate by the suction part is unsuccessful.
US09390956B2 Method for the temporary connection of a product substrate to a carrier substrate
A method for temporary connection of a product substrate to a carrier substrate comprised of the steps of: applying an interconnect layer to a product substrate receiving side of the carrier substrate in an interconnect surface section of the product substrate receiving side, applying an antiadhesion layer with low adhesion force to one interconnect side of the product substrate in an antiadhesion surface section of the interconnect side, the antiadhesion surface section corresponding to the interconnect surface section, in terms of area, wherein a receiving space is formed which is bordered by the interconnect layer and the carrier substrate as well as the product substrate and the antiadhesion layer accommodating structures which are provided on the interconnect side of the product substrate and which project from the interconnect side, aligning the product substrate relative to the carrier substrate and bonding of the interconnect layer to the antiadhesion layer on one contact surface.
US09390955B2 Handle substrate and composite wafer for semiconductor device
In a handle substrate for a composite wafer for a semiconductor, particles from the wafer with a notch formed therein are reduced. The handle substrate 1A or 1B for the composite wafer for the semiconductor is formed of a polycrystalline ceramic sintered body, and includes a notch 2A or 2B in its outer peripheral portion. The notch is formed with an as-sintered surface.
US09390952B2 Device and method for loading and unloading quartz reaction tube to and from semiconductor diffusion equipment
A loading and unloading device and method for a quartz reaction tube of a semiconductor diffusion equipment are provided; the loading and unloading device is used in combination with a lifting device of the quartz reaction tube; the lifting device has an interface flange that can be connected to the reaction tube. The loading and unloading device includes a translation drive structure, a linear guide rail, a bracket, and an auxiliary support structure to detachably fix the quartz reaction tube. During the loading procedure, the auxiliary support structure is mounted on the bracket; the front end of the translation drive structure is docked with the doorframes of the semiconductor diffusion equipment through a fixing structure, and the quartz reaction tube is docked with the interface flange of the lifting device by horizontally moving the bracket along the linear guide rail.
US09390951B2 Methods and systems for electric field deposition of nanowires and other devices
Methods, systems, and apparatuses for nanowire deposition are provided. A deposition system includes an enclosed flow channel, an inlet port, and an electrical signal source. The inlet port provides a suspension that includes nanowires into the channel. The electrical signal source is coupled to an electrode pair in the channel to generate an electric field to associate at least one nanowire from the suspension with the electrode pair. The deposition system may include various further features, including being configured to receive multiple solution types, having various electrode geometries, having a rotatable flow channel, having additional electrical conductors, and further aspects.
US09390944B2 Electrical connectivity for circuit applications
According to example configurations herein, a leadframe includes a first conductive strip, a second conductive strip, and a third conductive strip disposed substantially adjacent and substantially parallel to each other. A semiconductor chip substrate includes a first array of switch circuits disposed adjacent and parallel to a second array of switch circuits. Source nodes in switch circuits of the first array are disposed substantially adjacent and substantially parallel to source nodes in switch circuits of the second array. When the semiconductor chip and the leadframe device are combined to form a circuit package, a connectivity interface between the semiconductor chip and conductive strips in the circuit package couples each of the source nodes in switch circuits of the first array and each of the multiple source nodes in switch circuits of the second array to a common conductive strip in the leadframe device.
US09390939B2 Methods of forming MIS contact structures for semiconductor devices and the resulting devices
One method disclosed includes, among other things, conformably depositing a layer of contact insulating material and a conductive material layer in a contact opening, forming a reduced-thickness sacrificial material layer in the contact opening so as to expose a portion, but not all, of the conductive material layer, removing portions of the conductive material layer and the layer of contact insulating material positioned above the upper surface of the reduced-thickness sacrificial material layer, removing the reduced-thickness sacrificial material layer, and forming a conductive contact in the contact opening that contacts the recessed portions of the conductive material layer and the layer of contact insulating material.
US09390933B2 Etching method, storage medium and etching apparatus
There is a method of selectively etching a silicon oxide film among a silicon nitride film and the silicon oxide film formed on a surface of a substrate to be processed, the method including: under a vacuum atmosphere, intermittently supplying at least one of a first processing gas composed of a hydrogen fluoride gas and an ammonia gas and a second processing gas composed of a compound of nitrogen, hydrogen and fluorine, to the substrate to be processed multiple times.
US09390931B1 Manufacturing method of strip-shaped conductive structures and non-volatile memory cell
A manufacturing method of floating gate is disclosed. A substrate having a plurality of isolation structures is provided, and top surfaces of the isolation structures are higher than a top surface of the substrate. A first conductive layer is formed on the substrate. A sacrificial layer is formed on the first conductive layer. Parts of the sacrificial layer are removed while parts of the sacrificial layer on the first conductive layer between the isolation structures are remained. Parts of the first conductive layer are removed by using the remaining parts of the sacrificial layer as masks to form conductive structures between the adjacent isolation structures. The remaining parts of the sacrificial layer are removed. A second conductive layer is formed on the substrate and the second conductive layer electrically connects with the conductive structures. The second conductive layer and the conductive structures are patterned to form floating gates.
US09390930B2 Surface stabilization process to reduce dopant diffusion
A method for incorporating radicals of a plasma into a substrate or a material on a semiconductor substrate using a remote plasma source. In one embodiment, a method for processing doped materials on a substrate surface is provided and includes forming a doped layer on a substrate and optionally cleaning the doped layer, such as by a wet clean process. The method also includes generating an ionized nitrogen plasma in a remote plasma source, wherein the ionized nitrogen plasma has an ion concentration within a range from about 0.001% to about 0.1%, de-ionizing the ionized nitrogen plasma while forming non-ionized nitrogen plasma. The method further includes flowing the non-ionized nitrogen plasma into a processing region within a processing chamber, forming a nitrided capping layer from an upper portion of the doped layer by exposing the doped layer within the processing region to the non-ionized nitrogen plasma during a stabilization process.
US09390927B2 Contact formation for split gate flash memory
An integrated circuit structure includes a plurality of flash memory cells forming a memory array, wherein each of the plurality of flash memory cells includes a select gate and a memory gate. A select gate electrode includes a first portion including polysilicon, wherein the first portion forms select gates of a column of the memory array, and a second portion electrically connected to the first portion, wherein the second portion includes a metal. A memory gate electrode has a portion forming memory gates of the column of the memory array.
US09390924B2 Method for manufacturing SiC substrate
A method for manufacturing a SiC substrate is provided. The method includes: a sacrificial film-forming process of forming a sacrificial film on a surface of a SiC substrate in a film thickness that is equal to or greater than a maximum height difference of the surface; a sacrificial film planarization process of planarizing a surface of the sacrificial film by mechanical processing; and a SiC substrate planarization process of performing dry etching under conditions in which etching selectivity between the SiC substrate and the sacrificial film is in a range of 0.5 to 2.0 so as to remove the sacrificial film and so as to planarize the surface of the SiC substrate.
US09390919B2 Method of forming semiconductor film and photovoltaic device including the film
A method of depositing a kesterite film which includes a compound of the formula: Cu2-xZn1+ySn(S1-zSez)4+q, wherein 0≦x≦1; 0≦y≦1; 0≦z≦1; −1≦q≦1. The method includes contacting hydrazine, a source of Cu, and a source of at least one of S and Se forming solution A; contacting hydrazine, a source of Sn, a source of at least one of S and Se, and a source of Zn forming dispersion B; mixing solution A and dispersion B under conditions sufficient to form a dispersion which includes Zn-containing solid particles; applying the dispersion onto a substrate to form a thin layer of the dispersion on the substrate; and annealing at a temperature, pressure, and length of time sufficient to form the kesterite film. An annealing composition and a photovoltaic device including the kesterite film formed by the above method are also provided.
US09390918B2 Manufacturing method of semiconductor device
Disclosed is a semiconductor device using an oxide semiconductor, with stable electric characteristics and high reliability. In a process for manufacturing a bottom-gate transistor including an oxide semiconductor film, dehydration or dehydrogenation is performed by heat treatment and oxygen doping treatment is performed. The transistor including a gate insulating film subjected to the oxygen doping treatment and the oxide semiconductor film subjected to the dehydration or dehydrogenation by the heat treatment is a transistor having high reliability in which the amount of change in threshold voltage of the transistor by the bias-temperature stress (BT) test can be reduced.
US09390912B2 Film forming method
A film forming method for forming a thin film composed of a SiOCN layer containing at least silicon (Si), oxygen (O), carbon (C) and nitrogen (N) on a surface of a workpiece within an evacuable processing vessel optionally using a silane-based gas, a hydrocarbon gas, a nitriding gas or an oxidizing gas includes forming a first film including at least Si, C and N, and forming a second film including at least Si, C and O. The forming a first film and the forming a second film are set as a cycle and the cycle is performed once or more.
US09390911B2 Method of manufacturing semiconductor device
A method includes: forming a thin film on a substrate by performing a cycle a predetermined number of times, the cycle including: (a) supplying a source gas to the substrate in a process chamber; and (b) supplying a reactive gas to the substrate in the process chamber, wherein at least one of (a) and (b) includes: (c) supplying the source gas or the reactive gas at a first flow rate with exhaust of an inside of the process chamber being suspended until an inner pressure of the process chamber reaches a predetermined pressure; and (d) supplying the source gas or the reactive gas at a second flow rate less than the first flow rate with exhaust of the inside of the process chamber being performed while maintaining the inner pressure of the process chamber at the predetermined pressure after the inner pressure of the process chamber reaches the predetermined pressure.
US09390907B2 Film forming method of SiCN film
A method of forming an SiCN film on a surface to be processed of an object, the method including: supplying an Si source gas containing an Si source into a processing chamber having the object accommodated therein; and supplying a gas containing a nitriding agent into the processing chamber after supplying the Si source gas, wherein a compound of nitrogen and carbon is used as the nitriding agent and wherein R1, R2 and R3 in the compound of nitrogen and carbon are linear or branched alkyl groups having 1 to 8 carbon atoms, which may have hydrogen atoms or substituents. Therefore, the SiCN film can be formed while maintaining a satisfactory film forming rate even though the film forming temperature is lowered.
US09390906B1 Method for creating asymmetrical wafer
The present invention consists of a method for imparting asymmetry to a truncated annular wafer by either rounding one corner of the orientation flat, or rounding one corner of a notch. This novel method of rounding corners impart a visual and/or tactile asymmetry which can be utilized by a person in order to differentiate between the two different sides of the wafer. This inventive wafer design and method for making an asymmetric wafer is especially useful in the field of semiconductor technology and may be used on sapphire crystal wafers or any other class of wafer.
US09390901B2 System and method for liquid extraction electrospray-assisted sample transfer to solution for chemical analysis
A system for sampling a surface includes a surface sampling probe comprising a solvent liquid supply conduit and a distal end, and a sample collector for suspending a sample collection liquid adjacent to the distal end of the probe. A first electrode provides a first voltage to solvent liquid at the distal end of the probe. The first voltage produces a field sufficient to generate electrospray plume at the distal end of the probe. A second electrode provides a second voltage and is positioned to produce a plume-directing field sufficient to direct the electrospray droplets and ions to the suspended sample collection liquid. The second voltage is less than the first voltage in absolute value. A voltage supply system supplies the voltages to the first electrode and the second electrode. The first electrode can apply the first voltage directly to the solvent liquid. A method for sampling for a surface is also disclosed.
US09390900B2 Mass spectrometer
A mass spectrometer of ionizing a sample by a dielectric barrier discharge under a reduced pressure. An ionization with inconsiderable fragmentation can be carried out highly sensitively by the present invention.
US09390894B2 Modular microplasma microchannel reactor devices, miniature reactor modules and ozone generation devices
A preferred modular microplasma microchannel reactor device includes a microchannel array arranged with respect to electrodes for generation of plasma and isolated by dielectric from the electrodes. A cover covers a central portion of the microchannel array, while leaving end portions of the microchannel array exposed. A gas inlet and product outlet are arranged to permit flow into, through and out of the microchannel array. Reactor modules of the invention include pluralities of the modular reactor devices. The reactors devices can be arranged by a housing or a frame to be in fluid communication. A system of the invention arranges pluralities of modules. Preferred module housings, frames and reactors include structural features to create alignments and connections. Preferred modules include fans to circulate feedstock and reaction product. Other reactor devices provide plasma actuation for flow.
US09390893B2 Sub-pulsing during a state
A method for achieving sub-pulsing during a state is described. The method includes receiving a clock signal from a clock source, the clock signal having two states and generating a pulsed signal from the clock signal. The pulsed signal has sub-states within one of the states. The sub-states alternate with respect to each other at a frequency greater than a frequency of the states. The method includes providing the pulsed signal to control power of a radio frequency (RF) signal that is generated by an RF generator. The power is controlled to be synchronous with the pulsed signal.
US09390892B2 Laser sustained plasma light source with electrically induced gas flow
A laser sustained plasma light source includes a plasma bulb containing a working gas flow driven by an electric current sustained within the plasma bulb. Charged particles are introduced into the working gas of the plasma bulb. An arrangement of electrodes maintained at different voltage levels drive the charged particles through the working gas. The movement of the charged particles within the working gas causes the working gas to flow in the direction of movement of the charged particles by entrainment. The resulting working gas flow increases convection around the plasma and increases laser to plasma interaction. The working gas flow within the plasma bulb can be stabilized and controlled by control of the voltages present on the each of the electrodes. A more stable flow of working gas through the plasma contributes to a more stable plasma shape and position within the plasma bulb.
US09390891B2 Apparatus for charged particle lithography system
An apparatus for use in a charged particle multi-beam lithography system is disclosed. The apparatus includes a plurality of charged particle doublets each having a first aperture and each configured to demagnify a beamlet incident upon the first aperture thereby producing a demagnified beamlet. The apparatus further includes a plurality of charged particle lenses each associated with one of the charged particle doublets, each having a second aperture, and each configured to receive the demagnified beamlet from the associated charged particle doublet and to realize one of two states: a switched-on state, wherein the demagnified beamlet is allowed to travel along a desired path, and a switched-off state, wherein the demagnified beamlet is prevented from traveling along the desired path. In embodiments, the first aperture is greater than the second aperture, thereby improving particle beam efficiency in the charged particle multi-beam lithography system.
US09390889B2 Ion implanter and method of ion beam tuning
An energy analysis slit of an ion implanter is configured to enable switching between a standard slit opening used for implantation processing performed under a predetermined implantation condition and a high-precision slit opening having higher energy precision than the standard slit opening and used to tune an acceleration parameter for a radio frequency linear accelerator. The acceleration parameter is determined for the predetermined implantation condition so that at least a part of ions supplied to the radio frequency linear accelerator is accelerated to have target energy, and so that the beam current amount measured by a beam measurement unit is equivalent to a target beam current amount.
US09390888B2 Apparatus and method of applying small-angle electron scattering to characterize nanostructures on opaque substrate
An apparatus and methods for small-angle electron beam scattering measurements in a reflection or a backscattering mode are provided. The apparatus includes an electron source, electron collimation optics before a sample, electron projection optics after the sample, a sample stage capable of holding the sample, and a electron detector module. The electrons emitted from the source are collimated and positioned to impinge nanostructures on the sample. The signals resulting from the interactions between the impinging electrons and the nanostructures are further magnified by the electron projection optics to reach a sufficient angular resolution before recorded by the electron detector module.
US09390884B2 Method of inspecting a semiconductor substrate
A semiconductor substrate inspection system includes an e-beam inspection system configured to deliver electrons to a specimen semiconductor substrate. A sensor is configured to detect reflected electrons that reflect off the surface of the specimen semiconductor substrate. An analysis unit is configured to determine a number of electrons received by the semiconductor substrate, and to determine at least one target region including at least one defect of the semiconductor substrate. A reference image module is in electrical communication with the analysis unit. The reference image module is configured to generate a first digital image having a plurality of pixels, and to adjust a gray-scale level of the pixels included in the target region based on the number electrons included in each pixel to generate a second digital image that excludes the at least one defect.
US09390883B2 Implantation apparatus with ion beam directing unit, semiconductor device and method of manufacturing
An ion implantation apparatus includes an ion beam directing unit, a substrate support, and a controller. The controller is configured to effect a relative movement between an ion beam passing the ion beam directing unit and the substrate support. A beam track of the ion beam on a substrate mounted on the substrate support includes circles or a spiral.
US09390882B2 Apparatus having a magnetic lens configured to diverge an electron beam
Apparatus having a magnetic lens configured to diverge an electron beam are useful in three-dimensional imaging using an electron microscope. The magnetic lens includes a body member having a core and defining a gap, and a winding surrounding a portion of the core. The body member and winding are configured such that an electrical current through the winding produces a magnetic field proximate to the gap.
US09390878B2 Electron emission source
An electron emission source includes a first electrode, a semiconductor layer, an insulating layer, and a second electrode stacked in that sequence, wherein an electron collection layer is sandwiched between the semiconductor layer and the insulating layer, the electron collection layer is in contact with the semiconductor layer and the insulating layer, and the electron collection layer is a conductive layer to collect electrons.
US09390877B2 RF MEMS based large scale cross point electrical switch
This disclosure provides systems, methods, and apparatus for providing a crosspoint switch used in an optical fiber data network. The crosspoint switch can switch optical signals received from any of a plurality of input optical fibers to any one of a plurality of output optical fibers. The crosspoint switch converts the optical signals received from the input optical fibers into electrical signals, switches the electrical signals, and converts the switched electrical signals back into optical signals before transmitting them over the output optical fibers. A micro-electromechanical systems (MEMS) electrical switch array is utilized to switch the electrical signals. The MEMS electrical switch array includes MEMS switching elements that allow for high frequency and high bandwidth operation of the crosspoint switch. The crosspoint switch can utilize circuit switching methodology for switching decisions.
US09390874B2 Device for detecting and signaling a change in the state of a push button
A device for detecting and signalling a change of state of a push-button, for example of emergency stop type. The device is in a form of an attachment that can be removed from the push-button and includes: an electrical energy generator housed in a casing of the device and configured to cooperate with a control head of the push-button to convert mechanical energy into electrical energy; and a wireless transmitter to send a message to a remote receiver, the wireless transmitter being housed in the casing and electrically connected to the electrical energy generator.
US09390868B2 Switch assembly for disconnect operator
A sealed switch assembly for use with a disconnect operator movable between an on state, a tripped state, and an off state. The disconnect operator housed within a sealed enclosure. The switch assembly includes a housing sealed to the enclosure to inhibit ingress of solids and liquids therebetween. A handle is coupled to the disconnect operator and is disposed at least partially within the housing. The handle is sealed to the housing to inhibit ingress of solids and liquids therebetween, and is moveable between an on position and an off position. A low-friction trip indicator mechanism operates independent of the handle to indicate when the disconnect operator is in the tripped state.
US09390864B2 Additives for dye-sensitized solar cells
The present invention relates to the use of at least one imidazol derivative of formula I or 1-(3,3,4,4,4-pentafluorobutyl)-1H-imidazole, 1-(3,3,4,4,4-pentafluorobutyl)-1,2,3-triazole or 1-(2′-thioethyl)ethylimidazole as additive in dye-sensitized solar cells and to special electrolyte formulations and a dye-sensitized solar cell comprising at least one compound of formula I or 1-(3,3,4,4,4-pentafluorobutyl)-1H-imidazole, 1-(3,3,4,4,4-pentafluorobutyl)-1,2,3-triazole or 1-(2′-thioethyl)ethylimidazole.
US09390863B2 Composite electrode and electrolytic capacitor
Provided is a composite electrode including a metal layer and a composite dielectric layer. The composite dielectric layer includes a metal oxide dielectric layer and a polymer dielectric layer. The composite dielectric layer overlays the metal layer. The polymer dielectric layer includes a nitrogen-containing polymer and overlays the metal oxide dielectric layer. An electrolytic capacitor is also provided. The electrolytic capacitor has a polymer dielectric layer made of a nitrogen-containing polymer, and such polymer dielectric layer is beneficial to increase the insulating property of the metal oxide dielectric layer and the coverage property of the conductive polymer. Thereby, the conventional leakage current can be significantly reduced and the yield can be improved.
US09390861B2 Capacitance bank systems and methods
A capacitance bank system includes a plurality of voltage controlled capacitance cells and an output node. The plurality of capacitance cells have an anti-parallel configuration. The plurality of capacitance cells are configured to selectively provide cell capacitances. The output node is coupled to the plurality of capacitance cells. The output node is configured to provide an input capacitance step smaller than a minimum physical capacitor supported by a particular technology.
US09390857B2 Film capacitor
A capacitor comprises a substrate layer, a first electrode layer disposed on the substrate layer, and a first dielectric layer disposed on the electrode layer. The dielectric layer comprises inorganic ferroelectric or antiferroelectric particles, and a polymeric material having an elongation less than or equal to about 5 percent.
US09390856B2 Dielectric composition, multilayer ceramic capacitor using the same, and method for manufacturing multilayer ceramic capacitor
A dielectric composition includes a base main component including Ba and Ti and an accessory component, wherein a ratio of domain width/grain size of the dielectric composition is in the range of 0 to 0.2, a multilayer ceramic capacitor using the same, and a method for manufacturing a multilayer ceramic capacitor. It is possible to provide a dielectric composition that can implement a higher dielectric constant and good high temperature withstand voltage characteristics in the same grain size condition. It is expected that this effect can be effectively applied to the development of ultra high capacity MLCCs having a thin dielectric by implementing the same capacity while increasing the thickness of the dielectric than the case of applying the conventional dielectric material.
US09390853B2 Multilayer ceramic capacitor and mounting board therefor
There is provided a multilayer ceramic capacitor including a ceramic body having first and second main surfaces, third and fourth end surfaces, and fifth and sixth side surfaces; a plurality of first and second internal electrodes having a dielectric layer to be alternately exposed to the third and fourth end surfaces; and first and second external electrodes formed on the end surfaces and the main surfaces and electrically connected to the first and second internal electrodes, wherein when a width of the first or second external electrode is A and a length of a margin part of the ceramic body in the length direction is B, a ratio (A/B) of the width of the first or second external electrode to the length of the margin part of the ceramic body in the length direction is 3.3 or less (A/B≦3.3).
US09390851B2 Coil
A coil which maintains a balance of a parasitic capacitance and has a structure that can be multilayered. The coil is stacked with a structure which includes winding wire portions formed of a wire wound for several turns in a plane in each layer, wherein winding wire portions in each layer include a first winding portion formed by performing a single turn of winding in each layer in a same winding direction from a bottom layer to an uppermost layer, and a second winding portion formed by performing a single turn of winding in each layer in a same winding direction from the uppermost layer to the bottom layer, and the winding directions of the first and second winding portions are identical to each other and the first winding portion and the second winding portion are joined in the uppermost layer or the bottom layer.
US09390845B2 Core shell superparamagnetic iron oxide nanoparticles with functional metal silicate core shell interface and a magnetic core containing the nanoparticles
Core shell nanoparticles of an iron oxide core, a silicon dioxide shell and an iron silicate interface between the core and the shell are provided. The magnetic properties of the nanoparticles are tunable by control of the iron silicate interface thickness. A magnetic core of high magnetic moment obtained by compression sintering the thermally annealed superparamagnetic core shell nanoparticles is also provided. The magnetic core has little core loss due to hysteresis or eddy current flow.
US09390843B2 Input circuit includes a constant current circuit
In aspects of the invention, a zap circuit and a decoder for decoding the output of the zap circuit turn ON only one analog switch in a selector. The selector delivers an electric potential at a node of a dividing resistor selected by the zap circuit. The output of the selector is delivered to the non-inverting input of an operational amplifier, and the output of the operational amplifier is delivered to the gate terminal of a MOSFET. The operational amplifier controls the gate of the MOSFET so that the potential at a current detecting resistor equals the output of the selector. As a result, a current proportional to the input voltage flows through the MOSFET. Because the current through a dividing resistor is also proportional to the input voltage, the total current is eventually proportional to the input voltage.
US09390841B2 Vapor deposition apparatus, method of forming thin film using the same and method of manufacturing organic light-emitting display apparatus
A vapor deposition apparatus in which a deposition process is performed by moving a substrate, the vapor deposition apparatus including a supply unit that injects at least one raw material gas towards the substrate, and a blocking gas flow generation unit that is disposed corresponding to the supply unit and generates a gas-flow that blocks a flow of the raw material gas.
US09390840B2 Insulated high-temperature wire superconductor and method for producing same
An insulated high-temperature wire superconductor includes a wire of a non-insulated high-temperature wire superconductor, the width of which is at least 10 times its thickness and in which a high-temperature superconductor is introduced into a matrix or is applied to a substrate. The wire is provided with an electrically non-conducting insulating layer on both sides such that the two insulating layers have an insulating edge width in a range from 2 mm to 200 mm which projects in relation to the wire.
US09390836B2 Wire harness
The purpose of the present invention is to provide a wire harness which allows only the nonwoven fabric exterior structure to be disassembled without damaging an interior wire bundle. A wire harness according to the present invention has a nonwoven fabric exterior structure obtained by heat-molding while a wire bundle is wound with the nonwoven fabric. The nonwoven fabric exterior structure protects a part of the outer periphery of the wire bundle. The wire harness is provided with a paper tape that is provided with a part thereof exposed from the outer peripheral surface of the nonwoven fabric exterior structure. The paper tape is heat-molded together with the nonwoven fabric with the tip sticking out from the winding end edge so that the base portion of the tip exposed from the outer peripheral surface of the nonwoven fabric exterior structure shows the position of the winding end edge.
US09390835B2 High temperature insulating tape and wire or cable sheathed therewith
A composite coating includes a first layer, a second layer, and a fluoropolymer film disposed on the second layer. The first layer includes a polymer matrix with mica particles dispersed throughout, while the second layer includes a polyether ether ketone (PEEK).
US09390831B2 Electronic device using anisotropic conductive composition and film
An electronic device includes a connection material formed from an adhesive composition that includes: a polymer resin; a cationic polymerization catalyst represented by Formula 1; and an organic base, where, in Formula 1, R1 may be selected from the group of hydrogen, C1-C6 alkyl, C6-C14 aryl, —C(═O)R4, —C(═O)OR5, and —C(═O)NHR6 (in which R4, R5, and R6 may each independently be selected from C1-C6 alkyl and C6-C14 aryl), R2 may be C1-C6 alkyl, and R3 may be selected from the group of a nitrobenzyl group, a dinitrobenzyl group, a trinitrobenzyl group, a benzyl group, a C1-C6 alkyl-substituted benzyl group, and a naphthylmethyl group.
US09390829B2 Paste composition for electrode and photovoltaic cell
The paste composition for an electrode are constituted with copper-containing particles having a peak temperature of an exothermic peak showing a maximum area in the simultaneous ThermoGravimetry/Differential Thermal Analysis of 280° C. or higher, glass particles, a solvent, and a resin. Further, the photovoltaic cell has an electrode formed by using the paste composition for a photovoltaic cell electrode.
US09390828B2 Crystallographically-oriented carbon nanotubes grown on few-layer graphene films
A thermal and electrical conducting apparatus includes a few-layer graphene film having a thickness D where D≦1.5 nm and a plurality of carbon nanotubes crystallographically aligned with the few-layer graphene film.
US09390826B2 Energy degrader and charged particle beam irradiation system equipped therewith
The present invention provides an energy degrader (10) that can mitigate a reduction in the transmittance of a low-energy charged particle beam, and a charged particle beam irradiation system equipped therewith. The energy degrader includes a plurality of attenuating members (11A to 11G) with different amounts of energy attenuation, and the low-energy-side attenuating member (11G) with a larger amount of energy attenuation is made of a material having a higher transmittance than that of the high-energy-side attenuating member (11A) with a smaller amount of energy attenuation.
US09390825B2 X-ray distribution adjusting filter, CT apparatus and method thereof
An X-ray distribution adjusting filter, and a CT apparatus and method thereof are provided, in which the X-ray distribution adjusting filter has a hollow inner part, and when rotating, a shape thereof is changed according to rotation angles, such that intensity distribution of X-rays radiating toward a subject may be adjusted.
US09390824B2 Chromatic energy filter
An energy filter device for radiation includes at least one focusing device configured as an energy-dependent focusing device and at least one beam separating device.
US09390823B2 Radiation image acquiring device
There is provided is a radiation image acquiring device which corrects a positional displacement between a collimator and a detector and obtains an image without artifacts. The device includes a detector (21) to measure a radiation; a collimator (26) including a through-hole (27) having one or more detectors (21) disposed therein and configured to limit an incident direction of the radiation; a positional displacement measuring unit configured to measure a positional displacement between the detector (21) and the collimator (26) by use of a profile of a radiation source measured by the detector (21) based on the radiation source disposed corresponding to a predetermined detector (21).
US09390820B2 Electricity production module
An underwater electricity production module includes an elongated cylindrical box, which includes a reactor compartment, which further includes a reservoir chamber and a dry chamber; an electricity production unit including a reactor container, the reactor container being placed in the dry chamber in a reactor pit having a first lower portion; and a circumferential wall including a first part delimiting the reservoir chamber, the first part being in a direct heat exchange relationship with water of the marine environment surrounding the elongated cylindrical box. The reservoir chamber has a second lower portion connected to the first lower portion through a water inlet duct placed along the circumferential wall. The reactor pit has a first upper portion connected to a corresponding portion of the reservoir chamber through a water return duct.
US09390819B2 Submerged energy production module
An underwater electricity production module includes an elongated cylindrical box, which includes a reactor compartment and an electricity generator compartment. The reactor compartment includes a reservoir chamber and a dry chamber. A nuclear reactor is located in the dry chamber. The reservoir chamber forms a safety water storage reservoir. At least a radial wall of the reservoir chamber is in a direct heat exchange relationship with a marine environment that surrounds the cylindrical box. The reservoir chamber and the dry chamber can be placed in fluid connection. A seawater inlet is formed in a radial wall of the receiving compartment. A duct connects the seawater inlet to the dry chamber. A quenching valve is in the duct. Opening of the quenching valve allows the dry chamber, and thus the nuclear reactor, to be quenched with seawater.
US09390811B2 Semiconductor device with fuse array and method for operating the same
A semiconductor device includes a fuse array including verification fuses and normal fuses, a determination block suitable for reading data programmed in the verification fuses based on a read reference voltage and during a boot-up preparation section, determining whether or not a read value is the same as a predetermined value, and a level control block suitable for adjusting a level of the read reference voltage based on a determined result during the boot-up preparation section.
US09390810B2 Semiconductor device and control method thereof
In an OTP memory storing a one-bit of the data by two gate insulating film destruction type nonvolatile memory cells where a same bit line is connected and different word lines are connected, writings and readings of the data for selected two nonvolatile memory cells constituting one-bit are performed by simultaneously selecting the selected two nonvolatile memory cells, and verifications for the selected two nonvolatile memory cells are performed by individually selecting one and the other of the selected two nonvolatile memory cells one by one.
US09390809B1 Data storage in a memory block following WL-WL short
A method includes defining a normal voltage configuration for application to word lines (WLs) and Bit lines (BLs) of a memory block, and a an abnormal voltage configuration, different from the normal voltage configuration, for application to the WLs and the BLs of the memory block when a word-line-to-word-line (WL-WL) short-circuit is found between at least two of the WLs in the memory block. If no WL-WL short-circuit is found in the memory block, a data storage operation is performed in the memory block by applying the normal voltage configuration. If a WL-WL short-circuit is found in the memory block, the data storage operation is performed in the memory block by applying the abnormal voltage configuration.
US09390803B2 Non-volatile memory devices, operating methods thereof and memory systems including the same
Nonvolatile memory devices, operating methods thereof, and memory systems including the same. A nonvolatile memory device may include a memory cell array and a word line driver. The memory cell array may include a plurality of memory cells. The word line driver may be configured to apply word line voltages to a plurality of word lines connected to the plurality of memory cells, respectively. Magnitudes of the word line voltages may be determined according to locations of the plurality of word lines.
US09390799B2 Non-volatile memory cell devices and methods, having a storage cell with two sidewall bit cells
Non-volatile memory cells and methods. In an apparatus, an array of non-volatile storage cells formed in a portion of a semiconductor substrate includes a first storage cell having a first bit cell and a second bit cell; a second storage cell having a third bit cell and a fourth bit cell; and a column multiplexer coupled to a plurality of column lines, selected ones of the column lines coupled to a first source/drain terminal of the first and the second storage cell and coupled to a second source/drain terminal of the first and second storage cell, the column multiplexer coupling a voltage to one of the column lines connected to the first storage cell corresponding to the data, and coupling a voltage to one of the column lines connected to the second storage cell corresponding to the complementary data.
US09390798B2 1T-1R architecture for resistive random access memory
A memory device includes an array of resistive memory cells wherein each pair of resistive memory cells includes a first switching element electrically coupled in series to a first resistive memory element and a second switching element electrically coupled in series to a second resistive memory element. A source of the first switching element and a source of the second switching element receive a common source line signal.
US09390796B2 Global bit line pre-charge circuit that compensates for process, operating voltage, and temperature variations
A memory array includes wordlines, local bitlines, two-terminal memory elements, global bitlines, and local-to-global bitline pass gates and gain stages. The memory elements are formed between the wordlines and local bitlines. Each local bitline is selectively coupled to an associated global bitline, by way of an associated local-to-global bitline pass gate. During a read operation when a memory element of a local bitline is selected to be read, a local-to-global gain stage is configured to amplify a signal on or passing through the local bitline to an amplified signal on or along an associated global bitline. The amplified signal, which in one embodiment is dependent on the resistive state of the selected memory element, is used to rapidly determine the memory state stored by the selected memory element. The global bit line and/or the selected local bit line can be biased to compensate for the Process Voltage Temperature (PVT) variation.
US09390789B2 Semiconductor storage device having an SRAM memory cell and control and precharge circuits
A semiconductor storage device includes an SRAM memory cell composed of a drive transistor, a transfer transistor and a load transistor, an I/O circuit that is connected to bit lines connected to the memory cell, and an operating mode control circuit that switches an operating mode of the I/O circuit between a resume standby mode and a normal operation mode, wherein the I/O circuit includes a write driver that writes data to bit lines, a sense amplifier that reads data from the bit lines, a first switch inserted between the bit lines and the write driver, a second switch inserted between the bit lines and the sense amplifier, a precharge circuit that precharges the bit lines, and a control circuit that controls the first and second switches and the precharge circuit according to a signal from the operating mode control circuit.
US09390787B2 Biasing bulk of a transistor
A circuit comprises a first transistor of a first type, a second transistor of a second type, and a third transistor of the first type or the second type. The first transistor and the second transistor form an inverter. The third transistor is coupled with an output of the inverter. The circuit includes at least one of the following voltage sources: a first voltage source, a second voltage source, and a third voltage source. The first voltage source is coupled with a bulk of the first transistor, and is different from a first supply voltage source of the first transistor. T second voltage source is coupled with a bulk of the second transistor, and is different from a second supply voltage of the second transistor. The third voltage source is coupled with a bulk of the third transistor.
US09390786B2 Method of minimizing the operating voltage of an SRAM cell
An SRAM cell is formed of FDSOI-type NMOS and PMOS transistors. A doped well extends under the NMOS and PMOS transistors and is separated therefrom by an insulating layer. A bias voltage is applied to the doped well. The applied bias voltage is adjusted according to a state of the memory cell. For example, a temperature of the memory cell is sensed and the bias voltage adjusted as a function of the sensed temperature. The adjustment in the bias voltage is configured so that threshold voltages of the NMOS and PMOS transistors are substantially equal to n and p target threshold voltages, respectively.
US09390785B2 Method, apparatus and system for determining a write recovery time of a memory based on temperature
Techniques and mechanisms for determining a write recovery time of a memory device. In an embodiment, thermal detection logic detects a signal from a thermal sensor indicating a temperature state of a resource of the memory device. A value of a write recovery parameter is set based on the signal from the thermal sensor. In another embodiment, command logic generates a signal to precharge one or more cells of the memory device. The write recovery parameter is used by timer logic to control a timing of the signal to precharge the one or more cells.
US09390783B1 Memory devices and systems including cache devices for memory modules
A memory apparatus may include one or more cache memory integrated circuit (ICs), each of which may have compare circuitry that compares a received address with stored compare values, a cache memory that provides cached data in response to the compare circuitry, a controller interface having at least address and control signal input terminals, and a module output connection having at least address and control signal output terminals corresponding to the address and control signal input terminals.
US09390782B2 Memory with refresh logic to accommodate low-retention storage rows
An apparatus is disclosed that includes a memory controller chip and memory chips packaged with the memory controller chip. Each memory chip includes normal-retention storage rows that exhibit retention times greater or equal to a first time interval, and having been tested to generate information identifying low-retention storage rows that exhibit retention times less than the first time interval. Refresh logic refreshes the normal-retention storage rows at a first refresh rate corresponding to the first time interval, and refreshes each low-retention storage row at a second refresh rate that is greater than the first refresh rate.
US09390781B2 Semiconductor device and method for manufacturing semiconductor device
A semiconductor device includes a transistor formed on a semiconductor substrate, a first insulation film formed above the semiconductor substrate, and first and second capacitors located on the first insulation film. The first capacitor includes a lower electrode, a ferroelectric, and an upper electrode. One of the lower electrode and the upper electrode is connected to an impurity region of the transistor. The second capacitor includes a first electrode, a first dielectric, a second electrode, a second dielectric, and a third electrode. The lower electrode is formed from the same material as the first electrode, the ferroelectric is formed from the same material as the first dielectric, and the upper electrode is formed from the same material as the second electrode.
US09390779B2 System and method of sensing a memory cell
A method includes sensing a state of a data cell to generate a data voltage. The state of the data cell corresponds to a state of a programmable resistance based memory element of the data cell. The method further includes sensing a state of a reference cell to generate a reference voltage. The state of the data cell and the state of the reference cell are sensed via a common sensing path. The method further includes determining a logic value of the data cell based on the data voltage and the reference voltage.
US09390777B2 Memory controller for strobe-based memory systems
An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal.
US09390772B2 Semiconductor device including option pads for determining an operating structure thereof, and a system having the same
A semiconductor device includes a memory cell array, pad groups, a first option pad, a second option pad and a data input multiplexer block configured to transmit data, input through all or part of the pad groups, to the memory cell array based on whether the first option pad and a ground are connected to each other, wherein the data input multiplexer block is configured to select first pad groups among the pad groups or second pad groups among the pad groups as the part of the pad groups based on whether the second option pad and the ground are connected to each other.
US09390771B2 Circuit and method for sensing a difference in voltage on a pair of dual signal lines, in particular through equalize transistor
A circuit for sensing a difference in voltage on a pair of dual signal lines comprising a first signal line and a second signal line complementary to the first signal line, comprising: a pair of cross-coupled inverters arranged between the first and the second signal lines, each inverter having a pull-up transistor and a pull-down transistor, the sources of the pull-up transistors or of the pull-down transistors being respectively connected to a first and a second pull voltage signals, a decode transistor having source and drain terminals respectively coupled to one of the first and second signal lines and a gate controlled by a decoding control signal, whereby when the decode transistor is turned on by the decoding control signal, a short circuit is established between the first and the second signal lines through which current flows from one of the first and second pull voltage signals, thereby generating a disturb in between the first and the second pull voltage signals.
US09390770B2 Apparatuses and methods for accessing memory including sense amplifier sections and coupled sources
Apparatuses and methods for accessing memory are described. An example method includes accessing memory cells of a memory section, and sharing a source of an inactive sense amplifier section with an active sense amplifier section coupled to the memory cells of the memory section during a memory access operation to the memory section coupled to the active sense amplifier section. An example apparatus includes a memory section and a first sense amplifier section associated with the memory section. The first sense amplifier section includes a sense amplifier and includes a read/write circuit coupled to a first source associated with the first sense amplifier section. The source associated with the first sense amplifier section is coupled to a source associated with a second sense amplifier section. The second sense amplifier section is configured to be inactive during a memory access operation to the memory section.
US09390769B1 Sense amplifiers and multiplexed latches
Multiplexed latches include a multiplexor having a first data input, a second data input, a selection input, and a multiplexor output. A first latch has a first latch clock input, and a first latch output. A second latch has a second latch clock input, and a second latch output. The first latch output is connected to the first data input of the multiplexor, and the second latch output is connected to the second data input of the multiplexor. A feedback loop connects the multiplexor output to the first latch clock input and the second latch clock input. When the selection signal is received by the multiplexor, the feedback loop feeds the output from the multiplexor back to the latches to maintain the existing latch output until the clock signal transitions, to avoid glitches in the multiplexor output when the selection signal and clock signal are not synchronized.
US09390767B2 Battery-less cache memory module with integrated backup
A memory module is provided comprising a substrate having an interface to a host system, volatile memory, non-volatile memory, and a logic device. The logic device may receive the indicator of an external triggering event and copies data from the volatile memory devices to the non-volatile memory devices upon receipt of such indicator. When the indicator of the triggering event has cleared, the logic device restores the data from the non-volatile to the volatile memory devices. The memory module may include a passive backup power source (e.g., super-capacitor) that is charged by an external power source and temporarily provides power to the memory module to copy the data from volatile to non-volatile memory. A voltage detector within the memory module may monitor the voltage of an external power source and generates an indicator of a power loss event if voltage of the external power source falls below a threshold level.
US09390762B1 Method for assembling a storage device
A storage device assembly fixture comprises a platform configured to receive an external cover for a storage device, the external cover having a first face and a second face generally parallel to and opposing the first face, the first face coupled to the second face at a back end of the external cover, the first face defining a first edge at a front end of the external cover opposite the back end, and the second face defining a second edge at the front end; a first finger configured to engage the first edge; a second finger configured to engage the second edge; and a pivot assembly coupled to the second finger, the pivot assembly rotatable about a pivot axis and configured to pivot the second finger away from the first finger.
US09390760B2 Imaging system, imaging device and program
An imaging system includes an imaging device and a portable terminal device. The portable terminal device includes a marker time information generation unit, a time difference detection unit, and a correction unit. The marker time information generation unit generates marker time information containing a marker input to a video file generated by the imaging device and input time of the marker in association with each other. The time difference detection unit detects a time difference between time measured by the clock of the imaging device and time measured by the clock of the portable terminal device. Then, the correction unit corrects the input time of the marker contained in the marker time information based on the time difference detected by the time difference detection unit and thereby generates corrected marker time information.
US09390759B2 Skew estimation for a tape storage device
An apparatus for operating a tape storage device comprises a tape skew estimation unit for estimating a value related to a skew of a tape storage medium arranged in the tape storage device relative to a head module of the tape storage device. A servo pattern decoder is configured to decode information encoded in a servo pattern written to one or more servo bands of the tape storage medium based on read-back signals of at least two servo readers of the tape storage device arranged for reading the servo pattern from the one or more servo bands and based on the estimated skew related value.
US09390758B2 Library apparatus, storage medium initialization method and library controller
A library apparatus includes an initialization processing unit and an operation processing unit. The initialization processing unit, when accepting an initialization request to initialize a storage medium to which a wireless communication device is added, the wireless communication device including an IC chip with management information and including an electronic paper with a display unit for displaying the management information, stores a label name of the storage medium and data in the management information, the label name being acquired through the initialization request, and the data being written to a block used as an index label of the storage medium. The operation processing unit, when loading the storage medium into a drive, writes the data that the initialization processing unit has stored in the management information corresponding to the storage medium to the block used as the index label of the storage medium.
US09390757B2 System and method for adaptive media playback based on destination
Disclosed herein are systems, methods, and computer readable-media for adaptive media playback based on destination. The method for adaptive media playback comprises determining one or more destinations, collecting media content that is relevant to or describes the one or more destinations, assembling the media content into a program, and outputting the program. In various embodiments, media content may be advertising, consumer-generated, based on real-time events, based on a schedule, or assembled to fit within an estimated available time. Media content may be assembled using an adaptation engine that selects a plurality of media segments that fit in the estimated available time, orders the plurality of media segments, alters at least one of the plurality of media segments to fit the estimated available time, if necessary, and creates a playlist of selected media content containing the plurality of media segments.
US09390755B2 Video processing system
A method and apparatus for producing video content. The method includes acquiring video data from a source. If the video data is not digitized, then the video data is digitized. The method includes generating scene indexes for the video data including a representative still image for each scene and combining the video data and scene indexes along with a media player on a video disc. The video player is operable to play the video data in accordance with the scene indexes including playing a scene from the video data on a client computer while displaying the representative stills for other of the scenes available for display on the video disc.
US09390746B2 Gate structure and electronic device using the same
An electronic and a gate structure including a first door-leaf, a second door-leaf, and a latch are provided. The first door-leaf having three first locking portions is movably assembled to an entrance of an object. The second door-leaf having two second locking portions is movably disposed at the first door-leaf, such that the first door-leaf closes or opens the entrance. The latch having a third locking portion and a fourth locking portion is movably disposed on the first door-leaf and between the first and the second door-leaves. The first locking portions are located on a moving path of the third locking portion. The second door-leaf is locked to the object and the third locking portion is located at the middle one of the three first locking portions, the fourth locking portion is blocked with one second locking portion and the first door-leaf covers the entrance.
US09390738B1 Reading and writing to a HAMR recording medium at different skew angles
Bits are written to a track of a heat-assisted magnetic recording medium via a write transducer at a first skew angle. The track is read via a read transducer oriented at a second skew angle different from the first skew angle. The second skew angle causes the read transducer be more closely aligned with boundaries of the bits than if oriented at the first skew angle.
US09390722B2 Method and device for quantizing voice signals in a band-selective manner
The present invention relates to a method and device for quantizing voice signals in a band-selective manner. A voice decoding method may include inversely quantizing voice parameter information produced from a selectively quantized voice band and performing inverse transform on the basis of the inversely quantized voice parameter information. Thus, according to the present invention, coding/decoding efficiency in voice coding/decoding may be increased by selectively coding/decoding important information.
US09390720B2 Entropy encoding and decoding using direct level and run-length/level context-adaptive arithmetic coding/decoding modes
An encoder performs context-adaptive arithmetic encoding of transform coefficient data. For example, an encoder switches between coding of direct levels of quantized transform coefficient data and run-level coding of run lengths and levels of quantized transform coefficient data. The encoder can determine when to switch between coding modes based on a pre-determined switch point or by counting consecutive coefficients having a predominant value (e.g., zero). A decoder performs corresponding context-adaptive arithmetic decoding.
US09390716B2 Control method for household electrical appliance, household electrical appliance control system, and gateway
A gateway (103) determines whether or not voice information collected by a sound collecting device (102) needs to be subjected to voice recognition by a server apparatus (101), and only voice information that is determined to need to be subjected to voice recognition by the server apparatus (101) is transmitted by the gateway (103) to the server apparatus (101). The server apparatus (101) recognizes the received voice information, decides a control instruction, and transmits the control instruction to a household electrical appliance (104) via the gateway (103).
US09390714B2 Control method using voice and gesture in multimedia device and multimedia device thereof
A multimedia device and a method for controlling the same are disclosed, in which voice and gesture of a user are recognized by the multimedia device to allow the user to execute a desired operation. The method Includes enabling an input of a remote controller input of a gesture and a voice; receiving user the gesture and the voice through the remote controller; identifying a first command associated with the received gesture; identifying a second command associated with the received voice; comparing the first command and the second command to each other; and performing a function associated with the first or second command when the comparing step indicates that the first command corresponds to the second command. The multimedia device executes the operation desired by the user.
US09390711B2 Information recognition method and apparatus
An information recognition method and apparatus are provided. The method includes receiving, by a terminal, voice information, extracting a voice feature from the voice information, performing matching calculation on the voice feature and a phoneme string corresponding to each candidate text in multiple candidate texts to obtain a recognition result, where the recognition result includes at least one command word and a label corresponding to the at least one command word, and recognizing, according to the label corresponding to the at least one command word, an operation instruction corresponding to the voice information. A terminal recognizes text information, which is corresponding to voice information input by a user, as an operation instruction.
US09390710B2 Method for reranking speech recognition results
Provided is a speech recognition method using machine learning, including: receiving a speech signal as an input, performing speech recognition to generate speech recognition result information including multiple candidate sentences and ranks of the respective candidate sentences; processing the multiple candidate sentences included in the speech recognition result information according to a machine learning model which is learned in advance and changing the ranks of the multiple candidate sentences to re-rank the multiple candidate sentences; and selecting the highest-rank candidate sentence among the re-ranked multiple candidate sentences as a speech recognition result. Particularly, the machine learning model is generated by: receiving the speech signal and a correct answer sentence as inputs; generating the speech recognition result information and a correct answer set; generating learning data by using the correct answer set; and performing the machine learning of changing the ranks of the candidate sentences.
US09390704B2 Method of manufacturing a sound absorbing panel
The present disclosure provides a method of manufacturing a sound absorbing panel in which a reflective wall on one of faces of a set of sound absorbing cells. In particular, a passage on a portion of a thickness (E) of the set of sound absorbing cells is formed on an opposite face of the one of the faces, while the passage forming a main channel for a communication between sound absorbing cells and for a circulation of a de-icing fluid.
US09390703B2 Masking sound generating apparatus, storage medium stored with masking sound signal, masking sound reproducing apparatus, and program
Whereas a high masking effect can be secured in a space to which a masking sound is emitted, the degree of a discomfort a person existing in the space suffers can be reduced. In superimposition processing, a CPU 21 extracts sound signals in different intervals of a sound signal X12-n of a human voice, superimposes the extracted sound signals on each other on the time axis, and outputs a resulting superimposed sound signal X13-n. In shift and addition processing, the CPU 12 interchanges a sound signal, before a reference position, of a sound signal X16-n and a sound signal, after the reference position, of the sound signal X16-n (shift processing) and outputs a sound signal X17-n obtained by adding together a shift-processed sound signal X16′-n and the original, non-shift-processed sound signal X16-n.
US09390699B2 Pickup device for a string instrument
A pickup device for a string instrument includes a base unit to be disposed at a rear side of the string instrument, a securing unit disposed on the base unit and configured to secure removably the base unit to the string instrument, and a sound pickup unit mounted to the base unit and configured to generate an electrical sound signal in response to a sound received thereby.
US09390697B2 Removable electronic drum head and hoop for acoustic drum
An electronic drum head is provided that attaches to a standard acoustic drum shell. The drum head is a self-contained unit that replaced both the acoustic drum head and the drum hoop or rim to convert the acoustic drum into an electronic drum. When the drummer plays these heads, the drum head is muted, minimizing acoustic noise from the kit. Also, these electronic drum heads can be easily attached and removed, allowing the drummer to go back to playing his acoustic drums when desired.
US09390693B2 Musical instrument with opposing adjustable pitch drums
A musical instrument has at least a first rototom and a second rototom with their respective drum heads facing an opposite direction from each other. The musical instrument has two rototoms with each rototom having a first hoop supporting a drum head, a spider support with a second hoop, a tension hoop and an annulus. A generally horizontal shaft portion extends between the first hoop and the second hoop, wherein the spider support is movable on the shaft portion to vary a separation distance between the first hoop and the second hoop. A connector member is situated between the annuli of the first and second rototum to support the rototoms with their respective drum heads facing opposite directions.
US09390692B2 Precision true hoop for drum
The method of drum structure formation that includes forming a strip of metal having an elongated edge into a counter hoop to be supported by a drum shell proximate the drum head, the forming including forming a reduced thickness strip bend proximate the hoop edge area.
US09390691B2 Device and method for replacement of musical instrument strings
A device for assisting winding a string around a tuning post of a tuning machine of a stringed instrument, is disclosed. An enclosure has an exterior surface, a base, a cap, and a central bore passing through a base aperture. A string ingress aperture passes between the enclosure exterior surface and the central bore. A slot passes through the enclosure exterior surface extending from the ingress aperture to the base, and string egress aperture passes through the enclosure between the enclosure surface and the central bore. The enclosure is configured to substantially enclose the tuning post within the central bore.
US09390690B2 Refresh rate dependent dithering
Systems, methods, and device are provided to perform refresh-rate dependent dithering. One embodiment of the present disclosure describes a computing device that includes an image source that generates spatially dithered image data and an electronic display communicatively coupled to the image source. More specifically, the electronic display receives the spatially dithered image data from the image source and determines a refresh rate with which to display an image by comparing a local histogram and an artifact histogram, in which the local histogram describes pixel grayscale distribution of a portion of the image and the artifact histogram describes a pixel grayscale distribution that when displayed will cause a perceivable artifact. Additionally, when the determined refresh rate is less than a threshold refresh rate of the electronic device, the electronic display spatially dithers the image data without temporally dithering the image data and displays the image based at least in part on the spatially dithered image data.
US09390688B2 Re-configuring the standby screen of an electronic device
An electronic device comprising: a user interface having a display for displaying a standby screen when the device is in an idle state and a user input device, wherein the user interface provides a menu system, for re-configuring the standby screen, that is navigated using the user input device.
US09390687B2 Mobile terminal and controlling method thereof
A mobile terminal and controlling method thereof are disclosed, by which a holography user interface is provided. The present invention includes a controller, a holography storing medium configured to record an interference pattern generated by interference of light, and a holography output module configured to output a holography image attributed to diffraction between the light applied to the holography storing medium and the interference pattern in accordance with at least one preset holography type among a plurality of holography types under the control of the controller, wherein a plurality of the holography types comprise a default type, a holography background type and a holography pattern type, wherein if the default type is set, the controller controls the generated holography image to be outputted intactly, wherein if the holography background type is set, the controller controls the holography image to be outputted in a manner of being included in a 1st region within a preset holography background, and wherein if the holography pattern type is set, the controller controls the holography image to be outputted in accordance with the preset at least one holography pattern.
US09390686B2 Display device and method for driving the same
There is provided a display device capable of suppressing brightness change which can occur at the time of image update in intermission driving. A display control circuit (20) includes a frame memory (101), a coercive refreshing determination section (104), a refreshing circuit (105), and an undershoot circuit (106). The coercive refreshing determination section (104) outputs an active coercive refreshing signal and an active correction instruction signal upon determining that an image is updated. The refreshing circuit (105) receives the active coercive refreshing signal, and then outputs an active output control signal. The frame memory (101) receives the active output control signal, and then outputs an image data. The undershoot circuit (106) performs, if in reception of the active correction instruction signal, a correction by making a subtracting operation to the image data received from the frame memory (101), and then outputs corrected image data.
US09390685B2 Semiconductor device, display device, and signal loading method
An input signal is segmented by a first data latch into 2 bit segments according to rising and falling edges of a clock signal clk, and latched. When the input signal is an RSDS signal, 2 sets worth of 2 bit data are latched according to rising and falling edges of a clock signal clkx2, using a first output section, a first data holding section, and a second output section. When the input signal is a mini-LVDS signal, 4 clock cycles worth of data are held according to the rising and falling edges of the clock signal clkx2 using the first data holding section and the second output section. One set's worth of 8 bit data is then latched according to a rising edge of a clock signal clkx4 using the first output section, a third output section, a fourth output section, and a fifth output section.
US09390678B2 Image display method and device
An image display method and a device are provided. The method includes: obtaining, according to a first red, green, blue (RGB) parameter of a pixel of an image and a first gamma value corresponding to the first RGB parameter, a second RGB parameter corresponding to a second gamma value, where a second transmittance of the second RGB parameter is equal to a first transmittance of the first RGB parameter; obtaining a hue (H) parameter and a value (V) parameter according to the first RGB parameter, and obtaining a saturation (S) parameter according to the second RGB parameter; obtaining a third RGB parameter according to the H parameter, the S parameter, and the V parameter; and displaying the pixel according to the third RGB parameter.
US09390677B2 Light emitting diode display device with image data dependent compensation and method for driving the same
Disclosed are a light emitting diode (LED) display device and a method for driving the same which are capable of decreasing degradation of pixels. The LED display device includes a system for outputting image data to be supplied to pixels, a compensation value generator for determining a drive time of a light emitting element in each pixel, based on the image data from the system, and generating a compensation value for the pixel, based on the determined drive time, a compensation value adjuster for determining at least one of a degree of complexity and a degree of motion in an image for each pixel, based on the image data from the system, thereby adjusting the compensation value generated, for the pixel, from the compensation value generator, and an image modulator for modulating the image data from the system, based on the adjusted compensation value from the compensation value adjuster.
US09390676B2 Tactile presentation of information
Embodiments of the invention provide a device and system for providing information to a user in a tactile form. In one embodiment, the invention provides a device for providing information to a user, the device comprising: a plurality of individually-addressable cells, each cell including an electrically-active material capable of changing shape and/or position in response to an electrical current; a electrical network connected to, and capable of delivering the electrical current to, each of the plurality of individually-addressable cells; a membrane atop the plurality of individually-addressable cells, onto which the change in shape and/or position of the electrically-active material in each cell may be transferred; and a receiver for receiving information capable of tactile presentation to a user using the plurality of individually-addressable cells.
US09390673B2 Liquid crystal display device and method of driving the same
According to one embodiment, a liquid crystal display device includes an array substrate, a counter substrate, a liquid crystal layer and a driving unit. The driving unit is configured to perform polarity inversion driving by applying, to the pixel electrode, positive and negative video signals. When applying the video signals to the pixel electrode, the driving unit superposes a correction signal corresponding to a polarity inversion frequency and the gray level on the video signals in advance.
US09390672B2 Driving circuit of a pixel of a liquid crystal display panel and driving method thereof
A driving circuit of a pixel includes a driving capacitor for driving liquid crystals according to a voltage difference between first and second ends of the driving capacitor, a reference voltage source for providing a reference voltage, a first data line for providing a first driving voltage, a second data line for providing a second driving voltage, a first scan circuit for electrically connecting the first and the second data lines to the first and the second ends of the driving capacitor respectively when the first scan circuit is turned on, a first scan line for controlling on and off states of the first scan circuit, a second scan circuit for electrically connecting the first end and the second end of the driving capacitor when the second scan circuit is turned on, and a second scan line for controlling on and off states of the second scan circuit.
US09390668B2 Liquid-crystal display device and electronic apparatus
According to an aspect, a liquid-crystal display device includes: a liquid crystal layer; and a control unit that controls a display operation. The control unit performs a first display control mode when a response speed of the liquid crystal layer is equal to or higher than a predetermined speed and performs a second display control mode when the response speed of the liquid crystal layer is lower than the predetermined speed. In the first display control mode, the control unit executes a display control at a first frame rate with which a number of frames per unit time is equal to a predetermined number. In the second display control mode, the control unit executes a display control at a second frame rate obtained by dividing the number of frames at the first frame rate by an integer equal to or larger than 2.
US09390664B2 Liquid crystal display device
A liquid crystal display device includes a plurality of pixels each including a transistor and a liquid crystal element, and a driver circuit that inputs at least a video signal and a reset signal to the plurality of pixels. The driver circuit makes the polarity of the video signal inverted every m frames (m is a natural number of 2 or more) and inputs the inverted video signal to the pixel, and inputs the reset signal to the pixel while not inputting the video signal.
US09390662B2 Liquid crystal display device
A liquid crystal display device includes: a liquid crystal display unit that displays, for each of frames, an image based on an input image signal; a drive unit that applies a voltage based on the input image signal to pixels of the liquid crystal display unit; and a control unit that controls an amplitude of the voltage applied to the pixels. The drive unit applies, in one of the frames, a voltage of the same polarity to the pixels connected to one of the source signal lines. The control unit includes: a temperature-information acquiring unit that acquires temperature information of the drive unit; and a filter unit that acquires high-frequency and low-frequency components of the input image signal in a substantial extending direction of the source signal lines. The control unit controls the amplitude of the applied voltage using the temperature information and an output value of the high-frequency component.
US09390661B2 Display controller system
A display controller system with a memory controller and buffers is described.The system enables transferring data from the main memory of the CPU to the image memory without interfering the image updating. As a result, the present invention may allow continuously updating the display image and continuously writing new image data from CPU to the image memory which improves overall system performance.
US09390656B2 Display device and method of driving the same
A display device includes a plurality of display pixels, a plurality of data lines that are connected to the display pixels, and a plurality of sensing lines that are connected to the display pixels. Each display pixel includes a driving transistor comprising a first terminal, a second terminal, and a third terminal, a capacitor connected to the first terminal of the driving transistor, a first switching transistor connected to the data line and the first terminal of the driving transistor, a light-emitting element connected to the third terminal of the driving transistor configured to emit light, a second switching transistor connected between the sensing line and the light-emitting element, and a third switching transistor connected between the third terminal of the driving transistor and the light-emitting element.
US09390654B2 Pixel driving circuit and array substrate of OLED display and the corresponding display
The present invention discloses a pixel driving circuit of OLED display, which comprises: a scanning transistor TFT1, the source thereof being connected to the data line, the gate thereof being connected to a current row scanning control line, the drain thereof being connected to a first terminal of a storage capacitor C1; a precharging transistor TFT3, the source thereof being connected to the data line, the gate thereof being connected to a previous row scanning control line, and the drain thereof being connected to the first terminal of the storage capacitor C1; a driving transistor TFT2; and an organic light emitting diode; wherein, the scanning time of the current row scanning control line at least partially overlaps that of the previous row scanning control line. The embodiment of the present invention can improve the charging efficiency of the storage capacitor in each pixel unit and then improve the display effects.
US09390652B2 Organic light emitting display device and driving method thereof
Disclosed is an organic light emitting display device including a pixel connected to a data line, a gate line group, and a reference line. The pixel includes an organic light emitting diode (OLED), a driving transistor configured to control a current flowing in the OLED, a first switching transistor configured to selectively supply a data voltage to a first node, a second switching transistor configured to selectively supply an initial voltage to a second node, a third switching transistor configured to selectively connect a third node to the reference line, a fourth switching transistor configured to selectively connect the first node to the third node, a first capacitor connected between the first and second nodes to store a threshold voltage of the driving transistor, and a second capacitor connected between the first and third nodes to store the data voltage supplied through the first switching transistor.
US09390651B2 Organic light emitting display and method for operating the same
An organic light emitting display device includes: a pixel unit including first pixels positioned at intersection parts between first data lines and first scan lines and the second pixels positioned at intersection parts between the second data lines and the second scan lines; a scan driver sequentially supplying first scan signals to the first scan lines and sequentially supplying second scan signals to the second scan lines; a data driver supplying first output signals to first output lines and supplying second output signals to second output lines; and a demultiplexer block unit including demultiplexers which demultiplex the first output signals in response to control signals, respectively, and supply the demultiplexed signals to the first data lines, wherein the second output lines are directly connected to the second data lines.
US09390649B2 Ruggedized wearable display
A wearable, ruggedized device incorporating an OLED display is provided. The device is capable of operating in multiple modes, such as a lower-brightness and/or higher-contrast mode. The use of multiple modes allows for reduced power requirements, while providing responsiveness and continuous availability of the device to a user.
US09390647B2 Pulse width correction for LED display driver
The LED display system comprises an array of LEDs and a driver circuit that employs a scrambled PWM generator. The scrambled PWM generator is configured to generate a plurality of PWM pulses. The PWM pulses are distributed into a corresponding number of refresh segments. The driver circuit is configured so that one or more of PWM pulses are extendable by a certain offset value so that the pulse width in the corresponding refresh segments is wide enough for the LED to emit light.
US09390646B2 Color calibration apparatus and method usable with display device
A color calibration apparatus includes an image obtaining unit configured to obtain first and second photographed images which are generated by photographing first and second mono-color test images displayed on the display device; a controller configured to detect an ambient light area on which an ambient light is shining within the first photographed image based on pixel values of the first photographed image, and further configured to determine a remaining area of the first photographed image other than the ambient light area as a representative value calculating area; and an image processor configured to calculate a representative value based on pixel values of an area corresponding to the representative value calculating area within the second photographed image, and further configured to perform color calibration of the display device based on the representative value.
US09390644B2 Detecting method of defects of line and demultiplexer, defect detecting device, and display panel including the defect detecting device
Embodiments relate to a defect detecting method of a line and a demultiplexer, a defect detecting device, and a display panel including the defect detecting device. A demultiplexer may connect a plurality of data lines to a plurality of corresponding lines. The defect detecting device includes DC lines supplied with respective DC voltages, first switches connected to the DC lines and configured to transmit the respective DC voltages to the corresponding first data lines among a plurality of data lines according to a first gate signal, and second switches connected to the first to third DC lines and configured to transmit one of the respective DC voltages to corresponding second data lines among a plurality of data lines according to a second gate signal.
US09390643B2 Rotatable animation devices with staggered illumination sources
An illuminated animation device with staggered sources of illumination with a rotatable member rotatable about an axis of rotation, first and second pluralities of sources of illumination retained to rotate with the rotatable member that are actuatable between illuminated and non-illuminated conditions. The first and second pluralities of sources of illumination are staggered so that the sources of illumination will produce individual paths of illumination to permit image display with enhanced. The rotatable member can be a rotatable panel with first and second arrays retained relative to first and second halves thereof, and the sources of illumination can be longitudinally and laterally staggered, such as by one-half a distance between adjacent sources of illumination. The sources of animation can alternatively be disposed in opposed, radially spaced straight line arrays. The device can be handheld and can include a motor and a power source.
US09390642B2 Flexible display
A flexible display includes a flexible display panel, a curved formation unit for forming a curved surface of the flexible display panel, and a curved signal generating unit which supplies a curved signal to the curved formation unit so that a radius of curvature of the flexible display panel is controlled based on at least one of user setting conditions, external environmental conditions, and displaying image conditions. The curved formation unit forms the curved surface of the flexible display panel in response to the curved signal.
US09390637B2 Thin-wall panel modular light box sign and display
A thin wall modular display (TWMD) useful for signs, lighting fixtures etc. is disclosed wherein a back-lit sign, light fixture or TWMD is created using a plastic multi-chambered thin-walled panel and light strips.
US09390633B2 Reconfigurable label assembly and container
A reconfigurable label assembly including a container capable of storing or holding a liquid and a front panel, a back panel, a bottom panel, and optional side panels configured primarily as a label and secondarily as a receptacle capable of holding the liquid separate from the container is presented. In some embodiments, the bottom panel includes a fold. The bottom and optional side panels are disposed between and substantially parallel to the front panel and back panels in a first configuration to form a label attached to and separable from the container. The front and back panels are separable and the bottom and optional side panels are expandable to form a receptacle in a second configuration after the label is separated from the container. In other embodiments, the back panel includes a fold. The side and back panels are disposed between and substantially parallel to the front panel and bottom panel in a first configuration to form a label. The front and bottom panels are separable and the side and back panels are expandable to form a receptacle in a second configuration. The side panels may include additional folds facilitating transformation from a label to a receptacle and from a receptacle to a label.
US09390631B2 Shaving razor demonstration method
A shaving demonstration method having a step of providing a first shaving razor with a shaving surface having at least one blade with a cutting edge. A transparent first surface is provided. The shaving surface the first shaving razor contacts the transparent first surface. Another step includes illustrating the shaving surface of the first shaving razor against the transparent first surface through a transparent second surface opposite the first surface. The first shaving razor is moved along the transparent first surface.
US09390622B2 Performing-time-series based predictions with projection thresholds using secondary time-series-based information stream
A prediction modeling system, method and computer program product for implementing forecasting models that involve numerous measurement locations, e.g., urban occupancy traffic data. The method invokes a data volatility reduction technique based on computing a congestion threshold for each prediction location, and using that threshold in a filtering scheme. Through the use of calibration, and by obtaining an extremal or other specified solution (e.g., maximization) of empirical volume-occupancy curves as a function of the occupancy level, significant accuracy gains are achieved and at virtually no loss of important information to the end user. The calibration use quantile regression to deal with the asymmetry and scatter of the empirical data. The argmax of each empirical function is used in a unidimensional projection to essentially filter all fully congested occupancy level and treat them as a single state.
US09390621B2 System and method for measuring the real traffic flow of an area
A system and method for measuring a real traffic flow of an area use images of vehicles and pedestrians taken from the sky in time intervals of an area. The system and method also use continuous tracking data for vehicles and pedestrians, provided by navigator manufacturers, map providers, route applications or by phone carriers. Both images and continuous tracking data are combined and processed by a processor that applies image pattern recognition software to the images so that each vehicle and pedestrian in the images is recognized and labeled for which tracking data is available. The system identifies vehicles and pedestrians contained in both databases and applies a weight to thereto. Accordingly, the system and method are able to estimate the traffic flow and the total number of vehicles and pedestrians for a particular time and area.
US09390615B2 Emergency alert for voice over internet protocol (VoIP)
A voice over Internet Protocol (VoIP) positioning center (VPC) is implemented in configuration with support from a text-to-voice module, emergency routing database, and VoIP switching points (VSPs) to allow a public safety access point (PSAP) or other emergency center to effectively communicate the nature of an emergency alert notification and the area of notification to the VoIP positioning center (VPC). The inventive VPC in turn determines which phones (including wireless and/or VoIP phones) are currently in the area for notification, and reliably and quickly issues the required warning to all affected wireless and VoIP phones.
US09390608B2 Threat detection system having multi-hop arrangement of wireless detectors and wireless sensors and with at least one sensor having close-by low-cost low-power wireless sub-sensors for blanketing a venue
A data sensing and threat detecting network comprising a plurality of wireless sensor devices for communication with wireless detector units in a multi-hop arrangement to allow transmission of data there between in optimized paths. The network further has a plurality of low power sub-sensor devices for transmission of data to respective sensor devices in close proximity thereto due to their low power, but their low cost allows them to be used in large numbers to blanket substantially all of the physical space in a venue. The sensor and sub-sensor devices may include portable sensor devices and condition sensing devices.
US09390607B2 Smart device safety mechanism
An approach is provided in which a smart device identifies a crime risk based upon proximity parameters corresponding to the current location of the smart device. In turn, the smart device determines whether to alert a user of the smart device based upon user preferences and, in turn, alerts the user accordingly.
US09390603B2 Dual EAS-RFID security tag
A dual EAS-RFID tag. In one embodiment, the invention can be a tag comprising a substrate having a first surface and a second surface opposite the first surface; an electronic article surveillance (EAS) element comprising an EAS antenna, the EAS antenna on the first surface of the substrate; and a radio frequency identification (RFID) element, the RFID element comprising: a far field antenna on the second surface of the substrate, the far field antenna comprising a first pole portion, a second pole portion, and a connecting portion connecting the first pole portion and the second pole portion; a near field loop antenna on the second surface of the substrate, and an integrated circuit operably coupled to the near field loop antenna; wherein the far field antenna, the near field loop antenna, and the EAS element are located on the substrate so as to be physically isolated from one another.
US09390597B2 Laboratory automation apparatus, automated analytical apparatus and system
A laboratory automation system capable of reducing a wasting time of an operator work by giving a notification that enables a device state and a summary of an operator call to be recognized. The laboratory automation system having notifying means such as a display unit or a speaker which can be recognized by the operator distant from the device, includes a notifying unit for calling the operator, and a notifying unit for notifying a status of the device, in which a state device and a summary of the work conducted by the operator can be easily recognized by the combination of notifications of those notifying units.
US09390594B2 Note validator security
A smart safe include one or more note validators. Access to the note validators and internal workings of the smart safe is defined by an applicable level of security at the smart safe. The applicable level of security may be dependent on whether the smart safe is experiencing an error condition and/or the identification of a user trying to access the smart safe. By allowing some users limited access to the note validators, the users may be able to resolve some error conditions without compromising the integrity of notes stored within the smart safe and without relying on dedicated service personnel to resolve the error condition at the smart safe.
US09390584B2 Verification system for on-line gamers performing automatic verification of game results
An automatic verification system for automatically verifying a winner of an on-line game is disclosed. The verification system (a server/memory connected to the Internet) contains information about subscriber players and contains accounts that are used for betting on outcomes of skill games. The subscribers access the system via the Internet to set up an on-line game with other subscribers. The players then compete against each other normally via the game (e.g., Halo™ network server. The verification system then automatically receives the final game information from the server or console(s) via an e-mail, or by accessing published results of the game, or by accessing the players' published career summaries. Based on that automatically generated data, the verification system automatically determines the winner and awards the winner money or points.
US09390580B2 Integrating wagering games and player communities
In some embodiments of the inventive subject matter, a method includes: presenting a wagering game on a wagering game machine; detecting, during the wagering game, a trigger for a bonus game; presenting player-selectable bonus game options on a display device of the wagering game machine; detecting sign-on to an account on a player community server; after detecting the sign-on of the account, presenting a hint on the display device, wherein the hint indicates bonus game types associated with the player-selectable bonus game options; detecting selection of one of the player-selectable bonus game options, wherein the one of the player-selectable bonus game options is associated with a particular one of the bonus game types; and presenting a bonus game of the particular one of the bonus game types.
US09390579B2 Gaming system including multiple displays having game symbols with common characteristics
A gaming system and method involving a game having a plurality of symbols. The gaming system displays a play of the game on a first display while displaying a sequence of the symbols on a second display. The gaming system includes one award associated with the play and another award associated with a characteristic in common between a symbol displayed on the first display and a symbol indicated on the second display.
US09390578B2 Multi-touchscreen module for amusement device
An amusement device includes a display screen having a touchscreen. The touchscreen is configured to receive a plurality of touch inputs simultaneously. A memory stores a plurality of electronic games for selection and play. A controller is configured to generally simultaneously execute a first game and a second game from the plurality of electronic games. The first game is configured to display at least one first image on a first portion of the display screen, and the second game is configured to display at least one second image on a second portion of the display screen. The first and second games are simultaneously playable in an interactive manner, such that an action undertaken in playing of the first game modifies the second game.
US09390576B2 Robotic package lifting assembly and method
Described herein are a robotic distribution apparatus, system and method. The robotic distribution system may include a Package Delivery Kiosk (PDK), associated frontend and backend package delivery management systems, a package inventory management system. The PDK includes a Robotic Package Lifting Assembly which may be configured to remember the location of packages and slots and provide for automated retrieval and placement of the packages. In an embodiment, a package retrieving apparatus includes a track, a base slidably interconnected with the track, and a vertical support interconnected with the base. The apparatus includes a package picker module oriented on the vertical support to vertically move on the vertical support. The package picker module including a conveyer belt oriented in a plane parallel to the ground and first and second grippers oriented parallel to the conveyer belt to surround and grip an object beyond the surface of the conveyer belt.
US09390574B2 Document processing system
A document processing system comprises an input receptacle for receiving documents. A transport mechanism receives the documents from the input receptacle and transports the documents past an image scanner and a discrimination unit. An output receptacle receives the documents from the transport mechanism after being transported past the image scanner and the discrimination unit. The image scanner obtains an image of the documents, obtains an image of a selected area of the documents, and obtains information contained in the selected area of the document. The discrimination unit determines the authenticity of the document. A system controller directs the flows of documents over the transport mechanism.
US09390573B2 Access control reader enabling remote applications
A system and method for enabling users to run remote applications on access control readers located throughout office buildings. A system administrator creates different remote applications groups such as admin, engineer or cardholder and then assigns users to one of the remote application groups. Users are then able to run the remote applications assigned to their remote application group from any of the access control readers located throughout the office building.
US09390569B2 Control and diagnosis of a controller wake up feature
A control and diagnosis methodology for an electronic module of a vehicle is presented here. In accordance with the disclosed method, at least one wake up event for a processor of the electronic module is performed during an inactive shutdown state of the vehicle. The at least one wake up event is initiated by a wake up timer of the electronic module. The method continues by logging, during the inactive shutdown state of the vehicle, wake up information associated with the at least one wake up event to obtain logged wake up information. The logged wake up information is analyzed during an active operating state of the vehicle to obtain a wake up diagnosis, and the method generates, during the active operating state of the vehicle, an output indicative of the wake up diagnosis.
US09390556B2 Systems and methods for generating a large scale polygonal mesh
A polygonal mesh is generated from a collection of points that are organized for a mesh partition in accordance with a tile that includes one or more bins used to process the points that define the mesh. The resolution of the tile is related to the number of bins for the tile. The organization of the tiles in a partition of the mesh permits the mesh to be constructed with partitions that are independent of each other and that can be joined to form a continuous mesh. The resolution of the mesh can be dynamic with respect to the partitions due to the variable resolution assigned to each tile. Portions of the mesh for which points are not provided can be assigned finalization points to permit a continuous mesh to be constructed.
US09390555B2 Method to assess the impact of existing fractures and faults for reservoir management
Assessing the impact of existing fractures and faults for reservoir management, in one aspect, may comprise employing a numerical mesh to generate a geomechanical model, the numerical mesh representing a geological reservoir and its surrounding regions, the numerical mesh comprising delimitation associated with regions and layering of geology without constraining the numerical mesh to explicitly represent a fault or fracture, initializing the geomechanical model to define initial stress-strain compatible with measured stress in well locations associated with the geological reservoir, generating a fluid-flow model employing the numerical mesh, solving for a coupled solution of the fluid-flow model and the geomechanical model, and employing the solved fluid-flow model and the geomechanical model to assess the impact.
US09390554B2 Off chip memory for distributed tessellation
Embodiments include an apparatus, a computer readable medium and a method for distributing tessellations within an accelerated processing device (APD) including at least two compute units. Embodiments include processing a plurality of patches in a first compute unit using a hull shader to generate hull shader output data. Once generated, hull shader output data is stored to an off-chip memory when tessellation factors associated with the shader program are greater than a configured threshold. Once stored in the off-chip memory, at least a portion of the hull shader output data is dynamically processed using a second compute unit.
US09390553B2 Information display program and information display device
Provided is an information display program causing a computer to perform, a perspective projection data storage process of storing perspective projection data of a three-dimensional structure including multiple overlapping planes, a relevant information storage process of storing relevant information relevant to the multiple planes, a perspective projection display control process of displaying a perspective projection image of a whole of the three-dimensional structure, a parallel projection data storage process of storing parallel projection data for displaying a parallel projection image of the multiple planes, a parallel projection display control process of displaying the parallel projection image of the multiple planes, a transition calculation process of calculating transition image data to perform transition from the perspective projection image to the parallel projection image, a transition display control process of displaying a transition image, and a relevant information display control process of displaying the relevant information.
US09390552B1 Method and device for extracting skeleton from point cloud
A method for extracting a skeleton form a point cloud includes: obtaining inputted point cloud sampling data; contracting the point cloud using an iterative formula and obtaining skeleton branches, the iterative formula is: arg ⁢ ⁢ min X ⁢ ∑ i ∈ I = ⁢ ∑ j ∈ J ⁢  x i - q i  ⁢ θ ⁡ (  x j - q j  ) + R ⁡ ( X ) , wherein R ⁡ ( X ) = ∑ i ∈ I ⁢ γ i ⁢ ∑ i ′ ∈ I / { i } ⁢ θ ⁡ (  x i - x i ′  ) σ i ⁢  x i - x i ′  , θ ⁡ ( r ) = ⅇ 4 ⁢ ⁢ r 2 h 2 , wherein J represents a point set of the point cloud sampling data, q represents the sampling points in the point set J, I represents a neighborhood point set of the sampling points q, x represents the neighborhood points in the neighborhood point set I. R is a regular term, γ is a weighting coefficient, h is a neighborhood radius of the neighborhood point set I, and σ is a distribution coefficient; and connecting the skeleton branches and obtaining a point cloud skeleton.
US09390550B2 Culling for higher-order motion blur rasterization
Efficient overlap tests between a screen space tile and a moving triangle with per-vertex motion following Bézier curves report conservative time bounds in which the moving triangle overlaps with a tile. The tests can be used in designing efficient hierarchical traversal algorithms for higher order motion blur rendering.
US09390548B2 Three-dimensional volume rendering using an in-memory database
The present disclosure describes methods, systems, and computer program products for three-dimensional (3D) volume rendering. One computer-implemented method includes receiving a rendering request for a volume rendering of data of a volume dataset, calling one or more database-layer rendering procedures to perform the rendering request, for each rendering procedure: retrieving data volume metadata consistent with the rendering request and retrieving data volume data consistent with rendering request, generating, by a computer and using the data volume metadata and data volume data, an image intensity buffer containing intensity and illumination data for image generation, and generating an image from the data contained in the image intensity buffer.
US09390547B2 Untransformed display lists in a tile based rendering system
3-D rendering systems include a rasterization section that can fetch untransformed geometry, transform geometry and cache data for transformed geometry in a memory. As an example, the rasterization section can transform the geometry into screen space. The geometry can include one or more of static geometry and dynamic geometry. The rasterization section can query the cache for presence of data pertaining to a specific element or elements of geometry, and use that data from the cache, if present, and otherwise perform the transformation again, for actions such as hidden surface removal. The rasterization section can receive, from a geometry processing section, tiled geometry lists and perform the hidden surface removal for pixels within respective tiles to which those lists pertain.
US09390546B2 Methods and systems for removing occlusions in 3D ultrasound images
Methods and system for visualizing 3D ultrasound data are provided. One method includes obtaining image slices from a volumetric image data set and generating a ray profile using one or more rays through at least one of the image slices, wherein the one or more rays extend along a depth of the volumetric image data set. The method further includes identifying one or more seed points along the one or more rays and defining a clipping surface using the one or more seed points, wherein the clipping surface defines a rendering region within the volumetric image data set. The method also includes rendering a 3D image of the rendering region within the volumetric image data set.
US09390545B2 Apparatus and method for traversing hierarchical acceleration structure
An apparatus and method for traversing a hierarchical acceleration structure may determine whether a current traversal node is a leaf node, may calculate a first distance from the current traversal node to a pop level and a second distance from a root node to the pop level when the current traversal node is the leaf node, and may determine a hierarchical traversal restarting position by comparing the first distance and the second distance.
US09390541B2 Programmable tile shader
In accordance with some embodiments, a tile shader executes on a group of pixels prior to a pixel shader. The tile of pixels may be rectangular in some embodiments. The tile may be executed hierarchically, refining each tile into smaller subtiles until the pixel or sample level is reached. The tile shader program can be written to discard groups of pixels, thereby quickly removing areas of the bounding triangles that lie outside the shape being rasterized or quickly discarding groups of pixel shader executions that will not contribute to the final image.
US09390539B2 Performing parallel shading operations
A graphics processing pipeline may include at least two or more pipes, such that a lower frequency operation may be executed on one pipe while a higher frequency operation in the same instruction stream is executed at the same time on another pipe. In some cases, the lower frequency operation result may be held for later use in connection with the higher frequency operation on a different pipe. Especially where unused slots can be used for the lower frequency operation, efficiency may be improved.
US09390538B2 Depth identification of pixels in one or more three dimensional images
The present application includes a computer implemented method including at least two modes for analyzing a stereoscopic image corresponding to a two dimensional image. The method includes analyzing one or more layers of the two dimensional image to determine a depth pixel offset for every pixel in the two dimensional image and creating by the processing element a depth map, such as a gray scale map, by coloring every pixel a color shade based on the respective depth pixel offset for the pixel. The method further includes displaying on a display an output image corresponding to the stereoscopic image, receiving a first user selection corresponding a first depth pixel offset, determining a plurality of pixels of the output image corresponding to the first depth pixel offset, and applying a first identifier to the plurality of pixels on the output image corresponding to the first depth pixel offset. Additionally, in a first mode the output image displayed includes the first identifier and in a second mode the output image displayed includes the depth map and the first identifier.
US09390535B2 Image processing device and method, and program
The present technology relates to an image processing device and method, and program, whereby a high-quality loop moving image can be obtained more easily. Upon continuous shot images of multiple frames serving as material of a loop moving image being input, the continuous shot images are divided into multiple segments including motion segments including a moving subject and a still segment including a subject with no motion. An image of the motion segment region of the continuous shot images is formed into a loop moving image, and a segment loop moving image is generated. Also, an image of a still segment region of the continuous shot images is clipped out, and a segment image which is a still image is generated. Further, these segment loop moving image and segment image are integrated, to form one loop moving image. The present invention can be applied to an image processing device.
US09390530B2 Image stitching
An apparatus, a method and a computer program are provided. The method includes analyzing first and second images, the first image being captured by a first image sensor portion and the second image being captured by a second image sensor portion, wherein at least one position on the first and second images, at which the analysis of the first and second images is initiated, depends upon at least one contextual characteristic; determining, from the analysis of the first and second images, an overlapping capture region for the first image sensor portion and the second image sensor portion; and stitching the first and second images together using the overlapping capture region.
US09390529B2 Display of graphical representations of legends in virtualized data formats
A computer-implemented method for displaying graphical representation of legends in a data visualization engine is provided. The computer-implemented method includes receiving input to configure a plurality of swatches of the legends of graphical charts, the input comprises at least one of a threshold number of swatches, an identification of graphical area for displaying the swatches, and a size or a data of the swatches for display in the graphical charts of the data visualization engine. The computer-implemented method further includes modifying the legend swatches, based on the received input. The computer-implemented method further includes generating a plurality of graphical charts of the data visualization engine for displaying the swatches, based on the modification, wherein the display is generated randomly, based on at least one user preference for displaying the swatches.
US09390528B2 Meteorology and oceanography geospatial analysis toolset
System and method for providing access to ArcMap netCDF utilities and adding support for observational data to ArcMap including, but not limited to, comparing observational data to model data in a graphical manner, and maintaining the security classifications for each layer in ArcMap so that the highest security classification of the data being viewed is known at all times.
US09390526B2 Method, system, and computer program product for forming a relative location map based on user-specified decision criteria
A method, system, and computer program product for decision-support tools (e.g., for merger, acquisition, and spin-off decision support) within an enterprise software suite for forming a relative location graph based on user-specified decision criteria. The method commences by selecting a subject user-specified managed location comprising at least a location data structure, and receiving user-specified criteria (e.g., number of employees, departments, etc.), the criteria having corresponding values retrieved using the data structure. One or more additional user-specified managed locations are selected, and relationships between the subject location and the additional locations are determined for use in a graphical representation (e.g., a visual aid to display on a display surface in a graphical user interface). A graph is formed with nodes representing managed locations, and edges representing the relationships of the additional locations to the subject location based on the user-specified criteria. Additional edges on the graph serve to display additional criteria.
US09390523B2 Determination of z-effective value for set of voxels using CT density image and sparse multi-energy data
Z-effective (e.g., atomic number) values are generated for one or more sets of voxels in a CT density image using sparse (measured) multi-energy projection data. Voxels in the CT density image are assigned a starting z-effective value, causing a CT z-effective image to be generated from the CT density image. The accuracy of the assigned z-effective values is tested by forward projecting the CT z-effective image to generate synthetic multi-energy projection data and comparing the synthetic multi-energy projection data to the sparse multi-energy projection data. When the measure of similarity between the synthetic data and the sparse data is low, the z-effective value assigned to one or more voxels is modified until the measure of similarity is above a specified threshold (e.g., with an associated confidence score), at which point the z-effective values substantially reflect the z-effective values that would be obtained using a (more expensive) dual-energy CT imaging modality.
US09390522B2 System for creating a tomographic object image based on multiple imaging modalities
A system for creating an object image of an object under investigation, comprises a computing device being configured for creating the object image by using first tomography data of the object provided by a first tomography system and second tomography data of the object provided by a second tomography system, wherein the computing device is configured for calculating a first forward model describing the first tomography data using the second tomography data, performing a first inversion of the first forward model, calculating a parameter set using the first inversion, and performing a second inversion using the parameter set to obtain the object image to be created. Furthermore, a method of imaging an object under investigation is described, wherein the system for creating an object image is used.
US09390521B2 Rapid parallel reconstruction for arbitrary k-space trajectories
An imaging method comprises acquiring an undersampled magnetic resonance partially parallel imaging (MR-PPI) dataset using a plurality of radio frequency receive coils and reconstructing the undersampled MR-PPI dataset to generate a reconstructed magnetic resonance (MR) image. The reconstructing includes: (i) using a generalized auto-calibrating partially parallel acquisition (GRAPPA) operator or direct convolution to fill in at least some missing data of the undersampled MR-PPI dataset so as to generate an enhanced dataset; and (ii) using an algorithm other than a GRAPPA operator and other than direct convolution to reconstruct the enhanced dataset or to reconstruct the undersampled MR-PPI dataset using the enhanced dataset as an initialization dataset for an iterative reconstruction algorithm. In some embodiments the MR-PPI dataset is a non-Cartesian dataset and a GRAPPA operator for wider radial bands (GROWL) is used in the operation (i).
US09390520B2 Method and system of signal representation for NDT/NDI devices
Disclosed is a method and system to provide an improved signal representation of non-destructive test/inspection instruments by proper color display, in order to emulate as closely as possible, the visual rendering effect of those seen in the traditional non-electronic testing, including penetrant testing and magnetic particle testing. The foregoing object of the invention is preferably realized by providing an eddy current or phased array instrument with a color palette module that allows the deployment of an array of color representation system typically used in traditional non-electronic testing methods.
US09390518B2 Information processing device and method, and program, for gamut conversion of content
An device, method and program may properly perform gamut conversion of content and be applied to a gamut conversion device. A restoration conversion state confirming unit performs confirmation such as gamut conversion state of image data read out from an optical disc and the existence or not of restoration metadata. An information exchange unit communicates with an output device via a communication unit and performs information exchange such as the existence or not of restoration processing functionality and gamut conversion functionality and the like. A determining unit determines whether or not restoration processing is performed with a playing device based on information obtained by the restoration conversion state confirming unit and the information exchange unit. Similarly, the determining unit determines whether or not to perform gamut conversion processing with the playing device based on information obtained by the restoration conversion state confirming unit and the information exchange unit.
US09390514B2 Image based tracking
Systems and methods that facilitate image motion analysis are described herein. According to a first image motion analysis technique a first image is warped according to a locally affine model. The first warped image and a second image are compared and a match between the first warped image and the second image is discovered. A value for a motion parameter is estimated based on the match. According to a second image motion analysis technique, an image sequence is converted into an input matrix. A column of the input matrix corresponds to a vectorized image related to the image sequence. The input matrix is approximated with a low rank matrix having a lower rank than the input matrix. One or more outliers of the input matrix are detected.
US09390511B2 Temporally coherent segmentation of RGBt volumes with aid of noisy or incomplete auxiliary data
An apparatus for performing video segmentation, including image sensors of a first type, auxiliary sensors of a second type, and a processor executing computer-executable instructions stored in memory. The instructions include capturing RGB image video data from a plurality of first image sensors; capturing second video data from a plurality of second, auxiliary sensors; for a reference frame, determining an initial segmentation map by segmenting a first object-of-interest from a background from said second video data; determining a history of segmentation information on a pixel-by-pixel basis, wherein a length of said history is based on motion data for the object-of-interest; generating a refined segmentation map by refining on a pixel-by-pixel basis a corresponding value of said initial segmentation map based on said history of segmentation information; and performing RGB segmentation on a corresponding reference frame of said RGB image video based on said refined segmentation map.
US09390510B2 Method, apparatus, and system for outputting information of blood flow included in region of interest based on selection information
Disclosed is an ultrasound image processing method. The ultrasound image processing method includes generating an ultrasound image indicating a region of interest (ROI) by using echo signals which corresponds to ultrasound waves irradiated onto the ROI, sequentially setting respective indexes in a plurality of blood flows included in the ROI detected based on the ultrasound image, determining blood flow corresponding to a selected index, based on an external signal for selecting one of the set indexes, and displaying information corresponding to the determined blood flow.
US09390506B1 Selective object filtering and tracking
A computer-implemented method for tracking an object in a video including, in a first video frame: filtering the first video frame to delineate foreground from background and to select from the foreground an object to be tracked, said object identified at least by contour, center and color; constructing a first virtual bounding box minimally enclosing said object; using a tracking algorithm to establish a target location for the object in the second video frame based on similarity to the object identified in the first video frame; constructing a second virtual bounding box minimally enclosing the target shape at the target location; extending the second virtual bounding box; filtering the second video frame to delineate foreground from background using weighted values propagated from at least the first frame; scrutinizing the output of the second video frame by matching at least shape and color of the target shape at the target location.
US09390503B2 Broadband passive tracking for augmented reality
Technologies are generally described for a broadband passive sensing and tracking system that may employ a number of passive receivers that each have the capability of sensing electromagnetic waves (e.g., Radio Frequency “RF” signals) from surrounding broadcast sources. Each passive receiver may be adapted to sense through one or more antennas. Multiple receivers at different positions may be utilized to form a broadband sensing network adapted to perform collaborative tracking of a scene of interest. According to some examples, a beam-forming algorithm may be applied over the broadband sensing network utilizing an antenna array formed by the passive receivers to localize and track objects.
US09390501B2 Stereoscopic image capture with performance outcome prediction in sporting environments
Methods and apparatus relating to predicting outcome in a sporting environment are described. The methods and apparatus are used to relate trajectory performance of an object to body motions and body orientation associated with a generating the trajectory of the object. When equipment is utilized to generate the trajectory of an object, than the effects of equipment motions and equipment orientation can be also related to trajectory performance. The method and apparatus can be used to predict body motions and body orientations that increase the likelihood of achieving a desired outcome including specifying optimum motions and orientations for a particular individual. The method and apparatus may be used in training, coaching and broadcasting environments.
US09390500B1 Pointing finger detection
A number of images of an environment may be obtained over time by a number of sensors. The data obtained by the sensors may be used to generate contours of objects in the environment. In some cases, hands with pointing fingers in the environment may be identified based on the contours of the objects in the environment. In particular, contours having a palm segment and a pointing finger segment may be identified as hands with pointing fingers. In an implementation, 1-dimensional curvature and distance information may be used to identify contours having a palm segment and a pointing finger segment.
US09390498B2 Visualization and characterization of pulmonary lobar fissures
Systems and methods for visualizing pulmonary fissures including a processor and software instructions for creating a 3 dimensional model of the fissures. Creating the 3 dimensional model includes accessing volumetric imaging data of the patient's lungs, analyzing the volumetric imaging data to segment the lungs into lobes, using the segmented lobes to identify locations at which pulmonary fissures should be present where the lobes abut each other, analyzing the volumetric images to identify locations at which pulmonary fissures actually are present as existing fissure, comparing the locations at which pulmonary fissures should be present to the locations at which pulmonary fissures are present to identify locations of missing fissure, and creating a visual display comprising a 3 dimensional model of the pulmonary fissures including existing fissure portions and missing fissure portions, with the existing fissure portion visually distinct from the missing fissure portions.
US09390496B2 Collagen D-spacings in fibril bundles
Methods and systems for diagnosing a bone disease or other condition related to collagen in a subject are provided. These include providing a bone sample from the subject and determining a quantitative collagen morphology value of the bone sample. A reference value is provided from a non-affected control subject where the reference value is a quantitative collagen morphology value from the same type of bone sample obtained from a population of non-affected control subjects. The quantitative collagen morphology value of the subject's bone sample is compared to the reference value. If the collagen morphology value is altered versus the reference value, the subject is diagnosed as having a collagen related bone disease. The collagen morphology value can include mean fibril spacings and distributions of the fibril spacings taken from a subject's bone sample.
US09390493B2 Image inspection apparatus, image inspection method, and control program of image inspection apparatus
An image inspection apparatus for inspecting an output image on a recording medium by scanning the output image as a scanned image includes an inspection reference image generator to generate an inspection reference image using data of an output-target image; an image inspection unit to determine whether the scanned image includes a defect by comparing a difference between the inspection reference image and the scanned image with a given threshold; and a threshold determiner to determine the given threshold. The threshold determiner computes a difference between the inspection reference image and the scanned image. The threshold determiner determines the given threshold based on the difference between the scanned image and the inspection reference image.
US09390492B2 Method and system for reference-based overlay measurement
The present invention may include acquiring a plurality of reference measurement images from a plurality of reference overlay target sites of a wafer via a reference image sampling process, wherein the reference image sampling process includes acquiring one or more images at each of a plurality of reference overlay target sites of the at least one wafer, generating a reference image by combining the plurality of reference measurement images acquired from the plurality of reference overlay target sites of the wafer of the reference image sampling process; acquiring one or more measurement images from an overlay target site of the wafer via a measurement image sampling process and measuring a virtual overlay of the one or more measurement images by comparing the one or more measurement images acquired from the overlay target site of the wafer to the generated reference image.
US09390488B2 Guiding method and information processing apparatus
A guiding method includes obtaining data of a first image, detecting with a computer reference image data corresponding to a reference object in the data of the first image, calculating with the computer a first condition based on an appearance of the reference object in the first image, the first condition indicating an operational condition of an imaging apparatus when first image was captured, and for a second image to be captured, outputting guide information that indicates how to adjust the first condition to match a reference condition, the reference condition corresponds to an appearance of the reference object in a reference image captured under the reference condition.
US09390487B2 Scene exposure auto-compensation for differential image comparisons
Changes in image exposure setting may be compensated by creating a table of aggregate differences between corresponding pixels in two images and applying the table of aggregate differences to a portion of one of the two images. The images may be in any color space for visible light, or images not of visible light, such as infrared or depth images. In various configurations, the differences may be aggregated by averaging the differences for pixels of a certain value in one of the two images.
US09390486B2 System and method for automatic orientation of a chip to the CAD layout with sub-optical resolution
A method and system for aligning a DUT image for testing. The alignment is performed by obtaining an optical image of the DUT from an optical system; obtaining a computer aided design (CAD) data having CAD layers of the DUT; constructing a CAD image of the DUT by overlaying the CAD layers; operating on the CAD image to generate a synthetic image simulating an optical image of the DUT; generating a difference image by comparing the optical image to the synthetic image; and, varying parameters of the synthetic image so as to minimize the difference image.
US09390485B2 Image processing device, image processing method, and recording medium
An image processing device includes a first generating unit configured to generate smoothed image data including an edge portion by performing a smoothing process on original image data using an edge preserving smoothing filter; a second generating unit configured to generate first differential image data of a differential image between an image of the original image data and an image of the smoothed image data; a histogram generating unit configured to generate a differential histogram, which is a histogram of frequencies of difference values included in the first differential image data; a third generating unit configured to generate second differential image data by correcting the first differential image data using a correction amount, the correction amount for the first differential image data being calculated based on the differential histogram; and a synthesizing unit configured to synthesize the smoothed image data and the second differential image data.
US09390482B2 Image processing apparatus and method of processing image
Provided is an image processing apparatus that can effectively display an image by using an optimized dynamic range compression technique and a method of processing an image by using the same. The method includes: obtaining a first blurred image and a second blurred image from the input image; estimating illuminance of the input image by combining the first blurred image and the second blurred image; generating a dark region amplified image from the input image; generating a bright region conserved image from the input image; applying weights to the dark region amplified image and the bright region conserved image, respectively, according to the estimated illuminance; and combining the weighted dark region amplified image and the weighted bright region conserved image to generate a final image.
US09390480B2 Display apparatus with image-capturing function, image processing apparatus, image processing method, and image display system
A display apparatus with an image-capturing function includes an outputting unit configured to output an image signal to an external apparatus, an inputting unit configured to input an image signal from the external apparatus, an image-capturing unit, a display unit, an image-capture-distortion corrector configured to perform image-capture-distortion correction on an image signal captured by the image-capturing unit, a display-distortion corrector configured to perform display-distortion correction, and a controller configured to control whether or not the image-capture-distortion corrector is to perform the image-capture-distortion correction, and whether or not the display-distortion corrector is to perform the display-distortion correction. Therefore, distortion caused by the image-capturing system and display system of the display apparatus with an image-capturing function can be appropriately corrected in the overall system including the display apparatus with an image-capturing function and the external apparatus.
US09390475B2 Backlight detection method and device
A backlight detection method and device, and the method includes acquiring a brightness value of each image block in a to-be-checked image, determining a brightness relationship between the adjacent image blocks according to the brightness value of each image block; and determining a dark region and a bright region in the to-be-checked image according to the brightness relationship between the adjacent image blocks, and determining whether the to-be-checked image is a backlight scenario according to the dark region and the bright region. The backlight detection method and device provided by the embodiments of the present invention can improve accuracy of backlight detection.
US09390474B2 Information presentation based on display screen orientation
A handheld devise presents information on a display screen in alternate formats. The device determines its orientation relative to a device user and selects a format based on that orientation. The displayed information may also be scrolled or zoomed based on a detected motion of the device.
US09390467B2 Morphing a data center in a virtual world
The present invention re-renders data center visualizations at different levels of abstraction based on roles or activities of an avatar. Morphing of data center objects is accomplished by either combining or decomposing existing data center objects in a manner that will result in a new object that maintains its relationship to the original objects. An example of this would be when creating an application object by combining an existing infrastructure objects (e.g., a server, a network and storage) used to support the application object runtime environment. This allows for the avatar to not only relate the application object to the supporting infrastructure objects, but also provides a view of how the application object is impacted whenever the supporting infrastructure objects change or break.
US09390464B2 Stencil buffer data compression
A raster operations (ROP) unit is configured to compress stencil values included in a stencil buffer. The ROP unit divides the stencil values into groups, subdivides each group into two halves, and selects an anchor value for each half. If the difference between each of the stencil values and the corresponding anchor lies within an offset range, and the difference between the two anchors lies within a delta range, then the group is compressible. For a compressible group, the ROP unit encodes the anchor value, offsets from anchors, and an anchor delta. This encoding enables the ROP unit to operate on the compressed group instead of the uncompressed stencil values, reducing the number of memory and computational operations associated with the stencil values. Consequently, the ROP unit reduces memory bandwidth use, reduces power consumption, and increases rendering rate compared to conventional ROP units that implement less flexible compression techniques.
US09390456B2 Summary view of a profile
Systems and methods for providing a summary view in a profile are provided. In some aspects, a first set of content items is received. The first set of content items is associated with a profile of a subject member. An interest score is determined for at least a portion of content items in the first set of content items. The interest score for a specific content item is not based on a time when the specific content item was posted. A subset of the first set of content items is determined. The subset includes content items having the interest score within an interest score range. Indicia of the subset are provided for display.
US09390454B2 Interactive map for grouped activities within a financial and social management system
Embodiments of the invention comprise systems, computer program products, and methods for a financial and social management system that provides improved tracking and management related to how, where, when, and with whom a user enters into activities. The financial and social management system captures activity information and images from various sources of information, including but not limited to social networking accounts, e-receipts, location determination devices, and the like, and associates the activity information and images with the activities. The financial and social management system may display the activities, activity information, and images in an interactive map using markers. The markers in the interactive may be displayed as a function of the time of the activity, include images, or transaction data related to the activity. Positioning information related to the location of the user at the time of the activities may also be overlaid on the interactive map.
US09390449B2 Network-based sales system with customizable and categorization user interface
A sales system for coupling to a communications network. The sales system includes a sales interface at a first network address that includes a set of categorized interface elements. In addition the sales system includes another sales interface at a different network address that includes a second set of categorized interface elements. Finally the system includes a sales server at a third network address that may be used to operate both sales interfaces to provide an impression that the first and second sales interfaces are being operated by different entities. The sales server includes a categorization interface that responds to user input to define both sets of categorized interface elements. The categorized interface elements respectively include a plurality of specification elements.
US09390443B2 Product information providing server apparatus, product information display program, product information display method, product information providing system, terminal device, and recording medium on which product information display program is recorded
The present invention provides, for example, a terminal device which allows users who do shopping utilizing a network to simulate a sense of doing shopping actually getting around in a store and enjoy shopping.Product information of a plurality of products arranged based on genres to which products belong are displayed on a product list screen to be continuously browsed even if the products belong to different genres.
US09390441B2 Distribution of content
Among other things, publishers of digital content are enabled each to define, for each of one or more digital content items, a style in which the digital content item is to be presented to a user and a condition under which the user may have the digital content item presented. The digital content items are stored in a content library, the styles and conditions associated with the digital content items are stored in a server. Each of the digital content items is enabled to be presented to users within presentation contexts that are accessible to the users and controlled by presentation context providers. The presentation of the digital content items includes obtaining the digital content items from the server and controlling the presentation to occur under the conditions and in the styles defined by the publishers.
US09390436B2 System for targeting advertising content to a plurality of mobile communication facilities
A system for targeting advertising content includes the steps of: (a) receiving respective requests for advertising content corresponding to a plurality of mobile communication facilities operated by a group of users, wherein the plurality includes first and second types of mobile communication facilities with different rendering capabilities; (b) receiving a datum corresponding to the group; (c) selecting from a first and second sponsor respective content based on a relevancy to the datum, wherein each content includes a first and second item requiring respective rendering capabilities; (d) receiving bids from the first and second sponsors; (e) attributing a priority to the content of the first sponsor based upon a determination that a yield associated with the first sponsor is greater than a yield associated with the second sponsor; and (f) transmitting the first and second items of the first sponsor to the first and second types of mobile communication facilities respectively.
US09390426B2 Personalized advertisement device based on speech recognition SMS service, and personalized advertisement exposure method based on partial speech recognition SMS service
Disclosed are a personalized advertisement device based on speech recognition SMS services and a personalized advertisement exposure method based on speech recognition SMS services. The present invention provides a personalized advertisement device based on speech recognition SMS services and a personalized advertisement exposure method based on speech recognition SMS services capable of maximizing an effect of advertisement by grasping user's intention, an emotion state, and positional information from speech data uttered by a user during a process of providing speech recognition SMS services, configuring advertisements from when speech data begins conversion to when it has been completely converted by the speech recognition into character strings, and exposing the configured advertisements to a user.
US09390424B2 System and method for improving customer wait time, customer service, and marketing efficiency in the restaurant, retail, hospitality, travel, and entertainment industries
A system and method including an Internet preordering system accessible online or onsite at a free-standing kiosk located in or near client properties in which customers may create profiles for the requested services and provide such information to the service provider in advance of the customer's arrival for the requested services. When the customer arrives, the customer identifies himself/herself and the preorder is accessed, verified and/or modified. The preorder is then forwarded to the service provider and the delivery of the service is optimally timed to the readiness of the customer. The customer's profile and preorder information are maintained in a database and used for in-house precision marketing campaigns and cross-promotional opportunities. For example, in a restaurant embodiment, a registered customer is given access to menus and may create menu preferences for a participating restaurant. The registered customer may also make a reservation at a participating restaurant for a party of any size in advance (for example, up to 24 hours) of the reservation time. The food and/or drink preorder for each guest in the party may be completed in advance and maintained on the server, with the reservation time, for access when the party arrives at the designated reservation time. After a verification process, the customer may retrieve the party's preorder, make any desired changes, and then verify the preorder at the kiosk. Once the preorder is verified, the customer may finalize the preorder and proceed to the hostess kiosk where the preorder is accessed by the restaurant staff. Either when the party is seated or at an appropriate time prior to seating (based on a comparison of the seating wait queue to the kitchen wait queue), the preorder is forwarded for preparation so that the ordered food and/or drink arrives shortly after the customer's party is seated.
US09390420B2 System and method for wireless ordering using speech recognition
Disclosed herein are systems, computer-implemented methods, and tangible computer-readable media for placing an order for a user. The method includes receiving a search from a user, identifying a product category based on the search, presenting to the user a general ordering screen based on the identified product category, selecting and activating a speech recognition grammar tuned for the identified product category, recognizing a first received user utterance with the activated tuned grammar to identify a vendor who offers items in the identified product category, recognizing a second received user utterance with the activated tuned grammar to identify a specific item from the identified vendor, and placing an order for the specific item with the identified vendor for the user. In one aspect, the method further offers to sell the user additional items ancillary to the specific item.
US09390418B2 System and method for detecting and managing fraud
A system, method and computer program product for processing event records. The present invention includes a detection layer, an analysis layer, an expert systems layer and a presentation layer. The layered system includes a core infrastructure and a configurable, domain-specific implementation. The detection layer employs one or more detection engines, such as, for example, a rules-based thresholding engine and a profiling engine. The detection layer can include an AI-based pattern recognition engine for analyzing data records, for detecting new and interesting patterns and for updating the detection engines to insure that the detection engines can detect the new patterns. In one embodiment, the present invention is implemented as a telecommunications fraud detection system. When fraud is detected, the detection layer generates alarms which are sent to the analysis layer. The analysis layer filters and consolidates the alarms to generate fraud cases. The analysis layer preferably generates a probability of fraud for each fraud case. The expert systems layer receives fraud cases and automatically initiates actions for certain fraud cases. The presentation layer also receives fraud cases for presentation to human analysts. The presentation layer permits the human analysts to initiate additional actions.
US09390415B2 Wearable device as a payment vehicle
The present invention is directed to apparatuses, methods, and computer-program products for a multipurpose wearable device that is associated with one or more financial accounts wherein, in use, the wearable device is configured to facilitate a financial transaction using at least one of the one or more financial accounts. The wearable device comprises: a wearable article, wherein the wearable article comprises one or more features securing the wearable article to a person or an item associated with the person; and a portion comprising a machine-readable indicia, wherein the machine-readable indicia, when successfully read, provides payment information for conducting a financial transaction.
US09390414B2 One-click offline buying
Contactless payment transactions are initiated through single input activation of a mobile device's secure element and contactless communication system. Activation of the secure element and the contactless communication system is coupled to the activation status of the mobile device's screen. Activation of the secure element may be further coupled to the activation status of an electronic wallet application. Where activation of the electronic wallet application is required, one-click activation of the electronic wallet application and secure element is provided.
US09390413B2 System and method for making electronic payments from a wireless mobile device
An electronic device, system and method are provided for populating an online payment form. An electronic wallet resident on an electronic device stores data for at least one payment card. A transcoding proxy receives an online payment form from a website of an online vendor, and the electronic wallet is invoked to access data for one of the payment cards. The data is provided to the transcoding proxy, which populates the online payment form. One of the payment cards may be pre-selected for use with a given vendor.
US09390410B2 Automated transaction system and settlement processes
Disclosed is a mobile platform that enables unique tap-and-connect transaction processing and settlement, which allows consumers, merchants, financial institutions and other third parties to strengthen their relationships through a local transaction network that offers more efficient transaction processing and settlement for reduced per-transaction cost and risk management costs and increased security.
US09390407B2 Method and apparatus for providing real time mutable credit card information and for providing timestamp functionality
A method for using a smartcard is provided. The smartcard may include a microprocessor chip, a button, a dynamic transaction authorization number, a Bluetooth low energy (“BLE”) device, and a battery. The battery may power the BLE and the microprocessor chip. The smartcard may also include memory. The memory may store the dynamic transaction authorization number. The smartcard may also include a dynamic magnetic strip. The dynamic magnetic strip may include a digital representation of the dynamic transaction authorization number. The method may include pressing the button. The method may also include transmitting an instruction to a smartphone for a request for a dynamic transaction authorization number. The transmission of an instruction may be in response to the pressing of the button. The method may also include receiving a dynamic transaction authorization number from a smartphone.
US09390404B2 Methods, apparatuses, and systems for generating solutions
One feature pertains to a computer-readable storage medium having instructions for generating group solutions stored thereon, the instructions when executed by at least one processor causes the processor to receive a plurality of solution statements from a plurality of users, determine that two or more solution statements of the plurality of solution statements are positively and significantly correlated with each other, and generate a group solution that includes the two or more solution statements determined to be positively and significantly correlated with each other. The two or more solution statements having the positive and significant correlation tending to be included concurrently in the plurality of solution statements received from the plurality of users.
US09390401B2 Systems and methods for generating a dynamic personalized events feed
A device and method for generating a dynamic personalized events feed that is personalized for a user is provided. The device may include one or more processors configured to determine events that match filtering information, generate the dynamic personalized events feed based on the determined events, and update the generated dynamic personalized events feed based on the determined events. The device may also include a network interface component coupled to a network, the network interface component configured to receive the filtering information, and transmit the generated dynamic personalized events feed to a user device. The device may further include a memory, the memory storing event information and user information for determining events that match the filtering information.
US09390399B2 Integrating a web-based CRM system with a PIM client application
A customer relationship management (CRM) system utilizes a form definition, user interface (UI) definitions, and UI code to generate Web pages for interacting with CRM data. A CRM plug-in is configured to execute in conjunction with a personal information manager (PIM) client application and to utilize the same form definition, UI definitions, and UI code utilized by the CRM system to generate the Web-based CRM interface. The UI definitions are utilized to present UI controls for performing CRM-related functionality in the context of a UI generated by the PIM client application. The UI code utilized by the CRM system to implement Web-based UI controls can be utilized to implement the UI controls in the context of the PIM client application. The form definition utilized by the CRM system might be utilized to display CRM fields in the UI presented by the PIM client application.
US09390398B2 Creating a collaborative work over a network
A system and method for having a plurality of participants author and submit segment candidates to create a collaborative work over a computer network. The plurality of participants receive segment instructions for authoring the segment candidates. The candidates are submitted to the system and at least a subset of the submitted segment candidates are distributed to a voting audience over the computer network. In response the system receives votes for a favored segment candidate from the voting audience. Next, a winning segment candidate is selected from the submitted segment candidates for inclusion in the collaborative work based on the votes. This process is repeated by the system until the collaborative work is complete.
US09390396B2 Bootstrapping social networks using augmented peer to peer distributions of social networking services
A mobile device, system, and method are directed towards enabling a social network member to bootstrap another person's membership to a social network application and to send an invite using an augmented peer to peer distribution mechanism. The member may bootstrap membership by providing information about the invitee. A server may then determine sharable social networking information, to include within the invite, such as personal information about the member, and/or about the invitee. The invite is then automatically modified to make it appear as though it is sent by the member, by spoofing an identifier of the source of the invite. A link or other information associated with a link to the sharable social network application may be automatically included into the invite, where the link is configured to direct the invitee to a configuration of the social network application appropriate for the invitee's mobile device.
US09390394B2 System and method for providing mail verification data
A system and method is provided for transmitting information over a wide area network, such as the Internet, in response to receiving at least a portion of mail data. In one embodiment of the present invention, information is stored in a memory. Mail data is then affixed to a mail object. The mail object is then manually delivered to a recipient. The mail data is then provided to a reception device. The reception device then uses the mail data to retrieve the information from a mail device in communication with the memory. In a preferred embodiment, the mail data includes data corresponding to the recipient of the mail object, and the information includes data that identifies the recipient of the mail object and data that corresponds to a content of the mail object.
US09390392B2 Electronic shipment planner
An electronic shipment planner is adapted for electronically presenting shipment and scheduling information to a user. The shipment and scheduling information includes at least one shipment event date. The shipment planner is linked to a shipment data repository containing shipment and scheduling information. A system interface communicates with the shipment data repository. An interactive shipment data link is electronically associated with the shipment and scheduling information, and cooperates with the system interface as commanded by the user to access and retrieve the associated shipment and scheduling information contained in the shipment data repository. A calendar display interface displays the shipment planner to the user in a calendar format, such that the interactive shipment data link is provided on the shipment event date associated with the shipment and scheduling information.
US09390391B2 System and method for benchmarking environmental data
Systems and methods for benchmarking collected or computed environmental data for one or more entities. The systems and methods involve determining a distribution for historical environmental data for the entity, collecting current environmental data for the entity, and generating, using the processor, a graphical representation benchmarking the current environmental data against the historical environmental data, wherein the graphical representation comprises the data segments and represents the current environmental data at a position within one of the segments, where the data segments are calculated using the distribution.
US09390386B2 Methods, systems, and apparatus for predicting characteristics of a user
Methods, systems, and apparatus for predicting the characteristics of a user are described. A model based on a conditional multivariate normal distribution and social relationship information between the selected user and each of one or more other users are obtained. One or more characteristics of the selected user are determined based on the model and the social relationship information. The user characteristics may be determined by adjusting the characteristics of a typical source user according to the model and the social relationship information of the selected user.
US09390385B2 Guideway-guided vehicle detection based on RFID system
An apparatus for detecting the information about a guideway-guided vehicle having a masking component, the guideway-guided vehicle configured to follow a path of a guideway, comprising a radio frequency identification (RFID) system, method of making, and use thereof are disclosed. The RFID system comprises a first RFID transponder for transmitting, across the path, first RFID transponder specific information. An RFID reader comprises a first antenna for receiving the first RFID transponder specific information. The first RFID transponder and the first antenna are fixed relative to the path and on opposite sides of the path. The RFID reader is configured to substantially continuously monitor the first transponder specific information. The presence of the masking component of the guideway-guided vehicle between the first RFID transponder and the first antenna masks the substantially continuous monitoring of the first RFID transponder specific information.
US09390382B2 Template regularization for generalization of learning systems
Systems and techniques are disclosed for training a machine learning model based on one or more regularization penalties associated with one or more features. A template having a lower regularization penalty may be given preference over a template having a higher regularization penalty. A regularization penalty may be determined based on domain knowledge. A restrictive regularization penalty may be assigned to a template based on determining that a template occurrence is below a stability threshold and may be modified if the template occurrence meets or exceeds the stability threshold.
US09390380B2 Continuous interaction learning and detection in real-time
Systems and methods may provide for partitioning a plurality of training samples into a first sequential list of centroids, removing one or more repeating centroids in the first sequential list of centroids to obtain a first reduced list of centroids and generating a set of Hidden Markov Model (HMM) parameters based on the first reduced list of centroids. Additionally, a plurality of detection samples may be partitioned into a second sequential list of centroids, wherein one or more repeating centroids in the second sequential list of centroids may be removed to obtain a second reduced list of centroids. The second reduced list of centroids may be used to determine a match probability for the plurality of detection samples against the set of HMM parameters. In one example, the reduced lists of centroids lack temporal variability.
US09390379B2 Methods, systems, and apparatus for learning a model for predicting characteristics of a user
Methods, systems, and apparatus for generating a model for predicting the characteristics of a user are described. A model template for predicting the one or more characteristics of the selected user is obtained. Training data comprising social relationship information and one or more user characteristics for each of one or more source users is obtained. One or more parameters of the model are determined based on the training data.
US09390372B2 Unsupervised, supervised, and reinforced learning via spiking computation
The present invention relates to unsupervised, supervised and reinforced learning via spiking computation. The neural network comprises a plurality of neural modules. Each neural module comprises multiple digital neurons such that each neuron in a neural module has a corresponding neuron in another neural module. An interconnection network comprising a plurality of edges interconnects the plurality of neural modules. Each edge interconnects a first neural module to a second neural module, and each edge comprises a weighted synaptic connection between every neuron in the first neural module and a corresponding neuron in the second neural module.
US09390362B2 Radio frequency identification tag with emulated multiple-time programmable memory
In embodiments of the present invention improved capabilities are described for a Radio Frequency Identification (RFID) tag comprising a memory system with a plurality of one time programmable (OTP) non-volatile memory locations configured to emulate at least one multiple time programmable (MTP) memory location, wherein the plurality of OTP non-volatile memory locations configured to emulate the at least one MTP memory location are associated with one address, the one address being readable and writable.
US09390360B1 NFC payment moudle and controlling method thereof
A NFC payment module and controlling method are provided. The NFC payment module is embedded in a smart device and includes an encapsulation shell, a micro controller, a radio-frequency chip, an antenna, and a security chip. The phase detection and the power amplification can be performed by the radio-frequency chip with the antenna, which is commanded by the smart device. Therefore, the modulation phase angle is adjusting until the modulation phase angel is equal to the specific phase angle of the transaction signal.
US09390359B2 Mobile device with a contactless smartcard device and active load modulation
An RFID card includes a smartcard controller that receives power from a host device. The RFID card also includes a small inductive device capable of inductive coupling with an RFID reader. The small inductive device is small enough to fit in the form factor of a memory card or SIM card. Enhancement circuits enhance the usable read and write distance of the RFID card.
US09390355B2 Image forming apparatus and image formation control method
An image forming apparatus includes an image forming section, a content fraction calculating section, and an information storage section. The content fraction calculating section calculates a content fraction of each of a plurality of toners contained in the image forming section that have been supplied from different toner cartridges to one another. The information storage section stores therein, for each of the toners, a control value that is used to control a component of the image forming section. The image forming section forms an image based on respective content fractions of the toners and respective control values for the toners.
US09390352B2 Concurrent image and diagnostic pattern printing
Print image-quality defects are diagnosed by printing an image and one or more diagnostic patterns concurrently.
US09390350B2 Image editing apparatus, image editing method, and non transitory computer readable recording medium for previewing image data
Provided an image editing apparatus, image editing method, and a non-transitory computer readable recording medium that can faithfully visualize a degree of a position deviation amount of each page area generated at the time of a post-processing. An image editing apparatus, image editing method, and a non-transitory computer readable recording medium estimates a two-dimensional position deviation amount for each page area which is generated at the time of post-processing with respect to the printed matter based on the post-processing information relating to post-processing included in imposition data. Then, a preview image data indicating the virtual product is created by mapping a page image indicating the page area on the printed matter shifted as much as the deviation amount onto the page area on the virtual product.
US09390347B2 Recognition device, method, and computer program product
A recognition device includes a storage unit, an acquiring unit, a first calculator, a second calculator, a determining unit, and an output unit. The storage unit stores multiple training patterns each belonging to any one of multiple categories. The acquiring unit acquires a recognition target pattern to be recognized. The first calculator calculates, for each of the categories, a distance histogram representing distribution of the number of training patterns belonging to the category with respect to distances between the recognition target pattern and the training patterns belonging to the category. The second calculator analyzes the distance histogram of each of the categories to calculate confidence of the category. The determining unit determines a category of the recognition target pattern from the multiple categories by using the confidences. The output unit outputs the category of the recognition target pattern.
US09390346B1 Object location using a mobile device
Methods, systems and computer readable media for object location using a mobile device are described. The method can include obtaining, at a mobile device, information about a missing object and obtaining, at the mobile device, information about a background surface. The method can also include detecting, using a motion sensor in the mobile device, movement of the mobile device, and acquiring, using one or more image sensors coupled to a processor in the mobile device, one or more images. The method can further include processing the one or more images to detect any candidate objects having a similarity within a given threshold to the missing object.
US09390345B2 Means for using microstructure of materials surface as a unique identifier
The present application concerns the visual identification of materials or documents for tracking or authentication purposes.It describes methods to automatically authenticate an object by comparing some object images with reference images, the object images being characterized by the fact that visual elements used for comparison are non-disturbing for the naked eye. In some described approaches it provides the operator with visible features to locate the area to be imaged. It also proposes ways for real-time implementation enabling user friendly detection using mobile devices like smart phones.
US09390343B2 Estimating degree of deterioration of road surface
Image analysis methods for quantifying cracks in a road surface from a road surface image recorded as a digital image, and quantify the degree of deterioration of the road surface. An object image is prepared, in which its region is divided into a plurality of pixels and the grayscale value of each of the pixels is inverted. An image analysis technique may include, on the basis of an image obtained by applying a Gabor filter to a multiple resolution image, containing images with multiple scales obtained by scaling, cracks in a road surface can be detected and distinguished from white lines and characters on the road surface. It is possible to solve various problems, in which visually detected cracks do not appear as edges and edges of white lines and characters on the road surface are detected as line segment vectors.
US09390342B2 Methods, systems and apparatus for correcting perspective distortion in a document image
Aspects of the present invention are related to systems, methods and apparatus for correcting artifacts in a camera-captured document image and, in particular, to methods, systems and apparatus for correcting perspective distortion in the camera-captured document image. Multiple rectification hypothesis may be generated and verified based on a plurality of geometric rectification quality measure values. In particular, a first rectification hypothesis may be associated with a first bounding quadrilateral determined by estimation of horizontal and vertical vanishing information.
US09390339B1 Vehicle identification number capture
An image processing system may process an image of indicia positioned behind a reflective surface. The indicia may be a vehicle identification number and the reflective surface may be a windshield of a vehicle. The image processing system may receive an initial image of the indicia positioned behind a reflective surface and process the initial image to produce a resulting image. In processing the initial image, the image processing system may identify an interest region of the initial image, where the interest region identifies a portion of the initial image affected by glare caused by the reflective surface, texturize the interest region to account for the glare, and remove a defocusing effect from the initial image to account for blur, reflection, or both, caused by the reflective surface. Then, the image processing system may extract data, such as the vehicle identification number, from the resulting image.
US09390330B2 Apparatus and method for extracting correspondences between aerial images
Disclosed herein is an apparatus and method for extracting correspondences between aerial images. The apparatus includes a line extraction unit, a line direction determination unit, a building top area extraction unit, and a correspondence extraction unit. The line extraction unit extracts lines corresponding buildings from aerial images. The line direction determination unit defines the directions of the lines as x, y and z axis directions based on a two-dimensional (2D) coordinate system. The building top area extraction unit rotates lines in the x and y axis directions so that the lines are arranged in parallel with the horizontal and vertical directions of the 2D image, and then extracts building top areas from rectangles. The correspondence extraction unit extracts correspondences between the aerial images by comparing the locations of the building top areas extracted from the aerial images.
US09390328B2 Static occlusion handling using directional pixel replication in regularized motion environments
This disclosure provides a static occlusion handling method and system for use with appearance-based video tracking algorithms where static occlusions are present. The method and system assumes that the objects to be tracked move in according to structured motion patterns within a scene, such as vehicles moving along a roadway. A primary concept is to replicate pixels associated with the tracked object from previous frames to current or future frames when the tracked object coincides with a static occlusion, where the predicted motion of the tracked object is a basis for replication of the pixels.
US09390326B2 Systems and methods for high-resolution gaze tracking
A system mounted within eyewear or headwear to unobtrusively produce and track reference locations on the surface of one or both eyes of an observer is provided to improve the accuracy of gaze tracking. The system utilizes multiple illumination sources and/or multiple cameras to generate and observe glints from multiple directions. The use of multiple illumination sources and cameras can compensate for the complex, three-dimensional geometry of the head and the significant anatomical variations of the head and eye region that occurs among individuals. The system continuously tracks the initial placement and any slippage of eyewear or headwear. In addition, the use of multiple illumination sources and cameras can maintain high-precision, dynamic eye tracking as an eye moves through its full physiological range. Furthermore, illumination sources placed in the normal line-of-sight of the device wearer increase the accuracy of gaze tracking by producing reference vectors that are close to the visual axis of the device wearer.
US09390322B2 Systems and methods for note content extraction and management by segmenting notes
Techniques for creating and manipulating software notes representative of physical notes are described. A note management system comprises a sensor configured to capture an image data of a physical note, wherein the note is separated into one or more segments using marks, wherein each of the segments is marked by at least one of the marks. The note management system further comprises a note recognition module coupled to the sensor, the note recognition module configured to receive the captured image data and identify the marks on the note, and a note extraction module configured to determine general boundaries of the one or more segments within the captured image data based on the identified marks and extract content using the general boundaries, the content comprises content pieces, each of the content pieces corresponding to one of the one or more segments of the note.
US09390315B1 Image match for featureless objects
Object identification through image matching can utilize ratio and other data to accurately identify objects having relatively few feature points otherwise useful for identifying objects. An initial image analysis attempts to locate a “scalar” in the image, such as may include a label, text, icon, or other identifier that can help to narrow a classification of the search, as well as to provide a frame of reference for relative measurements obtained from the image. By comparing the ratios of dimensions of the scalar with other dimensions of the object, it is possible to discriminate between objects containing that scalar in a way that is relatively robust to changes in viewpoint. A ratio signature can be generated for an object for use in matching, while in other embodiments a classification can identify priority ratios that can be used to more accurately identify objects in that classification.
US09390309B2 Latent fingerprint detectors and fingerprint scanners therefrom
This document relates to systems and method for latent fingerprint detection using specular reflection (glare). An exemplary system may include a light source alignment portion configured to align a light source at an illumination angle relative to a sample surface such that the light source illuminates a sample surface so that the surface produces specular reflection. The system may also include a specular reflection discriminator that directs the produced specular refection to an optical detector aligned relative to said sample surface at an alignment angle that is substantially equal to an angle of reflection of the produced specular reflection. Preferably, the directed specular reflection does not saturate the optical detector, and the optical detector captures the specular reflection from the sample surface and generates image data using essentially only the specular reflection.
US09390307B2 Finger biometric sensing device including error compensation circuitry and related methods
A finger biometric sensing device may include an array of finger biometric sensing pixel electrodes and a gain stage coupled to the array of finger biometric sensing pixel electrodes. The finger biometric sensing device may also include error compensation circuitry that may include a memory capable of storing error compensation data. The error correction circuitry may also include a digital-to-analog converter (DAC) cooperating with the memory and coupled to the gain stage and capable of compensating for at least one error based upon the stored error compensation data.
US09390304B2 Encoded information reading terminal with micro-projector
An encoded information reading (EIR) terminal can include a microprocessor, a memory, an EIR device including a two-dimensional imager, and a micro-projector including a light source and a light manipulation sub-system. The EIR device can be configured to output raw message data containing an encoded message and/or output a decoded message corresponding to an encoded message. The EIR terminal can be configured to acquire an image of a target object in a field of view (FOV) of the two-dimensional imager. The EIR terminal can be further configured, responsive to successfully locating decodable indicia within the image, to produce a decoded message by decoding the decodable indicia. The EIR terminal can be further configured, responsive to successfully decoding the decodable indicia, to generate a projectable image and to project the projectable image onto a surface the target object using the micro-projector.
US09390301B2 User grouping apparatus and methods based on collected wireless IDs in association with location and time
An RFID aggregate storage stores a radio-frequency ID aggregate structure. The RFID aggregate structure is an aggregated data structure of a plurality of RFIDs, in which each RFID is associated with a location and time read out from a RFID tag, and RFID related information, hierarchically constructed by classifying RFIDs based on the readout location and further by classifying them based on the readout time. A proximity evaluator evaluates the proximity between the first user's RF ID aggregate and the second user's RFID aggregate. A user classifier classifies the first user and the second user in one group when the proximity is smaller than a predetermined threshold value.
US09390300B2 Coexistence of RF barcodes and other NFC devices
An NFC-enabled device (12) comprising a host (22), an NFC interface (26) and an RF transceiver (24) configured to emit a first RF field (46) to power-up one or more in-range RF barcodes (16, 60), the NFC-enabled device (12) being configured to detect the presence of an RF barcode (16, 60) upon powering it up and being configured to read data (48, 62 ) from the one or more detected, in-range RF barcodes (16, 60), characterized by the NFC-enabled device (12) periodically (42) emitting the first RF field (46) and being configured to transmit only changes (64) in the read data (48, 62) from the or each RF barcode (16, 60) to the host (22). The invention therefore presents several advantages, namely: it can improve the user's experience by keeping the listen mode active, even in the presence of a nearby Kovio Tag; and it can save battery power by performing a periodic Kovio tag detection instead of a continuous one.
US09390299B1 High data transfer smart card reader with heat sink
Various embodiments provide a high data transfer smart card reader. In a preferred embodiment, the high data transfer smart card reader includes smart card contacts, a heat sink, a heat conductor, and a heat sink plate. The smart card contacts are configured to contact a pad in a contact area of a smart card to create an electrical connection. The heat sink is configured to physically contact a smart card to dissipate heat. The heat conductor and the heat sink plate are connected to the heat sink to maximize heat dissipation by increasing the surface area of the heat sink. The smart card contacts, the heat sink, the heat conductor, and the heat sink plate are secured to a circuit board by an encasing member.
US09390298B2 Application routing configuration for NFC controller supporting multiple NFCEEs
The present document relates to Near Field Communication (NFC). In particular, the present document relates to the routing of application related information in a system comprising multiple NFC Execution environments (NFCEE). A method for identifying an application on an NFC enabled device (200) comprising a plurality of NFC execution environments (204, 205, 206, 207) is described, wherein the application is hosted by one of the plurality of NFC execution environments (204, 205, 206, 207). In one aspect an example method comprises: receiving an external request for accessing the application over an air interface (202) of the NFC enabled device (200); forwarding the request to more than one of the plurality of NFC execution environments (204, 205, 206, 207); receiving more than one response to the request from the more than one of the plurality of NFC execution environments (204, 205, 206, 207), respectively; and analyzing the more than one response to identify a positive response indicating that the application is hosted by a corresponding one of the plurality of NFC execution environments (204, 205, 206, 207).
US09390294B2 Virtualized device control in computer systems
Virtual device control in a computer system is described. Examples include: obtaining a device configuration policy from firmware in the computer system, the device configuration policy defining global access permissions to at least one embedded device in the computer system applied at boot time. Obtaining a virtual device configuration policy established for at least one of a selected user or a selected virtual machine (VM), the virtual device configuration policy defining additional access permissions to the at least one embedded device. Establishing a virtual hardware definition for an instance of the selected VM executing on the computer system based on the global access permissions and the additional access permissions.
US09390291B2 Secure key derivation and cryptography logic for integrated circuits
A processor of an aspect includes root key generation logic to generate a root key. The root key generation logic includes a source of static and entropic bits. The processor also includes key derivation logic coupled with the root key generation logic. The key derivation logic is to derive one or more keys from the root key. The processor also includes cryptographic primitive logic coupled with the root key generation logic. The cryptographic primitive logic is to perform cryptographic operations. The processor also includes a security boundary containing the root key generation logic, the key derivation logic, and the cryptographic primitive logic. Other processors, methods, and systems are also disclosed.
US09390283B2 Controlling access in a dispersed storage network
A method begins by a set of storage units of a dispersed storage network (DSN) receiving a set of access requests from a requesting device. The method continues with a first storage unit extracting a unique identifier from a first access request, performing a deterministic function on the unique identifier to produce a first obfuscated identifier, seeking a first obfuscated access permissions list, recovering first access permissions from the first obfuscated access permissions list, and processing the first access request based on the recovered first access permissions. The method continues with the requesting device receiving a set of access responses from the set of storage units for the set of access requests for which the requesting device had favorable access permissions with at least a threshold number of storage units.
US09390281B2 Protecting data in insecure cloud storage
The disclosed embodiments provide a system that processes data. The system includes a first client that encrypts a first set of data, uploads the encrypted first set of data to a volume on a cloud storage system, and creates a commit record of the upload. The system also includes a synchronization server that verifies access to the volume by the first client and includes the commit record in a change set containing a set of commit records associated with the volume. The synchronization server also signs the change set and provides the change set for use in synchronizing the upload with a second client.
US09390280B2 System and method for obtaining keys to access protected information
A server uses an encryption key to decrypt authentication information thereby facilitating communication with network-accessible applications that may be remotely located from the server. Servers can also use encryption keys to decrypt files containing sensitive data. The encryption key is obtained by a collection of software agents, each providing a portion of information necessary for generating the encryption key. Each software agent performs a respective examination, the results of which determine whether the respective portion of information is valid or not. A complete encryption key can be obtained only when all of the contributing portions of information are valid.
US09390279B2 Systems and methods for providing conditional access to transmitted information
Systems, methods and computer program products for controlling access to position information at a receiver based on various considerations, including a requested service type, a user type, a device type, a software application type, and/or other characteristics associated with a particular software application at the receiver from which the position information was requested.
US09390277B2 Method and device for data confidentiality protection based on embedded universal integrated circuit card
Embodiments of the present invention provide a method and device for data confidentiality protection based on an embedded universal integrated circuit card. An embodiment method includes determining that a terminal device is not held by an authorized user; setting an eUICC in the terminal device to an unavailable state; and instructing the eUICC to perform confidentiality protection processing on data in the eUICC.
US09390275B1 System and method for controlling hard drive data change
A system for controlling hard drive data change is disclosed which comprises a hard drive having a first volume and a second volume, the first volume for storing data of a first type, the second volume for storing data of a second type, the hard drive being connected to a computer system which restarts the hard drive and an application for running on the computer system for determining whether data of the second type is attempting to change data of the first type to store data of the second type in the second volume, for determining whether data of the second type has been stored in the second volume, and for erasing data of the second type that has been stored in the second volume when the hard drive is restarted by the computer system.
US09390269B2 Security testing using semantic modeling
Optimized testing of vulnerabilities in an application implemented by a method includes generating a first probe directed to determine whether an application is vulnerable to a first type of attack; analyzing one or more responses from the application based on the application responding to the first probe; in response to determining that the one or more responses from the application validate a first hypothesis about one or more vulnerabilities associated with the application, and generating at least a second probe to further verify the first hypothesis. The second probe focuses on discovering additional details about the application's vulnerabilities to the first type of attack or a second type of attack.
US09390266B1 System and method of preventing installation and execution of undesirable programs
Disclosed are systems and methods for controlling installation of programs on a computer. An exemplary system is configured to detect installation of an unknown program on a computer; suspend installation of the unknown program; execute the unknown program in a secure environment; detect undesirable actions of the unknown program, including: actions performed by the program without knowledge of a user, actions for accessing personal user data on the computer, and actions effecting user's working with other programs or operating system of the computer; determine whether the unknown program is undesirable or not based on the detected undesirable actions of the program; when the unknown program is determined be undesirable, prompt the user to select whether to allow or prohibit installation of the undesirable program on the computer; and when the unknown program is determined not to be undesirable, allow installation of the unknown program on the computer.
US09390264B2 Hardware-based stack control information protection
Techniques for protecting contents of a stack associated with a processor are provided. The techniques include a method including receiving a store instruction from a software program being executed by the processor, the store instruction including control information associated with a subroutine, altering the control information to generate secured control information responsive to receiving the store instruction from the software program, storing the secured control information on the stack, receiving a load instruction from the software program; and responsive to receiving the load instruction from the software program, loading the secured control information from the stack, altering the secured control information to recover the control information, and returning the control information to the software program.
US09390262B2 Method for protecting computer programs and data from hostile code
A method that protects computer data from untrusted programs. Each computer's object and process is assigned with trust attributes, which define the way it can interact with other objects within the system. When an object is classified as untrusted, it can interact with other object within the system on a limited basis. A virtualized system is provided on the computer so that when the untrusted object attempts to perform an operation that is outside its scope of authorization, the virtualized system intercepts the operation but present the untrusted program with an indication that the requested operation has been performed. The method further includes processes to securely move a program from an untrusted group to a trusted group.
US09390261B2 Securing software by enforcing data flow integrity
The majority of such software attacks exploit software vulnerabilities or flaws to write data to unintended locations. For example, control-data attacks exploit buffer overflows or other vulnerabilities to overwrite a return address in the stack, a function pointer, or some other piece of control data. Non-control-data attacks exploit similar vulnerabilities to overwrite security critical data without subverting the intended control flow in the program. We describe a method for securing software against both control-data and non-control-data attacks. A static analysis is carried out to determine data flow information for a software program. Data-flow tracking instructions are formed in order to track data flow during execution or emulation of that software. Also, checking instructions are formed to check the tracked data flow against the static analysis results and thereby identify potential attacks or errors. Optional optimisations are described to reduce the resulting additional overheads.
US09390260B2 Methods for enforcing control flow of a computer program
One aspect of the invention provides a method of controlling execution of a computer program. The method comprises the following runtime steps: parsing code to identify one or more indirect branches; creating a branch ID data structure that maps an indirect branch location to a branch ID, which is the indirect branch's equivalence class ID; creating a target ID data structure that maps a code address to a target ID, which is an equivalence class ID to which the address belongs; and prior to execution of an indirect branch including a return instruction located at an address: obtaining the branch ID associated with the return address from the branch ID data structure; obtaining the target ID associated with an actual return address for the indirect branch from the target ID data structure; and comparing the branch ID and the target ID.
US09390255B2 Privileged account manager, dynamic policy engine
Techniques for managing accounts are provided. An access management system may check out credentials for accessing target systems. For example a user may receive a password for a period of time or until checked back in. Access to the target system may be logged during this time. Upon the password being checked in, a security account may modify the password so that the user may not log back in without checking out a new password. Additionally, in some examples, password policies for the security account may be managed. As such, when a password policy changes, the security account password may be dynamically updated. Additionally, in some examples, hierarchical viewing perspectives may be determined and/or selected for visualizing one or more managed accounts. Further, accounts may be organized into groups based on roles, and grants for the accounts may be dynamically updated as changes occur or new accounts are managed.
US09390254B2 Data transmitting system and method, drive unit, access method, data recording medium, recording medium producing apparatus and method
A security module is provided in a data recording medium, data to be written to the data recording medium is encrypted with an content key different from one data to another, and the content key is safely stored in the security module. Also, the security module makes a mutual authentication using the public-key encryption technology with a drive unit to check that the counterpart is an authorized (licensed) unit, and then gives the content key to the counterpart, thereby preventing data from being leaked to any illegal (unlicensed) unit. Thus, it is possible to prevent copyrighted data such as movie, music, etc. from being copied illegally (against the wish of the copyrighter of the data).
US09390251B2 Delivering data from a range of input devices over a secure path to trusted services in a secure element
Systems and methods of delivering data from a range of input devices may involve detecting an availability of data from an input device, wherein the input device is associated with a default input path of a mobile platform. An input device driver can be invoked in a security engine in response to the availability of the data if a hardware component in the default input path is in a secure input mode, wherein the security engine it associated with a secure input path of the mobile platform. Additionally, the input device driver may be used to retrieve the data from the input device into the security engine.
US09390250B2 Mobile terminal and control method thereof
The present invention relates to a mobile terminal and a control method thereof. The mobile terminal displays a plurality of figures arranged in a first composition on a touch screen when a specific mode is locked, rearranges the plurality of figures in a second composition different from the first composition upon receiving a specific input, and determines whether to unlock the specific mode on the basis of a pattern which is input using the plurality of figures arranged in the first or second composition.
US09390247B2 Information processing system, information processing apparatus and information processing method
An information processing apparatus receives user information and a request, generates authentication information in response to the request, stores the authentication information associated with the user information, receives the authentication information from a terminal apparatus and device identification information identifying the terminal apparatus, stores the device identification information and the user information stored associated with the authentication information in a manner of associating them with one another when information coincident with the received authentication information is stored, determines, when receiving the user information, the device identification information and a service request from the terminal apparatus, whether information coincident with the user information and information coincident with the device identification information are stored, and provides a service concerning the service request when determining that information coincident with same the user information and information coincident with the same device identification information are stored.
US09390237B2 Test strip and methods and apparatus for reading the same
Embodiments of the present invention provide a method of analyzing a response of an analyte test device, comprising recording, by a device reading device, an image of coded test information associated with the test device, determining, based directly on the image of the test information, one or more test parameters, recording, by the reading device, an image of one or more optically responsive portions of the test device, and determining the response of the test device based on the one or more test parameters and the image of the one or more optically responsive portions of the test device.
US09390235B2 Infusion management platform with infusion data grouping logic
An infusion management platform can determine, based on one or more infusion events, whether to group infusions or segments of infusions. Related apparatus, systems, techniques and articles are also described.
US09390231B2 System for providing identification and information, and for scheduling alerts
A device and system for providing identification and medical information are disclosed. The device includes a readable code that contains medical biographical information of the subject, a programmable reporter element that is programmed to electronically store at least one particular event relating to the subject, and a signal producing element functionally related to the programmable reporter element. The system includes collecting and storing medical biographical information of a subject, embedding the medical biographical information in a readable code of the device, and scanning the readable code of the device worn by or in the possession of the subject using an appliance to retrieve the medical biographical information of the subject. The medical biographical information allows medical professionals to obtain the subject's medical information in order to provide medical care. Also disclosed is an integrated system for alerting subjects to upcoming events related to their continued care.
US09390229B1 Method and apparatus for a health phone
A method and apparatus providing a health phone utilizing a pedometer or accelerometer incorporated into a cellular telephone. The system is designed to receive activity data from the pedometer or accelerometer, and communicate the activity data to a remote server, the cellular telephone further designed to receive suggestions from the server, the suggestions generated based on the activity data received from the cellular telephone.
US09390228B2 System and method for securely storing and sharing information
A method for any community of interest to conduct secure exchange of encrypted data using a three-party security mechanism consisting of key masters, registries and cloud lockboxes. The registries establish unique identities, verify authenticity, and create directories of individuals, members, cloud lockboxes and other registries. The registries manage permissions lists communicated to the cloud lockboxes as well as detecting and halting anomalous activity. The key masters operated by members to manage keys for individuals, handle encryption and decryption and conduct key exchanges with other members. The cloud lockboxes manage file storage, retrieval and access control. Related application programming interfaces support multiple levels of integration and generate metadata specific to the needs of the community of interest. Community of interest establishes operating parameters including: selecting an encryption algorithm, establishing identity verification processes and selecting a security level. The design supports several other key features.
US09390227B2 Visualization tool for qPCR genotyping data
Systems and methods are used to display data obtained from a qPCR instrument. Each of two or more samples is probed with a first labeling probe and a second labeling probe. A first data set is received from a qPCR instrument at a first cycle number that includes for each sample a first labeling probe intensity, and a second labeling probe intensity. A second data set is received at a second cycle number that includes for each sample a first labeling probe intensity and a second labeling probe intensity. A first plot of first labeling probe intensity as a function of second labeling probe intensity is created using the first data set. A second plot of first labeling probe intensity as a function of second labeling probe intensity is created using the second data set. The first plot and the second plot are displayed in response to user defined input to provide dynamic and real-time analysis of genotyping data.
US09390224B2 Systems and methods for automatically determining myocardial bridging and patient impact
Embodiments include computer-implemented methods and systems for reporting the presence of myocardial bridging in a patient, the method comprising detecting, within a patient-specific model representing at least a portion of the patient's heart based on patient-specific anatomical image data regarding a geometry of the patient's heart, a segment of an epicardial coronary artery at least partially surrounded by the patient's myocardium to determine the presence of myocardial bridging; and computing, using at least one computer processor, at least one physical feature of the myocardial bridging to identify the severity of the myocardial bridging.
US09390221B2 Linear complexity prioritization of timing engineering change order failures
A system and a method are disclosed for displaying an output of a static timing analysis. A plurality of timing violations of an integrated circuit is identified. The timing violations are associated with a timing path. A reason is identified for each of the timing violations. A priority for fixing the timing violations is determined. Information describing the timing violations is sent for being presented. The information presented includes an information indicating priority associated with timing violations to assist developers in prioritizing tasks for fixing the timing violations.
US09390220B2 Bus-based clock to out path optimization
A place and route technique is provided for a programmable logic device to optimize a delay difference between a bus including a plurality of clock to out paths and a corresponding clock out path.
US09390218B2 Integrated circuit design system with color-coded component loading estimate display
A method comprises generating a schematic of an integrated circuit (IC), the IC having a circuit component. The method also comprises searching a database having one or more configurations of the circuit component, each of the one or more configurations of the circuit component having a corresponding estimated resistance capacitance (RC) value and an assigned color scheme based on the estimated RC value. The method further comprises displaying the circuit component in the schematic as a symbol representing the circuit component, the symbol representing the circuit component being displayed having the assigned color scheme of a selected circuit component configuration. The method additionally comprises displaying a layout of the IC based on a determination that the schematic passed a design rule check, the displayed layout of the IC including the selected configuration of the circuit component, the selected configuration being displayed in the layout having the assigned color scheme.
US09390212B2 Methods and apparatus for synthesizing multi-port memory circuits
Multi-port memory circuits are often required within modern digital integrated circuits to store data. Multi-port memory circuits allow multiple memory users to access the same memory cell simultaneously. Multi-port memory circuits are generally custom-designed in order to obtain the best performance or synthesized with logic synthesis tools for quick design. However, these two options for creating multi-port memory give integrated circuit designers a stark choice: invest a large amount of time and money to custom design an efficient multi-port memory system or allow logic synthesis tools to inefficiently create multi-port memory. An intermediate solution is disclosed that allows an efficient multi-port memory array to be created largely using standard circuit cell components and register transfer level hardware design language code.
US09390210B2 Logic absorption techniques for programmable logic devices
Various techniques are provided to efficiently implement user designs in programmable logic devices (PLDs). In one example, a computer-implemented method includes receiving a design identifying operations to be performed by a programmable logic device (PLD). The computer-implemented method also includes synthesizing the design into a plurality of PLD components comprising a first logic block cascaded into a second logic block. In the computer-implemented method, the second logic block implements a multiplexer adapted to selectively pass a first multi-bit input signal received from the first logic block or a second multi-bit input signal. The computer-implemented method also includes further synthesizing the design to absorb the multiplexer into the first logic block.
US09390209B2 System for and method of combining CMOS inverters of multiple drive strengths to create tune-able clock inverters of variable drive strengths in hybrid tree-mesh clock distribution networks
An electronic device fabrication tool uses only standard-size cells from a cell library to fabricate a clock distribution network on a semiconductor device, thereby reducing the cost of the fabrication process. Target clock drive strengths are determined to reduce skew along the clock-distribution network, and the standard size cells are combined to produce clock-driving components substantially equal to the target clock drive strengths. The cells are combined using VIA programming, by electrically coupling them by adding or removing vias connecting the cells. In hybrid tree-mesh clock distribution networks, VIA programming ensures that the binary tree portions of the network are not affected by the tuning. Preferably, the clock-driving elements are clock inverters or buffers, though other elements are able to be used to drive clock signals on the clock distribution network.
US09390204B2 Multisegment fractures
A method can include identifying a discrete natural fracture in a three-dimensional environment that includes a reservoir modeled by a three-dimensional grid model, representing the discrete natural fracture via a multisegment model in a two-dimensional region within the three-dimensional grid model, defining at least one connection for fluid communication between the multisegment model and the three-dimensional grid model, defining boundary conditions for the multisegment model, and solving the multisegment model subject to the at least one connection and the boundary conditions to provide values for fluid flow in the two-dimensional region. Various other apparatuses, systems, methods, etc., are also disclosed.
US09390202B2 Coordinate measuring system data reduction
Coordinate measurement data such as point cloud data associated with coordinate measurement machine data is reduced in a strategic and systematic manner by segmenting and/or reducing data based on nominal geometric information contained in an electronic file such as a CAD model or a coordinate measurement machine inspection plan. For example, in one embodiment, a software application is used to identify geometric features and tolerances within a CAD model of an object, and to segment coordinate measurement data of a physical object based on the identified geometric features and tolerances from the CAD model. The various segments of coordinate measurement data may be assigned different data requirements, and the data may be reduced in different manners on a feature-by-feature basis.
US09390200B2 Local caching device, system and method for providing content caching service
The present disclosure relates to a local caching device, system and method for providing a content caching service. The local caching device receives, from a content provider, at least one part of content requested by a user terminal and then, based on the received part of the requested content, determines whether the requested content is stored in a storage unit. If the requested content is stored, the local caching device registers flow information of the requested content in the storage unit. When content having the same flow information as the registered flow information is requested, the local caching device determines based on content address information whether the requested content is stored.
US09390198B2 Heat map of suggested search queries
A search query portion is received. A plurality of suggested search queries is identified based on the search query portion. Feature values are determined for each of the plurality of suggested search queries based on a feature display preference. A heat map of the suggested search queries is transmitted to a client computer system. The heat map contains a plurality of blocks visually representing the plurality of suggested search queries and the determined feature values.
US09390186B2 Adaptive learning methods for selecting page components to include on dynamically generated pages
A subset of a set of components is selected for inclusion on a dynamically-generated page within a particular user context. The subset of components is selected based on scores associated with the components in the set. The score of a component is preferably determined based on measurements of user activity resulting from exposures of the components to users in the particular context.
US09390185B2 Command lines
Software is installed and/or un-installed in networks. Each of a plurality of networks has a network management system storing metadata comprising at least the identities and command lines of software installed using installation systems of the management systems. On each network the network management system of the network is accessed to obtaining the metadata of items of software run on the network. That metadata is sent to a server which serves all the networks. At the server, a comparison is done to compare the metadata of instances of the same software on different networks. For those instances of the same software having the same metadata on different networks, the metadata is storing in a database. The networks use the metadata stored in the database to automatically install or un-install software.
US09390182B2 Systems and methods for implementing achievement guided recommendations
A method performed by one or more computing devices. The method uses data identifying a plurality of users and a plurality of achievements. The data identifies which of the plurality of achievements each of the plurality of users has earned and when any such achievements were earned. The method includes ordering the plurality of achievements to define an ordered achievement list, and for each of the plurality of users, removing from the ordered achievement list any of the plurality of achievements identified in the data as having been earned by the user to define a recommended achievement list for the user. The method also includes identifying a selected achievement, and identifying as a set of similar users any of the plurality of users whose recommended achievement list includes the selected achievement.
US09390177B2 Optimizing web crawling through web page pruning
Crawling computer-based documents by performing static analysis on a computer-based document to identify within the computer-based document one or more execution vectors, where each execution vector includes a computer program segment including a call to an entity that is external to the computer-based document, and one or more additional computer program segments whose execution precedes and leads ultimately to execution of the computer program segment that includes the call to the entity, and causing any of the computer program segments in any of the execution vectors to be executed during a crawling of the computer-based document, and any computer program segment within the computer-based document that is excluded from the execution vectors to be excluded from execution during the crawling of the computer-based document.
US09390173B2 Method and apparatus for scoring electronic documents
A method, apparatus and data structure is provided to determine a score for an electronic document, such as a webpage, image, audio recording, video recording or other electronic content, to aid in the ranking and retrieval of the electronic document. The score for an electronic document is based on weighted subjective user ratings of the electronic document by members of a member set. Weight factors are assigned to the members of the member set who then rate the electronic document. The score is determined for the electronic document based on the ratings of the electronic document by the members in the member set where each member's rating is weighted by a weight factor specific for the member who has provided the rating. The weight factor for a member is based on ratings assigned to that member by other members in the member set.
US09390171B2 Segmenting and playback of whiteboard video capture
The present invention discloses methods of archiving and optimizing lectures, presentations and other captured video for playback, particularly for blind and low vision individuals. A digital imaging device captures a preselected field of view that is subject to periodic change such as a whiteboard in a classroom. A sequence of frames is captured. Frames associated with additions or erasures to the whiteboard are identified. The Cartesian coordinates of the regions of these alterations within the frame are identified. When the presentation is played back, the regions that are altered are enlarged or masked to assist the low vision user. In another embodiment of the invention, the timing of the alterations segments the recorded audio into chapters so that the blind user can skip forward and backward to different sections of the presentation.
US09390168B1 Customer keyword-based item recommendations
Disclosed are various embodiments for generating recommendations based at least in part on keywords associated with users. In some embodiments, among others, a system includes at least one computing device and a recommendation generator executable in the at least one computing device. The recommendation generator comprises logic that generates a plurality of pools of keywords based at least in part on a plurality of behavioral histories. Each pool corresponds to a behavioral history of a user across a plurality of domains. The recommendation generator also comprises logic that clusters at least a number of the keywords in a cluster across at least two pools including the same keyword and logic that recommends an item based at least in part on the cluster of keywords.
US09390164B2 Identifying relationships among words in semantic web
In one example, a method includes receiving a query regarding a relationship among keywords, using one or more web search engines to identify highly ranked web pages related to the keywords and highly ranked ontologies related to the words, extracting semantics that are related to the keywords from the highly ranked web pages, combining the highly ranked ontologies and the extracted semantics to form an integrated ontology, identifying relationships that are related to the keywords from the integrated ontology, and ranking the relationships.
US09390160B2 Systems and methods for providing improved access to pharmacovigilance data
A system and method for browsing a pharmacovigilance database with a graphical representation that shows relationships between medical terms may include providing access to a plurality of medical terminologies and mapping medical terms of the plurality of terminologies to a searchable database by using a semantic network to relate the medical terms of the different terminologies. The system and method may further include providing a graphical user interface that enables graphical navigation of the plurality of terminologies, enables display of a mapping between a first medical term from a first medical terminology to a second medical term from a second medical terminology, and enables coding of pharmacovigilance reports using medical terms of the second terminology based on a description provided using medical terms of the first terminology.
US09390158B2 Dimensional compression using an analytic platform
Systems and methods are presented that may involve receiving a causal fact dataset including facts relating to items perceived to cause actions, wherein the causal fact dataset includes a data attribute that is associated with a causal fact datum. It may also involve pre-aggregating a plurality of the combinations of a plurality of causal fact data and associated data attributes in a causal bitmap. It may also involve selecting a subset of the pre-aggregated combinations based on suitability of a combination for the analytic purpose. It may also involve storing the subset of pre-aggregated combinations to facilitate querying of the subset.
US09390157B2 Dynamic data collection
A method, system, and computer storage medium dynamically generate a web-based data collection tool. The method comprises defining a web-based framework of data dimensions. The web-based framework is populated by an end-user with measures for data dimension intersections that are selected by the end-user, where a data dimension intersection is a combination of multiple data dimensions. The web-based framework is transmitted to the end-user. The end-user populates the web-based framework on the fly with one or more user-selected data dimensions to create a user-defined data collection tool, and the user-selected data dimensions are chosen from a plurality of data dimensions that are offered through the web-based framework. The web based framework receives the user-defined data collection tool.
US09390156B2 Distributed directory environment using clustered LDAP servers
The clustering of LDAP servers wherein each LDAP server is connected to the databases of all other LDAP servers in addition to its own database. This creates a mesh of highly available LDAP servers that are loosely connected to all the repositories of LDAP data in the distributed directory environment. Also broadly contemplated herein is the employment of a cluster manager for managing the cluster of LDAP servers.
US09390155B2 Accessing content in a content-aware mesh
Content in a content-aware mesh may be accessed and/or manipulated. In one embodiment, a node may receive access to each of a plurality of images that are distributed among at least two nodes of a mesh. The at least two nodes may not be part of the same service. Accessing to each of the images may be performed without the node locally storing all of the images. The node may display an image of the plurality of images via a uniform interface without indication as to which of the nodes the image is stored on.
US09390154B1 Methods and apparatus for a distributed database within a network
In some embodiments, an instance of a distributed database can be configured at a first compute device within a set of compute devices that implements the distributed database via a network. A database convergence module can define a first event linked to a first set of events and receive, from a second compute device from the set of compute devices, a second event (1) defined by the second compute device and (2) linked to a second set of events. The database convergence module can define a third event linked to the first event and the second event. The database convergence module can identify an order associated with a third set of events based at least on the first set of events and the second set of events, and store in the instance of the distributed database the order associated with the third set of events.
US09390153B1 User-configurable radiological data transformation routing and archiving engine
A user-configurable radiological data transformation, routing and archiving engine includes a plurality of sub-engines representing algorithms programmed to be processed by a processor, the sub-engines including a user-configurable transformation sub-engine, a user-configurable routing sub-engine, a user-configurable archiving sub-engine and a user-configurable priors puller sub-engine.
US09390151B2 Method and apparatus for collecting and disseminating information over a computer network
The apparatus comprises at least one database for storing digital information associated with at least a first user and a second user, at least one links module for the first user and for the second user, at least one manipulations module and at least one display device for respectively displaying at least said linked digital information wherein said linked digital information associated with said first user is automatically updated on at least said display device of said second user when that information is manipulated, and wherein said linked digital information associated with said second user is automatically updated on at least said display device of said first user when that information is manipulated.
US09390148B2 Report data justifiers
A method includes providing a source report for display that includes a first plurality of data values each associated with a first context, the first context comprising an intersection of dimensions of a multidimensional database. The method includes receiving a selection of a first data value of the first plurality, and providing a drill-through report for display generated based at least in part on the selected data value. The drill-through report includes a second plurality of data values each associated with a second context comprising an intersection of at least one dimension of the first context and at least one other dimension not in the first context. The method includes receiving an indication of a relationship between the selected data value and the drill-through report, updating the source report to include a graphical representation of the relationship, and providing the updated source report having the graphical representation for display.
US09390145B2 System and method for providing recommendations with a location-based service
A mobile application is provided that provides intelligent recommendations based on the knowledge of where the user has been, and what venues the user would like to visit. Further, such an application may be capable of determining where people in a user's social network have been and what venue locations these related users would like to visit. Also, in another implementation, the application may be capable of determining where people with similar taste have been, and where they would like to go. Some or all of this information may be used by a mobile application that provides recommendations to a user. For instance, in one implementation, a user having a mobile device such as a cell phone wishes to locate a venue based on one or more parameters, and some or all of this information may be used to order to rank recommendations with the interface.
US09390143B2 Recent interest based relevance scoring
A computer-implemented method for processing query information includes receiving prior queries followed by a current query, the prior and current queries being received within an activity period an originating with a search requester. The method also includes receiving a plurality of search results based on the current query. Each search result identifying a search result document, each respective search result document being associated with a query specific score indicating a relevance of the document to the current query. The method also includes determining a first category based, at least in part, on the prior queries. The method also includes identifying a plurality of prior activity periods of other search requesters, each prior activity period containing a prior activity query where the prior activity query matches the current query, and where the prior activity period indicates the same first category.
US09390133B2 Method and system for regulating entry of data into a protected system
A computer-based system for regulating entry of data into a protected system. The system can include a first processor configured to process and manage data for the computer-based system. The system can also include one or more indelible memories communicatively linked with the first processor for the computer-based system. Additionally, the system can include a second processor configured to process and manage data for the protected system, wherein the second processor for the protected system is communicatively linked to the first processor for the computer-based system. The first processor for the computer-based system can be configured to receive one or more parameters from the second processor, wherein the one or more parameters defines which data from a data stream can pass to the protected system. Also, the first processor can be configured to receive the data stream from one or more accessing systems The first processor can be further configured to filter the data stream based on the one or more parameters received from the second processor. Moreover, the first processor can be configured to transmit the filtered data stream to the second processor, wherein one or more of the receiving, the filtering, and the transmitting is performed by utilizing the one or more indelible memories.
US09390130B2 Workload management in a parallel database system
A workload management service component of a parallel database-management system monitors usage of computational resources in the parallel database-management system. The component provides a query-processing-task-management interface and a query-execution engine. The engine receives query-processing requests associated with one of a number of services from host computers, and accesses the workload-management-services component to determine whether to immediately launch execution of query-processing tasks corresponding to the received query-processing requests. Alternatively, the engine accesses the component to place the query-processing requests on wait queues for subsequent execution. The determination is based on the current usage of computational resources within the parallel database-management system.
US09390129B2 Scalable and adaptive evaluation of reporting window functions
According to one aspect of the invention, for a database statement that specifies evaluating reporting window functions, a computation-pushdown execution strategy may be used for the database statement. The computation-pushdown execution plan includes producer operators and consolidation operators. Each producer operator computes a respective partial aggregation for each reporting window function based on a subset of rows, and broadcasts the respective partial aggregation. Each consolidation operator fully aggregates all partial aggregations broadcasted from the producer operators. Alternatively, an extended-data-distribution-key execution plan may be used. Each producer operator sends rows based on hash keys to sort operators for computing partial aggregations for at least one reporting window function based on a subset of rows. Each consolidation operator receives and fully aggregates all partial aggregations broadcasted from the sort operators.
US09390128B1 Datastore for storing file access event data
A computer system and method is disclosed for storing large volumes of event data. The system receives access event logs including indications of access events to files stored on a set of storage devices. Each indication includes respective values for a plurality of access event attributes. The system uses the indications to store multiple segment files, each corresponding to a respective subset of the indications. Each segment file stores data as multiple tiles, where each tile includes a compressed copy of those access event indications of the segment file that have a shared value for one of the access event attributes. Each tile is stored contiguously within a set of storage devices.
US09390124B2 Version control system using commit manifest database tables
A centralized version control system stores and tracks commits as a set of database tables in a central repository that may be shared by others. A commit represents a version of a repository of files at a given point in time. The centralized version control system allows users to query for information relating to the history of the commits. The queries are implemented through operations performed on database tables using a database query language. The configuration of the database tables in this manner enables the system to process the queries more readily.
US09390120B1 System and methods for organizing hierarchical database replication
Systems and methods for receiving a database update and organizing hierarchical databases are provided. A database server may receive a database update requested from another server. The database server may determine a transaction metric based on the received database update. The database server may select another database server to request database updates from based on comparing the transaction metric with a predetermined transaction threshold.
US09390117B2 Method of transforming sets of input strings into at least one pattern expression that is string expressing sets of input strings, method of extracting transformation pattern as approximate pattern expression, and computer and computer program for the methods
The present invention provides a method of extracting a transformation pattern as an approximate pattern expression. In the process of transforming the sets of input strings to at least one pattern expression, the transformation pattern transforming the sets of input strings to the pattern expression. The method includes: 1) preparing one structure including multiple nodes each representing a state and multiple edges each representing a transition; 2) generating a first reduced structure by removing at least one state in one structure from one structure and by merging at least two edges including an edge associated with the removed state in the one structure; 3) generating a first approximate pattern expression based on the first reduced structure; and 4) presenting the first approximate pattern expression.
US09390111B2 Database insert with deferred materialization
According to one embodiment of the present invention, a system inserts data into a database object. The system associates the database object with a parameter specifying materialization of data for the database object. The system inserts data into the database object and materializes the data in accordance with the parameter to provide access to the data from the database object, wherein the parameter specifies a portion of the data to be materialized upon insertion. Embodiments of the present invention further include a method and computer program product for inserting data into a database object in substantially the same manners described above.
US09390110B2 Method and apparatus for compressing three-dimensional point cloud data
A method and apparatus for compressing three-dimensional point cloud data is disclosed. In one aspect, a method for compressing three dimensional point cloud includes steps of retrieving three-dimensional point cloud data; providing one or more grids to the three-dimensional point cloud data; assigning one binary digit to each three-dimensional grid voxel containing said point cloud data and assigning the other binary digit to each three-dimensional grid voxel that does not have said point cloud data; converting the three-dimensional grid into two-dimensional tiles; and storing information of a plurality of binary strings in said two-dimensional tiles. In one embodiment, the step of storing information of a plurality of binary strings in said two-dimensional tiles includes a step of storing the number of repeating times of each binary digit in the binary strings. The method can significantly reduce memory space, as well as preserving small details of the point cloud.
US09390108B2 Monitoring and debugging query execution objects
Nodes in a query execution data structure have monitor and dump methods defined. The monitor method enables the collection of information from the node. The dump method outputs the monitored information from each node. A monitor and debug mechanism of the preferred embodiments includes a graphical user interface that allows a user to graphically examine a query execution tree, to enable monitoring of the nodes on a node-by-node basis, and to view information dumped from the query execution data structure as the query is executed or after the query is executed. The result is a powerful tool that allows efficiently monitoring and debugging a query implemented in an object oriented query execution data structure.
US09390105B2 System and methods for storing and analyzing geographically-referenced data
Embodiments of a system and method for storing and analyzing geographically-referenced data are generally described herein. In some embodiments, the system includes one or more computing devices to generate an index value for geographically referenced data. The index value may be representative of a geographic location corresponding to the geographically-referenced data. The system may also include one or more storage devices configured to store the geographically-referenced data and the index value such that the geographically-referenced data is stored contiguously with other geographically-referenced data of the geographic location based on the index value.
US09390099B1 Method and apparatus for improving a compression ratio of multiple documents by using templates
Example embodiments of the present invention effectively manage a large set of records such that each can be quickly accessed while still reducing the system capacity used for storing the records by taking into account specifics of the record structure. A template document is constructed for a large set of similar documents, such that it represents the maximum common portion of content in the document set. The template is compressed and stored. Every document in the set is then concatenated individually to the uncompressed template and the concatenated result is compressed. The compressed template is then subtracted from the combined compressed result. The result of this subtraction is stored in the data store for each document. Effectively, only the compressed difference between each document and the template is stored, which reduces significantly the amount of capacity necessary for storing the document set (e.g., by a factor of 5 or 10).
US09390098B2 Fast approximation to optimal compression of digital data
A “fast approximation” of compression of current data involves using information obtained from an earlier compression of similar data. It overcomes the iterative process of discovering a unique set of optimal symbols. Representatively, a dictionary of symbols corresponding to original data from an earlier compressed file is extracted. Original bits are then obtained from the symbols. Sequences of the original bits are identified in the current data of a current file under consideration. A new bit stream for the current file is created from the original bits and according to the symbols they represent. Every occurrence of the symbols is counted in the new bit stream and a path-weighted Huffman tree is created from the counted occurrences. A coding from the Huffman tree ensues, along with an end-of-file marker. The latter is stored in a new compression file, including the dictionary earlier extracted from the earlier compressed file.
US09390097B2 Dynamic generation of target files from template files and tracking of the processing of target files
Target file generation systems and methods are described, which are optionally for use by ordinary computer users enable those users to readily generate target files without the requirement that they know the internal layout structures of the target files. A user is enabled to select a template file from a plurality of template files via a user interface configured to be displayed on a computer display to the user, wherein the template files include changeable fields associated with corresponding field delimiters and prompting labels. An incomplete software program file containing variable name locations is accessed from memory. The program file is parsed to locate the variable name locations. The label names obtained from the template file selected by the user are inserted into the variable name locations to further complete the software program file. The software program file is stored in computer memory.
US09390094B2 Method and system for displaying and operating multi-layers item list in web-browser with supporting of concurrent multi-users
The use of hierarchical list to represent and operate resource structure has been practiced by operating system, for example by Windows Explore of Microsoft Windows, for very long time. However, users are lack of Windows Explore like tools to work on resource structure, such as file system, across world wide web (“WWW”). Present invention has disclosed a technology of utilizing memory bound multi-layered hierarchical list to mirror an actual resource structure and presenting the multi-layered hierarchical list to a user across the Internet during a user session for the user through the multi-layered hierarchical list displayed on an end-user device to access and operate the resource structure.
US09390079B1 Voice commands for report editing
A voice command system may enable a user to select, replace, delete, and/or modify items of textual content associated with, or following, headings and/or subheadings of a document by providing an input including a command (or identifier) and a heading/subheading identifier. The system may recognize, via voice recognition software and in combination with a rule set, the command and the identifier. For example, the system may include rules for determining a particular heading/subheading of the document being referenced by the identifier. The system may also include rules for identifying the textual content related to the identified heading/subheading. Once the textual content is identified, the system may automatically select or delete the identified textual content, and/or place a cursor (for example, a text input cursor) in a location where the deleted textual content was previously located.
US09390077B2 Document division method and system
Computer-readable media stores instructions that perform operations including receiving a first electronic document; determining a first information gain value associated with a first line that divides the first electronic document into a first portion and a second portion; determining a second information gain value associated with a second line that divides the first electronic document into a third portion and a fourth portion; and determining which of the first information gain value and second information gain value is greater. Information gain values are determined by calculating a difference between an entropy value associated with a line and an entropy value associated with an electronic document. Entropy values associated lines or electronic documents are determined based at least in part on document objects in the portions created by a line or an electronic document.
US09390076B2 Multi-part and single response image protocol
This disclosure describes systems and methods for displaying images on a browser. When a user opens a page/slide in a web application, a web application client generates a unique identifier for each image on the page, combines the identifiers for each image in a URL, and forwards the URL to a web application server. The web application server then parses the request and follows the URL to render and/or fetch each requested image. The web server encodes the requested images, combines the encoded images in a response string, and returns the response string to the browser. The browser parses the response string to display the requested images and adds each encoded image to a content data model for the web application. In embodiments, the browser stores the response string in a browser cache for subsequent retrieval and display of one or more images.
US09390075B2 Method and apparatus for acquiring content information of a web page
The present disclosure provides a method and apparatus for acquiring a content information of a page, by acquiring an access link primary address and an access link secondary address of a website, and then determining a layout page corresponding to the website through the access link primary address and the access link secondary address, and extracting summary information of each post included in the layout page from a source code file of the layout page; and acquiring a link address of each post from the summary information, determining a post page of each post according to the link address, and extracting content information of each post from a source code file of the post page, the method disclosed in the present disclosure could acquire latest initiating post and replying post information published on the bulletin board system website can in real time, and acquire replying posts incrementally.
US09390068B2 Signal processing circuit and ultrasonic diagnostic apparatus
A signal processing circuit respectively transforms complex covariance matrices, which are consecutively inputted at a predetermined period, into upper triangular matrices. The signal processing circuit includes: a storage unit that stores at least N-number of complex covariance matrices; a reading unit that reads matrix elements of the stored complex covariance matrices; a CORDIC calculation circuit that implements a CORDIC algorithm by a pipelined circuit system; and a QR decomposition unit that controls the reading unit and the CORDIC calculation circuit unit to calculate an upper triangular matrix by iteratively using the CORDIC calculation circuit unit on a single complex covariance matrix and that calculates in parallel a transformation of N-number of complex covariance matrices into upper triangular matrices in an interleaved format.
US09390065B2 Iterative estimation of system parameters using noise-like perturbations
An estimating computer system may iteratively estimate an unknown parameter of a model or state of a system. An input module may receive numerical data about the system. A noise module may generate random, chaotic, or other type of numerical perturbations of the received numerical data and/or may generate pseudo-random noise. An estimation module may iteratively estimate the unknown parameter of the model or state of the system based on the received numerical data. The estimation module may use the numerical perturbations and/or the pseudo-random noise and the input numerical data during at least one of the iterative estimates of the unknown parameter. A signaling module may signal when successive parameter estimates or information derived from successive parameter estimates differ by less than a predetermined signaling threshold or when the number of estimation iterations reaches a predetermined number.
US09390060B2 Packaging methods, material dispensing methods and apparatuses, and automated measurement systems
Packaging methods, material dispensing methods and apparatuses, and automatic measurement systems are disclosed. In one embodiment, a method of packaging semiconductor devices includes coupling a second die to a top surface of a first die, dispensing a first amount of underfill material between the first die and the second die, and capturing an image of the underfill material. Based on the image captured, a second amount or no additional amount of underfill material is dispensed between the first die and the second die.
US09390055B2 Systems, methods and devices for integrating end-host and network resources in distributed memory
Systems, methods and devices for distributed memory management comprising a network component configured for network communication with one or more memory resources that store data and one or more consumer devices that use data, the network component comprising a switching device in operative communication with a mapping resource, wherein the mapping resource is configured to associate mappings between data addresses associated with memory requests from a consumer device relating to a data object and information relating to a storage location in the one or more memory resources associated with the data from the data object, wherein each data address has contained therein identification information for identifying the data from the data object associated with that data address; and the switching device is configured to route memory requests based on the mappings.
US09390054B2 Identifying a largest logical plane from a plurality of logical planes formed of compute nodes of a subcommunicator in a parallel computer
In a parallel computer, a largest logical plane from a plurality of logical planes formed of compute nodes of a subcommunicator may be identified by: identifying, by each compute node of the subcommunicator, all logical planes that include the compute node; calculating, by each compute node for each identified logical plane that includes the compute node, an area of the identified logical plane; initiating, by a root node of the subcommunicator, a gather operation; receiving, by the root node from each compute node of the subcommunicator, each node's calculated areas as contribution data to the gather operation; and identifying, by the root node in dependence upon the received calculated areas, a logical plane of the subcommunicator having the greatest area.
US09390053B2 Cache device, cache control device, and methods for detecting handover
For a user terminal connected to one of cache devices distributed in a network and receiving contents, terminal access information including terminal address information about the user terminal and identification information of the cache device is stored and managed. If a content retransmission request message of the user terminal is detected at other cache device, this is regarded as a handover of the user terminal. This allows a simple detection of handover that occurs during content transmission.
US09390048B2 Controlling characteristic impedance of a trace in a printed circuit board to compensate for external component loading
A control circuit is provided on a printed circuit board to detect the presence of a memory module installed in at least one of a plurality of memory module connectors, wherein installation of the memory module is known to cause impedance to decrease in a segment of a daisy chain memory circuit. The impedance of a first signal conductor of the daisy chain memory circuit is automatically altered to reduce a mismatch in impedance between the first signal conductor and the segment in response to detecting the presence of the memory module in the connector. A metal element is incorporated into the printed circuit board a spaced distance from the first signal conductor, and the control circuit may selectively activate one or more relays to cause the metal element to function as either a floating trace or a ground reference.
US09390047B2 Memory switching protocol when switching optically-connected memory
Data is collected by an active node from passive nodes. A source node extracts the data format, and a remote memory blade identification (ID), a remote memory blade address, and ranges of the RMMA space, and composes and sends metadata to receiving nodes and receiving racks.
US09390045B2 Bus node and control system for controlling a work machine
A bus node for an electric coupling of a bus system to a functional module arrangement, having an electronic circuit for converting electrical signals between a bus protocol provided by the bus system and an internal communications protocol provided by the functional module arrangement, and having a first coupling means for electrically connecting the electronic circuit to the functional module arrangement, and having a second coupling means for electrically connecting the electronic circuit to the bus system, wherein the first coupling means comprises a first contact means that is configured for a direct electrical contact with a ground connection of the functional module arrangement.
US09390042B2 System and method for sending arbitrary packet types across a data connector
A processing unit exchanges data with another processing unit across a data connector that supports a particular communication protocol. When the communication protocol is updated to support a new packet type, a specification of that new packet type may be stored within software registers included within the processing unit. Under circumstances that require the use of the new packet type, packet generation logic may read the packet specification of the new packet type, then generate and transmit a packet of the new type.
US09390040B2 On-chip interconnect method, system and corresponding computer program product
In a method for making an on-chip interconnect for conveying between a set of initiators and a set of targets in which traffic is organized in classes of service, priority values representing the classes of service are associated with the traffic. The method further includes propagating the priority values towards the points of the network where an arbitration is performed between two classes of service of the traffic, and providing arbitration as a function of the priority values.
US09390036B2 Processing data packets from a receive queue in a remote direct memory access device
Processing data packets from a receive queue is provided. It is determined whether packets are saved in a pre-fetched queue. In response to determining that packets are not saved in the pre-fetched queue, a number of packets within the receive queue is determined. In response to determining the number of packets within the receive queue, it is determined whether the number of packets within the receive queue is greater than a number of packets called for by an application. In response to determining that the number of packets within the receive queue is greater than the number of packets called for by the application, an excess number of packets that is above the number of packets called for by the application is saved in the pre-fetched queue. An indication is sent to the application of the excess number of packets. The predetermined number of packets is transferred to the application.
US09390031B2 Page coloring to associate memory pages with programs
Apparatuses and methods for page coloring to associate memory pages with programs are disclosed. In one embodiment, an apparatus includes a paging unit and an interface to access a memory. The paging unit includes translation logic and comparison logic. The translation logic is to translate a first address to a second address. The first address is to be provided by an instruction stored in a first page in the memory. The translation is based on an entry in a data structure, and the entry is to include a base address of a second page in the memory including the second address. The comparison logic is to compare the color of the first page to the color of the second page. The color of the first page is to indicate association of the first page with a first program including the first instruction. The data structure entry is also to include the color of the second page to indicate association of the second page with the first program or a second program.
US09390030B2 Information processing device, information storage device, information processing system, information processing method, and program
Provided is an information storage device including a storage unit configured to store encrypted content and an encryption key to be applied to decryption of the encrypted content, wherein the storage unit stores a converted encryption key generated through an arithmetic operation of the encryption key and an electronic signature that is constituent data of an encrypted content signature file set corresponding to the encrypted content, wherein the electronic signature is an electronic signature for data that includes constituent data of the encrypted content and the encryption key, and wherein a reproduction device configured to read the encrypted content from the storage unit and execute a decryption process is able to be caused to perform acquisition of the encryption key through an arithmetic operation of applying the electronic signature to the converted encryption key.
US09390029B2 Dynamic management of random access memory
The invention proposes a method for managing random access memory in a computer system, with said computer system comprising a processor, a first static random access memory, and a second dynamic random access memory, the method comprising the steps of: —receiving at least one instruction to be executed by the processor, —determining a priority level for the execution of the instruction by the processor, and —loading the instruction into the first memory for its execution by the processor if its priority level indicates that it is a high priority instruction, or if not —loading the instruction into the second memory for its execution by the processor.
US09390027B1 Reducing page invalidation broadcasts in virtual storage management
Technical solutions for reducing page invalidation broadcasts in virtual storage management are described. One general aspect includes a method including allocating, by a storage manager, a virtual memory page to a memory buffer that is used by an application being executed by a multiprocessor system, the virtual memory page being allocated from an address space of the application. The method also includes recording, by a memory management unit, a mapping between the virtual memory page and a physical location in a memory. The method also includes in response to a request, from the application, to deallocate the memory buffer, delaying invalidation of the mapping between the virtual memory page and the physical location in a memory, based on a count of free frames in the address space of the application.
US09390024B2 Bypassing a store-conditional request around a store queue
In response to receipt of a store-conditional (STCX) request of a processor core, the STCX request is buffered in an entry of a store queue for eventual service by a read-claim (RC) machine by reference to a cache array, and the STCX request is concurrently transmitted via a bypass path bypassing the store queue. In response to dispatch logic dispatching the STCX request transmitted via the bypass path to the RC machine for service by reference to the cache array, the entry of the STCX request in the store queue is updated to prohibit selection of the STCX request in the store queue for service. In response to the STCX request transmitted via the bypass path not being dispatched by the dispatch logic, the STCX is thereafter transmitted from the store queue to the dispatch logic and dispatched to the RC machine for service by reference to the cache array.
US09390023B2 Method and apparatus for conditional storing of data using a compare-and-swap based approach
According to at least one example embodiment, a method and corresponding apparatus for conditionally storing data include initiating an atomic sequence by executing, by a core processor, an instruction/operation designed to initiate an atomic sequence. Executing the instruction designed to initiate the atomic sequence includes loading content associated with a memory location into a first cache memory, and maintaining an indication of the memory location and a copy of the corresponding content loaded. A conditional storing operation is then performed, the conditional storing operation includes a compare-and-swap operation, executed by a controller associated with a second cache memory, based on the maintained copy of the content and the indication of the memory location.
US09390022B2 Apparatus and method for extended cache correction
An apparatus includes a semiconductor fuse array, a cache memory, and a plurality of cores. The semiconductor fuse array is disposed on a die, into which is programmed the configuration data. The semiconductor fuse array has a first plurality of semiconductor fuses that is configured to store compressed cache correction data. The a cache memory is disposed on the die. The plurality of cores is disposed on the die, where each of the plurality of cores is coupled to the semiconductor fuse array and the cache memory, and is configured to access the semiconductor fuse array upon power-up/reset, to decompress the compressed cache correction data, and to distribute decompressed cached correction data to initialize the cache memory.
US09390019B2 Method and apparatus for providing high-performance and highly-scalable storage acceleration
A method and apparatus of providing high performance and highly scalable storage acceleration includes a cluster node-spanning RAM disk (CRD) interposed in the data path between a storage server and a computer server. The CRD addresses performance problems with applications that need to access large amounts of data and are negatively impacted by the latency of classic disk-based storage systems. It solves this problem by placing the data the application needs into a large (with respect to the server's main memory) RAM-based cache where it can be accessed with extremely low latency, hence improving the performance of the application significantly. The CRD is implemented using a novel architecture which has very significant cost and performance advantages over existing or alternative solutions.
US09390018B2 Data cache prefetch hints
The present invention provides a method and apparatus for using prefetch hints. One embodiment of the method includes bypassing, at a first prefetcher associated with a first cache, issuing requests to prefetch data from a number of memory addresses in a sequence of memory addresses determined by the first prefetcher. The number is indicated in a request received from a second prefetcher associated with a second cache. This embodiment of the method also includes issuing, from the first prefetcher, a request to prefetch data from a memory address subsequent to the bypassed memory addresses.
US09390016B2 Accessing an off-chip cache via silicon photonic waveguides
The disclosed embodiments provide a system in which a processor chip accesses an off-chip cache via silicon photonic waveguides. The system includes a processor chip and a cache chip that are both coupled to a communications substrate. The cache chip comprises one or more cache banks that receive cache requests from a structure in the processor chip optically via a silicon photonic waveguide. More specifically, the silicon photonic waveguide is comprised of waveguides in the processor chip, the communications substrate, and the cache chip, and forms an optical channel that routes an optical signal directly from the structure to a cache bank in the cache chip via the communications substrate. Transmitting optical signals from the processor chip directly to cache banks on the cache chip facilitates reducing the wire latency of cache accesses and allowing each cache bank on the cache chip to be accessed with uniform latency.
US09390014B2 Synchronizing updates of page table status indicators and performing bulk operations
A synchronization capability to synchronize updates to page tables by forcing updates in cached entries to be made visible in memory (i.e., in in-memory page table entries). A synchronization instruction is used that ensures after the instruction has completed that updates to the cached entries that occurred prior to the synchronization instruction are made visible in memory. Synchronization may be used to facilitate memory management operations, such as bulk operations used to change a large section of memory to read-only, operations to manage a free list of memory pages, and/or operations associated with terminating processes.
US09390013B2 Coherent attached processor proxy supporting coherence state update in presence of dispatched master
A coherent attached processor proxy (CAPP) of a primary coherent system receives a memory access request specifying a target address in the primary coherent system from an attached processor (AP) external to the primary coherent system. The CAPP includes a CAPP directory of contents of a cache memory in the AP that holds copies of memory blocks belonging to a coherent address space of the primary coherent system. In response to the memory access request, the CAPP performs a first determination of a coherence state for the target address and allocates a master machine to service the memory access request in accordance with the first determination. Thereafter, during allocation of the master machine, the CAPP updates the coherence state and performs a second determination of the coherence state. The master machine services the memory access request in accordance with the second determination.
US09390008B2 Data encoding for non-volatile memory
A data storage device includes a memory device and a controller. Mapping circuitry is configured, in response to receiving data, to apply a one-to-many mapping to each group of multiple groups of bits in the received data to generate mapped data that includes multiple groups of mapped bits. Storage elements of the memory device are partitioned into multiple skip groups and the mapped bits of each group of mapped bits are interleaved across the skip groups such that different bits of a group of mapped bits are written into different skip groups.
US09390007B2 Method and apparatus for performing adaptive memory bank addressing
A display system comprises a mapping memory comprising a plurality of memory banks configured to store a plurality of image tiles corresponding to an image, and an image mapping component configured to assign each of the plurality of tiles to one of the plurality of memory banks according to a first mapping or a second mapping, wherein the image mapping component determines whether to use the first or second mapping based on a bank interleaving metric of the first and second mappings.
US09390002B1 Efficient bin labeling schemes for tracking cells in solid state storage devices
Information associated with a read to solid state storage is received, including a read number and a read value. The read value is written to a location in a cell and bin map, wherein (1) the location in the cell and bin map corresponds to the read number and (2) the cell and bin map tracks, for each cell in a group of cells, which bin out of a plurality of bins a given cell falls into.
US09390001B2 Nonvolatle memory device and memory system having the same, and related memory management, erase and programming methods
An erase method of a nonvolatile memory device includes setting an erase mode, and performing one of a normal erase operation and a quick erase operation according to the set erase mode. The normal erase operation is performed to set a threshold voltage of a memory cell to an erase state which is lower than a first erase verification level. The quick erase operation is performed to set a threshold voltage of a memory cell to a pseudo erase state which is lower than a second erase verification level. The second erase verification level is higher than the first erase verification level.
US09390000B2 Memory system in which data is written to memory chips based on a distance from a memory controller
A memory device includes a substrate, a plurality of nonvolatile memory chips disposed on the substrate, and a memory controller disposed on the substrate. The memory chips may be disposed on the same side or the opposite side of the substrate as the memory controller. The memory controller controls each of the nonvolatile memory chips based on a firmware, where the firmware is written in a nonvolatile memory chip positioned at a location farthest from the memory controller. A write system may perform writing using a binary or single level cell (SLC) recording system in memory chips located closest to the memory controller and a multi-value or multi-level cell (MLC) recording system in memory chips located farthest from the memory controller. A weighting factor may be assigned for each of the nonvolatile memory chips based on the distance from the memory controller.
US09389999B2 System and method for emulating an EEPROM in a non-volatile memory device
The invention relates to an electronic memory system, and more specifically, to a system for emulating an electrically erasable programmable read only memory in a non-volatile memory device, and a method of emulating an electrically erasable programmable read only memory in a non-volatile memory device. According to an embodiment, a system for emulating an electrically erasable programmable read only memory is provided, the system including a Flash memory, wherein the Flash memory is configurable into a first region and a second region, wherein the first region is adapted to store a first class of data and the second region is adapted to store a second, different class of data.
US09389996B2 Field apparatus
A field apparatus includes a first memory that stores a program specifying an operation of the field apparatus; a second memory that stores parameters to be used in the field apparatus; a log generation unit configured to generate an operating log in which first information representing a type of an event generated within the field apparatus, second information representing a time at which the event was generated, and third information related to the event are associated; and a control unit that includes the log generation unit, the control unit storing the operating log in a log storage region secured in a free space in one of the first memory and the second memory.
US09389990B2 Self verifying device driver for multi-version compatible data manipulation devices
A method, system, and computer program product are described. The system includes a first memory device to store programming code of the device driver, the device driver providing an interface to a data manipulation device, and a second memory device to store a test case to test the device driver, the device driver receiving version information specifying a targeted version or the device driver determining the version independently of the test case. The system also includes a third memory device to store a simulation including a version verification portion and a data manipulation portion, and a processor to execute the test case on the device driver, execution of the test case including, based on a request by the device driver, execution of the version verification portion of the simulation and, based on a result of executing the version verification portion, execution of the data manipulation portion of the simulation.
US09389976B2 Distributed persistent memory using asynchronous streaming of log records
Technologies for distributed durable data replication include a computing device having persistent memory that stores a memory state and an update log. The computing device isolates a host partition from a closure partition. The computing device may sequester one or more processor cores for use by the closure partition. The host partition writes transaction records to the update log prior to writing state changes to persistent memory. A replication service asynchronously transmits log records to a remote computing device, which establishes a replica update log in persistent memory. If the host partition fails, the closure partition transmits remaining log records from the update log to the remote computing device. The update log may be quickly replayed when recovering the computing device from failure. The remote computing device may also replay the replica update log to update a remote copy of the state data. Other embodiments are described and claimed.
US09389975B2 Method and apparatus to utilize large capacity disk drives
A method of utilizing storage in a storage system comprises prioritizing a plurality of storage areas in the storage system for data recovery with different priorities; and performing data recovery of the storage system at an occurrence of a failure involving one or more of the storage areas in the storage system based on the priorities. Data recovery for one storage area having a higher priority is to occur before data recovery for another storage area having a lower priority in the storage system. In various embodiments, the prioritization is achieved by monitoring the access characteristics, or the priority is specified by the host or management computer based on the usage and/or importance of data stored in the storage system, or the priority is determined by the storage system based on the area assignment/release (i.e., usage) of thin provisioned volumes.
US09389970B2 Selected virtual machine replication and virtual machine restart techniques
Methods, systems, and articles of manufacture for selected VM replication and VM restart techniques are provided herein. A method includes selecting a sub-set of one or more VMs from a set of multiple VMs in a system to be replicated before an identification of one or more failed VMs in the set of multiple VMs; replicating the sub-set of one or more VMs before the identification of one or more failed VMs in the set of multiple VMs; selecting a sub-set of the identified one or more failed VMs to be restarted upon an identification of the one or more failed VMs in the set of multiple VMs in the system; and restarting the sub-set of the identified one or more failed VMs upon the identification of the one or more failed virtual machines in the set of multiple VMs.
US09389969B2 Method for SIP proxy failover
For SIP proxy failover in a SIP telecommunication network (SIPN) comprising a plurality of proxies (P1, P2) and a domain name server (DNSR), the method comprises the following steps: storing, in the domain name server (DNSR), the addresses of the proxies that are working; if a first proxy (P1) shuts down, then informing (42) the domain name server (DNSR) that this first proxy has shutdown; then, if a user agent (SIPUA1) sends a domain name system request (43) to the domain name server (DNSR), sending (44), from the domain name server (DNSR) to this user agent, a response only containing the respective addresses of proxies (P2) that are working; and then, said user agent registering itself in a proxy (P2) the address of which is contained in the response from the domain name server (DNSR).
US09389967B2 Method and apparatus for improving access to an ATM during a disaster
A method and apparatus that allow a user to easily operate a self-service device despite the presence of damage is provided. Anticipated damage includes extreme environmental conditions such as earthquakes, flooding, strong winds, tsunamis, etc. These conditions may cause a failure in a portion of the self-service device. Improved ruggedness and redundant components are coordinated by suitable software to provide service despite damage to the self-service device. Additionally, access to some user accounts despite the loss of connectivity to a server maintaining user accounts is provided.
US09389965B1 System and method for improving performance of backup storage system with future access prediction
A request is received to read a portion of a file from the storage system. In response to the request, future requests to the file are predicted based in part on the received request and metadata of the file. Access of a subsequent portion of the file is optimized based on the predicted future requests and the data contained in the portion of the file is then returned.
US09389959B1 Method and system for providing coordinated checkpointing to a group of independent computer applications
A system and method thereof for performing loss-less migration of an application group. In an exemplary embodiment, the system may include a high-availability services module structured for execution in conjunction with an operating system, and one or more computer nodes of a distributed system upon which at least one independent application can be executed upon. The high-availability services module may be structured to be executable on the one or more computer nodes for loss-less migration of the one or more independent applications, and is operable to perform checkpointing of all state in a transport connection.
US09389952B2 Green NAND SSD application and driver
A GNSD (Green NAND Solid State Drive) Driver coupled to host DRAM, and having a memory manager, a data grouper engine, a data ungrouper engine, a power manager, and a flush/resume manager. The GNSD driver is coupled to a GNSD application, and the host DRAM to a Non-Volatile Memory Device. The GNSD Driver further includes a compression/decompression engine, a de-duplication engine, an encryption/decryption engine, or a high-level error correction code engine. The encryption/decryption engine encrypts according to DES (Data Encryption Standard) or AES (Advanced Encryption Standard). A method of operating a GNSD Driver and a GNSD application coupled to DRAM of a host, includes coupling: Configuration and Register O/S Settings to the host and the GNSD Application; a data grouper and data ungrouper to the host DRAM and to Upper and a Lower Filter; a power manager and a memory manager to the host; a flush/resume manager to the DRAM; and the DRAM to an (Super Enhanced Endurance Device) SEED SSD (Solid State Drive).
US09389947B2 Portable executable file analysis
A portable executable file is analyzed by parsing a binary image of the portable executable file to generate a parsed field. An attribute of the parsed field is determined. The attribute of the parsed field is compared to a valid characteristic of a valid corresponding field based upon, at least in part, a portable executable file format specification. It is determined if the attribute of the parsed field matches the valid characteristic of the valid corresponding field.
US09389941B2 Methods for diagnosing hardware component failure and devices thereof
A method, non-transitory computer readable medium, and storage server device that determines with a service processor when a system processor has experienced an error, the system processor coupled to a data storage device via a system port of the data storage device. Diagnostic information is retrieved with the service processor from the data storage device via a service port of the data storage device, when the system processor is determined to have experienced an error. The diagnostic information includes error or exception information associated with one or more hardware components. The retrieved diagnostic information is output by the service processor.
US09389938B2 Apparatus and method for determining an operating condition of a memory cell based on cycle information
A method populates a parameter set for dynamically adjusting an operating condition in a memory block of a non-volatile memory circuit. A desired condition limit is identified, and a first parameter is computed as a function of a first memory operation to be performed on the memory block. The first parameter is included in a parameter set, and the memory block is cycled until the operating condition reaches the desired condition limit. After cycling, a second parameter is determined as a function of a second memory operation to be performed on the memory block, and the second parameter is included in the parameter set. The steps of cycling, and determining and the including the second parameter may be repeated until a desired number of cycles/parameters are reached. A retention bake may also be performed on the memory circuit, and a bit error rate resulting from a read operation verified.
US09389936B2 Monitoring the responsiveness of a user interface
A diagnostic mechanism monitors execution of a user interface (UI) thread to detect execution of a long running task that may have caused the UI thread to become unresponsive. The execution time of the UI thread is monitored and when it exceeds a threshold, the UI thread's call stack is preserved to a mini-dump file. The completion time of the UI thread is also tracked and stored in a delay file. The mini-dump and delay files are then uploaded to a server where the collected data is aggregated overall execution runs by multiple users to identify the cause of the unresponsiveness.
US09389935B2 Analytics data collection with low integration cost for dynamic message passing systems
A method, an apparatus, and a computer program product which capture and use analytics data relating to the internal activity of software programs executing in a message-passing runtime environment, such as that provided by Objective-C. The invention exploits the well documented interfaces of these environments together with their dynamic runtime capabilities to insert data collection and analysis code into an application without modification of the target application.
US09389932B2 Systems and methods for remote storage management
A system comprises a first storage resource, a second storage resource, a hosted application, a proxy engine, and a proxy interface. The first storage resource stores first data and uses a first program interface for communicating the first data. The second storage resource stores second data and uses a second program interface for communicating the second data. The hosted application uses application data, the first data and/or the second data including the application data. The proxy engine directs application data requests by the hosted application to the first storage resource or to the second storage resource. The proxy interface uses the first program interface to communicate with the first storage device and the second program interface to communicate with the second storage device to respond to the application data requests.
US09389929B1 Granular event management for service platforms
Software that performs the following steps: (i) receiving first bundle information relating to the content of a bundle at a first time, wherein the bundle relates to one or more resources in an application of a distributed computing environment; (ii) monitoring the bundle for a bundle event, wherein the bundle event is generated from a change in a lifecycle state of the bundle; (iii) determining that the bundle event has occurred; (iv) responsive to determining that the bundle event has occurred, receiving second bundle information relating to the content of the bundle at a second time; and (v) responsive to receiving the second bundle information, identifying a granular event associated with the bundle event, wherein the granular event relates to a difference between the first bundle information and the second bundle information.
US09389925B2 Achieving low grace period latencies despite energy efficiency
A technique for achieving low grace-period latencies in an energy efficient environment in which processors with Read-Copy Update (RCU) callbacks are allowed to enter low power states. In an example embodiment, for each processor that has RCU callbacks, different grace period numbers are assigned to different groups of the processor's RCU callbacks. New grace periods are periodically started and old grace periods are periodically ended. As old grace periods end, groups of RCU callbacks having corresponding assigned grace period numbers are invoked.
US09389923B2 Information processing device and method for controlling information processing device
The present invention includes a plurality of computing units executing a plurality of threads including a communication control thread to which a receiving process by polling is assigned. In a CPU core, a computing unit executing the communication control thread performs polling in a memory region indicating notification of arrival of data and waits for execution of the receiving process until arrival of data, and when a computing unit executing an application thread executes a process assigned to the application thread, the computing unit executing the communication control thread moves to a resource-saving mode in which the use of physical resources is suppressed.
US09389922B2 Declarative service domain federation
A mechanism for declarative service domain federation uses a declarative approach to both the visibility aspect and the management aspect of service domain federation. Instead of manually exporting services, that is, selecting individual services from source domains to be visible in the target domain, using the present system, a federation architect uses a federation console to specify federation intent. The federation intent may include federation rule, query-based service group, and quality-of-service (QoS) policy. Based on the declared federation intent, a planning engine resolves the individual services based on the group query, generates the service visibility configuration, and creates the necessary service proxies and/or mediation objects to satisfy the goal. At runtime, a service monitor collects the performance metrics of federated services and dynamically adjusts the mediation/proxy configurations to maintain the QoS objectives specified by the federation architect.
US09389918B2 Job plan selection for reducing instability of a job within a heterogeneous stream processing application
Embodiments of the invention provide a method for reducing instability in a heterogeneous job plan of a stream processing application. In one embodiment, a job manager may be configured to select a job plan with the objective of minimizing the potential instability of the job plan. Each job plan may provide a directed graph connecting processing elements (both native and non-native). That is, each job plan illustrates data flow through the stream application framework. The job plan may be selected from multiple available job plans, or may be generated by replacing processing elements of a given job plan. Further, the job plan may be selected on the basis of other objectives in addition to an objective of minimizing the potential instability of the job plan, such as minimizing cost, minimizing execution time, minimizing resource usage, etc.
US09389913B2 Resource assignment for jobs in a system having a processing pipeline that satisfies a data freshness query constraint
A set of jobs to be scheduled is identified (402) in a system including a processing pipeline having plural processing stages that apply corresponding different processing to a data update to allow the data update to be stored. The set of jobs is based on one or both of the data update and a query that is to access data in the system. The set of jobs is scheduled (404) by assigning resources to perform the set of jobs, where assigning the resources is subject to at least one constraint selected from at least one constraint associated with the data update and at least one constraint associated with the query.
US09389911B2 Dynamic reduction of stream backpressure
Techniques are described for eliminating backpressure in a distributed system by changing the rate data flows through a processing element. Backpressure occurs when data throughput in a processing element begins to decrease, for example, if new processing elements are added to the operating chart or if the distributed system is required to process more data. Indicators of backpressure (current or future) may be monitored. Once current backpressure or potential backpressure is identified, the operator graph or data rates may be altered to alleviate the backpressure. For example, a processing element may reduce the data rates it sends to processing elements that are downstream in the operator graph, or processing elements and/or data paths may be eliminated. In one embodiment, processing elements and associate data paths may be prioritized so that more important execution paths are maintained.
US09389908B1 Transactional memory that performs a TCAM 32-bit lookup operation
A transactional memory (TM) receives a lookup command across a bus from a processor. The command includes a memory address. In response to the command, the TM pulls an input value (IV). The memory address is used to read a word containing multiple result values (RVs), multiple reference values, and multiple mask values from memory. A selecting circuit within the TM uses a starting bit position and a mask size to select a portion of the IV. The portion of the IV is a lookup key value (LKV). The LKV is masked by each mask value thereby generating multiple masked values. Each masked value is compared to a reference value thereby generating multiple comparison values. A lookup table generates a selector value based upon the comparison values. A result value is selected based on the selector value. The selected result value is then communicated to the processor via the bus.
US09389907B2 System and method for providing a distributed transaction lock in a transactional middleware machine environment
A system and method can support a distributed transaction lock in a transactional middleware machine environment. The system can use a global transaction identifier to locate a hash bucket in a transaction hash table, wherein the transaction hash table contains a plurality of hash buckets. Then, the system can lock said hash bucket in the transaction hash table, and allow only one process to access one or more global transaction entry structures in the transaction table before said hash bucket is unlocked, wherein said one or more global transaction entry structures are associated with the locked hash bucket in the transaction hash table.
US09389906B2 Latency agnostic transaction buffer for request-grant protocols
According to one embodiment, an apparatus includes a transaction data storage to store transaction data to be transmitted over an interconnect of a data processing system, a transaction buffer coupled to the transaction data storage to buffer at least a portion of the transaction data, and a transaction logic coupled to the transaction data storage and the transaction buffer to transmit a request (REQ) signal to an arbiter associated with the interconnect in response to first transaction data that becomes available in the transaction data storage, in response to a grant (GNT) signal received from the arbiter, retrieve second transaction data from the transaction buffer and transmit the second transaction data onto the interconnect, and refill the transaction buffer with third transaction data retrieved from the transaction data storage after the second transaction data has been transmitted onto the interconnect.
US09389902B2 Setting retransmission time of an application client during virtual machine migration
A method of setting retransmission time of an application client during virtual machine migration includes predicting migration memory size required by a virtual machine to be migrated based on historical access log of at least one application and memory log of the virtual machine to be migrated; computing available migration bandwidth of a host of the virtual machine to be migrated; computing virtual machine migration time based on the predicted migration memory size required by the virtual machine to be migrated and the available migration bandwidth of the host; and setting retransmission time of the application client based on the virtual machine migration time.
US09389899B2 Fair unidirectional multi-queue virtual machine migration
Methods, systems, and computer program products for providing fair unidirectional multi-queue virtual machine migration are disclosed. A computer-implemented method may include maintaining a current scan identifier for each of a plurality of streams used to migrate a virtual machine from a first hypervisor to a second hypervisor, determining when a current scan identifier of a first stream and a current scan identifier of a second stream are associated with different memory states of the virtual machine, and adjusting processing of memory updates when the current scan identifiers are associated with different memory states of the virtual machine. The adjusting may be performed, for example, by pausing processing on each stream having a current scan identifier subsequent to the earliest current scan identifier determined for the streams, and processing memory updates on each stream having a current scan identifier matching the earliest current scan identifier.
US09389898B2 System and method for enforcement of security controls on virtual machines throughout life cycle state changes
Systems and methods associated with virtual machine security are described herein. One example method includes instantiating a guest virtual machine in a virtual computing environment. The method also includes installing a life cycle agent on the guest virtual machine, assigning an identifying certificate, a set of policies, and an encryption key to the guest virtual machine, and providing the certificate, policies, and encryption key to the guest virtual machine. The certificate, policies, and encryption key may then be used by the guest virtual machine to authenticate itself within the virtual computing environment and to protect data stored on the guest virtual machine.
US09389896B1 Sharing webcam between guest and host OS
A system, method and computer program product for implementing a video camera that is accessible by different Virtual Machine GOSs and the Host system. A standard USB video camera is build into a Host system. A VM running a Guest OS is launched on the Host system. The Guest OS has virtual driver for the Host video camera. The virtual driver is connected to a virtual USB bus, which communicates with a special Host library over a Virtual Machine Monitor (VMM). A special Host side VM application acquires and processes video data from a standard Host system video processing API that communicates directly with a Host-side virtual camera driver. Video frames are provided via the Host-side VM application to the virtual USB bus and to the virtual driver. Host applications or other VMs can acquire video streams from the Host USB camera simultaneously.
US09389894B1 Flexible processor association for virtual machines
The present disclosure relates to flexible processor association for virtual machine instances. One example method includes initializing a virtual machine instance on a particular computing device, the particular computing device including a plurality of physical processors, determining a maximum number of the physical processors available to be associated with the virtual machine instance; initializing a number of virtual processors for use by the virtual machine instance, the same as the maximum number of the physical processors; associating the virtual machine instance with a number of the physical processors less than the maximum number of the physical processors; during execution of the virtual machine instance: identifying a change in a demand metric associated with the virtual machine instance; and adjusting the number of the physical processors associated with the virtual machine instance based on the identified change in the demand metric while maintaining the number of virtual processors.
US09389891B2 Custom browser-side spreadsheet functions
Architecture that enables the capability to call user-defined functions (UDFs) within the hosting page, and from within a spreadsheet. UDFs can be used to add functionality to spreadsheet models. Spreadsheet calculations are spread across a backend calculation server and the web browser. Spreadsheet calculation state is maintained as browser functions are calculated. Moreover, the browser UDFs can be executed synchronously or asynchronously. The architecture also provides capability to dynamically register/unregister UDFs at runtime, which can then be called from the spreadsheet model and executed remotely), and the capability to define a manifest that can include all of the UDF definitions, infinite calculation loop situations are also prevented. The UDFs have full access to the page DOM (document object model).
US09389886B1 Constraint verification for distributed applications
Systems and methods are described for analyzing and verifying distributed applications. In one embodiment, an application program is executed as independently executable components. During execution, redundant portions of application program data are aggregated. A property of the application program is verified using the aggregated application program data to represent code execution paths.
US09389885B2 Method and virtualization software for providing independent time sources for virtual runtime environments
A method and virtualization software for providing at least two mutually independent time sources for at least one real-time operating system of a data processing device including virtual runtime environments, where a general-purpose operating system runs in one virtual runtime environment, and the virtual runtime environments are managed by virtualization software (hypervisor). A first time source is exclusively assigned to each real-time operating system, where the data processing device includes a second time source independent of the first time source, the second time source is configured to periodically generate an interrupt, the first processor core enters a routine of the virtualization software (hypervisor) with each interrupt triggered by the second time source, the content of at least one memory cell readable by the real-time operating system is updated and used as a time source, which is independent of the first time source, to control the first time source.
US09389884B2 Method and apparatus for providing adaptive wallpaper display for a device having multiple operating system environments
A disclosed method detects user input to set wallpaper of a first operating system environment using an image data file, and sends the image data file from the first operating system environment to a second operating system environment along with a request to update wallpaper of the second operating system environment. The two operating system environments are independent and utilize a common kernel. The method sets the wallpaper of the second operating system environment using the image data file. The method may also establish a bi-directional client-server communication channel between the operating system environments, and send the request to update wallpaper of the second operating system environment via the bi-directional client-server communication channel. An apparatus that performs the method includes a programmable processor, and memory containing executable instructions. The processor runs multiple operating system environments utilizing a common kernel.
US09389882B2 Application documentation effectiveness monitoring and feedback
Responsive to a detected user access by a user to help content of an application, at least one subsequent detected user interaction with the application is recorded that documents the user's actual use of the application in response to instructions within the accessed help content. The help content includes tracking metrics that include at least one configured expected user interaction with the application to perform the instructions within the accessed help content. The effectiveness of the instructions within the accessed help content at improving the user's proficiency in using the application is determined by comparison of the recorded at least one subsequent detected user interaction with the application after the help content was accessed with the at least one configured expected user interaction with the application to perform the instructions within the accessed help content.
US09389880B2 Method, server, mobile terminal and system for program execution
A program execution method, a server, a mobile terminal, and a system. The method includes: receiving a user action UA record sent by a mobile terminal; searching the UA record for a UA sequence that repeatedly appears; determining an association relationship between UAs in the UA sequence that repeatedly appears; creating a corresponding use mode according to the association relationship; and sending the use mode to the mobile terminal, so that the mobile terminal uses a use mode corresponding to a monitored UA, wherein the user action refers to an operation performed on an application program on the mobile terminal. In addition, a corresponding server, a mobile terminal, and a program execution system are provided. The present invention meets a personalized requirement of a user, and moreover reduces complexity of a user operation, saves the user's time and energy, and improves user experience.
US09389876B2 Three-dimensional processing system having independent calibration and statistical collection layer
Three-dimensional processing systems are provided which have multiple layers of conjoined chips, wherein at least one chip layer has calibration control circuitry that is dedicated to calibrating/configuring one or more functional chip layers, and/or performance instrumentation control circuitry for testing and collecting performance data of one or more functional chip layers.
US09389875B2 Selectable graphics controllers to display output
A computing system includes a plurality of graphics controllers, a reserved memory region, a shadow memory region, and a system Basic Input Output System (BIOS). The reserved memory region is to store a plurality of video Basic Input Output System (BIOS) images. The shadow memory region is to store a selected video BIOS image corresponding to a selected graphics controller, such that the selected graphics controller is to display output in response to a service request for video BIOS services, without use of a graphics driver. The system BIOS is to enable changing the selected graphics controller, based on copying a video BIOS image from the reserved memory region to the shadow memory region.
US09389874B2 Apparatus and methods for automatically reflecting changes to a computing solution in an image for the computing solution
A pluggable cloud enablement boot device (PCEBD) is a bootable device that includes all information needed to automatically provision hardware and software to create a computing solution that meets customer requirements. This allows for quickly deploying a computing solution in a manner that eliminates many manual steps that are typically performed today. The PCEBD uses firmware to verify a given platform has sufficient resources to deploy the PCEBD. The computing solution, once provisioned and running, can be modified, and these modifications may be reflected in the definition of the PCEBD. In addition, a computing solution may include multiple resources provisioned from multiple PCEBDs, which can be packaged into a PCEBD that will include other PCEBDs. The result is a way to deploy computing solutions that is much more efficient than the manual methods used in the prior art.
US09389870B1 Age based fast instruction issue
In an approach for selecting and issuing an oldest ready instruction in an issue queue, one or more processors receive one or more instructions in an issue queue. Ready to execute instructions are identified. An age of the instructions are represented in a first age array. One or more subsets of the instructions are generated for subset age arrays that each hold an age of the instructions in a subset. A 1-hot signal is generated that identifies an oldest ready instruction in the first age array and a 1-hot signal is simultaneously generated that identifies an oldest ready instruction in each subset age array. A candidate instruction is selected with each subset signal that is represented in the subset age array of the subset signal, wherein a candidate instruction is an oldest ready instruction in the subset age array. A candidate instruction is selected with the major signal and issued.
US09389869B2 Multithreaded processor with plurality of scoreboards each issuing to plurality of pipelines
A multi-threaded microprocessor for processing instructions in single threaded mode and multithreaded modes. The microprocessor includes instruction dependency scoreboards, instruction input coupling circuits for selectively feeding the first and second instruction dependency scoreboards; output coupling logic having first and second instruction issue outputs; first and second execute pipelines respectively coupled to the instruction issue outputs, the first execute pipeline for executing a first program thread and the second execute pipeline for executing a second program thread, independent of the first program thread; and a control logic circuit for causing dual issue of instructions from the first program thread, by the first dependency scoreboard, to both the first execute pipeline and said second execute pipeline.
US09389866B2 Computer program instruction analysis
Disclosed is a method of analysis of a computer program instruction for use in a central processing unit having a decoding unit. The method comprises receiving an address of an instruction to be analysed, fetching said instruction stored at said address, decoding by a decoding unit associated with the central processing unit, the fetched instruction; and returning the results of said decoding of said fetched instruction. The decoded results are returned as a data block stored in memory associated with the central processing unit or in one or more registers of the central processing unit. The decoded results include the type of the instruction and/or the instruction length. The method optionally further comprises analysing the decoded results to determine whether the instruction may be replaced with one of a trap or a break point. Also disclosed is a system and computer program for analysis of a computer program instruction for use in a central processing unit having a decoding unit.
US09389862B2 Thread context restoration in a multithreading computer system
Embodiments relate to thread context restoration. One aspect is a multithreading computer system including a configuration with a core configurable between a single thread (ST) mode and a multithreading (MT) mode. The ST mode addresses a primary thread and the MT mode addresses the primary thread and one or more secondary threads on shared resources of the core. A multithreading facility is configured to control utilization of the configuration to perform a method including disabling one or more secondary threads based on switching from MT mode to ST mode. A thread context of secondary threads is made unavailable to programs. Based on a last-set program-specified maximum thread-id indicating MT, the thread context is obtained by a) executing a set MT instruction to resume the MT mode, and b) based on being in the resumed MT mode, accessing the thread context.
US09389861B2 Systems, apparatuses, and methods for mapping a source operand to a different range
Embodiments of systems, apparatuses, and methods for performing a range mapping instruction in a computer processor are described. In some embodiments, the execution of a range mapping instruction maps a data element having a source data range to a destination data element having a destination data range and storage of the of the destination data element.
US09389860B2 Prediction optimizations for Macroscalar vector partitioning loops
A method of predicting a backward conditional branch instruction used in a vector partitioning loop includes detecting the first conditional branch instruction that occurs after consumption of a dependency index vector by a predicate generating instruction. The dependency index vector includes information indicative of a number of iterations of the vector partitioning loop, and the conditional branch instruction may branch backwards when taken. The conditional branch instruction may then be predicted to be taken a number of times that is determined by the dependency index vector.
US09389859B2 Device and method for implementing address buffer management of processor
The disclosure provides a device for implementing address buffer management of a processor, including: an assembler configured to perform operations to obtain intermediate values when the assembler encodes a set instruction for an address automatic-increment value and boundary values, and to encapsulate the intermediate values into the set instruction for the address automatic-increment value and boundary values; and a processor configured to determine, according to the intermediate values, whether to perform the address automatic-increment operation or the address automatic-decrement operation, so as to achieve the address buffer management. The disclosure also provides a method for implementing address buffer management of a processor, including: a processor decodes a set instruction for an address automatic-increment value and boundary values to obtain intermediate values, and determines, according to the intermediate values, whether to perform the address automatic-increment operation or the address automatic-decrement operation when the processor performs a load or store instruction, so as to realize the address buffer management. Through the device and the method of the disclosure, the hardware costs of the processor are reduced and design requirements of the processor's time sequence and energy efficiency are met.
US09389856B2 Copying character data having a termination character from one memory location to another
Copying characters of a set of terminated character data from one memory location to another memory location using parallel processing and without causing unwarranted exceptions. The character data to be copied is loaded within one or more vector registers. In particular, in one embodiment, an instruction (e.g., a Vector Load to block Boundary instruction) is used that loads data in parallel in a vector register to a specified boundary, and provides a way to determine the number of characters loaded. To determine the number of characters loaded (a count), another instruction (e.g., a Load Count to Block Boundary instruction) is used. Further, an instruction (e.g., a Vector Find Element Not Equal instruction) is used to find the index of the first delimiter character, i.e., the first termination character, such as a zero or null character within the character data. This instruction checks a plurality of bytes of data in parallel.
US09389854B2 Add-compare-select instruction
An apparatus includes memory storing an instruction that identifies a first register, a second register, and a third register. Upon execution of the instruction by a processor, a vector addition operation is performed by the processor to add first values from the first register to second values from the second register. A vector subtraction operation is also performed upon execution of the instruction to subtract the second value from third values from the third register. A vector compare operation is also performed upon execution of the instruction to compare results of the vector addition operation to results of the vector subtraction operation.
US09389841B2 Methods and systems for using state vector data in a state machine engine
A state machine engine includes a state vector system. The state vector system includes an input buffer configured to receive state vector data from a restore buffer and to provide state vector data to a state machine lattice. The state vector system also includes an output buffer configured to receive state vector data from the state machine lattice and to provide state vector data to a save buffer.
US09389840B2 Compiled and executable method
A method and software system allowing the ability to use an existing Excel model and extract the business intelligence, relationships, computations and model into pure mathematical relationships and codes such that the business intelligence in the original model is completely protected and the model can be run at extremely high speed and advanced simulations of hundreds of thousands to millions of trials can be run.
US09389835B2 Finite field inverter
A finite field inverter is disclosed, wherein the finite field inverter includes an input port, an output port and a search tree inverse circuit configured to perform an inverse operation of the operand a(x) in the finite field GF(2n) based on a search tree structure. The search tree inverse circuit is provided with a left search tree and a right search tree. The left search tree and the right search tree each includes tree nodes for processing inverse operations over the finite field GF(2n) and connecting wires connected between the tree nodes. The tree nodes include a root node, internal nodes and leaf nodes. Each path from the root node to a leaf node represents an element in the finite field GF(2n). The connecting wires between the tree nodes connect the path representing the operand a(x) with the path representing the inversion result b(x) . The present invention uses a search tree inverse circuit to achieve an inverse operation of an element in a finite field, and compared with the existing finite field inverter, the present invention is more efficient in processing inverse operations over the finite field GF(2n).
US09389826B2 Zero client device with integrated network authentication capability
System and method for zero client communications. A zero client device includes a housing, and in the housing, a transcoding processing unit (transcoder) and a communications processing unit coupled to the transcoder. The transcoder is configured to receive input data from human interface device(s), encode the input data, and provide the encoded input data to the communications processing unit for transmission over a network to a server. The communications processing unit is configured to receive the encoded input data from the transcoder, transmit the encoded input data over the network to the server, receive output data from the server, and send the output data to the transcoder. The transcoder is further configured to receive the output data from the communications processing unit, decode the output data, and send the decoded output data to at least one of the human interface devices.
US09389824B2 Printing system, control method therefor, and photo-direct printing apparatus
In a printing system in which a digital camera (DSC) and PD printer apparatus are directly connected via a USB, and image data is transmitted from the DSC to the PD printer apparatus and printed, Capability of the PD printer apparatus is transmitted from the PD printer apparatus to the DSC after communication procedures are established by an application (NCDP) installed in the PD printer apparatus and DSC. The PD printer apparatus is caused to execute print operation in accordance with print conditions set by the DSC on the basis of the transmitted Capability.
US09389822B2 Mobile information apparatus that include support for receiving video digital content over the internet from a service, and for wireless displaying or playing over air at least part of the received video digital content from the mobile information apparatus to televisions, television controllers, display devices, or projection devices
Mobile information apparatus, such as smart phones or information Pads, that are configured for accessing video digital content services or stores over the Internet are herein disclosed and enabled. The mobile information apparatus include a touch sensitive screen and a wireless communication unit supporting, at least part of IEEE 802.11 standard of wireless protocols. A client application or browsing application may be included in the mobile information apparatus or is installable by a user for accessing video digital content from a subscribed video digital content service or store. Subsequent to receiving the video digital content by the mobile information apparatus from the subscribed video service or store, the mobile information apparatus is further configured for wireless display or for wireless play over air of at least part of the received video content onto one or more wireless televisions, television controllers, display devices, monitors, or projection devices.
US09389821B2 Printing and printing control includes determining whether to set sheet attribute information of sheets in sheet holding units
A printing system includes a printing apparatus and a printing control apparatus. The printing apparatus obtains first attribute information about a sheet stored in a sheet holding unit of the printing apparatus and sends the first attribute information to the printing control apparatus. The printing control apparatus stores a combination of the first attribute information and second attribute information about a sheet, obtains the second attribute information based on received first attribute information, and sends the second attribute information to the printing apparatus. The printing apparatus and sets received second attribute information as attribute information about the sheet stored in the sheet holding unit. Where setting of the second attribute information is designated, the printing apparatus causes the setting unit to set the second attribute information. Where setting of the second attribute information is not designated, the printing apparatus restricts the setting unit from setting the second attribute information.
US09389819B2 System including operation device and information storing apparatus, method performed by the system, and the information storing apparatus
A system includes an operation device and an information storing apparatus, which are connected via a network. The operation device determines, based on information input from the outside of the operation device in response to an operation performed on the operation device, an electronic device among a plurality of electronic devices connected to the system, for causing the electronic device to input electronic data to the information storing apparatus, and sends, to the information storing apparatus, a first request to cause the determined electronic device to input the electronic data to the information storing apparatus. The information storing apparatus sends, to the determined electronic device, a second request based on the first request sent from the operation device, and stores the electronic data that has been sent from the determined electronic device based on the sent second request.
US09389815B2 Control device
A control device that includes a connection device that connects via USB to a communication terminal that is able to perform communication based on a specific communication system, an acquisition portion that acquires configuration information, via USB, from the communication terminal connected to the connection device, the configuration information being information that is necessary for the communication terminal to perform communication based on the specific communication system and being set for the communication terminal, a reception portion that receives an instruction transmitted from the communication terminal, by performing communication with the communication terminal based on the specific communication system using the configuration information acquired by the acquisition portion, and a control portion that performs control in accordance with the instruction when the reception portion receives the instruction.
US09389813B1 Power conservation in an image forming apparatus by delaying activation of a printing drum
A method for minimizing power consumption of a laser printer includes receiving page description language (PDL) data corresponding to a printing task, identifying commands corresponding to the received PDL data, computing a total predicted rendering time corresponding to the identified commands, computing a print deferral time according to the total predicted rendering time wherein the print deferral time corresponds to an amount of time by which printing drum initialization can be deferred without delaying completion of the printing task, and configuring a printing drum to begin operation according to the print deferral time. A computer program product and computer system corresponding to the method are also disclosed.
US09389812B2 Information processing device, information processing method, and non-transitory computer readable medium
An information processing device includes a first communication interface, a second communication interface, a detecting unit, and a controller. The detecting unit detects a notification received by the first communication interface. In a case where the detecting unit detects a notification transmitted from the second communication interface to a communication medium connected to the second communication interface and indicating that a device serving as a transmission source has been connected to the communication medium, the controller performs control so that communication is not performed by at least one of the first communication interface and the second communication interface.
US09389807B2 Conflict management for application directed data placement in storage environments
A storage controller receives hints provided by one or more applications over a period of time, wherein the hints are used by the storage controller for organizing data in storage managed by the storage controller. Data on conflicts caused by the provided hints are collected over the period of time. Based on the collected data on the conflicts, one or more conflict avoidance rules are executed to reduce possibility of future conflicts.
US09389806B2 Media aware distributed data layout
A storage system comprises a plurality of vdisks, with each vdisk containing a plurality of storage segments, and each segment providing a specific class of service (CoS). Each vdisk stores files with data and meta data distributed among its storage segments. A storage system includes a memory having multiple classes of service. The system includes an interface for storing a file as blocks of data associated with a class of service in the memory. The interface chooses the class of service for a block on a block by block basis.
US09389803B2 Method for controlling interface operation and interface device applying the same
Methods for controlling an interface operation, the method including stopping an operation being processed in a storage device and switching the state of the storage device to a first state, when a condition for switching the state of the storage device to an idle state occurs in a command processing process according to a communication protocol; performing an operation of deleting information from a previous command stored in hardware of the storage device when the state of the storage device is switched to the first state; and switching the state of the storage device to the idle state after the operation of deleting the information on the previous command is completed, wherein in the first state, the storage device cannot be switched to the first state before the information from the previous command is deleted.
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