Document Document Title
US09252440B2 Gas supply system
A gas supply system that supplies a gas after making confluence of the gas flows from gas containers includes: a supply pressure detector that detects supply pressure of the gas following the confluence; and a controller that permits a gas supply-destination apparatus to be activated if the supply pressure detected after an elapse of a determination time from a start of the gas supply is greater than or equal to a threshold pressure, and that prohibits the apparatus from being activated if the supply pressure is less than the threshold pressure. The controller uses a first determination time as the determination time if it is determined that internal pressures that are the gas pressures in the containers are not imbalanced between the containers, and uses a second determination time that is longer than the first as the determination time if it is determined that the internal pressures are imbalanced.
US09252437B2 Apparatus for preventing over-cooling of fuel cell
An apparatus preventing over-cooling of a fuel cell is provided that includes a cooling fluid manifold which is mounted to a stack of the fuel cell and through which cooling fluid flows therethrough. End plates are arranged on both ends of the stack of a fuel cell, and at least one protrusion is provided on one surface of each of the end plates. The at least one protrusion is disposed inside a cooling fluid manifold to reduce the flow amount of the cooling fluid which flows in and out between the separating plates through the cooling fluid manifold.
US09252433B2 Liquid reserve batteries for munitions
A method for producing power from a liquid reserve battery. The method including heating a liquid electrolyte and forcing the heated liquid electrolyte into gaps dispersed in a battery cell.
US09252430B2 Alkaline cell with improved high rate capability
The present disclosure relates generally to an alkaline electrochemical cell, such as a battery, and in particular to an improved gelled anode suitable for use therein. More specifically, the present disclosure relates to a gelled anode that improves anode discharge efficiency by adjusting physical properties such as apparent density.
US09252429B2 Electrode additives coated with electro conductive material and lithium secondary comprising the same
Provided are an electrode additive coated with a coating material made of electrically conductive materials such as metal hydroxides, metal oxides or metal carbonates, and an electrode and a lithium secondary battery comprising the same. The electrode additive in accordance with the present invention can improve high temperature storage characteristics of the battery, without deterioration of performance thereof.
US09252428B2 Negative electrode for rechargeable lithium battery, method of preparing the same, and rechargeable lithium battery including the same
Disclosed is a negative electrode for a rechargeable lithium battery that includes a current collector and a negative active material layer on the current collector, the negative active material layer having an active mass density in a range of about 1.6 g/cc to about 2.1 g/cc and including graphite and a pore-forming agent.
US09252425B2 Polyacrylonitrile-sulphur composite material
The invention relates to a method for preparing a polyacrylonitrile-sulfur composite material, in which, polyacrylonitrile is converted to cyclized polyacrylonitrile, and the cyclized polyacrylonitrile is reacted with sulfur to form a polyacrylonitrile-sulfur composite material. By a separation of the preparation method into two partial reactions, the reaction conditions are advantageously able to be optimized for the respective reactions and a cathode material is able to be provided for alkali-sulfur cells with improved electrochemical properties. In addition, the invention relates to a polyacrylonitrile-sulfur composite material, a cathode material, an alkali-sulfur cell or an alkali-sulfur battery as well as to an energy store.
US09252422B2 Positive electrode for rechargeable lithium battery and rechargeable lithium battery including same
Disclosed is rechargeable lithium battery that includes a positive electrode including a positive active material layer, a negative electrode including a negative active material and an electrolyte wherein the positive active material layer includes a positive active material, a binder, a conductive material, and an activated carbon, the activated carbon includes micropores in which manganese ions are adsorbed and trapped, and the activated carbon is included in an amount of about 0.1 wt % to about 3 wt % based on the total weight of the positive active material layer.
US09252421B1 Surface modification of active material structures in battery electrodes
Provided herein are methods of processing electrode active material structures for use in electrochemical cells or, more specifically, methods of forming surface layers on these structures. The structures are combined with a liquid to form a mixture. The mixture includes a surface reagent that chemically reacts and forms a surface layer covalently bound to the structures. The surface reagent may be a part of the initial liquid or added to the mixture after the liquid is combined with the structures. In some embodiments, the mixture may be processed to form a powder containing the structures with the surface layer thereon. Alternatively, the mixture may be deposited onto a current collecting substrate and dried to form an electrode layer. Furthermore, the liquid may be an electrolyte containing the surface reagent and a salt. The liquid soaks the previously arranged electrodes in order to contact the structures with the surface reagent.
US09252417B2 Low-floor electric bus
The invention provides for a high occupancy or heavy-duty vehicle with a battery propulsion power source, which may include lithium titanate batteries. The vehicle may be all-battery or may be a hybrid, and may have a composite body. The vehicle battery system may be housed within the floor of the vehicle and may have different groupings and arrangements.
US09252416B2 Safety apparatus of battery module for vehicle
A safety apparatus of a battery module for a vehicle is provided. The apparatus includes cell terminals disposed in battery cells disposed in a row. A safety bus bar electrically connects two cell terminals disposed diagonally in two battery cells adjacent to each other among the battery cells. In addition, the safety bus bar maintains the electrical connection when the battery cells are not expanded and opens a circuit to prevent electricity from flowing when at least one battery cell is expanded.
US09252415B2 Power sources suitable for use in implantable medical devices and corresponding fabrication methods
Arrays of planar solid state batteries are stacked in an aligned arrangement for subsequent separation into individual battery stacks. Prior to stacking, a redistribution layer (RDL) is formed over a surface of each wafer that contains an array; each RDL includes first and second groups of conductive traces, each of the first extending laterally from a corresponding positive battery contact, and each of the second extending laterally from a corresponding negative battery contact. Conductive vias, formed before or after stacking, ultimately couple together corresponding contacts of aligned batteries. If before, each via extends through a corresponding battery contact of each wafer and is coupled to a corresponding conductive layer that is included in another RDL formed over an opposite surface of each wafer. If after, each via extends through corresponding aligned conductive traces and, upon separation of individual battery stacks, becomes an exposed conductive channel of a corresponding battery stack.
US09252407B2 Battery module
A battery module including a plurality of battery cells and a cover, each battery cell having a vent portion aligned in one direction, and the cover being over the vent portions, the cover including an internal cavity and at least a portion of the internal cavity including a heat-resistance member.
US09252405B2 Rechargeable secondary battery
A secondary battery including a first electrode assembly, a second electrode assembly, a case accommodating the first and second electrode assemblies, a terminal part electrically connected to the first and second electrode assemblies, and exposed to an outside of the case, and a plurality of short circuit inducing members between the first electrode assembly and the case, between the second electrode assembly and the case, and between the first electrode assembly and the second electrode assembly.
US09252398B2 Organic light emitting diode display device and method of fabricating the same
A method of fabricating an organic light emitting diode display device, which include forming a thin film transistor in a display region of a substrate, forming a metal pattern on the substrate in the display region, forming a first electrode on the substrate connected to the thin film transistor, forming a bank on the substrate to expose a portion of the first electrode and a portion of the metal pattern, forming a hole common layer, an organic light emitting layer, and an electron common layer sequentially over the entire surface of the substrate provided with the first electrode, the bank and the metal pattern, forming a photoresist pattern covering the electrode common layer and removing the hole common layer, the organic light emitting layer and the electron common layer using the photoresist pattern as a mask, removing the photoresist pattern, and forming a second electrode on the electron common layer connected to the metal pattern.
US09252396B2 Organic electro-luminescence display device
An organic electro-luminescence display device includes a first substrate, plural pedestals which are provided in a convex shape on the first substrate and have inclined side surfaces, plural first electrodes respectively provided on the respective side surfaces of the pedestals, an organic electro-luminescence film which is provided above the plural pedestals and includes a light-emitting layer laminated on the plural first electrodes, and a second electrode which is provided above the plural pedestals and is laminated on the organic electro-luminescence film. Light generated in the light-emitting layer is transmitted between a first reflection surface and a second reflection surface. The second electrode includes light transmission parts, through which the light passes, above upper end parts of the pedestals. A surface of the second electrode facing the organic electro-luminescence film is the second reflection surface except for the light transmission parts.
US09252395B2 Organic light-emitting device (OLED) display and method of manufacturing the same
An organic light-emitting device (OLED) display is disclosed. In one aspect, the display includes a substrate, a plurality of first electrodes separated from each other over the substrate and a second electrode facing and formed across the first electrodes. The display also includes an intermediate layer interposed between the first electrodes and the second electrode, wherein the intermediate layer comprises an emission layer. The display further includes a plurality of encapsulation layer portions patterned to be separated from each other in an island form over the second electrode.
US09252393B2 Flexible display apparatus including a thin-film encapsulating layer and a manufacturing method thereof
A flexible display apparatus includes: a flexible substrate; a display unit on the flexible substrate; and a thin-film encapsulating layer on the display unit. The thin-film encapsulating layer includes at least one organic layer and at least one inorganic layer. The inorganic layer comprises carbon having a concentration gradient distributed at an interface between the at least one organic layer and the at least one inorganic layer. A manufacturing method of the flexible display apparatus is also disclosed.
US09252390B2 Production method for joined body, and joined body
A method for manufacturing a joined body composed of a first substrate and a second substrate joined together by sealing resin material attached to a predetermined area of the first substrate includes: attaching a sheet material to the first substrate so as to cover the predetermined area, the sheet material including a sheet base material and the resin material provided on one main surface of the sheet base material; forming, after the attaching, in the sheet material, a slit by reducing a thickness of the resin material along an outline of the predetermined area; and separating, after the forming, part of the resin material inside the slit from the sheet base material to keep the part of the resin material inside the slit on the predetermined area of the first substrate and not to keep the rest of the resin material outside the slit on the first substrate.
US09252389B2 Functional film, environmentally sensitive electronic device package, and manufacturing methods thereof
An environmentally sensitive electronic device package including a first adhesive, at least one first side wall barrier, a first substrate, and a second substrate is provided. The first adhesive has a first surface and a second surface opposite to the first surface. The first side wall barrier is distributed in the first adhesive. The first substrate is bonded with the first surface. The first substrate has an environmentally sensitive electronic device formed thereon and the environmentally sensitive electronic device is surrounded by the first side wall barrier. The second substrate is bonded with the second surface. A manufacturing method of the environmentally sensitive electronic device package is also provided.
US09252388B2 Organic light emitting diode (OLED) display
An organic light emitting diode (OLED) display is disclosed. In one aspect, the display includes a substrate having a light emission area and a non-emission area outside the light emission area, an organic light emitting unit formed on the light emission area and a blocking unit that is disposed on the non-emission area to surround the organic light emitting unit. The OLED display further includes a coating unit formed to coat an external surface of the blocking unit and an encapsulation unit formed by alternately stacking at least one first thin film and at least one second thin film on an area surrounded by the blocking unit so as to encapsulate the organic light emitting unit.
US09252387B2 Illumination device having light-transmitting resin defining appearance of illumination device
An illumination device includes a light-emitting element, a wire connected to the light-emitting element to supply electric power to the light-emitting element, and a light-transmitting resin configured to hold the light-emitting element and the wire in one piece. The light-transmitting resin defines an appearance of the illumination device. Light emitted from the light-emitting element is transmitted through the light-transmitting resin to be radiated from an outer surface of the light-transmitting resin.
US09252386B2 Back-emitting OLED device and method for homogenizing the luminance of a back-emitting OLED device
An OLED device includes a transparent anode, of sheet resistance R1, and a cathode, of sheet resistance R2, the ratio r=R2/R1 ranging from 0.01 to 2.5, a first anode electrical contact, a first cathode electrical contact, arranged above the active zone, and a reflector covering the active zone above an OLED system, and for each point B of the anode contact, the point B being in an edge of the first anodic region, on defining a distance D between B and the point C closest to the point B, and on defining a distance L between the point B and a point X of an opposite edge of the first anodic region from the first edge, and passing through Ci the following criteria are defined: if 0.01≦r<0.1, then 30%
US09252384B2 Organic light emitting device including an auxiliary electrode
An organic light emitting device includes a substrate, a first electrode disposed on the substrate, a first organic layer pattern disposed on the first electrode, an auxiliary electrode pattern alternately disposed with the first organic layer pattern, and including an upper insulation layer, a lower insulation layer, and an auxiliary electrode disposed therebetween, a light emitting layer disposed on the first organic layer pattern and the auxiliary electrode pattern, a second organic layer disposed on the light emitting layer and a second electrode disposed on the second organic layer.
US09252379B2 Organic light emitting device
Disclosed is an organic light emitting device that may, for example, include a red pixel including a first red emission layer and a second red emission layer that emit red lights; a green pixel including a first green emission layer and a second green emission layer that emit green lights; a blue pixel including a first blue emission layer and a second blue emission layer that emit blue lights; and a first electrode and a second electrode that supply electric charges to the red, green and blue pixels, wherein a first emission layer and a second emission layer of at least one of the red, green and blue pixels include different materials between a fluorescent material and a phosphor material.
US09252378B2 Organic light-emitting component
An organic light-emitting component includes a translucent substrate, on which an optical coupling-out layer is applied. A translucent electrode overlies the coupling-out layer and an organic functional layer stack having organic functional layers overlies the translucent electrode. The organic functional layer stack includes a first organic light-emitting layer on the translucent electrode and a second organic light-emitting layer on the first organic light-emitting layer. The first organic light-emitting layer includes arbitrarily arranged emitter molecules and the second organic light-emitting layer includes anisotropically oriented emitter molecules having an anisotropic molecular structure.
US09252376B2 Composition capable of changing its solubility, hole transport material composition, and organic electronic element using the same
An embodiment of the present invention relates to a composition containing a polymer or oligomer (A) having a repeating unit with hole transport properties and also having a thienyl group which may have a substituent, and an initiator (B), wherein the solubility of the composition is capable of being changed by applying heat, light, or both heat and light.
US09252373B2 Electronic devices with yielding substrates
In accordance with certain embodiments, a semiconductor die is adhered directly to a yielding substrate with a pressure-activated adhesive notwithstanding any nonplanarity of the surface of the semiconductor die or non-coplanarity of the semiconductor die contacts.
US09252372B2 Complexes for use in optoelectronic components
The invention relates to the use of a multinuclear metal or transition metal complex in an organic electronic device, said complex having a small ΔE spacing, particularly between 50 cm−1 and 2000 cm−1, between the lowest triplet state and the singlet state that is higher and is achieved by thermal backfilling from the triplet. The invention further relates to the use of the strong absorptions of such multinuclear metal complexes, particularly in OSCs.
US09252370B2 Heterocyclic compounds and organic light emitting devices including the same
Provided are heterocyclic compounds represented by general Formula 1 below and organic light-emitting devices including the same: Such N-substituted diarylamino derivatives of 4,5-iminophenanthrene, when included in color fluorescent or phosphorescent organic light emitting devices in a hole transporting or hole injecting charge transport role, impart high efficiency, low driving voltages, high luminances and long lifetimes to these devices.
US09252369B2 Metal complexes with organic ligands and use thereof in OLEDs
The present invention relates, inter alia, to metal complexes having improved solubility, to processes for the preparation of the metal complexes, to devices comprising these metal complexes and to the use of the metal complexes. M(L)n(L′)m formula 1 where the compound contains a moiety M(L)n of the formula (2) W is equal to the formula (3).
US09252366B2 Crosslinkable compound, method for preparing the same and light emitting device comprising the same
A crosslinkable compound comprising trifluorovinyl has a structure of Formula (I). A method for preparing the crosslinkable compound and a light emitting device prepared from the compound are also disclosed.
US09252364B2 Method for making organic light emitting diode array
The disclosure relates to a method of making organic light emitting diode array. A base defining a plurality of convexities is provided. A number of first electrodes are applied on the plurality of convexities. A number of red light electroluminescent layers are transfer printed on a first group of the first electrodes. A number of green light electroluminescent layers are transfer printed on a second group of the first electrodes. A number of blue light electroluminescent layers are transfer printed on a third group of the first electrodes. A patterned second insulative layer is made to cover the number of first electrodes and expose the electroluminescent layers. A second electrode is electrically connected to the electroluminescent layers.
US09252361B2 Electronic device and method for fabricating the same
Provided is an electronic device including a semiconductor memory. The semiconductor memory may include: an interlayer dielectric layer formed over a substrate including first and second areas; a first contact plug contacted with the substrate through the interlayer dielectric layer of the second area; an anti-peeling layer formed over the interlayer dielectric layer including the first contact plug; a second contact plug contacted with the substrate through the anti-peeling layer and the interlayer dielectric layer in the first area; and a variable resistance pattern contacted with the second contact plug.
US09252355B2 Low offset and high sensitivity vertical hall effect sensor
A vertical Hall Effect sensor is provided having a high degree of symmetry between its bias modes, can be adapted to exhibit a small pre-spinning systematic offset, and complies with the minimal spacing requirements allowed by the manufacturing technology (e.g., CMOS) between the inner contacts. These characteristics enable the vertical Hall Effect sensor to have optimal performance with regard to offset and sensitivity.
US09252351B2 Actuator and method for producing same
The invention relates to an actuator having a sensor layer by which a temperature can be detected, and to a method for producing the same.
US09252350B2 Oscillation piece, oscillator, electronic device, electronic apparatus, and mobile object
An oscillation piece includes a first oscillation arm and a second oscillation arm, a first base that connects ends of the first oscillation arm and the second oscillation arm on one side to each other and a second base that connects ends of the first oscillation arm and the second oscillation arm on the other side to each other, and weight films provided on each of the first oscillation arm and the second oscillation arm. The drive electrodes are disposed in positions where the amount of distortion produced in the first oscillation arm and the second oscillation arm is maximized, and the weight films are disposed in positions where the amount of distortion produced in the first oscillation arm and the second oscillation arm is minimized. The oscillation frequency of the oscillation piece can be precisely adjusted by removing part of the weight films.
US09252349B2 Resonator element, resonator, oscillator, and electronic device
A resonator element capable of improving impact resistance is provided. A quartz crystal resonator element is a resonator element formed by etching a Z plate which is cut at predetermined angles with respect to the crystal axes of a quartz crystal. The quartz crystal resonator element includes a base, a pair of resonating arms extending from the base in the Y-axis direction, and a positive X-axis notch and a negative X-axis notch formed by notching the base in the X-axis direction. The positive X-axis notch is formed by notching the base from the negative side of the X axis towards the positive side so that the width of the positive X-axis notch increases as it approaches the outer circumference.
US09252348B2 Light emitting lamp
Disclosed is a light emitting lamp including a light source module including at least one light source and a light guide layer disposed on a substrate burying the at least one light source, and a housing accommodating the light source module, and the at least one light source includes a body having a cavity, a first lead frame including one end exposed to the cavity and the other end passing through the body and exposed to one surface of the body, a second lead frame including one end exposed to one portion of the surface of the body, the other end exposed to the another portion of the surface of the body, and an intermediate part exposed to the cavity, and at least one light emitting chip including a first semiconductor layer, an active layer and a second semiconductor layer, and disposed on the first lead frame.
US09252347B2 Light emitting device package and light unit having the same
Disclosed is a light emitting device package. The light emitting device package includes a package body having a first cavity and a second cavity; a plurality of reflective frames comprising a first reflective frame and a second reflective frame on the first cavity and the second cavity, respectively, and each of the first reflective frame and the second reflective frame comprises a bottom frame and at least two side wall frames extending from the bottom frame; and a light emitting device on the first reflective frame, wherein the first reflective frame and the second reflective frame are electrically separated from each other.
US09252344B2 Structural component and method for producing a structural component
The invention relates to a structural component which comprises a support (1), an optoelectronic semiconductor chip (2) having at least one lateral face (2a), further comprising a connecting means (3), a first molded element (4), and a second molded element (5), the optoelectronic semiconductor chip (2) being mechanically connected to the support (1) by the connecting means (3). The first molded element (4) covers an exposed outer face of the optoelectronic semiconductor chip (2) and the first molded element (4) covers an exposed outer face of the connecting means (3). The second molded element (5) covers an exposed outer face of the first molded element (5) and the second molded element (5) has a higher modulus of elasticity at room temperature than the first molded element.
US09252339B2 Red light-emitting nitride material, and light-emitting part and light-emitting device comprising the same
Disclosed are a red light-emitting nitride material, a light-emitting part and a light-emitting device comprising the same. The General Formula of the light-emitting material is: Ma(Al,B)bSicNdOe:Eum, Rn, wherein M is at least one of the alkaline earth metal elements Mg, Ca, Sr, Ba and Zn; R is at least one of the rare earth elements Y, La, Ce, Gd and Lu; and 0.9≦a<1.1, 0.9≦b≦1, 1≦c≦1.5, 2.5
US09252337B1 Composite substrate for light emitting diodes
A low-cost device for packaging LED dies provides superior reflectivity and thermal conductivity without covering entire surfaces of an LED luminaire with an expensive reflective aluminum substrate. The LED packaging device includes a highly reflective substrate disposed in a hole in a printed circuit board. The substrate has a reflectivity greater than 97% and includes an insulating layer and a reflective layer disposed above a thicker aluminum layer. An LED die is disposed on the top surface of the substrate. The PCB has a layer of glass fiber in resin and a metal layer. The lower surface of the PCB and the bottom surface of the substrate are substantially coplanar. The metal layer of the PCB is electrically coupled to the LED die only through bond wires. Electronic circuitry is disposed on the upper surface of the PCB and is used to control light emitted from the LED die.
US09252336B2 Multi-cup LED assembly
A substrate for an LED assembly can have a plurality of cups formed therein. At least one cup can be formed within another cup. The cups can be co-axial with respect to one another, for example. A machined surface of the substrate can enhance reflectivity of the LED assembly. A transparent and/or non-global solder mask can enhance reflectivity of the LED assembly. A transparent ring can enhance reflectivity of the LED assembly. By enhancing reflectivity of the LED assembly, the brightness of the LED assembly can be increased. Brighter LED assemblies can be used in applications such as flashlights, displays, and general illumination.
US09252335B2 Semiconductor light emitting element and method for manufacturing same
According to one embodiment, a semiconductor light emitting element includes a conductive substrate, a bonding portion, an intermediate metal film, a first electrode, a semiconductor stacked body and a second electrode. The bonding portion is provided on the support substrate and including a first metal film. The intermediate metal film is provided on the bonding portion and having a larger linear expansion coefficient than the first metal film. The first electrode is provided on the intermediate metal film and includes a second metal film having a larger linear expansion coefficient than the intermediate metal film. The semiconductor stacked body is provided on the first electrode and including a light emitting portion. The second electrode is provided on the semiconductor stacked body.
US09252324B2 Heterojunction light emitting diode
A method for forming a light emitting device includes forming a monocrystalline III-V emissive layer on a monocrystalline substrate and forming a first doped layer on the emissive layer. A first contact is deposited on the first doped layer. The monocrystalline substrate is removed from the emissive layer by a mechanical process. A second doped layer is formed on the emissive layer on a side from which the substrate has been removed. The second doped layer has a dopant conductivity opposite that of the first doped layer. A second contact is deposited on the second doped layer.
US09252316B2 Ultra thin hit solar cell and fabricating method of the same
Disclosed is an ultra-thin HIT solar cell, including: an n- or p-type crystalline silicon substrate; an amorphous silicon emitter layer having a doping type different from that of the silicon substrate; and an intrinsic amorphous silicon passivation layer formed between the crystalline silicon substrate and the amorphous silicon emitter layer, wherein the HIT solar cell further includes a transparent conductive oxide layer made of ZnO on an upper surface thereof, and the surface of the crystalline silicon substrate is not textured but only the surface of the transparent conductive oxide layer is textured, and thereby a very thin crystalline silicon substrate can be used, ultimately achieving an ultra-thin HIT solar cell having a very low total thickness while maintaining light trapping capacity.
US09252314B2 Device and method for solar power generation
A photovoltaic device comprising an array of elongate reflector elements mounted substantially parallel to one another and transversely spaced in series, at least one of the reflector elements having an elongate concave reflective surface to reflect incident solar radiation towards a forward adjacent reflector element in the array. The at least one reflector element includes a photovoltaic receptor mounted on the reflector element by a mounting arrangement to receive reflected solar radiation from a rearward adjacent reflector element. The reflector element also includes a heat sink in heat transfer relationship with the photovoltaic receptor, thermally isolating the photovoltaic receptor, at least partially, from the reflector element.
US09252308B2 Thin film structures and devices with integrated light and heat blocking layers for laser patterning
Selective removal of specified layers of thin film structures and devices, such as solar cells, electrochromics, and thin film batteries, by laser direct patterning is achieved by including heat and light blocking layers in the device/structure stack immediately adjacent to the specified layers which are to be removed by laser ablation. The light blocking layer is a layer of metal that absorbs or reflects a portion of the laser energy penetrating through the dielectric/semiconductor layers and the heat blocking layer is a conductive layer with thermal diffusivity low enough to reduce heat flow into underlying metal layer(s), such that the temperature of the underlying metal layer(s) does not reach the melting temperature, Tm, or in some embodiments does not reach (Tm)/3, of the underlying metal layer(s) during laser direct patterning.
US09252307B2 Photovoltaic module support system
A support system for a solar panel includes a triangular truss with connection points for mounting a photovoltaic module, and a cradle structure that supports the triangular truss and is connected to at least two side supports of the triangular truss. The cradle structure may be driven for rotation about an axis for tracking the sun and several cradle structures can be linked together for tracking movement using a buried linkage system. The truss may also be foldable for ease of transportation and storage.
US09252304B2 Solution processing of kesterite semiconductors
Methods for depositing a kesterite film comprising a compound of the formula: Cu2−xZn1+ySn(S1−zSez)4+q, wherein 0≦x≦1; 0≦y≦1; 0≦z≦1; −1≦q≦1, generally include contacting a hydrazine-based solvent, a source of Cu, a source of Sn, a source of Zn carboxylate, a source of at least one of S and Se, under conditions sufficient to form a solution substantially free of solid particles; applying the solution onto a substrate to form a thin layer; and annealing the thin layer at a temperature, pressure, and length of time sufficient to form the kesterite film. Also disclosed are hydrazine-based precursor solutions for forming a kesterite film and a photovoltaic device including the kesterite film formed by the above method.
US09252303B2 Thin film photovoltaic cell structure, nanoantenna, and method for manufacturing
A thin film photovoltaic cell structure (1) comprises a substrate (2); a first dielectric layer (3) on the substrate (2); an active layer (4) on the first dielectric layer (3); and a plasmonic light concentrator arrangement (5) on the active layer (4) for coupling incident light at a first wavelength band into the active layer (4). According to the present invention, the thin film photovoltaic cell structure (1) further comprises a second dielectric layer (6) formed of a dielectric material which is transparent at the first wavelength band and at a second wavelength band on the plasmonic light concentrator arrangement (5); the first dielectric layer (3), the active layer (4), the plasmonic light concentrator arrangement (5), and the second dielectric layer (6) being configured to form a resonant cavity for coupling incident light at the second wavelength band into a standing wave confined in the resonant cavity.
US09252300B2 Method for backside-contacting a silicon solar cell, silicon solar cell and silicon solar module
For contacting a silicon solar cell a pre-processed silicon substrate with a frontside and a backside is provided. Then, aluminum is deposited on the backside of the pre-processed silicon substrate, wherein aluminum-free regions remain on the backside. Then, a silver-free layer suitable for soldering on the backside of the silicon substrate is deposited so that the silver-free layer suitable for soldering covers at least the aluminum-free regions on the backside.
US09252295B2 Coating material, coating film, backsheet for solar cell module, and solar cell module
An object of the present invention is to provide a coating material that can form a coating film that has an excellent adherence for sealants in solar cell modules as well as an excellent resistance to blocking. Further objects are to provide this coating film, a solar cell module backsheet that has this coating film, and a solar cell module that has this coating film. The present invention relates to a coating material that contains a curable functional group-containing fluorinated polymer and a polyisocyanate compound derived from at least one isocyanate selected from the group consisting of xylylene diisocyanate and bis(isocyanatomethyl)cyclohexane.
US09252292B2 Semiconductor device and a method for forming a semiconductor device
A semiconductor device includes a semiconductor substrate. The semiconductor substrate includes a first doping region arranged at a main surface of the semiconductor substrate, an emitter layer arranged at a back side surface of the semiconductor substrate, at least one first conductivity type area separated from the first doping region by a second doping region of the semiconductor substrate and at least one temperature-stabilizing resistance area. The first doping region has a first conductivity type and the emitter layer has at least mainly a second conductivity type. The second doping region has the second conductivity type and the at least one first conductivity type area has the first conductivity type. The at least one temperature-stabilizing resistance area is located within the second doping region and adjacent to the at least one first conductivity type area. Further, the at least one temperature-stabilizing resistance area has a lower variation of a resistance over a range of an operating temperature of the semiconductor device than at least a part of the second doping region located adjacent to the at least one temperature-stabilizing resistance area.
US09252291B2 Nonvolatile semiconductor memory device
According to one embodiment, a nonvolatile semiconductor memory device includes a first memory portion. The first memory portion includes a first base semiconductor layer, a first electrode, a first channel semiconductor layer, a first base tunnel insulating film, a first channel tunnel insulating, a first charge retention layer and a first block insulating film. The first channel semiconductor layer is provided between the first base semiconductor layer and the first electrode, and includes a first channel portion. The first base tunnel insulating film is provided between the first base semiconductor layer and the first channel semiconductor layer. The first channel tunnel insulating film is provided between the first electrode and the first channel portion. The first charge retention layer is provided between the first electrode and the first channel tunnel insulating film. The first block insulating film is provided between the first electrode and the first charge retention layer.
US09252290B2 Nonvolatile semiconductor memory element, nonvolatile semiconductor memory, and method for operating nonvolatile semiconductor memory element
According to an aspect of the present invention, there is provided a nonvolatile semiconductor memory element including: a semiconductor substrate including: a source region; a drain region; and a channel region; a lower insulating film that is formed on the channel region; a charge storage film that is formed on the lower insulating film and that stores data; an upper insulating film that is formed on the charge storage film; and a control gate that is formed on the upper insulating film, wherein the upper insulating film includes: a first insulting film; and a second insulating film that is laminated with the first insulating film, and wherein the first insulating film is formed to have a trap level density larger than that of the second insulating film.
US09252287B2 Display device and electronic appliance
A display device with low manufacturing cost, with low power consumption, capable of being formed over a large substrate, with a high aperture ratio of a pixel, and with high reliability is provided. The display device includes a transistor electrically connected to a light-transmitting pixel electrode and a capacitor. The transistor includes a gate electrode, a gate insulating film over the gate electrode, and a first multilayer film including an oxide semiconductor over the gate insulating film. The capacitor includes the pixel electrode and a conductive electrode formed of a second multilayer film which overlaps with the pixel electrode with a predetermined distance therebetween, and has the same layer structure as the first multilayer film. A channel formation region of the transistor is at least one layer, which is not in contact with the gate insulating film, of the first multilayer film.
US09252286B2 Semiconductor device and method for manufacturing the same
A first conductive film overlapping with an oxide semiconductor film is formed over a gate insulating film, a gate electrode is formed by selectively etching the first conductive film using a resist subjected to electron beam exposure, a first insulating film is formed over the gate insulating film and the gate electrode, removing a part of the first insulating film while the gate electrode is not exposed, an anti-reflective film is formed over the first insulating film, the anti-reflective film, the first insulating film and the gate insulating film are selectively etched using a resist subjected to electron beam exposure, and a source electrode in contact with one end of the oxide semiconductor film and one end of the first insulating film and a drain electrode in contact with the other end of the oxide semiconductor film and the other end of the first insulating film are formed.
US09252285B2 Display substrate including a thin film transistor and method of manufacturing the same
A method of manufacturing a display substrate includes forming a gate electrode on a base substrate, forming an active pattern which includes an oxide semiconductor and overlaps with the gate electrode, forming an etch stopper which partially covers the active pattern, and performing a plasma treatment process to promote a reduction reaction to portions of the active pattern exposed by the etch stopper, thereby forming a source electrode and a drain electrode.
US09252276B2 Semiconductor device
A semiconductor device includes a fin-shaped silicon layer and a pillar-shaped silicon layer on the fin-shaped silicon layer, where a width of the pillar-shaped silicon layer is equal to a width of the fin-shaped silicon layer. Diffusion layers reside in upper portions of the pillar-shaped silicon layer and fin-shaped silicon layer and in a lower portion of the pillar-shaped silicon layer to form. A gate insulating film and a metal gate electrode are around the pillar-shaped silicon layer and a metal gate line extends in a direction perpendicular to the fin-shaped silicon layer and is connected to the metal gate electrode. A contact resides on the metal gate line and a nitride film is on an entire top surface of the metal gate electrode and the metal gate line, except for the bottom of the contact.
US09252275B2 Non-planar gate all-around device and method of fabrication thereof
A non-planar gate all-around device and method of fabrication thereby are described. In one embodiment, the device includes a substrate having a top surface with a first lattice constant. Embedded epi source and drain regions are formed on the top surface of the substrate. The embedded epi source and drain regions have a second lattice constant that is different from the first lattice constant. Channel nanowires having a third lattice are formed between and are coupled to the embedded epi source and drain regions. In an embodiment, the second lattice constant and the third lattice constant are different from the first lattice constant. The channel nanowires include a bottom-most channel nanowire and a bottom gate isolation is formed on the top surface of the substrate under the bottom-most channel nanowire. A gate dielectric layer is formed on and all-around each channel nanowire. A gate electrode is formed on the gate dielectric layer and surrounding each channel nanowire.
US09252274B2 Fin field effect transistors including multiple lattice constants and methods of fabricating the same
A Field Effect Transistor (FET) structure may include a fin on a substrate having a first lattice constant and at least two different lattice constant layers on respective different axially oriented surfaces of the fin, wherein the at least two different lattice constant layers each comprise lattice constants that are different than the first lattice constant and each other.
US09252273B2 Gate stack and contact structure
A process for fabrication of semiconductor devices, particularly fin-shaped Field Effect Transistors (FinFETs), having a low contact horizontal resistance and a resulting device are provided. Embodiments include: providing a substrate having source and drain regions separated by a gate region; forming a gate electrode having a first length on the gate region; forming an epitaxy layer on the source and drain regions; forming a contact layer having a second length, longer than the first length, at least partially on the epitaxy layer; and forming an oxide layer on top and side surfaces of the contact layer for at least the first length.
US09252271B2 Semiconductor device and method of making
A semiconductor device is provided. The semiconductor device includes a channel region disposed between a source region and a drain region, a gate structure over the channel region, an interlayer dielectric (ILD) layer proximate the gate structure, an ILD stress layer proximate the top portion of gate structure and over the ILD layer. The gate structure includes a first sidewall, a second sidewall and a top portion. A first stress memorization region is also provided. The first stress memorization region is proximate the top portion of the gate structure. A method of making a semiconductor device is also provided.
US09252259B2 Methods and apparatus of metal gate transistors
Methods and devices for forming a contact over a metal gate for a transistor are provided. The device may comprise an active area, an isolation area surrounding the active area, and a metal gate above the isolation area, wherein the metal gate comprises a conductive layer. The contact comprises a first contact part within the conductive layer, above the isolation area without vertically overlapping the active area, and a second contact part above the first contact part, connected to the first contact part, and substantially vertically contained within the first contact part.
US09252253B2 High electron mobility transistor
According to example embodiments, a high electron mobility transistor (HEMT) includes a channel layer having a 2-dimensional electron gas (2DEG), a channel supply layer on the channel layer, a source electrode and a drain electrode spaced apart from each other on one of the channel layer and the channel supply layer, at least one channel depletion layer on the channel supply layer; a gate electrode on at least a part of the channel depletion layer, and at least one bridge connecting the channel depletion layer and the source electrode. The channel depletion layer is configured to form a depletion region in the 2DEG. The HEMT has a ratio of a first impedance to a second impedance that is a uniform value. The first impedance is between the gate electrode and the channel depletion layer. The second impedance is between the source electrode and the channel depletion layer.
US09252244B2 Methods of selectively growing source/drain regions of fin field effect transistor and method of manufacturing semiconductor device including a fin field effect transistor
The inventive concepts provide methods of manufacturing a semiconductor device. The method includes patterning a substrate to form an active pattern, forming a gate pattern intersecting the active pattern, forming a gate spacer on a sidewall of the gate pattern, forming a growth-inhibiting layer covering an upper region of the gate pattern, and forming source/drain electrodes at opposite first and second sides of the gate pattern.
US09252239B2 Semiconductor power devices manufactured with self-aligned processes and more reliable electrical contacts
This invention discloses semiconductor power device that includes a plurality of top electrical terminals disposed near a top surface of a semiconductor substrate. Each and every one of the top electrical terminals comprises a terminal contact layer formed as a silicide contact layer near the top surface of the semiconductor substrate. The trench gates of the semiconductor power device are opened from the top surface of the semiconductor substrate and each and every one of the trench gates comprises the silicide layer configured as a recessed silicide contact layer disposed on top of every on of the trench gates slightly below a top surface of the semiconductor substrate surround the trench gate.
US09252237B2 Transistors, semiconductor devices, and methods of manufacture thereof
Transistors, semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes forming a transistor over a workpiece. The transistor includes a sacrificial gate material comprising a group III-V material. The method includes combining a metal (Me) with the group III-V material of the sacrificial gate material to form a gate of the transistor comprising a Me-III-V compound material.
US09252235B2 Semiconductor devices and methods of forming the same
According to embodiments of the inventive concept, a gate electrode is formed on a substrate, and a first spacer, a second spacer, and a third spacer are sequentially formed on a sidewall of the gate electrode. The substrate is etched to form a recess region. A compressive stress pattern is formed in the recess region. A protective spacer is formed on a sidewall of the third spacer. When the recess region is formed, a lower portion of the second spacer is removed to form a gap region between the first and third spacers. The protective spacer fills the gap region.
US09252232B2 Multi-plasma nitridation process for a gate dielectric
A gate dielectric can be formed by depositing a first silicon oxide material by a first atomic layer deposition process. The thickness of the first silicon oxide material is selected to correspond to at least 10 deposition cycles of the first atomic layer deposition process. The first silicon oxide material is converted into a first silicon oxynitride material by a first plasma nitridation process. A second silicon oxide material is subsequently deposited by a second atomic layer deposition process. The second silicon oxide material is converted into a second silicon oxynitride material by a second plasma nitridation process. Multiple repetitions of the atomic layer deposition process and the plasma nitridation process provides a silicon oxynitride material having a ratio of nitrogen atoms to oxygen atoms greater than 1/3, which can be advantageously employed to reduce the leakage current through a gate dielectric.
US09252231B2 Semiconductor structure and manufacturing method for the same
A semiconductor structure and a manufacturing method of the same are provided. The semiconductor structure includes a conductive layer, a conductive architecture and a dielectric layer. The conductive layer defines adjacent first openings. The conductive architecture surrounds a portion of the conductive layer between the first openings. The dielectric layer separates the conductive layer and the conductive architecture.
US09252230B2 Semiconductor device and method of manufacturing the same
A semiconductor device and a method of manufacturing the same are provided. The device includes insulating patterns and conductive patterns stacked alternately, a channel layer formed through the insulating patterns and the conductive patterns, a tunnel insulating layer formed to surround sidewalls of the channel layer, and a charge storage layer formed to surround the tunnel insulating layer. An interfacial surface of the tunnel insulating layer in contact with the charge storage layer includes a thermal oxide layer.
US09252227B2 Semiconductor device
It is an object of the present invention to connect a wiring, an electrode, or the like formed with two incompatible films (an ITO film and an aluminum film) without increasing the cross-sectional area of the wiring and to achieve lower power consumption even when the screen size becomes larger. The present invention provides a two-layer structure including an upper layer and a lower layer having a larger width than the upper layer. A first conductive layer is formed with Ti or Mo, and a second conductive layer is formed with aluminum (pure aluminum) having low electric resistance over the first conductive layer. A part of the lower layer projected from the end section of the upper layer is bonded with ITO.
US09252226B2 Thin film transistor array panel and manufacturing method thereof
Provided is a thin film transistor array panel. The thin film transistor array panel according to exemplary embodiments of the present invention includes: a gate wiring layer disposed on a substrate; an oxide semiconductor layer disposed on the gate wiring layer; and a data wiring layer disposed on the oxide semiconductor layer, in which the data wiring layer includes a main wiring layer including copper and a capping layer disposed on the main wiring layer and including a copper alloy.
US09252219B2 Insulated gate bipolar transistor with a lateral gate structure and gallium nitride substrate
The present invention discloses an insulated gate bipolar transistor (IGBT) and a manufacturing method thereof. The IGBT includes: a gallium nitride (GaN) substrate, a first GaN layer with a first conductive type, a second GaN layer with a first conductive type, a third GaN layer with a second conductive type or an intrinsic conductive type, and a gate formed on the GaN substrate. The first GaN layer is formed on the GaN substrate and has a side wall vertical to the GaN substrate. The second GaN layer is formed on the GaN substrate and is separated from the first GaN layer by the gate. The third GaN layer is formed on the first GaN layer and is separated from the GaN substrate by the first GaN layer. The gate has a side plate adjacent to the side wall in a lateral direction to control a channel.
US09252215B2 Constrained epitaxial source/drain regions on semiconductor-on-insulator finFET device
A method of fabricating a semiconductor device includes forming a plurality of semiconductor fins on an insulator layer of a semiconductor substrate, and forming a plurality of gate stacks on the insulator layer. Each gate stack wraps around a respective portion of the semiconductor fins. The method further includes forming a dielectric layer on the insulator layer. The dielectric layer fills voids between the semiconductor fins and gate stacks, and covers the semiconductor fins. The method further includes etching at least one portion of the semiconductor fins until reaching the insulator layer such that at least one cavity is formed. The cavity exposes seed regions of the semiconductor fins located between adjacent gate stacks. The method further includes epitaxially growing a semiconductor material from the seed regions to form source/drain regions corresponding to a respective gate stack.
US09252212B2 Power semiconductor device
A power semiconductor device may include: an active region in which a current flows through a channel formed when the device being turned on; a termination region disposed around the active region; a first semiconductor region of a first conductive type disposed in the termination region in a direction from the active region to the termination region; and a second semiconductor region of a second conductive type disposed in the termination region in the direction from the active region to the termination region, the first semiconductor region and the second semiconductor region being disposed alternately.
US09252208B1 Uniaxially-strained FD-SOI finFET
Methods and structures for forming uniaxially-strained, nanoscale, semiconductor bars from a biaxially-strained semiconductor layer are described. A spatially-doubled mandrel process may be used to form a mask for patterning dense, narrow trenches through the biaxially-strained semiconductor layer. The resulting slicing of the biaxially-strained layer enhances carrier mobility and can increase device performance.
US09252205B2 DRAM memory device with manufacturable capacitor
A high capacitance embedded capacitor and associated fabrication processes are disclosed for fabricating a capacitor stack in a multi-layer stack to include a first capacitor plate conductor formed with a cylinder-shaped storage node electrode formed in the multi-layer stack, a capacitor dielectric layer surrounding the cylinder-shaped storage node electrode, and a second capacitor plate conductor formed from a conductive layer in the multi-layer stack that is sandwiched between a bottom and top dielectric layer, where the cylinder-shaped storage node electrode is surrounded by and extends through the conductive layer.
US09252202B2 Test structure and method for determining overlay accuracy in semiconductor devices using resistance measurement
Provided is a test pattern structure for determining overlay accuracy in a semiconductor device. The test pattern structure includes one or more resistor structures formed by patterning a lower silicon layer. Each includes a zigzag portion with leads at different spatial locations. An upper pattern is formed and includes at least one pattern feature formed over the resistor or resistors. The portions of the resistor or resistors not covered by the upper pattern feature will become silicided during a subsequent silicidation process. Resistance is measured to determine overlay accuracy as the resistor structures are configured such that the resistance of the resistor structure is determined by the degree of silicidation of the resistor structure which is determined by the overlay accuracy between the upper and lower patterns.
US09252199B2 Integrated inductor and integrated inductor fabricating method
The present invention provides an integrated inductor and an integrated inductor fabricating method. The integrated inductor comprises: a semiconductor substrate, a plurality of deep trenches, and an inductor. The deep trenches are formed in the semiconductor substrate and arranged in a specific pattern, and the deep trenches are filled with a metal material to form a patterned ground shield (PGS). The inductor is formed above the semiconductor substrate. The integrated inductor fabricating method comprises: forming a semiconductor substrate; forming a plurality of deep trenches in the semiconductor substrate and arranging the deep trenches in a specific pattern; filling the deep trenches with a metal material to form a patterned ground shield (PGS); and forming an inductor above the semiconductor substrate.
US09252198B2 Organic light emitting display device with reduced generation of parasitic capacitance and method for manufacturing the same
An organic light emitting diode (OLED) display includes: a substrate; a first and a second thin film transistor (TFT) both disposed on the substrate and both having an active layer, a gate, a source and a drain electrode. A gate line is connected to the gate electrode of the first TFT, and a data line is connected to the source electrode of the first TFT. A common power source line is connected to the source electrode of the second TFT, intersects the gate line, and is parallel to the data line. A pixel electrode is connected to the drain electrode of the second TFT. An organic emission layer is disposed on the first electrode. A common electrode line is disposed on the organic emission layer. A secondary common power source line is formed with the same material as and is parallel to the common electrode line.
US09252191B2 Seed layer for a p+ silicon germanium material for a non-volatile memory device and method
A method of forming a non-volatile memory device includes providing a substrate having a surface, depositing a dielectric overlying the surface, forming a first wiring structure overlying the dielectric, depositing silicon material overlying the first wiring structure, the silicon layer having a thickness of less than about 100 Angstroms, depositing silicon germanium material at a temperature raging from about 400 to about 490 Degrees Celsius overlying the first wiring structure using the silicon layer as a seed layer, wherein the silicon germanium material is substantially free of voids and has polycrystalline characteristics, depositing resistive switching material (e.g. amorphous silicon material) overlying the silicon germanium material, depositing a conductive material overlying the resistive material, and forming a second wiring structure overlying the conductive material.
US09252190B2 Semiconductor device and method for producing semiconductor device
A semiconductor device according to the present invention comprises a first pillar-shaped semiconductor layer, a gate insulating film formed around the first pillar-shaped semiconductor layer, a gate electrode made of a metal and formed around the gate insulating film, a gate line made of a metal and connected to the gate electrode, a second gate insulating film formed around an upper portion of the first pillar-shaped semiconductor layer, a first contact made of a second metal and formed around the second gate insulating film, a second contact which is made of a third metal and which connects an upper portion of the first contact to an upper portion of the first pillar-shaped semiconductor layer, a second diffusion layer formed in a lower portion of the first pillar-shaped semiconductor layer, a pillar-shaped resistance-changing layer formed on the second contact, a reset gate insulating film that surrounds the pillar-shaped resistance-changing layer, and a reset gate that surrounds the reset gate insulating film.
US09252186B1 Pixel array and display device
A pixel array and a display device are provided. The pixel array includes a two-dimensional array that is formed by arranging a plurality of color sub-pixels and a plurality of white sub-pixels in the row direction and in the column direction, the color sub-pixels include color sub-pixels in three different colors. For color sub-pixels in each color in each row, color sub-pixels with the same color in the same row are arranged so that, the odd-numbered column sub-pixel and the even-numbered column sub-pixel alternate one by one, or they are disposed by way of groups each including two odd-numbered column sub-pixels alternating with even-numbered column sub-pixels or by way of groups each including two even-numbered column sub-pixels alternating with odd-numbered column sub-pixels.
US09252180B2 Bonding pad on a back side illuminated image sensor
A bonding pad structure for an image sensor device and a method of fabrication thereof. The image sensor device has a radiation-sensor region including a substrate and a radiation detection device, and a bonding pad region including the bonding pad structure. The bonding pad structure includes: an interconnect layer; an interlayer dielectric layer (IDL), both layers extending from under the substrate into the bonding pad region; an isolation layer formed on IDL; a conductive pad having a planar portion and one or more bridging portions extending perpendicularly from the planar portion, through the IDL and isolation layers, and to the interconnect layer; and a plurality of non-conducting stress-releasing structures disposed between the isolation layer and the conductive pad in such a way to adjoin its planar and the bridging portions together for releasing potential pulling stress applied thereon and preventing a conductive pad peeling.
US09252179B2 Image sensor structures
An image sensor structure is provided. The image sensor structure includes a substrate including a central area and a peripheral area, a sensing area including a plurality of pixels located at the central area of the substrate, a plurality of bond pads disposed at the peripheral area of the substrate, and an array of protrusions disposed between the bond pads and the sensing area and surrounding the sensing area, wherein a largest distance between any two points of the protrusion under a top view is getting smaller from the peripheral area to the central area.
US09252177B2 Solid state imaging device
According to one embodiment, a solid state image sensor has a photoelectric conversion element array, a light collecting optical element array, wavelength-selective elements and a reflecting unit. Wavelength-selective elements pass light of the color which is to be detected, and reflect other colors. The reflecting unit further reflects the light that has been reflected by the wavelength-selective elements. The cell includes photoelectric conversion elements for three different light colors. A microlens serving as a light collecting optical element is arranged corresponding to the cell. The reflecting unit includes at least a first reflecting surface and a second reflecting surface. The first reflecting surface faces the wavelength-selective elements. In every cell, the second reflecting surface is enclosed between wavelength-selective elements and the first reflecting surface.
US09252174B2 Solid-state imaging apparatus and electronic apparatus including shielding members connecting with element isolation regions
There is provided a solid-state imaging apparatus including a plurality of photoelectric conversion regions which photoelectrically convert light incident from a rear surface side of a semiconductor substrate, element isolation regions formed between the plurality of photoelectric conversion regions arranged in a matrix shape, and shielding members formed on upper surfaces of the element isolation regions. The element isolation regions have high impurity concentration regions of a high impurity concentration connected to at least a part of the shielding members.
US09252167B2 Active device array substrate
An active device array substrate includes a flexible substrate, a gate electrode, a dielectric layer, a channel layer, a source electrode, a drain electrode, and a pixel electrode. The flexible substrate has a transistor region and a transparent region adjacent to each other. The gate electrode is disposed on the transistor region. The dielectric layer covers the flexible substrate and the gate electrode. A portion of the dielectric layer disposed on the gate electrode has a first thickness. Another portion of the dielectric layer disposed on the transparent region has a second thickness less than the first thickness. The channel layer is disposed above the gate electrode. The source electrode and the drain electrode are electrically connected to the channel layer. The pixel electrode is disposed on the dielectric layer which is disposed on the transparent region. The pixel electrode is electrically connected to the drain electrode.
US09252163B1 Array substrate, method for manufacturing the same, and display device
In the present disclosure, it is provided an array substrate including a pad area, signal lines arranged on the substrate, conductive connection lines arranged at least on the pad area and directly connected to a flexible circuit, and conductive connection lines arranged at least on the pad area and directly connected to a flexible circuit. The conductive connection lines may be connected to the signal lines through a via hole, and may include a first wire and a second wire electrically connected to each other. The second wire may be arranged in such a manner that a contact area between the conductive connection lines and the flexible circuit is not less than a predetermined threshold when the flexible circuit is displaced in a first direction relative to the first wire. The first direction may be substantially perpendicular to an extending direction of the first wire.
US09252162B2 Active matrix substrate
The lateral electric field liquid crystal display device (1) includes a first insulating layer (5) that has at least one first reflection enhancing film layer which is made up of two films having respective different refractive indexes and being adjacent to each other. From this, it is possible to provide the lateral electric field liquid crystal display device (1) which can reflect incoming light at a reflectance higher than an original reflectance of a reflective electrode.
US09252157B2 Method to form group III-V and Si/Ge FINFET on insulator and integrated circuit fabricated using the method
A method includes providing a structure having a substrate, a first electrically insulating layer overlying the substrate, a first semiconductor layer comprised of a first semiconductor material overlying the first electrically insulating layer, a second electrically insulating layer overlying the first semiconductor layer in a first portion of the structure and a second semiconductor layer comprised of a second, different semiconductor material overlying the second electrically insulating layer in the first portion. The method further includes growing additional first semiconductor material on the first semiconductor layer in a second portion of the structure to form a regrown semiconductor layer; forming fins; forming gate structures orthogonal to the fins and removing at least a portion of the first semiconductor layer in the first portion of the structure to form a void and filling the void with insulating material. Structures formed by the method are also disclosed.
US09252156B2 Conductor structure and method
A method of forming an interlayer conductor structure. The method includes forming a stack of semiconductor pads coupled to respective active layers for a circuit. The semiconductor pads include outside perimeters each having one side coupled to a respective active layer. Impurities are implanted along the outside perimeters to form outside lower resistance regions on the pads. Openings are then formed in the stack of the semiconductor pads to expose a landing area for interlayer conductors on a corresponding semiconductor pad and to define an inside perimeter on at least one of the semiconductor pads. Inside lower resistance regions are formed along the inside perimeters by implanting impurities for interlayer conductor contacts and configured to overlap and be continuous with the corresponding outside lower resistance region.
US09252154B2 Non-volatile memory with silicided bit line contacts
An approach to use silicided bit line contacts that do not short to the underlying substrate in memory devices. The approach provides for silicide formation in the bit line contact area, using a process that benefits from being self-aligned to the oxide-nitride-oxide (ONO) nitride edges. A further benefit of the approach is that the bit line contact implant and rapid temperature anneal process can be eliminated. This approach is applicable to embedded flash, integrating high density devices and advanced logic processes.
US09252153B1 Method of word-line formation by semi-damascene process with thin protective conductor layer
A semi-damascene method is described for fabricating wordlines without stringers while maintaining critical cell dimensions when wordline pitch is less than 40 nm. A thin conducting layer protects a storage layer during manufacture, the thin conducting layer then making contact with filled-in conducting material.
US09252151B2 Three dimensional NAND device with birds beak containing floating gates and method of making thereof
A method of making a monolithic three dimensional NAND string including forming a stack of alternating layers of a first material and a second material over a substrate. The first material comprises an electrically insulating material and the second material comprises a semiconductor or conductor material. The method also includes etching the stack to form a front side opening in the stack, forming a blocking dielectric layer over the stack of alternating layers of a first material and a second material exposed in the front side opening, forming a semiconductor or metal charge storage layer over the blocking dielectric, forming a tunnel dielectric layer over the charge storage layer, forming a semiconductor channel layer over the tunnel dielectric layer, etching the stack to form a back side opening in the stack, removing at least a portion of the first material layers and portions of the blocking dielectric layer.
US09252149B2 Device including active floating gate region area that is smaller than channel area
A device including a drain, a channel, a floating gate, and a control gate. The channel surrounds the drain and has a channel area. The floating gate includes an active floating gate region that has an active floating gate region area. The control gate is coupled to the active floating gate region via a control capacitance, wherein the active floating gate region area is smaller than the channel area.
US09252147B2 Methods and apparatuses for forming multiple radio frequency (RF) components associated with different RF bands on a chip
A method includes forming a first gate oxide in a first region and in a second region of a wafer. The method further includes performing first processing to form a second gate oxide in the second region. The second gate oxide has a different thickness than the first gate oxide. The method also includes forming first gate material of a first device in the first region and forming second gate material of a second device in the second region. The first device corresponds to a first radio frequency (RF) band and the second device corresponds to a second RF band that is different from the first RF band.
US09252134B2 Semiconductor device and structure
An Integrated Circuit device, including: a base wafer including single crystal, the base wafer including a plurality of first transistors; at least one metal layer providing interconnection between the plurality of first transistors; a second layer including a plurality of second transistors, the second layer overlying the at least one metal layer, where the plurality of second transistors include single crystal, and where the second layer includes a through layer via with a diameter of less than 250 nm; a plurality of conductive pads, where at least one of the conductive pads overlays at least one of the second transistors; and at least one I/O circuit, where the at least one I/O circuit is adapted to interface with external devices through at least one of the plurality of conductive pads, where the at least one I/O circuit includes at least one of the first transistors.
US09252133B2 Electrical leakage reduction in stacked integrated circuits having through-silicon-via (TSV) structures
The formation of TSVs (through substrate vias) for 3D applications has proven to be defect dependent upon the type of starting semiconductor substrate employed. In addition to the initial formation of TSVs via Bosch processing, backside 3D wafer processing has also shown a defect dependency on substrate type. High yield of TSV formation can be achieved by utilizing a substrate that embodies bulk micro defects (BMD) at a density between 1e4/cc (particles per cubic centimeter) and 1e7/cc and having equivalent diameter less than 55 nm (nanometers).
US09252130B2 Methods of manufacturing flip chip semiconductor packages using double-sided thermal compression bonding
Methods of producing a semiconductor package using dual-sided thermal compression bonding includes providing a substrate having an upper surface and a lower surface. A first device having a first surface and a second surface can be provided along with a second device having a third surface and a fourth surface. The first surface of the first device can be coupled to the upper surface of the substrate while the third surface of the second device can be coupled to the lower surface of the substrate, the coupling occurring simultaneously to produce the semiconductor package.
US09252125B2 Stacked semiconductor device and fabrication method for same
A stacked semiconductor device is constructed by stacking in two levels: a lower semiconductor device having a wiring board, at least one semiconductor chip mounted on a first surface of the wiring board and having electrodes electrically connected to wiring by way of a connection means, an encapsulant composed of insulating plastic that covers the semiconductor chip and the connection means, a plurality of electrodes formed overlying the wiring of a second surface of the wiring board, and a plurality of linking interconnects each having a portion connected to the wiring of the first surface of the wiring board and another portion exposed on the surface of the encapsulant; and an upper semiconductor device in which each electrode overlies and is electrically connected to the exposed portions of each of the linking interconnects of the lower semiconductor device.
US09252118B2 CMOS-compatible gold-free contacts
A semiconductor metallurgy includes a ratio of germanium and palladium that provides low contact resistance to both n-type material and p-type material. The metallurgy allows for a contact that does not include gold and is compatible with mass-production CMOS techniques. The ratio of germanium and palladium can be achieved by stacking layers of the materials and annealing the stack, or simultaneously depositing the germanium and palladium on the material where the contact is to be manufactured.
US09252116B2 Semiconductor die mount by conformal die coating
A conformal coating on a semiconductor die provides adhesion between the die and a support. No additional adhesive is necessary to affix the die on the support. The conformal coating protects the die during assembly, and serves to electrically insulate the die from electrically conductive parts that the die may contact. The conformal coating may be an organic polymer, such as a parylene, for example. Also, a method for adhering a die onto a support, which may optionally be another die, includes providing a coating of a conformal between the die and the support, and heating the coating between the die and the support. The conformal coating may be provided on a die attach area of a surface of the die, or on a die mount region of a surface of the support, or on both a die attach area of a surface of the die and on a die mount region of a surface of the support; and the conformal coating may be provided following placement of the die on the support.
US09252114B2 Semiconductor device grid array package
A grid array assembly is formed from an electrical insulating material with embedded solder deposits. A first portion of each of the solder deposits is exposed on a first surface of the insulating material and a second portion of each of the solder deposits is exposed on an opposite surface of the insulating material. A semiconductor die is mounted to the first surface of the insulating material and electrodes of the die are connected to the solder deposits with bond wires. The die, bond wires, and the first surface of the insulating material then are covered with a protective encapsulating material.
US09252112B2 Semiconductor package
Provided is a semiconductor package, including: a lower package to which elements are mounted; a metal post connected to the lower package and including at least one metal material portion; and an upper package to which elements is mounted, and which is connected to the metal post via a solder ball.
US09252107B2 Semiconductor package having a metal paint layer
Disclosed are devices and methods related to a conductive paint layer configured to provide radio-frequency (RF) shielding for a packaged semiconductor module. Such a module can include a packaging substrate, one or more RF components mounted on the packaging substrate, a ground plane disposed within the packaging substrate, and a plurality of RF-shielding wirebonds disposed on the packaging substrate and electrically connected to the ground plane. The module can further include an overmold structure formed over the packaging substrate and dimensioned to substantially encapsulate the RF component(s) and the RF-shielding wirebonds. The overmold structure can define an upper surface that exposes upper portions of the RF-shielding wirebonds. The module can further include a conductive paint layer having silver flakes disposed on the upper surface of the overmold structure so that the conductive paint layer, the RF-shielding wirebonds, and the ground plane form an RF-shield for the RF component(s).
US09252103B2 Method for manufacturing semiconductor device
An object is to provide a method for manufacturing a semiconductor device including an oxide semiconductor and having improved electric characteristics. The semiconductor device includes an oxide semiconductor film, a gate electrode overlapping the oxide semiconductor film, and a source electrode and a drain electrode electrically connected to the oxide semiconductor film. The method includes the steps of forming a first insulating film including gallium oxide over and in contact with the oxide semiconductor film; forming a second insulating film over and in contact with the first insulating film; forming a resist mask over the second insulating film; forming a contact hole by performing dry etching on the first insulating film and the second insulating film; removing the resist mask by ashing using oxygen plasma; and forming a wiring electrically connected to at least one of the gate electrode, the source electrode, and the drain electrode through the contact hole.
US09252099B2 Semiconductor device having multilayer wiring structure and manufacturing method of the same
Disclosed is a semiconductor device 1 comprising: a semiconductor chip 10; a multilayer wiring structure 30 stacked on the semiconductor chip 10; and an electronic component 60,80 embedded in the multilayer wiring structure 30.
US09252098B2 Semiconductor apparatus having power through holes connected to power pattern
A semiconductor apparatus includes a multilayer interposer substrate including a power layer as an inner layer; a plurality of connection terminals provided on one surface of the interposer substrate; and a semiconductor chip mounted on the other surface of the interposer substrate. Among power terminals, ground terminals, and signal terminals provided in the semiconductor apparatus, all the power terminals are arranged in one power area and the power area includes only the power terminals.
US09252097B2 Semiconductor memory device
The semiconductor memory device comprises a plurality of first wiring lines extending in a first direction, a plurality of second wiring lines extending in a second direction crossing the first direction, and a memory cell array comprising memory cells, the memory cells being connected to the first wiring lines and second wiring lines in the crossing portions of the first and second wiring lines. A plurality of first dummy-wiring-line regions are formed in the peripheral area around the memory cell array. A contact is formed in the peripheral area, the contact extending in a third direction perpendicular to the first and second directions. A plurality of second dummy-wiring-line regions are formed in the periphery of the contact. The mean value of the areas of the second dummy-wiring-line regions is less than the mean value of the areas of the first dummy-wiring-line regions.
US09252096B2 Wiring substrate and method of manufacturing the same
A wiring substrate includes a core substrate including a first wiring layer, an interlayer insulating layer formed by a resin layer containing fiber reinforcement material formed on the core substrate and a primer layer formed on the resin layer containing fiber reinforcement material, and the interlayer insulating layer having a via hole reaching the first wiring layer, and a second wiring layer formed on the primer layer, and connected to the first wiring layer through the via hole.
US09252094B2 Semiconductor device and method of forming an interconnect structure with conductive material recessed within conductive ring over surface of conductive pillar
A semiconductor device has a semiconductor die with a first conductive layer formed over an active surface of the semiconductor die. An insulation layer is formed over the active surface of the semiconductor die. A second conductive layer is conformally applied over the insulating layer and first conductive layer. Conductive pillars are formed over the first conductive layer. Conductive rings are formed around a perimeter of the conductive pillars. A conductive material is deposited over the surface of the conductive pillars within the conductive rings. A substrate has a third conductive layer formed over a surface of the substrate. The semiconductor die is mounted to a substrate with the third conductive layer electrically connected to the conductive material within the conductive rings. The conductive rings inhibit outward flow of the conductive material from under the conductive pillars to prevent electrical bridging between adjacent conductive pillars.
US09252090B2 Resin package
A resin package includes: a die pad having a main surface on which a semiconductor substrate and a matching circuit substrate is mounted; at least one lead terminal electrically connected to the semiconductor substrate and the matching circuit substrate; a thin plate fixed to at least one of the main surface of the die pad and a main surface of the at least one lead terminal; and molding resin which covers the semiconductor substrate, the matching circuit substrate, and the thin plate.
US09252088B2 Semiconductor device and method of manufacturing the same
A semiconductor device is inhibited from being degraded in reliability. The semiconductor device has a tab including a top surface, a bottom surface, and a plurality of side surfaces. Each of the side surfaces of the tab has a first portion continued to the bottom surface of the tab, a second portion located outwardly of the first portion and continued to the top surface of the tab, and a third portion located outwardly of the second portion and continued to the top surface of the tab to face the same direction as each of the first and second portions. In planar view, the outer edge of the semiconductor chip is located between the third portion and the second portion of the tab, and the outer edge of an adhesive material fixing the semiconductor chip to the tab is located between the semiconductor chip and the second portion.
US09252083B2 Semiconductor chip with power gating through silicon vias
A semiconductor chip includes a substrate having a frontside and a backside coupled to a ground. The chip includes a circuit in the substrate at the frontside. A through silicon via (TSV) having a front-end, a back-end, and a lateral surface is included. The back-end and lateral surface of the TSV are in the substrate, and the front-end of the TSV is substantially parallel to the frontside of the substrate. The chip also includes an antifuse material deposited between the back-end and lateral surface of the TSV and the substrate. The antifuse material insulates the TSV from the substrate. The chip includes a ground layer insulated from the substrate and coupled with the TSV and the circuit. The ground layer conducts a program voltage to the TSV to cause a portion of the antifuse material to migrate away from the TSV, thereby connecting the circuit to the ground.
US09252081B2 Semiconductor device having plural memory chip
A semiconductor device includes a stacked plurality of memory chips. The memory chips each include a plurality of memory banks, a plurality of read/write buses that are assigned to the respective memory banks, and a plurality of penetration electrodes that are assigned to the respective read/write buses and arranged through the memory chip. Penetration electrodes arranged in the same positions as seen in a stacking direction are connected in common between the chips. In response to an access request, the memory chips activate the memory banks that are arranged in respective different positions as seen in the stacking direction, whereby data is simultaneously input/output via the penetration electrodes that lie in different planar positions.
US09252071B2 Assembly including plural through wafer vias, method of cooling the assembly and method of fabricating the assembly
An assembly includes a chip including an integrated circuit, a casing including an integrated circuit and having an upper portion formed on a side of the chip and lower portion formed on another side of the chip, plural through-wafer vias (TWVs) for electrically connecting the integrated circuit of the chip and the integrated circuit of the casing, and a card connected to the casing for electrically connecting the casing to a system board. The card includes an upper card connected to the upper portion of the casing, and a lower card connected to the lower portion of the casing. The upper card includes one of a photosensor, light emitting element, radio frequency (RF) antenna, and radio frequency emitter. The lower card includes an area array input/output.
US09252068B2 Semiconductor package
A semiconductor package with reduced warpage problem is provided, including: a circuit board, having opposing first and second surfaces; a semiconductor chip, formed over a center portion of the first surface of the circuit board; a spacer, formed over a center portion of the semiconductor chip, having a second cross sectional dimension less than that of the first cross sectional dimension; a non-planar shaped heat spreading layer, formed over the spacer; an encapsulant layer, formed, over the circuit board, filling spaces between the non-planar shaped heat spreading layer and the circuit board; and a plurality of solder balls, formed over the second surface of the circuit board.
US09252066B2 Semiconductor device and method of forming interconnect structure for encapsulated die having pre-applied protective layer
A semiconductor device has a protective layer formed over an active surface of a semiconductor wafer. The semiconductor die with pre-applied protective layer are moved from the semiconductor wafer and mounted on a carrier. The semiconductor die and contact pads on the carrier are encapsulated. The carrier is removed. A first insulating layer is formed over the pre-applied protective layer and contact pads. Vias are formed in the first insulating layer and pre-applied protective layer to expose interconnect sites on the semiconductor die. An interconnect structure is formed over the first insulating layer in electrical contact with the interconnect sites on the semiconductor die and contact pads. The interconnect structure has a redistribution layer formed on the first insulating layer, a second insulating layer formed on the redistribution layer, and an under bump metallization layer formed over the second dielectric in electrical contact with the redistribution layer.
US09252065B2 Mechanisms for forming package structure
In accordance with some embodiments, a package structure and a method for forming a package structure are provided. The package structure includes a semiconductor die and a molding compound partially or completely encapsulating the semiconductor die. The package structure also includes a through package via in the molding compound. The package structure further includes an interfacial layer between the through package via and the molding compound. The interfacial layer includes an insulating material and is in direct contact with the molding compound.
US09252064B2 Fingerprint module and manufacturing method for same
A fingerprint module of fingerprint identification chip is provided. The fingerprint module includes a substrate, a fingerprint identification chip, a molding layer, a color layer, and a protecting layer. The substrate includes a pair of surfaces and a plurality of pads. The surfaces are on the opposite sides of the substrate. The pads are exposed on one of the surfaces. The fingerprint identification chip electrically connects with the substrate according to at least a wire. The molding layer disposes on the substrate and covers the fingerprint identification chip and the wire. The color layer disposes on the molding layer. The protecting layer disposes on the color layer.
US09252063B2 Extended contact area for leadframe strip testing
A leadframe strip includes a plurality of unit leadframes connected to a periphery of the leadframe strip, each unit leadframe having a die paddle, a plurality of leads and a semiconductor die attached to the die paddle. The leadframe strip is tested by electrically isolating at least the leads from the periphery of the leadframe strip such that at least some of the leads extend uninterrupted beyond a final lead outline of the unit leadframes after electrical isolation from the periphery of the leadframe strip. The semiconductor dies are tested, which includes probing the die paddles and the leads that extend uninterrupted beyond the final lead outline of the unit leadframes after electrical isolation from the periphery of the leadframe strip. The unit leadframes are severed from the leadframe strip along the final lead outline of the unit leadframes after testing the semiconductor dies.
US09252062B2 Semiconductor device having optical fuse and electrical fuse
A method for manufacturing a stacked semiconductor memory device includes testing a plurality of memory chips to detect first defective addresses, programming optical fuses with first defective address information on each of the plurality of memory chips that have the first defective addresses, stacking the plurality of memory chips, testing the stacked memory chips to detect second defective addresses, and programming electrical fuses with second defective address information.
US09252061B2 Overlay mark dependent dummy fill to mitigate gate height variation
A method of forming dummy structures and an overlay mark protection zone over an active layer zone based on the shape of an overlay mark and the resulting device are provided. Embodiments include determining a size and a shape of an overlay mark; determining a size and a shape of an overlay mark protection zone based on the shape of the overlay mark; determining a shape of a plurality of dummy structures based on the shape of the overlay mark; determining a size and a shape of an active layer zone based on the size and the shape of the overlay mark and the plurality of dummy structures; forming the active layer zone in an active layer of a semiconductor substrate; forming the overlay mark and the plurality of dummy structures over the active layer zone in a poly layer of the semiconductor substrate; and planarizing the poly layer.
US09252060B2 Reduction of OCD measurement noise by way of metal via slots
The present disclosure provides a semiconductor device. The semiconductor device includes a substrate and an interconnect structure disposed over the substrate. The interconnect structure includes a plurality of interconnect layers. One of the interconnect layers contains: a plurality of metal via slots and a bulk metal component disposed over the plurality of metal via slots. The present disclosure also provides a method. The method includes providing a wafer, and forming a first layer over the wafer. The method includes forming an interconnect structure over the first layer. The forming the interconnect structure includes forming a second interconnect layer over the first layer, and forming a third interconnect layer over the second interconnect layer. The second interconnect layer is formed to contain a plurality of metal via slots and a bulk metal component formed over the plurality of metal via slots. The third interconnect layer contains one or more metal trenches.
US09252059B2 Method for manufacturing semiconductor device
A method for manufacturing a semiconductor device that comprises two opposite types of MOSFETs formed on one semiconductor substrate, comprising: defining an active region for each of the MOSFETs on the semiconductor substrate; forming an interfacial oxide layer on a surface of the semiconductor substrate; forming a high-K gate dielectric layer on the interfacial oxide layer; forming a metal gate layer on the high-K gate dielectric layer; implanting dopant ions in the metal gate layer; forming a Poly-Si layer on the metal gate layer; patterning the Poly-Si layer, the metal gate layer, the high-K gate dielectric layer and the interfacial oxide layer to form a plurality of gate stack structures; forming a plurality of gate spacer surrounding each of the plurality of gate stack structures; and forming a plurality of S/D regions. During activation annealing for forming the S/D regions, the dopant ions implanted in the metal gate layer diffuse and accumulate at an upper interface of the high-K gate dielectric layer to change the characteristics of the metal gates, and at a lower interface of the high-K gate dielectric layer to form electric dipoles with appropriate polarities by interfacial reaction, so as to realize adjusting of the effective work functions of the metal gates of the opposite types of MOSFETs, respectively.
US09252056B2 Substrate dividing method
A substrate dividing method which can thin and divide a substrate while preventing chipping and cracking from occurring. This substrate dividing method comprises the steps of irradiating a semiconductor substrate 1 having a front face 3 formed with functional devices 19 with laser light while positioning a light-converging point within the substrate, so as to form a modified region including a molten processed region due to multiphoton absorption within the semiconductor substrate 1, and causing the modified region including the molten processed region to form a starting point region for cutting; and grinding a rear face 21 of the semiconductor substrate 1 after the step of forming the starting point region for cutting such that the semiconductor substrate 1 attains a predetermined thickness.
US09252045B2 Method for manufacturing a composite wafer having a graphite core
A composite wafer including a carrier substrate having a graphite core and a monocrystalline semiconductor substrate or layer attached to the carrier substrate and a corresponding method for manufacturing such a composite wafer is provided.
US09252040B2 Electrostatic chuck
To provide an electrostatic chuck, including: a ceramic dielectric substrate having a first major surface on which an object to be processed is mounted, and a second major surface on a side opposite the first major surface, the ceramic dielectric substrate being a polycrystalline ceramic sintered body; and an electrode layer interposed between the first major surface and the second major surface of the ceramic dielectric substrate, the electrode layer being integrally sintered with the ceramic dielectric substrate, the ceramic dielectric substrate including a first dielectric layer between the electrode layer and the first major surface, and a second dielectric layer between the electrode layer and the second major surface, and at least the first dielectric layer of the ceramic dielectric substrate having an infrared spectral transmittance in terms of a thickness of 1 millimeter (mm) of not less than 20%.
US09252034B2 Substrate processing system and substrate transferring method
A substrate processing system and substrate transferring method is capable of improving substrate-transferring efficiency by transferring a substrate bi-directionally through a substrate transferring device between two rows of processing chambers, and transferring the substrate to a precise position by rotating the substrate transferring device. The processing system includes a transfer chamber, a bi-directional substrate transferring device; and processing chambers which apply a semiconductor-manufacturing process to the substrate. The processing chambers are linearly arranged along two confronting rows, and the transfer chamber is between the two rows of processing chambers. The substrate transferring device includes a moving unit inside the transfer chamber; a bi-directional substrate transferring unit in the moving unit, that transfers the substrate to the processing chamber through a bi-directional sliding movement; and a rotating unit between the moving unit and the bi-directional substrate transferring unit, that rotates the bi-directional substrate transferring unit at a predetermined angle.
US09252032B2 Semiconductor device and method of stacking semiconductor die in mold laser package interconnected by bumps and conductive vias
A semiconductor wafer contains a plurality of first semiconductor die. The semiconductor wafer is mounted to a carrier. A channel is formed through the semiconductor wafer to separate the first semiconductor die. A second semiconductor die is mounted to the first semiconductor die. An encapsulant is deposited over the carrier and first semiconductor die and into the channel while a side portion and surface portion of the second semiconductor die remain exposed from the encapsulant. A first conductive via is formed through the encapsulant in the channel. A second conductive via is formed through the encapsulant over a contact pad of the first semiconductor die. A conductive layer is formed over the encapsulant between the first and second conductive vias. An insulating layer is formed over the conductive layer and encapsulant. The carrier is removed. An interconnect structure is formed over the first conductive via.
US09252029B2 Thermal interface material on package
A packaged assembly is disclosed, including thermal interface material dispensed on an organic package and methods of manufacturing. The method includes dispensing a thermal interface material (TIM) on an electronic assembly. The method further includes removing volatile species of the TIM, prior to lid placement on the electronic assembly. The method further includes placing the lid on the TIM, over the electronic assembly. The method further includes pressing the lid onto the electronic assembly.
US09252028B2 Power semiconductor module and method of manufacturing the same
A power semiconductor module has a first frame portion, a power semiconductor element, a second frame portion, a control integrated circuit, a wire, and an insulator portion. The power semiconductor element is mounted on a first surface of the first frame portion. The control integrated circuit is mounted on a third surface of the second frame portion for controlling the power semiconductor element. A wire has one end connected to the power semiconductor element and the other end connected to the control integrated circuit. The first surface of the first frame portion and the third surface of the second frame portion are located at the same height in a direction vertical to the first surface of the first frame portion.
US09252027B1 Method of forming pattern, manufacturing method of semiconductor device and template
In accordance with an embodiment, a method of forming a pattern includes forming a first layer on a fabrication target film, making a mold and the first layer push each other to form a protrusion on the fabrication target film, and forming first and second regions, forming a block copolymer layer including first and second blocks in the first and second regions, phase-separating the block copolymer layer, forming second and third layers in the first region, and forming fourth and fifth layers in the second region; and removing the third and fifth layers. The first region is surrounded by the first layer and the protrusion. The second region is surrounded by the first layer and contacts the first region via the protrusion. The third layer is surrounded by the second layer. The fifth layer is surrounded by the fourth layer.
US09252025B2 Method for manufacturing silicon single crystal wafer and electronic device
According to the present invention, there is provided a method for manufacturing a silicon single crystal wafer, wherein a first heat treatment for holding a silicon single crystal wafer in an oxygen containing atmosphere at a first heat treatment temperature for 1 to 60 seconds and cooling it to 800° C. or less at a temperature falling rate of 1 to 100° C./second by using a rapid heating/rapid cooling apparatus is performed to inwardly diffuse oxygen and form an oxygen concentration peak region near a surface of the silicon single crystal wafer, and then a second heat treatment is performed to agglomerate oxygen in the silicon single crystal wafer into the oxygen concentration peak region. As a result, it is possible to provide the method for manufacturing a silicon single crystal wafer that enables forming an excellent gettering layer close to a device forming region.
US09252022B1 Patterning assist feature to mitigate reactive ion etch microloading effect
A method of fabricating a semiconductor device includes forming a masking layer on an upper surface of a semiconductor substrate. The masking layer is patterned to form at least one masking element that designates an active region of the semiconductor substrate and at least one patterning assist feature adjacent the at least one masking element. An etching process is performed to form a plurality of semiconductor fins on the semiconductor substrate. The plurality of semiconductor fins include at least one isolated fin formed on the active region according to the at least one masking element and at least one sacrificial fin formed according to the patterning assist feature that reduces a loading effect that occurs during the etching process.
US09252019B2 Semiconductor device and method for forming the same
A system and method for forming and using a liner is provided. An embodiment comprises forming an opening in an inter-layer dielectric over a substrate and forming the liner along the sidewalls of the opening. A portion of the liner is removed from a bottom of the opening, and a cleaning process may be performed through the liner. By using the liner, damage to the sidewalls of the opening from the cleaning process may be reduced or eliminated. Additionally, the liner may be used to help implantation of ions within the substrate.
US09252013B2 Methods and articles including nanomaterial
A method of depositing a nanomaterial onto a donor surface comprises applying a composition comprising nanomaterial to a donor surface. In another aspect of the invention there is provided a method of depositing a nanomaterial onto a substrate. Methods of making a device including nanomaterial are disclosed. An article of manufacture comprising nanomaterial disposed on a backing member is disclosed.
US09252010B2 Method for processing structure in manufacturing semiconductor device
A method used for processing a structure in manufacturing of a semiconductor device may include polishing the structure to form a polished structure. The polished structure may include a metal member, a dielectric layer that contacts the metal member, and a particle that contacts at least one of the metal member and the dielectric layer. The method may further include applying an organic acid to the polished structure to remove at least a portion of the particle. The particle may be substantially removed, such that satisfactory quality of the semiconductor may be provided.
US09252006B2 Incandescent bulb, filament, and method for manufacturing filament
An object of the present invention is to provide a filament showing improved conversion efficiency with a simple configuration. According to the present invention, surface of a filament material processed into a predetermined shape is processed into a mirror surface by mechanical polishing, and surface roughness (center line average roughness Ra) thereof is thereby made to be 1 μm or smaller. Reflectance of the filament can be thereby improved, and emissivity of the filament for lights of the infrared wavelength region can be suppressed.
US09252004B2 Ionization device, mass spectrometry apparatus, mass spectrometry method, and imaging system
A mass spectrometry apparatus includes a holding table that holds a specimen to be ionized, a probe that identifies a portion of the specimen to be ionized, an ion extraction electrode that extracts ions obtained by ionizing the specimen, a liquid supplying unit that supplies liquid to between the specimen and the probe to form a liquid bridge between the specimen and the probe, a vibrating unit that vibrates one of the probe and the holding table, an electric field generating unit that generates an electric field between the probe and the ion extraction electrode, a mass spectrometry unit that mass analyzes ions extracted by the ion extraction electrode, and a synchronization unit configured to synchronize a time at which ions are generated from the portion with a time at which the mass spectrometry unit measures the ions.
US09252003B2 Absolute quantitation of proteins and protein modifications by mass spectrometry with multiplexed internal standards
A method for absolute protein or peptide quantitation by mass spectroscopy. A sample containing a protein or peptide of interest is prepared for mass spectroscopy analysis. The sample is subjected to mass spectroscopy analysis at low resolution whereby a single additive mass spectroscopy peak is obtained, then is subjected to high resolution mass spectroscopy analysis whereby a plurality of mass spectroscopy peaks are obtained. The intensity of each of the plurality of mass spectroscopy peaks is quantitated either by comparison to an internal standard set, or by using a standard curve generated for each isotopologue set. Quantitation using a standard curve enhances quantitation across a dynamic range of analyte.
US09252001B2 Plasma processing apparatus, plasma processing method and storage medium
A plasma processing apparatus includes a first electrode and a second electrode so arranged in the upper portion of a processing chamber as to face a mounting table, a gas supply unit for supplying a processing gas between the first electrode and the second electrode, a RF power supply unit for applying a RF power between the first electrode and the second electrode for converting the process gas supplied between the electrodes into a plasma, and a gas exhaust unit for evacuating the inside of the processing chamber to a vacuum level from the lower portion of the processing chamber. Since the electron temperature in the plasma is low near a substrate on the mounting table, damage to the substrate caused by the plasma can be suppressed. In addition, since a metal can be used as a material for the processing chamber, the processing chamber can have good temperature controllability.
US09251999B2 Capacitively-coupled plasma processing system having a plasma processing chamber for processing a substrate
A capacitively-coupled plasma processing system having a plasma processing chamber for processing a substrate is provided. The plasma processing system includes at least an upper electrode and a lower electrode for processing the substrate, the substrate being disposed on the lower electrode during plasma processing. The plasma processing system further includes means for providing at least a first RF signal to the lower electrode, the first RF signal having a first RF frequency. The first RF signal couples with a plasma in the plasma processing chamber, thereby inducing an induced RF signal on the upper electrode. The plasma processing system further includes means for rectifying the induced RF signal to generate a rectified RF signal such that the rectified RF signal is more positively biased than negatively biased, wherein the substrate is configured to be processed while the rectified RF signal is provided to the upper electrode.
US09251996B2 Charged particle beam device, position adjusting method for diaphragm, and diaphragm position adjusting jig
In a charged particle beam device that performs observation of a sample under a gas environment in atmospheric pressure or pressure substantially equal to the atmospheric pressure, a diaphragm that separates an atmospheric pressure space, in which the sample is placed, and a vacuum space in an interior of an electron optical lens barrel is made very thin in order to allow an electron beam to transmit therethrough and damaged with a high possibility. Although at the time of replacing the diaphragm, it is necessary to adjust a position of a diaphragm, it is impossible to easily perform the adjustment of the position of the diaphragm by a conventional method. In a charged particle beam device with a configuration in which a thin film that separates a vacuum environment and an atmospheric environment or a gas environment is employed, a detachable diaphragm that partitions a space, in which a sample is placed, in such a manner that pressure in the space in which the sample is placed is maintained at a level larger than pressure in an interior of a housing, and that allows transmission or passage of a primary charged particle beam therethrough, and a movable member that can move the diaphragm in a state where the pressure in the space, in which the sample is placed, and the pressure in the interior of the housing are maintained as they are, are provided.
US09251993B2 X-ray tube and anode target
According to one embodiment, an X-ray tube including an electron emission source which emits an electron, an anode target which comprises a target layer emitting an X-ray by the electron from the electron emission source, and a substrate supporting the target layer and composed from a carbide-strengthened molybdenum alloy, an evacuated outer surrounding envelope which contains the electron emission source and the anode target, a diffusion barrier layer which is integrally formed with the substrate by a powder metallurgy method on a part of a top surface of the substrate and is composed of a high-melting-point metal lacking of carbon-element content compared with carbon-element content in the substrate, and a thermal radiation film which is formed on at least a part of a top surface of the diffusion barrier layer and composed of metallic oxide.
US09251990B2 Method for producing a thermoelectron emission source and method for producing a cathode
A method for producing a thermoelectron emission source for an electron gun used in an electron beam writing apparatus, the thermoelectron emission source producing method comprising, preparing a first material that emits a thermoelectron, coating the first material with a second material having a work function larger than that of the first material, exposing the first material from part of the second material by machine processing, and decreasing a diameter of the exposed portion of the first material by heating treatment when the diameter of the exposed portion is larger than a predetermined diameter value.
US09251987B2 Emission surface for an X-ray device
Embodiments of the disclosure relate to electron emitters for use in conjunction with X-ray devices. In one embodiment, the emitter features a round emission area capable of emitting electrons when heated, wherein the round emission area comprises at least one of a gap, a channel, or a combination thereof that separates a first portion of the round emission area from a second portion of the round emission area and permits thermal expansion of the first portion and the second portion within the at least one gap or channel without permitting the first portion and the second portion to touch one another. The two electrically conductive legs coupled to the surface at respective locations outside the round emission area and that are capable of supplying current to the round emission area.
US09251986B2 Rechargeable battery
A rechargeable battery includes a case, an electrode assembly in the case, a current collecting member electrically connected to the electrode assembly, a fuse part in the current collecting member, and an elastic member adjacent to the fuse part. The elastic member is configured to provide an elastic force to the fuse part.
US09251974B2 Thin key structure and pressable module thereof
A thin key structure includes a circuit module, a frame having has a retaining portion, an elastic member disposed on the circuit module and arranged in the frame, and a pressable module having a positioning sheet and a key. The positioning sheet has an assembling portion installed on the frame, a connecting portion, and an extending portion connecting there-between. The key has a key body fixed on the connecting portion and a stopping portion extended from the key body. The key body has a concaving portion aligning the extending portion. The stopping portion is movably arranged in the retaining portion. When non-center portion of the key body is pressed, part of the stopping portion, away from the pressed portion of the key body, abuts against the corresponding retaining portion for being a fulcrum, such that the pressed portion of the key body rotates to press the elastic member.
US09251973B2 Push button switch and electronic apparatus using same
A switch includes a switch main body having a movable section displaceable downward by pressure to bring a movable contact into contact with a fixed contact, the movable section being displaced upward to open each contact by a release of pressure; a button section that presses the movable section in response to a downward pressing operation; and a support arm having one end portion supporting the button section. An end of the support arm not coupled to the button section is turnable and held at a location in a support surface arranged vertically. The button section bottom surface is inclined and separated from the movable section when the button section is not pressed. When the button section is pressed and is lowered to a position at which the fixed contact and the movable contact are closed, the bottom surface is in an approximately horizontal state and presses the movable section.
US09251972B2 Electric switching device and related electric apparatus
An electric switching device for an electric circuit, including at least one electric phase having at least one circuit breaking unit associated with a disconnector unit. The circuit breaker unit including a circuit breaker movable contact configured to be actuated between a closed position and an open position with respect to a corresponding circuit breaker fixed contact. The disconnector unit includes at least one disconnector movable contact configured to be actuated between a connection position and a disconnection position with respect to a corresponding disconnector fixed contact. A casing that includes an insulating shell coupled to a metal shell. The casing houses at least the circuit breaker unit and the associated disconnector unit of said at least one electric phase.
US09251968B2 Free-standing hybrid nanomembrane as energy storage electrode and the fabrication method thereof
Disclosed is a free-standing hybrid nanomembrane capable of energy storage. The free-standing hybrid nanomembrane includes carbon nanotube sheets and a conducting polymer coated on the carbon nanotube sheets. The carbon nanotube sheets are densified sheets formed by evaporating an alcohol from carbon nanotube aerogel sheets. The conducting polymer is coated on the carbon nanotube sheets by vapor phase polymerization. Further disclosed is a method for fabricating the free-standing hybrid nanomembrane.
US09251962B2 Dye-sensitized solar cell module using thin glass substrate and method of manufacturing the same
Disclosed are a dye-sensitized solar cell module and a method of manufacturing the same. The dye-sensitized solar cell module includes a working electrode formed by stacking a collector and a photo-electrode to which a dye is adsorbed on a transparent conductive substrate; a counter electrode formed by stacking a collector and a catalytic electrode on a transparent conductive substrate; and an electrolyte filled in a space between the working electrode and the counter electrode sealed by a sealant. A glass substrate for the working electrode of glass substrates forming the transparent conductive substrates for the electrodes is a thin glass plate substrate thinner than the glass substrate for the working electrode.
US09251955B2 PZT-based ferroelectric thin film and method of forming the same
A PZT-based ferroelectric thin film is formed by coating a PZT-based ferroelectric thin film-forming composition on a lower electrode of a substrate one or two or more times, pre-baking the composition, and baking the composition to be crystallized, and this thin film includes PZT-based particles having an average particle size in a range of 500 nm to 3000 nm when measured on a surface of the thin film, in which heterogeneous fine particles having an average particle size of 20 nm or less, which are different from the PZT-based particles, are precipitated on a part or all of the grain boundaries on the surface of the thin film.
US09251952B2 Method for manufacturing laminated coil devices
A method of manufacturing a laminated coil device includes conductors for forming coils and insulation stacking for forming laminated bodies, and further includes the steps of: (A) manufacturing ceramic insulating thin sheets; (B) forming ceramic insulating thin sheets with conductive through-holes; (C) manufacturing coil thin sheets with coil conductors so as to embed the coil conductors inside the ceramic insulating thin sheets; (D) orderly stacking and cutting ceramic insulating thin sheets and coil thin sheets with coil conductors into unit sizes in order to obtain laminated bodies; (E) heating the laminated bodies in order to remove the binder, and then sintering the laminated bodies; (F) coating the conductive paste on the two ends of the laminated bodies so as to form external electrodes. Thus, the present invention is to provide a manufacturing method of producing a laminated coil power device with low direct current resistance, no delamination, no air space, and no lamination cracking.
US09251948B2 High efficiency on-chip 3D transformer structure
A transformer structure includes a first coil having two sections of spiral, with a top section including a plurality of metal layers occupying top X metal layers and a bottom section including a plurality of metal layers occupying bottom Z metal layers, where X and Z represent a number of metal layers having a specific number selected to provide a particular performance of the first coil. A second coil of the transformer is disposed between the two sections of the first coil and includes a plurality of metal layers where Y represents a number of vertically adjacent metal layers, with the specific number chosen to provide the particular performance, such that a sum X+Y+Z represents a total number of vertical metal layers for the transformer structure.
US09251947B2 Liquid cooling arrangement of an inductive component and a method for manufacturing an inductive component
The object of the invention is a liquid cooling arrangement of an inductive component and a method for manufacturing the inductive component. The inductive component comprises at least a core (1) assembled from separate structural elements (7, 7a, 7b) as well as liquid cooling ducts (8a) integrated into the core (1) for the purpose of liquid cooling and a winding structure (3) around the core (1). The core (1) is assembled from subassemblies formed from structural elements (7, 7a, 7b), which subassemblies are separately composed of e.g. vertical pillars (35), a top horizontal beam (36) and a bottom horizontal beam (37), and cooling liquid ducts (8a) or cooling liquid pipes (10) are placed in at least a part of the subassemblies before final assembly of the core (1).
US09251943B2 Multilayer type inductor and method of manufacturing the same
There is provided a multilayer type inductor, including: an inductor main body; a coil part having conductive circuits and conductive vias formed in the inductor main body; and external electrodes formed on both ends of the inductor main body, wherein in the inductor main body, at least parts around the conductive circuits and the conductive vias are formed of a ferrite material or a non-magnetic material.
US09251940B2 Inductor
An inductor includes a first core, a conducting wire, a second core and a first lead frame. There is an accommodating space formed on a first side of the first core and there is a recess portion formed on a second side of the first core, wherein the first side is opposite to the second side. The first core has a first height. The conducting wire is disposed in the accommodating space. The second core is disposed on the first side of the first core and covers the accommodating space. The first lead frame has an embedded portion embedded in the recess portion. The embedded portion has a second height. After embedding the embedded portion in the recess portion of the first core, a total height of the embedded portion and the first core is smaller than the sum of the first height and the second height.
US09251936B2 Resistor and method for making same
A metal strip resistor is provided. The metal strip resistor includes a metal strip forming a resistive element and providing support for the metal strip resistor without use of a separate substrate. There are first and second opposite terminations overlaying the metal strip. There is plating on each of the first and second opposite terminations. There is also an insulating material overlaying the metal strip between the first and second opposite terminations. A method for forming a metal strip resistor wherein a metal strip provides support for the metal strip resistor without use of a separate substrate is provided. The method includes coating an insulative material to the metal strip, applying a lithographic process to form a conductive pattern overlaying the resistive material wherein the conductive pattern includes first and second opposite terminations, electroplating the conductive pattern, and adjusting resistance of the metal strip.
US09251933B2 Superconducting joints
A superconducting joint and a cooling surface are provided as a combination. The superconducting joint joins superconducting wires each comprising superconducting filaments electrically joined together. The cooling surface comprises a thermally and electrically conductive material. An electrically isolating surface coating is provided on the cooling surface. The superconducting joint, the surface coating and the cooling surface are in thermal contact. The superconducting joint is electrically isolated from the cooling surface by the surface coating. The tails of the superconducting wires are wrapped around the electrically isolating surface coating.
US09251931B2 NbTi superconductor with peripherally distributed Al block for weight reduction
A superconducting wire (1; 31), contains NbTi superconducting material and Cu, with one enclosing tube (2), in particular, a copper enclosing tube. At least three Al blocks (3a-3c) are disposed peripherally distributed in the enclosing tube (2) and at least three sections containing NbTi (4a-4c) are also disposed peripherally distributed in the enclosing tube (2) and separate the Al blocks (3a-3c) from one another in the peripheral direction. The Al blocks (3a-3c) each make large-surface contact with their adjacent sections containing NbTi (4a-4c). A stabilized NbTi superconducting wire is thereby provided, which has low weight and which can be manufactured at low cost. The superconducting wire has a reduced risk of crack formation, in particular, during wire drawing.
US09251930B1 Segmented shields for use in communication cables
Cables incorporating discontinuous shields are described. A cable may include at least one twisted pair of individually insulated conductors, and a shield may be formed around the at least one twisted pair. The shield may include a plurality of segments positioned along a longitudinal direction of the cable. Each segment may include electrically conductive material, and each segment electrically isolated from the other segments. Additionally, a respective overlap may be formed between adjacent segments along a shared longitudinal edge. A jacket may be formed around the at least one twisted pair and the shield.
US09251926B2 Collective conductor and method for producing collective conductor
A collective conductor includes a plurality of conductive wires that is arranged collectively; and a copper foil that is wound around the collectively-arranged conductive wires and fusion-bonded to the conductive wires, and the copper foil has a tin plating on the side in contact with the conductive wires.
US09251925B2 Conductive paste for external electrodes and multilayer ceramic electronic component using the same
There are provided a conductive paste for external electrodes and a multilayer ceramic electronic component using the same. The conductive paste includes a conductive metal powder including conductive metal particles; and a conductive amorphous metal powder including amorphous metal particles having a(Si, B)-b(Li, K)-c(V, Mn) in which a+b+c=100, 20≦a≦60, 10≦b≦40, and 2≦c≦25 are satisfied.
US09251924B2 Elastomeric conductive materials and processes of producing elastomeric conductive materials
Processes for the preparation of elastomeric conductive material, involving combining at least one conductive polymer with rubber latex, at least one organic acid, at least one oxidant, a pH stabilizer, optionally an organic solvent, and optionally at least one surfactant. Also disclosed are elastomeric conductive materials produced by such processes, which exhibit excellent strength, elasticity, and conductivity.
US09251923B2 Varnish containing good solvent and poor solvent
A varnish comprising a ground substance consisting of a polymer or oligomer of 200 to 50′104 molecular weight or organic compound of 200 to 1000 molecular weight and a solvent containing a good solvent and a poor solvent whose boiling point (under 760 mmHg) is at least 20° C. lower than that of the good solvent, wherein the ground substance is dissolved in the solvent. Any thin film prepared from this varnish is substantially from generation of foreign matter, so that it can appropriately be used as thin films for electronic devices and those for use in other technical fields.
US09251920B2 In-situ and external nuclear reactor severe accident temperature and water level probes
A system for monitoring a state of a reactor core in a nuclear reactor may include an internal monitoring device located inside the reactor core, the internal monitoring device including one or more internal sensor arrays configured to take measurements of conditions of the reactor core at different vertical regions within the reactor core to generate internal measurement data; an external monitoring device located in the reactor structure outside the reactor core, the external monitoring device including one or more external sensor arrays configured to take measurements of conditions of the reactor core at positions outside the reactor core corresponding the plurality of different vertical regions within the reactor core to generate external measurement data, and a transmitter configured to wirelessly transmit the external measurement data; and a receiver station configured to determine a state of the reactor core based on the external and internal measurement data.
US09251919B2 Pressurized water reactor
The pressurized water reactor according an embodiment comprises: a cylindrical reactor pressure vessel (1) to which inlet nozzles are connected; fuel assemblies which are contained within the reactor pressure vessel (1); a cylindrical reactor core barrel (3) which surrounds the fuel assemblies and forms an annular downcomer (6) between the reactor core barrel (3) and the inner surface of the reactor pressure vessel (1); and radial supports. The radial supports are supports which are arranged below the downcomer (6) at intervals in the circumferential direction, each has vertical flow path formed therein, and position the reactor core barrel (3) and the reactor pressure vessel (1). The radial supports each has, for example, a flow path-equipped radial keys (21) and a key groove member (40).
US09251918B2 Semiconductor memory device
A semiconductor memory device includes: a bank including a normal area including normal columns, and a redundancy area including redundancy columns and to be replaced with a failure column of the normal area; sense amplifiers connected to the normal area; and a redundancy sense amplifier connected to the redundancy area. A normal replacement unit is formed of normal columns allocated to each of the sense amplifiers. A redundancy replacement unit is formed of redundancy columns allocated to the redundancy sense amplifier. The redundancy replacement unit is smaller than the normal replacement unit.
US09251916B2 Integrated clock architecture for improved testing
A computer system includes a first on-chip controller and a second on-chip controller, both connected to a control element. In normal operation, the first and second on-chip controllers operate in different clock domains. During testing, the control element causes each on-chip controller to generate a substantially similar clock signal. The substantially similar clock signals are used to test substantially similar test circuitry connected to each on-chip controller, thereby reducing overhead associated with testing. A delay may be incorporated into the path of the clock signal of one of the on-chip controllers to reduce instantaneous power draw during testing.
US09251913B2 Infrastructure for performance based chip-to-chip stacking
A method and system for an infrastructure for performance-based chip-to-chip stacking are provided in the illustrative embodiments. A critical path monitor circuit (infrastructure) is configured to launch a signal from a launch point in a first layer, the first layer being a first circuit. The infrastructure is further configured to create an electrical path to a capture point. The signal is launched from the launch point in the first layer. A performance characteristic of the electrical path is measured, resulting in a measurement, wherein the measurement is indicative of a performance of the first layer when stacked with a second layer in a 3D stack without actually stacking the first and the second layers in the 3D stack, the second layer being a second circuit.
US09251911B2 Shift register circuit
A shift register circuit includes first-type and second-type shift registers, each comprising a pull-down control circuit, a pull-down circuit, a key pull-down circuit, a 3D-mode pull-up circuit, and a 2D-mode pull-up circuit. The pull-down circuit is connected to the pull-down control circuit. The key pull-down circuit, connected to the pull-down circuit, pulls down a driving signal and a gate control signal. When the 2D-mode pull-up circuit operates, a first-type shift register generates a driving signal for a second-type shift register. When the 3D-mode pull-up circuit operates, a first-type shift register generates another driving signal for another first-type shift register.
US09251907B2 Memory devices and methods of operating memory devices including applying a potential to a source and a select gate between the source and a string of memory cells while performing a program operation on a memory cell in the string
Devices, systems and methods of biasing in memory devices facilitate memory device programming and/or erase operations. In at least one embodiment, a first string of memory cells comprising a selected memory cell and a second string of memory cells are coupled to a common data line and a common source where the data line and the source are biased to substantially the same potential during a programming and/or erase operation performed on one or more of the strings of memory cells.
US09251904B2 Nonvolatile memory device and memory system including the same
A nonvolatile memory device may include a memory cell array which is arranged in rows and columns and has multi-level memory cells; a voltage generator providing a plurality of read voltages to a selected row of the memory cell array; and control logic performing a plurality of page read operations using the read voltages. A first read voltage and a second read voltage among the plurality of read voltages are each associated with a higher probability of occurrence of a bit read error than at least one other read voltage among the plurality of read voltages. The control logic uses the first read voltage and the second read voltage in different page read operations than each other.
US09251902B2 Semiconductor storage device
The semiconductor storage device of the embodiment includes memory cells. Word lines are connected to the memory cells. Bit lines are connected to the memory cells. A sense amplifier unit is connected to the bit lines. A data write operation includes a first write loop and a second write loop. The first write loop includes a first program operation and a first verify operation. The second write loop includes a second program operation and a second verify operation. A maximum value of a consumed current in the first verify operation is substantially equal to a maximum value of the consumed current in the second verify operation. The consumed current in the first verify operation is substantially same as the consumed current in the second verify operation if data input in the data write operation is all equal to first data corresponding to an erasure state.
US09251901B2 Semiconductor memory device with high threshold voltage distribution reliability method
A semiconductor memory device includes: a memory array including a plurality of memory cells; and a peripheral circuit configured to change a voltage level of a bit line connected to a program target cell according to a threshold voltage of the program target cell among the memory cells during a program operation.
US09251900B2 Data scrambling based on transition characteristic of the data
A method of storing data includes receiving data to be written to a memory device. The method includes selecting a scrambling operation from at least a first scrambling operation and a second scrambling operation. The scrambling operation is selected based on a transition characteristic associated with the data. The method includes scrambling the data according to the selected scrambling operation and storing the scrambled data in the memory device. Additionally, the method may include descrambling the scrambled data to produce descrambled data.
US09251892B1 Memory system and method of controlling nonvolatile memory
According to an embodiment, a controller specifies a first voltage range that has a first distribution quantity, a second voltage range that is adjacent to a lower voltage side of the first voltage range, and a third voltage range that is adjacent to a higher voltage side of the first voltage range. The first distribution quantity is a minimum value of the memory cells. The controller determines a read voltage by using the first voltage range, a first representative voltage value in the first voltage range, the first distribution quantity, a second distribution quantity corresponding to the second voltage range, and a third distribution quantity corresponding to the third voltage range.
US09251887B2 Static random access memory system and operation method thereof
A static random access memory system includes a static random access memory, a multiplexer, an input buffer, an output buffer, and a shifter. The input buffer writes write data stored in the input buffer to addresses of the static random access memory corresponding to a write address signal according to a write command. The output buffer reads read data of addresses of the static random access memory corresponding to a read address signal according to a read command. The multiplexer transmits the write address signal and the read address signal to the static random access memory, and generates the write command and the read command. The shifter shifts the write command to an operation clock behind the read command when the write command and the read command exist simultaneously.
US09251885B2 Throttling support for row-hammer counters
Throttling of memory access commands. Accesses to rows of a memory device are monitored for a timeframe. The timeframe is divided into at least two sub-frames. If the number of accesses for any of the rows during a first sub-frame exceeds a first threshold throttling accesses to the accessed row at a first rate. Not throttling accesses to the accessed row if the number of accesses to the accessed row does not exceed the first threshold. The first threshold is associated with risk of data corruption on a row physically adjacent to the accessed row. If a number of accesses for the accessed row during a second sub-frame exceeds a second threshold, throttling accesses to the accessed row at a second rate. Not throttling accesses to the accessed row if the number of accesses to the accessed row does not exceed the second threshold. The second threshold is greater than the first threshold. The second throttling rate is greater than the first throttling rate.
US09251882B2 Magnetic random access memory with dynamic random access memory (DRAM)-like interface
A memory device includes a magnetic memory unit for storing a burst of data during burst write operations, each burst of data includes, sequential data units with each data unit being received at a clock cycle, and written during a burst write operation, wherein the burst write operation is performed during multiple clock cycles. Further, the memory device includes a mask register coupled to the magnetic memory unit that generates a write mask during the burst write operation to inhibit or enable data units of write data, furthermore the memory device allowing burst write operation to begin while receiving data units of the next burst of data to be written or providing read data.
US09251878B2 Nonvolatile memory device and related wordline driving method
A nonvolatile memory device comprises multiple memory blocks each comprising multiple memory cells arranged at intersections of wordlines and bitlines, an address decoder configured to electrically connect first lines to wordlines of one of the memory blocks in response to an address, a line selection switch circuit configured to electrically connect the first lines to second lines in different configurations according to the address, a first line decoder configured to provide the second lines with wordline voltages needed for driving, and a voltage generator configured to generate the wordline voltages.
US09251876B1 Retiming programmable devices incorporating random access memories
A method of retiming a circuit that includes a RAM having data stored therein, a register following the RAM, and registers preceding the RAM for registering input, address and enable signals of the RAM includes pushing a value in the register following the RAM back into a memory location in the RAM, pushing back data stored in the RAM and initial values in the registers preceding the RAM to accommodate the value pushed back from the register following the RAM, and setting new values in the registers preceding the RAM so that, on a first clock cycle after retiming, the circuit assumes a condition before retiming. The method also may be used to configure a programmable logic device with a user logic design.
US09251873B1 Methods and systems for pin-efficient memory controller interface using vector signaling codes for chip-to-chip communications
Systems and methods are described for transmitting data over physical channels to provide a high speed, low latency interface such as between a memory controller and memory devices. Controller-side and memory-side embodiments of such channel interfaces are disclosed which require a low pin count and have low power utilization. In some embodiments of the invention, different voltage, current, etc. levels are used for signaling and more than two levels may be used, such as a vector signaling code wherein each wire signal may take on one of four signal values.
US09251869B2 Deep sleep wakeup of multi-bank memory
A deep sleep wakeup signal is received at a first memory bank. A first gated memory array supply voltage is increased in response to the receiving the deep sleep wakeup signal at the first memory bank. The first memory array supply voltage is applied to a first memory array. The deep sleep wakeup signal is forwarded to a second memory bank in response to determining the first gated memory array supply voltage has reached a specified voltage.
US09251864B2 System and method for providing voltage supply protection in a memory device
The invention relates to an electronic memory system, and more specifically, to a system for providing voltage supply protection in a memory device, and a method for providing voltage supply protection in a memory device. According to an embodiment, a system for providing voltage supply protection in a memory device is provided, the system including a memory array including a plurality of memory cells arranged in a plurality of groups of memory cells, and a plurality of current limiting elements, wherein each group of memory cells is associated with at least one current limiting element.
US09251862B2 Semiconductor device
A semiconductor device with a memory unit of which the variations in the operation timing are reduced is provided. For example, the semiconductor device is provided with dummy bit lines which are arranged collaterally with a proper bit line, and column direction load circuits which are sequentially coupled to the dummy bit lines. Each column direction load circuit is provided with plural NMOS transistors fixed to an off state, predetermined ones of which have the source and the drain suitably coupled to any of the dummy bit lines. Load capacitance accompanying diffusion layer capacitance of the predetermined NMOS transistors is added to the dummy bit lines, and corresponding to the load capacitance, the delay time from a decode activation signal to a dummy bit line signal is set up. The dummy bit line signal is employed when setting the start-up timing of a sense amplifier.
US09251858B2 Method and apparatus for providing stackable hard-disk drive carrier using pull-out drawers
A method and apparatus for providing a stackable hard-disk drive (“HDD”) carrier using pull-out drawers and fasteners are disclosed. The carrier, in one embodiment, includes an inner case or drawer and an outer frame casing. The inner cage includes a base plate, a front cover, a first side panel, and a second side panel, wherein the first and second side panels are hinged to the base plate. The inner cage is configured to house a removable HDD. The first and second side panels also include fasteners for securing the HDD to the inner cage. The outer frame casing is configured to receive the inner cage via its two opposite guiding walls. The guiding walls are configured to allow extending the inner cage to a predefined distance from the outer frame casing for accessing the HDD.
US09251857B2 Method of predicting a noise component associated with a readback signal from a dedicated servo medium, noise predictor thereof, and hard disk drive system
There is provided a method of predicting a noise component associated with a readback signal in a channel from a dedicated servo medium including a data recording layer and a dedicated servo layer. The method including: providing at least one noise prediction module for each of a plurality of types of servo patterns of the servo layer, and predicting the noise component by, for each of a plurality of segments of the readback signal of the data recording layer, using a selected one of the noise prediction modules. In particular, the selected one of the noise prediction module for a segment of the readback signal is selected based on the type of the servo pattern associated with the segment of the readback signal. There is also provided a corresponding noise predictor, a method of detecting data bits from the readback signal, and a hard disk drive system.
US09251842B1 Digital optical disc magazine
Technology is provided for digital optical disc magazines. The disc magazine includes a cabinet, at least one disc drive positioned within the cabinet, and a plurality of drawers disposed in the cabinet. A plurality of disc trays are disposed in the plurality of drawers and each disc tray includes a plurality of disc locations. A bi-directional disc pusher is supported on a gantry between adjacent drawers and is positionable along the adjacent drawers proximate a selected target disc location corresponding to one of the plurality of disc locations. A robotic gripper is positionable adjacent the target disc location and operative to grip a disc pushed at least partially from the target disc location by the disc pusher and to transport the disc to the disc drive.
US09251840B2 Dynamically controlling tape velocity
A maximum velocity is dynamically determined during a tape drive operation to obtain a statistical standard deviation of a position error signal (PES) that yields an amount of stopwrite (SW) operations that avoids backhitching. The tape velocity is adjusted to the maximum velocity.
US09251838B2 Apparatus and method for controlling transportation of tape medium
An apparatus, computer readable medium device, and method for controlling transportation of a tape medium. A determination is made whether to execute a backhitch operation in response to writing a data set to tape from the buffer. If not, a determination is made whether a transaction size at which data is transferred from the buffer to the tape is less than a buffer size. If so, then a determination is made of a a new speed and whether a current speed is different from the determined new speed. If so, then a backhitch is initiated.
US09251837B2 HAMR NFT materials with improved thermal stability
An apparatus that includes a near field transducer, the near field transducer including silver (Ag) and at least one other element or compound, wherein the at least one other element or compound is selected from: copper (Cu), palladium (Pd), gold (Au), zirconium (Zr), zirconium oxide (ZrO), platinum (Pt), geranium (Ge), nickel (Ni), tungsten (W), cobalt (Co), rhodium (Rh), ruthenium (Ru), tantalum (Ta), chromium (Cr), aluminum (Al), vanadium (V), iridium (Ir), titanium (Ti), magnesium (Mg), iron (Fe), molybdenum (Mo), silicon (Si), or combinations thereof oxides of V, Zr, Mg, calcium (Ca), Al, Ti, Si, cesium (Ce), yttrium (Y), Ta, W or thorium (Th), Co, or combinations thereof; or nitrides of Ta, Al, Ti, Si, indium (In), Fe, Zr, Cu, W, boron (B), halfnium (Hf), or combinations thereof.
US09251836B2 Optical disc apparatus, sheet member, and method for cleaning objective lens
The present application discloses optical disc apparatus including: drive mechanism for rotating medium including processing surface to be subjected optical information process; housing for storing drive mechanism; tray mechanism for displacing medium between storage position, at which medium is stored in housing, and ejection position, at which medium is ejected from housing; at least one objective lens for condensing light onto processing surface of medium situated at storage position to perform information process; and first displacement mechanism for displacing at least one objective lens along processing surface between first position and second position which is more distant from rotational center of medium rotated by the drive mechanism than first position is. Tray mechanism defines at least one opening in position closer to second position than first position.
US09251835B2 Patterned magnetic media with offset data and servo regions
A patterned magnetic media having offset servo and data regions. The media can be constructed by a method that allows both a data region and a servo region to be patterned without the patterning of one region adversely affecting the patterning of the other region. The method results in a patterned data region a patterned servo region and intermediate regions between the servo and data regions. The intermediate regions, which are most likely, but not necessarily, asymmetrical with one another indicate that the method has been used to pattern the media.
US09251834B2 Magnetic recording medium and magnetic storage apparatus
A magnetic recording medium includes a substrate, a magnetic layer including an alloy having an L10 type crystal structure as a main component thereof, and a plurality of underlayers arranged between the substrate and the magnetic layer. The plurality of underlayers include at least one crystalline underlayer which has a (100) orientation, and includes W as a main component thereof and one or more kinds of elements selected from a group consisting of Fe, Ni, Co, Hf, Zr, Y, Be, Ce, La, and Sc.
US09251832B2 Hexagonal ferrite magnetic powder and magnetic recording medium
An aspect of the present invention relates to hexagonal ferrite magnetic powder, which has an activation volume ranging from 900 nm3 to 1,600 nm3, and a ratio of a coefficient of plate thickness variation to a coefficient of particle diameter variation, coefficient of plate thickness variation/coefficient of particle diameter coefficient, ranging from 0.20 to 0.60.
US09251829B2 Head DFH protrusion shape calibration by HDI sensor
Dynamic fly height (DFH) controlled read/write heads using multiple heaters have their heater powers set within a range of ratios that allows minimum clearances to be set between the read-gap and the write-gap and the surface of a disk, thereby providing improved touch-down detection. Determining the correct range of power ratios requires varying the ratio to create an adjustable protrusion profile for the read and write elements in the head and measuring values of the ratio and corresponding values of read gap and write gap clearances that create points of minimum clearance. By adjusting the ratio of power supplied to the heaters, different protrusion profiles can be produced, clearance control for sigma reduction can be obtained and read/write readiness and operation consistency and reliability can be improved.
US09251824B1 Bimodal modulation
An apparatus and associated method employing a bridge circuit having first and second microactuators attached to the apparatus. An excitation source is configured to independently drive each of the microactuators. A computation module is connected to the bridge circuit and is configured to independently measure an electrical output of each microactuator. The computation module uses the electrical outputs to characterize a bimodal modulation of the apparatus.
US09251822B2 Assembly formed of nanotube arrays containing magnetic nanoparticles
A magnetic storage medium is formed of magnetic nanoparticles that are encapsulated within nanotubes (e.g., carbon nanotubes), which are arranged in a substrate to facilitate the reading and writing of information by a read/write head. The substrate may be flexible or rigid. Information is stored on the magnetic nanoparticles via the read/write head of a storage device. These magnetic nanoparticles are arranged into data tracks to store information through encapsulation within the carbon nanotubes. As carbon nanotubes are bendable, the carbon nanotubes may be arranged on flexible or rigid substrates, such as a polymer tape or disk for flexible media, or a glass substrate for rigid disk. A polymer may assist holding the nanoparticle-filled carbon tubes to the substrate.
US09251821B1 Attenuation of a pitch mode for actuator assemblies having multiple degrees of freedom
An apparatus, in one embodiment, includes: a pivot assembly pivotably supporting a head carriage assembly, a motor coupled to the head carriage assembly for rotatably positioning the head carriage assembly about an axis of skew which extends perpendicular to a plane defined by an intended direction of media movement across the head carriage assembly and a direction of fine motion of the head carriage assembly, the fine motion direction being oriented perpendicular to the intended direction of media movement, a linear assembly supporting the pivot assembly and the head carriage assembly, the linear assembly being configured to move along the fine motion direction, and a first flexure extending between the head carriage assembly and the linear assembly, the first flexure permitting the rotatable positioning of the head carriage assembly about the axis of skew, the first flexure resisting pitching movement of the head carriage assembly relative to the linear assembly.
US09251815B2 Magnetoresistive sensor with AFM-stabilized bottom shield
An apparatus disclosed herein includes a sensor stack including a first layer and an AFM stabilized bottom shield in proximity to the first layer, wherein the AFM stabilized bottom shield is magnetically coupled to the first layer. The apparatus reduces shield-to-shield spacing. The pinned layer of the bottom shield and a pinned layer of the sensor stack are stabilized using the AFM layer in the bottom shield. In one implementation, the bottom shield is made of the SAF structure, with the top layer of the structure adjacent to a pinned layer in the sensor stack.
US09251805B2 Method for processing speech of particular speaker, electronic system for the same, and program for electronic system
An object of the present invention is to process the speech of a particular speaker. The present invention provides a technique for collecting speech, analyzing the collected speech to extract the features of the speech, grouping the speech, or text corresponding to the speech, on the basis of the extracted features, presenting the result of the grouping to a user, and when one or more of the groups is selected by the user, enhancing, or reducing or cancelling the speech of a speaker associated with the selected group.
US09251800B2 Generation of a high band extension of a bandwidth extended audio signal
An audio decoder configured to generate a high band extension of an audio signal from an envelope and an excitation. The audio decoder includes a control arrangement configured to jointly control envelope shape and excitation noisiness with a common control parameter (f).
US09251798B2 Adaptive audio signal coding
Example embodiments described herein generally provide for adaptive audio signal coding of low-frequency and high-frequency audio signals. More specifically, audio signals are categorized into high-frequency audio signals and low-frequency audio signals. Then, based on a set coding and/or characteristics of the low-frequency audio signals, the low-frequency coding manner is selected. Similarly, but in addition to, a bandwidth extension mode to code the high-frequency audio signals is selected according to the low-frequency coding manner and/or characteristics of the audio signals.
US09251791B2 Multi-modal input on an electronic device
A computer-implemented input-method editor process includes receiving a request from a user for an application-independent input method editor having written and spoken input capabilities, identifying that the user is about to provide spoken input to the application-independent input method editor, and receiving a spoken input from the user. The spoken input corresponds to input to an application and is converted to text that represents the spoken input. The text is provided as input to the application.
US09251789B2 Speech-recognition system, storage medium, and method of speech recognition
A speech recognition system that recognizes speech data is provided. The speech recognition system includes a speech recognition part that performs speech recognition of the speech data, and calculates a likelihood of the speech data with respect to a registered word that is pre-registered, a reliability judgment part that performs reliability judgment on the speech recognition based on the likelihood, and a judgment reference change processing part that changes a judgment reference for the reliability judgment, according to an utterance speed of the speech data.
US09251787B1 Altering audio to improve automatic speech recognition
Techniques for altering audio being output by a voice-controlled device, or another device, to enable more accurate automatic speech recognition (ASR) by the voice-controlled device. For instance, a voice-controlled device may output audio within an environment using a speaker of the device. While outputting the audio, a microphone of the device may capture sound within the environment and may generate an audio signal based on the captured sound. The device may then analyze the audio signal to identify speech of a user within the signal, with the speech indicating that the user is going to provide a subsequent command to the device. Thereafter, the device may alter the output of the audio (e.g., attenuate the audio, pause the audio, switch from stereo to mono, etc.) to facilitate speech recognition of the user's subsequent command.
US09251786B2 Method, medium and apparatus for providing mobile voice web service
Provided are a method and apparatus for providing a mobile voice web service in a mobile terminal. The method includes analyzing a web history of a user from web search logs of the user and generating a voice access list based on the analysis results, and performing voice recognition by dynamically generating a voice recognition syntax according to the generated voice access list. Accordingly, by limiting syntax required for voice recognition by generating a syntax suitable for a web context of the user, efficient voice recognition, which can be performed in a terminal not a server, can be implemented.
US09251785B2 Call steering data tagging interface with automatic semantic clustering
A system and method for providing an easy-to-use interface for verifying semantic tags in a steering application in order to generate a natural language grammar. The method includes obtaining user responses to open-ended steering questions, automatically grouping the user responses into groups based on their semantic meaning, and automatically assigning preliminary semantic tags to each of the groups. The user interface enables the user to validate the content of the groups to ensure that all responses within a group have the same semantic meaning and to add or edit semantic tags associated with the groups. The system and method may be applied to interactive voice response (IVR) systems, as well as customer service systems that can communicate with a user via a text or written interface.
US09251783B2 Speech syllable/vowel/phone boundary detection using auditory attention cues
In syllable or vowel or phone boundary detection during speech, an auditory spectrum may be determined for an input window of sound and one or more multi-scale features may be extracted from the auditory spectrum. Each multi-scale feature can be extracted using a separate two-dimensional spectro-temporal receptive filter. One or more feature maps corresponding to the one or more multi-scale features can be generated and an auditory gist vector can be extracted from each of the one or more feature maps. A cumulative gist vector may be obtained through augmentation of each auditory gist vector extracted from the one or more feature maps. One or more syllable or vowel or phone boundaries in the input window of sound can be detected by mapping the cumulative gist vector to one or more syllable or vowel or phone boundary characteristics using a machine learning algorithm.
US09251780B2 Sound output device
A sound output device for masking an operation sound generated by equipment, having: an operation determining unit that determines an operation mode to be executed by the equipment; and a sound output unit that outputs a masking sound on the basis of the operation mode determined by the operation determining unit, the masking sound changing at least in sound pressure level over time.
US09251776B2 System and method creating harmonizing tracks for an audio input
A system and method of creating harmonizing tracks for an audio input. Audio input is received and a plurality of harmonizing tracks are created based on the received audio input. Each of the plurality of harmonizing tracks are transposed based on a transposition value for each respective track. Individual notes of the harmonizing tracks are manipulated based on a chord strictness threshold and an audio output is provided based on the audio input and the manipulated plurality of harmonizing tracks.
US09251775B2 Electronic signal processor
An electronic signal processor for processing signals includes a complex first filter, one or more gain stages and a second filter. The first filter is characterized by a frequency response curve that includes multiple corner frequencies, with some corner frequencies being user selectable. The first filter also has at least two user-preset gain levels which may be alternately selected by a switch. Lower frequency signals are processed by the first filter with at least 12 db/octave slope, and preferably with 18 db/octave slope to minimize intermodulation distortion products by subsequent amplification in the gain stages. A second filter provides further filtering and amplitude control. The signal processor is particularly suited for processing audio frequency signals.
US09251773B2 System and method for determining an accent pattern for a musical performance
Embodiments of the invention are related to a computer-implemented method that includes receiving musical data, identifying a succession of accentuated events in the musical data, determining a pattern in the succession of accentuated events, comparing the pattern to a plurality of reference patterns, and determining a match for the pattern using the plurality of reference patterns. The method further includes selecting one of the matching reference patterns, and generating a rhythmic musical accompaniment for the musical data based on the selected matching reference pattern. In some cases, the musical data is MIDI data or analog audio data. Analog audio data analysis includes detecting transients in the analog audio data by identifying the succession of accentuated event in the musical data. This may include identifying a plurality of events in the musical data, and determining whether each of the plurality of events is an accent.
US09251769B1 Mechanical mute for selectively muting a brass instrument
A mute for a musical brass instrument comprises an external body and an adjustable muting device coupled to the external body. The adjustable muting device selectively mutes sound from the musical brass instrument. The adjustable muting device is a mechanical device, which is selectably activated and/or adjusted using mechanical and/or electronic controls, thus permitting a musician to mute/unmute the musical brass instrument without removing the mute.
US09251762B2 Runtime transformation of images to match a user interface theme
An application that generates a user interface includes multiple assets, such as icons, that are overlaid onto other user interface elements, such as tool bars, menus, windows, etc. The assets may be configured at runtime to match a user interface theme that utilizes specific colors, fonts, and styles. The application, at runtime, configures an asset to match the user interface theme by adjusting the luminosity of the pixels in the asset. A subset of pixels in the asset is matched to the color of a target background color by altering the luminosity of the subset of pixels in the asset to match the luminosity of the target background color. The luminosity of the remaining pixels is adjusted to match the theme.
US09251761B2 Gray-scale correction method for display device, and method of producing display device
A gray scale correction method for a display device includes a step of setting a target value including a target luminance and a target chromaticity of a color display pixel (S22), a step of measuring tristimulus values of each of a plurality of reference colors and each of a plurality of comparative colors in accordance with a prescribed gamma characteristic (S24), a step of finding a reference value and a comparative value from the measured tristimulus values (S26), and a step of correcting a gray scale based on the target value, the reference value and the comparative value (S28).
US09251759B2 Reduction of contention between driver circuitry
An electronic display includes a display panel. The display panel includes a pixel array and receives a supply voltage. The display panel also includes a panel driver configured to generate a gate line voltage. The panel driver also supplies the gate line voltage to the display panel based on a comparison between the gate line voltage and the supply voltage.
US09251746B2 Liquid crystal display apparatus
The liquid crystal display apparatus according to an embodiment of the present invention has a plurality of pixels including a red pixel, a green pixel and a blue pixel. In at least one example embodiment, each of the plurality of pixels has a plurality of subpixels including a first subpixel and a second subpixel. When the grayscale levels of input signals corresponding to the red, green and blue pixels are equal to one another at a given level, the ratio of the difference in luminance between the first and second subpixels of one of the red, green and blue pixels to the maximum luminance of that one of the red, green and blue pixels is greater than the ratio of the difference in luminance between the first and second subpixels of each one of the other two pixels to the maximum luminance of the respective one of the other two pixels.
US09251745B2 System and apparatus for see-through display panels
Various embodiments of the present invention provide for systems and apparatus directed toward using a contact lens and deflection optics to process display information and non-display information. In one embodiment of the invention, a display panel assembly is provided, comprising: a transparent substrate that permits light to pass through substantially undistorted; a reflector disposed on the transparent substrate; and a display panel aimed toward the reflector and substantially away from a human visual system, wherein the reflector reflects light emitted from the display panel toward the human visual system. The reflector may comprise a narrow band reflector or a polarization reflector.
US09251742B2 Electrophoretic display apparatus and image-updating method thereof
An electrophoretic display apparatus and an image-updating method thereof are provided. The electrophoretic display apparatus comprises a display panel and a source driver. The display panel comprises a plurality of pixels and a plurality of source lines, and each pixel electrode is electrically coupled to an AC common voltage through a corresponding capacitor. The capacitor comprises a plurality of charged particles. The source driver comprises a first data-latching circuit and a second data-latching circuit. Each of the data-latching circuits comprises a transistor, a capacitor and an inverter. The first data-latching circuit receives image data and a data shift-register output pulse. The second data-latching circuit is electrically coupled between an output terminal of the first data-latching circuit and a source line and is used for receiving a data output pulse.
US09251739B2 Stereoscopic display device and method for driving a stereoscopic display that updates a plurality of display zones
A first display zone and a second display zone are displayed based on a first light source group, which corresponds to a first voltage data signal; and then the second display zone and a third display zone are displayed based on light for a second light source group, which corresponding to a second voltage data signal. The first light source group and the second light source group illuminate the display zones alternatively. Each display zone is fed with either a first data voltage signal or a second data voltage signal. While the first data voltage signal is updating each display zone in sequence, the second data voltage signal starts updating the first display zone when the first voltage signal is updating the third display zone.
US09251737B2 Pixel circuit, display panel and display apparatus
A pixel circuit, display panel and display apparatus are provided. The pixel circuit comprises a driving sub-circuit, whose first terminal is connected with first reference voltage source via power supply lead, and second terminal is connected with first terminal of a light emitting device; a charging sub-circuit, whose output terminal is connected with third terminal of the driving sub-circuit, which is configured to charge the driving sub-circuit before the driving sub-circuit drives the light emitting device to emit light; and a compensation sub-circuit, whose first terminal is connected with second terminal of the light emitting device, second terminal is connected with second reference voltage source, which is configured to compensate for voltage drop on the power supply lead of voltage which is provided to the driving sub-circuit from the first reference voltage source, so as to raise the uniformity of display brightness within display area of the panel.
US09251734B2 Pixel circuit, electro-optical device, and electronic apparatus
An electro-optical device formed on a semiconductor substrate, includes: a first transistor controlling a current level according to a voltage between a gate and a source; a second transistor electrically connected between a data line and the gate of the first transistor; a third transistor electrically connected between the gate and a drain of the first transistor; and a light-emitting element emitting light at a luminance according to the current level, in which one of a source and a drain of the second transistor and one of a source and a drain of the third transistor are formed by a common diffusion layer.
US09251728B2 Method of driving a 3D display panel with enhanced left-eye image and right-eye image luminance difference and display apparatus for performing the method
In a method of driving a display panel, a first data voltage having a first potential difference with respect to a reference voltage is outputted to pixel units of the display panel during a first frame which the data voltage has a same polarity with respect to the reference voltage as a data voltage of a following frame, and a second data voltage having a second potential difference less than the first potential difference is output to pixel units of the display panel during a second frame in which the data voltage has a polarity with respect to the reference voltage that is reversed with respect to a data voltage of a following frame.
US09251724B2 Beverage identification tiles
A beverage identification tile is provided that includes a sheet of material and a plurality of beverage type identifiers. The sheet of material has a first face and a second face which have a polygonal shape defined by a plurality of edges. A different beverage type identifier of the plurality of beverage type identifiers is printed along each edge of the plurality of edges of the first face and of the second face. A shelf labeling system includes a shelf, a plurality of slots, and the beverage identification tile. The shelf includes a front wall, a back wall, and a base mounted between the front wall and the back wall. The sheet of material is sized to slide into a slot of the plurality of slots formed in the front wall along an edge of the front wall with a beverage type identifier visible above the edge.
US09251722B2 Map information display device, map information display method and program
There is provided a map information display device including an operating tool detector for, on a display panel where map information MI and view image information VI are displayed, detecting a position and a pointing direction of an operating tool M in touch with an area corresponding to the map information; and a display controller for controlling display of the view image information in accordance with a view point on the map information indicated by the position of the operating tool and a line-of-sight direction on the map information indicated by the pointing direction of the operating tool.
US09251716B2 Corporate training system and method
The disclosed embodiments include a system and method for improving corporate employee work performance. The disclosed embodiments provide an innovative approach to optimizing the talent and resources within an organization including, but not limited to, an individual employee, teams of employees, and to executives within the organization. Through the application of a multivariate model based on physiological, affective, and behavioral systems, the disclosed embodiments attempt to improve an employee's vitality, vibrancy, wellness, and overall work performance.
US09251709B2 Lateral vehicle contact warning system
A vehicle contact warning system includes a detector system, a controller and a warning indicator. The detector system detects a distance between a remote vehicle and a host vehicle and whether a signal indicator on the remote vehicle is activated. The controller determines whether at least one of a signal indicator on the host vehicle is activated by a driver of the host vehicle and a speed at which the distance between the host vehicle and the remote vehicle is decreasing is greater than a predetermined speed. The warning indicator notifies the driver of the host vehicle upon the detector system detecting the signal indicator on the remote vehicle and the controller determining that at least one of the signal indicator of the host vehicle is activated and the speed at which the distance between the host vehicle and the remote vehicle is decreasing is greater than the predetermined speed.
US09251703B1 Methods of providing traffic information and supporting apparatus, readable medium, and memory
A technique of providing traffic information to a navigation system that obtains (704) current traffic data having a current traffic condition associated with a location description on a road network. Historic traffic data associated with the location description are then obtained (708) from a historic traffic database to be compared (710) with the current traffic data. From the comparison, a traffic delta between the current traffic data and the historic traffic data is then provided (710), which is used to determine (714) whether this traffic delta corresponds in a predetermined way with a threshold. And if so, a traffic message is generated (716) with the current traffic condition associated with the location description.
US09251695B2 System and methods for providing notification in the event of a security crisis
The present invention provides a system and methods for notifying first responders of a security crisis or threat. The alarm system can be scaled to allow the alarm system to be used effectively in facilities of differing sizes and layouts. The system is also flexible, enabling the system to integrate with currently existing systems or to operate with new devices.
US09251694B2 Vehicle system passive notification using remote device
A method of vehicle monitoring includes monitoring one or more vehicle safety systems while a vehicle is in operation to detect an unsafe condition. The method also includes sending an alert to a handheld device if an unsafe condition is detected.
US09251691B2 Systems and methods for behavior monitoring and identification
Various embodiments herein provide system, method, and software solutions to facilitate not only timely, compliant monitoring of individuals housed within facilities, such as detention facilities, but also solutions that discover visible and latent behavior and mental conditions, among other potential issues that may be easily overlooked. Some embodiments focus on data collection and other embodiments focus on applying analytics to collected data to discover conditions and states of individuals, groups, a facility or portion thereof, staff, and procedures. Yet further embodiments include both data collection and analytic discovery. Some embodiments may also include messaging and other data processing and communication mechanisms implemented to facilitate compliance, safety, and monitoring accuracy.
US09251681B2 Fire alarm system
Provided is a fire alarm system including: a transmitter/receiver unit (4) for supplying a pulse voltage to power/signal lines (SG); a current value setting unit (5) for setting, as a current limiting value, an upper limit of a current output to the power/signal lines (SG) from the transmitter/receiver unit (4) when the pulse voltage is output; and a current control unit (6) for controlling the transmitter/receiver unit (4) to output a current having a value equal to or smaller than the current limiting value set by the current value setting unit (5). Accordingly, it is possible to prevent a malfunction from occurring in communications irrespective of a scale of the fire alarm system.
US09251676B2 Haptic self-service terminal (SST) feedback
Haptic Self-Service Terminal (SST) feedback is provided. A customer transacting at a SST during a Self-Service (SS) transaction receives in-air tactile communication for assisting the customer during the SS transaction.
US09251672B2 Stacking purge-bin
Apparatus and methods for a stacking purge-bin (“SPB”) are provided. The SPB may be configured to rotate. The SPB may include a plurality of receiving sections. One or more tangible items retracted by the SSK may be stored in each receiving section. Rotating the SPB between each retraction may prevent tangible items from two consecutive retractions from being stored in a single receiving section. Preventing tangible items from two consecutive retractions from being stored in a single receiving section may allow each tangible item to be associated with transaction information corresponding to a retraction. The SPB may store separators. A separator may be inserted between tangible items received from two consecutive retractions. Separating between tangible items received from two consecutive retractions may allow each tangible item to be associated with transaction information corresponding to a retraction. Transaction information associated with a retraction may be marked on the separator.
US09251669B2 Slot machine including a plurality of video reel strips
On the slot machine, a slot game including a base game and free games is caused to proceed on a display. On the base game reel strips, on all of a plurality of reels, symbols whose each kind is the same, other than feature symbols and wild symbols, are arranged in succession. On the free game reel strips, on all of a plurality of reels, symbols whose each kind is the same, other than the feature symbols and the wild symbols, are arranged in succession and in addition thereto, only in a case of top symbols whose payout multiplying factor is the highest, the top symbols whose number is larger than a number of top symbols displayed on the base game reel strips are arranged in succession.
US09251664B2 Casino slot wagering system
A method and apparatus for casino slot games in which at least two and preferably three games are linked together by displaying the two or three games on one video display device. The games are linked through the initial cards displayed for each game, and their bets and their outcomes. A computer calculates the probabilities of all bets and outcomes during the betting rounds in real time. As a result of the so chained games the player makes decisions in multiple betting rounds in insufficient information about the game outcomes. At any time during the game play the player can evaluate the game outcomes as presented to him by the computer and either play the next successive game or simply finish the game with no penalty.
US09251660B2 Gaming activity awarding subsequent plays using results of previous plays
Techniques involving awarding subsequent plays using results of previous plays. One representative technique includes dealing a first poker hand to a player, and enabling cards of the first poker hand to be held. Replacement cards are presented for any of the cards that were not held in the first poker hand, thereby creating a first resulting poker hand. All of the cards of the first resulting poker hand are duplicated into a second poker hand, where cards in the second poker hand may again be held/discarded. Replacement cards are presented for any of the cards that were not held in the second poker hand, thereby creating a second resulting poker hand. Duplication into additional hands may also be provided.
US09251657B2 Skill calibrated hybrid game
Systems in accordance with embodiments of the invention include: a gambling game; an entertainment game; and a game world engine constructed to communicate, to the real world engine, gameplay gambling event occurrences based upon a player's skillful execution of the entertainment game that triggers a wager in the gambling game, the game world engine utilizing a skill calibration module constructed to receive, from the entertainment software engine, player performance information for the player, analyze the player performance information to determine the player's skill level in playing the entertainment game, determine whether the terms of the wager of the gambling game are calibrated in a manner appropriate to the player's skill level in the entertainment game, and send, to the real world engine, a command that causes the real world engine to calibrate the terms of the wager in the gambling game.
US09251654B2 Wagering method, device, and computer readable storage medium, for wagering on pieces in a progression
A method, apparatus, and computer readable storage, for wagering on a game of chance which includes (a) offering, before a game of chance progression commences, an initial wager on any of a plurality of pieces to first complete the progression, an initial payout for the initial wager based on the pieces having equal chances of winning; and (b) offering, during the progression, a real time wager on any of a plurality of pieces to first complete the progression, a real time payout for the real time wager based on computed chances of a selected piece first completing the progression based on current positions of the plurality of pieces.
US09251649B2 System and method for connecting gaming devices to a network for remote play
A gaming system authenticates over a network a user of a remote device for a gaming system for a gambling game. The gaming system determines a location of the remote device. The gaming system verifies that the location of the remote device is within a jurisdiction that allows use of the gaming system by persons of age to gamble. Then the gaming system provides software to the remote device, wherein the software, when executed, causes media associated with the gambling game to be presented on the remote device.
US09251645B2 Integrating chat and wagering games
A wagering game system and its operations are described herein. In some embodiments, the operations can include connecting a wagering game to a chat session and receiving a textual game command for the wagering game from a chat message sent via the chat session. The operations can further include activating a wagering game function for the wagering game in response to receiving the textual game command via the chat message.
US09251644B2 Amusement devices and games including means for processing electronic data where users can change selections
Games related to the provision of information are described. Games may be formulated to exploit biases such as long shot bias and favorite bias. Games related to the provision of information are described. Games may be formulated to exploit biases relating to the Monty Hall paradox. Games related to the provision of information are described. Games may include wagering on hands of cards, e.g., poker wagering games.
US09251643B2 Multimedia interface progression bar
A method comprising displaying a display area adapted to display a multimedia element, displaying a progression bar adapted to represent at least a portion of a duration of the multimedia element, and providing an indicator associated with the progression bar, the indicator being displayable at a timely position along the at least a portion of a duration of the multimedia element and is further adapted to timely enable an action when the multimedia element is played, the display bar includes a movable play position indicator and wherein the action is enabled on a basis of a proximity between the indicator and the play position indicator, the action encompassing timely displaying an image.
US09251636B2 Document validating/stacking device
A document validating/stacking device is provided that has a validator 1 provided with a swingable rocker 10 formed with a head 16 and a stacker 2 detachably attached to validator 1. Stacker 2 comprises an X-linkage 20 having a driver arm 41 that is separably pushed by head 16 in the same rotational direction as head 16 swings to expand X-linkage 20, to thereby move pusher plate 18 from the initial position to the extended position and to stow the document within interim chamber 24 into storage 7.
US09251620B2 Fast pattern interpolation with parallel coherent random walk searching
There is provided a method and system for fast pattern interpolation with parallel coherent random walk searching. The system includes a system processor and a system memory, and an image processing application stored in the system memory. The image processing application, under control of the system processor, is configured to receive first and second pattern exemplars and a blend map for merging the first and second pattern exemplars, and to utilize a correspondence search process to determine first and second target images for use in producing a composite image. The first and second target images correspond respectively to the first and second pattern exemplars. In addition, a constraint imposed on the correspondence search process by the image processing application is based on the blend map for merging the first and second pattern exemplars.
US09251615B2 Thermal image animation
Animation of a thermal image captured by a thermal imager that includes automatically changing particular aspects of the presentation of the image. The coloring of the thermal image may automatically change through two or more color presentations. The colors which may automatically change or be “animated” may be any colors in the usual rainbow of color or in the grayscale. The animation may include a series of small, stepwise incremental changes that gradually change the image. If timed correctly and if the increments are sufficiently small, the transitions of the image may appear smooth, in the manner of a movie or cartoon.
US09251613B2 Systems and methods for automatically applying effects based on media content characteristics
Disclosed are systems and methods for automatically applying special effects based on media content characteristics. A digital image is obtained and depth information in the digital image is determined. A foreground region and a background region in the digital image are identified based on the depth information. First and second effects are selected from a grouping of effects, where the first effect is applied to at least a portion of the foreground region and the second effect is applied to at least a portion of the background region.
US09251608B2 Data visualization of a datacenter
Methods and systems for data visualization in a datacenter are described herein. At least some illustrative embodiments comprise a method for monitoring a datacenter, comprising collecting a plurality of real-time data samples from a plurality of data sensors, generating a plurality of processed data values based at least in part on the plurality of real-time data samples, mapping each of the plurality of processed data values to one of a plurality of colors, and displaying the plurality of processed data values as regions of color on one or more two-dimensional (2-D) planes within a three-dimensional (3-D) space representing a datacenter.
US09251599B2 Tracking assistance device, a tracking assistance system and a tracking assistance method that enable a monitoring person to perform a task of correcting tracking information
A tracking assistance device includes: a target-to-be-tracked setting unit that causes captured images stored in a recorder to be displayed on a monitor and, in response to an input operation performed by a monitoring person to designate a moving object to be tracked, sets the designated moving object as a target to be tracked; a candidates selection unit that selects, as a candidate(s), a moving object(s) highly relevant with the moving object set as the target to be tracked; a candidate image presenting unit that extracts, as a candidate image(s), a captured image(s) in which the candidate moving object(s) is(are) included, and causes the monitor to display the candidate image(s) is(are) such that the monitoring person selects an appropriate candidate image; and a tracing information correction unit that changes the target to be tracked to the moving object associated with the selected candidate image and corrects the tracing information accordingly.
US09251595B2 Method of shutterless non-uniformity correction for infrared imagers
A method of correcting an infrared image is provided. The method includes receiving an image from a camera comprising a first pixel with a first pixel value and a neighbor pixel with a neighbor pixel value. The first pixel and the neighbor pixel can be assumed to view the same object. The method further includes storing the first and neighbor pixel values in an image table, generating a corrected image table by adding the first pixel value to a corrected pixel value in a correction table, determining that the camera is not moving, and masking edges in the corrected image table. The method further includes updating the correction table by: determining that the first pixel value and neighbor pixel value are not edges, computing the difference between the first and neighbor pixel values, and storing the difference in the correction table. The method further includes providing an output image table.
US09251594B2 Cropping boundary simplicity
Cropping boundary simplicity techniques are described. In one or more implementations, multiple candidate croppings of a scene are generated. For each of the candidate croppings, a score is calculated that is indicative of a boundary simplicity for the candidate cropping. To calculate the boundary simplicity, complexity of the scene along a boundary of a respective candidate cropping is measured. The complexity is measured, for instance, using an average gradient, an image edge map, or entropy along the boundary. Values indicative of the complexity may be derived from the measuring. The candidate croppings may then be ranked according to those values. Based on the scores calculated to indicate the boundary simplicity, one or more of the candidate croppings may be chosen e.g., to present the chosen croppings to a user for selection.
US09251593B2 Medical imaging system and a method for segmenting an object of interest
The invention concerns a medical imaging system comprising means (4) of segmenting a region of interest around an object of interest within a volume of 3D data (3DV). The system according to the invention comprises means (5) of calculating a sub-regions map (CSR) within the segmented region (RS) and correction means (6) intended to exclude sub-regions of the segmented region by means of said sub-regions map (CSR). The correction can be made automatically or manually by means of control means (7) enabling a user to select the sub-regions to be excluded. Display means (3) make it possible to display a 2D representation (2DR) of the volume of 3D data (3DV) and the segmented region (RS, RS′) at various stages of the processing.
US09251592B2 Pixel object detection in digital images method and system
A user touches a touch sensitive display or otherwise provides input comprising “stroke” gestures to trace areas which are to be the subject of post-processing functions. The stroke area is highlighted and can be added to or corrected by additional stroke and “erase” gestures. Pixel objects are detected proximate to the stroke area, with a precision based on the zoom level. Stroke gesture input may be received and pixel object determination may be performed in series or in parallel.
US09251584B2 Simultaneous high spatial low temporal resolution magnetic resonance (MR) sequence for dynamic contrast enhanced (DCE) magnetic resonance imaging (MRI)
A dual magnetic resonance imaging method simultaneously acquires a first and a second time series of MR images wherein the temporal resolution of the first time series of images is larger than that of the second time series while the spatial resolution of the first time series of images is smaller than that of the second time series. Accordingly, in the context of DCE-MRI, the first time series can be used to determine the arterial input function (AIF) while the second time series can be used to determine the concentration time course in the tissue of interest, e.g. in a vessel wall. Therefore, both the AIF and the tissue time course can be acquired with their optimal dynamic signal range.
US09251583B2 Analysis, secure access to, and transmission of array images
Systems and methods are provided the autocentering, autofocusing, acquiring, decoding, aligning, analyzing and exchanging among various parties, images, where the images are of arrays of signals associated with ligand-receptor interactions, and more particularly, ligand-receptor interactions where a multitude of receptors are associated with microparticles or microbeads. The beads are encoded to indicate the identity of the receptor attached, and therefore, an assay image and a decoding image are aligned to effect the decoding. The images or data extracted from such images can be exchanged between de-centralized assay locations and a centralized location where the data are analyzed to indicate assay results. Access to data can be restricted to authorized parties in possession of certain coding information, so as to preserve confidentiality.
US09251576B2 Digital image subtraction
A system for generating a digital subtraction image of at least two input images. The system comprises a registration subsystem (1) for generating a plurality of different registrations of the input images (7, 8), based on different values of a registration parameter (6). The system further comprises a subtraction subsystem (2) for generating a plurality of subtracted images by subtracting the input images in accordance with respective ones of the plurality of registrations. The system further comprises a combining subsystem (3) for combining the plurality of subtracted images into a combined subtracted image (9). The registration parameter (6) represents an assumed depth of an object which is visible in the input images (7, 8). The combining subsystem (3) is arranged for assigning a combined pixel value to a pixel position of the combined subtracted image, based on pixel values of or around corresponding pixel positions in the plurality of subtracted images.
US09251575B2 Image processing apparatus, image pickup apparatus, image processing method, and image processing program
An image processing apparatus 1 includes an image region dividing portion 105 configured to divide a shot image into a plurality of image regions so that an amount of change of an image quality is within a predetermined range when the shot image is blurred using a blur kernel depending on an object distance and an angle of view of the shot image, a blur kernel generating portion 106 configured to calculate the blur kernel for each image region divided by the image region dividing portion 105, and an image processing calculating portion 107 configured to generate a blur-added image by performing a convolution calculation for the shot image using the blur kernel calculated by the blur kernel generating portion 106.
US09251574B2 Image compensation value computation
Image compensation value computation techniques are described. In one or more implementations, an image key value is calculated, by a computing device, for image data based on values of pixels of the image data. A tuning value is computed by the computing device using the image key value. The tuning value is configured to adjust how the image data is to be measured to compute an image compensation value. The image compensation value is then computed by the computing device such that a statistic computed in accordance with the tuning value approaches a target value. The image compensation value is applied by the computing device to adjust the image data.
US09251570B1 Smart image enhancements
Smart image enhancements are disclosed, including: obtaining a representation of a user's face associated with a set of images associated with the user's face; obtaining a set of extrinsic information corresponding to an image of the set of images; determining a modified smoothing map by modifying a model smoothing map to correspond to the representation of the user's face; and determining an enhanced image based at least in part on the set of extrinsic information corresponding to the image, the modified model smoothing map, and the image.
US09251565B2 Hyper-resolution imaging
Methods and a computer program product for deriving a super-resolution image of a physical object by fusing cameras of multiple resolutions (spatial, temporal, or spectral), the super-resolution image characterized by a resolution exceeding a “camera imaging resolution” associated with each of a sequence of lower-resolution images of the physical object. The sequence of images of the physical object is obtained at a plurality of relative displacements with respect to the object by a hybrid camera system comprising at least two imaging systems. The imaging systems are characterized by respective temporal and spatial resolution and by spectral sensitivity, and may be distinct from one another in one or more of the foregoing dimensions. The imaging systems are either fixed, or subject to know motion, relative to each other. Image sequences derived by each imaging system are coregistered and deconvolved to solve for a resultant sequence of images.
US09251562B1 Registration of low contrast images
The registration of images captured at multiple locations, for purposes such as location mapping, can be improved by utilizing multiple image capture elements pointing in at least two different directions or having different viewable ranges. At least one primary image is captured at each location. If the primary image is not able to be correlated with at least one other image based on one or more matching features, image information captured by at least one other camera at substantially the same times as those images can be analyzed to attempt to determine a change in position and/or orientation of the device between those times, which can assist in correlating the primary images. In some embodiments, motion or orientation determining elements can assist in the determination of device movement, and in at least some embodiments can reduce the amount of image information to be processed for a match.
US09251557B2 System, method, and computer program product for recovering from a memory underflow condition associated with generating video signals
A system, method, and computer program product for recovering from a memory underflow condition associated with generating video signals are disclosed. The method includes the steps of determining that a first counter is greater than a second counter, incrementing an address corresponding to a memory fetch request by an offset, and issuing the memory fetch request to a memory. The first counter represents a number of pixels that have been read by a display pipeline for a current frame and the second counter represents a number of pixels requested from a memory for the current frame.
US09251548B1 Object transformation for object trees utilized with multiprocessor systems
A system may include a memory that stores instructions and a processor to execute the instructions to store a first set of objects in a first data structure, where the first set of objects describe a graphical scene. The processor may create a group of commands and add a command for at least one object, of the first set of objects, to the group of commands. The processor may combine the group of commands into a composite command, where the group of commands includes the added command. The processor may create a second set of objects in a second data structure based on the first set of objects in the first data structure and the composite command. The processor may also modify the second set of objects and provide the modified second set of objects to a browser for rendering the graphical scene.
US09251547B2 Method and system for placing a wager on a pari-mutuel event
A method and system is provided to permit placing a wager on a pari-mutuel event in which expert handicapper's prognoses are displayed to a player to permit them to formulate either simple or complicated exotic wagers, and to be able to aggregate a wager with those of other players to satisfy wagering minimums.
US09251543B2 Predictive method, apparatus and program product
Methods, Apparatus and Program Products for predicting resource usage data, weather data and econometric data, such as: demands on resources such as electrical power, water supply, communications infrastructure; temperature, humidity, wind speed, solar radiation, and degree days; and commodity price, gross domestic product, and a price index.
US09251540B1 Banking system controlled responsive to data bearing records
An apparatus that operates to cause financial transfers responsive to data read from data bearing records, includes at least one processor that is in operative connection with a card reader, a check acceptor, a cash dispenser and a display. The at least one processor causes the machine to operate to read card data from a user card, and to cause a determination to be made that the read card data corresponds to an authorized financial account. The at least one processor is operative to cause data to be read from a check and/or cash to be dispensed, and a financial transfer to or from the account corresponding to the value thereof. Machine instructions are output and user transaction inputs can be received through either a primary or an auxiliary touch screen display.
US09251538B1 System and method for automatically filling webpage fields
A computer-implemented method for automatically populating fields of a webpage. The method includes transmitting data from a browser add-on installed in a second webpage to a code segment inserted in a first webpage, where the code segment is configured to populate one or more fields included in the first webpage with received data, where the browser add-on is not installed in the first webpage, and where the first webpage is displayed on a display device in a web browser application executing on a computer system; and executing the code segment to populate the fields included in the first webpage with the received data.
US09251534B2 Offer inclusion for over the top (OTT) content
Inspection of over the top (OTT) content to facilitate offering non-OTT content or other content and/or services as an alternative to the OTT content is contemplated. The OTT content may be inspected at an access point configured to provide a broadband or other connection between a device consuming the OTT content and a device sourcing the content. Data packets or other signaling may be added to the OTT content at the access point in order to announce the offer.
US09251532B2 Method and apparatus for providing search capability and targeted advertising for audio, image, and video content over the internet
The present invention provides an apparatus and method for extracting the content of a video, image, and/or audio file or podcast, analyzing the content, and then providing a targeted advertisement, search capability and/or other functionality based on the content of the file or podcast.
US09251530B1 Apparatus and method for model-based social analytics
A model based social analytic system collects social signals from social network accounts for different companies and constituents. The social signals can be used to benchmark social network performance for different contextual dimensions, such as industries, companies, brands, etc. Conversations may be identified in the signals and the types of constituents participating in the conversations may be identified. Analytics can then be determined for the contextual dimensions based on the related conversations and the types of constituents participating in the conversations.
US09251529B2 Advertisement providing system and method
Provided are an advertisement providing system and method. The advertisement providing method acquires information on a user interaction, acquires a second advertisement schedule which is generated by rescheduling a first advertisement schedule on the basis of the information on the user interaction, and provides an advertisement according to the second advertisement schedule.
US09251527B2 System and method for providing personalized recommendations
A system and method for providing a personalized recommendation from a series of partial preferences is presented. A preference distribution of a population including a plurality of weighted ranked lists is identified. A revealed preference of a user is compared to the plurality of ranked lists. An affinity weight between the user and each of the plurality of ranked lists is assigned, and a weighted average of each of the affinity weights is taken.
US09251526B2 Server apparatus, terminal apparatus, user's degree of interest calculation method, user's degree of interest calculation program, terminal program, recording medium having program recorded therein, and an information providing system
A server apparatus according to the invention obtains, from a terminal apparatus, scroll operation information conducted on a display area of the terminal apparatus, and obtains content identification information for identifying the content displayed at the display area, and calculates the user's degree of interest in the content identified by the obtained content identification information.
US09251522B2 Pixel cluster transit monitoring for detecting click fraud
Detecting click fraud that includes a client device capable of accessing a server hosting a web page containing an advertisement. The client device includes a network interface allowing access to the server and code on the client device. The code accesses and displays a web page containing an advertisement, provides mechanisms (e.g., an applet, an ActiveX control, a plugin, a JavaScript, a browser scripting language, browser extensions, or code native to the browser) associated with each pixel cluster where each mechanism captures information regarding the transit of the pixel cluster by a cursor on the web page, and collects information based on the capturing by each associated mechanism regarding the transit of the pixel cluster by a cursor on the web page.
US09251519B1 Systems and methods for monetizing subscription and archival news content
A news aggregation server aggregates and monetizes restricted news content. The news aggregation server fetches the restricted news content from multiple news source servers that are remote from the news aggregation server. The news aggregation server aggregates the fetched restricted news content and searches the aggregated news content based on input received from a client. The news aggregation server provides access to selected news content from the aggregated news content that is relevant to the client input and charges the user a price for accessing the selected restricted news content.
US09251513B2 Stand-alone secure PIN entry device for enabling EMV card transactions with separate card reader
A method of conducting secure electronic payments to a payment acquirer using a credit card payment unit, comprising of a smart card, a portable card reader device, a mobile phone, a stand-alone PIN entry device and a payment server. The method is based on eliminating the unsecure keyboard in a mobile phone used for entering personal identification information, and instead use a separate secure PIN entry device which fulfills the EMV Level specification. Since all sensitive payment information, communicated to the payment server from the card reader and the PIN entry device, is encrypted using unique encryption keys an unsecure mobile phone may be used for relaying the communication between the card reader device and the PIN entry device to and from the payment server.
US09251512B2 Method and apparatus for identification verification and purchase validation
A computer implemented method includes receiving a request for payment-related information at a wireless device. The method also includes communicating between the wireless device and a paired vehicle computing system (VCS) to verify the presence of a known vehicle. Further, the method includes transmitting requested payment-related information, responsive to the verification of the presence of the known vehicle.
US09251511B2 Transfer account systems, computer program products, and associated computer-implemented methods
Embodiments of the present invention include transfer account systems, computer program products, and associated computer-implemented methods of providing prioritized payments from the proceeds of automatic or direct deposits. Embodiments of the present invention include routing automatic deposit information to a financial institution computer managing a prioritized payment program and formulating an outgoing ACH file with both an entry for an automatic deposit destined for a customer account and an entry for a pre-authorized prioritized payment to a select creditor, so that the automatic deposit is credited to the customer account and relatively instantaneously any prioritized payment is debited from the customer account. According to embodiments of the present invention, the customer account can be a checking, deposit, savings, money market, or other account as understood by those skilled in the art, so that a customer has effective access through the customer account only to a net value of funds.
US09251506B2 User interfaces for content categorization and retrieval
Methods, systems, and computer-readable media provide a scenario desktop for recording a current event scenario and a content desktop for presenting information about a previously recorded event scenario. When a first event scenario is detected on the mobile device, the scenario desktop is presented on the mobile device. The scenario desktop exists in parallel with a default primary desktop of the mobile device. An information bundle is created for the first event scenario, including one or more documents accessed through the scenario desktop during the first event scenario. Access to the one or more documents is automatically provided on the mobile device during a second event scenario related to the first event scenario. The access is provided through the content desktop existing in parallel with the primary desktop and the scenario desktop.
US09251503B2 Video viewing and tagging system
Systems and methods are provided to view, manipulate, and share videos within a gaming platform implemented as an advisory services network. Within the context of a serious game designed around a complex business problem of an organization, players can review videos conveying ethnographic information, mark segments of the videos, tag the videos or segments for categorization, create discussions around the videos or segments, add the videos or segments as evidence to a dossier, embed the videos or segments into existing discussions, or the like.
US09251501B2 Cross-platform reporting user interface
A user device presents, to a user, media content provided from multiple providers and logs the presented media content from the multiple providers. The user device indicates, based on the multiple providers, proportions of the presented media content from the multiple providers during a particular reporting period and determines whether particular presented media content, of the presented media content from the particular reporting period, was available for presentation from another of the multiple providers. The user device generates a report, for the user, that indicates if the presented media content could have been consolidated among fewer of the multiple providers.
US09251495B1 Method and system for reconciling transportation records
Aspects of the present invention are directed to a system for next day reconciliation of transportation records. The system having a transportation record storage provider (TRSP) that receives and stores storage medium transportation requests; an outside service provider (OSP) inventory manager that receives and maintains records of transported storage mediums scanned at the OSP; and a reconciliation provider that receives a first list from the TRSP and a second list from the OSP inventory manger, for reconciliation. The reconciliation provider includes receivers for receiving the first and second list; a processing engine that reconciles the first list and the second list; and a reporting unit that reports the results of the reconciliation. The processing engine matches inbound and outbound records of the first list and second list, and processes invalid records; and analyzes and accounts for un-matched records.
US09251493B2 Medication verification and dispensing
Medication errors happen frequently in hospital, home, and pharmacy environments. A medication verification and dispensing system provides protection against such errors. The apparatus includes a guide tube that receives a medication and imaging device(s) adjacent to the guide tube that take image(s) of the medication. The imaging devices(s) and light source(s) are oriented for capturing images that reveal markings, color, size, shape, etc., of the medication. A verification system uses a signature of the image to identify the medication or compares the image(s) to reference images to identify the medication and to a prescription record of the patient to ensure it is a correct medication, dose, amount, timing, etc., for administration. If the medication is correct, it is dispensed into a dispensing vessel that locks the medication inside, but unlocks when it recognizes a unique patient identifier worn by a patient that is a correct recipient for the medication.
US09251488B2 Apparatus and method of determining a likelihood of task completion from information relating to the reading of RFID tags
Methods and apparatuses are provided using RFID devices to assist in determining a likelihood that the performance of a task has been completed. In one implementation, an apparatus comprises a radio frequency identification (RFID) reader and a control circuit operably coupled to the RFID reader. The control circuit is configured to: detect, using at least information received via the RFID reader regarding a reading of one or more RFID tags by the RFID reader, one or more circumstances that evidence a status of interest pertaining to performance of a task of interest; and make a determination that the performance of the task of interest has likely been completed.
US09251484B2 Predicting likelihood of on-time product delivery, diagnosing issues that threaten delivery, and exploration of likely outcome of different solutions
A task effort estimator may determine a probability distribution of an estimated effort needed to complete unfinished tasks in a project based on one or more of a set of completed tasks belonging to a project and attributes associated with the completed tasks belonging to the project, a set of completed tasks not belonging to the project and attributes associated with the completed tasks not belonging to the project, or the combination of both. A project completion predictor may determine a probability distribution of completion time for the project based on the probability distribution of an estimated effort needed to complete the unfinished tasks in the project, and one or more resource and scheduling constraints associated with the project.
US09251483B2 Performance optimization of business processes by stochastic environmental changes
Methods and apparatus, including computer program products, are provided for optimizing applications, such as applications included in a business process. In one aspect, there is provided a computer-implemented method. The method may include receiving information representative of one or more interfaces and aspects of each of the interfaces. The interfaces may be adjustable by a business process supervisor. The business process supervisor may adjust one or more aspects of the one or more interfaces. The results of the adjustment may be received and used to determine optimum settings to the one or more interfaces. Related apparatus, systems, methods, and articles are also described.
US09251482B2 Chronically-problematic response alert system for service request and fulfillment between a service requester and a service performer
An electronic alert system and a related method of operation for identifying, determining, and reporting chronically-problematic responses for service request and fulfillment between a service requester and a service performer are disclosed. In one embodiment, the electronic alert system identifies and determines a chronically-problematic response by analyzing two relational data sets. A first set of relational data set correlates time elapsed between a first service request bell press by a service requester from a service request device, and a confirmatory signal of successful service fulfillment from a service request reception device held by the service performer, or from the service request device. Furthermore, a second set of relational data set correlates a number of repeated service request bell presses by the service requester, a time interval between each bell press, and the confirmatory signal of successful service fulfillment from the service request device or the service request reception device.
US09251479B2 Multi-interval dispatch method for enabling dispatchers in power grid control centers to manage changes
A method is provided that enables dispatchers in power grid control centers to manage changes by applying multi-interval dispatch. A multi-stage resource scheduling engine and a comprehensive operating plan are used. Multiple system parameter scenarios are coordinated.
US09251470B2 Inferred identity
Techniques for modifying search results associated with a search request based on a determination that a member profile attribute is inaccurate are described. According to various embodiments, an existing member profile attribute included in a member profile page of a particular member of an online social network service is identified. Member profile data and behavioral log data associated with a plurality of members of the online social network service is then accessed. Prediction modeling to verify the existing member profile attribute is performed using the accessed data. Additionally, a confidence score associated with the existing member profile attribute is generated based on the prediction modeling. Moreover, the existing member profile attribute is determined to be inaccurate based on the generated confidence score. Furthermore, the search results associated with a search request is modified based on the determination.
US09251467B2 Probabilistic parsing
Probabilistic parsing is described for calculating information about the structure of text and other ordered sequences of items to enable downstream systems such as machine translation systems, information retrieval systems, document classification systems and others to use the structure information. In various embodiments, a parsing inference component comprises inference algorithm(s) compiled from a probabilistic program which defines a stochastic process for generating text or other ordered sequences of items. In examples, the parsing inference component receives one or more observations or examples of text that are compatible with the stochastic process defined by the probabilistic program. The parsing inference component may apply the inference algorithms to the text to update one or more probability distributions over strings or other values relevant to the parse. In some examples, the parsing inference component uses the inference results to complete partial examples to assist a user with information retrieval tasks.
US09251466B2 Driving an interactive decision service from a forward-chaining rule engine
Disclosed techniques include generating a plurality of questions, each question based upon one or more conditions of a plurality of conditions, wherein the plurality of conditions are generated a plurality of business rules associated with a forward changing rule engine; identifying, as a side effect of evaluating the plurality of business rules for outcome data, missing information corresponding to the plurality of questions; and selecting, for presentation to a user, a first question of the plurality of questions to elicit the missing information from the user.
US09251454B2 Storage medium, transmittal system and control method thereof
A storage medium including a first transmittal module and a control module. The first transmittal module includes a plurality of first transmittal pads. The control module determines whether a level state of the first transmittal module is equal to a pre-determined state. When the level state is equal to the pre-determined state, the control module operates in a secure digital (SD) mode. When the level state is not equal to the pre-determined state, the control module operates in an embedded multimedia card (eMMC) mode.
US09251453B1 Wearable device with time-varying magnetic field and single transaction account numbers
An electronic transaction card communicates with an add-on slot of an intelligent electronic device. The add-on slot may be a memory card slot. The intelligent electronic device may be a mobile phone or other device with or without network connectivity. The electronic transaction card may have magnetic field producing circuitry compatible with magnetic card readers, smartcard circuitry, other point-of-sale interfaces, or any combination thereof.
US09251452B2 Labeling and authenticating using a microtag
A system for encoding energy peaks of an identifier comprises an encoder. The encoder is configured to define a readable spectral range of an identifier. The identifier comprises a rugate microtag. The encoder is configured to divide the readable spectral range into a plurality of bins. The encoder is configured to encode in a center of a bin near one end of the readable spectral range a reference peak. The encoder is configured to encode in a center of each of a set of bins a set of peaks of a data pattern within the readable spectral range.
US09251450B2 Image processing system and method of print job for executing print process in normal and secure mode and creates print job cancellation log
An image processing apparatus includes a determination unit that determines whether a print job received from outside is a normal print job or an authentication print job, and a control unit. When the determination unit determines that the received print job is the authentication print job, the control unit executes authentication print processing based on the received authentication print job. When the determination unit determines that the received print job is the normal print job, the control unit executes authentication print processing based on the received normal print job instead of executing normal print processing.
US09251448B2 Image processing apparatus including expansion memory
An image processing apparatus includes: an interpreter processing part for creating intermediate data by analyzing a page description language; a rasterize processing part for creating RIP image data for each band for dividing each page into a plurality of parts, on the basis of the intermediate data; a characteristic value calculating part for calculating a characteristic value of RIP image data and associating the calculated characteristic value with the corresponding RIP image data; and an expansion processing part for, when the RIP image data whose characteristic value agrees with that of RIP image data that is a target for expansion are stored in a cache, reading out the RIP image data whose characteristic value agrees, the RIP image data being stored in the cache, and storing the RIP image data in an expansion memory.
US09251441B2 Apparatus, method and program
An apparatus includes a presenting unit and a control unit. The presenting unit presents a plurality of options for interrupt printing along with an amount of incompletely printed sheet to be discharged while images are being printed on both surfaces of a continuous sheet in accordance with a prior job. The control unit interrupts, when one of the plurality of options presented by the presenting unit is designated, the prior job in timing according to the designated option to execute an interrupt job.
US09251439B2 Image sharpness classification system
A method for predicting whether a test image (318) is sharp or blurred includes the steps of: training a sharpness classifier (316) to discriminate between sharp and blurred images, the sharpness classifier (316) being trained based on a set of training sharpness features (314) computed from a plurality of training images (306), the set of training sharpness features (314) for each training image (306) being computed by (i) resizing each training image (306) by a first resizing factor; (ii) identifying texture regions (408, 410) in the resized training image; and (iii) computing the set of sharpness features in the training image (412) from the identified texture regions; and applying the trained sharpness classifier (316) to the test image (318) to determine if the test image (318) is sharp or blurred based on a set of test sharpness features (322) computed from the test image (318), the set of test sharpness features (322) for each test image (318) being computed by (i) resizing the test image (318) by a second resizing factor that is different than the first resizing factor; (ii) identifying texture regions (408, 410) in the resized test image; and (iii) computing the set of sharpness features in the test image (412) from the identified texture regions.
US09251434B2 Techniques for spatial semantic attribute matching for location identification
Techniques for spatial semantic attribute matching on image regions for location identification based on a reference dataset are provided. In one aspect, a method for matching images from heterogeneous sources is provided. The method includes the steps of: (a) parsing the images into different semantic labeled regions; (b) creating a list of potential matches by matching the images based on two or more of the images having same semantic labeled regions; and (c) pruning the list of potential matches created in step (b) by taking into consideration spatial arrangements of the semantic labeled regions in the images.
US09251433B2 Techniques for spatial semantic attribute matching for location identification
Techniques for spatial semantic attribute matching on image regions for location identification based on a reference dataset are provided. In one aspect, a method for matching images from heterogeneous sources is provided. The method includes the steps of: (a) parsing the images into different semantic labeled regions; (b) creating a list of potential matches by matching the images based on two or more of the images having same semantic labeled regions; and (c) pruning the list of potential matches created in step (b) by taking into consideration spatial arrangements of the semantic labeled regions in the images.
US09251432B2 Method and apparatus for obtaining a symmetry invariant descriptor from a visual patch of an image
The present invention concerns a method for deriving from an arbitrary local image descriptor a descriptor that is invariant under arbitrary mirror symmetries. For a point of interest, pi, for which the descriptor is to be determined a direction, ODi is determined. The local patch from which the descriptor is to be extracted is mirrored along ODi if a “smaller than” relation does not hold a feature extracted from the left half of the local image patch, in regard of ODi, compared to the right half of the local image patch. Thereby, the local patch is brought into a normalized intrinsic orientation. Thereafter, the descriptor is extracted. Examples include a mirror symmetry invariant version of Lowe's SIFT.
US09251430B2 Apparatus, method, and program for character recognition using minimum intensity curve of image data
A character recognition apparatus may include an imaging element configured to read a character string placed on an information recording medium; an image memory configured to store image data of the character string; and a character segmenting unit configured to segment a character constituting the character string. The character segmenting unit may include a minimum intensity curve creating unit configured to detect a minimum intensity value among light intensity values, and create a minimum intensity curve of the image data according to the minimum intensity value of each pixel row; a character segmenting position detecting unit configured to calculate a space between the characters neighboring in the created minimum intensity curve, in order to detect a character segmenting position between the characters; and a character segmenting process unit configured to segment each character according to the detected character segmenting position between the characters.
US09251429B2 Superpixel-based refinement of low-resolution foreground segmentation
A computer-implemented method performs foreground segmentation of an input image. The method receives a first foreground segmentation at a first resolution of the input image and determines a plurality of labelled seed points based on the first foreground segmentation of the input image. The method associates each of the plurality of pixels in the input image with one of the determined labelled seed points to obtain a second foreground/background segmentation of the input image, and performs foreground separation on the input image at a second resolution by classifying each of the segments of the second segmentation as one of foreground and background based on the label of the associated seed point.
US09251428B2 Entering information through an OCR-enabled viewfinder
An improved method for entering text or objects into fields is provided. Instead of a keyboard, a viewfinder provides text segmenting, text selecting and text recognizing (optical character recognition—OCR) functionalities. Text at a marker (e.g., a cursor or crosshairs) associated with the viewfinder is recognized and insertion of the recognized text is performed. The current frame is generally not captured by a user. As the user moves the camera to position a new word at the marker, the view finder is updated to provide results of recognition associated with the new word. A user is able to identify an area of interest, select text or other object of interest, and insert the same into one or more fields. The viewfinder may operate in conjunction with a camera of the electronic device on which the viewfinder is operating. Other mechanisms and variations are described.
US09251425B2 Object retrieval in video data using complementary detectors
Automatic object retrieval from input video is based on learned, complementary detectors created for each of a plurality of different motionlet clusters. The motionlet clusters are partitioned from a dataset of training vehicle images as a function of determining that vehicles within each of the scenes of the images in each cluster share similar two-dimensional motion direction attributes within their scenes. To train the complementary detectors, a first detector is trained on motion blobs of vehicle objects detected and collected within each of the training dataset vehicle images within the motionlet cluster via a background modeling process; a second detector is trained on each of the training dataset vehicle images within the motionlet cluster that have motion blobs of the vehicle objects but are misclassified by the first detector; and the training repeats until all of the training dataset vehicle images have been eliminated as false positives or correctly classified.
US09251419B2 Automated metric information network
A Metric Information Network (MIN) with a plurality of Ground Control Points (GCPs) that are selected in an automated fashion. The GCP selection includes clustering algorithms as compared to prior art pair-wise matching algorithms. Further, the image processing that takes place in identifying interest points, clustering, and selecting tie points to be GCPs is all performed before the MIN is updated. By arranging for the processing to happen in this manner, the processing that is embarrassingly parallel (identifying interest points, clustering, and selecting tie points) can be performed in a distributed fashion across many computers and then the MIN can be updated.
US09251418B2 Method of detection of points of interest in a digital image
A camera (10) produces a sequence of images (12) processed by a point of interest search algorithm (14) that is parameterizable with a detection threshold (τ) such that the number (N) of points of interest detected in the image varies as a function of the threshold level. The characteristic giving the number (N) of detected points of interest as a function of the threshold (τ) is modelled by a square root decreasing exponential function, which is dynamically parameterizable with values linked to the image to be analyzed. The method comprises the steps of: a) determining (18) values of parameterization of the decreasing exponential function for the current image; b) predicting (18), for this current image, an optimum value of the threshold by using the modelled characteristic, parameterized with the values determined at step a); and c) applying (14), for at least one later image, the point of interest search algorithm with the optimum threshold value (τ) computed at step b).
US09251417B1 Fast open doorway detection for autonomous robot exploration
Described is a system for open doorway detection for autonomous robot exploration, the system includes an onboard range sensor that is operable for constructing a three-dimensional (3D) point cloud of a scene. One or more processors that receive the 3D point cloud from the range sensor. The 3D point cloud is then filtered and downsampled to remove cloud points outside of a predefined range and reduce a size of the point cloud and, in doing so, generate a filtered and downsampled 3D point cloud. Vertical planes are extracted from the filtered and downsampled 3D point cloud. Finally, open doorways are identified from each extracted vertical plane.
US09251414B2 Note recognition and management using color classification
This disclosure describes techniques for creating and manipulating software notes representative of physical notes. For example, techniques are described for recognizing physical notes present within a physical environment, capturing information therefrom and creating corresponding digital representations of the physical notes, referred to herein as digital notes or software-based notes. At least some aspects of the present disclosure feature system and methods for note recognition using color classification. The system receives a visual representation of a scene having one or more notes, where each note has a color. The system generates indicators indicative of color classes of pixels in the visual representation. The system further determines a general boundary of one of the notes based on the indicators.
US09251409B2 Methods and apparatuses for gesture recognition
Methods, apparatuses, and computer program products are herein provided for enabling hand gesture recognition using an example infrared (IR) enabled mobile terminal. One example method may include determining a hand region in at least one captured frame using an adaptive omnidirectional edge operator (AOEO). The method may further include determining a threshold for hand region extraction using a recursive binarization scheme. The method may also include determining a hand location using the determined threshold for the extracted hand region in the at least one captured frame. The method may also include determining a fingertip location based on the determined hand location. Similar and related example apparatuses and example computer program products are also provided.
US09251408B2 Gesture recognition module and gesture recognition method
A gesture recognition module for recognizing a gesture of a user, includes a detecting unit, including at least one image capture device, for capturing at least one image of a hand of the user, to obtain a first position and a second position of the hand sequentially; a computing unit, electrically coupled to the detecting unit, for determining a first angle between a first virtual straight line connected between a fixed reference point and the first position and a reference plane passing through the fixed reference point, and determining a second angle between a second virtual straight line connected between the fixed reference point and the second position and the reference plane; and a determining unit, electrically coupled to the computing unit, for determining a relation between the first angle and the second angle, to decide whether a gesture of the hand is a back-and-forth gesture.
US09251404B2 Name bubble handling
Apparatus has at least one processor and at least one memory having computer-readable code stored therein which when executed controls the at least one processor: to determine a name relating to a face in an image; to calculate a first maximum length attribute for a name bubble for the face at a first zoom level; to select a part of the name for inclusion in the name bubble having regard to the first maximum length attribute; to calculate a second maximum length attribute for the name bubble for the face at a second zoom level, the first and second zoom levels being different and the first and second maximum length attributes being different; and to select a part of the name for inclusion in the name bubble for the face at the second zoom level having regard to the second maximum length attribute.
US09251401B1 Facial recognition to positively identify a live person subject
A method for authenticating a live person subject. The method includes receiving an authentication request from a user, generating a sequence of instructions instructing the user to point a face toward a sequence of facial directions, wherein the sequence of facial directions are randomly generated using a random sequence generation algorithm, presenting the sequence of instructions to the user, capturing, while presenting the sequence of instructions to the user, a sequence of live-captured facial images (LCFIs) based on a pre-determined frame rate, and generating an authentication result identifying the user as the live person subject by at least, matching the sequence of LCFIs to multiple reference facial images of the live person subject and validating each LCFI in the sequence of LCFIs based on a pre-determined criterion.
US09251400B2 Learning apparatus, method for controlling learning apparatus, detection apparatus, method for controlling detection apparatus and storage medium
A learning apparatus comprises a plurality of detection units configured to detect a part or whole of a target object in an image and output a plurality of detection results; an estimation unit configured to estimate a state of the target object based on at least one of the plurality of detection results; a classification unit configured to classify the image into a plurality of groups based on the state of the target object; and a weight calculation unit configured to calculate weight information on each of the plurality of detection units for each of the groups based on the detection results.
US09251399B2 Method of separating object in three dimension point cloud
A method of separating an object in a three dimension point cloud including acquiring a three dimension point cloud image on an object using an image acquirer, eliminating an outlier from the three dimension point cloud image using a controller, eliminating a plane surface area from the three dimension point cloud image, of which the outlier has been eliminated using the controller, and clustering points of an individual object from the three dimension point cloud image, of which the plane surface area has been eliminated using the controller.
US09251397B2 Fingerprint image capturing device and fingerprint image capturing module thereof
A fingerprint image capturing module includes a light-emitting element, a light-splitting element, a first light-reflecting element, a second light-reflecting element, a lens assembly and a fingerprint image sensing element, characterized in that: a projection light beam generated by the light-emitting element is reflected by the light-splitting element and the first light-reflecting element in sequence to form an illumination light beam that passes through a light-transmitting element and is projected onto a fingerprint of a finger, the illumination light beam is reflected by the finger to form an image light beam that is reflected by the first light-reflecting element, the image light beam sequentially passes through the light-splitting element and the lens assembly and is projected onto the fingerprint image sensing element through the second light-reflecting element, and the fingerprint image sensing element receives the image light beam to obtain a fingerprint image of the fingerprint of the finger.
US09251392B2 Indicia reading apparatus
There is set forth herein an indicia reading apparatus having an image sensor array including a plurality of pixels arranged in a plurality of rows and columns of pixels. The image sensor array can include a frame exposure period in which a certain subsequent and further subsequent row exposure periods have common exposure initiation times and each group of rows has sequential exposure termination times. An indicia reading apparatus can be controlled so that a light source bank of an illumination pattern assembly for projecting an illumination pattern is energized during an illumination period that overlaps a frame exposure period. The apparatus can be further controlled so that an illumination period terminates at or prior to an exposure termination time of the certain row.
US09251391B2 Method for continuous detection of a persons presence on public transportation
A method for continuous determination of a person's presence in a public transport conveyance is proposed, where a customer medium comprising an RF transceiver is assigned to the person, where at least one reading device per passenger compartment or car is provided for data communication with the customer media in the conveyance, which is connected to a computer serving as an on-board unit for the purpose of data communications, where these are also connected to each other in the case that several reading devices are provided, where an on-board unit serving as the main on-board unit is assigned to a passenger compartment or car if several passenger compartments or cars are present, and the other passenger compartments or cars are assigned to on-board units serving as secondary on-board units, which are connected to the main on-board unit for the purpose of data communication, where the customer medium is in a “sleep” mode upon entering the transport in order to keep energy consumption as low as possible.
US09251390B2 Item identification device antenna
An item identification device antenna which provides better field coverage for reading item identification tags. The item identification device antenna includes a first portion coupled to a tag reader for reading a tag on an item, wherein the first portion is for radiating an electromagnetic field at a predetermined frequency, and a second portion in the electromagnetic field for resonating at the predetermined frequency to radiate another electromagnetic field for reading the tag. The tags may include radio frequency identification (RFID) tags.
US09251388B2 Method for deploying large numbers of waste containers in a waste collection system
A method of redeploying waste containers in a waste collection system with an active or passive signal means requires a user to aim an optical character recognition reader at a waste container comprising a unique optical waste container identifier. The optical character recognition reader reads unique waste container optical identifier. The unique waste container optical identifier is converted to a unique electronically formatted waste container identifier. A unique radio frequency signal identifier is stored on a radio frequency emitting tag and associated with the unique electronically formatted waste container identifier. The radio frequency emitting tag is attached to the waste container.
US09251383B2 Device for preventing logging of computer on-screen keyboard
A device for preventing logging of computer on-screen keyboard has a pointer device and tandem device. The pointer device comprises a first transmission interface to connect the host computer, and an encryption module to encrypt and transfer data of the pointer device to the first transmission interface. This data contains pointer coordinates. A pointer data module is used to obtain, convert and save the coordinate data of the pointer device. A push-button data module is used to obtain, convert and save the push-button data of the existing pointer device. A physical interface module is used to obtain coordinates of the pointer device and original data of key events. The original data is converted into coordinates or push-button data of the pointer device by the pointer and push-button data modules. Then the encryption module decides if it is necessary to transfer the coordinate or push-button data in the form of encryption.
US09251382B2 Mapping encrypted and decrypted data via key management system
A data processing system having a host computer including a key manager, a control unit connected to the host computer, a data storage unit (such as a tape drive) controlled by the control unit, and data storage medium for storing data thereon to be written to or read from by the data storage unit. The key manager stores a data structure having at least one record having a volume serial number, as start location, a length entry, and a key for encrypting and decrypting data on the data storage medium. A data storage medium (such as data tape) is mounted on the data storage unit, and a volume recorded on the tape is retrieved. The control unit retrieves the data structure from the key manager and matches the volume serial number recorded in the retrieved data structure with the volume serial number retrieved from the data storage medium. It they match, the control unit passes to the data storage unit, commands to turn on or turn off encryption dependent upon the location where data is written by the data storage unit onto the data storage medium, or to turn on or turn off decryption dependent upon the location where data is read by the data storage unit from the data storage medium.
US09251381B1 Solid-state storage subsystem security solution
A solid-state storage subsystem, such as a non-volatile memory card or drive, includes a main memory area that is accessible via standard memory access commands (such as ATA commands), and a restricted memory area that is accessible only via one or more non-standard commands. The restricted memory area stores information used to control access to, and/or use of, information stored in the main memory area. As one example, the restricted area may store one or more identifiers, such as a unique subsystem identifier, needed to decrypt an executable or data file stored in the main memory area. A host software component is configured to retrieve the information from the subsystem's restricted memory area, and to use the information to control access to and/or use of the information in the main memory area.
US09251380B1 Method and storage device for isolating and preventing access to processor and memory used in decryption of text
A storage drive includes a first memory that stores first text. A first processor generates a first instruction to decrypt the first text. A cryptographic module includes a second memory, a cryptographic device, a memory module, and a second processor. The second memory is inaccessible to the first processor and stores a cryptographic key. The cryptographic device accesses the second memory to obtain the cryptographic key and based on the first instruction, decrypts the first text. The memory module stores a status of execution of the first instruction by the cryptographic device. The second processor, prior to the cryptographic device decrypting the first text, forwards the first instruction to the cryptographic device and stores the status of execution of the first instruction in the memory module. The memory module is connected between the first and second processors and isolates the first processor from the second processor.
US09251373B2 Preventing stack buffer overflow attacks
Improved buffer overflow protection for a computer function call stack is provided by placing a predetermined ShadowKEY value on a function's call stack frame and copying the ShadowKEY, a caller EBP, and a return pointer are pushed onto a duplicate stack. The prologue of the function may be modified for this purpose. The function epilogue is modified to compare the current values of the ShadowKEY, caller EBP, and the return pointer on the function stack to the copies stored on the duplicate stack. If they are not identical, an overflow is detected. The preserved copies of these values may be copied back to the function stack frame thereby enabling execution of the process to continue. A function prologue and epilogue may be modified during compilation of the program.
US09251370B2 Personal content control on media device using mobile user device
A method for controlling personal content on a media device includes establishing, at the media device, a wireless connection with a mobile user device using a wireless communication circuit of the media device; receiving, from the mobile user device, account information for an account associated with personal content, the personal content of the account accessible by the media device from a server computer over a communication network or from a memory of the media device; receiving, from the mobile user device, a usage term for accessing or using the personal content of the account; and controlling access to or usage of the personal content of the account by the media device based on the received account information and the usage term.
US09251368B2 Provisioning transient-controlled secure environments for viewing sensitive data
A new approach to customer support that protects working artifacts through their entire lifecycle by provisioning, on-demand, a transient-controlled debugging environment that preferably is associated with a particular support issue (or subset of issues) when particular artifacts (e.g., files) are securely received at the service or software provider. This approach allows for complete (or substantially complete) isolation and control of the artifacts in a contained environment for so long as necessary by the provider. Preferably, the provider owns or otherwise manages the provisioned environment, which can be augmented as needed to meet the debugging requirements of the particular issue. Preferably, the provisioned environment is restricted in access to only those engineers or others with a verifiable need to know, or that have the necessary training and skill sets for the support operation required.
US09251367B2 Device, method and program for preventing information leakage
Provided is a device for preventing information leakage including: a storage unit that stores message time, request source information, and request destination information in relation to each information requesting message; a unit that suspends a response message containing personal information in response messages in response to the information requesting messages, for a predetermined suspended time from a message time of the corresponding information requesting message; a unit that counts the number of information requesting messages transmitted from the same request source to the same destination and corresponding to the suspended response message on the basis of information stored in the storage unit; and a unit that, in the case where the counted number of the information requesting messages exceeds a predetermined threshold value, applies a protection process to the suspended response message so that the personal information contained in the suspended response message is not received by the request source.
US09251362B2 Medium for storing control program, client apparatus, and control method for client apparatus
A computer-readable storage medium that stores a control program for a client apparatus connectable to a repeater storing execute permission information on a plurality of codes included in an application program received from a server, the control program causing the client apparatus to execute a process including receiving the application program and the execute permission information from the repeater, updating the execute permission information received from the repeater based on evaluation information on the application program received from the repeater, and executing the application program based on the execute permission information updated based on the evaluation information.
US09251359B2 Method and apparatus for managing crowd sourced content creation
A method, apparatus, computer program product and system are provided for managing crowd sourced content creation. In this regard, a method is provided that includes receiving information regarding at least one content recording device and information regarding a recording subject. The method further includes determining whether the at least one content recording device is eligible to receive at least one permission indicator, based at least in part on the information regarding the at least one content recording device and the information regarding the recording subject. The method also includes causing the at least one permission indicator to be provided to the at least one content recording device in an instance in which it is determined that the at least one content recording device is eligible to receive the at least one permission indicator.
US09251358B2 System and method for providing secure access to system memory
There is provided a method of providing secure access to data stored in a system memory of a computer system, the computer system comprising a memory controller for writing data to and reading data from the system memory. The method comprises generating a random encryption key each time the computer system is booted and storing the random encryption key in a volatile memory region of the memory controller. The method additionally comprises encrypting data using the random encryption key to create encrypted data, and storing the encrypted data in the system memory. Also provided are a memory subsystem and a computer system for performing the method.
US09251357B2 Scalable precomputation system for host-opaque processing of encrypted databases
A method, system, and computer program product to generate results for a query to an encrypted database stored on a host are described. The system includes a host comprising a storage device to store the encrypted database, and a a secure processor to generate indexes and index metadata from the encrypted database, each index identifying records of the encrypted database associated with a range of data for at least one field stored in the records of the encrypted database and the metadata indicating the range of data identified by the associated index. The system also includes an interface of the host to receive the query, and a host processor to generate a sub-query form the query for each field associated with the query. Based on sub-query results obtained through the index metadata, the secure processor searches a subspace of the encrypted database to generate the results of the query.
US09251355B2 Field level database encryption using a transient key
Embodiments of the present invention disclose a method, system, and computer program product for implementing user specific encryption in a database system. A computer receives a query statement including a user specific key and data, the data including data needing encryption and non-encrypted data. The computer encrypts the data needing encryption using the user specific key. The computer inserts both the encrypted data and the non-encrypted data into a table row in a database. The computer creates a hash of the user specific key, and stores the hash of the user specific key in the table row with the data.
US09251351B2 System and method for grouping computer vulnerabilities
A system and method in one embodiment includes modules for creating an asset tag including one or more conditions of an asset on a network, adding the asset tag to an asset report template, and generating an asset report from the asset report template. More specific embodiments include creating the asset tag by generating a query for the one or more conditions. The asset tag may include a second asset tag configured to be updated automatically, and a third asset tag configured to be updated manually, and the second asset tag may be updated automatically when the asset tag is updated. Other embodiments include creating a vulnerability set including a selection of vulnerabilities from a plurality of vulnerabilities, adding the vulnerability set to the asset report template, and scanning a plurality of assets on the network.
US09251349B2 Virtual machine migration
Attesting a virtual machine that is migrating from a first environment to a second environment includes in response to initiation of migration of the virtual machine from the first environment to the second environment, accessing one or more stored trust values generated during the trusted boot of the virtual machine in the first environment, determining if the accessed trust values define a security setting sufficient for the second environment, and if the accessed trust values do not define a security setting sufficient for the second environment, performing a predetermined action in relation to the migration of the virtual machine to the second environment.
US09251348B2 Detection of return oriented programming attacks
In one embodiment, a processor includes at least one execution unit and Return Oriented Programming (ROP) detection logic. The ROP detection logic may determine a ROP metric based on a plurality of control transfer events. The ROP detection logic may also determine whether the ROP metric exceeds a threshold. The ROP detection logic may also, in response to a determination that the ROP metric exceeds the threshold, provide a ROP attack notification.
US09251346B2 Preventing propagation of hardware viruses in a computing system
Preventing propagation of hardware viruses in a computing system, including: determining, by a hardware virus detection module, whether an empty connector in the computing system is damaged, wherein the empty connector is blocked from receiving an attachable computing device by a bumper; determining, by the hardware virus detection module, whether a connector for the attachable computing device is damaged; and responsive to determining that the empty connector is not damaged and that the connector for the attachable computing device is not damaged, moving the bumper such that the empty connector is not blocked from receiving the attachable computing device.
US09251345B2 Detecting malicious use of computer resources by tasks running on a computer system
A method, apparatus, and computer program product for identifying malware is disclosed. The method identifies processes in a running process list on a host computer system. The method identifies ports assigned to the processes in the running process list on the host computer system. The method determines whether any one of ports that is currently in use in the host computer system is not assigned to any of the processes in the running process list. The method then makes a record that a hidden, running process is present as a characteristic of an attack in response to a determination that one of the ports is currently in use but is not assigned to any of the processes in the running process list in the host computer system.
US09251344B2 Method, device and storage medium for processing virus
The present disclosure relates to a method, a device and a storage medium for processing virus which can automatically distinguish which of processing mode is best for the current status of the electronic apparatus. The method includes: detecting a virus scan operation; in response to the virus scan operation, determining whether conditions (i) and (ii) are true, wherein the condition (i) is true when a time interval between a last time of processing virus using a first virus processing mode and the current time is larger than a preset interval, the condition (ii) is true when at least one of risk situations exist during a time period between the last time of processing virus using the first virus processing mode and the current time; if one of conditions (i) and (ii) being true, calling the first virus processing mode to scan files in the electronic apparatus.
US09251343B1 Detecting bootkits resident on compromised computers
Techniques detect bootkits resident on a computer by detecting a change or attempted change to contents of boot locations (e.g., the master boot record) of persistent storage, which may evidence a resident bootkit. Some embodiments may monitor computer operations seeking to change the content of boot locations of persistent storage, where the monitored operations may include API calls performing, for example, WRITE, READ or APPEND operations with respect to the contents of the boot locations. Other embodiments may generate a baseline hash of the contents of the boot locations at a first point of time and a hash snapshot of the boot locations at a second point of time, and compare the baseline hash and hash snapshot where any difference between the two hash values constitutes evidence of a resident bootkit.
US09251339B2 Core dump privacy during application failure
Embodiments of the present invention address deficiencies of the art in respect to core dump generation during application fault handling and provide a method, system and computer program product for privacy preservation of core dump data during application fault handling. In an embodiment of the invention, a method for privacy preservation of core dump data during application fault handling can be provided. The method can include receiving a crash signal for an application and generating a core dump with object data for the application. The method further can include obfuscating the object data in the core dump and writing the core dump with obfuscated object data to a file. In this way, the privacy of the object data in the core dump can be preserved.
US09251337B2 Scalable, highly available, dynamically reconfigurable cryptographic provider with quality-of-service control built from commodity backend providers
A system for remapping subsets of host-centric application programming interfaces to commodity service providers includes a processor configured to receive a commodity service providers object, embed the commodity service providers object with a handle, transform the handle into a serialized object readable by a hardware security module, generate a virtualized handle from the transformed handle, select a target hardware security module based on characteristics of the serialized object and map the virtualized handle to the target hardware security module.
US09251334B1 Enabling playback of media content
Technology is described for allowing playback of protected media content on an untrusted device. A request to entitle playback of the protected media content may be received from a trusted device. The request may include an outer encrypted message with location information for the trusted device and identity information for the trusted device and a nested encrypted message with a signed challenge processed by the untrusted device. An entitlement for the playback of the protected media content may be generated in response to verification of the request in the outer encrypted message and the nested encrypted message. The entitlement may be sent to the untrusted device via the trusted device. The entitlement may enable the untrusted device to play the protected media content for a defined duration.
US09251333B2 Wearable user device authentication system
Systems and methods for authenticating a user include a wearable user device receiving a first request to access a secure system. A plurality of authentication elements are then displayed on a display device to a user eye in a first authentication orientation about a perimeter of an authentication element input area. A user hand located opposite the display device from the user eye is then detected selecting a sequence of the plurality of authentication elements. For each selected authentication element in the sequence, the wearable user device moves the selected authentication element based on a detected movement of the user hand and records the selected authentication element as a portion of an authentication input in response to the user hand moving the selected authentication element to the authentication element input area. The user is authenticated for the secure system if the authentication input matches stored user authentication information.
US09251332B2 Security system and method for controlling access to computing resources
A security system comprises a personal digital key (PDK), a reader and a computing device. The PDK is a portable, personal transceiver that includes a controller and one or more passwords or codes. The computing device includes a detection engine, vault storage and a set up module. The detection engine detect events relating to the access of any files and third-party systems by the computing device and receives information from the reader as to whether the PDK is present/linked. The detection engine controls whether a user is able to access any of the functionality provided by the computing device based upon whether the PDK is in communication with the reader or not. The present invention also includes a number of methods such as a method for initializing the security system, a method for setting up a computing device, and a method for controlling access to computing resources.
US09251330B2 Secure management of a smart card
A smart card comprises: a processing circuit; a memory that contains a protected object; an activity detector that receives a signal that describes a planned activity of a person who is in physical possession of the smart card; and an activity analyzer that evaluates features of the planned activity. In response to the activity analyzer determining that a predefined risk associated with the planned activity exceeds a predetermined value, the activity analyzer: issues an instruction to the person who is in physical possession of the smart card to provide a biomarker to a biosensor that is physically contained within the smart card; and receives, from the biosensor, real-time biometric data for the person who is in physical possession of the smart card.
US09251329B2 Button depress wakeup and wakeup strategy
Disclosed is a biometric authentication system. The system comprises a biometric image sensor in an operative position with respect to a mechanical switch on a host electronic device and configured to sense biometric characteristics of a biometric object while the biometric object is operating the mechanical switch, the operating of the mechanical switch providing at least one of input and control to the host electronic device; and wake on event logic cooperating with at least one of the biometric image sensor and the host electronic device and configured to at least delay any response by the biometric image sensor or the host electronic device that increases power consumption by either the biometric image sensor or the host electronic device, beyond that needed for the performance, by at least one of the biometric image sensor and the host electronic device, of a bona fides analysis of an object being sensed while operating the mechanical switch, until a positive completion of the bona fides analysis determines that the object being sensed is an object desired to be sensed to perform a user authentication.
US09251326B2 Personal digital key initialization and registration for secure transactions
A system and method provide efficient, secure, and highly reliable authentication for transaction processing and/or access control applications. A personal digital key (PDK) is programmed using a trusted programming device to initialize and/or register the PDK for use. In one embodiment, the initialization and registration processes are administered by a specialized trusted Notary to ensure the processes follow defined security procedures. In a biometric initialization, the programming device acquires a biometric input from a user and writes the biometric data to a tamperproof memory in the PDK. In registration, the Programmer communicates to one or more remote registries to create or update entries associated with the user PDK. Once initialized and registered, the PDK can be used for various levels of secure authentication processes.
US09251324B2 Metadata driven real-time analytics framework
Methods, systems, and computer program products are provided for developing application definition packages, and deploying the application definition packages at cloud services to produce real-time data analytics applications. In one implementation, a selection is received of an application definition package that defines a real-time data analytics application. The application definition package indicates an application name and includes at least one payload definition, reference data definition, and query definition. A domain name is provided for the real-time data analytics application, and a cloud service is generated that is associated with the domain name. The application definition package is applied to an application template to generate a finalized real-time data analytics package. The finalized real-time data analytics package is instantiated in the cloud service to create a network-accessible instance of the real-time data analytics application.
US09251323B2 Secure access to a plurality of systems of a distributed computer system by entering passwords
mechanisms are provided to securely access systems of a distributed computer system by entering passwords. Some systems are accessible by equal, and some systems are accessible by different passwords. The mechanisms store information, which systems (I, II) are accessible by equal, and which are accessible by different passwords and ask to enter a proper password when opening a session by accessing a system of the distributed computer system. The mechanisms cache the password and use the stored information to verify, if another system to be accessed during the current session is accessible by an equal password like a system already accessed during said session. If the result of the verification is true, the mechanisms re-use the adequate cached password. If the result of the verification is false, the mechanism ask to enter a proper password to access the other system and cache the password required to access the other system in a way that during the current session, it can be re-used when accessing other systems accessible by the same password.
US09251315B2 Security key management based on service packaging
A device receives application information associated with applications provided by a network, and determines service package identifiers for one or more applications identified in the application information. The device also receives information associated with devices and subscribers of the network, and determines security key parameters based on the information associated with the devices and the subscribers of the network. The device further generates, based on the security key parameters, a security key for each of the service package identifiers.
US09251313B2 Systems and methods for visualizing and managing telepresence devices in healthcare networks
Disclosed herein are various embodiments of systems and methods for visualizing, analyzing, and managing telepresence devices operating in a telepresence network of healthcare facilities. The visualization and management system for telepresence devices may display a first viewing level that includes a geographical representation of the location of various telepresence devices. A user may selectively view a global view of all telepresence devices, telepresence devices within a particular region, and/or the details of a particular telepresence device. A user may also access a viewing level of a network of healthcare facilities. The user may view, analyze, and/or manage the healthcare network, telepresence device network, individual telepresence devices, connection rules, and/or other aspects of the healthcare network using the geographical visualization and management tool described herein.
US09251310B2 Therapy management system and method for peritoneal dialysis
A method for organizing care for a patient undergoing a peritoneal dialysis therapy under a system including at least one display device, at least one memory device, at least one processor and at least one peritoneal dialysis instrument for performing the peritoneal dialysis therapy, the method comprising: organizing information for presentation in a plurality of screens using the at least one display device, the at least one memory device, and the at least one processor, wherein each screen presents information pertinent to a particular aspect of the peritoneal dialysis therapy; and displaying in the plurality of screens information about the patient's prescription for the peritoneal dialysis therapy, information about medication the patient is taking in connection with the peritoneal dialysis therapy, and information about the patient's compliance with the peritoneal dialysis therapy.
US09251304B2 Circuit design evaluation with compact multi-waveform representations
A design tool can implement phase algebra based design evaluation to efficiently evaluate a circuit design with a compact representation of numerous waveforms without simulating the individual waveforms. Instead of individual waveforms, the phase algebra based design evaluation employs compact representations of a group or set of waveforms. Phase algebra based evaluation constructs representations of a set of waveforms based on relationships among a devised set of functions that account for the various states of a signal over time, including transitions and glitches. A memorized-transition function, referred to herein as an M-function, indicates signal transitions over time.
US09251303B2 Method and apparatus for use in design of a system
A method is disclosed for use in design of a system, the system to include a plurality of sources contributing to a variable system effect. The method includes determining a plurality of functional units to form the system, obtaining a plurality of constant functional unit source informations, determining at least one variable quantity, associating each functional unit with one of the at least one variable quantity, obtaining variable functional unit source information by combining the constant functional unit source information with the variable quantity associated with the functional unit, and deriving the variable system effect based on combining the variable functional unit source informations. Further a device for use in design of a system is disclosed and also a tangible computer-readable medium storing instruction code thereon, that when executed causes one or more processors to perform steps for design of a system.
US09251298B2 Electrical network model synchronization
Among other things, one or more techniques and/or systems are provided for maintaining an electrical network model describing an electrical network. A fault detection, fault isolation, and load restoration (FDIR) component, a voltage/var control (VVC) component, and/or other components may be provided with access to the electrical network model so that the components may have access to relatively up-to-date and/or accurate information describing the electrical network when executing functionality for the electrical network. For example, the FDIR component and the VVC component may be synchronized based upon the electrical network model so that the FDIR component may have notice of network changes by the VCC component, and/or the VCC component have may have notice of network changes by the FDIR component.
US09251294B2 Method and system for approximate string matching
Approximate string matching of a target string to a trie data structure in which the trie data structure has a root node and generations of child nodes, each node representing at least one character in an alphabet to provide a lexicon of words and word fragments. Traversing the trie data structure includes starting from the root node by comparing each node of a branch of the trie data structure to characters in the target string and adding characters traversed in a branch of the trie data structure to a gathered string to provide suggestions of approximate matches. If a node is reached that is flagged as a node for a word or a word fragment and, and if the target string is longer than the gathered string, the method loops back to the root node, and continues the traverse from the root node. At each node, the system determines if there is a correction rule for one or more characters in the remainder of the target string from the current node, and if so, applies the correction rule to the target string to obtain a modified target string.
US09251293B2 Determining common table definitions in distributed databases
Determining common table definitions in distributed databases includes independently establishing, for a node in a distributed database, a common network definition for shared logical table names. Establishing the common network definition includes providing local definitions for at least one logical table, and querying at least one node in a network of nodes to determine any existing network definitions for the logical table. If there is no existing network definition, the method includes adding the local definition as a new network definition. If there is an existing network definition, the method includes updating the existing network definition with any extra columns of local definition, and applying an updated network definition to other nodes in the network holding a record of the network definition.
US09251290B2 Method, server, terminal device, and computer-readable recording medium for selectively removing nondeterminism of nondeterministic finite automata
A method for selectively eliminating nondeterministic elements of NFA is disclosed. The method includes steps of: (a) determining a specific state calculated to have a highest arrival probability through a transition from a current state among all states in the NFA as a current highest probability state; (b) determining whether there exists at least one common transition between a first set of transitions including at least one transition moving the current highest probability state to a state i and a second set of transitions including at least one transition moving the current highest probability state to a state j in the NFA; and (c) excluding the at least one common transition between the first and the second sets of transitions and creating a state k which is arrived as a result of moving from the current highest probability state through the at least one common transition.
US09251288B2 Thumbnail distribution system, server, client and program
A thumbnail distribution system includes a client device and a server communicatable with each other by using a hyper text transfer protocol (HTTP). A client device includes a request generating unit, a request transmitting unit, a response receiving unit, and a data processing unit. The request generating unit generates an HTTP request having a request line storing a file name of a file store in a storing unit. The request transmitting unit transmits the HTTP request. The response receiving unit receives an HTTP response having a response body storing a thumbnail corresponding to the file having the file name stored in the request line. The data processing unit performs a data processing based on the thumbnail stored in the response body. The request receiving unit receives the HTTP request transmitted from the request transmitting unit. The response generating unit generates the HTTP response based on the HTTP request. The response transmitting unit transmits the HTTP response to the response receiving unit.
US09251284B2 Mixing synchronous and asynchronous data streams
A queue can store streams of data acquired from servers asynchronously based upon received data requests and subsequent subscription with respect to one or more data sources/servers. The queue can be managed for subsequent synchronous or asynchronous release of received streams of data, for example.
US09251283B2 Instrumenting a website with dynamically generated code
A method, system, and medium are provided that relate to dynamically instrumenting a website. In general, an exemplary aspect of the invention includes storing configuration information in a datastore. A unique identifier, which corresponds to configuration information, is inserted within code of one or more web pages that relate to the website. When content is requested from the website, such as by a browser, the unique identifier can be used to retrieve corresponding configuration information. Using corresponding configuration information, instrumenting code may be generated and communicated, thereby instrumenting the website.
US09251282B2 Systems and methods for determining compliance of references in a website
Systems and methods of determining compliance of content in a website or web application are disclosed. The systems and methods comprise a compliance tool to retrieve data associated with website or web application content. The compliance tool can scan the data to determine references to network locations. The compliance tool can compare the references to one or more approval rules to determine whether the references comply with the approval rules. A report can be compiled and outputted that indicates which references comply and which references do not comply with the approval rules. A user can have the option to add non-complying references to an approved list. The compliance tool can further remove non-complying references from the website or web application data and/or register non-complying references with a firewall.
US09251279B2 Methods and systems for using community defined facets or facet values in computer networks
A database search method and system utilize user community defined facets and facet values for refining searches. The system provides access to a database having a plurality of records in respective categories of information. Each record has one or more facets to the respective category of information. The system enables user input of a search term formed of a first parameter indicative of at least one category of information of the database. In response to the user input, the invention system displays (a) a set of search results, including records from the database of the at least one category of information, and (b) a listing of facets and/or facet values of the records in the search results. The listing of facets and/or facet values serve as suggested additional parameters for further refining the search terms or guiding user navigation of the database. In response to user selection of a facet value from the listing, the system refines the search term resulting in a refined search term formed of the first parameter plus the user selected facet and/or facet value. A search of the database is rerun using the refined search term. The facets and facet values are defined by a computer network community of users over time and through use of the network community portal. Another embodiment is an advertising engine that displays targeted advertisements to the user based on refined search. Another embodiment is a method that utilizes refined search to help the user with navigation of a site (e.g., website or other computer network site) as a component of a GUI.
US09251276B1 Prioritization of retrieval and/or processing of data
Systems and methods of prioritizing retrieval and/or processing of data related to a subset of attributes based on a prediction of associated values are presented herein. In certain implementations, a request for values associated with respective first attributes may be received. Based on the request, first queries for data related to the first attributes may be performed. Based on the first queries, a first subset of data related to calculating at least some of the associated values may be received. At least some of the associated values may be predicted based on the first subset of data. Based on the prediction of the associated values, retrieval and/or processing of data related to a first subset of the first attributes may be prioritized over retrieval and/or processing of data related to one or more other subsets of the first attributes.
US09251272B2 Reconfigurable hardware structures for functional pipelining of on-chip special purpose functions
A method and apparatus for reconfiguring hardware structures to pipeline the execution of multiple special purpose hardware implemented functions, without saving intermediate results to memory, is provided. Pipelining functions in a program is typically performed by a first function saving its results (the “intermediate results”) to memory, and a second function subsequently accessing the memory to use the intermediate results as input. Saving and accessing intermediate results stored in memory incurs a heavy performance penalty, requires more power, consumes more memory bandwidth, and increases the memory footprint. Due to the ability to redirect the input and output of the hardware structures, intermediate results are passed directly from one special purpose hardware implemented function to another without storing the intermediate results in memory. Consequently, a program that utilizes the method or apparatus, reduces power consumption, consumes less memory bandwidth, and reduces the program's memory footprint.
US09251270B2 Grouping search results into a profile page
Methods are disclosed for grouping search results into a profile page. A search engine accepts a user search string and generates a first set of results. In response to the first set of results, a query generator generates queries corresponding to a number of entities sharing a common name. The search engine executes the queries, returning responsive data sets. An entity resolver merges the data sets to ensure that each unique entity is represented by a single data set. A threshold may be defined such that results meeting a certain level of similarity are merged. A profile generator creates a profile page for each unique entity using biographical data contained in the respective data sets and generates a results page containing links to each unique profile. The results page is then sent to the user for display on a graphical user interface.
US09251268B2 Automated target specific format conversion of context information from a user query
Providing context to a target minimizes the amount of information that a user must input. Context transfer pages receive context and reformat for the target. Selection of links to such pages provide context which is then reformatted and provided to the target to pre-populate information for the user. A return link can be specified to enable the target to return further context upon user interaction completion. The return link can specify further context transfer pages which can use the returned context to direct the performance of convenience actions, including invoking other applications on the user's computing device and entering information into them. The context transfer pages can themselves collect information from the user to provide appropriate interfaces without requiring resource investment from the target.
US09251267B2 Generating behavior information for a link
A computer-implemented method includes receiving a request for a web page; retrieving information associated with the web page, wherein the information comprises a link and one or more link placeholders associated with the link; determining context information associated with the computing device; generating, based on the context information, behavior information for the link; and populating at least one of the one or more link placeholders with the behavior information.
US09251266B2 Assisting users in searching for tagged content based on historical usage patterns
A tagging event can be detected where a software entity is associated with a tag resulting from a user interaction. At least one situational attribute relating to the tagging event can be automatically determined. The one or more situational attribute can be stored in a data repository so that the stored situational attribute is associated with the tag. The detecting, determining, and storing can be repeated for a set of different tags, each associated with a software entity. A search of tagged software entities can be conducted. The results of the search can be modified based at least in part upon the stored situational attributes of the tagged software entities.
US09251264B2 Systems and methods for enabling an electronic graphical search space of a database
A computer-implemented method is provided for enabling Internet users to interact with a graphical search interface by: generating a multi-dimensional search space having a plurality of vertices, based on the initial and related search parameters, wherein each vertex is populated with and represents one of the initial or related search parameters; generating a matrix of hyperlinks within the multi-dimensional search space, each hyperlink having coordinates within the search space defining a relevance of the hyperlink to each of the initial and related search parameters; displaying a graphical interface projecting the multi-dimensional search space, along with user elements by which the user may adjust a relative weight of one or more of the initial and related search parameters by interacting with one or more of the hyperlinks; and displaying a plurality of search results automatically updated in real time based on the user-adjusted weights of the initial and related search parameters.
US09251263B2 Systems and methods for graphical search interface
Some embodiments of the present disclosure provide a graphical user interface as a means of inputting search parameters to database search engines. In some embodiments, two or three dimensional projections spatially represent relationships between search parameters, located along the periphery of the projections and search hits whose significance are represented by position relative to the center of the projection and comparative distance from each of the search parameters. As the user manipulates the overall shape of the search projection, the weighting of search parameters adjusts, reconfiguring the search. The present disclosure also provides, in some embodiments, an intuitive means of assimilating search parameter weightings based on peer or social network preferences with global search results.
US09251260B2 Social network interaction facilitation from search results interface
A user interface providing results to a user's search also facilitates user interaction with their social network. Such interaction includes a search context by which individuals from the user's social network can perform an equivalent search or access equivalent search results. The user can select individual search results to be shared and, in response to a search query, the user is provided with responsive search results, and also identification of individuals, from the user's social network, that are responsive to the user's search query. The sharing of search results includes a search context, through which the individuals to whom such search results are shared can perform an equivalent search and be presented with equivalent search results. The sharing of search results also includes the provision of a social context within which such search results are being shared.
US09251258B2 Client application fingerprinting based on analysis of client requests
Processes are disclosed for fingerprinting and identifying client applications based on the analysis of client requests. In an HTTP-based embodiment, a fingerprint is constructed based on the presence and order of HTTP headers included in a request from a client application or device. This fingerprint may then be compared to known fingerprints associated with particular client applications to identify the particular client application and/or to assess whether the client application is malicious. The results of this analysis may, for example, be used to determine how to respond to the current request and/or subsequent requests.
US09251253B2 Expeditious citation indexing
Methods and systems for indexing patent related prior art citations are disclosed. Electronic documents can be obtained from one or more patent information systems. An OCR process can be performed on some of the electronic documents. Citations within the documents can be identified and compared to a trusted records list. The citations can be associated with one or more predetermined categories. For example, citations can be categorized into groups such as when a reference is cited (e.g., with original filing, pre and post allowance), who provided the reference (e.g., cited by the applicant, or the examiner), and how the reference is characterized (e.g., statutory basis, combination of references). The citations and corresponding categories can be output to a user or made available for subsequent processing.
US09251238B2 Data warehouse queries using SPARQL
Disclosed is a system allowing to query data warehouses using SPARQL. An aspect of the system may support the representation of multidimensional data as virtual graphs. Another aspect of the system may provide mapping of SPARQL queries directed against multidimensional data vis-à-vis the graphs to native queries directed against the multidimensional data. Responses from the native queries may then be translated to a SPARQL response format.
US09251235B1 Log-based synchronization
A device may participate in a shared data state in which editing operations performed locally are distributed and synchronized with other devices participating in the shared data state. Data may be maintained in log-structured storage files on each device. Changes made locally may be conditionally appended to log-structured storage and committed or rolled back during synchronization. Sets of related change descriptors may be identified based on inferred user intent. Conflict resolution rules may be applied to sets of related change descriptors. Conflicts may be resolved through application of conflict resolution rules or through a user-involved process.
US09251233B2 Merging an out of synchronization indicator and a change recording indicator in response to a failure in consistency group formation
A first data structure stores indications of storage locations that need to be copied for forming a consistency group. A second data structure stores indications of new host writes subsequent to starting a point in time copy operation to form the consistency group. Read access is secured to a metadata storage area and a determination is made as to whether the second data structure indicates that there are any new host writes. In response to determining that the second data structure indicates that there are new host writes, write access is secured to the metadata storage area, the first data structure is updated with contents of the second data structure to determine which additional storage locations need to be copied for formation of a next consistency group, and the second data structure is updated to indicate that that the second data structure is in an initialized state.
US09251232B2 Database controller, method, and system for storing encoded triples
A database controller controls a database for storing graph data encoded as triples, each triple having a subject, a predicate, and an object, and each stored within a data item among a set of data items ordered according to the triple stored within. Each data item is stored on a storage node from among a plurality of storage nodes distributed in a network. The database controller includes a storage request receiver configured to receive a request to store a triple in the database, and a data item generation module configured to generate two or more data items each having a different version of the triple.
US09251228B1 Eliminating noise in periodicals
A method and system for eliminating global and local noise in periodical items is described. An exemplary method may include preprocessing each item in a set of items using one or more rules, removing global noise from the set of items using semantic similarities across items in the set of items, and removing local noise in each item in the set of items based on text content in each item.
US09251226B2 Data integration using automated data processing based on target metadata
Approaches for data integration between multiple IT sources using automated data processing based on target metadata are provided. Specifically, an integration component is configured to load a mapped data set into a table with delta processing based on a configuration object containing, e.g., the source data location, target table name, and source to target mapping. The integration component uses the target metadata to validate data, identify changes, generate the necessary database programming language (e.g., structured query language (SQL)), and run the database programming language with data binding to perform the actual data updates. The integration component leverages the data target metadata to automate the processing of source data, thus providing a way to validate the data, and identify delta changes at the field level between the source and target. This significantly reduces the overall development effort, while providing consistency in record handling and error reporting.
US09251224B2 Triggering and ranking of native applications
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for determining when to search a native application corpus for native applications and insert native application search results into a set of general web search results in response to receiving a query.
US09251223B2 Alternative web pages suggestion based on language
Many websites publish variants of their web pages based on language and region. However, when a user is directed toward the incorrect web page for the user's language preference, it there is not a simple way for the user to select the appropriate localized or region specific version of the web page. According to an embodiment, a language preference from a user may be received. A first language for a first web page may be identified and the first web page may be received by a computing device of the user. A second language for a second web page may be identified. The second web page may comprise an alternate version of the first web page. The first web page or the second web page may be selected according to the language preference of the user and the selected web page may be presented to the user.
US09251219B2 Tunable hardware sort engine for performing composite sorting algorithms
Embodiments include methods, systems and computer program products for performing a composite sort on a tunable hardware sort engine includes determining desired sort performance parameters, configuring a composite sort engine based on the desired sort performance parameters, and receiving a plurality of keys having a payload associated with each of the plurality of keys. The method also includes reserving DRAM storage for each of the payloads, generating a tag for each of the plurality of keys, the tag identifying the DRAM storage reserved for each of the payloads, and storing the payloads in the portions of the DRAM storage. The method further includes generating a composite key for each of the plurality of keys, sorting the composite keys by the composite sort engine, and retrieving the payloads associated with the sorted composite keys from the DRAM storage. The method also includes outputting the payloads associated the sorted composite keys.
US09251217B2 Searching for information within social networks
Systems and methods for searching for information within social networks are described. In some examples embodiments, a search assist system receives a query, such as a partial query, identifies two or more categories of data that include information satisfying the query, ranks the identified categories of data based on various selection criteria, and presents suggested search terms based on the rankings.
US09251210B2 Caching external data sources for SQL processing
Techniques are provided for caching external data sources for SQL processing. According to an embodiment, a database system receives a query that requires foreign data from an external data source. In response to receiving the query, the database system determines whether the foreign data currently resides in a cache of the database system. In response to determining that the foreign does not currently reside in the cache, the database system retrieves the foreign data from the external data source, maps the foreign data to a column granule of a table, and stores the column granule in the cache. In another embodiment, the database system receives a second query that requires the foreign data. In response to determining that the foreign data is cached with the stored column granule, the database system retrieves the column granule from the cache.
US09251209B2 Autonomic caching for in memory data grid query processing
A method, system and computer program product for autonomic caching in an IMDG has been provided. A method for autonomic caching in an IMDG includes receiving from a client of the IMDG a request for a primary query in the IMDG. The method also includes associating the primary query with a previously requested sub-query related to the primary query. Finally, the method includes directing the sub-query concurrently with a directing of the primary query without waiting to receive a request for the sub-query from the client. In this way, the method can proactively predict a receipt of the request for a sub-query following a request for a primary query prior the actual receipt of the request for the sub-query.
US09251206B2 Generalized edit distance for queries
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for determining a generalized edit distance for queries. In one aspect, a method includes selecting query pairs of consecutive queries, each query pair being a first query and a second query consecutively submitted as separate queries, each first and second query including at least one term. For each query pair, the method includes selecting term pairs from the query pair, each term pair being a first term in the first query and a second term in the second query; and determining a co-occurrence value for each term pair. The method also includes determining transition costs based on the co-occurrence values for term pairs, each transition cost indicative of a cost of transitioning from a first term in a first query to a second term in a second query consecutive to the first query.
US09251204B2 Static query optimization
In some embodiments, a computer-implemented method for tuning queries for a multi-tenant database system is provided. A processor retrieves actual statistics associated with data stored on one or more servers in the multi-tenant database system. The data may be associated with one or more tenants of the multi-tenant database system. A subset of the actual statistics is selected, wherein the subset of the actual statistics is related to tenants having a data trait targeted for optimization. The processor determines synthetic statistics based on the subset of the actual statistics. An original query is received at the multi-tenant database system, wherein the original query operates upon data associated with a tenant that has the data trait targeted for optimization. The processor determines an optimal query plan based on the original query and synthetic statistics. Finally, the processor executes the original query based on the optimal query plan.
US09251202B1 Corpus specific queries for corpora from search query
A system determines search hypotheses for a search query, each search hypothesis defining a search type and respectively corresponding to a resource corpus of a type that matches the search type; for each search hypothesis, generate a hypothesis search query based on the search query and the search type and submits the hypothesis search query to a search service to determine a search hypothesis score, and for each search hypothesis having a search hypothesis score meeting a search hypothesis threshold, providing search results for the search operation performed for the hypothesis search query determined for the search hypothesis; and for each search hypothesis not having a search hypothesis score meeting a search hypothesis threshold, not providing search results for the search operation performed for the hypothesis search query determined for the search hypothesis.
US09251200B2 Method and system for executing database insert calls in a MES system
A method and a system execute database insert calls in a MES system. The data to be stored into the database are represented in XML tree formats according to the S95 hierarchy model. The method includes: a) receiving as input a given XML tree corresponding to a given S95 hierarchy data to stored into the database; b) processing the given XML tree in order to generate a corresponding parallel structure; c) getting a given S95 entity type and its given set of node references from the given parallel structure; d) if the given set of node references is not empty, composing a database insert call passing the information of the given set of node references; e) if the given set of node references is not empty, executing the composed database insert call; and executing items c) to e) for all the S95 entity types of the given parallel structure.
US09251194B2 Automatic data request recovery after session failure
Techniques for recovering from session failures between clients and database servers are described herein. A session may be established between a client and a first database server to handle a database query for the client. A command of the session may be received by the first database server from the client. Data requested by the command may be retrieved. Prior to responding to the command, the data is spooled to a session state stored in a repository of the first database server, and the session state is replicated to one or more additional database servers. The session state stored in the repository of the first database server enables the first database server and client to recover from a failure of the session. The replicated session state enables the additional database server(s) to reestablish the session and respond to the command, instead of the first database server, if the session fails.
US09251188B2 Information processing device
An information processing device includes: an analysis information storing means for storing each of analyzed raw data so as to be associated with analysis portion specification information; a storage destination information storing means for storing each of the raw data so as to be associated with a raw data storage destination address referring to a raw data managing device storing the each raw data; a raw data specifying means for specifying raw data associated with analysis portion specification information corresponding to portion designation information designating a predetermined time portion in combined analysis result information; and a distribution instructing means for instructing a raw data managing device specified by a raw data storage destination address associated with the specified raw data to distribute raw data of the time portion corresponding to the designated portion designation information.
US09251182B2 Supplementing structured information about entities with information from unstructured data sources
A method for supplementing structured information within a data system for entities based on unstructured data analyzes a document with unstructured data and extracts attribute values from the unstructured data for one or more entities of the data system. Entity records with structured information are retrieved from the data system based on the extracted attribute values. Entity references for corresponding entities of the data system are constructed based on a comparison of the retrieved entity records and the extracted attribute values. The entity references are linked to the corresponding entities within the data system, with the entity references including extracted attributes from the unstructured data for corresponding linked entities.
US09251179B2 Managing record location lookup caching in a relational database
In managing a relational database, a relational manager sets a foreign key lookup value to an unavailable state in a source table row containing each of a foreign key value and the foreign key lookup value in a source table in a relational database, wherein the foreign key value references a primary key value in a referenced row in a separate destination table in the relational database. The relational manager, responsive to looking up, for the foreign key value, in a data structure separate from the source table, a location of the referenced row in the relational database, when the foreign key lookup value is set to the unavailable state, updating the foreign key lookup value with the location, wherein the foreign key lookup value in the source table is looked up for identifying the location of the referenced row for subsequent retrievals of the referenced row for the foreign key value.
US09251178B2 System and method for connection labeling for use with connection pools
A system and method for connection labeling for use with connection pools. In accordance with an embodiment, the system comprises a connection pool, including a plurality of connection objects which provide connections that software applications can use to make requests to access the database, wherein each of the connections can be labeled according to the configuration of particular applications; and a connection pool logic that identifies connections labeled as high-cost connections, and avoids using those high-cost connections to serve requests when the total number of connections is below a particular threshold value.
US09251177B2 Information removal from a network
Technologies are generally described for systems, methods and devices effective to remove information from a network such as the Internet. In some examples, a device may include a memory including instructions and a processor configured in communication with the memory. The processor may be configured effective to receive user information relating to a user and search the network using the user information. In response to the search, the processor may find additional information relating to the user stored in the network. The processor may receive a first request to remove particular information from the network. The particular information may be part of the additional information and the particular information may be removable by a second user. The processor may send a second request to remove the particular information from the network.
US09251169B2 Systems and methods for creating photo collages
Embodiments of the present disclosure include a computer-implemented method for creating a final mosaic image. The method includes receiving a main image from a database of images. The method includes generating a grid overlay having one or more grid cells, the grid overlay being coupled with the main image such that the one or more grid cells each include a portion of the main image to create one or more image cells. The method also determines a tint value for each of the one or more image cells. The method also includes receiving one or more tile images from the database of images, and positioning one of the one or more tile images into each of the one or more image cells to create one or more tiled cells. The method also comprises assigning the tile image positioned in each of the tiled cells the tint value determined for the image cell that each of the tile images has been positioned into to create a polished image.
US09251167B2 Method and system for prediction of software data consumption patterns
A method including downloading a streaming model file and at least one initial execution file from a server via a conventional download protocol without using a specialized streaming protocol. When executed, the initial execution file only partially implements an application. The model file stores information identifying additional portions of the application file to be downloaded from the server. Data is read from the initial execution file, and stored in a local copy of the application file. Then, the application is executed by executing the local copy. Until the entire application file has been downloaded and as the application is executing, the information is read from the model file to identify a next file to download, the next file is downloaded via the conventional download protocol without using a specialized streaming protocol, next data is read from the next file, and the next data is stored in the local copy.
US09251162B2 Secure storage management system and method
The present invention provides a storage management system and method for managing access between a plurality of processes and a common store. According to the invention, each individual process comprises data processing means, a cache for the temporary storage of data generated by the data processing means, and a control unit for managing the transferral of data between the cache and a common store. The control unit comprises a manager for monitoring the availability of storage locations in the store to receive and store data and for allocating data to available storage locations, an interface for transferring the allocated data to the available storage locations, and a locking arrangement for locking the store during data transfer in order to ensure exclusive access and thereby preserve data integrity.
US09251158B2 Systems and methods for transformation of logical data objects for storage
Systems and methods for compressing a raw logical data object (201) for storage in a storage device operable with at least one storage protocol, creating, reading, writing, optimizatic in and restoring thereof. Compressing the raw logical data object (201) comprises creating in the storage device a compressed logical data object (203) comprising a header (204) and one or more allocated compressed sections with predefined size (205-1-205-2); compressing one or more sequentially obtained chunks of raw data (202-1-202-6) corresponding to the raw logical data object (201) thus giving rise to the compressed data chunks (207-1-207-6); and sequentially accommodating the processed data chunks into: said compressed sections (205-1-205-2) in accordance with an order said chunks received, wherein said compressed sections serve as atomic elements of compression/decompression operations during input/output transactions on the logical data object.
US09251157B2 Enterprise node rank engine
Various methods and systems for calculating ranks of importance of nodes of an enterprise are described. A plurality of relations may be accessed, wherein each relation of the plurality of relations comprises an indication of two nodes of a plurality of nodes, and an indication of a relationship between the two nodes. A matrix may be created using the plurality of relations. The matrix may be processed using the Perron-Frobenius theorem. The plurality of nodes of the enterprise may be ranked according to importance, wherein each node is either a user or an item.
US09251155B1 Maintaining sort order of data in databases
A database system maintains table data in sorted order. The table data becomes unsorted over time due to add, delete, and update operations. These operations are performed such that the table comprises an initial sorted region followed by an unsorted region. The database system performs an incremental operation to rewrite the table in sorted order. The database system partitions the unsorted region into a plurality of partitions comprising sorted rows within each partition. The database system iteratively merges rows from the partitions to the sorted region of the table. The database system selects a set of lowest tanked rows from the partitions. The database system merges these lowest ranked rows with the sorted region while maintaining the sort order of the sorted region. The database system repeats these steps until all the partitions are processed. The database may store data in columnar fashion.
US09251154B2 Priority based reliability mechanism for archived data
A method and system for determining priority is provided. The method includes generating a list defining specified data objects stored within a back-up/archived data storage system and applying importance levels to the specified data objects. Reliability urgency levels for the storage devices are determined and in response groups of data objects of the specified data objects are generated. Required reliability levels for each group of data objects are determined and associated erasure encoding rates are calculated. Fragment sets for the groups of data objects are generated and numbers of parity objects required for the fragment sets are determined. An erasure code algorithm is executed with respect to the groups of data objects and in response parity objects are computed on demand.
US09251153B1 Systems and methods for populating and maintaining a local cache with archived data items
A computer-implemented method for populating and maintaining a local cache with archived data items is described. A request to organize archived data items into one or more bundles is sent. The one or more bundles of archived data items are downloaded to the local cache. Each of the archived data items are organized in the one or more bundles according to a time period associated with each archived data item. An index file is extracted from each of the one or more bundles. The extracted index file is inserted into a master index file.
US09251148B2 Object based privacy control
An electronic device may include a processor and a blacklist database listing objects not to be displayed. The processor is to remove an object from a frame before the frame is sent to or received from an electronic device when the object is listed in the blacklist database. In an example, an electronic device can include logic to receive, in a processor, a frame to be sent to or received from an electronic device and logic to scan the frame to identify an object. The electronic device can also include logic to determine if the object is listed in a blacklist database. The electronic device further includes logic to modify the frame to remove the object when the object is listed in the blacklist database and logic to transfer the frame for processing.
US09251141B1 Entity identification model training
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for training an entity identification model. In one aspect, a method includes obtaining a plurality of complete sentences that each include entity text that references a first entity; for each complete sentence in the plurality of complete sentences: providing a first portion of the complete sentence as input to an entity identification model that determines a predicted entity for the first portion of the complete sentence, the first portion being less than all of the complete sentence; comparing the predicted entity to the first entity; and updating the entity identification model based on the comparison of the predicted entity to the first entity.
US09251140B2 Determining similarity of unfielded names using feature assignments
Provided are techniques for comparing names. A first phrase score is obtained by comparing a name phrase in a first name to a name phrase in a second name. A second phrase score is obtained by comparing another name phrase in the first name to another name phrase in the second name. An overall score is generated based on the obtained first phrase score and the obtained second phrase score. The overall score is updated based on comparing features of the first name with features of the second name.
US09251139B2 Natural language processing for extracting conveyance graphs
Provided is a process for extracting conveyance records from unstructured text documents, the process including: obtaining, with one or more processors, a plurality of documents describing, in unstructured form, one or more conveyances of interest in real property; determining, with one or more processors, for each of the documents, a respective jurisdiction; selecting, with one or more processors, from a plurality of language processing models for the English language, a respective language processing model for each of the documents based on the respective determined jurisdiction; extracting, with one or more processors, for each of the documents, a plurality of structured conveyance records from each of the plurality of documents by applying the language processing model selected for the respective document based on the jurisdiction associated with the document; and storing, with one or more processors, the extracted, structured conveyance record in memory.
US09251135B2 Correcting N-gram probabilities by page view information
Methods and a system for calculating N-gram probabilities in a language model. A method includes counting N-grams in each page of a plurality of pages or in each document of a plurality of documents to obtain respective N-gram counts therefor. The method further includes applying weights to the respective N-gram counts based on at least one of view counts and rankings to obtain weighted respective N-gram counts. The view counts and the rankings are determined with respect to the plurality of pages or the plurality of documents. The method also includes merging the weighted respective N-gram counts to obtain merged weighted respective N-gram counts for the plurality of pages or the plurality of documents. The method additionally includes calculating a respective probability for each of the N-grams based on the merged weighted respective N-gram counts.
US09251131B2 Systems and methods for distributed electronic signature documents including version control
Systems and methods for facilitating version control over an electronic document, the electronic document being subject to a distribution sequence among at least first and second reviewing parties over a network. The method includes receiving an instruction set from a source client. Based on the instruction set, at least one editable field populated with content is embedded in the electronic document. The progress of the electronic document through the distribution sequence is monitored over the network. The content of the editable field being edited by the first reviewing party is determined. In response to determining that the content has been edited by the first reviewing party, the edited electronic document is provided to the second reviewing party. The electronic document being electronically signed by the first and second reviewing parties is validated. The editable field is locked from further electronic editing.
US09251128B2 Replacing a designated character string, or styling within the designated scope of tagged edited content in a document
A method, system and computer program product for providing scoping editing operations in a document using a document editing computer application. The method, program system, and computer product may include tagging each incidence of editing with the identity of the author responsible for the applicable incidence, the date, the date and time, document phase, author role, or any combination thereof. The method, program system, and computer product may further include presenting a mechanism for designating a scope of tagged content by author, date, date and time of day, document phase, author role, or a combination thereof, and locating a selection of at least some of the tagged content according to the designated scope of the tagged content.
US09251124B2 Modular responsive screen grid, authoring and displaying system
A content containing message may be created by a user or multiple users, and may contain content items such as videos, images and hyperlinks. The messages may be sent and exchanged between users, as well as collected, liked or commented on.
US09251122B2 Method and apparatus for estimating a molecular mass parameter in a sample
A method for estimating a molecular mass parameter in a sample that includes at least one component of given molecular mass, comprising the steps consisting of passing the sample through a processing chain comprising a mass spectrometer with a MEMS or NEMS electromechanical sensor, in this way obtaining a signal representing the molecular mass parameter and estimating the molecular mass parameter by means of a signal processing device. The molecular mass parameter is defined on the basis of a parameter of time distribution of successive detections, by the MEMS or NEMS electromechanical sensor, of the adsorption of said component, and the estimation of the molecular mass parameter is made by Bayesian inference, on the basis of a direct analytical modeling of said signal according to the molecular mass parameter and to technical parameters of the processing chain comprising at least one technical parameter of the MEMS or NEMS electromechanical sensor.
US09251116B2 Direct interthread communication dataport pack/unpack and load/save
A circuit arrangement, method, and program product for compressing and decompressing data in a node of a system including a plurality of nodes interconnected via an on-chip network. Compressed data may be received and stored at an input buffer of a node, and in parallel with moving the compressed data to an execution register of the node, decompression logic of the node may decompress the data to generate uncompressed data, such that uncompressed data is stored in the execution register for utilization by an execution unit of the node. Uncompressed data may be output by the execution unit into the execution register, and in parallel with moving the uncompressed data to an output buffer of the node connected to the on-chip network, compression logic may compress the uncompressed data to generate compressed data, such that compressed data is stored at the output buffer.
US09251112B2 Managing content delivery network service providers
A system, method, and computer readable medium for managing CDN service providers are provided. A network storage provider storing one or more resources on behalf of a content provider obtains client computing device requests for content. The network storage provider updates request processing information based on the process requests for content. The network storage provider then makes a recommendation regarding initialization of a CDN service provider as a function of the updated request processing information. Subsequent client computing device requests for resources can be provided to the recommended CDN service provider utilizing alternative resource identifiers.
US09251110B2 Modifying the spectral energy content of a data bus
Techniques for reducing the spectral content of a data bus are described herein. An example of a device in accordance with the present techniques includes logic to obtain a present bit of data to be transmitted over a data bus and estimate a spectral energy contribution of the present bit at a frequency of interest. The device also includes logic to determine what effect inverting the present bit will have on a net spectral energy of the data bus at the frequency of interest when the present bit is transmitted over the data bus. The device also includes logic to invert the present bit to generate an inverted bit and transmit the inverted bit over the data bus if inverting the present bit reduces the net spectral energy of the data bus at the frequency of interest.
US09251105B2 Transmitting an interrupt packet
A method and system for transmitting an aggregated interrupt packet are described herein. The method includes sending metadata from a client device to a host device. The method also includes detecting at least two sets of data from the client device. Additionally, the method includes detecting an identifier for the client device. Furthermore, the method includes generating an aggregated interrupt packet in the client device that comprises the identifier and the at least two sets of data for the client device. The method also includes sending the aggregated interrupt packet from the client device to the host device.
US09251103B2 Memory-access-resource management
The present application is directed to a memory-access-multiplexing memory controller that can multiplex memory accesses from multiple hardware threads, cores, and processors according to externally specified policies or parameters, including policies or parameters set by management layers within a virtualized computer system. A memory-access-multiplexing memory controller provides, at the physical-hardware level, a basis for ensuring rational and policy-driven sharing of the memory-access resource among multiple hardware threads, cores, and/or processors.
US09251102B2 Virtualizing processor memory protection with “L1 iterate and L2 drop/repopulate”
A computing system includes a guest domain access control register (DACR), and guest first and second level page tables, the page tables containing domain identifiers used to obtain domain access information and access permission information, and the domain access information and the access permission information providing an effective guest access permission. The computing system provides a shadow page table, in which domain identifiers are used to identify domain access information in a processor DACR that are mapped from domain access information in the guest DACR, and in which access permissions are mapped from effective access permission information in the guest page tables and guest DACR. A memory management unit in the processor traverses the shadow page table, accesses the processor DACR, and combines the mapped domain access information in the processor with the mapped access permission in the shadow page table to reflect the guest intended effective access permissions.
US09251099B2 Nonvolatile memory modules and authorization systems and operating methods thereof
Memory modules and authorization systems include a nonvolatile memory, an authentication engine configured to receive an initialization request from a user system, configured to generate a certification value based on device identifiers of devices includes in the user system in response to the initialization request and configured to control access to the nonvolatile memory based on the certification value, and a certification value storage configured to store the certification value.
US09251097B1 Redundant key management
A data storage service redundantly stores data and keys used to encrypt the data. Data objects are encrypted with first cryptographic keys. The first cryptographic keys are encrypted by second cryptographic keys. The first cryptographic keys and second cryptographic keys are redundantly stored in a data storage system to enable access of the data objects, such as to respond to requests to retrieve the data objects. The second cryptographic keys may be encrypted by third keys and redundantly stored in the event access to a second cryptographic key is lost.
US09251092B2 Hybrid address translation
Embodiments of the invention relate to hybrid address translation. An aspect of the invention includes receiving a first address, the first address referencing a location in a first address space. The computer searches a segment lookaside buffer (SLB) for a SLB entry corresponding to the first address; the SLB entry comprising a type field and an address field and determines whether a value of the type field in the SLB entry indicates a hashed page table (HPT) search or a radix tree search. Based on determining that the value of the type field indicates the HPT search, a HPT is searched to determine a second address, the second address comprising a translation of the first address into a second address space; and based on determining that the value of the type field indicates the radix tree search, a radix tree is searched to determine the second address.
US09251087B2 Apparatus, system, and method for virtual memory management
An apparatus, system, and method for virtual memory management. The method includes detecting a memory access to a virtual memory address within a monitored page of data not loaded in main memory of a computing device. The method includes determining a first address for a loaded page of data in the main memory. The first address is defined in a sparse virtual address space exposed by a persistent storage device. The first address is associated in an index with a first deterministic storage location. The method includes storing the loaded page on a persistent storage device at the first deterministic storage location. The method includes moving the monitored page from a second deterministic storage location to the main memory. The second deterministic storage location is associated with a second address in the index.
US09251086B2 Apparatus, system, and method for managing a cache
An apparatus, system, and method are disclosed for managing a cache. A cache interface module provides access to a plurality of virtual storage units of a solid-state storage device over a cache interface. At least one of the virtual storage units comprises a cache unit. A cache command module exchanges cache management information for the at least one cache unit with one or more cache clients over the cache interface. A cache management module manages the at least one cache unit based on the cache management information exchanged with the one or more cache clients.
US09251082B2 Sending data of read requests to a client in a networked client-server architecture
Read messages are issued by a client for data stored in a storage system of the networked client-server architecture. A client agent mediates between the client and the storage system. The storage system sends to the client agent the requested data by partitioning the returned data into segments for each read request. The storage system sends each segment in a separate network message.
US09251079B2 Managing processor thread access to cache memory using lock attributes
A cache memory device includes a plurality of cache areas, each the cache area comprising a plurality of entries. The cache memory device is configured to maintain a separate lock attribute for each the cache area and temporarily assign possession of a lock attribute for a particular the cache area to a processor thread attempting to update the particular the cache area, the processor thread being unable to update the particular the cache area without possession of the lock attribute for the particular the cache area.
US09251076B2 Epoch-based recovery for coherent attached processor proxy
A coherent attached processor proxy (CAPP) participates in coherence communication in a primary coherent system on behalf of an attached processor external to the primary coherent system. The CAPP includes an epoch timer that advances at regular intervals to define epochs of operation of the CAPP. Each of one or more entries in a data structure in the CAPP are associated with a respective epoch. Recovery operations for the CAPP are initiated based on a comparison of an epoch indicated by the epoch timer and the epoch associated with one of the one or more entries in the data structure.
US09251075B2 Managing global cache coherency in a distributed shared caching for clustered file systems
Various embodiments are provided for managing a global cache coherency in a distributed shared caching for a clustered file system (CFS). The CFS manages access permissions to an entire space of data segments by using the DSM module. In response to receiving a request to access one of the data segments, a calculation operation is performed for obtaining most recent contents of one of the data segments. The calculation operation performs one of providing the most recent contents via communication with a remote DSM module which obtains the one of the data segments from an associated external cache memory, instructing by the DSM module to read from storage the one of the data segments, and determining that any existing contents of the one of the data segments in the local external cache are the most recent contents.
US09251068B2 Systems, devices, memory controllers, and methods for memory initialization
Systems, devices, memory controllers, and methods for initializing memory are described. Initializing memory can include configuring memory devices in parallel. The memory devices can receive a shared enable signal. A unique volume address can be assigned to each of the memory devices.
US09251065B2 Execute-in-place mode configuration for serial non-volatile memory
Example embodiments for configuring a serial non-volatile memory device for an execute-in-place mode may comprise a non-volatile configuration register to store an execute-in-place mode value that may be read at least in part in response to power being applied to the memory device.
US09251060B2 Compression-enabled blending of data in non-volatile memory
Described herein are embodiments of an apparatus configured for compression-enabled blending of data, a system including the apparatus configured for compression-enabled blending of data, and a method for compression-enabled blending of data. An apparatus configured for compression-enabled blending of data may include non-volatile memory configured to operate in a single-level cell mode and a multi-level cell mode, a compression module configured to compress data to generate compressed data, and a memory controller configured to write, in response to a reduction ratio of the compressed data being less than a threshold compression ratio, a first portion of the compressed data to the non-volatile memory in the single-level cell mode, and a second portion of the compressed data to the non-volatile memory in the multi-level cell mode. Other embodiments may be described and/or claimed.
US09251057B2 Nonvolatile cache memory, processing method of nonvolatile cache memory, and computer system
Disclosed is a nonvolatile cache memory including a nonvolatile memory part and a cache controller. The nonvolatile memory part is configured to store cache data. The cache controller is configured to control reading and writing of the cache data with respect to the nonvolatile memory part. Further, the cache controller is configured to perform, as a preparation for an interruption of power supply, standby preparation processing to generate standby state data and store the generated standby state data in the nonvolatile memory part. Further, the cache controller is configured to perform, at resumption of the power supply, restoration processing of the cache data stored in the nonvolatile memory part using the standby state data.
US09251055B2 Memory system and control method of memory system
A memory system in embodiments includes a nonvolatile semiconductor memory that stores user data, a forward lookup address translation table and a reverse lookup address translation table, and a controller. The controller is configured to determine that the user data stored in the nonvolatile semiconductor memory is valid or invalid based on these two tables. The controller may perform data organizing of selecting data determined valid and rewriting the data in a new block. The controller may perform write processing and rewriting processing to the new block alternately at a predetermined ratio. The controller may determine whether a predetermined condition is satisfied on a basis of addresses included in write requests and write data in the MLC mode when the condition is satisfied and write data in the SLC mode when the condition is not satisfied.
US09251052B2 Systems and methods for profiling a non-volatile cache having a logical-to-physical translation layer
A cache module leverages a logical address space and storage metadata of a storage module (e.g., virtual storage module) to cache data of a backing store. The cache module maintains access metadata to track access characteristics of logical identifiers in the logical address space, including accesses pertaining to data that is not currently in the cache. The access metadata may be separate from the storage metadata maintained by the storage module. The cache module may calculate a performance metric of the cache based on profiling metadata, which may include portions of the access metadata. The cache module may determine predictive performance metrics of different cache configurations. An optimal cache configuration may be identified based on the predictive performance metrics.
US09251042B2 Managed runtime enabling condition percolation
A method, apparatus, and/or computer program product protects a managed runtime from stack corruption due to native code condition handling. A native condition handler, which is associated with a managed runtime, percolates a condition. A condition handler of the managed runtime receives notification of the condition in a native code portion, and the condition handler of the managed runtime marks a thread associated with the condition. Responsive to a determination by the native code handler to resume execution of the marked thread by either call back into or a return to the managed runtime, the managed runtime determines whether a request is associated with the marked thread. Responsive to a determination that the request is associated with the marked thread, the managed runtime performs diagnostics and the managed runtime is terminated.
US09251041B2 Method and system for isolating software components
A software testing system operative to test a software application comprising a plurality of software components, at least some of which are highly coupled hence unable to support a dependency injection, each software component operative to perform a function, the system comprising apparatus for at least partially isolating, from within the software application, at least one highly coupled software component which performs a given function, and apparatus for testing at least the at least partially isolated highly coupled software component.
US09251040B2 Remote debugging in a cloud computing environment
An apparatus for performing remote debugging in a cloud system. The apparatus includes: a receiving unit that is configured to receive a remote debugging request during a remote debugging session; a determining unit configured to determine, according to an isolation level of the remote debugging request, a server node from a plurality of server nodes in the cloud system that is suitable for performing the remote debugging, wherein the isolation level of the remote debugging request comprises at least one of: an exclusive level and a sharing level; and a transmitting unit configured to forward the remote debugging request to the server node. The apparatus is a front-end component of a cloud system, such as a server node.
US09251039B2 Remote debugging as a service
Debugging capabilities for software running in a cloud-computing environment are disclosed. A controller identifies which machines in the cloud are running instances of software to be debugged. An agent is deployed onto the machines in the cloud to facilitate communication with the developer's machine. When the developer wants to debug software on the agent's machine, the agent downloads and installs a monitor onto the machine. The agent configures the machine for remote debugging via the monitor. A security mechanism ensures that only authenticated developers can access the monitor and the remote machine for debugging. A controller automatically determines which machines can be debugged, updates a list of processes available for debugging on the machines, and identifies how to connect a developer's debugging client to the machines. The controller permits remote debugging only upon request from an authenticated developer and only for those processes that the developer is permitted to debug.
US09251035B1 Load test charts with standard deviation and percentile statistics
A method for real-time analysis of results from a load test performed on a target website includes calculating first-level aggregated test results within each of a plurality of load server instances that generate a load on the target website. The first-level aggregated test results are calculated from data points received by each of the load server instances from the target website. The first-level aggregated test results include a sum of the data points, a count of the number of the data points, a sum of squares of the data points, and an average of the data points. A standard deviation result (STDEV) is calculated and chart is generated on a display via a graphical user interface. The chart provides a visual representation of a performance metric for the load test based on the standard deviation result.
US09251032B2 Method, computer program, and information processing apparatus for analyzing performance of computer system
In an information processing apparatus, a calculation unit retrieves data that indicates processing periods of processes executed in each time window constituting an analysis period. The calculation unit then calculates a total processing time for each time window by adding up processing times spent for execution of processes. The calculation unit also calculates a total progress quantity for each time window by adding up progress quantities of the processes. A determination unit determines, based on the total processing time and total progress quantity of each time window, a threshold of the total processing times at which the ratio of an increase of the total progress quantity to an increase of the total processing time is equal to or smaller than a predetermined value. A detection unit detects time windows whose total processing times are equal to or longer than the threshold.
US09251026B2 Application instrumentation code extension
The embodiments provide an application diagnostics apparatus including an instrumentation engine configured to monitor one or more methods of a call chain of the application in response to a server request according to an instrumentation file specifying which methods are monitored and which methods are associated with a code extension, an extension determining unit configured to determine that at least one monitored method is associated with the code extension based on code extension identification information, a class loading unit configured to load the code extension from a resource file when the at least one monitored method associated with the code extension is called within the call chain, a code extension execution unit configured to execute one or more data collection processes, and a report generator configured to generate at least one report for display based on collected parameters.
US09251020B1 Systems and methods for file-level replication
A computer-implemented method for file-level replication may include 1) identifying a selection of at least one source file to replicate from a primary volume to a secondary volume, 2) identifying extent information that indicates a volume location of the source file within the primary volume, 3) identifying a volume offset within the primary volume of a write operation performed on the source file within the primary volume, 4) converting the volume offset to a file offset within the source file using the extent information, and 5) replicating the write operation and the file offset to the secondary volume. Various other methods and systems are also disclosed.
US09251018B2 Enhanced recovery of highly available computing systems
Exemplary embodiments disclose a method and system for detecting a failure and resuming processing in a computing system encompassing at least two sites, a primary site and a secondary site. In a module, an exemplary embodiment generates a record of a logically consistent state and data of system components of the primary site periodically and transfers the record of a logically consistent state and data of system components of the primary site to the secondary site. In another module, an exemplary embodiment detects a failure in the primary site, halts the generation of the record of a logically consistent state and data of system components of the primary site periodically with a data freeze function, and resumes a processing of the primary site on the secondary site with secondary site components updated with a most recent logically consistent state and data of system components of the primary site.
US09251016B2 Storage system, storage control method, and storage control program
According to an aspect of an embodiment, a storage system for storing data from a host device, comprising: a plurality of storage units for storing data, in a manner to enable recovery of data stored in one of said storage units by the use of data stored in the rest of storage units; an extra storage unit; and a controller for controlling said storage units and said extra storage unit according to a process comprising: receiving information indicative of fault prediction in one of storage units, recovering data stored in said one of said storage units by the use of data storage in the rest of said storage units, and writing the recovered data into said extra storage unit.
US09251012B2 Distributed backup and retrieval system
A method is provided for performing distributed backup and retrieval of data. Data is sent by a plurality of client devices to be processed by a server and then stored in a database. A subset of the processed data stored in the database is backed up to each of the plurality of client devices. For the one or more particular client devices owned by a user, the subset of processed data stored on the one or more particular client devices is the subset of processed data that is associated with the user. The server and client device is updated to maintain the same state of processed data in the database and the backup. In the event of failure of either the database or a client device, processed data may be restored using the processed data stored on the database or the backup stored on the plurality of client devices.
US09251011B2 Backup of in-memory databases
Various embodiments of systems and methods for performing backup operation in In-memory database systems are described herein. The method includes receiving a request to create a backup of a data set from a main memory of the system. In response to the request, the data set is configured as read-only and a data structure having meta-data information identifying the blocks of data in the main memory that form the data set is invoked. A snapshot of the data structure is created and the data set is enabled for manipulation. Further, the method involves receiving a request to modify a block of data and copying the requested data block to a free memory block in the main memory. The data structure is updated by replacing the meta-data identifying the requested original data block with meta-data identifying the free memory block which holds a copy of the requested data block.
US09251010B2 Caching backed-up data locally until successful replication
A mechanism is provided for caching backed-up data locally until successful replication of the backed-up data. Responsive to an indication to back up one or more pieces of identified data from a local storage device, a determination is made as to whether a primary storage device is available. Responsive to the primary storage device being available, the one or more pieces of identified data are backed up to the primary storage device and a local replication cache. Responsive to the backed-up data being replicated from the primary storage device to a secondary storage device, the backed-up data is removed from the local replication cache.
US09251009B2 Methods and apparatus for providing hypervisor level data services for server virtualization
A data center for data backup and replication, including a pool of multiple storage units for storing a journal of I/O write commands issued at respective times, wherein the journal spans a history window of a pre-specified time length, and a journal manager for dynamically allocating more storage units for storing the journal as the journal size increases, and for dynamically releasing storage units as the journal size decreases.
US09250999B1 Non-volatile random access memory in computer primary memory
A method includes deploying non-volatile random access memory (NVRAM) in a memory arrangement coupled to a CPU core of a computing device via a memory bus. The method further includes configuring the CPU core to conduct NVRAM read operations directly over the memory bus, and providing an I/O logic device to process write instructions initiated by the CPU core as a Direct Memory Access (DMA) write operation on the NVRAM.
US09250994B1 Non-binary low-density parity check (LDPC) decoding using trellis maximization
Data storage systems may include a solid-state memory array configured to store encoded data units and a controller configured to decode the encoded data units. Decoding the encoded data units may include updating a check node of a plurality of check nodes associated with a parity check matrix by identifying first and second sets of variable nodes in a plurality of variable nodes associated in the parity check matrix with the check node and constructing a trellis based on the second set of variable nodes. The trellis may be used to determine a message and, based at least in part on the message, a first set of messages to be sent from the check node to the first set of variable nodes may be determined. A second set of messages to be sent from the check node to each variable node in the second set of variable nodes also may be determined.
US09250993B2 Automatic generation of actionable recommendations from problem reports
Methods and arrangements for handling information technology tickets. A plurality of information technology tickets are received. The tickets are clustered into categories, and a problem area is identified with respect to at least one of the categories. At least one recommendation is automatically generated for addressing the problem area. Other variants and embodiments are broadly contemplated herein.
US09250992B1 Test data reporting during memory testing
In some implementations, a built-in self-test (BIST) circuitry of a memory device is configured to perform an execution of a test sequence to test the memory device, wherein performing the execution comprises generating addresses of the memory device in accordance with the test sequence and advancing a value of a modulo counter as each of the addresses is generated, enable error logging when a generated address and a value of the modulo counter corresponding to the generated address match an address and a value of the modulo counter stored for a previously detected error, detect an error in data read from the memory device after enabling error logging, and store information associated with the detected error.
US09250988B2 Virtualization-based environments for problem resolution
According to one aspect of the present disclosure a method and technique for allocating virtualization-based resources for resolving a problem report associated with a computing environment is disclosed. The method includes: receiving a problem report associated with a computing environment; determining a resource template from the problem report corresponding to the computing environment; determining whether a virtual machine is available from a virtualization-based resource pool based on the resource template; and responsive to determining that a virtual machine is available from the virtualization-based resource pool based on the resource template, utilizing the virtual machine for the problem report.
US09250986B2 Method and apparatus for data linkage between heterogeneous platforms
The present invention provides a method for data linkage driven by an event, used for data interaction between a first platform and a second platform. The second platform stores shared information and the method comprises: determining which platform the received event is from; forwarding a data packet from the second platform to the first platform for logical operation processing when the received event is from the second platform; when the received event is information from the first platform that at least includes a shared information operation instruction resulting from logic operation processing of data packets in the first platform, returning a shared information operation instruction completion message to the first platform, meanwhile forwarding the shared information operation instruction to the second platform so as to complete the shared information operation on the second platform. Therefore, the first platform acquires data synchronously without waiting for feedback of the second platform.
US09250985B2 Dynamic user interface aggregation through smart eventing with non-instantiated content
A published event from a first content element executing within a framework may be detected. In response, a registry may be searched for one or more registered events that match the published event, and if a matching registered event is found, a second content element that registered said matching registered event may be instantiated to start executing within the framework. The second content element is dynamically aggregated into the framework based on the published event without the first content element needing to have previous knowledge of the second content element, and without the second content element needing to have previous knowledge of the first content element. The framework also does not need to be designed initially to deploy the second content element. Which one or more content elements to aggregate into the framework may be determined at run time rather than at design time.
US09250983B2 System and method for sharing items between electronic devices
A system and method are provided for operating a first electronic device for sharing items with a second electronic device. The method comprises determining that the second electronic device requires a software capability to process a first item to be shared by the first electronic device; providing information to the second device for obtaining the software capability; and sending the first item to the second device after the software capability has been acquired by the second electronic device.
US09250969B2 Tagging a copy of memory of a virtual machine with information for fetching of relevant portions of the memory
Methods and apparatus are disclosed to provision virtual machine resources. An example method includes labeling a copy of memory associated with an established virtual machine with an execution status based on an architecture type associated with the copy, and constraining a fetch operation in response to a page fault to a labeled portion of the copy that matches an architecture type of a received processor instruction.
US09250968B2 Method and memory manager for managing a memory in a multi-processing environment
A memory managing method and memory manager for a multi processing environment are provided. The memory manager adjusts the number of processors assigned to a consumer process and/or an assignment unit size of data to be consumed by the consumer process based on a condition of a shared queue which is shared by a producer process producing data and the consumer process consuming the data.
US09250966B2 Crowd-sourced video rendering system
In one embodiment, a method includes distributing rendering tasks to connected client nodes having capable graphics processing units by transmitting viewport state data objects and a unique spatial location to each of the clients, performing path tracing at each of the clients from the starting point of their unique spatial locations, and transmitting their rendered output back to the server. The server generates a composite rendered output from the individual rendered outputs received by the participating clients, and then transmits the composite to all connected clients for display. Thus, as the number of client nodes increases, the scene is rendered more rapidly and at higher quality. In particular embodiments, the rendered output is a lightmap representing the diffuse lighting for the scene, and each client may render the scene's specular highlights from its own viewport.
US09250965B2 Resource allocation for migration within a multi-tiered system
A method and system for intelligent tiering is provided. The method includes receiving a request for enabling a tiering process with respect to data. The computer processor retrieves a migration list indicating migration engines associated with the data. Additionally, an entity list of migration entities is retrieved and each migration entity is compared to associated policy conditions. In response, it is determined if matches exist between the migration entities and the associated policy conditions and a consolidated entity list is generated.
US09250962B2 Optimizing energy use in a data center by workload scheduling and management
Techniques are described for scheduling received tasks in a data center in a manner that accounts for operating costs of the data center. Embodiments of the invention generally include comparing cost-saving methods of scheduling a task to the operating parameters of completing a task—e.g., a maximum amount of time allotted to complete a task. If the task can be scheduled to reduce operating costs (e.g., rescheduled to a time when power is cheaper) and still be performed within the operating parameters, then that cost-saving method is used to create a workload plan to implement the task. In another embodiment, several cost-saving methods are compared to determine the most profitable.
US09250961B2 Task execution in a SIMD processing unit
A SIMD processing unit processes a plurality of tasks which each include up to a predetermined maximum number of work items. The work items of a task are arranged for executing a common sequence of instructions on respective data items. The data items are arranged into blocks, with some of the blocks including at least one invalid data item. Work items which relate to invalid data items are invalid work items. The SIMD processing unit comprises a group of processing lanes configured to execute instructions of work items of a particular task over a plurality of processing cycles. A control module assembles work items into the tasks based on the validity of the work items, so that invalid work items of the particular task are temporally aligned across the processing lanes. In this way the number of wasted processing slots due to invalid work items may be reduced.
US09250957B2 Method for selecting and controlling second work process during first work process in multitasking mobile terminal
Provided is a method for controlling a plurality of work processes in a multitasking mobile terminal, and more particularly, a method for selecting a second work process during a first work process and controlling a predetermined function of the selected second work process. In the controlling method, icons corresponding to the respective work processes are displayed in response to a user command, and a desired work process is selected through the displayed icons. A predetermined function of the selected work process is controlled through a pop-up menu activated in response to the user command.
US09250956B2 Application interface on multiple processors
A method and an apparatus that execute a parallel computing program in a programming language for a parallel computing architecture are described. The parallel computing program is stored in memory in a system with parallel processors. The system includes a host processor, a graphics processing unit (GPU) coupled to the host processor and a memory coupled to at least one of the host processor and the GPU. The parallel computing program is stored in the memory to allocate threads between the host processor and the GPU. The programming language includes an API to allow an application to make calls using the API to allocate execution of the threads between the host processor and the GPU. The programming language includes host function data tokens for host functions performed in the host processor and kernel function data tokens for compute kernel functions performed in one or more compute processors, e.g GPUs or CPUs, separate from the host processor. Standard data tokens in the programming language schedule a plurality of threads for execution on a plurality of processors, such as CPUs or GPUs in parallel. Extended data tokens in the programming language implement executables for the plurality of threads according to the schedules from the standard data tokens.
US09250955B1 Managing task approval
A method is used in managing approval of a data storage management operation. An approval module is provided. A request to perform a management operation is received from a first user where the first user is associated with a first user access level. The management operation is forwarded to the approval module. The management operation is evaluated to determine an approval status, the evaluation based on the first user access level and the management operation. Based on the evaluation, an approval status is provided.
US09250954B2 Offload processor modules for connection to system memory, and corresponding methods and systems
A system can include at least one offload processor having a data cache, the offload processor including a slave interface configured to receive write data and provide read data over a memory bus; an offload processor module including context memory and a bus controller connected to the slave interface; and logic coupled to the offload processor and context memory and configured to detect predetermined write operations over the memory bus; wherein the offload processor is configured to execute operations on data received over the memory bus, and to output context data to the context memory, and read context data from the context memory.
US09250951B2 Techniques for attesting data processing systems
A technique for attesting a plurality of data processing systems includes generating a logical grouping for a data processing system. The logical grouping is associated with a rule that describes a condition that must be met in order for the data processing system to be considered trusted. A list of one or more children associated with the logical grouping is retrieved. The one or more children are attested to determine whether each of the one or more children is trusted. In response to the attesting, the rule is applied to determine whether the condition has been met in order for the data processing system to be considered trusted. A plurality of logical groupings is associated to determine whether an associated plurality of data processing systems can be considered trusted.
US09250946B2 Efficient provisioning of cloned virtual machine images using deduplication metadata
Techniques for fast provisioning of virtual machine images using deduplication metadata are described, including receiving a request to copy a first virtual machine to form a second virtual machine, identifying a first portion of memory comprising data for the first virtual machine; and forming the second virtual machine based on the first portion of memory comprising data for the first virtual machine, wherein forming the second virtual machine further comprises linking the second virtual machine to the first portion of memory comprising data for the first virtual machine, and implementing a second portion of memory to store data for the second virtual machine independent of the first virtual machine.
US09250945B2 Detecting a repeating execution time sequence in a virtual machine
A generation identifier is provided having a value established upon generating a new virtual machine configuration context or a snapshot of a virtual machine configuration context. The generation identifier is configured to be sampled in order to indicate whether the sampled generation is a latest generation. To use the generation identifier, a service or application persists the generation identifier upon resuming or initiating operation. During normal operation or replay, the persisted generation identifier is compared to the generation identifier sampled from a location associated with the virtual machine configuration context on which the service or application is being run before performing a requested process or committing to a transaction. When the sampled generation identifier is different than the persisted generation identifier, the service or application knows that it is running a time-shifted operation such as from a snapshot replay.
US09250943B2 Providing memory condition information to guest applications
Virtualization software can improve the effectiveness of a guest application running inside a virtual machine (VM) by providing information to the guest application indicative of a memory condition of the VM. The memory condition is indicative of an availability of memory resources to the guest application. When guest physical memory can be reserved by a balloon application running in the (VM), providing memory condition data indicative of the memory condition provides more accurate information regarding the availability of memory resources to the guest application than could be provided by the guest operating system of the VM.
US09250938B2 Caching runtime generated code
A program entity that generates code but that does not perturb global state is identified. Code produced by the identified program entity can be assigned an identifier and cached the first time it is executed. Subsequent executions of the program entity can eliminate generation of the code and/or translation of the generated code into native binary code. The runtime generated code and native binary code can be cached in a machine-wide cache, or can be added to the metadata of the assembly generated from the source code of the program entity.
US09250935B2 Systems and methods for loop suspension in java programming
System and methods are provided for loop process suspension. One or more loop instructions associated with a loop process are loaded in a code cache. One or more branch instructions associated with a branch of the loop process in the code cache are determined. A suspension event is detected. The branch instructions are replaced with one or more jump instructions in the code cache upon the detection of the suspension event. If the jump instructions are executed in the code cache, the branch instructions in the code cache are restored, and the loop process is suspended. One or more suspension instructions associated with the suspension event are executed in an interpreter.
US09250932B2 Programmable multimedia controller with flexible user access and shared device configurations
In one embodiment, a programmable multimedia controller that is capable of interfacing with and controlling audio, video, telephony or heating ventilation, and air conditioning (HVAC) devices. A first mobile device and a second mobile device of a same type are configured to communicate with the programmable multimedia controller. The first mobile device obtains a first copy of a sharable device configuration including data for rendering a user interface usable to control the programmable multimedia controller. It stores the first copy of the sharable device configuration and thereby is considered a master device with respect to other devices of the same type. The second mobile device obtains a second copy of the sharable device configuration for use on the second mobile device from the master device.
US09250931B2 System, method, and computer program product for calculating settings for a device, utilizing one or more constraints
A system, method, and computer program product are provided for calculating settings for a device, utilizing one or more constraints. In use, a plurality of parameters associated with a device is identified. Additionally, one or more constraints are determined, utilizing the plurality of parameters. Further, one or more settings are calculated for the device, utilizing the one or more constraints and the plurality of parameters.
US09250929B2 Method and apparatus for form automatic layout
A method and apparatus are provided for determining the layout of a form automatically to accommodate text in the form. Under the method and apparatus, a set of parameters define the sizing and alignment of elements of the form. Sizing and positioning instructions that are separate from the sizing and alignment parameters set the sizing and positioning of elements of the form based on the sizing and alignment parameters. The instructions determine the minimum size for the form, based in part on text in the form. The difference between the minimum size for the form and a desired size for the form is then distributed across the form to size and position the elements in the form.
US09250927B2 Digital receiver and method for controlling the same
A method of controlling a digital apparatus, and which includes displaying, on a display of the digital apparatus, at least first and second display regions, the first display region configured to display a broadcast program and the second display region displaying social network contents; receiving, via an input unit of the digital apparatus, a selection signal indicating a selection of at least a part of the displayed social network contents; converting, via a controller of the digital apparatus, the selected part of the social network contents into image data; receiving, via the input unit, a moving signal indicating a movement of the converted image data on the display; and executing, via the controller, a predetermined application based on the movement of the image data.
US09250925B2 Adding inheritance support to a computer programming language
Object inheritance is a programming feature that allows developers to designate a programming object as a “descendent” of one or more “ancestors.” Disclosed herein are system, method, and computer program product embodiments for supporting inheritance in a programming language. In an embodiment, a first programming object is received from a first document, inheritance information about the first programming object is received and analyzed, a second programming object based on the first programming object and the inheritance information is created, the second programming object is sent to an editor for editing, a third programming object is received from the editor, a fourth programming object based on the first or second programming object, the third programming object, and the inheritance information is created, and the fourth programming object is stored in a second document.
US09250924B2 Efficient method data recording
According to one general aspect, a method may include monitoring the execution or at least a portion of a software application. The method may also include collecting subroutine call information regarding a plurality of subroutine calls included by the portion of the software application, wherein one or more of the subroutine calls is selected for detailed data recording. The method may further include pruning, as the software application is being executed, a subroutine call tree to include only the subroutine calls selected for detailed data recording and one or more parent subroutine calls of each subroutine calls selected for detailed data recording.
US09250922B2 Method and apparatus for prefetching peripheral device drivers for smart phones and other connected devices prior to HLOS boot
Apparatus and methods for booting a user equipment are described. A device boot of the user equipment may be performed. Peripherals and associated drivers for the user equipment may be configured. A high-level operating system (HLOS) may be booted. The configuring may occur before the booting of the HLOS. Apparatus and methods for loading peripheral device drivers for a user equipment are also described. Peripherals that can be associated with a user equipment may be determined. Drivers for the determined peripherals may be loaded. The loaded drivers may be associated with a high-level operating system (HLOS) architecture regardless of a type of user equipment on which the HLOS is provided.
US09250921B2 Selection of a primary microprocessor for initialization of a multiprocessor system
Embodiments of the present invention provide a method for initializing a plurality of processors of a multi-processor system by executing, at each respective processor of the plurality of processors, at least a portion of local initialization code stored on the respective processor. Receiving, at a designated processor of the plurality of processors, external initialization code stored in external memory, wherein the remainder of the plurality of processors do not have access to the external initialization code stored in external memory. Determining, the designated processor, send at least a portion of the external initialization code to a processor of the remainder of the plurality of processors.
US09250918B2 Server management with dynamic construction of pre-boot images
A request handler may receive an image capture request for an operating system (OS) executing on a server. A pre-boot image handler may generate a pre-boot image, based on the image capture request and on the executing operating system. An image handler may capture an image of the operating system, based on the pre-boot image.
US09250916B2 Chaining between exposed vector pipelines
Embodiments include a method for chaining data in an exposed-pipeline processing element. The method includes separating a multiple instruction word into a first sub-instruction and a second sub-instruction, receiving the first sub-instruction and the second sub-instruction in the exposed-pipeline processing element. The method also includes issuing the first sub-instruction at a first time, issuing the second sub-instruction at a second time different than the first time, the second time being offset to account for a dependency of the second sub-instruction on a first result from the first sub-instruction, the first pipeline performing the first sub-instruction at a first clock cycle and communicating the first result from performing the first sub-instruction to a chaining bus coupled to the first pipeline and a second pipeline, the communicating at a second clock cycle subsequent to the first clock cycle that corresponds to a total number of latch pipeline stages in the first pipeline.
US09250915B2 Operand fetching control as a function of branch confidence
Data operand fetching control includes calculating a summation weight value for each instruction in a pipeline, the summation weight value calculated as a function of branch uncertainty and a pendency in which the instruction resides in the pipeline relative to other instructions in the pipeline. The data operand fetching control also includes mapping the summation weight value of a selected instruction that is attempting to access system memory to a memory access control. Each memory access control specifies a manner of handling data fetching operations. The data operand fetching control further includes performing a memory access operation for the selected instruction based upon the mapping.
US09250914B2 Method and apparatus for selecting cache locality for atomic operations
An apparatus and method for determining whether to execute an atomic operation locally or remotely. For example, one embodiment of a processor comprises: a decoder to decode an atomic operation on a local core; prediction logic on the local core to estimate a cost associated with execution of the atomic operation on the local core and a cost associated with execution of the atomic operation on a remote core; and the remote core to execute the atomic operation remotely if the prediction logic determines that the cost for execution on the local core is relatively greater than the cost for execution on the remote core; and the local core to execute the atomic operation locally if the prediction logic determines that the cost for local execution on the local core is relatively less than the cost for execution on the remote core.
US09250898B2 VLIW processor, instruction structure, and instruction execution method
In a processor, a first operation unit outputs as a first operation result, an output of a first comparison operation unit, or an AND or OR of the output and a value already held in a register according to a first control signal. A second operation unit outputs, as a second operation result, an output of a second comparison operation unit, or an AND or OR of the output and a value already held in the register according to a second control signal. A third operation unit outputs, as an execution result, the first operation result, or an AND or OR of the first operation result and the second operation result to the register according to a third control signal. The register newly holds and outputs the execution result from the third operation unit.
US09250897B2 Systems and methods that facilitate management of add-on instruction generation, selection, and/or monitoring during execution
The subject invention relates to systems and methods that facilitate display, selection, and management of context associated with execution of add-on instructions. The systems and methods track add-on instruction calls and provide a user with call and data context, wherein the user can select a particular add-on instruction context from a plurality of contexts in order to observe values and/or edit parameters associated with the add-on instruction. The add-on instruction context can include information such as instances of data for particular lines of execution, the add-on instruction called, a caller of the instruction, a location of the instruction call, references to complex data types and objects, etc. The systems and methods further provide a technique for automatic routine selection based on the add-on instruction state information such that the add-on instruction executed corresponds to a current state.
US09250893B2 Virtualized and automated software build system
A software automation build system including a one or more source code repositories, the one or more source code repositories including source code of a software product and a source code for a build system. The source code for the build system stores a configuration specifying a build and test environment as a configuration file that can be accessed remotely by users to replicate a consistent virtual build and test environment for developing and testing code of the software product at different locations, using virtual machines. The system may include one or more instances of the build system based on the configuration. The system may save versions of the configuration so that multiple versions of the build system can be accessed and built virtually.
US09250891B1 Optimized class loading
A classloader executing in an execution environment, such as a JAVA virtual machine or a software container, may be configured to generate class usage data describing the historical usage of classes by applications in the execution environment. Based upon the class usage data, one or more classes may be pre-loaded into a cache prior to receiving a request from an application to load the classes. If an application subsequently requests a class, the request may be satisfied using the class stored in the cache rather than by loading the class at the time the request is received. A probabilistic data structure, such as a Bloom filter, might also be utilized to determine whether a classloader can possibly load a requested class. Only if the classloader can possibly load the requested class will a search be made for the requested class in a classpath associated with the classloader.
US09250889B2 Assigning severity to a software update
Assigning severity to a software update, including: receiving, by an update manager, version information for a software application from a computing system, the version information describing a version of the software application installed on the computing system; determining, by the update manager, a severity level of one or more available updates for the software application in dependence upon the version information and update version information; and providing, by the update manager to the computing system, the severity level for each of the one or more available updates.
US09250884B2 Automatic deployment of software applications to meet regulatory compliance requirements
A method, system, and computer program product for cloud-based deployments of software applications that are monitored for compliance with regulatory requirements. One exemplary method commences upon receiving an indication of a compliance corpus such as HIPPA or SOX, then mapping the compliance corpus to one or more predetermined configurations of a virtual compliance platform. Any of the particular predetermined configurations include steps, operations, and/or rules for provisioning infrastructure (e.g., using cloud-resident resources). After provisioning the virtual compliance platform based on the predetermined configuration, the provisioning operations further deploys a compliance monitor. The compliance monitor encapsulates the software application within the compliance monitor so as to monitor and/or log the operation and performance of the software application with respect to the compliance regulations. In some cases, a virtual compliance platform includes a virtual machine.