Document Document Title
US09209782B2 Signal decomposition, analysis and reconstruction
The present invention provides a system and method for representing quasi-periodic (“qp”) waveforms comprising, representing a plurality of limited decompositions of the qp waveform, wherein each decomposition includes a first and second amplitude value and at least one time value. In some embodiments, each of the decompositions is phase adjusted such that the arithmetic sum of the plurality of limited decompositions reconstructs the qp waveform. These decompositions are stored into a data structure having a plurality of attributes. Optionally, these attributes are used to reconstruct the qp waveform, or patterns or features of the qp wave can be determined by using various pattern-recognition techniques. Some embodiments provide a system that uses software, embedded hardware or firmware to carry out the above-described method. Some embodiments use a computer-readable medium to store the data structure and/or instructions to execute the method.
US09209781B2 Oscillator device and method of mounting oscillator device
A oscillator device includes: a first substrate that has a first surface, a second surface, and a through hole extending between the first surface and the second surface; a crystal oscillator that is disposed on the first surface of the first substrate, the crystal oscillator including an electrode; a second substrate that is disposed on the crystal oscillator; a through electrode that is disposed in the through hole, that has a diameter smaller than a diameter of the through hole, that is electrically coupled to the electrode, and that extends between the first surface and the second surface; and a filling member with which an area between an inner wall of the through hole and the through electrode is filled.
US09209778B2 Microelectromechanical resonators
Embodiments relate to MEMS resonator structures and methods that enable application of a maximum available on-chip voltage. In an embodiment, a MEMS resonator comprises a connection between a ground potential and the gap electrode of the resonator. Embodiments also relate to manufacturing systems and methods that are less complex and enable production of MEMS resonators of reduced dimensions.
US09209775B2 Electronic circuit
An electronic circuit includes: a switch that includes ports, and selects a port to be connected to an antenna from among the ports; a first filter connected between a first port and a first terminal, and having a pass band which overlaps with a transmission band of a first band; a second filter connected between a second port and a second terminal, and having a pass band which overlaps with a transmission band of a second band; a third filter connected between a third port and a third terminal, and having a pass band which overlaps with reception bands of the first and the second bands; wherein when a signal in the first band is transmitted and received, the switch selects the first and the third ports, and when a signal in the second band is transmitted and received, the switch selects the second and the third ports.
US09209771B1 EM coupling shielding
A method and an apparatus for canceling EM coupling are provided. The apparatus includes a ring structure at least partially surrounding an EM circuit. A negative transconductance circuit is coupled to ends of the ring structure. The negative transconductance circuit is configured to cancel an EM coupling to the EM circuit at a frequency. The method includes generating a plurality of settings for a negative transconductance circuit and tuning the negative transconductance circuit to one of the plurality of settings for the negative transconductance circuit to cancel an EM coupling to an EM circuit at a frequency.
US09209769B2 Power amplifier and communication device
A power amplifier, includes: a first and a second amplifier circuits that are controlled so that one of them do not amplify a signal when another one of them amplifies the signal; a first impedance conversion circuit, coupled between the first amplifier circuit and the output terminal, that converts an output impedance of the first amplifier circuit; a second impedance conversion circuit, coupled between the second amplifier circuit and a wiring coupling the first impedance conversion circuit and the output terminal, that converts an output impedance of the second amplifier circuit; and a connection circuit that, when the first amplifier circuit amplifies the signal, forms a path which bypasses the second impedance conversion circuit between a reference potential and the wiring coupling the first impedance conversion circuit and the output terminal, by coupling a wiring coupling the first amplifier circuit and the output terminal, with the reference potential.
US09209764B2 Small signal receiver and integrated circuit including the same
A small signal receiver includes a first current adjustment circuit connected between a first power supply voltage terminal and a first node to provide current in response to a self-bias signal, a self-biased differential amplifier connected between the first node and a second node to compare an input signal with a reference voltage, provide the self-bias signal to a self-biasing node and output an output signal through an output node, and a second current adjustment circuit connected between the second node and a second power supply voltage terminal to sink current at the second node in response to the self-bias signal. The self-biased differential amplifier includes a swing stabilizing block connected between an input node to which the input signal is applied and the self-biasing node to stabilize the input signal compared with the reference voltage.
US09209763B2 Circuit and method for adjusting the electric power supply of an energy-scavenging system
A differentiator generates a time derivative signal from a time-variable signal. A transconductance amplifier generates a biasing control signal as a function of the time derivative signal. A supply network functions to supply the differentiator and transconductance amplifier. The supply network is driven by the biasing control signal output from the transconductance amplifier. With this configuration, speed of operation of the differentiator and transconductance amplifier vary with the supply provided by the supply network, and the supply is modulated as a function of the received time-variable signal.
US09209762B1 Switching power amplifier with rate-controlled power supply voltage transitions
In a switched-power amplifier that has controlled power supply rails, e.g., when a volume control is implemented by varying the power supply voltages, a rate-controlled power supply control circuit eliminates audible pops that would otherwise occur when a change in input level causes the power supply rail voltages to change. The control circuit generates control signals that control the regulators providing the power supply rails with a controlled rate of change such that asymmetry between the voltages of the power supply rail outputs during changes of the power supply rails is substantially reduced. The controlled rate of change is less than or equal to the slowest rate of change of the power supply outputs that supply the power supply rails of the switched-power amplifier.
US09209759B2 Method for obtaining field strength information
A method includes generating an input voltage for an operational amplifier from a received electromagnetic signal in a receiver unit by an input resistance and generating an output voltage by the operational amplifier by a fixed amplification factor. The input voltage is changed until the output voltage lies within a predefined interval that includes the value of the reference voltage. The input voltage is tapped at a divider node of a voltage divider. The gate voltage of the MOS transistor, operating within a nonlinear range and connected to the divider node, is changed to adjust the output voltage to the reference voltage such that a forward resistance of the transistor is changed nonlinearly. A field strength value received by the receiver unit is determined from a comparison of the value of the present gate voltage with quantities assigned to stored gate voltage values.
US09209752B2 High-frequency amplifier
A high-frequency amplifier includes: a first transistor having a source connected to ground; a second transistor forming a cascode circuit with the first transistor; a series circuit connected between a gate of the second transistor and the ground, the series circuit being formed by a first resistive element and a series resonant circuit connected in series with each other; and a second resistive element connected in parallel to the series circuit. The high-frequency amplifier can achieve low distortion characteristics while ensuring operational stability in a wide band.
US09209748B2 Frequency synthesis device and method
A frequency synthesis device including: a first generator configured to generate a periodic signal of frequency f1; a second and third generator, coupled with the first generator and configured to receive as an input the periodic signal of frequency f1 and to generate a signal SG corresponding to a train of oscillations of frequency substantially equal to N·f1, of a time less than T1=1/f1 and repeated periodically at the frequency f1, where N is a whole number greater than 1; and a fourth generator configured to generate, from the signal SG, a periodic signal wherein a frequency spectrum includes a primary line of frequency f2=(N+i)·f1, where i is a whole number.
US09209746B2 MEMS oscillators
The invention provides MEMS oscillator designs in which the thermal actuation and piezoresistive detection signals are separated.A first approach splits the frequency of the loop into two distinct components, an actuation frequency and a detection frequency. A second approach modifies the design of the MEMS resonator such that the actuation signal follows a different path through the MEMS resonator than the detection signal.
US09209745B2 Apparatus and methods for multiphase oscillators
Apparatus and methods for multiphase oscillators are provided. In certain implementations, an oscillator system includes a first multiphase oscillator and a second multiphase oscillator that are phase and frequency-locked. Additionally, the first and second multiphase oscillators are phase-locked by an amount of phase shift that provides colocated clock signal phases of relatively wide angular distances, which can be used by the oscillators' amplification circuits. The first and/or second multiphase oscillators include one or more amplification circuits that operate using at least one clock signal phase generated by the first multiphase oscillator and using at least one clock signal phase generated by the second multiphase oscillator.
US09209743B2 Fault detection apparatus and fault detection method
According to one embodiment, an apparatus includes an first storage unit to store a value output by a communication unit, a second storage unit to store positional data indicating a place the modules, an third storage unit to store an output model indicating the relationship between a sunshine condition and an electrical output, a estimation unit to estimate a sunshine condition for each module based on the value and the output model, a forth storage unit to store the sunshine condition estimated, a correction unit to correct the sunshine condition, and a detection unit to calculate an expected electrical output for each module based on the corrected sunshine condition and the output model, and to detect a fault in the modules.
US09209740B2 Actuating apparatus
An actuating apparatus includes a first pulley to which a rotational power of a motor is transmitted, a second pulley to which a rotational power of the first pulley is transmitted through a wire, displacement encoders for detecting respective rotational angles of the first pulley and the second pulley, a slip amount calculator for calculating a slip amount of the second pulley with respect to the wire, and a motor controller for controlling a torque output from the motor based on the slip amount. The slip amount calculator calculates the slip amount based on a change in a rotational angular velocity of the first pulley, a difference between the rotational angles of the first pulley and the second pulley, and the torque output from the motor.
US09209739B2 Brushless motor device controlled by a carrier of DC positive and negative power wires
A brushless motor device controlled by a carrier of DC positive and negative power wires comprises a controller. The controller outputs a positive DC wire for outputting a positive DC voltage and a negative DC wire for outputting a negative DC voltage. The positive and negative DC voltages include a carrier signal. The controller is connected to a driver which is applied to receive the carrier signal and control a rotating mode of a brushless DC motor according to the carrier signal. Therefore, the carrier signal allows the driver and the controller to be connected by the positive and negative DC wires and attains the object of transmitting the signal, thereby reducing the material of the signal wire and the manufacture cost.
US09209738B2 Induction load driving system
When a direction command signal indicates a first direction, a signal for causing the other end of the induction load to be connected to a second power supply unit is output as a second control signal. In addition, after a passage of a first predetermined delay time after a first current detection value becomes less than a reference value of a conducting current, a signal for causing the one end of the induction load 5 to be connected to a first power supply unit is output as a first control signal. And, after a passage of a second predetermined delay time after the first current detection value becomes equal to or greater than the reference value of the conducting current, a signal for causing the one end of the induction load to be connected to the second power supply unit is output as the first control signal.
US09209735B2 Control system and method for an electric three-phase variable speed motor
A control system for an electric three-phase variable speed motor includes an inverter for providing power to the motor and a control arrangement for controlling the inverter. The control arrangement includes a d and q axis currents determining module configured to repeatedly determine d and q axis currents based on detected currents of the motor. An MTPA control block repeatedly generates reference d and q axis currents based on the determined d and q axis currents and a ratio value such that the ratio of the reference d and q axis currents is equal to the ratio value, which is set to unity. A switching signal generation module repeatedly generates switching signals to control the inverter based on the reference d and q axis currents. A fine adjustment module calculates a magnitude of a current or power of the motor and determines an optimum compensation ratio value.
US09209734B2 Apparatus for estimating parameter in induction motor
An apparatus for estimating a parameter of an induction motor is provided. The estimating apparatus receives an output from a current controller and d and q-axis currents in a synchronous reference frame applied to an induction motor, calculates an error of rotor resistance, and obtains a difference between the rotor resistance and nominal rotor resistance to calculate stator resistance therefrom.
US09209732B2 Power supply system of marine vessel
A power supply system configured to couple to a power distribution bus of a marine vessel and to power a plurality of electric motors coupled to the power distribution bus. The power supply system includes a generator configured to generate electric power and a control system coupled to the generator and configured to control the output voltage of the generator based on a voltage setpoint. The control system includes a measuring unit configured to measure a parameter of the electric power generated by the generator and a control unit configured to control the voltage setpoint for the output voltage of the generator based on the measured parameter.
US09209731B2 Output control device of electric generator
A rising temperature of components of an electric generator is restrained without deteriorating the quality of electricity output and the user-friendliness of the electric generator. AVR (7) and a temperature detecting means (75) is provided in a generator housing. While the detected temperature is greater than the limitation starting temperature, the output voltage is decreased by decreasing the control target value (for the AVR (7)) in accordance with the temperature. A range between the power generation stopping temperature as an upper-limit temperature of a generator component and the limitation starting temperature set to be a lower than the power generation stopping temperature is defined as a voltage droop range. In the voltage droop range, the control target value is decreased in accordance with a target voltage base value preset in a relationship with the temperature so that the decrease degree becomes greater in proportion to a rising temperature.
US09209730B2 Gas turbine under frequency response improvement system and method
A system and method is provided that improves the under frequency response of gas turbines by providing a fast-response power augmentation system. The system includes a tank storing a blended mixture of motive fuel such as ethanol or methanol and demineralized water in a predetermined ratio that is provided as a diluent to be injected into the compressor bellmouth, the Compressor Discharge Chamber (CDC), and/or the combustion system via one to three dedicated circuits. To achieve the instantaneous injection of the diluent at the correct pressure and for the appropriate duration to meet the needs of the gas turbine Grid compliance mandate, an accumulator is used as the motive force to drive the augmentation fluid in the dedicated circuits. The injected diluent is microprocessor controlled to either be simultaneous into all three circuits or is sequenced based on a determination of the best turbine control and performance.
US09209720B2 Energy transfer between data storage devices with moving parts
A system that includes a first data storage element actuated by a first electric motor. The system also includes a second data storage element actuated by a second electric motor. An electrical connector assembly transfers electrical energy from a back electromotive force generated in the first electric motor, by movement of the first data storage element, to the second electric motor to thereby energize the second electric motor.
US09209716B2 Method and control unit for detecting a blocked electric machine in an electric vehicle
The invention relates to a method and a control unit, which makes it possible to reliably detect in an electric vehicle whether or not an electric machine is in a blocked state. For this purpose, a current rotational speed of the electric machine (1) is monitored using a control unit (7). If a non-rotating state is detected, the electric machine (1) is actuated specifically for increasing a torque. The current rotational speed is further monitored, in particular for an increase of the current rotational speed of the electric machine, at least a short-term one, for tensioning a drive train (3) against a wheel (5) blocked due to external influences, for example. If this is not the case, it is assumed that the electric machine (1) is blocked, and a corresponding blocking signal is generated. If the electric machine (1) is detachably connected to the wheel (5) via a coupling (19), it can be additionally provided that once the non-rotating state is detected, the coupling (19) is disengaged in order to see if the electric machine (1) will react to a request for an increased torque with an increased rotational speed, or if this does not happen due to a blocked electric machine.
US09209714B2 Vibrating actuator assembly and digital image processing apparatus including the same
A vibrating actuator assembly including: a rotor that is rotatable; a first stator disposed at one surface of the rotor and including a first vibrating plate that is elastically deformable and a first vibrating device that is disposed at the first vibrating plate and transforms the first vibrating plate by vibrating when an electrical signal is applied; and a second stator disposed at the other surface of the rotor and comprising a second vibrating plate that is elastically deformable and a second vibrating device that is disposed at the second vibrating plate and deforms the second vibrating plate by vibrating when an electrical signal is applied, in which electrical signals having different phases are respectively applied to the first and second vibrating devices.
US09209709B2 Method and system for hysteresis control of a power circuit
A device for providing electric power to a load, having two switch members (Z1, Z2) connected in series between positive and negative power supply rails. The first switch connected to the positive rail and the second switch connected to the negative rail, with an inductor (L) being connected to a bridge point between the switches and the load. Each switch having and a flywheel diode connected in parallel with a switchable member. A monitoring circuit monitors a current (I) through said inductor (L) and a bridge voltage (E) at said bridge point. A control circuit provides control signals to the switches for turning said switchable members ON and OFF. When said current is positive, the control circuit turns the first switch member OFF when said current exceeds a predetermined control value (I0) whereupon the current decreases towards zero and passes through the flywheel diode of the second switch member.
US09209706B2 Switching rectifier circuit and battery charger using same
A switching rectifier circuit according to the present invention includes: a first switch coupled between a first alternating-current voltage and a direct-current voltage; a second switch coupled between a second alternating-current voltage and the direct-current voltage; a third switch coupled between the first alternating-current voltage and a reference voltage; a fourth switch coupled between the second alternating-current voltage and the reference voltage; a first comparator circuit that generates each of a first power-on detection signal and a first power-off detection signal from the first alternating-current voltage and the direct-current voltage; a second comparator circuit that generates each of a second power-on detection signal and a second power-off detection signal from the second alternating-current voltage and the direct-current voltage; and a timing generator that controls the switches to be turned on/off on the basis of outputs of at least the comparator circuits.
US09209702B2 Flyback converter and method for controlling a flyback converter
A flyback converter includes a transformer and a controller operable for controlling a switch coupled in series with a primary winding of the transformer. The controller is configured to operate in multiple modes including a burst mode and a standby mode. In the burst mode, the controller generates a first plurality of discrete pulse groups to turn on the switch and a duration of each pulse in the first plurality of discrete pulse groups is determined by a first reference signal having a first predetermined voltage. In the standby mode, the controller generates a second plurality of discrete pulse groups to turn on the switch and a duration of each pulse in the second plurality of discrete pulse groups is determined by a second reference signal having a second predetermined voltage which is greater than the first predetermined voltage of the first reference signal.
US09209700B2 Magnetic sensing technique for power supply systems
One embodiment includes a power supply system including a transformer comprising a primary, secondary, and auxiliary winding that are magnetically coupled. The system also includes a switch stage that generates a current through the primary winding in response to activation of a switch based on a control signal that is generated based on a feedback voltage associated with the auxiliary winding. The current can be induced in the secondary winding. The system also includes an output stage coupled to the secondary winding and that generates an output voltage based on the current induced in the secondary winding. The system further includes a feedback stage coupled to the auxiliary winding and comprising a discriminator configured to determine a zero-current condition associated with the current induced in the auxiliary winding based on monitoring a change in slope of the feedback voltage and to measure the feedback voltage during the zero-current condition.
US09209696B1 Switching mode power supply capable of achieving soft transition for valley switching, or performing valley locking
A quasi-resonant (QR) converter introduces soft transition for valley switching and valley locking. One exemplifying QR converter is capable of performing valley switching, but has the valley switching in a specific signal valley of one switching cycle softly transit to the valley switching in another signal valley of a later switching cycle, via at least one switching cycle performing no valley switching.
US09209694B2 Voltage transformer and method for transforming voltage
A voltage transformer (10) comprises an inductor (11), a first and a second switch (15, 16), and a control unit (25). A first terminal (12) of the inductor is supplied an input voltage (VIN). The first switch (15) is disposed between a second terminal (13) of the inductor (11) and a reference potential terminal (17). The second switch (16) is disposed between the second terminal (13) of the inductor (11) and an output (19) of the voltage transformer (10). The control unit (25) is configured to set the first switch (15) in a first and a second phase (A, B) of a first operating mode of the voltage transformer (10) into a blocking operating state and to set the second switch (15) in the first phase (A) into a conducting operating state and in the second phase (B) into an operating state having different conductivity.
US09209683B2 Structure and method for a switched circuit device
The present disclosure provides a switched voltage converter for receiving a source voltage and producing an output voltage. The voltage converter comprises a switch controller and a switched device communicatively coupled to the switch controller. The switch controller adjusts the output voltage by controlling a duty cycle of the switched device. The switched device is sized such that it is characterized by a drain-to-source breakdown voltage greater than or substantially equal to the source voltage and the output voltage and is further characterized by a hot-carrier injection rating less than the source voltage or the output voltage. In further embodiments, the switched device is sized such that it is characterized by a drain-to-source breakdown voltage greater than or substantially equal to a peak operating voltage and is further characterized by a hot-carrier injection rating less than the peak operating voltage.
US09209681B2 Charge pump initialization device, integrated circuit having charge pump initialization device, and method of operation
In an initialization phase of a charge pump, an input signal is supplied to an input electrode of a capacitor of the charge pump and to an initialization device of the charge pump. An initialization signal is supplied to the initialization device of the charge pump. The initialization device supplies an output signal to an output electrode of the capacitor. The output signal has a high level and a low level corresponding to a high level and a low level of the input signal, the input signal and the output signal causing a charge to be accumulated in the capacitor. In a pumping operation phase following the initialization phase, the initialization signal is removed from the initialization device to place the output electrode of the capacitor in a floating state, and a pumping action is performed with the charge accumulated in the capacitor.
US09209680B2 Circuit for providing negative voltages with selectable charge pump or buck-boost operating mode
Circuits, arrangements and systems may provide for configuring a portion of an integrated circuit to receive an electrical component, and configuring the integrated circuit to operate in a first mode when the electrical component is a first electrical component or in a second mode when the electrical component is a second electrical component.
US09209676B2 Method and apparatus for charging batteries having different voltage ranges with a single conversion charger
Embodiments for a battery charger include a single conversion switched mode power supply having a bias winding on the primary side of the power transformer. The bias winding produces an output that is proportional to the voltage produced on the secondary winding, and is sensed by a programmable voltage sensing circuit. The programmable voltage sensing circuit is programmed by a voltage select signal from the secondary side of the charger to produce an sense signal that is proportional to the output of the bias winding by a selected factor corresponding to a battery type of a battery being charged.
US09209675B2 System and method for reducing an input current ripple in a boost converter
A device comprises a first power cell, a second power cell, a power factor correction module, a boost inductor switch circuit, and an output. The first and second power cells are configured to provide first and second currents in response to an input voltage. The power factor correction module is configured to continuously activate and deactivate the first and second power cells based on an input current level, on the input voltage, and on an output voltage. The boost inductor switch circuit is configured to disable the first power cell in response to the input current level being below a predetermined level. The output is configured to provide the output voltage based on the first and second currents when the input current level is above the predetermined level, and to provide the output voltage based on the second current when the input current level is below the predetermined level.
US09209670B2 Spot welds aligning motor components
Provided herein, is an apparatus that includes a first weld attaching a first motor component and a second motor component, a second weld attaching the first motor component and the second motor component, and a plurality of spot welds along a joint between the first and second weld wherein the plurality of spot welds are configured to align the first motor component and the second motor component.
US09209669B2 Method for manufacturing stator, apparatus for manufacturing stator, and stator
A method for manufacturing a stator includes preparing a stator core having a plurality of teeth, a plurality of coils having a plurality of lead lines, a substrate having a plurality of connecting portions, and a plurality of positioning jigs having restraining portions. The method includes positioning the substrate and the lead lines so that distal portions of the lead lines are separated from the connecting portions in at least one of a radial direction and a circumferential direction. The method further includes inserting the lead lines in the restraining portions, aligning the distal portions of the lead lines with the corresponding connecting portions using the positioning jigs, inserting the lead lines into the corresponding connecting portions, and electrically connecting the lead lines inserted in the connecting portions to the corresponding connecting portions.
US09209664B2 Vehicle rotating electrical machine and cap structure of pulley for the same
A vehicle rotating electrical machine includes a pulley unit and a cap that covers an opening portion of the pulley unit. The pulley unit includes a pulley shaft that has a hollow cylindrical shape and is mechanically connected to a rotation shaft. On an inner peripheral surface of the pulley shaft, a polygonally-shaped hole portion, a first and a second circular hole portions, and an inner diameter thread portion are formed. The cap includes a planar section and a plurality of pillar sections. The planar section covers the opening portion. The pillar sections extend from the planar section to the inner diameter thread portion, and include a bulge portion that bulges outward in a radial direction of the pulley shaft. The bulge portion is located at a position corresponding to the second circular hole portion in a state where the opening portion is covered by the planar section.
US09209658B2 Stator unit and motor
A stator unit including a coil in which a distance between an m−1-th turn and an m-th turn is wider than each distance in a first turn to the m−1-th turn. The m+1-th turn is disposed between the m−1-th turn and the m-th turn. Further, in a cross-section perpendicular to a central axis and passing a tooth, an angle between a line segment connecting respective centers of the m+1-th turn and the m−1-th turn and a line segment connecting respective centers of the m+1-th turn and the m-th turn is about 120° or more. With this structure, bulging in a circumferential direction of the coil adjacent to an inner peripheral portion of the tooth can be suppressed and a clearance can be secured between adjacent coils such that the number of turns of the coil can be increased.
US09209657B2 Electric motor, hoisting machine and elevator system
An electric motor, a hoisting machine and also an elevator system are disclosed. The electric motor includes a stator, which stator includes slots, into which slots a concentrated winding is fitted. The electric motor also includes a rotating rotor, which rotor includes permanent magnets placed consecutively in a ring in the direction of the rotational movement. The ratio (LM/LP) of the width of a permanent Lp magnet at the point (LM) of the center line of the magnet and the width (Lp)′ of a magnetic pole of the rotor is at least ⅔ and at most ⅘.
US09209651B2 VBUS power switch
This document discusses, among other things, an electronic circuit and method for defaulting to a valid battery supply to power an electronic device. In an example, an electronic circuit can be configured to receive information about the battery supply (e.g., an internal battery), such as the battery supply voltage (VBAT), and to determine if the battery supply is valid or invalid using the received information (e.g., comparing the VBAT to a threshold). If VBAT is valid, the electronic device can default to receiving power from the battery supply. If VBAT is invalid, the electronic device can receive power from another power supply, such as an external supply.
US09209650B2 Solar powered tabletop charging station
The present invention relates to a table top, solar-powered charging/electricity providing to renewable devices having a shade structure for outdoor use. The invention having a base structure for stabilizing the device and for providing one or more compartments for storing items therein and/or providing a docking station or cellular phone charging station, a shade structure which contains one or more solar cells attached to an outer surface thereof, an attachment arm which connects the base and the shade structure, and various electronic components operative to convert solar energy into electricity.
US09209649B2 Apparatus and method for charging battery in a portable terminal with solar cell
A method for charging in a portable terminal is provided. The method includes charging a battery of an electronic device, using a natural resource, monitoring a charging state of the battery, and booting the electronic device based at least in part on the charging state and a determination that the electronic device is powered off.
US09209645B2 Method and apparatus for controlling charging of secondary battery
There is provided a method and apparatus for controlling charging of a secondary battery. The apparatus includes a receiving unit, a sensing unit and a charging controller. The receiving unit receives a full-charge time of the secondary battery from a user terminal. The sensing unit monitors a charging state of the secondary battery. The charging controller controls charging of the secondary battery, using the full-charge time and the charging state. Accordingly, the charging of a secondary battery is controlled to be completed at a full-charge time desired by a user, thereby preventing deterioration of the secondary battery.
US09209642B2 Battery pack identification scheme for power tool systems
A method is provided for identifying a battery pack that is operably coupled to a battery charger. The method comprises: measuring voltage at a plurality of designated terminals of a first battery pack while the battery pack is coupled to the battery charger; determining how many of the designated terminals are connected to a reference voltage, such as battery positive; and identifying an attribute of the battery pack based on how many of the designated terminals are connected to the reference voltage.
US09209641B2 Communication method, communication system, and energy storage system including the same
There is provided a battery system including a system bus, a system controller coupled to the system bus and configured to transmit one or more first system frames on the system bus, and one or more battery subsystems coupled to the system bus and configured to transmit one or more second system frames on the system bus, wherein at least one of the one or more battery subsystems including a storage system for storing power, and a storage system controller for controlling charging and discharging of the storage system, for receiving storage system data, and for transmitting the one or more second system frames including the storage system data on the system bus, wherein at least one of the system controller or the storage system controller is configured to apply a system frame division signal on the system bus between the system frames.
US09209635B2 Pre-charging system for a capacitor in a voltage inverter for an electric motor
A pre-charging system for a capacitor in a voltage inverter for an electric motor is provided. The system includes a grounding contactor electrically coupled between a grounding terminal of a battery pack and a first end of the capacitor. The system further includes a pre-charging contactor and a resistor electrically coupled in series. The pre-charging contactor and the resistor are electrically coupled between a high voltage terminal of the battery pack and a second end of the capacitor. The microprocessor determines a total amount of energy supplied to the resistor and induces the pre-charging contactor to have an open operational position to electrically de-couple the high voltage terminal from the second end of the capacitor, if the total amount of energy is greater than a threshold amount of energy.
US09209632B2 Systems and methods of direct cell attachment for batteries
Embodiments of the systems and methods of direct cell attachment for battery cells disclosed herein operate without the protection FETs and the protection IC, thereby enabling the direct attachment of battery cells to the system without compromising safety. A charger IC comprises a switching regulator whose output is used to charge the battery through a pass device. In example embodiments of the disclosed systems and methods of direct cell attachment, a combination of switching FETs and the pass device are used as a protection device instead of the charge and discharge FETs. During normal operation, the pass device may be used to charge the battery using the traditional battery charging profile. Under fault condition, the switching FETs and pass device may be driven appropriately to protect the system.
US09209630B2 Active battery cell balancing methods with variable duration discharge
A method and a system for balancing cells of a vehicle battery includes discharging charge from a highest charged cell for a discharge time period dependent on a charge difference between the highest charged cell and a lowest charged cell at a given time. The cells may be charged with the discharge charge during a charge time period.
US09209627B2 Wireless power supply system and multi-layer shim assembly
A wireless power supply includes a multi-layer shim assembly. Each shim aids in alignment of coils and routing of conductors in a multi-layer coil array. A shield or PCB can be used as part of the multi-layer shim assembly. Wires can be routed through channels to the edge of the shim assembly or wires can protrude through a portion of the multi-layer shim assembly. Traces can be used to route current through the multi-layer shim assembly. Plastic shims can be created by over-molding coils with plastic.
US09209625B2 Method and system to co-optimize utilization of demand response and energy storage resources
Method and system to provide co-optimized utilization of demand response and energy storage resources in an electrical grid system. The system may include a module to evaluate a marginal savings relative to a dispatch cost, if a demand response event is performed. The system may further include a module to evaluate a marginal savings relative to the dispatch cost, if an energy storage event is performed, and a controller including circuitry may be configured to determine a control strategy to perform a dispatch including a demand response event and/or an energy storage event, based at least in part on the respective marginal savings of the demand response event and/or the energy storage event, which may be selected to co-optimize an integrated utilization of the demand response and energy storage resources to meet a given objective.
US09209618B2 Gate drive unit and method for short circuit protection for a power switch
A gate drive unit includes a measurement unit, a multi-resistive driving device, and a processing unit. The measurement unit measures a voltage across main terminals of a power switch. The driving device includes plural individually controllable resistive elements. The processing unit controls a control voltage applied to a control electrode of the power switch to activate the power switch. The processing unit individually activates or deactivates the resistive elements of the multi-resistive driving device to change which of the resistive elements at least partially conducts the control voltage to the power switch at different times responsive to the voltage across the main terminals representing a short circuit event. The processing unit changes which of the resistive elements are activated or deactivated to control a rate at which the control voltage decreases.
US09209617B2 Device and method for preventing arc flashes
A device for preventing arc flashes in electrical systems is provided. The device may include at least one heat sensor for measuring a temperature of an electrical conductor, and a controller operatively coupled to the at least one heat sensor and configured to arrest current in the electrical conductor if the measured temperature exceeds a predefined threshold temperature.
US09209616B2 Power supply circuit for on board energy source or storage device and particularly for super-capacitor storage unit
A power supply circuit for an on board energy source or storage device, and particularly for a super-capacitor storage unit having a plurality of interconnected super-capacitors and a first and a second terminal, includes a positive bus connecting the first terminal to a positive pole of a DC high voltage feeding source and a negative bus connecting the second terminal to a negative pole of the high voltage feeding source; and means for disconnecting the super-capacitor storage unit from the high voltage feeding source after detecting circulating fault currents due to insulation losses to ground, which include a high speed circuit breaker and a differential relay that are connected in series along the negative bus, between the second terminal and a grounding point, the differential relay generating an activation signal of the high speed circuit breaker in response to the circulation of a fault current.
US09209611B2 Flange and sleeve assembly
An assembly includes a flange that can be fixed to an interior wall structure, such as an electrical box. A planar surface of the flange abuts the outer surface of the wall substrate thus providing tight contact between the wall substrate and the interior structure. Mating elements of the flange engage an electrical device to maintain the device in flush and parallel alignment with the substrate.
US09209609B2 Cable tray system with splice plate
A cable tray system including cable trays formed of a first side rail and a second side rail arranged substantially parallel to one another and transverse rungs extending between and connecting the first and second side rails. The first and second side rails each include a vertical web, a portion of which is inwardly protruding. The cable tray system further includes a splice plate for splicing or joining multiple cable trays. The splice plate includes a vertical web, a portion of which is inwardly protruding, wherein the inwardly protruding portion of the splice plate cooperates with the inwardly protruding portion of the first and second side rails. Holes in the first and second side rails can be aligned with holes in the splice plate through which fasteners may be inserted through to secure the splice plate to the side rails.
US09209598B1 Cooling system for high average power laser
A cryogenic cooling apparatus for high average power laser oscillator or amplifier, wherein the oscillator or amplifier material is in direct contact with a flowing cryogenic liquid cooled to below its boiling point is described. This method of cooling overcomes the limit in heat flux due to the onset of film boiling, thereby allowing for increased laser average power.
US09209597B2 Method and device for producing white light from Y2O3 nano-powders
A device for producing white light includes a light conversion module and a light source. The light conversion module includes undoped metal oxide powder comprising particles having a size of less than 50 nm. The light source generates excitation light having a wavelength in the near infrared region. The excitation light is directed towards the undoped metal oxide powder, the undoped metal oxide powder is excited with the excitation light, and the excited undoped metal oxide powder emits white light having a continuous spectral distribution in the range of 440 nm to 900 nm.
US09209594B2 Oxygen laser oscillator
The disclosed invention provides an oxygen laser oscillator which can obtain a direct lasing from a singlet oxygen molecule (O2(1Δg)). The oxygen laser oscillator (100) according to the embodiment includes: a singlet oxygen generator (130) having a rotating disc (104); and a laser cavity (102) positioned immediately above the singlet oxygen generator (130) and directly connected to the singlet oxygen generator (130). In the oxygen laser oscillator according to the embodiment, a separation wall (112) may be placed between the singlet oxygen generator (130) and the laser cavity (102).
US09209591B2 Laser processing method
A laser processing method of applying a pulsed laser beam to a single crystal substrate to thereby process the single crystal substrate. The laser processing method includes a numerical aperture setting step of setting the numerical aperture (NA) of a focusing lens for focusing the pulsed laser beam so that the value obtained by dividing the numerical aperture (NA) of the focusing lens by the refractive index (N) of the single crystal substrate falls within the range of 0.05 to 0.2, a positioning step of relatively positioning the focusing lens and the single crystal substrate in the direction along the optical axis of the focusing lens so that the focal point of the pulsed laser beam is set at a desired position in the direction along the thickness of the single crystal substrate, and a shield tunnel forming step of applying the pulsed laser beam to the single crystal substrate so as to focus the pulsed laser beam at the focal point set in the single crystal substrate thereby forming a shield tunnel extending between the focal point and a beam incident surface to which the pulsed laser beam is applied.
US09209588B2 Disk laser
The different advantageous embodiments provide an apparatus and method comprising a substrate configured to increase an intensity of light at a desired wavelength. The substrate has a front side, a back side, and an outer edge. The substrate is configured to reflect the light received on the front side of the substrate. The substrate comprises ceramic. The substrate comprises a plurality of sections. The method and apparatus also comprise a material configured to attenuate the light passing between the plurality of sections. The material surrounds an edge of each section of the plurality of sections. The apparatus and method also comprise a cooling system configured to allow liquid nitrogen to be transmitted through the cooling system and receive heat generated in the substrate from the back side of the substrate.
US09209584B2 Electrical connector assembly
An electrical connector assembly includes a header having a body having a first receptacle and a second receptacle separated by a midwall and a plurality of contacts held by the midwall. The contacts have first pins located within the first receptacle and second pins located within the second receptacle. A first plug is received in the first receptacle. The first plug includes a housing holding a plurality of terminals terminated to corresponding wires having sockets mated with corresponding first pins in the first receptacle. The sockets are configured to be electrically connected to sockets of a second plug received in the second receptacle by the contacts held by the header.
US09209583B2 Multi-level connector and use thereof that mitigates data signaling reflections
An improved electrical connector for connecting bus lines to a card such as a memory card or media card, including a multi-level connector comprising a latching device having a plurality of insertable latch positions that advantageously allows for selectively connecting or isolating an electrical path to an adjoining connector. The connectors of unpopulated DIMM slots are disconnected from the network along with the traces that would normally form a stub with associated undesirable signal reflections that would otherwise disturb the signal transmitted to the receiving end if not properly terminated. The contacts of the edge connector itself are used as a means to selectively connect or disconnect adjacent/downstream cards in a serially cascaded architecture. The burden of the stubs due to unpopulated card slots and the need to place one card at the far end of the network are thus eliminated.
US09209580B2 System of a co-axial insertion-type connector and a co-axial cable
A system of a coaxial connector and a coaxial cable, wherein the respective outer and inner conductors of the coaxial connector and the coaxial cable are interconnected in an electrically conductive manner, such that the coaxial connector and the coaxial cable engage into each other in a form-fitting and rotationally secured manner. The engaging parts may be in the form of tongues and cut-outs that interfit to prevent rotation.
US09209579B2 Connecting structure for electronic device
A connecting structure includes a housing which is inserted into a cover, and a terminal which is accommodated in the housing and holds an electronic device. The housing allows the electronic device to be inserted from an outside of the housing into the housing in a state where the terminal is accommodated in the housing. The cover comes in contact with the electronic device in a state where a part of the electronic device is inserted to the terminal. The cover allows the housing to be inserted into the cover in a state where whole part of the electronic device is inserted into the housing to be held at a normal position by the terminal. The cover has an abutting face preventing the electronic device from slipping out from the housing in a state where the housing is inserted into the cover.
US09209577B2 Socket for connecting jack having structure of preventing popping noise
Provided is a socket for a connecting jack, which is capable of preventing a popping noise from being generated. The connecting jack includes a connecting part including a tip having an end of a cone shape to perform a function of transmitting a signal through a cable and a sleeve having a cylindrical shape to perform a ground function. The connecting jack is inserted into the socket of a guitar or an amplifier. The socket includes: a cover member buried in a fixing part of the guitar or the amplifier; a signal terminal fixed to the cover member and protruding toward the fixing part; a ground member hinge-coupled in the cover member; and an elastic piece.
US09209573B1 Electric connector assembly
An electric connector assembly includes a first terminal module, a second terminal module, a grounded metal plate, an insulating body, an inner shield casing and an outer shield casing. The first terminal module, the grounded metal plate and the second terminal module are spaced from one another and integrally formed and embedded into the insulating body, and a tongue plate is formed at a front section, so that the first terminal module and the second terminal module are disposed at upper and lower surfaces of the tongue plate respectively, and the grounded metal plate is completely covered by the insulating body, and the inner shield casing is fixed at a middle section of the insulating body, and the outer shield casing covers the exterior of the insulating body to form an engaging portion around the external space of the tongue plate.
US09209569B2 Communications connectors including transmission lines having impedance discontinuities that improve return loss and/or insertion loss performance and related methods
Communications plugs are provided that include a housing that receives the conductors of the communication cable. A printed circuit board is mounted at least partially within the housing. A plurality of plug contacts are on the printed circuit board, and the printed circuit board includes a plurality of conductive paths that electrically connect respective ones of the conductors to respective ones of the plug contacts. First and second of the conductive paths are arranged as a first differential pair of conductive paths that comprise a portion of a first differential transmission line through the communications plug, where the first differential transmission line includes a first transition region where the impedance of the first differential transmission line changes by at least 20% and a second transition region impedance of the first differential transmission line changes by at least 20%.
US09209566B2 Connector for preventing unlocking
Disclosed is a connector for preventing unlocking which includes a signal pin transferring a signal; a body into which the signal pin is inserted and which is electrically isolated from the signal pin; a first housing having a hollow portion into which one end of the body is inserted, a thread groove and at least one protruding portion or a plurality of fixing grooves formed at an inner circumferential surface of the other end thereof; and a second housing having a hollow portion into which the other body end is inserted and through which the second housing is moved along an outer circumferential surface of the body in an axial direction.
US09209563B2 Power supply connector and method for unlocking power supply connector
According to the present invention, the pin, which is provided on the link member that links the lock lever and the electromagnetic solenoid, can be removed from both sides of the power supply connector. Thus, the pin can be removed from the side that allows workspace, regardless of the side on which the openable lid of the power reception connector is positioned. Thus, even when the electromagnetic solenoid malfunctions, the pin can be extracted with certainty, and the lock can be released. Thus, the power supply connector can be pulled out from the power reception connector. Further, because a cover is provided on the grasping member, the pin extraction workability is also excellent.
US09209561B2 Connector structure
A connector structure includes a first connector and a second connector. The first connector includes a first connector housing and an engagement arm that can be elastically bent. The second connector includes a second connector housing, a slider provided on the second connector housing, a biasing portion that biases the second connector housing in a connector decoupling direction, and an arm engagement portion engaged with the engagement arm. During a coupling process of the first and second connectors, the slider is slid by a pressing force applied from the first connector against a biasing force generated by the biasing portion. The biasing portion includes an elastically-bendable arm provided on the slider, and a tapered surface provided on the second connector housing. The biasing force is generated as a reaction force of an elastically-restorative force of the elastically-bendable arm bent by the tapered surface.
US09209559B2 Power connector
A connector system includes a first connector with a housing. The housing supports a terminal with an aperture that is positioned adjacent a pocket. A ball is positioned in the pocket and is restrained by the terminal but is configured to partially extend through the aperture. A second connector includes a contact and a magnet attraction member. In operation, when the first and second connector are in a mated position, the ball is urged toward the magnetic attraction member due to a magnetic force and partially extends through the aperture so as to engage the contact, electrically connecting the terminal and the contact.
US09209555B2 Connector and method for manufacturing same
In a connector (10) with a first housing (11) made of resin and including a first terminal portion (42A) connected to a first device and a second housing (25) made of resin and including a second terminal portion (42B) connected to a second device, the first and second housings (11, 25) are coupled and united by a coupling portion (30) made of rubber and formed by insert molding or two-color molding. A method for manufacturing the connector (10) of the present invention includes a uniting step of coupling and uniting the first and second housings (11, 25) by the coupling portion (30) made of rubber by insert molding or two-color molding.
US09209553B2 Plug-connector housing and plug connector
A plug-in connector includes a plug-in connector housing having first and second housing parts. The first housing part has electrical components and a blade-like part. The second housing part is connectable to the first housing part and has a recess through which an electrical line can pass to connect with the electrical components. The blade-like part covers a portion of the recess and constricts the recess to a relatively smaller feed-through region when the housing parts are connected together.
US09209552B2 Connection module and connection module system
A connection module and to a connection module system for supplying a drive module with electrical current, the connection module including a first connecting contact and a second connecting contact, wherein the first and the second connecting contacts each have a contact element, wherein the first contact element of the first connecting contact is arranged in a movable manner and the second contact element of the second connecting contact is arranged in a fixed manner, wherein the second contact element of the second connecting contact is configured to provide a connection to a corresponding first contact element of an adjacent module, wherein the second connecting contact includes a spring terminal configured to press the corresponding first contact element of the adjacent module against the second contact element of the second connecting contact.
US09209547B2 Connector adapter
Connector adapters that may allow contacts in a connector insert to form electrical connections with contacts in an incompatible connector receptacle. One example may provide a connector adapter for providing a connection between a connector insert and an incompatible connector receptacle. The connector adapter may be a magnetic connector providing a magnetic connector receptacle at a first end to accept a connector insert having an attraction plate. This connector adapter may further provide a connector insert having an attraction plate at a second end to insert into a magnetic connector receptacle on an electrical device.
US09209545B2 Terminal having an insertion groove for a conductor and a pair of conductive arm parts with a plurality of slits
A terminal, including an insertion groove for pressing a conductor thereinto disposed between a pair of conductive arm parts, where, when t represents a distance from a center of a contact part between the conductive arm part and the conductor to an end of the conductive arm part at a time of pressing-in of the conductor; h represents a width of the conductive arm part at the end thereof; and Y represents a width between an arbitrary position of the insertion groove and an outer edge of the conductive arm part, the following relation holds: at a point of (½)×t, Y=(h/√2)×(0.8 to 1.2).
US09209540B2 Board-to-board connectors
Board-to-board connectors that may provide a durable and reliable connection, save board space, may be easy to manufacture, and may be simple to use during device assembly. One example may include a receptacle including a number of contacts forming electrical connections with traces or planes in or on a printed circuit board. A boss may be included as part of the receptacle and the boss may be connected to the printed circuit board. An insert may be mated to the receptacle. Contacts in the insert may form electrical connections with traces or planes in a second or flexible circuit board. A cowling may be placed over the flexible circuit board to act as a stiffener. A fastener, such as a screw, may be placed through openings in the cowling, second or flexible circuit board, and insert, and into the boss.
US09209536B2 Mounting structure for board connector
A mounting portion (20) of a housing (10) is to be inserted into a circular mounting hole (2) formed on a circuit board (1) and has a fixed piece (21) and two resilient locking pieces (30) at substantially equal angular intervals. The fixed piece (21) has an arcuate outer surface (22A). Each resilient locking piece (30) has a displaceable main body (31) with an arcuate outer shape (33A) that conforms to the inner peripheral surface of the mounting hole (2). A lock (37) is on a tip of the main body (31) and can be locked to an edge on an under side of the mounting hole (2). An extending portion (33) is formed on each of side edges of the main body (31) and extends circumferentially toward the fixed piece (21).
US09209532B2 Ganged housing for coaxial cable connectors
A multi-core cable terminating housing includes an upper case and a lower case. The upper case has a first plurality of grooves; the lower case has a second plurality of grooves; the grooves and the cases are shaped for mating with each other. Mating of the upper case with the lower case defines a cable plenum and a cable egress, and joins the first plurality of grooves with the second plurality of grooves to define a plurality of collars that open in parallel alignment from the cable plenum toward a front side of the housing opposite the cable egress, for receiving cable terminating connectors.
US09209530B2 Conductor connection terminal having improved overload protection
A conductor connection terminal (1) comprising an insulating housing (2) and comprising at least one spring-force clamping connection (5) in the insulating housing (2) for making the terminal connection of an electrical conductor is described. The spring-force clamping connection (5) has a base plate (6) and at least one spring tongue (7), which is at an angle to the base plate (6), is connected in a root region (8) to the base plate (6) and extends with its tongue end (9), which is movable in spring-elastic fashion, in a conductor plug-in direction (L). The free tongue end (9) is spaced apart from the base plate (6) by a gap (15). The insulating housing (2) has at least one actuating pushbutton (4), which interacts with the tongue end (9) opposite the base plate (6) and has an actuating section (14), which extends in the direction towards the base plate (6), for deflecting the spring tongue (7) transversely to the direction of extent of the spring tongue (7). The actuating pushbutton (4) has at least one resting section (20), which is designed in each case at an associated tongue end (9) to rest on a lateral peripheral edge (19) of the associated tongue end (9) and to shift the tongue end (9) in the direction of the base plate (6) whilst reducing the width of the gap (15) when the actuating pushbutton (4) is shifted in the direction of the base plate (6) so as to open a clamping connection formed by the spring tongue (7) for an electrical conductor of which a terminal connection is intended to be made.
US09209526B2 Broadband dual-polarized omni-directional antenna and feeding method using the same
A broadband dual-polarized omni-directional antenna and a feeding method using the same are provided. By setting a vertically polarized antenna and a horizontally polarized antenna each in co-axial, the horizontally polarized antenna is attached to an upper surface and a lower surface of the attaching plate respectively by two arms of a folded dipole and the two arms connect to an inner conductor and an outer conductor of a feed line so that the dual-polarized antenna may have a comparatively broad bandwidth. At the same time, since the dual-polarized ceiling antenna has a good isolation effect and coverage balance, it may work as the MIMO antenna in the LTE and WLAN systems effectively and may be used in the 2G and 3G networks to improve the data transmission rate.
US09209523B2 Apparatus and method for modular multi-sector active antenna system
Multiple radio frequency (RF) modules can be arranged in a multi-sector configuration. Each RF modules may have a wedge-like shape such that the RF modules may be adjacently affixed to one another in spherical cluster, thereby providing multi-sector coverage while maintaining a relatively compact active antenna installation. Additionally, multiple clusters of RF modules can be arranged in an array to provide beamforming and/or other advances antenna functionality.
US09209520B2 Hybrid antenna for portable communication devices
An antenna structure (111) commences at a feed point (202) that is coupled to an inverted F antenna section (204). The inverted F antenna section is coupled to a monopole section (210) that is further coupled to a helical section (216). The inverted F section, monopole section, and helical section are coupled in series together.
US09209519B2 Electromagnetic wave propagation apparatus and electromagnetic wave interface
An electromagnetic wave propagation apparatus has a planar propagation medium including a planar conductor, a first planar dielectric, a planar mesh conductor, and a second planar dielectric being overlaid on each other in order; at least one electromagnetic wave input port for the planar propagation; a power supply station that supplies the planar propagation medium with an electromagnetic wave via at least one electromagnetic wave input port; and at least one power receiving apparatus for a second planar dielectric of the planar propagation medium that includes an electromagnetic wave interface and a power receiving circuit. A dielectric board has multiple conductor patterns as the electromagnetic wave interface. At least one connection means is between the conductor pattern and the power receiving circuit. At least one short-circuit means between the conductor patterns is at an end of the conductor pattern.
US09209517B2 MIMO/diversity antenna for improving the isolation of a specific frequency band
A MIMO/diversity antenna for improving isolation of a frequency band includes: a ground surface formed on a printed circuit board; planar inverted F antennas having the ground surface therebetween and disposed on the printed circuit board having no ground surface formed, each F antenna having an antenna pattern that includes a radiation unit, a power supply unit, and a ground unit; power supply pads and ground pads formed on the printed circuit board having no ground surface formed corresponding to the power supply unit and the ground unit of the antenna pattern in the planar inverted F antennas; and connection patterns connecting the ground surface with each ground pad to electrically connect the ground surface to each ground unit of the antenna pattern in the planar inverted F antennas. At least one of the connection patterns is formed with a strip line of a meandering shape.
US09209516B2 Method of checking the matching of an antenna connected to a NFC component and corresponding NFC component
An NFC component includes a first interface that can be used in reader mode and is configured to be connected to an antenna via an impedance matching external circuit. A second interface can be used in card mode and in reader mode and is configured to be connected to the antenna and to the first interface via the impedance matching external circuit. An internal module includes a first detection circuit configured to deliver a first detection signal that represents the phase antenna matching quality when the impedance matching external circuit and the antenna are indeed connected between the first interface and the second interface. The internal module is further configured to deliver a check signal from at least the first detection signal.
US09209512B2 Antenna device and wireless communication device using the same
An antenna device utilized in a wireless communication device having a lid, a chassis and a hinge is disclosed. The antenna device includes a radiating module disposed in the lid or the hinge and moving in response to movement of the lid, for transmitting or receiving radio-frequency signals; and a metal barricade disposed in an area apart from the radiating module by a specified distance on the chassis.
US09209510B2 Corrugated stripline RF transmission cable
A stripline RF transmission cable has a generally planar inner conductor surrounded by a dielectric layer that is surrounded by a corrugated outer conductor. The corrugations may be, for example, annular or helical. The outer conductor has a top section and a bottom section which transition to a pair of edge sections that interconnect the top section with the bottom section. The top section, bottom section and the inner conductor may be provided with generally equal widths. A spacing between the inner conductor and the dielectric layer may be reduced proximate a mid section of the inner conductor. The inner conductor may also be corrugated generally normal to a longitudinal extend of the inner conductor.
US09209507B1 Monolithic wideband high power termination element
Various embodiments may provide a termination element for a radio frequency (RF) power amplifier module. The termination element may include a resistive body having a first end, a second end, and first and second edges running from the first end to the second end opposite one another. The termination element may further include a first ground contact coupling the first end of the resistive body to a ground potential, and a second ground contact coupling the second end of the resistive body to the ground potential. The termination element may further include a conductive contact extending into the resistive body through the first edge, wherein an end of the conductive contact that is closest to the second edge is remotely disposed from the second edge by a gap.
US09209503B2 Metal oxygen battery containing oxygen storage materials
In one embodiment, a metal oxygen battery is provided. The metal oxygen battery includes a battery housing including a first compartment and a second compartment. The first compartment includes a first electrode and an oxygen storage material in communication with the first electrode. The second compartment includes a second electrode and the second electrode includes a metal material (M). In another embodiment, the oxygen storage material is configured as a number of particles disposed within the first electrode. In certain instances, at least a portion of the number of particles are each contained within a selective transport member. In certain other instances, the selective transport member is oxygen permeable and electrolyte impermeable.
US09209499B2 Battery pack
A battery pack includes a plurality of battery modules including at least a first group of the battery modules and a second group of the battery modules, a first coolant flow pathway through the battery modules of the first group and the second group, a second coolant flow pathway along an exterior of the battery modules of the first group, and a converging coolant flow pathway connected with the first coolant flow pathway, the converging coolant flow pathway being disposed downstream of the first group of the battery modules, the converging coolant flow pathway joining the second coolant flow pathway with the first coolant flow pathway.
US09209495B2 System and method for the thermal management of battery-based energy storage systems
A system and method for the thermal management of a battery-based energy storage is described. One embodiment includes a thermal management system for a battery-based energy storage system, the thermal management system comprising a residual heat source, such as a geothermal heat source, and a battery-based energy storage system thermally connected to the residual heat source The thermal connection between the energy storage system and the residual heat source may be direct (i.e., the energy storage system may be adjacent to, partially located within, or fully located within the residual heat source) or indirect (e.g., the energy storage system and residual heat source may use a heat conduit to transfer heat). In embodiments using a heat conduit to transfer heat, the thermal management system may further comprise a control system for controlling the circulation of a fluid in the heat conduit in order to regulate the temperature of the energy storage system.
US09209493B2 Battery pack
A battery pack can stably fix a protection circuit module (PCM) to a battery cell while insulating the PCM. The battery pack includes a battery cell including an electrode assembly, and a case accommodating the electrode assembly and a terrace from which an electrode tab electrically connected to the electrode assembly protrudes, a PCM including a circuit board positioned on the terrace, and an electrode terminal formed on a top surface of the circuit board and connected to the electrode tab, a first insulation tape surrounding the PCM and allowing the PCM to be positioned on a top surface of the terrace, and a second insulation tape surrounding both side surfaces of the case, wherein the first insulation tape includes a body part surrounding the PCM and the terrace and a wing part protruding to both sides of the body part and fixing the body part to the case.
US09209491B2 Stack/folding-typed electrode assembly and method for preparation of the same
Disclosed herein is an electrode assembly constructed in a structure in which a plurality of electrochemical cells, formed of full cells having a cathode/separator/anode structure, as basic units, are overlapped, and a continuous separator sheet is disposed between the overlapped electrochemical cells, wherein a unit electrode surrounded by the separator sheet is located at a middle of the overlapped electrochemical cells, which is a winding start point, and the full cells disposed above and below the unit electrode are symmetrical to each other about the unit electrode in the direction of electrodes of the full cells. The electrode assembly is manufactured with high productivity while the electrode assembly exhibits performance and safety equal to those of a conventional stack/folding type electrode assembly.
US09209490B2 Electrolyte for rechargeable lithium battery, and rechargeable lithium battery including same
An electrolyte for a rechargeable lithium battery includes a lithium salt and a non-aqueous organic solvent. The non-aqueous organic solvent includes about 1 volume % to about 40 volume % of ethylene carbonate, about 1 volume % to about 50 volume % of ethyl propionate, about 1 volume % to about 50 volume % of diethyl carbonate, and about 1 volume % to about 40 volume % of propylene carbonate.
US09209486B2 All-solid-state cell
An all-solid-state cell contains a combination of an electrode active material and a solid electrolyte, and has a plate-shaped fired solid electrolyte body of a ceramic containing a solid electrolyte, a first electrode layer (e.g. a positive electrode) integrally formed on one surface of the fired solid electrolyte body by mixing and firing an electrode active material and a solid electrolyte, and a second electrode layer (e.g. a negative electrode) integrally formed on the other surface of the fired solid electrolyte body by mixing and firing an electrode active material and a solid electrolyte. The solid electrolyte materials added to the first electrode layer and the second electrode layer comprise an amorphous polyanion compound.
US09209482B2 Positive active material for rechargeable lithium battery, method of manufacturing the same and rechargeable lithium battery using the same
A positive active material for a rechargeable lithium battery, a method of manufacturing the same, and a rechargeable lithium battery using the same, the positive active material including a secondary particle formed of a plurality of primary particles, the primary particles being made of a metal compound capable of intercalating/deintercalating lithium; and a coating layer on a surface of the secondary particle in an island arrangement, the coating layer including a metal oxide, wherein the secondary particle includes pores formed by the primary particles, the pores including a surface pore on the surface of the secondary particle and an internal pore inside the secondary particle, and the metal oxide of the coating layer fills a portion of the surface pore of the secondary particle.
US09209480B2 Secondary battery containing a nonaqueous electrolyte with a sulfonic anhydride and an aromatic compound
A battery includes: a positive electrode; a negative electrode; a nonaqueous electrolyte; and a separator, wherein the nonaqueous electrolyte contains at least one sulfonic anhydride selected from the group consisting of compounds represented by the following chemical formulae (1) to (4) and an aromatic compound represented by the following chemical formula (5).
US09209479B2 Nonaqueous electrolyte solution and lithium secondary battery using same
Disclosed is a nonaqueous electrolyte solution containing a sultone compound represented by the Formula 1 below (wherein R1 to R4 respectively represent a hydrogen, a fluorine, a hydrocarbon group with 1 to 12 carbon atoms that may contain fluorine atom(s), n represents an integer of 0 to 3, and when n is 2 or 3, the two or three R3 groups are independent from each other and the two or three R4 groups are independent from each other), and an ethylene carbonate having a hydrogen atom substituted by a fluorine atom. Also disclosed is a lithium secondary battery employing the nonaqueous electrolyte solution. This nonaqueous electrolyte solution does not cause an increase in the internal resistance of a nonaqueous electrochemical device and improves the lifespan characteristics of the device. The lithium secondary battery containing the nonaqueous electrolyte solution exhibits greatly improved cycle charge/discharge characteristics at high temperature, and has excellent charge/discharge load characteristics.
US09209474B2 Fuel cell device
Fuel cell devices are provided having improved shrinkage properties between the active and non-active structures by modifying the material composition of the non-active structure, having a non-conductive, insulating barrier layer between the active structure and surface conductors that extend over the inactive surrounding support structure, having the width of one or both electrodes progressively change along the length, or having a porous ceramic layer between the anode and fuel passage and between the cathode and air passage. Another fuel cell device is provided having an internal multilayer active structure with electrodes alternating in polarity from top to bottom and external conductors on the top and/or bottom surface with sympathetic polarity to the respective top and bottom electrodes. A fuel cell system is provided with a fuel cell device having an enlarged attachment surface at one or both ends, which resides outside the system's heat source, insulated therefrom.
US09209471B2 Fuel cell assembly and method of manufacturing same, and bonding part manufacturing method and device
The present invention relates to a fuel cell assembly and method of manufacturing same, and a bonding part manufacturing method and device. For instance, in a resin frame, a depression part is subsidence formed from a lower-end face toward an upper-end face, and a housing hole is pass-through formed from a top surface of the depression part toward the upper-end face. For instance, the depression part, a cathode-side electrode and an electrolyte film are housed, and in such a circumstance, an anode-side electrode is housed in the housing hole. A portion of the resin frame permeates a gas diffusion layer which configures the anode-side electrode and is a porous body. Via the permeated site, the resin frame and the gas diffusion layer (anode-side electrode) are integrally bonded.
US09209467B2 Humidifier for fuel cell
Disclosed is a humidifier for a fuel cell having an enhanced humidifying performance and being able to prevent an instantaneous decrease of the output of a car which might occur at the time of high-speed driving. The humidifier comprises a membrane housing with first and second ends; a bundle of hollow fiber membranes provided in an inner space of the membrane housing; a humidity retainer provided in the inner space of the membrane housing; a first cover mounted on the first end of the membrane housing, the first cover including an inlet for introducing unreacted gas of high-humidity discharged from a stack; and a second cover mounted on the second end of the membrane housing, the second cover including an outlet for discharging the unreacted gas used for humidification.
US09209466B2 Fuel cell system
A fuel cell system equipped with a fuel cell, a pressure control unit, and an exhaust. The pressure control unit is provided on the fuel gas flow path in which the fuel gas to be supplied to the fuel cell flows, and it is able to control the pressure of the fuel gas to be supplied to the fuel cell. The exhaust valve is provided on the fuel exhaust gas flow path in which the fuel exhaust gas exhausted from the fuel cell flows, and when the valve is opened, at least a portion of the fuel exhaust gas can be exhausted to outside the fuel exhaust gas flow path. The pressure control unit is controlled, so that before opening the exhaust valve, the pressure of the fuel gas to be supplied to the fuel cell is decreased beyond what it was up to that point. Then, when the pressure of the fuel gas to be supplied to the fuel cell is the decreased first pressure, the exhaust valve is opened.
US09209464B2 Current collectors having textured coating
A current collector and an electric double layer capacitor including a current collector. The current collector has a conductive layer with an electrode-facing surface and an opposing second surface, each surface having an area, and a textured coating formed over and in contact with at least a majority of the electrode-facing surface.
US09209463B2 Secondary battery and method of fabricating of the secondary battery
Disclosed is a secondary battery which includes an electrode assembly comprising inner stacked electrodes and at least one outermost electrode positioned on at least one end of the inner stacked electrodes; and a case configured to house the electrode assembly. Herein, the at least one outermost electrode comprise an inactive material.
US09209461B2 Process for the preparation of LiFePO4-carbon composites
The present invention relates to a process for the preparation of particles comprising at least one compound according to general formula (I) M1aM2bM3cOoNnFf (I) wherein M1, M2, M3 O, N, F, a, b, c, o, n and f have the following meanings: M1 at least one alkaline metal, M2 at least one transition metal in oxidation state +2, M3 at least one non-metal chosen form S, Se, P, As, Si, Ge and/or B, O oxygen, N nitrogen, F fluorine, a 0.8-4.2, b 0.8-1.9, c 0.8-2.2, o 1.0-8.4, n 0-2.0 and f 0-2.0, wherein a, b, c, o, n and f are chosen to ensure electroneutrality of the compound according to general formula (I), and carbon, comprising at least the following steps: (A) providing an essentially aqueous mixture comprising at least one compound comprising M1, at least one compound comprising M2 having at least partially an oxidation state higher than +2, optionally at least one compound comprising M3, at least one compound comprising N, if present, and/or at least one compound comprising F, if present, at least one polysaccharide comprising glucose having a molecular weight M of at least 50000 g/mol as carbon precursor and at least one reducing agent, (B) drying the mixture provided in step (A), in order to obtain a solid particle and (C) calcining the solid particle obtained from step (B) at a temperature of 300 to 950° C.
US09209458B2 Rechargeable electrochemical battery cell
Rechargeable lithium battery cell having a housing, a positive electrode, a negative electrode and an electrolyte containing a conductive salt, wherein the electrolyte comprises SO2 and the positive electrode contains an active material in the composition LixM′yM″z(XO4)aFb, wherein M′ is at least one metal selected from the group consisting of the elements Ti, V, Cr, Mn, Fe, Co, Ni, Cu and Zn, M″ is at least one metal selected from the group consisting of the metals of the groups II A, III A, IV A, V A, VI A, IB, IIB, IIIB, IVB, VB, VIB and VIIIB, X is selected from the group consisting of the elements P, Si and S, x is greater than 0, y is greater than 0, z is greater than or equal to 0, a is greater than 0 and b is greater than or equal to 0.
US09209455B2 Polycrystalline metal oxide, methods of manufacture thereof, and articles comprising the same
A particle, including: a plurality of crystallites including a first composition having a layered α-NaFeO2-type structure and including lithium in an amount of about 0.1 to about 1.3 moles, per mole of the first composition, nickel in an amount of about 0.1 to about 0.79 mole, per mole of the first composition, cobalt in an amount of 0 to about 0.5 mole, per mole of the first composition, and oxygen in an amount of about 1.7 to about 2.3 moles, per mole of the first composition; and a grain boundary between adjacent crystallites of the plurality of crystallites and including a second composition having the layered α-NaFeO2-type structure, a cubic structure, or a combination thereof, wherein a concentration of cobalt in the grain boundary is greater than a concentration of cobalt in the crystallites.
US09209453B2 Negative electrode active material for electric device
A negative electrode active material for an electric device includes an alloy containing silicon in a range from 25% to 54% exclusive, carbon in a range from 1% to 47% exclusive, zinc in a range from 13% to 69% exclusive in terms of mass ratio, and inevitable impurities as a residue. For example, the negative electrode active material can be obtained with a multi DC magnetron sputtering apparatus by use of silicon, carbon and zinc as targets. An electric device using this negative electrode active material can improve the initial charge-discharge efficiency while keeping the cycle property.
US09209452B2 Non-aqueous electrolyte secondary battery
A positive electrode material for non-aqueous electrolyte secondary batteries having high rate characteristics and high energy density, and a battery using the same are provided. The non-aqueous electrolyte secondary battery includes a positive electrode containing a positive electrode material, a conductive agent and a binder; a negative electrode; a separator; and a non-aqueous electrolyte, in which the positive electrode material contains core particles and a coating material that covers from 10% to 90% of the surfaces of the core particles, the core particles are formed of a compound represented by LiaMbPO4 (wherein M represents at least one element selected from Fe, Mn, Co and Ni, and satisfies the relations: 0
US09209451B2 Lithium rechargeable battery comprising a lithium titanate sintered body
A lithium rechargeable battery having a nonaqueous electrolyte held between a positive electrode and a negative electrode is provided. The lithium rechargeable battery has a high energy density and a high battery capacity by enhancing a filling factor of an active material of the positive electrode or the negative electrode. In the lithium rechargeable battery includes the positive electrode, the negative electrode, and the nonaqueous electrolyte held between the positive electrode and the negative electrode, the positive electrode or the negative electrode is comprised of a lithium titanate sintered body. The lithium titanate sintered body has a mean fine pore diameter of 0.10 to 0.20 μm, a specific surface area of 1.0 to 3.0 m2/g, and a relative density of 80 to 90%.
US09209440B2 High voltage access prevention
Methods and apparatus for assembling a high voltage battery without exposing an operator to contacts having a voltage greater than a predetermined maximum are presented. A bus bar module has standard compartments equipped with integrated bus bars separated by break compartments without bus bars. The bus bar module can be coupled to a plurality of electrochemical cells to connect the cells in groups having a voltage less than a predetermined maximum Vmax. Compartment lids can be closed to prevent contact with connected posts. A separate non-integrated bus bar can be provided to a break compartment to connect a first group of cells with a second group of cells to form a series of connected cells that can provide a voltage greater than Vmax, to achieve a desired battery voltage. The bus bar module and methods of the invention can protect an operator during battery assembly or service.
US09209438B2 Hermetically-sealed feed-through device
A hermetically-sealed electrical feed-through device includes a conductor, an insulating sleeve, and an outer ferule interconnected in a manner preventing relative rotation therebetween and/or includes a thermocouple in direct contact with the conductor for monitoring temperature. The conductor can have a body section extending along an axis and having an outer contour including flats or an outwardly-extending eccentrically-shaped lobe. The sleeve confronts and covers the body section of the conductor and accommodates and engages the outer contour at the flats or lobe to prevent rotation of the conductor relative to the sleeve, and the outer ferrule sandwiches the insulating sleeve between the outer ferrule and the outer contour of the conductor. The outer ferrule accommodates and engages the sleeve adjacent the outer contour of the conductor at the flats or lobe to prevent rotation of the insulator sleeve relative to the outer ferrule.
US09209434B2 Mechanical hermetic seal
In one embodiment, a cap for an energy storage cell is provided, the cap including: a body including a dome formed therein, the dome including a through-way; and, an electrode assembly including a hemispherically shaped electrical insulator surrounding an electrode; wherein the insulator is disposed in and hermetically seals the dome and the electrode is electrically separated from the body by the throughway. A method of manufacture and an energy storage cell are also disclosed.
US09209428B2 Secondary battery having improved safety by deformation of electrode assembly-receiving portion in case
Disclosed herein is a secondary battery constructed in a structure in which pluralities of electrode tabs, protruding from an electrode assembly, are connected to corresponding electrode leads, and the electrode assembly is mounted in a receiving part, wherein a battery case is multi-formed, such that the battery case presses the upper end of the electrode assembly by a predetermined width, thereby preventing the upward movement of the electrode assembly, mounted in the receiving part, at the upper end space region of the receiving part, where the electrode assembly is spaced apart from the upper end of the receiving part, for the connection between the electrode tabs and the corresponding electrode leads, during the repetitive charge and discharge of the battery. Consequently, it is possible to prevent the occurrence of a short circuit of the battery due to external impacts, such as the dropping of the battery, and to prevent the occurrence of an internal short circuit of the battery due to the expansion of the battery case caused by the repetitive charge and discharge of the battery, whereby the safety of the secondary battery is improved.
US09209425B2 Organic electroluminescence element, display apparatus, image processing apparatus, lighting apparatus, and image forming apparatus
Provided is an organic electroluminescence element, including: a light reflective electrode; a light transmissive electrode; an emission layer formed between the light reflective electrode and the light transmissive electrode; a low-refractive index layer having a refractive index at a maximum peak wavelength of an emission spectrum of light emitted from the emission layer lower than that of the emission layer, the low-refractive index layer being formed between the light reflective electrode and the emission layer; and a light extraction member for changing an exiting direction of the light emitted from the emission layer, the light extraction member being formed on the light transmissive electrode, in which an optical path L between a maximum emission surface of the emission layer and the light reflective electrode satisfies a specific expression.
US09209424B2 Laminated substrate for organic LED element, and organic LED element
A laminated substrate for an organic LED element includes a translucent substrate, a scattering layer including glass and a solid scattering material provided on the translucent substrate and having a thickness of 30 μm or less, and an electrode provided on the scattering layer, and no covering layer including glass is provided between the scattering layer and the electrode.
US09209423B2 Organic light emitting display apparatus
An organic light emitting display apparatus includes a substrate, a light conversion layer on the substrate, the light conversion layer including an oxide semiconductor, a passivation layer covering the light conversion layer, a first electrode on the passivation layer, an intermediate layer on the first electrode, the intermediate layer including an organic emission layer, and a second electrode on the intermediate layer.
US09209418B2 Light emitting device and method of manufacturing the same
A light emitting device is provided which has a structure for lowering energy barriers at interfaces between layers of a laminate organic compound layer. A mixed layer (105) composed of a material that constitutes an organic compound layer (1) (102) and a material that constitutes an organic compound layer (2) (103) is formed at the interface between the organic compound layer (1) (102) and the organic compound layer (2) (103). The energy barrier formed between the organic compound layer (1) (102) and the organic compound layer (2) (103) thus can be lowered.
US09209414B2 Display device
A display device is discussed which can include: a flexible substrate defined into a first area, a second area bent from an edge of the first area, and a third area outwardly expanded from the second area; a thin film transistor layer disposed on the substrate; an organic emission layer disposed on the thin film transistor layer; an encapsulation layer disposed on the organic emission layer; a polarization layer disposed on the encapsulation layer; and a cover window disposed on the polarization layer. The polarization layer is formed on the encapsulation layer opposite to the first and third areas of the substrate.
US09209409B2 Naphthobisthiadiazole derivative
A naphthobisthiadiazole derivative is represented by Formula 1. In Formula 1, Z is selected from a hydrogen atom, a boronic acid group, a boronic acid ester group, a trifluoroborate salt group and a triolborate salt group, and at least one Z is a boronic acid group, a boronic acid ester group, a trifluoroborate salt group or a triolborate salt group. The naphthobisthiadiazole derivative is an organoboron compound, and can be converted to various compounds by a Suzuki-Miyaura coupling reaction; thus, is applicable as a precursor of complex compounds. Using the naphthobisthiadiazole derivative, research, development, and practical applications of low molecular weight compounds and high-molecular compounds useful for various organic semiconductor materials and the like can be ensured.
US09209408B2 Organic compound, benzoxazole derivative, and light-emitting element, light-emitting device, and electronic device using the benzoxazole derivative
Novel benzoxazole derivatives are provided to reduce driving voltage of light-emitting elements, and to reduce power consumption of light-emitting elements, light-emitting devices, and electronic devices. A benzoxazole derivative represented by the general formula (G1) is provided. Since the benzoxazole derivative represented by the general formula (G1) has an electron-injecting property, the benzoxazole derivative can be suitably used for light-emitting elements, light-emitting devices, and electronic devices.
US09209402B2 Method of manufacturing EL display device
A method of manufacturing an EL display device having a light emitting part, in which a plurality of pixels are arrayed, and a thin-film transistor array device to control light emission of the light emitting part, includes a luminance measurement step of obtaining luminance data of pixel, with the light emitting part being lit. The luminance measurement step includes a first luminance measurement step and a second luminance measurement step. In the first luminance measurement step, a first imaging apparatus obtains luminance data by measuring light emission of the each pixel. The first apparatus has a resolution corresponding to that of the pixels of the light emitting part. In the second luminance measurement step after the first step, a second imaging apparatus measures light emission of a plurality of the pixels to correct the luminance data of the each pixel obtained in the first luminance measurement step. The second imaging apparatus is lower in resolution than the first imaging apparatus.
US09209396B2 Regulating interface layer growth with N2O for two-terminal memory
Provision of fabrication, construction, and/or assembly of a two-terminal memory device is described herein. The two-terminal memory device can include an active region with a silicon bearing layer, an interface layer, and an active metal layer. The interface layer can be grown on the silicon bearing layer, and the growth of the interface layer can be regulated with N2O plasma.
US09209394B2 Resistance change element and method for manufacturing same
According to one embodiment, a resistance change element includes: a first electrode; a second electrode; and a resistance change film provided between the first electrode and the second electrode, and the resistance change film including: a first transition metal oxide-containing layer; a second transition metal oxide-containing layer; and an intermediate layer provided between the first transition metal oxide-containing layer and the second transition metal oxide-containing layer, the intermediate layer having a higher crystallization temperature than the first transition metal oxide-containing layer and the second transition metal oxide-containing layer, and the intermediate layer including an amorphous material.
US09209392B1 RRAM cell with bottom electrode
The present disclosure relates to a resistive random access memory (RRAM) cell having a bottom electrode that provides for efficient switching of the RRAM cell, and an associated method of formation. In some embodiments, the RRAM cell has a bottom electrode surrounded by a spacer and a bottom dielectric layer. The bottom electrode, the spacer, and the bottom dielectric layer are disposed over a lower metal interconnect layer surrounded by a lower inter-level dielectric (ILD) layer. A dielectric data storage layer having a variable resistance is located above the bottom dielectric layer and the bottom electrode, and a top electrode is disposed over the dielectric data storage layer. Placement of the spacer narrows the later formed bottom electrode, thereby improving switch efficiency of the RRAM cell.
US09209391B2 Electronic memory device having an electrode made of a soluble material
An electronic device includes a first electrode made of an inert material; a second electrode made of a soluble material; a solid electrolyte made of an ion-conductive material, wherein the first and second electrodes are in contact respectively with one of the faces of the electrolyte, either side of the electrolyte, wherein the second electrode supplies mobile ions flowing in the electrolyte towards the first electrode, to form a conductive filament when a voltage is applied between the first and second electrodes. The second electrode is a confinement electrode that includes an end surface in contact with the electrolyte which is less than the available surface of the electrolyte, such that confinement of the contact area of the confinement electrode on the solid electrolyte is obtained.
US09209384B2 Piezoelectric element, liquid ejecting head, and liquid ejecting apparatus
A piezoelectric element comprises a piezoelectric layer made of a perovskite compound containing sodium, potassium, lithium, niobium and tantalum and bismuth manganate and electrodes for applying a voltage to the piezoelectric layer.
US09209383B2 Vibrator, vibrating device, and electronic apparatus
A vibrator includes: a vibrating reed having a vibrating body, first and second support portions supporting the vibrating body, and four beams coupling the first and second support portions with the vibrating body; electrodes disposed at the vibrating body; and terminals disposed at the first and second support portions and electrically connected with the electrodes via wires disposed at the beams. Between the terminals next to each other, a plurality of grooves spaced apart in a predetermined direction and extending in a direction intersecting the predetermined direction are disposed.
US09209375B2 Methods and devices for controlling thermal conductivity and thermoelectric power of semiconductor nanowires
Methods and devices for controlling thermal conductivity and thermoelectric power of semiconductor nanowires are described. The thermal conductivity and the thermoelectric power are controlled substantially independently of the electrical conductivity of the nanowires by controlling dimensions and doping, respectively, of the nanowires. A thermoelectric device comprising p-doped and n-doped semiconductor nanowire thermocouples is also shown, together with a method to fabricate alternately p-doped and n-doped arrays of silicon nanowires.
US09209367B2 Electrical component and method of producing electrical components
An electrical component includes a closed lead frame with a passage opening at least one electrical component arranged within the passage opening, the electrical component including a first contact pad on one side of the electrical component and a second contact pad on a second side of the electric component, wherein the second side faces the first side and the second contact pad is electrically coupled to the lead frame; and an encapsulation which mechanically couples the electrical component to the lead frame, wherein the lead frame includes a recess on one side, the recess extending from an edge of the lead frame to the passage opening and connecting at least one electrical connecting element from the edge of the lead frame to the component arranged in the passage opening.
US09209363B2 Light emitting device with improved current spreading performance and lighting apparatus including the same
Disclosed herein is a light emitting device exhibiting improved current spreading. The disclosed light emitting device includes a light emitting structure including a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, and an active layer disposed between the first conductivity type and second conductivity type semiconductor layers, a first electrode disposed on the first conductivity type semiconductor layer, and a second electrode disposed on the second conductivity type semiconductor layer. The light emitting structure includes a mesa etching region where the second conductivity type semiconductor layer, active layer, and first conductivity type semiconductor layer are partially etched, thereby exposing a portion of the first conductivity type semiconductor layer. The first electrode is disposed on the exposed portion of the first conductivity type semiconductor layer. A first electrode layer is disposed between the second conductivity type semiconductor layer and the second electrode. A second electrode layer is disposed between portions of the first electrode layer spaced from each other at opposite sides of the mesa etching region.
US09209362B2 Semiconductor light emitting device and method of fabricating semiconductor light emitting device
A semiconductor light emitting device has a light emitting element, a first electrode layer, a second electrode layer, a seed electrode layer and a plated layer. The light emitting element has a nitride-based III-V compound semiconductor on a substrate. The light emitting element having a light extraction surface. The first electrode layer on the light extraction surface. The second electrode layer is provided on a surface opposite to the light extraction surface of the light emitting element. The seed electrode layer is configured to cover the entire surface of the second electrode layer. The plated layer is provided on the seed electrode layer. The light emitting element has a light emitting layer, a first conductive type semiconductor layer, and a second conductive type semiconductor layer. The light emitting element has a forward tapered shape of a width which gradually narrows in order of the second conductive type semiconductor layer, the light emitting layer and the first conductive type semiconductor layer.
US09209354B2 Light emitting devices for light emitting diodes (LEDs)
Light emitting devices for light emitting diodes (LEDs) are disclosed. In one embodiment a light emitting device can include a substrate and a plurality of light emitting diodes (LEDs) disposed over the substrate in patterned arrays. The arrays can include one or more patterns of LEDs. A light emitting device can further include a retention material disposed about the array of LEDs. In one aspect, the retention material can be dispensed.
US09209353B2 Low cost mounting of LEDs in TL-retrofit tubes
This invention relates to a lighting device comprising a light transmissive light outlet unit (102), and light emitting diodes (104) generating light which is emitted through the light outlet unit. The lighting device further comprises a conductive layer structure (114), which is arranged as a coating on a portion of an inner surface of the light outlet unit. The light emitting diodes are mounted on and electrically connected with the conductive layer structure.
US09209352B2 Surface-passivated silicon quantum dot phosphors
Phosphors formed using silicon nanoparticles are provided. The phosphors exhibit bright fluorescence and high quantum yield, making them ideal for lighting applications. Methods for making the silicon phosphors are also provided, along with lighting devices that incorporate the silicon phosphors.
US09209350B2 Method for fabricating triangular prismatic m-plane nitride semiconductor light-emitting diode
When a belt-like nitride semiconductor stacking structure 110 having a principal plane of an m-plane is broken along a linear groove 104, two or more side surfaces may be formed on the lateral side thereof. This decreases the fabrication efficiency of the triangular prismatic m-plane nitride semiconductor light-emitting diode. To solve this problem, Angle X of not less than 75 degrees and not more than 105 degrees is formed between the linear groove 104 and one cleavage axis selected from the group consisting of an a-axis and a c-axis. Then, the belt-like nitride semiconductor stacking structure 110 was broken along the linear groove 104 to form a quadratic prismatic nitride semiconductor stacking structure 120. Subsequently, the quadratic prismatic nitride semiconductor stacking structure 120 is broken along another linear groove 106 to obtain a triangular prismatic m-plane nitride semiconductor light-emitting diode 130.
US09209348B2 Micro device with stabilization post
A method and structure for stabilizing an array of micro devices is disclosed. A stabilization layer includes an array of stabilization cavities and array of stabilization posts. Each stabilization cavity includes sidewalls surrounding a stabilization post. The array of micro devices is on the array of stabilization posts. Each micro device in the array of micro devices includes a bottom surface that is wider than a corresponding stabilization post directly underneath the bottom surface.
US09209344B2 Method for forming doping region and method for forming MOS
The present invention provides a method of forming a doping region. A substrate is provided, and a poly-silicon layer is formed on the substrate. A silicon oxide layer is formed on the poly-silicon layer. An implant process is performed to form a doping region in the poly-silicon layer. The present invention further provides a method for forming a MOS.
US09209338B2 Optical device with through-hole cavity
A light-emitting device having a through-hole cavity is disclosed. The optical device may contain a plurality of conductors, a light source die, a body and a transparent encapsulant material. The body may have a top surface and a bottom surface. A cavity is formed within the body extending from the bottom surface to the top surface and defining therein a bottom opening and a top opening, respectively. Optionally, the light-emitting device may comprise a lens. During manufacturing process, liquid or semi-liquid form transparent material is injected from the bottom surface into the cavity, encapsulating the light source die and forming a lens. The shape of the lens is defined by a mold aligned to the top opening of the body. In yet another embodiment, optical devices having a cavity or multiple cavities are disclosed. The optical devices may include a proximity sensor, an opto-coupler, an encoder and other similar sensors.
US09209335B2 Solar cell system
A solar cell system includes two solar cells. The two solar cells are located in contact with each other and connected in parallel. Each of the two solar cells includes a first electrode layer, a P-type silicon layer, an N-type silicon layer, and a second electrode layer. The first electrode layer, the P-type silicon layer, the N-type silicon layer, and the second electrode layer are arranged in series side by side along a first direction and in contact with each other, thereby cooperatively forming a integrated structure. A P-N junction is formed near an interface between the P-type silicon layer and the N-type silicon layer. The integrated structure has a first surface substantially parallel to the first direction and a second surface opposite to the first surface. The first surface is used as a photoreceptive surface to directly receive incident light.
US09209333B2 Aromatic polyimide film, laminate and solar cell
Disclosed is a polyimide film prepared from an aromatic tetracarboxylic acid component and an aromatic diamine component, which has a dimensional change from 25° C. to 500° C. within a range of from −0.3% to +0.6% based on the initial dimension at 25° C. The polyimide film may be used as a substrate for a CIS solar cell.
US09209332B2 Solar cell element and solar cell module
A solar cell element comprising a semiconductor substrate including a first surface to receive light, and a second surface provided on a back side of the first surface, a plurality of base collector electrodes provided on the second surface of the semiconductor substrate, a plurality of collector electrodes provided on the plurality of base collector electrodes, a connector electrode to electrically connect the collector electrodes adjacent to each other across a region between the plurality of base collector electrodes among the plurality of collector electrodes. A first extracting electrode provided between the plurality of base collector electrodes, and a second extracting electrode electrically connected to at least one of the plurality of collector electrodes.
US09209329B2 Silicon photoelectric multiplier with optical cross-talk suppression due to properties of a substrate
A cell for a silicon based photoelectric multiplier may comprise a substrate of a second conductivity type, a first layer of a first conductivity type, and/or a second layer of the second conductivity type formed on the first layer. The first layer and the second layer may form a first p-n junction, and the substrate may be configured such that in operation of the photoelectric multiplier from a quantity of light propagating towards a back side or side walls of the photoelectric multiplier, a negligible portion returns to a front side of the photoelectric multiplier.
US09209319B2 Sensor device manufacturing method and sensor device
A method for manufacturing a sensor device is provided. The method prevents corrosion of metal electrodes of a sensor due to outside air with high humidity and preventing the occurrence of warpage of the sensor due to resin sealing of the sensor, thereby reducing the influence on sensor characteristics, and provides the sensor device. The method includes arranging a sensor on a substrate, the sensor having a fixed part, a movable part positioned inside the fixed part, a flexible part connecting the fixed part and the movable part, and a plurality of metal electrodes, electrically connecting the plurality of metal electrodes of the sensor and a plurality of terminals of the substrate with bonding wires, and covering portions of the plurality of metal electrodes of the sensor connected to the bonding wires with a resin so that a part of the bonding wires between the plurality of metal electrodes and the plurality of terminals is exposed.
US09209317B1 Nonvolatile memory devices and methods of operating the same
Nonvolatile memory devices including three transistor unit cells are provided. The nonvolatile memory device includes a selection transistor having a first terminal and a second terminal, a first charge trap transistor electrically connected in series to the first terminal of the selection transistor, a second charge trap transistor electrically connected in series to the second terminal of the selection transistor, and a word line electrically connected to gate electrodes of the selection transistor, the first charge trap transistor and the second charge trap transistor. Related methods are also provided.
US09209315B2 Nonvolatile semiconductor memory device and production method for the same
According to one embodiment, a nonvolatile semiconductor memory device includes a semiconductor substrate; an element isolation insulating film buried in the semiconductor substrate so as to isolate adjacent element; a memory cell having a first insulating film and a charge accumulation film; a second insulating film formed on the charge accumulation films of the memory cells and the element isolation insulating film; and a control electrode film formed on the second insulating film. An upper surface of the element isolation insulating film is lower than an upper surface of the charge accumulation film, the second insulating film is provided with a cell upper portion on the charge accumulation film and an inter-cell portion on the element isolation insulating film, and a dielectric constant of the cell upper portion is lower than a dielectric constant of the inter-cell portion.
US09209314B2 Field effect transistor
An insulating film is provided over one surface of a first semiconductor layer including a first oxide semiconductor including indium as a main component, and a second semiconductor layer including an i-type second oxide semiconductor is provided in contact with the other surface. The energy difference between a vacuum level and a Fermi level in the second oxide semiconductor is larger than that in the first oxide semiconductor. In the first semiconductor layer, a region in the vicinity of the junction surface with the second oxide semiconductor which satisfies the above condition is a region having an extremely low carrier concentration (a quasi-i-type region). By using the region as a channel, the off-state current can be reduced. Further, a drain current of the FET flows through the first oxide semiconductor having a high mobility; accordingly, a large amount of current can be extracted.
US09209313B2 Thin film transistor array panel having double-layered oxide semiconductor structure and method for manufacturing the same
A thin film transistor array panel includes: a gate line including a gate electrode; a first gate insulating layer on the gate line; a semiconductor layer on the first gate insulating layer and overlapping the gate electrode; a second gate insulating layer on the semiconductor layer and the first gate insulating layer, and an opening in the second gate insulating layer and through which the semiconductor layer is exposed; drain and source electrodes on the second gate insulating and semiconductor layers and facing each other; a first field generating electrode; and a second field generating electrode connected to the drain electrode. The semiconductor layer includes an oxide semiconductor layer, and first and second auxiliary layers on the oxide semiconductor layer and separated from each other. An edge of the drain and source electrodes is disposed inside an edge of the first and second auxiliary layers, respectively.
US09209309B2 Method for fabricating thin-film semiconductor device and thin-film semiconductor device
A thin-film semiconductor device) having two thin-film transistors, wherein one of the thin-film transistors includes: a first gate electrode; a first gate insulating film; a first semiconductor film; an intrinsic semiconductor layer; a first contact layer of n-type in contact with and above a portion of the intrinsic semiconductor layer; a first source electrode; and a first drain electrode, and the other of the thin-film transistors includes: a second gate electrode; a second gate insulating film; a second semiconductor film; an intrinsic semiconductor layer; a second contact layer of p-type in contact with portions of sides of the semiconductor film and the intrinsic semiconductor layer; a second source electrode; and a second drain electrode.
US09209306B2 Thin film transistor and display device using the same
A thin film transistor includes, an insulating substrate, a gate electrode provided on an upper surface of the insulating substrate, a gate insulating film formed so as to cover the gate electrode, an oxide semiconductor layer provided on the gate insulating film, a channel protective layer provided at least on an upper surface of the oxide semiconductor layer, and a source electrode and a drain electrode provided so as to come into contact with the oxide semiconductor layer, wherein the channel protective layer is formed such that the film density of a portion provided so as to come into contact with the oxide semiconductor layer is higher than the film density of a portion distant from the oxide semiconductor layer.
US09209301B1 Method for fabricating semiconductor layers including transistor channels having different strain states, and related semiconductor layers
Methods of fabricating a semiconductor structure include providing a semiconductor-on-insulator (SOI) substrate including a base substrate, a strained stressor layer above the base substrate, a surface semiconductor layer, and a dielectric layer between the stressor layer and the surface semiconductor layer. Ions are implanted into or through a first region of the stressor layer, and additional semiconductor material is formed on the surface semiconductor layer above the first region of the stressor layer. The strain state in the first region of the surface semiconductor layer above the first region of the stressor layer is altered, and a trench structure is formed at least partially into the base substrate. The strain state is altered in a second region of the surface semiconductor layer above the second region of the stressor layer. Semiconductor structures are fabricated using such methods.
US09209288B2 Reduced scale resonant tunneling field effect transistor
An embodiment includes a heterojunction tunneling field effect transistor including a source, a channel, and a drain; wherein (a) the channel includes a major axis, corresponding to channel length, and a minor axis that corresponds to channel width and is orthogonal to the major axis; (b) the channel length is less than 10 nm long; (c) the source is doped with a first polarity and has a first conduction band; (d) the drain is doped with a second polarity, which is opposite the first polarity, and the drain has a second conduction band with higher energy than the first conduction band. Other embodiments are described herein.
US09209287B2 Power semiconductor device
A power semiconductor device may include: a first conductivity-type first semiconductor region; a second conductivity-type second semiconductor region disposed above the first semiconductor region; a trench gate penetrating through the second semiconductor region and a portion of the first semiconductor region; a third semiconductor region disposed on both sides of the trench gate and disposed on an inner side of an upper portion of the second semiconductor region; and a device protective region disposed in the third semiconductor region.
US09209281B2 Method of manufacturing a device by locally heating one or more metallization layers and by means of selective etching
A method of manufacturing a device comprises depositing one or more metallization layers to a substrate, locally heating an area of the one or more metallization layers to obtain a substrate/metallization-layer compound or a metallization-layer compound, the compound comprising an etch-selectivity toward an etching medium which is different to that of the one or more metallization layers outside the area, and removing the one or more metallization layers in the area or outside the area, depending on the etching selectivity in the area or outside the area, by etching with the etching medium to form the device.
US09209280B2 Methods for doping fin field-effect transistors
A method of doping a FinFET includes forming a semiconductor fin on a substrate, the substrate having a first device region and a second device region. The semiconductor fin is formed on a surface of the substrate in the second device region and has a top surface and sidewalls. The first device region is covered with a hard mask and the semiconductor fin and the hard mask are exposed to a deposition process to form a dopant-rich layer having an n-type or p-type dopant on the top surface and the sidewalls of the semiconductor fin. The dopant from the dopant-rich layer is diffused into the semiconductor fin by performing an annealing process in which the first device region is free of diffusion of the diffused dopant or another dopant from the hard mask.
US09209277B2 Manufacturing methods for laterally diffused metal oxide semiconductor devices
Fabrication processes for semiconductor devices are presented here. The device includes a support substrate, a buried oxide layer overlying the support substrate, a first semiconductor region located above the buried oxide layer and having a first conductivity type. The device also includes second, third, fourth, and fifth semiconductor regions. The second semiconductor region is located above the first semiconductor region, and it has a second conductivity type. The third semiconductor region is located above the second semiconductor region, and it has the first conductivity type. The fourth semiconductor region is located above the third semiconductor region, and it has the second conductivity type. The fifth semiconductor region extends through the fourth semiconductor region and the third semiconductor region to the second semiconductor region, and it has the second conductivity type.
US09209276B2 Trench gate type semiconductor device and method of producing the same
A method of producing a trench gate type MOSFET is provided in which each intersection trench is formed as a two-stage trench structure. A gate trench is backfilled with a mask material and the mask material is then patterned to form a mask used for forming each intersection trench. The intersection trench intersecting the gate trench is provided so as to be deeper than the gate trench. A Schottky electrode is provided in the bottom of each intersection trench 10p. In this manner, there is provided a trench gate type semiconductor device and a method of producing the same, in which: the cell pitch can be reduced even when a wide band gap semiconductor is used as a main semiconductor substrate; good ohmic contacts can be obtained; and an excessive electric field is prevented from being applied to an insulating film in the bottom of each trench.
US09209273B1 Method of fabricating metal gate structure
A method for fabricating a metal gate structure includes providing a substrate on which a dielectric layer, a first trench disposed in the dielectric layer, a first metal layer filling up the first trench, a second trench disposed in the dielectric layer, a second metal layer filling up the second trench are disposed, and the width of the first trench is less than the width of the second trench; forming a mask layer to completely cover the second trench; performing a first etching process to remove portions of the first metal layer when the second trench is covered by the mask layer; and performing a second etching process to concurrently remove portions of the first metal layer and portions of the second metal layer after the first etching process.
US09209265B2 ESD devices comprising semiconductor fins
A device includes a semiconductor substrate, and an insulation region extending from a top surface of the semiconductor substrate into the semiconductor substrate. The device further includes a first node and a second node, and an Electro-Static Discharge (ESD) device coupled between the first node and the second node. The ESD device includes a semiconductor fin adjacent to and over a top surface of the insulation region. The ESD device is configured to, in response to an ESD transient on the first node, conduct a current from the first node to the second node.
US09209260B2 Fabrication of shielded gate trench MOSFET with increased source-metal contact
Fabricating a semiconductor device includes: forming a gate trench on a semiconductor substrate; forming a spacer inside the gate trench; forming one or more gate electrodes within the gate trench; implanting a body region; implanting a source region; forming a contact trench; disposing dielectric material within the gate trench; removing at least a portion of the dielectric material such that at least a portion of the source region extends above the dielectric material; and depositing a metal layer over at least a portion of a gate trench opening, at least a portion of the source region, and at least a portion of the contact trench.
US09209259B2 Customized shield plate for a field effect transistor
A customized shield plate field effect transistor (FET) includes a semiconductor layer, a gate dielectric, a gate electrode, and at least one customized shield plate. The shield plate includes a conductive layer overlying a portion of the gate electrode, one of the gate electrode sidewalls, and a portion of the substrate adjacent to the sidewall. The shield plate defines a customized shield plate edge at its lateral boundary. A distance between the customized shield plate edge and the sidewall of the gate electrode varies along a length of the sidewall. The customized shield plate edge may form triangular, curved, and other shaped shield plate elements. The configuration of the customized shield plate edge may reduce the area of the resulting capacitor and thereby achieve lower parasitic capacitance associated with the FET. The FET may be implemented as a lateral diffused MOS (LDMOS) transistor suitable for high power radio frequency applications.
US09209258B2 Depositing an etch stop layer before a dummy cap layer to improve gate performance
An improved method for fabricating a semiconductor device is provided. The method includes: depositing a dielectric layer on a substrate; depositing a first cap layer on the dielectric layer; depositing an etch stop layer on the dielectric layer; and depositing a dummy cap layer on the etch stop layer to form a partial gate structure. Also provided is a partially formed semiconductor device. The partially formed semiconductor device includes: a substrate; a dielectric layer on the substrate; a first cap layer on the dielectric layer; an etch stop layer on the dielectric layer; and a dummy cap layer on the etch stop layer forming a partial gate structure.
US09209256B2 Semiconductor device and method for manufacturing the same
To provide a semiconductor device which has transistor characteristics with little variation and includes an oxide semiconductor. The semiconductor device includes an insulating film over a conductive film and an oxide semiconductor film over the insulating film. The oxide semiconductor film includes a first oxide semiconductor layer, a second oxide semiconductor layer over the first oxide semiconductor layer, and a third oxide semiconductor layer over the second oxide semiconductor layer. The energy level of a bottom of a conduction band of the second oxide semiconductor layer is lower than those of the first and third oxide semiconductor layers. An end portion of the second oxide semiconductor layer is positioned on an inner side than an end portion of the first oxide semiconductor layer.
US09209253B2 Nitride based semiconductor device and manufacturing method thereof
A nitride based semiconductor device includes a first metallic junction layer, a Schottky junction layer on the first metallic junction layer, a first group III nitride semiconductor layer on the Schottky junction layer, a first insulating pattern layer on the first group III nitride semiconductor layer, the first insulating layer pattern including curved protrusions, a second group III nitride semiconductor layer laterally grown on the first group III nitride semiconductor layer, a first type group III nitride semiconductor layer on the second group III nitride semiconductor layer, the first type group III nitride semiconductor layer being simultaneously doped with aluminum (Al) and silicon (Si), an ohmic junction layer formed on the first type group III nitride semiconductor layer, a second metallic junction layer on the ohmic junction layer, and a metallic supporting substrate on the second metallic junction layer.
US09209251B2 Semiconductor device having switching transistor that includes oxide semiconductor material
One object is to provide a new semiconductor device whose standby power is sufficiently reduced. The semiconductor device includes a first power supply terminal, a second power supply terminal, a switching transistor using an oxide semiconductor material and an integrated circuit. The first power supply terminal is electrically connected to one of a source terminal and a drain terminal of the switching transistor. The other of the source terminal and the drain terminal of the switching transistor is electrically connected to one terminal of the integrated circuit. The other terminal of the integrated circuit is electrically connected to the second power supply terminal.
US09209248B2 Power transistor
A power transistor includes a number of transistor cells. Each transistor cell includes a source region, a drain region, a body region and a gate electrode. Each source region is arranged in a first semiconductor fin of a semiconductor body. Each drain region is at least partially arranged in a second semiconductor fin of the semiconductor body. The second semiconductor fin is spaced from the first semiconductor fin in a first horizontal direction of the semiconductor body. Each gate electrode is arranged in a trench adjacent the first semiconductor fin, is adjacent the body region, and is dielectrically insulated from the body region by a gate dielectric. Each of the first and second semiconductor fins has a width in the first horizontal direction and a length in a second horizontal direction, wherein the length is larger than the width.
US09209242B2 Semiconductor device with an edge termination structure having a closed vertical trench
A semiconductor device includes a semiconductor die having an outer edge and an active area defining a main horizontal surface and being spaced apart from the outer edge. The semiconductor device further includes an edge termination structure having a closed vertical trench surrounding the active area. The edge termination structure further includes at least one vertical trench arranged, in a horizontal cross-section, between the closed vertical trench and the active area. The at least one vertical trench includes an insulated side wall forming an acute angle with the outer edge.
US09209238B2 Method and system for improved matching for on-chip capacitors
Methods and systems for improved matching of on-chip capacitors may comprise a semiconductor die with an on-chip capacitor comprising one or more metal layers. The on-chip capacitor may comprise interdigitated electrically coupled metal fingers. The electrically coupled metal fingers may be arranged symmetrically in the semiconductor die to compensate for non-uniformities in the one or more metal layers. The metal fingers may be arranged with radial symmetry. Metal fingers in a first metal layer may be electrically coupled to metal fingers in a second metal layer. An orientation of metal fingers may be alternated when coupling metal fingers in a plurality of metal layers. The metal fingers may be coupled at the center or the outer edge of the on-chip capacitor. The on-chip capacitor may be configured in a plurality of symmetric sections wherein a boundary between each of the plurality of sections is configured in a zig-zag pattern.
US09209236B2 Organic light-emitting display apparatus comprising a default detecting capacitor
An organic light-emitting display apparatus includes a substrate; a device/wiring layer formed on the substrate, including a plurality of thin film transistors (TFTs); an emitting layer formed on the device/wiring layer, including a lower electrode of a capacitor and a plurality of organic light-emitting diodes (OLEDs); an encapsulating layer formed to cover the emitting layer; and an upper electrode of the capacitor formed on the encapsulating layer.
US09209234B2 Organic light-emitting display apparatus and method of manufacturing the same
An organic light-emitting display apparatus whose defect rate is significantly decreased in a manufacturing procedure includes a substrate having a first sub-pixel region, a second sub-pixel region, and a third sub-pixel region; and a planarization layer covering the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region, such that a distance between the substrate and a top surface of the planarization layer at the center of the first sub-pixel region is greater than a distance between the substrate and the top surface of the planarization layer at the center of the second sub-pixel region or a distance between the substrate and the top surface of the planarization layer at the center of the third sub-pixel region. A method of manufacturing the organic light-emitting display apparatus is also disclosed.
US09209231B2 Array substrate, method for fabricating the same, and OLED display device
This invention provides an array substrate, a method for fabricating the same, and an OLED display device. Each pixel unit of the array substrate comprises: a TFT drive layer; an OLED further away from the substrate than the TFT drive layer and driven by it, the OLED sequentially comprises a first electrode, a light emitting layer, a second electrode, wherein the first electrode is transparent, and the second electrode is a transflective layer, or the second electrode is transparent and has a transflective layer disposed thereon; a reflection layer disposed between the TFT drive layer and the OLED and forming a microcavity structure with the transflective layer, and a reflective surface of the reflection layer has a concave-convex or corrugated structure disposed thereon for causing diffuse reflection of light; and a color filter film disposed between the reflection layer and the OLED and located in the microcavity structure.
US09209221B2 BDI IR readout circuit using pinned photodiode as integration node
An image sensor system has an input from a photosensor, receiving photogenerated electricity, and coupling said photogenerated electricity to a first photodiode to integrate the photogenerated electricity. The photodiode can be a pinned diode, configured to act integrate charge.
US09209220B2 Solid-state imaging apparatus and manufacturing method of solid-state imaging apparatus
The first face of the pad is situated between the front-side face of the second semiconductor substrate and a hypothetical plane including and being parallel to the front-side face, and a second face of the pad that is a face on the opposite side of the first face is situated between the first face and the front-side face of the second semiconductor substrate, and wherein the second face is connected to the wiring structure so that the pad is electrically connected to the circuit arranged in the front-side face of the second semiconductor substrate via the wiring structure.
US09209215B2 Photoelectric conversion apparatus and imaging system using the photoelectric conversion apparatus
In a photoelectric conversion apparatus including a charge holding portion, a part of an element isolation region contacting with a semiconductor region constituting the charge holding portion extends from a reference surface including the light receiving surface of a photoelectric conversion element into a semiconductor substrate at a level equal to or deeper than the depth of the semiconductor region in comparison with the semiconductor region.
US09209212B2 Image sensor including source follower
Provided is an image sensor including a source follower transistor. The source follower transistor may include a channel structure that is provided between a source and a drain, and includes a first semiconductor layer, a second semiconductor layer, and a blocking structure. The first semiconductor layer may be spaced apart from a gate insulating layer of the source follower transistor by a first depth or more. Carriers may move from the source of the source follower transistor to the drain thereof through the first semiconductor layer.
US09209207B2 Flexible display with bent edge regions
An electronic device may have a flexible display with portions that are bent along a bend axis. The display may have display circuitry such as an array of display pixels in an active area. Contact pads may be formed in an inactive area of the display. Signal lines may couple the display pixels to the contact pads. The signal lines may overlap the bend axis in the inactive area of the display. During fabrication, an etch stop may be formed on the display that overlaps the bend axis. The etch stop may prevent over etching of dielectric such as a buffer layer on a polymer flexible display substrate. A layer of polymer that serves as a neutral stress plane adjustment layer may be formed over the signal lines in the inactive area of the display. Upon bending, the neutral stress plane adjustment layer helps prevent stress in the signal lines.
US09209203B2 Active matrix substrate and method for manufacturing the same
A thin film transistor includes: a semiconductor channel film; a gate insulating film on the semiconductor channel film; a gate electrode formed of a laminated film including a first conductive film and a second conductive film on the gate insulating film; an interlayer insulating film covering the semiconductor channel film, the gate insulating film, and the gate electrode; a source electrode formed of a laminated film including a third conductive film and a fourth conductive film formed on the interlayer insulating film; and a drain electrode formed of the third conductive film. A gate wiring is formed of the laminated film including the first conductive film and the second conductive film. A source wiring is formed of the laminated film including the third conductive film and the fourth conductive film. A pixel electrode is formed of the first conductive film. A counter electrode is formed of the third conductive film.
US09209202B2 Enabling bulk FINFET-based devices for FINFET technology with dielectric isolation
A method for forming a dielectric-isolated bulk fin field-effect transistor (finFET) device includes forming a second isolation layer over a first structure including multiple partially exposed fins and horizontal areas including a first isolation layer. The second isolation layer is removed from horizontal areas of a first portion of the first structure. An oxide layer is formed under the fins of the first portion of the first structure. The second isolation layer is removed in order to expose the partially exposed fins and horizontal areas of the first structure to form a second structure, on which gate regions are formed.
US09209199B2 Stacked thin channels for boost and leakage improvement
A hollow-channel memory device comprises a source layer, a first hollow-channel pillar structure formed on the source layer, and a second hollow-channel pillar structure formed on the first hollow-channel pillar structure. The first hollow-channel pillar structure comprises a first thin channel and the second hollow-channel pillar structure comprises a second thin channel that is in contact with the first thin channel. In one exemplary embodiment, the first thin channel comprises a first level of doping; and the second thin channel comprises a second level of doping that is different from the first level of doping. In another exemplary embodiment, the first and second levels of doping are the same.
US09209197B2 Memory gate landing pad made from dummy features
Embodiments described herein generally relate to landing gate pads for contacts and manufacturing methods therefor. A bridge is formed between two features to allow a contact to be disposed, at least partially, on the bridge. Landing the contact on the bridge avoids additional manufacturing steps to create a target for a contact.
US09209194B1 Semiconductor constructions comprising fuse capacitors
Some embodiments include a semiconductor construction having a semiconductor substrate and an interlayer insulating material over the substrate. Memory cells are supported by the substrate, and each memory cell includes a cell transistor and a cell capacitor. The cell transistor has source and drain regions extending into the semiconductor substrate. A conductive plug extends through the interlayer insulating material and is in electrical contact with one of the source and drain regions, and with the cell capacitor. The construction also includes at least one anti-fuse having a fuse capacitor. A covering material is between the fuse capacitor and the interlayer insulating material, and is in direct contact with the interlayer insulating material. The covering material is of a different composition than the interlayer insulating material.
US09209193B2 Method of manufacturing device
A method of manufacturing a device includes: forming a fifth insulating film on a semiconductor substrate having a peripheral circuit region and a memory cell region in which a contact pad is formed; forming a second sacrifice film in the memory cell region in which the fifth insulating film is formed; forming, after the forming of the second sacrifice, a second insulating film in the peripheral circuit region on the semiconductor substrate to have a sidewall coming into contact with the second sacrifice film; forming a third insulating film to cover an upper surface of the second sacrifice film and an upper surface of the second insulating film; forming a hole penetrating through the third insulating film, the second sacrifice film and the fifth insulating film in the memory cell region; forming a lower electrode in the hole; and removing all of the second sacrifice film.
US09209190B2 Deep trench capacitor
The present disclosure relates to a method of forming a capacitor structure, including depositing a plurality of first polysilicon (POLY) layers of uniform thickness separated by a plurality of oxide/nitride/oxide (ONO) layers over a bottom and sidewalls of a recess and substrate surface. A second POLY layer is deposited over the plurality of first POLY layers, is separated by an ONO layer, and fills a remainder of the recess. Portions of the second POLY layer and the second ONO layer are removed with a first chemical-mechanical polish (CMP). A portion of each of the plurality of first POLY layers and the first ONO layers on the surface which are not within a doped region of the capacitor structure are removed with a first pattern and etch process such that a top surface of each of the plurality of first POLY layers is exposed for contact formation.
US09209188B2 Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making
An integrated circuit including a link or string of semiconductor memory cells, wherein each memory cell includes a floating body region for storing data. The link or string includes at least one contact configured to electrically connect the memory cells to at least one control line, and the number of contacts in the string or link is the same as or less than the number of memory cells in the string or link.
US09209187B1 Methods of forming an array of gated devices
A method of forming an array of gated devices includes forming a plurality of semiconductor material-comprising blocks individually projecting elevationally from a substrate and spaced from one another along rows and columns. A gate line is formed laterally proximate each of two opposing sidewalls of the blocks along individual rows of the blocks. After forming the gate lines, semiconductor material of the blocks is removed laterally between the gate lines to form pairs of pillars from the individual blocks that individually have one of the gate lines laterally proximate one of two laterally outermost sidewalls of the pair and another of the gate lines laterally proximate the other of the two laterally outermost sidewalls of the pair. Other methods are disclosed.
US09209184B2 High-integration semiconductor device and method for fabricating the same
A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.
US09209182B2 Dummy metal gate structures to reduce dishing during chemical-mechanical polishing
The described embodiments of mechanisms for placing dummy gate structures next to and/or near a number of wide gate structures reduce dishing effect for gate structures during chemical-mechanical polishing of gate layers. The arrangements of dummy gate structures and the ranges of metal pattern density have been described. Wide gate structures, such as analog devices, can greatly benefit from the reduction of dishing effect.
US09209180B2 Field effect transistor with conduction band electron channel and uni-terminal response
A uni-terminal transistor device is described. In one embodiment, an n-channel transistor comprises a first semiconductor layer having a discrete hole level H0; a second semiconductor layer having a conduction band minimum EC2; a wide bandgap semiconductor barrier layer disposed between the first and the second semiconductor layers; a gate dielectric layer disposed above the first semiconductor layer; and a gate metal layer disposed above the gate dielectric layer and having an effective workfunction selected to position the discrete hole level H0 below the conduction band minimum Ec2 for zero bias applied to the gate metal layer and to obtain n-terminal characteristics.
US09209179B2 FinFET-based semiconductor device with dummy gates
A semiconductor device is provided. A substrate includes first and second active fins disposed in a row along a first direction. The first and second active fins are spaced apart from each other. A first dummy gate and a second dummy gate are disposed on the substrate and are extended in a second direction intersecting the first direction. The first dummy gate covers an end portion of the first active fin. The second dummy gate covers an end portion of the second active fin facing the end portion of the first active fin. A first dummy spacer is disposed on a sidewall of the first dummy gate. A second dummy spacer is disposed on a sidewall of the second dummy gate. The sidewall of the second dummy gate faces the sidewall of the first dummy gate. The first dummy spacer is in contact with the second dummy spacer.
US09209178B2 finFET isolation by selective cyclic etch
Etching interleaved structures of semiconductor material forming fins of finFETs and local isolation material interposed between the fins is performed alternately and cyclically by alternating etchants cyclically such as by alternating gases during reactive ion etching. Etchants are preferably alternated when one of the semiconductor material and the local isolation material protrudes above the other by a predetermined distance. Since protruding surfaces are etched more rapidly than recessed surfaces, the overall etching process is accelerated and completed in less time such that erosion of other materials to which the etchants are less than optimally selective is reduced and allow improved etching of trenches for improved isolation structures to be formed.
US09209176B2 Semiconductor modules and methods of forming the same
Electronic modules, and methods of forming and operating modules, are described. The modules include a capacitor, a first switching device, and a second switching device. The electronic modules further include a substrate such as a DBC substrate, which includes an insulating layer between a first metal layer and a second metal layer, and may include multiple layers of DBC substrates stacked over one another. The first metal layer includes a first portion and a second portion isolated from one another by a trench formed through the first metal layer between the two portions. The first and second switching devices are over the first metal layer, a first terminal of the capacitor is electrically connected to the first portion of the first metal layer, and a second terminal of the capacitor is electrically connected to the second portion of the first metal layer, with the capacitor extending over the trench.
US09209175B2 MOS devices having epitaxy regions with reduced facets
An integrated circuit structure includes a gate stack over a semiconductor substrate, and an opening extending into the semiconductor substrate, wherein the opening is adjacent to the gate stack. A first silicon germanium region is disposed in the opening, wherein the first silicon germanium region has a first germanium percentage. A second silicon germanium region is over the first silicon germanium region. The second silicon germanium region comprises a portion in the opening. The second silicon germanium region has a second germanium percentage greater than the first germanium percentage. A silicon cap substantially free from germanium is over the second silicon germanium region.
US09209169B1 Semiconductor device
A semiconductor device includes: a semiconductor layer having an active region defined thereover, wherein the active region comprises a first sub-region and a second sub-region; a first doped region disposed in a portion of the semiconductor layer, extending across the first sub-region and the second sub-region; a high-voltage (HV) semiconductor element disposed over the semiconductor layer in the first sub-region, wherein the HV semiconductor element comprises a portion of the first doped region formed in the semiconductor layer in the first-sub region of the active region; and an electrostatic discharge (ESD) protection element disposed over the semiconductor layer in the second sub-region, wherein the ESD protection element comprises the other portion of the doped region formed in the semiconductor layer in the second sub-region of the active region.
US09209167B2 Determining threshold voltage variations in field effect transistors
Disclosed are a method and a system for determining threshold voltage (Vt) variations in field effect transistors (FETs), wherein multiple field effect transistors (FETs) (e.g., at least a first FET and a second FET), which are similar in design except for having different effective channel widths, can be selected for processing. Information regarding these multiple FETs (e.g., the ratio of the different effective channel widths and other information) can be acquired and used to define the relation between a standard deviation of an uncorrelated Vt variation and a difference between a first average Vt associated with the first FET and a second average Vt associated with the second FET. The relation can, depending upon the FET layouts, be used for different purposes (e.g., for characterizing the threshold voltage mismatch between a pair of adjacent essentially identical FETs on a chip or for characterizing a width scaling relation).
US09209162B2 Light emitting device including RGB light emitting diodes and phosphor
Disclosed herein is a light emitting device including at least three light emitting diodes having different peak emission wavelengths to primarily emit light in a blue, green or red wavelength range, and a wavelength-conversion means to convert primary light into secondary light in a visible light wavelength range. The light emitting device of the current invention has a high color temperature of 2,000 to 8,000 K or 10,000 K and a high color rendering index of 90 or more, and emits yellow-green light or orange light having a wide emission wavelength range. Since the light emitting device having high color temperature and excellent color rendering properties can easily realize desired emission on the color coordinate system, it is applicable to mobile phones, notebook computers, and keypads or backlight units for various electronic products, and in particular, automobiles and exterior and interior lighting fixtures.
US09209160B2 Semiconductor devices compatible with mono-rank and multi-ranks
A provided memory device is compatible with a mono-rank or multi-ranks. A plurality of memory layers are stacked in the memory device. The memory device receives an address signal and chip select signals in response to a chip identification signal and a mode signal used to determine a mono-rank or multi-ranks. The plurality of memory layers operate as the mono-rank accessed by the address signal, or operate as the multi-ranks accessed by the chip select signals.
US09209158B2 Pass-through 3D interconnect for microelectronic dies and associated systems and methods
Pass-through 3D interconnects and microelectronic dies and systems of stacked dies that include such interconnects are disclosed herein. In one embodiment, a system of stacked dies includes a first microelectronic die having a substrate, a metal substrate pad, and a first integrated circuit electrically coupled to the substrate pad. A pass-through 3D interconnect extends between front and back sides of the substrate, including through the substrate pad. The pass-through interconnect is electrically isolated from the substrate pad and electrically coupled to a second integrated circuit of a second microelectronic die attached to the back side of the substrate. In another embodiment, the first integrated circuit is a first memory device and the second integrated circuit is a second memory device, and the system uses the pass-through interconnect as part of an independent communication path to the second memory device.
US09209154B2 Semiconductor package with package-on-package stacking capability and method of manufacturing the same
A method of making a semiconductor package with package-on-package stacking capability is characterized by the step of attaching a chip-on-interposer subassembly on a base carrier with the chip inserted into a through opening of the base carrier and the interposer laterally extending beyond the through opening. The interposer provides primary fan-out routing for the chip whereas dual buildup circuitries formed on both opposite sides of the base carrier provides further fan-out routing and are electrically connected to each other by plated through holes to provide the package with stacking capacity.
US09209153B2 Semiconductor device and method of manufacturing the semiconductor device
Disclosed is a semiconductor device in which, when two adjacent semiconductor chips are coupled with bonding wires, a short circuit between the adjacent bonding wires can be suppressed. A first bonding wire, a second bonding wire, a third bonding wire, and a fourth bonding wire are lined up in this order along a first side. When viewed from a direction perpendicular to a chip mounting part, a maximum of the space between the first bonding wire and the second bonding wire is larger than that of the space between the second bonding wire and the third bonding wire. Further, a maximum of the space between the second bonding wire and the third bonding wire is larger than that of the space between the third bonding wire and the fourth bonding wire.
US09209147B1 Method of forming pillar bump
A method of forming a pillar bump includes feeding a bond wire in a capillary. The capillary has a hole portion and a chamfer section arranged downstream of the hole portion. The hole portion has a length along a feed direction of the bond wire that is greater than a maximum diameter of the hole portion. The method further includes performing an electric flame off (EFO) on a free end of the bond wire extending from the chamfer section to form a free air ball (FAB), tensioning the bond wire and applying a vacuum to the capillary to withdraw a portion of the FAB back into the capillary to substantially fill the hole portion for forming a tower, attaching the FAB to a bonding site, and at least partially removing the capillary from the bonding site and breaking the bond wire above the tower.
US09209146B2 Electronic device packages having bumps and methods of manufacturing the same
An electronic device package includes a bump having a post disposed on a contact portion of a semiconductor chip and an enlarged portion laterally protruded from an upper portion of the post; an interconnection portion having a locking portion that substantially surrounds the enlarged portion and an upper sidewall of the post; and a dielectric layer substantially surrounding the bump and the locking portion to separate the interconnection portion from the semiconductor chip.
US09209143B2 Die edge side connection
An apparatus comprises a first integrated circuit (IC) die that includes a top layer, a bottom surface, a sidewall surface extending from a top surface of the top layer to the bottom surface, and at least one multi-surface contact pad, a second IC die including a top layer, a bottom surface, a sidewall surface extending from a top surface of the top layer to the bottom surface, and at least one multi-surface contact pad, wherein the second IC die is arranged adjacent to the first IC die, and includes an electrically conductive bond in contact with at least one of the top surface or the side surface of the multi-surface contact pad of the first IC die and the top surface of the multi-surface contact pad of the second IC die.
US09209136B2 Hybrid carbon-metal interconnect structures
Embodiments of the present disclosure are directed towards techniques and configurations for hybrid carbon-metal interconnect structures in integrated circuit assemblies. In one embodiment, an apparatus includes a substrate, a metal interconnect layer disposed on the substrate and configured to serve as a growth initiation layer for a graphene layer and the graphene layer, wherein the graphene layer is formed directly on the metal interconnect layer, the metal interconnect layer and the graphene layer being configured to route electrical signals. Other embodiments may be described and/or claimed.
US09209135B2 Method for reducing wettability of interconnect material at corner interface and device incorporating same
A semiconductor device includes a recess defined in a dielectric layer, the recess having an upper sidewall portion extending to an upper corner of the recess and a lower sidewall portion below the upper sidewall portion. An interconnect structure is positioned in the recess. The interconnect structure includes a continuous liner layer having upper and lower layer portions positioned laterally adjacent to the upper and lower sidewall portions, respectively. The upper layer portion includes an alloy of a first transition metal and a second transition metal and the lower layer portion includes the second transition metal but not the first transition metal. The interconnect structure also includes a fill material substantially filling the recess, wherein the second transition metal has a higher wettability for the fill material than the alloy.
US09209127B2 Apparatus and method for high density multi-chip structures
Devices and methods are described including a multi-chip assembly. Embodiments of multi-chip assemblies are provided that uses both lateral connection structures and through chip connection structures. One advantage of this design includes an increased number of possible connections. Another advantage of this design includes shorter distances for interconnection pathways, which improves device performance and speed.
US09209125B2 Semiconductor device and manufacturing method of the same
According to one embodiment, a semiconductor device using a graphene film comprises a catalytic metal layer formed on a groundwork substrate includes a contact via, and a multilayered graphene layer formed in a direction parallel with a surface of the substrate. The catalytic metal layer is formed to be connected to the contact via and covered with an insulation film except one side surface. The multilayered graphene layer is grown from the side surface of the catalytic metal layer which is not covered with the insulation film.
US09209115B2 Quad flat no-lead (QFN) packaging structure and method for manufacturing the same
A quad flat no-lead (QFN) packaging structure. The QFN packaging structure includes a metal substrate, a first outer die pad formed on the metal substrate, and a first die coupled to a top surface of the first outer die pad. The QFN packaging structure also includes a plurality of I/O pads formed on the metal substrate, and a first metal layer containing a plurality of inner leads corresponding to the plurality of I/O pads and extending to proximity of the die. The first metal layer is formed on the metal substrate by a multi-layer electrical plating process such that a lead pitch of the plurality of inner leads is significantly reduced. Further, the QFN packaging structure includes metal wires connecting die and the plurality of inner leads, and a second metal layer formed on a back surface of the plurality of I/O pads and the die pad.
US09209113B2 Semiconductor device for battery power voltage control
A voltage generated in any of a plurality of semiconductor chips is supplied to another chip as a power supply voltage to realize a stable operation of a semiconductor device in which the semiconductor chips are stacked in the same package. For example, two chips are stacked with each other, first to third pads are disposed along corresponding sides of the respective chips, which are arranged close and in parallel to each other, and these pads are commonly connected to each other with first to third metal wires, respectively. In another example, fourth and fifth pads are disposed along a side different from a side along which the first to third pads are disposed, and further connected to each other with a fourth metal wire directly between the chips.
US09209111B2 Semiconductor device having a multilayer interconnection structure
A semiconductor device includes first and second conductor patterns embedded in a first interlayer insulation film and a third conductor pattern embedded in a second interlayer insulation film, the third conductor pattern including a main part and an extension part, the extension part being electrically connected to the first conductor pattern by a first via-plug, the extension part having a branched pattern closer to the main part compared with the first conductor pattern, the branched pattern making a contact with the second conductor pattern via a second via-plug, each of the main part, extension part including the branched pattern, first via-plug and second via-plug forming a damascene structure.
US09209110B2 Integrated device comprising wires as vias in an encapsulation layer
Some novel features pertain to an integrated device that includes a substrate, a first die coupled to the substrate, a first encapsulation layer coupled to the substrate and the first die, and a second encapsulation layer in the first encapsulation layer. The second encapsulation layer includes a set of wires configured to operate as vias. In some implementations, the integrated device includes a set of vias in the first encapsulation layer. In some implementations, the integrated device further includes a second die coupled to the substrate. In some implementations, the second encapsulation layer is positioned between the first die and the second die. In some implementations, the integrated device further includes a cavity in the first encapsulation layer, where the second encapsulation layer is positioned in the cavity. In some implementations, the cavity has a wall that is non-vertical. In some implementations, at least one of the wires is non-vertical.
US09209106B2 Thermal management circuit board for stacked semiconductor chip device
A method of assembling a semiconductor chip device is provided. The method includes providing a first circuit board that has a plurality of thermally conductive vias. A second circuit board is mounted on the first circuit board over and in thermal contact with the thermally conductive vias. The second circuit board includes first side facing the first circuit board and a second and opposite side.
US09209104B2 Electronic devices assembled with thermally insulating layers
Provided herein are electronic devices assembled with thermally insulating layers.
US09209100B2 Housing having separate getter chamber for device operating under vacuum
A housing for a device operated under at least one of a vacuum and a protective gas includes at least one housing interior space, at least one receiving region configured to receive at least one getter material, and a connection between the at least one housing interior space and the at least one receiving region. The connection includes a particle-impervious bond.
US09209098B2 HVMOS reliability evaluation using bulk resistances as indices
A method of determining the reliability of a high-voltage PMOS (HVPMOS) device includes determining a bulk resistance of the HVPMOS device, and evaluating the reliability of the HVPMOS device based on the bulk resistance.
US09209095B2 III-V, Ge, or SiGe fin base lateral bipolar transistor structure and method
In one aspect, a method of fabricating a bipolar transistor device on a wafer includes the following steps. Fin hardmasks are formed on the wafer. A dummy gate is formed on the wafer, over the fin hardmasks. The wafer is doped to form emitter and collector regions on both sides of the dummy gate. A dielectric filler layer is deposited onto the wafer and the dummy gate is removed selective to the dielectric filler layer so as to form a trench in the filler layer. Fins are patterned in the wafer using the fin hardmasks exposed within the trench, wherein the fins will serve as a base region of the bipolar transistor device. The fins are recessed in the base region. The base region is re-grown from an epitaxial SiGe, Ge or III-V semiconductor material. A contact is formed to the base region.
US09209094B2 Fin field effect transistor with dielectric isolation and anchored stressor elements
A first fin field effect transistor and a second fin field effect transistor are formed on an insulator layer overlying a semiconductor material layer. A first pair of trenches is formed through the insulator layer in regions in which a source region and a drain region of the first fin field effect transistor is to be formed. A second pair of trenches is formed partly into the insulator layer without extending to the top surface of the semiconductor material layer. The source region and the drain region of the first field effect transistor can be epitaxial stressor material portions that are anchored to, and epitaxially aligned to, the semiconductor material layer and apply stress to the channel of the first field effect transistor to enhance performance. The insulator layer provides electrical isolation from the semiconductor material layer to the second field effect transistor.
US09209092B2 Semiconductor device with a wide-gap semiconductor layer on inner wall of trench
A conventional DRAM needs to be refreshed at an interval of several tens of milliseconds to hold data, which results in large power consumption. In addition, a transistor therein is frequently turned on and off; thus, deterioration of the transistor is also a problem. These problems become significant as the memory capacity increases and transistor miniaturization advances. A transistor is provided which includes a wide-gap semiconductor and has a trench structure including a trench for a gate electrode and a trench for element isolation. Even when the distance between a source electrode and a drain electrode is decreased, the occurrence of a short-channel effect can be suppressed by setting the depth of the trench for the gate electrode as appropriate.
US09209089B2 Method of fabricating a metal gate semiconductor device
A method of semiconductor device fabrication including providing a substrate having a gate dielectric layer such as a high-k dielectric disposed thereon. A tri-layer element is formed on the gate dielectric layer. The tri-layer element includes a first capping layer, a second capping layer, and a metal gate layer interposing the first and second capping layer. One of an nFET and a pFET gate structure are formed using the tri-layer element, for example, the second capping layer and the metal gate layer may form a work function layer for one of an nFET and a pFET device. The first capping layer may be a sacrificial layer used to pattern the metal gate layer.
US09209088B2 Semiconductor devices and methods of manufacture thereof
Semiconductor devices and methods of manufacture thereof are disclosed. In a preferred embodiment, a method of manufacturing a semiconductor device includes providing a semiconductor wafer, forming a gate dielectric over the semiconductor wafer, and forming a gate over the gate dielectric. At least one recess is formed in the semiconductor wafer proximate the gate and the gate dielectric, at least a portion of the at least one recess extending beneath the gate. The at least one recess in the semiconductor wafer is filled with a semiconductive material.
US09209087B2 Semiconductor devices including etching stop films
A semiconductor device may include a substrate including an NMOS region and a PMOS region. A gate structure can include a gate pattern and a spacer pattern, where the gate structure is on the substrate. A first etching stop film can be on the substrate in the NMOS region and a second etching stop film can be on the substrate in the PMOS region. A contact hole can penetrate the first and second etching stop films and a contact plug can be in the contact hole. A thickness of the first etching stop film can be greater than a thickness of the second etching stop film. Related methods are also disclosed.
US09209086B2 Low temperature salicide for replacement gate nanowires
Techniques for integrating low temperature salicide formation in a replacement gate device process flow are provided. In one aspect, a method of fabricating a FET device is provided that includes the following steps. A dummy gate(s) is formed over an active area of a wafer. A gap filler material is deposited around the dummy gate. The dummy gate is removed selective to the gap filler material, forming a trench in the gap filler material. A replacement gate is formed in the trench in the gap filler material. The replacement gate is recessed below a surface of the gap filler material. A gate cap is formed in the recess above the replacement gate. The gap filler material is etched back to expose at least a portion of the source and drain regions of the device. A salicide is formed on source and drain regions of the device.
US09209083B2 Integrated circuit manufacturing for low-profile and flexible devices
A process for manufacturing low-profile and flexible integrated circuits includes manufacturing an integrated circuit on a wafer having a thickness larger than the desired thickness. After the integrated circuit is manufactured the integrated circuit may be released with a portion of the wafer leaving a remainder of the bulk portion of the wafer. A second integrated circuit may be manufactured on the remainder of the wafer and the process repeated to manufacture additional integrated circuits from a single wafer. The integrated circuits may be released from the wafer by etching vias through the integrated circuit and into the wafer. The via may be used to start an etch process inside the wafer that undercuts the integrated circuit separating the integrated circuit from the wafer.
US09209082B2 Methods of localized hardening of dicing channel by applying localized heat in wafer kerf
Various embodiments include localized hardening of dicing channels in an integrated circuit (IC) wafer. In some embodiments, a method includes: applying localized heat to a metal interconnect in a wafer kerf on an IC wafer using a heat source; and removing the heat source to cool the metal interconnect after the applying of the localized heat to the metal interconnect, wherein the applying of the heat and the removing of the heat source increases a hardness of the metal interconnect.
US09209081B2 Semiconductor grid array package
A semiconductor grid array package has a first housing member with a cavity that has a cavity floor and cavity walls. A semiconductor die is affixed to the cavity floor. A second housing member is molded to the first housing member and covers an interface surface of the die. Electrically conductive runners are mounted to an external surface of the second housing member. The runners have a wire contacting area and an external connector contacting area. Bond wires are selectively bonded to the external connection pads of the semiconductor die and selectively connected to the wire contacting area of the runners. External electrical connectors are mounted to a designated external connector contacting area.
US09209079B2 Conductor layout technique to reduce stress-induced void formations
A semiconductor device is prepared by an annealing process to interconnect at least two components of the device by a conductor line surrounded by an insulator material. The annealing process results in formation of residual stresses within the conductor line and the insulator material. One or multiple notches are designed in the layout on a selective portion of the mask for patterning conductor line. The existence of the notch or notches on the selective portion generates extra stress components within the conductor line than would exist without the existence of the notch. The position of the notch is selected so that the extra stress components substantially counteract the residual stresses, thereby causing a net reduction in the residual stresses. The reduction in the residual stresses results in a corresponding mechanical stress migration and therefore improvement in the reliability of the device.
US09209078B2 Method of making a die with recessed aluminum die pads
A method for making a semiconductor device comprises forming an electrical interconnect layer, forming a first dielectric layer over the interconnect layer, forming an opening in the first dielectric layer over a first electrical interconnect of the interconnect layer, forming an aluminum layer over the first dielectric layer, etching the aluminum layer to form an aluminum die pad, forming a second dielectric layer over the aluminum die pad and the first dielectric layer, and forming a conductive via through the first and second dielectric layers to contact a second electrical interconnect of the interconnect layer.
US09209077B2 Diagonal hardmasks for improved overlay in fabricating back end of line (BEOL) interconnects
Self-aligned via and plug patterning using diagonal hardmasks for improved overlay in fabricating back end of line (BEOL) interconnects is described. In an example, a method of fabricating an interconnect structure for an integrated circuit involves forming a first hardmask layer above an interlayer dielectric layer disposed above a substrate. The first hardmask layer includes a plurality of first hardmask lines having a first grating in a first direction and comprising one or more sacrificial materials interleaved with the first grating. The method also involves forming a second hardmask layer above the first hardmask layer. The second hardmask layer includes a plurality of second hardmask lines having a second grating in a second direction, diagonal to the first direction. The method also involves, using the second hardmask layer as a mask, etching the first hardmask layer to form a patterned first hardmask layer. The etching involves removing a portion of the one or more sacrificial materials.
US09209076B2 Method of double patterning lithography process using plurality of mandrels for integrated circuit applications
A method includes performing a double patterning process to form a first mandrel, a second mandrel, and a third mandrel, with the third mandrel being between the first mandrel and the second mandrel, and etching the third mandrel to cut the third mandrel into a fourth mandrel and a fifth mandrel, with an opening separating the fourth mandrel from the fifth mandrel. A spacer layer is formed on sidewalls of the first, the second, the fourth, and the fifth mandrels, wherein the opening is fully filled by the spacer layer. Horizontal portions of the spacer layer are removed, with vertical portions of the spacer layer remaining un-removed. A target layer is etched using the first, the second, the fourth, and the fifth mandrels and the vertical portions of the spacer layer as an etching mask, with trenches formed in the target layer. The trenches are filled with a filling material.
US09209073B2 Metal cap apparatus and method
Presented herein is a method for electrolessly forming a metal cap in a via opening, comprising bringing a via into contact with metal solution, the via disposed in an opening in a substrate, and forming a metal cap in the opening and in contact with the via, the metal cap formed by an electroless chemical reaction. A metal solution may be applied to the via to form the metal cap. The metal solution may comprises at least cobalt and the cap may comprise at least cobalt, and may optionally further comprise tungsten, and wherein the forming the cap comprises forming the cap to further comprise at least tungsten. The metal solution may further comprise at least hypophosphite or dimethylaminoborane.
US09209066B2 Isolation structure of semiconductor device
The invention relates to an isolation structure of a semiconductor device. An exemplary isolation structure for a semiconductor device comprises a substrate comprising a trench; a strained material in the trench, wherein a lattice constant of the strained material is different from a lattice constant of the substrate; an oxide layer of the strained material over the strained material; a high-k dielectric layer over the oxide layer; and a dielectric layer over the high-k dielectric layer filling the trench.
US09209065B1 Engineered substrate and device for co-integration of strained silicon and relaxed silicon
A strained silicon material layer is bonded to a relaxed silicon material layer. The strained silicon material and any defect containing region formed during bonding are completely removed from a second device region, while a portion of the strained silicon material layer remains in a first device region. A relaxed silicon material portion is epitaxially formed on an exposed portion of the relaxed silicon material layer. A high performance nFET device, in which leakage is not a main concern, can be formed on the remaining portion of the strained silicon material layer in the first device region, and a pFET device or a low leakage nFET device can be formed on the epitaxially formed relaxed silicon material portion.
US09209062B1 Removable spin chamber with vacuum attachment
A removable air flow control housing having a chamber for holding a substrate which is rotatable with and attachable by vacuum to a spin chuck of a spin coating apparatus. The housing has a lid in a top wall that can be hinged, screwed, magnetically secured or frictionally held in place. The chuck is nestable within a cutout region disposed within a central inner portion of the housing while an outer portion of the housing has a toroidal shape beyond edges of the chuck for reducing air turbulence and capturing excess coating fluid. The cutout region forms a shape that corresponds to the chuck shape. An upper cutout wall has vacuum holes in vertical alignment with vacuum holes of the chuck. The housing is attachable by vacuum to the chuck when the chuck is nested within the cutout region and the substrate is positioned on an upper surface of the upper cutout wall. The housing and substrate are rotatable with the chuck about a chuck axis of rotation as a coating solution is dispensed onto the substrate.
US09209058B2 Apparatus for flipping semiconductor device
An apparatus for flipping a semiconductor device comprises a platform comprising a carrier and a roller system, a positioning unit above the platform and comprising a circular opening, and an elevating unit connecting the platform and the positioning unit.
US09209054B2 Device manufacturing apparatus
A device manufacturing method and a device manufacturing apparatus in a single wafer processing system with wafers in 0.5 inch size. A large number of sealed-type unit process apparatuses are arranged to form a manufacturing line. The unit process apparatus is portable and processes a single process in the manufacturing process. When the number of a unit of manufacturing is more than the number of the unit process apparatuses, the unit process apparatuses are arranged as a flow shop system, corresponding to the order of processes for the device. When the number of the units is nearly equal to the number of processes, the apparatuses are arranged as a class shop system for classified arrangement at every major division of orders of processes. When the number of the units is far less than the number of processes, the apparatuses are arranged as a multicell shop system.
US09209052B2 Semiconductor manufacturing apparatus and device manufacturing method using substrate distortion correction
A semiconductor manufacturing apparatus according to the present embodiment includes a vacuum chamber. A stage mounts a semiconductor substrate thereon within the vacuum chamber. An electrostatic chuck fixes the semiconductor substrate onto the stage. A sensor detects a height of a surface of the semiconductor substrate fixed onto the stage by the electrostatic chuck. A processor determines whether the surface of the semiconductor substrate is distorted based on the height of the surface of the semiconductor substrate. The processor calculates correction values for a pattern transferred onto the surface of the semiconductor substrate by exposure based on the height of the surface of the semiconductor substrate when the surface of the semiconductor substrate is distorted. An exposure part exposes the surface of the semiconductor substrate to light using the correction values.
US09209049B2 Rapid conductive cooling using a secondary process plane
In one embodiment, a substrate processing apparatus includes a chamber having an interior volume with an upper portion and a lower portion, a cooling source disposed in the upper portion of the interior volume, a heating source opposing the cooling source, a magnetically movable substrate support that moves between the upper portion and the lower the portion, and a plurality of sensors coupled to the chamber to detect the position of the substrate support relative to the heating source and the cooling source.
US09209048B2 Two step molding grinding for packaging applications
Embodiments of the present disclosure include semiconductor packages and methods of forming the same. An embodiment is a method including mounting a die to a top surface of a substrate to form a device, encapsulating the die and top surface of the substrate in a mold compound, the mold compound having a first thickness over the die, and removing a portion, but not all, of the thickness of the mold compound over the die. The method further includes performing further processing on the device, and removing the remaining thickness of the mold compound over the die.
US09209046B2 Semiconductor device and manufacturing method thereof
A method of manufacturing a WLP semiconductor structure includes several operations. One of the operations is providing a carrier and the carrier includes a top surface. One of the operations is covering a portion of the top surface with a plurality of active dies. One of the operations is disposing a protrudent band on a periphery of the carrier, wherein the protrudent band includes a rim shaped along the contour of the carrier. One of the operations is forming a molding compound on the carrier to cover the plurality of active dies.
US09209044B2 Metal-resin composite, method for producing the same, busbar, module case, and resinous connector part
Provided are a metal-resin composite having excellent adhesive strength, a method for producing the same, a busbar, a module case, and a resinous connector part. The metal-resin composite comprises a metallic member 1 including a metal with a high melting point of 500° C. or more, a resin member 2 being integrated with the metallic member 1; and an alloy layer 3 including a metal with a low melting point lower than 500° C. The alloy layer 3 is arranged between the metallic member 1 and the resin member 2, and has average surface roughness thereof in the range from 5 nm or more to less than 1 μm at the interface between the alloy layer 3 and the resin member 2. Herein, a period of the unevenness formed on the interface of the alloy layer 3 is in the range from 5 nm or more to less than 1 μm.
US09209040B2 Amorphorus silicon insertion for STI-CMP planarity improvement
A semiconductor device includes a semiconductor substrate and a trench isolation. The trench isolation is located in the semiconductor substrate, and includes a first cushion layer, a second cushion layer and an insulating filler. The first cushion layer is peripherally enclosed by the semiconductor substrate, the second cushion layer is peripherally enclosed by the first cushion layer, and insulating filler is peripherally enclosed by the second cushion layer. A method for fabricating the semiconductor device is also provided herein.
US09209028B2 Ion implantation methods
Provided are methods of forming an ion implanted region in a semiconductor device. The methods comprise: (a) providing a semiconductor substrate having a plurality of regions to be ion implanted; (b) forming a photoresist pattern on the semiconductor substrate, wherein the photoresist pattern is formed from a chemically amplified photoresist composition comprising a matrix polymer having acid labile groups, a photoacid generator and a solvent; (c) coating a descumming composition over the photoresist pattern, wherein the descumming composition comprises: a matrix polymer; an acid generator chosen from thermal acid generators, photoacid generators and combinations thereof; and a solvent; (d) exposing the coated semiconductor substrate to conditions to generate an acid in the descumming composition from the acid generator; (e) contacting the coated semiconductor substrate with a rinsing agent to remove residual descumming composition and scum from the substrate; and (f) ion implanting the plurality of regions of the semiconductor substrate using the photoresist pattern as an implant mask. The methods find particular applicability in the manufacture of semiconductor devices.
US09209027B1 Adjusting the charge carrier lifetime in a bipolar semiconductor device
A method includes implanting recombination center atoms via a first surface into a semiconductor body and causing the implanted recombination center atoms to diffuse in the semiconductor body in a first diffusion process.
US09209024B2 Back-end transistors with highly doped low-temperature contacts
A back end of line device and method for fabricating a transistor device include a substrate having an insulating layer formed thereon and a channel layer formed on the insulating layer. A gate structure is formed on the channel layer. Dopants are implanted into an upper portion of the channel layer on opposite sides of the gate structure to form shallow source and drain regions using a low temperature implantation process. An epitaxial layer is selectively grown on the shallow source and drain regions to form raised regions above the channel layer and against the gate structure using a low temperature plasma enhanced chemical vapor deposition process, wherein low temperature is less than about 400 degrees Celsius.
US09209021B2 Method for producing Group III nitride semiconductor and Group III nitride semiconductor
A first side surface of post of the first stripe is formed so that a plane which is most parallel to the first side surface among low-index planes of the growing Group III nitride semiconductor is a m-plane (10-10), and a first angle between the first lateral vector obtained by orthogonally projecting a normal vector of the first side surfaces to the main surface and a m-axis projected vector obtained by orthogonally projecting a normal vector of the m-plane of the growing semiconductor to the main surface is from 0.5° to 6°. A second side surface of post of the second stripe is formed so that a plane which is most parallel to the second side surface among low-index planes of the growing semiconductor is an a-plane (11-20), and a second angle between the second lateral vector and an a-axis projected vector of the a-plane is from 0° to 10°.
US09209019B2 Method and system for manufacturing a semi-conducting backplane
Methods and systems to manufacture a semi-conducting backplane are described. According to one set of implementations, semi-conducting particles are positioned in a supporting material of the semi-conducting backplane utilizing perforations in the supporting material or perforations in a removable support member upon which the semi-conducting backplane is constructed. For example, semi-conducting particles are deposited in perforations on a supporting member such that a portion of the semi-conducting particles protrudes from the supporting member. Suction is applied to the semi-conducting particles to retain the semi-conducting particles in the perforations and a layer of encapsulant material is applied onto the supporting member to cover the protruding portion. The supporting member is then removed from the semi-conducting particles and the layer of encapsulant material, which together form an assembly of the semi-conducting particles and the layer of encapsulant material. The portion of the semi-conducting particles is then planarized.
US09209018B2 Semiconductor substrate and method of manufacturing
A method for forming a substrate includes forming a base layer comprising a Group III-V material on a substrate, cooling the base layer and inducing cracks in the base layer, and forming a bulk layer comprising a Group III-V material on the base layer after cooling.
US09209015B2 Substrate processing apparatus
Provided is a substrate processing apparatus, which comprises a process chamber configured to process a substrate, a first plasma generation chamber in the process chamber, a first reactive gas supply unit configured to supply first reactive gas into the first plasma generation chamber, a pair of first discharge electrodes configured to generate plasma and to excite the first reactive gas, a first gas ejection port installed in a side wall of the first plasma generation chamber to eject an active species toward the substrate, a second plasma generation chamber in the process chamber, a second reactive gas supply unit configured to supply second reactive gas into the second plasma generation chamber, a pair of second discharge electrodes configured to generate plasma and to excite the second reactive gas, and a second gas ejection port installed in a side wall of the second plasma generation chamber to eject an active species.
US09209013B2 Constructions comprising thermally conductive stacks containing rutile-type titanium oxide
Some embodiments include methods of forming rutile-type titanium oxide. A monolayer of titanium nitride may be formed. The monolayer of titanium nitride may then be oxidized at a temperature less than or equal to about 550° C. to convert it into a monolayer of rutile-type titanium oxide. Some embodiments include methods of forming capacitors that have rutile-type titanium oxide dielectric, and that have at least one electrode comprising titanium nitride. Some embodiments include thermally conductive stacks that contain titanium nitride and rutile-type titanium oxide, and some embodiments include methods of forming such stacks.
US09209005B2 Method and apparatus for mass spectrometry
A method for analyzing ions according to their mass-to-charge ratio and mass spectrometer for performing the method, comprising directing a collimated ion beam along an ion path from an ion source to an ion detector, causing a portion of the ion beam to contact one or more surfaces prior to reaching the ion detector, wherein the method comprises providing a coating on and/or heating the one or more surfaces to reduce variation in their surface patch potentials. The method is applicable to multi-reflection time-of-flight (MR TOF) mass spectrometry.
US09209003B2 Quantification of an analyte in serum and other biological matrices
Methods and systems for quantifying analytes in a biological sample are provided comprising preparing a biological sample for mass spectrometric analysis, utilizing an ionization source to ionize at least a portion of the prepared biological sample to generate an ionized analyte flow, introducing the ionized analyte flow into a differential mobility spectrometer set at a compensation voltage selected to extract ionized analyte molecules from the ionized analyte flow, introducing an output analyte flow of the differential mobility spectrometer into a mass spectrometer to detect and quantify analyte ions in the output analyte flow.
US09209002B2 Geiger-Muller counter tube and radiation measurement apparatus
A Geiger-Muller counter tube includes an enclosing tube, an anode conductor, a cathode conductor, an inert gas, and a quenching gas. The enclosing tube is at least partially cylindrical and has a sealed space. The anode conductor includes an anode electrode and a linear first metal lead portion. The anode electrode is arranged inside the space and formed in a rod shape. The first metal lead portion is connected to the anode electrode and supported at an end of the enclosing tube. The cathode conductor includes a cylindrical cathode electrode and a linear second metal lead portion. The cathode electrode surrounds a peripheral area of the anode electrode inside the space. The second metal lead portion is connected to the cathode electrode and supported at the end of the enclosing tube. The cathode electrode has a side surface through a part of which a through-hole passes.
US09209000B2 Gas flow distribution receptacles, plasma generator systems, and methods for performing plasma stripping processes
Systems, system components, and methods for plasma stripping are provided. In an embodiment, a gas flow distribution receptacle may have a rounded section that includes an inner surface defining a reception cavity, an outer surface forming an enclosed end, and a centerpoint on the outer surface having a longitudinal axis extending therethrough and through the reception cavity. First and second rings of openings provide flow communication with the plasma chamber. The second ring of openings are disposed between the first ring and the centerpoint, and each opening of the second ring of openings extends between the inner and outer surfaces at a second angle relative to the longitudinal axis that is less than the first angle and has a diameter that is substantially identical to a diameter of an adjacent opening and smaller than the diameters of an opening of the first ring of openings.
US09208998B2 Multi-station decoupled reactive ion etch chamber
A tandem processing-zones chamber having plasma isolation and frequency isolation is provided. At least two RF frequencies are fed from the cathode for each processing zones, where one frequency is about ten times higher than the other, so as to provide decoupled reactive ion etch capability. The chamber body is ground all around and in-between the two processing zones. The use of frequency isolation enables feed of multiple RF frequencies from the cathode, without having crosstalk and beat. A plasma confinement ring is also used to prevent plasma crosstalk. A grounded common evacuation path is connected to a single vacuum pump.
US09208995B2 Charged particle beam apparatus
Provided is a charged particle beam apparatus (111) to and from which a diaphragm (101) can be easily attached and detached, and in which a sample (6) can be arranged under vacuum and under high pressure. The charged particle beam apparatus includes: a lens barrel (3) holding a charged particle source (110) and an electron optical system (1,2,7); a first housing (4) connected to the lens barrel (3); a second housing (100) recessed to inside the first housing (4); a first diaphragm (10) separating the space inside the lens barrel (3) and the space inside the first housing (4), and through which the charged particle beam passes; a second diaphragm (101) separating the spaces inside and outside the recessed section (100a) in the second housing (100), and through which the charged particle beam passes; and a pipe (23) connected to a third housing (22) accommodating the charged particle source (110). The first diaphragm (10) is attached to the pipe (23), and the pipe (23) and the third housing (22) can be attached to and detached from the lens barrel (3) in the direction of the optical axis (30). A space (105) surrounded by the first housing (4) and the second housing (100) is depressurized, and the sample (6) arranged inside the recessed section (100a) is irradiated with a charged particle beam.
US09208994B2 Electron beam apparatus for visualizing a displacement of an electric field
The present invention provides an electron beam apparatus comprising a means for visualizing an axial displacement of a retarding electric field, and a means for adjusting axial displacement. The axial displacement visualizing means includes a reflective plate (6), and an optical system (2, 3) for converging a secondary electron beam (9) on the reflective plate (6), and the axial displacement adjusting means includes an incline rotation mechanism (8) for a sample stage (5). With this configuration, in electron beam apparatuses such as SEM and the like, such problems as visual field displacement caused by displacement of the axial symmetry of the electric field between an objective lens (3) and a sample (4) and inability to measure secondary electrons and reflected electrons that provide desired information can be eliminated.
US09208993B2 Charged-particle microscopy with enhanced electron detection
A method of investigating a flux of output electrons emanating from a sample in a charged-particle microscope, which flux is produced in response to irradiation of the sample by a beam of input charged particles, the method comprising the following steps: Using a detector to intercept at least a portion of the flux so as to produce a set {Ij} of pixeled images Ij of at least part of the sample, whereby the cardinality of the set {Ij} is M>1. For each pixel p, in each image Ij, determining the accumulated signal strength Sij, thus producing an associated set of signal strengths {Sij}. Using the set {Sij} to calculate the following values: An average signal strength S per pixel position i; A variance σ2S in S per pixel position i. Using these values S and σ2S to at least one map of said part of the sample, selected from the group comprising: A first map, representing variation in energy of detected electrons as a function of position. A second map, representing variation in number of detected electrons as a function of position. The set {Ij} may be produced in different ways, such as: By iteratively repeating a procedure whereby an entire nth image In is captured before proceeding to capture an entire (n+1)th image In+1, or By iteratively repeating a procedure whereby, at an nth pixel position, a plurality M of different detector samples is collected before proceeding to an (n+1)th pixel position.
US09208992B2 Method for controlling ion energy distribution
Methods for regulating ion energies in a plasma chamber are disclosed. An exemplary method includes placing a substrate in a plasma chamber, forming a plasma in the plasma chamber, controllably switching power to the substrate so as to apply a periodic voltage function to the substrate, and modulating, over multiple cycles of the periodic voltage function, the periodic voltage function responsive to a desired distribution of energies of ions at the surface of the substrate so as to effectuate the desired distribution of ion energies on a time-averaged basis.
US09208991B1 Ion implantation apparatus
An ion implantation apparatus includes a scanning unit scanning the ion beams in a horizontal direction perpendicular to the reference trajectory and a downstream electrode device disposed downstream of the scanning electrode device. The scanning electrode device includes a pair of scanning electrodes disposed to face each other in the horizontal direction with the reference trajectory interposed therebetween. The downstream electrode device includes an electrode body configured such that, with respect to an opening width in a vertical direction perpendicular to both the reference trajectory and the horizontal direction and/or an opening thickness in a direction along the reference trajectory, the opening width and/or the opening thickness in a central portion in which the reference trajectory is disposed is different from the opening width and/or the opening thickness in the vicinity of a position facing the downstream end of the scanning electrode.
US09208989B2 Lithography system and method of refracting
A charged particle lithography system for transferring a pattern onto the surface of a target, such as a wafer, comprising a charged particle source adapted for generating a diverging charged particle beam, a converging means for refracting said diverging charged particle beam, the converging means comprising a first electrode, and an aperture array element comprising a plurality of apertures, the aperture array element forming a second electrode, wherein the system is adapted for creating an electric field between the first electrode and the second electrode.
US09208986B2 Systems and methods for monitoring and controlling an electron beam
An X-ray tube assembly includes an electron beam transport tube, a beam tube protection assembly, and a control module. The electron beam transport tube includes an opening configured for passage of an electron beam, and includes an inner surface bounding the opening along a length of the electron beam transport tube. The beam tube protection assembly includes a plurality of beam protection electrode segments disposed within the opening of the electron beam transport tube and configured to protect the inner surface of the electron beam transport tube from contact with the electron beam. The control module is configured to determine a direction of the electron beam responsive to information received from the beam tube protection assembly.
US09208983B2 Ion generation method and ion source
An ion generation method uses a direct current discharge ion source provided with an arc chamber formed of a high melting point material, and includes: generating ions by causing molecules of a source gas to collide with thermoelectrons in the arc chamber and producing plasma discharge; and causing radicals generated in generating ions to react with a liner provided to cover an inner wall of the arc chamber at least partially. The liner is formed of a material more reactive to radicals generated as the source gas is dissociated than the material of the arc chamber.
US09208982B2 Systems and methods for distributing power to integrated circuit dies
Systems and methods for distributing power to a plurality of integrated circuit dies are provided. In some aspects, a system includes a substrate and a plurality of integrated circuit dies disposed on the substrate. Each of the plurality of integrated circuit dies includes a circuit and a target inductive element coupled to the circuit. The system also includes a power supply module configured to generate a source power signal. The system also includes at least one source inductive element configured to electromagnetically couple the source power signal to one or more of the plurality of the target inductive elements to generate one or more target power signals that supply power to one or more corresponding circuits.
US09208974B2 Disk type off-circuit tap changer
In one aspect of the present invention, a disk type off-circuit tap changer includes a switch base and a rotation shaft, where an upper end of the rotation shaft is connected to an operation positioning mechanism, a lower end of the rotation shaft is connected to moving contacts, the moving contacts fit with fixed contacts circumferentially arranged at a lower side of the switch base, and the fixed contacts are directly embedded into the switch base to form a whole body with the switch base.
US09208971B2 Keyboard insert
An insert for a keyboard comprises a molded body that comprises a pair of opposing sides. Each of the opposing sides has a groove that extends along at least a portion of the respective side. Each groove is adapted to receive a leveling wire from a keycap.
US09208966B2 Switch
A switch includes: a second conductor; a second movable electrode provided in a second hermetic space so as to be movable in a first direction in which it parts from the fixed electrode and in a second direction opposite the first direction; an opposed electrode slidably provided in the fixed electrode to face the second movable electrode so as to open from and be in contact with the second movable electrode in an open state and a closed state respectively; a second driver which generates a driving force and moves the second movable electrode in the first direction when performing an opening operation; and a driving force transmitting mechanism which moves the opposed electrode in the second direction by converting a direction of the driving force for moving the second direction opposite the moving direction of the second movable electrode when the second driver generates the driving force for moving the second movable electrode in the first direction.
US09208965B2 Switch cover and control for controllable lamp
An apparatus to cover the original wall switch controlling the lighting fixtures which now contain the wireless lamps such that a user cannot interrupt power to the lighting fixture by inadvertently changing the setting the wall switch.
US09208963B2 Safety door switch apparatus
An apparatus generates a machine operation enable signal as a function of a closed position of a movable safety access door of a safety guard for a work cell. A pivotal plate carries a handle and a switch receiver. A stationary non-contact proximity switch is mounted to be activated by the switch receiver when the door is closed and the pivotal plate is in a latched position. A ring receives a tongue projecting from the pivotal plate when the plate and handle are in the latched position. A pivotal hasp is movable around the ring into interference with the path of movement of the pivotal plate to block the plate from the fully latched position. A movable detent enables the plate and handle to be moved to the fully latched position only by moving the detent from exterior side of the plate.
US09208960B2 Electrode for vacuum circuit breaker, and vacuum interrupter using the electrode
An electrode for a vacuum circuit breaker comprises a cylindrical conducting body, a contact electrode as a combination electrode, and a plurality of slits provided on a surface area of the cylindrical conducting body, the slits being inclined with respect to an axial direction of the cylindrical conducting body, wherein an angle between the slits and the axial direction of the cylindrical conducting body is smaller as the slit becomes farther away from the contact electrode.
US09208958B2 Lithium ion capacitor
Provided is a lithium ion capacitor having a low internal resistance, a high energy density, and a high capacity retention rate.The lithium ion capacitor includes a positive electrode having a positive electrode active material layer formed on a roughened positive electrode current collector, a negative electrode having a negative electrode active material layer containing graphite-based particles formed on a negative electrode current collector, and an electrolytic solution containing a solution of a lithium salt in an aprotic organic solvent, wherein the total thickness of the positive electrode active material layer is 50 μm to 140 μm, and the ratio of mass of the positive electrode active material layer to the sum of the mass of the positive electrode active material layer and that of the negative electrode active material layer is 0.4 to 0.5.
US09208957B2 Electric storage cell and electric storage apparatus
An electric storage cell includes a casing configured to house an electric storage element and electrolyte, a charging reception antenna connected to the electric storage element and configured to receive electric power transmitted from a power feeding unit in a contactless manner, and a discharging transmission antenna connected to the electric storage element and configured to transmit electric power stored in the electric storage element in a contactless manner. The charging reception antenna and the discharging transmission antenna are arranged in the casing.
US09208956B2 Photoelectric conversion element and photoelectric conversion module
A light transmitting substrate having at least a light receiving surface, a first electrode located on the light transmitting substrate, a collector electrode located on at least a part of the first electrode and formed from a metal thin film, a photoelectric conversion portion located on an upper surface of the first electrode or the collector electrode, carrying a photosensitizer, and immersed in a carrier transport material, an insulating frame portion surrounding sides of the photoelectric conversion portion, and a second electrode located to be opposed to the first electrode above the photoelectric conversion portion are provided. Relation of Isc×Rh<0.05×Voc is satisfied, where Isc represents a short-circuit current value of a dye-sensitized solar cell, Rh represents a total value of electrical resistance values of the collector electrode, the first electrode, and the second electrode, and Voc represents an open circuit voltage value of the dye-sensitized solar cell.
US09208952B2 Electric double layer capacitor material
A material for constituting an electric double layer capacity that is stable at high temperatures and can expect a high electric capacity is provided. Such a material is an electric double layer capacitor material which is used as a material for constituting solid electrolytes 13 and 17 for an electric double layer capacitor 1 and is composed of a metal-salen complex compound.
US09208950B2 Multilayer ceramic capacitor and board for mounting the same
There is provided a multilayer ceramic capacitor including: a ceramic body in which a plurality of dielectric layers are laminated; a plurality of first and second internal electrodes formed to be alternately exposed to both end surfaces of the ceramic body with the dielectric layer interposed therebetween; and first and second external electrodes covering both end surfaces of the ceramic body, wherein the ceramic body includes an active layer forming capacitance by including the plurality of first and second internal electrodes and a cover layer formed on an upper portion or a lower portion of the active layer, wherein the active layer includes a first block in which a first region I, and a second region II, and a second block in which a third region III, and a fourth region IV.
US09208949B2 Multilayer ceramic capacitor
A multilayer ceramic capacitor may include a ceramic body having a plurality of dielectric layers; first and second internal electrodes disposed in the ceramic body to be alternately exposed to the first and second end surfaces of the ceramic body, having the dielectric layers interposed therebetween; and first and second external electrodes electrically connected to the first and second internal electrodes, respectively. The first and second external electrodes may include: first and second internal conductive layers; first and second insulating layers; and first and second external conductive layers.
US09208941B2 Apparatus and method for safe state retention
A transformer core apparatus includes a body of highly magnetically permeable material, a permanent magnet arranged in a safe state position for saturating the body with a permanent magnetic field, and means for removing the permanent magnetic field from the body.
US09208940B2 Winding structure, coil winding, coil part, and coil winding manufacturing method
There is provided a winding structure, a coil winding, a coil part, and a coil winding manufacturing method, which are capable of preventing occurrence of an extra space due to existence of a connecting wire part when two winding parts and a connecting wire part connecting the winding parts are formed.
US09208939B2 Transformer winding with cooling channel
At least two winding modules nested hollow-cylindrically one inside the other and extending around a common winding axis, wherein said winding modules are spaced radially apart from one another within at least one hollow-cylindrical cooling channel arranged therebetween by means of insulation strips, wherein the insulation strips have a cross-sectional form which avoid a surface profile radially with respect to the winding axis, the insulation strips including one of a fiber-reinforced epoxy, polyester resin, or from an unreinforced thermoplastic material.
US09208938B2 Inductor structure having embedded airgap
Various embodiments include inductor structures including at least one air gap for reducing capacitance between windings in the inductor structure. One embodiment includes an inductor structure having: a substrate; an insulation layer overlying the substrate; a conductive winding overlying the substrate within the insulation layer, the conductive winding wrapped around itself to form a plurality of turns substantially concentric about a central axis; an insulating structural support containing an air gap between the conductive winding and the insulation layer, the insulating structural support at least one of under, over or surrounding the plurality of turns of the conductive winding or between adjacent turns in the conductive winding; and at least one insulation pocket located radially inside a radially innermost turn in the plurality of turns with respect to the central axis.
US09208937B2 Choke having a core with a pillar having a non-circular and non-rectangular cross section
A choke includes a single-piece core entirely made of a same material, the single-piece core having two boards and a pillar located between the two boards, a winding space being located among the two boards and the pillar, wherein the pillar has a non-circular and non-rectangular cross section along a direction substantially perpendicular to an axial direction of the pillar, the cross section of the pillar has a first axis and a second axis intersecting with each other at a center of the cross section of the pillar and are substantially perpendicular with each other, the first axis is longer than the second axis, and the cross section of the pillar is substantially symmetrical to both of the first axis and the second axis.
US09208936B2 Gas-insulated delta transformer
An encapsulated delta transformer for medium to high voltages includes a hermetically sealed housing that encloses a volume, a delta shaped transformer arranged in the housing, and a passageway for a fluid. The passageway protruding through the housing and the volume enclosed by the passageway is in fluidal connection to an outside of the housing.
US09208935B2 Electronic component
An electronic component including a substrate, an insulating unit provided on the substrate, and a conductor coil provided within the insulating unit, wherein a distance from the outermost portion of the conductor coil in one axial direction to the outermost portion of the substrate in one axial direction is greater than 0.0125 times a length of the substrate in one axial direction, thus having enhanced reliability.
US09208929B2 GTMS connector for oil and gas market
A feed-through element for harsh environments is provided that includes a support body with at least one access opening, in which at least one functional element is arranged in an electrically insulating fixing material. The electrically insulating fixing material contains a glass or a glass ceramic with a volume resistivity of greater than 1.0×1010 Ωcm at the temperature of 350° C. The glass or a glass ceramic has a defined composition range in the system SiO2—B2O3-MO.
US09208926B2 Active cooling of medium voltage power umbilicals
An umbilical comprises an outer sheath defining an interior void; one or more power cores; and one or more forced convection cooling circuits disposed within the interior void proximate the power cores, typically at least one forced convection cooling circuit paired with each power core. The forced convection cooling circuit comprises a heat exchange delivery fluid conduit and a heat exchange return fluid conduit in fluid communication with the heat exchange delivery fluid conduit, where at least one of the fluid conduits is disposed either proximate to the other conduit or disposed within the other conduit. The forced convection cooling circuit has a length which has been determined to be sufficient to achieve a desired heat exchange that results in a desired efficient evacuation of heat energy from the power cores along a predetermined length of the umbilical.
US09208925B2 High performance, high temperature wire or cable
A wire or cable comprises a core (10) and a sheath including a wrapped film (16) of polyetherether ketone (PEEK) and a flameproofing layer (14) comprising mica particles dispersed in a polymer matrix such as a silicone. An outer coating (18) of PEEK or another polymer may be provided, which may be sintered to provide a tough outer protective covering. The PEEK and mica layers combine synergistically to provide a sheath of increased flame resistance as well as high flexibility and resistance to mechanical stresses, while being of reduced weight and diameter.
US09208917B2 Methods for manufacturing three-dimensional devices and devices created thereby
In certain exemplary embodiments of the present invention, three-dimensional micro-mechanical devices and/or micro-structures can be made using a production casting process. As part of this process, an intermediate mold can be made from or derived from a precision stack lamination and used to fabricate the devices and/or structures. Further, the micro-devices and/or micro-structures can be fabricated on planar or nonplanar surfaces through use of a series of production casting processes and intermediate molds. The use of precision stack lamination can allow the fabrication of high aspect ratio structures. Moreover, via certain molding and/or casting materials, molds having cavities with protruding undercuts also can be fabricated.
US09208910B2 Installation for welding nuclear fuel assembly skeletons, and corresponding methods of programming, of skeleton welding, and of making a fuel assembly
The installation provided includes at least one structure for receiving and holding guide tubes and structural elements; a carriage movable parallel to the guide tubes; at least one welding tool; and displacement means for moving the welding tool, the displacement means connecting the pincer to the carriage and presenting at least six degrees of freedom.
US09208909B2 Systems and methods for retaining and removing irradiation targets in a nuclear reactor
A retainer is placed on a conduit to control movement of objects within the conduit in access-restricted areas. Retainers can prevent or allow movement in the conduit in a discriminatory fashion. A fork with variable-spacing between prongs can be a retainer and be extended or collapsed with respect to the conduit to change the size of the conduit. Different objects of different sizes may thus react to the fork differently, some passing and some being blocked. Retainers can be installed in inaccessible areas and allow selective movement in remote portions of conduit where users cannot directly interface, including below nuclear reactors. Position detectors can monitor the movement of objects through the conduit remotely as well, permitting engagement of a desired level of restriction and object movement. Retainers are useable in a variety of nuclear power plants and with irradiation target delivery, harvesting, driving, and other remote handling or robotic systems.
US09208907B2 Method of validating nuclear reactor in-vessel detector output signals
A method to perform signal validation for either reactor fixed incore detectors and/or core exit thermocouples to enhance core monitoring systems. The method uses a combination of both measured sensor signals and expected signal responses to develop a ratio of measured to expected signals. The ratios are evaluated by determining the expected ratios for each detector based on the behavior of the remaining collection of detectors, taking into account the geometry/location of the other detectors. The method also provides for automatic removal of invalid detectors from the core power distribution determination if sufficient detectors remain on line to adequately characterize the core's power distribution.
US09208906B2 Passive system for cooling the core of a nuclear reactor
A system for passively cooling nuclear fuel in a pressurized water reactor during refueling that employs gravity and alignment of valves using battery reserves or fail in a safe position configurations to maintain the water above the reactor core during reactor disassembly and refueling. A large reserve of water is maintained above the elevation of and in fluid communication with the spent fuel pool and is used to remove decay heat from the reactor core after the reaction within the core has been successfully stopped. Decay heat is removed by boiling this large reserve of water, which will enable the plant to maintain a safe shutdown condition without outside support for many days.
US09208905B2 Auxiliary feedwater valve control apparatus of steam generator
An auxiliary feedwater valve control apparatus of a steam generator that operates an auxiliary feedwater valve in an auxiliary feed water system provided as a protective system of a main feed water system that feeds secondary cooling water to a steam generator, includes a water-level detection means that detects a water level of secondary cooling water in the steam generator, a water-level-deviation calculation means that calculates a deviation between a preset target water level and a water level detected by the water-level detection means, a valve-operation setting means that sets an aperture of the auxiliary feedwater valve corresponding to a deviation of the water level, and a valve drive means that outputs a signal for driving the auxiliary feedwater valve corresponding to setting by the valve-operation setting means.
US09208903B2 Compact nuclear reactor with integral steam generator
In an illustrative embodiment, a pressurized water nuclear reactor (PWR) includes a pressure vessel (12, 14, 16), a nuclear reactor core (10) disposed in the pressure vessel, and a vertically oriented hollow central riser (36) disposed above the nuclear reactor core inside the pressure vessel. A once-through steam generator (OTSG) (30) disposed in the pressure vessel includes vertical tubes (32) arranged in an annular volume defined by the central riser and the pressure vessel. The OTSG further includes a fluid flow volume surrounding the vertical tubes and having a feedwater inlet (50) and a steam outlet (52). The PWR has an operating state in which feedwater injected into the fluid flow volume at the feedwater inlet is converted to steam by heat emanating from primary coolant flowing inside the tubes of the OTSG, and the steam is discharged from the fluid flow volume at the steam outlet.
US09208901B2 Memory buffer having accessible information after a program-fail
A memory device, and a method of operating same, utilize a memory buffer associated with a memory array to maintain information to be available subsequent to a program-fail event associated with the memory array.
US09208895B1 Cell current control through power supply
Techniques and corresponding circuitry are presented for controlling the amount of current flowing through the cells of a memory circuit during a sensing operation though a feedback arrangement. The amount of current supplied to bit lines from an external power supply by regulation circuitry is compared with a reference level. Based on this comparison, the level on the control gates of clamp transistors in the sense amp circuits is set to control the amount of current supplied to the bit lines. This can reduce device variation since the levels are replicated locally at the generator on the chip. The circuitry can also be used more generally to determine the current level drawn during a sensing operation.
US09208885B2 Vertical structure semiconductor memory devices and methods of manufacturing the same
A semiconductor memory device includes: a semiconductor region extending vertically from a first region of a substrate; a plurality of gate electrodes disposed on the first region of the substrate in a vertical direction, but separated from each other along a sidewall of the semiconductor region; a gate dielectric layer disposed between the semiconductor region and the plurality of gate electrodes; a substrate contact electrode extending vertically from the impurity-doped second region of the substrate; and an insulating region formed as an air gap between the substrate contact electrode and at least one of the plurality of gate electrodes.
US09208884B2 Nonvolatile semiconductor memory device
A control circuit is configured to, during an erase operation, set a voltage of a first line connected to a selected cell unit to a voltage larger than a voltage of a gate of a first transistor included in the selected cell unit by an amount of a first voltage. The control circuit is configured to, during the erase operation, set a voltage difference between a voltage of a first line connected to an unselected cell unit and a voltage of a gate of a first transistor included in the unselected cell unit to a second voltage, the second voltage differing from the first voltage. In addition, the control circuit is configured to, during the erase operation, apply in the selected cell unit and the unselected cell unit a third voltage to a gate of at least one of dummy memory transistors in a dummy memory string, and apply a fourth voltage to a gate of another one of the dummy memory transistors in the dummy memory string, the fourth voltage being lower than the third voltage.
US09208882B2 System and method for reading memory cells by accounting for inter-cell interference
A system including a read module and a detector module. The read module is configured to generate a plurality of read signals by reading a plurality of memory cells located along a bit line or a word line. The detector module is configured to detect a sequence of data stored in the plurality of memory cells based on (i) the plurality of read signals, and (ii) a plurality of reference signals associated with the plurality of memory cells. One of the plurality of reference signals associated with a first memory cell of the plurality of memory cells includes one of a first signal and a second signal. The first signal is free of interference from a second memory cell adjacent to the first memory cell along the bit line or the word line. The second signal accounts for interference from the second memory cell.
US09208874B2 Nonvolatile memory device having variable resistive elements and method of driving the same
A method is provided for driving a nonvolatile memory device. The method includes selecting first write drivers based on a predetermined current, performing a first program operation on resistive memory cells corresponding to the first write drivers, verifying whether the resistive memory cells have passed or failed in the first program operation and sorting information regarding failed bit memory cells that failed in the first program operation, selecting second write drivers based on the sorted failed bit memory cell information, and performing a second program operation on resistive memory cells corresponding to the second write drivers.
US09208871B2 Implementing enhanced data read for multi-level cell (MLC) memory using threshold voltage-drift or resistance drift tolerant moving baseline memory data encoding
A method and apparatus are provided for implementing enhanced data read for multi-level cell (MLC) memory using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding. A data read back for data written to the MLC memory using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding is performed, higher voltage and lower voltage levels are compared, and respective data values are identified responsive to the compared higher voltage and lower voltage levels.
US09208869B2 Resistive RAM, method for fabricating the same, and method for driving the same
A resistive random access memory (ReRAM) includes a first electrode, a threshold switching layer formed over the first electrode and configured to perform a switching operation according to an applied voltage, a resistance change layer formed over the threshold switching layer, and configured to perform a resistance change operation, and a second electrode formed over the resistance change layer, wherein the threshold switching layer comprises a stoichiometric transition oxide while the resistance change layer comprises a non-stoichiometric transition metal oxide.
US09208867B2 Electronic device and method for fabricating the same
A semiconductor memory includes a substrate configured to include a plurality of active regions which are defined by isolation layers extending in a first direction and word lines extending in a second direction intersecting the first direction; source line contacts configured to be alternately disposed over the active regions arranged in the first and second directions and disposed over each of the active regions arranged in a third direction intersecting the first and second directions; source lines configured to extend in the third direction while being coupled to the source line contacts; contacts configured to be disposed over each of the active regions over which the source line contacts are not disposed; variable resistance elements configured to be disposed over each of the contacts; bit line contacts configured to be disposed over each of the variable resistance elements; and bit lines configured to extend in a fourth direction intersecting the first to third directions while being coupled to the bit line contacts.
US09208864B2 Semiconductor memory with integrated biologic element
A memory includes cytokines, such as macromolecule proteins, as a poly-state data storage. Each fold state of multiple fold states of a protein are associated with a data value. Current flow through the protein is associated with a resistance of the protein associated with its current fold state. Application of light, electric fields or heat via an associated element or elements facilitates placement of a protein in a fold state that corresponds to an associated resistance and correlates with an incoming data value. Measuring of current or resistance allows for reading of a data value associated with the protein.
US09208862B2 Resistive random-access memory cells
Improved random-access memory cells, complementary cells, and memory devices. RRAM cells are provided for storing information in a plurality of programmable cell states. An electrically-insulating matrix is located between first and second electrodes such that an electrically-conductive path, which extends in a direction between the electrodes, can be formed within the matrix on application of a write voltage to the electrodes. The programmable cell states correspond to respective configurations of the conductive path in the matrix. An electrically-conductive component extends in a direction between the electrodes in contact with the insulating matrix. The arrangement is such that the resistance presented by the component to a cell current produced by a read voltage applied to the electrodes to read the programmed cell state is at least about that of the conductive path and at most about that of the insulating matrix in any of the cell states.
US09208861B2 Phase hysteretic magnetic Josephson junction memory cell
One embodiment describes a memory cell. The memory cell includes a phase hysteretic magnetic Josephson junction (PHMJJ) that is configured to store one of a first binary logic state corresponding to a binary logic-1 state and a second binary logic state corresponding to a binary logic-0 state in response to a write current and to generate a superconducting phase based on the stored digital state. The memory cell also includes at least one Josephson junction having a critical current that is based on the superconducting phase of the PHMJJ and being configured to provide an output corresponding to the stored digital state in response to a read current.
US09208858B1 Static random access memory with assist circuit
A static random access memory (SRAM) includes a first port word line, a second port word line, a first port bit line and a first port complementary bit line, a second port bit line and second port complementary bit line, and a memory cell having a data node coupled to the first and second port bit lines and a complementary data node coupled to the first and second port complementary bit lines. The first and second port word lines control access to the dual port memory cell. A circuit couples the second port bit line to a high voltage supply node during a write logic high operation to the data node through the first port bit line and couple the second port complementary bit line to the high voltage supply node during a write logic high operation to the complementary data node through the first port complementary bit line.
US09208845B2 Low energy magnetic domain wall logic device
A logic gate device is disclosed. The logic gate device structure can include a magnetic tunnel junction on a soft ferromagnetic wire to provide a readout. One input contact can be at one end of the soft ferromagnetic wire and a second input contact can be at the other end of the soft ferromagnetic wire to control domain wall position in the soft ferromagnetic wire.
US09208844B1 DDR retiming circuit
An integrated circuit receives a DDR (Double Data Rate) data signal and an associated DDR clock signal, and communicates those signals from integrated circuit input terminals a substantial distance across the integrated circuit to a subcircuit that then receives and uses the DDR data. Within the integrated circuit, a DDR retiming circuit receives the DDR data signal and the associated DDR clock signal from the terminals. The DDR retiming circuit splits the DDR data signal into two components, and then transmits those two components over the substantial distance toward the subcircuit. The subcircuit then recombines the two components back into a single DDR data signal and supplies the DDR data signal and the DDR clock signal to the subcircuit. The DDR data signal and the DDR clock signal are supplied to the subcircuit in such a way that setup and hold time requirements of the subcircuit are met.
US09208839B2 Predicting saturation in a shift operation
Apparatus for data processing and a method of data processing are provided. Shift circuitry performs a shift operation in response to a shift instruction, shifting bits of an input data value in a direction specified by the shift instruction. Bit location indicator generation circuitry and comparison circuitry operate in parallel with the shift circuitry. The bit location indicator indicates at least one bit location in the input data value which must not have a bit set if the shifted data value is not to saturate. Comparison circuitry compares the bit location indicator with the input data value and indicates a saturation condition if any bits are indicated by the bit position indicator for bit locations which hold set bits in the input data value. A faster indication of the saturation condition thus results.
US09208836B1 Chip-to-chip signaling with improved bandwidth utilization
Integrated circuit devices transmit data via a shared signaling link in back to back burst intervals without contention and without insertion of performance-degrading bubbles by disabling output drivers during an interval that occurs at an edge or “margin” of a given burst interval and thus at a timing boundary between the back to back burst intervals. In “bit-level margining” embodiments, the driver-disabling operation or “margining” is performed during a portion of each bit interval (i.e., a unit of time allocated to transmission of a bit or other symbol. In “burst-level margining” embodiments, output drivers are disabled over an entire bit interval that occurs at the margin of a given burst interval.
US09208833B2 Sequential memory operation without deactivating access line signals
Some embodiments include apparatuses and methods for activating a signal associated with an access line coupled to different groups of memory cells during a memory operation of a device, and for sensing data lines of the device during different time intervals of the memory operation to determine the value of information stored in the memory cells. Each of the data lines can be coupled to a respective memory cell of each of the groups of memory cells. In at least one of such apparatuses and methods, the signal applied to the access line can remain activated during the memory operation.
US09208831B2 Semiconductor memory device
A semiconductor device comprises a first pair of signal lines and a first control circuit. The first control circuit precharges each of the first pair of signal lines to a first voltage in response to a precharge signal, and changes the voltage level of each of the first pair of signal lines to a second voltage different from the first voltage when a deep power down signal is input.
US09208829B2 Designated memory sub-channels for computing systems and environments
A memory channel can be divided into two or more memory sub-channels, wherein each one of the memory sub-channels includes two or more memory components configured to store data made accessible on that memory sub-channel, and wherein the two or more memory components in each one of the memory sub-channels are respectively connected via at least one transmission line and can be individually accessed (addressed) on their associated sub-channel.
US09208827B2 Semiconductor stacked package
A semiconductor stacked package may include a substrate formed with a plurality of coupling pads, a plurality of semiconductor chips stacked on the substrate. The semiconductor stacked package may also include first circuit units disposed on each of the semiconductor chips, and electrically connected with the coupling pads by the medium of bonding pads. The semiconductor stacked package may include second circuit units disposed on each of the semiconductor chips and electrically disconnected with the coupling pads, connection pads disposed on each of the semiconductor chips and corresponding to the second circuit units, and blocking circuits coupled between the second circuit units and the connection pads. The semiconductor stacked package may also include bonding wires electrically connecting the bonding pads and the coupling pads.
US09208826B2 Semiconductor storage device with two control lines
Provided is a semiconductor storage device with which it is possible to write information to individual memory cells in which a storage node is configured with an oxide semiconductor insulated-gate FET source and a terminal of a capacitor element being connected. A storage node is configured by connecting a source of a first transistor to one terminal of a capacitor element. A drain of the first transistor and a source of a second transistor are connected to each other. A drain of the second transistor is a data input terminal. A first control terminal, which is formed by a gate of the first transistor being connected to another terminal of the capacitor element, is connected to a wordline, which extends in the row direction. A second control terminal, which is formed of a gate of the second transistor terminal, is connected to a write control line, which extends in the column direction. The storage node is connected to a gate of a third transistor, and a current flowing between a drain and a source of the third transistor is controlled according to a voltage level of the storage node.
US09208822B2 Media clip creation and distribution systems, apparatus, and methods
Various embodiments for creating media clips are disclosed. Media clips are created by a server in response to receiving primary media recordings from one or more content capture devices or content capture and tagging devices, and one or more instances of activity identification information from content tagging devices. The server creates media clips from by copying portions of the primary media recordings in accordance with the activity identification information, such as a time that a user selected an activity indicator displayed on a respective content tagging device. The media clips are then stored in association with at least users who provided the activity identification information to the server.
US09208821B2 Method and system to process digital audio data
A method to process digital audio data displays the digital audio data in one or more tracks along a time line in a graphical interface of a computer system and defines arrange regions within the time line of the digital audio data as objects for manipulation. Tracks within a selected arrange region are processed as an entity in accordance with commands received through the graphical user interface.
US09208820B2 Optimized data placement for individual file accesses on deduplication-enabled sequential storage systems
Data deduplication for data storage tapes comprises determining the read throughput of a deduplicated set of individual files on a single data storage tape, and determining a placement of deduplicated file data on a single data storage tape to reduce an average number of per-file gaps on the tape. Deduplicated file data is placed on the single data storage tape based on said placement to increase an average read throughput for a deduplicated set of individual files.
US09208819B1 Dynamic split-frame preview of video editing effects
This disclosure relates to dynamic split-frame preview of video editing effects. An editing component determines a set of editing effects for the video, generates a copy of the video, applies the set of editing effects to the copy, and provides the video and the copy to a rendering component. The rendering component generates a mask based on a set of mask criteria, renders a split-frame composite video using the video and the edited video based at least in part on the mask, and provides playback of the split-frame composite video. The split-frame composite video provides a dynamic split-frame preview of video editing effects, wherein one frame includes the video, and another frame includes the edited copy of the video.
US09208815B1 Data storage device dynamically reducing coast velocity during seek to reduce power consumption
A data storage device is disclosed comprising a disk comprising a plurality of tracks, and an actuator configured to actuate a head over the disk. While seeking the head from a first track toward a second track, a velocity of the head over the disk is measured, and a deceleration distance and a deceleration time is generated based on the measured velocity. A coast velocity is generated based on the measured velocity, the deceleration distance, and the deceleration time, and a control signal applied to the actuator is adjusted based on the measured velocity and the coast velocity.
US09208808B1 Electronic system with unload management mechanism and method of operation thereof
An apparatus includes: a media; a head assembly over the media; a head actuation motor coupled to the head assembly; control circuitry, coupled to the head actuation motor, configured to position the head assembly; and a head loading ramp, adjacent to the media; wherein: the control circuitry is further configured to: generate a seek count; and park the head assembly, off of the media, on the head loading ramp, controlling a speed of the head actuation motor based on the seek count.
US09208804B1 Magnetic head and magnetic recording and reproducing apparatus
A magnetic head of an embodiment includes a stack, side shields, and a first and a second magnetic shield. The stack includes a pin layer having a fixed magnetization direction, a first free layer having a magnetization direction to change in accordance with an external magnetic field, a second free layer antiferromagnetically exchange-coupled with the first free layer and having a magnetization direction to change in accordance with the field, and an antiferromagnetic layer exchange-coupled with the second free layer. A magnetic field is applied from the side shields to the first and second free layers, and a direction of the magnetic field is substantially parallel to the magnetization direction of one of the first and second free layers and substantially antiparallel to the magnetization direction of the other, and a magnetic volume of the one is larger than a magnetic volume of the other.
US09208803B2 Magnetic head, magnetic head assembly, and magnetic recording apparatus
A magnetic head includes a first electrode layer, a metal magnetic layer, an organic molecular having a pi conjugated structure, an inorganic layer, and a second electrode layer.
US09208801B2 CoFe/Ni multilayer film with perpendicular anisotropy for microwave assisted magnetic recording
A spin transfer oscillator with a seed/SIL/spacer/FGL/capping configuration is disclosed with a composite seed layer made of Ta and a metal layer having a fcc(111) or hcp(001) texture to enhance perpendicular magnetic anisotropy (PMA) in an overlying (A1/A2)X laminated spin injection layer (SIL). Field generation layer (FGL) is made of a high Bs material such FeCo. Alternatively, the STO has a seed/FGL/spacer/SIL/capping configuration. The SIL may include a FeCo layer that is exchanged coupled with the (A1/A2)X laminate (x is 5 to 50) to improve robustness. The FGL may include an (A1/A2)Y laminate (y=5 to 30) exchange coupled with the high Bs layer to enable easier oscillations. A1 may be one of Co, CoFe, or CoFeR where R is a metal, and A2 is one of Ni, NiCo, or NiFe. The STO may be formed between a main pole and trailing shield in a write head.
US09208786B2 Speech recognition using loosely coupled components
An automatic speech recognition system includes an audio capture component, a speech recognition processing component, and a result processing component which are distributed among two or more logical devices and/or two or more physical devices. In particular, the audio capture component may be located on a different logical device and/or physical device from the result processing component. For example, the audio capture component may be on a computer connected to a microphone into which a user speaks, while the result processing component may be on a terminal server which receives speech recognition results from a speech recognition processing server.
US09208782B2 Speech processing device, speech processing method, and speech processing program
A speech processing device includes a reverberation characteristic selection unit configured to correlate correction data indicating a contribution of a reverberation component based on a corresponding reverberation characteristic with an adaptive acoustic model which is trained using reverbed speech to which a reverberation based on the corresponding reverberation characteristic is added for each of reverberation characteristics, to calculate likelihoods based on the adaptive acoustic models for a recorded speech, and to select correction data corresponding to the adaptive acoustic model having the calculated highest likelihood, and a dereverberation unit configured to remove the reverberation component from the speech based on the correction data.
US09208780B2 Audio signal section estimating apparatus, audio signal section estimating method, and recording medium
The processing efficiency and estimation accuracy of a voice activity detection apparatus are improved. An acoustic signal analyzer receives a digital acoustic signal containing a speech signal and a noise signal, generates a non-speech GMM and a speech GMM adapted to a noise environment, by using a silence GMM and a clean-speech GMM in each frame of the digital acoustic signal, and calculates the output probabilities of dominant Gaussian distributions of the GMMs. A speech state probability to non-speech state probability ratio calculator calculates a speech state probability to non-speech state probability ratio based on a state transition model of a speech state and a non-speech state, by using the output probabilities; and a voice activity detection unit judges, from the speech state probability to non-speech state probability ratio, whether the acoustic signal in the frame is in the speech state or in the non-speech state and outputs only the acoustic signal in the speech state.
US09208779B2 Mixture of n-gram language models
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for creating a static language model from a mixture of n-gram language models. One of the methods includes receiving a set of development sentences W, receiving a set of language models GM, determining a set of n-gram language model weights λM based on the development sentences W and the set of language models GM, determining a set of sentence cluster weights γC, each of the sentence cluster weights corresponding to a cluster in a set of sentence clusters, each cluster in the set of sentence clusters associated with at least one sentence from the set of development sentences W, and generating a language model from the set of language models GM, the set of n-gram language model weights λM, the set of sentence clusters, and the set of sentence cluster weights γC.
US09208777B2 Feature space transformation for personalization using generalized i-vector clustering
Personalization for Automatic Speech Recognition (ASR) is associated with a particular device. A generalized i-vector clustering method is used to train i-vector parameters on utterances received from a device and to classify test utterances from the same device. A sub-loading matrix and a residual noise term may be used when determining the personalization. A Universal Background Model (UBM) is trained using the utterances. The UBM is applied to obtain i-vectors of training utterances received from a device and a Gaussian Mixture Model (GMM) is trained using the i-vectors. During testing, the i-vector for each utterance received from the device is estimated using the device's UBM. The utterance is then assigned to the cluster with the closest centroid in the GMM. For each utterance, the i-vector and the residual noise estimation is performed. Hyperparameter estimation is also performed. The i-vector estimation and hyperparameter estimation are performed until convergence.
US09208773B2 Headset noise-based pulsed attenuation
A headset having a talk-through microphones incorporates an audio circuit that compresses a signal representing sounds detected by the talk-through microphones in response to the audio circuit detecting the onset of a peak (positive and/or negative) in the signal that exceeds a predetermined voltage level (positive and/or negative voltage level, perhaps a predetermined magnitude of voltage from a zero voltage level), and that does so with a rate of change in voltage level that exceeds a predetermined rate of change in voltage level, the degree of compression possibly being a compression to or near a zero amplitude (perhaps to or near a zero voltage level) and the duration of the compression possibly being controlled by a timing circuit set to a predetermined period of time that may be retriggerable while amidst the predetermined period of time.
US09208769B2 Hybrid adaptive headphone
An adaptive noise-cancelling headphone including an earcup housing having a driver for outputting sound to a user positioned therein. The headphone further including an active noise control assembly. The active noise control assembly may include an ambient microphone capable of detecting an ambient noise outside of the housing and an error microphone capable of detecting an earcup noise inside of the housing. Based on the detected noise, active noise cancellation within the headphone is either enabled or disabled. The headphone may further include a passive noise control assembly. The passive noise control assembly may include an acoustic valve associated with an acoustic vent formed within the earcup housing. The acoustic valve is capable of being modified between an open configuration to decrease sound attenuation and a closed configuration to increase sound attenuation in response to the detected ambient noise so as to improve an acoustic performance of the earcup.
US09208762B1 Musical systems and methods
Musical performance/input systems, methods, and products can accept user inputs via a user interface, generate, sound, store, and/or modify one or more musical tones. The user interface can present one or more regions corresponding to related chords. A set of related chords and/or a set of rhythmic patterns are generated based on a selected instrument and a selected style of music. The related chords can be modified via one or more effects units.
US09208761B2 Musical instrument tilter and cymbal stand
A boom tilter includes a tilter body, a boom, a holder, a bolt and nut. The tilter body is attached to a support post to be rotatable around a first axis, which is the axis of the support post. The holder is fitted to the tilter body to be rotatable around a second axis, which is orthogonal to the first axis. The boom is held by the holder to be rotatable around a third axis, which is the axis of the boom, and so that the boom can slide along the third axis.
US09208758B2 Unified octave/register key and vent for musical wind instruments
The present technology relates generally to musical wind instrument key mechanisms, and more particularly to the octave or register vents that are employed on musical wind instruments to cause the instrument to play pitches an octave or more higher in frequency relative to the frequency obtained prior to actuation of the vent. In some embodiments, an octave/register key for affixing to a musical wind instrument in which an air column is formed includes a core having a core aperture therein. The core is reversibly moveable between a first position in which the core aperture is in fluid communication with the air column and a second position in which the core aperture is out of fluid communication with the air column.
US09208757B2 Tune stabilizing device for a stringed instrument
A tune stabilizing device for a stringed instrument, comprising a string clamping means comprising a floating base plate and at least one clamping block adapted to cooperatively engage and releasably secure a plurality of instrument strings, and a fine-tuning means, which extends from, and is integral with, said clamping means, and has a plurality of fine tuning screws in one-to-one correspondence with said instrument strings, whereby turning one of said screws presses on one of said strings, altering the tune of the string.
US09208755B2 Low power application execution on a data processing device having low graphics engine utilization
A method includes determining, through test instructions executing on a processor of a data processing device, utilization of a graphics engine of the processor by an application executing thereon based on initiation thereof through a driver associated with the processor and/or an operating system executing on the data processing device, and detecting, through the test instructions, an idle state of one or more non-graphics engine(s) of the processor. The method also includes transitioning, through the processor, a frame buffer associated therewith into a self-refresh mode of low power utilization thereof, and copying data related to the execution of the application to a memory of the data processing device. Further, the method includes clock-gating the one or more non-graphics engine(s) to reduce a power consumption of the data processing device, and enabling the graphics engine to utilize the copied data in the memory for continued execution of the application.
US09208754B2 Method and apparatus for controlling a display of a portable electronic device
A method and apparatus for controlling a display of a portable electronic device are provided. The method comprises generating a screen comprising a list on the display. The list comprises one or more row elements, with each row element comprising one or more column sub-elements. At least a portion of one of the column sub-elements of at least one of the row elements is truncated. Upon selection of a row element, the screen is enabled for scrolling of that row element. Enabling scrolling comprises loading the truncated portion of the selected row element into a pre-buffer. The method further comprises receiving a scrolling input, and updating the screen on the display to scroll the row element, bringing the truncated portion into view. The selected row is scrolled while maintaining the series of column sub-elements in the row without reference to other rows.
US09208752B2 Method for synchronous representation of a virtual reality in a distributed simulation system
A method for synchronous representation of a virtual reality terrain in the form of polygons on a plurality of display devices by a plurality of connected simulation computers, may include generating position data specifying which region of the terrain was changed by a first computer; generating elevation data of the changed region by the computer; communicating position and elevation data the first computer to a second computer; selecting, on the basis of the position data, those polygons of the terrain which lie in the changed region by a control unit of the second computer; subdividing the selected polygons in each case into a plurality of sub-polygons by a tessellator unit of the second computer; calculating spatial coordinates of the sub-polygons in accordance with the elevation data by the second computer; and displaying the sub-polygons on a display device connected to the second computer.
US09208751B2 GPU-based LCD dynamic backlight scaling
Apparatus and methods scale a backlight of a display. A graphics processing unit (GPU) is configured to calculate a histogram. A central processing unit (CPU) is configured to control the backlight of the display responsive to a backlight level that is based on the histogram.
US09208749B2 Electronic device and method for enhancing readability of an image thereof
An electronic device is provided, which includes a light sensor, an algorithm engine, an adjustment engine, and a display. The light sensor detects an ambient brightness around the electronic device. The algorithm engine is coupled to the light sensor. The algorithm engine determines at least one adjustment function according to the ambient brightness. The adjustment engine is coupled to the algorithm engine. The adjustment engine adjusts the luminance component of each pixel of an image according to the at least one adjustment function to enhance the brightness and/or the contrast of the image. The display is coupled to the adjustment engine for displaying the adjusted image.
US09208744B2 Display device and electronic apparatus
According to an aspect, a display device includes a liquid crystal layer, a transparent electrode, a reflective electrode, a drive circuit, and a controller. The controller is configured to switch a mode between a first mode for driving the drive circuit at a liquid-crystal inversion frequency of a first frequency so that screen display using light reflected by the reflective electrode is performed and a second mode for driving the drive circuit at a liquid-crystal inversion frequency of a second frequency higher than the first frequency so that screen display using light passing through the opening of the reflective electrode is performed.
US09208739B2 Method and device of gate driving in liquid crystal display
A gate driver for controlling a display apparatus is disclosed. The gate driver includes a logic circuit for generating a plurality of switch signals, a breaking signal and a plurality of sharing signals, a plurality of buffers, each for determining to provide a first voltage or a second voltage according to one of the plurality of switch signals to generate a gate driving signal, and a charge recycle module for sharing charges with a plurality of loads according to the plurality of sharing signals.
US09208735B2 Voltage adjustment method and apparatus of liquid crystal display panel
A voltage adjustment method and apparatus of a liquid crystal display (LCD) panel. The method comprises: acquiring initial reference voltage (RV) values of gamma voltage pairs corresponding to respective gray scales, which includes a first and a second gamma voltage; fixing the first gamma voltages, adjusting respectively the second gamma voltages in accordance with flicker values of the brightness of the LCD panel and the initial RV values of the second gamma voltages, and acquiring the adjusted voltage values of the second gamma voltages; and adjusting synchronously, with an equal proportion, the initial RV value of the first gamma voltage and the adjusted voltage value of the second gamma voltage corresponding to each gray scale respectively, so that the brightness corresponding to the gray scale is adjusted to be the same as the brightness corresponding to the same gray scale in the gamma standard voltage curve.
US09208734B2 Shift register and driving method thereof
A shift register includes an input terminal, an output terminal, a first clock signal terminal, a second clock signal terminal, a first level signal terminal, a second level terminal, a first capacitor and a second capacitor, and five transistors. The five transistors are controlled by first and second clock signals applied to the respective first and second signal terminals to shift a signal received from the input terminal to the output terminal with a half cycle period delay while maintaining a stable level of the shifted signal at the output terminal.
US09208733B2 Systems and methods for monitoring LCD display panel resistance
Systems and methods for monitoring internal resistance of a display. The method may include supplying the display via a capacitor with a first voltage configured to enable the display to receive one or more touch inputs. After supplying the display with the first voltage, the method may include discharging the capacitor to a second voltage configured to enable the display to display image data. The method may then monitor a discharge waveform that corresponds to when the capacitor discharges from the first voltage to the second voltage. Based at least in part on the discharge waveform, the method may determine a chip on glass resistance value and a flex on glass resistance value that correspond to an internal resistance of the display.
US09208729B2 Low color shift multi-view display device and display method thereof
According to various embodiments of the invention, gamma curves for multiple pixel groups can be calibrated using look-up tables or by using reference voltage groups provided by gamma voltage generators so that the pixels can display multiple images with correct gray levels at different view angles. Therefore, color shift can be avoided or lessened without necessarily using extra circuitry on the display panel. Also, any related light transmittance or light utilization efficiency reduction may be decreased or eliminated.
US09208725B2 Displays with pixel circuits capable of compensating for transistor threshold voltage drift
A display device includes a pixel array. The pixel array includes multiple pixel elements. At least one pixel element includes an OLED, a first transistor, a second transistor, a third transistor, a first capacitor and a second capacitor. The first transistor has a first terminal coupled to an anode of the OLED for driving the OLED. The second transistor is coupled between a second terminal of the first transistor and a reset voltage and has a control terminal receiving a reset signal. The third transistor is coupled between the anode of the OLED and a control terminal of the first transistor and has a control terminal receiving a compensation signal. The first capacitor is coupled between the control terminal of the first transistor and the anode of the OLED. The second capacitor is coupled to the first capacitor and the control terminal of the first transistor.
US09208720B2 Organic electroluminescence displaying apparatus which suppresses a defective display caused by a leak current at a time when an emission period controlling transistor is off
An organic EL displaying apparatus which suppresses a defective display caused by a leak current at a time when an emission period controlling transistor is off is provided. The organic EL displaying apparatus comprises a plurality of pixels each of which includes an organic EL element, a power supply line, a driving transistor and the emission period controlling transistor, a data line, and a control line. In this apparatus, in a certain one of the pixels, a resistance Roff—ILM between source and drain electrodes of the emission period controlling transistor in an off state of the emission period controlling transistor, and a resistance Rbk—Dr between source and drain electrodes of the driving transistor in a state that a minimum gradation displaying data voltage has been applied to a gate electrode of the driving transistor satisfy Roff—ILM≧Rbk—Dr.
US09208718B2 Method of compensating gamma reference voltages
In a method of compensating gamma reference voltages includes setting a plurality of emission signal on-duty ratios that have different values in a range from 0% to 100%, setting a plurality of data offsets for the emission signal on-duty ratios and each of the data offsets being set based on a color shift, the color shift being caused according to the emission signal on-duty ratios, generating a plurality of compensation gamma reference voltages by multiplying a gamma reference voltage by the data offsets, and applying the compensation gamma reference voltages to an organic light emitting display panel in dimming ranges that include the emission signal on-duty ratios, respectively.
US09208716B2 Display drive circuit including an output terminal
A display drive circuit formed in a chip manufactured by a chip on glass implementation, which is connected to lead lines formed on a glass substrate, includes a rectangularly-shaped substrate, a power supply line formed on the substrate, the line being elongated along the longer side of the rectangular shaped substrate, a plurality of output terminals formed on the rectangular shaped substrate, the output terminal being disposed along the power supply line, a plurality of bump electrodes, each of which connects one of the output terminal to one of the lead lines, switches disposed along the power supply line, each of which is connected between the one of the output terminals and the power supply line, a single power supply terminal, which is disposed near the middle of the power supply line, being connected to the power supply line.
US09208713B2 Pixels group and display panel having the same
A pixels group includes first to fourth pixels disposed in a 2*2 matrix. Each of the first to fourth pixels includes first to third sub-pixels. Each of the first sub-pixels of first to fourth pixels has a first color. The second sub-pixel of first pixel and the second sub-pixel of fourth pixel have a second color. The third sub-pixel of first pixel and the third sub-pixel of fourth pixel have a third color. The second sub-pixel of second pixel and the second sub-pixel of third pixel have a fourth color. The third sub-pixel of second pixel and the third sub-pixel of third pixel has a fifth color.
US09208710B2 Semiconductor device
The present invention provides a semiconductor device in which a power line is not affected by noise due to a voltage drop caused by instantaneous high-current consumption in the buffer portion and that has no possibility that a logic portion malfunctions. In a case where the same potential is supplied to a logic portion and a buffer portion, by a method in which separate FPC terminals are used for the logic portion and the buffer portion, or by a method in which the FPC terminal is shared but a power line is branched for the logic portion and the buffer portion at a point close to the FPC terminal, a problem that the logic portion is affected by noise generated by a voltage drop of the power line due to instantaneous high-current consumption in the buffer portion can be prevented.
US09208709B2 Backlight for a display
Systems and devices are provided for using an organic light emitting diode (OLED) as a backlight for a liquid crystal display (LCD) device. In one embodiment, an OLED backlight may include one or more OLED elements disposed between two substrates. The OLED backlight may be optically bonded to the back of an LCD, and may further be electrically connected with the LCD active matrix. In one embodiment, information transmitted to selected pixels of the LCD active matrix may also be used by elements of the OLED backlight which are electrically connected to the selected LCD pixels. For example, the OLED backlight may respond to grayscale information transmitted to selected LCD pixels by emitting a corresponding intensity of light. In some embodiments, the LCD device may include other functions, such as touch sensing capabilities, which may be integrated with the LCD and OLED backlight.
US09208705B2 Heat sink and backlight module using same
The present invention provides a heat sink and a backlight module using the heat sink. The heat sink includes a first bottom plate, a first side plate formed on the first bottom plate, and a second bottom plate mounted on the first bottom plate. The first bottom plate and the first side plate are integrally formed together. The second bottom plate is fixed by screws to an end of the first bottom plate that is distant from the first side plate. The first bottom plate is made of aluminum extrusion material. The second bottom plate is made of aluminum sheet material. The bottom plate of the heat sink is formed through jointing so that a portion of the bottom plate is made of aluminum sheet material that has a small thickness to thereby reduce the amount of aluminum material used and thus facilitating cost control.
US09208701B2 Sign assembly
An outdoor sign assembly includes a perimeter framework with fluid-directing channels to direct water off of the sign during inclement weather, and further includes individually removable sign face panels that are configured to support individual indicia members including lettering, numbers, symbols, designs, or the like, including internally-lighted indicia. The sign face panels cooperate with the framework to direct water around and off of the sign assembly, and may be placed in side-by-side arrangement to achieve any desired length. During assembly or disassembly, the sign face panels are held relatively securely to the framework, even before mechanical fasteners are fully tightened.
US09208700B2 Sticker recording sheet
A sticker recording sheet includes an image-receiving paper portion having an receiving layer, an image-receiving base material, and an adhesive layer laminated on each other, and a release coated paper portion provided on a back surface side of the adhesive layer in a peelable manner, wherein the image-receiving paper portion is provided with a first half-cut portion cut in an approximately square shape, having an uncut bridge portion on at least one side of the approximately square shape, and a second half-cut portion cut from at least one side of the approximately square shape having the bridge portion toward an outer circumference of the image-receiving paper portion.
US09208693B2 Providing intelligent inquiries in question answer systems
A method, a system and a computer program product for selecting a further inquiry for a user to clarify a request for information from the user. One or more candidate answers to the request for information from the user are determined, and a score value is generated for each of one or more characteristics of each candidate answer, where at least one characteristic is associated with an inquiry for the user to clarify the request for information. A characteristic associated with an inquiry is determined that includes score values providing the greatest potential adjustment for the candidate answers in response to a clarification of the request for information, and the inquiry is selected that is associated with the determined characteristic for presentation to the user.
US09208692B2 System for measuring speed and magnitude of responses and methods thereof
A system and methods for providing input devices or sensors to record users' responses or answers to questions and the conviction of those answers by measuring and tracking various metrics, including the speed, direction and magnitude or power of a response to the question, and calculating the score thereof.
US09208691B2 Machine system having overtaking functionality
An overtaking control system is disclosed for use with a plurality of machines operating at a common worksite. The overtaking control system may have an input device that is configured to receive an input from an operator of the first machine of the plurality of machines indicative of a desire to overtake a second machine of the plurality of machines. The overtaking control system may also have a location device configured to generate a location signal indicative of a location of the first machine at the common worksite. The overtaking control system may further have at least one controller configured to make a comparison of a projected path of the first machine with a map of the common worksite based on the location signal, and selectively activate the input device only when the comparison indicates that the projected path of the first machine does not overlap with a no-overtaking zone at the common worksite.
US09208689B2 Deep stall aircraft landing
An aircraft defining an upright orientation and an inverted orientation, a ground station; and a control system for remotely controlling the flight of the aircraft. The ground station has an auto-land function that causes the aircraft to invert, stall, and controllably land in the inverted orientation to protect a payload and a rudder extending down from the aircraft. In the upright orientation, the ground station depicts the view from a first aircraft camera. When switching to the inverted orientation: (1) the ground station depicts the view from a second aircraft camera, (2) the aircraft switches the colors of red and green wing lights, extends the ailerons to act as inverted flaps, and (3) the control system adapts a ground station controller for the inverted orientation. The aircraft landing gear is an expanded polypropylene pad located above the wing when the aircraft is in the upright orientation.
US09208687B2 System and method for social networking of aircraft for information exchange
A system and method for exchanging information between aircraft (210). Sensors on a first aircraft (210) provide data about the first aircraft's environment, including hazards such as turbulence, icing, lightning, or birds. The system transmits the data to receiving systems in other aircraft (210), which display the data, to warn the pilots flying the other aircraft of potential hazards. The pilot of the first aircraft may supplement the information with visual observations, about birds or unmanned aerial vehicles, for example. In one embodiment, the information is transmitted from aircraft to aircraft over a data link using ADS-B. In another embodiment, a first aircraft may transmit data to a second aircraft, which may relay, or re-transmit, the data to a third aircraft.
US09208682B2 Lane level congestion splitting
A controller receives probe data from a vehicle traveling on a path segment. The probe data may be collected by a mobile device. The path segment may be a multilane roadway. The controller identifies a first lane of the path segment from the probe data. The controller associated a forked route with the first lane of the path segment. The controller calculates different traffic values for the lanes of the path segment. One traffic value may be calculated directly from speeds derived from the path data. Another traffic value may be calculated by the probe data and a historical relationship.
US09208681B2 Vehicle wheel and axle sensing method and system
Methods and systems for counting vehicle wheels and axles. A strip material can be embedded in a roadway to produce a slightly raised surface. The strip can be angled at a relatively large angle, (e.g., 78 degrees) with respect to the direction of travel. The number of wheels per axle and the number of axles per vehicle can be counted as the vehicle rolls over the strip and the wheels contact the strip at different times. A signal emitted from a detection mechanism(s) associated with the strip material can be transmitted to a signal processing unit to determine the number of wheels and axle with respect to the vehicle. The vehicle wheel and axle counts can be determined by the number and grouping of signals from the detection mechanism. Such an approach provides a reliable, direct measure of the wheel and axle counts for toll charge or classification purposes.
US09208679B2 System and method for configuring the remote control functionality of a portable device
A system and method used to configure a smart device to command functional operations of a target appliance. The smart device retrieves from a controllable appliance, such as a settop box, data indicative of a codeset identity of the target appliance wherein the codeset identity was determined during a process used to configure a conventional universal remote control to command functional operations of the target appliance and wherein the process used to configure the conventional universal remote control is performed in cooperation with the controllable appliance. A remote control application resident on the smart device then uses the data indicative of the codeset identity retrieved from the controllable appliance to also configure the smart device to command functional operations of the target appliance.
US09208674B2 Security system with power saving feature and device
The invention relates to a security system with power saving feature and device comprises an electric magnet and a corresponding iron plate. The electric magnet is connected to a G-sensor module and the iron plate has a pressing face to contact with the G-sensor module. When the door is opened, the electric magnet does not supply power; when the door is closed, the electric magnet with electromagnetic attraction attracts the iron plate and the pressing face presses the G-sensor module. That is, the electromagnetic lock usually stays in a low-energy attraction state; however, when the G-sensor module is triggered, the electromagnetic lock returns to a normal lock state for achieving power saving effect and control of the external force detection improvement.
US09208670B2 Warning system for monitoring a vehicle battery
A warning system for detecting a battery fire in a battery of an electric or hybrid vehicle includes a battery management system. The electric or hybrid vehicle is parked at or in a building to carry out a battery charging operation. The battery management system is connected to a building network installed in the building during the charging operation either via a direct connection or via a wireless connection. The battery management system triggers or activates protective measures if a fire is detected.
US09208669B2 Apparatus and method for improved live monitoring and alarm handling in video surveillance systems
Systems and methods for annotating a display of a video data stream with customized information are provided. Methods include selecting a video data stream, creating a video graphic help file (VGH file) associated with the video data stream, a data capture device associated with the video data stream, a monitored area captured by the data capture device associated with the video data stream, or a salvo view, adding customized information to the VGH file, determining a need to access the VGH file, recalling the VGH file, and displaying customized information in the VGH file.
US09208668B1 Camera system with a full view monitoring function
A camera system with a full view monitoring function includes a base, a first camera apparatus, at least one second camera apparatus and a controller. The first camera apparatus is fixed on the base and invariably faces toward a first direction. The first camera apparatus is adapted to capture a panorama image. The second camera apparatus is movably disposed on the base and adjustably faces toward a detecting direction different from the first direction. The second camera apparatus is adapted to encircle around the first camera apparatus. The controller is electrically connected to the first camera apparatus and the second camera apparatus. The controller is adapted to analyze the panorama image to filter out a triggering zone, to encircle the second camera apparatus toward a detecting direction corresponding to the triggering zone, and to drive the second camera apparatus to capture a detecting image overlapping the triggering zone.
US09208666B2 Automated, remotely-verified alarm system with intrusion and video surveillance and digital video recording
An automated self-monitored alarm verification solution including at least a premises portion, a server portion, and an end user device portion. Alarm verification includes capturing by an image capture device at least one image in response to a detection event, and transmitting a first data signal including the image to a local signal processing device. The signal processing device transmits a second signal including at least a portion of the image to a remote hosted server according to at least a first set of predetermined parameters. After receiving the second signal, the server transmits a third signal including at least a portion of the image from the hosted server to a user device. Using the user device, a user views the image and indicates a validity status of the alarm based at least in part on the content of the image. Based at least upon either the validation status indicated by the user, or upon a failure to receive a message including a validation status from the user within a predetermined duration of time, the server portion may send an alarm signal to an emergency response service.
US09208663B2 Input apparatus and control method for input apparatus
An input apparatus includes a panel (11), a piezoelectric element (13) on the panel (11), an output detection unit (18) that detects output of the piezoelectric element (13) corresponding to pressure on a touch face (11a) of the panel (11) and determines whether the output satisfies a standard for providing a tactile sensation, a piezoelectric element drive unit (15) that drives the piezoelectric element (13), when the output is determined to satisfy the standard, so that the tactile sensation is provided to an object pressing the touch face (11a), and a control unit (17) that controls the start timing of the determination by the output detection unit (18), thereby, after the piezoelectric element (13) is driven, the control unit (17) controls the output detection unit (18) to resume the determination when a predetermined period elapses after detection of the output by the output detection unit (18) enters a resumable state.
US09208662B2 Methods and devices for selectively controlling and varying surface texture and/or force levels on a mobile device using haptic feedback
Mobile devices having haptic interfaces located on an edge or back of mobile phones for selectively controlling and varying surface texture and/or force levels are provided. The haptic interfaces may allow for haptic interaction with the user of the mobile device when audio or visual feedback is not practical. The haptic interface may be an electro-mechanical system that may include a matrix or array of individually addressable actuators that can convey haptic information through the deformation of a flexible surface or membrane covering the array of individually addressable actuators. The array of “individually addressable” actuators may provide each actuator the ability to be separately addressable or addressable as a group (i.e. two or more) actuators.
US09208657B2 Slot machine including a plurality of video reels
Provided is a slot machine which prevents two continuous symbols from coming to be continuous even by conducting a rewriting process. In a case where the one part of the symbol columns is stopped and displayed in the display frame of a symbol display area 4, when a continuous symbol (CHANCE symbol 403) stopped displayed in the display frame of the symbol display area 4 is present in an upstream direction of the scrolling display outside of the display frame of the symbol display area 4, conducted is a delay process in which the rewriting process is conducted for a portion of the symbol column which is present upstream of a position P1 of the continuous symbol (CHANCE symbol 403) in the scrolling display being present in the upstream direction of the scrolling display outside of the display frame of the symbol display area 4.
US09208653B2 Gaming machine, gaming system, and gaming method
In a gaming machine, a display displays at least part of a map including a plurality of cell forming courses on which a character moves in a game. The controller executes each round of the game, moves the character to a destination cell in each round, determines whether an event set to the destination cell belongs to predetermined events, selects any one determination table from among a plurality of determination tables based on a position of the destination cell when the event belongs to the predetermined events, performs the event set to the destination cell, determines a result of the performed event based on the selected determination table, and awards a profit corresponding to the result of the performed event to the player.
US09208650B2 Gaming system and method of gaming
A method of gaming, game controller and gaming system wherein an amount wagered on a game is determined and symbols selected from a symbol set to display in designated symbol positions, the resulting symbols used to determine a first game outcome. Symbols are re-selected for at least one of the designated symbol positions a number of times depending on the amount wagered, to provide a corresponding number of further game outcomes in which a jackpot prize is eligible to be awarded.
US09208648B2 Gaming system and method for triggering a random secondary game in association with multiple concurrently played primary games
A gaming system and method for enabling a player to select a plurality of games to simultaneously, concurrently or overlappingly play, wherein regardless or independent of which primary games the player selected to play, the secondary games available to be triggered remain the same.
US09208647B2 Scalable automated real-time management of peer-to-peer wagers based on events occurring during external contexts
An internet based automated wagering system allows many participant to wager on outcomes of certain events associated with a game. The wagering can occur in real time or can be delayed. Presentations are made to participants indicating various events associated with the game and participants can then send to the system proposed wagers based on possible outcomes of the event as selected by each participant. The system then finds a partner for each participant and an engagement is established between the participants interested in the same wager and event outcome. The system can monitor events and determine their outcomes, or can obtain event outcome information from external sources.
US09208644B2 Wagering game system with pausing feature
A gaming system includes one or more controllers and one or more memory devices storing instructions that, when executed by at least one of the one or more controllers, cause the gaming system to initiate a wagering game to be played via a gaming machine and in response to a pause event, temporarily pause the wagering game-in-progress, prior to revealing a final outcome of the wagering game. While the game-in-progress is paused, the one or more controllers allow the gaming machine to participate in a community event along with a plurality of other gaming machines and in response to an end-pause event associated with the community event, reinstate the paused game-in-progress at the gaming machine.
US09208643B2 Game-information-integrating system
A game playing information integration system which outputs the operation state of game units installed in a gaming facility, the proportions of visitors by type, and the trends of the greatest common preferences of visitors seen from the proportion and other information so that such information can be grasped in real time, and provides useful information for appropriately managing the operation and management of the gaming facility while achieving greater harmony of players and the gaming facility (shop) is provided.
US09208640B2 Gaming system and method providing multiway evaluation for a game associated with multi-component symbols configured to affect a base count and/or a value of one or more modifiers
Various embodiments of the present disclosure are directed to a gaming system and method providing multiway evaluation for a game including multi-component symbols that are utilized to determine one or more modifiers. In one embodiment, the gaming system is configured to operate a game associated with a plurality of reels including a plurality of individual symbols and a plurality of multi-component symbols including a plurality of the individual symbols. The gaming system displays a plurality of the symbols on the reels and determines a quantity of adjacent reels that each displays at least one instance of a first individual symbol. The gaming system determines a modifier for each of the adjacent reels based on a quantity of instances of the first individual symbol displayed by that reel, and determines any awards for the first individual symbol based on the determined quantity of adjacent reels and any determined modifiers.
US09208639B2 Handheld devices for community events of wagering games
A system includes a community screen configured to display images of a community event thereon. The system includes a number of wagering game machines coupled to the community screen. The system also includes a number of handheld devices, wherein each handheld device has a respective display and is associated with a respective one of the wagering game machines. The system includes an image module configured, for at least one handheld device of the number of handheld devices, to identify a location on the community screen based on a position of the at least one handheld device and to present an image on the display of the at least one handheld device based on the location.
US09208638B2 Gaming terminal and method of providing notification
A gaming terminal includes: a terminal image display panel; a lever-type operation device configured to receive an operation of a player; a support mechanism which rotatably supports the operation device at one end portion of the operation device and includes a restriction member configured to restrict inclination of the operation device, the restriction member being positioned so that the operation device abuts the restriction member when the operation device is inclined at a first angle; an inclination detecting mechanism which detects an angle of inclination of the operation device; and a controller which causes the terminal image display panel to output a predetermined sound and/or to give a visual indication to give a warning to the player when the angle of inclination of the operation device detected by the inclination detecting mechanism is greater than a second angle which is equal to or greater than the first angle.
US09208634B2 Enhanced smart card usage
A smart card (40) is distributed to a cardholder in a non-operative form, with a digital token. The token is sent, via a near field communication interface, to a wireless communication device (10) and forwarded to a verification entity (30) via a wireless communication interface. The communication device (10) receives content for the smart card and sends the content to the smart card (40) to render it into an operative form. A transaction on a cardholder's account is authorized by a process which comprises sending a notification of the transaction to a wireless communication device and notifying the user of the transaction via a user interface of the device. A user can approve the transaction by bringing the smart card within range of the communication device and sending a card identifier via a near field communication interface.
US09208632B2 Bill identifier/counter
A bill recognizing and counting apparatus includes an operation unit that receives setting of bill processing modes including a denomination mode, a counting mode, a different-denomination recognition mode, and an authenticity determination mode; a feeding and transporting mechanism; and a control unit that performs control for changing a processing speed according to the bill processing mode. When the bill processing mode is in the counting mode, the different-denomination recognition mode, or the authenticity determination mode, the control unit increases the processing speed by setting the feeding and transporting mechanism to a higher speed than the speed set in the denomination mode. The increase in speed is in accordance with a reduced time necessary to process a reduced amount of data associated with the denomination mode.
US09208630B2 Paper-slip handling device and automated transaction device
A paper-slip handling device with: a reduced stoppage rate and banknote rejection rate for a deposit/withdrawal device; improved ability to remove foreign material from banknote bundles; improved user-friendliness; and improved reliability, comprising: a deposit/withdrawal unit used for depositing and withdrawal of paper slips, a paper-slip identification unit that identifies paper slips, a temporary holding compartment that temporarily stores deposited paper slips, a plurality of paper-slip storage compartments, and a first paper-slip transport path via which paper slips are transported to the various aforementioned units. The deposit/withdrawal unit has an opening via which paper slips are transferred in a substantially horizontal state, a storage section that stores paper slips in a substantially upright state, and a second paper-slip transport path that connects said opening and storage section. The paper slips are transported via said second paper-slip transport path while being switched between the substantially upright state and substantially horizontal state.
US09208623B2 Vehicle bus access point system and method
A system and method of transmitting vehicle information from a vehicle to a server across an external network. A vehicle bus connector module is plugged into a vehicle bus through the vehicle's vehicle bus connector. The vehicle bus connector module is also communicatively connected to a personal communications device. Vehicle information is collected from the vehicle bus and combined with information captured by the personal communications device to form a driver log. The driver log is transmitted to the server via the external network.
US09208621B1 Methods and systems for detecting a package type using an imaging logistics receptacle
Methods and systems that detect a package type of a package deposited within a logistics receptacle having an entrance chute that receives the package, an image sensor within the entrance chute, and an interaction sensor. The interaction sensor detects when the package is provided to the receptacle. After detection, the image sensor is activated to capture an image corresponding to at least a part of one side of the package. The image is processed to determine a pattern match related to the package type, and the package's type is identified based upon the determined pattern match. The system may also include a dispatch type of server notified with a pickup request from the receptacle. The server may update analytics information related to the receptacle, determine a future pickup schedule for the receptacle based upon the updated analytics information, and transmit a schedule update message based upon the future schedule.
US09208620B1 Systems and methods for payment of postage indicia after the point of generation
Systems and methods provide for printing unactivated tokens which can be activated into valid postage indicia at a later time. Monetary liability for postage indicia value is postponed until the token is activated into a postage indicium; thus, the token does not have value and is not valid until activated into indicium. Consequently, a user is not made monetarily liable for printed tokens unless the tokens are activated into postage indicia.
US09208618B2 Interactive three dimensional displays on handheld devices
Techniques are disclosed for rendering an anamorphic projection of 3D scene geometry on a handled device using a correct asymmetric perspective geometry projection. Once pose of the handheld device is determined, a relative eye position may be inferred when the device is tilted away from an initial or default pose, based on data supplied by accelerometers. Thus, embodiments of the invention result in a holographic style display without the need for glasses or external sensing attachments.
US09208615B2 Image processing apparatus, image processing method, and program for facilitating an input operation by a user in response to information displayed in a superimposed manner on a visual field of the user
There is provided an image processing device including a superimposition display position determining unit which determines a position of an object having a predetermined flat surface or curved surface out of an object imaged in an input image based on an environment map, a superimposition display image generating unit which generates a superimposition display image by setting superimposition display data at the position of the object determined by the superimposition display position determining unit, an image superimposing unit which superimposes the superimposition display image on a visual field of a user, an operating object recognizing unit which recognizes an operating object imaged in the input image, and a process executing unit which executes a process corresponding to an item selected based on a position of the operating object recognized by the operating object recognizing unit.
US09208614B2 Wearable display system that displays previous runners as virtual objects on a current runner's path
There is provided a display control device including an action information acquisition unit that acquires, at an action position of one actor, action information regarding a past action of another actor, an object generation unit that generates a virtual object for virtually indicating a position of the other actor during an action of the one actor based on the acquired action information, and a display control unit that causes a display unit displaying a surrounding scene to superimpose and display the generated virtual object during the action of the one actor.
US09208609B2 Method for fitting primitive shapes to 3D point clouds using distance fields
A method fits primitive shapes to a set of three-dimensional (3D) points by first converting the set of 3D points to a distance field. Each element in the distance field is associated with a distance to a nearest point in the set of 3D points. A set of two or more candidates are hypothesizing from the primitive shapes, and a score is determined for each candidate using the distance field. Then, the primitive shape to fit to the 3D points is selected from the candidates according to their scores.
US09208607B2 Apparatus and method of producing 3D model
Disclosed are an apparatus and a method of producing a 3D model in which a 3D model having a static background is produced using a point cloud and an image obtained through 3D scanning. The apparatus includes an image matching unit for producing a matched image by matching a point cloud obtained by scanning a predetermined region to a camera image obtained by photographing the predetermined region; a mesh model processing unit for producing an object positioned in the region as a mesh model; and a 3D model processing unit for producing a 3D model for the object by reflecting texture information obtained from the matched image to the mesh model. The disclosed may be used for a 3D map service.
US09208606B2 System, method, and computer program product for extruding a model through a two-dimensional scene
A system, method, and computer program product are provided for extruding an object through a two-dimensional scene. In use, a two-dimensional object is identified within a two-dimensional scene. Additionally, a three-dimensional model is determined that corresponds to the two-dimensional object. Further, the three-dimensional model is extruded through the two-dimensional scene to create a three-dimensional object.
US09208605B1 Temporal antialiasing in a multisampling graphics pipeline
Multisampling techniques provide temporal as well as spatial antialiasing. Coverage for a primitive is determined at multiple sample locations for a pixel. In one embodiment, coverage is determined using boundary equations representing a boundary surface of the primitive in a three-dimensional space-time. A shading value for the primitive is computed for the pixel and stored for each coverage sample location of the pixel that is covered by the primitive. The sample locations are distributed in both space and time, and multiple sample locations share a single shading computation. The multisampling techniques are extendable to other dimensions that correspond to other image attributes.
US09208603B2 Methods and associated systems for simulating illumination patterns
Systems and methods for simulating illumination patterns on target surfaces in a space are disclosed. The system includes an input component and a simulation component. The input component receives a sampling angular range, a sampling polygon density, and a sampling polygon type. The simulation component traces sampling rays according to the sampling angular range and the sampling polygon density and type within a sampling range. The simulation component can further (1) generate an initial illumination pattern with a plurality of sampling polygon projections on the target surface; (2) assign the same value of an attribute in the sampling polygon projections defined by sampling rays through substantially the same route from the light source to the target surface; and (3) adjust the value of the attribute in the sampling polygon projection defined by sampling rays from different routes by interpolation.
US09208600B2 Custom animation application tools and techniques
A machine-controlled method can include an electronic device display visually presenting to a user a digital character, multiple vector cutters positioned over corresponding portions of the digital character, and at least one joint option feature positioned within overlapping sub-portions of at least two vector cutters. The method can also include the display visually presenting a movement of the digital character based on the vector cutters and joint option feature.
US09208598B2 Avatar eye control in a multi-user animation environment
In a multi-participant modeled virtual reality environment, avatars are modeled beings that include moveable eyes creating the impression of an apparent gaze direction. Control of eye movement may be performed autonomously using software to select and prioritize targets in a visual field. Sequence and duration of apparent gaze may then be controlled using automatically determined priorities. Optionally, user preferences for object characteristics may be factored into determining priority of apparent gaze. Resulting modeled avatars are rendered on client displays to provide more lifelike and interesting avatar depictions with shifting gaze directions.
US09208597B2 Generalized instancing for three-dimensional scene data
Systems and methods for rendering three-dimensional images by instancing scene description data using a hierarchy are provided. A hierarchy is accessed. The hierarchy comprises a first node and an instance node. The first node is a predecessor to a subtree of one or more nodes and the first node is associated with a first scene description data object. The instance node is a leaf of the hierarchy. The instance node has a parent node and the instance node is associated with a second scene description data object. The parent node has successor nodes other than the instance node. An instancing instruction of the instance node is read. The instancing instruction comprises information identifying the first node. An instance of the subtree of one or more nodes is merged at a location in the hierarchy of the instance node. An image is rendered based on the merged instance of the subtree.
US09208594B2 Apparatus, computer readable medium and method for effectively using visual indicators in navigating polysemous symbols across a plurality of linked electronic screen overlays
A method, apparatus and computer readable medium are disclosed. In at least one embodiment, the method includes providing polysemous symbols for selection on an initial electronic screen overlay displayed on a display, a plurality of the provided polysemous symbols including a visual indicator indicating a link to a different next level electronic screen overlay; storing, in a memory and in association with each one of the plurality of polysemous symbols, a pointer identifying display of the next level electronic screen overlay which is different from the initial electronic screen overlay; and displaying the next level electronic screen overlay which is different from the initial electronic screen overlay on the display, in response to initial selection of a respective one of the plurality of polysemous symbols including the visual indicator, the next level electronic screen overlay being the electronic screen overlay associated with the selected polysemous symbol.
US09208592B2 Computer-implemented system and method for providing a display of clusters
A computer-implemented system and method for providing a display of clusters is provided. A plurality of cluster spines is presented in a two-dimensional display. Each cluster spine includes a vector of document clusters. A compass is positioned over at least a portion of the clusters of one or more of the spines. A spine label for at least one of the spines within the compass is placed around a circumference of the compass. One of the spine labels is pinned to the compass at a fixed location. The compass is reoriented within the display and the pinned spine label is displayed at the fixed location on the reoriented compass.
US09208591B2 Providing user controlled ability to determine data level of detail in a graph
One embodiment of the invention comprises a method for constructing a graph pertaining to a specified metric. Measured values of the specified metric are selectively stored, wherein each stored value comprises a data point. The method further includes routing successive data points to a location associated with the graph, wherein a first number of data points are included in a specified graph time period. The method further includes using a value that represents a particular data level of detail to divide the specified graph time period into multiple time intervals, wherein each time interval includes a second number of data points. The method further includes selectively processing the second number of data points of a time interval, in accordance with prespecified criteria, to determine a most representative value for that time interval. The most representative values of respective time intervals are then used to construct the graph.
US09208588B2 Fast statistical imaging reconstruction via denoised ordered-subset statistically-penalized algebraic reconstruction technique
Described here are systems and methods for iteratively reconstructing images from data acquired using a medical imaging system. The image reconstruction is decomposed into separate linear sub-problems that can be more efficiently solved. A statistical image reconstruction process is decomposed into a statistically-weighted algebraic reconstruction update sequence. After this step, the reconstructed image is denoised using a regularization function.
US09208583B2 Device with enhanced augmented reality functionality
A device with enhanced augmented reality functionality and methods therefor, are provided. An identifier of an object is rendered, at a display of a device, at a first position associated with the object. An object tracked device is used to track the object. When the object moves, a processor of the device smoothly transitions the identifier from the first position to a second position at the display using animation, the second position associated with a new position of the object.
US09208582B2 Image analyzing system and method
An image analysis system that analyzes an image of an object's organ having an anatomically symmetric shape includes: an image data read means that reads image data of the organ, a memory means that is connected to the image data read means, and stores the read image data, a display means that is connected to the memory means, and displays the image data as an image, a centerline setting means that is connected to the memory means, and sets a centerline of the organ in the image displayed on the display means, a region-of-interest setting means that is connected to the memory means, and uses the centerline to set a plurality of or at least one pair of regions of interest at anatomically symmetric opposite positions in the image of the organ, and an input means that is connected to the region-of-interest setting means, and inputs conditions for setting of the regions of interest in the image.
US09208580B2 Hand detection, location, and/or tracking
Various arrangements for identifying a location of a hand of a person are presented. A group of pixels may be identified in an image of a scene as including the person. A reference point may be set for the group of pixels identified as the person. The hand may be identified as using a local distance maximum from the reference point. An indication, such as coordinates, of the location of the hand may be output based on the local distance.
US09208578B2 Local binary pattern-based optical flow
In one embodiment, a method determines a first local binary pattern for a first image in a video and a second local binary pattern for a second image in the video. Then, the method determines an optical flow between the first image and the second image based on a distance between the first local binary pattern and the second local binary pattern. The optical flow is output for use in aligning the first image to the second image.
US09208572B2 Systems and methods for image segmentation using a deformable atlas
Systems and methods for image segmentation using a deformable atlas are provided. One method includes obtaining one or more target images, obtaining one or more propagated label probabilities for the one or more target images, and segmenting the one or more target images using a cost function of a deformable atlas model. The method further includes identifying segmented structures within the one or more target images based on the segmented one or more target images.
US09208569B2 Image processing apparatus and control method thereof capable of performing refocus calculation processing for light field data
An image processing apparatus comprises a captured image data acquisition unit configured to acquire captured image data, an information acquisition unit configured to acquire information of object distances of objects, a refocus image generation unit configured to generate a refocus image at a predetermined focus position in the captured image data, a display unit configured to display the refocus image on a display medium, a designation unit configured to designate an address in the refocus image displayed by the display unit, and a distance calculation unit configured to calculate distances between the designated address and positions of the objects in the refocus image, wherein the refocus image generation unit generates a refocus image using, as a focus position, an object distance of one of the objects based on the distances.
US09208567B2 Object landmark detection in images
Techniques are provided to improve the performance and accuracy of landmark point detection using a Constrained Local Model. The accuracy of feature filters used by the model may be improved by supplying positive and negative sets of image data from training image regions of varying shapes and sizes to a linear support vector machine training algorithm. The size and shape of regions within which a feature filter is to be applied may be determined based on a variance in training image data for a landmark point with which the feature filter is associated. A sample image may be normalized and a confidence map generated for each landmark point by applying the feature filters as a convolution on the normalized image. A vector flow map may be pre-computed to improve the efficiency with which a mean landmark point is adjusted toward a corresponding landmark point in a sample image.
US09208565B2 Method and apparatus for estimating three-dimensional position and orientation through sensor fusion
An apparatus and method of estimating a three-dimensional (3D) position and orientation based on a sensor fusion process. The method of estimating the 3D position and orientation may include determining a position of a marker in a two-dimensional (2D) image, determining a depth of a position in a depth image corresponding to the position of the marker in the 2D image to be a depth of the marker, estimating a 3D position of the marker calculated based on the depth of the marker as a marker-based position of a remote apparatus, estimating an inertia-based position and an inertia-based orientation by receiving inertial information associated with the remote apparatus, estimating a fused position based on a weighted sum of the marker-based position and the inertia-based position, and outputting the fused position and the inertia-based orientation.
US09208556B2 Method, system, software and medium for advanced intelligent image analysis and display of medical images and information
Computerized interpretation of medical images for quantitative analysis of multi-modality breast images including analysis of FFDM, 2D/3D ultrasound, MRI, or other breast imaging methods. Real-time characterization of tumors and background tissue, and calculation of image-based biomarkers is provided for breast cancer detection, diagnosis, prognosis, risk assessment, and therapy response. Analysis includes lesion segmentation, and extraction of relevant characteristics (textural/morphological/kinetic features) from lesion-based or voxel-based analyzes. Combinations of characteristics in several classification tasks using artificial intelligence is provided. Output in terms of 1D, 2D or 3D distributions in which an unknown case is identified relative to calculations on known or unlabeled cases, which can go through a dimension-reduction technique. Output to 3D shows relationships of the unknown case to a cloud of known or unlabeled cases, in which the cloud demonstrates the structure of the population of patients with and without the disease.
US09208551B2 Method and system for providing efficient feedback regarding captured optical image quality
An optical image of a source document is captured. Two or more source document image test regions are then defined/determined. An optical image scan is performed on each source document image test region to determine if there are identifiable alpha-numeric characters or symbols present. If one or more of the source document image test regions are determined not to contain identifiable alpha-numeric characters, the captured optical image of the source document is determined to be of insufficient quality to identify and extract individual characters and symbols and it is recommended that optical images of source documents determined to be of insufficient quality to identify and extract individual characters and symbols be re-captured using an image capture device.
US09208550B2 Smart document capture based on estimated scanned-image quality
A method for providing real-time feedback of an estimated quality of a captured final image, the method including obtaining a preliminary image, calculating a quality score of the preliminary image, and in response to the quality score of the preliminary image exceeding a threshold quality value, taking a first action.
US09208549B2 Method and apparatus for color transfer between images
A method and an arrangement for color transfer between images for compensating color differences between at least two images as a first and a second image represented by pixel data are recommended, wherein for corresponding feature points of the images a color map and a geometric map are calculated for compensating a first image by applying said geometric map and said color map to the first image resulting in a compensated first image for detecting regions where a compensation fails by comparing the compensated first image with the second image to perform a color transfer excluding image regions where the compensation failed. The method can be performed on the fly and is applicable for equalizing color differences between images different in geometry and color.
US09208548B1 Automatic image enhancement
Approaches are described for managing the processing of image and/or video data captured by an electronic device. A user can capture an image using a camera of a computing device, where metadata obtained by sensor(s) of the device can be stored along with the image. The image can be transmitted to a network service, where the network service can divide the image into a plurality of image portions, and for each image portion, the network service can search a library of image patches in attempt to find at least one library patch that substantially matches a respective image portion. If one of the library image portions matches the image portion within an allowable threshold, the network service can modify the image portion such as by applying image modifications made to the library image patch to the image portion or merging the library patch image with the image portion.
US09208542B2 Pixel-wise noise reduction in thermal images
Methods and systems are provided to reduce noise in thermal images. In one example, a method includes receiving an image frame comprising a plurality of pixels arranged in a plurality of rows and columns. The pixels comprise thermal image data associated with a scene and noise introduced by an infrared imaging device. The image frame may be processed to determine a plurality of column correction terms, each associated with a corresponding one of the columns and determined based on relative relationships between the pixels of the corresponding column and the pixels of a neighborhood of columns. In another example, the image frame may be processed to determine a plurality of non-uniformity correction terms, each associated with a corresponding one of the pixels and determined based on relative relationships between the corresponding one of the pixels and associated neighborhood pixels within a selected distance.
US09208540B2 Image producing method, image producing apparatus and radiation tomographic imaging apparatus, and program
An image producing method is provided. The method includes acquiring regular-interval parallel-beam projection data whose intervals in a channel direction are the same and parallel to each other in a plurality of view directions by applying interpolation processing in a view direction, rearrangement processing, and interpolation processing in the channel direction to fan-beam projection data, and reconstructing an image by applying back projection processing to the acquired regular-interval parallel-beam projection data, wherein the interpolation processing in the view direction includes interpolation processing which is performed along a curve or a first straight line made by deforming or rotating a second straight line parallel to the view direction so as to be proximate to a trajectory drawn by dots corresponding to a desired position in a Scan Field Of View region on a sinogram of the collected fan-beam projection data in the plurality of views.
US09208538B2 Rotated rectangle drawing on electronic devices
Methods for drawing a rotated rectangle on an electronic device are provided. In one aspect, a method includes receiving content configured for display and analyzing the content to identify a skew angle associated with the content. The method also includes receiving an input request to draw a rectangle overlaid upon the content, and providing, for display, the rectangle overlaid upon the content based upon the input request, the rectangle rotated according to the skew angle. Systems and machine-readable media are also provided.
US09208537B1 Super-resolution reconstructing method for enhancing smoothness and sharpness of video image
A super-resolution reconstructing method includes: providing an original image including multiple original image pixel points arranged in an array; performing edge detecting on the original image by Canny_H method and considering pixel edge information of 4*4 area image range; performing 2*2 times interpolation zooming to edge pixel points and determining a type of the 4*4 area image as pure color entity area or non-pure color entity area according to the pixel edge information; performing a conditional interpolation individually on pure color entity area and non-pure color entity area; and obtaining a pixel 2*2 times interpolation zoomed super-resolution image. In pure color entity area, interpolation is performed according to edge information of 4*4 area image range to maintain border sharpness of pure color entity area and reduce jaggies. In non-pure color entity area, BiCubic_H interpolation is performed to enhance smoothness and sharpness of image.
US09208536B2 Systems and methods for three dimensional geometric reconstruction of captured image data
In various embodiments, methods, systems, and computer program products for processing digital images captured by a mobile device are disclosed. Myriad features enable and/or facilitate processing of such digital images using a mobile device that would otherwise be technically impossible or impractical, and furthermore address unique challenges presented by images captured using a camera rather than a traditional flat-bed scanner, paper-feed scanner, or multifunction peripheral. Notably, the presently disclosed systems and techniques enable three-dimensional reconstruction of objects depicted in image captured using a camera of a mobile device. The reconstruction corrects or compensates for perspective distortion caused by camera-based capture.
US09208535B2 Method and apparatus for graphical processing unit (GPU) accelerated large-scale web community detection
A method, non-transitory computer readable medium, and apparatus for large-scale web community detection using a graphical processing unit (GPU) are disclosed. For example, the method receives an input graph formatted into one or more first adjacency lists from a central processing unit (CPU), performs a first level shingling on the one or more first adjacency lists, sends the first level shingling to the CPU to generate an aggregate graph based upon the first level shingling, receives the aggregate graph formatted into one or more second adjacency lists from the CPU, performs a second level shingling on the one or more second adjacency lists and sends the second level shingling to the CPU to generate a dense sub-graph that identifies one or more web communities.
US09208524B2 Device, system, and method of automatic financial-instrument management
Devices, systems, and methods of automatic Financial-Instrument (FI) management. In some embodiments, a system includes, a memory having stored thereon financial-instrument-based (FI-based) management instructions; and a processor to execute the FI-based management instructions resulting in a FI-based management application, wherein the FI-based management application may receive portfolio data corresponding to a plurality of financial-instrument portfolios associated with a plurality of clients, wherein the FI-based management application may automatically identify one or more portfolios of the plurality of portfolios satisfying at least one criterion, wherein, for each identified portfolio, the FI-based management application may receive client-specific management data corresponding to a client associated with the identified portfolio, wherein the client-specific management data includes at least client-specific destination information defining at least one destination, and wherein, for each identified portfolio, the FI-based management application may automatically communicate portfolio-related data corresponding to the identified portfolio to the destination defined by the management data.
US09208519B2 Method and apparatus for managing multimedia content
The invention includes a system, apparatus, and method for storing media content within a service provider network. The system includes multi-service servers associated with access points adapted to allow end-user devices to access the service provider network. Each multi-service server includes a common storage partition adapted for storing media content and a plurality of end-user storage partitions adapted for maintaining associations to media content. The system includes media servers that communicate with the multi-service servers for providing media content to the multi-service servers. In response to a request for media content received from one of a plurality of end-user devices, the requested media content stored in the common storage partition is associated with a selected one of the end-user storage partitions associated with the end-user. The request for media content is received in response to end-user directed advertisements received at any of the plurality of end-user devices.
US09208518B2 Generating targeted group based offers to increase sales
A method, system and computer program product for increasing the sales of a retailer. A unit, referred to herein as the “retailer promotions device,” generates a group offer for a set of users/customers to purchase a product based on intelligent analytics (e.g., real-time attributes/dynamics such as the strategy in selling the remaining inventory). A group offer refers to an offer to sell a product at a promotional price if a number of users (e.g., users of mobile devices and/or customers online and/or customers in a physical store) agree to purchase the product at the promotional price within a time period. The group offer is sent to targeted users/customers via online and mobile devices as well as via electronic displays and kiosks in the physical store. By using real-time attributes/dynamics to generate group offers that can be sent to targeted users/customers, the sales of the retailer are likely to be increased.
US09208515B2 System and method for concept development
A computer implemented method, system, and computer program product include one or more processors providing a framework for building a visual representation of a product concept, the visual representation including one or more of a textual component and a graphical component; one or more processors receiving a designation of an element within at least one of the textual component and the graphical components as a dynamic element; one or more processors associating the dynamic element with a variant list including a plurality of element variants; one or more processors receiving a selection of a subset of the plurality of element variants from the variant list; and one or more processors generating a first instantiation of the visual representation including a combination of the subset of the plurality of element variants as the dynamic element.
US09208513B1 Automated branding of generic applications
A mobile phone comprising a processor, a memory comprising a system partition and a data partition, and an application stored in the system partition of the memory. When executed by the processor, the application determines a brand identity associated with the mobile phone, accesses branding assets associated with the application based on the brand identity, and adapts the function of the application based on the accessed branding assets.
US09208510B1 Systems and methods for digital spend based targeting and measurement
The present disclosure includes a system, method, and article of manufacture for spend based targeting. In various embodiments, the system may transmit, to a third party system, a spend data file associating a first party cookie ID with spend data, as well as a first party cookie ID and/or a third party cookie ID to a web client. The web client may transmit the first party cookie ID and/or the third party cookie ID to the third party system, and the third party system may generate a look alike model for targeting advertisements to the web client based on the spend data file and clickstream data associated with the web client. In various embodiments, the third party system may match the third party cookie ID with the first party cookie ID in the spend data file, which may associate a customer with a segment.
US09208508B1 Distributing content
Content items are distributed in content item distribution slots that define a period of time. A purchaser of a content item distribution slot can select one or more content items to distribute in the slot based on information regarding an individual to whom a content item is distributed in the content item distribution slot.
US09208504B2 Using geographical location to determine element and area information to provide to a computing device
A database has a plurality of elements, where each element is associated with a location and at least one set of different attribute values, wherein each set includes a timestamp when the attribute values in the set were determined. A determination is made of a reference geographical location, an element having a geographical location within a geographical region including the referenced geographical location, a most recent set of the attribute values for the element having a most recent timestamp, a previous set of attribute values for the determined element comprising the set of attribute values having a previous timestamp prior to the most recent timestamp, and whether a condition with respect to at least one of the most recent set of attribute values and the previous set of attribute values of the determined element is satisfied.
US09208498B2 Methods and apparatuses to track keywords for establishing communication links
Methods and apparatuses to track keywords used for matching advertisements that provide references to make calls for real time communications. One embodiment includes: selecting an advertisement based on a condition; providing a reference for presentation with the advertisement, to identify the condition and the advertisement; and charging an advertisement fee in response to a call via the reference for a real time communication session.
US09208497B2 Methods and apparatuses for prioritizing advertisements for presentation
Methods and apparatuses for sorting seller listings or advertisements of a seller network. One embodiment includes: determining an indicator of potential revenue that is expected to be generated from presentation of advertisements, based on statistical data indicating performance of the advertisements; and presenting one or more of the advertisements based at least partially on the indicator of potential revenue.
US09208495B2 Methods and apparatuses for advertisement presentation
Methods and apparatuses to present advertisements which provide references to request real time communication connections. One embodiment includes presenting an advertisement including information usable to request a real time communication connection to a predetermined advertiser, which is to be charged a fee for the advertisement responsive to the real time communication connection established to the advertiser using the information.
US09208492B2 Systems and methods for biometric authentication of transactions
Systems and methods are provided for authorizing a user in connection with a transaction at a transaction terminal. The systems and methods described herein enable a series of operations whereby a user using a mobile device can capture a code that uniquely identifies a transaction terminal. In addition the mobile device can also capture a user's biometrics, generate a biometric identifier and biometrically verify the user's identity by comparing the biometric identifier to a previously generated biometric identifier. If the user is biometrically authenticated the mobile device can generate a transaction request including, a user identifier, a mobile device identifier, and the transaction terminal code and transmit the transaction request to a system server. Based on the transaction request, the system server can further authenticate the user and/or approve the requested transaction. If the user is authenticated, the system server can instruct the terminal to advance the financial transaction.
US09208490B2 Facilitating establishing trust for a conducting direct secure electronic transactions between a user and a financial service providers
Methods and systems are provided for supporting electronic transactions, including transactions that are provided with per-user, per-device and per-domain security across domains of multiple service providers.
US09208487B2 Card transaction device and method thereof
A card transaction device is provided. And it's disposed in a smart phone, the smart phone includes a transaction processing application, and the card transaction device includes a credit card reader, a converter, a microcontroller, a plug, and a data register. The credit card reader is configured to read and encode basic information of a card, so as to generate a first encoded data. The converter is configured to convert the input data into an audio signal. The microcontroller is configured to control and manage the card reader and the converter. The microcontroller can reset the card reader and the converter, the plug is configured to plug into an audio hole of the smart phone, and the audio signal is transmitted through the audio hole to the smart phone.
US09208481B2 Transaction data capture device and system
The present invention is directed to a device and system for capturing transaction data sent between a point of sale terminal and a peripheral device. The transaction data capture device includes an input for receiving transaction data sent from the point of sale terminal to a peripheral device during the course of a transaction with a customer and an output for transmitting the transaction data to the peripheral device. The transaction data capture device further includes a processor programmed to detect and save the transaction data received at the input and associate the transaction data with customer identity information identifying the customer. The transaction data capture device also includes a memory for storing the associated transaction data and customer identity and a network interface for routing the transaction data and associated identity information from memory over a data communications network.
US09208476B2 Counting and resetting broadcast system badge counters
Providing a badge counter from a server to a consumer. The badge counter indicates a number of notifications. A method includes receiving an event in a sequence of events. The event has an associated time stamp. The method further includes associating with the event a plurality of additional time stamps from events in the sequence of events occurring before the event. The method further includes creating a notification for an end user consumer device, the notification including an indication of a badge counter value based on the plurality of additional time stamps. The method further includes sending the notification, including badge counter value to the consumer device.
US09208473B2 Conditional disclosure of a response to content posted in a social network
Technologies are generally described for a social networking service (SNS). In some examples, a method performed under control of a server may include receiving a user input associated with the user responding to content posted in an online forum, determining whether a threshold condition set by the user is satisfied for the user's response to be disclosed with regard to a particular piece of content posted in the online forum, and disclosing the user's response to the particular piece of content posted in the online forum when the threshold condition is determined to be satisfied.
US09208472B2 Addition of plan-generation models and expertise by crowd contributors
The subject disclosure is directed towards a web service that maintains a set of models used to generate plans, such as vacation plans, in which the set of models includes models that are authored by crowd contributors via the service. The models include rules, constraints and/or equations, and may be text based and declarative such that any author can edit an existing model or combination of existing models into a new model. Users can access the models to generate a plan according to user parameters, view a presentation of that plan, and interact to provide new parameters to the model and/or with objects in the plan to modify the plan and view a presentation of the modified plan.
US09208470B2 System for custom user-generated achievement badges based on activity feeds
Disclosed are methods and apparatus for generating and awarding user-generated badges. In one embodiment, a user-generated badge may be generated in response to input received via a graphical user interface. The user-generated badge may be represented by a media token and have associated therewith a set of rules defining one or more activities to be completed. Activity data may be monitored via one or more data sources based upon the set of rules. An instance of the user-generated badge may be automatically awarded to individuals satisfying the set of rules.
US09208466B2 Electronic lock box system with incentivized feedback
An electronic lock box system that includes a central computer, which allows “listing agents” (if used in a real estate sales environment) to custom tailor a survey questionnaire that relates to features connected with the potential sale or lease of a property, and thereby garner feedback information from potential buyers (or lessees), or at least from “showing agents” that represent potential buyers/lessees. To improve response rate, the listing agent can add incentives to other agents who provide useful feedback. Furthermore, the system can be configured such that reciprocal feedback is necessary in order for a participating agent to see feedback about his or her own listings.
US09208465B2 System and method for enhancing call center performance
A system and method for visualizing performance metrics are disclosed. The system includes a data acquisition component which collects information related to a set of agents operating in a work environment, a performance metric computation component which computes, for one of the agents, values for a performance metric at each of a plurality of times within a selected time period, and a representation generator which generates a representation for display to the agent, the representation providing the agent with information on the agent's current value for the performance metric. A processor implements the data acquisition component, the performance metric computation component, and the representation generator.
US09208464B2 Methods and apparatus for analyzing locate and marking operations with respect to historical information
Methods, apparatus and systems including a computer comprising at least one hardware processor, at least one tangible storage medium (memory), and at least one input/output (I/O) interface for evaluating a quality of a first locate and/or marking operation to identify a presence or an absence of at least one underground facility. First information relating to the first locate and/or marking operation is compared to second information relating to at least one second locate and/or marking operation different from the first locate and/or marking operation. One or more indications of a quality assessment of the locate and/or marking operation is automatically generated based on such a comparison, and the one or more indications of the quality assessment are electronically stored on the at least one tangible storage medium, and/or electronically transmitted via the at least one I/O interface, so as to provide an electronic record of the quality assessment.
US09208463B1 Thresholds for key performance indicators derived from machine data
One or more processing devices access a service definition for a service provided by one or more entities that each produce machine data or about which machine data is generated. The service definition identifies the entities that provide the service and, for each entity, identifying information for locating machine data pertaining to that entity. The processing devices access a key performance indicator (KPI) for the service that is defined by a search query that produces a value derived from the machine data pertaining to the entities identified in the service definition. The value indicates how the service is performing at a point in time or during a period of time and indicates a state of the KPI. A graphical interface is displayed and an indication of at least one threshold, which defines an end of a range of values representing a state of the KPI, for the KPI is received.
US09208462B2 System and method for generating a marketing-mix solution
A method for generating a marketing-mix solution is provided. The method includes pre-modeling marketing data having a plurality of marketing-mix variables. Each of the plurality of marketing-mix variables is associated with marketing strategies for one or more products. The method also includes generating a sales and/or revenue based response model to identify contributory marketing-mix variables that affect the sales and/or revenue of the one or more products and analyzing the response model to determine individual contribution of each of the contributory marketing-mix variables towards the sales an/or revenue of the one or more products.
US09208461B2 Management and allocation of services using remote computer connections
A computer-implemented method for allocating services among a plurality of service operators where each capable of providing at least one service and each service operator operating a respective computer to receiving at a support server a request for service from at least one computer being operated by a user, generating a questionnaire to be answered by the user operating the at least one computer, selecting at least one service operator based upon the answered questionnaire, and establishing a service session between the at least one computer being operated by the user and the computer being operated by the at least one selected service operator for providing the requested service.
US09208456B2 Vehicle activity module
Systems and methods are disclosed for maintaining security and data gathering for a number of vehicles. The systems include a vehicle activity module for each of the vehicles. The vehicle activity module has a wireless transmitter, a storage device, at least one sensor for receiving event information from identification devices, such as RFID cards, keypads, magnetic ID cards, and the like, a releasable key container, and a processor for accessing and analyzing information. The VAMs are wirelessly connected to a computer system. The VAMs control access to the keys, monitor information relating to access, and store and transmit information relating to sales events, non-sales events, and intrusion events. The VAMs are capable of autonomous operation, without the need to access the computer system to verify event information. The VAMs further include signal attenuating mechanisms to facilitate use of “smart keys.”
US09208455B2 Wireless terminal device, communication system, and control method of wireless terminal device
A wireless terminal device includes: a transmission control unit which transmits a transfer request which is for requesting a use right of contract authentication information relating to a wireless business operator providing wireless connection services, which is information held by a second wireless terminal device as another wireless terminal device, via a wireless line when a predetermined operation is input; a receiving unit which receives transfer information which is transmitted via the wireless line in response to the transfer request for transferring the use right; and a control unit which sets valid contract authentication information based on the received transfer information.
US09208450B1 Method and apparatus for template-based processing of electronic documents
Techniques for processing electronic documents are disclosed. In one particular embodiment, the techniques may be realized as a method for processing electronic documents comprising obtaining an electronic document being sent over a network toward a destination, analyzing text content of the electronic documents to identify whether the electronic document matches any of a plurality of predefined document templates, wherein the electronic document conforms to a structure of at least one of the plurality of predefined document templates, and wherein the analyzing comprises executing at least one machine learning algorithm, the at least one machine learning algorithm trained using at least one sample electronic document having a predefined template, obtaining a document loss prevention (DLP) policy based on the at least one document template associated with the electronic document, and selectively allowing the electronic document to continue toward the destination based on the DLP policy.
US09208442B2 Ontology-based attribute extraction from product descriptions
Systems and methods are disclosed herein for obtaining a structured listing of attributes and corresponding values based on an unstructured document, such as a product description in a product record. Putative values are identified in the document and corresponding candidate attributes are identified in a taxonomy. Attribute-value pairs are then evaluated with respect to a plurality of rules. Attribute-value pairs and outputs of the one or more rules are evaluated using a machine-learning algorithm, such as a decision tree, in order to determine which attribute-value pairs to retain. Retained attribute-value pairs are stored and used to respond to search queries and facilitate comparison of products. Attributes selected may also be used to update a product template.
US09208441B2 Information processing apparatus, information processing method, and program
Disclosed herein is an information processing apparatus including an evaluation information extraction section configured to extract evaluation information including an object targeted to be evaluated and an evaluation of the object targeted to be evaluated from a linguistic expression given as information expressed linguistically by a user of interest; an identification section configured to identify whether the evaluation information is of a first type regarding content or of a second type regarding another user; and an evaluation prediction section configured to predict the evaluation by the user of interest regarding the content, based on the evaluation information of the first type given by the user of interest and on the evaluation information given by the other user in the evaluation information of the second type given by the user of interest.
US09208440B2 Method of analyzing a scenario represented as elements of a tensor space, and scored using tensor operators
A mathematical model to represent multiple role events of a threat scenario, and a methodology to score the events given the data or evidence contained in a knowledge base is provided. The multiple role event can include any action encompassed by an independent clause having multiple syntactical roles (subject, object, location, etc. . . . ) and containing multiple entities (person A, person B, object C, place D, etc. . . . ). Multiple role events are represented as elements of a tensor space, and are scored using tensor operators built from the semantic graph associated with the knowledge base.
US09208439B2 Generalized contextual intelligence platform
One embodiment of the present invention provides a system for providing user information to a recommender. During operation, the system receives, from the recommender, a registration for notification of changes to a context graph. The context graph includes information about user behavior and/or user interests. Next, the system receives, from a mobile device, event data derived from contextual data collected using detectors that detect the mobile device's physical surroundings. The system modifies the context graph based on the event data. The system then determines that the modification to the context graph matches the registration, and sends a notification of context graph change to the recommender.
US09208437B2 Personalized information pushing method and device
Embodiments of the present application relate to a personalized information pushing method, a personalized information pushing device, and a computer program product for pushing personalized information. A personalized information pushing method is provided. The method includes retrieving network behavior data related to access operations performed by user terminals, determining a numerical value of a degree of correlation between a user terminal and a plurality of information providing terminals having a correlation within a set time window based on the network behavior data, retrieving information providing terminals corresponding to a first user terminal to form a first data set based on the numerical values, retrieving information of the information providing terminals from the first data set to generate a first information, and pushing the first information to the first user terminal.
US09208436B2 Model selection device, model selection method and model selection program
The model selection device comprises a model optimization unit which optimizes a model for a mixed distribution, wherein related to an information criterion of complete data, with respect to a hidden variable post-event distribution of the complete data, the model optimization unit optimizes an expected information criterion of the complete data for a pair of a model and a parameter of a component which satisfies a predetermined condition.
US09208435B2 Dynamic creation of topical keyword taxonomies
System and methods for dynamically generating taxonomies of keywords and/or descriptors are provided. In one example, a navigation system for accessing a corpus of information provides for dynamic taxonomy generation expanding upon a topic entered by a user in a user interface. The navigation system generates, dynamically, at least one term associated with the received topic from at least one sense or meaning retrieved from a semantic network. The navigation system is further configured to present to the user the at least one term as a selectable refinement in response to receiving the topic entered by the user in the user interface. The system can also be configured to retrieve terms and/or senses from the semantic network and evaluate any retrieved terms for their informativeness. The system can further cache any information generated during taxonomy creation and update the corpus to reflect useful refinements.
US09208429B2 Multiple delivery device counter and counting method
A counter mechanism includes: a counter housing including a shaft and a hole; a first set of cam teeth located in the hole; a striker located in the hole and configured to move axially with respect to the hole having a second set of cam teeth; a counter wheel hub having a third set of cam teeth configured to communicate with both the first and second set of cam teeth, the counter wheel hub also having an actuator; and a counter wheel having an actuation feature configured to communicate with the actuator to cause the counter wheel to rotate when the counter wheel hub rotates. A method for counting dispensed items may also be described.
US09208427B2 Contactless communication medium, antenna pattern arrangement medium, communication apparatus, and communication method
A contactless communication medium includes: a base material made of an insulating material; an antenna coil portion formed by winding a conductor in a plane on the base material; a capacitor connected to the antenna coil portion; a communication processing section connected to the antenna coil portion and the capacitor to perform a contactless communication process; and a metal pattern having a predetermined area and disposed in a region surrounded by the antenna coil portion, the metal pattern being not electrically connected to the antenna coil portion or the capacitor.
US09208426B2 RFID chip module
A chip module comprises a carrier, having a first main surface and a second main surface opposite to the first main surface. A first recess structure is arranged in the carrier in the first main surface, and a chip is arranged in the first recess structure of the carrier. A patterned metallization layer is deposited on the second main surface of the carrier, the metallization layer having a first metallization structure and a second metallization structure, the first metallization structure being electrically isolated from the second metallization structure. The chip is electrically connected to the first metallization structure and the second metallization structure. The chip module comprises in particular an RFID chip and is suited to be connected to a textile substrate by way of laser reflow soldering.
US09208424B2 Active control secure transaction card
A secure transaction card does not interact with an interrogating radio frequency field without user interaction. The user interaction may include pressing on the card to cause a smartcard chip to connect to a coil on the card. The user interaction may also include exposing the card to light, motion, touch, or the like. Control of the secure transaction card may be active or passive.
US09208419B2 Controlling apparatus for controlling a first printing apparatus and a second apparatus
A controlling apparatus, which controls a first printing apparatus that prints an image on a continuous sheet and a second printing apparatus that prints on the continuous sheet on a downstream side in a conveyance direction of the continuous sheet, stores a printing state of the first printing apparatus and a second printing apparatus. When an error is detected in the first printing apparatus, conveyance of the continuous sheet is suspended, and occurrence position of the error is specified. When it is detected that the error is solved, and conveyance of the continuous sheet is restarted, control is performed such that the second printing apparatus performs printing on the continuous sheet on which printing has been finished by the first printing apparatus before the detection of the error, based on the specified occurrence position of the error.
US09208414B2 Bi-color duplex printing method and device
The application discloses a method for double-sided printing with two colors. The method comprises a step of receiving two pages of original four-color page lattice according to a printing order each time, a step of extracting effective data of first and second colors in the two pages of original four-color page lattice, respectively and a step of writing the data of the first and second colors extracted respectively into data of first color, second color, third color and fourth color of a new page of four-color page lattice, respectively. The application discloses an apparatus for double-sided printing with two colors including a printing controller, and the printing controller includes an original page receiving module configured to receive two pages of original four-color page lattice according to a printing order each time, an extracting module configured to extract effective data of first and second colors in the two pages of original four-color page lattice, respectively, and a new page generating module configured to write the data of the first and second colors extracted respectively into data of first color, second color, third color and fourth color of a new page of four-color page lattice, respectively. The invention improves the printing efficiency.
US09208406B2 Dual card connector and wireless electronic device employing same
A dual card connector includes a holder and a base body. The holder defines two overlapped sliding slots for receiving cards, each sliding slot includes a group of conductive terminal assemblies, the holder includes a plurality of elastic pieces, the elastic pieces are connected to the conductive terminal assemblies. The base body includes at least two groups of connecting terminals. The holder is detachably mounted to the base body, thus the elastic pieces are resisted and electrically connected to the connecting terminals. An electronic device employing the dual card connector is also disclosed.
US09208400B2 Registration and comparison of three-dimensional objects
Information of different scans of physical objects may require comparison, for example to determine if the scans are of the same object or if an object has changed, or better information for a three dimensional model may be desired. Different scans of physical objects may be compared by determining lines or planes tangent to a surface at a discrete number of points, registering three dimensional information provided by the scans using the tangent lines or planes, and determining a measure of discrepancy between the surfaces. Three dimensional information of different scans of the same object may also be merged after determining lines or planes tangent to a surface at a discrete number of points and performing registration and merging.
US09208399B2 Method of extracting visual descriptor using feature selection and system for the same
A method and system for extracting a visual descriptor using a feature selection are provided. The system includes an image input unit configured to receive an image, a candidate feature point group detecting unit configured to detect a point having a local maximum or minimum of local region filtering in scale-space images as being included in a candidate feature point group, a feature point selecting unit configured to calculate an importance for each candidate feature point, depending on its characteristics, select the candidate feature point as a feature point when its importance is greater than the predetermined threshold value, a dominant orientation calculating unit configured to calculate a dominant orientation of the selected feature point and a visual descriptor extracting unit configured to extract a patch for each feature point, according to its scale, location and dominant orientation, and extract a visual descriptor from the patch.
US09208395B2 Position and orientation measurement apparatus, position and orientation measurement method, and storage medium
An apparatus comprises: extraction means for extracting an occluded region in which illumination irradiated onto the target object is occluded in an obtained two-dimensional image; projection means for projecting a line segment that constitutes a three-dimensional model onto the two-dimensional image based on approximate values of position/orientation of the target object; association means for associating a point that constitutes the projected line segment with a point that constitutes an edge in the two-dimensional image; determination means for determining whether the associated point that constitutes an edge in the two-dimensional image is present within the occluded region; and measurement means for measuring the position/orientation of the target object based on a distance on the two-dimensional image between the point that constitutes the projected line segment and the point that constitutes the edge, the points being associated as the pair, and a determination result.
US09208384B2 Methods and systems for content processing
Cell phones and other portable devices are equipped with a variety of technologies by which existing functionality can be improved, and new functionality can be provided. Some relate to visual search capabilities, and determining appropriate actions responsive to different image inputs. Others relate to processing of image data. Still others concern metadata generation, processing, and representation. Yet others relate to coping with fixed focus limitations of cell phone cameras, e.g., in reading digital watermark data. Still others concern user interface improvements. A great number of other features and arrangements are also detailed.
US09208379B2 Image processing apparatus, image processing method, image processing system, and storage medium storing program
An image processing apparatus connectable to a terminal which captures an image includes an acquisition unit configured to acquire augmented information and attribute information from feature information extracted from a captured image, a processing unit configured to generate, if a plurality of pieces of the feature information is extracted, at least one piece of new augmented information by using a plurality of pieces of the augmented information acquired by the acquisition unit, based on the attribute information, and a transmission unit configured to transmit the new augmented information generated by the processing unit to the terminal.
US09208377B2 Human detection device
In a human detection device 1, an edge extractor 11 carries out edge extraction processing to an input image 21 and produces a horizontal edge image 22. A shoulder detector 12 detects a shoulder center and a shoulder width of a person included in the input image 21. A foot detector 13 detects a foot position of the person based on the detected shoulder center and shoulder width. A top detector 14 detects a top position of the person based on the detected shoulder center and shoulder width. A size determiner 15 determines a horizontal size of the person based on the detected shoulder width and determines a vertical size of the person based on the detected foot position and top position. The size determiner 15 produces human range data 28 including the determined sizes, the shoulder center position, the foot position, and the top position.
US09208376B2 Identification of people using multiple skeleton recording devices
Method(s) and system(s) for identification of an unknown person are disclosed. The method includes receiving skeleton data comprises data of multiple skeleton joints of the unknown person from skeleton recording devices. The method further includes extracting G gait feature vectors from the skeleton data. Further, the method includes classifying each gait feature vector into one of N classes based on a training dataset for N known persons and computing a classification score for each class. The method also includes clustering the training dataset into M clusters based on M predefined characteristic attributes of the known persons, tagging each gait feature vector with one of the M clusters based on a distance between a respective gait feature vector and cluster centers of M clusters, and determining a clustering score for each M cluster. The method further includes identifying the unknown person based on clustering scores and classification scores.
US09208375B2 Face recognition mechanism
The present disclosure relates to a face recognition method, an apparatus, and a computer-readable recording medium for executing the method. According to some aspects of the present disclosure, the face recognition method includes: (a) a key point setting step of setting key points at designated positions on an input face image; (b) a key point descriptor extracting step of extracting each descriptor for each key point; and (c) a matching step of determining whether the input face image matches pre-stored face images using descriptors for key points within a designated region including each descriptor for each first key point obtained from the input face image, and second key points of pre-stored face images which correspond to first key points obtained from the input face image.
US09208365B2 Method and apparatus to mitigate multipath in RFID
A distance between at least one antenna of an interrogation system and a transponder, such as an RFID tag, is determined based on derivatives with respect to frequency of the phase and the signal strength of responses transmitted by the transponder and received at the at least one antenna. The derivatives of the phase and the signal strength facilitate compensating for sources of multipath interference. Determining changes in distance may further facilitate determining location, speed, or bearing of the transponder by the interrogation system.
US09208364B2 Identification information access device
The present invention provides an identification information access device configured to read identification information stored in an RFID tag even if the RFID tag is located at a position at which identification information of the RFID tag has been difficult to read. An identification information access device includes: a first antenna unit configured to read identification information stored in an RFID IC tag included in a storage medium; a control device configured to be electrically connected to the first antenna unit and to drive the first antenna unit so as to acquire the identification information in accordance with an electromagnetic wave transmitted from the first antenna unit; and a second antenna unit configured to be independent from the first antenna unit, to be disposed at a position separated from the first antenna unit, and not to be electrically connected to the first antenna unit and to the control device.
US09208363B2 Methods, systems, and products for discovering electronic devices
Methods, systems, and products self-identify an electronic device to a remote control. The remote control queries the electronic device, and the electronic device sends a response. A collision avoidance mechanism is invoked to determine if the response self-identified the electronic device.
US09208362B1 Methods, systems and apparatuses for radio frequency identification
A system for radio frequency identification (RFID) includes an enclosure defining an interior region interior to the enclosure, and a feed for generating an electromagnetic field in the interior region in response to a signal received from an RFID reader via a radio frequency (RF) transmission line and, in response to the electromagnetic field, receiving a signal from an RFID sensor attached to an item in the interior region. The structure of the enclosure may be conductive and may include a metamaterial portion, an electromagnetically absorbing portion, or a wall extending in the interior region. Related apparatuses and methods for performing RFID are provided.
US09208358B2 Electronic paper, copy controlling program and copy controlling method
Disclosed is an electronic paper, which makes it possible to suppress inappropriate operations for copying images displayed and retained on the electronic paper. The electronic paper includes: a gyro sensor and a pressure sensor; a status detecting section to determine whether or not the electronic paper currently enters into a specific status; a counting section to count a number of times the electronic paper enters into the specific status and a display controlling section to make an image display section display a document image thereon. When the status detecting section determines that the electronic paper currently enters in the specific status, and the counting section determines that the number of times the electronic paper has entered into the specific status, is equal to or lower than the predetermined number of times, the display controlling section adds specific information, indicating that the document image is a copy, to the document image.
US09208357B1 FPGA configuration bitstream protection using multiple keys
Circuits, methods, and apparatus that prevent detection and erasure of encoding or encryption keys. These encoding keys may be used to encode a configuration bitstream or other data for an FPGA or other device. An exemplary embodiment of the present invention masks a first key to form an encoding key in order to prevent detection of the first key. In a specific embodiment, the first key is encoded using a second key. The encoded key is used to encode a configuration bitstream or other data. The encoded key is stored on an FPGA or other device. When the device is to be configured, the encoded key is retrieved and used to decode the bitstream or other data. A further embodiment stores an encryption key in a one-time programmable memory (OTP) array to prevent its erasure or modification. The encoding key may be further obfuscated before storage.
US09208353B2 Malware and tamper resistant computer architecture
Generally described herein are methods and systems for enhanced tamper and malware resistant computer architectures. A system for enhanced tamper and malware resistance can include a harvardizer configured to receive comingled instructions and data and produce separated instructions and data. A data memory can be configured to receive the separated data. An instruction memory that is physically separate from the data memory can be configured to receive the separated instructions. The system can include one or more computer processors that can be configured to execute the separated instructions and data. The system can include one or more encryptors or decryptors to help thwart injection based attacks.
US09208342B2 Distributed secure content delivery
Techniques for distributed and secure content delivery are provided. Requests for content are routed to a centralized service where the requestors are authenticated for access to the content. The centralized service generates access statements for the requestors. The requestors are redirected to particular distributed content services having access to the desired content. The distributed content services verify the access statements and vend the desired content to the requestors.
US09208341B2 System and method for synchronizing an encrypted file with a remote storage
A method and system for synchronizing an encrypted file with a remote storage is disclosed. According to one embodiment, a computer-implemented method comprises providing a user with a user application and an encryption key in a portable memory device. The user runs the user application to securely access to a storage on a cloud storage system. A file is encrypted with the encryption key stored in the portable memory device and synchronized with the cloud storage system.
US09208340B2 Parallel data processing system based on location control and method thereof
A parallel data processing system based on location control and a method thereof can divide a data into smaller data and store and manage the divided data using a location control technique which divides a file, distributes the divided files, and stores and manages information on corresponding areas. The parallel data processing system includes an encryption and decryption server, a location control server and a storage device. Further, the system may reduce the time required for storing and reading a data and improve the speed of controlling encryption and decryption of the data as a result, by distributing the data in a plurality of storage devices and processing the data in parallel in encrypting, storing and restoring a data which requires security. In addition, performance of a plurality of storage devices and efficiency of the storage may be enhanced.
US09208339B1 Verifying Applications in Virtual Environments Using a Trusted Security Zone
Systems and methods for transmitting information between virtual environments comprising: copying a first virtual environment, wherein the first virtual environment comprises a plurality of original applications, a first clock, and a first trusted security zone to create a second virtual environment, wherein the second virtual environment comprises a copy of at least some applications of the plurality of original applications, a second clock, and a second trusted security zone. The first trusted security zone may receive a request from a copied application to engage in a transmission with an original application. The first trusted security zone may then determine if a nonce associated with the copied application is a verified nonce, wherein determining if the nonce is a verified nonce comprises comparing, by the first trusted security zone, the nonce associated with the copied application to a nonce associated with the at least one original application.
US09208338B2 Method and apparatus for securely executing multiple actions using less than a corresponding multiple of privilege elevation prompts
A method and apparatus for securely executing a plurality of actions requiring elevated privilege using less than a corresponding plurality of prompts for privilege elevation, and in some embodiments, only a single prompt for privilege elevation, comprising: receiving a request to perform a first action requiring an elevated privilege; acquiring the elevated privilege to perform the first action; executing the first action, wherein the first action is executed based on the elevated privilege; receiving a request to perform a second action requiring an elevated privilege; and executing the second action using the elevated privilege acquired for the first action.
US09208335B2 Space-time separated and jointly evolving relationship-based network access and data protection system
A network security system that employs space-time separated and jointly-evolving relationships to provide fast network access control, efficient real-time forensics capabilities, and enhanced protection for at-rest data in the event of a network breach. The network security system allows, in part, functionality by which the system accepts a request by a user to access the data stored in the database, identifies a sequence of security agents to participate in authenticating and protecting the access of the data by the user, generates a sequence of pseudorandom IDs and space-time varying credentials, checks at each one of the security agents a corresponding one of the credentials, determines that the user is permitted to access the data using access control logs if all the security agents accept the corresponding credentials, and varies the credentials based on a space-time relationship.
US09208333B2 Secure data recorder
A method and apparatus for securely encrypting data is disclosed. Conventional protections against the loss or theft of sensitive data such as full disk encryption are not effective if the device is, or has recently been, running when captured or found because the keys used for full disk encryption will still be in memory and can be used to decrypt the data stored on the disk. Some devices, such as devices which gather sensitive data in use, must run in environments in which they might be captured by a person seeking access to the sensitive data already recorded by the device. An encryption method is proposed in which files on a recorder's persistent memory are initialised with pseudo-random masking data whilst the recorder is in a relatively secure environment. One or more parameters which can be used to re-create the pseudo-random masking data are encrypted with a public key using a public-key encryption algorithm and stored on the recorder. The device's memory is then purged to remove the one or more parameters. Later, when miming in a relatively insecure environment, the sensitive data is encrypted (414) using a symmetric encryption algorithm, and combined (418) with the masking data previously stored in the storage file. When the encrypted files are transferred to a reader device with access to the corresponding private key, the masking data can be recreated, the symmetric encryption reversed and the sensitive data recovered. However, an adversary without the private key cannot recreate the masking data, and is thus unable to recover the sensitive data even with the symmetric encryption key which he might successfully extract from the recorder's volatile memory.
US09208330B2 System for execution of security related functions
An apparatus having a first memory circuit, a plurality of arithmetic modules, and a plurality of second memory circuits. The first memory circuit may be configured to read or write data to or from a host. The plurality of arithmetic modules each may be configured to be enabled or disabled in response to control signals received from the first memory circuit. The plurality of second memory circuits may be configured to read or write data to or from the first memory circuit through a data exchange layer. The arithmetic modules provide cryptographic protection of the data.
US09208324B2 System and method to perform secure web application testing based on a hybrid pipelined approach
A processor implemented method of performing a security web application testing based on a hybrid pipelined application which includes (a) receiving, a scan profile selected from a group includes (i) an uniform resource locator associated with an application, (ii) one or more scan attack templates, (iii) one or more attack rules, and (iv) one or more automation scan results, (b) generating, a one or more possible tasks based on the scan profile, (c) selecting, at least a sub-set of tasks from the one or more possible tasks, (d) assigning, the sub-set of tasks to an automated task performing tool, and a user for execution, (e) obtaining, one or more tasks results associated with the sub-set of tasks executed by the automated task performing tool, and the user, and (f) updating, a database based on the one or more tasks results.
US09208322B1 Privacy leak detection in .NET framework
A binary application suitable for the .Net framework is disassembled into human readable code. Or, CIL or MSIL code is obtained. The methods are put into a representation indicating which methods of the code call other methods. A source method call chain having a source API and a sink method call chain having a sink API are discerned from the representation. APIs are put into the same format as the methods to allow matching. A method in common between the two call chains indicates that a privacy leak exists. The application is downloaded from a remote server to a computing device where the analysis occurs.
US09208317B2 Simultaneous screening of untrusted digital files
A plurality of untrusted digital files are run simultaneously in fewer sandboxes than there are files, while monitoring for malicious activity. Preferably, only one sandbox is used. If the monitoring detects malicious activity, either the files are run again in individual sandboxes, or the files are divided among subsets whose files are run simultaneously in one or more sandboxes, while monitoring for malicious activity.
US09208315B2 Identification of telemetry data
Methods, systems, and computer-readable media are disclosed for identifying telemetry data. A particular method scans a file and compares the file to at least one attribute to be used for telemetry collection. When the file is identified as a telemetry candidate, an offer to submit a sample of the file is sent to a server. A response to the offer is received from the server. If the response to the offer indicates an acceptance, a sample of the file is sent to the server.
US09208314B1 Systems and methods for distinguishing code of a program obfuscated within a packed program
A computer-implemented method for distinguishing code of a program obfuscated within a packed program may include (1) retrieving memory of the packed program that includes the code of the obfuscated program in an unobfuscated state and unpacking code that unpacks the code of the obfuscated program when the packed program is executed, (2) identifying an import address table within the memory of the packed program, (3) determining that the import address table is an import address table of the code of the obfuscated program, (4) determining that a region of code within the memory of the packed program may be the code of the obfuscated program by determining that the region of code uses the import address table, and (5) performing a security operation on the region of code. Various other methods, systems, and computer-readable media are also disclosed.
US09208312B2 Checking data content
A system for automated checking of data content includes content checkers (208) to (214) arranged in parallel and connected between an input sub-system (204) and an output sub-system (216). The content checkers (208) to (214) check different data formats. Incoming data from an external computer system (202) is passed by the input sub-system (204) to the checkers (208) to (214), which report check results to both input and output sub-systems (204) and (216). From the four check results, the input sub-system (204) judges the data's acceptability for forwarding to a sensitive computer system (218). Unacceptable data is discarded; acceptable data passes to the output sub-system (216), which also judges the data's acceptability from the four check results. The output sub-system (216) only receives such data if the check results are all positive or if the input sub-system (204) malfunctions: in the latter case the check results are not all positive, and the output sub-system (216) will not forward the data unless it also malfunctions. The decision to forward data is therefore split between the input and output sub-systems (206) and (216).
US09208311B2 Detection of a threat in a communications network
Disclosed is a method for detecting a threat against a host computer coupled to the front-end computer. A communication connection is established between the host computer and a source computer with a handshake procedure through a front-end computer. Application data is received in the front-end computer from the source computer. The received application data is returned from the front-end computer to the source computer. It is monitored in the front-end computer if a predetermined message is received from the source computer in response to the return of the application data. If the predetermined message is received in the front-end computer, it is determined that the source computer is a trusted communication party, But if the predetermined message is not received, the source computer is determined as a threat. The invention relates also to computing device implementing the method and a computer program product.
US09208309B2 Dynamically scanning a web application through use of web traffic information
Collecting log file data from at least one log file. From the collected log file data, at least one HTTP request can be generated to exercise a web application to perform a security analysis of the web application. The HTTP request can be communicated to the web application. At least one HTTP response to the HTTP request can be received. The HTTP response can be analyzed to perform validation of the web application. Results of the validation can be output.
US09208305B2 Method and apparatus for a token
A method and apparatus of using a token comprises receiving an indication of a presence of a nearby short-range terminal and waking up the token in response to receiving the indication. The method further comprises performing authentication between the token and the terminal, without requiring a user to directly interact with the token.
US09208303B2 Mobile terminal and application program login method thereof
The present invention discloses a mobile terminal and an application program login method thereof. The method includes acquiring the to-be-authenticated fingerprint information inputted by a user when the user is required to log into an application program; determining whether the to-be-authenticated fingerprint information is the same as a correct fingerprint information which is locally preset and corresponds to the application program; if yes, then acquiring, according to the identifying fingerprint information, a user name and a password corresponding to the application program from a login information file which is locally preset; and logging into the application program according to the user name and the password. By logging into the application program via fingerprint, the present invention not only ensures the security of personal information, but also allows the user to quickly log into the application program, thereby improving user experience.
US09208302B2 Multi-factor authentication using biometric data
Technologies for enabling biometric multi-factor authentication includes a transform selector value, a transform function that uses the transform selector value and a biometric user identifier as input, a salt derived from the output of the transform function, and a cryptographic hash function that generates a hash value based on the salt and a non-biometric user identifier.
US09208301B2 Determining user authentication requirements based on the current location of the user in comparison to the users's normal boundary of location
Systems, apparatus, methods, and computer program products are provided for determining a user's authentication requirements/credentials for a specific network access session based on the current location of the user in comparison to known boundaries of location associated with the user, such as the user's residence, place of business or the like. As such, the present invention serves to expedite the process for authenticating a user who desires to gain access to a network service, such as a banking application or the like.