Document Document Title
US09178516B1 Voltage-level shift apparatus and method of operating the same
A voltage-level shift apparatus includes a first level shift unit, a second level shift unit, a charging unit, and a discharging unit. The first level shift unit receives a reference voltage and a power voltage to output a level-shifting voltage. The second level shift unit is connected to the first level shift unit and receives the level-shifting voltage. The charging unit receives a control voltage to provide an output voltage. The discharging unit is connected to the charging unit and receives the control voltage and the reference voltage. When the control voltage turns on the charging unit and turns off the discharging unit, the charging unit is charged by the level-shifting voltage. When the control voltage turns off the charging unit and turns on the discharging unit, the discharging unit is discharged from the output voltage.
US09178515B2 Circuits and methods for sharing bias current
The present disclosure includes systems and methods for sharing bias current. In one embodiment, shared bias current passes through a first level device to one or more second level devices along a bias current path. Multiple active devices may share bias current along a bias current path and process signal along the same or different signal paths. In one embodiment, bias current from one device is split among multiple devices. In another embodiment, bias current is combined from multiple devices into a device. Embodiments may include an interstage circuit along a signal path that improves stability of the circuit.
US09178514B1 Polymorphic hardware engine
The invention uses a new process called dynamic pin reassignment (DPR) to alter the circuitry. The system assigns input and output signals to buses that lead to a central distribution point, the crossbar, in the circuit. At the crossbar, signals are routed to the appropriate destination over one of the bus wires to the correct chip from the crossbar. At irregular intervals, the signal mapping for each in/out function is changed. The assignments or mappings, comprise the state of the circuit at any time. The period that a state is valid is determined by applying a reseeding function to a portion of a randomized stream that calculates the next state and the duration of validity. Multiple seeds or keys are used to create the states. Because each key changes independently of the other keys and without notice, the time interval for a valid state is greatly reduced, complicating any effort to reveal the internal states of chips.
US09178512B2 Capacitive coupling based sensor
A capacitive coupling based sensor is disclosed. In some embodiments, a sensor comprises a transmitter and a receiver that are configured to be capacitively coupled when a coupling condition is satisfied as well as a circuit configured to determine whether a received signal that is received by the receiver matches a transmitted signal that is transmitted by the transmitter.
US09178511B2 Capacitive keypad position sensor with low cross-interference
A capacitive keypad position sensor includes a keypad touch panel having a first defined key area disposed in a plane having first and second orthogonal axes. First and second electrodes respectively occupy first and second areas below the first defined key area. Each electrode includes a plurality of parallel rows extending along the first axis and spaced apart from one another along the second axis. Each of the plurality of rows has a length along the first axis that is substantially equal to a width of the first defined key area along the first axis measured at a position along the second axis corresponding to the respective one of the plurality of rows. At least some of the first and second pluralities of rows are interleaved with one another.
US09178507B2 Apparatus and methods for ultrasound transmit switching
Apparatus and methods for ultrasound transmit switching are provided. In certain implementations, a transmit switch includes a bias polarity control circuit, a bias circuit, a first high voltage field effect transistor (HVFET), and a second HVFET. The sources of the first and second HVFETs are connected to one another at a source node, the gates of the first and second HVFETs are connected to one another at a gate node, and the drains of the first and second HVFETs are connected to an input terminal and an output terminal, respectively. The bias circuit and the bias polarity control circuit are each electrically connected between the source node and the gate node. The bias polarity control circuit can turn on or off the HVFETs by controlling a polarity of a bias voltage across the bias circuit, such as by controlling a direction of current flow through the bias circuit.
US09178506B2 High speed charge control for power switching devices
Disclosed are systems, devices, apparatus, circuits, methods, and other implementations, including a system that includes one or more power switching devices that receive power delivered by a power unit, and a high-speed charge control circuit electrically coupled to the one or more power switching devices. The high-speed charge control circuit includes an optocoupler coupled to the power unit and further coupled to a first switching device of the high-speed charge control circuit, the first switching device actuated based on output of the optocoupler to establish an electrical path to discharge at least a portion of electrical charge present at least on the one or more power switching devices when power delivery from the power unit is stopped.
US09178502B2 Apparatus for a monotonic delay line, method for fast locking of a digital DLL with clock stop/start tolerance, apparatus and method for robust clock edge placement, and apparatus and method for clock offset tuning
A delay line has at least four delay stages coupled together in a series, two multiplexers, and a phase interpolator. The first multiplexer has a first input coupled to an output of the first delay stage, and a second input coupled to an output of the third delay stage. Similarly, the second multiplexer has a first input coupled to an output of the second delay stage, and a second input coupled to an output of the fourth delay stage. The phase interpolator is coupled to outputs of the first and second multiplexers, and has an output.
US09178499B2 Low-power offset-stored latch
A low-power offset-stored CMOS latch includes, for example, a common current source that is arranged to provide a predetermined bias current for an offset storage phase and enable transistors that are arranged to couple a resolution bias current during a resolution period to a respective input pair device. The low-power offset-stored CMOS latch optionally includes current scaling to provide a resolution bias current that is larger than the predetermined bias current of the offset storage phase.
US09178497B2 Precision oscillator with temperature compensation
New and highly stable oscillators are disclosed. Such an oscillator may include a first capacitor electrically connected to a first charging switch and a first discharging switch, a second capacitor electrically connected to a second charging switch and a second discharging switch, a first chopping circuit having a first input electrically connected to the first capacitor and a second input electrically connected to a reference voltage, a second chopping circuit having a first input electrically connected to the second capacitor and a second input electrically connected to the reference voltage, a first comparator having a first input electrically connected to a first and second output of the first chopping circuit, a second comparator having a first input electrically connected to a first and second output of the second chopping circuit, and control circuitry having a first input electrically coupled to an output of the first comparator and a second input electrically connected to an output of the second comparator.
US09178496B2 Low leakage retention register tray
A particular method includes receiving a retention signal. In response to receiving the retention signal, the method includes retaining state information in a non-volatile stage of a retention register and reducing power to a volatile stage of the retention register. The non-volatile stage may be powered by an external voltage source. The volatile stage may be powered by an internal voltage source.
US09178488B2 Simple and minimally invasive methods and systems for sensing and computing load impedance
Systems and methods for direct load impedance computation for a two-port network are disclosed. For a two-port network connected between a first port and a second port, a method can include defining an equivalent PI network including a first equivalent network element in communication with the first port, a second equivalent network element in communication with the second port, and a third equivalent network element connected between the first port and the second port. A linear passive load can be connected to the second port of the two-port network, currents through the linear passive load, the second equivalent network element, and the third equivalent network element can be measured, and a load impedance of the linear passive load can be determined based on predetermined values of a voltage at the first port and a voltage at the second port.
US09178486B2 GFCI compatible system and method for activating relay controlled lines having a filter circuit between neutral and ground
A GFCI compatible system and method for activating relay controlled lines having a filter circuit between neutral and ground is described herein. Specifically the disclosure teaches a GFCI compatible system for reducing CMN. A CMN Suppressor can comprise a hot line, a neutral line, and a ground line. The first ends of the hot line, the neutral line, and the ground line can be connected to a GFCI protected hot node, a GFCI protected neutral node, and an electrical ground. The second ends of the hotline, the neutral line, and the ground line can be connected to a CMN sensitive device hot line, a CMN sensitive device neutral line, and a CMN sensitive device ground line. The system can further comprise a high pass filter, a hot line relay contact, a neutral line relay contact, a hot line relay, and a neutral line power relay.
US09178484B2 Filter
In a filter, LC parallel resonators are arranged along an x-axis direction of a multilayer body and include coils and capacitors, respectively. LC parallel resonators adjacent to each other in the x-axis direction are electromagnetically coupled to each other. Each of the coils includes line conductor layers disposed on an insulating layer, a first via-hole conductor that extends from the line conductor layers to a negative direction of a z-axis direction and that is electrically connected to one conductor layer of the corresponding one of the capacitors, and a second via-hole conductor that extends from the line conductor layers to the negative side of the z-axis direction and that is electrically connected to the other conductor layer of the capacitor. A coupling conductor layer provides a capacitance between two line conductor layers which are adjacent to each other in the x-axis direction.
US09178482B2 Filter element
A filter element includes a laminate including insulator layers. A ring conductor pattern is provided on one of the insulator layers. Linear conductor patterns of a first inductor having a helical shape with an axial direction thereof being a laminating direction of the laminate and linear conductor patterns of a second inductor having a helical shape with an axial direction thereof being the laminating direction are provided on predetermined ones of the insulator layers. The ring conductor pattern is arranged such that inner regions of the linear conductor patterns of the first inductor and inner regions of the linear conductor patterns of the second inductor are included in an inner region of the ring conductor pattern.
US09178476B2 Envelope detector with enhanced linear range
An envelope detector (ED) includes a voltage-mode ED core including parallel detection transistors for detecting a voltage envelope of an RF signal input. The detection transistors are configured with a size and for a current such that the transistors are biased in subthreshold regions of operation. The ED core is configured to variably control a bias current through the detection transistors, where the bias current is varied according to a voltage amplitude of the RF signal input to enhance a linear range of the ED while detection transistors continue to operate in subthreshold regions. A linearizer circuit may be configured to control the bias current based on feedback inputs from ED outputs. Several gain-programmable voltage amplifiers, which may include a final specialized class-AB amplifier, precede the ED core, to adapt a transmitter output voltage to an input range of the ED core, which extends the linear range of the ED.
US09178472B2 Bi-directional power supply signal based linear amplifier
Circuitry, which includes a linear amplifier, is disclosed. The linear amplifier has a linear amplifier output and includes an input amplifier stage and an output amplifier stage. The output amplifier stage at least partially provides an envelope power supply voltage to a radio frequency (RF) power amplifier (PA) via an envelope power supply output using a selected one of a group of linear amplifier power supply signals. The group of linear amplifier power supply signals includes at least a first bi-directional power supply signal. The input amplifier stage selects the one of the group of linear amplifier power supply signals based on the envelope power supply voltage and a setpoint of the envelope power supply voltage.
US09178471B2 Resonating element, resonator, oscillator, electronic apparatus, and mobile object
A resonating element has a quartz crystal substrate having a vibrating portion and a thin-walled portion that is thinner than the vibrating portion, and a pair of excitation electrodes respectively disposed on opposite surfaces of the vibrating portion. Moreover, in the excitation electrode, each of a pair of sides arranged in a Z′-axis direction is convexly curved toward the center so that the excitation electrode has a constricted portion in which a length in the Z′-axis direction increases gradually from a central portion toward both ends in an X-axis direction.
US09178470B2 Resonator element, resonator, oscillator, electronic device, and moving object
A resonator element is provided. A base portion includes a first base portion, a second base portion, and a connecting portion. The base portion includes a width-decreasing portion that is provided at an end of the connecting portion on the first base portion side and that has a width along an X-axis direction which continuously decreases toward the second base portion. An outer edge of the width-decreasing portion and an outer edge of the connecting portion form a continuous line that does not include a corner portion, when seen in a plan view. When an angle between a tangent of a portion of the curved line on the first base portion side and a segment parallel to the X-axis direction is set to θ, a relation of 0°<θ<90° is satisfied.
US09178463B2 Inverter control device and inverter control method
An inverter control device is equipped with an inverter and a command value calculation unit calculates command values for the alternating current voltage output from the inverter. A phase compensation unit compensates the phase of the command values or the phase of the detected values. An inverter control unit controls the inverter on the basis of the command values or detected values that have been compensated by the phase compensation unit. A motor rotational velocity detector detects the rotational velocity of a motor. The phase compensation unit calculates the phase lead amount on the basis of a phase compensation time that is set for the purpose of obtaining a prescribed phase margin and on the basis of the rotational velocity and, in accordance with the phase lead amount, compensates the phase that is based on the specific characteristics of the motor.
US09178460B2 Motor controller
A motor controller according to the invention includes a driving IC and a magnetic sensor. The driving IC receives a driving signal for driving a motor and controls the rotation speed of the motor using the driving signal. The magnetic sensor detects the rotation speed of the motor. The driving IC includes a sensor signal output terminal and a driving signal input terminal. The sensor signal output terminal outputs a sensor signal generated by the driving IC based on a pulse signal from the magnetic sensor. The driving signal input terminal receives the driving signal. The sensor signal output terminal and the driving signal input terminal are connected by a connecting portion. The driving IC rotates the motor at a first rotation speed different from the rotation speed of the motor driven according to the driving signal using the sensor signal input to the driving signal input terminal.
US09178457B2 Generator brake system and method of controlling the same
The present invention provides a generator brake system for providing a brake control of a generator. The generator brake system includes a power conversion unit, a sensing unit, and a control unit. The power conversion unit receives an output voltage and an output current, generated from the generator, and the power conversion unit has at least one switch unit. The sensing unit receives the output voltage and the output current to generate a voltage signal and a current signal. The control unit receives the voltage signal and the current signal. When receiving a braking signal, the control unit generates at least one control signal for correspondingly turning on the at least one switch unit, thus braking the generator in a short circuit manner.
US09178451B2 Controller for brushless DC motor with flexible startup and method therefor
A controller for a brushless direct current (BLDC) motor includes a pulse width modulator and a control circuit. The pulse width modulator provides a plurality of phase control signals to control corresponding ones of a plurality of phases of the BLDC motor. The control circuit controls the pulse width modulator to provide pulses to the plurality of phases to control a speed of the BLDC motor by causing the pulse width modulator to adjust widths of the pulses when a measured current in an active one of a corresponding phase exceeds a threshold in a startup mode. In one form, the controller is part of a BLDC motor system which also includes a plurality of phase drivers each having inputs for receiving respective ones of said plurality of phase control signals, and outputs adapted to couple to corresponding phases of the BLDC motor.
US09178450B2 Control device and control method for electric motor, and motor and vehicle driving system to which the control device and control method are applied
There is provided a control device for an electric motor that controls the operation of the electric motor by outputting PWM signals to switching elements included in an inverter. The control device for the electric motor includes a voltage-command generating unit configured to generate, as voltage commands Vu*, Vv*, and Vw*, a superimposed wave signal obtained by superimposing, on a sine wave having an inverter output frequency FINV as a fundamental frequency, a third harmonic of the sine wave and a PWM-signal generating unit configured to generate PWM signals U, V, W, X, Y, and Z by comparing the amplitude of the voltage commands output by the voltage-command generating unit and the amplitude of a carrier signal CAR.
US09178447B2 Control circuits for motors and related methods
Control circuits and related methods are provided. One exemplary control circuit includes a solid state switching device for coupling to a first tap of a motor and a control device coupled to the solid state switching device. The control device is configured to switch the solid state switching device to apply a signal to the first tap in response to a demand for operation of the motor at a second parameter to operate the motor at the second parameter. The control device is also configured to switch the solid state switching device to apply a signal to the first tap in response to a demand for operation of the motor at a first parameter to operate the motor at the first parameter.
US09178446B2 Triboelectric generator
A generator includes a thin first contact charging layer and a thin second contact charging layer. The thin first contact charging layer includes a first material that has a first rating on a triboelectric series. The thin first contact charging layer has a first side with a first conductive electrode applied thereto and an opposite second side. The thin second contact charging layer includes a second material that has a second rating on a triboelectric series that is more negative than the first rating. The thin first contact charging layer has a first side with a first conductive electrode applied thereto and an opposite second side. The thin second contact charging layer is disposed adjacent to the first contact charging layer so that the second side of the second contact charging layer is in contact with the second side of the first contact charging layer.
US09178445B2 Power conversion apparatus
A power conversion apparatus includes a power converter and a PWM controller. A first switching element is coupled to a positive pole of a DC power source and one terminal of a load. A second switching element is coupled to a negative pole of the DC power source and another terminal of the load. A third switching element is coupled to the positive pole and the other terminal. A fourth switching element is coupled to the negative pole and the one terminal. The PWM controller PWM-controls the power conversion apparatus to repeat an on-period during which the DC power source outputs a voltage to the load and an off-period during which no voltage is output. The PWM controller alternately controls the first and second switching elements based on a signal set at a high or low level any time during a carrier wave period.
US09178441B2 Power converter control to avoid imbalance and transformer saturation
A switched-mode power conversion circuit can include a switch control circuit including switch control outputs coupleable to switches included in a bridge network, the switches controllably coupling power input nodes to an isolation transformer according to switch states established by the switch control circuit. A current monitoring circuit can be coupled to the isolation transformer, the current monitoring circuit including an output indicative of a current flowing through a winding of the isolation transformer. A sampling circuit can be coupled to the output of the current monitoring circuit to obtain information indicative of a first current peak during a first sampling duration corresponding to a first current polarity established by the bridge network and a second current peak during a second sampling duration corresponding to an opposite second current polarity established by the bridge network.
US09178437B2 Apparatus and method for avoiding transformer saturation
A controller for a power converter includes one or more controller modules operably linked to a transformer core of the power converter, to primary bridge switches of the power converter, and to secondary bridge switches of the power converter, wherein the one or more controller modules are configured to avoid saturation of the transformer core by modulating pulse widths of first electrical pulses sent to the primary bridge switches, based at least on measurements of DC components of current through primary and secondary windings adjacent the transformer core, and by modulating pulse widths of second electrical pulses sent to the secondary bridge switches, based at least on measurements of DC components of current through the primary and secondary windings.
US09178436B2 Closed-loop control circuit for an auxiliary power supply unit and power supply unit arrangement
A closed-loop control circuit for an auxiliary power supply unit includes a control loop for the closed-loop control of a voltage transformer of the auxiliary power supply unit via a controlled variable to produce a setpoint voltage, wherein the control loop includes an additional circuit that limits a change in the controlled variable in the event of provision of an external voltage of a main power supply unit at a first output for emitting voltage generated by the auxiliary power supply unit when the external voltage exceeds a setpoint voltage of the auxiliary power supply unit.
US09178434B2 Integrated primary startup bias and MOSFET driver
Some implementations are directed to a A DC-to-DC converter that includes a power transformer having a primary side and a secondary side and a plurality of power transistors coupled to the primary side of the transformer. The converter also includes a secondary bias supply coupled to the secondary side of the transformer and a secondary side controller coupled to the secondary side of the transformer and configured to generate a feedback control signal based on a voltage level associated with the secondary side of the transformer. The secondary side controller receives operating power only from the secondary bias supply.
US09178431B2 Switching power supply including threshold based permissions
Aspects of the invention provide a switching power supply that exhibits an improved conversion efficiency. In aspects of the invention, a load condition detecting circuit sets a threshold voltage for determining the magnitude of the load on the DC-DC converter based on the maximum value of the output voltage of the power factor correction converter in a suspended period of the power factor correction converter. An operation permission signal is delivered when a feedback voltage that indicates the magnitude of the load of the DC-DC converter exceeds the threshold voltage. When the feedback voltage exceeds a threshold voltage that is set at a value higher than the threshold voltage, the operation permission signal is delivered.
US09178430B2 DC/DC converter
A DC/DC converter has DC input terminals to which a DC power is inputted, a transformer, and a bidirectional switching device on the primary side of the transformer.
US09178428B2 Step-down switching circuit
The step-down switching circuit includes an amplifier capacitor having a first end connected to the feedback terminal and a second end connected to a second input of the amplifier. The step-down switching circuit includes a first resistor having a first end connected to the first end of the amplifier capacitor. The step-down switching circuit includes a second resistor having a first end connected to a second end of the first resistor and a second end connected to an output of the amplifier. The step-down switching circuit includes a third resistor having a first end connected to the second end of the first resistor and a second end connected to the second end of the amplifier capacitor.
US09178427B1 Floating output voltage boost-buck regulator using a buck controller with low input and low output ripple
A converter generates an output voltage differential across a floating load, such as a string of LEDs. The converter receives an input voltage Vin from a power supply, and the floating output voltage differential may be greater than or less than Vin. The converter uses a first switch and first inductor in a boost mode type configuration, and uses a second switch and second inductor in a buck mode type configuration. The inductors have a common node. The first inductor has another end coupled to ground, and the other end of the second inductor is coupled to the load. Both inductors charge and discharge together depending on the conductivities of the switches. One end of the load will be approximately zero volts, while the other end will be at a negative voltage VEE. The two inductors smooth input current/voltage ripple and output current/voltage ripple, resulting in low EMI.
US09178425B2 Power supply device
A power supply device has a first delay circuit which delays a first clock signal and outputs a second clock signal, a pulse signal generating circuit which generates a first pulse signal, a first transistor which connects an output node to a power supply potential node according to the first pulse signal, a second transistor which connects the output node to a reference potential node according to the first pulse signal, an integration circuit which integrates and outputs a signal of the output node, and a comparator which compares an output signal of the integration circuit and the reference signal, wherein the pulse signal generating circuit generates the first pulse signal in synchronization with the first clock signal, the second clock signal and the output signal of the comparator, and the frequency of the first pulse signal is constant irrespective of voltage of the output node.
US09178421B2 Multi-stage power supply with fast transient response
Embodiments are disclosed relating to an electric power conversion device and methods for controlling the operation thereof. One disclosed embodiment provides a multi-stage electric power conversion device including a first regulator stage including a first stage energy storage device and a second regulator stage including a second stage energy storage device, the second stage energy storage device being operatively coupled between the first stage energy storage device and the load. The device further includes a control mechanism operative to control (i) a first stage output voltage on a node between the first stage energy storage device and the second stage energy storage device and (ii) a second stage output voltage on a node between the second stage energy storage device and the load.
US09178417B2 DC-DC converter and voltage conversion method thereof
A DC-DC converter is provided. When a load of the DC-DC converter is too light, the DC-DC converter can raise a frequency of its PWM signal, and reduce a pulse width of the PWM signal, so as to avoid the frequency of the PWM signal falling into a frequency range that can heard by human's ear and maintain high conversion efficiency of the DC-DC converter.
US09178416B2 Adjusting apparatus and adjustment method
An adjusting apparatus sets a designated value of a current source circuit to be a predetermined value, and causes discharging of a capacitor to end by switching a switch to a discharging side when the capacitor is not being charged by current output from a switching power source circuit. After the discharging of the capacitor ends and the designated value is set, the adjusting apparatus causes the capacitor to be charged by switching the switch to a charging side. The adjusting apparatus further measures a time period from the time when the switch is switched to the charging side until an electric potential difference of the capacitor exceeds a threshold value. Based on the measured time period and the predetermined value, the adjusting apparatus calculates the designated value such that the measured time period is a predetermined time period.
US09178414B2 Jittering frequency control circuit and method for a switching mode power supply
A jittering frequency control circuit and method for a switching mode power supply enlarge the uttering frequency range of the switching frequency of the switching mode power supply when the switching mode power supplier enters a frequency reduction mode, to improve the electro-magnetic interference of the switching mode power supply operating with the frequency reduction mode.
US09178409B2 Power conversion control device that controls commutation of power converting apparatus based on dead time
A period composed of a total of three periods, namely a period when an actual voltage vector is employed and periods before and after it can be regarded as an isolation period when an actual voltage vector is isolated in a vicinity where switching for commutation in a current-source converter is generated. When the switching in the current-source converter occurs at the isolation period, zero-current switching is realized. When presence of dead time is thus taken into consideration, a width of the timing when the zero-current switching is realized is made to be broader than a case where the presence of the dead time is not taken into consideration by the dead time.
US09178406B2 Linear motor and stage device
A linear motor includes a field magnet and an armature. The field magnet includes a pair of opposing field magnet yokes. A yoke base is disposed on a first end of each field magnet yoke in a Y axis direction. Between the field magnet yokes, a first magnet row is disposed including, along an X axis direction, a plurality of opposing pairs of first magnets having different polarities. Between the field magnet yokes, a second magnet row is disposed to a first side or a second side of the first magnet row in the Y axis direction. The second magnet row includes a pair of opposing second magnets having different polarities and forming a single row in the Y axis direction on the field magnet yokes. The armature includes a first armature coil opposite the first magnet row and a second armature coil opposite the second magnet row.
US09178404B2 Liquid-cooled self-excited eddy current retarder with a structure of two salient poles
A liquid-cooled self-excited eddy current retarder having two salient poles is provided. The liquid-cooled self-excited eddy current retarder may comprise a retarder rotor, a retarder stator, a retarder coil, a retarder generator and a control module. The retarder rotor may be a jagged turntable, and an axial cross section of the jagged turntable may be in an inverted h shape. Each of the two salient poles may be located at a respective one of two axial ends of the jagged turntable. The retarder rotor may be connectable to a transmission shaft, and an inner circle of the retarder stator may be coaxial with an outer circle of the retarder rotor. The retarder coil may be an independent coil and disposed between the two salient poles of the retarder rotor. The retarder coil may be affixed to the retarder stator.
US09178402B2 Control unit for electric motor and vehicle steering system including the same
In a circuit board, a control pattern portion in which control circuit patterns are formed and a drive pattern portion in which drive circuit patterns are formed are formed in different regions. A recessed portion is formed in a base, and the drive pattern portion is fixed to the base such that insulation between a drive circuit and the base is maintained and the control pattern portion is arranged above the recessed portion. In this way, a space in which a circuit element is able to be mounted is formed between the control pattern portion and the recessed portion.
US09178399B2 Laminated rotor structure for a permanent magnet synchronous machine
The invention relates to a laminated rotor structure for a permanent magnet synchronous machine wherein disks (1) of a ferromagnetic material constitute the body of the rotor. The body includes bars (3) of a damper winding that extend axially close to the surface (2) from one end thereof to the other, and a circle of permanent magnets (4) disposed in a V-shaped configuration inside the circle formed by the bars, in which permanent magnets the first ends (5) are disposed close to the outer perimeter of the rotor and the second ends (6) are disposed closer to the central axis of the rotor. According to the invention, two permanent magnets (4) constitute a pair of permanent magnets wherein the magnets are disposed at an angle (a) to each other so that their first ends (5) are disposed at a distance from each other and their second ends (6) in proximity to each other. In addition, a pair of permanent magnets includes an air channel (7) that extends axially through the laminar structure of the rotor in direct heat transfer contact with the second ends (6) of the magnets in the pair of magnets.
US09178398B2 Stator of electric motor
A stator (100) of an electric motor includes a coil (12), a stator core (10) which supports the coil, and covers (22a, 22b) which are attached to the stator core so as to surround coil ends (13a, 13b) of the coil, wherein the covers have outside diameters which are at least partially smaller than the outside diameters of the stator cores, the covers have coefficients of linear expansion which are larger than the coefficient of linear expansion of the stator core, and the covers expand due to heat whereby the covers closely contact the housing which is arranged around the stator.
US09178397B2 Brushless motor with crossing wire holder
A motor part of a fuel pump is a brushless motor having a stator and a rotor. The stator has a core, a coil set and an insulator, which holds the core and the coil set in an insulated manner. The coil set has a plurality of coils wound about a tooth part and a plurality of crossing wires connecting the coils. The insulator is formed by stacking central ring parts of a plurality of stator units in an axial direction. At least one of crossing wire holder parts is formed of a combination of guide projections, which are formed on the different central ring parts. The length of the brushless motor in the axial direction can thus be shortened.
US09178395B2 Traction motor for electric vehicles
A traction motor for an electric vehicle, comprises a stator and a rotor rotatably mounted to the stator. The rotor comprises a rotor core and magnets fixed to the rotor core. The rotor core has 2P rotor poles formed by the magnets, P being an integer greater than one. The stator comprises a stator core having S teeth and field windings wound on the teeth, S being equal to 3·m·P where m is the number of phases. Field windings of each phase comprises P winding units. Each the winding unit comprises a first coil and a second coil connected in series. The first coils have a larger coil pitch and a greater number of turns compared to the second coils.
US09178388B2 Wireless power transmission apparatus
Provided is a wireless power transmission apparatus, including a source unit including a power resonator to transmit a wireless power to a target apparatus, and a near field controller to control a direction of a magnetic field of the power resonator.
US09178381B2 Storage battery control device, charging station, and storage battery control method
The battery charging of electric vehicles, etc. is controlled so that the impact on the electric power system is lightened even when a lot of electric vehicles, etc. start the charging all at once. A device for controlling an electricity storage device installed in an electric vehicle or the like calculates a voltage drop by applying a load current at the time of performing the charging of the electricity storage device, and limits the charging quantity of the storage battery (installed in the electric vehicle or the like) based on the calculated voltage drop so that the voltage drop of the electric power system remains less than a prescribed level. Consequently, it becomes possible to reduce the voltage fluctuation around each of the electric vehicles, etc. that is about to execute the charging in cases where a lot of electric vehicles, etc. start the charging all at once.
US09178379B2 Charger for electric vehicle
Disclosed is a charger for an electric vehicle. The charger includes a connector connected to the electric vehicle, a plug connected to an outlet of the commercial power source, a switching unit to selectively shut off the current according to a temperature of the charger, a display unit to display information about an operation of the charger, and a control unit to control the operation of the charger, wherein the control unit controls the display unit to display two kinds of mutually different information when the current is shut off because the battery is fully charged or the connector is separated from the electric vehicle and when the current supplied from the commercial power source to the electric vehicle is shut off by the switching unit. The charger is prevented from being damaged due to overheat during the charging operation for the electric vehicle.
US09178377B2 Charging device, battery, and method for recognizing a foreign object
A charging device having a coil for inductive electric charging of a device, in particular of a battery, including a control unit having a temperature sensor for detecting a temperature, the temperature sensor being situated in the area of application for applying the device, and is connected to the control unit, the temperature sensor being situated laterally next to the coil and adjacent to the coil.
US09178372B2 Charging control method for a rechargeable battery and portable computer
Disclosed are charging control methods for a rechargeable battery and portable computers. The charging control method includes acquiring a control parameter for a charge current of the rechargeable battery; modifying, based on the control parameter, the charge current from a first charge current to a second charge current less than the first charge current; and charging the rechargeable battery with the second charge current. Compared with conventional methods of charging the battery always with the maximal charge current, the present disclosure can improve the battery's lifetime.
US09178370B2 Coverage robot docking station
A coverage robot docking station includes a base having a robot receiving surface. The base defines a power receptacle for receiving a power supply. The base also defines a beacon receptacle for receiving a beacon. A side wall extends from the base, where the side wall and the receiving surface of the base define a robot holder. At least one charging contact is disposed on the robot receiving surface for charging a received robot.
US09178369B2 Systems and methods for providing positioning freedom, and support of different voltages, protocols, and power levels in a wireless power system
Systems and methods for modifying the magnitude and/or phase of an electromagnetic field in one or multiple dimensions. Applications for use in charging or powering multiple devices with a wireless power charger system are also described. Applications include beam shaping, beam forming, phase array radar, beam steering, etc. and inductive charging and power, and particularly usage in mobile, electronic, electric, lighting, or other devices, batteries, power tools, kitchen, industrial applications, vehicles, and other usages. Embodiments of the invention can also be applied generally to power supplies and other power sources and chargers, including systems and methods for improved ease of use and compatibility and transfer of wireless power to mobile, electronic, electric, lighting, or other devices, batteries, power tools, kitchen, military, industrial applications and/or vehicles.
US09178367B2 Balance correction apparatus and electric storage system
Excess voltage is prevented from flowing through an electric storage cell. Included are an inductor, a first switching device, a second switching device and a control section supplying a control signal to control ON/OFF operations of the first switching device and the second switching device, to the first switching device and the second switching device, where the control section supplies the control signal so that the first switching device and the second switching device repeat ON/OFF operations alternately when a voltage of the first electric storage cell and a voltage of the second electric storage cell are lower than a predetermined value, and the control section supplies a control signal to stop the balance correction apparatus, when at least one of the voltage of the first electric storage cell and the voltage of the second electric storage cell is equal to the predetermined value or larger than the predetermined value.
US09178365B2 System for charging an energy store, and method for operating the charging system
The invention relates to a system for charging at least one energy storing cell (5) in a controllable energy store (2) that is used to control and supply electric energy to an n-phase electric machine (1), wherein n>1. The controllable energy store (2) has n parallel energy supply branches (3-1, 3-2, 3-3), each of which has at least two serially connected energy storing modules (4), each said energy storing module comprising at least one electric energy storing cell (5) with a corresponding controllable coupling unit (6). The energy supply branches (3-1, 3-2, 3-3) can be connected to a reference bus (T-), and each energy supply branch can be connected to a phase (U, V, W) of the electric machine (1). The coupling units (6) bridge the respective corresponding energy storing cells (5) or connect same into the respective energy supply branch (3-1, 3-2; 3-3) dependent on control signals. The aim of the invention is to allow at least one energy storing cell (5) to be charged. This is achieved in that an external energy source (10) can be connected to a neutral point (S) of the electric machine (1) and to the reference bus (T-).
US09178364B1 Switching power supply with battery
The present invention relates to estimating a battery current supplied from a battery to a switching power supply, which provides a regulated output signal to a load, based on a switching power supply current in the switching power supply, and then controlling the regulated output signal to limit the battery current to within an acceptable threshold. The switching power supply current may be provided by one or more switching elements in the switching power supply. The switching elements may be mirrored to provide a mirrored switching power supply current, which is used to estimate the battery current. The estimated battery current may include an estimated average battery current, an estimated instantaneous battery current, or both.
US09178363B2 Smart powering and pairing system and related method
According to one disclosed embodiment, a smart powering and pairing system includes a power conversion unit (PCU) having a communication module, a power management module and a pairing module. The PCU can convert mains power into a form that can be used to power a plurality of electronic devices. In one embodiment, the PCU can transparently pair a connected electronic device to a group of subsequently connected electronic devices by accepting pairing information from the connected electronic device and using it to pair the subsequently connected devices. In another embodiment, the PCU can transparently pair a group of connected electronic devices by applying generated security data to all the connected devices. In another embodiment, a power conversion unit can use security data to un-pair connected electronic devices.
US09178361B2 Methods and systems for detecting foreign objects in a wireless charging system
Methods and systems are described for using detection coils to detect metallic or conductive foreign objects that can interfere with the wireless transfer of power from a power transmitter to a power receiver. In particular, the detection coils are targeted to foreign objects that are smaller than a power transmitter coil in the power transmitter.
US09178358B2 Enhanced load management and distribution system
A system for managing distribution of electrical power includes a power management circuit, power control units, a first keyline and a second keyline. The power management circuit includes a device configured to measure power consumed by an electrical load, and a comparator comparing the measured power with a power limit. Each power control unit includes an outlet for delivering power to a load; a timing control circuit coupled to each outlet and configured to deliver an enabling signal to each outlet individually with a time delay; a signal input; and a signal output. The first keyline connects the power management circuit with the signal input of one power control unit; the second keyline connects the signal output of that power control unit with the signal input of another power control unit. Each power control unit is configured to propagate a signal to another power control signal via the second keyline.
US09178357B2 Power generation and low frequency alternating current transmission system
A power generation and transmission system, including: a wind turbine having an electrical generator (12) producing AC electrical power at a production frequency; a converter connected to the electrical generator (12) and configured to convert the AC electrical power to a transmission frequency below a grid frequency; an insulated transmission cable (18) connected to the converter and disposed at least partly submarine or subterranean; and a synchronous frequency converter (24) remote from the wind turbine and configured to receive the AC electrical power from the insulated transmission cable (18) and to convert it to the grid frequency for supply to a grid.
US09178355B2 Cross communication arrangement for multiple solid state power controller channels
A multi-phase power control switch has multiple power controller channels, each of which includes at least one power controller having a microprocessor. Each of the microprocessors cross communicates with each other of the microprocessors using a data bus.
US09178353B2 Active bypass diode circuit and solar power module with arc flash mitigation feature
An active bypass diode circuit that mitigates the hazard of arc flash events in a Photovoltaic (PV) solar power array, and a PV solar power module that utilizes a plurality of said active bypass circuits are disclosed The active bypass circuit comprises a diode, a switch in parallel with the diode, a control circuit for opening and closing the switch, a circuit for detecting arc flash events, a power management circuit, a power supply circuit, and a capacitor. When an arc flash event is detected, all the switches are closed concurrently, reducing the voltage produced by the PV string to a level that is too low the sustain the arc, and thereby terminating the arc.
US09178350B2 Electric distribution system protection
A system for distributing electrical current to a plurality of loads includes a first sensor coupled to an input of a protection zone for measuring a first current entering the protection zone, wherein the protection zone includes at least a portion of an electrical distribution feeder. The system also includes a second sensor coupled to an output of the protection zone for measuring a second current exiting the protection zone, and a processor coupled to the first sensor and to the second sensor. The processor is programmed to receive measurements representative of the first current and the second current, and calculate a reactive current differential of the protection zone based on the first current and the second current. The processor is also programmed to compare the reactive current differential with a fault threshold, and generate an error notification if the reactive current differential is greater than the fault threshold.
US09178347B2 Telescoping extension arm for supporting a monitor
An arm for supporting a monitor comprises a telescoping arm assembly, a support member and a cord storage device. The telescoping arm assembly has at least first and second telescoping members telescopingly movable relative to each other, a distal end configured to support a monitor and a hollow interior through which at least one cord from the monitor can be routed. The support member is connected to the telescoping arm assembly proximally of the distal end to suspend the telescoping arm assembly. The support member is configured to extend transverse to the telescoping arm assembly and to be attached to a support surface. The cord storage device is positioned at least partially within at least one of the telescoping arm assembly or the support member. The cord storage device winds and unwinds the cord from the monitor as the first and second telescoping members are moved toward and away from each other, respectively.
US09178344B2 Electrical fittings with integral cover plate and method of use thereof
An electrical fitting that comprises an integral cover plate and an electrical component, such as an outlet or a switch, the combined electrical component/cover plate being secured via screws through the cover plate into a wall box. Wires are secured to power wires coming from the wall box via quick-connectors or wirenuts.
US09178343B2 Cable tray cable routing system
The present invention is directed to a cable routing system with brackets that join cable trays to form the cable routing system. A bracket that joins perpendicular cable trays includes a main body and a securing clip. The main body has a bottom and two sides extending upwardly therefrom. Each side of the main body includes a deflectable side latch that engages a bottom longitudinal wire of the cable tray. The securing clip engages the main body to secure the bracket to the cable tray.
US09178339B2 Buffering device for the operating mechanism of a switchgear, and method of lubrication thereof
A piston rod (15) and a first piston (13) are arranged in the interior of an external cylinder (11) and internal cylinder (12); a second piston for absorbing the change of volume of operating fluid (24) is also arranged therein. Also, a first return spring (18) for returning the piston rod (15) to the interruption position is provided and a second return spring (20) for returning the operating fluid 24 into the high-pressure chamber (25) by pressurizing the second piston (14) is provided. In addition, the air in the interior of the buffering device (10) is withdrawn by a vacuum pump (38), and operating fluid (24) is thus introduced in a degassed condition.
US09178337B2 Premises power source accessory panel for an outdoor unit and method of adapting an outdoor unit with the same
An outdoor unit of an HVAC system comprises a frame, at least one refrigerant coil mounted to the frame, a fan motor, a compressor, a controller, and a premises power source accessory panel. The fan motor is coupled to a fan which drives air through the refrigerant coil. The compressor is coupled to the refrigerant coil to drive refrigerant therethrough. The controller is coupled to the fan motor and compressor. The premises power source accessory panel is removably coupled to the frame and includes a bracket and circuit protection element. The bracket has at least one electrical conduit aperture. The circuit protection element is mounted to the bracket and coupleable to a premises power source. The premises power source is a renewable-energy power source located on a premises of the HVAC system. The bracket is removably coupleable to the outdoor unit in lieu of a conventional electrical conduit panel.
US09178327B2 Brush lead guide for a brush holder assembly
A brush lead guide for a brush holder assembly configured to retain the leads extending from a brush in a desired position/orientation to ensure the leads do not interfere with movement of the brush within the brush holder. In some instances, the lead guide includes a first guide rail including a channel for receiving a first lead of the brush and a second guide rail including a channel for receiving a second lead from the brush. The lead guide maintains the leads in a position such that the leads are held within the width of the opening of the brush holder to ensure the leads do not interfere with movement of the brush within the brush holder during use of the brush holder assembly.
US09178324B2 Electric plug system
An electric plug system includes a stabilizing base constructed to stand on a horizontal floor surface, a vertical support element supported by and extending from the base and defining a vertical axis, and an electrical socket block coupled to a top portion of the vertical support element and supported thereby. The electrical socket block has a plurality of electrical sockets constructed to receive the plugs of the devices. Also, the system includes an electrical wire extending from the horizontal electrical socket block, down the vertical support element, and along or through the base and there-beyond, the electrical wire terminating in an electrical plug constructed to plug into the wall or floor electrical outlet. The system can include a device holder removably attached to the vertical support element. The base can include a first base portion and a second base portion removably attached to one another.
US09178317B2 Coaxial connector with ingress reduction shield
A coaxial connector with an F female waveguide is configured to limit exchange of certain RF signals.
US09178314B2 Electronic device security
Apparatus and methods for reducing cross talk between electrical ports are described. An electronic device comprises a housing for electronic circuitry and has a plurality of ports for connecting electrical devices. Each port includes a connector connected by at least one electrical connection to the electronic circuitry. A connector shield is arranged to provide an electrically conductive loop around which an induced electrical current can flow to reduce cross-talk between ports. A shielding can is part of the connector shield and includes a body formed of a folded sheet of electrically conductive material and an electrical contact for electrically connecting the body to a connector. A face of the body defines a first aperture shaped to receive the connector so that the shielding can may be arranged about the connector to form a part of the electrically conductive loop. The method includes providing a connector shield arranged about each connector to provide an electrically conductive loop and inducing an electrical current to flow about the electrically conductive loop to reduce cross-talk between ports.
US09178310B2 Duplex male electrical connector with a connection board movable inside a socket shell
A duplex male electrical connector includes an insulating base, two rows of first connection contacts and a socket shell. The insulating base has a front section formed with a connection board. The connection board has opposite top and bottom surfaces. The two rows of first connection contacts are disposed on the top and bottom surfaces of the connection board, respectively. The socket shell is formed with a connection slot having a front end serving as an insert port. The connection board is disposed in the connection slot. The socket shell and the connection board can vertically float and move relative to each other, such that the connection board can vertically float and move relative to the socket shell or the socket shell can vertically float and move relative to the connection board.
US09178302B2 Wire cover, wiring method of wires and electrical connector
The invention provides a wire cover, a wiring method and an electrical connector that can ensure routing of wires even in a limited space. The connector includes a housing, a lever, and a wire cover. The lever is mounted to the housing, and the wire cover is mounted to a side of a back surface of the housing. The wire cover includes a cover body, a wire routing passageway, and a hood portion. The cover body includes a plurality of wire receiving passageways positioned in one direction, while the wire routing passageway is directed into an inside of the cover body. The hood portion protrudes from a circumference of the wire routing passageway and provides a leading direction out of the wire routing passageway. The hood portion extends in a direction other than a direction of extension from a front surface and the back surface of the cover body.
US09178300B1 Power plug protector assembly
A power plug assembly has: a protective casing having a cavity defined in the protective casing; a positive electrode prong terminal mounted in the cavity of the protective casing and extending out of the protective casing; a protecting assembly mounted in the cavity and having a bimetal contacting plate mounted in the protective casing and having a fixing end mounted securely in the cavity; and a free end being opposite to the fixing end and contacting the positive electrode prong terminal, wherein the bimetal contacting plate deforms and bends to make the free end separated from the positive electrode prong terminal when suffering sufficient heat; a negative electrode prong terminal mounted outside the protective casing; and a ground prong terminal mounted outside the protective casing. The negative electrode prong terminal and the ground prong terminal outside the protective casing would not negatively affect the bimetal contacting plate.
US09178299B2 Device comprising an electronic connector to establish a connection with an electronic device
A device for establishing a connection with an electronic device comprises a connection device, a lever and a pedestal having a face comprises a latch having a degree of rotation with the pedestal. The connection device has one degree of rotation according to a first axis parallel to the face of the pedestal, and comprises the electronic connector and a concave relief. The lever is linked to the pedestal by a linkage comprising at least one degree of rotation according to a second axis parallel to the first axis of rotation. The lever comprises a convex relief corresponding to the concave relief of the connection device, and an elastic component adapted to maintain a contact between the lever and the pedestal. The lever is configured to enter in contact with the connection device after a rotation of the connection device enabled by the rotation of the latch.
US09178294B2 Printed circuit board and electronic device using printed circuit board
An electronic device having a press-fit connection for connecting a connector and an electronic part mounted on a printed circuit board which is possible to enable high density mounting. Viewing the printed circuit board from an upper surface, between adjacent through holes on which a compressive force acts upon insertion of the press-fit terminal, among the large number of through holes, a land or a conductor film connected to the conductor film formed on the inner wall surface of the through hole or the conductor film not connected to the conductor film formed on the inner wall surface of the through hole, formed in the circuit board held between the top layer circuit board and the bottom layer circuit board, exists in a width equal to or wider than the diameter of the through hole.
US09178288B2 Spring plate for attaching bus bar to a printed circuit board
Bus bar or power connector connections that are reliable and provide a reduced connection impedance. One example may provide a reliable connection by providing a spring plate. The spring plate may be arranged to hold a bus bar or other power conductor to a printed circuit board. The spring plate may further include an opening for a fastener, where the fastener is used to secure the bus bar to the printed circuit board. In this way, the spring plate may secure the bus bar to the printed circuit board in the event that the fastener is loosened or missing, thereby increasing the reliability of the bus bar connection. Further, the spring plate may provide an additional current path, thereby reducing the impedance of the bus bar connection.
US09178285B2 Phase shift device and method
A phase shift device includes an input quadrature junction for receiving an input EM signal and extracting a first electromagnetic (EM) signal, a second EM signal, a third EM signal, and a fourth EM signal from the input EM signal. Four waveguide arms are operatively connected to the input quadrature junction for respectively conveying the first, second, third, and fourth EM signals therethrough. At least two of the waveguide arms shift the phase of EM signal conveyed therethrough such that two of the first, second, third, and fourth EM signals are phase shifted with respect to the other two of the first, second, third, and fourth EM signals. An output quadrature junction is operatively connected to the waveguide arms for combining the first, second, third, and fourth EM signals. Thus, polarization adjustment may be achieved through rotation of the phase shift device.
US09178283B1 Quad-slot antenna for dual band operation
Quad-slot antenna structures of user devices and methods of operating the user devices with the quad-slot antenna structures are described. One apparatus includes a RF feed coupled to a quad-slot antenna, including a first slot and a second slot and a third slot and a fourth slot. The first slot and the second slot are driven elements and the third slot and the fourth slot are parasitic elements.
US09178279B2 Wireless IC tag, reader-writer, and information processing system
A wireless IC tag includes a wireless IC chip and two coil-shaped antennas. One end of each of the coil-shaped antennas is electrically connected to the wireless IC chip, and the other ends of the coil-shaped antennas are electrically connected to each other. The winding axes of the coil-shaped antennas are arranged at different positions, and the coil-shaped antennas have the same winding direction. A reader-writer includes an antenna connected to an information processing circuit. The antenna is electromagnetically coupled to the coil-shaped antennas for communication.
US09178275B2 Planar antenna with cover
Provided is a planar antenna based system for use as a radar level meter, microwave barrier or other suitable system. The system includes a planar radiator element arranged on a substrate, and a cover plate element made from a dielectric to cover the planar radiator element. In one alternative embodiment, the cover plate includes a cavity proximate the planar radiator element, into which the microwaves generated by the planar radiator element can be coupled. In another alternative, the cover plate is provided in a surface-flush position against the substrate in the edge region of the cavity. These arrangements may be provided in a plurality so as to support an overall system containing multiple radiator elements.
US09178274B2 Communication device and antenna element therein
A communication device includes a ground element and an antenna element. The antenna element is close to an edge of the ground element, and includes a first metal portion and a second metal portion. The first metal portion has a plurality of bends, and includes a first segment and a second segment. The first segment and the second segment are close to each other, and are substantially parallel to the edge of the ground element. The first segment is disposed at the outmost periphery of the antenna element from the edge of the ground element. The second segment is disposed between the first segment and the edge of the ground element, and has a shorted point coupled to the ground element. The second metal portion is disposed between the second segment and the edge of the ground element, and has a feeding point coupled to a signal source.
US09178266B2 Antenna module for vehicle
The invention relates to an antenna module for a vehicle, wherein an upper assembly comprises a first circuit board, wherein a lower assembly comprises a second circuit board, wherein at least one of the two assemblies is fastened on a vehicle body part of the vehicle, wherein an electrical contact part is arranged on the assembly in each case, wherein the two contact parts respectively comprise at least one antenna contact, and wherein the lower assembly is fixable on the upper assembly. In this case, the second contact part, when the lower assembly is fixed, is displaceable in a plane lying approximately parallel to the vehicle body part from a first position in a displacement direction linearly into a second position, wherein the contact parts are electrically disconnected from one another in the first position and wherein the contact parts are electrically connected in the second position.
US09178265B2 Anti-crack means for wire antenna in transponder
The invention concerns a support for an antenna, such as a RFID antenna, used in a flexible cover, for example a passport cover, whereby said antenna is surrounded by material of said cover. Said support comprises means for disconnecting the antenna from the surrounding material so that bending stress applied to said material is not transferred to the antenna. The support may be used in different products, for example in passports.
US09178264B2 Directional coupler and wireless communication device
A directional coupler according to the present invention includes a primary line for transmitting a transmission signal; an input port for inputting the transmission signal to the primary line; an output port for outputting the transmission signal from the primary line; a secondary line for electromagnetically coupling with the primary line to extract part of the transmission signal; a coupling port provided at one end of the secondary line; an isolation port provided at the other end of the secondary line; and a low pass filter unit having a function of low pass filter, disposed between the secondary line and the coupling port.
US09178262B2 Feed network comprised of marchand baluns and coupled line quadrature hybrids
A feed network includes three radio frequency (RF) devices constructed in a suspended-substrate stripline configuration that provides a five-port microwave device having a sum port and four feed ports. The three RF devices include at least one coupled-line quadrature hybrid and at least one Marchand balun. Each of the at least one coupled-line quadrature hybrid has only a single transmission line section providing two outputs with approximately equal amplitude power and a phase difference of 90°. Each of the at least one Marchand balun includes two offset-coupled transmission line sections separated by a gap and two outputs on opposite sides of the gap. The two outputs have approximately equal amplitude power and a phase difference of 180°. The three RF devices are electrically arranged relative to the sum port and the four feed ports such that the feed ports have equal amplitude power and a progressive 90° phase shift.
US09178259B2 Coupler and electronic apparatus
According to one embodiment, a coupler for wireless transfer includes a coupling element including a first open end and a second open end. The coupler further includes a feeding element electrically connecting a feed point and an intermediate portion of the coupling element between the first open end and the second open end. The coupler further includes a short circuiting element electrically connecting the intermediate portion and a ground plane. An electrical distance from the feed point to each of the first open end and the second open end is ¼ of a wavelength corresponding to a central frequency used for the wireless transfer.
US09178258B1 Split-block construction of waveguide channels for radar frontend
A radar system in an autonomous vehicle may be operated in various modes and with various configurations. The autonomous vehicle features a radar system having a waveguide with a first waveguide section, a second waveguide section, and a seam between the first and the second waveguide sections. The first waveguide section and the second waveguide section form a waveguide cavity. Additionally, the seam corresponds to a low surface current location of a propagation mode of the waveguide and is formed where the first waveguide section is coupled to the second waveguide section. The height of the first waveguide section may be equal to the height of the second waveguide section. The waveguide also may include a feed configured to introduce a wave with the propagation mode into the waveguide. Moreover, the waveguide may also include more than one cavity. Each cavity may lie on a plane defined by the seam.
US09178255B2 Lithium-air cells incorporating solid electrolytes having enhanced ionic transport and catalytic activity
Liquid-free lithium-air cells are provided which incorporate a solid electrolyte having enhanced ionic transport and catalytic activity. The solid electrolyte is positioned between a lithium anode and an oxygen cathode, and comprises a glass-ceramic and/or a polymer-ceramic electrolyte including a dielectric additive.
US09178253B2 Battery pack having novel cooling structure
Disclosed herein is a battery pack having a plurality of battery cells or unit modules (‘unit cells’), which can be charged and discharged, mounted in a pack case.
US09178252B2 Structure for electrochemical device to improve safety and electrochemical device comprising the same
Disclosed is a sealed structure for an electrochemical device having a hollow space therein, further comprising a material generating gases via thermal decomposition in the hollow space. Also, disclosed is an electrochemical device comprising a cathode, an anode, a separator, an electrolyte, a casing for the device, and the structure for the electrochemical device.
US09178249B2 Electrode stabilizing materials
An electrolyte includes a polar aprotic solvent; an alkali metal salt; and an electrode stabilizing compound that is a monomer, which when polymerized forms an electrically conductive polymer. The electrode stabilizing compound is a thiophene, a imidazole, a anilines, a benzene, a azulene, a carbazole, or a thiol. Electrochemical devices may incorporate such electrolytes.
US09178247B2 Lithium composite metal oxide and nonaqueous electrolyte secondary battery
The present invention provides a lithium composite metal oxide containing Li and at least one transition metal element, wherein at least one lithium composite metal oxide particle constituting the lithium composite metal oxide has both hexagonal and monoclinic crystal structures. Further, the present invention also provides a lithium composite metal oxide containing Li, Ni and M (where, M represents one or more kinds of transition metal elements selected from the group consisting of Mn, Co and Fe), having a diffraction peak (diffraction peak A) at an angle 2θ in a range from 20° to 23° in a powder X-ray diffraction pattern of a lithium composite metal oxide which is obtained by powder X-ray diffraction measurement made in the condition that CuKα is used as a radiation source and the measurement range of diffraction angle 2θ is in a range from 10° to 90°.
US09178242B2 Manufacturing method of fuel cell module and manufacturing method of fuel cell
A manufacturing method of a fuel cell module includes: forming an outer divided body having a frame shape and formed from an uncrosslinked item of solid rubber having adhesiveness in a seal member arrangement portion of a separator to produce an outer temporary assembly, and forming an inner divided body having a frame shape and formed from an uncrosslinked item of solid rubber in a peripheral edge portion of an electrode member to produce an inner temporary assembly fitting the inner temporary assembly into a frame of the outer temporary assembly to produce a cell assembly temporary assembly; arranging a cell assembly stack, in which a plurality of the cell assembly temporary assemblies are stacked, in a forming die; and pressurizing and heating the forming die to crosslink the uncrosslinked item.
US09178241B2 High altitude platform
An apparatus for generating electrical energy at altitude, comprising a tether connecting a substantially ground level location, part to a platform at an elevated location, the tether comprising a conduit coupled to an electrical generator at the platform, the conduit arranged to allow the flow of a fuel fluid from the substantially ground level location to the elevated location, and the electrical generator being operable to convert energy in the fuel fluid to electrical energy at the elevated location.
US09178239B2 Proton conductor, method for manufacturing proton conductor, and fuel cell
A proton conductor includes a metal ion, an oxoanion, and a molecule capable of undergoing protonation or deprotonation, in which at least one of the oxoanion and the molecule capable of undergoing protonation or deprotonation coordinates to the metal ion to form a coordination polymer. The oxoanion is preferably a monomer. The oxoanion is exemplified by at least one selected from the group consisting of phosphate ion, hydrogenphosphate ion, and dihydrogenphosphate ion. The molecule capable of undergoing protonation or deprotonation is exemplified by at least one selected from the group consisting of imidazole, triazole, benzimidazole, benzotriazole, and derivatives thereof.
US09178238B2 Rubber crack mitigants in polyelectrolyte membranes
A membrane electrode assembly for a fuel cell includes an anode catalyst layer, a cathode catalyst layer, and an ion conducting membrane. The ion conducting membrane is interposed between the anode catalyst layer and the cathode catalyst layer. The ion conducting membrane includes an ion conducting polymer having sulfonic acid groups and rubber particulates. Characteristically, the rubber particulates have an average spatial dimension less than about 600 nanometers. A fuel cell incorporating the membrane electrode assembly is also provided.
US09178234B2 Integrated power generation using molten carbonate fuel cells
In various aspects, systems and methods are provided for integrated operation of molten carbonate fuel cells with turbines for power generation. Instead of selecting the operating conditions of a fuel cell to improve or maximize the electrical efficiency of the fuel cell, an excess of reformable fuel can be passed into the anode of the fuel cell to increase the chemical energy output of the fuel cell. The increased chemical energy output can be used for additional power generation, such as by providing fuel for a hydrogen turbine.
US09178231B2 Fuel cell system and fuel cell system diagnosis method
A system has: a stack having anodes supplied with anode fluid and cathodes supplied with cathode fluid; an evaporating portion generating steam by evaporating water; a water deliverer delivering the water to the evaporating portion; and a reforming portion producing the anode fluid through steam-reforming on fuel using the steam generated by the evaporating portion. A controller executes a determination process that determines whether an open circuit voltage of the stack increases while the water is temporarily fed to the evaporating portion, when the stack is restarted from a state where power generation of the stack is suspended but the temperature of the evaporating portion is a reference temperature being capable of generating steam, and if the open circuit voltage has increased or is on an increase, the controller executes a restart process for resuming the power generation of the stack.
US09178230B2 Fuel cell having perforated flow field
A fuel cell system includes a bipolar plate having a flow field formed therein. The flow field is partially defined by at least two adjacent channel portions separated by a wall portion. The wall portion includes a surface at least partially defining a passageway between the channel portions. The passageway may be sized so as to create a pressure difference between the channel portions. The pressure difference may draw at least a portion of a liquid droplet obstructing one of the channel portions toward and into the passageway.
US09178228B2 Solid oxide fuel cell system
The invention relates to a solid oxide fuel cell system, wherein planar fuel cells are arranged in stacked form and in this respect an integrated post-combustion of non-oxidized components, or of not fully oxidized components, in the exhaust gas can take place. The fuel cells of a system in accordance with the invention have a cathode-electrolyte-anode unit. A bipolar plate is arranged between two respective fuel cells and channels for the supply and removal of a fuel gas to anodes and of an oxidizing agent to cathodes are present. The exhaust gases at the anode side or at the cathode side are introduced via internal additional channels or directly into an afterburner in which a catalytic post-oxidizing of the exhaust gas mixture formed with the exhaust gas at the anode side and at the cathode side takes place. In this respect, a catalytic afterburner is associated with every single fuel cell or with a group formed of a plurality of fuel cells and the afterburners are arranged so that exhaust gas discharged from a fuel cell at the anode side or at the cathode side can enter directly into an afterburner.
US09178227B2 Method for the manufacture of contacts between electrochemically active discs and interconnectors in high temperature fuel cells
The method serves for the manufacture of contacts between electrochemically active discs (2) and interconnectors (1) in planar high temperature fuel cells. The interconnectors have air-side and gas-side surface profiles (11, 11′) with contact surfaces (100) located on raised portions (10). A layer consisting of a contacting mixture (22, 22′) is respectively applied onto the electrodes (21, 21′) of the electrochemically active discs or onto the contact surfaces. The surface profiles for the electrodes are brought into contact with the applied layer so that, at a working temperature, the raised portions penetrate into this layer. Connections are formed between the contact surfaces and electrically conductive particles in this way and thus form discrete, homogeneously structured connections between the contact surfaces and the electrodes. Finally the medium embedding the particles is removed under thermal part treatments and the discrete connections are solidified.
US09178226B2 Fuel cell sealing structure
A fuel cell sealing structure has a power generating body, and first and second separators arranged in both sides in a thickness direction of the power generating body. On a surface in one side in a thickness direction of the first separator, formed integrally first and second sealing protrusions respectively brought into close contact with an outer peripheral portion of the power generating body and the second separator in an outer peripheral side of the first sealing protrusion, and a short circuit prevention rib protruding in line with the first and second sealing protrusions by an electrically insulating rubber-like elastic material. On a surface in another side thereof, formed integrally a third sealing protrusion brought into close contact with a surface in an opposite side to the power generating body in the second separator, by the electrically insulating rubber-like elastic material.
US09178225B2 Fuel cell
In a fuel cell in which an electrode and a separator are stacked together, a rib which is provided on the separator and forms a reaction gas flow path is fixed to an electrode by a liquid sealant, and the porosity of a portion of the electrode which has been impregnated with the liquid sealant is lower than the porosity of another portion of the electrode. In order to store surplus liquid sealant, the separator may also have a liquid sealant storage portion that is depressed in the thickness direction from the top of the rib.
US09178223B2 Fuel cell separator and method for manufacturing the same
A fuel cell separator 60 having a metal plate and an anticorrosion resin coating layer 55 formed thereon is provided, with which adhesion between the resin coating layer 55 and its counterpart member is further increased and the durability of a fuel cell unit is improved. In forming the fuel cell separator 60 having a separator substrate 50 that is a metal plate and an anticorrosion resin coating layer 55 formed thereon, the resin coating layer 55 is formed such that it has a surface roughness Ra of 0.5 to 13.5 μm. Increasing the surface roughness will produce an anchoring effect, which will improve the adhesive force at the interface. The aforementioned surface roughness Ra can be obtained either with the use of fillers that are mixed into the resin coating layer 55 or with external force applied to the surface of the resin coating layer 55 by means of shot blasting, for example.
US09178222B2 Titanium fuel cell separator
Disclosed is a titanium fuel cell separator having excellent conductivity and durability. In the disclosed titanium fuel cell separator (10), a carbon layer (2) is formed on the surface of a substrate (1) formed from pure titanium or a titanium alloy. The carbon layer (2) comprises graphite which is orientated so as to be parallel to the (002) plane of the carbon layer (2). The deposition amount of the carbon layer (2) is at least 2 μg/cm2.
US09178217B2 Multiply-conductive matrix for battery current collectors
A multiply-conductive matrix (MCM) for a current collector/electrode and a method of making the MCM are disclosed. The MCM includes a frame, preferably including a lug, the frame preferably made from a reticulated polymer foam substrate, and a body preferably made from the same substrate. The specific surface area of the frame is greater than the specific surface area of the body, resulting in greater rigidity and strength of the frame when the body and frame are joined to form an assembled matrix. Electrically conductive material is applied to the matrix to form the current collector. Optionally, a bonding material is also applied. Electro-active paste is applied to current if collector. The resulting MCM-based electrodes are ultra light and may be used as anode or cathodes in a lead-based battery, lithium ion battery, and nickel metal hydride battery for improved performance.
US09178214B2 Anode active material for lithium rechargeable battery, method of preparing the same, and lithium battery including the anode active material
An anode active material for a lithium rechargeable battery, the anode active material including: a base material which is alloyable with lithium and a metal nitride disposed on the base material.
US09178211B2 Method of producing electrode and method of producing nonaqueous electrolyte battery
A method of producing an electrode including decreasing a yield stress of a slurry containing an active material to two-thirds or less, and applying the slurry to a current collector.
US09178209B2 Cathode for lithium secondary battery and lithium secondary battery comprising the same
Disclosed is a cathode for a lithium secondary battery and a lithium secondary battery comprising the same. The cathode for a lithium secondary battery may include a current collector, a first composite layer formed from a mixture of olivine-type lithium iron phosphate cathode active material powder and a binder on the current collector, and a second composite layer formed from a mixture of olivine-type lithium iron phosphate cathode active material powder and a binder on the first composite layer. A specific surface area of the olivine-type lithium iron phosphate cathode active material powder in the second composite layer may be 0.8 times or less that of the olivine-type lithium iron phosphate cathode active material powder in the first composite layer. The cathode for a lithium secondary battery has excellent stability, high energy density, and improved cycle life characteristics.
US09178207B2 Electrochemical cell system with a progressive oxygen evolving electrode / fuel electrode
One aspect of the present invention provides an electrochemical cell system comprising at least one electrochemical cell configured to be selectively connected to a load to discharge the cell by generating electrical current using a fuel and an oxidant. The electrochemical cell system may alternatively be connected to a power supply to recharge the cell. The electrochemical cell system comprises a plurality of electrodes and electrode bodies therein. The electrochemical cell system further comprises a switching system configured to permit progressive movement of the anodes used for charging each electrochemical cell, maintaining a minimum distance from a progressively moving cathode that is the site of fuel growth.
US09178205B2 Rechargeable battery
A rechargeable battery including: an electrode assembly including a first electrode, a second electrode, and a separator between the first and second electrodes; a case receiving the electrode assembly; a cap plate coupled to the case; an electrode terminal connecting the electrode assembly to an outside of the cap plate; and a lead tab electrically connecting the electrode assembly and the electrode terminal, and the electrode assembly includes a coated region of the first electrode, and an uncoated region of the first electrode adjacent an end portion of the coated region, the uncoated region having a through hole formed therein and connecting an inner portion of the electrode assembly to an outside of the electrode assembly.
US09178200B2 Electrochemical cells and methods of manufacturing the same
Electrochemical cells and methods of making electrochemical cells are described herein. In some embodiments, an apparatus includes a multi-layer sheet for encasing an electrode material for an electrochemical cell. The multi-layer sheet including an outer layer, an intermediate layer that includes a conductive substrate, and an inner layer disposed on a portion of the conductive substrate. The intermediate layer is disposed between the outer layer and the inner layer. The inner layer defines an opening through which a conductive region of the intermediate layer is exposed such that the electrode material can be electrically connected to the conductive region. Thus, the intermediate layer can serve as a current collector for the electrochemical cell.
US09178196B2 Packaging of thermistor in a battery assembly
A battery assembly having a plurality of battery modules capable of powering a traction motor of a vehicle. First and second end frames are provided on the battery modules. A plurality of battery cells is disposed between the first and second end frames. The first end frame of one of the battery modules has a first pocket. The second end frame of an adjacent battery module has a second pocket. The first and second pockets are aligned when the battery assembly is assembled to define a receptacle. A thermistor is disposed in the receptacle. The thermistor extends through the first pocket of the first end frame and at least partially into the second pocket of the second end frame.
US09178193B2 Sub-battery pack, battery pack having the sub-battery pack, portable ultrasonic scanning apparatus using the sub-battery pack and battery pack, and cart carrying the sub-battery pack, battery pack and portable ultrasonic scanning apparatus
A battery pack includes a case, at least one receptacle defined in the case and configured to accommodate at least one battery that supplies power to a portable ultrasonic scanning apparatus, at least one first terminal installed to the at least one receptacle, the first terminal coming into contact with a terminal of the battery when the battery is accommodated in the at least one receptacle, and a second terminal electrically connected to the at least one first terminal, the second terminal being electrically connected to the portable ultrasonic scanning apparatus.
US09178180B2 Display device and electronic apparatus
Provided is a display device, including: a plurality of pixels that are provided between a first substrate and a light-transparent second substrate, the plurality of pixels each including a light-reflective first electrode, an organic layer, and a light-transparent second electrode in order from the first substrate side, the organic layer including at least a light-emission layer; a first light-shielding layer that is provided in a region between the plurality of pixels on one side of the second substrate; and a second light-shielding layer that is provided between the first light-shielding layer and the first substrate, the second light-shielding layer facing at least part of the first light-shielding layer.
US09178179B2 Electroluminescent device and method for producing the same
An electroluminescent device, comprising: a substrate; a first electrode and a second electrode disposed on the substrate; and an electroluminescent layer sandwiched between the first electrode and the second electrode, wherein at least one of the first and second electrodes is configured to have a grating structure; and wherein the grating structure has a grating period within a range of 0.9˜1.1 times of a wavelength of a light wave generated in the electroluminescent layer.
US09178176B2 Organic light emitting display devices and methods of manufacturing organic light emitting display devices
An organic light emitting display device may include a first cover, a protection member disposed on the first cover, a display panel disposed on the protection member, and a second cover disposed on the protection member. The protection member may include a plurality of layers having a plurality of pores, respectively. The protection member may reduce or remove a tolerance generated in manufacturing processes, and also may absorb or remove an external impact.
US09178175B2 Display device
In a display device according to the present disclosure, leader lines are led out from a display region to a leader region adjacent to the display region. In the leader region, metal portions are disposed between adjacent two of the plurality of leader lines with gaps. The gaps are formed between each of the metal portions and each of the adjacent two of the plurality of leader lines. A sealing layer covers display elements in the display region and covers the leader lines in a first sealing region of the leader region adjacent to the display region. A part of the sealing layer fills the gaps and adheres to each of the metal portions in the first sealing region.
US09178173B2 Organic light emitting device
The present invention relates to an organic light emitting device that includes a layered structure including a substrate, a bottom electrode and a top electrode, wherein the bottom electrode is closer to the substrate than the top electrode, the region between the bottom electrode and the top electrode defining an electronically active region, wherein the electronically active region includes a scattering layer having a thickness of less than 50 nm; and an organic light emitting device additionally having at least one light emitting layer in the electronically active region, and this device can also include a specific chemical compound outside of the electronically active region.
US09178168B2 White light emitting device
The present invention has an object of providing a light-emitting device including an OLED formed on a plastic substrate, which prevents degradation due to penetration of moisture or oxygen. On a plastic substrate, a plurality of films for preventing oxygen or moisture from penetrating into an organic light-emitting layer in the OLED (“barrier films”) and a film having a smaller stress than the barrier films (“stress relaxing film”), the film being interposed between the barrier films, are provided. Owing to a laminate structure, if a crack occurs in one of the barrier films, the other barrier film(s) can prevent moisture or oxygen from penetrating into the organic light emitting layer. The stress relaxing film, which has a smaller stress than the barrier films, is interposed between the barrier films, making it possible to reduce stress of the entire sealing film. Therefore, a crack due to stress hardly occurs.
US09178163B2 Compound comprising a five-membered hetero ring, an organic electrical element using same and a terminal thereof
A compound having a five-membered hetero ring, an organic electrical element using the same and a terminal thereof. An organic electric element includes a first electrode, a second electrode, and an organic material layer between the first electrode and the second electrode. The organic material layer includes the compound. When the organic electric element includes the compound in an organic material layer, luminous efficiency, stability, and life span can be improved.
US09178158B2 Light-emitting element, light-emitting device, electronic device, lighting device and organic compound
A novel organic compound which can be used as a host material for a phosphorescent compound is provided. A light-emitting element containing the organic compound is provided. A light-emitting device, an electronic device, and a lighting device each of which includes the light-emitting element are provided. In the light-emitting element including a light-emitting layer interposed between a pair of electrodes, the light-emitting layer contains at least an organic compound and a phosphorescent compound. In the organic compound, a dibenzo[f,h]quinoxaline skeleton and an amino group having two substituents are bonded to each other through an arylene group. The substituents are separately an aryl group or a heteroaryl group.
US09178156B2 Compositions comprising polymeric binders
The present invention relates to novel compositions comprising light emitting materials and/or charge transport materials and a polymeric binder, to their use as conducting inks for the preparation of organic light emitting diode (OLED) devices, to methods for preparing OLED devices using the novel formulations, and to OLED devices prepared from such methods and formulations.
US09178154B2 Quantum processor comprising a second set of inter-cell coupling devices where a respective pair of qubits in proximity adjacent unit cells crossed one another
Quantum processor architectures employ unit cells tiled over an area. A unit cell may include first and second sets of qubits where each qubit in the first set crosses at least one qubit in the second set. Each unit cell is positioned proximally adjacent at least one other unit cell. Within each unit cell, at least one qubit is longitudinally shifted with respect to at least one other qubit such that the longitudinally-shifted qubit crosses at least one qubit in a proximally adjacent unit cell. Communicative coupling between qubits is realized through respective intra-cell and inter-cell coupling devices. The longitudinal shifting of qubits and resultant crossing of qubits in proximally adjacent unit cells enables quantum processor architectures that can be better suited to solve certain problems.
US09178153B2 Memristor structure with a dopant source
A memristor including a dopant source is disclosed. The structure includes an electrode, a conductive alloy including a conducting material, a dopant source material, and a dopant, and a switching layer positioned between the electrode and the conductive alloy, wherein the switching layer includes an electronically semiconducting or nominally insulating and weak ionic switching material. A method for fabricating the memristor including a dopant source is also disclosed.
US09178149B2 Surface treatment to improve resistive-switching characteristics
This disclosure provides a method of fabricating a semiconductor device layer and associated memory cell structures. By performing a surface treatment process (such as ion bombardment) of a semiconductor device layer to create defects having a deliberate depth profile, one may create multistable memory cells having more consistent electrical parameters. For example, in a resistive-switching memory cell, one may obtain a tighter distribution of set and reset voltages and lower forming voltage, leading to improved device yield and reliability. In at least one embodiment, the depth profile is selected to modulate the type of defects and their influence on electrical properties of a bombarded metal oxide layer and to enhance uniform defect distribution.
US09178147B2 Resistive-switching memory elements having improved switching characteristics
Resistive-switching memory elements having improved switching characteristics are described, including a memory element having a first electrode and a second electrode, a switching layer between the first electrode and the second electrode comprising hafnium oxide and having a first thickness, and a coupling layer between the switching layer and the second electrode, the coupling layer comprising a material including metal titanium and having a second thickness that is less than 25 percent of the first thickness.
US09178146B2 Resistive-switching memory elements having improved switching characteristics
Resistive-switching memory elements having improved switching characteristics are described, including a memory element having a first electrode and a second electrode, a switching layer between the first electrode and the second electrode comprising hafnium oxide and having a first thickness, and a coupling layer between the switching layer and the second electrode, the coupling layer comprising a material including metal titanium and having a second thickness that is less than 25 percent of the first thickness.
US09178145B2 Methods for forming resistive switching memory elements
Resistive switching memory elements are provided that may contain electroless metal electrodes and metal oxides formed from electroless metal. The resistive switching memory elements may exhibit bistability and may be used in high-density multi-layer memory integrated circuits. Electroless conductive materials such as nickel-based materials may be selectively deposited on a conductor on a silicon wafer or other suitable substrate. The electroless conductive materials can be oxidized to form a metal oxide for a resistive switching memory element. Multiple layers of conductive materials can be deposited each of which has a different oxidation rate. The differential oxidization rates of the conductive layers can be exploited to ensure that metal oxide layers of desired thicknesses are formed during fabrication.
US09178140B2 Morphology control of ultra-thin MeOx layer
A nonvolatile memory device contains a resistive switching memory element with improved device switching performance and life and methods for forming the same. The nonvolatile memory device has a first layer on a substrate, a resistive switching layer on the first layer, and a second layer. The resistive switching layer is disposed between the first layer and the second layer and the resistive switching layer comprises a material having the same morphology as the top surface of the first layer. A method of forming a nonvolatile memory element in a ReRAM device includes forming a resistive switching layer on a first layer and forming a second layer, so that the resistive switching layer is disposed between the first layer and the second layer. The resistive switching layer comprises a material formed with the same morphology as the top surface of the first layer.
US09178131B2 Ferroelectric nanoshell devices
Disclosed herein are nanoscale devices comprising one or more ferroelectric nanoshells characterized as having an extreme curvature in at least one spatial dimension. Also disclosed are ferroelectric field effect transistors and metal ferroelectric metal capacitors comprising one or more ferroelectric nanoshells. Methods for controlling spontaneous ferroelectric polarization in nanoshell devices are also disclosed.
US09178130B2 Piezoelectric/electrostrictive element
In the manufacture of a laminated piezoelectric/electrostrictive element by lamination of a piezoelectric/electrostrictive film and an electrode film containing either platinum or an alloy composed mainly of platinum and having a thickness of 2.0 μm or less, both or either one of yttrium oxide (Y2O3) and cerium oxide (CeO2) is added to the electrode film or the piezoelectric/electrostrictive film, and the electrode film and the piezoelectric/electrostrictive film are fired simultaneously. This simultaneously achieves a reduced thickness and improved thermal resistance of the electrode film and a reduced change in piezoelectric/electrostrictive properties with time, thereby producing a piezoelectric/electrostrictive element with good initial piezoelectric/electrostrictive properties and with a small change in the piezoelectric/electrostrictive properties with time.
US09178127B2 Seebeck/peltier thermoelectric conversion device employing treated films of semiconducting material not requiring nanometric definition
The disclosure relates to Seebeck/Peltier effect thermoelectric conversion devices and in particular devices made of stack of dielectric layers alternated to treated semiconducting layers even of large size, not requiring lithographic patterning in a nano-micrometric scale.
US09178125B2 Light-emitting apparatus
A light-emitting apparatus of the present invention has (i) a semiconductor device which emits light toward a higher position than a substrate and (ii) a plurality of external connection terminals, and includes: a light-reflecting layer, provided on the substrate, which reflects the light emitted by the semiconductor device; and a covering layer which covers at least the light-reflecting layer and which transmits the light reflected by the light-reflecting layer. Further, the semiconductor device is provided on the covering layer, and is electrically connected to the external connection terminals via connecting portions, and the semiconductor device and the connecting portions are sealed with a sealing resin so as to be covered. Therefore, the light-emitting apparatus has increased efficiency with which light is taken out, and can prevent a reflecting layer from being altered, deteriorating, and decreasing in reflectance.
US09178123B2 Light emitting device reflective bank structure
Reflective bank structures for light emitting devices are described. The reflective bank structure may include a substrate, an insulating layer on the substrate, and an array of bank openings in the insulating layer with each bank opening including a bottom surface and sidewalls. A reflective layer spans sidewalls of each of the bank openings in the insulating layer.
US09178102B2 Light emitting apparatus, manufacturing method of light emitting apparatus, light receiving and emitting apparatus, and electronic equipment
A light emitting apparatus includes a translucent substrate, and a light emitting section and an optical filter section arranged in a first region of the substrate when viewed in a normal direction of a first surface of the substrate. The light emitting section has a laminate structure that includes, on the first surface of the substrate, a dielectric multilayer film, a first electrode, a functional layer with a light emitting layer, and a second electrode having semi-transmissive reflectivity. The optical filter section has a laminate structure that includes, on the first surface of the substrate, the dielectric multilayer film, the functional layer, and the second electrode. The dielectric multilayer film and the functional layer extend over the first region.
US09178094B1 Method for packaging solar cell receiver having secondary optical elements
The present invention relates to a method for packaging solar cell receivers having secondary optical elements. The present invention adopts a mold having mold cavities with special shapes. By filling mold cavities with optical encapsulant, the substrate containing solar cells is placed upside down towards the mold. Then the solar cells are immersed into the optical encapsulant before curing. Then, the cured optical encapsulant has the characteristics of the secondary optical elements and thus can be used as secondary optical elements such as spherical lenses. Meanwhile, the packaging of the solar cells is completed as well. The overall process requires only one curing process, which reduces the packaging time substantially.
US09178089B1 Strain-balanced extended-wavelength barrier detector
A strain-balanced photodetector is provided for detecting infrared light at an extended cutoff wavelength in the range of 4.5 μm or more. An InAsSb absorber layer has an Sb content is grown in a lattice-mismatched condition to a GaSb substrate, and a plurality of GaAs strain-compensating layers are interspersed within the absorber layer to balance the strain of the absorber layer due to the lattice mismatch. The strain-compensation layers allow the absorber to achieve a thickness exhibiting sufficient absorption efficiency while extending the cutoff wavelength beyond that possible in a lattice-matched state. Additionally, the strain-compensation layers are sufficiently thin to be substantially quantum-mechanically transparent such that they do not substantially affect the transmission efficiency of the absorber. The photodetector is preferably formed as a majority carrier filter photodetector exhibiting minimal dark current, and may be provided individually or in a focal plane array.
US09178086B2 Method for fabricating back-contact type solar cell
A method for fabricating back-contact type solar cells is provided. The method comprises forming a plurality of n-type doped zones, a plurality of p-type doped zones, and a back anti-reflection layer on a back surface of a semiconductor substrate. The lead-containing conductive paste may pass through the back anti-reflection layer and connect to the n-type doped zones and the p-type doped zones thereby being regarded as n-type electrodes and p-type electrodes.
US09178084B2 Solar cell and method for manufacturing the same
Disclosed are a solar cell and a method for manufacturing the same. The solar cell includes a support substrate; a back electrode layer on the support substrate, the back electrode layer being formed with at least one first through hole to expose a part of a top surface of the support substrate; a light absorbing layer on the back electrode layer; a buffer layer on the light absorbing layer; a window layer on the buffer layer; and a high-resistance region on a lateral side of the back electrode layer forming the first through hole. The high-resistance region has a resistance value higher than a resistance value of the light absorbing layer.
US09178083B2 Solar cell and manufacturing method thereof
Provided is a solar-cell manufacturing method that is capable of preventing a conductive paste from bleeding and spreading on a photoelectric conversion body. In the provided method of manufacturing a solar cell, a first printing speed at which a first conductive material is printed is faster than a second printing speed at which a second conductive material is printed on the first conductive material.
US09178082B2 Methods of forming thin-film photovoltaic devices with discontinuous passivation layers
In various embodiments, photovoltaic devices incorporate discontinuous passivation layers (i) disposed between a thin-film absorber layer and a partner layer, (ii) disposed between the partner layer and a front contact layer, and/or (iii) disposed between a back contact layer and the thin-film absorber layer.
US09178081B2 Solid-state image pickup apparatus and image pickup system
An apparatus according to the present invention in which a first substrate including a photoelectric conversion element and a gate electrode of a transistor, and a second substrate including a peripheral circuit portion are placed upon each other. The first substrate does not include a high-melting-metal compound layer, and the second substrate includes a high-melting-metal compound layer.
US09178080B2 Deep trench structure for high density capacitor
Some embodiments relate to high density capacitor structures. Some embodiments include a semiconductor substrate having an conductive region with a plurality of trenches formed therein. A first dielectric layer is formed over respective bottom portions and respective sidewall portions of the respective trenches. A first conductive layer is formed in the trench and over the first dielectric layer, wherein the first dielectric layer acts as a first capacitor dielectric between the conductive region and the first conductive layer. A second dielectric layer is formed in the trench and over the first conductive layer. A second conductive layer is formed in the trench and over the second dielectric layer, wherein the second dielectric layer acts as a second capacitor dielectric between the first conductive layer and the second conductive layer. Other embodiments are also disclosed.
US09178078B2 Non-volatile memory device
According to one embodiment, a non-volatile memory device includes a base layer, a first stacked unit and a second stacked unit disposed above the base layer and arranged in parallel to each other and spaced apart from each other in a first direction, in a plane parallel to the base layer, a first semiconductor layer penetrating the first stacked unit, a second semiconductor layer penetrating in the second stacked unit, the first memory film disposed between the first semiconductor layer and the first stacked unit, and a connecting portion disposed between the base layer and the first stacked unit and between the base layer and the second stacked unit and electrically connecting the first semiconductor layer and the second semiconductor layer. An end portion of the first semiconductor layer is positioned between the connecting portion and the base layer.
US09178074B2 Semiconductor device, display unit, and electronic apparatus
Provided is a semiconductor device that includes: a transistor; an oxide semiconductor film; a first conductive film electrically connected to the oxide semiconductor film; and a first insulating film provided between the first conductive film and the oxide semiconductor film.
US09178073B2 Oxide for semiconductor layer of thin-film transistor, sputtering target, and thin-film transistor
This oxide for a semiconductor layer of a thin-film transistor contains Zn, Sn and In, and the content (at %) of the metal elements contained in the oxide satisfies formulas (1) to (3) when denoted as [Zn], [Sn] and [In], respectively. [In]/([In]+[Zn]+[Sn])≧−0.53×[Zn]/([Zn]+[Sn])+0.36 (1) [In]/([In]+[Zn]+[Sn])≧2.28×[Zn]/([Zn]+[Sn])−2.01 (2) [In]/([In]+[Zn]+[Sn])≦1.1×[Zn]/([Zn]+[Sn])−0.32 (3) The present invention enables a thin-film transistor oxide that achieves high mobility and has excellent stress resistance (negligible threshold voltage shift before and after applying stress) to be provided.
US09178072B2 Thin film transistor and display device
Provided is a thin film transistor capable of improving reliability in the thin film transistor including an oxide semiconductor layer. A thin film transistor including: a gate electrode; a gate insulating film formed on the gate electrode; an oxide semiconductor layer forming a channel region corresponding to the gate electrode on the gate insulating film; a channel protective film formed at least in a region corresponding to the channel region on the oxide semiconductor layer; and a source/drain electrode. A top face and a side face of the oxide semiconductor layer are covered with the source/drain electrode and the channel protective layer on the gate insulating film.
US09178069B2 Semiconductor device and semiconductor device production system
A semiconductor device production system using a laser crystallization method is provided which can avoid forming grain boundaries in a channel formation region of a TFT, thereby preventing grain boundaries from lowering the mobility of the TFT greatly, from lowering ON current, and from increasing OFF current. Rectangular or stripe pattern depression and projection portions are formed on an insulating film. A semiconductor film is formed on the insulating film. The semiconductor film is irradiated with continuous wave laser light by running the laser light along the stripe pattern depression and projection portions of the insulating film or along the major or minor axis direction of the rectangle. Although continuous wave laser light is most preferred among laser light, it is also possible to use pulse oscillation laser light in irradiating the semiconductor film.
US09178066B2 Methods for forming a semiconductor arrangement with structures having different heights
Among other things, one or more semiconductor arrangements, and techniques for forming such semiconductor arrangements are provided. A layer, such as a poly layer or an inter layer dielectric (ILD) layer, is formed over a substrate. A photoresist mask is formed over the layer. The photoresist mask comprises an open region overlaying a target region of the layer and comprises a protection region overlaying a second region of the layer. An etching process is performed through the open region to reduce a height of the layer in the target region in relation to a height of the layer in the second region because the protection region inhibits the etching process from affecting the layer in the second region. A first structure, having a first height, is formed within the target region. A second structure, having a second height greater than the first height, is formed within the second region.
US09178059B2 Semiconductor device
A first contact, a second impurity region, and a second low-concentration impurity region form a Schottky barrier diode. The second impurity region has the same impurity concentration as those of first impurity regions, and thus can be formed in the same process as forming the first impurity regions. In addition, the second low-concentration impurity region has the same impurity concentration as those of first low-concentration impurity regions, and thus can be formed in the same process as forming the first low-concentration impurity regions.
US09178058B2 RF switch on high resistive substrate
A device includes a semiconductor substrate of a first conductivity type, and a deep well region in the semiconductor substrate, wherein the deep well region is of a second conductivity type opposite to the first conductivity type. The device further includes a well region of the first conductivity type over the deep well region. The semiconductor substrate has a top portion overlying the well region, and a bottom portion underlying the deep well region, wherein the top portion and the bottom portion are of the first conductivity type, and have a high resistivity. A gate dielectric is over the semiconductor substrate. A gate electrode is over the gate dielectric. A source region and a drain region extend into the top portion of the semiconductor substrate. The source region, the drain region, the gate dielectric, and the gate electrode form a Radio Frequency (RF) switch.
US09178056B2 Semiconductor device
A semiconductor device 100 includes a plurality of vertical transistors 50 provided to stand from a silicon substrate 1 and having a pillar lower diffusion layer 9 at their end portions on the silicon substrate 1 side, a metal contact plug 31 provided to stand from the silicon substrate 1 and connected to the pillar lower diffusion layer 9 of the plurality of vertical transistors 50, the plurality of vertical transistors 50 are uniformly arranged around the metal contact plug 31 and share the pillar lower diffusion layer 9 and the metal contact plug 31.
US09178054B2 Planar vertical DMOS transistor with reduced gate charge
A planar vertical DMOS transistor includes a dielectric separation structure formed under the conductive gate and over the bulk of the semiconductor layer outside of the channel region of the transistor. The planar vertical DMOS transistor with a conductive gate formed over the dielectric structure reduces the parasitic gate-to-bulk or gate-to-drain overlap capacitance by increasing the separation between the conductive gate and the bulk of the semiconductor layer. Meanwhile, the desired distance between the body regions formed on opposing sides of the conductive gate is maintained.
US09178049B2 MOS type semiconductor device
A MOS type semiconductor device wherein on voltage is low, the rate of rise of current at turn-on time is low, and it is possible to hold down the rate of rise of collector current at turn-on time, and reduce radiation noise. The device includes a stripe-shaped plan-view pattern of protruding semiconductor region on an n-type substrate and having a p-type region sandwiched between an upper side n-type first region and a lower side n-type second region, a top flat portion including a depression region with a depth reaching the p-type region, and an inclined portion between the top flat portion and a bottom flat portion around the protruding semiconductor region; and a gate electrode with one end portion of the gate electrode on a surface within the inclined portion, and another end portion on a surface of the lower side n-type second region in the p-type region side vicinity.
US09178048B2 Thin film transistor substrate and method for manufacturing the same and organic light emitting device using the same
Disclosed is a thin film transistor substrate which facilitates to improve output and transfer characteristics of thin film transistor, wherein the thin film transistor substrate comprises a thin film transistor comprising a lower gate electrode on a substrate, an active layer on the lower gate electrode, source and drain electrodes on the active layer, and an upper gate electrode on the source electrode, drain electrode and active layer, the upper gate electrode for covering a channel region defined by the source and drain electrodes; and a contact portion for electrically connecting the lower gate electrode with the upper gate electrode.
US09178046B2 Array substrate and manufacturing method thereof
Embodiment of the present invention disclose an array substrate and a manufacturing method thereof, and the manufacturing method of an array substrate comprises the following steps: Step S1: a gate electrode metal layer, an insulating layer and an active layer are deposited successively on a substrate, and gate electrodes, gate lines and an active layer pattern are formed through a first mask process; Step S2: a protective layer is deposited on the substrate after completion of the step S1, and via-holes are formed in the protective layer through a second mask process; and Step S3: a pixel electrode layer and a source/drain electrode metal layer are deposited sequentially on the substrate after completion of the step S2, and source/drain electrodes, pixel electrodes and data lines are formed through a third mask process.
US09178045B2 Integrated circuit devices including FinFETS and methods of forming the same
Integrated circuit devices including fin field-effect transistors (finFETs) and methods of forming the same are provided. The methods may include forming a fin-shaped channel region including germanium on a substrate and forming a source/drain region adjacent the channel region on the substrate. The methods may further include forming a barrier layer contacting sidewalls of the channel region and the source/drain region, and the barrier layer may include SixGe1-x, and x may be in a range of about 0.05 to about 0.2.
US09178041B2 Power MOSFET and methods for forming the same
A device includes a trench extending into a semiconductor region and having a first conductivity type, and a conductive field plate in the trench. A first dielectric layer separates a bottom and sidewalls of the field plate from the semiconductor region. A main gate is disposed in the trench and overlapping the field plate. A second dielectric layer is disposed between and separating the main gate and the field plate from each other. A Doped Drain (DD) region of the first conductivity type is under the second dielectric layer and having an edge portion overlapping the DD region. A body region includes a first portion at a same level as a portion of the main gate, and a second portion contacting the DD region, wherein the body region is of a second conductivity type opposite the first conductivity type. A MOS-containing device is at a surface of the semiconductor region.
US09178038B2 Raised source/drain MOS transistor and method of forming the transistor with an implant spacer and an epitaxial spacer
A raised source/drain MOS transistor is formed in a process that utilizes a first sidewall spacer when implanting a semiconductor region to form the heavily-doped source region and the heavily-doped drain region of the transistor, and a second different sidewall spacer when epitaxially growing the raised source region and the raised drain region of the transistor.
US09178037B2 Inner L-spacer for replacement gate flow
An integrated circuit is formed by removing a sacrificial gate dielectric layer and a sacrificial gate to form a gate cavity. A conformal dielectric first liner is formed in the gate cavity and a conformal second liner is formed on the first liner. A first etch removes the second liner from the bottom of the gate cavity, leaving material of the second liner on sidewalls of the gate cavity. A second etch removes the first liner from the bottom of the gate cavity exposed by the second liner, leaving material of the first liner on the bottom of the gate cavity under the second liner on the sidewalls of the gate cavity. A third etch removes the second liner from the gate cavity, leaving an L-shaped spacers of the first liner in the gate cavity. A permanent gate dielectric layer and replacement gate are formed in the gate cavity.
US09178035B1 Methods of forming gate structures of semiconductor devices
One method of forming replacement gate structures for first and second devices, the first device being a short channel device and the second device being a long channel device, is disclosed which includes forming a first and a second gate cavity above a semiconductor substrate, the first gate cavity being narrower than the second gate cavity, forming a bulk metal layer within the first and second gate cavities, performing an etching process to recess the bulk metal layer within the first and second gate cavities, resulting in the bulk metal layer within the second gate cavity being at its final thickness, forming a masking layer over the bulk metal layer within the second gate cavity, and performing an etching process to further recess the bulk metal layer within the first gate cavity, resulting in the bulk metal layer within the first gate cavity being at its final thickness.
US09178033B2 Manufacturing method of semiconductor device
A manufacturing method of a semiconductor device includes: a semiconductor substrate including a drain, a drift making contact with a front face of the drain, a body contacting with a front face of the drift, a source provided in part of a front face of the body, and a floating surrounded by the drift; and a gate including an insulator formed on an inner wall of a trench and a electrode disposed inside the insulator and which has a bottom portion contacting with the floating, the manufacturing method includes: forming the trench in a semiconductor wafer so as to have a bottom portion in which an end portion in a short direction perpendicular to a longitudinal direction thereof is deeper than a central portion; injecting an impurity ions into the bottom portion of the trench; and forming the central portion of the trench in the short direction to be deepened.
US09178031B2 Methods of atomic-layer deposition of hafnium oxide/erbium oxide bi-layer as advanced gate dielectrics
Provided is a two-step ALD deposition process for forming a gate dielectric involving an erbium oxide layer deposition followed by a hafnium oxide layer deposition. Hafnium oxide can provide a high dielectric constant, high density, large bandgap and good thermal stability. Erbium oxide can act as a barrier against oxygen diffusion, which can lead to increasing an effective oxide thickness of the gate dielectric and preventing hafnium-silicon reactions that may lead to higher leakage current.
US09178026B2 Semiconductor devices and methods fabricating same
Disclosed are semiconductor devices and methods of forming the same. According to the semiconductor device, gate structures are provided to be buried in a substrate and first dopant regions and second dopant regions are provided at both ends of the gate structures. Conductive lines cross the gate structures and are connected to the first dopant regions. Contact structures are respectively provided in contact holes which are provided between the conductive lines and expose the second dopant regions. The contact structures are in contact with the second dopant regions, respectively. Each of the contact structures includes a pad pattern extending along a sidewall of the contact hole.
US09178025B2 Low-resistance electrode design
A solution for designing a semiconductor device, in which two or more attributes of a pair of electrodes are determined to, for example, minimize resistance between the electrodes, is provided. Each electrode can include a current feeding contact from which multiple fingers extend, which are interdigitated with the fingers of the other electrode in an alternating pattern. The attributes can include a target depth of each finger, a target effective width of each pair of adjacent fingers, and/or one or more target attributes of the current feeding contacts. Subsequently, the device and/or a circuit including the device can be fabricated.
US09178021B1 Silicon carbide semiconductor device
A silicon carbide semiconductor device includes a silicon carbide layer, a body region, a source region, a gate insulating film, a gate electrode, a source electrode, a first impurity region, and a second impurity region. The second impurity region is disposed within the silicon carbide layer so as to connect the body region and the first impurity region to each other, and has a second conductivity type. An impurity concentration in the second impurity region is equal to or higher than an impurity concentration in the silicon carbide layer and equal to or lower than a lower limit of an impurity concentration in the body region.
US09178020B2 Graphene structure and method of manufacturing the graphene structure, and graphene device and method of manufacturing the graphene device
A graphene structure and a method of manufacturing the graphene structure, and a graphene device and a method of manufacturing the graphene device. The graphene structure includes a substrate; a growth layer disposed on the substrate and having exposed side surfaces; and a graphene layer disposed on the side surfaces of the growth layer.
US09178018B2 Manufacturing method for a micromechanical component and a corresponding micromechanical component
A manufacturing method is described for a micromechanical component and a corresponding micromechanical component. The manufacturing method includes the steps: forming at least one crystallographically modified area in a substrate; forming an etching mask having a mask opening on a main surface of the substrate; and carrying out an etching step using the etching mask, the crystallographically modified area and a surrounding area of the substrate being removed and thus forming a cavern in the substrate.
US09178017B2 Semiconductor device and method for manufacturing same
A semiconductor device includes a first well and a second well provided within a semiconductor substrate, an isolation region disposed between the first well and the second well within the semiconductor substrate, a first wiring disposed on the first well, a second wiring disposed on the second well, a concave third wiring disposed on the isolation region, a buried insulating film disposed on the third wiring so as to fill the concave portion thereof, a plurality of fourth wirings disposed on the buried insulating film, and a contact plug disposed so as to electrically connect to at least one of the first and second wells.
US09178016B2 Charge protection for III-nitride devices
A semiconductor device includes a III-nitride semiconductor substrate having a two-dimensional charge carrier gas at a depth from a main surface of the III-nitride semiconductor substrate. A surface protection layer is provided on the main surface of the III-nitride semiconductor substrate. The surface protection layer has charge traps in a band gap which exist at room temperature operation of the semiconductor device. A contact is provided in electrical connection with the two-dimensional charge carrier gas in the III-nitride semiconductor substrate. A charge protection layer is provided on the surface protection layer. The charge protection layer includes an oxide and shields the surface protection layer under the charge protection layer from radiation with higher energy than the bandgap energy of silicon nitride.
US09178012B2 Plated trench capacitor structures
A method and structure is directed to eDRAM cells with high-conductance electrodes. The method includes forming upper layers on a semiconductor substrate and forming an opening in the upper layers. The method further includes forming a trench in the semiconductor substrate, aligned with the opening. The method further includes forming a metal plate on all exposed surface in the trench by applying a metallic aqueous solution with an electrical bias to a backside of the semiconductor substrate.
US09178011B2 Deposition of anisotropic dielectric layers orientationally matched to the physically separated substrate
A dielectric layer can achieve a crystallography orientation similar to a base dielectric layer with a conductive layer disposed between the two dielectric layers. By providing a conductive layer having similar crystal structure and lattice parameters with the base dielectric layer, the crystallography orientation can be carried from the base dielectric layer, across the conductive layer to affect the dielectric layer. The process can be used to form capacitor structure for anisotropic dielectric materials, along the direction of high dielectric constant.
US09178006B2 Methods to improve electrical performance of ZrO2 based high-K dielectric materials for DRAM applications
A method for reducing the leakage current in DRAM MIM capacitors comprises forming a multi-layer dielectric stack from an amorphous highly doped material, an amorphous high band gap material, and a lightly-doped or non-doped material. The highly doped material will remain amorphous (<30% crystalline) after an anneal step. The high band gap material will remain amorphous (<30% crystalline) after an anneal step. The lightly-doped or non-doped material will become crystalline (≧30% crystalline) after an anneal step. The high band gap material is formed between the amorphous highly doped material and the lightly or non-doped material and provides an intermediate barrier to conduction through the multi-layer dielectric stack.
US09178005B2 Organic light emitting display and method of manufacturing the same
An organic light emitting display includes a base substrate, a first transistor, an insulation layer having a first contact hole and a second contact hole, a first electrode, an organic layer, a second electrode and a pixel definition layer having a third contact hole. The second electrode may be connected to the first transistor through the second contact hole, and the second electrode may be connected to other devices. The second electrode may be connected to a switching device.
US09178004B2 Light-emitting device
There is provided an EL light-emitting device with less uneven brightness. When a drain current of a plurality of current controlling TFTs is Id, a mobility is μ, a gate capacitance per unit area is Co, a maximum gate voltage is Vgs(max), a channel width is W, a channel length is L, an average value of a threshold voltage is Vth, a deviation from the average value of the threshold voltage is ΔVth, and a difference in emission brightness of a plurality of EL elements is within a range of ±n %, a semiconductor display device is characterized in that A = 2 ⁢ ⁢ Id μ * C 0 ⁢ A ( Vgs ( max ) - Vth ) 2 ≦ W L ≦ ( 1 + n 100 - 1 ) 2 * A Δ ⁢ ⁢ Vth 2 ⁢  Δ ⁢ ⁢ Vth  ≦ ( 1 + n 100 - 1 ) * A * L / W
US09178003B2 Organic light-emitting diode (OLED) display
An organic light-emitting diode (OLED) display is disclosed. In one aspect, the OLED display includes a thin film transistor including an active layer, a gate electrode, a source electrode, and a drain electrode, a first insulating layer arranged between the active layer and the gate electrode, and a second insulating layer arranged between the gate, source, and drain electrodes. The OLED display also includes a third insulating layer covering the source and drain electrodes, wherein an opening is defined in each of the second and third insulating layers and wherein the openings substantially overlap. The OLED display further includes a pixel electrode formed in the openings defined in the second and third insulating layers and including a semi-permeable metal layer.
US09178002B2 Organic light-emitting diode (OLED) display
An organic light-emitting diode (OLED) display is disclosed. In one aspect, the OLED display includes a display substrate including a display area displaying an image and a peripheral area surrounding the display area. The OLED display also includes an encapsulation substrate facing the display substrate and a sealant bonding the display substrate to the encapsulation substrate. The display substrate includes a substrate, a scan driver formed over the substrate in the peripheral area and including a common voltage line applying a common voltage to the display area. The display substrate also includes a pixel defining layer formed above the common voltage line. The sealant is formed over the scan driver and contacts an upper surface of the pixel defining layer.
US09178001B2 Organic light emitting diode and method for manufacturing the same
The present invention provides an organic light emitting diode comprising a substrate comprising a first sub-pixel, a second sub-pixel, and a third sub-pixel; a first electrode disposed on the substrate; a second electrode facing the first electrode; an emission layer disposed between the first electrode and the second electrode; and a first layer disposed between the first electrode and the second electrode and containing an ambipolar compound, and a method for manufacturing the organic light emitting diode.
US09177994B2 Integrated thermoelectric generator
An integrated thermoelectric generator includes a semiconductor. A set of thermocouples are electrically connected in series and thermally connected in parallel. The set of thermocouples include parallel semiconductor regions. Each semiconductor region has one type of conductivity from among two opposite types of conductivity. The semiconductor regions are electrically connected in series so as to form a chain of regions having, alternatingly, one and the other of the two types of conductivity.
US09177992B2 Active LED module with LED and transistor formed on same substrate
An LED module is disclosed containing an integrated driver transistor (e.g, a MOSFET) in series with an LED. In one embodiment, LED layers are grown over a substrate. The transistor regions are formed over the same substrate. After the LED layers, such as GaN layers, are grown to form the LED portion, a central area of the LED is etched away to expose a semiconductor surface in which the transistor regions are formed. A conductor connects the transistor in series with the LED. Another node of the transistor is electrically coupled to an electrode on the bottom surface of the substrate. In one embodiment, an anode of the LED is connected to one terminal of the module, one current carrying node of the transistor is connected to a second terminal of the module, and the control terminal of the transistor is connected to a third terminal of the module.
US09177989B2 Imaging device
A solid state imaging device according to an embodiment includes a photo detector arranged two-dimensionally in a semiconductor substrate, a readout circuit provided in the semiconductor substrate, a first photoelectric conversion layer provided above the photo detector, a plurality of first metal dots provided above the first photoelectric conversion layer, a second photoelectric conversion layer provided above the first metal dots, and a plurality of second metal dots provided above the second photoelectric conversion layer.
US09177986B2 Isolation for semiconductor devices
A system and method for isolating semiconductor devices is provided. An embodiment comprises an isolation region that is laterally removed from source/drain regions of semiconductor devices and has a dielectric material extending over the isolation implant between the source/drain regions. The isolation region may be formed by forming an opening through a layer over the substrate, depositing a dielectric material along the sidewalls of the opening, implanting ions into the substrate after the deposition, and filling the opening with another dielectric material.
US09177984B2 Solid-state imaging device and electronic apparatus having a solid-state imaging device
A solid-state imaging device includes: a substrate; a photoelectric conversion unit that is formed on the substrate and generates signal charge in correspondence with a light amount of incident light; and a transparent electrode that is formed in an upper portion of the substrate and includes a first area formed from a nano carbon material and a second area that is brought into contact with the first area and has light transmittance higher than that of the first area.
US09177981B2 Solid-state imaging device having a metallic pad periphery guard ring
Disclosed herein is a solid-state imaging device including: a sensor element having a plurality of pixels each having a photoelectric conversion section; and a logic element attached to the sensor element in such a manner as to be stacked on the sensor element face-to-face and provided with a pad electrode. In a stacked body of the sensor and logic elements, a pad opening is provided above the top surface of the pad electrode facing the sensor element, and a pad periphery guard ring is provided to surround the side portion of the pad opening. The pad periphery guard ring is formed by integrally filling, on the side of the pad opening, an entire trench that is at least as deep as the pad opening with a metal material.
US09177972B1 Array substrate, fabricating method thereof, and display device
An array substrate and a display device incorporating the array substrate are disclosed. The array substrate includes an alignment mark formed in a source-drain electrode layer, and a detection hole formed in a region in a pixel electrode layer and a passivation layer that corresponds to the alignment mark, such that normal detection of the alignment mark can be carried out by irradiating an electronic beam into the detection hole. The structure of the array substrate reduces the likelihood of detection failures.
US09177971B2 Thin film transistor array panel and method for manufacturing the same
A thin film transistor array panel includes a substrate, a gate line extending in a first direction on the substrate, a data line extending in a second direction on the substrate and intersecting the gate line, a thin film transistor connected to the gate line and the data line, an insulating layer on the gate line, the data line, and the thin film transistor, a first auxiliary line on the insulating layer and connected to the gate line, a second auxiliary line on the insulating layer and connected to the data line, and a pixel electrode connected to the thin film transistor.
US09177970B2 Semiconductor device, method of manufacturing the same, method of manufacturing display unit, and method of manufacturing electronic apparatus
A semiconductor device includes: a gate electrode and a wiring; a first insulating film covering the gate electrode and the wiring; a semiconductor film opposed to the gate electrode with the first insulating film in between; a first concave section located in a position adjacent to the semiconductor film; a connection hole, the connection hole being provided in the first insulating film, and the connection hole reaching the wiring, and a first electrically-conductive film, the first electrically-conductive film being electrically connected to the wiring through the connection hole, and the first electrically-conductive film being buried in the first concave section.
US09177967B2 Heterogeneous semiconductor material integration techniques
Techniques are disclosed for heteroepitaxial growth of a layer of lattice-mismatched semiconductor material on an initial substrate, and transfer of a defect-free portion of that layer to a handle wafer or other suitable substrate for integration. In accordance with some embodiments, transfer may result in the presence of island-like oxide structures on the handle wafer/substrate, each having a defect-free island of the lattice-mismatched semiconductor material embedded within its upper surface. Each defect-free semiconductor island may have one or more crystalline faceted edges and, with its accompanying oxide structure, may provide a planar surface for integration. In some cases, a layer of a second, different semiconductor material may be heteroepitaxially grown over the handle wafer/substrate to fill areas around the transferred islands. In some other cases, the handle wafer/substrate itself may be homoepitaxially grown to fill areas around the transferred islands.
US09177965B2 Nonvolatile memory device in three-dimensional structure with a stress reducing materials on the channel
A nonvolatile memory device includes a substrate, a stacked structure with conductive materials and first insulating materials and the conductive materials and the first insulating materials are alternately stacked on the substrate, and a plurality of pillars in contact with the substrate and the pillars extend through the stacked structure in a direction perpendicular to the substrate. The device also includes information storage layers between the conductive materials and the first insulating materials, and second insulating materials between the first insulating materials and the pillars.
US09177964B2 Methods of forming sidewall gates
A method of forming sidewall gates for vertical transistors includes depositing a gate dielectric layer over polysilicon channel structures, and depositing a gate polysilicon layer over the gate dielectric. The gate polysilicon layer is then etched back to form separated gate electrodes. Filler portions are then formed between gate electrodes, which are then etched from the top down while their sides are protected.
US09177963B2 Forming a low votage antifuse device and resulting device
Methods for a low voltage antifuse device and the resulting devices are disclosed. Embodiments may include forming a plurality of fins above a substrate, removing a portion of a fin, forming a fin tip, forming a first area of a gate oxide layer above at least the fin tip, forming a second area of the gate oxide layer above a remaining portion of the plurality of fins, wherein the first area is thinner than the second area, and forming a gate over at least the fin tip to form an antifuse one-time programmable device.
US09177962B2 Semiconductor device
Provided is a semiconductor device wherein chip size is reduced, while potential on the dummy word lines is fixed. The semiconductor device is provided with: a memory cell array including a plurality of memory cells, a plurality of word lines for controlling memory operations of the plurality of memory cells, and a plurality of dummy word lines that do not participate in memory operations of the plurality of memory cells; and a guard ring surrounding the memory cell array. The plurality of dummy word lines are electrically fixed to the guard ring.
US09177944B2 Semiconductor device with stacked power converter
A semiconductor device with a stacked power converter is described. In some examples, a semiconductor device includes: a first integrated circuit (IC) die having bond pads and solder bumps, the bond pads configured for wire-bonding; and a second IC die mounted on the first IC die, the second IC die having an active side and a backside opposite the active side, the second IC die including bond pads on the active side configured for wire-bonding, and solder bumps disposed on a backside opposite the active side; where the solder bumps of the first IC die are electrically and mechanically coupled to the solder bumps of the second IC die to form bump bonds.
US09177943B2 Power device cassette with auxiliary emitter contact
A press pack module includes a collector module terminal, an emitter module terminal, a gate module terminal, and an auxiliary module terminal. Each IGBT cassette within the module includes a set of shims, two contact pins, and an IGBT die. The first contact pin provides part of a first electrical connection between the gate module terminal and the IGBT gate pad. The second contact pin provides part of a second electrical connection between the auxiliary module terminal and a shim that in turn contacts the IGBT emitter pad. The electrical connection between the auxiliary emitter terminal and each emitter pad of the many IGBTs is a balanced impedance network. The balanced network is not part of the high current path through the module. By supplying a gate drive signal between the gate and auxiliary emitter terminals, simultaneous IGBT turn off in high speed and high current switching conditions is facilitated.
US09177942B2 Semiconductor package and method of fabricating the same
Provided are semiconductor packages and methods of fabricating the same. The method may include mounting a first semiconductor chip including chip and heat-transfer regions and a lower heat-transfer pattern disposed on the heat-transfer region, on a substrate, mounting a second semiconductor chip on the chip region of the first semiconductor chip, forming a mold layer on the substrate to enclose the first and second semiconductor chips, forming an opening in the mold layer to expose at least a portion of the lower heat-transfer pattern, forming a heat-pathway pattern in the opening, and forming a heat-dissipating part on the second semiconductor chip and the mold layer to be connected to the heat-pathway pattern.
US09177929B2 Techniques for fabricating fine-pitch micro-bumps
Techniques for fabricating fine-pitch micro-bumps are disclosed. According to one embodiment, a fabrication process may comprise the following steps: depositing a dielectric layer on a wafer; forming a pattern of through holes in the dielectric layer; depositing a seed metal layer on top of the dielectric layer and inside the through holes; depositing a layer of UBM metal on top of the seed metal layer (including inside the holes), and further filling the holes with a low melting point metal; performing chemical mechanical polishing (CMP) to remove conductive material(s) outside the holes and/or on the surface of the dielectric layer, such that the metal stacks of adjacent holes are insulated by the dielectric material between them; and etching the dielectric material surrounding the holes to cause the tip of the metal stacks to extend slightly higher than the surrounding dielectric surface, thereby forming fine-pitch micro-bumps.
US09177928B1 Contact and solder ball interconnect
A semiconductor device fabrication method includes forming a barrier layer upon a dielectric layer, forming a pillar interconnect structure upon the barrier layer, forming solder upon the pillar interconnect structure, reflowing the solder to release solder voids, forming a perimeter material around at least a portion of an exposed sidewall of the pillar, and removing the barrier layer exterior to the pillar interconnect structure. Another fabrication method includes forming the barrier layer, forming the pillar interconnect structure, forming the solder upon the pillar interconnect structure, forming a perimeter material on exposed surfaces of the pillar interconnect structure, and removing the barrier layer on the surface of the dielectric layer exterior to the pillar interconnect structure. Another fabrication method includes forming the barrier layer, forming the pillar interconnect structure, forming a wettable material on sidewalls of the pillar, and removing the barrier layer exterior to the pillar interconnect structure.
US09177926B2 Semiconductor device and method comprising thickened redistribution layers
A method of making a semiconductor package can comprise forming a plurality of thick redistribution layer (RDL) traces over active surfaces of a plurality of semiconductor die that are electrically connected to contact pads on the plurality of semiconductor die, singulating the plurality of semiconductor die comprising the plurality of thick RDL traces, mounting the singulated plurality of semiconductor die over a temporary carrier with the active surfaces of the plurality of semiconductor die oriented away from the temporary carrier, disposing encapsulant material over the active surfaces and at least four side surfaces of each of the plurality of semiconductor die, over the plurality of thick RDL traces, and over the temporary carrier, forming a via through the encapsulant material to expose at least one of the plurality of thickened RDL traces with respect to the encapsulant material, removing the temporary carrier, and singulating the plurality of semiconductor die.
US09177923B2 Through-substrate via shielding
A semiconductor apparatus includes a substrate structure including a silicon substrate layer, a conductive through-substrate via extending through the silicon substrate layer. The apparatus further includes a semiconductor device located in the substrate structure and a conductive wall located between the through-substrate via and the semiconductor device. The conductive wall is in electrical contact with the silicon substrate layer.
US09177922B2 Electric device, method for manufacturing the same, and radiation inspection apparatus
An electric device, comprising a conductive guard ring formed on a substrate along an outer periphery of the substrate, an electrode formed inside the guard ring on the substrate, and a connecting portion formed above the electrode, for connecting an external apparatus and the electrode, wherein the connecting portion includes a conductive member for electrically connecting the external apparatus and the electrode, and an insulating member formed on a lower surface of the conductive member, and the insulating member exposes a portion of the conductive member, which is positioned immediately above the electrode, and an end of the insulating member is positioned inside the guard ring in planar view such that the conductive member and the guard ring do not contact each other.
US09177920B2 Thin film transistor array substrate, method of manufacturing the same, and display device
Embodiments of the present invention disclose a thin film transistor array substrate, a method of manufacturing the same, and display device. A method of manufacturing a thin film transistor array substrate, comprises: forming a resin layer on a substrate formed with a thin film transistor array, patterning the resin layer by using a mask process to form a spacer and a contact hole filling layer, the contact hole filing layer is used for filling contact holes on the thin film transistor array substrate; forming an alignment film on the substrate patterning with the spacer and the contact hole filing layer.
US09177919B2 Chip package and method for forming the same
A chip package including a first substrate having a first surface and a second surface opposite thereto is provided. The first substrate has a micro-electric element and a plurality of conducting pads adjacent to the first surface. The first substrate has a plurality of openings respectively exposing a portion of each conducting pad. A second substrate is disposed on the first surface. An encapsulation layer is disposed on the first surface and covers the second substrate. A redistribution layer is disposed on the second surface and extends into the openings to electrically connect the conducting pads.
US09177918B2 Apparatus and methods for low k dielectric layers
Methods and apparatus for a low k dielectric layer of porous SiCOH. A method includes placing a semiconductor substrate into a vapor deposition chamber; introducing reactive gases into the vapor deposition chamber to form a dielectric film comprising SiCOH and a decomposable porogen; depositing the dielectric film to have a ratio of Si—CH3 to SiOnetwork bonds of less than or equal to 0.25; and performing a cure for a cure time to remove substantially all of the porogen from the dielectric film. In one embodiment the porogen comprises a cyclic hydrocarbon. The porogen may be UV curable. In embodiments, different lowered Si—CH3 to SiOnetwork ratios for the deposition of the dielectric film are disclosed. An apparatus of a semiconductor device including the low k dielectric layers is disclosed.
US09177916B1 Amorphous silicon doped with fluorine for selectors of resistive random access memory cells
Provided are resistive switching memory cells having selectors and methods of fabricating such cells. A selector may be disposed between an electrode and resistive switching layer. The selector is configured to undergo an electrical breakdown when a voltage applied to the selector exceeds a selected threshold. The selector is formed from amorphous silicon doped with fluorine. The concentration of fluorine may be between about 0.01% atomic and 3% atomic, such as about 1% atomic. Amorphous silicon has a larger band gap than, for example, crystalline silicon and, therefore, has a lower leakage. Dangling bond and weak bond states appearing in the mid-gap position of amorphous silicon are eliminated by adding fluorine. Fluorine binds to and passivates defects. In some embodiments, a fluorine reservoir is positioned in a low current density region of the memory cell to counter diffusion of fluorine from the selector into other components.
US09177912B2 Semiconductor device having a fuse element
A portion-to-be-melted of a fuse is surrounded by plates, so that heat to be generated in a meltdown portion of the fuse under current supply can be confined or accumulated in the vicinity of the meltdown portion of the fuse. This makes it possible to facilitate meltdown of the fuse. The meltdown portion of the fuse in a folded form, rather than in a single here a fuse composed of a straight-line form, is more successful in readily concentrating the heat generated in the fuse under current supply into the meltdown portion, and in further facilitating the meltdown of the fuse.
US09177911B2 Package substrates with multiple dice
This disclosure relates generally to package substrates with multiple embedded dice wherein each of the embedded dice can be connected directly to a bus of the package substrate without being routed through another die. The package substrate may be configured as a bumpless build up layer (BBUL) substrate.
US09177910B2 Interconnect structures for integrated circuits and their formation
An embodiment of an interconnect structure for an integrated circuit may include a first conductor coupled to circuitry, a second conductor, a dielectric between the first and second conductors, and a conductive underpass under and coupled to the first and second conductors and passing under the dielectric or a conductive overpass over and coupled to the first and second conductors and passing over the dielectric. The second conductor would be floating but for its coupling to the conductive underpass or the conductive overpass. In other embodiments, another dielectric might be included that would electrically isolate the second conductor but for its coupling to the conductive underpass or the conductive overpass.
US09177909B2 Semiconductor capacitor
A semiconductor capacitor is includes a substrate, a plurality of odd layers formed on the substrate, and a plurality of even layers formed on the substrate. Each odd layer includes a plurality of first odd fingers and a first odd terminal electrically connected thereto, and a plurality of second odd fingers and a second odd terminal electrically connected thereto. Each even layer includes a plurality of first even fingers and a first even terminal electrically connected thereto, and a plurality of second even fingers and a second even terminal electrically connected thereto. The semiconductor capacitor further includes at least a first odd connecting structure electrically connecting the first odd terminals, at least a second odd connecting structure electrically connecting the second odd terminals, at least a first even connecting structure electrically connecting the first even terminals, and at least a second even connecting structure electrically connecting the second even terminals.
US09177905B2 Chip package having sensing element and method for forming the same
A chip package for a sensing element. The chip package includes a substrate having a first surface and a second surface, and a sensing layer having a sensing region disposed on the first surface of the substrate. A conducting pad structure is disposed on the substrate and electrically connected to the sensing region, and a spacer layer is disposed on the first surface of the substrate. A semiconductor substrate is place on the spacer layer. The semiconductor substrate, the spacer layer, and the substrate together surround a cavity on the sensing region. A through-hole extends from a surface of the semiconductor substrate toward the substrate, and connects to the cavity.
US09177903B2 Enhanced flip-chip die architecture
A method of assembling a multi-chip electronic device into a thin electronic package entails inverting a flip-chip die arrangement over a hollow substrate, stacking additional dies on the hollow substrate to form a multi-chip electronic device, and encapsulating the multi-chip electronic device. Containment of the encapsulant can be achieved by joining split substrate portions, or by reinforcing a hollow unitary substrate, using a removable adhesive film. Use of the removable adhesive film facilitates surrounding the multi-chip electronic device with the encapsulant. The adhesive film can also prevent encapsulant from creeping around the substrate to an underside of the substrate that supports solder ball pads for subsequent attachment to a ball grid array (BGA) or a land grid array (LGA).
US09177893B2 Semiconductor component with a front side and a back side metallization layer and manufacturing method thereof
In various embodiments, a semiconductor component may include a semiconductor layer having a front side and a back side; at least one electronic element formed at least partially in the semiconductor layer; at least one via formed in the semiconductor layer and leading from the front side to the back side of the semiconductor layer; a front side metallization layer disposed over the front side of the semiconductor layer and electrically connecting the at least one electronic element to the at least one via; a cap disposed over the front side of the semiconductor layer and mechanically coupled to the semiconductor layer, the cap being configured as a front side carrier of the semiconductor component; a back side metallization layer disposed over the back side of the semiconductor layer and electrically connected to the at least one via.
US09177891B2 Semiconductor device including contact pads
A semiconductor device includes a plurality of bit lines that intersect an active region on a substrate and extend in a first direction, a contact pad formed on the active region between adjacent bit lines, and a plurality of spacers disposed on sidewalls of the plurality of bit lines. An upper portion of the contact pad is interposed between adjacent spacers, and a lower portion of the contact pad has a width greater than a distance between adjacent spacers.
US09177890B2 Monolithic three dimensional integration of semiconductor integrated circuits
A three-dimensional integrated circuit comprising top tier nanowire transistors formed on a bottom tier of CMOS transistors, with inter-tier vias, intra-tier vias, and metal layers to connect together the various CMOS transistors and nanowire transistors. The top tier first begins as lightly doped regions on a first wafer, with an oxide layer formed over the regions. Hydrogen ion implantation forms a cleavage interface. The first wafer is flipped and oxide bonded to a second wafer having CMOS devices, and the cleavage interface is thermally activated so that a portion of the lightly doped regions remains bonded to the bottom tier. Nanowire transistors are formed in the top tier layer. The sources and drains for the top tier nanowire transistors are formed by in-situ doping during epitaxial growth. After oxide bonding, the remaining process steps are performed at low temperatures so as not to damage the metal interconnects.
US09177886B2 Semiconductor package including chip support and method of fabricating the same
A semiconductor package includes a circuit board comprising a first surface and a second surface opposite the first surface. A first semiconductor chip is stacked on the first surface and a second semiconductor chip stacked on the first semiconductor chip. A region of the second chip protrudes beyond a side of the first semiconductor chip. A support underpins the protruding region of the second chip. The support may be, for example, dry film solder resist dam.
US09177885B2 Chip mounting
A device comprising a chip including a substrate defining one or more electronic devices and a printed circuit board electrically connected to the chip via one or more solder elements sandwiched between the chip and the printed circuit board, and the solder elements, said buffer layers having a Young's Modulus of 2.5GPa or less.
US09177884B2 Two-sided-access extended wafer-level ball grid array (eWLB) package, assembly and method
A two-sided-access (TSA) eWLB is provided that makes it possible to easily access electrical contact pads disposed on both the front and rear faces of the die(s) of the eWLB package. When fabricating the IC die wafer, metal stamps are formed in the IC die wafer in contact with the rear faces of the IC dies. When the IC dies are subsequently reconstituted in an artificial wafer, portions of the metal stamps are exposed through the mold of the artificial wafer. When the artificial wafer is sawed to singulate the TSA eWLB packages and the packages are mounted on PCBs, any electrical contact pad that is disposed on the rear face of the IC die can be accessed via the respective metal stamp of the IC die.
US09177881B2 High-frequency semiconductor package and high-frequency semiconductor device
Certain embodiments provide a high-frequency semiconductor package including: a base which is made of metal and is a grounding portion; a multi-layer wiring resin substrate; a first internal conductor film; and a lid. The multi-layer wiring resin substrate is provided on a top surface of the base, and has a frame shape in which a first cavity from which the top surface of the base is exposed is formed. The first internal conductor film covers surfaces which form a top surface of the multi-layer wiring resin substrate and an inner wall surface of the first cavity, and is electrically connected with the base. The lid is attached onto the multi-layer wiring resin substrate, and seals and covers the first cavity.
US09177880B2 Housing for a semiconductor chip and semiconductor chip with a housing
A housing for a semiconductor chip has an injection molded body, in which an accommodating area for accommodating the semiconductor chip is provided. The injection-molded body has at least one metallization for making electrical contact with the semiconductor chip.
US09177877B2 Temperature-adjusted spectrometer
A temperature-adjusted spectrometer can include a light source and a temperature sensor.
US09177875B2 Advanced process control method for controlling width of spacer and dummy sidewall in semiconductor device
An advanced process control (APC) method for controlling a width of a spacer in a semiconductor device includes: providing a semiconductor substrate; providing a target width of a gate; forming the gate on the semiconductor substrate, in which the gate has a measured width; depositing a dielectric layer covering the gate, in which the dielectric layer has a measured thickness; providing a target width of the spacer; determining a trim time of the dielectric layer based on the target width of the gate, the measured width of the gate, the target width of the spacer, and the measured thickness of the dielectric layer; and performing a trimming process on the dielectric layer for the determined trim time to form the spacer.
US09177870B2 Enhanced gate replacement process for high-K metal gate technology
The present disclosure provides a method of fabricating a semiconductor device. A high-k dielectric layer is formed over a substrate. A first capping layer is formed over a portion of the high-k dielectric layer. A second capping layer is formed over the first capping layer and the high-k dielectric layer. A dummy gate electrode layer is formed over the second capping layer. The dummy gate electrode layer, the second capping layer, the first capping layer, and the high-k dielectric layer are patterned to form an NMOS gate and a PMOS gate. The NMOS gate includes the first capping layer, and the PMOS gate is free of the first capping layer. The dummy gate electrode layer of the PMOS gate is removed, thereby exposing the second capping layer of the PMOS gate. The second capping layer of the PMOS gate is transformed into a third capping layer.
US09177869B2 Semiconductor device and method of manufacturing the same
The present disclosure relates to a semiconductor device and a method of manufacturing the same. The semiconductor device may include a first metal gate electrode provided in a NMOS region of a substrate; and a second metal gate electrode provided in a PMOS region of the substrate, wherein the first and second metal gate electrodes may be formed of TiN material or TiAlN material. Here, the first metal gate electrode may have a higher titanium (Ti) content than the second metal gate electrode, and the second metal gate electrode may have a higher nitrogen (N) content than the first metal gate electrode.
US09177862B2 Semiconductor stack structure and fabrication method thereof
A fabrication method of a semiconductor stack structure mainly includes: singulating a wafer of a first specification into a plurality of chips; rearranging the chips into a second specification of a wafer so as to stack the chips on a substrate of the second specification through a plurality of blocks; forming a redistribution layer on the chips; and performing a cutting process to obtain a plurality of semiconductor stack structures. Therefore, the present invention allows a wafer of a new specification to be processed by using conventional equipment without the need of new factory buildings or equipment. As such, chip packages can be timely supplied to meet the replacement speed of electronic products.
US09177860B2 Method for processing at least one crystalline silicon-wafer with a thermal budget or a solar-cell wafer with a thermal budget by a laser beam
In different embodiments, a method is provided for processing at least one crystalline Silicon-wafer or a Solar-cell wafer. The method may include: a movement of the wafer with respect to a laser producing a laser beam; and therefore the formation of a laser channel in the wafer by means of a laser beam, wherein a thermal budget applied on the wafer by means of the laser beam is reduced in the peripheral region of the wafer, wherein the peripheral region includes a wafer edge, through which the laser beam exits the wafer after formation of the laser channel.
US09177858B1 Methods for fabricating integrated circuits including barrier layers for interconnect structures
Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming a barrier layer overlying a metal line of a metallization layer above a semiconductor substrate using an atomic layer deposition (ALD) process and a physical vapor deposition (PVD) process. A liner-forming material is deposited overlying the barrier layer to form a liner. A conductive metal is deposited overlying the liner.
US09177856B2 Semiconductor device and method for manufacturing same
A MOSFET includes: a substrate; a gate insulating film; a gate electrode; an interlayer insulating film formed on the gate insulating film to surround the gate electrode; a buffer film containing Ti and N and containing no Al; and a source electrode containing Ti, Al, and Si. In the MOSFET, a contact hole is formed away from the gate electrode so as to extend through the interlayer insulating film and expose a main surface of the substrate. The buffer film is formed in contact with a side wall surface of the contact hole. The source electrode is formed on and in contact with the buffer film and the main surface of the substrate exposed by forming the contact hole.
US09177855B2 Semiconductor device and method for manufacturing the same
By using a conductive layer including Cu as a long lead wiring, increase in wiring resistance is suppressed. Further, the conductive layer including Cu is provided in such a manner that it does not overlap with the oxide semiconductor layer in which a channel region of a TFT is formed, and is surrounded by insulating layers including silicon nitride, whereby diffusion of Cu can be prevented; thus, a highly reliable semiconductor device can be manufactured. Specifically, a display device which is one embodiment of a semiconductor device can have high display quality and operate stably even when the size or definition thereof is increased.
US09177852B2 Integrated circuits separated by through-wafer trench isolation
An isolated semiconductor circuit comprising: a first sub-circuit and a second sub-circuit; a backend that includes an electrically isolating connector between the first and second sub-circuits; a lateral isolating trench between the semiconductor portions of the first and second sub-circuits, wherein the lateral isolating trench extends along the width of the semiconductor portions of the first and second sub-circuits, wherein one end of the isolating trench is adjacent the backend, and wherein the isolating trench is filled with an electrically isolating material.
US09177851B2 Semiconductor device and method for forming the same
A semiconductor device and a method for forming the same can block a moving path of electrons between neighbor buried gates. A semiconductor device includes a device isolation film formed to define an active region over a semiconductor substrate. The semiconductor device also includes a plurality of buried gates formed over the active region, and a barrier film formed between neighboring buried gates from the plurality of buried gates.
US09177843B2 Preventing contamination in integrated circuit manufacturing lines
A semiconductor manufacturing line includes an inert environment selected from the group consisting essentially of an inert airtight wafer holder, an inert wafer transport channel, an inert production tool, an inert clean room, and combinations thereof.
US09177842B2 Degassing apparatus adapted to process substrates in multiple tiers with second actuator
Substrate transport systems, apparatus, and methods are described. In one aspect, the systems are disclosed having vertically stacked transfer chamber bodies. In one embodiment, a common robot apparatus services process chambers or load lock chambers coupled to upper and lower transfer chamber bodies. In another embodiment, separate robot apparatus service the process chambers and/or load lock chambers coupled to upper and lower transfer chamber bodies, and an elevator apparatus transfers the substrates between the various elevations. Degassing apparatus are described, as are numerous other aspects.
US09177841B2 Coating slit apparatus for coating a substrate and method for coating using the same
An exemplary embodiment of the present invention discloses a coating apparatus including a stage configured to receive a substrate and a coating slit part. The coating slit part includes a guide member, a first body, a second body, and a discharge nozzle. The coating slit part is configured to dispose a coating material on the substrate.
US09177840B2 System and method for controlling a thermal array
A thermal array system is provided. The thermal array system having each thermal element connected between a first power node and a second power node of the plurality of power nodes and each thermal element being connected in electrical series with an addressable switch configured to activate and deactivate the thermal element.
US09177838B2 Liquid process apparatus and liquid process method
A top plate 32 is provided to be moved in a horizontal direction between an advanced position, in which the top plate 32 covers from above a substrate W held by a substrate holding unit 21, and a retracted position that is retracted from the advanced position. An air hood 70 configured to supply a purified gas downward is provided to be lifted between a lower position, in which the air hood covers from above the substrate W held by the substrate holding unit 21, and an upper position located above the lower position.
US09177836B1 Packaged integrated circuit device having bent leads
A method for assembling a quad flat no-lead (QFN) device includes mounting and electrically connecting a die to a pre-plated lead frame (PPF) to form a sub-assembly, where the plating is solder-wettable and the lead frame has notches in the lead fingers located along the device boundary. The sub-assembly is then encapsulated to (1) leave the distal ends of the lead fingers exposed and (2) have the edge of the encapsulant adjacent to the notches. The sub-assembly is then singulated to leave distal lead segments protruding from the resulting device. The protruding exposed segments are then bent to be substantially parallel to the device sidewalls. Consequently, the plated surface of each lead extends along portions of both the bottom and one side of the device.
US09177834B2 Power bar design for lead frame-based packages
A semiconductor device includes a semiconductor die encapsulated in a package casing and having four main side walls each oriented generally parallel with one of first or second orthogonal directions. Signal leads are electrically coupled to the die and each has an exposed portion that extends from one of the main side walls parallel with one of the first or second directions. One or more power bars are electrically coupled to the die and each has at least one power bar lead extending at a non-zero angle with respect to the first and second directions. The power bars and associated power bar leads are electrically isolated from the signal leads. One or more tie bars extends at a generally non-zero angle with respect to the first and second directions and is electrically isolated from the signal leads and the power bars and associated power bar leads.
US09177823B2 Plasma etching method and plasma etching apparatus
A plasma etching method includes etching an amorphous carbon film by a plasma of an oxygen-containing gas using, as a mask, an SiON film having a predetermined pattern formed on a target object, etching a silicon oxide film by a plasma of a processing gas using the amorphous carbon film as a mask while removing the SiON film remaining on the etched amorphous carbon film by the plasma of the processing gas. The plasma etching method further includes modifying the amorphous carbon film by a plasma of a sulfur-containing gas or a hydrogen-containing gas while applying a negative DC voltage to an upper electrode containing silicon after the SiON film is removed from the amorphous carbon film, and etching the silicon oxide film again by the plasma of the processing gas using the modified amorphous carbon film as a mask.
US09177822B2 Selective etching bath methods
An etching method. The method includes etching a first plurality of silicon wafers in a first enchant, each silicon wafer having SiO2 and Si3N4 deposited thereon, where the etching includes dissolving a quantity of the SiO2 and a quantity of the Si3N4 in the first etchant. A quantity of insoluble SiO2 precipitates. A ratio of a first etch rate of Si3N4 to a first etch rate of SiO2 is determined to be less than a predetermined threshold. A portion of the first etchant is combined with a second etchant to form a conditioned etchant. A second plurality of silicon wafers is etched in the conditioned etchant. A ratio of a second etch rate of Si3N4 to a second etch rate of SiO2 in the conditioned etchant is greater than the threshold. A method for exchanging an etching bath solution and a method for forming a selective etchant are also disclosed.
US09177819B2 Method for manufacturing silicon substrate having textured structure
The present invention provides a method for manufacturing a silicon substrate having texture structure, by which, in comparison with conventional methods, it is possible to reduce manufacturing step and form easily regular texture structure on silicon substrate surface. The method of the present invention comprises the steps of: (A) forming a pattern on the silicon substrate using a resin-comprising composition; (B) irradiating an etching gas to the silicon substrate surface other than the pattern portion; and (C) processing the silicon substrate irradiated with the etching gas with an alkaline etching fluid to form concave structure under the pattern portion. Furthermore, the present invention provides a resin-comprising composition usable in the method, in particular, a composition comprising photo-curable resin.
US09177809B2 Nonvolatile semiconductor memory device and method of manufacturing the same
According to one embodiment, a nonvolatile semiconductor memory device includes a stacked layer structure including first to n-th semiconductor layers (n is a natural number equal to or larger than 2) stacked in a first direction which is perpendicular to a surface of a semiconductor substrate, and an upper insulating layer stacked on the n-th semiconductor layer, the stacked layer structure extending in a second direction which is parallel to the surface of the semiconductor substrate, and first to n-th NAND strings provided on surfaces of the first to n-th semiconductor layers in a third direction which is perpendicular to the first and second directions respectively.
US09177807B2 Manufacturing method of semiconductor device
Even when a semiconductor device having field effect transistors driven by relatively different power supply voltages provided over a semiconductor substrate is manufactured by the gate-last process, the breakdown voltage of the transistor on the higher voltage side can be ensured.When forming, over the substrate by the gate-last process, a MOSFET of a core region driven by a first power supply voltage and a MOSFET of a high-voltage region driven by a second power supply voltage higher than the first power supply voltage, the thickness of the hard mask film formed over a dummy gate film of the high-voltage region is made thicker than that of the hard mask film formed over a dummy gate film of the core region, prior to a process of patterning a dummy gate of the MOSFET of the core region and the MOSFET of the high-voltage region. Thereby, the breakdown voltage of MOSFET of the high-voltage region can be ensured.
US09177806B2 System and method for mitigating oxide growth in a gate dielectric
Oxide growth of a gate dielectric layer that occurs between processes used in the fabrication of a gate dielectric structure can be reduced. The reduction in oxide growth can be achieved by maintaining the gate dielectric layer in an ambient effective to mitigate oxide growth of the gate dielectric layer between at least two sequential process steps used in the fabrication the gate dielectric structure. Maintaining the gate dielectric layer in an ambient effective to mitigate oxide growth also improves the uniformity of nitrogen implanted in the gate dielectric.
US09177805B2 Integrated circuits with metal-insulator-semiconductor (MIS) contact structures and methods for fabricating same
Integrated circuits having metal-insulator-semiconductor (MIS) contact structures and methods for fabricating integrated circuits having metal-insulator-semiconductor (MIS) contact structures are provided. In an embodiment, a method for fabricating an integrated circuit includes providing a fin structure formed from semiconductor material overlying a semiconductor substrate. The method includes depositing a layer of high-k dielectric material over the fin structure. Further, the method includes forming a metal layer or layers over the layer of high-k dielectric material to provide the fin structure with a metal-insulator-semiconductor (MIS) contact structure.
US09177803B2 HK/MG process flows for P-type semiconductor devices
The present disclosure provides semiconductor device structures with a first PMOS active region and a second PMOS active region provided within a semiconductor substrate. A silicon germanium channel layer is only formed over the second PMOS active region. Gate electrodes are formed over the first and second PMOS active regions, wherein the gate electrode over the second PMOS active region is formed over the silicon germanium channel.
US09177801B2 FinFET device having a strained region
A method of fabricating a semiconductor device includes providing a substrate having a fin disposed thereon. A gate structure is formed on the fin. The gate structure interfaces at least two sides of the fin. A stress film is formed on the substrate including on the fin. The substrate including the stress film is annealed. The annealing provides a tensile strain in a channel region of the fin. For example, a compressive strain in the stress film may be transferred to form a tensile stress in the channel region of the fin.
US09177800B2 Method for manufacturing semiconductor device and semiconductor device
A method for manufacturing a semiconductor device includes, forming, on a substrate, an element isolation insulating film which includes a protruding portion protruding above a level of a surface of the substrate, forming a first film on the substrate and on the element isolation insulating film, polishing the first film to expose the protruding portion, forming a first resist pattern which straddles the first film and the protruding portion after polishing the first film, patterning the first film using the first resist pattern as a mask to form a first pattern, and forming a sidewall film at side surfaces of the first pattern.
US09177797B2 Lithography using high selectivity spacers for pitch reduction
A method embodiment for patterning a semiconductor device includes patterning a dummy layer over a hard mask to form one or more dummy lines. A sidewall aligned spacer is conformably formed over the one or more dummy lines and the hard mask. A first reverse material layer is formed over the sidewall aligned spacer. A first photoresist is formed and patterned over the first reverse material layer. The first reverse material layer using the first photoresist as a mask, wherein the sidewall aligned spacer is not etched. The one or more dummy lines are removed, and the hard mask is patterned using the sidewall aligned spacer and the first reverse material layer as a mask. A material used for forming the sidewall aligned spacer has a higher selectivity than a material used for forming the first reverse material layer.
US09177793B2 Methods of fabricating a semiconductor device
A method of fabricating a semiconductor device includes forming an etch-target layer on a substrate having an alignment key, forming a transparent first pattern on the etch-target layer to face the alignment key, forming an opaque second pattern on the etch-target layer to be adjacent to the first pattern, and etching the etch-target layer using the first pattern and the second pattern as an etch mask.
US09177783B2 Substituted silacyclopropane precursors and their use for the deposition of silicon-containing films
Provided are silacyclopropane-based compounds and methods of making the same. Also provided are methods of using said compounds in film deposition processes to deposit films comprising silicon. Certain methods comprise exposing a substrate surface to a silacyclopropane-based precursor and a co-reagent in various combinations.
US09177782B2 Methods and apparatus for cleaning a substrate
A substrate cleaning apparatus may include a substrate support member to support a substrate having a first side and a contaminated second side; a liquid carbon dioxide source; a gaseous carbon dioxide source; and one or more nozzles coupled to the liquid carbon dioxide source and to the gaseous carbon dioxide source, wherein the one or more nozzles are configured to receive liquid carbon dioxide and to discharge a first mixture of solid and gaseous carbon dioxide from the liquid carbon dioxide source to the second side of the substrate and to receive gaseous carbon dioxide and to discharge a second mixture of solid and gaseous carbon dioxide from the gaseous carbon dioxide source to the second side of the substrate. Methods of cleaning a substrate may be performed in the substrate cleaning apparatus.
US09177779B1 Low profile electrodeless lamps with an externally-grounded probe
An electrode-less plasma lamps, comprising generally of a bulb containing a gas-fill that is excited to produce light using radio-frequency (RF) energy. In specific embodiments, the use of grounded coupling-elements with integrated bulb assemblies simplifies manufacturability, improves resonant frequency control, and enables the use of solid, partially filled, and hollow lamp bodies. In an example, the lamp is configured with an rf feed that is substantially normal to a direction of the bulb and associated support member.
US09177778B2 Low pressure lamp using non-mercury materials
A mercury-free low-pressure lamp having a bulb is provided. The bulb includes an emissive material and one or more phosphors. The emissive material includes at least one of an alkali metal or an alkaline earth metal, wherein when the bulb is in a non-operational state, the emissive material condenses into a liquid or solid, and when the bulb is in an operational state the emissive material forms an emitter, the emitter in combination with one or more gases generate photons when excited by an electrical discharge. The one or more phosphors are configured to convert at least a portion of the photons to other visible wavelengths.
US09177777B2 Orthogonal acceleration system for time-of-flight mass spectrometer
An orthogonal pulse accelerator for a Time-of-Flight mass analyzer includes an electrically-conductive first plate extending in a first plane, and a second plate spaced from the first plate. The second plate includes a grid that defines a plurality of apertures each having a first dimension extending in a first direction and a second dimension orthogonal to the first dimension, the first and second dimensions lying in the second plane and the second dimension begin larger than the first dimension. The first and second plates are positioned in the Time-of-Flight mass analyzer to receive, during operation of the mass analyzer, an ion beam propagating in the first direction in a region between the first and second plates, and the orthogonal pulse accelerator directs ions in the ion beam through the apertures.
US09177776B2 Mass to charge ratio selective ejection from ion guide having supplemental RF voltage applied thereto
An ion guide is disclosed wherein an axial DC voltage barrier is created at the exit of the ion guide. A primary RF voltage is applied to the electrodes in order to confine ions radially within the ion guide. A supplemental RF voltage is also applied to the electrodes. The supplemental RF voltage has a greater axial repeat length than that of the primary RF voltage. The amplitude of the supplemental RF voltage is increased with time causing ions to become unstable and gain sufficient axial kinetic energy such that the ions overcome the axial DC voltage barrier. Ions emerge axially from the ion guide in mass to charge ratio order.
US09177774B2 Continuous flow mobility classifier interface with mass spectrometer
A continuous flow mobility classifier provide the ability to perform two-dimensional separation in mass spectrometry. An ionization system is used to ionize a sample. A differential mobility analyzer (DMA) (e.g., a nano-radial DMA) is coupled to the ionization system and to a mass spectrometer. The nano-RDMA is configured to separate the ionized sample by mobility for subsequent mass analysis by the mass spectrometer.
US09177771B2 Method and apparatus for improved sensitivity in a mass spectrometer
A method and apparatus is provided including an ion source for generating ions, a vacuum chamber having an inlet aperture for receiving ions and an exit aperture for passing ions from the vacuum chamber. At least one ion guide is provided between the inlet and exit apertures, the at least one ion guide having an entrance end and an exit end. The at least one ion guide having an inner cylinder and an outer cylinder. The inner cylinder having a plurality of sections, each section having a different number of slots and the inner cylinder coaxially disposed within the outer cylinder wherein the inner cylinder is configured to generate more than one multipole field. A power supply is provided for providing an RF voltage between the outer and inner cylinders.
US09177764B1 Image intensifier having an ion barrier with conductive material and method for making the same
An image intensifier tube includes a collimator having multiple channels for receiving electrons from a photocathode layer, and a microchannel plate (MCP) having multiple channels for receiving electrons from the collimator. An ion barrier film (IBF) is disposed on top of an input side of the MCP, in which the IBF includes a small amount of conductive material. The IBF may include alumina doped with chromium oxide, or manganese oxide, or any other conductive material. The small amount of conductive material includes 1% to 5% of conductive material in a layer of non-conductive material.
US09177763B2 Method and apparatus for measuring pressure in a physical vapor deposition chamber
A method and apparatus for physical vapor deposition are provided herein. In some embodiments, an apparatus for measuring pressure of a substrate processing chamber may include a shield having an annular one-piece body having an inner volume, a top opening and a bottom opening, wherein a bottom of the annular one-piece body includes an inner upwardly extending u-shaped portion, a gas injection adapter disposed about an outer wall of the shield, a pressure measuring conduit formed within the gas injection adapter, wherein the pressure measuring conduit is fluidly coupled the inner volume via a gap formed between an outer wall of the shield and substrate processing chamber components disposed proximate the shield, and wherein the gap has substantially the same pressure as the inner volume, and a pressure detector coupled to the pressure measuring conduit.
US09177760B2 TEM sample preparation
An improved method of preparing ultra-thin TEM samples that combines backside thinning with an additional cleaning step to remove surface defects on the FIB-facing substrate surface. This additional step results in the creation of a cleaned, uniform “hardmask” that controls the ultimate results of the sample thinning, and allows for reliable and robust preparation of samples having thicknesses down to the 10 nm range.
US09177756B2 E-beam enhanced decoupled source for semiconductor processing
A semiconductor substrate processing system includes a processing chamber and a substrate support defined to support a substrate in the processing chamber. The system also includes a plasma chamber defined separate from the processing chamber. The plasma chamber is defined to generate a plasma. The system also includes a plurality of fluid transmission pathways fluidly connecting the plasma chamber to the processing chamber. The plurality of fluid transmission pathways are defined to supply reactive constituents of the plasma from the plasma chamber to the processing chamber. The system further includes an electrode disposed within the processing chamber separate from the substrate support. The system also includes a power supply electrically connected to the electrode. The power supply is defined to supply electrical power to the electrode so as to liberate electrons from the electrode into the processing chamber.
US09177754B2 X-ray tube cooling by emissive heat transfer
An x-ray tube includes an evacuated envelope, and a cathode assembly and an anode assembly both disposed in the evacuated envelope. The cathode assembly includes a cathode shield, a supporting body disposed inside the cathode shield, and an electron source attached to the supporting body and partially enclosed by the cathode shield. The anode assembly includes a target configured to produce x-rays upon impingement by electrons produced by the electron source. The cathode shield comprises a shield base material and a layer over at least a portion of the base material. The layer comprises an emissivity enhancer having an emissivity greater than the emissivity of the shield base material. The layer may comprise an emissive coating applied on the portion of the base material. Alternatively, the layer may comprise a greened surface formed by a greening process.
US09177748B2 Pulsed depressed collector
A high power RF device has an electron beam cavity, a modulator, and a circuit for feed-forward energy recovery from a multi-stage depressed collector to the modulator. The electron beam cavity include a cathode, an anode, and the multi-stage depressed collector, and the modulator is configured to provide pulses to the cathode. Voltages of the electrode stages of the multi-stage depressed collector are allowed to float as determined by fixed impedances seen by the electrode stages. The energy recovery circuit includes a storage capacitor that dynamically biases potentials of the electrode stages of the multi-stage depressed collector and provides recovered energy from the electrode stages of the multi-stage depressed collector to the modulator. The circuit may also include a step-down transformer, where the electrode stages of the multi-stage depressed collector are electrically connected to separate taps on the step-down transformer.
US09177745B2 Organic/inorganic composite comprising three-dimensional carbon nanotube networks, method for preparing the organic/inorganic composite and electronic device using the organic/inorganic composite
An organic/inorganic composite is provided. The organic/inorganic composite comprises a silicon (Si) substrate formed with nanorods or nanoholes and three-dimensional networks of carbon nanotubes (CNTs) grown horizontally in parallel and suspended between the adjacent nanorods or inside the nanoholes. In the organic/inorganic composite, metal catalysts can be uniformly formed on the nanorods or inside the nanoholes, irrespective of the height of the nanorods or the depth of the nanoholes and the shape and aspect ratio of the nanorods or nanoholes. In addition, the carbon nanotubes grow in a three-dimensional network structure directly over the entire surface of the nanorods or the whole inner surface of the nanoholes and are directly connected to the base electrodes. With this configuration, the three-dimensional carbon nanotube networks are highly dense per unit volume, and the organic/inorganic composite is highly electrically conductive and has a large surface area. Therefore, the use of the organic/inorganic composite enables the fabrication of an electronic device with greatly improved efficiency. Further provided are a method for preparing the organic/inorganic composite and an electronic device fabricated using the organic/inorganic composite.
US09177736B2 Switch cover limiting manual switch activation
A protective covering device for a circuit breaker having a breaker housing and breaker handle extending from a front surface of the breaker housing and having an ON and OFF position includes: a cover adapted to be mounted to the front surface of the circuit breaker; and an opening provided in the cover adapted to allow actuation of the breaker handle when the breaker handle is in the OFF position. The cover encloses the breaker handle when mounted.
US09177735B2 Safety switch with dual anti-tamper
A safety interlock switch with coded interlocking to provide tamper resistance, the coded interlocking having two differently coded technologies 8,10; 16,18. In a preferred embodiment one technology is mechanical in the form of a coded-cam system operated by a coded-tongue 8, the other is electronic comprising a non-contact coded RFID sensor 16,18, and wherein the switch is only enabled when the two different codes have been correctly applied.
US09177732B2 Flexible cable assembly with improved manufacturability
A remote switching system for electrical switches in a cabinet provides simplified manufacture by attaching the flexible cable sheath and flexible cable to an actuator frame and slider, respectively, by means of flange elements attached to each of the sheath and cable that fit within corresponding receiving slots in the actuator frame and contained slider. A cover, which may be attached without fasteners, may then hold these flange elements within corresponding slots.
US09177731B2 Flexible cable assembly for high-power switch gear
A remote switching system for electronic switches in a cabinet provides an actuator assembly communicating through a flexible cable with a door handle. The actuator assembly on the electronic switch provides a rotatably captive threaded fastener holding the sheath of the flexible cable to the actuator assembly allow ring a simple single-point tuning of the actuator operation. This tuning may be facilitated by a visual scale showing relative positions between the actuator assembly and an internal slider communicating with the operator of the electronic switch.
US09177725B2 Multilayer ceramic electronic component having internal electrode with non-electrode regions and method of manufacturing the same
There is provided a multilayer ceramic electronic component, including a ceramic body, and an internal electrode formed in the ceramic body and having a plurality of non-electrode regions formed therein, wherein in a cross section formed in length and thickness directions of the ceramic body, when a thickness of the internal electrode is Te, an area of the internal electrode is Ae, and an area of the plurality of non-electrode regions is Ao, 0.1 μm≦Te≦0.55 μm and 3.2%≦Ao:Ae≦4.5% are satisfied.
US09177724B2 Multilayer ceramic electronic component and a method for manufacturing the same
In a method of manufacturing a multilayer ceramic electronic component, polishing is performed so that intersection lines extending from external surfaces of a green element body and interfaces between a green chip to be formed into a laminate portion and ceramic side surface layers are each located within a curved-surface formation range of a chamfer portion. Accordingly, since a green ceramic material is extended so as to fill the interfaces like so-called “putty”, and the adhesive strength between the green chip to be formed into the laminate portion and each of the ceramic side surface layers is increased.
US09177722B2 Multilayer ceramic electronic component and board for mounting the same
There are provided a multilayer ceramic electronic component and a board for mounting the same. The multilayer ceramic electronic component includes: a hexahedral ceramic body including dielectric layers and satisfying T/W>1.0 when a width thereof is defined as W and a thickness thereof is defined as T; first and second internal electrodes stacked to face one another, with the dielectric layer interposed therebetween, within the ceramic body; and insulating layers formed on both lateral surfaces of the ceramic body and having a thickness less than that of the ceramic body, wherein when the sum of the width of the ceramic body and widths of the insulating layers is defined as Wb, 0.90≦W/Wb≦0.97 is satisfied.
US09177717B2 Coil techniques
Techniques are disclosed involving coils that may be used to exchange wireless energy between devices. For instance, a device may include a coil having a plurality of turns arranged along an arc. Further, the coil may have first and second ends that are substantially normal to the arc. The coil may be arranged within a casing of the device. This casing may have first and second non-parallel surfaces. In embodiments, the first end of the coil may be directed to (be substantially parallel with and proximate to) the first surface, while the second end of the coil may be directed to the substantially parallel with and proximate to) the second surface. The coil may be employed in wireless power transfer and/or near field communication applications.
US09177716B2 Method for detecting metal foreign object in contactless power supply system, contactless power supply device, power reception device, and contactless power supply system
A contactless power supply system includes a power supply areas, each provided with a primary coil and a primary authentication coil. The primary coil and primary authentication coil are arranged at different locations. An electric appliance includes a power reception area provided with a secondary coil and a secondary authentication coil. The secondary coil and the secondary verification coil are arranged at different locations. The presence of a metal foreign object is detected between the primary coil and secondary coil based on a transmission oscillation signal generated by the primary coil, and the presence of a metal foreign object is detected between the primary authentication coil and secondary authentication coil based on an authentication oscillation signal generated by the primary authentication coil.
US09177715B2 System and method for inductive wireless signaling
A transformer includes first and second semiconductor substrates. The first semiconductor substrate includes a first circuit, a first coil providing a first impedance, and a first capacitor coupled in parallel with the first coil. The second semiconductor substrate includes a second circuit, a second coil providing a second impedance and inductively coupled with the first coil, and a second capacitor coupled in parallel with the second coil.
US09177712B2 Transformer
A transformer includes a first planar coil having two input ends, with a distance being between the two input ends; and a second planar coil, having two output ends. The two input ends correspond to two points on relative positions of the second planar coil, and a coil path distance of the two points on the second planar coil is equal to the distance.
US09177708B2 Annular cooling fluid passage for magnets
A magnet having an annular coolant fluid passage is generally described. Various examples provide a magnet including a first magnet and a second magnet disposed around an ion beam coupler with an aperture there through. Each of the first and second magnets including a metal core having a cavity therein, one or more conductive wire wraps disposed around the metal core, and an annular core element configured to be inserted into the cavity, wherein an annular coolant fluid passage is formed between the cavity and the annular core element. Furthermore, each annular core element may have a first diameter and a middle section having a second diameter, the second diameter being less than the first diameter. Other embodiments are disclosed and claimed.
US09177701B2 Chip resistor and method for making the same
A chip resistor includes first and second electrodes spaced apart from each other, a resistor element arranged on the first and the second electrodes, a bonding layer provided between the resistor element and the two electrodes, and a plating layer electrically connected to the resistor element. The first electrode includes a flat outer side surface, and the resistor element includes a side surface facing in the direction in which the thirst and the second electrodes are spaced. The outer side surface of the first electrode is flush with the side surface of the resistor element. The plating layer covers at least a part of the outer side surface of the first electrode in a manner such that the covering portion of the plating layer extends from one vertical edge of the outer side surface to the other vertical edge.
US09177694B2 Wire harness
A wire harness includes a wire harness main body having at least one electric wire and a protective member formed by formed by hot pressing a non-woven member in a state where the non-woven member covers at least a portion of the wire harness main body. The protective member includes a first compressed portion extending along a longitudinal direction of the wire harness main body and being hot pressed to a first degree of compression, and a second compressed portion extending along the longitudinal direction of the wire harness main body, projecting further than the first compressed portion, and being hot pressed to a second degree of compression lower than the first degree of compression.
US09177690B2 Insulating film-coated metal foil
An insulating film-coated metal foil having on one or both surfaces thereof an organic-inorganic hybrid layer containing dimethylsiloxane and a metalloxane comprising a metal other than Si. Relative to the concentration [Si]1/4t of the Si at a depth of ¼t from the surface of the organic-inorganic hybrid layer in the thickness direction of the hybrid layer, the concentration [Si]3/4t of the Si at a depth of ¾t from the surface of the organic-inorganic hybrid layer in the thickness direction of the hybrid layer satisfies [Si]1/4t<[Si]3/4t, and ([Si]3/4t−[Si]1/4t)/[Si]3/4t is 0.02-0.23. Provided is a metal foil that can be used in solar cell substrates, flexible circuit substrates, etc., that exhibits surface flatness, pliability, insulating properties and thermal resistance properties, and that has a layer having a surface which is not susceptible to scratching by processes in which substrates are handled, such as conveyance and transshipment.
US09177686B2 Copper alloy having high strength, high electric conductivity and excellent bending workability
The present invention relates to a copper alloy having high strength, high electrical conductivity, and excellent bendability, the copper alloy containing, in terms of mass %, 0.4 to 4.0% of Ni; 0.05 to 1.0% of Si; and, as an element M, one member selected from 0.005 to 0.5% of P, 0.005 to 1.0% of Cr, and 0.005 to 1.0% of Ti, with the remainder being copper and inevitable impurities, in which an atom number ratio M/Si of elements M and Si contained in a precipitate having a size of 50 to 200 nm in a microstructure of the copper alloy is from 0.01 to 10 on average, the atom number ratio being measured by a field emission transmission electron microscope with a magnification of 30,000 and an energy dispersive analyzer.
US09177683B2 Scintillator panel and method for manufacturing scintillator panel
A scintillator panel including: a plate-like substrate; a grid-like barrier rib provided on the substrate; and a scintillator layer composed of a phosphor filled in cells divided by the barrier rib, wherein the barrier rib is formed of a material which is mainly composed of a low-melting-point glass containing 2 to 20% by mass of an alkali metal oxide. The scintillator panel is provided with a narrow barrier rib with high accuracy in a large area, and the scintillator panel has high luminous efficiency, and provides sharp images.
US09177682B2 Dynamic filter for computed tomography (CT)
An imaging system including a source (310) having a focal spot (406) that emits a radiation beam that traverses an examination region, a radiation sensitive detector array (316) having a plurality of pixels that detects radiation traversing the examination region and generates projection data indicative of the detected radiation, and a filter (314), disposed between the source and the examination region, that filters peripheral regions of the emitted radiation, wherein the filter includes two separate and moveable regions (402), each region having a substantially same thickness and constant homogeneity.
US09177681B2 Base for radiographic device
A radiographic device may include a movable carriage disposed in a base and having a tray for holding an image receptor. A platform extending over the base may support the weight of the patient independent of the image receptor. The carriage may permit tray movement in lateral and longitudinal directions, thereby to align a desired portion of the image receptor with the patient target area and x-ray source. A base collimator may have one or more blades that are slidable to cover portions of the image receptor that are not being used in the current image capture process.
US09177680B2 Methods and systems for collimating
A collimator (100) for collimating radiation includes collimator material (150) and at least one collimator hole (110) defined by the surrounding collimator material (150). The collimator hole (110) defines an aperture (112) and a bottom surface (132) through which radiation can leave the collimator (100). The volume of the collimator hole between the aperture (112) and the entrance opening and/or exit opening is shaped such that there is at least one cross-section of the hole between the aperture (112) and the entrance opening and/or exit opening, the cross-section being taken parallel with the aperture, such that the shape of the cross-section of the hole cannot be obtained through an affine transform of the shape of the aperture.
US09177671B2 Memory with bit line capacitive loading
A memory that may allow for the detection of weak data storage cells may include data storage cells, a column multiplexer, a sense amplifier, and a load circuit. The load circuit may include one or more capacitive loads and may be operable to controllably select one or more of the capacitive loads to couple to the input of the sense amplifier.
US09177668B2 Method and apparatus for bit cell repair
A method includes reading data from a subset of a plurality of memory bit cells of a non-volatile memory. The data identifies an address of at least one individual failed bit cell. The method further includes loading the data directly into a register, receiving an address of data to be accessed, determining if the received address is the address of any individual failed bit cell; and accessing the data of the register if the received address is the address of any individual failed bit cell.
US09177667B2 Semiconductor device, display device, and electronic device
To provide a semiconductor device which operates stably with few malfunctions due to noise, with low power consumption, and little variation in characteristics; a display device including the semiconductor device; and an electronic device including the display device. An output terminal is connected to a power supply line, thereby reducing variation in electric potential of the output terminal. In addition, a gate electrode potential which turns ON a transistor is maintained due to the capacitance of the transistor. Further, change in characteristics of the transistor is reduced by a signal line for reverse bias.
US09177665B1 Write and read circuit for anti-fuse non-volatile memory
The present invention relates to a write and read circuit for an anti-fuse non-volatile memory, and especially for an OTP (one-time-program) NOI (Non-overlapped implementation) MOSFET memory device. The NOI MOSFET memory device can be written with a programming bit by using anti-fuse technique through the write circuit of the present invention. To accomplish the bit-programming process, the write circuit applies a high voltage to the Drain terminal of the NOI MOSFET memory device for carrying out a punch through breakdown between the Drain terminal and the Source terminal of the NOI MOSFET memory device, and then the programming bit is written into a side wall adjacent the gate terminal of the NOI MOSFET memory device. Therefore, the programming bit stored in the NOI MOSFET memory device can also be read out by using the read circuit of the present invention.
US09177664B2 Method, memory controller and system for reading data stored in flash memory
An exemplary method for reading data stored in a flash memory. The method comprises: controlling the flash memory to perform a first read operation upon the memory cell with a first threshold voltage to obtain a first binary digit for representing a bit of the N bits data; performing an error correction hard decode according to the first binary digit; controlling the flash memory to perform a second read operation upon the memory cell with a second threshold voltage to obtain a second binary digit for representing the bit of the N bits data, if the error correction hard decode indicates an uncorrectable result; and performing an error correction soft decode according to the first binary digit and the second binary digit.
US09177662B1 Pre-reading method and programming method for 3D NAND flash memory
A pre-reading method and a programming method for a 3D NAND flash memory are provided. The pre-reading method comprises the following steps. A selected string includes a first memory cell, two second memory cells and a plurality of third memory cells. The two second memory cells are adjacent to the first memory cell. The third memory cells are not adjacent to the first memory cell. A first pass voltage is applied on the second memory cells, a second pass voltage is applied on the third memory cells, and a read voltage is applied on the first memory cell via a plurality of word lines for reading a data of the first memory cell. The first pass voltage is larger than the second pass voltage.
US09177659B2 Determining and using soft data in memory devices and systems
The present disclosure includes methods, devices, and systems for determining and using soft data in memory devices and systems. One or more embodiments include an array of memory cells and control circuitry coupled to the array. The control circuitry is configured to perform a number of sense operations on the memory cells using a number of sensing voltages to determine soft data associated with a target state of the memory cells, and adjust a sensing voltage used to determine the target state based, at least partially, on the determined soft data.
US09177658B2 1T1b and 2T2b flash-based, data-oriented EEPROM design
An one-transistor-one-bit (1T1b) Flash-based EEPROM cell is provided along with improved key operation schemes including applying a negative word line voltage and a reduced bit line voltage for perform erase operation, which drastically reduces the high voltage stress on each cell for enhancing the Program/Erase cycles while reducing cell size. An array made by the 1T1b Flash-based EEPROM cells can be operated with Half-page or Full-page divided programming and pre-charging period for each program cycle. Utilizing PGM buffer made of Vdd devices in the cell array further save silicon area. Additionally, a two-transistor-two-bit (2T2b) EEPROM cell derived from the 1T1b cell is disclosed with additional cell size reduction but with the operation of program and erase the same as that for the 1T1b cells with benefits of no process change but much enhanced storage density, superior Program/Erase endurance cycle, and capability for operating in high temperature environment.
US09177654B2 Solid-state memory device with plurality of memory cards
A solid-state memory device includes a physical port, an interface controller connected to the physical port, a serial peripheral interface, and a plurality of memory card sticks connected to the serial peripheral interface. Each memory card stick has a plurality of memory cards. The solid-state memory device further includes a controller core connected between the interface controller and the serial peripheral interface. The controller core is configured to present to a host connected at the physical connector a single non-volatile storage unit with a total capacity substantially equal to a sum of capacities of the plurality of memory card sticks.
US09177650B2 Memory device with multiple cell write for a single input-output in a single write cycle
A non-volatile memory device incorporates a write buffer within a multi-level column decoder to enable multiple memory cells associated with a single write driver to be written in parallel. In this manner, in a non-volatile memory such as a flash memory that performs batch write operation, a group of data bits for a single I/O can be written to the memory cells at a time, thereby reducing the number of write cycles required for writing a block of program data and increasing the speed of write operation.
US09177635B1 Dual rail single-ended read data paths for static random access memories
Single-ended read circuits for SRAM devices are disclosed for high performance sub-micron designs. One embodiment is an SRAM device that includes a memory cell array and a bit line traversing the memory cell array for reading data from memory cells of the memory cell array. A read circuit coupled to the bit line translates data stored in a memory cell from a cell voltage of the memory cells to a peripheral voltage of an output of the SRAM device while bypassing a level shifter in the read data path.
US09177634B1 Two gate pitch FPGA memory cell
A memory cell includes a first inverter and a second inverter, wherein the first inverter and second inverter are cross-coupled using a storage node and an inverse storage node; a data node and an inverse data node, wherein the data node and inverse data node are next to a first side of the memory cell; and an address line controlling access to the storage node and the inverse storage node by the data and inverse data nodes; wherein the memory cell comprises a two gate pitch memory cell.
US09177627B2 Method for improving the stability, write-ability and manufacturability of magneto-resistive random access memory
This invention provides the method to overcome 4 backwards which limit the manufacturability or production yield rate of Magneto-resistive random access memory (MRAM). The key points of this invention are: (1) providing method to improve the manufacturability through reducing bias variation, by using a compensation module to correct the bias point of extreme cells; (2) providing method to improve the manufacturability through removing outlier cells (called bad cells), by using “writing jump-over” and “reading exclusion” to exclude bad-cells; (3) providing method to reduce the bias point, amplitude and asymmetry variation, using shared fixed-magnetic-reference-layer and proper shape anisotropy; (4) providing method to improve the write-ability, using flipping-assistant-field to speed up STT flipping process by large current, and using heating resistance and heating cells by the same current (including global heating, row heating, column heating, or local cell heating, i.e. heating with conventional thermal nature or heating with thermagnonic spin-transfer torque).
US09177626B2 Semiconductor memory device
A semiconductor memory device includes: banks each including a memory cell array; word lines connected to rows of each of the banks; an address latch circuit configured to latch a full address for specifying one of the word lines, the full address including a first address and a second address; and a control circuit configured to ignore a reset operation for the first address as a target of a set operation, and overwrite the first address in accordance with the set operation when receiving a first command for specifying a reset operation for a bank and a set operation for the first address.
US09177607B2 Logging disk recovery operations in a non-volatile solid-state memory cache
An apparatus includes a controller capable of being coupled to a magnetic data storage media and a cache. The cache includes non-volatile, solid-state memory. The controller is configured to detect a defect in the data storage media requiring a recovery operation and allocate a portion of the cache for storage of a journal to be used in the recovery operation. The controller is further configured to log steps of the recovery operation to the journal.
US09177603B2 Method of assembling an enhanced media content narrative
In a method of assembling an enhanced media content narrative, a navigation grid is initially defined by program name, chapter name and sub-chapter names. The grid is populated with program element file names, and the content is associated with the element file names in each chapter/sub-chapter. An automated toolbar is created for the grid matrix and combined with introductory content to provide an enhanced media content narrative for playback by a viewer.
US09177602B2 Clip based trick modes
Multi-frame trick play clips of the stored performance are selected for playing in a trick play mode, portions between the trick play clips, at least as long as the trick play clips, are skipped in the trick play mode. The trick play clips are sufficiently long and presented at a sufficiently low speed so that the content of the trick play clips can be understood by a human audience.
US09177601B1 Multiple cleaning processes in a single tank
Methods of cleaning workpieces are described. One method includes performing both a sonication cleaning operation and a rinse cleaning operation within a single cleaning tank. Another cleaning method described includes the use of cross flow of cleaning liquid within a cleaning tank while performing a rinse clean. The cleaning method includes the oscillation of one or more workpieces in the cleaning tank to perform the rinse clean.
US09177600B2 Systems and methods for atomic film data storage
The present disclosure provides systems and methods associated with data storage using atomic films, such as graphene, boron nitride, or silicene. A platter assembly may include at least one platter that has one or more substantially planar surfaces. One or more layers of a monolayer atomic film, such as graphene, may be positioned on a planar surface. Data may be stored on the atomic film using one or more vacancies, dopants, defects, and/or functionalized groups (presence or lack thereof) to represent one of a plurality of states in a multi-state data representation model, such as a binary, a ternary, or another base N data storage model. A read module may detect the vacancies, dopants, and/or functionalized groups (or a topographical feature resulting therefrom) to read the data stored on the atomic film.
US09177598B2 Device, method of fabricating a media and method of servo writing
A device may be provided. The device includes a media including a servo layer and a data recording layer, and a recording head including a dimension sized to produce a magnetic writing field to write servo information on the servo layer.
US09177590B2 Recording apparatus, recording method, reproducing apparatus, and reproducing method
There is provided a recording apparatus including a light radiating unit that radiates light to an optical recording medium, a recording unit that performs light emission control of the light radiating unit, and performs recording on the optical recording medium, and a control unit that performs control in a manner that, in a state in which a logical address space, a virtual address space obtained by adding at least a spare area to the logical address space, and a physical address space obtained by adding a buffer area to the virtual address space are defined, a process for replacing a recording area of the optical recording medium with the spare area is executed using a virtual address.
US09177587B2 Magnetic recording medium fabrication method and apparatus
A method of fabricating a magnetic recording medium by sequentially forming a magnetic recording layer, a protection layer, and a lubricant layer on a stacked body, includes forming the lubricant by depositing a first lubricant on the stacked body after forming the protection layer, by vapor-phase lubrication deposition, without exposing the stacked body to atmosphere, and depositing a second lubricant on the stacked body after depositing the first lubricant, by vapor-phase lubrication deposition, without exposing the stacked body to atmosphere.
US09177583B2 Hard disk drive and method for controlling flying height of magnetic head thereof
There is disclosed a hard disk drive and a method of controlling a flying height of a magnetic head of the hard disk drive. A method of controlling a flying height of the magnetic head in a hard disk drive according to an embodiment of the present invention may include (a) providing a FOD sensitivity through a FOD test; (b) reading a preamble signal of a servo pattern; (c) calculating a flying height of the magnetic head from the preamble signal; and (d) applying FOD power for adapting the flying height of the magnetic head to a target flying height of the magnetic head based on the calculated flying height of the magnetic head and the FOD sensitivity.
US09177582B1 Magnetic disk apparatus and off-tracking detection method
In a disk apparatus, media include first and second surfaces having first and second servo patterns which are read at different timings by first and second heads. A controller controls the first head based on a first demodulated position obtained by demodulating the first servo pattern and a target position. The controller calculates a first estimated demodulated position from the demodulated position and a first demodulated velocity based on the first servo patterns, calculates a second estimated demodulated position from the first demodulated position and a second demodulated velocity based on the second servo patterns, and stops writing operation of the first head in accordance with one of the first and second estimated demodulated positions exceeding a threshold.
US09177577B2 Multi-purpose near-field transducer having a temperature coefficient of resistance
An apparatus includes a writer, an arrangement comprising a plasmonic near-field transducer (NFT) adjacent the writer and comprising a material having a temperature coefficient of resistance (TCR), and a lead arrangement connected to the NFT arrangement. In some configurations, the NFT arrangement includes a heat sink, and the lead arrangement is connected to the heat sink. In other configurations, the lead arrangement is connected directly to the NFT.
US09177574B2 Magneto-resistance effect device with mixed oxide function layer
According to one embodiment, a magneto-resistance effect device includes: a multilayer structure having a cap layer; a magnetization pinned layer; a magnetization free layer provided between the cap layer and the magnetization pinned layer; a spacer layer provided between the magnetization pinned layer and the magnetization free layer; a function layer which is provided in the magnetization pinned layer, between the magnetization pinned layer and the spacer layer, between the spacer layer and the magnetization free layer, in the magnetization free layer, or between the magnetization free layer and the cap layer, the function layer having oxide containing at least one element selected from Zn, In, Sn and Cd, and at least one element selected from Fe, Co and Ni; and a pair of electrodes for applying a current perpendicularly to a film plane of the multilayer structure.
US09177567B2 Selective voice transmission during telephone calls
Embodiments of the disclosure relate to selective voice transmission and include receiving an identification of one or more authorized speakers for a telephone call and retrieving a voice sample for each of the one or more authorized speakers. Embodiments also include receiving one or more audio signals for the telephone call and filtering the one or more audio signals by removing a portion of the one or more audio signals that do not contain a voice of at least one of the one or more authorized speakers in the one or more audio signals.
US09177566B2 Noise suppression method and apparatus
The present invention relates to a method and apparatus of a digital filter for noise suppression of a signal representing an acoustic recording. The method comprises determining a desired frequency response (H(ω)) of the digital filter; and generating a noise suppression filter based on the desired frequency response. The desired frequency response is determined in a manner so that the desired frequency response does not exceed a maximum level, wherein the maximum level is determined in response to the signal to be filtered.
US09177559B2 Method and apparatus for analyzing animal vocalizations, extracting identification characteristics, and using databases of these characteristics for identifying the species of vocalizing animals
A method for capturing and analyzing audio, in particular vocalizing animals, which uses the resulting analysis parameters to establish a database of identification characteristics for the vocalizations of known species. This database can then be compared against the parameters of unknown species to identify the species producing that vocalization type. The method uses a unique multi-stage method of analysis that includes first-stage analysis followed by segmentation of a vocalization into its structural components, such as Parts, Elements, and Sections. Further analysis of the individual Parts, Elements, Sections and other song structures produces a wide range of parameters which are then used to assign to a collection of identical, known species a diagnostic set of criteria. Subsequently, the vocalizations of unknown species can be similarly analyzed and the resulting parameters can be used to match the unknown data sample to the database of samples from a plurality of known species.
US09177554B2 Time-based sentiment analysis for product and service features
Provided are a method, computer program product and system for reporting time-based sentiment for a product. Text analysis is performed on at least one communication. At least one feature for the product is determined based on the text analysis. A sentiment value is generated for the at least one feature for the product. A date associated with the sentiment value is determined, and the sentiment value is reported for at least one feature over time.
US09177553B1 Identifying underserved command inputs
A language processing system identifies first command input sentences that do not successfully parse by any parsing rule in a set of parsing rules. Each of the parsing rules is associated with an action, and a user device performs the action associated with a parsing rule in response to an input sentence being successfully parsed by the parsing rule. For each of these identified first sentences, the system determines whether the first input sentence has an underserving signal that is indicative of one or more actions being underserved. If the first sentence has the underserving signal, then the first sentence is selected as a candidate input sentence. Each candidate input sentence is provided to an action analysis processes that determines whether a candidate input sentence is to be associated with one action, and upon a positive determination generates a parsing rule for the candidate input sentence.
US09177552B2 Method and apparatus for setting selected recognition parameters to minimize an application cost function
Methods and systems for setting selected automatic speech recognition parameters are described. A data set associated with operation of a speech recognition application is defined and includes: i. recognition states characterizing the semantic progression of a user interaction with the speech recognition application, and ii. recognition outcomes associated with each recognition state. For a selected user interaction with the speech recognition application, an application cost function is defined that characterizes an estimated cost of the user interaction for each recognition outcome. For one or more system performance parameters indirectly related to the user interaction, the parameters are set to values which optimize the cost of the user interaction over the recognition states.
US09177548B2 Method, apparatus, and access network system for speech signal processing
A method and an apparatus for speech signal processing are provided. The method includes: receiving an encoded speech signal sent by a user equipment, where the encoded speech signal includes a first substream, a second substream, and a third substream, and the first substream is attached with a cyclic redundancy check (CRC); performing decoding processing on the first substream, the second substream, and the third substream by adopting a decoding algorithm, where a decoding algorithm that is based on an auxiliary decision of the CRC is adopted to perform decoding processing on the first substream; and sending decoding results of the first substream, the second substream, and the third substream to a base station controller, where the decoding result of the first substream includes a decoded bit stream and a CRC result. Decoding performance of the first substream is improved, and users' higher requirements for the speech quality are met.
US09177544B2 Engine harmonic enhancement control
A system includes a controller for receiving first and second signals representative of a load on an engine, and generating based on the signals. Harmonic scaling elements generate a scaled version of a received engine harmonic signal. Each harmonic scaling element includes a harmonic specific mapping element for mapping the control parameter to a harmonic specific scaling factor. Some of the harmonic specific scaling factor values of the harmonic specific mapping element are mapped to control parameter values associated with a negative load on the engine, and some are mapped to control parameter values associated with a positive load on the engine. The control parameter values associated with the negative load are derived from the first signal, and control parameter values associated with the positive load are derived from the second signal. An adjustable gain element applies the harmonic specific scaling factor to the received engine harmonic signal.
US09177543B2 Asymmetric ultrasound phased-array transducer for dynamic beam steering to ablate tissues in MRI
An asymmetric ultrasound transducer array may include multiple regions or groups of transducer elements. The regions may be configured to generate respective ultrasound beams with different capabilities, such as, e.g., focusing at varying focal depths and lateral steering, and/or focusing into different volumes.
US09177541B2 Instability detection and correction in sinusoidal active noise reduction system
A method for operating an active noise reduction system that is designed to reduce the harmonic or sinusoidal noise emanating from a rotating device, where there is an active noise reduction system input signal that is related to the frequency of the noise to be reduced, and where the active noise reduction system comprises one or more adaptive filters that output a generally sinusoidal noise reduction signal that is used to drive one or more transducers with their outputs directed to reduce the noise. Distortions of the noise reduction signal are detected. A distortion is based at least in part on differences between the frequency of the noise reduction signal and the frequency of the harmonic noise. The noise reduction signal is altered based on the detected distortion.
US09177540B2 System and method for conforming an audio input to a musical key
A system and method for conforming an audio input to a musical key. Audio input is received and the musical key is determined. Sequentially for each consecutive note, a pitch value for each note and an interval between each preceding and subsequent note is determined; alternative subsequent notes based on the musical key and the pitch value of the subsequent note are determined; each interval between each alternative subsequent note and each respective note of the alternative subsequent notes corresponding to the preceding note is scored based on the interval between the preceding note and the subsequent note of the audio input; and a best interval is selected for each alternative subsequent note. A best-match note is selected for each note of the audio input based on the best intervals of all the notes, and each audio input note is conformed to a frequency of the best-match note.
US09177537B2 Percussion attachment
A percussion attachment is provided to be detachably installed on a percussion instrument. The percussion attachment includes a main body part having a struck part to be struck by a player, an extended part extending from a side surface of the main body part to be locked to one of the tension bolts, and a restricting part protruding from the side surface of the main body part near the extended part and supporting the percussion instrument to restrict a displacement of the main body part in a state that the extended part is tightened together with the hoop by one of the tension bolts.
US09177534B2 Data transmission for display partial update
Data transmission for display partial update. An embodiment of an apparatus includes a display controller to transfer pixel data from a frame buffer to a video display and to select a granularity of a plurality of granularities for units of data for the transfer of the pixel data, and a detection element to track updates to the frame buffer, the detection element to identify at least a first damage area of the pixel data that has been changed from a previous image, wherein the display controller is to provide the video display with the identified first damage area of the pixel data in more or more units of data of the chosen granularity.
US09177522B2 Display method and stereoscopic display system thereof
A display method and a stereoscopic display system thereof are provided. The stereoscopic display system comprises an image display unit and an image switching unit. The image switching unit is configured on a display surface of the image display unit. The display method comprises the following steps of: driving the image display unit to display a dragging window; driving the image switching unit when the dragging window is executed on a 3D display mode, so that the dragging window can display a 3D image; determining whether the dragging window is moved; executing a 2D display mode and turning off the image switching unit when the dragging window is moved, so that the dragging window can display a 2D image.
US09177518B2 Liquid crystal display device, driving device for liquid crystal display panel, and liquid crystal display panel
Pixel electrodes in odd-numbered rows and even-numbered rows of a liquid crystal display panel are connected to source lines arranged on the left side of the pixel electrodes and source lines on the right side of the pixel electrodes, respectively. A DA converter switches between whether a potential higher than a common electrode potential is output from an odd-numbered output terminal and a potential lower than the common electrode potential is output from an even-numbered potential output terminal, and whether a potential lower than the common electrode potential is output from the odd-numbered potential output terminal and a potential higher than the common electrode potential is output from the even-numbered potential output terminal. A switch mechanism switches between whether a pixel electrode potential is set using the source line on the left side or is set using the source line on the right side.
US09177512B2 Display device
A display device (100) according to the present invention includes a pixel defined by a plurality of sub pixels. The plurality of sub pixels are a red sub pixel (R) to display red, a green sub pixel (G) to display green, a blue sub pixel (B) to display blue, and a yellow sub pixel (Ye) to display yellow. When an input signal corresponding to green of the sRGB color space is externally input, the display device (100) according to the present invention provides display by use of the green sub pixel (G) and also the yellow sub pixel (Ye). According to the present invention, a multiple primary color display device which suppresses decline of the display quality when an input signal corresponding to green of the sRGB color space is externally input is provided.
US09177509B2 Methods and systems for backlight modulation with scene-cut detection
Elements of the present invention relate to systems and methods for filtering a display source light illumination level with an adaptive filter based on the presence of a scene cut proximate to the current frame.
US09177508B2 Light emitting apparatus
A current driving circuit is connected to an LED terminal LEDi, and generates an intermittent driving current ILEDi that corresponds to a dimming pulse signal PWMi. An error amplifier generates a feedback voltage VFB that corresponds to the difference between a detection voltage VLEDi and a predetermined reference voltage VREF. A pulse modulator generates a pulse signal having a duty ratio that corresponds to the feedback voltage VFB. A fault detection comparator COMP_OPENi generates a fault detection signal OPEN_DET which is asserted when the detection voltage VLEDi is lower than a predetermined threshold voltage VOPEN—DET. A forced turn-off circuit instructs the current driving circuit to suspend the generation of the driving current ILEDi during a predetermined period after a switching power supply starts to operate. The fault detection circuit detects whether or not the fault detection signal OPEN_DETi has been asserted in a predetermined period.
US09177507B2 Intensity compensation method and display control device and image display device applying the same
An intensity compensation method for a display control device includes steps of obtaining a plurality of backlight duties of a plurality of backlights according to an image data; calculating a plurality of compensation gains according to the plurality of backlight duties and a non-uniform backlight profile, wherein the non-uniform backlight profile indicates a plurality of respective actual intensity distributions of the plurality of backlights; and compensating a plurality of first image intensities corresponding to a plurality of pixels of the image data according to the plurality of compensation gains, to obtain a plurality of second image intensities.
US09177502B2 Bi-directional scan driver and display device using the same
A scan driver and a display device including the same are provided. The scan driver according to an exemplary embodiment of the present invention generates and transmits at least two different types of scan signals to a display unit including a plurality of pixels, and includes a plurality of sequence drivers each including a plurality of shift registers for generating the different scan signals. In one of the sequence drivers, the scan signal generated in one of the shift registers is transmitted as the input signal of a next one of the shift registers, and the scan signal is concurrently transmitted as an input signal to another one of the shift registers of another one of the sequence drivers of a previous stage or a next stage adjacent to the one of the sequence drivers including the one of the shift registers according to the driving direction of the scan driver.
US09177500B2 Display with secure decryption of image signals
A display securely decrypts an encrypted image signal. Pixels are disposed between the display substrate and cover in a display area, and provide light to a user in response to a drive signal. Control chiplets disposed between the display substrate and cover in the display area are each connected to one or more of the plurality of pixels. Each receives a respective control signal and produce respective drive signal(s) for the connected pixel(s). A decryption chiplet is disposed between the display substrate and cover. It includes means for receiving the encrypted image signal and a decryptor for decrypting the encrypted image signal to produce a respective control signal for each of the control chiplets.
US09177498B2 Display panel
A display panel includes a gate driving circuit and a control circuit. The gate driving circuit includes a plurality of circuit stages. An Nth-circuit stage of the circuit stages includes a start unit, a drive unit, a first pull-down unit, a second pull-down unit, and a current detecting unit. The drive unit is configured to provide a dock signal to an Nth-output terminal. The first pull-down unit is configured to make an enable node have a first pull-down voltage. The second pull-down unit is configured to provide a disable node with a second pull-down voltage. The current detecting unit is configured to detect an error current passing through the first pull-down unit and output an error signal according to the error current. The control circuit is configured to adjust the second pull-down voltage according to the error signal of the Nth-circuit stage.
US09177495B2 Electro-optical device and electronic apparatus
In one unit period of a display period, each pair of two scanning lines is selected and a gray scale potential corresponding to an image signal of pixels of one scanning line of each pair of scanning lines is supplied to each signal line. In another unit period, the other scanning line of each pair of scanning lines is selected and a gray scale potential corresponding to an image signal of the pixels of the other scanning line is supplied to each signal line.
US09177492B2 Flexible LED display screens
Light emitting diode (LED) display modules, display screens comprising a plurality of display modules and methods of forming display screens are disclosed. Each display module 10 forming a display screen comprises a flexible substrate 11 supporting a plurality of LEDs 14. A set of connectors 16, 50, 52, 54 comprising male connectors and female connectors are coupled to the flexible substrate for connecting the display module to a respective set of connectors 16, 50, 52, 54 of an adjacent display module along at least one first edge 18 of the display module such that horizontal and vertical alignment of the display modules and the LED pitch size is maintained during flexing of the display screen.
US09177491B2 Sealing device
A sealing device including a housing and a closure member having a first end and a second end, at least one of the first and second ends being removably attached to the housing, the housing having means for checking the integrity of the closure member and a first transponder for transmitting information on the status of the sealing device where, the sealing device further includes a second transponder, preferably a passive transponder, associated with at least one of the first and second ends (16, 20) of the closure member, the second transponder comprising a second identity, and a transponder reader associated with the first transponder, preferably an active transponder, the transponder reader being arranged for reading the second identity of the second transponder; the first transponder being configured for receiving the second identity from the transponder reader and for transmitting the second identity.
US09177489B2 Digital rights convergence place chaser
The present invention is an apparatus and method for the money transactions required in the selling of merchandise or media content on the Internet or other public or private network. File transport and access are based on a consumer advantaged legal definition for ownership. The end-user is given ownership and allowed to provide data input to generate keys. End-user controlled keys are generated on the premise that the sender or ultimate distributor of the original file need not maintain control over the keys once ownership has passed. Ownership is tracked and maintained with license metadata and credentials from multiple types of digital rights management systems to allow content protected transmission and storage. Non-audible or invisible code signal sequence(s) may provide traceability and absolute anonymity for the purchaser. This apparatus can be used to conduct transactions off the web so that business can be done on the web.
US09177486B2 Shifter force detection
A shifter simulator for driver training includes a shaft with a handle affixed to a first end of the shaft and a distal second end of the shaft being interfaced to a shifter mechanism. A first force sensing device is interfaced to the shaft, outputting a value representative of an amount of force applied to the handle in a forward/rearward direction and a second force sensing device is interfaced to the shaft outputting a value representative of an amount of force applied to the handle in a lateral direction.
US09177485B2 Method and system for automatically generating questions for a programming language
The present invention provides a method, system and computer program product for generating a family of questions for a programming language. Generating the family of questions includes the generation of various questions from a particular compilable code, and the corresponding options for the questions. The options include various correct and incorrect options for the questions.
US09177482B1 Rotorcraft collision avoidance system
A method of operating a rotorcraft collision avoidance system is provided. The method includes determining a unique characteristic of a detected rotorcraft, determining the actual length of a first rotor based at least in part on the determined unique characteristic of the rotorcraft, locating a major axis of the first rotor of the rotorcraft from a perspective of a home unit, from the perspective of the home unit, determining an angular extent of the major axis of the first rotor, and determining the then current distance from the home unit to the rotorcraft based at least in part on the determined actual length of the first rotor and the corresponding angular extent.
US09177481B2 Semantics based safe landing area detection for an unmanned vehicle
A method for determining a suitable landing area for an aircraft includes receiving signals indicative of Light Detection And Ranging (LIDAR) information for a terrain via a LIDAR perception system; receiving signals indicative of image information for the terrain via a camera perception system; evaluating, with the processor, the LIDAR information and generating information indicative of a LIDAR landing zone candidate region; co-registering in a coordinate system, with the processor, the LIDAR landing zone candidate region and the image information; segmenting, with the processor, the co-registered image and the LIDAR landing zone candidate region to generate segmented regions; classifying, with the processor, the segmented regions into semantic classes; determining, with the processor, contextual information in the semantic classes; and ranking and prioritizing the contextual information.
US09177479B2 System and method for determining aircraft operational parameters and enhancing aircraft operation
A method for identifying variations in aircraft operational parameters includes processing a four-dimensional (4D) aircraft trajectory for a flight along a defined route. The method also includes determining an aircraft intent corresponding to the flight along the defined route based at least in part on an aircraft performance model from a trajectory predictor. The aircraft intent includes multiple segments and corresponding intent parameters. In addition, the method includes adjusting the intent parameters such that a computed 4D trajectory substantially corresponds to the 4D aircraft trajectory. The method further includes determining a computed operational parameter based at least in part on the computed 4D trajectory and the aircraft performance model from the trajectory predictor. In addition, the method includes identifying variations between the computed operational parameter and a corresponding measured operational parameter.
US09177478B2 Vehicle contact avoidance system
A vehicle contact avoidance system includes a detection system, a warning system, and a controller. The detection system is configured to detect a remote obstacle in proximity to a host vehicle equipped with the vehicle contact avoidance system, including information related to at least one of a speed, a direction and a distance of the remote obstacle relative to the host vehicle. The warning system is configured to emit a warning sound to notify a driver of the host vehicle of imminent contact between the host vehicle and the remote obstacle. The controller is programmed to determine whether contact between the host vehicle and the remote obstacle is imminent based of the information supplied to the controller by the detection system, and programmed to cause the warning system to emit the warning sound. The warning sound includes a non-speech portion and a speech portion.
US09177477B2 Collision warning system using driver intention estimator
A collision warning system for a subject vehicle is disclosed. The collision warning system uses data relating to the subject vehicle and a target vehicle in an algorithm to estimate the intention of the driver of the subject vehicle. The system uses historic data to improve the algorithm to obtain more accurate estimates.
US09177475B2 Driver behavior based parking availability prediction system and method
An in-vehicle parking system and method for displaying and analyzing parking information. The system displays information of available parking in the vicinity of a driver's destination. The system can provide personalized information, predictions and advisories to a particular driver because the system can learn the behavior of particular drivers over time.
US09177472B2 Method and apparatus for providing and using public transportation information
Disclosed herein is a method and apparatus for providing traffic information of public transportation means, such as a bus, and utilizing the provided information. A method of encoding public traffic information according to the present invention creates an identifier of bus information system, an ID of bus route, and information on all of bus stops pertaining to the bus route. The created information is organized to status information that is in turn incorporated into a transfer message. A sequence of transfer messages, each being constructed as described above, is wirelessly transmitted.
US09177471B2 Navigation system
A system provides a description of a road segment using location reference points. The system may receive traffic information about a road segment along a road. The system may determine two sets of location reference points based on the traffic information. The system may generate a description of the road segment based on the two determined sets of location reference points.
US09177470B2 Method for warning a driver of a vehicle about exceeding of a speed limit, and vehicle
A method warns a driver of a vehicle about exceeding of a speed limit. First of all, it is determined whether a speed limit is present and what the driving speed of the vehicle is. If the driving speed of the vehicle is greater than the driving speed which is permissible according to the speed limit, a warning signal of a first type is emitted. Subsequently, the reaction of the driver to the warning signal of the first type is determined. A warning signal of a second type is emitted in a time-delayed manner, or the emitting of the warning signal of the second type is suppressed, depending on the reaction of the driver to the warning signal of the first type. A vehicle carries out a method of this type.
US09177469B2 Method and apparatus for counting the bidirectional passage of vehicles in a wireless vehicular sensor network
Method and apparatus receiving reports from at least two wireless vehicular sensor nodes and stepping through a process of comparing filtered queues to determine the first and the second waveform in time, leading to counting the vehicles passing the magnetic sensors of the wireless vehicular sensor nodes.
US09177466B2 Advanced battery early warning and monitoring system
Systems, apparatuses and methods for detecting internal cell faults using online and real-time sensing techniques, and providing an accurate and reliable early warning for the incoming failure of battery cells hours or days prior to failure. A system is configured to perform real-time and direct measurement of battery cell parameters of temperature, voltage, and AC impedance through online sensing. These parameters may be simultaneously processed using advanced probabilistic and/or fuzzy logic-based algorithms to provide an early warning for the incoming failure of battery cells in a battery pack. This technology may safeguard the LIB battery packs while allowing them to operate at or near 100% capacity in both transportation and stationary applications.
US09177465B2 Bed status system for a patient support apparatus
A bed status system includes a patient support apparatus having a status, a location unit configured to provide a location to the patient support apparatus, and a bed status module coupled to the location unit and the patient support apparatus to receive the status and the location.
US09177462B1 Risk profiling using portal based scanners
A system and method for consolidating data collected using a hierarchical scanning system and assessing security risks regarding the shipping containers is provided. The hierarchical scanning system collects information from distributed and repeated screening throughout a container journey and enables pattern analysis over groups of containers. During the journey of a container, risk profiles are created at short term events based on information collected via non-intrusive rapid inspections. Using combined information from the risk profiles, the initial manifest, and group based statistical intelligence, a risk quotient for each container is determined based on deviations calculated at each point of the journey. Accordingly, authorities are alerted when the risk quotient indicates that a specific container is at risk.
US09177459B2 ECG-enabled personal emergency response systems
The invention provides personal emergency response systems (PERS) with expanded life-saving capabilities. One embodiment of the invention provides a wearable PERS pendant that incorporates a cell phone transmitter or transceiver, a GPS location system, an accelerometer-based fall detector that automatically triggers an alert, and an electrocardiogram (ECG) recorder permitting a remote service center or medical personnel to receive and respond to transmitted alerts and electrocardiographic data.
US09177457B2 Electronic device for providing content according to user's posture and content providing method thereof
A content providing method in an electronic device includes reproducing an image of content; obtaining information regarding a posture of a user based on an image of the user; determining whether the posture of the user is acceptable based on the obtained information regarding the posture of the user; and controlling reproduction of the content according to a result of the determination.
US09177456B2 Analyte monitoring system and methods
Methods and systems for providing data communication in medical systems are disclosed.
US09177455B2 Personal safety system, method, and apparatus
A personal safety system, method, and apparatus provides image, audio, and data capture and transport system (IADCTS) features wherein an electronic device placed on a user can capture data associated with a potential perpetrator of a crime against the user. The electronic device sends the captured data (such as images or audio) to a secure and remote storage location. The capturing and sending of the data cannot be reversed or canceled by the user or potential perpetrator. The potential perpetrator is notified that the potential perpetrator's data has been captured by the electronic device, thereby discouraging the potential perpetrator from further proceeding with the crime.
US09177449B1 Banking system controlled responsive to data bearing records
An apparatus that operates to cause financial transfers responsive to data read from data bearing records, includes at least one processor that is in operative connection with a card reader, a check acceptor, a cash dispenser and a display. The at least one processor causes the machine to operate to read card data from a user card, and to cause a determination to be made that the read card data corresponds to an authorized financial account. The at least one processor is operative to cause data to be read from a check and/or cash to be dispensed, and a financial transfer to or from the account corresponding to the value thereof. A secure chest portion of the machine is accessible responsive to servicer input through an input device of the machine.
US09177448B2 Gaming system and method providing a slot game including a symbol generator modification event
Various embodiments of the present disclosure are directed to a gaming system and method providing a slot game including a symbol generator modification event. In various embodiments, the gaming system is configured to provide a slot game, each play of which employs a subset of a plurality of symbol generators. If a symbol generator modification event occurs in association with a first play that employs a first subset of the symbol generators, the gaming system removes one of the symbol generators from the first subset and adds another one of the plurality of symbol generators to the first subset to form a second subset, and employs the second subset for a second play. The gaming system removes and adds the symbol generators to form the second subset such that the average expected payback percentage of the second play is greater than the average expected payback percentage of the first play.
US09177438B2 Service controller for servicing wagering game machines
Methods and apparatus for servicing wagering game machines are described herein. In one embodiment, the method includes receiving, over a wagering game network, service information originating from a wagering game machine, wherein the wagering game machine is configured to receive a wager associated with a wagering game. The method can also include, based on the service information and a service plan associated with the wagering game machine, determining a service action. The method can also include performing the service action.
US09177431B1 Coin processing machine
A coin processing machine includes a coin support plate having a coin support surface defining a coin path extending from an intake location to a coin removal station. Recesses formed in the coin path resist stopping of coins along the coin path. The coin support plate forms part of a normally open control circuit that closes in response to a coin jam along the coin path. A controller in the control circuit responds to the circuit closing by stopping the flow of coins along the coin path.
US09177429B2 Method and apparatus for assigning profile data to one or more vehicle sub-systems of a vehicle
This disclosure relates to a method, performed in an apparatus 300 for profile control, for switching profile data in one or more vehicle sub-systems 401, 402 of a vehicle 406. Each vehicle sub-system 401, 402 comprises a vehicle sub-system data storage 403, 404. The method comprises: detecting a presence of an occupant in the vehicle 406, identifying the occupant in the vehicle 406, retrieving from a profile data storage 405 the profile data corresponding to the identified occupant, assigning the retrieved profile data to one or more vehicle sub-systems 401, 402; and sending the retrieved profile data for storage in the vehicle sub-system data storage 403, 404 of the assigned one or more vehicle sub-systems 401, 402.
US09177425B2 Vehicle data analysis apparatus, vehicle data analysis method, and defect diagnosis apparatus
A vehicle data analysis apparatus analyzes vehicle data that indicates chronological change of a vehicle state. The vehicle data analysis apparatus is provided with a computing unit and a recognition unit. The computing unit is configured to make obvious data fluctuation accompanying the development, in the vehicle data, of mechanical or control-related fault in a vehicle control system. The recognition unit is configured to recognize the vehicle data to be considered during vehicle fault diagnosis on the basis of a result of computation by the computing unit.
US09177421B2 Hair meshes
Aspects include provision of a hair mesh structure that can be used for modeling, animating, simulating, and/or rendering hair and hair-like objects in the field of computer graphics. The hair mesh structure can use an ordered plurality of surface primitives, which can be represented by correspondence data, and mapping(s) of points on corresponding surface primitives. A plurality of paths can be generated based on the mappings. These paths can be used to generate hair-like geometry elements. Therefore, hair can be modeled, edited, and animated by editing surface primitives. This approach provides control of the hair shape and permits hair modeling using surface modeling processes, without direct editing of curves defining hairs themselves.
US09177410B2 System and method for creating avatars or animated sequences using human body features extracted from a still image
A user may create an avatar and/or animated sequence illustrating a particular object or living being performing a certain activity, using images of portions of the object or living being extracted from a still image or set of still images of the object or living being. A mathematical model used to represent the avatar may be animated according to user-selected motion information and may be modified according to various parameters including explicit end-user adjustments and information representative of a human emotion, mood, or feeling that may be derived from an image of the user or information from a news source or social network.
US09177408B2 Modifying an animation having a constraint
A computer-implemented method for handling a modification of an animation having a constraint includes detecting a user modification of an animation that involves at least first and second objects, the first object constrained to the second object during a constrained period and non-constrained to the second object during a non-constrained period. The method includes, based on the user modification, selecting one of at least first and second compensation adjustments for the animation based on a compensation policy; and adjusting the animation according to the selected compensation adjustment.
US09177404B2 Systems and methods of merging multiple maps for computer vision based tracking
Method, apparatus, and computer program product for merging multiple maps for computer vision based tracking are disclosed. In one embodiment, a method of merging multiple maps for computer vision based tracking comprises receiving a plurality of maps of a scene in a venue from at least one mobile device, identifying multiple keyframes of the plurality of maps of the scene, and merging the multiple keyframes to generate a global map of the scene.
US09177401B2 System and method for creating custom composite images from layered images in a client-server environment
In response to receiving a request from a client device, a first image can be determined based at least in part on an image identification in the request. The first image may be associated with a plurality of layers. A subset of the plurality of layers can be determined. Information configured to enable a selection of at least one layer in the subset may be sent to the client device. In response to receiving a request from a client device, a composite image can be obtained based at least in part on a selection of at least one layer of a plurality of layers of an image received in the request. The composite image may be dynamically generated or retrieved from a storage device. The composite image and/or information associated with the composite image can be sent to the client device.
US09177400B2 Program, medium, and device for determining vascular disease
Disclosed is a non-invasive technique for determining with high precision vascular disease, in particular arteriosclerosis, vascular stenosis, and aneurisms. This technique is achieved by a program that determines vascular disease in a subject by comparing normal distribution graphs obtained from a subject to normal distribution graphs obtained from a normal individual, which are based on reflective echo waveforms obtained by sending ultrasonic waves to the subject's pulsating blood vessels, detecting correlation or difference between the normal distribution graphs, and, if a difference in the normal distribution graphs is detected, implementing on the computer a step for determining that the subject has a vascular disease.
US09177399B2 Method and system for plotting a distribution of data
In one aspect, a method for displaying measurement information from at least one sensor of a machine is provided. In another aspect, a computing device for displaying measurement information from at least one sensor of a machine is provided. In another aspect, a system for displaying measurement information from at least one sensor of a machine is provided.
US09177393B2 Mixed mode for frame buffer compression
Certain aspects relate to systems and techniques for compressing image data using mixed mode compression schemes. A mixed mode compression scheme can reduce the amount of data stored in a frame buffer to reduce power costs of an image display system. In some implementations, mixed mode compression can be suitable for compression of pixel blocks having one or two color channels exhibiting a relatively low variation in pixel intensity with the remaining channel or channels exhibiting a relatively high variation. The pixel values in each color channel of an RGB or YCoCg image can be analyzed to determine how many channels are a smooth component and how many channels are a variant component, and mixed mode compression can be selected and implemented based on the color channel analysis to adaptively and individually compress the color channels.
US09177389B2 Motion vector generation apparatus and motion vector generation method
In a motion vector generation apparatus 1 according to the present invention, when motion vectors are sequentially generated for a plurality of images, a target point is determined at a sub-pixel level in any of the plurality of images, a corresponding point corresponding to the target point is searched at the sub-pixel level in another image different from this image, and a motion vector is calculated on the basis of the target point and the corresponding point. Then, the corresponding point is defined as a new target point, and the aforementioned process is repeated to sequentially generate the motion vectors. Thus, the motion vector generation apparatus 1 of the present invention can compute consecutive motion vectors by performing correspondence search at the sub-pixel level in the plurality of images.
US09177378B2 Updating landmarks to improve coregistration as regions of interest are corrected
The coregistration of digital images of tissue slices is improved by updating landmarks based on the manual outlining of regions of interest on the images. A first image of a first slice is coarsely coregistered with a second image of a second slice using a first landmark on the first image and a second landmark on the second image. A user manually outlines a first region of interest on the first image. The outline is positioned over a second region of interest on the second image using the second landmark. The user manually moves a contour point of the outline on the second image to form a corrected outline. The second landmark is moved based on how the contour point was manually moved so that the first and second images are more finely coregistered after the second landmark is moved. Each state of corrected contour points and landmarks is saved.
US09177372B2 Defect estimation device and method and inspection system and method
Acquired mask data of a defect portion is sent to a simulated repair circuit 300 to be simulated. The simulation of the acquired mask data 204 is returned to the mask inspection results 205 and thereafter sent to a wafer transfer simulator 400 along with a reference image at the corresponding portion. A wafer transfer image estimated by the wafer transfer simulator 400 is sent to a comparing circuit 301. When it is determined that there is a defect in the comparing circuit 301, the coordinates and the wafer transfer image which is a basis for the defect determination are stored as transfer image inspection results 206. The mask inspection results 205 and the transfer image inspection result 206 are then sent to the review device 500.
US09177370B2 Systems and methods of advanced site-based nanotopography for wafer surface metrology
Systems and methods for providing micro defect inspection capabilities for optical systems are disclosed. Each given wafer image is filtered, treated and normalized prior to performing surface feature detection and quantification. A partitioning scheme is utilized to partition the wafer image into a plurality of measurement sites and metric values are calculated for each of the plurality of measurement sites. Furthermore, transformation steps may also be utilized to extract additional process relevant metric values for analysis purposes.
US09177369B2 Image deformation apparatus and method of controlling operation of same
A target image is deformed in such a manner that a subject in a reference image and a subject in the target image will coincide. A reference image and a target image are each divided into regions that conform to amounts of optical distortion. A region which is in the target image and which is common to the reference image and to the target image is subdivided into regions S35 to S37, S38 to S40, S42 to S44 in each of which amounts of optical distortion of both the reference image and target image are obtained. By using the amounts of optical distortion of the reference image and amounts of optical distortion of the target image 11 obtained from the subdivided regions S35 to S37, S38 to S40, S42 to S44, the target image is deformed in such a manner that a subject in the common region will coincide with the reference image.
US09177367B2 Image processing apparatus and image processing method
An image processing apparatus for processing image data formed by a set of pixel data includes a real space filter processing unit and a color space filter processing unit, wherein the real space filter processing unit calculates a real space weighting coefficient and performs weighted average of pixel data according to filter processing of an edge preservation type; pixel data of at least a target pixel of pixel data used in the color space filter processing unit is pixel data calculated by the real space filter processing unit; and of the pixel data which the color space filter processing unit uses for the weighted average, the pixel data of the target pixel is pixel data calculated by the real space filter processing unit, and the pixel data of a peripheral pixel is pixel data forming the image data before being input to the real space filter processing unit.
US09177365B2 Method and apparatus for detecting and removing false contour, method and apparatus for verifying whether pixel in included in contour, and method and apparatus for calculating simplicity
A method and an apparatus for detecting and removing a false contour, a method and an apparatus for verifying whether a pixel is included in a contour, and a method and an apparatus for calculating simplicity are provided. The method for detecting and removing the false contour includes: verifying whether a pixel of an input video is included in a contour; calculating simplicity of the pixel; determining whether the pixel is included in a false contour based on the simplicity and based on whether the pixel is included in the contour; and removing the false contour from the input video via smoothing with respect to the false contour.
US09177363B1 Method and image processing apparatus for image visibility restoration
A method and image processing apparatus for image visibility restoration are provided. The method includes the following steps: receiving an input hazy image including input pixels; obtaining edge information of each of the input pixels according to a median filtering operation and a dark channel; determining a transmission map according to each of the input pixels and atmospheric light associated with the input hazy image in each color channel; obtaining a refined transmission map according to the edge information and the transmission map; adjusting the refined transmission map by performing a gamma correction operation thereon to obtain an enhanced transmission map; determining a color difference value corresponding to each of the color channels; recovering scene radiance for each of the input pixels in each of the color channels according to the corresponding color difference value, the enhanced transmission map, and the atmospheric light to produce and output a de-hazed image.
US09177358B2 Information processing apparatus, information processing method, and program therefor
An information processing apparatus is provided that includes an obtaining section and a selecting section. The obtaining section obtains information of first and second images that each have an overlapped region where the first image and the second image are overlapped and constitute a taken image including an image part of a subject by being connected with each other with the overlapped region as a reference. The selecting section determines pixels other than the image part of the subject based on information of a plurality of pixels that belong to the overlapped region of the first image where the first image is overlapped with the second image, the information of the plurality of pixels being included in the obtained information of the first image, and selects, out of the determined pixels, a connection pixel corresponding to a position where the first image and the second image are connected in the overlapped region.
US09177353B2 Secure rendering of display surfaces
A protected graphics module can send its output to a display engine securely. Secure communications with the display can provide a level of confidentiality of content generated by protected graphics modules against software and hardware attacks.
US09177352B2 Selective multithreading for sporadic processor workloads
Systems and methods for processing user-interface animations are disclosed. The method may include processing a first frame of a user-interface animation with a first processing core, monitoring a processing time of the first frame of the user-interface animation relative to a first synchronization pulse, and processing, if the elapsed processing time exceeds a threshold, a first portion of the user-interface animation with the first processing core and a second portion of the user-interface animation with a second processing core. Processing of a next frame of the user-interface animation may be initiated with the first processing core while the second processing core is processing the second portion of the user-interface animation.
US09177341B2 Determining search relevance from user feedback
Disclosed are various embodiments for using relevance indications provided by a user in performing a search. Search results corresponding to a search query are provided to a user of a client computing device. The user provides a relevance indication corresponding to relevance of at least one of the search results. A subsequent search is performed which takes the relevance indication into account.
US09177339B2 System and method for color preparation and management
In one embodiment there is provided a method for preparing a hair dye mixture. The method includes a scale and control system in communication with each other. The control system provides for a memory and a display, wherein the memory contains a formula that defines instructions for blending a hair dye mixture. The method displays the instructions on the display. The stylist may then view the display of instructions and add colorant(s) and dye blending material(s) to a receptacle on the scale, in accordance with the instructions, using current product packaging, such that specialized packaging requirements are not required.
US09177338B2 Software, systems, and methods for processing digital bearer instruments
Methods and apparatus are described which enable flexible and secure processing of digital bearer instruments. An architecture is provided that enables provision of an extensible applications framework that flexibly supports a variety of features and functionality supporting title-based rights processing operations. A wide range of methods of defining and assuring rights processing operating environments extend the capabilities of rights processing operating environments in a variety of ways.
US09177334B2 Ad extensions on content network
A method of providing an ad extension includes selecting an advertisement for display. The method also includes selecting additional information related to the advertisement. The method also includes transmitting data representing the advertisement to a browser. The browser interacts with an expandable API to render an inline frame having an advertisement slot. The browser renders and displays the advertisement in the frame. The method also includes transmitting display data representing the additional information related to the advertisement to the browser. The browser receives an input to activate the ad extension. In response to the input, the browser interacts with the expandable API system to expand and render the frame. The browser renders, in the frame, the advertisement slot containing the advertisement. The browser also renders, in the frame, the additional information. The browser displays the expanded inline frame, such that the displayed frame covers a portion of the content.
US09177331B2 Financial transaction processing with digital artifacts and a default payment method using a server
A method and system for conducting an online payment transaction through a point of sale device. The method includes receiving input from a user selecting an item for purchase through the point of sale device; calculating a total purchase amount for the item in response to a request from the user to purchase the item; and sending payment authorization for the total purchase amount from the point of sale device to a payment entity, in which the payment authorization is sent to the payment entity via a mobile communication device of the user. The method further includes receiving a result of the payment authorization from the payment entity through the mobile communication device; and completing the payment transaction based on the result of the payment authorization.
US09177328B2 Peer-to-peer network chatting
A peer in a peer-to-peer network joins an advertisement room having an associated identifier. A joining peer identifies a peer closest to the advertisement room. In various embodiments, the peer that is closest to the advertising room is the peer having a discreet hash table ID closest to the advertisement room identifier. The joining peer requests from the closest peer information about peers that the closest peer knows to be part of the advertisement room. The closest peer provides the joining peer with connection information for those peers, and the joining peer establishes connections with the peers. Peers in the advertisement room provide advertisements for chat rooms. To join a chat room, a peer determines which of its peers in the advertisement room is the closest peer to the chat room, based on the chat room identifier, and informs that peer that it is now part of the chat room.
US09177326B2 Method and system for determining overall content values for content elements in a web network and for optimizing internet traffic flow through the web network
A method for optimizing traffic flow through a web network including collecting data corresponding to the content elements, determining a revenue value for each content element, calculating an overall content value for each content element based on the corresponding revenue value and revenue generated from subsequent flow of a user during a visit to the network, and modifying the network based on the overall content value and the content data, so as to maximize the value of the network. Also disclosed is a system for determining overall content values for a plurality of content elements including an analytic server for receiving content data corresponding to the content elements, and a processor determining a revenue value for each element and calculating an overall content value for each content element based on the corresponding revenue value and revenue generated from subsequent traffic flow of a user during a visit to the network.
US09177309B2 Electronic settlement method, system, server and program thereof
A secure electronic settlement by an easy operation is enabled even with any terminal device and any network in any country. Balance information of a user, predetermined voice information that can identify a user, an arbitrary keyword, and a voiceprint are stored in advance in a database of a server in association with a telephone number of the user, and when a remitter user carries out remittance to a recipient user, the server sends out voice guidance including predetermined voice information registered in the database corresponding to the telephone number of a recipient terminal sent from the recipient terminal requesting the remittance or a telephone number of the recipient terminal inputted by the remitter carrying out the remittance to the recipient using a voice response function to a remitter terminal, thereby enabling intuitive confirmation of a recipient by a remitter.
US09177305B2 Electric vehicles (EVs) operable with exchangeable batteries and applications for locating kiosks of batteries and reserving batteries
Electric vehicles that use replaceable and exchangeable batteries, applications for communicating with a service that provides access to kiosks of batteries, and methods and systems for finding charged batteries, reserving batteries, and paying for use of the batteries, are disclosed. One example is an electric vehicle having an electric motor and at least two receptacle slots formed in the electric vehicle. The receptacle slots having at least one connection to the electric motor and at least two batteries configured for hand-insertion into the receptacle slots to enable electrical engagement of the batteries with the at least one connection when disposed in the receptacle slots and each of the batteries are further configured for hand-removal out of the receptacle slots. The vehicle further includes wireless communication circuitry configured for wireless communication between the electric vehicle and a device when linked for wireless communication with an application of the device. A computer on-board the electric vehicle is interfaced with the wireless communications circuitry and is configured to interface with the batteries via the connection to the receptacle slots to access a level of charge of the batteries present in the receptacle slots to enable data regarding the level of charge to be accessed by the application. A display panel of the electric vehicle is configured to display information regarding the level of charge of the batteries in the receptacle slots.
US09177304B2 Electronic transaction system
An electronic transaction system comprising a host server, at least one transaction device; at least one service provider system; and a content management system. When a transaction device issues a client request to the host server for one or more of the electronic goods and/or services, the host server operates to generate a client response in reply to the client request. In generating the client response a service request may be issued to the at least one service provider system. Also includes a matrix recording a set of permissions and/or constraints applicable to the electronic transaction system. The content management system references the matrix in determining the content to be provided to each transaction device to ensure that the set of permissions and/or constraints are complied with. Each transaction device further receives a set of unique identifiers from the host server, each identifier representing a component of the content.
US09177298B2 Abbreviated user interface for instant messaging to minimize active window focus changes
An abbreviated user interface for instant messaging (or other type of communications occurring in a graphical user interface environment permitting concurrent running of multiple application) is provided. The abbreviated user interface is different from a related primary user interface and is presented when the primary user interface is instantiated, yet is not on top of a z-order of a graphical environment. The abbreviated user interface can be a light-weight one that permits a user to quickly read messages. In one embodiment, a user can create outgoing messages using the abbreviated user interface. Presentation of the abbreviated user interface can require a user action, such as hovering a pointer over a task bar element for a duration or pressing a hot-key combination. In one embodiment, presentation of an otherwise unread message within the abbreviated interface for a designated time can cause the message to be marked as read.
US09177297B2 Distributing data messages to successive different subsets of group members based on distribution rules automatically selected using feedback from a prior selected subset
A method of automatically distributing data messages to members of a user community involves selecting, from a list of distribution rules, a rule which meets certain criteria in terms of message distribution characteristics. The selected rule determines which members of the user community will receive the message and when. For example, in a first round, a first subset of the user community receive the message and each is prompted to provide feedback data in relation to the message, for example to say that the message is offensive, already answered or if there is someone else who can deal with the message. This feedback data is applied to the selected distribution rule to determine to whom the message is sent in the next round. The process continues over a number of rounds until a termination criterion is met.
US09177294B2 Social network site including invitation functionality
A social network site with enhanced user interaction functionality. In one implementation, a method includes receiving an invite request from an inviting user, wherein the invite request comprises identifying information associated with an invited user; generating a new account for the invited user; allowing the inviting user to create and customize a proposed personal page for the invited user; transmitting to the invited user an invitation and a link to the proposed personal page; and conditionally receiving a response from the invited user, wherein the response indicates if the invited user has accepted the personal page.
US09177293B1 Spam filtering system and method
A spam filter system and method, for maintaining at least one database of permitted email addresses; automatically communicating with an email server, and selectively downloading and storing email not corresponding to entries in the database; automatically sending a challenge message in response to messages from non-permitted email addresses; if an appropriate response is received to the challenge message, adding the non-permitted email address to the database of permitted email addresses; and automatically restoring downloaded email messages from email addresses which become permitted.
US09177290B1 Featured items of distributed discussion collaboration
In an embodiment, a method for distributed discussion collaboration is provided. The computer-implemented method includes selecting a featured discussion item for each of one or more collaborators based on information associated with each respective collaborator. The method also includes providing selected featured discussion items for display to respective one or more collaborators. The method further includes receiving voting information for the featured discussion items displayed to the respective one or more collaborators. In another embodiment, a system for distributed discussion collaboration includes a selection module configured to select a featured discussion item for each of one or more collaborators based on information associated with each respective collaborator. The system also includes a view controller and a voting module.
US09177288B2 System and method for customized experiences in a shared online environment
There is provided a system and method for providing customized experiences to a plurality of client stations in a shared environment. There is provided an accounts database having data relating to a plurality of clients, an online server having a server processor and hosting the shared environment for access by the plurality of client stations, and an online client application for execution by a client processor of a client station. The server processor is configured to retrieve client data from the accounts database relating to a client, determine client preferences of the client based on the client data, create a customized environment from the shared environment according to the client preferences, and send the customized environment to the online client application of a client station associated with the client for rendering the customized environment on a client display. User interactions may be filtered to maintain a shared environment perception.
US09177287B2 Coordinating group play event for multiple game devices
A networked system that provides group play features for respective end users of a plurality of game machines is provided. The gaming machines may be connected together through a peer-to-peer environment or through a network controller or other device. An eligibility score may be maintained by each gaming machine, and the eligibility score indicates eligibility to participate in the group-play bonus feature. The group-play bonus feature is initiated when a triggering event is detected. Intermediate and final results of the group-play bonus feature are provided by the eligible gaming machines to all other eligible gaming machines. Each gaming machine apportions a bonus award from a bonus pool associated with the group-play bonus feature to each player.
US09177286B2 Free trade qualification method and system
A free trade qualification system to determine whether finished products qualify for a given free trade agreement. Bill of materials maintenance uses tables that constitute the bill of materials, including an item master table and an item relationship table. The item master table contains records for the parts and finished products. The item relationship table contains all relationships between items structured as parent to child in a recursive manner. Free trade qualification traverses the bill of materials to calculate whether a given finished product is qualified. The harmonized tariff code for the part or subassembly being processed is evaluated in terms of the appropriate qualification rules to determine which of these rules applies to the part in the context of its relationship to the subassembly being processed.
US09177283B2 System and method for providing a community portal for chat-based support services
An approach is disclosed for providing a community portal for chat-based support services. Chat sessions corresponding to customer support service are established among multiple users and one or more agents. A community of the users is created during the chat sessions.
US09177280B2 Methods, apparatus, and systems for acquiring an enhanced positive response for underground facility locate and marking operations based on an electronic manifest documenting physical locate marks on ground, pavement, or other surface
A positive response notification to provide information regarding locate and/or marking operations for underground facilities may include time-stamp information to provide proof of a time at which the locate and/or marking operation was completed by a locate technician, and/or place-stamp information to provide proof of a presence of the locate technician at or near a work site. An electronic manifest image and/or a virtual white line image similarly may be included in a positive response notification. In one example, such images may be bundled together based on respective descriptor files (or descriptor metadata) that associates the corresponding images with a locate request ticket for the operation. In another example, a positive response notification may include environmental information regarding one or more environmental conditions present at or near the work site during the locate and/or marking operation.
US09177275B2 Method for providing a real time view of heterogeneous enterprise data
A method for providing a real time view of heterogeneous enterprise data of operational systems includes capturing streams of operational events in real time, combining the events with contextual data, and materializing a resulting view. The resulting view includes a dynamically defined view of the stream of events and provides visibility into a current state of the operational system. A view snapshot is continuously incrementally updated by a view maintenance engine as a stream of rows. The views are used to evaluate a business rule. An alert is fired when a business rule holds true. To enable the view in a view engine, a SQL string characterizing the view is parsed into a parse tree, which is normalized to form a query graph. The query graph is then optimized to obtain a query plan, which is compiled into an operator graph. Queries are executed based upon the operator graph.
US09177273B2 Framework for developing enterprise service architecture
The invention provides a framework for developing the architecture of an enterprise information technology (IT) eco-system for an organization. The framework includes a business function appliance module, a core architecture appliance module, and a technology architecture appliance module. The business function appliance module provides one or more functionalities for the business processes of the information technology eco-system. The core architecture appliance module provides one or more functionalities for the deployment and integration of the one or more functionalities provided by business function appliance module across IT processes, based on metadata configuration. The technology architecture appliance module is configured to provide technical operational services for the one or more functionalities provided by the core architecture appliance module based on the metadata. The framework, therefore, provides a metadata-based architecture that enables the business configuration to be defined, stored and managed as an independent layer.
US09177264B2 Managing message categories in a network
A method for creating and assigning categories to electronic messages and detecting the categories for a given message when the message becomes available to the recipient.
US09177255B1 Cloud systems and methods for determining the probability that a second application is installed based on installation characteristics
A method for providing a conditional scored list of applications for use in recommending applications includes storing on a cloud computing service a conditional probability table across a set of available applications provided by the cloud computing service. The cloud computing service receives a request to provide a scored list of applications for a user, retrieves a set of user-installed applications for the user, and calculates a total conditional probability for each application in the set of available applications. The cloud computing service then constructs the scored list of applications from the set of available applications, where a score of each application is its corresponding total conditional probability, and outputs the scored list of applications.
US09177253B2 System and method for DFA-NFA splitting
Cost factors are utilized and may be estimated to determine split points in a DFA-NFA hybrid. The cost factors may comprise NFA start states, DFA backup factor, DFA-NFA token frequency, DFA steps to match, and NFA states to match. Other cost factors may be used as necessary. The cost factors are multiplied by tunable coefficients and summed. NFA states at minimum cost points are determined for entrance states in the NFA. A DFA is compiled from the entrance paths to the entrance states. NFA states and transitions needed only to reach entrance states may be deleted and all remaining NFA states are made available for execution by the NFA engine. An NFA representation of an NFA is examined by bounded depth-first recursion from each start state.
US09177251B2 Impulse regular expression matching
Disclosed is a method and apparatus for matching regular expressions. A buffer of symbols giving a number of the last occurrence positions of each symbol is maintained. When two constants match on either side of a regular expression operator, the buffer of symbols is queried to determine if a member of the complement of the regular expression operator occurred between the two constants. If so, then the operator was not satisfied. If not, then the operator was satisfied.
US09177249B2 Scientometric methods for identifying emerging technologies
Provided is a method of generating a scientometric model that tracks the emergence of an identified technology from initial discovery (via original scientific and conference literature), through critical discoveries (via original scientific, conference literature and patents), transitioning through Technology Readiness Levels (TRLs) and ultimately on to commercial application. During the period of innovation and technology transfer, the impact of scholarly works, patents and on-line web news sources are identified. As trends develop, currency of citations, collaboration indicators, and on-line news patterns are identified. The combinations of four distinct and separate searchable on-line networked sources (i.e., scholarly publications and citation, worldwide patents, news archives, and on-line mapping networks) are assembled to become one collective network (a dataset for analysis of relations). This established network becomes the basis from which to quickly analyze the temporal flow of activity (searchable events) for the example subject domain.
US09177248B2 Knowledge representation systems and methods incorporating customization
Techniques for analyzing and synthesizing complex knowledge representations (KRs) may utilize an atomic knowledge representation model including an elemental data structure and knowledge processing rules that are machine-readable. The elemental data structure may include a universal kernel and customized modules, which may represent knowledge that is generally applicable to a population and knowledge that is specifically applicable to individual data consumers, respectively. A method of constructing an elemental data structure may include analyzing first information to identify a first elemental component associated with a data consumer, and adding the first elemental component to a customized module corresponding to the data consumer. The method may also include analyzing second information to identify a second elemental component associated with a population, and adding the second elemental component to the universal kernel.
US09177247B2 Partitioning medical binary decision diagrams for analysis optimization
In particular embodiments, a method includes accessing a first binary decision diagram (BDD) representing data streams from sensors, selecting portions from the first BDD based on ease-of-analysis, and constructing a plurality of sub-BDDs by partitioning the first BDD, wherein the sub-BDDs comprises a first sub-BDD representing the selected portions, and second sub-BDDs representing the non-selected portions.
US09177245B2 Spiking network apparatus and method with bimodal spike-timing dependent plasticity
Apparatus and methods for learning in response to temporally-proximate features. In one implementation, an image processing apparatus utilizes bi-modal spike timing dependent plasticity in a spiking neuron network. Based on a response by the neuron to a frame of input, the bi-modal plasticity mechanism is used to depress synaptic connections delivering the present input frame and to potentiate synaptic connections delivering previous and/or subsequent frames of input. The depression of near-contemporaneous input prevents the creation of a positive feedback loop and provides a mechanism for network response normalization.
US09177239B1 Generating machine-readable optical codes with aesthetic component
Techniques are provided for generating machine-readable optical codes that have an aesthetic component that is integrated into the codes themselves. In this manner, the machine-readable optical codes can be designed to be aesthetically pleasing and/or can convey information to human viewers, and can even be disguised so that they do not appear to be machine-readable optical codes at all. Such information can be (but need not be) distinct from the information encoded for reading by a machine, even when the information is integrated into the code itself. The techniques described herein can be applied to any type of machine-readable optical code.
US09177237B2 Computer device and method for isolating untrusted content
A computer system and method are provided to intercept a task from a primary user account 121 prior to execution of the task by the computer device 200, where the task relates to an untrusted content. A task isolation environment 350 is provisioned for executing the task, including programmatically creating a secondary user account 121b on the computer device. A local printer and/or a network printer which are connected to the primary user account 121 are discovered and automatically provisioned in the secondary user account 121b. Access to the or each printer 500 is controlled by an agent 300 on the computer device 200.
US09177227B2 Method and device for finding nearest neighbor
The present invention relates to a method and a device for finding nearest neighbor. In particular, it relates to a sorting, searching and matching multiple dimensional data, such as vectors, in order to find the nearest neighbor. The method is particularly useful as part of a SIFT algorithm.
US09177225B1 Interactive content generation
Generation of interactive content. In an embodiment, a representation of candidate object(s) in content of a digital media asset are received. For each of the candidate object(s), feature(s) of the candidate object are compared to corresponding feature(s) of a plurality of reference objects to identify reference object(s) that match the candidate object. For each of the matched candidate object(s), a hotspot package is generated. The hotspot package may comprise a visual overlay which comprises information associated with the reference object(s) matched to the respective candidate object.
US09177223B2 Edge detection in images
An edge detection engine operates to scan an image to identify edges within the image. An annular aperture is used to locate the edges in the image. An output image is generated by the edge detection engine that identifies the locations of the edges found in the image.
US09177219B2 Method of calibrating a lithographic apparatus, device manufacturing method and associated data processing apparatus and computer program product
A lithographic apparatus is calibrated by reference to a primary reference substrate. Using an apparatus which need not be the same as the one being calibrated, there is obtained an apparatus-specific fingerprint of the primary reference substrate. Using the same set-up there is then obtained an apparatus-specific fingerprint of a secondary reference substrate. The apparatus-specific fingerprint of the primary reference substrate is subtracted from the apparatus-specific fingerprint of the secondary reference substrate to obtain and store an apparatus-independent fingerprint of the secondary reference substrate. The secondary reference substrate and stored apparatus-independent fingerprint are subsequently used together in place of the primary reference substrate as a reference for the calibration of the lithographic apparatus to be calibrated. Initial set-up for a cluster of lithographic tools can be performed with less use of the costly primary reference substrate, and with less interruption to normal production. The initial set-up can be integrated with on-going monitoring and re-calibration of the apparatuses.
US09177217B2 Information detection apparatus and information detection method
According to one embodiment, an information detection apparatus includes an image input unit, a symbol detection unit, a service information detection unit and an output unit. The image input unit inputs an image captured by an image capturing apparatus. The symbol detection unit configured to detect a first symbol and a second symbol, which are predetermined, according to the image input by the image input unit. The service information detection unit configured to detect a service information existing at a relative position predetermined for the first symbol and the second symbol in the image when the first symbol and the second symbol are detected by the symbol detection unit according to the image input by the image input unit. The output unit configured to output the service information detected by the service information detection unit.
US09177214B1 Method and apparatus for an adaptive threshold based object detection
A method, non-transitory computer readable medium, and apparatus for detecting an object in an image are disclosed. For example, the method receives the image, calculates a score for each one of a plurality of locations in the image, performs a box plot of the score of the each one of the plurality of locations of the image, identifies an outlier score that falls outside of the box plot, determines that a distance ratio of the outlier score is less than a predefined distance ratio and detects the object in a location of the plurality of locations of the image corresponding to the outlier score.
US09177209B2 Temporal segment based extraction and robust matching of video fingerprints
A computer implemented method, apparatus, and computer program product code for temporal, event-based video fingerprinting. In one embodiment, events in video content are detected. The video content comprises a plurality of video frames. An event represents discrete points of interest in the video content. A set of temporal, event-based segments are generated using the events. Each temporal, event-based segment is a segment of the video content covering a set of events. A time series signal is derived from each temporal, event-based segment using temporal tracking of content-based features of a set of frames associated with the each temporal, event-based segment. A temporal segment based fingerprint is extracted based on the time series signal for the each temporal, event-based segment to form a set of temporal segment based fingerprints associated with the video content.
US09177206B2 Automatic photo album creation based on social information
A social photo curation system is used to automatically identify a subset of photos for an album to provide to a viewing user. The album and its photos are associated with metadata indicating information about the photos, such as individuals tagged in the photos, locations where the photos were taken, keywords or concepts associated with the photos, and the quality and variety of the photos. The social photo curation system uses this metadata to score and select the photos for a particular viewing user. The scoring and selection of photos for the album may be independent of the viewing user, or it may be customized based on the viewing user's interests and connections to other users in a social networking system.
US09177203B2 Target detection device and target detection method
A target detection device that determines whether input data acquired from a data input module contains a detection target, the target detection device including: a multi-level data generation module for generating, from the input data, a plurality of data mutually different in an information level, the information level being a degree representing the detection target; an evaluation value calculation module for calculating, for each of the plurality of data, an evaluation value representing a degree of likelihood of the detection target; and a target determination module for determining that the input data contains the detection target when an increasing degree by which the evaluation value calculated for each of the plurality of data mutually different in the information level increases according to increase of the information level is equal to or more than a lower limit value of the increasing degree where the input data contains the detection target.
US09177201B2 Image evaluation device, image evaluation method, program, and integrated circuit
An image evaluation device pertaining to the present invention aims to realize evaluations matching the needs of each individual user, with respect to images shared on a network. The image evaluation device includes: image feature extraction unit extracting image features from a plurality of images; evaluation information acquisition unit acquiring evaluation information, the evaluation information containing results of evaluations of the images performed by users including a subject user; generation unit generating relational information based on the image features and the evaluation information, the relational information showing relationship between the images, the users, and image feature groups into which the image features are classified; and image social importance calculation unit calculating an image social importance degree of each image based on the relational information generated by the generation unit, each image social importance degree showing a degree of importance to the subject user of the corresponding image.
US09177200B2 Object classification
A method and apparatus for selecting a value or change in value of a measurement variable for an observation of an object, comprising: receiving models for the object defined in terms of an observation parameter and a measurement variable; selecting values of the measurement variable; for each model, determining a value of the observation parameter for each selected value; for each selected value, determining a value of an expected classification potential level using the determined values; and selecting a value of the measurement variable dependent upon the potential level values; wherein the potential level is an expected level of: the information or lack of information, and/or the certainty or uncertainty, with which the object could be classified if a measurement of the observation parameter were taken of the object at the respective value of the measurement variable.
US09177199B2 Semantic magazine pages
A method for providing user interaction with a printed page (10) includes providing artwork (20) for a first page to be printed; providing a printing model to simulate a first printed page using the artwork; simulating the first page to be printed using the printing model; extracting a first set of features from the first simulated page (220); and embedding the first set of extracted features in a first URL (270). The invention includes printing the first page; capturing a digital image of the printed page (415) with a mobile device (400); extracting features (430) from the digital image; generating the URL associated with the digital image using the features extracted from the digital image; and navigating to the generated URL using a web browser (470).
US09177198B1 Systems and methods for alignment of check during mobile deposit
An alignment guide may be provided in the field of view of a camera associated with a mobile device used to capture an image of a check. When the image of the check is within the alignment guide in the field of view, an image may be taken by the camera and provided from the mobile device to a financial institution. The alignment guide may be adjustable at the mobile device. The image capture may be performed automatically by the camera or the mobile device as soon as the image of the check is determined to be within the alignment guide. The check may be deposited in a user's bank account based on the image. Any technique for sending the image to the financial institution may be used.
US09177196B2 Vehicle periphery monitoring system
With a simple configuration, a vehicle periphery monitoring system that easily detects pedestrian that has a possibility to collide with a vehicle to which the monitoring system is installed. Based on a change rate in the size of the image of the observation object captured at a preset time interval by an onboard camera 111 and the presence or absence of the deformation of the observation object image between the captured images, it is determined whether the observation object is a pedestrian relatively approaching the vehicle to which the monitoring system is installed.
US09177194B2 System and method for visually distinguishing faces in a digital image
A face is detected and identified in a digital image. A weight is calculated and assigned to the detected face based on characteristics of the face and social media connections between the person identified from the face and a target viewer of the digital image. One or more image effects are applied to the digital image to visually distinguish the detected face from other parts of the digital image and/or in relation to other faces detected in the image.
US09177193B2 Safe illumination for computerized facial recognition
In an embodiment, a method is provided. The method includes setting an IR (infrared) level to a first predetermined level. The method also includes reading an image and determining if a face is detected. If a face is not detected, the method sets the IR level to zero and waits a first predetermined amount of time. The method further includes repeating the setting the IR level to the first predetermined level and the reading an image. The method also includes determining a face is detected. The method further includes setting the IR level to a second predetermined level. The method also includes reading an image and determining if a face is recognized. The method may further include setting the IR level to zero and waiting a second predetermined amount of time. The method may also include setting the IR level to the first predetermined level, reading an image and determining if a face is detected.
US09177188B2 Method and system for detecting detection patterns of QR code
Method and system for detecting detection patterns of a QR code is disclosed, detection is performed in a first direction and then in a second direction based on the first direction detection to detect a line segment having a length ratio of black:white:black:white:black meeting a predetermined ratio to determine the central points of the detection patterns, and thereby find out all detection patterns. Line-by-line traversal detection in a first direction is used to detect the detection patterns. Detection is performed based on the detected central point of the first line segment. Thus, detection steps may be greatly saved to simplify the detection procedure and improve computing speed. Fast detection of detection patterns may be realized for a QR code image.
US09177186B1 Register for counting and tracking items in a bag
A register for counting and tracking items in a bag comprises a manifest and an RFID reader. The RFID reader is used to query a plurality of RFID tags attached to items contained in the bag. The register creates reports counting and/or identifying changes to items contained in the bag while the bag is routed and/or items in the bag are processed for a customer.
US09177184B2 Beam shape control device for an antenna and associated antenna
An improved beam shape control device, and more particularly an improved antenna comprising a beam shape control device, is distinguished by the fact that the beam shape control device (RET, M-RET) comprises reading electronics with an RFID receiving antenna and/or writing electronics with an RFID transmitting antenna, by means of which antenna-specific data can be read from an RFID tag positioned in the region of the antenna.
US09177183B2 Method for reading data stored in an electronic device for a tyre
An electronic device with data stored therein is integrated into a tire. The data is stored in a memory of the electronic device. The memory includes a data storage zone with a field reserved for a serial number of the tire, which is stored in bit form. When the data stored in the field reserved for the serial number of the tire is read, at least a part of the read data is decoded into at least one letter so as to determine the serial number of the tire.
US09177182B2 Semiconductor device for wireless communication
Provided is a semiconductor device for wireless communication which achieves a reduction in leakage power and allows an improvement in power efficiency. For example, to external terminals, an antenna driver section for driving an antenna and a rectifying section for rectifying input power from the antenna are coupled. The antenna driver section includes pull-up PMOS transistors and pull-down NMOS transistors. In the rectifying section, a power supply voltage generated by a full-wave rectifying circuit is boosted by a voltage boosting circuit. For example, when a supply of a power supply voltage from a battery is stopped, a power supply voltage resulting from the boosting by the voltage boosting circuit is supplied to the bulk of each of the pull-up PMOS transistors.
US09177177B1 Systems and methods for securing storage space
A computer-implemented method for securing storage space may include 1) identifying a block map that indicates whether each of a plurality of blocks within a storage system is to return zeroed data in response to read operations, 2) identifying a read operation directed to a block of the storage system that includes non-zeroed data, 3) determining, in response to identifying the read operation, that the block map indicates that the block is to return zeroed data in response to the read operation, and 4) returning zeroed data in response to the read operation based on determining that the block map indicates that the block is to return zeroed data. Various other methods, systems, and computer-readable media are also described.
US09177174B1 Systems and methods for protecting sensitive data in communications
Systems and methods for protecting sensitive data in communications are described, including identifying first information in content created by a user for a communication; sending the first information to a vault; receiving, from the vault, an identifier associated with the first information; replacing the first information in the content with second information that is associated with the first information and does not provide any indication of the content of the first information; and sending the communication comprising the content with the second information and the identifier.
US09177170B2 Information provision system, content information copying device, user terminal device and user management device
A content encryption device generates encrypted content and an encrypted content copying device copies the encrypted content on an information storage medium. The storage medium is sold at a charge or distributed at no charge. A user gets the storage medium to connect the storage medium to a user terminal device or set the storage medium in a user terminal device, accesses to a content key distribution device to present a part or a whole of medium information of the storage medium to the distribution device. The distribution device grasps the whole of the medium information of the copied medium together with copied content and makes a content key encryption device issue an encrypted content key on the basis of user presentation information and distributes it to the terminal device.
US09177169B2 Secure digital storage
Systems and methods for activating a token to enable a user to enter a transaction based on information received from a recovery key and a passcode are described herein.
US09177163B1 Data access lockdown
Data access lockdown is described, including receiving a request from a first user to disable access to all data that are access-controlled by the first user based on at least one setting. The data are shared with at least one other user. In response to the request, modifying, without further action by the first user, the at least one setting by replacing a current value indicative of at least some of the data being shared, with a lockdown value indicative of disablement of access to all the data access-controlled by the first user, so as to prevent the at least one other user from accessing any of the data.
US09177161B2 Systems and methods for secure access modules
Various embodiments of the invention provide a strong logical link between a SAM and a secure terminal to combat SAM counterfeiting and misuse. The link is based on mutual validation methods using firmware and cryptographic protocols. Once the SAM is removed from a terminal that it has been tied to, or the link is broken by a tampering attempt of a potential intruder, the SAM and/or the terminal are disabled.
US09177158B2 Methods and systems for processing content rights
A system and method for processing content access rights and/or entitlement rights are disclosed. A method, in one aspect, provides for receiving a selection of a content option, requesting access information associated with the selected content option, receiving access information comprising location information relating to a compatible format, requesting access rights from a first service associated with the location information, wherein the first service requests an access decision relating to the selected content option from a second service based upon the access rights, and receiving the access rights.
US09177148B2 Protection against return oriented programming attacks
In one embodiment, a processor includes at least one execution unit. The processor also includes a Return Oriented Programming (ROP) logic coupled to the at least one execution unit. The ROP logic may validate a return pointer stored on a call stack based on a secret ROP value. The secret ROP value may only be accessible by the operating system.
US09177141B2 Active defense method on the basis of cloud security
The present invention relates to an active defense method based on cloud security comprising: a client collecting and sending a program behavior launched by a program thereon and/or a program feature of the program launching the program behavior to a server; with respect to the program feature and/or the program behavior sent by the client, the server performing an analysis and comparison in its database, making a determination on the program based on the comparison result, and feeding back to the client; based on the feedback determination result, the client deciding whether to intercept the program behavior, terminate execution of the program and/or clean up the program, and restore the system environment. The invention introduces a cloud security architecture, and employs a behavior feature based on active defense to search and kill a malicious program, thereby ensuring network security.
US09177133B1 Multi-function smart communication card
Various embodiments are described that relate to a smart card. When not connected to an external system, such as a laptop computer, the smart card can be configured to power itself. Thus, various functions can be practiced on the smart card in absence of connection to the external system. Example functions of the smart card can include user identification and authorization. In addition, the smart card can be configured to distinguish between different users and provide different access levels to different users and/or difference access to containers resident within the smart card. This can be done prior to when the smart card is connected to the external system.
US09177131B2 User authentication method and apparatus based on audio and video data
A computer-implemented method is performed at a server having one or more processors and memory storing programs executed by the one or more processors for authenticating a user from video and audio data. The method includes: receiving a login request from a mobile device, the login request including video data and audio data; extracting a group of facial features from the video data; extracting a group of audio features from the audio data and recognizing a sequence of words in the audio data; identifying a first user account whose respective facial features match the group of facial features and a second user account whose respective audio features match the group of audio features. If the first user account is the same as the second user account, retrieve the sequence of words associated with the user account and compare the sequences of words for authentication purpose.
US09177128B2 Authentication device, and non-transitory computer-readable device storing authentication program
There is provided an authentication device configured to: store, as an authentication information database, authentication information in which a preset authentication identifier including a plurality of identifiers is associated with a pattern of a relative input position of the plurality of identifiers; acquire as input information a piece of information indicating the identifier input from a user and the input position of the identifier; and grant authentication when the identifier included in the input information corresponds with the identifier in the authentication information and when a pattern of a relative input position of the identifier included in the input information corresponds with the pattern of the relative input position of the identifier in the authentication information.
US09177126B2 System and method for human identity validation via a mobile device
Method for establishing and maintaining a person's identity starts at the time the person registers with the system using a mobile device to validate the identity of a person in an inherently anonymous computing environment such as the internet or any other distributed network where face to face communication is not possible. The person will provide information required to establish the person's identity with an authenticator. The authenticator then submits that information to the system administration service to be validated by external databases and services. The external service provides a set of challenge/response questions unique to that person to establish positive identification. Upon successful authentication of the person's identity, the person and their device will be associated with each other and recorded in the system. Each authentication service will define a criterion, labeled as a schema, by which authentication events will be governed.
US09177122B1 Managing secure firmware updates
Techniques for managing secure data transfer, including firmware updates and/or cryptographic keys, may be provided. For example, a portable device may be provided that includes at least a first memory configured to store data associated with secure firmware updates while the device is interacting with a second device. In some examples, a network connection with a third device may be established. The data associated with the firmware update may be received from the third device by utilizing the established network connection. Further, in some examples, the received data may be stored in the first memory only while the first device is interacting with the second device. The portable device may also enable a firmware update of the second device based at least in part on the data stored in the first memory.
US09177121B2 Code protection using online authentication and encrypted code execution
Methods for code protection are disclosed. A method includes using a security processing component to access an encrypted portion of an application program that is encrypted by an on-line server, after a license for use of the application program is authenticated by the on-line server. The security processing component is used to decrypt the encrypted portion of the application program using an encryption key that is stored in the security processing component. The decrypted portion of the application program is executed based on stored state data. Results are provided to the application program that is executing on a second processing component.
US09177119B2 Usage metering based upon hardware aging
Techniques are generally disclosed for using an operating entity, including a method, apparatus, and/or system to control usage of the operating entity. In various embodiments, an in-use signal generator may be configured to generate at least one in-use signal, with the at least one in-use signal having a signal duration representative of at least one usage episode of the operating entity. An aging circuit may be coupled to the in-use signal generator and configured to output at least one age-affected signal in response to the at least one in-use signal. A metering module may be coupled to the aging circuit and, in response to the at least one age-affected signal, and configured to measure a signal characteristic of the at least one age-affected signal and translate the signal characteristic into a generated quantity of accumulative usage of the aging circuit.
US09177115B2 Data subscription management system
A method includes a digital subscription management system (DSMS) receiving from a source system a request to perform an edit of at least one data object, the DSMS sending a request for response (RFR) to subscribing systems having a copy of the at least one data object, the DSMS receiving a response from the subscribing systems, and the DSMS performing the edit.
US09177112B2 Method and device for communicating digital content
A method for establishing a secured communication channel, between a first processing component and a second processing component; the method comprising executing a digital rights management agent on a processing unit, the digital rights management agent being configured to enforce permissions associated with digital content based on a digital rights management protection mechanism; receiving, by the digital rights management agent at least a security data item, the security data item including a session key data item; verifying authenticity of the received session key data item by the digital rights management agent using said digital rights management protection mechanism; providing the verified session key data item by the digital rights management agent to at least the second processing component; establishing a secured communication channel between the first and second processing components using at least the provided session key data item.
US09177107B2 Recipient verification system with permanent identifier having embedded machine readable code verification and methods of use, including recipient identification
A recipient verification system including a band and at least one label intended to be removed from connection with the band during use. The band displays a permanent band identifier, and the at least one label displays a removable band identifier. The band identifiers each include an identical human readable code. The removable band identifier further includes a machine readable code embodying information identical to, and limited to, the human readable code. The permanent band identifier includes a machine readable code embodying information identical to the human readable code and a verification code.
US09177105B2 Quantitatively characterizing disease morphology with co-occurring gland tensors in localized subgraphs
Apparatus, methods, and other embodiments associated with objectively predicting biochemical recurrence with co-occurring gland tensors in localized subgraphs are described. One example apparatus includes a set of logics that associate directional disorder with a risk of failure in a material. A first logic detects a fundamental unit of composition in the material, segments boundaries of the fundamental unit, and calculates a directional tensor for the fundamental unit. A second logic constructs a localized sparsified subgraph whose nodes represent centroids of the fundamental units, defines pairwise spatial relationships between the fundamental units, and constructs a directional co-occurrence matrix based on the spatial relationships. A third logic derives second order statistical features from the co-occurrence matrix, and produces a risk failure score as a function of the second order statistical features. The second order statistical features include the entropy of the directional organization of the fundamental units.
US09177103B2 Data processing of group imaging studies
A system for processing multi-subject volumes comprises a volume input (1) for receiving an input volume image dataset (13) comprising a plurality of subjects scanned simultaneously. A metadata input (2) receives metadata (15) relating to individual ones of the subjects. A subject finder (3) identifies a plurality of portions of the input volume image dataset (13), each portion comprising one of the subjects. A volume image dataset generator (4) generates a plurality of separate volume image datasets (16), each separate volume image dataset (7) comprising one of the portions of the input volume image dataset. A metadata handler (5) associates the metadata (15) relating to a subject with the separate volume image dataset (7) comprising the portion comprising the subject.
US09177098B2 Systems and methods for determining the probability of a pregnancy at a selected point in time
The present invention generally relates to systems and methods for determining the probability of a pregnancy at a selected point in time. Systems and methods of the invention employ an algorithm that has been trained on a reference set of data from a plurality of women for whom at least one of fertility-associated phenotypic traits, fertility-associated medical interventions, or pregnancy outcomes are known, in which the algorithm accounts for any woman who ceases pregnancy attempts prior to reaching a live birth outcome.
US09177096B2 Timing closure using transistor sizing in standard cells
An approach is provided in which a design tool executes static timing analysis of an integrated circuit design using a first set of timing values corresponding to a first set of layout properties of a transistor included in a standard cell utilized by the integrated circuit design. When the design tool determines that the static timing analysis generates a timing violation within a violation budget, the design tool selects a second set of timing values of the standard cell corresponding to a second set of layout properties of the transistor. The design tool determines that re-execution of the static timing analysis using the second set of timing values resolves the timing violation and, in turn, generates mask layer data that includes the second set of layout properties.
US09177095B1 Methods, systems, and articles of manufacture for creating or manipulating electrical data sets for an electronic design
Disclosed are method(s), system(s), and article(s) of manufacture for creating or manipulating electrical data sets for an electronic design across multiple abstraction levels. The method identifies simulation result(s) obtained from simulation run(s) for an electronic circuit or at least a portion thereof, identifies at least a part of one or more sets of simulation results, each of which is obtained from a simulation run for the electronic circuit or at least a portion thereof at the first abstraction level, identify relevant electrical data or information for design under test instance(s) of a master library or a master cell and creates electrical data set(s), generates a view for at least some of the electrical data set(s), and hand-off the electrical data set(s) to second abstraction level. The method may further identify preexisting electrical data set(s). The method may further compare the electrical data set(s) and preexisting electrical data set(s).
US09177092B2 Method for arranging and wiring reconfigurable semiconductor device, program therefor, and arranging and wiring apparatus
An arrangement and wiring method of a reconfigurable semiconductor device, including: generating a net list based on a circuit description in which a circuit configuration is described; extracting a sequential circuit data set which is to be scanned from the net list; generating a first truth value table data set so as to write into a first set among plurality of memory cell units from the sequential circuit data set which is to be scanned; and generating a second truth value table data set so as to write into a second set among the plurality of memory cell units from a combination logic circuit data set of the net list.
US09177088B2 Computer product for supporting design and verification of integrated circuit
Design and verification support related to integrated circuits that includes acquiring a first use case diagram representing a function of an object subject to design and verification and an activity diagram representing a processing procedure of the object; analyzing a structure of the activity diagram acquired at the acquiring step; converting the activity diagram to a second use case diagram representing a function of the object, based on the structure analyzed at the analyzing; verifying uniformity of the first use case diagram and the second use case diagram; and outputting a verification result obtained at the verifying uniformity.
US09177083B2 Method and apparatus for computer aided design of human-machine interface animated graphical elements
A method for the computer aided design of human machine interface animated graphical elements is provided. The method includes receiving through a user interface a selection of a graphic comprising a plurality of components in a design format. The method also includes receiving through the user interface an indication that a first component of the plurality of components is static, and an indication that a second component of the plurality of components is dynamic. The method also includes converting the first component from the design format to a static format, and converting the second component from the design format to a dynamic format. The method then exports the graphic with the first component in the static format and the second component in the dynamic format.
US09177081B2 Method and system for processing ambiguous, multi-term search queries
In accordance with one or more embodiments of the invention, a method and system are provided of processing a search query entered by a user of a device having a text input interface with overloaded keys. The search query is directed at identifying an item from a set of items. Each of the items has one or more associated descriptors. The system receives from the user an ambiguous search query directed at identifying a desired item. The search query is a prefix substring of each of at least two words relating to the desired item. The system dynamically identifies a group of one or more items from the set of items having one or more descriptors matching the search query as the user enters each character of the search query. The system outputs identification of the one or more items of the identified group to be displayed on the device operated by the user.
US09177080B2 Automatic segmentation of video
Content items may be segmented and labeled by topic to provide for the capture, analysis, indexing, retrieval and/or distribution of information within information rich media, such as audio or video, with greater functionality, accuracy and speed. The segments and other related information may be stored in a database and made accessible to users through, for example, a search service and/or an on-demand service. Automatic segmentation may include receiving a text representation, calculating relevance intervals based on the text representation, determining a nodal representation based on the relevance intervals, and determining segments of the content item based on the nodal representation.
US09177079B1 Apparatus and method for processing multi-dimensional queries in a shared nothing system through tree reduction
A computer readable storage medium includes executable instructions to receive a request for data from a multi-dimensional cube divided into partitions distributed across nodes supporting a shared nothing distributed multi-dimensional database. The request is transformed into physical access layer operators in a tree structure. The tree structure is reduced into an index scan operator.
US09177076B2 Reducing ad impact to browser onload event
Various embodiments pertain to techniques for decreasing an amount of time to a browser onload event by asynchronously loading web page content. In various embodiments, frames are utilized to trigger an onload event before all content in a web page is loaded. In some embodiments, various components of the web page, such as advertisements, are provided in frames, and the loading of the components is triggered by an onload event of the frame. In other words, an empty frame can be provided for the purposes of triggering both a frame onload event and an onload event for the web page. The frame onload event can cause a page script to be executed effective to load the components into the frames. In some embodiments, two or more nested frames are utilized to provide asynchronous loading of web page components while maintaining compatibility of the advertisement or multimedia items and the web page.
US09177075B2 Monitoring and configuring communication sessions
In one general sense, display of content communicated by a sender communication device to a destination communication device may be enabled by receiving, at a destination communication device, content to be displayed by the destination communication device. Characteristics of a display of the received content by the destination communication device may be algorithmically identified in accordance with display configuration settings for the destination communication device. Based on the identified characteristics, at least one change to be made to capture configuration settings at a capturing communication device used to capture the received content may be identified. At least one alternative capture configuration setting may be communicated to the capturing communication device. Content that is captured by the capturing communication device is received at the destination communications device based on the alternative capture configuration setting communicated.
US09177065B1 Quality score for posts in social networking services
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for storing a plurality of items, each item including digital content, for each item of the plurality of items, generating a quality score to provide a plurality of quality scores, each quality score indicating a quality of an associated item and being based on at least one of a status score and a content score, the status score being associated with an author user of a respective item and the content score being associated with digital content provided in the respective item, determining an order of items based on respective quality scores, and transmitting instructions to display items to a user based on the order.
US09177064B2 Language learning exchange
Systems, methods and products involving a language learning exchange are provided herein. One aspect includes registering through a computing device one or more users in a user community of an online language learning platform, the one or more users associated with profile information comprising user name, native language, and language of interest elements; accessing language content for use by the one or more users; and matching the one or more users with one or more complementary user community users based on the profile information for participation in one or more learning exchanges. Other embodiments are also described herein.
US09177063B2 Endorsing search results
Methods and systems for improving user search experience with a search engine by providing a way for associated users to create and share personalized lists of article identifiers through endorsements of articles. Search endorsements can be used to personalize the search engine's ranking of articles by offering a way for users to re-rank the article identifiers for themselves and for those who trust them.
US09177061B2 Search engine with geographical verification processing
In most of the Internet search operations, unwanted search results can be eliminated to reduce the high volume of the Internet traffic, and make the search operation highly efficient, according to the present invention. The present invention proposes a two step approach. The first step is to achieve the high relevance of the search results by search region restricted search operation. The second step, further adds high degree of relevance to the search results by the contact address correlation with a reliable reference address or the legitimate contact address eliminating the crap and squatter sites from the search result list. The region restricted search does searching in a selected geographical region. Thus the region restricted search operation minimizes the search time and huge volume of Internet traffic, which is likely to impair the overall Internet performance.
US09177059B2 Method and system for determining allied products
The method comprises processing plural product information records from the product information sources into one or more groups based on which product information records are likely to correspond to the same product, correlating a unique product ID corresponding to the product associated with each of said groups to identify the product, comparing each identified product to categories of a taxonomy to determine a category for the identified products in the taxonomy, and determining attributes for each categorized product based on the product information records corresponding to each group, creating product specifications based on the determined attributes and storing the product specification in the corresponding determined categories of the taxonomy.
US09177058B2 Multi-step search result retrieval
A method for providing search results to a user operating a third-party web page includes receiving a search request from the third-party web page. One or more search results may be identified that satisfy the search request. The one or more search results each have identifying information to be presented to a user, as well as substantive content. A unique identifier, such as an opaque token, is associated with each of the search results. The identification of the one or more results is provided to the third-party web page in a pop-up window or a widget. A request for the content for a selected search result of the one or more search results is received. The unique identifier may be used to validate the request, and the content is provided to the user, either directly or through the widget, on the third-party webpage.
US09177055B2 System for displaying and managing information on webpage using indicator
A system for displaying and managing information on a webpage using an indicator comprises an indicator displayed on a surface of specific contents of the webpage with reference to coordinate values corresponding to the specific contents and for classifying and elaborating on the specific contents; an indicator generation module for generating the indicator comprising a block setting portion for predicting a width of the specific contents, a coordinate setting portion for grasping the coordinate value of a webpage area corresponding to the specific contents, an input portion for inputting information to be recorded in the indicator, a storage portion for storing the coordinate value and an output portion for outputting the indicator to the specific contents based on the information stored in the storage portion; and an indicator database stored in the system server through the storage portion and collected according to a specific classification.
US09177052B2 Audio systems and related devices and methods
A method for managing presets in an audio system is provided. The method includes syncing preset assignments on a plurality of audio playback devices such that preset assignments on any one of the audio playback devices correspond to respective preset assignments on each of the other audio playback devices, and, such that, if one of the preset assignments is changed on one of the audio playback devices, each of the other audio playback devices is automatically updated such that a corresponding change is made to a corresponding preset assignment on each of the other audio playback devices. Each of the preset assignments is an assignment of an entity associated with one of a plurality of digital audio sources to one of a plurality of preset indicators on the corresponding one of the audio playback devices.
US09177048B1 Collaborative filtering
Systems, methods, and apparatus, including computer program products, for collaborative filtering are provided. A method is provided. The method includes clustering a plurality of entities with respect to one or more latent variables in a probability distribution model of a relationship between a set of entities and a set of items, the probability distribution model comprising a probability distribution of the set of items with respect to the latent variables. The method also includes, as new items are added to the set of items, updating the probability distribution of the set of the items with respect to the latent variables, and generating an updated relationship score for an entity with respect to the set of items based on the entity's fractional membership in the clustering with respect to the latent variables and based on the updated probability distribution of the set of the items with respect to the latent variables.
US09177046B2 Refining image relevance models
Methods, systems and apparatus for refining image relevance models. In general, one aspect of the subject matter described in this specification can be implemented in methods that include re-training an image relevance model by generating a first re-trained model based on content feature values of first images of a first portion of training images in a set of training images, receiving, from the first re-trained model, image relevance scores for second images of a second portion of the set of training images, removing, from the set of training images, some of the second images identified as outlier images for which the image relevance score received from the first re-trained model is below a threshold score, and generating a second re-trained model based on content feature values of the first images of the first portion and the second images of the second portion that remain following removal of the outlier images.
US09177044B2 Discovering and scoring relationships extracted from human generated lists
A computer-implemented system and method for extracting Human Generated Lists from an electronic database is described. The system searches for objects of the same class within a context window to identify Human Generated Lists and stores them to an archive, The archive may be used to generate a relationship network. The system generates variable length data vectors to represent the relationships between the objects within each Human Generated List. This relationship network can then be queried to discover relationships between the objects in the Human Generated Lists and to provide related objects as recommendations.
US09177043B2 Management of data segments for analytics queries
The disclosed embodiments provide a method and system for processing data. During operation, the system obtains a set of records, wherein each of the records comprises one or more metrics and at least one dimension associated with the one or more metrics. Next, the system creates a data segment comprising at least one of a forward index and an inverted index for a column in the records. The system then stores the data segment in network-accessible storage and assigns the data segment to a partition. Finally, the system enables querying of the data segment through a query node associated with the partition.
US09177039B2 Communication assistance device, communication assistance method, and computer readable recording medium
A communication assistance device (10) includes a communication level determination unit (11) and a topic recommendation unit (16) so as to determine a level of a relationship between users who communicate with each other and provide communication assistance using the result of the determination. The communication level determination unit (11) determines the level (communication level) of the relationship between the users based on similarity between the users obtained from preference information showing preferences of the users, and on user action records showing records of actions taken by a certain user toward a partner user with whom the certain user communicates out of the users. The topic recommendation unit (16) selects, from among a group of topics prepared in advance, a topic that can be transmitted to the partner user based on the determined level of the relationship between the users and on preferences of the certain user and the partner user.
US09177035B2 Replicating data to a database
Techniques for replicating data to a database include determining a change to at least one database value in a database table on a source repository; updating, based on the change to the at least one database value, a snapshot value associated with the change to the at least one database value stored in a log table; incrementing a commit value associated with the snapshot value stored in a commit table, the commit table comprising a plurality of commit values associated with a plurality of corresponding snapshot values; initiating replication of the database from the source repository to a target repository; determining a maximum commit value of the plurality of commit values; and replicating the database value in the database table from the source repository to the target repository based on the commit value associated with the snapshot value being less than or equal to the maximum commit value.
US09177028B2 Deduplicating storage with enhanced frequent-block detection
Detecting data duplication comprises maintaining a fingerprint directory including one or more entries, each entry including a data fingerprint and a data location for a data chunk. Each entry is associated with a seen-count attribute which is an indication of how often the fingerprint has been seen in arriving data chunks. Higher-frequency entries in the directory are retained, while also taking into account recency of data accesses. A data duplication detector detects that the data fingerprint for a new chunk is the same as the data fingerprint contained in an entry in the fingerprint directory.
US09177025B2 Hash-join in parallel computation environments
According to some embodiments, a system and method for a parallel join of relational data tables may be provided by calculating, by a plurality of concurrently executing execution threads, hash values for join columns of a first input table and a second input table; storing the calculated hash values in a set of disjoint thread-local hash maps for each of the first input table and the second input table; merging the set of thread-local hash maps of the first input table, by a second plurality of execution threads operating concurrently, to produce a set of merged hash maps; comparing each entry of the merged hash maps to each entry of the set of thread-local hash maps for the second input table to determine whether there is a match, according to a join type; and generating an output table including matches as determined by the comparing.
US09177017B2 Query constraint encoding with type-based state machine
A query specified in a source programming language can be analyzed as a function of a type-based state machine that encodes query constraints of a target programming language. The type-based state machine can encode such constraints as types representing states and methods representing transitions between states or types.
US09177012B2 Maintenance of subscriber history for service support applications in an IP-based telecommunications system
A facility for maintaining a subscriber history pertaining to the use of a mobile device with an IP-based telecommunications service offered by a service provider. When a connection request is made by a mobile device to access an IP-based telecommunications service, one or more identifiers associated with the requesting mobile device and access point are provided in the request and stored by the facility. In some cases, the identifiers are stored even if the mobile device is unable to, or not authorized to, access the telecommunications service. Additional parameters associated with the request from the mobile device, such as a time stamp and details of a subsequent telecommunications session, are also associated with the stored request. The history of requests to access the IP-based telecommunications service from the mobile device are maintained by the facility and provided to a service support provider.
US09177010B2 Non-destructive data storage
Non-destructive data storage is disclosed. An information change is stored that is associated with a business object such that tracking of the information change is enabled with respect to a transaction time and/or an effective time. The stored information change is accessed with respect to a time.
US09177006B2 Radix sort with read-only key
Methods and arrangements for a radix sort with a read only key. A plurality of keys are received, an array and a link table are populated for the first digit of the keys based upon the keys; and an array and a link table are populated for each successive digit of the keys based upon the array and link table populated for the preceding digit of the keys. Embodiments may be implemented in both hardware (FPGAs, ASICs, information handling devices, etc.) and software. Other embodiments are also disclosed and claimed.
US09177005B2 Resolving in-memory foreign keys in transmitted data packets from single-parent hierarchies
A method of creating multi-parent relationships from single-parent data may include receiving a data set that includes a plurality of objects organized in a hierarchy. The method may also include parsing the data set to locate at least two objects in the plurality of objects. Each of the at least two objects may be associated with an identifier. The method may additionally include creating a data record to represent information associated with the at least two objects. The data record may be associated with a plurality of parent data records.
US09177004B2 Balancing data across partitions of a table space during load processing
A balancing technique allows a database administrator to perform a mass data load into a relational database employing partitioned tablespaces. The technique automatically balances the usage of the partitions in a tablespace as the data is loaded. Previous definitions of the partitions are modified after the loading of the data into the tablespace to conform with the data loaded into the tablespace.
US09176999B2 Multiplication-based method for stitching results of predicate evaluation in column stores
A system joins predicate evaluated column bitmaps having varying lengths. The system includes a column unifier for querying column values with a predicate and generating an indicator bit for each of the column values that is then joined with the respective column value. The system also includes a bitmap generator for creating a column-major linear bitmap from the column values and indicator bits. The column unifier also determines an offset between adjacent indicator bits. The system also includes a converter for multiplying the column-major linear bitmap with a multiplier to shift the indicator bits into consecutive positions in the linear bitmap.
US09176998B2 Minimization of surprisal context data through application of a hierarchy of reference artifacts
A method, system, and computer program product for minimizing surprisal context data. The method comprising the steps of: identifying characteristics of a data event; receiving an input of rank of at least two identified characteristics of the data event; the computer generating a hierarchy of ranked, identified characteristics based on the rank of the at least two identified characteristics of the data event; and comparing the hierarchy of ranked, identified characteristics to a repository of reference artifacts arranged in characteristic context patterns. If at least one reference artifact arranged in characteristic context patterns from the repository matches the hierarchy of ranked, identified characteristics, the characteristic context pattern is stored as a surprisal context filter and compared to a data input of data events to detect anomalous events.
US09176997B2 Universe migration from one database to another
A semantic layer (universe), which is created on a source database (DB), is migrated to a target DB. The migration includes pre-migration steps, actual migration and post-migration steps. The pre-migration steps prepare the target DB for the actual migration by configuring the target DB and determining the differences between the source DB and the target DB. During the actual migration, data, tables and views are migrated to the target DB conforming to the target database structure, functions and configuration. A new universe is created on the target database and all consumers of the source universe such as created reports are changed to refer to the new universe.
US09176987B1 Automatic face annotation method and system
An automatic face annotation method is provided. The method includes dividing an input video into different sets of frames, extracting temporal and spatial information by employing camera take and shot boundary detection algorithms on the different sets of frames, and collecting weakly labeled data by crawling weakly labeled face images from social networks. The method also includes applying face detection together with an iterative refinement clustering algorithm to remove noise of the collected weakly labeled data, generating a labeled database containing refined labeled images, finding and labeling exact frames containing one or more face images in the input video matching any of the refined labeled images based on the labeled database, labeling remaining unlabeled face tracks in the input video by a semi-supervised learning algorithm to annotate the face images in the input video, and outputting the input video containing the annotated face images.
US09176985B2 Apparatus and method for retrieving image
An image retrieval method includes reading from a first database a first image group mapped to an object as a retrieval target, and extracting an image feature quantity of a plurality of images of the first image group. A second image group mapped to an object as a search key is read from a second database and an image feature quantity of a plurality of images of the second image group is extracted. Similarity is determined between the first image group and the second image group, based on the image feature quantity of the plurality of images of the first image group and the image feature quantity of the plurality of images of the second image group. On an output device, as retrieval results, the plurality of images of the first image group are displayed in order of similarity of the object as the retrieval target based on determined similarity.
US09176981B2 Method and system for profiling virtual application resource utilization patterns by executing virtualized application
A method and system for profiling execution of an application implemented by an application file comprising a plurality of data blocks. The application is executed in response to an execute command from a management process. Read messages are sent to the management process each time the application reads one or more of the plurality of data blocks of the application file. The management process records information about the read operations in one or more transcripts which may be used to create a streaming model for the application allowing the application to be downloaded using a conventional download protocol without using a specialized streaming protocol.
US09176980B2 Scalable caching of remote file data in a cluster file system
Scalable caching of remote file data in cluster file systems is provided. One implementation involves maintaining a cache in a local cluster file system and caching local file data in the cache by fetching file data on demand from the remote cluster file system into the local cached file system over the network. The local file data and metadata corresponds to the remote file data and metadata in the remote cluster file system. Updates made to the local file data and metadata are pushed back to the remote cluster file system asynchronously.
US09176978B2 Classifying data for deduplication and storage
In a method of classifying data for deduplication, data to be classified is accessed. The data is classified into a deduplication classification in accordance with a data content aware data classification policy such that classified data is created. The data classification policy includes a plurality of deduplication classifications.
US09176976B2 Systems and methods for transformation of logical data objects for storage
Systems and methods for compressing a raw logical data object (201) for storage in a storage device operable with at least one storage protocol, creating, reading, writing, optimizatic in and restoring thereof. Compressing the raw logical data object (201) comprises creating in the storage device a compressed logical data object (203) comprising a header (204) and one or more allocated compressed sections with predefined size (205-1-205-2); compressing one or more sequentially obtained chunks of raw data (202-1-202-6) corresponding to the raw logical data object (201) thus giving rise to the compressed data chunks (207-1-207-6); and sequentially accommodating the processed data chunks into: said compressed sections (205-1-205-2) in accordance with an order said chunks received, wherein said compressed sections serve as atomic elements of compression/decompression operations during input/output transactions on the logical data object.