Document Document Title
US09118641B1 De-identifying medical history information for medical underwriting
A computer-implemented method includes producing information that characterizes a group of individuals from a set of private data representing characteristics of the individuals. The identity of the individuals is unattainable from the produced information. The method also includes providing the produced information to report the characteristics of the group.
US09118631B1 Mixing secure and insecure data and operations at server database
Processing a query, includes, at a client, receiving a user-generated query having a plurality of recognizable terms, securing the user-generated query to generate an encrypted query, so that the plurality of recognizable terms generated by the user-generated query cannot be determined by a server, transmitting the encrypted query to the server, to perform the query on encrypted data comprising a mix of regular data and secure data previously provided by the client, wherein at least one of selection criteria of the query and identifies of selected records of the query result cannot be determined by the server, and interpreting a result of the query provided by the server, and providing an output of the query to the user having the plurality of recognizable terms.
US09118624B2 Distributed hardware/software system for managing agent status in a communication center
An agent presence application for monitoring target agent resources and rendering agent states to subscribing applications is provided. The presence application has at least one first portion for collecting data regarding states of activity of the target agent resources, and at least one second portion for integrating the data and rendering the agent states to the subscribing applications.
US09118623B2 Site acceleration with customer prefetching enabled through customer-specific configurations
A CDN edge server is configured to provide one or more extended content delivery features on a domain-specific, customer-specific basis, preferably using configuration files that are distributed to the edge servers using a configuration system. A given configuration file includes a set of content handling rules and directives that facilitate one or more advanced content handling features, such as content prefetching. When prefetching is enabled, the edge server retrieves objects embedded in pages (normally HTML content) at the same time it serves the page to the browser rather than waiting for the browser's request for these objects. This can significantly decrease the overall rendering time of the page and improve the user experience of a Web site.
US09118617B1 Methods and apparatus for adapting the protection level for protected content
A DRM system is provided wherein a policy can be established such that the DRM system controls access to a protected content unit, wherein the policy evaluates a condition so that the DRM system adaptively varies the actions that a user is authorized to perform with the protected content unit in response to changes in the condition. The techniques described herein enable a protection level for a protected content unit to be varied in response to changes in one or more condition, such as environmental conditions and/or an historical usage conditions. The techniques described herein also enable a set of policies to be established for a DRM system such that the DRM system controls access to multiple protected content units in accordance with the set of policies. Pursuant to these policies, the DRM system can adaptively vary access to multiple protected content units in response to one or more conditions.
US09118615B2 Method and system for providing personalized network based marketing dialogues
Systems and methods for personalizing marketing dialogues are disclosed. Specifically, embodiments of the systems and methods presented may associate a variable to each event in a script. A variable may be associated with each event. A first instruction in the script may be operable to send a first communication to a user from a server via the network. A second instruction may be operable to according to the script based on the stored set of user information and the variable associated with the first event.
US09118613B2 Systems and methods for creating and displaying an electronic communication digest
Systems and methods are disclosed for creating an electronic communication digest. In one implementation, a system receives a first electronic communication including first content, and generates an electronic communication digest that reflects the first electronic communication by including first digest content generated based on the first content. The system receives a second electronic communication that includes second content, and determines a repeated portion of the second content that is included in the first content and a unique portion of the second content that is unique to the first content. The system also update the electronic communication digest to reflect the second electronic communication by adding second digest content generated that includes the unique portion of the content and does not include the repeated portion of the second content.
US09118611B2 Data synchronization for circuit resources without using a resource buffer
A method of resource-synchronizing data that is transmitted on a communication link having at least one data lane, between a first device and a second device, wherein the second device has a resource that is accessible based on an access schedule. In one operation, a timing offset of the second device based on the access schedule is determined, followed by delaying the transmission of data from the first device to the second device through the communication link by an amount of time equal to the timing offset so that the data is received at the resource when the resource is accessible according to the access schedule.
US09118609B2 Communication apparatus and communication system for enhancing speed of communication between terminals
In communication using TCP, since the transmission bandwidth is significantly influenced by RTT and discard rate, there was a problem that only the transmission bandwidth significantly lower than the contracted bandwidth could be obtained under the environment such as WAN causing large RTT, large hop number and many discarded segments. There is provided an apparatus connected to a receiving side terminal having a means for feeding back to notify all discarded segments to an apparatus connected to a transmitting side terminal; a means for retransmitting the discarded segments fed back to be notified to the apparatus connected to the transmitting side terminal; and a means for controlling transmission bandwidth, based on retransmission bandwidth and discard bandwidth by the apparatus connected to the transmitting side terminal.
US09118608B2 Communication apparatus, control method therefor, and computer-readable storage medium
In connection establishment processing in TCP communication, a next transmission destination IP address is decided by referring to a routing table. A next transmission destination MAC address associated with the next transmission destination IP address is decided by referring to the ARP table. The transmission destination IP address and the next transmission destination MAC address are stored as the connection management information in a connection management table. A transmission packet is created using the transmission destination IP address and the next transmission destination MAC address which are managed by the connection management information stored in the connection management table.
US09118607B2 Method and system for routing packets
A system for routing packets that includes leaf network devices, spine network devices, and a border gateway protocol controller to perform a method for routing packets in a network. The method includes receiving packets at a leaf device and, using the destination IP address of the packet to determine to which spine network device the packet is to be sent. The spine network devices each include a non-overlapping portion of a routing table. The spine network devices include functionality to determine a route for the packet based on its destination IP address, to determine to which leaf network device the packet is to be sent, and to send the packet to the discovered leaf network device. The leaf network device that receives the packet includes functionality to, based on the destination MAC address of the packet, determine out of which leaf network device interface to send the packet.
US09118601B2 Layer 2 and 3 latching loopbacks on a pluggable transceiver
A pluggable transceiver, and its use, looping back Layer 2 and higher data in an Ethernet network element. The transceiver has upstream and downstream datapaths, a logic array having first and second complimentary latching loopback logic blocks (LLBLBs) connected in series through both datapaths. The first LLBLB receiving an upstream datapath frame, comparing it to loopback conditions and looping back the frame on the downstream datapath if the conditions match. If the conditions did not match, the frame is sent to the other LLBLB. The first LLBLB receiving a frame from the second LLB and transmitting it on the upstream datapath with priority over any loop back frames to maintain the upstream throughput requirements of the pluggable transceiver. The second LLBLB operates in mirror image with respect to the datapaths.
US09118598B2 Redirector, relay, system for configuring route information and method for updating route information
A redirector, a relay, a system for configuring route information, and a method for updating route information are disclosed herein. The redirector includes: a route storing module and a route indicating module. The redirector further includes: a monitoring module which is coupled to communicate with the route storing module and configured to monitor change of the route configuration information; and a notifying module which is coupled to communicate with the monitoring module and configured to send a notification to the intermediate node managed by the redirector, where the notification indicates that the route information corresponding to the changed route configuration information is invalid. Through the foregoing solution, after the route configuration information changes, a notification may be sent in time to indicate that the previously subscribed route indication information is invalid, thus better ensuring correct forwarding of the service request message and improving the QoS.
US09118593B2 System and method for best value routing
A system determines, in real-time, the routing of communication services from origination to destination based on a number of selected criteria used to determine an optimal path. Best value routing enables carriers and service providers to route a session/call by using an advanced intelligent network solution to generate optimal routes/service providers for servicing a request.
US09118591B2 Distributed switch domain of heterogeneous components
A method of integrating virtual and physical network switching components into a heterogeneous switching domain is provided. Such method including, attaching, by a switching device, a header to a packet received from a virtual machine, the header including domain information, and processing the packet by the switching device, the processing being controlled by the header. Finally, the packet is forwarded, the forwarding being controlled by the header.
US09118583B2 System and method for re-routing calls
The disclosed embodiments include a system, computer program product, and method for routing a call over a packet network. A call request may be received from a calling party to call a called party at a network address. At least one potential call path over a packet network may be determined to connect the calling party to the called party at the network address. Network performance information associated with each potential call path may be accessed and a determination may be made that each of the call paths are impaired or congested. In response to determining that each of the call paths are impaired or congested, the call may be routed over a call path other than one of the at least one potential call paths to enable the calling party to communicate with the called party.
US09118575B2 Transmission of delay tolerant data
Transmission of delay tolerant data. An apparatus includes a processor configured to classify data, on the basis of its delay requirement, into delay tolerant data and into delay critical data, and to control transmission of the delay tolerant data with a transmitter in such a manner that the transmission of the delay tolerant data is timed to coincide with transmission of the delay critical data.
US09118567B2 Removing lead filter from serial multiple-stage filter used to detect large flows in order to purge flows for prolonged operation
A network device to detect large flows includes a card to receive packets of flows. The device includes a large flow detection module including a serial multiple-stage filter module including series filter modules including a lead filter module and a tail filter module. Each filter module includes counters. The serial filter module is to serially increment the counters to reflect the flows, and is to increment counters that correspond to flows of subsequent filter modules only after all counters that correspond to the flows of all prior filter modules have been incremented serially up to maximum values. The serial filter module is to detect flows that correspond to counters of the tail filter module that have been incremented up to maximum values as the large flows. The large flow detection module includes a lead filter removal module to remove the lead filter module from the start of the series.
US09118565B1 Hardware method for detecting timeout conditions in a large number of data connections
Tracking several open data connections is difficult with a large number of connections. Checking for timeouts in software uses valuable processor resources. Employing a co-processor dedicated to checking timeouts uses valuable logic resources and consumes extra space. In one embodiment, a finite state machine implemented in hardware increases the speed connections can be checked for timeouts. The finite state machine stores a last accessed time stamp for each connection in a memory, and loops through the memory to compare each last accessed time stamp with a current time stamp of the system minus a global timeout value. In this manner, the finite state machine can efficiently find and react to timed out connections.
US09118564B2 Providing PIM-SM support for mRSVP-TE based multicast virtual private networks
In a source provider edge (PE) router, a method for supporting protocol independent multicast sparse-mode (PIM-SM) using multicast resource reservation protocol-traffic engineering (mRSVP-TE) comprising the steps of creating a protocol independent multicast (PIM) state, sending a first unicast data message to a rendezvous point (RP) PE router using the PIM state, wherein the first unicast data message is a PIM register message encapsulated as a unicast multiprotocol label switching (MPLS) packet, receiving a PIM join message from the RP PE router, wherein the PIM join message triggers creating a second PIM state, sending a second unicast data message to the RP PE router via a default multicast distribution tree (MDT) using the second PIM state, receiving a PIM register-stop message from the RP PE router, wherein the PIM register-stop message suspends sending the second unicast data message.
US09118563B2 Methods and apparatus for detecting and filtering forced traffic data from network data
A non-transitory processor-readable medium is provided that stores code representing instructions to be executed by a processor to filter data associated with an entity for a first predefined time period in response to an access by the entity at a first time to a preselected network location from a plurality of preselected network locations. The plurality of preselected network locations are associated with forced web traffic patterns. The processor is also caused to filter data associated with the entity for a second predefined time period in response to an access by the entity at a second time to a preselected network location from the plurality of preselected network locations during the first predefined time period. The second time is after the first time.
US09118561B2 Network switch and method for automatically establishing connection to a wide area network
A network switch is configured to automatically establish a connection to a WAN by determining which of a plurality of ports of the network switch is a current uplink port leading to the WAN. The switch attempts to establish connectivity to the WAN using a first set of port configurations as the current set of port configurations. Upon determining that the first set of port configurations does not allow the network switch to determine an uplink port, the network switch changes to a mode having a first security measure and also having a relaxed set of current port configurations. The network switch again attempts to establish connectivity to the WAN, and upon further failures to determine an uplink port leading to the WAN, the network switch may be configured to switch to other modes utilizing further relaxed port configurations and the same or additional security measures.
US09118557B2 Measurement of packet processing time of end hosts through estimation of end link capacity
Technologies are generally described for measuring packet processing time of a remotely connected host device. According to some examples, link capacity may be measured to estimate the packet processing time (PPT). The capacity of the link connected to a host may be measured through active probing with the hosts time-stamping each probing packet after receiving it. Thus, PPT information may be included in the packet receiving process and the processes that the packet undergoes defined by the nature of different computing applications, time-stamping a packet is an example of a process that involves processing time.
US09118555B1 Secure unauthenticated virtual local area network
A networking apparatus is used in connection with a virtual local area network (VLAN). The networking apparatus includes a control circuit and a policy circuit. The control circuit is configured to dynamically determine a count of network devices presently belonging to the VLAN. The policy circuit is configured to calculate a first data rate in proportion to the count. The first data rate is less than a total data rate of a physical network including the VLAN. The policy circuit is configured to update the first data rate in response to changes in the count. The policy circuit is configured to limit an aggregate data rate of the VLAN to the first data rate. The policy circuit is configured to update the limiting of the aggregate data rate of the VLAN in response to changes in the first data rate.
US09118554B2 System and method for automated DCB configuration of access switches
A system and method of automated Data Center Bridging (DCB) configuration of an access switch includes a control unit, a memory, and a port configured to couple the access switch to a peer device. The control unit is configured to operate the port according to a state machine including a DCB disabled state, a DCB downstream state, and a DCB upstream state. When the port is in the DCB disabled state, the control unit exchanges network traffic on the port without any DCB extensions. When the port is in the DCB upstream state, the control unit exchanges network traffic on the port using DCB extensions based on the DCB configuration and receives the DCB configuration from the peer device. When the port is in the DCB downstream state, the control unit exchanges network traffic on the port using the DCB extensions and transmits the DCB configuration to the peer device.
US09118550B2 Systems and methods for managing applications
A method for notifying a first device of a status of an application includes transmitting an application state transition notification message from a second device to the first device when a state transition of the application has occurred, wherein the application state transition notification message comprises information regarding at least a current state of the application and a reason of the state transition; and transmitting an application state transition response message from the first device to the second device in response to the application state transition notification message.
US09118549B2 Systems and methods for context management
Systems and methods comprising a context analyzer configured to associate one or more Hypertext Transfer Protocol (HTTP) transactions, an extensible document parser configured to parse a document included in the one or more HTTP transactions; and a library of parser additions used by the context analyzer to generate context-full replay instructions.
US09118548B2 System, device and method for distributing link state information in a communication network
A system, device, and method for distributing link state information in a communication network combines a link state routing protocol with a sliding window mechanism in order to efficiently distribute link state information. The sliding window mechanism permits a predetermined number of unacknowledged link state advertisement protocol messages to be outstanding at any given time. Unacknowledged link state advertisement protocol messages are retransmitted after a predetermined timeout period.
US09118547B2 Serial networking fiber-to-the-seat inflight entertainment system
An entertainment system that has improved failure recovery characteristics and reduces the connection components is disclosed. In one aspect, an inflight entertainment system comprises a plurality of physically interconnected head end line replaceable units and a plurality of serially-connected networking line replaceable units physically interconnected in a serial configuration, wherein two of the serially-connected networking line replaceable units at the edge of the serial configuration are physically interconnected with two of the head end line replaceable units, respectively, wherein a loop-free head end data path is maintained between active head end line replaceable units by regulating link participation in the head end data path, and wherein one or more loop-free serially-connected networking data paths are maintained between at least one of the two head end line replaceable units and active serially-connected networking line replaceable units by regulating link participation in the serially-connected networking data paths.
US09118545B2 Communicating a network event
An Agent Apparatus is described including a Detecting Device for detecting the execution of an automated function within a communication network. The Agent Apparatus further includes a Type Determining Device for determining the type of the automated function and a Writing Device for writing information representing the type of the automated function in a predefined storage area of a record carrier.
US09118544B2 Method and apparatus for providing automated processing of a switched voice service alarm
A method and apparatus for providing automated processing of a switched voice alarm on a switched and/or Internet Protocol (IP) network are disclosed. For example, the method receives an alarm associated with a switched voice service, and retrieves a Local Routing Number (LRN) or Primary Inter-exchange Carrier (PIC) information from a switch serving a call associated with a caller's telephone number. The method determines if the alarm is due to one or more service degradations, and notifies a work center responsible for one or more of the service degradations if the alarm is due to the one or more service degradations.
US09118542B2 Methods and apparatus to determine an adjustment factor for media impressions
Examples to determine media impressions are disclosed. An example method includes detecting a cookie identifier established by a database proprietor at a computing device, determining an impression of media, wherein the impression occurs after the cookie identifier is established, determining a first panelist identifier associated with the impression based on the cookie identifier, determining a second panelist identifier associated with the impression based on determination of a user identity by a panelist meter associated with the computing device, and storing an adjustment factor determined by comparing the first panelist identifier and the second panelist identifier.
US09118535B2 Method and apparatus for configuring a frequency dependent I/Q imbalance compensation filter
A method of configuring at least one frequency dependent (FD), in-phase/quadrature (I/Q), imbalance compensation filter within a radio frequency (RF) module is described. The method includes applying an input signal to an input of the RF module, receiving a filtered I-path signal for the RF module and deriving at least one I-path filtering estimate value therefrom, receiving a filtered Q-path signal for the RF module and deriving at least one Q-path filtering estimate value therefrom, and configuring the at least one FD I/Q imbalance compensation filter based at least partly on at least one ratio between the derived I-path and Q-path filtering estimate values.
US09118534B2 Transmitter and receiver
A multicarrier transmitter has a first mode, in which the transmitter is configured to transmit a first component carrier signal modulated onto a first carrier by using a first LO signal, and a second mode, in which the transmitter is configured to transmit the first component carrier signal modulated onto the first carrier and a second component carrier signal modulated onto a second carrier by using a second LO signal. The multicarrier transmitter is coupled to a controllable oscillator and configured to adapt a frequency of an LO signal output by the controllable oscillator dependent on the multicarrier transmitter being activated in the first or second mode to output the first LO signal or the second LO signal. For example, the multicarrier transmitter may be configured to switch between the first mode and the second mode while transmitting the component carrier signals.
US09118529B2 Discovery of neighbor cells
The present patent application comprises a method and apparatus to identify an address of a neighboring node, comprising the steps of identifying an existence of a neighboring cell, receiving a measurement report containing an identifier of the cell; sending an inquiry containing the identifier of the cell to a server, wherein the inquiry inquires what the IP address of the neighboring node of the cell is, and receiving an inquiry response containing the IP address of the neighboring node. In another embodiment, the inquiry containing the identifier of the cell is sent to other nodes.
US09118527B2 Data during analog audio
This application discusses among other things, apparatus and method for transmitting data with an analog signal without significantly distorting the analog signal. In an example, an apparatus can include an audio channel, a capacitor coupled to a first conductor of the audio channel, the capacitor configured to couple an analog representation of a digital data signal with an analog audio signal on the audio channel, and a frequency modulator configured to receive the digital data signal and to modulate a frequency of an output signal of the frequency modulator based on a logic level of the digital data signal, wherein the analog representation of the digital data signal includes the frequency of the output signal of the frequency modulator.
US09118526B2 Method and apparatus for controlling data storage
Disclosed are a method and an apparatus for controlling data storage. The method includes: obtaining the number of copies of to-be-placed media content; inputting user set information, server set information, media traffic demand information, and network topology information that are collected into a joint optimization model that is based on server selection and traffic engineering to perform joint optimization, and obtaining output information; performing statistics collection on the output information to obtain user access statistics of the to-be-placed media content on each cache device; and placing, according to the user access statistics of the media content and the number of copies, the copies of the to-be-placed media content so that the copies of the to-be-placed media content are preferentially placed on a cache device having large user access statistics. Embodiments of the present invention also provide an apparatus for controlling data storage.
US09118525B2 Receiver for sideband mitigation communication systems and methods for increasing communication speeds, spectral efficiency and enabling other benefits
Common wave and sideband mitigation communication systems and methods are provided that can be used with both wireless and wired communication links. The systems and methods provided can enable faster data rates, greater immunity to noise, increased bandwidth/spectrum efficiency and/or other benefits. Applications include but are not limited to: cell phones, smartphones (e.g., iPhone, BlackBerry, etc.), wireless Internet, local area networks (e.g., WiFi type applications), wide area networks (e.g., WiMAX type applications), personal digital assistants, computers, Internet service providers and communications satellites.
US09118517B2 Systems and methods for powering circuits for a communications interface
Embodiments include systems and methods of powering data communications transmitter circuitry using current sinked from biasing circuitry used to bias a transmission line between the data communications transmitter circuitry and data communications receiver circuitry. In some embodiments, the current sinked from the biasing circuitry is sourced by a power supply configured to power the data communications receiver circuitry. The current sinked from the biasing circuitry is then re-used to power the data communications transmitter circuitry. The data communications transmitter circuitry may be operated using less power overall by re-using the current first used to bias the transmission line to power the data communications transmitter circuitry. Various embodiments include HDMI transceivers, DVI transceivers, and DisplayPort transceivers.
US09118515B2 Channel estimation in wireless communication
A channel estimation processor for a receiver in a wireless communication system is described. The channel estimation processor includes a stage-1 processor (STG1) arranged to pluralities of Nsym reference symbol correlation values per slot. The channel estimation processor includes a stage-2 processor (STG2) comprising a plurality of stage-2a processors for obtaining filtered outputs per slot, a respective plurality of stage-2b processors for obtaining respective slot filter results and a stage-2 adder (STG2ADD) for obtaining channel estimates for respective anchor positions. The stage-2a processors are arranged to filter respective pluralities of reference symbol correlation values using respective reference symbol filters (ga) to obtain a respective filtered output per slot. The stage-2b processors (STG2B1) are arranged to filter a predetermined number of Nslots associated filtered reference outputs using respective slot filters (a) with respective slot-specific filter coefficients (ai) to obtain a first slot filter result. The stage-2 adder (STG2ADD) is arranged to sum the slot filter results to obtain the channel estimate for anchor symbol positions. An interpolator is arranged to, for symbol positions different from anchor symbol positions, determine a channel estimate for the symbol position from interpolating the channel estimates for two closest anchor symbol positions.
US09118514B2 Receiver and signal processing method
A receiver includes a detector to detect an interfered-with carrier from a received and demodulated signal, a fast Fourier transform computation part to perform fast Fourier transform to convert a time domain signal to a frequency domain signal and adjust an output power level of a desired carrier wave contained in the frequency domain signal based upon the detected interfered-with carrier, and a channel estimation part to estimate a channel characteristic based upon a non-interfered-with pilot signal that is not subject to influence of the interfered-with carrier and an interpolation value interpolated based upon the non-interfered-with pilot signal, the non-interfered-with pilot signal being obtained by removing, based upon the interfered-with carrier, an interfered-with pilot signal that is subject to the influence of the interfered-with carrier and an interpolation value interpolated based upon the interfered-with pilot signal.
US09118512B2 Combined imbalance compensation and equalization of a signal
Methods, systems, and apparatuses are described for compensating for impairments of a wireless device. In accordance with a disclosed method, a set of equalizer taps for an analog pipeline of the wireless device is determined. A first set of complex filter taps and a second set of complex filter taps are also determined, by modifying the set of equalizer taps according to an estimated imbalance of the analog pipeline of the wireless device. A signal associated with the analog pipeline is processed with a complex filter according to the first set of complex filter taps and the second set of complex filter taps. The processing provides a combined imbalance compensation and equalization of the signal. The complex filter may include a first complex half-filter associated with the first set of complex filter taps and a second complex half-filter associated with the second set of complex filter taps.
US09118511B1 Reflective analog finite impulse response filter
A distributed Analog Finite Impulse Response (AFIR) filter circuit with n physical taps provides an output equivalent to an AFIR filter circuit with 2n−1 taps by emulating n−1 taps. An impedance mismatch, with respect to the characteristic impedance of the input and output transmission lines, is imposed at the input and output terminals to take advantage of the resulting reflective signal paths, which emulate the additional taps. This implementation results in space-savings and power-savings for on-chip implementations of the circuit. Implementations disclosed herein are advantageous in telecommunication applications that rely heavily on copper/FR4 backplanes in serial data links.
US09118510B2 Voice over network (VoN)/voice over internet protocol (VoIP) architect having hotline and optional tie line
Voice service over a next generation network is provided using Advanced Intelligent Network solutions. According to an exemplary embodiment, a Voice over Network system includes a communications device having a directory communication address in communication with a telecommunications network, means for decoding the directory communications address to identify a voice over internet protocol service feature of the communications address, and means for establishing an internet protocol telephony communications connection of the communications device with a called party's communications address via a VoN hotline. According to further exemplary embodiments, the hotline may include a media gateway, an application server, a feature server, and means for communicating among the media gateway, the application server, and the feature server.
US09118505B2 System and method for controlling updates on a mobile device
A system and method are provided to organize updates on a mobile device. The organization of the updates can be controlled according to something detectable on the mobile device which can be correlated to something detectable in the updates. For example, updates to be displayed on the mobile device can be organized based on context provided by the mobile device, such that more relevant updates are distinguishable from those that may be less relevant. In this way, all updates are accessible to the user, but those that are deemed to be particularly relevant may be more visible and more easily accessed to avoid the need to sort through or scroll through large lists of new updates.
US09118502B2 Auto VPN troubleshooting
The invention is directed to providing a method and system for automatically determining a root cause of a failure in a packet switching telecommunications network using IP/MPLS protocols and having Virtual Private Network (VPN) services such as VLL, VPLS, VPRN.
US09118500B1 Communications system with bonding engine configured for maximum packet fragment size as adapted to communications line pairs and related method
A communications system includes at least one telecommunications access module coupled to a plurality of communications subscriber line pairs and comprising at least one bonding engine. A module is configured to receive a provisioning request and determine the total number of communications subscriber line pairs available to form a bonding group and select at least one bonding engine for the bonding group. A data processor is configured to determine a maximum packet fragment size for the data packets based on the total number of available subscriber line pairs forming the bonding group. A maximum packet fragment size is adapted to the number of communications line pairs within the bending group and the bonding engine fragments the data packets into the packet fragments. A transmitter receives the packet fragments and transmits the packet fragments over the communications subscriber line pairs forming the bonding group.
US09118499B2 Monitoring system for proactive service of devices
In one embodiment, a method for monitoring operation of a device is provided. Monitoring of the device at a source using a gateway is activated. The device is coupled to the source to receive power from the source for operation of the device. The gateway monitors an electrical characteristic of the source coupled to the device. Monitored information of the electrical characteristic is captured from the source when an event occurs at the device. The monitored information is correlated as being associated with the device. The monitored information is used in an analysis to analyze whether a variance in the monitored information violates a threshold to trigger an indication of a problem in the operation of the device.
US09118497B2 Method for mounting network attached storage NAS device, and digital media player DMP
A method for mounting a network attached storage (NAS) device, and a digital media player are provided, which includes broadcasting a discovery message for searching a network attached storage NAS device; parsing a configuration response message, which is sent by the NAS device according to the discovery message, and obtaining configuration information of the NAS device; and mounting the NAS device according to the configuration information. According to the present invention, the automatic mounting of the NAS device is realized by discovering and obtaining the configuration information of the NAS device in the network, and personally-recorded-video-contents or downloaded media contents, where the personally-recorded-video-contents or the downloaded media contents are stored in the NAS device, can be played according to the selection of a user in the case that local data storage is not supported, so as to enable a digital home user to obtain a better user experience.
US09118495B1 Communication between broadcast domains
Briefly, in accordance with an embodiment, communication between broadcast domains is described.
US09118494B2 Method for group-based multicast with non-uniform receivers
An apparatus comprising a proxy configured to couple to a sender and a receiver and to receive data from the sender at a first rate and forward the data to the receiver at a second rate that is less than the first rate. A method comprising detecting a reception speed for each of a plurality of receivers in a multicast group, assigning the receivers to a first group and a second group based on the reception speed of each of the receivers, wherein the first group has a reception speed that is faster than a reception speed of the second group, and sending multicast data intended for all of the receivers to the receivers in the first group and to a proxy at a first rate, wherein the proxy buffers the multicast data and sends the multicast data to the receivers in the second group at a second rate.
US09118493B2 Processing requests
Measures for modifying settings of communication services for Session Initiation Protocol (SIP) devices in a telecommunications network are provided. A code-containing SIP message comprising a code entered by a user of a SIP device is received from the SIP device. The code identifies a communication service. The communication service that the code relates to is determined on the basis of the received code. A function-activating SIP message comprising data specifying one or more characteristics of at least one function to be activated by the SIP device in a data collection operation is transmitted to the SIP device. A completed data-containing SIP message comprising communication service data entered by the user of the SIP device is received from the SIP device. The communication service data is processed in accordance with the identified communication service.
US09118487B1 Asymmetric encryption scheme with expiring revocable certificates having a predefined validity period
Methods and apparatus are provided for an asymmetric encryption scheme with expiring revocable certificates having a predefined validity period. Communications between two devices are secured by obtaining an expiring revocable certificate; and securing said communicating with said expiring revocable certificate using asymmetric encryption. A prior expiring revocable certificate can be revoked when a new expiring revocable certificate is issued to at least one device. The expiring revocable certificate has a predefined validity period (based, for example, on a longest expected connection drop-out duration). A new expiring revocable certificate is requested at least once for each predefined revocation period. The expiring revocable certificate is revoked after the predefined revocation period, for example, only if a connection between the two devices is maintained.
US09118485B2 Using an OCSP responder as a CRL distribution point
A certificate status distribution system receives a request from a client pertaining to a status of a certificate and determines whether the client is an online certificate status protocol (OCSP) compliant client. The certificate status distribution system sends the certificate status to the client using OCSP in response to a determination that the client is an OCSP compliant client and sends a certificate revocation list to the client in response to a determination that the client is not an OCSP compliant client.
US09118484B1 Automatic configuration and provisioning of SSL server certificates
A method and apparatus for automatically configuring and provisioning cryptographic certificates is described. A certificate management sensor receives instructions from a first computing device to analyze a second computing device to identify an application on the second computing device associated with cryptographic network traffic on the second computing device, generates an application fingerprint based on application characteristics of the application, transmits the application fingerprint and a certificate signing request (CSR) to a certificate management system (CMS), and receives second instructions from the CMS to automatically install a cryptographic certificate on the second computing device based on the application fingerprint and CSR.
US09118475B2 Method and system for detecting enhanced relative grants in a wireless communications system
Aspects of a method and system for detecting enhanced relative grants in a wireless communications system may include measuring a signal power level of an Enhanced Hybrid ARQ Indicator Channel (E-HICH) and estimating a HOLD signal level of an Enhanced Dedicated Channel (E-DCH) Relative Grant Channel (E-RGCH), based on the measured E-HICH signal power level, wherein the E-RGCH is associated with the E-HICH. The signal power level of the E-HICH in Transmission Time Intervals (TTIs) associated with the E-HICH may be measured. The HOLD signal level may be measured by compensating the measured signal power level of the E-HICH based on whether the E-HICH signal comprises an acknowledgment (ACK), a discontinuous transmission (DTX), or a negative acknowledgment (NACK). The measured signal power level may be compensated by an offset. An UP signal level of the E-RGCH signal may be estimated based on the estimated HOLD signal level.
US09118471B2 Method and arrangement in a telecommunication system
A method in a terminal for providing an ACK/NAK message to a base station is provided. The terminal counts the number of assigned downlink subframes detected from the base station resulting in k. The terminal then establishes whether each of a number of transport blocks comprised in the counted k downlink subframes is correctly received or not. In the case when each one of the transport blocks, comprised in the k downlink subframes is estimated as correctly received the terminal provides to the base station an encoded ACK message for the k subframes, which comprises k, the number of subframes.
US09118461B2 Code diversity method and system
A software diversity system including an executable provider to provide an executable program including component blocks such that different combinations of blocks are operative to perform a functionally encryption keys functionally equivalent data transformation, a cipher to encrypt the component blocks with cryptographic keys, a key selector to select a first selection of keys for a first device, such that the first selection is operative to decrypt a first combination of the blocks operative when executed to perform the same functionally equivalent data transformation, and select a second selection of keys for a second device, such that the second selection is operative to decrypt a second combination of the blocks operative when executed to perform the same functionally equivalent data transformation, and a transfer module to prepare for transfer the first and second selection of cryptographic keys for transfer to the first and second device, respectively. Related apparatus and methods are also included.
US09118460B2 Clock and data recovery circuit
A CDR circuit includes an AD converter that converts an analog input signal to a digital output signal according to an operation clock signal; a phase adjuster that subtracts a first phase from a first clock signal having a first frequency equal to a frequency of the input signal to output a second clock signal having a second frequency as the operation clock signal to the AD converter; a phase detector that detects a second phase in the output signal of the AD converter; a filter that obtains a third phase by performing a filtering process based on the first phase, the second phase, and the third phase output from the filter; an adder that adds the first phase and the third phase to obtain a fourth phase; and a decision circuit that obtains recovered data from the output signal of the AD converter using the fourth phase.
US09118456B2 Method and system for transmitting multi-carrier uplink data at network-side
The present invention discloses a method and system for transmitting multi-carrier uplink data at a network side. The method comprises: whenever setting up or adding a multi-carrier enhanced dedicated channel cell, a radio network controller notifying a NodeB dominating the multi-carrier enhanced dedicated channel cell of carrier identifier information of a carrier corresponding to the multi-carrier enhanced dedicated channel cell; and whenever receiving data transmitted by a terminal using a multi-carrier high-speed uplink packet access technique in the multi-carrier enhanced dedicated channel cell via the carrier, the NodeB carrying the carrier identifier information of the carrier bearing the data in enhanced dedicated channel uplink data frames when constructing the enhanced dedicated channel uplink data frames, and transmitting the constructed enhanced dedicated channel uplink data frames to the radio network controller. The present invention can avoid the problem of confusion of the received data from different carriers.
US09118455B2 Dynamic bandwidth resource allocation for satellite downlinks
Satellite communications systems, methods, and related devices are described. In one embodiment, a satellite communications system is configured to dynamically allocate bandwidth among different downlink beams. The satellite may receive and compile traffic measurements and terminal parameters. The satellite may be configured with different downlink beam coverage areas, and may dynamically allocate downlink bandwidth and particular frequency channels to different beam coverage areas based on the measurements and parameters. The satellite may also assign frequency channels and time slots based on such measurements and parameters.
US09118447B1 Sampling position tuning
An apparatus generally relating to a receiver is disclosed. In this apparatus, the receiver includes a phase interpolator, a detector and a slicer. The slicer is coupled to the phase interpolator to provide a sampling signal for a sampling position of the phase interpolator. The detector is coupled to the slicer to receive the sampling signal. The detector is configured to adjust a code of the phase interpolator to adjust the sampling position iteratively in response to the sampling signal to tune the sampling position of the receiver toward an optimum therefor.
US09118441B2 Layout-optimized random mask distribution system and method
A data processing system includes a module for generating and distributing random masks to a number of cryptographic accelerators while providing for fewer total interconnects among the components generating the random masks. The module segments the tasks associated with generating random masks across a number of modules and blocks such that routing and timing problems can be minimized and layout can be optimized. A method for generating and distributing random masks to a number of cryptographic accelerators is also provided. The random masks are utilized by cryptographic accelerators to protect secret keys, and data associated with those keys, from discovery by unauthorized users.
US09118440B2 Channel information compressing apparatus adapted to a MIMO system and method
A channel information compressing apparatus of the present invention includes a DCT part that performs discrete cosine transform on channel information (CSI) representing the state of a communication channel, and an information compressor that compresses high frequency components of information included in discrete cosine transform data which is produced by way of discrete cosine transform, thus compressing information while maintaining a good accuracy of channel information.
US09118438B2 Communication apparatus and communication method
A communication quality managing unit acquires or calculates a communication quality of a received signal at a different counterpart communication apparatus. A terminal model identifying unit identifies a model of the different counterpart communication apparatus. A switchover table storing unit stores a table, in which a communication quality corresponding to a requirement for switchover of a communication mode is set, for each model of the different counterpart communication apparatus. A switching unit refers to the table on the basis of the communication quality and the model of the different counterpart communication apparatus to switch a setting of a communication mode for a transmitting signal from a non-spatial multiplexing mode to a spatial multiplexing mode or from the spatial multiplexing mode to the non-spatial multiplexing mode. A transmitting unit processes the transmitting signal to output the processed signal to a plurality of antennas, on the basis of the set communication mode.
US09118434B2 Optical transmitting apparatus and optical detecting apparatus
An optical transmitting apparatus includes semiconductor laser elements. Upon receiving laser beams, a multiplexed beam is emitted from a wavelength multiplexing filter. The wavelength multiplexing filter includes a triangular prism and a wavelength multiplexing filter film. A front end face and a rear end face of the prism are not parallel to each other so that a prism angle at which a surface parallel to the front end face intersects a surface parallel to the rear end face, is an acute angle. The prism angle is the angle at which the laser beam impinging from the front end face into the triangular prism is reflected by the wavelength multiplexing filter film toward the front end face and the multiplexed beam is directed to the optical axis side of the optical fiber.
US09118433B2 GPON OAM using IEEE 802.1ag methodology
Operations, administration and management (OAM) functions in a passive optical network (PON) can be performed by providing a system of flow points (i.e., software entities), such as those along the lines of the Maintenance End Points (MEPs) and Maintenance Intermediate Points (MIPs) described in the IEEE 802.1ag specification, which communicate connectivity fault test messages with each other. The flow points can be provided in the Optical Line Terminal (OLT) and Optical Network Terminator (ONT). Alternatively or in addition, flow points can be provided in a subscriber gateway coupled to the ONT. The flow points issue test messages, to which other flow points can respond with information regarding the state of network connectivity.
US09118431B2 Video service manager
A method may include receiving a first order associated with processing a media file and estimating resources associated with fulfilling the first order. The method may also include generating a first logical circuit representing network elements to fulfill the first order and connections between the network elements. The method may further include allocating resources based on the first logical circuit and executing the order using the allocated resources.
US09118430B2 Broadcast equipment communication protocol
A data link manager includes a User Datagram Protocol (UDP) receiver for receiving HD Radio broadcast equipment communication protocol (HDP) data or non-HD Radio broadcast equipment communication protocol (non-HDP) data using a User Datagram Protocol/Internet Protocol (UDP/IP) protocol; a Transmission Control Protocol (TCP) receiver; and a router for receiving data from the UDP receiver and the TCP receiver, for searching for a destination route in a routing table, and for forwarding the data received from the from the UDP receiver and the TCP receiver to an identified destination route.
US09118428B2 Geographic advertising using a scalable wireless geocast protocol
Geographic advertising utilizes a location of a mobile communications device to infer potential interest in a product and/or service. A scalable network protocol is utilized to provide advertisements, coupons, discounts, or the like, to mobile communications devices that are within a select geographic area or areas. A geographically addressed message is formulated based on the location of a potential customer and the content to be provided to potential customer. A message is generated at the time it is sent based on a current location of mobile communications device in the select geographic area. A protocol is utilized that replaces an IP address with a geographic location.
US09118425B2 Transport stream multiplexers and methods for providing packets on a transport stream
Examples described include transport stream multiplexers that may not need to search for an appropriate source to use to generate a transport stream packet. Instead, the source to use may be indicated by a position (e.g. an entry) in a memory table, e.g. a metadata array. Methods for placing transport stream packets on a transport stream and initializing the metadata array are also described.
US09118418B2 High speed data serial connection interface apparatus, CPRI transmitting and receiving method
A high speed data serial connection interface apparatus, CPRI transmitting and receiving methods thereof are disclosed. A high speed data serial connection interface apparatus according to the present invention includes: a data transmitter configured to count a continuous NCB of 0 or 1 in an input data block, select an LSI value, and perform up scaling on data in the block in accordance with the selected LSI value to transmit the data through an optical fiber in accordance with a CPRI (common public radio interface) protocol; and a data receiver configured to receive the data transmitted by the data transmitter, restore the LSI value from the received data, and perform down scaling on the received data in accordance with the restored LSI value to restore original data.
US09118417B2 Connector system, connecting cable and receiving tool
A connector provided on a projector has an RF chip. A plug connected to the connector has an RF chip at a position opposite to the RF chip of the connector. When a protruding section of the plug is inserted and fit into an aperture section of the connector, the RF chip of the plug and the RF chip of the connector perform wireless communication with each other in a non-contact state. Thus, a connecting tool can be easily attached to/detached from a receiving tool without breaking a terminal due to contact such as in a case where a conventional contact type terminal is used.
US09118415B2 Visible light communication with increased signal-to-noise ratio
A method of increasing modulation of a visible light signal. The method can include receiving a signal that corresponds to the visible light signal, where the visible light signal has a magnitude. The method can also include adjusting, by a controller and based on the signal, a dimmer level of a dimmer by an amount, where the amount is proportional to the magnitude of the visible light signal, and where the dimmer level adjusts an output of a driver circuit. The visible light signal and the output of the driver circuit can be combined into a power signal and sent to one or more light sources. The one or more light sources can use the power signal to generate a light output that includes a visible light communication signal that is received by a receiver.
US09118414B2 Apparatus, system and method for network monitoring
Systems, methods, and devices are disclosed for monitoring optical communications between a managed location and a remote location. In particular, an optical signal is transmitted over an optical fiber and passed-through a test device. A portion of the optical signal is filtered from the original optical signal and passed to a monitoring unit. The monitoring unit may instruct one or more switches in the test device to loop the optical signal back toward the managed location. Subsequently, testing and monitoring may be performed at the managed location. The device may provide a test output or may transmit the information to the managed location.
US09118408B2 Methods and apparatus for improving performance based on filter characteristics
Methods and apparatus for improving operational and/or cost performance based on filter characteristics. Existing schemes for measuring filter performance are based on a worst case filter performance across a range of frequencies and temperature. Filter performance can be more accurately characterized over one or more frequency ranges. In one exemplary embodiment the frequency is characterized according to a functional (e.g., linear-average) metric. By providing more accurate representation of the reception/transmission filter performance, both network and device optimizations can aggressively manage available power and handle smaller (tighter) margins.
US09118407B2 Self-propelled buoy for monitoring underwater objects
Various embodiments of the invention provide a buoy and system for monitoring divers and other underwater objects. In many embodiments, the buoy has capabilities to monitor a diver, obtain position information about the diver and use that information to move itself to an effective range for continued monitoring. The buoy can connect and communicate with a communication device attached to a diver to communicate, position, biometric and other data. In one embodiment, the buoy comprises a propulsion system for propelling the buoy, an acoustic communication module for communicating with the diver and a propulsion controller for controlling the propulsion system to move to the effective range. Other embodiments provide a power generation system using a power generating buoy comprising an inertial weight, an energy converter and a connecting linkage. The system may comprise a single or multiple buoys and can include an electrical storage such as an electrical battery.
US09118406B2 Measurement apparatus and measurement method
The measurement apparatus 10 includes a transmission and reception unit 14 that receives a continuous test signal which is output from the mobile terminal 30 and in which test signals based on the plurality of communication methods continue at predetermined time intervals, an acquisition section 21 that sequentially acquires the test signals based on the plurality of communication methods included in the continuous test signal, a measurement section 22 that sequentially measures the test signals acquired by the acquisition section 21, a measurement result storage section 23 that sequentially stores the data of the measurement result of the measurement section 22, and a display unit 15 that displays the data of the measurement result stored in the measurement result storage section 23.
US09118405B2 Sound suppression system and controlled generation of same at a distance
A system to suppress sound emerging from speakers and the generation of same at a distance is presented. This system includes devices to handle audio which when manipulated, in their different applications, are capable of reducing or of eliminating the acoustic impact or sound unwanted by people or by the environment. The present system includes a combination of known devices to handle audible signals or sound that allow for the analysis of the characteristics or specifications of sound or for the generation of an identical signal which can be inverted and mixed with the output signal to cancel sound and at the same time to suppress the inverted signal at a distance and in this way to once again generate sound at a distance. Considering the above, the scope of the present invention falls within the scope of the universe to transmit, mix, and suppress sound.
US09118404B2 Apparatus, system and method for underwater signaling of audio messages to a diver
Embodiments of the invention provide a system, apparatus and methods for underwater voice communication between a diver and an underwater electronic device. In many embodiments, the system includes a dive computer which generates audio signals corresponding to spoken messages and a mouthpiece apparatus having an acoustic transducer that conducts sound via conduction through the diver's teeth and skull to the cochlea so as to allow the diver to hear the messages and other sounds and a microphone for sensing the diver's voice. The mouthpiece is adapted to be easily attached to portions of a SCUBA or other underwater breathing apparatus. It may also be attached or integral to a snorkel or similar apparatus.
US09118400B2 Methods for managing alignment and latency in interference suppression
An interference cancelling receiver combines data from multiple paths after aligning to transmitter timing, and uses either an equalizer or a Rake receiver to compute symbol estimates. Interference estimates are generated from the symbol estimates, and multiple interference estimates are combined after re-aligning the interference estimates to receiver timing. At least two segments of symbol estimates are computed for each segment of interference cancelled data.Various techniques may be employed for controlling the latency and sequencing of these operations, and the subsystems within the canceller may use different processing clock speeds.
US09118392B2 Isolated serializer-deserializer
A first integrated circuit die receives input data from a plurality of input channels and combines the input data from the plurality of input channels into combined data. The first integrated circuit die transmits the combined data across an isolation communication channel. A second integrated circuit die that is coupled to the isolation communication channel decodes the transmitted combined data and supplies the decoded transmitted combined data to respective output channels corresponding to the input channels.
US09118389B1 Efficient bandwidth utilization methods for CATV DOCSIS channels and other applications
Methods to improve the data carrying capacity of CATV DOCSIS systems and other communications systems are disclosed. Communications channels may be more efficiently spaced with reduced or absent guard bands by using receivers with adaptive signal cancellation methods, equalizing circuits, or polyphase filter banks and Fast Fourier Transform signal processing methods to correct for higher levels of cross-talk. QAM type communications channels may also be utilized on a synchronized two-transmitter at a time basis by adjusting the transmitters to predefined signal levels, such as +1, −1, +½, −½ to enable the combined signals to be distinguished at the receiver. These two methods may be combined to create a still higher data throughput system.
US09118387B2 Pilot reference transmission for a wireless communication system
A pilot reference transmission scheme well suited for high data rate wireless communication systems is disclosed. To maximize the amount of interference from transmissions from neighboring transmission sources (e.g., access points or base stations) during the pilot interval, and hence minimize the amount of interference from non-transmitting sources during the data intervals, the pilot references are transmitted in bursts at predetermined time intervals, and the pilot bursts from the access points are synchronized. This results in maximum interference contributions from non-transmitting neighboring access points, facilitating reliable estimation of worst case carrier-to-interference (C/I), and further allows the receiving devices (e.g., access terminals) to easily recognize the bursts as pilot reference. In one embodiment, each access point transmits the pilot bursts at or near its maximum transmit power level and no user-specific data is transmitted during the pilot bursts.
US09118384B2 Payload for a multi-beam satellite
A payload includes one or more antennas for receiving polarized radiofrequency signals; a device for regenerating radiofrequency signals by filtering, frequency transposition, and amplification; and antennas for transmitting the regenerated radiofrequency signals to one or more terrestrial terminals. The radiofrequency signal regeneration device includes a plurality of regeneration channels, each channel consisting of an amplification device capable of amplifying two radiofrequency signals having separate frequency bands and the transmission antennas associated with a regeneration chain are capable of transmitting two regenerated radiofrequency signals having orthogonal polarization directions and intended for cells belonging to a single cell layout that uses at least two separate frequency bands and two separate polarizations.
US09118379B2 Dual N-port MPA
A hybrid network is disclosed having at least one hybrid coupler, and a plurality of circulators, each circulator having a first port connected to the hybrid network, and further having a second port and a third port. Each circulator is arranged to direct a signal received via the second port to the hybrid network via the first port, and to direct a signal received from the hybrid network towards the third port.
US09118377B2 Method for interference and carrier power estimation and its application to automatic gain control and signal-to-interference-and-noise-ratio computation
A system and method are provided for estimating interference power at a receiver antenna in a communications systems receiver, in which an interference type signal associated with a received radio signal is detected, an in-band interference power associated with the received radio signal is determined, and an interference power at the antenna is estimated using the determined in-band interference power and the detected interference type. Estimating the interference power at the antenna includes interpolating the determined in-band interference power using scaling factors determined by the interference type signal associated with the received radio signal. The system and method determine in-band carrier power associated with the radio signal based on a channel estimate h(k), and the in-band interference information is based on interference samples I(n). In addition, an average total power, automatic gain control (AGC) setting, and signal-to-information-and-noise ratio can be determined by the system and method.
US09118374B2 Integrated circuit with inter-chip link for boot-up
An integrated circuit includes a first port for conducting a first plurality of signals, a second port for conducting a second plurality of signals, a data path coupled between the first port and the second port, a controller, and a processor having an input and an output. In a first mode, the controller causes the data path to conduct at least one signal received on the first port to the second port. In a second mode, the controller controls the processor to output signals to the second port.
US09118371B2 Digital transmitter and method for compensating mismatch in digital transmitter
A digital transmitter includes: a plurality of converting devices arranged to generate a plurality of converting signals according to a plurality of digital input signals; a compensation device arranged to generate at least one compensation signal according to the plurality of digital input signals; and a combining circuit arranged to output an amplified output signal according to the plurality of converting signals and the at least one compensation signal.
US09118369B2 Signaling of sequence generator initialization parameters for uplink reference signal generation
A base station initializes pseudo-random sequence generators on which wireless devices base generation of uplink reference signals. The base station determines a first sequence from a first subset of possible initialization sequences for a sequence generator of a first device, and determines a second sequence from a second subset of possible initialization sequences for a sequence generator of a second device. The range of this second subset spans at least the range of the first subset. The base station further encodes the first sequence as a first set of two or more parameters, and encodes the second sequence as a second set of one or more parameters. This second set includes at least one parameter not included in the first set, and comprises fewer bits than the first set. The base station initializes the sequence generators by transmitting the first and second sets of parameters to the devices.
US09118368B1 Feeding an outgoing signal back to a pre-distortion module
A signal coupler can couple a processed version of an outgoing signal from a transmission path to a receive path in a transceiver. A connector can provide the processed version of the outgoing signal to a pre-distortion module, which can generate a pre-distortion signal to pre-compensate outgoing signals in the transmission path of the transceiver. A receive path of a transceiver can thus be utilized as a feedback path to a pre-distortion module.
US09118367B2 Wideband power efficient high transmission power radio frequency (RF) transmitter
Embodiments provide transmitter topologies that improve the power efficiency and bandwidth of RF transmitters for high transmission power applications. In an embodiment, the common-emitter/source PA of conventional topologies is replaced with a current-input common-base/gate PA, which is stacked on top on an open-collector/drain current-output transmitter. The common-base/gate PA protects the output of the transmitter from large output voltage swings. The low input impedance of the common-base/gate PA makes the PA less susceptible to frequency roll-off, even in the presence of large parasitic capacitance produced by the transmitter. At the same time, the low input impedance of the common-base/gate PA reduces the voltage swing at the transmitter output and prevents the transmitter output from being compressed or modulated. In an embodiment, the DC output current of the transmitter is reused to bias the PA, which results in power savings compared to conventional transmitter topologies.
US09118366B2 Method and apparatus for calibrating an envelope tracking system
A method of calibrating an envelope tracking system for a supply voltage for a power amplifier module within a radio frequency (RF) transmitter module of a wireless communication unit. The method includes, within at least one signal processing module of the wireless communication unit, applying a training signal having an envelope that varies with time to an input of the RF transmitter module, receiving at least an indication of instantaneous output signal values for the power amplifier module in response to the training signal, calculating instantaneous gain values based at least partly on the received output power values, and adjusting a mapping function between an instantaneous envelope of a waveform signal to be amplified by the power amplifier module and the power amplifier module supply voltage to achieve a constant power amplifier module gain.
US09118365B2 Method of transmitting and receiving data symbols
Disclosed is a method for transmitting from a transmitter device having M transmit antennas to a receiver device having N+C receive antennas, where M, N, and C are integers greater than or equal to 1. In one embodiment, the method comprises a process of spatial frequency multiplexing a block of N data symbols D1, D2, . . . , DN resulting in a block of N payload spatial symbols Su,1, Su,2, . . . , Su,N, using an inverse discrete Fourier transform (IDFT), a process of adding C redundancy spatial symbols to the block of N payload spatial symbols, resulting in a block of N+C spatial symbols S1, S2, . . . , SN+C, and a process of precoding the block of N+C spatial symbols S1, S2, . . . , SN+C with the help of a focusing matrix of dimensions M×(N+C), delivering M precoded spatial symbols X1, X2, . . . , XM, each precoded spatial symbol being transmitted over a distinct transmit antenna.
US09118364B2 Differential feedback within single user, multiple user, multiple access, and/or MIMO wireless communications
Differential feedback within multiple user, multiple access, and/or MIMO wireless communications. After full feedback signal(s) have been received by a communication device (e.g., one that is to be performing beamforming for use in subsequent signal transmission), differential feedback signal(s) are received. Those differential feedback signal(s) are employed to update the full feedback signal(s) thereby generating updated/modified full feedback signals. Over time, such updated/modified full feedback signals may subsequently be further updated based upon later received inferential feedback signal(s). Such differential feedback signaling takes advantage of time and/or frequency correlation in a communication channel to provide for reduced feedback overhead by feeding back a difference or delta (Δ) relative to a previous value. For example, instead of providing full feedback signals in each respective/successive communication, feedback overhead is reduced by providing a difference or delta (Δ).
US09118362B2 System for selecting transmission mode under multi-input multi-output based on scheduling number and method thereof
A system for selecting a transmission mode under the multi-input multi-output (MIMO) architecture based on a scheduling number and a method thereof are provided. A modulation coding of the spatial diversity (SD) mode and the spatial multiplexing (SM) mode according to channel state information sent from client ends is determined, respectively. The SD mode or the SM mode is selected in accordance with a scheduling number of using the SD mode and a scheduling number of using the SM mode, respectively. The transmission mode is selected based on the spectrum utilization and the scheduling rate, which achieves improving the spectrum utilization on the premise of the scheduling rate.
US09118361B2 Phased array antenna system with multiple beam
A phased array antenna system with multiple beams incorporates a CDMA base station (32) with multiple ports 341to 36N for positive and negative polarisation signals connected to ports 401 to 42N of an antenna assembly (44). The antenna assembly (44) is single stack and multi-port, and it provides multiple antenna beams with polarisation diversity and different vertical angles of electrical tilt which are fixed or variable. It is suitable for 3G mobile radio using CDMA. Different antenna beams may carry groups of data channels distinguished either by different channelisation process coding or by different scrambling process coding. An operator may use two or more beams simultaneously. Control of angle of electrical tilt of antenna beams may be implemented by introducing variable relative delay between signals associated with different antenna ports A(+) and B(+) and feeding them to a signal splitting and combining network providing antenna element signals.
US09118358B2 Methods and apparatus for selecting between multiple carriers using a single receiver chain tuned to a single carrier
Receivers accommodating carrier frequency selection methods in wireless communications systems employing multiple carrier frequencies are described. Although the receiver is tuned to a single band, an estimate of the channel quality corresponding to the currently used carrier and an alternative carrier is generated without switching between carriers. Transmitters of different cells and/or different sectors primarily use different carrier frequencies but periodically transmit using a neighboring sector's carrier frequency. Mobile node receivers use a single RF chain with a controllable RF filter to receive and process a signal within a first selected carrier band including two components, a first signal component identified with the first currently selected band and a second signal component identified with a second alternative band. Separate quality indicator values are obtained from the first and second signal components, compared, and a determination is made as to whether the receiver's RF filter should be switched to the second band.
US09118355B2 Apparatus and method for connecting to device in wireless terminal
An apparatus and a method for connecting to a device in a wireless terminal, and more particularly, to an apparatus and method for more conveniently connecting to a desired device in a communication mode of a wireless terminal are provided. The apparatus includes a near distance communication module for exchanging device information for a communication connection through a contact with a specific device, and a controller for controlling the near distance communication module to connect communication to the specific device based on the exchanged device information.
US09118352B2 Remedying low densities of ONEs in transmission and reception of digital television signals
In a DTV transmitter the bits of shortened BCH codewords that exhibit undesirably low densities of ONEs are ONEs' complemented before being further coded, and used to modulate carrier waves. In a DTV receiver the further coding is decoded after demodulation. The results of such decoding are processed to recover successive shortened BCH codewords, some of which are in TRUE form and others of which have had their bits ONEs' complemented. Each shortened BCH codeword is extended to full length with ZEROs, and decoding is attempted. Successful decoding confirms that the shortened BCH codeword was received in TRUE form. If decoding is unsuccessful, the bits of the shortened BCH codeword as received are ONEs' complemented, extended to full length with ZEROs, and decoding is attempted. Successful decoding confirms that the shortened BCH codeword was received in ONEs' complemented form and has subsequently been converted to TRUE form.
US09118351B2 System and method for signature-based redundancy comparison
A system and method for signature-based redundancy comparison provides for receiving, by a master part, an input signal and generating, by the master part, a binary output signal, generating a delayed input signal based on the input signal, generating a first output signature based on the binary output signal, and generating a delayed first output signature based on the first output signature. The system and method further comprise generating a delayed binary output signal based on the delayed input signal, generating, by a checker part, a delayed second output signature based on the delayed binary output signal, comparing the delayed first output signature with the delayed second output signature, and generating an error signal, where the state of the error signal is based upon the comparison.
US09118350B2 Methods, apparatus, and systems for coding with constrained interleaving
Serially-concatenated codes are formed in accordance with the present invention using a constrained interleaver. The constrained interleaver cause the minimum distance of the serial concatenated code to increase above the minimum distance of the inner code alone by adding a constraint that forces some or all of the distance of the outer code onto the serially-concatenated code. This allows the serially-concatenated code to be jointly optimized in terms of both minimum distance and error coefficient to provide significant performance advantages. Constrained interleaving can be summarized in that it: 1) uses an outer code that is a block code or a non-recursive convolutional code, and as such, there are multiple codewords present in the constrained interleaver, 2) selects a desired MHD, 3) selects an interleaver size and a set of predefined interleaver constraints to prevent undesired (low-distance) error events so as to achieve the desired MHD, and 4) performs uniform interleaving among the allowable (non-constrained) positions, to thereby maximize or otherwise improve the interleaver gain subject to the constraints imposed to maintain the desired MHD.
US09118349B1 Continuous parallel cyclic BCH decoding architecture
Circuitry for, in p parallel streams, searching a codeword having n symbols for roots of a cyclic code polynomial having a number of terms includes a plurality of multipliers, a source of constants derived from roots of the polynomial, and at least one counter that supplies an index. For each received symbol of the codeword, the multipliers multiply respective terms of the polynomial for a previous received symbol by constants from the source of constants, the counter advances to select respective products of the constants and the respective terms for the previous received symbol.
US09118347B1 Method and apparatus for OFDM encoding and decoding
Systems and methods are provided for communicating on a cellular telecommunications network. A system includes a receiver interface configured to receive an orthogonal frequency division multiplexing (OFDM) signal that includes transmitted data encoded according to a particular coding matrix. A processing unit is configured to receive the OFDM signal, where the processing unit is configured to decode data from the OFDM signal by solving a matrix optimization. A computer-readable memory is configured to store the decoded data.
US09118346B2 Complementary switches in current switching digital to analog converters
The present disclosure provides embodiments of an improved current steering switching element for use in a digital to analog (DAC) converter. Typically, each current steering switching element in the DAC converter provides a varying set of currents for converting a digital input signal. Generally, the switches and drivers in the current steering switching elements are scaled down proportionally to the current being provided by the current steering switching element according to a ratio as less and less current is being driven by the switching element in order to overcome timing errors. However, device sizes are limited by the production process. When a switch is not scaled proportionally to the current, settling timing errors are present and affects the performance of the DAC. The improved current steering switching element alleviates this issue of timing errors by replacing the single switch with two complementary current steering switches.
US09118345B2 Data compression profiler for configuration of compression
A method and apparatus for determining one or more compression parameters suitable to compress a class of signals, may include inputting a test data set, being representative of a data set to be compressed, characterizing the test data, selecting a compression algorithm, calculating a distortion level to be used in determining the compression ratio (or a compression ratio to be used in determining the distortion level), generating a computer implemented model for the test data, selecting a recommended operating point based on a computer implemented model, and determining compression parameters corresponding to the operating point. The compression parameters may subsequently be applied for configuration of compression applied to one or more production data sets that are similar to the test data. This abstract does not limit the scope of the invention as described in the claims.
US09118344B2 Analog-to-digital converter
A continuous-time ΔΣ-ADC (1) is disclosed, comprising a sampled quantizer (5) arranged to generate samples y(n) of a digital output signal of the ΔΣ-ADC (1) at sample instants nT. The ΔΣ-ADC (1) further comprises two or more DACs (10a-b), each arranged to generate an analog feedback signal based on the samples of the digital output signal generated by the sampled quantizer (5), and a continuous-time analog network (20) arranged to generate an analog input signal to the quantizer (5) based on the feedback signal(s) from the two or more DACs (10a-b) and an analog input signal to the ΔΣ-ADC (1). At least a first DAC (10a) of the two or more DACs (10a-b) is adapted to generate a pulsed feedback signal that, for each n, comprises a pulse, the magnitude of which is proportional to the sample of the digital output signal at sample instant nT and which lasts between the time instants (n+a1)T and (η+β1)T, wherein 0<α1<β1<1. Aí least a second DAC (10b) of the two or more DACs (10a-b) is adapted to generate a pulsed feedback signal that, for each n, comprises a pulse, the magnitude of which is proportional to the sample of the digital output signal at sample instant nT and which lasts between the time instants (n+a2)T and (η+β2)T, wherein 0
US09118340B2 Analog-to-digital converter and analog-to-digital conversion method
According to an embodiment, an analog-to-digital converter includes a first AD (analog-to-digital) conversion circuit and a second AD conversion circuit. The first AD conversion circuit performs AD conversion of a first input signal to generate an upper-bit digital signal. The second AD conversion circuit performs AD conversion of a sampled signal to generate a lower-bit digital signal. The sampled signal is obtained by sampling a residual signal corresponding to a residue of the AD conversion in the first AD conversion circuit. A period during which the second AD conversion circuit performs AD conversion of the sampled signal overlaps a period during which a second input signal subsequent to the first input signal is settled.
US09118338B2 Offset compensation circuit and method thereof
A current-steering offset compensation circuit is configured for compensating an offset caused by process variation or environment variation of a signal processor. The signal processor includes a pair of differential input terminals and a pair of differential output terminals. The current-steering offset compensation circuit comprises a current-steering circuit connected with the signal processor, a digital control unit which generates a digital control signal according to the outputs from the pair of differential output terminals of the signal processor, and a digital-to-analog converter which receives the digital control signal and outputs a control voltage, wherein the current-steering circuit receives the control voltage, so as to steer the current of the pair of differential input terminals, to reduce the offset in the signal processor.
US09118336B2 Physical system for chip-scale CPT atomic clock
A physical system for a chip-scale coherent population trapping (CPT) atomic clock. The physical system includes: a vertical-cavity surface-emitting laser (VCSEL) device, a first polarizing beam splitter, a first λ/4 wave plate, a chip of an atomic vapor cell, a second λ/4 wave plate, a reflection device, a lens, a second polarizing beam splitter, and a photo detector. The first polarizing beam splitter, the first λ/4 wave plate, the chip of the atomic vapor cell, the second λ/4 wave plate, and the reflection device are disposed in sequence. The lens, the second polarizing beam splitter, and the photo detector are disposed in sequence.
US09118335B2 High resolution millimeter wave digitally controlled oscillator with reconfigurable distributed metal capacitor passive resonators
A novel and useful millimeter-wave digitally controlled oscillator (DCO) that achieve a tuning range greater than 10% and fine frequency resolution less than 1 MHz. Switched metal capacitors are distributed across a passive resonator for tuning the oscillation frequency. To obtain sub-MHz frequency resolution, tuning step attenuation techniques are used that exploit an inductor and a transformer. A 60-GHz fine-resolution inductor-based DCO (L-DCO) and a 60 GHz transformer-coupled DCO (T-DCO), both fabricated in 90 nm CMOS, are disclosed. The phase noise of both DCOs is lower than −90.5 dBc/Hz at 1 MHz offset across 56 to 62 GHz frequency range. The T-DCO achieves a fine frequency tuning step of 2.5 MHz, whereas the L-DCO tuning step is over one order of magnitude finer at 160 kHz.
US09118333B1 Self-adaptive multi-modulus dividers containing div2/3 cells therein
Integrated circuit devices include programmable dividers, such as fractional-N dividers, which can utilize multi-modulus dividers (MMD) therein. A multi-modulus divider includes a cascaded chain of div2/3 cells configured to support a chain length control operation that precludes generation of an intermediate divisor in response to a change in value of a chain length control byte P during an update time interval and may even fully turn off one or more of the div2/3 cells not participating in a divide-by-N operation, where N is a positive integer greater than one. The div2/3 cells are configured to include a modulus input terminal and a modulus output terminal and the chain length control operation is independent of the magnitude of the signals provided to the modulus input terminals of the div2/3 cells.
US09118330B2 Directional capacitive proximity sensor
The present disclosure relates to a method for detecting an object near an electronic system, comprising steps of: forming electrodes around a central area, on an electrically insulating medium, determining measurements representative of the capacitance of the electrodes, and comparing the measurements with a detection threshold, and deducing whether or not an object is near the central area in a detection, the electrically insulating medium on which the electrodes are formed being deposited on an electrically conductive medium forming a shield, the capacitance measurements being taken by simultaneously activating all the electrodes.
US09118318B2 Driving circuit and driving method
A driving circuit includes a first driving module, configured to operate at a first operating voltage in a first mode and configured to be deactivated in a second mode; and a second driving module, wherein at least part of the second driving module operates at a protection voltage in the first mode and operates at a second operating voltage in the second mode, wherein the second operating voltage and the protection voltage are lower than the first operating voltage.
US09118317B2 Transmitter swing control circuit and method
Disclosed herein are embodiments of a swing compensation scheme for compensating errors in a transmitter driver.
US09118316B2 Low voltage multi-stage interleaver systems, apparatus and methods
Described herein is a low-voltage multi-stage interleaver. The interleaver includes at least a first interleaver stage and a second interleaver stage. The first interleaver stage is either blocked or operating in a saturation region. The first interleaver stage facilitates cancellation of DC current, including a biasing current, so that the second interleaver stage receives no DC current input. The second interleaver stage is either blocked or operating in a linear region to allow the second interleaver stage to act as a passive current switch.
US09118313B2 Semiconductor memory device calibrating termination resistance and termination resistance calibration method thereof
Provided is a semiconductor memory device calibrating a termination resistance, the semiconductor memory device comprising self-adjustment logic configured to determine whether a value of an upper bit string of a calibration code generated in response to a calibration start signal is equal to or greater than an upper critical value of the calibration code, or is equal to or less than a lower critical value of the calibration code, and to generate an adjustment signal for adjusting a value of a termination resistance of a data output driver based on the determination result; and resistance calibration logic configured to provide the upper bit string to the self-adjustment logic, and to generate an updated calibration code by performing a calibration calculation based on the calibration code and a comparison signal generated according to a result of comparing a reference voltage and a voltage of a comparison target node.
US09118308B1 Duty cycle corrector
A duty cycle corrector includes a VCD (Voltage-Controlled Delay) circuit, an edge detector, an SR latch, a mode controller, and a CP (Charge Pump) circuit. The VCD circuit delays an input clock signal for a delay period so as to generate a delay clock signal. The delay period is adjusted according to a CP control voltage. The edge detector detects clock edges of the input clock signal and the delay clock signal so as to correspondingly generate a first clock edge signal and a second clock edge signal. The SR latch generates a toggling signal according to the first clock edge signal and the second clock edge signal. The mode controller generates a mode control voltage. The CP circuit operates in different modes according to the mode control voltage. The CP circuit generates the CP control voltage according to the toggling signal and the mode control voltage.
US09118305B2 DC restoration for synchronization signals
In one example implementation, the present disclosure provides a direct current (DC) restoration circuit for restoring the DC component of a synchronization signal provided over an alternating current (AC) coupled link from a transmitting circuit to a receiving circuit. During a period of inactivity in the synchronization signal, the synchronization signal may experience a drift towards the common mode, and may affect the ability for the synchronization signal to properly trigger the receiving circuit. The DC restoration circuit is configured to hold the synchronization signal steady during the period of inactivity, and allow the AC component of the synchronization signal pass through to the receiving circuit during the period of activity to alleviate the problem of baseline drift in the synchronization signal.
US09118304B2 Dynamic tuning in dense arrays of electrically small elements
The purpose of dynamically tuning in dense arrays is to improve power received and signal quality. In traditional phased array the inherent design procedure is to design for good matching over the frequency and scan angle of operation. Typically this is done in the overall design based on a priori knowledge of the frequency, relative phasing and amplitude distribution of all the elements. With this a priori knowledge the design can be done based on known mutual coupling.
US09118302B2 Filter module
In a filter module capable of handling multiple bands, cross wiring with an RF-IC is to be solved. The filter module includes: an antenna terminal; first and second transmission filters; first and second reception filters; a first switch circuit connected to the antenna terminal, and selectively connected to the first and second transmission filters; a second switch circuit connected to the antenna terminal, and selectively connected to the first and second reception filters; a first matching circuit connected between the first switch circuit and the first transmission filter or between the second switch circuit and the first reception filter; and a second matching circuit connected between the first switch circuit and the second transmission filter or between the second switch circuit and the second reception filter.
US09118301B2 Bonding wire impedance matching circuit
An impedance matching circuit is provided. The present impedance matching circuit is able to match impedance using a transformer which is arranged inside a dielectric substrate and arranged to overlap with a bonding pad area and an end of a transmission line, thereby enabling transmitting signals at a desired frequency with a minimum insertion loss without using a very thin transmission line which is several to dozens of μm wide or specially designed antennas in order to compensate for inductance. Thus, the present impedance matching circuit may be applied to various millimeter bands.
US09118292B2 Bell sound outputting apparatus and method thereof
A method and apparatus for outputting a bell sound are disclosed. The method includes receiving an ambient noise; extracting a target frequency band from the ambient noise; changing volume of a pre-stored bell sound by using the target frequency band; and outputting the changed pre-stored bell sound. In the apparatus for outputting a bell sound, when a bell sound outputting apparatus receives an incoming call signal, a user may hear a bell sound including a signal in a frequency band not existing in a peripheral environment, and thus may easily recognize the bell sound.
US09118291B2 Voltage supply circuit, audio output apparatus, and voltage supplying method
A voltage supply circuit is provided. The voltage supply circuit includes a voltage amplifier and a power selecting circuit. A power terminal of the voltage amplifier receives an operation power and outputs a gain voltage for driving an output device. The power selecting circuit receives a plurality of supply voltages and supplies one of the supply voltages to the power terminal of the voltage amplifier as the operation power according to a volume level of an audio signal. An audio output apparatus and a voltage supplying method thereof are also provided. The audio output apparatus includes the voltage supply circuit and a speaker.
US09118290B2 Speed dependent equalizing control system
A speed dependent equalizing control system for automated design of gain and equalization filter parameters can be used for volume and velocity dependent equalization of audio signals reproduced in a vehicle. The system is configured to develop volume-dependent power spectral density estimations based on a test signal received at a number of different volume levels, and develop non-acoustical parameter-dependent power spectral density estimations based on received noise received at a number of different non-acoustical measurement values representing different states of the vehicle. In one example, the non-acoustical measurement values are different velocities, or speeds, of the vehicle. The system may generate filter parameters of a parameterized equalization filter based on a target equalization curve developed by summation of the volume-dependent power spectral density estimates and the non-acoustical measurement-dependent power spectral density estimates.
US09118287B2 Adaptive amplification circuit
An adaptive amplification circuit is provided, which includes an operational amplifier comprising a variable bias current source for providing a variable bias current for the operational amplifier, an equivalent circuit of the operational amplifier for receiving an input voltage and generating an output voltage according to the input voltage, and a bias control unit for generating a bias control signal to the variable bias current source according to the output voltage so as to adjust the variable bias current.
US09118286B2 DC offset cancellation circuit
A DC offset cancellation circuit is provided. The DC offset cancellation circuit includes a first operational amplifier and a feedback gain circuit. The first operational amplifier includes a first input transconductance stage, a second input transconductance stage and an output stage. An input terminal of the first input transconductance stage receives an input signal of the first operational amplifier through a first input terminal of the first operational amplifier. An output terminal of the output stage outputs an output signal of the first operational amplifier through an output terminal of the first operational amplifier. An input terminal of the feedback gain circuit is coupled to the output terminal of the first operational amplifier, and an output terminal of the feedback gain circuit is coupled to the input terminal of the second transconductance stage through a second input terminal of the first operational amplifier.
US09118285B2 Compensation of a transmitter distortion
There is described a method for compensating the phase and gain distortions of a transmitter analog front end affected by a leakage of a local oscillator. The method comprises generating a single complex tone signal in a digital front end, wherein the generation comprises compensating the signal gain and phase with gain and phase offsets. The method comprises feeding the compensated signal into the transmitter analog front end. The method comprises feeding a corresponding output signal of the transmitter analog front end into a nonlinear component, thereby generating an inter-modulation between the complex tone signal and at least one tone signal due to the local oscillator leakage. The method comprises feeding the output of the nonlinear component into a measurement receiver analog front end. The method comprises filtering the output of the measurement receiver analog front end with a band pass filter in order to isolate the inter-modulation, which is indicative of the distortions introduced by the transmitter analog front end. The method comprises measuring the power of the filtered signal. The method comprises updating the gain and phase offsets according to the measured power, by reducing said measured power. The disclosure also relates, in particular, to a digital front end, to an analog system, to a telecommunication device, to a computer program, and to a storage medium.
US09118284B1 Cascode power amplifier
An amplifier for amplifying signals is presented. A cascode power amplifier includes two or more adjacent cascode amplifiers and at least one remote cascode amplifier. The adjacent cascode amplifiers are lined up adjacent each other with inputs of the adjacent cascode amplifiers connected to a common input line and outputs of the of adjacent cascode amplifiers connected to a common output line. The adjacent cascode amplifiers generally operate in parallel. The remote cascode amplifier is spaced apart from the adjacent cascode amplifiers. An input transmission line connects an input of the remote cascode amplifier to the common input line. An output transmission line connects an output of the remote cascode amplifier to the common output line. Amplified outputs of the adjacent cascode amplifiers and amplified outputs of the remote cascode amplifier are power combined and summed into a coherent amplified output signal that is output on the output transmission line.
US09118278B2 High efficiency amplification
A radio frequency amplification stage comprising: an amplifier for receiving an input signal to be amplified and a power supply voltage; and a power supply voltage stage for supplying said power supply voltage, comprising: means for providing a reference signal representing the envelope of the input signal; means for selecting one of a plurality of supply voltage levels in dependence on the reference signal; and means for generating an adjusted selected power supply voltage, comprising an ac amplifier for amplifying a difference between the reference signal and one of the selected supply voltage level or the adjusted selected supply voltage level, and a summer for summing the amplified difference with the selected supply voltage to thereby generate the adjusted supply voltage.
US09118276B2 High linearity mixer using a 33% duty cycle clock for unwanted harmonic suppression
One mixer circuit includes mixer elements having 3N pairs of differential inputs. There are non-overlapping clock signals provided to the mixer elements which have a duty cycle equal to or less than 33⅓ percent, and N is a positive integer. Output differential signals of the mixer elements do not contain third order harmonic content of the non-overlapping clock signals. Another mixer circuit includes a first mixer element and a signal combining device. The first mixer element has 3N pairs of differential inputs, wherein there are non-overlapping clock signals provided to the first mixer element which have a duty cycle equal to or less than 33⅓ percent, and N is a positive integer. The signal combining device combines outputs from the first mixer element wherein an output signal of the signal combining device do not contain third order harmonic content of the non-overlapping clock signals.
US09118274B2 Relaxation oscillator
A relaxation oscillator includes a first amplifier having a first input terminal receiving an output voltage signal, a second input terminal receiving a reference voltage signal, and an output terminal comparing the output voltage signal and the reference voltage signal and in response thereto outputting a control signal; a second amplifier having a first input terminal receiving the output voltage signal, a second input terminal connected to the output terminal of the first amplifier for receiving the control signal, and an output terminal connected to the first input terminal of the first amplifier and the first input terminal of the second amplifier for comparing the control signal and the output voltage signal and in response thereto outputting the output voltage signal; and a sensing capacitor for generating the output voltage signal by charging/discharging operations by the output terminal of the second amplifier.
US09118271B2 System and method for non-sinusoidal current waveform excitation of electrical generators
An electrical generator includes a stator having fractional-slot concentrated windings and a rotor having field windings. A drive is provided having a circuit to control current flow to the field windings and a controller to input an initial DC field current demand to the circuit to cause the circuit to output an initial DC field current representative of a DC field current demand that would cause an electrical generator having sinusoidal stator windings to output a desired AC power. The controller receives feedback on the magnetic field generated by the initial DC field current, isolates an ideal fundamental component of the magnetic field based on the feedback and to generate a modified DC field current demand, and inputs the modified DC field current demand to the circuit, thereby causing the circuit to output an instantaneous non-sinusoidal current to the field windings to generate a sinusoidal rotating air gap magnetic field.
US09118270B2 Motor control device including electric storage device and resistance discharge device
A motor control device includes a rectifier, an inverter connected to the rectifier via the DC link, a power failure detecting unit detecting power failure, a voltage detecting unit detecting a DC voltage at the DC link, an electric storage unit storing DC power, a charging unit that can make charging by boosting to a voltage higher than the DC voltage, a discharging unit discharging DC power, a resistance discharge device that performs resistance discharging of DC power at the DC link when the DC voltage after power failure is equal to or higher than a predetermined start level and that does not perform resistance discharging when the DC voltage is equal to or lower than a predetermined stop level, and a discharging operation determining unit operating the discharging unit when the DC voltage at the DC link after power failure is equal to or lower than a predetermined threshold.
US09118265B2 Pulsed plasma engine and method
Pulsed plasma engine and method in which a noncombustible gas is introduced into an explosion chamber, the gas is ionized to form a plasma within the chamber, an electrical pulse is applied to the plasma to heat the plasma, the pulse is turned off to produce an explosive pressure pulse in the plasma, and the plasma is confined in the chamber by a magnetic field that directs the pressure pulse toward an output member which is driven by the pressure pulse.
US09118262B2 Control method for contract-type gel actuator and control device
A method for controlling a displacement in the thickness direction of the contraction-type gel actuator having an effect of contraction in the thickness direction by applying a voltage between an anode and a cathode between which a gel which includes a dielectric polymeric material is interposed, which includes performing feedback control of an applied voltage, with a sampled value of a displacement when the applied voltage acts on the contraction-type gel actuator, according to the following equation (1): E=kp(xd−x)+Ed  (1) In the equation, xd represents a target displacement of the contraction-type gel actuator; Ed represents an applied voltage with respect to the target displacement xd obtained by the linear approximation of the applied voltage and the displacement from a measured result of the displacement in accordance with the applied voltage of the contraction-type gel actuator; and kp represents a proportional gain.
US09118260B2 Control of a switch in a power converter
A method for controlling at least one switch in a power converter, wherein the switching speed of the switch dynamically varies according to a measurement of a quantity representative of the efficiency of the converter.
US09118256B2 Power starting circuit
A power starting circuit used in a DC power supply circuit has a double-pole, double-throw switch electrically connected to a positive pole of a DC power supply and controls a conducting state of the circuit. A first capacitor provides a voltage signal for a first switch circuit and controls the conducting state of the first switch circuit in a continuous charging and discharging process. The first switch circuit controls the conducting state of the DC power supply circuit. A maintaining signal input end provides a maintaining signal for the first capacitor. The power starting circuit can achieve an over discharge protection function for the control circuit. Moreover, when the switch is turned on, it can automatically switch the circuit off so as to save power if the electrical product does not need to continue to work.
US09118254B2 DC-DC converter utilizing output power to turn off switches
Disclosed is a DC-DC converter. The DC-DC converter includes a power input unit to which power is applied, a first module comprising a first transformer and a second transformer to output a first output power transformed according to operations of a first switch and a second switch connected with the first transformer and the second transformer by using the applied power, a second module comprising a third transformer and a fourth transformer to output a second output power transformed according to operations of a third switch and a fourth switch connected with the third transformer and the fourth transformer by using the applied power, an output unit to output a sum of the first output power and the second output power, and a controller to control an interleaving operations between the first module and the second module.
US09118248B2 Naturally freewheeling alternating current chopper main circuit structure
The present disclosure provides a naturally freewheeling alternating (AC) current chopping main circuit structure. The naturally freewheeling AC chopping main circuit structure includes an AC chopping main circuit (1) and inductive load (2). The AC chopping main circuit includes a chopping switch element assembly (3), two inductance coils (L1 and L2), two diodes (D1 and D2), and a capacitor (C). The two inductance coils and the two diodes are connected to form a closed circulatory circuit while the circulatory circuit implements natural freewheeling of a chopping current in the two induction coils when the chopping switch element assembly is switched off.
US09118246B2 Control system for multi output DCDC converter
A multi-output DC to DC converter can have complex control requirements in CCM mode because of the differing load requirements of the outputs. A multi-output DC to DC converter having a single coil or inductor and a freewheel switch is described. A controller measures the duration of the freewheel phase. The controller increases the current supplied to the DC to DC converter in the following duty-cycle if the duration is less than a first value, and decreases the current supplied to the inductor in the following duty-cycle if the duration is greater than a second value.
US09118243B2 Power converter dependent on a voltage range the input voltage resides in
A power converter (14) can include a switching system (18) to convert a direct current (DC) input voltage to an output voltage based on a switching signal having a duty-cycle. A controller (16) can set the duty-cycle of the switching signal, depending on the DC input voltage, to one of a substantially constant value, such that the output voltage follows the DC input voltage in a normal mode, and a value that varies inversely with respect to the DC input voltage, such that the output voltage is substantially constant in another mode.
US09118241B2 Switched-mode power supply and a two-phase DC to DC converter having switches and a filter that deliver current from a node among converter stages
The switched-mode power supply includes a first switch connected to an input terminal for receiving an input voltage, a second switch, a first node between the first switch and the second switch. The switched-mode power supply further includes a third switch connected to the input terminal, a fourth switch, and a second node between the third switch and the fourth switch. A first inductor is connected between the first node and an output terminal, a second inductor is connected between the second node and the output terminal, at least one third inductor is connected between the first node and the second node, and a capacitor is connected to the output terminal.
US09118236B2 Motor for electric power steering
Provided is a motor for electric power steering, which prevents a foreign substance from entering the interior of a controller. The motor for electric power steering includes a resolver structure provided between a housing for separating the controller and a resolver from each other and an insulator opposed to the housing so as to surround a fixing portion for fixing base end portions of terminals electrically connected to distal end portions of conductors of coils, the resolver structure preventing a foreign substance from passing between the housing and the insulator to enter the interior of the controller.
US09118231B2 Stator of rotating electrical machine and rotating electrical machine
A stator of rotating electrical machine includes a stator core and stator coils. The stator coils have n number (where n≧6) unit coils, a first coil group and a second coil group. The unit coils of the first coil group include a first unit coil located nearest the first power supply terminal. The unit coils of the first coil group include a second unit coil. The unit coils of the first coil group include a third unit coil located third nearest the first power supply terminal and adjacent to the second unit coil of the second coil group. The unit coils of the second coil group include a third unit coil located third nearest the second power supply terminal and adjacent to the second unit coil of the first coil group.
US09118230B2 Interior permanent magnet machine
An interior permanent magnet machine includes a stator including a plurality of electrical conductors. The interior permanent magnet machine further includes a rotor concentrically disposed in relation to the stator. The rotor is configured to rotate relative to the stator about a rotational axis and includes a plurality of polar pieces arranged annularly about the rotational axis. At least one of the polar pieces includes a magnetic layer configured to magnetically interact with the electrical conductors. The magnetic layer has a substantially conic section shape.
US09118229B2 Electric drive unit
An electric drive unit includes an inverter, a stator that receives an AC current from the inverter and forms a magnetic field, a rotor rotated by the magnetic field formed by the stator, a shaft that protrudes into both sides in an axial direction of the rotor and moves in synchronization with the rotor, an inverter casing that stores the inverter in a galvanic isolation state, and a motor housing. The motor housing stores the stator and the rotor in a galvanic isolation state, rotatably supports one end of the shaft using a first bearing, and rotatably supports the other end of the shaft using a second bearing. The inverter and the inverter casing are arranged in an inner side from a pair of bearings including the first and second bearings.
US09118228B2 Liquid cooled electrical machine
Flow control apparatus for an electrical machine and comprising an arrangement of shaped chambers and passages for conveying a liquid coolant. The rate of heat transfer from certain portions of the machine to the coolant is determined by the varying velocity of the liquid through the chambers, resulting in a generally uniform cooling of those portions of the machine.
US09118223B2 Electric motor
A DC electric motor has a stack of laminations defining a rotor with at least two pairs of poles and an even number of slots at least equal to 8. The rotor also has a commutator with an even number of segments and a closed distributed rotor winding. The winding extends in the slots and is connected in a predetermined manner to the segments of the commutator. The rotor winding has a winding section of the lap type, connected to two consecutive segments of the commutator and, in series with this, a plurality of winding sections of the wave type. These winding sections all span an identical number of slots.
US09118220B2 Method and apparatus for providing energy device and system status
A method and apparatus is described for providing energy system status information. A status indication device may be mounted near an entry door for determining when an individual is about to leave an area. When the status indication device determines that an individual is about to leave an area, it displays an energy status to the individual, so that the individual can decide whether to place energy-consuming devices in a conservation mode of operation.
US09118214B2 Operating a controller for an energy production plant
A method is provided for operating a controller controlling an energy production plant including plural wind turbines each having an electrical output terminal connected to a common node. The method involves determining that a failure relating to the energy production plant has been overcome; receiving a first signal indicative of an actual value of an electrical quantity at the common node; receiving a second signal relating to a desired value of the electrical quantity at the common node; generating plural reference signals based on an intermediate value between the actual value and the desired value; and supplying the reference signals to the wind turbines, the reference signals controlling the wind turbines with respect to their electrical output at the output terminal such that the intermediate value of the electrical quantity at the common node is achieved.
US09118207B2 Methods and systems for requesting compliance with a requirement over a network
Systems and methods are disclosed that can be used to broadcast or otherwise send load shed and other requirements over a network to recipients. One exemplary embodiment involves sending a first broadcast message to a first group of recipients. The first broadcast message requests compliance with a requirement but does not require a synchronous reply from the first group of recipients. The first group of recipients are each configured to automatically comply with the requirement in response to receiving the first broadcast message. The exemplary embodiment further involves determining, for example, based on actual load determination, to send a second broadcast message to a second group of recipients different from the first group of recipients and sending the second broadcast message to the second group of recipients, the second broadcast message requesting compliance with the requirement.
US09118205B2 Microgrid power distribution system and power flow asymmetrical fault analysis method therefor
A fault analysis method includes: using a matrix of two sets of microgrid power distribution networks to analyze and solve a fault current, and for various types of faults of the distributed power distribution system, obtaining appropriate boundary conditions to calculate a variety of different types of single or simultaneous fault currents of load points. The present invention may be further applied to a situation where a bus or impedance or parallel loop is added. The present invention has good robustness and execution speed, and requires small memory space for calculation of analysis and identification of a power flow fault of the distributed power distribution system, and may be actually applied to an instrument control system for identification and analysis of a fault of a large-scalemicrogrid distribution system.
US09118204B2 Information processing apparatus, program, and information processing system
An information processing apparatus is provided. The information processing apparatus includes a communication circuitry with an external apparatus in a noncontact manner by using a carrier of a predetermined frequency and charging an external battery in a noncontact manner; and a control circuitry configured to control a characteristic of at least one of communication and charging.
US09118202B2 Battery status detection method and apparatus for electronic device
A battery status indicating method for an electronic device is provided. The battery module is pluggable into the electronic device. When a residual electric quantity of the battery module is lower than a threshold electric quantity, the battery module stops outputting a battery voltage. The battery status indicating method includes steps of judging whether the battery module is in a plugged status or an unplugged status according to the battery voltage, periodically charging the battery module in a first time interval of a fixed cycle if the battery module is in the unplugged status, and judging whether the battery module is switched to the unplugged status according to a change of the battery voltage if the battery module is in the plugged status.
US09118201B2 Systems and methods for energy transfer control
A control system includes a first switching module and a second switching module. The second switching module is operably connected to the first switching module. The control system is configured to be selectably connected to at least two of an energy dissipation system, an external energy storage system, or an internal energy storage system. When the control system is selected for electrical communication with one of the at least two of an energy dissipation system, external energy charging system, or internal energy storage system, the first and second switching modules control the path of a current distributed through the one of the at least two of an energy dissipation system, external energy charging system, or internal energy storage system.
US09118200B2 Secondary battery pack system
To provide a secondary battery pack system that controls battery packs which are connected in parallel without requiring a complex system configuration, a secondary battery pack system of the present invention that supplies power to an electronic device includes a plurality of battery packs each having a controller, a main body side connection circuit which is provided on the electronic device side so as to be connected to the plurality of battery packs, and a main body side discharge control signal line which is provided in the main body side connection circuit. The main body side discharge control signal line and controllers of the plurality of battery packs are connected to each other.
US09118196B2 Distributed power generation
Distributed power generation systems generally include a number of power sources and electrical power loads interconnected by a distribution network. Electrical switches and fuses are provided such that local groups of power sources and power loads can be established. Should there be a degradation in the distribution network in terms of a set of criteria such as electrical frequency, current or voltage then the switch or fuse may be thrown to establish each local group as an island. By monitoring divergence from a set of criteria a method and controller may be utilised whereby the distribution network as a whole is considered and configured to establish virtual islands which operate prior to the establishment whether inadvertently or deliberately of actual islands within the distribution network. In such circumstances the transition from normal operation for the distribution network to islanded operation for the distribution network is less severe.
US09118191B2 Cell balancing method, cell balancing device, and energy storage system including the cell balancing device
A method of balancing a plurality of battery cells includes acquiring an open circuit voltage (OCV) of a battery cell of the plurality of battery cells connected in series; determining a state of charge (SOC) of the battery cell based on the OCV of the battery cell; determining a differential value in the OCV of the battery cell per a change of the SOC of the battery cell, in accordance with the SOC of the battery cell; and activating cell balancing of the plurality of battery cells when the differential value is greater than a reference value.
US09118190B2 Charging balancing system based on battery operating process and method thereof
A charging balancing system and method thereof based on a battery operating process and are disclosed. This is done by detecting a state of all cells in a detecting battery assembly to generate detection parameters, analyzing the detection parameters to produce an operating process, selecting at least one of residual power estimation methods according to the operating process, so as to calculate a residual power of each cell, and adjusting the charging current and charging time for each cell according to the residual power. As such, the efficiency of charging balancing is promoted.
US09118189B2 Method and system for charging multi-cell lithium-based battery packs
A method and system for charging multi-cell lithium-based batteries. In some aspects, a battery charger includes a housing, at least one terminal to electrically connect to a battery pack supported by the housing, and a controller operable to provide a charging current to the battery pack through the at least one terminal. The battery pack includes a plurality of lithium-based battery cells, with each battery cell of the plurality of battery cells having an individual state of charge. The controller is operable to control the charging current being supplied to the battery pack at least in part based on the individual state of charge of at least one battery cell.
US09118183B2 Auto detection of vehicle type connected to an EVSE
Apparatus and methods for discerning information about a vehicle (e.g., an electric vehicle's make, model, and/or year of manufacturer) being charged by an electric vehicle supply equipment (“EVSE”). Vehicle make, model, and model year can be discerned by measuring charging current supplied to the electric vehicle over time and comparing this profile to stored profiles of known electric vehicles. Vehicle information can also be discerned by monitoring a pilot signal sent to the electric vehicle by the EVSE. When the EVSE is ready to charge the electric vehicle, the pilot signal sends a charge-ready indication. When the electric vehicle is ready to be charged, it sends an acknowledgement. The time between the EVSE indicating it is ready to charge and the electric vehicle acknowledging that it is ready to be charged is measurable and can used to identify an electric vehicle make, model, and model year.
US09118180B2 Input protection circuit
An input protection circuit includes: a first transistor of a field-effect type coupled in series between an input terminal and an electronic circuit, the input terminal receiving an input voltage, the electronic circuit receiving an input voltage, the first transistor switching to an off-state in a case where the input voltage is higher than a positive power supply voltage of the electronic circuit; a second transistor of a field-effect type coupled in series between the first transistor and the electronic circuit, the second transistor switching to an off-state in a case where the input voltage is lower than the negative power supply voltage of the electronic circuit; and a voltage control circuit configured to maintain gate-source voltages of the first transistor and the second transistor as voltages within a power supply voltage range of the electronic circuit based on the input voltage.
US09118177B2 Power controller system
A power controller system configured to electrically supply a load via a circuit is provided. The system comprises, a switching device provided in an electrical pathway for supplying current to the load, a controller configured to open the switching device when a current through or voltage across the switching device exceeds a predetermined level; and an electrical pathway provided parallel to the load to enable load current to continue to flow through the parallel electrical pathway and the load when the switching device is open to dissipate inductive energy stored in the circuit connecting the parallel electrical pathway to the load.
US09118172B2 Protective device with automated self test
The present invention is directed to a circuit interrupting device including an actuator that provides an actuator stimulus upon the occurrence of the fault actuation signal. A circuit interrupter is positioned to electrically disconnect the first, second and third electrical conductors from each other upon the occurrence of the actuator stimulus. An automated test circuit is coupled to the circuit interrupting assembly. The automated test circuit is configured to automatically produce the simulated fault condition during a predetermined portion of an AC line cycle to determine whether the fault detection assembly is operational such that the fault detection assembly provides a fault detection signal without the circuit interrupter electrically disconnecting the first, second and third electrical conductors from each other. The automated test circuit is further configured to provide a device failure mode signal such that a plurality of the first, second or third electrical conductors are disconnected from each other if the fault detection signal is not detected within a predetermined time frame.
US09118170B2 Electrical switchgear, in particular switchgear for medium voltage
Described is a distribution panel for electrical switchgear, in particular for medium-voltage distribution switchgear. The distribution panel is provided, in at least one embodiment, with at least one bus bar and at least one transfer rail, wherein the bus bar is connected via a circuit breaker to an outlet terminal and wherein the transfer rail is also connected to the outlet terminal. The circuit breaker, in at least one embodiment, is housed inside a circuit breaker housing and the transfer rail and the electrical connection from the transfer rail to the outlet terminal are arranged so as to bypass the circuit breaker housing.
US09118168B2 Spark gap configuration for providing overvoltage protection
In order to provide a spark gap configuration for overvoltage protection, the spark gap configuration has electrodes that face each other and exhibit a short deionization time. The electrodes have, on at least a portion thereof, a current-path bounding device for forcing a desired current path in the electrodes themselves resulting in improved spark behavior.
US09118167B2 Vertical cavity surface emitting laser
A vertical cavity surface emitting laser includes an active layer that includes a quantum well, a first cladding layer and a second cladding layer between which the active layer is interposed. A first multilayer reflector layer is arranged on a side of the first cladding layer opposite to that on which the active layer is arranged. A second multilayer reflector layer is arranged on a side of the second cladding layer opposite to that on which the active layer is arranged. At least one of the first cladding layer and the second cladding layer includes a low activity energy layer having a band gap that is smaller than a smallest band gap of an optical confinement layer for forming the quantum well of the active layer and larger than a band gap of the quantum well.
US09118165B1 Multi-wavelength laser cavity
Embodiments of the invention describe various configurations for a multi-wavelength laser cavity. A laser cavity may include a shared reflector and a plurality of reflectors. Each of the plurality of reflectors and the shared reflector together form one of the plurality of output wavelength channels.A shared filter is utilized to filter the optical signal of the laser cavity to comprise a subset of a plurality of cavity modes. A (de)multiplexer, comprising a plurality of filtering elements), receives the optical signal and further selects and separates the final lasing wavelengths from the selected subset of cavity modes, and each filtering element outputs an optical signal having a wavelength for one of the output wavelength channels.
US09118153B2 Renewable energy forecasting socket
An electric socket can include a visual indicator capable of displaying time-series forecast information that forecasts a property or attribute related to the power being sourced from an energy provider. The information being displayed on the visual indicator can help an energy consumer decide whether to use an appliance now by plugging it into the electric socket or wait until some optimal time in the future to plug the appliance in.
US09118150B2 Electrical connector and electrical connector assembly used thereof
An electrical connector assembly includes an electrical connector (100) and a pick up cap (3) assembled thereon. The electrical connector (100) includes an insulative housing (1) with a plurality of contacts (11) received therein, a plurality of soldering members (12) connected the contacts (11) and protruded beyond the bottom of the insulative housing (1), and a position member (2) surrounded and moved upwardly and downwardly relative to the insulative housing (1). The insulative housing (1) includes a limit portion (102) protruded outwardly, the pick up cap (3) includes a stop portion (31) protruded toward the limited portion (102) and the position member (2) includes a body portion (20) positioned therebetween. When the soldering members (12) and the position member (2) are put on a same plane, there is a space between the body portion (20) and the stop portion (31).
US09118143B2 Mechanism for facilitating and employing a magnetic grid array
A mechanism is described for facilitating and employing a magnetic grid array according to one embodiment. A method of embodiments may include engaging, via magnetic force of a magnet, magnetic contacts of a magnetic grid array to substrate lands of a package substrate of an integrated circuit package of a computing system, and disengaging, via a removal lever, the magnetic contacts from the substrate lands.
US09118142B2 Connector having a lock with a locking protrusion actuated by a slide member
A connector including a housing. A lock is positioned on a mating end of the housing. The connector also includes a contact. A slide member is positioned on the housing and is slideable along a longitudinal axis to the mating end and engageable with the lock in a lock position, and being slideable along the longitudinal axis to a terminal end of the housing in an unlock position.
US09118138B2 Electrical connector having resilient latches
An electrical connector includes a shell with a chamber and an insert assembly received in the chamber. The insert assembly has cavities therethrough that are configured to receive contacts. The contacts are configured for electrical connection to mating contacts of a mating connector. The insert assembly has resilient latches extending from an outer periphery of the insert assembly that engage the shell to hold the insert assembly in the chamber.
US09118136B2 Lower profile card edge connector
A card edge connector is used for connecting an electronic card to a printed circuit board and includes an insulative housing and a plurality of conductive terminals retained in the insulative housing. The insulative housing defines a front face, a mounting surface and a receiving slot running through the front face and extending along a longitudinal direction with a key disposed therein. Each conductive terminals defines a contacting arm extending into the receiving slot along a mating direction perpendicular to the longitudinal direction and a soldering portion extending outside of the insulative housing. Each contacting arm defines a free end portion located in the receiving slot and with a contacting portion disposed thereon, the thickness of the free end portion in a vertical direction perpendicular to both the longitudinal direction and the mating direction is smaller than the thickness of other parts of the contacting arm.
US09118134B2 RJ-45-compatible communication connector with contacts having wider distal ends
The present invention generally relates to communication connectors and internal components thereof. In one embodiment, the present invention is a communication jack comprising back-rotated plug interface contacts having variable cross-sectional widths. In another embodiment, the present invention is a communication jack having back-rotated plug interface contacts where at least two of the plug interface contacts have a differing beam length. In yet another embodiment, the present invention is a communication jack having back-rotated plug interface contacts where at least two of the plug interface contacts have opposing bends in a deflection zone.
US09118133B2 Connection structure of electronic components
Two bus bars 13 having terminal parts 19 at their one ends 17 are arranged in parallel. Right and left contact spring pieces 23a, 24a on an upper stage of the terminal parts 19 of the bus bars 13 are connected to a pair of contact parts of a semiconductor light emitting element 25 which is disposed between the two bus bars 13, and right and left contact spring pieces 23b, 24b on a lower stage of the terminal parts 19 of the bus bars 13 are connected to a pair of contact parts of a Zener diode 27 disposed between the two bus bars 13. The terminal parts 19 of the adjacent bus bars 13 are provided with first rotation restricting parts 48 which are adapted to be contacted with both side faces of the semiconductor light emitting element 25 which is disposed between the two bus bars.
US09118132B2 Vacuum compatible high-density electrical interconnect system
A vacuum compatible high-density electrical interconnect system for use in a vacuum environment is disclosed. In one embodiment, the vacuum compatible high-density electrical interconnect system includes a vacuum compatible base plate, a vacuum compatible printed wiring board (PWB) disposed on the vacuum compatible base plate and a vacuum compatible interposer module disposed in the vacuum compatible base plate. Further, the vacuum compatible PWB includes a plurality of components on a front side of the vacuum compatible PWB and a plurality of associated pads on a back side of the vacuum compatible PWB. In one exemplary embodiment, the vacuum compatible interposer module is disposed in the vacuum compatible base plate such that it operatively connects to the plurality of associated pads on the back side of the vacuum compatible PWB and further operatively connects to a plurality of pads of an external device that is disposed outside the vacuum environment.
US09118130B1 Low insertion force terminal
A low insertion force female terminal that is configured to make electrical contact with a male pin. The terminal includes a spring portion configured to be deflected by the pin as the pin is inserted into the terminal. The spring portion is also configured to urge a contact feature formed into the spring portion toward the pin to make electrical contact with the pin. The contact feature is characterized by an asymmetrical shape configured so a leading-edge ramp angle of the contact feature is less than a trailing-edge ramp angle of the contact feature. The asymmetrical shape reduces the peak insertion force for the terminal when compared to terminal designs that have symmetrically shaped contact features with similar dimensions.
US09118125B2 Earth terminal mounted tool
A thin plate-like earth terminal mounted tool is with: earth wires connected to electric components, earth terminals respectively connected to end portions of the earth wires, and the earth terminals individually connected to the earth terminal mounted tool. The earth terminal mounted tool includes: a body connecting portion connected to a body of a vehicle; and an earth connecting portion connected to the body connecting portion and to which the earth terminals are individually connected. The earth connecting portion includes at least a first earth connecting section to which the earth terminals along a first direction are connected, and a second earth connecting section to which the earth terminals along a second direction intersecting with the first direction are connected.
US09118122B2 Assembly of an electrical connector and a cable unit and electronic device including the assembly
An assembly includes an electrical connector, a cable unit, and adapter terminals. The electrical connector includes an insulator body and conductive terminals disposed at the insulator body. Each conductive terminal includes an insert arm positioned outside the insulator body. The cable unit includes a plug connector and cables connected to the plug connector. Each of the adapter terminals is connected to a core wire of a corresponding cable and is sleeved on the insert arm of a corresponding conductive terminal. Each adapter terminal is electrically connected between the core wire of the corresponding cable and the insert arm of the corresponding conductive terminal.
US09118116B2 Compact cylindrically symmetric UHF SATCOM antenna
A cylindrically symmetric satellite antenna that provides directional and omnidirectional operating modes in a compact form factor. Feed points located at the top of the cylindrical structure provide increased platform isolation. Combining networks, disposed below or within the cylindrical structure, may be replaced with inexpensive baluns composed of coaxial line sections.
US09118112B1 Multi-sensor system and method for vehicles
Systems and methods for use in a vehicle are provided. A vehicle can be an aircraft, truck, ship, automobile, locomotive, etc. A system includes a housing having an exterior surface for housing sensor or communication equipment and interior surface for housing electronics associated with the equipment. The sensor or communication equipment can include a radar antenna mounted on or adjacent to the exterior surface, and at least one of a Satcom antenna, altimeter antenna, vision sensor or any communication link antenna.
US09118110B2 Communication device and antenna element therein
A communication device including an antenna element, a ground element and a battery element is provided. The ground element has a short edge as a first edge and a long edge as a second edge. The antenna element is close to the first edge or at a dented section of the first edge. There is a notch in the ground element, and an open edge of the notch is at the second edge. The length of the notch is at least 0.3 times the maximum length of the ground element, and the width of the notch is at least 0.4 times the maximum width of the ground element.
US09118105B2 Circuit board and circuit module
A circuit board and a circuit module more accurately provide impedance matching between an antenna coil and an electronic component electrically connected to the antenna coil, and include a board body including board portions and a plurality of laminated insulating material layers made of a flexible material. An antenna coil includes coil conductors provided in the board portion. Wiring conductors are provided in the board portion and electrically connected to the antenna coil. The board portion has a structure that is less likely to deform than the board portion. An integrated circuit electrically connected to the wiring conductors is mounted on the board portion.
US09118103B1 Position determination using transmit beamforming
Apparatus having corresponding methods and computer-readable media comprise: a receiver configured to receive a wireless signal transmitted by an access point, wherein the wireless signal includes one or more transmit beamforming parameters used by the access point to transmit the wireless signal; wherein a location of the apparatus is determinable based, at least in part, on i) the one or more transmit beamforming parameters included in the wireless signal, and ii) a location of the access point.
US09118102B2 Non-reciprocal circuit element
A non-reciprocal circuit element, such as an isolator or a circulator, which is incorporated in various microwave devices and rotationally changes a transmission path for microwaves by a gyromagnetic effect. The non-reciprocal circuit element has a simple structure and superiority in assembly and allows easy achievement of height reduction and size reduction while preventing fracture of a ferrite plate.
US09118100B2 Antenna switching circuitry for a worldphone radio interface
This disclosure relates to radio frequency (RF) front-end circuitry. In one embodiment, the RF front-end circuitry is arranged to provide antenna switching functionality for a Worldphone or a World tablet. The RF front-end circuitry may include front-end switching circuitry, a multiple throw microelectromechanical switch (MTMEMS), a first antenna port, a second antenna port, and a third antenna port. The front-end switching circuitry of the RF front-end circuitry is configured to selectively couple one or more RF ports to either the first antenna port or the second antenna port. The MTMEMS is configured to selectively couple a pole port coupled to the third antenna port to any one of a set of throw ports, which may be RF ports or may be coupled to RF ports. As such, the RF front-end circuitry is capable of providing antenna switching functionality between three antennas for a Worldphone or World tablet.
US09118093B2 Cooling jacket for battery pack
A cooling jacket for a battery pack includes a first half and a second half. The first half and the second half are substantially identical and flip-ably connected to each other. A channel is provided in between the first half and the second half. Further, a coolant flows in the channel provided between the first half and the second half.
US09118091B2 Secondary battery
A battery may include a short circuit member connected to a terminal having a first polarity and a deformable conductive member having a second polarity, the deformable conductive member being insulated from the short circuit member, the deformable conductive member being configured to contact the short circuit member when a voltage applied thereto exceeds a predetermined voltage.
US09118089B2 Metal-air cell with ion exchange material
Embodiments of the invention are related to anion exchange membranes used in electrochemical metal-air cells in which the membranes function as the electrolyte material, or are used in conjunction with electrolytes such as ionic liquid electrolytes.
US09118085B2 Lithium secondary battery and use of same
A lithium secondary battery provided by the present invention includes an electrode body (80) having a structure in which a positive electrode (10) and a negative electrode (20) are laminated, with a separator (30) interposed therebetween, and a porous insulating layer (40) obtained by filling and molding insulating particles is formed on the surface of at least one of the positive electrode (10) and the negative electrode (20) on the side facing the separator (30), wherein insulating particles having a tap density of 0.4 g/cm3 to 0.9 g/cm3 are used as the insulating particles that compose the porous insulating layer (40), and moreover a pressure (90) that is applied in the direction of the lamination to the electrode body (80) is set to a range of 4 kgf/cm2 to 50 kgf/cm2.
US09118083B2 Method for producing fuel cell electrode catalyst, fuel cell electrode catalyst, and uses thereof
A method for producing a fuel cell electrode catalyst, including: a step (1) of mixing at least a metal compound (1), a nitrogen-containing organic compound (2), a compound (3) containing fluorine and at least one element A selected from the group consisting of boron, phosphorus, and sulfur, and a solvent to obtain a catalyst precursor solution, a step (2) of removing the solvent from the catalyst precursor solution, and a step (3) of heat-treating a solid residue, obtained in the step (2), at a temperature of 500 to 1100° C. to obtain an electrode catalyst; a portion or the entirety of the metal compound (1) being a compound containing, as a metal element, at least one transition metal element M1 selected from the elements of group 4 and group 5 of the periodic table; and at least one of the compounds (1), (2), and (3) having an oxygen atom.
US09118075B2 Cathode active material for lithium secondary battery
Disclosed herein is a cathode active material based on lithium nickel-manganese-cobalt oxide represented by Formula 1, wherein the lithium nickel-manganese-cobalt oxide has nickel content of at least 40% among overall transition metals and is coated with an ion-conductive solid compound at a surface thereof. A lithium secondary battery having the disclosed cathode active material has advantages of not deteriorating electrical conductivity while maintaining high temperature stability, so as to efficiently provide high charge capacity.
US09118072B2 Component for secondary battery and manufacturing method thereof, and secondary battery and multi-battery apparatus manufactured by using the component
The present invention describes a component for a secondary battery and a manufacturing method thereof, and a secondary battery manufactured by using the component. The component for a secondary battery according to the present invention comprises a metal plate in which at least one recess line is formed; and a soldering pattern joined in the recess line. According to the present invention, when an over-current flows through the component for a secondary battery, breakage occurs at the portion where soldering pattern is joined in the recess line, thereby efficiently interrupting the flow of an over-current.
US09118068B2 Layered solid-state battery
A layered solid-state battery that includes a first unit cell, a second unit cell, and an internal collection layer that is disposed to intervene between the unit cells. Each of the unit cells includes a positive electrode layer, a solid electrolyte layer, and a negative electrode layer that are sequentially stacked. The internal collection layer has one side surface that is in contact with the positive electrode layer of the first unit cell and the other side surface that is in contact with the negative electrode layer of the second unit cell. Also, the internal collection layer contains an electron conductive material and an ion-conductively insulating specific conductive material.
US09118065B2 Lead-oxide battery plate with nonwoven glass mat
Provided is a lead-oxide pasted battery plate comprising a lead alloy grid, lead oxide paste and a nonwoven glass fiber mat. The nonwoven glass mat is comprised of glass fibers having a diameter greater than 10 microns, a binder for the glass fibers, and a third component. The third component can comprise cellulosic fibers, glass micro-fibers, polymeric fibers, fillers or mixtures thereof. The presence of the third component restricts the penetration of the lead oxide paste through the thickness of the mat during the plate pasting operation, thereby keeping the process equipment free from the accumulation of lead oxide paste. The component can then dissolve in the battery acid solution, or work synergistically with the battery separator to deliver electrolyte to the lead oxide plate during the operation of the battery.
US09118064B2 Redox flow battery
Provided are a redox flow battery (RF battery) in which a positive electrode electrolyte and a negative electrode electrolyte are supplied to a battery cell including a positive electrode, a negative electrode, and a membrane, to charge and discharge the battery, and a method of operating the RF battery. The positive electrode electrolyte contains a manganese ion, or both of a manganese ion and a titanium ion. The negative electrode electrolyte contains at least one type of metal ion selected from a titanium ion, a vanadium ion, a chromium ion, a zinc ion, and a tin ion. The RF battery can have a high electromotive force and can suppress generation of a precipitation of MnO2 by containing a titanium ion in the positive electrode electrolyte, or by being operated such that the positive electrode electrolyte has an SOC of not more than 90%.
US09118063B2 Fiber mat for battery plate reinforcement
Embodiments of the invention provide batteries, electrodes, and methods of making the same. According to one embodiment, a battery may include a positive plate having a grid pasted with a lead oxide material, a negative plate having a grid pasted with a lead based material, a separator separating the positive plate and the negative plate, and an electrolyte. A nonwoven glass mat may be in contact with a surface of either or both the positive plate or the negative plate to reinforce the plate. The nonwoven glass mat may include a plurality of first coarse fibers having fiber diameters between about 6 μm and 11 μm and a plurality of second coarse fibers having fiber diameters between about 10 μm and 20 μm.
US09118061B2 Secondary battery
A battery, including a housing defining an interior space, the housing including a safety vent, the safety vent having a concave shape such that a central portion of the safety vent protrudes toward the space, a region of the safety vent that protrudes farthest toward the space being about midway between peripheral edges of the safety vent.
US09118060B2 Battery mounting structure
A mounting portion of a battery is provided with a bracket that is placed to face a front face of the battery. A wire harness is placed forward of the battery in a vehicle and is displaced to one side of the bracket in a vehicle width direction, and a terminal that is connected to the wire harness is connected to an electrode. A guiding portion extends from an upper end portion of the bracket to a side portion of the bracket on one side in the vehicle width direction, and the wire harness can be slid along the guiding portion when the wire harness contacts the guiding portion from above. Accordingly, the wire harness is guided by the guiding portion to a position in a routed state in the vehicle width direction.
US09118059B2 Battery attachable/detachable electronic equipment
The electronic equipment disclosed in the present application realizes a battery attachment/detachment mechanism with the reduced number of components, by biasing a slide lever 11 to a protrusion position by a biasing force of a switch lever 13a of a switch 13. More specifically, in the electronic equipment disclosed in the present application, it is unnecessary to provide biasing means for biasing the slide lever 11 to the protrusion position in addition to the switch 13, the number of components is reduced as compared with the configuration provided with biasing means in addition to the switch. By reducing the number of components, the cost is reduced and the assembly time in assembling notebook computers is reduced, thereby improving workability in the assembly.
US09118056B2 Electrolyte membrane for fuel cell, method of manufacturing the electrolyte membrane, membrane-electrode assembly for fuel cell including the electrolyte membrane, and fuel cell including the membrane-electrode assembly
An electrolyte membrane for fuel cells, the electrolyte membrane including a polymer film and a polymerization product of a composition comprising i) a plurality of inorganic particles surface-treated with a surface treatment agent including the polymerizable double bonds and ii) a polymerizable acid monomer, wherein the inorganic particles and the polymerizable acid monomer are impregnated within the polymer film.
US09118054B2 Jet fuel based high pressure solid oxide fuel cell system
A power system for an aircraft includes a solid oxide fuel cell system which generates electric power for the aircraft and an exhaust stream; and a heat exchanger for transferring heat from the exhaust stream of the solid oxide fuel cell to a heat requiring system or component of the aircraft. The heat can be transferred to fuel for the primary engine of the aircraft. Further, the same fuel can be used to power both the primary engine and the SOFC. A heat exchanger is positioned to cool reformate before feeding to the fuel cell. SOFC exhaust is treated and used as inerting gas. Finally, oxidant to the SOFC can be obtained from the aircraft cabin, or exterior, or both.
US09118050B2 Secondary battery having electrode terminal fastened with nut
A secondary battery and an electric vehicle or hybrid electric vehicle, the secondary battery including a case; an electrode terminal coupled to an electrode assembly in the case; a nut fastened with the electrode terminal, the nut having a thread on an inner circumferential surface thereof; a cap plate hermetically sealing the case, the electrode terminal extending through the cap plate; and a seal gasket between the electrode terminal and the cap plate, the seal gasket being compressed by the nut, wherein the electrode terminal includes a flange part below a bottom surface of the cap plate, an insertion part passing through a through-hole of the cap plate, and a fastening part having a thread recess engaged with the thread of the nut, and wherein the nut is rotatably fastened with the fastening part of the electrode terminal, such that a front end of the thread contacts a back end of the thread recess when viewed from a rotation direction of the nut.
US09118049B2 Fuel cell system
A fuel cell system determines whether an operation condition of a fuel cell corresponds to a fuel gas shortage or an oxidation gas shortage. Upon determining that the fuel gas is in shortage, the system sets a lower voltage limit to be higher than that set when the system determines that the oxidation gas is in shortage. The system further controls an output voltage from the fuel cell so as to prevent output voltage from the fuel cell from decreasing below the lower voltage limit.
US09118046B2 Humidifier and fuel cell system
This specification discloses a humidifier that attains the inhibition of the damaging of a steam permeable membrane at low temperatures, and a fuel cell system. The humidifier has a steam permeable membrane therein. In the humidifier, an oxidizing gas and an oxidizing off gas with a humidity higher than that of the oxidizing gas are introduced, and the oxidizing gas is humidified by the oxidizing off gas via the steam permeable membrane. The steam permeable membrane is located at a position lower than an inlet for the oxidizing gas but higher than an outlet therefor. Further, the steam permeable membrane is located at a position lower than an inlet for the oxidizing off gas but higher than an outlet therefor.
US09118044B2 Method for manufacturing manifold for fuel cell
A method for manufacturing a manifold for a fuel cell with a multilayer structure by injection-molding individual manifolds, each having welding projections and welding guides, and bonding the injection-molded individual manifolds by vibration welding includes arranging welding projections of an upper individual manifold and welding guides of a lower individual manifold to be engaged with each other while maintaining a uniform gap between each other to bond a plurality of individual manifolds in an up and down stacking structure, pressing the lower individual manifold upward, and applying vibration to the upper individual manifold in the left and right direction, thus bonding the upper and lower individual manifolds. Among the welding projections of the upper individual manifold, a non-horizontal welding projection whose longitudinal direction does not coincide with the vibration direction of the individual manifold has a variable height.
US09118038B2 Organic light emitting diode display and method for manufacturing the same
An organic light emitting diode display includes a substrate, first electrodes patterned on the substrate, pixel defining layers on the substrate to separate the first electrodes corresponding to pixel units, light emitting layers on the first electrodes and separated corresponding to the pixel units, and a second electrode on the light emitting layers, wherein the pixel defining layers have pores.
US09118034B2 Metal oxide thin film substrate for OLED and method of fabricating the same
A metal oxide thin film substrate for an organic light-emitting device (OLED) which exhibits superior light extraction efficiency and can be easily fabricated at low cost and a method of fabricating the same and a method of fabricating the same. The metal oxide thin film substrate for an OLED includes a base substrate and a metal oxide thin film formed on the base substrate, the metal oxide thin film being made of a mixture of at least two metal oxides having different refractive indices.
US09118027B1 Nanoplasmonic cavities for photovoltaic applications
Nanoplasmonic cavities for photovoltaic applications include at least one transparent conductive substrate. The nanoplasmonic cavities comprising a sandwich of layers incorporating a first plasmonic electrically conductive nanostructure layer, at least one photoabsorber layer and a at least one electron transfer layer and a second plasmonic electrically conductive nanostructure layer.
US09118024B2 Electroluminescent devices having a color emitting galium complex
The present disclosure provides an electroluminescent device including a light-emitting layer containing a blue or a blue-green fluorescent light emitting material that contains a dialkyl-gallium moiety coordinated to a bidentate nitrogen bonding chelating ligand to form a gallium containing 6-membered heteroatom ring. The invention also provides a display or area lighting device including the OLED device, a process for emitting light, and a dialkyl-gallium chelate complex. The device provides unexpected and useful light emissions in the blue and green regions of the visible spectrum.
US09118021B2 Heterocyclic compound and organic light-emitting device including the same
Novel heterocyclic compounds that impart improved luminescence efficiency characteristics such as low voltage, high luminance and long lifetime to organic light-emitting devices are described. Synthetic methods for the subject heterocyclic compounds are described. Methods for the construction of an organic light-emitting device comprising at least one of the subject heterocyclic compounds and comprising various hole transport layers, various electron transport layers and an emission layer are disclosed. The emission layer can comprise red, green, blue and white emission layers; one of said emission layers can comprise a phosphorescent compound. In certain embodiments, the heterocyclic compounds are useful as either fluorescent dopants or as phosphorescent hosts in the emission layer.
US09118019B2 Heterocyclic radical or diradical, the dimers, oligomers, polymers, dispiro compounds and polycycles thereof, the use thereof, organic semiconductive material and electronic or optoelectronic component
The present invention relates to heterocyclic radicals or diradicals, the dimers, oligomers, polymers, dispiro compounds and polycycles thereof, to the use thereof, to organic semiconductive materials and to electronic and optoelectronic components.
US09118008B2 Field focusing features in a ReRAM cell
A resistive random access memory (ReRAM) cell comprising a first conductive electrode and a dielectric storage material layer over the first conductive electrode. The dielectric storage material layer is conducive to the formation of conductive filaments during the application of a filament forming voltage to the cell. The cell includes a second conductive electrode over the dielectric storage material layer and a layer of conductive nanoclusters (911, 1211) including a plurality of nanoclusters in contact with the dielectric storage material layer and in contact with the first conductive electrode or the second conductive electrode.
US09118004B2 Memory cells and methods of forming memory cells
Some embodiments include methods of forming memory cells. Programmable material may be formed directly adjacent another material. A dopant implant may be utilized to improve adherence of the programmable material to the other material by inducing bonding of the programmable material to the other material, and/or by scattering the programmable material and the other material across an interface between them. The memory cells may include first electrode material, first ovonic material, second electrode material, second ovonic material and third electrode material. The various electrode materials and ovonic materials may join to one another at boundary bands having ovonic materials embedded in electrode materials and vice versa; and having damage-producing implant species embedded therein. Some embodiments include ovonic material joining dielectric material along a boundary band, with the boundary band having ovonic material embedded in dielectric material and vice versa.
US09118003B2 Variable resistance memory devices and method of forming the same
A variable resistance memory device includes a lower electrode on a substrate, a variable resistance pattern on the lower electrode, and an upper electrode on the variable resistance pattern. The upper electrode is in contact with at least a sidewall of the variable resistance pattern.
US09117996B2 Piezoelectric vibrator, oscillator, electronic apparatus and radio timepiece
A piezoelectric vibrator including a package having a base member, a lid member forming a cavity with respect to the base member, and a piezoelectric vibrating piece mounted on a mount surface and housed inside the cavity, in which the piezoelectric vibrating piece has a pair of vibrating arm portions and a base portion cantilever-supporting base end portions of the pair of vibrating arm portions and being mounted on the mount surface, a concave portion for avoiding contact with respect to tip portions when the vibrating arm portions are displaced in a thickness direction is formed on the mount surface, contact portions contacted by main surfaces of the vibrating arm portions facing the mount surface, and clearance portions for avoiding contact with at least one edge-line portion of two edge-line portions where the main surface intersects with two side surfaces.
US09117994B2 Electronic device
Provided is an electronic device including: a base; a panel; a support for supporting the panel with respect to the base; and a vibrator for causing the panel to vibrate at a given frequency. The support includes a first region located at a part corresponding to a node of vibration of the panel, and a second region located at a part other than the node of the vibration of the panel. The support has a rigidity that is smaller in the first region than in the second region.
US09117984B2 Encapsulating layer-covered optical semiconductor element, producing method thereof, and optical semiconductor device
A method for producing an encapsulating layer-covered optical semiconductor element includes a disposing step of disposing an encapsulating layer at one side in a thickness direction of a support and a covering step of, after the disposing step, covering an optical semiconductor element with the encapsulating layer so as to expose one surface thereof to obtain an encapsulating layer-covered optical semiconductor element.
US09117982B2 Light-emitting device including transparent resin with curved surface arranged at side facing light-emitting diode element
A light-emitting device includes a substrate that includes at least a pair of electrodes, an LED element electrically mounted on the substrate, a phosphor plate adhered to an upper surface of the LED element and including an upper surface and a lower surface each having an area larger than that of the upper surface of the LED element, a white resin provided on an upper surface of the substrate and seamlessly covering a peripheral side surface of the LED element and a peripheral side surface of the phosphor plate. A lower surface of the phosphor plate is adhered to the upper surface of the LED element through a transparent adhesive.
US09117978B2 Thermosetting silicone resin sheet and method for producing the same, and light-emitting apparatus using the thermosetting silicone resin sheet and method for producing the same
The present invention provides a thermosetting silicone resin sheet having a phosphor-containing thermosetting silicone resin layer formed in the form of an LED device and a method for producing the same, and a light-emitting apparatus using the thermosetting silicone resin sheet and a method for producing the same. The present invention was accomplished by the phosphor-containing thermosetting silicone resin sheet comprising a substrate film and a phosphor-containing thermosetting silicone resin layer that is a plastic solid or a semi-solid at room temperature composed of a single layer having no adhesive layer, formed by printing and molding a phosphor-containing thermosetting silicone resin composition on the substrate film in the form of an LED device.
US09117975B2 Light emitting device having an anti-crack layer
Disclosed is a light emitting device including a conductive substrate, a first electrode layer disposed on the conductive substrate, a light emitting structure disposed on the first electrode layer, the light emitting structure including a first semiconductor layer, a second semiconductor layer, and an active layer disposed between the first semiconductor layer and the second semiconductor layer, a second electrode layer electrically connected to the second semiconductor layer, and an anti-crack layer disposed on a boundary on which the light emitting structure is segmented on a chip basis, wherein the anti-crack layer is disposed under the light emitting structure and includes a metal material contacting the light emitting structure.
US09117966B2 Inverted metamorphic multijunction solar cell with two metamorphic layers and homojunction top cell
A multijunction solar cell including an upper first solar subcell, and the base-emitter junction of the upper first solar subcell being a homojunction; a second solar subcell adjacent to said first solar subcell; a third solar subcell adjacent to said second solar subcell. A first graded interlayer is provided adjacent to said third solar subcell. A fourth solar subcell is provided adjacent to said first graded interlayer, said fourth subcell is lattice mismatched with respect to said third subcell. A second graded interlayer is provided adjacent to said fourth solar subcell; and a lower fifth solar subcell is provided adjacent to said second graded interlayer, said lower fifth subcell is lattice mismatched with respect to said fourth subcell.
US09117964B2 Preparation of semiconductor films
The invention relates to a preparation process for thin semiconducting inorganic films comprising various metals (Cu/In/Zn/Ga/Sn), selenium and/or sulfur. The process uses molecular precursors comprising metal complexes with oximato ligands. Copper-based chalcopyrites of the I-III-IV2-type are prepared with high purity at low temperatures under ambient conditions. The thin films can be used in photovoltaic panels (solar cells).
US09117962B2 CIGS light-absorbing ink and method for preparing CIGS light-absorbing layer
The present invention relates to a method for preparing a CIS- or CIGS-based light-absorbing layer which is included in a thin film solar cell. More particularly, the present invention relates to a method for preparing a CIS- or CIGS-based light-absorbing layer which ultimately improves the efficiency of a solar cell since the remaining carbon impurities in the formed light-absorbing layer are minimized and additional sulfurization treatment or selenium treatment is made optional, not requisite.
US09117960B2 Ion implantation method, carrier, and ion implantation device
An ion implantation method includes: placing, in an atmosphere, a mask, which is used in conjunction with a tray for accommodating a substrate for a solar cell, at a first position covering a partial area on a surface of the substrate while maintaining the mask aligned relative to the substrate or at a second position distanced from the surface of the substrate; implanting, in a vacuum, ions in a first area on the surface of the substrate while the mask is placed at the first position; and implanting, in a vacuum, ions in a second area on the surface of the substrate while the mask is placed at the second position.
US09117957B2 Thin-film solar battery and method for manufacturing the same
A thin-film solar battery is constructed such that it includes a translucent insulating substrate, a first transparent conductive film formed of a crystalline transparent conductive film on the translucent insulating substrate, with an uneven structure on a surface thereof, a second transparent conductive film formed of a transparent conductive film on the first transparent conductive film, with an uneven structure on a surface thereof, where the uneven structure is more gentle than the uneven structure of the first transparent conductive film, a power generation layer formed on the second transparent conductive film and having at least one crystalline layer to generate power, and a backside electrode layer formed of a light-reflective conductive film on the power generation layer. A substantially convex hollow portion projecting from the translucent insulating substrate is provided between adjacent convex portions in the uneven structure of the first transparent conductive film.
US09117951B2 Solar cell module support structure
The present invention provides a solar cell module support structure comprising: a first support for a solar cell module to be received and supported; a connecting portion connected to the first support; a main frame connected to the connecting portion so as to support the solar cell module and the first support, having the connection portion mounted thereon and having a mounting groove formed along the length thereof so that the location of the connecting portion can be adjusted along the length thereof; second supports which are provided on the lower side of the main frame, support the main frame from the ground surface, are provided in a plurality, and are arranged in a separated manner from each other; and a connection wire for mutually connecting any one of the second supports with another second support.
US09117947B2 Detector apparatus having a cooling component
A detector apparatus is configured to receive light and generate electrical signals. The detector apparatus includes a housing, a detector disposed in the housing and a cooling component disposed in the housing. The cooling component electrically insulates the detector with respect to the housing or is part of an insulator electrically that insulates the detector with respect to the housing.
US09117946B2 Buried waveguide photodetector
A method of forming an integrated photonic semiconductor structure having a photodetector and a CMOS device may include forming the CMOS device on a first silicon-on-insulator region, forming a silicon optical waveguide on a second silicon-on-insulator region, and forming a shallow trench isolation (STI) region surrounding the silicon optical waveguide such that the shallow trench isolation electrically isolating the first and second silicon-on-insulator region. Within a first region of the STI region, a first germanium material is deposited adjacent a first side wall of the semiconductor optical waveguide. Within a second region of the STI region, a second germanium material is deposited adjacent a second side wall of the semiconductor optical waveguide, whereby the second side wall opposes the first side wall. The first and second germanium material form an active region that evanescently receives propagating optical signals from the first and second side wall of the semiconductor optical waveguide.
US09117940B2 Optical systems fabricated by printing-based assembly
Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.
US09117936B2 Semiconductor diode and method of manufacture
A diode (200) is disclosed having improved efficiency, smaller form factor, and reduced reverse biased leakage current. Schottky diodes (212) are formed on the sidewalls (210) of a mesa region (206). The mesa region (206) is a cathode of the Schottky diode (212). The current path through the mesa region (206) has a lateral and a vertical current path. The diode (200) further comprises a MOS structure (214), p-type regions (220), MOS structures (230), and p-type regions (232). MOS structure (214) with the p-type regions (220) pinch-off the lateral current path under reverse bias conditions. P-type regions (220), MOS structures (230), and p-type regions (232) each pinch-off the vertical current path under reverse bias conditions. MOS structure (214) and MOS structures (230) reduce resistance of the lateral and vertical current path under forward bias conditions. The mesa region (206) can have a uniform or non-uniform doping concentration.
US09117935B2 Current aperture diode and method of fabricating same
A diode and a method of making same has a cathode an anode and one or more semiconductor layers disposed between the cathode and the anode. A dielectric layer is disposed between at least one of the one or more semiconductor layers and at least one of the cathode or anode, the dielectric layer having one or more openings or trenches formed therein through which the at least one of said cathode or anode projects into the at least one of the one or more semiconductor layers, wherein a ratio of a total surface area of the one or more openings or trenches formed in the dielectric layer at the at least one of the one or more semiconductor layers to a total surface area of the dielectric layer at the at least one of the one or more semiconductor layers is no greater than 0.25.
US09117934B2 Electromechanical devices and methods for fabrication of the same
A fabricated electromechanical device is disclosed herein. An exemplary device includes, a substrate, at least one layer of a high-transconductance material separated from the substrate by a dielectric medium, a first electrode in electrical contact with the at least one layer of a high-transconductance material and separated from the substrate by at least one first supporting member, a second electrode in electrical contact with the layer of a high-transconductance material and separated from the substrate by at least one second supporting member, where the first electrode is electrically separate from the second electrode, and a third electrode separated from the at least one layer of high-transconductance material by a dielectric medium and separated from each of the first electrode and the second electrode by a dielectric medium.
US09117930B2 Methods of forming stressed fin channel structures for FinFET semiconductor devices
One method disclosed herein includes forming a first stressed conductive layer within the trenches of a FinFET device and above the upper surface of a fin, forming a second stressed conductive layer above the first stressed conductive layer, removing a portion of the second stressed conductive layer and a portion of the first stressed conductive layer that is positioned above the fin while leaving portions of the first stressed conductive layer positioned within the trenches, and forming a conductive layer above the second stressed conductive layer, the upper surface of the fin and the portions of the first stressed conductive layer positioned within the trenches.
US09117927B2 Method of semiconductor integrated circuit fabrication
A method of fabricating a semiconductor integrated circuit (IC) is disclosed. A high-k/metal gate (HK/MG) and a conductive feature are disposed over a substrate, separated by a first dielectric layer. A global hard mask (GHM) layer is formed over the HK/MG, the conductive feature and the first dielectric layer. A second dielectric layer is then formed over the GHM layer. The second dielectric layer is etched to form a first opening to expose a portion of the HK/MG and a second opening to expose a portion of the conductive feature, by using the GHM layer as an etch stop layer. The GHM layer in the first opening and the second opening is then removed.
US09117917B2 Thin film transistor, thin film transistor panel, and method for manufacturing the same
A Thin Film Transistor (TFT) includes a substrate, a semiconductor layer disposed on the substrate a first source electrode and a first drain electrode spaced apart from each other on the semiconductor layer, a channel area disposed in the semiconductor layer between the first source electrode and the first drain electrode, an etching prevention layer disposed on the channel area, the first source electrode, and the first drain electrode and a second source electrode in contact with the first source electrode, and a second drain electrode in contact with the first drain electrode.
US09117912B2 IGZO transistor structure and manufacturing method for the same
The present invention provides an IGZO transistor and a manufacturing method for the same. Wherein, the method comprises forming a source electrode, a drain electrode, and an IGZO layer on a substrate; forming a protect layer at a channel of the IGZO layer; performing N-type doping to a contact region of the source/drain electrodes and the IGZO layer to form a n+IGZO region through plasma treatment; and forming a gate insulation layer and a gate electrode. The IGZO transistor structure and method for the same provided by the present invention can prevent the channel of the IGZO layer from damage during N-type doping through the plasma treatment. It can improve the ohmic contact and increase device characteristics.
US09117908B2 Methods of forming replacement gate structures for semiconductor devices and the resulting semiconductor products
One method disclosed includes, forming a sacrificial gate structure trench in a stack of sacrificial material layers, forming a sacrificial gate structure within the trench, performing at least one process operation to remove at least portions of the stack of sacrificial material layers and thereby expose sidewalls of the sacrificial gate structure, forming a sidewall spacer adjacent the exposed sidewalls of the sacrificial gate structure, removing the sacrificial gate structure so as to define a replacement gate cavity between the spacers, forming a replacement gate structure in the replacement gate cavity, and forming a gate cap above the replacement gate structure within the replacement gate cavity.
US09117905B2 Method for incorporating impurity element in EPI silicon process
The present disclosure provides a method of fabricating a semiconductor device that includes forming a plurality of fins, the fins being isolated from each other by an isolation structure, forming a gate structure over a portion of each fin; forming spacers on sidewalls of the gate structure, respectively, etching a remaining portion of each fin thereby forming a recess, epitaxially growing silicon to fill the recess including incorporating an impurity element selected from the group consisting of germanium (Ge), indium (In), and carbon (C), and doping the silicon epi with an n-type dopant.
US09117898B2 Method of fabricating a plurality of cut marks on a substrate
A processing method for a package substrate composed of a substrate, a plurality of device chips mounted on the substrate in a plurality of separate device regions defined by a plurality of crossing division lines, and a sealing layer for sealing the device chips. The processing method includes a cut mark forming step of moving a cutting blade to cut into the package substrate from the side of the substrate in the regions other than the device regions to the depth passing through the sealing layer, thereby forming a cut mark having a predetermined positional relation to the division lines, and a cutting step of cutting the package substrate from the side of the sealing layer along the division lines by using the cutting blade according to the cut mark after performing the cut mark forming step.
US09117895B2 Laser processing method
A laser processing method for performing laser processing to a workpiece. The laser processing method includes: a filament forming step of applying a first pulsed laser beam having a transmission wavelength to the workpiece to thereby form a filament as an optical transmission line in the workpiece so that the filament extends from the surface of the workpiece to be irradiated with the first pulsed laser beam to the inside of the workpiece, the filament having a refractive index higher than that of the workpiece; and a laser processing step of applying a second pulsed laser beam to the filament after performing the filament forming step to thereby transmit the second pulsed laser beam along the filament, thereby processing the workpiece with the second pulsed laser beam.
US09117893B1 Tunneling transistor suitable for low voltage operation
Several embodiments of a tunneling transistor are disclosed. In one embodiment, a tunneling transistor includes a semiconductor substrate, a source region formed in the semiconductor substrate, a drain region formed in the semiconductor substrate, a gate stack including a metallic gate electrode and a gate dielectric, and a tunneling junction that is substantially parallel to an interface between the metallic gate electrode and the gate dielectric. As a result of the tunneling junction that is substantially parallel with the interface between the metallic gate electrode and the gate dielectric, an on-current of the tunneling transistor is substantially improved as compared to that of a conventional tunneling transistor. In another embodiment, a tunneling transistor includes a heterostructure that reduces a turn-on voltage of the tunneling transistor.
US09117887B2 Fabrication method of semiconductor device
A semiconductor device and its fabrication method are provided. A first dielectric layer is provided to cover a substrate. The first dielectric layer contains a plurality of first conductive layers. A portion of each first conductive layer is removed to form a plurality of first openings in the first dielectric layer. A second dielectric layer is formed in each first opening. A third dielectric layer having second-openings are formed on the first dielectric layer and on the second dielectric layers. Each second-opening exposes at least two adjacent second dielectric layers. Second dielectric layers exposed by a first second-opening are removed to form third openings to expose corresponding first conductive layers. Second conductive layers are formed in the third opening and the second-openings including the first second-opening. Stable electrical interconnections with high quality electrical isolations can be provided.
US09117879B2 Semiconductor device and manufacturing method thereof
A semiconductor device includes a first semiconductor chip comprising a first metallic structure, a top surface, and a bottom surface, a second semiconductor chip comprising a second metallic structure, wherein the second semiconductor chip is bonded with the first semiconductor chip on the bottom surface, a conductive material connecting the first metallic structure and the second metallic structure, wherein a portion of the conductive material is inside the first semiconductor chip and the second semiconductor chip, and a dielectric layer disposed surrounding the portion of the conductive material.
US09117877B2 Methods of forming a dielectric cap layer on a metal gate structure
Disclosed herein are various methods of forming isolation structures on FinFETs and other semiconductor devices, and the resulting devices that have such isolation structures. In one example, the method includes forming a plurality of spaced-apart trenches in a semiconducting substrate, wherein the trenches define a fin for a FinFET device, forming a layer of insulating material in the trenches, wherein the layer of insulating material covers a lower portion of the fin but not an upper portion of the fin, forming a protective material on the upper portion of the fin, and performing a heating process in an oxidizing ambient to form a thermal oxide region on the covered lower portion of the fin.
US09117875B2 Methods of forming isolated germanium-containing fins for a FinFET semiconductor device
Forming a plurality of initial trenches that extend through a layer of silicon-germanium and into a substrate to define an initial fin structure comprised of a portion of the layer of germanium-containing material and a first portion of the substrate, forming sidewall spacers adjacent the initial fin structure, performing an etching process to extend the initial depth of the initial trenches, thereby forming a plurality of final trenches having a final depth that is greater than the initial depth and defining a second portion of the substrate positioned under the first portion of the substrate, forming a layer of insulating material over-filling the final trenches and performing a thermal anneal process to convert at least a portion of the first or second portions of the substrate into a silicon dioxide isolation material that extends laterally under an entire width of the portion of the germanium-containing material.
US09117873B2 Direct multiple substrate die assembly
A direct multiple substrate die assembly can include a first and a second substrate, wherein each substrate can include at least one interlocking edge feature. An electrical interconnection area can be formed adjacent to or within the interlocking edge feature on each substrate and can be configured to couple one or more electrical signals between the substrates. In one embodiment, the interlocking edge feature can include one or more keying features that can enable accurate alignment between the substrates. In yet another embodiment, the direct multiple substrate die assembly can be mounted out of plane with respect to a supporting substrate.
US09117872B2 Semiconductor device and method for manufacturing the semiconductor device
A semiconductor device includes a p-type collector region, a drift region arranged on the collector region, a base region arranged on the drift region, an emitter region arranged on the base region, a gate oxide film arranged on the bottom surface and side surface of a trench which penetrates the emitter region and the base region, and a gate electrode embedded in the inside of the trench so as to be opposed to the base region while interposing the gate oxide film therebetween, wherein the position of the lower surface of the base region is shallower in the region brought into contact with the gate oxide film than in the region spaced apart from the gate oxide film.
US09117871B2 Multi-axial acceleration sensor and method of manufacturing the same
The present invention provides a multi-axial acceleration sensor and a method of manufacturing the multi-axial acceleration sensor. The method includes: providing a substrate having a lead plane; disposing a first sensor chip onto the lead plane, wherein a wire bonding plane of the first sensor chip is perpendicular to the lead plane; and disposing a second sensor chip onto the lead plane, wherein a wire bonding plane of the second sensor chip is in parallel with the lead plane.
US09117866B2 Apparatus and method for calculating a wafer position in a processing chamber under process conditions
An apparatus for processing a wafer including a reaction chamber having a reaction space for processing the wafer, a susceptor positioned within the reaction chamber and having a sidewall, at least one light source positioned outside of the reaction space, at least one window in the reaction chamber, and wherein the at least one light source is directed through the at least one window to contact the sidewall.
US09117865B2 Robot systems, apparatus, and methods having independently rotatable waists
Electronic device processing systems and robot apparatus are described. The systems and apparatus are adapted to efficiently pick or place substrates into twin chambers by having independently rotatable first and second booms, and independently rotatable first and second upper arms, wherein each upper arm has a forearm, a wrist member, and an end effector adapted to carry a substrate coupled thereto. The boom members and upper arms are driven through co-axial drive shafts in some embodiments. Co-axial and non-coaxial drive motors are disclosed. Methods of operating the robot apparatus and processing systems are provided, as are numerous other aspects.
US09117864B2 Assemblies of stacked cassettes
A cassette assembly for storing a plurality of platelike workpieces. The cassette assembly includes a first cassette, a second cassette stacked on the first cassette, and a fixing unit for fixing the first cassette and the second cassette to each other in the stacked condition. Both of the cassettes include a first side plate having workpiece supporting grooves, and a second side plate arranged parallel to the first side plate. The second side plate has workpiece supporting grooves respectively opposed to the workpiece supporting grooves of the first side plate, a top plate for connecting the upper ends of the first and second side plates, a bottom plate for connecting the lower ends of the first and second side plates, and a load/unload opening formed near the front ends of the first and second side plates, the top plate, and the bottom plate for loading and unloading the workpieces.
US09117862B2 Substrate processing apparatus, processing tube, substrate holder, fixing part of the substrate holder, substrate processing method, and substrate manufacturing method
There is provided a substrate processing apparatus 101, comprising: a substrate holder 217 that holds a plurality of substrates (wafers) 200 in a state of being arranged in a lateral direction (approximately in a horizontal direction) approximately in a vertical posture; a processing tube 205 that houses the substrate holder 217; a throat side sealing part (throat side mechanical flange part) 2190 that air-tightly closes an opening part of the processing tube 205; a rotation part 255 that rotates the substrate holder 217 in a peripheral direction of the substrates, with an arrangement direction (a direction in which the substrates 200 are held) of the plurality of substrates 200 as a rotation axis, wherein the substrate holder 217 includes a fixing part (movable holding part 217c) and a fixture holding part 217a for fixing the substrates 200 approximately in a vertical posture.
US09117859B2 Compact processing apparatus
A substrate processing apparatus including a chamber capable of holding an isolated atmosphere and having a front and rear disposed along a longitudinal axis and a transport apparatus located in the chamber, and having twin scara arms and a drive section with a coaxial drive shaft assembly, each shaft of which being operably connected to at least one rotatable link of both scara arms to move the twin scara arms, wherein movement of one of the twin scara arms mirrors movement of another of the twin scara arms across the longitudinal axis.
US09117853B2 Transfer system
For transferring an article to a desired position, even in a lateral transfer, a transfer system (100) allows transfer of an article (3) between a transport vehicle (2), which conveys the article (3) while travelling along a rail (1) provided on a ceiling, and a placement portion provided below the rail, in a lateral transfer manner. The transfer system includes a memory unit (101) and a controller (102). The memory unit stores (i) placement position information indicating a transfer position of the article when a transfer unit is to place the article onto the placement portion, and (ii) holding position information indicating a transfer position of the article when the transfer unit is to hold the article on the placement portion. The controller controls the transfer unit such that, when the transfer unit is to place the article, the article is transferred at a transfer position indicated in the placement position information and, when the transfer unit is to hold the article, the article is transferred to a transfer position indicated in the holding position information.
US09117851B2 Semiconductor device comprising a graphene wire
According to one embodiment, a semiconductor device includes a catalyst underlying layer formed on a substrate including semiconductor elements formed thereon and processed in a wiring pattern, a catalyst metal layer that is formed on the catalyst underlying layer and whose width is narrower than that of the catalyst underlying layer, and a graphene layer growing with a sidewall of the catalyst metal layer set as a growth origin and formed to surround the catalyst metal layer.
US09117850B2 Method and system for a gallium nitride vertical JFET with self-aligned source and gate
A semiconductor device includes a III-nitride substrate, a first III-nitride epitaxial layer coupled to the III-nitride substrate and having a mesa, and a second III-nitride epitaxial layer coupled to a top surface of the mesa. The semiconductor device further includes a III-nitride gate structure coupled to a side surface of the mesa, and a spacer configured to provide electrical insulation between the second III-nitride epitaxial layer and the III-nitride gate structure.
US09117847B2 Method for fabricating semiconductor device
A method of fabricating a semiconductor device is disclosed. The method includes the steps of: sequentially forming agate dielectric layer and a first gate layer on a semiconductor substrate, wherein the gate dielectric layer is between the first gate layer and the semiconductor substrate; forming at least an opening in the first gate layer; forming a first dielectric layer conformally on the semiconductor substrate wherein the first dielectric layer covers the first gate layer; and forming a second gate layer filling the opening and overlapping the first gate layer.
US09117846B2 Method of manufacturing oxide thin film transistor
A method of manufacturing an oxide thin film transistor includes forming a gate electrode on a substrate; forming a gate insulating film the gate electrode; forming an oxide semiconductor layer on the gate insulating film; sequentially forming a lower data metal layer and an upper data metal layer on including the oxide semiconductor layer; forming an upper source pattern and an upper drain pattern by patterning the upper data metal layer by a wet etching; forming a lower source pattern and a lower drain pattern by patterning the lower data metal layer by a dry etching using the upper source pattern and the upper drain pattern as a mask to form a source electrode and a drain electrode; forming a first passivation film on the source and drain electrodes; performing a heat treatment on the oxide semiconductor layer; and forming a second passivation film on the first passivation film.
US09117844B2 Pinch-off control of gate edge dislocation
A method of manufacturing a semiconductor device includes providing a substrate having a gate stack, and performing a pre-amorphous implantation (PAI) process to form an amorphized region on the substrate. The method also includes performing an annealing process to recrystallize the amorphized region after the stress film is formed. The annealing process includes a preheat at a temperature in a range from about 400° C. to about 550° C. and an annealing temperature equal to or greater than about 900° C., and the annealing process recrystallizes the amorphized region.
US09117843B2 Device with engineered epitaxial region and methods of making same
An engineered epitaxial region compensates for short channel effects of a MOS device by providing a blocking layer to reduce or prevent dopant diffusion while at the same time reducing or eliminating the side effects of the blocking layer such as increased leakage current of a BJT device and/or decreased breakdown voltage of a rectifier. These side effects are reduced or eliminated by a non-conformal dopant-rich layer between the blocking layer and the substrate, which lessens the abruptness of the junction, thus lower the electric field at the junction region. Such a scheme is particularly advantageous for system on chip applications where it is desirable to manufacture MOS, BJT, and rectifier devices simultaneously with common process steps.
US09117840B2 Method of fabricating spacers in a strained semiconductor device
The present disclosure provides a method for fabricating a semiconductor device that includes forming a gate stack over a silicon substrate, forming dummy spacers on sidewalls of the gate stack, isotropically etching the silicon substrate to form recess regions on either side of the gate stack, forming a semiconductor material in the recess regions, the semiconductor material being different from the silicon substrate, removing the dummy spacers, forming spacer layers having an oxide-nitride-oxide configuration over the gate stack and the semiconductor material, and etching the spacer layers to form gate spacers on the sidewalls of the gate stack.
US09117839B2 Method and system for planar regrowth in GAN electronic devices
A vertical JFET includes a III-nitride substrate and a III-nitride epitaxial layer of a first conductivity type coupled to the III-nitride substrate. The first III-nitride epitaxial layer has a first dopant concentration. The vertical JFET also includes a III-nitride epitaxial structure coupled to the first III-nitride epitaxial layer. The III-nitride epitaxial structure includes a set of channels of the first conductivity type and having a second dopant concentration, a set of sources of the first conductivity type, having a third dopant concentration greater than the first dopant concentration, and each characterized by a contact surface, and a set of regrown gates interspersed between the set of channels. An upper surface of the set of regrown gates is substantially coplanar with the contact surfaces of the set of sources.
US09117838B2 Asymmetrically recessed high-power and high-gain ultra-short gate HEMT device
A high-power and high-gain ultra-short gate HEMT device has exceptional gain and an exceptionally high breakdown voltage provided by an increased width asymmetric recess for the gate electrode, by a composite channel layer including a thin indium arsenide layer embedded in the indium gallium arsenide channel layer and by double doping through the use of an additional silicon doping spike. The improved transistor has an exceptional 14 dB gain at 110 GHz and exhibits an exceptionally high 3.5-4 V breakdown voltage, thus to provide high gain, high-power and ultra-high frequency in an ultra-short gate device.
US09117835B2 Highly integrated miniature radio frequency module
A highly integrated miniature RF module includes a dielectric base board with opposing top and bottom metal layers and having interconnects traces, radio frequency (RF) circuits and semiconductor chips at the top metal layer and ground and signal pads at the bottom metal layer. Metalized vias extending through the dielectric material connect the top and bottom layers. A top cover made out of laminate material, such as FR-4, with opposing top and bottom metal layers and having machined compartments and channels, surrounded with arrays of metal plated vias extending through the laminate material, protects the RF circuits and chips and provide the required isolation and wave propagation.
US09117833B2 Method and device for protecting an integrated circuit against backside attacks
A method for detecting an attack, such as by laser, on an electronic microcircuit from a backside of a substrate includes forming the microcircuit on the semiconductor substrate, the microcircuit comprising a circuit to be protected against attacks, forming photodiodes between components of the circuit to be protected, forming a circuit for comparing a signal supplied by each photodiode with a threshold value, and forming a circuit for activating a detection signal when a signal at output of one of the photodiodes crosses the threshold value.
US09117832B2 Semiconductor device with physical manipulation detector and corrector
A semiconductor device includes a first SSAD unit and a second SSAD unit. The first SSAD unit has at least one first transistor with a first dielectric layer between a first substrate and a first floating gate. The second SSAD unit has at least one second transistor with a second dielectric layer between a second substrate and a second floating gate. The second dielectric layer is thicker than the first dielectric layer.
US09117827B1 Making electrical components in handle wafers of integrated circuit packages
A method for making an integrated circuit package includes providing a handle wafer having a first region defining a cavity. A capacitor is formed in the first region. The capacitor has a pair of electrodes, each coupled to one of a pair of conductive pads, at least one of which is disposed on a lower surface of the handle wafer. An interposer having an upper surface with a conductive pad and at least one semiconductor die disposed thereon is also provided. The die has an integrated circuit that is electroconductively coupled to a redistribution layer (RDL) of the interposer. The lower surface of the handle wafer is bonded to the upper surface of the interposer such that the die is disposed below or within the cavity and the electroconductive pad of the handle wafer is bonded to the electroconductive pad of the interposer in a metal-to-metal bond.
US09117825B2 Substrate pad structure
A structure comprises a first pad protruding over a top surface of a package substrate, wherein the first pad is of a first elongated shape, a second pad embedded in the package substrate, wherein the second pad is of a second elongated shape and a via coupled between the first pad and the second pad.
US09117824B2 Embedded on-chip security
Embodiments of the invention include a semiconductor structure containing a back end of line randomly patterned interconnect structure for implementing a physical unclonable function (PUF), a method for forming the semiconductor device, and a circuit for enabling the interconnect structure to implement the physical unclonable function. The method includes forming a semiconductor substrate and a dielectric layer on the substrate. The randomly patterned interconnect structure is formed in the dielectric layer. The random pattern of the interconnect structure is used to implement the physical unclonable function and is a result of defect occurrences during the manufacturing of the semiconductor structure. The circuit includes n-channel and p-channel metal oxide semiconductor field effect transistors (MOSFETs) and the randomly patterned interconnect structure, which acts as electrical connections between the MOSFETs. The random electrical connections between MOSFETs are utilized for generation of unique keys for purposes such as authentication or identification.
US09117823B2 Conductive film and semiconductor device
A conductive film of an embodiment includes: a fine catalytic metal particle as a junction and a graphene extending in a network form from the junction.
US09117818B2 Dielectric nanocomposites and methods of making the same
Techniques related to nanocomposite dielectric materials are generally described herein. These techniques may be embodied in apparatuses, systems, methods and/or processes for making and using such material. An example process may include: providing a film having a plurality of nanoparticles and an organic medium; comminuting the film to form a particulate; and applying the particulate to a substrate. The example process may also include providing a nanoparticle film having nanoparticles and voids located between the nanoparticles; contacting the film with a vapor containing an organic material; and curing the organic material to form the nanocomposite dielectric film. Various described techniques may provide nanocomposite dielectric materials with superior nanoparticle dispersion which may result in improved dielectric properties.
US09117816B2 Process for forming package-on-package structures
A device includes an inter-layer dielectric, a device die under the inter-layer dielectric; and a die-attach film under the inter-layer dielectric and over the device die, wherein the die-attach film is attached to the device die. A plurality of redistribution lines includes portions level with the die-attach film. A plurality of Z-interconnects is electronically coupled to the device die and the plurality of redistribution lines. A polymer-comprising material is under the inter-layer dielectric. The device die, the die-attach film, and the plurality of Z-interconnects are disposed in the polymer-comprising material.
US09117804B2 Interposer structure and manufacturing method thereof
An interposer structure including a semiconductor substrate, a plurality of shallow trenches, a plurality of deep trenches and a plurality of metal damascene structures is provided. The semiconductor substrate has a first surface and a second surface opposite to each other. The shallow trenches are formed on the first surface in both of a first area and a second area of the semiconductor substrate and correspondingly a plurality of respective openings are formed on the first surface. The deep trenches extend from at least one of the shallow trenches toward the second surface in the second area and correspondingly a plurality of respective openings are formed on the second surface. The metal damascene structures are filled in both of the shallow trenches and the deep trenches. A manufacturing method for the aforementioned interposer structure is also provided.
US09117796B2 Semiconductor arrangement and formation thereof
A semiconductor arrangement and methods of forming the same are described. A semiconductor arrangement includes a first tier including a first capacitor, a second tier over the first tier, the second tier including a second capacitor, and a first substrate between the first tier and the second tier. The first capacitor is connected to the second capacitor through the substrate. A plurality of tiers are contemplated, such that a total capacitance of the semiconductor arrangement increases based upon interconnection of metal layers of different tiers. Additionally, the semiconductor arrangement has a greater area efficiency as compared to multiple capacitors in parallel.
US09117792B2 Chip thermal dissipation structure
Disclosed is a chip thermal dissipation structure, employed in an electronic device comprising a first chip having a first chip face and a first chip back, comprising chip molding material, covering a lateral of the first chip; a first case, contacting the first chip back; a packaging substrate, connecting with the first chip face via first bumps; and a print circuit board, having a first surface and a second surface and connecting with the packaging substrate via solders. The chip thermal dissipation structure further comprises a second case, contacting the second surface. The thermal energy generated by the first chip is conducted toward the first case via the first chip back and toward the second case via the first chip face, the first bumps, the packaging substrate, the solders and the print circuit board.
US09117790B2 Methods and arrangements relating to semiconductor packages including multi-memory dies
In an embodiment, there is provided a packaging arrangement comprising a substrate; a multi-memory die coupled to the substrate, wherein the multi-memory die comprises multiple individual memory dies, and each of the multiple individual memory dies is defined as an individual memory die within a wafer of semiconductor material during production of memory dies, and the multi-memory die is created by singulating the wafer of semiconductor material into memory dies, where at least one of the memory dies is the multi-memory die that includes the multiple individual memory dies that are still physically connected together; and a semiconductor die coupled to the multi-memory die and the substrate, wherein the semiconductor die is configured as a system on a chip, wherein at least one of the multi-memory die and the semiconductor die is attached to the substrate.
US09117784B2 Light-emitting device and electronic apparatus
A light-emitting device includes: a light-emitting element which is disposed in a display region of a base body and includes a first electrode, a second electrode, and a light-emitting functional layer; a first conductor; a first insulating layer which covers the first conductor; a second conductor; and a second insulating layer which covers the second conductor. The second electrode is formed on a surface of the first insulating layer and is electrically connected to the first conductor via a first conduction hole of the first insulating layer, the first conductor is formed on a surface of the second insulating layer and is electrically connected to the second conductor via a second conduction hole of the second insulating layer, and the first conduction hole and the second conduction hole are configured not to overlap each other in a plan view.
US09117782B2 OLED display
An OLED display is disclosed, which includes a substrate and a first and a second light emitting unit arranged on the substrate. A first, a second, a third and a fourth region are defined on the substrate, wherein the sub-pixels in the first and fourth regions and the sub-pixels in the second and third regions are symmetrical with each other. Alternatively, the sub-pixels in the first region and the sub-pixels in the third region are point symmetric to a center of the first light emitting unit, so as to improve displaying resolution of the OLED display.
US09117781B2 Organic light emitting diode display and method for manufacturing the same
An organic light emitting diode display includes a substrate; a first capacitor electrode provided over the substrate and including polysilicon; an insulating layer provided over the first capacitor electrode; and a second capacitor electrode provided over the insulating layer and including a first lower metal layer overlapping with the first capacitor electrode and a first upper metal layer. The first upper metal layer includes a doping opening configured to expose at least a portion of the first lower metal layer.
US09117780B2 Anode connection structure of organic light-emitting diode and manufacturing method thereof
The present invention provides an anode connection structure of an organic light-emitting diode and a manufacture method thereof. The structure includes: a thin-film transistor (20) and an anode (40) of an organic light-emitting diode arrange don the thin-film transistor (20). The thin-film transistor (20) includes a low-temperature poly-silicon layer (24) formed on a substrate (22), a gate insulation layer (26) formed on the low-temperature poly-silicon layer (24), a gate formed on the gate insulation layer (26), a protection layer (27) formed on the gate, and a source/drain (28) formed on the protection layer (27). The anode (40) of the organic light-emitting diode is connected to the low-temperature poly-silicon layer (24). The present invention makes the anode of the organic light-emitting diode directly connected to the low-temperature poly-silicon layer of the thin-film transistor in order to shorten the distance between two adjacent switching thin-film transistors, increase the number of pixels in a unit area (each inch), and improve the resolution of a panel using the anode connection structure of the organic light-emitting diode.
US09117777B2 Methods for manufacturing semiconductor devices
A method for reducing defects from an active layer is disclosed. The active layer may be part of a semiconductor in a semiconductor device. The active layer may be defined at least laterally by an isolation structure, and may physically contact an isolation structure at a contact interface. The isolation structure and the active layer may abut on a common substantially planar surface. The method may include providing a patterned stress-inducing layer on the common substantially planar surface. The stress-inducing layer may be adapted for inducing a stress field in the active layer, and induced stress field may result in a shear stress on a defect in the active layer. The method may also include performing an anneal step after providing the patterned stress-inducing layer on the common substantially planar surface. The method may additionally include removing the patterned stress-inducing layer from the common substantially planar surface.
US09117774B2 Semiconductor device with a semiconductor chip connected in a flip chip manner
A semiconductor device (1,21) includes a solid state device (2,22), a semiconductor chip (3) that has a functional surface (3a) on which a functional element (4) is formed and that is bonded on a surface of the solid state device with the functional surface thereof facing the surface of the solid state device and while maintaining a predetermined distance between the functional surface thereof and the surface of the solid state device, an insulating film (6) that is provided on the surface (2a, 22a) of the solid state device facing the semiconductor chip and that has an opening (6a) greater in size than the semiconductor chip when the surface of the solid state device facing the semiconductor chip is vertically viewed down in plane, and a sealing layer (7) that seals a space between the solid state device and the semiconductor chip.
US09117771B2 Insulation material for integrated circuits and use of said integrated circuits
The invention relates to the fields of microelectronics and materials sciences and concerns an insulation layer material for integrated circuits in microelectronics, which can be used, for example, in integrated circuits as insulation material in semiconductor components. The object of the present invention is to disclose an insulation material for integrated circuits, which has dielectric constants of k≦2 with good mechanical properties at the same time. The object is attained with an insulation material for integrated circuits, containing at least MOFs and/or COFs.
US09117764B2 Etching method, substrate processing method, pattern forming method, method for manufacturing semiconductor element, and semiconductor element
A fluorocarbon layer is formed on a silicon substrate that is a to-be-processed substrate (step A). A resist layer is formed on the thus-formed fluorocarbon layer (step B). Then, the resist layer is patterned into a predetermined shape by exposing the resist layer to light by means of a photoresist layer (step C). The fluorocarbon layer is etched using the resist layer, which has been patterned into a predetermined shape, as a mask (step D). Next, the resist layer served as a mask is removed (step E). After that, the silicon substrate is etched using the remained fluorocarbon layer as a mask (step F). Since the fluorocarbon layer by itself functions as an antireflective film and a harm mask, the reliability of processing can be improved, while reducing the cost.
US09117758B2 Substrate, semiconductor device, and method of manufacturing the same
A substrate capable of achieving a lowered probability of defects produced in a step of forming an epitaxial film or a semiconductor element, a semiconductor device including the substrate, and a method of manufacturing a semiconductor device are provided. A substrate is a substrate having a front surface and a back surface, in which at least a part of the front surface is composed of single crystal silicon carbide, the substrate having an average value of surface roughness Ra at the front surface not greater than 0.5 nm, a standard deviation σ of that surface roughness Ra not greater than 0.2 nm, an average value of surface roughness Ra at the back surface not smaller than 0.3 nm and not greater than 10 nm, standard deviation σ of that surface roughness Ra not greater than 3 nm, and a diameter D of the front surface not smaller than 110 mm.
US09117755B2 Method for fabricating semiconductor device
A method for fabricating a semiconductor device includes forming ohmic electrodes on a source region and a drain region of a nitride semiconductor layer, forming a low-resistance layer between an uppermost surface of the nitride semiconductor layer and the ohmic electrodes by annealing the nitride semiconductor layer, removing the ohmic electrodes from at least one of the source region and the drain region after forming the low-resistance layer, and forming at least one of a source electrode and a drain electrode on the low-resistance layer, the at least one of a source electrode and a drain electrode having an edge, a distance between the edge and a gate electrode is longer than a distance between an edge of the low-resistance layer and the gate electrode.
US09117754B2 Methods for extending floating gates for NVM cells to form sub-lithographic features and related NVM cells
Methods are disclosed for extending floating gate regions within floating gate cells to form sub-lithographic features. Related floating gate cells and non-volatile memory (NVM) systems are also disclosed. In part, the disclosed embodiments utilize a spacer etch to form extended floating gate regions and floating gate slits with sub-lithographic dimensions thereby achieving desired increased spacing between control gate layers and doped regions underlying floating gate structures while still allowing for reductions in the overall size of floating-gate NVM cells. These advantageous results are achieved in part by depositing an additional floating gate layer over previously formed floating gate regions and then using the spacer etch to form the extended floating gate regions as sidewall structures and sub-lithographic floating gate slits. The resulting floating gate structures reduce breakdown down risks, thereby improving device reliability.
US09117753B2 Process for manufacturing a semiconductor device and an intermediate product for the manufacture of a semiconductor device
According to one aspect of the inventive concept there is provided a process for manufacturing a semiconductor device, comprising: providing a channel layer (104), providing a mask (106) on the channel layer, epitaxially growing a contact layer (108) in contact with the channel layer, epitaxially growing a support layer (110) on the contact layer, wherein the support layer is arranged to be etched at a higher rate than the contact layer, forming a trench extending through the support layer by removing the mask, and providing a conductor (118) in the trench. There is also provided an intermediate product for the manufacture of a semiconductor device.
US09117750B2 Resistive element and memory cell of non-volatile memory and manufacturing method thereof
A method for manufacturing a resistive element of a non-volatile memory includes the following steps. An insulation layer is formed on a conductive region. The insulation layer is etched to form a via in the insulation layer, wherein a bottom of the via is contacted with a top surface of the conductive region. A dielectric layer is formed on an inner wall and the bottom of the via. A barrier layer is formed on the dielectric layer. A metal layer is filled into the via. The dielectric layer and the barrier layer are reacted with each other to form a transition layer.
US09117749B1 Semiconductor device and structure
A semiconductor device, including: a first transistor sharing a first diffusion with a second transistor; a third transistor sharing a second diffusion with the second transistor; and at least one programmable resistor; wherein the at least one programmable resistor is connected to the first diffusion and the second diffusion, wherein the at least one programmable resistor includes one of the following: memristor, transition metal oxides, polymeric memristor, ferroelectric memristor, spintronic memristor, spin transfer torque, phase-change structure, programmable metallization structure, conductive-bridging structure, magnetoresistive structure, chalcogenide structure.
US09117748B2 Semiconductor device including a phase change material
A semiconductor device includes a transistor including a plurality of transistor cells in a semiconductor body, each transistor cell including a control terminal and first and second load terminals. The semiconductor device further includes a first electrical connection electrically connecting the first load terminals. The semiconductor device further includes a second electrical connection electrically connecting the second load terminals. The transistor further includes a phase change material exhibiting a solid-solid phase change at a phase transition temperature Tc between 150° C. and 400° C.
US09117747B2 Semiconductor device and method for manufacturing semiconductor device
A semiconductor device includes a first fin-shaped semiconductor layer on a semiconductor substrate, a first insulating film around the first fin-shaped semiconductor layer, a first pillar-shaped semiconductor layer on the first fin-shaped semiconductor layer, a first gate insulating film around the first pillar-shaped semiconductor layer, a first gate line formed around the first gate insulating film and extending in a direction perpendicular to the first fin-shaped semiconductor layer, a second diffusion layer disposed in a lower portion of the first pillar-shaped semiconductor layer, a third gate insulating film surrounding an upper portion of the first pillar-shaped semiconductor layer, a first contact electrode surrounding the third gate insulating film, a second contact electrode that connects an upper portion of the first contact electrode to an upper portion of the first pillar-shaped semiconductor layer, and a first magnetic tunnel junction memory element on the second contact electrode.
US09117743B2 Nitride semiconductor substrate
A nitride semiconductor substrate suitable for a high withstand voltage power device is provided in which current collapse is controlled, while reducing leakage current. In a nitride semiconductor substrate, wherein a buffer layer, an active layer, and an electron supply layer, each comprising a group 13 nitride, are stacked one by one on a silicon single crystal substrate, the buffer layer has a structure where a multilayer stack in which a pair of nitride layers having different concentrations of Al or Ga are repeatedly deposited a plurality of times on an initial layer of AlxGa1−xN (0≦x≦1) is stacked, and includes a doping layer whose carbon concentration is 1×1018 to 1×1021 cm−3 and whose Si concentration is 1×1017 to 1×1020 cm−3, a thickness of the doping layer is 15% or more of the total thickness of the buffer layer.
US09117739B2 Semiconductor devices with heterojunction barrier regions and methods of fabricating same
An electronic device includes a silicon carbide layer including an n-type drift region therein, a contact forming a junction, such as a Schottky junction, with the drift region, and a p-type junction barrier region on the silicon carbide layer. The p-type junction barrier region includes a p-type polysilicon region forming a P-N heterojunction with the drift region, and the p-type junction barrier region is electrically connected to the contact. Related methods are also disclosed.
US09117736B2 Diamond and diamond composite material
A structure having: a substrate and a diamond layer on the substrate having diamond nanoparticles. The diamond nanoparticles are formed by colliding diamond particles with the substrate. A method of: directing an aerosol of submicron diamond particles toward a substrate, and forming on the substrate a diamond layer of diamond nanoparticles formed by the diamond particles colliding with the substrate.
US09117728B2 Solid-state imaging device, method of manufacturing same, and electronic apparatus
A solid-state imaging device includes a plurality of photoelectric conversion units configured to receive light and generate signal charge, the plurality of photoelectric conversion units being provided in such a manner as to correspond to a plurality of pixels in a pixel area of a semiconductor substrate; and pixel transistors configured to output the signal charge generated by the photoelectric conversion units as electrical signals. Each of the pixel transistors includes at least a transfer transistor that transfers the signal charge generated in the photoelectric conversion unit to a floating diffusion corresponding to a drain. A gate electrode of the transfer transistor is formed in such a manner as to extend with a gate insulating film in between from a channel formed area to a portion where the photoelectric conversion unit has been formed on the surface of the semiconductor substrate.
US09117727B2 Transistors, methods of manufacturing the same, and electronic devices including transistors
Example embodiments disclose transistors, methods of manufacturing the same, and electronic devices including transistors. An active layer of a transistor may include a plurality of material layers (oxide layers) with different energy band gaps. The active layer may include a channel layer and a photo sensing layer. The photo sensing layer may have a single-layered or multi-layered structure. When the photo sensing layer has a multi-layered structure, the photo sensing layer may include a first material layer and a second material layer that are sequentially stacked on a surface of the channel layer. The first layer and the second layer may be alternately stacked one or more times.
US09117726B2 Application of reduced dark current photodetector
A IDCA system with internal nBn photo-detector comprising: a photo-absorbing layer comprising an n-doped semiconductor exhibiting valence band energy level; a barrier layer, a first side of the barrier layer adjacent a first side of the photo-absorbing layer, the barrier layer exhibiting a valence band energy level substantially equal to the valence band energy level of the doped semiconductor of the photo absorbing layer; and a contact area comprising a doped semiconductor, the contact area being adjacent a second side of the barrier layer opposing the first side, the barrier layer exhibiting a thickness and conductance band gap sufficient to prevent tunneling of majority carriers from the photo-absorbing layer to the contact area, blocking the flow of thermalized majority carriers from the photo-absorbing layer to the contact area. Alternatively, a p-doped semiconductor is utilized, equalizing barrier conductance band energy levels and photo-absorbing layers.
US09117724B2 Solid-state image sensing device
A solid-state image sensing device is configured such that a first voltage is applied to a first conductivity type semiconductor region and a second voltage is applied to source-drain regions having a second conductivity type of the MOS capacitance to apply inverse bias between the semiconductor region and the source-drain regions of the MOS capacitance.
US09117721B1 Reduced thickness and reduced footprint semiconductor packaging
Semiconductor devices and methods for forming semiconductor devices are presented. A device formed of a semiconductor material is configured to mount upon a substrate layer surface having a substrate layer wire attach pad. The device includes a top planar surface with an electrically active region, and a bottom planar surface disposed substantially parallel to the top planar surface. A shelf region is disposed between the top planar surface and the bottom planar surface, and a device wire attach pad in electrical communication with the active region is located on the shelf region.
US09117713B2 Semiconductor device comprising a gate of an amplifier transistor under an insulating layer and a transfer transistor channel over the insulating layer the amplifier transistor and transfer transistor overlapping
A solid-state image sensor which holds a potential for a long time and includes a thin film transistor with stable electrical characteristics is provided. A reset transistor is omitted by initializing the signal charge storage portion to a cathode potential of a photoelectric conversion element portion in the solid-state image sensor. When a thin film transistor which includes an oxide semiconductor layer and has an off-state current of 1×10−13 A or less is used as a transfer transistor of the solid-state image sensor, the potential of the signal charge storage portion is kept constant, so that a dynamic range can be improved. When a silicon semiconductor which can be used for a complementary metal oxide semiconductor is used for a peripheral circuit, a high-speed semiconductor device with low power consumption can be manufactured.
US09117709B2 Device architecture and method for precision enhancement of vertical semiconductor devices
Improvement of key electrical specifications of vertical semiconductor devices, usually found in the class of devices known as discrete semiconductors, has a direct impact on the performance achievement and power efficiency of the systems in which these devices are used. Imprecise vertical device specifications cause system builders to either screen incoming devices for their required specification targets or to design their system with lower performance or lower efficiency than desired. Disclosed is an architecture and method for achieving a desired target specification for a vertical semiconductor device. Precise trimming of threshold voltage improves targeting of both on-resistance and switching time. Precise trimming of gate resistance also improves targeting of switching time. Precise trimming of a device's effective width improves targeting of both on-resistance and current-carrying capability. Device parametrics are trimmed to improve a single device, or a parametric specification is targeted to match specifications on two or more devices.
US09117693B2 Passive integrated circuit
A passive integrated circuit formed on a substrate, including contact areas of a conductive material specifically capable of receiving bonding pads, wherein the conductive material further creates connections between regions of a lower metallization level.
US09117690B2 Method for producing semiconductor device and semiconductor device
A SGT production method includes a step of forming first and second fin-shaped silicon layers, forming a first insulating film, and forming first and second pillar-shaped silicon layers; a step of forming diffusion layers by implanting an impurity into upper portions of the first and second pillar-shaped silicon layers, upper portions of the first and second fin-shaped silicon layers, and lower portions of the first and second pillar-shaped silicon layers; a step of forming a gate insulating film and first and second polysilicon gate electrodes; a step of forming a silicide in upper portions of the diffusion layers formed in the upper portions of the first and second fin-shaped silicon layers; and a step of depositing an interlayer insulating film, exposing and etching the first and second polysilicon gate electrodes, then depositing a metal, and forming first and second metal gate electrodes.
US09117686B2 3D integrated heterostructures having low-temperature bonded interfaces with high bonding energy
The invention relates to a process for assembling a first element that includes at least one first wafer, substrate or at least one chip, and a second element of at least one second wafer or substrate, involving the formation of a surface layer, known as a bonding layer, on each substrate, at least one of the bonding layers being formed at a temperature less than or equal to 300° C.; conducting a first annealing, known as degassing annealing, of the bonding layers, before assembly, at least partly at a temperature at least equal to the subsequent bonding interface strengthening temperature but below 450° C.; forming an assembling of the substrates by bringing into contact the exposed surfaces of the bonding layers, and conducting an annealing of the assembled structure at a bonding interface strengthening temperature below 450° C.
US09117678B2 Semiconductor devices
A semiconductor device includes a semiconductor region, a first active region in the semiconductor region, a second active region in the semiconductor region, and a conductive gate disposed above the first active region and the second active region. A first contact of the conductive gate is configured to couple to a first node of a circuit associated with the semiconductor device. Moreover, a second contact of the conductive gate is configured to couple to a second node of a circuit associated with the semiconductor device. A resistive device is defined between the first contact and the second contact.
US09117674B2 Method of selective growth without catalyst on a semiconducting structure
A method of selective growth without catalyst on a semi-conducting structure. According to the method, which is applicable in electronics in particular: a semi-conducting structure is formed from first gaseous or molecular flows; at a same time or subsequently, at least one second gaseous or molecular flow is added thereto, to selectively in situ grow a dielectric layer on the structure; and then another semi-conducting structure is grown thereon from third gaseous or molecular flows.
US09117670B2 Inject insert liner assemblies for chemical vapor deposition systems and methods of using same
A system for depositing a layer on a substrate includes a processing chamber, a gas injecting port for introducing gas into the system, a gas distribution plate disposed between the gas injecting port and the processing chamber, the gas distribution plate including holes therein, and an inject insert liner assembly received within the system adjacent to the gas distribution plate and upstream from the processing chamber. The inject insert liner assembly defines gas flow channels therein extending along a lengthwise direction of the system, wherein each channel includes an inlet and an outlet, and at least one channel is tapered along the lengthwise direction of the system in at least one of a vertical or horizontal direction. The inject insert liner assembly has the same number of gas flow channels as the number of holes in the gas distribution plate.
US09117668B2 PECVD deposition of smooth silicon films
Smooth silicon films having low compressive stress and smooth tensile silicon films are deposited by plasma enhanced chemical vapor deposition (PECVD) using a process gas comprising a silicon-containing precursor (e.g., silane), argon, and a second gas, such as helium, hydrogen, or a combination of helium and hydrogen. Doped smooth silicon films and smooth silicon germanium films can be obtained by adding a source of dopant or a germanium-containing precursor to the process gas. In some embodiments dual frequency plasma comprising high frequency (HF) and low frequency (LF) components is used during deposition, resulting in improved film roughness. The films are characterized by roughness (Ra) of less than about 7 Å, such as less than about 5 Å as measured by atomic force microscopy (AFM), and a compressive stress of less than about 500 MPa in absolute value. In some embodiments smooth tensile silicon films are obtained.
US09117665B2 Nonvolatile semiconductor memory device and manufacturing method thereof
In accordance with an embodiment, a nonvolatile semiconductor memory device includes a substrate including a semiconductor layer including an active region, a first insulating film on the active region, a charge storage layer on the first insulating film, an element isolation insulating film defining the active region, a second insulating film, and a control electrode on the second insulating film. The top surface of the element isolation insulating film is placed at a height between the top surface and the bottom surface of the charge storage layer, thereby forming a step constituted of the charge storage layer and the element isolation insulating film. The second insulating film covers the step and the charge storage layer. The second insulating film includes a first silicon oxide film and a first silicon nitride film on the first silicon oxide film. Nitrogen concentration in the first silicon nitride film is non-uniform.
US09117664B2 CVD precursors
A method of producing silicon containing thin films by the thermal polymerization of a reactive gas mixture bisaminosilacyclobutane and source gas selected from a nitrogen providing gas, an oxygen providing gas and mixtures thereof. The films deposited may be silicon nitride, silicon carbonitride, silicon dioxide or carbon doped silicon dioxide. These films are useful as dielectrics, passivation coatings, barrier coatings, spacers, liners and/or stressors in semiconductor devices.
US09117663B2 Method and device for manufacturing a barrier layer on a flexible substrate
The invention provides a method for manufacturing a barrier layer on a substrate, the method comprising: —providing a substrate with an inorganic oxide layer having a pore volume between 0.3 and 10 vol. %; —treating said substrate with an inorganic oxide layer in a glow discharge plasma, said plasma being generated by at least two electrodes in a treatment space formed between said two electrodes, said treatment space also being provided with a gas comprising Nitrogen compounds; and —the treating of the substrate in said treatment space is done at a temperature below 150° C., e.g. below 100° C. The invention further provides a device for manufacturing a barrier layer on a substrate.
US09117662B2 Method for manufacturing semiconductor device
To improve productivity of a transistor that includes an oxide semiconductor and has good electrical characteristics. In a top-gate transistor including a gate insulating film and a gate electrode over an oxide semiconductor film, a metal film is formed over the oxide semiconductor film, oxygen is added to the metal film to form a metal oxide film, and the metal oxide film is used as a gate insulating film. After an oxide insulating film is formed over the oxide semiconductor film, a metal film may be formed over the oxide insulating film. Oxygen is added to the metal film to form a metal oxide film and added also to the oxide semiconductor film or the oxide insulating film.
US09117656B2 Semiconductor cleaning device and semiconductor cleaning method
A semiconductor cleaning device includes an external electrode opposed to a side surface of the semiconductor device; a base configured to allow arrangement of the semiconductor device, and having an opening positioned between the side surface of the semiconductor device in the arranged state and the external electrode, and located below the side surface of the semiconductor device; a frame having an electrically insulating property, being in contact with the external electrode, arranged on the base and opposed to the side surface of the semiconductor device; and suction means connected to the opening in the base and being capable of taking in the foreign matter through the opening. Thereby, the semiconductor cleaning device and a semiconductor cleaning method that can remove the foreign matter adhered to the side surface of the semiconductor device and can prevent re-adhesion of the removed foreign matter can be obtained.
US09117653B2 Method for in-situ dry cleaning, passivation and functionalization of Ge semiconductor surfaces
A method for in-situ dry cleaning of a Ge containing semiconductor surface, other than SiGe. The method is conducted in a vacuum chamber. An oxygen monolayer(s) is formed and promotes removal of essentially all carbon from the surface, and serves to both clean and functionalize the surface. The Ge semiconductor surface is then annealed at a temperature below that which would induce dopant diffusion.
US09117651B2 Transmit/receive switch with series, doubly-floating device and switched bias voltage
An integrated circuit includes a node coupled between a terminal of the integrated circuit and a transmitter circuit. The integrated circuit includes a switch circuit coupled between the node and a receiver circuit. The switch circuit includes a bias circuit coupled to the node. The bias circuit is configured to provide a first bias voltage to the node in response to an indication of a transmit mode of the terminal. The bias circuit is configured to provide a second bias voltage to the node in response to an indication of a receive mode of the terminal. The switch circuit may include a plurality of n-type devices coupled in series. Each of the plurality of n-type devices may include a triple-well, doubly-floating n-type device. The plurality of n-type devices may include a resistively-biased bulk terminal and a resistively-biased n-well.
US09117650B2 Fluorescent lamp with high color rendering index and coating systems therefor
A coating system for a fluorescent lamp, and fluorescent lamps provided therewith. The coating system includes a phosphor-containing coating containing a mixture of phosphors that contain less than 10% weight rare earth phosphors. The phosphor-containing coating emits visible light having a color rendering index of at least 87 when excited by UV radiation.
US09117643B2 Alkali metal introduction apparatus and alkali metal introduction method
An alkali metal introduction apparatus (1) includes: a dedicated fracture chamber (10) and a vacuum chamber (20); vacuum pumps (60a) and (60b) for evacuating the insides of the dedicated fracture chamber (10) and the vacuum chamber (20); an ampul fracturing section for causing, in the dedicated fracture chamber (10), an alkali metal encapsulated in an ampul (16) to be exposed out of the ampul (16) by deforming the ampul (16); a collision cell (40) configured to allow the ampul (16) to be introduced therein, the collision room (40) being provided inside the vacuum chamber (20); and an ampul introducing section (12) for moving the ampul (16) between an exposure position where the alkali metal encapsulated in the ampul (16) is to be exposed out of the ampul (16) thus deformed and an introduction position where the ampul (16) is to be introduced into the collision cell (40).
US09117641B2 Direct sample analysis device adapters and methods of using them
Certain embodiments described herein are directed to adapters for use in coupling a direct sample analysis device to an analytical instrument such as, for example, a mass spectrometer. In some examples, the adapter can include an internal coupler separated from an external coupler through an insulator.
US09117636B2 Plasma catalyst chemical reaction apparatus
A plasma device is disclosed. The plasma device includes: at least one electrode including a nanoporous dielectric layer disposed on at least a portion thereof, the nanoporous dielectric layer including a plurality of pores, wherein at least a portion of the plurality of pores include a catalyst embedded therein.
US09117628B2 Diagnostic method and apparatus for characterization of a neutral beam and for process control therewith
An apparatus and method for characterizing a particle beam provides receiving a particle beam in a central region of a reduced pressure enclosure; impacting the received beam against a beam strike that is thermally isolated from the enclosure; measuring a temperature change of the beam strike due to the impacting beam; measuring a pressure change in the enclosure due to receiving the beam; and processing the measured temperature change and the measured pressure change to determine beam characteristics.
US09117624B2 Apparatus for X-ray generation and method of making same
A system for applying a target track material to an x-ray tube target includes a controller configured to direct a beam of energy toward an x-ray tube target, and direct a solid stock material toward the beam of energy to cause the solid stock material to melt and deposit as a melted material on the x-ray tube target.
US09117623B1 Filament clamp assembly
The filament clamp assembly has a pair of clamps to hold the connecting leads of a filament. Each clamp employs a locking pin within a longitudinally disposed bore that is moved into clamping engagement with a filament lead by rotation of a locking nut that moves a stud with a camming surface into the clamp to lift the locking pin via the camming surface.
US09117616B2 Dielectric barrier discharge-type electrode structure for generating plasma having conductive body protrusion on electrodes
Provided is a dielectric barrier discharge-type electrode structure for generating plasma. The electrode structure, according to the present invention, comprises: an upper conductive body electrode and a lower conductive body electrode; at least one conductive body electrode protrusion portion, which is formed on at least one surface of the upper conductive body electrode and/or the lower conductive body electrode; a dielectric layer which is formed on at least one of the inner surfaces of the upper conductive body electrode and the lower conductive body electrode that face each other, so as to have a substantially uniform thickness; and a specific gap (d) which is formed between the upper and lower conductive body electrodes and the dielectric layer, or between dielectric layers, due to the protruding effect of the conductive body electrode protrusion portion when the upper conductive body electrode and the lower conductive body electrodes come into close contact, wherein the plasma is generated by applying a pulse power or an alternating power to the upper conductive body electrode and the lower conductive body electrode.
US09117615B2 Double wound fusible element and associated fuse
An improved fusible element for use within a circuit protection device is provided which includes a double wound fusible element configured to withstand high surge current associated with inductive and capacitive loads. The fusible element includes an insulated core having a longitudinal axis, a first wire wound about the core along the longitudinal axis of the core, and a second wire wound substantially orthogonally about a longitudinal axis of the first wire such that the fusible element is configured to withstand an over-current surge condition.
US09117613B2 Short circuit indicator module for an electrical switching device and electrical switching device
A short circuit indicator module is disclosed for an electrical switching device, in particular for a circuit breaker. The electrical switching device is configured to interrupt a current flow in the event of a short circuit and/or an overload in a subordinate power circuit. The module includes a housing, a display facility for indicating tripping of the electrical switching device in the event of a short circuit and a movable unlatching element, it being possible for the display facility to be activated by a movement of the unlatching element and the unlatching element being configured to form a functional connection between the short circuit indicator module and the electrical switching device. The module is configured to test the activatability of the display facility of the short circuit indicator module and/or to test the functional connection between the short circuit indicator module and the electrical switching device.
US09117611B2 Electromagnetic contactor
An electromagnetic contactor has a contact device including a pair of fixed contacts disposed maintaining a predetermined distance and a movable contact disposed to be capable of contacting to and separating from the pair of fixed contacts. The pair of fixed contacts each includes a support conductor portion supported by an upper plate of a contact housing case, and a contact conductor portion connected to an end portion of the support conductor portion. The contact conductor portion includes a contact plate portion formed with a contact portion, and a connecting plate portion formed on an outer end portion of the contact plate portion and extending to the upper plate side. The movable contact is mounted onto a connecting shaft connected to a drive portion through a contact spring on an end portion on the upper plate side, and disposed to face the contact portion of the pair of fixed contacts.
US09117610B2 Integrated micro-electromechanical switches and a related method thereof
A system includes a plurality of micro-electromechanical switches including a plurality of gates, coupled to each other. Each micro-electromechanical switch includes a beam electrode disposed on a substrate. A beam includes an anchor portion coupled to the beam electrode. The beam includes a first beam portion extending from the anchor portion along a first direction; and a second beam portion extending from the anchor portion along a second direction opposite to the first direction. A first control electrode and a first contact electrode are disposed on the substrate, facing the first beam portion. A second control electrode and a second contact electrode are disposed on the substrate, facing the second beam portion. The first control electrode and the second control electrode are coupled to form a gate among the plurality of gates. The plurality of micro-electromechanical switches is arranged in at least one of a series arrangement, parallel arrangement.
US09117607B2 Muffler for enhanced arc protection
A muffler for enhanced arc protection is described. In the case of an internal arc event in an electrical enclosure, the muffler exhausts arc gas and plasma parallel to the enclosure surface, instead of directly forward where persons may be located. The muffler includes perforated plates and baffle plates in its interior space. The perforated plates have offset perforation patterns from one another, and the baffle plates are provided on opposing walls, causing the plasma and gas to make multiple directional changes. The perforated plates also filter the arc gas and plasma. These directional changes and filtering result in an energy reduction from the exhaust, which provides an increased margin of safety. In addition, the muffler provides an adequate level of ventilation in the enclosure, thus keeping the components cool.
US09117606B2 Multi-instruction switch for enhancing electrical insulation
A multi-instruction switch for enhancing electrical insulation is provided. The multi-instruction switch includes a housing, a common pin and a switching pin set. The housing comprises an accommodating space which includes a conductive elastic plate moving back-and-forth and a support rack therein. The conductive elastic plate includes a normal connection section and a switching connection section. The support rack includes a limiting track. The common pin is normally in electrical contact with the normal connection section in the housing. The switching pin set includes a first pin having a contact section and a second pin having a trigger section. The limiting track includes a first insulation plate, a second insulation plate, and an insulation space between the first and second insulation plates. As such, the present invention enhances the insulation effect by the first and second insulation plates and the insulation space located at the limiting track.
US09117604B2 Switch mechanism for activating a switch while a display module pivots relative to a host module and portable electronic device therewith
A switch mechanism includes a sliding track disposed inside a host module, and a sliding component. An end of the sliding component is pivotally connected to a display module and the other end of the sliding component is slidably installed inside the sliding track. The sliding component slides in a first direction relative to the sliding track while the display module pivots in a first rotary direction relative to the host module. The switch mechanism further includes an activation component for moving to a first position corresponding to a first switch component to activate a first switch component while the sliding component slides in the first direction.
US09117603B2 Illuminated keyboard equipped with a thin key module
An illuminated keyboard is equipped with a thin key module which includes a support frame with multiple keycap installation apertures and multiple keycaps corresponding to the keycap installation apertures. Each keycap has at least three movable arms each is connected between the first wall of one side of the keycap and the second wall of the keycap installation aperture. The support frame, keycaps and movable arms are integrally formed by injection. The movable arm has a first connecting section connected to the keycap and a second connecting section connected to the first connecting section at a first bend spot. The second connecting section is extended between the keycap and support frame and connected to the keycap installation aperture. In the illuminated keyboard, light is generated by a lighting unit and transmitted through a light guide plate or light guide circuit board to project to the keycaps for illumination.
US09117599B2 Self-guided key switch and keyboard configured with same
In a key switch, a base is disposed under a keycap. A frame has a receiving space for accommodating the keycap, and the receiving space is defined with a first dimension, a second dimension and a third dimension, and any two of the first, second and third dimensions are perpendicular to each other. A guiding mechanism is disposed between the keycap and the base, and configured to guide the keycap in response to an external force exerted on the keycap to move in substantially parallel to the frame with a first displacement in the first dimension, a second displacement in the second dimension and a third displacement in the third dimension.
US09117593B2 Tunable and switchable resonator and filter structures in single crystal piezoelectric MEMS devices using bimorphs
A MEMS device includes a substrate, one or more anchors formed on a first surface of the substrate, and a piezoelectric layer suspended over the first surface of the substrate by the one or more anchors. Notably, the piezoelectric layer is a bimorph including a first bimorph layer and a second bimorph layer. A first electrode may be provided on a first surface of the piezoelectric layer facing the first surface of the substrate, such that the first electrode is in contact with the first bimorph layer of the piezoelectric layer. A second electrode may be provided on a second surface of the piezoelectric layer opposite the substrate, such that the second electrode is in contact with the second bimorph layer of the piezoelectric layer. The second electrode may include a first conducting section and a second conducting section, which are inter-digitally dispersed on the second surface.
US09117592B2 Multilayer ceramic electronic component and mounting board therefor
There are provided a multilayer ceramic electronic component and a mounting board therefor, the multilayer ceramic electronic component including a ceramic body having a hexahedral shape, including dielectric layers, and satisfying T/W>1.0 when a length of the ceramic body is defined as L, a width of a lower surface of the ceramic body is defined as W, and a thickness of the ceramic body is defined as T, and first and second internal electrodes stacked in the ceramic body so as to face each other, having the respective dielectric layers interposed therebetween, wherein when a width of an upper surface of the ceramic body is defined as Wa, 0.800≦Wa/W≦0.985 is satisfied.
US09117590B2 Laminated ceramic electronic component
A laminated ceramic electronic component has electrode layers stacked with ceramic layers, where the thickness of each electrode layer is controlled to 0.5 μm or less and the average size of crystal grains constituting the electrode layer is controlled to 0.1 μm or less. The occurrence of structural defects in the laminated ceramic electronic component can be suppressed and high continuity of the electrode layers stacked with the ceramic layers is ensured.
US09117585B2 Ignition coil
An ignition coil includes a magnetically-permeable core, a primary winding disposed outward of the core, and a secondary winding disposed outward of the primary winding and inductively coupled to the primary winding. The secondary winding includes a left secondary winding section wound clockwise around the primary winding and a right winding section wound counterclockwise around the primary winding. The left secondary winding section has i) a first left winding end distal from the right winding section and ii) a second left winding end that is proximal to the right winding section. The right secondary winding section has i) a first right winding end distal from the left winding section and ii) a second right winding end that is proximal to the left winding section. The second left winding end and the second right winding end are connected to a terminal.
US09117584B2 Solenoid device and solenoid control system
A solenoid device is provided which is equipped with a first and a second magnetic coil and a first, a second, and a third magnetic circuit, and designed so that when the second magnetic coil is deenergized while the first magnetic coil is kept energized following a dual-energized mode in which the first and second magnetic coils are energized, the magnetic flux Φ flowing through the second magnetic circuit disappears. The magnetic flux Φ of the first magnetic coil, thus, continues to flow though the first and third magnetic circuits, thereby creating a magnetic force to keep a first plunger and a third plunger attracted. This enables the plungers to be attracted independently from each other and results in a decrease in power consumption of the magnetic coils when the plurality of plungers are attracted simultaneously.
US09117583B2 Electromagnetic actuator device
An electromagnetic actuator device, comprising a coil unit (14), which surrounds a first yoke section (13) of a stationary yoke unit and can be activated by energizing the coil unit; and armature elements (10, 12), which are guided so as to be movable relative to the yoke unit and which interact with an output-side actuating partner and which can be driven in order to perform an actuating movement. The armature elements interact with at least one second yoke section (15, 16) of the yoke unit to form an air gap (26, 28) for a magnetic flux produced by the activated coil unit.
US09117581B2 Method of manufacturing magnetic powder
An aspect of the present invention relates to a method of manufacturing magnetic powder, which comprises adding an alkali metal salt compound comprising a substituent selected from the group consisting of an alkali metal salt of a carboxyl group and an alkali metal salt of a hydroxyl group to a water-based magnetic liquid comprising magnetic particles dispersed in an acidic water-based solvent to cause the magnetic particles to aggregate in the water-based magnetic liquid; and collecting the aggregated magnetic particles to obtain the magnetic powder.
US09117576B2 Winding support, electrical coil and method to produce an electrical coil
A winding support has at least two parts on which to wind an electrical double coil in two winding planes situated in parallel, orthogonal to a winding axis. Each part has an annular structure with base areas that are identical for all of the parts, and an outer surface that is a band of the surface of a straight cylinder between the bases. Each part has a slit-shaped cut-out extending in a longitudinal direction over a portion of the length of the cylinder. The parts are adjacently connected with one another with a lateral separation therebetween in the direction of the winding axis, and with the cut-outs forming a common slit extending over both parts. An electrical coil has such a winding support, and a method to produce such a coil includes winding a conductor on such a winding support.
US09117573B2 Integrated wire cable twisting, wrapping, and testing apparatus and method of operating same
A single machine configured to manufacture a wire cable assembly including an twisted wire pair and a drain wire having a conductive tape and an insulative tape spirally wrapped about said wire pair. The machine includes a first clamp that secures an end of the wire pair and a second clamp that secures the other end of the wire pair. The second clamp rotates while the first clamp is fixed thereby twisting the wires of the wire pair one about the other. The second clamp can also rotate synchronously with the first clamp thereby rotating the wire pair without twisting. The machine also has a tape reel configured to move parallel to the clamps as they rotate, wrapping tape around the wire pair. The apparatus can be configured to apply the tapes simultaneously to electromagnetically shield and insulate the cable assembly. A method of operating the apparatus is also provided.
US09117572B2 Foamed coaxial cable and multicore cable
A foamed axial cable includes a pair of signal conductors, an insulation covering a periphery of the signal conductor and formed of a foamed material, a skin layer covering a periphery of the insulation and formed of a non-foamed material, and a shield conductor on a periphery of the skin layer. An outer surface of the skin layer or an inner surface of the shield conductor includes a fine groove formed thereon so as to have a void between the skin layer and the shield conductor.
US09117571B2 Electrical lines
An electrical line with at least two leads composed of conductors surrounded by insulation (4) is proposed, where the leads are stranded together and are surrounded by a common electrical shield above which is mounted a circumferential layer of insulation material. The insulation (4) of the leads is composed of a poorly compressible, cross-linked elastomer insulation material whose insulation resistance constant at room temperature is greater than 4,000MΩkm. The shield (7) is composed of a non-woven fabric on the basis of polyamide which. is rendered electrically conductive through metallization.
US09117568B2 Polymer compositions containing carbonaceous fillers
Compositions comprising carbonaceous filler, polymeric binder, and at least one organic compound having at least one charged functional group.
US09117567B2 High temperature-resistant, electrically conductive thin films
Electrically conductive thin film metallizations having continuous operating temperatures of 300° C. and more are of considerable practical interest for a number of technical applications, such as surface wave elements. Technical reasons and high production costs are a bar to the use of standard films. In order to remedy this, films including a mixture of a high-melting conductive metal and aluminum oxides, wherein in particular aluminum-rich non-stoichiometric aluminum oxides are used. The aluminum oxides act as components thermally stabilizing the conductive metal film; an optional proportion of chemically available aluminum can additionally alloy with the conductive metal and thereby enables essential film properties, such as the electrical conductivity to be specifically influenced. It is thus possible, using standard materials and methods of thin film deposition, in a cost-effective manner to produce highly electrically conductive, thermally resistant films having good structurability and comparatively low density for a wide range of different applications.
US09117563B2 Ultra-cold-matter system with thermally-isolated nested source cell
In a disclosed embodiment, an ultra-cold-matter (UCM) system includes a source cell nested within a hermetically-sealed ultra-high-vacuum (UHV) enclosure. Source particles, e.g., strontium atoms, can be generated within the source cell by heating a non-vapor-phase source material. The source cell is thermally isolated, e.g., by UHV, from the enclosure. Accordingly, heat is retained in the source cell, reducing the amount of heat that must be generated in the source cell to generate the vapor-phase source particles. Particles can exit the source cell to an UHV ultra-cold region where the source particles can be cooled to produce ultra-cold particles thermally isolated from the heat within the source cell.
US09117558B1 System and method to control spent nuclear fuel temperatures
Systems and methods of the disclosure are directed toward removing moisture from, and controlling the temperature of, spent nuclear fuel stored in spent fuel containers and the containers themselves. A vacuum system may remove vapor and gas from the container to reduce pressure and stimulate moisture evaporation. The potentially radioactive gas exiting the spent fuel container can also be transported to a radioactive waste gas system. A non-reactive gas is then circulated through a circulation path, which is communicatively coupled to a spent fuel container. The non-reactive gas can absorb heat and/or moisture from the spent fuel stored within the spent fuel container. Accordingly, heat can be removed by a heat exchanger coupled to the circulation path. Condensate moisture can also be removed from the circulation path.
US09117557B2 Radioactive sludge transfer apparatus
Provided is a radioactive sludge transfer apparatus for transferring sludge stored in a sludge storage tank with supernatant solution to a transfer tank including: a transfer body; a stirring apparatus for blasting the supernatant solution to the sludge; a sludge solution transferer for transferring the sludge solution to the transfer tank; an attitude control float; a floating force control ballast tank; and controller for remotely controlling the stifling apparatus, the sludge solution transferer and the floating force control ballast tank.
US09117555B2 Transportation container of fuel assembly
There are provided: a container body (11) that has an opening in one end; a lid member (12A) that seals the opening; a prismatic pipe (30) that is arranged in the container body (11); a fuel holder (20) that covers a side surface of a fuel assembly when inserted into the prismatic pipe (30); and pressing members (37a, 37b) that are arranged on the prismatic pipe (30) and press the fuel holder (20), in the prismatic pipe (30), against inner surfaces of the prismatic pipe (30). One end (23) of the fuel holder (20) is formed in a tapered shape inclining toward an inside of the fuel holder (20). One end of the prismatic pipe (30) is provided with a first guide member (40) that has a recess (41) conforming to a shape of the one end (23) of the fuel holder (20).
US09117553B2 Memory block quality identification in a memory device
If a memory block in a flash memory device is found to have a defect, a memory block quality indication is generated in response to the type of memory defect. This indication is stored in the memory device. In one embodiment, the quality indication is stored in a predetermined location of the defective memory block. Using the quality indication, it can be determined if a system's error correction code scheme is capable of correcting data errors resulting from the defect.
US09117541B2 Refresh request queuing circuitry
An apparatus and system associated with memory are disclosed herein. In various embodiments, an apparatus may include first circuitry to determine a number of queued pending refresh requests for a memory bank based on a comparison of a count from a refresh-request counter to a count from a refresh-address counter; and second circuitry to set a refresh flag in response to a determination that the number of queued pending refresh requests exceeds a predetermined number. Other embodiments may be disclosed and/or claimed.
US09117539B2 Flash memory device reducing noise peak and program time and programming method thereof
A flash memory device reduces noise peak and program time through serial programming of program blocks of memory cells. The time interval or the number of the program groups is decreased according to the proceeding program loop in the plurality of program loops, reducing the total program time.
US09117538B2 Semiconductor device, method for operating the same, and semiconductor system including the same
A semiconductor device includes a page buffer configured to read data out of a memory cell array in response to a bias enable signal, and a control logic configured to generate the bias enable signal and a bias precharge signal that are used to control the memory cell array. The control logic activates the bias enable signal and the precharge signal before a ready/busy signal activating a read operation of the memory cell array is enabled.
US09117536B2 Method for operating non-volatile memory device and memory controller
An operating method for a non-volatile memory device includes applying first and second read voltages to a first word line to perform a read operation; counting first memory cells each having a threshold voltage belonging to a first voltage range between the first read voltage and the second read voltage; applying a third read voltage to the first word line sequentially after applying the second read voltage to count second memory cells each having a second threshold voltage belonging to a voltage range between the second read voltage and the third read voltage; comparing the number of first memory cells counted and the number of second memory cells counted; determining a fourth read voltage based on a result of the comparing; and applying the fourth read voltage to the first word line sequentially after applying the third read voltage.
US09117532B2 Apparatus for initializing perpendicular MRAM device
The present invention is directed to an apparatus for initializing perpendicular magnetic tunnel junction. The apparatus comprises a permanent magnet for generating a magnetic flux; a flux concentrator made of a soft ferromagnetic material and having a base area in contact with the permanent magnet and an tip area that is smaller than the base area, thereby funneling and concentrating the magnetic flux to the tip area for emitting a magnetic field therefrom; and a means for supporting and conveying a substrate with an arrays of magnetic tunnel junctions formed therein to traverse the magnetic field in close proximity to the tip area. The apparatus may further include at least one of the following: a substrate heater, a flux containment structure coupled to the permanent magnet, and a magnetic imaging plate disposed in proximity to the substrate on the opposite side from the flux concentrator.
US09117531B2 User selectable balance between density and reliability
A method for enabling users to select a configuration balance for a memory device is described. The method includes receiving an indication of a memory configuration for a mass memory including two or more of memory cells. One or more memory cells of the mass memory are selected based at least in part on 1) the indication, 2) a current configuration for each of the one or more memory cells and 3) a program-erase count for each of the one or more memory cells. The method also includes determining a new configuration for each of the selected one or more memory cells. For each of the selected one or more memory cells, the configuration of the memory cell is changed from the current configuration to the determined new configuration. Apparatus and computer readable media are also disclosed.
US09117529B2 Inter-cell interference algorithms for soft decoding of LDPC codes
Aspects of the subject technology relate to a method for reading information stored in a flash memory device. In some implementations, the method can include steps including, obtaining a first read signal of a first cell, wherein the first cell is located in a first word line and a first bit line in the flash memory device, obtaining a programming level of a second cell, wherein the second cell is located in a second word line and the first bit line, and wherein the second word line is adjacent to the first word line. In certain aspects, the method may further comprise steps for obtaining decoding information for the first cell based on the programming level of the second cell. A data storage system and article of manufacture are also provided.
US09117528B2 Semiconductor device
A semiconductor device has a smaller area. That is, in a row selection decoder including MOS transistors, which selectively connect a plurality of selection signal lines to row selection lines of NAND flash memories having an SGT structure, the MOS transistors are formed on a planar silicon layer that is formed on a substrate, and each have a structure such that a drain, a gate, and a source are disposed in the vertical direction and the gate surrounds a silicon pillar. The planar silicon layer is formed of a first activation region of a first conductivity type and a second activation region of a second conductivity type, and the first and second activation regions are connected with each other via a silicide layer formed on the surface of the planar silicon layer.
US09117527B2 Non-volatile memory device having configurable page size
A flash memory device having at least one bank, where the each bank has an independently configurable page size. Each bank includes at least two memory planes having corresponding page buffers, where any number and combination of the memory planes are selectively accessed at the same time in response to configuration data and address data. The configuration data can be loaded into the memory device upon power up for a static page configuration of the bank, or the configuration data can be received with each command to allow for dynamic page configuration of the bank. By selectively adjusting a page size the memory bank, the block size is correspondingly adjusted.
US09117522B2 Nonvolatile semiconductor memory device with a write sequence including a setting and removing operation
A nonvolatile semiconductor memory device according to an embodiment comprises: a memory cell array including a plurality of memory cells provided one at each of intersections of a plurality of first lines and a plurality of second lines and each storing data by a data storing state of a filament; and a control circuit configured to execute a write sequence that writes data to the memory cell, the write sequence including: a setting operation that applies a setting pulse having a first polarity to the memory cell; and a removing operation that applies a removing pulse having a second polarity opposite to the first polarity to the memory cell; and the control circuit, during execution of the write sequence, is configured to repeatedly execute the setting operation until the memory cell attains a desired data storing state, and then to execute the removing operation.
US09117512B2 Gate shift register and flat panel display using the same
Discussed are a gate shift register and a flat panel display using the same. The flat panel display includes a display panel for displaying an image, a gate driver for driving a plurality of gate lines of the display panel, and a timing controller for outputting a gate start pulse and a plurality of clock pulses each having first to third voltages, to control the gate driver. The gate driver includes a gate shift register for generating scan pulses each having the first to third voltages, using the clock pulses, and supplying the generated scan pulses to the gate lines, respectively.
US09117506B2 Tracking mechanism
In a method, a current value of a memory cell of a tracked circuit is determined. The memory cell is coupled with a data line. A tracking current value of a tracking memory cell of a tracking circuit is determined. The tracking memory cell is coupled with a tracking data line. A current value of a transistor of the tracking circuit is determined, based on a current value of a transistor of the tracked circuit, the current value of the memory cell, and the tracking current value of the tracking memory cell. A signal of the tracked circuit is generated based on a signal of the tracking circuit.
US09117505B2 Voltage generation circuit, and write driver and semiconductor memory apparatus including the same
A voltage generation circuit includes a charge unit and a discharge unit. The charge unit is configured for raising a level of a ramp voltage to a predetermined level in response to a control signal. The discharge unit is configured for lowering the level of the ramp voltage in response to the control signal. The discharge unit uses a constant current source to lower the level of the ramp voltage.
US09117503B2 Memory array plane select and methods
Memory arrays and methods of forming the same are provided. An example memory array can include at least one plane having a plurality of memory cells arranged in a matrix and a plurality of plane selection devices. Groups of the plurality of memory cells are communicatively coupled to a respective one of a plurality of plane selection devices. A decode logic having elements is formed in a substrate material and communicatively coupled to the plurality of plane selection devices. The plurality of memory cells and the plurality of plane selection devices are not formed in the substrate material.
US09117501B2 Lookup table and programmable logic device including lookup table
To optimize the arrangement of configuration data stored in a configuration memory. A lookup table includes a memory configured to store configuration data, a plurality of multiplexers each configured to select one signal from a plurality of input signals in accordance with the configuration data supplied from the memory and output the one signal, and an inverter. The plurality of multiplexers are connected in a binary tree with multiple levels. The inverter is provided between one of input terminals of a multiplexer in an uppermost level and an output terminal of a multiplexer in one level lower than the uppermost level. Signal selection is performed in each of the multiplexers so that the multiplexer in the uppermost level outputs, as an output signal, one signal of all input signals of the multiplexers in a lowermost level.
US09117500B2 Memory write assist
A write assist cell includes a first pull-down circuit configured to transfer data from a first bit line to a second bit line during a write operation. The write assist cell further includes a second pull-down circuit configured to transfer data from a third bit line to a fourth bit line during a read operation, wherein the write operation and the read operation occur simultaneously. A memory device includes a memory array, the memory array comprises a first bit line and a second bit line. The memory device further includes a write assist cell connected to the memory array, wherein the write assist cell is configured to transfer data from the first bit line in a write operation to the second bit line in a read operation, and the write operation and the read operation occur simultaneously. The memory device further includes a multiplexer connected to the write assist cell.
US09117499B2 Bipolar logic gates on MOS-based memory chips
A system for using selectable-delay bipolar logic circuitry within the address decoder of a MOS-based memory includes a MOS-based memory, which includes an array of a plurality of memory cells configured to store data; an address decoder including bipolar logic circuitry, where the address decoder is configured to accept a word including a plurality of bits and access the array of memory cells using the word; where the bipolar logic circuitry includes a plurality of bipolar transistor devices, where at least one bipolar transistor device has an adjustable gate bias and is configured to accept an input, wherein the gate bias is adjusted based on the input, where the gate bias determines a selectable gate delay.
US09117490B2 Connection tray unit for portable terminal
In a CD player, a connection tray is mounted in a cabinet in a shiftable manner among a retracted position, a first projected position, and a second projected position. The connection tray has an upper tray and a lower tray. The upper tray has a first connector, a second connector, and a stopper. The lower tray has an unlock button, a movable plate, and a lock plate. A lock bracket is formed with a lock depression into which a lock boss is inserted to lock the connection tray in the first projected position, in shifting the connection tray forward from the retracted position. In a front surface of the lock bracket, a lock projection is formed. The lock projection receives the lock boss to lock the connection tray in the second projected position.
US09117488B1 Method for reducing write amplification on a data carrier with overlapping data tracks and device thereof
A novel symmetrical band is disclosed, which may be used in connection with shingled magnetic recording (SMR) in order to reduce write amplification (read-modify-write). Depending on the embodiment, overlapping data tracks diverge from, or converge to the center of each symmetrical band. Associated guard regions may be located at the center, or at the band boundaries, and are shared such that the excess width of a write element is caught by the guard regions from both sides. A symmetrical band may reduce the maximum write amplification by more than half. A hard disk controller may maintain the number of taken or empty tracks on both sides of each symmetrical band substantially equal at every fill level.
US09117486B2 Image output apparatus, method of controlling image output apparatus, and program
There is provided an image output apparatus including an image output unit capable of playing in a unit finer than a frame/field unit on a time axis, and a control unit that determines a play amount by performing a predetermined operation on an operation input amount, advances a time indicating a position on the time axis in accordance with the determined play amount, and instructs the image output unit to output an image at the advanced time.
US09117484B2 Audio medium for a Q pen
An audio medium for a Q pen includes a recording area arranged on a side of the medium body and having multiple recording ID codes to associate with the Q pen and a completion area arranged on the side of the medium body and having multiple completion ID codes to associate with the Q pen as well.
US09117478B2 Pattern forming method, method of manufacturing magnetic recording medium and magnetic recording medium
A patterning method includes steps of forming a first copolymer layer comprising a first diblock copolymer which has portions which are phase incompatible. The first copolymer layer is annealed to form a first phase pattern including a first phase dispersed in a second surrounding phase. The first copolymer is then etched forming a first topographic pattern that corresponds to the first phase pattern. A second copolymer layer of a second diblock copolymer is then formed over the first topographic pattern, and then annealed to generate a second phase pattern offset from the first topographic pattern. Etching is used to form a second topographic pattern corresponding to the second phase pattern. The first and second topographic patterns are then transferred to the substrate. The patterning method can be used, for example, to form patterned recording layers for magnetic storage devices.
US09117475B2 Lubricant composition and use thereof
[Problem] Provided is a novel lubricant composition that is useful as a material of a lubricating layer of a magnetic recording medium.[Means for Resolution] The lubricant composition contains at least one kind of compound represented by the following Formula (1). In the formula, X represents a cyclic group that may be substituted, and Y represents a single bond or a linking group having a valency of 2 or more. Here, at least one of X and Y includes 1 or more polar groups such as a hydroxyl group; Z represents a linking group having a valency of 2 or more and constituted with a carbon atom (C), a fluorine atom (F), and 1 or 2 kinds of arbitrary atoms (here, a hydrogen atom is excluded); n represents a real number of 1 to 10; m represents a real number of 0 to 1; and s and t independently represent a real number of 1 or greater. XYZ—CnF2n+1−mHm]s]t  (1)
US09117473B1 BEMF closed loop control of disk drive actuator during a catastrophic event
A disk drive includes an actuator assembly and a controller. The actuator assembly generally includes an actuator having a velocity and a voice coil motor that has a detectable back electromotive force (BEMF). The actuator assembly is configured to position a read/write head. The controller is coupled to the actuator assembly and is configured to detect a catastrophic event occurring within the disk drive. In response to the detection of the catastrophic event, the controller activates a closed loop controlled slowing of the velocity using the detected BEMF as a control parameter.
US09117472B1 Processing a data signal with an embedded position signal
Systems, methods, and other embodiments associated with processing a read signal from a storage medium that includes continuous embedded position information are described. According to one embodiment, an apparatus includes read logic configured to control a storage device to generate the read signal by reading a first layer and a second layer of the storage medium. The first layer defines data and the second layer defines embedded position information. The apparatus includes data detection logic configured to process the read signal to recover the embedded position information. The read logic is configured to control the storage device based, at least in part, on the embedded position information.
US09117471B1 AC MR-offset compensation
An apparatus includes a controller configured to be coupled to a read/write head. The controller is configured to perform various operations including detecting a change in a time interval difference between servo sectors of a servo marked recording medium, converting the change to an offset signal that compensates for the change, and positioning the read/write head relative to the servo mark recording medium in response to the offset signal. The change in the time interval difference is representative of disk slip.
US09117468B1 Hard drive suspension microactuator with restraining layer for control of bending
A PZT microactuator such as for a hard disk drive has a restraining layer bonded on its side that is opposite the side on which the PZT is mounted. The restraining layer comprises a stiff and resilient material such as stainless steel. The restraining layer can cover all of the top of the PZT, or most of the top of the PZT with an electrical connection being made to the PZT where it is not covered by the restraining layer. The restraining layer reduces bending of the PZT as mounted and hence increases effective stroke length, or reverses the sign of the bending which increases the effective stroke length of the PZT even further.
US09117466B2 Disk drive suspension
A slider and microactuator elements are arranged on a gimbal portion of a flexure. A conducting member includes tongue conductive circuit portions, and unsupported conductive circuit portions which do not overlap with a metal base. The unsupported conductive circuit portions are disposed between arms of an outrigger portion. Bendable portions for reducing bending stiffness are formed in the unsupported conductive circuit portions, respectively. End portions of the microactuator elements are secured to supporting portions of a tongue, respectively. Each of bridge members is provided between the corresponding supporting portion of the tongue and the corresponding unsupported conductive circuit portion.
US09117463B1 Data storage device erasing multiple adjacent data tracks to recover from inter-track interference
A data storage device is disclosed comprising a disk comprising a plurality of data tracks, and a head actuated over the disk. A retry operation for a target data track is performed by positioning the head at a first radial location and first erasing at least part of a first data track adjacent the target data track. After the first erasing, the target data track is first read to first recover target data recorded in the target data track. When the first recovery fails, the head is positioned at a second radial location and more of the first data track is second erased. After the second erasing, the target data track is second read to second recover the target data recorded in the target data track.
US09117462B2 Tape drive with overlapped operations
Embodiments of the invention relate to tape drive systems having overlapped operations. In one aspect, a system includes a head for performing read and/or write operations, a first set of motors for performing positioning operations on a first tape, a second set of motors for performing positioning operations on a second tape, and a processor and logic integrated with and/or executable by the processor. The logic is configured to cause the first set of motors to pass the first tape over the head while causing the second set of motors to perform at least one of a coarse locate and a rewind operation on the second tape. Additional systems and methods are also disclosed.
US09117458B2 Apparatus for processing an audio signal and method thereof
A method of processing an audio signal is disclosed. The present invention includes a method for processing an audio signal, comprising: receiving, by an audio processing apparatus, the spectral data including a current block, and substitution type information indicating whether to apply a shape prediction scheme to a current block; when the substitution type information indicates that the shape prediction scheme is applied to the current block, receiving lag information indicating an interval between spectral coefficients of the current block and the predictive shape vector of a current frame or a previous frame; obtaining spectral coefficients by substituting for spectral hole included in the current block using the predictive shape vector.
US09117456B2 Noise suppression apparatus, method, and a storage medium storing a noise suppression program
A noise suppression apparatus includes: a conversion unit to convert a recorded sound signal in a time domain into a spectrum in a frequency domain; a setting unit to set a suppression gain indicating a degree of suppression on each spectrum for each frequency spectrum on the basis of a nonstationarity-value variation in time of the respective spectrum; a suppression unit to suppress each of the spectrum on the basis of the suppression gain set by the setting unit for each frequency spectrum; and an inverse conversion unit to perform an inverse conversion to the conversion by the conversion unit on the spectrum having been subjected to the suppression processing by the suppression unit.
US09117453B2 Method and system for processing parallel context dependent speech recognition results from a single utterance utilizing a context database
A method of and system for accurately determining a caller response by processing speech-recognition results and returning that result to a directed-dialog application for further interaction with the caller. Multiple speech-recognition engines are provided that process the caller response in parallel. Returned speech-recognition results comprising confidence-score values and word-score values from each of the speech-recognition engines may be modified based on context information provided by the directed-dialog application and grammars associated with each speech-recognition engine. A context database is used to further reduce or add weight to confidence-score values and word-score values, remove phrases and/or words, and add phrases and/or words to the speech-recognition engine results. In situations where a predefined threshold-confidence-score value is not exceeded, a new dynamic grammar may be created. A set of n-best hypotheses of what the caller uttered is returned to the directed-dialog application.
US09117449B2 Embedded system for construction of small footprint speech recognition with user-definable constraints
Techniques disclosed herein include systems and methods that enable a voice trigger that wakes-up an electronic device or causes the device to make additional voice commands active, without manual initiation of voice command functionality. In addition, such a voice trigger is dynamically programmable or customizable. A speaker can program or designate a particular phrase as the voice trigger. In general, techniques herein execute a voice-activated wake-up system that operates on a digital signal processor (DSP) or other low-power, secondary processing unit of an electronic device instead of running on a central processing unit (CPU). A speech recognition manager runs two speech recognition systems on an electronic device. The CPU dynamically creates a compact speech system for the DSP. Such a compact system can be continuously run during a standby mode, without quickly exhausting a battery supply.
US09117445B2 System and method for audibly presenting selected text
Disclosed herein are methods for presenting speech from a selected text that is on a computing device. This method includes presenting text on a touch-sensitive display and having that text size within a threshold level so that the computing device can accurately determine the intent of the user when the user touches the touch screen. Once the user touch has been received, the computing device identifies and interprets the portion of text that is to be selected, and subsequently presents the text audibly to the user.
US09117444B2 Methods and apparatus for performing transformation techniques for data clustering and/or classification
Some aspects include transforming data, at least a portion of which has been processed to determine at least one representative vector associated with each of a plurality of classifications associated with the data to obtain a plurality of representative vectors. Techniques comprise determining a first transformation based, at least in part, on the plurality of representative vectors, applying at least the first transformation to the data to obtain transformed data, and fitting a plurality of clusters to the transformed data to obtain a plurality of established clusters. Some aspects include classifying input data by transforming the input data using at least the first transformation and comparing the transformed input data to the established clusters.
US09117437B2 Noise cancelling headphone
A noise cancelling headphone is described. The noise cancelling headphone utilizes a low power consuming noise cancellation circuit wherein an audio input signal is directly fed into the headphone without the use of an additional headphone amplifier. The noise cancelling circuit uses a microphone to pick up ambient noise and produces a signal which is equal in amplitude but opposite in polarity to the ambient noise signal. The resultant signal is mixed with the audio input signal and fed into the speakers of the headphone. This method is advantageous because it uses fewer components than conventional noise cancellation circuits and it also consumes less power due to the use of fewer components. The distortion of the audio input signal is also reduced since no amplification is performed to the audio input signal onboard the noise cancellation circuit.
US09117436B2 Sound processing apparatus and sound processing method
A sound processing apparatus includes an inputting section that inputs a sound signal, an analyzing section that analyzes the input sound signal, a storing section that stores a general-purpose masking sound, a masking sound producing section that, based on a result of the analysis by the analyzing section, processes the general-purpose masking sound stored in the storing section to produce an output masking sound, and an outputting section that outputs the output masking sound.
US09117434B2 Vibration-lead plate for flat type speaker, mounted between voice coil plate and vibration plate
A vibration-lead plate for a flat speaker is mounted between a voice coil plate and a vibration plate for increasing vibrational efficiency and removing the lead wire of a voice coil. The vibration-lead plate includes: a coil plate-spline, mounted between a voice coil plate having a voice coil formed in the shape of a spiral track and a vibration plate to vibrate according to the movement of the voice coil plate for generating sound, and formed in the center so as to be adhered to the voice coil plate; an edge-spline, connected to one side of the coil plate-spline and the edge of the vibration plate so as to variably correspond to vibrations; and a vibration plate outside portion, connected to one side of the edge-spline and adhered to the outside portion of the edge of the vibration plate.
US09117431B1 Guitar accessory for personal electronic equipment
An electronic device adapter for storing and mounting a computer application device such as a smart phone or a personal computer comprises a guitar body and an adapter which enables a user to play the guitar in a wired or wireless manner while accessing music applications, adjusting sound levels, and downloading music. The computer application device is positioned and secured upon the rear surface of the guitar.
US09117430B2 Electric stringed musical instrument and method of designing the same
An electric stringed musical instrument including: a string which vibrates by a performance operation; a body which supports the string via a bridge; a pickup sensor mounted on a portion which vibrates by a vibration of the string, the pickup sensor being configured to detect a vibration having propagated from the string and output an electric signal; and a supporter having a spring structure which supports the bridge with respect to the body to bring a vibration characteristic of the electric stringed musical instrument closer to a vibration characteristic of one acoustic stringed musical instrument.
US09117425B1 Portable stand for music instruments and method of using same
An article for supporting a music instrument such as a conga drum is disclosed. The article is shaped for engagement with a lower rim of the drum and suspending the same at a relatively low height and first selected angle for optimal comfort, efficiency and drum performance, the article shape also being such that, upon positioning the article in an alternative position, and engagement with the lower rim, the drum is suspended at a relatively greater height and second selected angle for optimal comfort, efficiency and drum performance.
US09117423B2 Aluminum copper wrap wire for musical instruments
A string for a musical stringed instrument includes (a) a core wire and (b) a wrap wire coiled tightly around the core wire. The wrap wire is an aluminum-copper alloy having between about 2 wt % and about 10 wt % aluminum.
US09117422B2 Bagpipe drone reed
A bagpipe reed has a tongue adjustor for biasing the reed tongue to adjust the amount of air consumed by the reed without altering the pitch of the reed. The tongue adjustor exerts pressure on the tongue without penetrating either the tongue or the body of the reed. The tongue adjustor may be carried by a tongue retaining collar.
US09117421B2 Fully tempered duplex scale
Disclosed herein are exemplary embodiments of methods, systems, and apparatus for improving pianos and like musical instruments. For example, in certain embodiments, the improvements are in the structures of the piano (or like musical instruments) that affect the vibratory relationships between the struck string and other segments of said string. The improvements affect how these vibratory relationships of the string segments interact with the bridge, soundboard, the plate of a piano, the string rests, and/or the string terminations. For example, in embodiments of the disclosed technology, the vibratory relationships of the string segments involve transient transverse (T) and longitudinal (L) frequencies as well as sustained transverse, longitudinal, and horizontal (H) modes carried by said string segments and their support structures. Embodiments of the disclosed technology also affect how these relationships are defined across the compass of the standard piano keyboard.
US09117416B2 Active matrix display device with pixel charging time extending function
An exemplary active matrix display device includes a plurality of gate signal lines, a plurality of data signal lines and a plurality of pixel rows. The gate signal lines are independently driven from one another. Each of the pixel rows is electrically coupled to one of the gate signal lines and a part of the data signals lines. The pixel rows include a first pixel row and a second pixel row. The first pixel row and the second pixel row are not neighboring with each other. The gate signal line electrically coupled with the first pixel row and the gate signal line electrically coupled with the second pixel row are synchronously enabled.
US09117414B2 Display apparatus and method of driving the same
A display apparatus includes a display panel which receives a light, a backlight which provides the light to the display panel in response to a driving voltage, and a backlight driver which applies the driving voltage to the backlight. The backlight is turned on and off during a communication period to transmit data to an external receiver using visible light communication during the communication period. The backlight driver controls a voltage level of the driving voltage according to a number of turn-on periods of the driving voltage during the communication period.
US09117412B2 Memory device with one-time programmable function, and display driver IC and display device with the same
A display driver IC with a built-in memory device having a one-time programmable function is provided. The memory device includes: a cell array comprising a plurality of one-time programmable unit cells and configured to receive a writing voltage generated from an internal voltage generating unit to operate upon writing operation; a detecting unit configured to detect a change of the writing voltage; and a controlling unit configured to control the internal voltage generating unit and the unit cells according to an output signal of the detecting unit.
US09117405B2 Organic light emitting device
An organic light emitting device is provided. The organic light emitting device includes an organic light emitting panel, a drive unit receiving image data and image luminance discrimination signal that includes information on a maximum luminance of the image and providing a data voltage corresponding to the image luminance discrimination signal to the organic light emitting panel, and a power supply unit providing a common voltage to the organic light emitting panel. The common voltage is varied to correspond to the image luminance discrimination signal.
US09117402B2 Organic light emitting diode display device
An organic light emitting diode display device includes a plurality of pixels each including a plurality sub-pixels, the plurality of sub-pixels in each pixel arranged along a first direction; and a signal line providing a signal to each of the plurality of sub-pixels, wherein each of the plurality of sub-pixels includes an emission part and a transparent part arranged along a second direction being perpendicular to the first direction, and the emission part is connected to the signal line to receive the signal, and wherein the emission parts in adjacent sub-pixels along the first direction are arranged in a checkerboard pattern.
US09117395B2 Method and apparatus for defining overlay region of user interface control
Disclosed are a method and an apparatus for defining an overlay region for an application in a user interface control region on a screen of a display in a mobile device. The application queries a platform about an overlay region desired to be generated based on a basic resolution set in the application. The platform calculates an approximate region satisfying an overlay region condition for the queried overlay region and informs the application of the approximate region. Thereafter, the application generates an overlay region corresponding to the approximate region, and the platform displays the generated overlay region on the screen.
US09117389B2 Dome-screen device, dome-screen playing system and image generation method thereof
The present invention discloses a spherical-screen device, a spherical-screen playing system and an image generating method for image rectification. The method includes the steps of: equally dividing an arc curve of a spherical screen, which corresponds to a radian of 90°, into a plurality of segments; equally dividing a straight line of a planar image corresponding to the arc curve into a plurality of segments, the number of the segments of the straight line being equal to the number of the segments of the arc curve; assigning an image parameter of a first point in the planar image to a third point in a planar image; and connecting a sphere center with a second point of a to-be-displayed image position on the arc curve that corresponds to the first point, a point falling in the planar image being the third point.
US09117388B2 Light source module and display device including the same
An approach is provided for a light source module and a display device including the same. The light source module includes two first light source packages configured to emit light of a first color, one or more second light source packages disposed between the two first light source packages, and a plurality of third light source packages disposed between the two first light source packages and alternately arranged with the one or more second light source packages. The one or more second light source packages are configured to emit light of the first color and the plurality of third light source packages are configured to emit light of a second color. An intensity of light emitted from each of the one or more second light source packages is approximately twice an intensity of light emitted from each of the two first light source packages.
US09117387B2 Image display apparatus and method for operating the same
An image display apparatus and a method for operating the same are disclosed. The method of operating an image display apparatus includes receiving an input external image, receiving supplementary information indicating the number of external images to be displayed or the number of sub images in the external image to be displayed, rearranging the external image or sub images based on the supplementary information, and displaying the rearranged external images or sub images. Accordingly, it is possible to conveniently detect the number of external images to be displayed or the number of sub images to be displayed.
US09117384B2 System and method for bendable display
Systems, methods and apparatus are described for displaying visual information on a deformable display device, and for compensating for distortion of images of the visual information that results from the deformation of the display device and the viewing orientation of a viewer of the display device, or for improving or enhancing the displayed visual information in response to the deformation of the display device and the viewing position of the viewer.
US09117383B1 Vibrating display panels for disguising seams in multi-panel displays
A multi-panel display includes at least one anchoring platform, a plurality of display panels, vibration mechanisms, and control logic. The anchoring platform(s) are to be secured to a fixed surface. The plurality of display panels is aligned to form the multi-panel display and the display panels are substantially rectangular. The vibration mechanisms are configured to vibrate the plurality of display panels along a vibration axis. The vibration mechanisms are coupled to the anchoring platform(s), and the vibration axis is common to each of the display panels in the plurality of display panels. The control logic is coupled to drive the vibration mechanisms and configured to drive the plurality of display panels to display images corresponding with positions along the vibration axis to disguise seams between the plurality of display panels.
US09117382B2 Device and method for automatic viewing perspective correction
Devices and methods for improving viewing perspective of content displayed on the display screen of a computing device include determining one or more viewing angles relative to a viewer of the content, generating a content transformation to apply a corrective distortion to the content to improve the viewing perspective when viewed at the one or more viewing angles, and rendering the content as a function of the content transformation. The viewing angles relative to a viewer of the content may be determined automatically using viewer location sensors, or may be input manually by the viewer. The content transformation visually scales the content by an appropriate factor to compensate for visual distortion experienced by the viewer at one or more viewing angles. Content may be transformed as a function of a single approximate viewing angle or multiple viewing angles.
US09117380B2 Bollard advertising assembly
An advertising bollard assembly, comprising: a main body defining an interior and an outer surface; one or more compressible inserts positioned in the interior of the main body, the compressible inserts being configured to be positioned on a bollard to couple the advertising bollard assembly to the bollard; and an attachment mechanism coupled to the outer surface of the main body, the attachment mechanism being configured to receive one or more advertisements.
US09117374B2 Automatically generating quiz questions based on displayed media content
In accordance with some implementations, a method for automatically generating quiz questions is disclosed. The method is performed on a server system having one or more processors and memory storing one or more programs for execution by the one or more processors. The server system receives, from a client system, media information associated with media content displayed on a display associated with the client system. The server system then analyzes the received media information to determine one or more keywords associated with the media information. The server system retrieves one or more facts based on the one or more determined keywords. The server system then automatically generates a quiz question based on the one or more retrieved facts. The server system then transmits the generated quiz question to the client system for display.
US09117372B2 Transportation system arrival and departure time calculation and display system
A system and method collects transit vehicle arrival and departure data sent from the transit vehicle to a stationary control center. The stationary control center continuously calculates, a medial time table, a medial travel time to a destination on a transit route and a medial travel time between transit stops on the route. The medial values may be calculated differently for rush hour, holiday, or certain weather conditions to increase the accuracy of the schedule forecast. Actual position and time information of a transit vehicle may be transmitted via wireless communication from a transit vehicle to the stationary control center. The position and time information is transmitted at least when the transit vehicle arrives and departs each transit stop on the transit route. The medial values can be displayed to transit vehicle users.
US09117370B1 System and method for identifying runway position during an intersection takeoff
A system and method for determining if an aircraft is headed in the right direction on a runway entered upon at a location that does not display runway identification comprises receiving runway and aircraft position data for determining the identity of the runway. The identity of the runway is then compared with a representation of an assigned runway stored on the aircraft to determine that they match.
US09117368B2 Ground based system and methods for providing multiple flightplan re-plan scenarios to a pilot during flight
Methods and apparatus are provided for transmitting re-routing options to a plurality of in-flight aircraft in accordance with preconfigured pilot preferences. The apparatus comprises a data store module containing data sets against which the pilot preferences are evaluated during flight, including weather, airspace and flight restrictions, ground delay programs, and air traffic information. The apparatus further includes a flight path module containing route and position information for each aircraft. An incursion alert processing module evaluates the flight path, data store, and pilot preferences and generates incursion alerts which are transmitted to each aircraft during flight. Upon receipt of an incursion alert or, alternatively, independent of an incursion alert, the pilot may request re-routing options. Once received and reviewed, the pilot selects the optimum re-routing option, and an associated micro flight plan is uplinked and loaded into the FMS (Flight Management System).
US09117367B2 Systems and methods for improving runway status awareness
An apparatus, method and computer program product for generating and annunciating to a flight crew if they are on or approaching a closed runway. The present invention alerts the pilot to operations on closed runways with appropriate and non-misleading information, thus allowing the pilot to make better decisions.
US09117362B2 Methods and apparatus for learning remote control commands
Described herein are various techniques for transferring command codes between multiple remote controls. A first controlled device receives a signal from a remote control associated with a second controlled device. The signal is associated with a command for the second controlled device. The first controlled device receives user input, assigning the command to a selected button of a second remote control. The first controlled device transmits a message to the second remote control. The message includes information utilized by the second remote control to reproduce the signal responsive to actuation of the selected button, allowing the second remote control to generate the command for the second controlled device.
US09117361B1 Hand sanitizer monitor
A hand sanitizer unit for use with a pump bottle using a user activated dispensing pump with a main body housing an electronic circuit and defining a sensor aperture for use with two passive infrared sensors separated by a mechanical lens baffle to detect movement and direction of the movement. The unit also includes a pump sensor positioned to detect dispensing or lack thereof of a hand sanitizer to sound an alarm when motion is detected and the pump sensor does not detect activation of the user activated dispensing pump. Further items include a mute control switch, communication system, and a direction of motion switch connected to the microprocessor. The programming flow and method of operation of the unit are also disclosed.
US09117360B1 Low battery trouble signal delay in smoke detectors
The present invention provides a low battery trouble signal delay circuit for a smoke detector configured for periodically measuring environmental conditions and for producing a fire alarm signal when smoke is detected in the environment. The trouble signal delay circuit has a battery, a comparator configured for receiving a voltage measurement signal from the battery and a reference voltage measurement signal and sending a resulting signal to an activator circuit, at least one activator in the activator circuit that is user activated upon receiving a first input; and at least one low battery trouble signal annunciator connected to the activator circuit and configured for indicating that the voltage measurement signal is below the reference voltage measurement after receiving a signal from the comparator. The activator temporarily disables the low voltage trouble signal when activated for a silencing time period, while maintaining the operation of the fire alarm signal.
US09117353B2 Surveillance method for monitoring an object of value
A method of monitoring an object of value to optimize energy consumption, the object of value being equipped with an event detection device including: a circuit configured to provide contactless communication with a remote entity; a sensor configured to detect an event related to the monitoring of an object of value; a unit configured to collect energy; the method including a first step of collecting energy by the detection device; a second step, started following the detection of an event by the detection device, in the course of which energy collected during the first step is restored such that: the detection device activates at least one contactless communication circuit of a remote entity or searches for one; the detection device transmits to the contactless communication circuit of the remote entity information related to the detected event.
US09117350B2 Mobile terminal
A mobile terminal including a terminal body having a front surface and a rear surface; a front notification unit and a rear notification unit formed on the front surface and the rear surface, respectively, and configured to notify events generated in the mobile terminal using light emitted from light sources; a display module formed on the front surface together with the front notification unit; and a controller configured to selectively operate the front notification unit and the rear notification unit according to a placed status of the terminal body.
US09117349B2 Security system having segregated operating software
A control apparatus for a premises based system is provided. The control apparatus has an improved memory and processor configuration for separate operation of the life safety and life style code so that the operation of the life style code may be changed without changing the operation of the life safety code, such as through the use of a virtual machine or code running at a single operating system layer. The memory may store life safety code in a first partition and life style code in a second partition. The life style code may be updated while life safety code continues to run.
US09117348B2 Wireless gas condition monitoring device
An exemplary apparatus includes a sensor array configured to sense a gas stream temperature, pressure, and humidity. The sensor array includes a plurality of sensors, each configured to sense at least one of the gas stream conditions. The apparatus further includes an electronic control unit comprising a memory storage device, a condition evaluation module, a display module, and a wireless transmission module. The memory storage device stores a plurality of condition parameters, each condition parameter corresponding to one of the gas stream conditions. The condition evaluation module is configured to determine if one of the sensed conditions violates one of the corresponding parameters, and is further configured to output a warning command in response to the determining. The display module is configured to display information relating to at least one of a sensed condition and a condition parameter. The wireless transmission module is configured to wirelessly transmit data relating to at least one of the warning command and one of the sensed conditions.
US09117347B2 Method and apparatus for a flexible housing
In accordance with an example embodiment of the present invention, an apparatus is disclosed. The apparatus includes a housing having a substantially rigid portion and a substantially flexible portion. The substantially rigid portion includes a plurality of openings. The substantially flexible portion is at the plurality of openings. The substantially flexible portion is configured to provide haptic feedback, or generate a voltage.
US09117344B2 Gaming machine running competing game between gaming terminals
The present invention provides a gaming machine including gaming terminals having high payout rate without increasing loss on the management side. When a result of a base game associated with a payout is obtained, the gaming machine determines whether at least a competing game condition associated with the payout is satisfied or not and, when it is determined that the competing game condition is satisfied, sets neighboring gaming terminals as opponents. When the opponent participates in a competing game, a competing game for winning a payout by competing against the opponent is run. According to a result of the competing game, at least a part of the payout is given to the winner of the competing game, and no payout is given to the loser of the competing game.
US09117343B2 Electronic gaming device with auto-play functionality
Examples disclosed herein relate to systems and methods, which may receive wagers on one or more paylines. The systems and methods may utilize one or more auto-play game functionality. The systems and methods may determine one or more payouts based on the one or more auto-play game functionality. The systems and methods may display one or more presentations based on the one or more auto-play game functionality.
US09117342B2 Networked gaming system communication protocols and methods
A system, method and apparatus for a gaming system is provided. The gaming system includes a rewards server and a separate gaming or slot accounting server. The system may further include a separate player tracking server. The system further includes one or more game machines. The game machines may include a base game, rewards tracking module, and a game management module. Further details will be apparent from the description, drawings and claims.
US09117339B2 Network gaming maintenance and repair history
Some embodiments include a computer-implemented method for tracking, over an electronic wagering game network, services performed on a wagering game machine. The method comprises: receiving, in the wagering game machine, a wagering game machine access identifier, wherein the wagering game machine access identifier indicates identity of a technician accessing a wagering game machine; detecting a service event in the wagering game machine; and generating a report indicating a modification to the wagering game machine. The method can also comprise receiving a technician log describing the modification to the wagering game machine; transmitting, to a service controller, the report, the log, and the wagering game machine access identifier. The method can also comprise receiving, from the service controller, maintenance information associated with the wagering game machine; and presenting the maintenance information on a display associated with the wagering game machine.
US09117336B2 Customizable gaming table apparatus
A gaming table including a plurality of illumination devices mounted therein and a controller configured for receiving a selection of a preset game layout configuration from one or more preset game layout configurations stored in memory and actuating the illumination of a portion of the plurality of illumination devices corresponding with the selected preset game layout configuration.
US09117332B2 Jackpot awards on a gaming machine
A method for use with a gaming system that provides a game in which a plurality of symbols are selected and presented on a display to form one or more combinations includes: providing a base game, providing a feature game on the occurrence of a first event during play of the base game, awarding a jackpot on the occurrence of a second event during play of the feature game, and varying the probability of both the first and the second events dependent on at least an aspect of a wager placed by a player to play the base game, wherein said variation maintains at least an approximately constant probability of the jackpot being won despite variations in said aspect of the wager.
US09117331B2 Apparatus, system, and method for responsible gaming
A method for promoting responsible wagering game play is provided which includes the acts of tracking a player's wagering losses and triggering a wagering restriction feature when the player's wagering losses exceed a predetermined loss limit and/or a predetermined loss rate.
US09117330B2 Gaming system and a method of gaming
A gaming system is disclosed which is arranged to randomly display a plurality of symbols from a set of symbols. The gaming system comprises a function allocator arranged to allocate a function to at least one symbol selected from the set of symbols, and a game outcome generator arranged to determine a game outcome based on the displayed symbols and on the function allocated to the selected symbol. A corresponding method, computer program and computer readable medium having computer readable program code embodied therein are also disclosed.
US09117324B2 System and method for binding a smartcard and a smartcard reader
Systems and methods for binding a smartcard and a smartcard reader are provided. A smartcard is provision to store a first set of credentials for use in traditional transactions such as at a brick and mortar retail store and a second set of credentials for use when performing a transaction using a smartcard reader associated with a user such as an on-line transaction. The user smartcard reader registers with a smartcard issuer server by cryptographically authenticating a secure processor associated with the smartcard reader. As a result of the registration, the secure processor obtains a set of private keys associated with the second set of credentials. When a request for a authorizing a transaction via the user's smartcard reader is received, the smartcard reader cryptographically authenticates itself to the smartcard using a private key associated with a credential to be used to authorize the transaction.
US09117323B2 Device for stacking securities, in particular bank notes
An apparatus for stacking financial documents, in particular banknotes. The financial documents (BN) are stacked upright in a stacking area on a stacking surface, and the stacking operation is terminated when a predetermined stack length is reached. The stack formation takes place in a receiving bag (14) which is stationarily held by a holding frame (10) in the entry area of the financial documents (BN) and which forms a stock (15) around the circumference of the holding frame (10). With increasing stack length, receiving bag material is automatically taken from the stock (15) so that the length of the receiving bag (14) continuously adapts to the length of the value note stack (31). At the end of the stacking operation the receiving bag (14) is closed at its opening, e.g. by welding, and can subsequently be removed from the stacking area and can be used as a transport container or, respectively, a security bag.
US09117322B2 Paper sheet processing apparatus
A paper sheet processing apparatus that performs a recognizing process of a paper sheet includes: a paper sheet recognition sensor (11) that reads an image of a paper sheet; a number-attribute information memory (131) that stores number attribute information including number recognition conditions for recognizing a number given to a paper sheet; and an image processing unit (134) and a character recognizing unit (135) that recognize a number of a paper sheet from an image read by the paper sheet recognition sensor (11), based on number recognition conditions stored in the number-attribute information memory (131).
US09117321B2 Method and apparatus to use remote and local control modes to acquire and visually present data
A system comprising multiple devices that are operable when servicing a device-under service is described. A data acquisition (DAQ) device and a vehicle scanner device of the system are operable to acquire data from the device-under-service and to transmit the acquired data to a display device of the system. The DAQ device can operate in a local-control mode in which selection of DAQ mode for the DAQ device is carried out at the DAQ device. The DAQ device can operate in a remote-control mode in which selection of a DAQ mode for the DAQ device is carried out at the display device. The multiple devices may communicate with each other via one or more wireless network via one or more air interface protocols. Each device of the system may operate as a stand-alone device or in combination with multiple devices of the system.
US09117320B2 Method for transmitting video data
A video transmission method in which temporarily recorded video data are partially transmitted to a video data backup unit. In this case event-based identification data are concomitantly recorded during the temporary recording and only video data identified by identification data are transmitted to the video data backup unit.
US09117319B2 Handheld automotive diagnostic tool with VIN decoder and communication system
Provided is a method of receiving data from a vehicle onboard computer. The onboard computer is configured to transmit vehicle identification data in response to receipt of an identification request, which is transmitted in a basic communication protocol. The onboard computer is further configured to transmit private operational data in response to receipt of a private data request. The private data request is transmitted in a diagnostic protocol. The method includes connecting a scan tool to the onboard computer, and polling the onboard computer to identify the basic communication protocol. The identification request is then transmitted to the onboard computer. Vehicle identification data is subsequently received from the onboard computer. A protocol database having a plurality of diagnostic protocols is then accessed. Each diagnostic protocol is associated with respective vehicle identification data. The diagnostic protocol is then determined based on the received vehicle identification data.
US09117318B2 Vehicle diagnostic detection through sensitive vehicle skin
Methods and systems for vehicle diagnostic detection and identification through vehicle sensitive skin are disclosed. Specifically, a method to monitor the exterior surface skin of a vehicle to enable detection and identification of damage to the vehicle exterior surface is disclosed. In one embodiment, a change in skin condition provides monitoring of vehicle performance and identifies vehicle operating abnormalities. In the event vehicle skin damage is detected, the system may take a number of actions. In one embodiment, the actions comprise notifying authorized users of the vehicle, a maintenance and diagnostics service provider, a security provider, and emitting a visual or audio alarm.
US09117315B2 Radiographic image display device and method for displaying radiographic image
When displaying a stereo image of radiographic images, troublesome work for indicating an abnormal shadow with a three-dimensional cursor is reduced. An abnormal shadow detection unit 8c detects abnormal shadows from radiographic images for left and right eyes for displaying a stereo image. When a plurality of abnormal shadows are detected, an abnormal shadow specification unit 8d specifies abnormal shadows corresponding to each other in two radiographic images. A display control unit 8e gives a three-dimensional cursor to a predetermined abnormal shadow of the plurality of abnormal shadows, and displays a stereo image using the radiographic images for left and right eyes.
US09117313B2 Imaging apparatus and image processing method
An imaging apparatus includes a photographing device for acquiring a created image; and a display device for showing a preview image of the created image. The apparatus may have a control device for superimposing a plurality of outlines on the preview image shown on the display device, and subjecting at least one of areas, which are included in the created image and are surrounded by the outlines in the preview image, to an image transformation process. Alternatively, the apparatus has a control device for superimposing an outline, which corresponds to a synthetic target image indicating a target image of transformation, on the preview image shown on the display device, and subjecting an area, which is included in the created image and is surrounded by the outline in the preview image, to an image transformation process performed based on the synthetic target image.
US09117312B2 System and method for preventing pinches and tangles in animated cloth
Systems and methods are disclosed for altering character body animations to improve subsequent cloth animations. In particular, based on a character body animation, an extra level of processing is performed, prior to the actual cloth simulation. The extra level of processing removes potential areas of pinching or tangling in input character body simulation data, ensuring that the output of the cloth simulation will be have reduced pinches and tangles.
US09117308B1 Methods and systems for converting select features of a computer-aided design (CAD) model to direct-edit features
Editing features of a history-based computer-aided design (CAD) model may be difficult and may require redesigning much of the CAD model modify features. The solutions described herein allow a design engineer to modify an existing history-based CAD model by automatically determining history-based features that need to be converted to direct-edit features, creating a body of direct-edit features from the determined features, and creating a model containing both the direct-edit feature body and remaining history-based features. Such a CAD model containing both kinds of features may be referred to as a hybrid model.
US09117306B2 Method of stencil mapped shadowing
Aspects comprise shadowing method as part of ray tracing. It is based on uniform grid of cells, and on local stencils in cells. The acceleration structures are abandoned along with high traversal and construction costs of these structures. The amount of intersection tests is cut down. The stencils are generated in the preprocessing stage and utilized in runtime. The relevant part of scene data, critical for shadowing of all visible intersection points in a cell, is registered in the local stencil map, as a volumetric data. The runtime use of stencils allows a complete locality at each cell, enhanced utilization of processing resources and load balancing of parallel processing.
US09117305B2 Method and apparatus for deriving stream network vectors from digital elevation map data
A processor-based apparatus for computing stream vectors for an area of interest divides the area of interest into a number of hydrologic unit code (HUC) areas. The processor calculates stream vectors from lower resolution digital elevation map (DEM) data. For those HUC areas where higher resolution DEM data is available, the processor merges the lower resolution and higher resolution DEM data. Stream vectors are calculated from the merged DEM data and used to replace those stream vectors calculated from the lower resolution DEM data. Attributes of stream vectors that receive upstream flow from an adjacent HUC area are corrected.
US09117304B2 System and method for improved spatial resolution of a multi-slice imaging system
A system and method include acquisition of a set of projections from an object using a CT imaging system and reconstruct an initial image of the scanned object from the set of projections, the reconstructed initial image comprising a plurality of pixels. The system and method also include identification of a candidate pixel within the plurality of pixels, application of a nonlinear enhancement to the candidate pixel to iteratively adjust an intensity value of the candidate pixel, and generation of a final image using the adjusted intensity value of the candidate pixel.
US09117303B2 System and method for defining an augmented reality view in a specific location
This invention is a system and method for defining a location-specific augmented reality capability for use in portable devices having a camera. The system and method uses recent photographs or digital drawings of a particular location to help the user of the system or method position the portable device in a specific place. Once aligned, a digital scene is displayed to the user transposed over (and combined with) the camera view of the current, real-world environment at that location, creating an augmented reality experience for the user.
US09117302B2 Switching between direct rendering and binning in graphics processing using an overdraw tracker
This disclosure presents techniques and structures for determining a rendering mode (e.g., a binning rendering mode and a direct rendering mode) as well as techniques and structures for switching between such rendering modes. Rendering mode may be determined by analyzing rendering characteristics. Rendering mode may also be determined by tracking overdraw in a bin. The rendering mode may be switched from a binning rendering mode to a direct rendering mode by patching commands that use graphics memory addresses to use system memory addresses. Patching may be handled by a CPU or by a second write command buffer executable by a GPU.
US09117300B2 Designing a modeled volume represented by dexels
It is provided a computer-implemented method for designing a modeled volume. The method comprises providing a sculpting process on the modeled volume, initial lines, and an initial set of dexels that represents the modeled volume after going through the sculpting process and that is based on the initial lines; then providing new lines by refining the initial lines; and determining a new set of dexels that represents the modeled volume after going through the sculpting process and that is based on the new lines, wherein determining the new set of dexels comprises determining sets of at least one segment representing the intersection between each new line and the modeled volume before going through the sculpting process and then applying the sculpting process on the determined sets of at least one segment. The method improves designing a modeled volume represented by a set of dexels.
US09117299B2 Inverse request aggregation
A system and method for efficiently scheduling memory access requests from a display controller pipeline. The display controller monitors the amount of data in the line buffers in the internal pixel-processing pipelines. The display controller waits until the amount of data in a given line buffer has fallen below an amount equal to the pixel width of the region being rendered by the internal pixel-processing pipeline before issuing memory requests to the memory controller. When the memory controller is not processing received memory requests, the memory controller transitions to a low-power state.
US09117296B2 Method for image fusion based on principal component analysis
An image fusion method combines absorption, differential phase contrast and dark-field (scattering) signals obtained with X-ray phase contrast sensitive techniques, such as an arrangement of gratings. The process fuses the absorption and dark-field signals by principal component analysis. Further the differential phase contrast is merged into the PCA fused image to obtain an edge enhancement effect. Due to its general applicability and its simplicity in usage, the proposed process is usable as a standard method for image fusion scheme using phase contrast imaging, in particular on medical scanners (for instance mammography), inspection at industrial production lines, non-destructive testing, and homeland security.
US09117284B2 Asynchronous compute integrated into large-scale data rendering using dedicated, separate computing and rendering clusters
An asynchronous computing and rendering system includes a data storage unit that provides storage for processing a large-scale data set organized in accordance to data subregions and a computing cluster containing a parallel plurality of asynchronous computing machines that provide compute results based on the data subregions. The asynchronous computing and rendering system also includes a rendering cluster containing a parallel multiplicity of asynchronous rendering machines coupled to the asynchronous computing machines, wherein each rendering machine renders a subset of the data subregions. Additionally, the asynchronous computing and rendering system includes a data interpretation platform coupled to the asynchronous rendering machines that provides user interaction and rendered viewing capabilities for the large-scale data set. An asynchronous computing and rendering method is also provided.
US09117281B2 Surface segmentation from RGB and depth images
Surface segmentation from RGB and depth images is described. In one example, a computer receives an image of a scene. The image has pixels which each have an associated color value and an associated depth value representing a distance between from an image sensor to a surface in the scene. The computer uses the depth values to derive a set of three-dimensional planes present within the scene. A cost function is used to determine whether each pixel belongs to one of the planes, and the image elements are labeled accordingly. The cost function has terms dependent on the depth value of a pixel, and the color values of the pixels and at least one neighboring pixel. In various examples, the planes can be extended until they intersect to determine the extent of the scene, and pixels not belonging to a plane can be labeled as objects on the surfaces.
US09117278B2 System and method for geometric modeling using multiple data acquisition means
A system and a method for modeling a predefined space including at least one three-dimensional physical surface, referred to hereinafter as a “measuring space”. The system and method use a scanning system enabling to acquire three-dimensional (3D) data of the measuring space and at least one two-dimensional (2D) sensor enabling to acquire 2D data of the measuring space. The system and method may enable generating a combined compound reconstructed data (CRD), which is a 3D geometrical model of the measuring space, by combining the acquired 2D data with the acquired 3D data, by reconstructing additional 3D points, from the combined 3D and 2D data thereby generating the CRD model. The generated CRD model includes a point cloud including a substantially higher density of points than that of its corresponding acquired 3D data point cloud from which the CRD was generated.
US09117272B2 Method and device for determining a change in the pitch angle of a camera of a vehicle
A method and device determine the change in pitch angle of a camera of a vehicle. At least three images, each reproducing a detection area in front of the vehicle, are sequentially recorded and corresponding image data are generated. A position of a first reproduction of a stationary object in the first image is determined as a first image position. A position of a second reproduction of the stationary object in the second image is determined as a second image position. On the basis of at least the first image position and the second image position, the course of a straight line is determined. A position of a third reproduction of the stationary object in the third image is determined as a third image position. On the basis of the distance between the third image position and the straight line, the change in the pitch angle is determined.
US09117271B2 Apparatus, method and recording medium for image processing
An image processing apparatus includes: a placement information acquisition section which acquires, for each image sensor, placement information of the image sensors with respect to the imaging section; a movement information acquisition section which acquires movement information of the imaging device; and an output area acquisition section which acquires, for every image sensor, position information of a second output area within the second frame image which corresponds to a first output area within the first frame image. The output area acquisition section acquires: a second output area of a base image sensor based on position information of a first output area determined by the placement information and based on the movement information; and a second output area of another image sensor based on the placement information of the base image sensor, the placement information of the other image sensor, and the movement information.
US09117269B2 Method for recognizing objects in a set of images recorded by one or more cameras
Method for improving the visibly of objects and recognizing objects in a set of images recorded by one or more cameras, the images of said set of images being made from mutual different geometric positions, the method comprising the steps or recording a set or subset of images by means of one camera which is moved rather freely and which makes said images during its movement, thus providing an array of subsequent images, estimating the camera movement between subsequent image recordings, also called ego-motion hereinafter, based on features of those recorded images, registering the camera images using a synthetic aperture method, recognizing said objects.
US09117266B2 Method and apparatus for dynamically visualizing a collection of images in the form of a collage
A method and apparatus of presenting a collection of images in the form of a collage is provided. The method dynamically visualizes the collection of images in the form of a collage. The method includes receiving the image from the collection of the images; adjusting parameters of dynamic visualization; analyzing distribution of colors in local areas of the images and the collage; modifying the image by adding the decorative elements of which the appearance depends on the distribution of colors in the local areas of the images and the local areas of the collage; modifying the collage by changing an appearance of decorative elements in the image; determining a position of the modified image on the modified collage; and generating a sequence of frames showing an occurrence of the modified image in the collage.
US09117265B2 Security system and method of in-flight entertainment device rentals having self-contained, audiovisual presentations
A security method for in-flight entertainment device (IFED) rentals having self-contained, audiovisual presentations is disclosed. A self-contained IFED has internal storage configured to contain current releases of movies and other audiovisual presentations. The method provides layers of security including unique bit stream encoding format, watermarking, camera artifacts, file encryption, hard drive encryption, input-output encryption and physically unique connectors, and tamper resistant casing the self-contained IFEDs.
US09117264B2 Information processing apparatus, information processing method, and storage medium
An information processing apparatus has a decomposition unit that decomposes an image into multiple frequency component images, a reduction unit that reduces linear noise included in the frequent component images, and a reconstruction unit that reconstructs the frequency component images with reduced linear noise.
US09117260B2 Methods for determining block averages for film grain simulation
The present invention provides methods for determining block averages in film grain simulation including determining block averages during a display process and determining block averages during a decoding process. The methods of the present invention exhibit different characteristics in terms of memory requirements and computational cost. More specifically, the first method uses no external memory, but requires either extra reads of the blocks, or internal memory in the display pipeline, while the second method requires extra memory bandwidth and extra external memory (e.g., RAM).
US09117255B2 Patient-specific three-dimensional dentition model
A method and system for generating a color-textured three-dimensional dental model is specific to a patient is disclosed. According to one embodiment, a three-dimensional dental model that is deficient of volumetric data for a three-dimensional anatomical landmark is obtained. A two-dimensional anatomical landmark of a two-dimensional intra-oral photograph that corresponds to the three-dimensional anatomical landmark of the three-dimensional dental model is identified. The two-dimensional intra-oral photograph is projected onto the three-dimensional dental model. The three-dimensional anatomical landmark is calculated from the projection of the two-dimensional anatomical landmark of the two-dimensional intra-oral photograph.
US09117251B2 Systems and methods for plug load control and management
The present invention is directed to methods and systems for control of loads that are connected to plugs. Through the use of various embodiments of the present invention one may allow a plurality of users to control the use of power by individual loads and dynamically configurable sets of loads with ease, on both small and large scales. Users may select from energy savings plans to generate compiled device power state schedules that automatically cause devices to enter power savings modes as pre-determined times. Consequently, one can efficiently manage plug load electricity usage in a plurality of buildings.
US09117247B2 Systems methods and computer program products for encoding and decoding tax return data
Tax data, e.g., Form W2 data, is encoded as a two-dimensional machine readable representation, such as a QR CODE. Certain tax data is encoded as segments of a QR CODE, and a tax form generated by an employer or payroll processing service and provided to an employee or user includes the QR CODE representing certain W-2 or other tax data. An image of the QR CODE is acquired using a camera of a mobile communication device or computer or other image capture device. When using a Smartphone, a tax preparation application executing on the Smartphone decodes the QR CODE image to determine the tax data, and populates fields of an electronic tax return with decoded data, thus allowing a consumer to prepare an electronic tax return using a mobile communication device.
US09117245B1 Systems and methods to perform credit valuation adjustment analyses
Systems and methods are provided to perform credit valuation adjustment analyses.
US09117241B2 Input numerical value display device, input numerical value display program, server apparatus for input numerical value display, input numerical value display method, and recording medium which records input numerical display program
An inputter can intuitively understand a numerical value input by himself/herself and the possibility of ignoring an erroneous input can be reduced. Only an Arabic numeral representing the input numerical value is displayed in a first display area. At least one of (i) a character string comprising an Arabic numeral and a character or a character string other than the Arabic numeral and (ii) only a character or a character string other than the Arabic numeral, which represents the input numerical value, is displayed in a second display area.
US09117238B2 Method, system, and medium for generating a mobile interface indicating traffic level for local merchants
Systems and methods to provide a prioritized shopping system are discussed. For example, a method can include receiving a list of target items, receiving busyness data for a plurality of local merchants, developing a prioritized shopping plan, and communicating the prioritized shopping plan to a mobile device. Each target item in the list of target items can represents a product or service that a user has indicated an interest in purchasing. The prioritized shopping plan is based at least in part on the busyness data and the list of target items. Busyness data provides an indication of traffic levels within at least a portion of the plurality of local merchants.
US09117236B1 Establishing communication based on item interest
Interactions between an item and an online shopper may be used to determine interest in an item or a category of items. Once interest has been determined, the online shopper may be presented with an option to initiate communication with other users. This communication may be between a plurality of users including shoppers, owners, experts, item representatives, and so forth. Communication may include text chat, video chat, audio chat, telephone, and so forth. Rewards may be provided to some or all users to encourage communication.
US09117235B2 Belief propagation for generalized matching
Entities may be matched to enhance the efficiency of various commercial activities using various system and method embodiments of the disclosed subject matter. Belief propagation on a graph data structure defining a bipartite or unipartite matching opportunity is used to calculate a best matching. In embodiments, functions are implemented based upon the match, such as executing sales between matched buyers and sellers in an online auction system. In embodiments, messages with scalar values carry information about the relative value of possible matchings, initially provided as weights or values for the possible matchings. Weights may depend on, for example, bids or costs. Messages may be passed, for example over a network between processors respective to the nodes. Belief values reflecting a best matching can be continuously updated for each node responsively to the value information and received messages to rank the matches respective to each node, which progressively improve. This allows short or complete terminations conditions to determine the goodness of the matching. Differing numbers of matches respective to each member of the disjoint sets and distributions of the desirability of different numbers of matches can be integrated in the matchings in respective embodiments.
US09117233B2 Carwash with smartphone payment and activation
An example carwash method involves a customer using a smartphone with an app for finding participating carwash locations, making online payments for select carwash options, and then using the smartphone app to start the washing process when the customer arrives at the carwash. Various means can be used for determining when the vehicle is at the carwash entrance. Examples of such means include, but are not limited to, reading the GPS coordinates of the smartphone in the vehicle; establishing Bluetooth, WiFi or some other limited-range wireless communication link between the smartphone and the local carwash controller; displaying and manually entering a code or password at the carwash; and scanning a QR code displayed on the smartphone. During the carwash operation, in some examples, the smartphone app provides the customer with an emergency stop option.
US09117231B2 Ordering method and system for restaurants
A method of ordering menu items for delivery to a station at a premises, such as a table at a restaurant, includes the steps: Launch App; Scan QR code or NFC tag on table; Identify location. The location is identified using the restaurant and table identifier(s) extracted from the QR code. This location is used to identify the correct restaurant menu from the central platform database; Download menu; Add menu items to order; Confirm order; Pay order; Route order. The restaurant identifier is used to determine the appropriate EPOS adaptor based on the EPOS system in use by the specific restaurant; Transmit to restaurant. The correct communication protocol and authentication details are then used in order to route the order to the restaurant EPOS system or printer.
US09117229B2 Generating revenue by growing sales of third-party applications
A method for generating revenue by growing sales of third-party applications, including: receiving, at a server communicatively coupled with a second application and from the second application located at a first device, an indication of a first application launching request, wherein the server includes a set of messaging functionalities that are available for implementation by the second application and are available for implementation by the first application upon delivery of an authentication token from the first application to the server; based on the receiving the indication of the first application launching request, generating an authentication token, wherein the authentication token is configured for providing an authentication pass to the server when delivered thereto by the first application, thereby allowing the first application access to the set of messaging functionalities; and sending the authentication token to the second application for delivery to the first application.
US09117223B1 Method and system for resource planning for service provider
In one embodiment, method that can be performed on a system, is provided to take not just a person's time and location into consideration, but also has knowledge of and takes into account their availability, their preferences, their schedule, their purpose for being at their current location, and/or their next goal or stop (not just in terms of location but also in terms of activity). One embodiment is able to take into account a real-time view of supplier inventory and deduce and make available much better-adapted offerings and support for that person's travels and endeavors. In one embodiment, having an understanding of a rate of conversion and its relation to traffic and weather patterns allows service providers to make more accurate predictions about various items, including but not limited to, conversion rates, offer types, offer upgrades, traffic etc. In yet another aspect of the invention, the information collected from many travelers, and also information collected from airlines and weather observers, etc., can be used to forecast inventory requirements, such as obtaining and preparing fresh food and pulling from storage chilled or frozen food, as well as man power or staffing level requirements, to meet projected demands.
US09117222B2 Lottery vending machine
In one embodiment of the invention, an apparatus comprises a lottery vending machine having an input slot configured to receive a lottery ticket, a second input slot configured to receive cash, and an output slot configured to output at least one of a money amount and a lottery ticket. In an embodiment, the apparatus provides a selectable credit option where the lottery vending machine, in response to receiving a winning lottery ticket, is configured to provide one of the following credit options: a money prize, one or more selected lottery tickets, or a combination of one or more lottery ticket(s) and a money amount.
US09117219B2 Method and a system for selecting advertising spots
A method for selecting advertisement spots that comprises providing parameters, each associated with one or more references to web documents which are retrieved by it, receiving a description of a product, identifying a match between the received description and at least one of the parameters, and generating a list of references which are associated with the at least one parameter.
US09117215B2 System and method for automated design element translation
The present invention generally relates to design element translation. In particular, embodiments of the invention are directed to systems and methods for automated design element translation for user defined customizations for one product to an entire suite of products. Preferred embodiments of the invention are accomplished through the use of one or more web-based computing devices.
US09117213B2 Electronic transaction risk management
A method of detecting unauthorized activity in an electronic message transfer system comprising a plurality of devices, each device being configured to generate and receive cryptographically secured transfer messages for exchanging content with other devices in the system. In each device, audit information is accumulated in a memory of the device. The device periodically forwards at least part of its accumulated audit information to a secure server.
US09117207B2 Check view system with embedded explanation of benefits
A method for facilitating the delivery of electronic funds and conveying an explanation of benefits to a service provider is described herein. A claim for payment by a service provider (such as a physician's office) is adjudicated by a third party administrator. An electronic funds transfer (EFT) is generated under a transaction set specification that encodes both payment information as well as an explanation of benefits (EOB). The EOB indicates which charges were approved and/or which were denied. The EOB data is extracted from the EFT and an image is generated containing the text of the EOB. The image is created in a format that is compatible with the online delivery of posted-paper checks. When the service provider logs into its bank to reconcile charges the EFT transaction is noted and the provider clicks on the “view check” link to obtain the EOB information.
US09117206B2 Apparatus and method for providing transaction history information, account history information, and/or charge-back information
A computer-implemented method, including receiving information regarding an individual and information involving an account involved in a transaction, wherein the information regarding the individual is received by a receiver prior to a processing, a completion, a consummation, or a cancellation, of the transaction, processing the information regarding the individual with a processing device, generating a report or a message in response to the processing of the information regarding the individual, wherein the report or the message contains information regarding a charge-back regarding a previous transaction involving the individual, and transmitting the report or the message to a communication device associated with a merchant, vendor, or provider, of a good, product, or service.
US09117205B2 Systems and methods for incentivizing food waste recycling
An apparatus for receiving waste contained in a container. The apparatus including a housing and a receiving mechanism coupled to the housing. The receiving mechanism is configured to receive the container. The apparatus further includes an analysis mechanism coupled to the housing; the analysis mechanism is configured to analyze the container.
US09117204B2 Method and apparatus for group coordination of calendar events
An approach for managing calendar information received from a plurality of data sources is described. Calendar information associated respectively with a plurality of data sources is retrieved by a calendar management platform. For each of the data sources, metadata specifying a contributor of the corresponding calendar information and for relating distribution of the calendar information is determined. Based on the first and second metadata, a data view for the calendar information is generated.
US09117201B2 Generating interview schedule results from a set of constraint satisfaction problems
Interview scheduling technologies are described. In one method, the interview-scheduling tool presents an interface to receive candidate availability information from a user for possible interview schedules for an interview candidate. The user interface permits the user to define an interview schedule framework that specifies desired criteria for a desired interview schedule for the interview candidate. The desired criteria of the interview schedule framework specify one or more interview sessions. The interview-scheduling tool receives the candidate availability information and the desired criteria and defines a data structure representing the interview schedule framework, wherein the data structure comprises a set of constraint satisfaction problems (CSPs). The interview-scheduling tool presents the interview schedule results that fit the desired interview schedule for selection by the user. The interview schedule results are automatically generated from the set of CSPs by a constraint solver tool and without additional user interaction at the user interface.
US09117197B1 Alert system for social network users
A system includes: a rule module, an application programming interface module, a determination module and a communication module. The rule module receives an alert rule describing a second user and a social network application associated with the second user. The rule module stores the alert rule in a user profile for the first user. The application programming interface module determines an application programming interface. The determination module receives a presence update from the social network application. The determination module determines whether the second user may be active on the social network application. The determination module determines an alert event responsive to determining that the second user may be active on the social network application. The communication module transmits an alert message to the first user responsive to the alert event.
US09117176B2 Round-trip engineering apparatus and methods for neural networks
Apparatus and methods for high-level neuromorphic network description (HLND) framework that may be configured to enable users to define neuromorphic network architectures using a unified and unambiguous representation that is both human-readable and machine-interpretable. The framework may be used to define nodes types, node-to-node connection types, instantiate node instances for different node types, and to generate instances of connection types between these nodes. To facilitate framework usage, the HLND format may provide the flexibility required by computational neuroscientists and, at the same time, provides a user-friendly interface for users with limited experience in modeling neurons. The HLND kernel may comprise an interface to Elementary Network Description (END) that is optimized for efficient representation of neuronal systems in hardware-independent manner and enables seamless translation of HLND model description into hardware instructions for execution by various processing modules.
US09117171B2 Determining a threat level for one or more individuals
A system and computer-implemented method for determining a threat level for one or more individuals includes accessing a data structure to obtain aggregated data stored therein, wherein the aggregated data comprises at least one of communication history data or transaction history data for one or more individuals. One or more predetermined metrics are applied to the obtained aggregated data, to determine threat level information for the one or more individuals. The determined threat level information is provided for display.
US09117165B2 Image processing system and image processing apparatus for sending image data
An image processing system includes a reception unit configured to receive an input of authentication information from a user, an authentication unit configured to authenticate the user based on the authentication information received by the reception unit, a setting unit configured to set a destination of image data, an operation key configured to set a folder of the user as a destination of the image data, and a transmission unit configured to send the image data to a destination set by the setting unit. The image processing system performs control not to allow a destination setting using the operation key, in the case where a destination to be set by the setting unit is limited to a destination to be set using the operation key and a folder to be set in response to an operation of the operation key is the one to be registered by the user.
US09117164B2 Image forming apparatus supporting WiFi direct and method of controlling internet access in image forming apparatus
An image forming apparatus that supports WiFi Direct, includes a user interface unit to receive a command from a user, a WiFi-Direct connection unit to perform WiFi-Direct connection with an external wireless terminal, an Internet connection unit to perform connection to the Internet, a control unit to permit or prohibit Internet access of the WiFi-Direct connected wireless terminal made through the Internet connection unit, a soft access point (AP) module to allow the image forming apparatus to operate as an AP in WiFi-Direction connection with the wireless terminal, a dynamic host configuration protocol (DHCP) server module to allocate a network address to the wireless terminal if the image forming apparatus operates as an AP, and an image forming operation execution unit to perform an image forming operation under control of the control unit.
US09117162B2 Image processing that generates and density corrects ink amount data
An image processing device comprises a color conversion unit that converts image data expressed in a first color space to ink quantity data expressed in a second color space, the ink quantity data comprising ink quantity data for chromatic color and ink quantity data for black; and a density adjustment unit that increases or decreases the ink quantity data for chromatic color based on a first adjustment value specified for chromatic color and increases or decreases the ink quantity data for black based on a second adjustment value specified for black.
US09117155B2 Weighted transaction card
Weighted transaction cards and methods of manufacturing the same. The weighted transaction cards may include a tungsten member that comprises at least a portion of a layer of the transaction card. The tungsten member may be encapsulated and/or disposed in an opening of a surround to define and inlay. The inlay may be laminated with one or more additional layers according to traditional card manufacturing techniques (e.g., a hot lamination process). The weighted transaction cards may have a weight significantly greater than traditional plastic transaction cards such that the weighted transaction cards.
US09117153B2 Data carrier having a contact plate with printing thereon
A data carrier having a main card body and a contact plate included on a surface of said main card body, wherein an area of the contact plate has a printed image thereon. In particular the image on the contact plate of the card is personalized and matches an image on the main card body so providing a further security feature for the data carrier.
US09117151B2 Information exchange using color space encoded image
Embodiments of the present invention include systems, methods, and non-transitory computer program products for information exchange using color space encoded images. A color space encoded image can be displayed, for example on media such as posters, billboards, or paper, or on a display of a first device such as smartphone displays, palmtop displays, camera displays, tablet displays, or e-reader displays. A second device can acquire the displayed encoded image, for example by photographing the image. The second device can decode the color space encoded image or transfer the color space encoded image to a device that decodes the image.
US09117148B2 Computer-readable non-transitory storage medium with communication program stored thereon, information processing apparatus, image forming system, and image forming apparatus
An information processing apparatus includes a detection unit, a data acquisition unit, and a communication unit. The detection unit is configured to detect whether or not print target data based on a print job has been created in a format suitable for printing on a predetermined image forming apparatus. The data acquisition unit is configured to acquire, when the detection unit detects that the print target data has been created, the created print target data and accompanying print information extracted from the print job. The communication unit is configured to transmit print data containing the acquired print target data and accompanying print information to the image forming apparatus using a predetermined protocol applicable to the image forming apparatus.
US09117144B2 Performing vocabulary-based visual search using multi-resolution feature descriptors
In general, techniques are described for performing a vocabulary-based visual search using multi-resolution feature descriptors. A device may comprise one or more processors configured to perform the techniques. The one or more processors may to apply a partitioning algorithm to a first subset of target feature descriptors to determine a first classifying data structure to be used when performing a visual search with respect to a query feature descriptor. The one or more processors may then apply the partitioning algorithm to a second subset of the target feature descriptors to determine a second classifying data structure to be used when performing the visual search with respect to the same query feature descriptor.
US09117142B2 Image-file processing apparatus, program, and image-file processing method
A storage unit stores an image file that includes a plurality of dummy image data items indicating predetermined dummy images and movement specifying data specifying the movement of an image, and a plurality of display image data items indicating images of characters. A controller replaces each dummy image data item in the image file with a display image data item to generate a new image file and causes a display unit of a terminal apparatus to display the image file.
US09117138B2 Method and apparatus for object positioning by using depth images
According to an exemplary embodiment, a method for object positioning by using depth images is executed by a hardware processor as following: converting depth information of each of a plurality of pixels in each of one or more depth images into a real world coordinate; based on the real world coordinate, computing a distance of each pixel to an edge in each of a plurality of directions; assigning a weight to the distance of each pixel to each edge; and based on the weight of the distance of each pixel to each edge and a weight limit, selecting one or more extremity positions of an object.
US09117133B2 Systems and methods for hyperspectral imaging
An apparatus for analyzing a subject including a hyperspectral image module is provided. It is used to identify a suspect region of a subject by using a hyperspectral sensor (for obtaining a hyperspectral image of the subject), a control computer including a processor unit (PU) and a computer readable memory (CRM) (for controlling and is in electronic communication with the sensor), a control software module including instructions stored in the CRM and executed by the PU (for controlling said at least one operating parameter of the sensor), a spectral calibrator module including instructions stored in the CRM and executed by the PU (for applying a wavelength dependent spectral calibration standard constructed for the sensor to a hyperspectral image), and a light source for illuminating the subject. An optional contact probe module is used to collect a signal of the suspect region for medical diagnosis.
US09117132B2 System and method facilitating designing of classifier while recognizing characters in a video
The present disclosure relates to designing of a hierarchy of feature vectors. In one embodiment, a method for facilitating design of a hierarchy of feature vectors while recognizing one or more characters in a video is disclosed. The method comprises collecting one or more features from each of the segments in a video frame extracted from a video; preparing multi-dimensional feature vectors to classify the one or more characters; calculating a minimum distance between the multi-dimensional features vectors of a test character and the multi-dimensional feature vectors of a pre-stored character template; selecting, with respect to a decreasing order of the minimum distance, the multi-dimensional feature vectors to design a hierarchy of the multi-dimensional feature vectors; and classifying the characters based on the hierarchy of the multi-dimensional feature vectors.
US09117127B2 Radio frequency switch and method for controlling the same, and radio frequency identification smart shelf system
A radio frequency identification (RFID) smart shelf system manages a product through communication with an RFID tag that is attached to the product on a shelf, and includes an RFID reader, a plurality of reader antennas, and an RF switch that is connected between the RFID reader and the plurality of reader antennas. The RF switch periodically varies a phase difference between RF signals of a portion of a plurality of output connection ports that set a connection to each of the plurality of reader antennas.
US09117121B2 Detection of disease-related retinal nerve fiber layer thinning
Methods, apparatuses, and computer readable media for detecting abnormalities in a characteristic of an eye using eye-imaging methods are presented. A plurality of images of the eye are received over time. Each image includes a plurality of pixels, which can be partitioned into blocks of pixels with varying sizes, called pixel partitions. A value is determined for each pixel partition, e.g., an average of the pixel values. A pixel partition set may be identified, which includes a pixel partition from each image, corresponding to a common region of a patient's eye. A regression model is computed for each pixel partition set using the values determined for each pixel partition. The regression model computes a rate of change of the retinal nerve fiber thickness at individual pixel partitions over time. An abnormality may be identified by comparing the rates of change of the model and the expected age-related rate of change.