Document Document Title
US08903083B2 Fast evaluation of many polynomials with small coefficients on the same point
In one exemplary embodiment of the invention, a method for evaluating at point r one or more polynomials p1(x), . . . , pl(x) of maximum degree up to n−1, where the polynomial pi(x) has a degree of ti−1, the method including: partitioning each polynomial pi(x) into a bottom half pibot(x) with bottom terms of lowest si coefficients and a top half pitop(x) with top terms of remaining ti−si coefficients; recursively partitioning the bottom half pibot(x) and the top half pitop(x) of each polynomial pi(x) obtaining further terms having a lower degree than previous terms, performed until at least one condition is met yielding a plurality of partitioned terms; evaluating the bottom half pibot(x) and the top half pitop(x) at the point r for each polynomial pi(x) by evaluating the partitioned terms at the point r and iteratively combining the evaluated partitioned terms; and evaluating each polynomial pi(x) at the point r by setting pi(r)=rsipitop(r)+pibot(r).
US08903077B2 Assignment management apparatus, assignment management method, and assignment management program
An assignment management apparatus includes: a traffic acquisition unit that acquires traffic per unit time; a storage unit that stores traffic per unit time when an operator is assigned, as traffic upon assignment, in association with the operator and an assignment sequence, and stores traffic per unit time when the assignment is canceled, as traffic upon cancellation; a processing capacity calculation unit that calculates difference between the traffic upon assignment of the operator and traffic upon assignment of an operator whose assignment sequence is next to the operator, as processable traffic of operators; and a determination unit that determines that it is timing to cancel assignment of an operator, in a case in which the traffic per unit time is decreased by the processable traffic calculated for the operator from the traffic upon cancellation.
US08903076B2 External contact center data collection and measurement
External queue monitoring of contact center queues is provided as a means that may better service the customer and measure service level objectives. External queue monitoring provides the opportunity for real-time monitoring of the queue and modification of contact center operations, such as devices routing queue members, in response to queuing or enqueued customers.
US08903072B2 Call waiting network identification
A multi-mode device for providing call waiting network identification. The device can establish a first call through a first network. While communicating through the first network, a second call can be received from a second network. The first network can be independent of the second network and operate separately on the multi-mode device. The multi-mode device can inject an alert specific to the second network into the call through the first network signaling the call through the second network. By providing the alert, the user of the multi-mode device can determine if the call waiting tone is for business or personal giving the user the chance to ignore the call and continue talking without having to take the handset away from their face, activate the screen and view the caller identification information to decide whether or not to take the call.
US08903065B2 Call interlocking system, in-house control apparatus, and call interlocking method
A call interlocking system according to the present invention includes a plurality of in-house control apparatuses each including, data relay means for relaying communication data between a telephone and a call control server and communication data between an information display terminal and an information providing server respectively, and interlocking means for determining whether or not it is possible to interlock a telephone call performed by the telephone with a service that the information display terminal requests to start, and for notifying, when the interlocking means determines that the interlocking is possible, a start request of the service including information for specifying the telephone call to the information providing server, and an information providing server that interlocks the service with the telephone call and provides the interlocked service based on the start request of the service notified from the in-house control apparatus.
US08903064B2 Maintaining history information for a user across multiple types of end points
A system for providing enhanced history information across multiple clients comprises a call application server having a history system, a telephony system and a history cache. The call application server advantageously maintains a history records for each user of the system. The enhanced history system is particularly advantageous because regardless of the endpoint (e.g., phone, thin client, personal call manager or standalone IP phone) with which the user is interacting, the history information specifically for that user is delivered by the call application server to that endpoint. Furthermore, the call application server allows the user to access history information using end points which heretofore were unable to provide history functionality. Finally, the call application server makes the history records universal across all endpoints with which the user interacts, in contrast to prior art, which had limited call history information specific to a particular endpoint.
US08903057B2 Offline voicemail
A method for accessing offline voicemail messages within a mobile messaging application may be provided. First, a voice mail message may be received and the voicemail message may be transcribed to text. Next, the voicemail message and the text transcription may be stored. The recipient may then be presented with a list of voicemail messages and the voicemail message may be retrieved in response to the recipient. The recipient may read or listen to the voicemail message or both. The recipient may also annotate the voicemail message.
US08903056B2 Methods, systems, and products for responding to communications
Methods, systems, and products are disclosed for responding to a communication. The communication is received from a sender's address and is destined for a recipient's address. An audible message associated with the sender's address is retrieved. The audible message is sent to a server that stores messages associated with the sender.
US08903053B2 Mass-scale, user-independent, device-independent voice messaging system
A mass-scale, user-independent, device-independent, voice messaging system that converts unstructured voice messages into text for display on a screen is disclosed. The system comprises (i) computer implemented sub-systems and also (ii) a network connection to human operators providing transcription and quality control; the system being adapted to optimize the effectiveness of the human operators by further comprising 3 core sub-systems, namely (i) a pre-processing front end that determines an appropriate conversion strategy; (ii) one or more conversion resources; and (iii) a quality control sub-system.
US08903052B2 Voice print tagging of interactive voice response sessions
Embodiments of the invention provide a method, system and computer program product for voice print tagging for interactive voice response (IVR) session management. In an embodiment of the invention, a method of voiceprint tagging for IVR session management is provided. The method includes establishing an IVR session for a caller from over a network and presenting a portion of the IVR session to the caller over the network. The method also includes storing a voiceprint tag in memory associating a voiceprint of the caller with a portion of the IVR session. Finally, the method includes responding to a premature termination of the IVR session by re-establishing the prematurely terminated IVR session with the caller at the portion of the IVR session indicated by the voiceprint tag of the caller.
US08903049B2 Systems and methods for characterizing transmission lines using broadband signals in a multi-carrier DSL environment
Using DSL modems as data collectors, the modems processes the data to, for example, allow easier interpretation of the line characteristics. In particular, the modems postprocess the data including calibration, filter compensation, determination of the SNR medley from the bits and gains tables and rate conversion. The interpretation process uses the postprocessed data and determines loop characterization, interferer detection, a data reduction estimation and a data rate estimation. The outputs of these determinations least allow for the characterization of the line conditions between the two modems.
US08903043B2 Method for correcting timing skew in X-ray data read out of an X-ray detector in a rolling shutter mode
In an X-ray detector operating in a rolling shutter read out mode, by precisely synchronizing sample rotation with the detector readout, the effects of timing skew on the image intensities and angular positions caused by the rolling shutter read out can be compensated by interpolation or calculation, thus allowing the data to be accurately integrated with conventional software. In one embodiment, the reflection intensities are interpolated with respect to time to recreate data that is synchronized to a predetermined time. This interpolated data can then be processed by any conventional integration routine to generate a 3D model of the sample. In another embodiment a 3D integration routine is specially adapted to allow the time-skewed data to be processed directly and generate a 3D model of the sample.
US08903037B2 System and method for automatic tube potential selection for dose reduction in medical imaging
A method for CT imaging that utilizes an automatic tube potential selection for individual subjects and diagnostic tasks. The method quantifies the relative radiation dose of different tube potentials for achieving a specific image quality. This allows the selection of a tube potential that provides a reduced radiation dose while still providing CT images of a sufficient quality.
US08903035B2 Neutron absorbers and methods of forming at least a portion of a neutron absorber
Methods of forming at least a portion of a neutron absorber include combining a first material and a second material to form a compound, reducing the compound into a plurality of particles, mixing the plurality of particles with a third material, and pressing the mixture of the plurality of particles and the third material. One or more components of neutron absorbers may be formed by such methods. Neutron absorbers may include a composite material including an intermetallic compound comprising hafnium aluminide and a matrix material comprising pure aluminum.
US08903026B2 Apparatus for decoding global navigation satellite systems navigation data and associated method
An apparatus for decoding GNSS navigation data to generate at least a target string or subframe includes a demodulator and a processing unit. The demodulator is utilized for demodulating a received signal to generate at least a plurality of strings or subframes having a same string index or subframe index. The processing unit is coupled to the demodulator, and is utilized for determining the target string or subframe according to the plurality of strings or subframes.
US08903024B2 Apparatus and method for iterative detection and decoding in wireless communication system
Provided is an apparatus and method for iteratively detecting and decoding a received signal in a wireless communication system. An apparatus for iterative detection and decoding (IDD) in a wireless communication system may determine a predetermined group to be updated in a first soft decision sequence, may transmit detection control information of the determined group, and may generate a second soft decision sequence based on a detection operation result of a predetermined received signal portion that is extracted based on the detection control information.
US08903023B1 Adaptive bluetooth receiver and method
A Bluetooth receiver comprises a RF front end configured to receive a Bluetooth signal including a preamble and 34-bit pseudo-number (PN); a DC estimator communicatively coupled to the RF front end; and a frame synchronizer communicatively coupled to the DC estimator. The DC estimator is configured to perform DC offset estimation by determining an average value of samples of the preamble and the frame synchronizer is configured to use the 34-bit PN for frame synchronization.
US08903021B2 Channel estimation for an OFDM communicaiton system with inactive subbands
For channel estimation in a spectrally shaped wireless communication system, an initial frequency response estimate is obtained for a first set of P uniformly spaced subbands (1) based on pilot symbols received on a second set of subbands used for pilot transmission and (2) using extrapolation and/or interpolation, where P is a power of two. A channel impulse response estimate is obtained by performing a P-point IFFT on the initial frequency response estimate. A final frequency response estimate for N total subbands is derived by (1) setting low quality taps for the channel impulse response estimate to zero, (2) zero-padding the channel impulse response estimate to length N, and (3) performing an N-point FFT on the zero-padded channel impulse response estimate. The channel frequency/impulse response estimate may be filtered to obtain a higher quality channel estimate.
US08903020B2 Radio signal receiving system
A radio signal receiving system for providing a signal to a transceiver includes a signal retrieving module and a signal processing module. The signal retrieving module retrieves a radio signal through one of a conducting wire in an electrical outlet, a conducting wire in a vehicular cigarette lighter, and a metallic vehicular casing. The radio signal receiving system operates without any conventional self-contained antenna and includes a radio signal receiving carrier which is either made from a conventional conducting wire or made of a metal to thereby enhance the efficiency of signal reception.
US08903017B2 Array amplitude modulation system and method
Array amplitude modulation which includes mapping a data symbol to a phase modulation signal and an amplitude modulation signal for transmission from antenna elements; applying the phase modulation signal to the antenna element amplifiers; and generating a pattern of enabling/disabling the antenna element amplifiers as a function of the amplitude modulation to produce a phase and amplitude modulated transmission from the antenna elements.
US08903014B2 Communications device having controller to correct an initial IQ imbalance and associated methods
A communications device includes a plurality of wireless transmitters operable at different respective frequencies and each configured to generate respective IQ signals having an initial IQ imbalance. The communications device also includes a frequency tunable auxiliary receiver, and a controller. The controller is configured to selectively couple a given wireless transmitter to the frequency tunable auxiliary receiver and tune the frequency tunable auxiliary receiver to a frequency of the given wireless transceiver, and apply predistortion to the given wireless transmitter based upon the initial IQ imbalance to reduce the initial IQ imbalance.
US08903011B2 Control channel information transmission method, and base station and terminal using the same method
In transmission in which MIMO is applied, there have been problems that the number of variable parameters increases and the number of information bits necessary for control channel increases. When the number of simultaneous multiplex users in one frame increases, there is also a problem of increased control channel information in proportion to the number of users. Error correction coding is performed for the control channel information based on the Adaptive Modulation and Coding scheme, and the above error correction coded control channel information is transmitted after being modulated with a predetermined modulation scheme, and further, according to propagation condition, the coding rate in the above error correction coding is made variable.
US08903002B2 Communication device and communication method
A computational processor uses a binary signal, being a set of 1- or 0-valued elements of a same number as a number of elements in an input signal, to generate computational data whose elements are exclusive OR values between each element of the input signal and a corresponding element in the binary signal at a same position. The modulator 13 modulates the input signal and the computational data according to a primary modulation scheme, and generates primary-modulated signals. An IFFT calculator applies an inverse fast Fourier transformation to the primary-modulated signals to generate inverse transformation data. A transmitter generates a baseband signal based on generated inverse transformation data whose peak-to-average power ratio matches a standard, and generates and transmits a transmission signal from the baseband signal and data specifying computations conducted to generate the inverse transformation data that matches the standard.
US08903000B2 Transmission circuit, reception circuit, transmission method, reception method, communication system and communication method therefor
In transmission of channel-coded serial data, early establishment of symbol synchronization between a transmitter and a receiver is achieved while reducing coding loss in transmission of valid data. In an idle period for not transmitting the valid data, a transmitting circuit selects first channel coding (e.g. 8B/10B coding) enabling early establishment of synchronization and transmits a synchronization symbol encoded using the first channel coding. In response to this, a receiving circuit establishes and maintains symbol synchronization. When the valid data is transmitted, the transmitting circuit transmits a symbol indicating a packet start position, selects second channel coding (e.g. 64B/66B coding) having less coding loss than the first channel coding, and transmits the valid data encoded using the second channel coding. Upon reception of the symbol indicating the packet start position, the receiving circuit switches to reception using the second channel coding and receives the valid data.
US08902997B2 PARCOR coefficient quantization method, PARCOR coefficient quantization apparatus, program and recording medium
On a criterion to minimize the entropy of the linear prediction residual of the input signal used for calculation of the input PARCOR coefficient sequence, PARCOR coefficients with larger absolute values are quantized with higher quantization precisions so as to reduce the increase of the code amount of the linear prediction residual caused by the quantization error of the PARCOR coefficients. If the PARCOR coefficient is represented by a value formed by a predetermined number of bits, the number of effective bits from the most significant bit toward the least significant bit included in the output value increases with the absolute value of the PARCOR coefficient.
US08902996B2 Adaptive wireless video transmission systems and methods
A method for providing error-resilient video content may include receiving video data reflective of multiple video frames and encoding the video data to generate a plurality of packets. The method may also include transmitting the first group of packets to at least two receivers and receiving feedback information regarding receiving status of respective ones of the plurality of packets, the feedback information being indicative of packets not received correctly. The method may further include examining error indications based on the feedback information and implementing a first error-correction policy if a variation in the error indications among the at least two receivers is below a first error threshold and a second error-correction policy if the variation is above the first error threshold. At least one of the first and second error-correction policies may include transmitting or retransmitting at least one packet using a different coding scheme.
US08902991B2 Decoding apparatus for encoded video signals
The present invention is a decoding apparatus for decoding an encoded video signal capable of displaying a secondary video synchronously with a primary video. The decoding apparatus includes: an auxiliary information analyzing part that analyzes auxiliary information including display auxiliary information about a display position and/or a display size of the secondary video, and applied time information by which the display auxiliary information is applied; a reference time counter that indicates a reference time at which a video is decoded and displayed; a comparing part that compares the applied time information with the reference time counter; a display screen forming part that uses a primary video and a secondary video to form a display screen; and a control part that controls the display screen forming part, wherein the control part controls the display position and/or the display size of the secondary video by affording a command to the display screen forming part using the display auxiliary information, based on an output result of the comparing part.
US08902988B2 Zero-out of high frequency coefficients and entropy coding retained coefficients using a joint context model
This disclosure describes techniques for performing entropy encoding and decoding of video coefficients using a joint context model shared between transform units having different sizes. For example, the joint context model may be shared between transform units having a first size of 32×32 and transform units having a second size of 16×16. Performing entropy coding using a joint context model shared between transform units having different sizes may reduce an amount of memory necessary to store contexts and probabilities, and reduce computational costs of maintaining context models. In one example, the joint context model may be shared between transform units having the first size with coefficients zeroed out to generate a retained coefficient block having the second size and transform units having the second size. In another example, the joint context model may be shared between transform units having the first size and transform units having the second size.
US08902986B2 Look-ahead system and method for pan and zoom detection in video sequences
A look-ahead system and method for pan and zoom detection in video sequences is disclosed. The system and method use motion vectors in a reference coordinate system to identify pans and zooms in video sequences. The identification of pans and zooms enables parameter switching for improved encoding in various video standards (e.g., H.264) and improved video retrieval of documentary movies and other video sequences in video databases or other storage devices.
US08902983B2 Method for predicting a bi-predictive block of a moving picture
A block prediction method using improved direct mode for B picture in a moving picture coding system obtains forward and backward motion vectors of direct mode, obtains two distinct motion-compensated blocks using the forward and backward motion vectors, and predicts a block of the B picture which is about to be coded (or decoded) presently by applying an interpolative prediction to the above blocks, and thereby, accuracy of the predicted block can be improved and the coding efficiency also can be improved.
US08902980B2 Apparatus and method for encoding and decoding high fidelity video, and computer-readable storage medium
Provided are an apparatus and a method for encoding a high fidelity video, and an apparatus and a method for decoding a high fidelity video. A video encoding method for encoding first to third planes having different color components includes performing intra prediction in the first plane or inter prediction between each frame for a block of the first plane, and generating a first residue corresponding to a difference between the block of the first plane and the predicted block of the first plane, predicting a block of the second plane using a reconstructed pixel peripheral to the block of the second plane and a reconstructed pixel peripheral to the block of the first plane corresponding to the reconstructed pixel peripheral to the block of the second plane, and generating a second residue corresponding to a difference between the block of the second plane and the predicted block of the second plane, predicting a block of the third plane using a reconstructed pixel peripheral to the block of the third plane and any one of a reconstructed pixel peripheral to the block of the first plane corresponding to the reconstructed pixel peripheral to the block of the third plane and a reconstructed pixel peripheral to the block of the second plane corresponding to the reconstructed pixel peripheral to the block of the third plane, and generating a third residue corresponding to a difference between the block of the third plane and the predicted block of the third plane, and encoding the first to third residues.
US08902978B2 Enhanced intra prediction mode signaling
A method and apparatus for signaling and receiving a video signal for processing is disclosed. Methods for determining a most probable mode for predicting a current prediction block are provided as well as new methods for grouping intra prediction modes into prediction groups. Methods for predicting a prediction block of video data as well as signaling intra prediction modes are also provided.
US08902977B2 Method and apparatus for providing reduced resolution update mode for multi-view video coding
There are provided a method and apparatus for illumination and color compensation for multi-view video coding. A video encoder includes an encoder for encoding a picture by enabling color compensation of at least one color component in a prediction of the picture based upon a correlation factor relating to color data between the picture and another picture. The picture and the other picture have different view points and both corresponding to multi-view content for a same or similar scene.
US08902974B2 Estimation of high frequency information in encoded signals
A decoder adapted to generate an intermediate decoded version of a video frame from an encoded version of the video frame, determine either an amount of high frequency basis functions or coefficients below a quantization threshold for at least one block of the video frame, and generate a final decoded version of the video frame based at least in part on the intermediate decoded version of the video frame and the determined amount(s) for the one or more blocks of the video frame, is disclosed. In various embodiments, the decoder may be incorporated as a part of a video system.
US08902969B1 Home-video digital-master package
A method for determining digital video data includes receiving digital data comprising a plurality of digital images, wherein each digital image is encoded in a first color space, determining a plurality of color-graded digital images in response to the plurality of digital images and in response to color grading input data, wherein each color-graded digital image is encoded in a second color space, and wherein the second color space is associated with HD video, encoding each color-graded image with a compression encoding substantially independent of integer pixel translation of the plurality of color-graded digital images to form encoded image data package, storing the encoded image data package in a tangible media, and determining the digital video data for a video display device in a remote server in response to the encoded image data package.
US08902967B2 Systems and methods for distributed media stream transcoding and sharing
A new approach is proposed that contemplates systems and methods to support distributed stream media transcoding and sharing in real time. Under the approach, a host associated with a sender generates a high quality stream of media content that is to be shared with a plurality of viewers over a communication network. The hosting devices associated with the plurality of viewers are evaluated for their capability to process and/or transcode the high quality media stream. Based on the evaluation, the host of the sender encodes and transmits the high quality media stream to at least one selected host associated a viewer. Besides decoding the received high quality media stream and displaying it for its own consumption, the selected host of the sender further transcodes the media stream by re-encoding the high quality media steam into a different, probably lower quality media stream, and transmits the re-encoded media stream to a mobile device associated with another viewer, which then decodes and displays the lower quality media stream on the mobile device.
US08902963B2 Methods and apparatus for determining threshold of one or more DFE transition latches based on incoming data eye
Methods and apparatus are provided for determining the threshold position of one or mote DFE latches using an evaluation of the incoming data eye. A threshold position is determined for one or more transition latches employed by a decision-feedback equalizer by obtaining a plurality of samples of a data eye using a data eye monitor; obtaining a vertical eye opening metric from the data eye monitor; and determining the threshold position for the one or more transition latches based on the vertical eye opening metric. A decision-feedback equalizer is also disclosed that comprises at least one data latch having a data threshold; and at least one transition latching having a transition threshold, wherein the transition threshold and the data threshold ate unequal.
US08902960B2 Eye diagram scan circuit and associated method
Eye diagram scan circuit and associated method for a receiver circuit, including a level adjust circuit, a phase interpolator and a control module. The receiver circuit provides a first data signal and a primary phase data according to a received signal. The control module provides a phase offset data and a level offset data. The level adjust circuit adjusts a level of the received signal in respond to the level offset data; the phase interpolator triggers according to a sum of the phase offset data and the primary phase data, so a second data signal is provide in response to the level-adjusted received signal. The control module compares the first data signal and the second data signal, and accordingly provides an eye diagram scan result for the phase offset data and the level offset data.
US08902959B2 System and method for determining channel loss in a dispersive communication channel at the Nyquist frequency
The present invention includes receiving a signal from an output of a dispersive communication channel established between a transmitter and a receiver, determining normalized Nyquist energy of the signal transmitted along the dispersive communication channel established between the transmitter and the receiver, and generating a mapping table configured to identify peaking value at or above a selected tolerance level at or near the Nyquist frequency for a signal received by the receiver based on the normalized Nyquist energy.
US08902954B2 Video serializer/deserializer having selectable multi-lane serial interface
A video processing system may include: a video deserializer having (i) an input for receiving a serial data stream containing video data and (ii) a serial to pseudo-parallel converter, coupled to the serial data stream, for generating from the serial data stream a plurality of serial data output streams through a plurality of serial output lanes; a video serializer having (i) a plurality of inputs for receiving serial data streams and (ii) a pseudo-parallel to serial converter, coupled to the plurality of input serial data streams, for generating a single serial data stream from the plurality of input serial data streams; and a programmable video processing device, coupled to the video deserializer and the video serializer, and having a plurality of interface pins for receiving the plurality of serial output lanes from the deserializer and for transmitting the plurality of serial data streams to the serializer.
US08902951B2 Methods and systems for OFDM using code division multiplexing
In some embodiments of the invention, OFDM symbols are transmitted as a plurality of clusters. A cluster includes a plurality of OFDM sub-carriers in frequency, over a plurality of OFDM symbol durations in time. Each cluster includes data as well as pilot information as a reference signal for channel estimation. In some embodiments, a plurality of clusters collectively occupy the available sub-carrier set in the frequency domain that is used for transmission. In some embodiments of the invention data and/or pilots are spread within each cluster using code division multiplexing (CDM). In some embodiments pilots and data are separated by distributing data on a particular number of the plurality of OFDM symbol durations and pilots on a remainder of the OFDM symbol durations. CDM spreading can be performed in time and/or frequency directions.
US08902948B2 Polarization purity control device and gas laser apparatus provided with the same
A degree of polarization control device includes: a calcium fluoride crystal substrate for transmitting a laser beam; a polarization monitor for measuring the degree of polarization of a laser beam transmitted through the calcium fluoride crystal substrate; and a controller for controlling the rotation angle of the calcium fluoride crystal substrate according to the degree of polarization measured by the polarization monitor; the calcium fluoride crystal substrate being formed by a flat plate having a laser beam entering surface and a laser beam exiting surface running in parallel with the (111) crystal face, the Brewster angle being selected for the incident angle, the rotation angle around the [111] axis operating as a central axis being controlled by the controller.
US08902947B2 Optical module
An optical module providing higher reliability during high-speed light modulation and a lower bit error rate when built into a transmitter (transceiver). An optical module contains a taper mirror for surface emission of output light, an optical modulator device, and an optical modulation drive circuit, and the optical modulator device and the optical modulation drive circuit are mounted at positions so as to enclose the taper mirror.
US08902940B2 Light source control method
The present invention relates to a light source control method capable of decreasing the dependence of a pulse width (FWHM) of an output pulsed light on a repetition frequency. A pulsed light source has an MOPA structure, and has a seed light source and an optical fiber amplifier. The seed light source includes a semiconductor laser which is directly modulated and outputs a pulsed light. By adjusting a temperature of the seed light source and a pumping light power of the optical fiber amplifier, a predetermined full width half maximum of a pulse at a predetermined repetition frequency is implemented for the pulsed light outputted from the optical fiber amplifier.
US08902930B2 Hybrid communication networks
Systems and methods for designing, using, and/or implementing hybrid communication networks are described. In various embodiments, these systems and methods may be applicable to power line communications (PLC). For example, one or more of the techniques disclosed herein may include methods to coordinate medium-to-low voltage (MV-LV) and low-to-low voltage (LV-LV) PLC networks when the MV-LV network operates in a frequency subband mode and the LV-LV network operates in wideband mode (i.e., hybrid communications). In some cases, MV routers and LV routers may have different profiles. For instance, MV-LV communications may be performed using MAC superframe structures, and first-level LV to lower-level LV communications may take place using a beacon mode. Lower layer LV nodes may communicate using non-beacon modes. Also, initial scanning procedures may encourage first-to-second-level LV device communications rather than MV-to-first-level LV connections.
US08902923B2 Wireless device with WLAN and WPAN communication capabilities
A wireless device which operates according to a first protocol specification in active durations specified by the first protocol, and according to a second protocol specification in the idle durations specified by the first protocol specification. In an embodiment, the first protocol specification corresponds to IEEE 802.15.4 standard and the second protocol specification corresponds to IEEE 802.11 family of standards.
US08902920B2 Dynamic advance reservation with delayed allocation
A method of scheduling data transmissions from a source to a destination, includes the steps of: providing a communication system having a number of channels and a number of paths, each of the channels having a plurality of designated time slots; receiving two or more data transmission requests; provisioning the transmission of the data; receiving data corresponding to at least one of the two or more data transmission requests; waiting until an earliest requested start time Ts; allocating at the current time each of the two or more data transmission requests; transmitting the data; and repeating the steps of waiting, allocating, and transmitting until each of the two or more data transmission requests that have been provisioned for a transmission of data is satisfied. A system to perform the method of scheduling data transmissions is also described.
US08902917B2 Method for coordination of wireless transceivers of a network node and network node
A method for coordination of wireless transceivers of a network node, in particular for application in communication nodes of a vehicular network, wherein the network node is equipped with one or more wireless transceivers that are capable of simultaneously generating and/or receiving electromagnetic signals on different electromagnetic channels, the electromagnetic signals being potentially able to interfere with each other, is characterized in the steps of, for each pending packet transmission on a particular of the electromagnetic channels, checking the presence of ongoing and/or scheduled activity on one or more of the other of the electromagnetic channels, and deferring the pending packet transmission in case ongoing and/or scheduled activity is detected on one or more of the other of the electromagnetic channels, at least until the detected ongoing and/or scheduled activity on one or more of the other of the electromagnetic channels is completed. Furthermore, a corresponding network node is disclosed.
US08902915B2 Dataport and methods thereof
A context-free (stateless) dataport may allow multiple processors to perform read and write operations on a shared memory. The operations may include, for example, structured data operations such as image and video operations. The dataport may perform addressing computations associated with block memory operations. Therefore, the dataport may be able, for example, to relieve the processors that it serves from this duty. The dataport may be accessed using a message interface that may be implemented in a standard and generalized manner and that may therefore be easily transportable between different types of processors.
US08902912B2 Differential frame based scheduling for input queued switches
A differential frame-based scheduling scheme is employed for input queued (IQ) switches with virtual output queues (VOQ). Differential scheduling adjusts previous scheduling based on a traffic difference in two consecutive frames. To guarantee quality of service (QoS) with low complexity, the adjustment first reserves some slots for each port pair in each frame, then releases surplus allocations and supplements deficit allocations according to a dichotomy order, designed for high throughput, low jitter, fairness, and low computational complexity.
US08902910B2 Ring-of-clusters network topologies
In a ring-of-clusters network topology, groups of slave devices are accessed in parallel, such that the latency around the ring is proportional to the number of clusters and not proportional to the number of integrated circuits. The devices of a cluster share input and output ring segments such that packets arriving on the input segment are received and interpreted by all the devices in a cluster. In other embodiments, none, some or all but one slaves per cluster are asleep or otherwise disabled so that they do not input and interpret incoming packets. Regardless, in all embodiments, the slaves of a cluster cooperate, potentially under the controller's direction, to ensure that at most one of them is actively driving the output segment at any given time. The devices may be addressed through a device ID, a cluster ID, or a combination thereof. Embodiments of the invention are suited to exploit multi-chip module implementations and forms of vertical circuit stacking.
US08902902B2 Recursive lookup with a hardware trie structure that has no sequential logic elements
A hardware trie structure includes a tree of internal node circuits and leaf node circuits. Each internal node is configured by a corresponding multi-bit node control value (NCV). Each leaf node can output a corresponding result value (RV). An input value (IV) supplied onto input leads of the trie causes signals to propagate through the trie such that one of the leaf nodes outputs one of the RVs onto output leads of the trie. In a transactional memory, a memory stores a set of NCVs and RVs. In response to a lookup command, the NCVs and RVs are read out of memory and are used to configure the trie. The IV of the lookup is supplied to the input leads, and the trie looks up an RV. A non-final RV initiates another lookup in a recursive fashion, whereas a final RV is returned as the result of the lookup command.
US08902897B2 Distributed routing architecture
A hierarchical distributed routing architecture including at least two levels, or layers, for receiving, processing and forwarding data packets between network components is provided. The core level router components receive an incoming packet from a network component and identify a distribution level router component based on processing a subset of the destination address associated with the received packet. The distribution level router components receive a forwarded packet and forward the packet to a respective network. The mapping, or other assignment, of portions of the FIB associated with the distributed routing environment is managed by a router management component.
US08902894B2 Apparatus and methods for wireless communication using a packet structure that indicates whether payload length field and payload are included in the packet
In accordance with aspects of the disclosure, a method, apparatus, and computer program product are provided for wireless communication. The method, apparatus, and computer program product may be configured to generate packets, wherein each of the packets comprises a packet header comprising a packet format field comprising a first indicator that indicates whether the packet header comprises a payload length field and whether the packet comprises a payload. The method, apparatus, and computer program product may be further configured to generate a second indicator based on a type of data in the payload, and attach the second indicator to the data.
US08902892B2 Collective network routing
Disclosed are a unified method and apparatus to classify, route, and process injected data packets into a network so as to belong to a plurality of logical networks, each implementing a specific flow of data on top of a common physical network. The method allows to locally identify collectives of packets for local processing, such as the computation of the sum, difference, maximum, minimum, or other logical operations among the identified packet collective. Packets are injected together with a class-attribute and an opcode attribute. Network routers, employing the described method, use the packet attributes to look-up the class-specific route information from a local route table, which contains the local incoming and outgoing directions as part of the specifically implemented global data flow of the particular virtual network.
US08902889B2 Method, communication arrangement and communication device for transferring information
A method transfers information from and/or to a subscriber-sided communication device wherein at least one first communication relationship between the subscriber-sided communication device and a decentralized communication device which is associated with at least one communication network is established. Also, at least one additional communication relationship between the central communication device and a network access communication network is established. First information can be exchanged between the subscriber-sided communication device and the superior communication network via the first and the at least one additional communication relationship. Additional information which is transferred via the at least one communication network to the decentralized communication device is transferred via the first communication relationship to the subscriber-sided communication device. Advantageously, traditional subscriber-sided communication devices and network-sided network access devices and multimedia-data sources can still be used for using current and future multimedia-data services.
US08902887B2 Load-balancing structure for packet switches and its constructing method
This invention provides a load-balancing structure for packet switches and its constructing method. In this method, the structure based on self-routing concentrators is divided into two stages, that is, a first stage and a second stage fabric. A virtual output group queue (VOGQ) is appended to each input group port of the first stage fabric, and a reordering buffer (RB) is configured behind each output group port of the second stage fabric. Packets stored in the VOGQ are combined into data blocks with preset length, which is divided into data slices of fixed size, finally each data slice is added an address tag and is delivered to the first stage fabric for self-routing. Once reaching the RB, data slices are recombined into data blocks. This invention solves the packet out-of-sequence problem in the load-balancing Birkhoff-von Neumann switching structure and improves the end-to-end throughput.
US08902885B2 Packet communication between a collecting unit and a plurality of control devices and over the power supply line
A communication method between a collecting unit (5) and a plurality of control devices (7i), each of which is associated with at least an electrical device 1(i) via the power line. Messages are exchanged between the collecting unit (5) and the control devices (7i), each of which contains at least: a progressive message number (Pr_N); an addressee identification number assigned to each control device and to the collecting unit. The messages are therefore addressable selectively to a specific control device via said addressee identification number.
US08902883B1 Method and apparatus for priority-provisioned arbitration scheduling for a switch fabric
An apparatus and method for scheduling within a switch is described. A set of input signals is received from input ports. The set of input signals is associated with a set of packets at the input ports. A request for each packet from the set of packets is generated based on the set of input signals. Each request has an input-port indicator, an output-port indicator and a service-level indicator. The packets are scheduled based on the service-level indicator.
US08902881B2 Internet Protocol (IP) address exchange service
Internet Protocol addresses are exchanged between parties to a telephone call. A network server queries a telecommunications switch for the Internet Protocol addresses. Once the Internet Protocol addresses are known, the Internet Protocol addresses may then be shared between parties to the call.
US08902879B2 Generating a comfort indicator at an originating terminal
A call request is sent to establish a telephony session over an Internet Protocol (IP) network between an originating terminal and a destination device. A message responsive to the call request is received from a node connected to the IP network. In response to receiving the message, local generation of a comfort indicator at the originating terminal is performed.
US08902877B2 Method and system for reducing power consumption in wireless communications by adjusting communication intervals
According to one disclosed embodiment, a method for reducing power consumption in wireless communications is described. This method may include transmitting a data transmission from a peripheral device to a primary device during a receiving interval of the primary device, receiving a correction offset by the peripheral device from the primary device after the transmitting of the data transmission, and transmitting a subsequent data transmission from the peripheral device to the primary device using the correction offset to ensure that the subsequent data transmission by the peripheral device occurs within a subsequent receiving interval of the primary device.
US08902868B2 Method and apparatus for wirelessly distributing multiplex signal comprising multimedia data over a local area network
Described herein are various techniques for gathering multimedia data from one or more sources and transmiting that data over a local network to one or more devices, thereby providing ubiquitous multimedia across the network. In one configuration, a device comprising a server receives multimedia data from one or more devices on a local network, creates a multiplex signal from the various multimedia data received from the devices, and wirelessly transmits the multiplex signal over the local network. The server is further configured wherein the multiplex signal comprises a plurality of logical channels, with at least one of the logical channels representing multimedia data received from one of the devices on the network. By then tuning into one or more of the logical channels of the transmitted multiplex signal, a device on the local network can present to a user multimedia data that originates from or resides on another device on the network. According to other configurations, the multiplex signal contains not only multimedia data retrieved from devices on a local network, but can also include multimedia data that originated from sources on a wide area network, such as the Internet or a cellular telephone network.
US08902867B2 Favoring access points in wireless communications
Systems and methodologies are described that facilitate applying offsets and/or selectable hysteresis values to favor access points in cell reselection. In measuring and ranking surrounding access points in reselection, offsets can be applied to favorable access points to facilitate cell reselection thereto. The offset can positively affect measurements, and thus ranking as well, in some cases. Negative offsets can also be applied to lower measurements (and thus ranking) of some access points. Moreover, hysteresis values can be applied in measuring current cells to prevent frequent reselection. The hysteresis values can be selected based on a type of the current cell or related access point to expand the coverage area where desired. Thus, where the current access point is favorable, a larger hysteresis can be added to measurements related to the current access point.
US08902864B2 Choosing parameters in a peer-to-peer communications system
Systems and methodologies are described that facilitate choosing parameters to utilize in a local area peer-to-peer network. The parameters may relate to tone spacing, cyclic prefix, symbol time and the like. Further, the parameters may be a function of a state (e.g. peer discovery state control related traffic state, data related traffic state, . . . ) associated with the local area peer-to-peer network. Moreover, the local area peer-to-peer network may share spectrum with a wide area network; as such, parameters for the peer-to-peer network may be selected based on the type of wide area network (e.g., air interface technology)and/or wide area network related parameters.
US08902863B2 Wireless network communication system and method
A communication system comprising one or more wireless stations programmed to await for an authorizing signal to initiate wireless communications with a network controller or access point. The network controller maintains identification information in different queues, and polls stations from those queues. The wireless station identification information may be moved between the different queues in response to wireless station activity. Between polling, each mobile station aggregates data for the next opportunity to transmit. Multi-polling may be employed such that more than a single station is polled at a time. Polling is accomplished by polling one of the more stations from each queue having the effect that stations in one queue are polled more often than those in another queue. If a lesser active station becomes active, it may be moved into the shorter queue and consequently will be polled more often.
US08902859B2 Method and apparatus for transmitting uplink signal, and method and apparatus for generating uplink signal in communication system
When a terminal generates an uplink signal in a communication system, the terminal hops a sequence for differentiating itself from another terminal with time. The terminal generates the uplink signal by multiplying a transmission symbol by a sequence of a transmission time corresponding to the transmission symbol.
US08902854B2 Methods, systems, and computer readable media for diameter-based steering of mobile device network access
According to one aspect, the subject matter described herein includes a method for Diameter-based steering of mobile device network access. The method includes receiving a Diameter message associated with a mobile device. The method also includes determining, based on the Diameter message, whether the mobile device should be steered to access a radio access network or a radio access network type that is different from a radio access network or radio access network type currently supporting network access of the mobile device. The method further includes, in response to determining that the mobile device should access the different radio access network or radio access network type, steering the mobile device to access the different radio access network or radio access network type.
US08902852B2 Inter-rat handover control using empty GRE packets
Empty GRE packets are used to provide in-order delivery of data packets for a session to a UE during inter-RAT handover. In particular, an empty GRE packet sent from a source gateway in a source RAN to a target gateway in a target RAN indicates to the target gateway the end of forwarded data packets from the source gateway. The target gateway sends data packets received from the source gateway to the UE until the empty GRE packet is received. Upon receipt of the empty GRE packet, the target gateway begins sending data packets received directly from a home network gateway to the UE.
US08902849B2 Method and apparatus for transmitting a reference signal in a multi-antenna system
Provided are a method and apparatus for transmitting a reference signal in a multi-antenna system. A terminal generates a plurality of reference signal sequences in which cyclic shift values different from each other are allocated to the respective plurality of layers, and generates a single carrier-frequency division multiple access (SC-FDMA) symbol to which the plurality of reference signal sequences are mapped. The SC-FDMA symbol is transmitted to a base station via a plurality of antennas. The cyclic shift values allocated to the respective layers are determined on the basis of a first cyclic shift value, which is a cyclic shift value allocated to a first layer from among the plurality of layers, and cyclic shift offsets which are allocated to the respective layers and which are different from each other.
US08902847B2 Radio communication apparatus, radio communication system, and radio communication method
A radio communication apparatus to perform communication with another radio communication apparatus by using a plurality of pairs of a downlink frequency band and an uplink frequency band, the apparatus includes: a receiving unit configured to receive a control message by using a downlink frequency band of a first pair among downlink frequency bands of the pairs during a random access procedure to said another radio communication apparatus, the control message including identification information indicating use of an uplink frequency band of a second pair different from the first pair, the downlink frequency band of the first pair being monitored for control messages by the radio communication apparatus; and a control unit configured to control the radio communication apparatus to perform data communication with said another radio communication apparatus by using the uplink frequency band of the second pair indicated by the identification information included in the control message.
US08902846B2 System and method for uplink timing synchronization in conjunction with discontinuous reception
A system and method are disclosed for providing uplink timing synchronization during DRX operation in a wireless communication system.
US08902844B2 Method and device for allocating wireless resources for a machine type communication device in a wireless communication system
Provided are a method and device for allocating wireless resources in a wireless communication system. The wireless resource allocating method comprises allocating a machine type communication (MTC)-dedicated wireless resource and a general wireless resource, and communicating with at least one MTC device through the MTC-dedicated wireless resource. Herein, the MTC-dedicated wireless resource supports only the communication with the at least one MTC device, and the MTC-dedicated wireless resource and the general wireless resource may be different from each other.
US08902843B2 Method for detecting a downlink control structure for carrier aggregation
This invention relates with a method for detecting a downlink control structure for carrier aggregation in communication network in which data transmission is scheduled by a physical downlink control channel (PDCCH). An UE receives higher layer signaling enabling carrier aggregation for the UE. The UE reads the PDCCHs of component carriers (CCs), wherein the downlink control information (DCI) in the PDCCHs of each CC is read according to one of a plurality of predefined formats derived from the higher layer signaling.
US08902841B2 Mobile station apparatus, base station apparatus, radio communication system, radio communication method, and integrated circuit
In a radio communication system using OCC for DMRS, a base station apparatus correctly receives PUSCH. If a first mode is set in which a demodulation reference signal of a physical uplink shared channel is multiplied by an orthogonal code determined in advance or if a temporary C-RNTI was used for a transmission of downlink control information, the demodulation reference signal of the physical uplink shared channel is multiplied by the orthogonal code determined in advance, and if a second mode is set in which the demodulation reference signal of the physical uplink shared channel is multiplied by an orthogonal code determined on the basis of cyclic shift information in the downlink control information and moreover, if an RNTI other than the temporary C-RNTI was used for the transmission of the downlink control information, the demodulation reference signal of the physical uplink shared channel is multiplied by the orthogonal code determined on the basis of the cyclic shift information in the downlink control information.
US08902840B2 Method and system for providing multi-input-multi-output (MIMO) downlink transmission
An approach is provided for supporting transmission in a multi-input-multi-output (MIMO) communication system including a plurality of terminals. A preamble portion of a frame is transmitted by a multiple transmit antennas of a hub using Orthogonal Frequency Division Multiplexing (OFDM) to the terminals over a channel, wherein each of the terminals determines a characteristic of the channel with respect to the transmit antennas as feedback information. The hub receives the feedback information from the terminals. The hub selects, according to the feedback information, a subset of the antennas for transmission of a remaining portion of the frame to the terminal.
US08902835B2 Method and arrangement for scheduling control in a telecommunication system
In a method of uplink scheduling control in a telecommunication system comprising a node and a plurality of associated user equipment, performing the steps of identifying S10 scheduling loop output signals, scheduling loop input signals, and scheduling loop system states, determining S20 a dynamic space state model representative of a scheduling loop in said system, based on at least a subset of said identified scheduling loop output and input signals and said scheduling loop system states. Subsequently, measuring S30 and storing S40 at least a subset of said identified scheduling loop output signals and said identified scheduling loop input signals. Finally, controlling S50 the plurality of user equipment of said scheduling loop based on optimization of a criterion dependent of said determined dynamic space state model, said stored scheduling loop input signal, and said stored scheduling loop output signals.
US08902834B2 Feedback interval control
A multiple-input multiple-output (MIMO) wireless communication systems that includes a plurality of adjacent cells, each containing one or more base stations operable to transmit signals to, and receive signals transmitted from, one or more users. The users are operable to feed back to the relevant base station(s) channel state information relating to channel(s) between the relevant base station(s) and the users, and the base stations are operable to adapt signals for transmission to users, based on the fed back channel state information, to account for channel variations. The proposed method involves obtaining information related to time-variation in channel spatial structure, and adjusting the timing with which a user feeds back channel state information, based on the time variation in channel spatial structure. The invention helps to achieve a suitable balance between the feedback overhead and system performance, and may be operable in systems operating according to various CoMP transmission modes.
US08902833B2 System and method for performing a radio link control (RLC) reset in a downlink multipoint system
A method and apparatus for wireless communication may provide an RLC reset procedure tailored for a multipoint HSDPA system utilizing a plurality of disparate Node Bs to provide an RLC flow from an RNC to a UE. Some aspects of the disclosure provide for a flush request to be provided to each of a plurality of Node Bs utilized as serving cells in the multipoint HSDPA system, so that stale packets are not retained in internal buffers at the Node Bs following the RLC reset procedure. In some examples, the RLC reset procedure is only completed after confirmation that the flush of the internal buffers has been completed. Confirmation may be explicitly provided by each Node B utilizing a backhaul interface, or may be implicitly determined utilizing timers or signaling between the respective Node Bs.
US08902832B2 Techniques for supporting harmonized co-existence of multiple co-located body area networks
A method (400) for coordinating access to a wireless medium among multiple co-located body area networks (BANs). The method comprises detecting, by a master device of a first BAN, at least one alien BAN using beacons received from at least one co-located BAN, wherein an alien BAN is a BAN having its round start time (RST) misaligned with a RST of the first BAN (S410); recording a RST offset between the first BAN and the at least one alien BAN (S420); based on the RST offset determining which of the first BAN and the at least one alien BAN is an initiator BAN and which is a target BAN (S430); and realigning the RST of the initiator BAN with the RST of the target BAN (S460).
US08902831B2 Methods and systems for interference mitigation
Embodiments herein provide methods and systems for enhancing interference mitigation using conjugate symbol repetition and phase randomization on a set of subcarriers. The repeated data tone in the signal is complex-conjugated before transmission, when the repetition factor is two. When the repetition factor is greater than two, a combination of conjugate repetition and random/deterministic phase variation of the repeated tones is used to mitigate the interference mitigation. Embodiments further disclose Collision Free Interlaced Pilot PRU Structures that can be used with or without conjugate symbol repetition and phase randomization for interference mitigation.
US08902828B2 Carrier indicator field for cross carrier assignments
Techniques for supporting operation on multiple carriers are described. In an aspect, a carrier indicator (CI) field may be used to support cross-carrier assignment. The CI field may be included in a grant sent on one carrier and may be used to indicate another carrier on which resources are assigned. In one design, a cell may determine a first carrier on which to send a grant to a UE, determine a second carrier on which resources are assigned to the UE, set a CI field of the grant based on the second carrier and a CI mapping for the first carrier, and send the grant to the UE on the first carrier. The UE may receive the grant on the first carrier from the cell and may determine the second carrier on which resources are assigned to the UE based on the CI field of the grant and the CI mapping for the first carrier.
US08902825B2 Wireless network system and method of configuring the same
Provided are a wireless network system and a method of configuring the same, more particularly, a wireless network system and a method of configuring the same, in which a wireless network station desiring to transmit or receive data in a high-frequency band notifies a wireless network coordinator of its carrier transmission method to enable the wireless network coordinator to efficiently manage a network. An apparatus for transmitting or receiving data includes: a request command generation unit which generates a request command to secure network resources required to transmit or receive data before actually transmitting or receiving the data over a network; and a communication unit which transmits the request command.
US08902820B2 Handshaking method and apparatus for OFDM systems with unknown sub-channel availability
A method and device for determining available communication sub-channels in an OFDM communication system is disclosed. The method comprises the steps of transmitting, on at least one first sub-channel (207), information (210) regarding sub-channels available for a first transmission of at least one first data packet (245), receiving, on at least one second sub-channel (250), information (225) regarding sub-channels available for a second transmission, determining at least one set of available sub-channels based on the information regarding the first and second transmissions (430). In one aspect of the invention, at least one set of the determined available sub-channels is further provided to a receiving system. The information is being provided in a separate transmission, or within a data packet, or within each subsequent data packet or in selected data packets.
US08902819B2 Mobile terminal apparatus and radio communication method
To provide a mobile terminal apparatus and radio communication method for enabling feedback control information to be efficiently transmitted on a physical uplink control channel, a mobile terminal apparatus of the invention receives downlink shared data channels parallel in a plurality of CCs, makes determinations on the downlink shared data channels about ACK/NACK/DTX, collectively codes determination results (states) of the plurality of CCs after reducing the number of states allowed to be notified individually, and performs signal processing on the coded data to be orthogonalized between users to transmit.
US08902817B2 Method, mobile station, base station and computer program product to control the activation of a wireless carrier
Providing and receiving carrier information using a bitmap comprising a series of bits, each bit indicating one of two predetermined states for a respective carrier of a predetermined group of carriers.
US08902812B1 System and method for passive optical network backhaul
A system is described for providing backhaul over an Ethernet passive optical network (EPON). The backhaul may be backhaul for EV-DO and/or EV-DO Rev. A communications. The system for includes at least one cell site. At least two base transceiver stations are located at the cell site. The base transceiver stations receive radio signals from respective mobile stations. A first one of the base transceiver stations provides a first backhaul signal, and a second one of the base transceiver stations provides a second backhaul signal. The cell site multiplexes these backhaul signals together onto an Ethernet passive optical network. In one embodiment, these signals are provided on different pseudowire connections within a single wavelength lambda on the passive optical network. In another embodiment, the signals are provided on different lambdas of the network.
US08902809B2 Method and apparatus for handling data sending and receiving
A method and an apparatus for handling data sending and receiving are disclosed by the present invention, where the method for handling data sending includes: allocating the number of space transmission layers and pilot frequency resource for transmission at each transmission layer (101); generating pilot frequency resource information according to the number of space transmission layers and the pilot frequency resource for transmission at each transmission layer (102); and sending the pilot frequency resource information to a UE (103). The embodiments of the present invention can enable the UE to determine the specifically used pilot frequency resources to effectively distinguish the specific user channels, obtain correct channel estimation values, improve the channel estimation performance, and obtain correct service data.
US08902807B2 Relay system based on resource allocation
A communication system which transmits data using a relay is disclosed. The communication system efficiently divides and allocates wireless resources allocated to a data transmission system to reception and transmission links between a base station and a relay, reception and transmission links between the base station and a terminal, and reception and transmission links between the relay and the terminal.
US08902804B2 Methods of broadcasting to terminals in a wireless network
A method of broadcasting a file to terminals in a wireless network, such as a mobile radio network. The file is divided into a set of blocks which are to be transmitted to the terminals. An interval for response by the terminals is calculated depending on the number of active terminals which require the blocks. Messages containing the blocks and the response interval are then broadcast over the network. Responses indicating missing or imperfect blocks are received from the terminals. These steps are repeated until all of the terminals have received a complete set of blocks or have become inactive. Shorter response intervals are calculated as the number of active terminals is reduced.
US08902801B2 Universal interface for a wireless adapter
A universal interface for a wireless adapter, which supports a communication protocol used in automation technology, wherein associated with the wireless adapter are a first energy supply unit for energy supply of the wireless adapter and a radio module for communication with a superordinated control unit via a radio network, wherein provided on the interface are at least five connection terminals, which are so embodied that, as a function of a field installation that is to be connected, a portion of the connection terminals is connectable either with different embodiments of field devices or with a servicing device.
US08902796B2 Power-efficient multi-mode transceiver synthesizer configurations
Embodiments of the present disclosure provide power-efficient time division duplexing (TDD) mode configurations of frequency division duplexing (FDD) transceivers. Embodiments avoid time slotted operation of the receive and transmit synthesizers, thereby avoiding undesired operation under transient conditions, frequent calibration, and reduced power supply efficiency. In embodiments, a single synthesizer is used to enable TDD operation, thereby reducing power consumption and calibration requirements by approximately 50%. The single synthesizer may be maintained ON at all times, thus allowing the power supply's switching regulator to operate with substantially constant load conditions.
US08902794B2 System and method for providing N-way link-state routing redundancy without peer links in a network environment
A method is provided in one example and includes broadcasting a switching node identifier associated with a first link-state protocol enabled switching node to a plurality of link-state protocol enabled switching nodes. The plurality of link-state protocol enabled switching nodes are in communication with one another by a link-state protocol cloud. The method further includes broadcasting a priority associated with the first link-state protocol enabled switching node to the plurality of link-state protocol enabled switching nodes. The method further includes broadcasting connectivity information of the first link-state protocol enabled switching node to the plurality of link-state protocol enabled switching nodes using the link-state protocol cloud. The connectivity information includes connectivity of the first link-state protocol enabled switching node with at least one spanning tree protocol enabled switching node.
US08902791B2 Configuration control of inter-cell signaling based on power state
An access point may control reporting configurations based on current power state of a cell in wireless communications network. The first cell may provide reporting configuration instructions to a second cell, instructing selection between at least two defined configurations for reporting system information or load information from the second cell, based on whether the first cell is in a powered up state or a powered down state. The first cell may transmit notifications to the second cell indicating when the first cell is transitioning to a current power state, which may be one of the powered up state or the powered down state. The first cell may select one of the at least two configurations for interpreting reporting data received from the second cell, based its current power state, to obtain the system information or the load information from the second cell.
US08902786B2 System and method for an uplink control signal in wireless communication systems
A user equipment is capable of receiving communications from a cell including at least one base station. The user equipment includes a receiver configured to receive from the base station both a cell specific radio resource control (RRC) configuration comprising a cell specific resource offset parameter for a PUCCH HARQ-ACK, and a UE specific RRC configuration comprising a UE specific RS base sequence parameter and an UE specific resource offset parameter for the PUCCH HARQ-ACK.
US08902783B2 Communication system, communication control device, communication method, and mobile device
During communication by a mobile device, when a communication feasibility determining unit of an SGSN determines, based on a remaining communication volume, that the communication by the mobile device cannot be continued, an access point information extracting unit extracts APN information regarding an APN with an unused remaining communication volume and reports the extracted APN information to the mobile device. An access point information acquiring unit of the mobile device acquires APN information regarding the APN with an unused remaining communication volume. When communication is next initiated, the APN information regarding the APN with an unused remaining communication volume is transmitted to the SGSN to perform communication.
US08902779B2 Base station, wireless communication system, and wireless communication method
A base station including: a first antenna for a first wireless communication, a second antenna for a second wireless communication, and a processor to receive a request from a registered mobile terminal that is registered with the base station, to communicate with the registered mobile terminal by using the first wireless communication in accordance with the request, and to control a non-registered mobile terminal that is not registered with the base station, so as to communicate with the base station by using the second wireless communication, when the non-registered mobile terminal communicates with the base station by using the first wireless communication and a condition of a communication performed by the base station is not satisfied.
US08902776B2 DPI matrix allocator
A deep packet inspection (DPI) allocator for managing bandwidth in a communication channel, the DPI allocator comprising: a DPI application for inspecting data packets propagating to a destination via the channel that enter the allocator; and at least one service application for processing data packets that enter the allocator.
US08902773B2 Implicitly releasing allocated resources
A wireless network, such as an LTE (“Long-Term Evolution”) network, may be configured to receive an identifier from a wireless network. The identifier identifies a resource configuration in a plurality of resource configurations. The resource configuration corresponds to a plurality of resource attributes. At least one signal is transmitted to the wireless network using the plurality of resource attributes.
US08902771B2 Methods and apparatus for use in peer to peer communications devices and/or systems relating to rate scheduling, traffic scheduling, rate control, and/or power control
Methods and apparatus related to peer to peer communication networks are described. Embodiments directed to methods and apparatus for establishing traffic data transmission rates and/or transmission power levels between wireless terminals is described. Embodiments direct to methods and apparatus of making decisions whether or not to transmit as a function of the received power of the received response signals are also described. Transmission of pilot signals after granting of a transmission request and a decision to transmit traffic data has been made occurs in some embodiments. Rate information to be used in determining a traffic rate may be received in response to the pilot signal from a peer to peer (P2P) device.
US08902761B2 Method and apparatus for providing long term evolution network topology management
A method and apparatus providing a network topology management of a wireless communication network are disclosed. The method discovers network topology data of the wireless communication network, wherein the wireless communication network comprises a self-healing capability, and identifies a difference between the network topology data that is discovered against a stored network topology data of the wireless communication network. The method updates the stored network topology data with the difference that is identified.
US08902751B1 Multi-stage switching topology
A system and method provides for delivering substantially uniform performance to all hosts in a network while minimizing a total number of switches required to deliver that performance. In a multi-stage network having a plurality of switches in a first tier and a plurality of switches in a second tier, additional switches may be deployed in the second tier to alleviate problems occurring as a result of uneven striping. A minimum number of second tier switches to be deployed may be determined as a function of a target level of throughput, for example, when using WCMP flow distribution.
US08902750B2 Translating between an ethernet protocol and a converged enhanced ethernet protocol
Translating between an Ethernet protocol used by a first network component and a Converged Enhanced Ethernet (CEE) protocol used by a second network component, the first and second components coupled through a CEE Converter that translates by: for data flow from the first network component to the second network component: receiving, by the CEE converter, traffic flow definition parameters for a single CEE protocol data flow; calculating, by a credit manager, available buffer space in an outbound frame buffer of the CEE converter for the data flow; communicating, by the credit manager to a CEE credit driver of the first component, the calculated size of the buffer space together with a start sequence number and a flow identifier; and responding, by the CEE credit driver to the CEE converter, with Ethernet frames comprising a private header that includes the flow identifier and a sequence number.
US08902724B2 Method and apparatus for cross-talk cancellation
The present invention addresses the problem of a second (or higher) order representation of a transmit signal which is transmitted by a transceiver being mixed into the region of the frequency spectrum of interest to the transceiver receiver, such that it can not then be spectrally filtered out. At its most straightforward, in one embodiment of the invention this is achieved by providing a cross-talk cancellation unit which takes the transmit signal, and obtains the second (or higher) order representation thereof. This representation is then subtracted from the received signal before the signal is passed to the radio control receiver signal processing elements. However, in a more preferred arrangement a filter is also provided, to filter the second or higher order version of the transmit signal, prior to its being subtracted from the received signal. The filter basically takes out the effects of any other filtering or processing which has happened to the transmit signal in the receiver signal chain. This would be, for example, the filtering effects provided by the anti-aliasing filter in the receiver.
US08902723B2 Fixing structure of optical component, fixing method of optical component, optical pick-up device, and module device with light sources of RGB three primary colors
A fixing structure of an optical component is composed of a device chassis; a holder holding an optical component; first and second plate parts for joint to the device chassis and a connecting part of both the plate parts are formed in the holder; a plurality of joint holes are formed in the second plate part; a U-groove into which the connecting part of the holder is fitted and a plurality of through-holes are formed in the device chassis; and an adhesive that is extended in a circular columnar shape and is made by inserting the holder into the U-groove of the device chassis, and applying a UV-curing adhesive in such a manner that the UV-curing adhesive is bonded to the first plate part of the holder and is continuous to the inside of the joint hole via the inside of the through-hole, and radiating UV light along the through-hole.
US08902721B1 Method and device for detecting a data pattern in data bits
A method and device for determining frequency error to extend the pull-in range of a timing recovery circuit for a storage device such as an optical disc drive. A code associated with a storage format of the storage device is detected, and the distance between occurrences of the code is determined. The calculated distance is compared with the expected distance to determine the difference. Based on the difference, the frequency error is determined.
US08902710B2 Method for determining discrete fracture networks from passive seismic signals and its application to subsurface reservoir simulation
A method for mapping a fracture network that includes determining a source of at least one seismic event from features in recorded seismic signals exceeding a selected amplitude (“visible seismic event”). The signals are generated by a plurality of seismic receivers disposed proximate a volume of subsurface to be evaluated. The signals are electrical or optical and represent seismic amplitude. A source mechanism of the at least one visible seismic event is determined. A fracture size and orientation are determined from the source mechanism. Seismic events are determined from the signals from features less than the selected amplitude (“invisible seismic events”) using a stacking procedure. A source mechanism for the invisible seismic events is determined by matched filtering. At least one fracture is defined from the invisible seismic events. A fracture network model is generated by combining the fracture determined from the visible seismic event with the fracture determined from the invisible seismic events.
US08902707B2 Analysis of uncertainty of hypocenter location using the combination of a VSP and a subsurface array
Acoustic signals resulting from microseismic events in the subsurface are received in a first array of detectors deployed in a borehole and in a second array of detectors at or near the surface of the earth. The signals are converted to give the locations of the microseismic events.
US08902699B2 Method for separating up and down propagating pressure and vertical velocity fields from pressure and three-axial motion sensors in towed streamers
A measured pressure field, a measured vertical velocity field, and two measured orthogonal horizontal velocity fields are obtained. A programmable computer is used to perform the following. A scaling factor is determined from water acoustic impedance, the measured pressure field, and the horizontal velocity fields. One of the measured pressure field and measured vertical velocity field is combined with one of the measured vertical velocity field scaled by the scaling factor and the measured pressure field scaled by the scaling factor, generating one of up-going and down-going pressure and velocity wavefields.
US08902698B2 Methods and apparatus for seismic exploration using pressure changes caused by sea-surface variations
Disclosed are apparatus and methods for seismic exploration using pressure changes caused by sea-surface variations as a low-frequency seismic energy source. One embodiment relates to a method which obtains dual wave-fields measured below a sea surface. The measured dual wave-fields are decomposed into a down-going wave-field and an up-going wave-field at a selected observation level. Seismic images are then generated using the down-going and up-going wave-fields. Other embodiments, aspects, and features are also disclosed.
US08902696B2 Multiwing surface free towing system
A technique for seismic surveying is presented in which a towed array, marine seismic spread, includes a plurality of streamers and a deflector system. The deflector system laterally spreads the seismic streamers, wherein at least one streamer in the spread is deflected using more than one deflector attached to the tow cable or streamer, and where the deflectors are not connected to a float on the sea surface. Other aspects of the technique include methods for towing such a spread and for controlling such a spread. Still other aspects include computing resources which may be used to perform the methods.
US08902688B2 Apparatus and method for hidden-refresh modification
A system and method for modifying a hidden-refresh rate for dynamic memory cells includes monitoring a control signal from a processor and performing a hidden-refresh of dynamic data at a first refresh rate when the control signal is asserted. The dynamic data is refreshed at a second refresh rate when the control signal is deasserted for a predetermined duration. A hidden-refresh controller couples to an array of dynamic memory cells during a hidden-refresh of the array of dynamic memory cells. The hidden-refresh controller is further configured to monitor a control signal identifying a request from a processor at a memory device and refresh the dynamic data at a first refresh rate when the control signal is asserted. The hidden-refresh controller is further configured to refresh the dynamic data at a second refresh rate when the control signal is deasserted for a predetermined duration.
US08902684B2 Integrated circuit, system including the same, and operation method of the system
A system includes a first chip configured to supply a training command and a second chip configured to transfer to the first chip a measured time for performing an operation in response to the training command.
US08902683B2 Memory access alignment in a double data rate (‘DDR’) system
Memory access alignment in a double data rate (‘DDR’) system, including: executing, by a memory controller, one or more write operations to a predetermined address of a DDR memory module, including sending to the DDR memory module a predetermined amount of data of a predetermined pattern along with a data strobe signal; executing, by the memory controller, a plurality of read operations from the predetermined address of the DDR memory module, including capturing data transmitted from the DDR memory module; and determining, by the memory controller, a read adjust value and a write adjust value in dependence upon the data captured in response to the read operations.
US08902682B2 Semiconductor memory device
A semiconductor memory device includes an internal signal generation block configured to generate a control signal which is enabled from a generation time of an internal active signal enabled if it is determined that a combination of external commands in synchronization with a rising edge of an external clock inputted from an outside is a preset combination, to a disable time an internal idle signal; and an internal command signal generation block configured to generate an internal write signal if it is determined that a combination of counting signals counted during an enable period of the control signal is a first combination and generate an internal precharge signal if it is determined that the combination of the counting signals is a second combination.
US08902670B2 Semiconductor memory device
According to one embodiment, a semiconductor memory device includes memory cell arrays each including blocks. The block is unit of erase and includes string-groups. Each string-group includes strings each including a first transistor, memory cell transistors, a second transistor coupled in series. The first transistor is connected to different bit line and the second transistor is connected to same source line. The memory cell arrays are provided with different respective block address signals. The memory cell arrays are provided with different respective string address signals. Each of the block address signals specifies one block. Each of the string address signals specifies one string-group.
US08902669B2 Flash memory with data retention bias
Charge leakage from a floating gate in a NAND flash memory die is reduced by applying a data retention bias to a word line extending over the floating gates. The data retention bias is applied to one or more selected word lines when the memory die is in idle mode, when no read, write, erase, or other commands are being executed in the memory die.
US08902663B1 Method of maintaining a memory state
A method of maintaining a memory state of a 3D memory, wherein the memory includes at least a first cell and a second cell overlying the first cell, the method including: applying a back-bias to the first cell and the second cell without interrupting data access to the memory, and generating at least two stable floating body charge levels of the memory state.
US08902659B2 Shared-bit-line bit line setup scheme
Methods for operating a non-volatile storage system utilizing a shared-bit-line NAND architecture are described. A shared-bit-line NAND architecture includes one or more pairs of NAND strings, wherein each pair of the one or more pairs of NAND strings shares a common bit line. In some embodiments, a pair of NAND strings includes an odd NAND string adjacent to an even NAND string. Prior to programming a memory cell associated with the even NAND string, an odd channel associated with the odd NAND string (i.e., the NAND string of the pair that is not selected for programming) is precharged to a bit line inhibit voltage, floated, and then boosted to a second voltage greater than the bit line inhibit voltage as an even channel associated with the even NAND string is precharged. Subsequently, the odd channel may be boosted (e.g., via self-boosting) prior to programming the memory cell.
US08902655B2 Nonvolatile memory device providing negative voltage
A nonvolatile memory device including memory blocks, a pre-decoder, and a row decoder is disclosed. Each of the memory blocks has a plurality of memory cells. The pre-decoder includes a multiplexer and negative level shifters. The multiplexer is configured to generate multiplexing signals in response to address signals. Each of the negative level shifters is configured to generate a converted multiplexing signal corresponding to a respective multiplexing signal by converting a multiplexing signal having a ground voltage into a converted multiplexing signal having a first negative voltage. The row decoder is configured to select at least one of the memory blocks in response to the converted multiplexing signals.
US08902653B2 Memory devices and configuration methods for a memory device
Memory devices and methods of operating memory devices are disclosed. In one such method, different blocks of memory cells have different configurations of user data space and overhead data space. In at least one method, overhead data is distributed within more than one block of memory cells. In another method, blocks are reconfigurable responsive to particular operating modes and/or desired levels of reliability of user data stored in a memory device.
US08902650B2 Memory devices and operating methods for a memory device
Devices and methods facilitate memory device operation in all bit line architecture memory devices. In at least one embodiment, memory cells comprising alternating rows are concurrently programmed by row and concurrently sensed by row at a first density whereas memory cells comprising different alternating rows are concurrently programmed by row and concurrently sensed by row at a second density. In at least one additional embodiment, memory cells comprising alternating tiers of memory cells are programmed and sensed by tier at a first density and memory cells comprising different alternating tiers of memory cells are programmed and sensed by tier at a second density.
US08902648B2 Dynamic program window determination in a memory device
Methods for determining a program window and memory devices are disclosed. One such method for determining the program window measures an amount of program disturb experienced by a particular state and determines the program window responsive to the amount of program disturb.
US08902647B1 Write scheme for charge trapping memory
In a charge trapping memory, data that would otherwise be likely to remain adjacent to unwritten word lines is written three times, along three immediately adjacent word lines. The middle copy is protected from charge migration on either side and is considered a safe copy for later reading. Dummy data may be programmed along a number of word lines to format a block for good data retention.
US08902645B2 Semiconductor memory circuit
Provided is a semiconductor memory circuit excellent in long-term reliability and reading characteristics and having low current consumption. The semiconductor memory circuit includes: a first inverter; a first non-volatile memory, which is electrically writable; a second inverter; and a second non-volatile memory, the first inverter having an output connected to a source of the first non-volatile memory, the first non-volatile memory having a drain connected to an input of the second inverter, the second inverter having an output connected to a source of the second non-volatile memory, the second non-volatile memory having a drain connected to an input of the first inverter, the drain of the second non-volatile memory serving as an output of the semiconductor memory circuit.
US08902643B2 Apparatus, system, and method for writing multiple magnetic random access memory cells with a single field line
A memory device includes a plurality of magnetic random access memory (MRAM) cells, a field line, and a field line controller configured to generate a write sequence that traverses the field line. The write sequence is for writing a multi-bit word to the plurality of MRAM cells. The multi-bit word includes a first subset of bits having a first polarity and a second subset of bits having a second polarity. The write sequence writes concurrently to at least a subset of the plurality of MRAM cells corresponding to the first subset of bits having the first polarity, then subsequently writes concurrently to a remaining subset of the plurality of MRAM cells corresponding to the second subset of bits having the second polarity.
US08902640B2 Semiconductor device and driving method thereof
A semiconductor device including a nonvolatile memory cell in which a writing transistor which includes an oxide semiconductor, a reading transistor which includes a semiconductor material different from that of the writing transistor, and a capacitor are included is provided. Data is written to the memory cell by turning on the writing transistor and applying a potential to a node where a source electrode (or a drain electrode) of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected, and then turning off the writing transistor, so that the predetermined amount of charge is held in the node. Further, when a p-channel transistor is used as the reading transistor, a reading potential is a positive potential.
US08902633B2 Resistive memory device comprising selectively disabled write driver
A nonvolatile memory device comprises a resistive memory cell, a write driver configured to write data to the resistive memory cell during a write period comprising a plurality of loops, and a sense amplifier configured to verify whether the data is correctly written to the resistive memory cell in each of the loops. Where the sense amplifier verifies that the data is correctly written in a k-th loop among the loops, the write driver is disabled from a (k+1)-th loop to an end of the write period.
US08902631B2 Memory devices, circuits and, methods that apply different electrical conditions in access operations
A memory device can include a plurality of physical blocks that each include a number of memory elements programmable between at least two different impedance states, the memory elements being subject to degradation in performance; and bias circuits configured to applying healing electrical conditions to at least one spare physical block that does not contain valid data; wherein the healing electrical conditions are different from write operation electrical conditions, and reverse degradation of the memory elements of the at least one spare physical block.
US08902627B1 RFID IC with tunneling-voltage profile calibration
RFID tag ICs employ tunneling-voltage profile calibration during IC manufacturing to determine and store, typically in nonvolatile memory, a tunneling-voltage profile for writing data to the IC's nonvolatile memory. The IC may subsequently read the profile at power-up, prior to writing the memory, or at other times as determined by the IC or by an interrogating reader, and may determine an actual ramp profile for writing to the nonvolatile memory based on the read profile and one or more operating conditions. By using the read profile to determine an actual ramp profile for writing to the nonvolatile memory, the IC may reduce nonvolatile memory write time and oxide stress.
US08902625B2 Layouts for memory and logic circuits in a system-on-chip
An integrated circuit including a plurality of memory circuits and a plurality of logic circuits. The plurality of memory circuits is arranged on a die along a plurality of rows and a plurality of columns. Each memory circuit includes a plurality of memory cells. The plurality of logic circuits is arranged on the die between the plurality of memory circuits along the plurality of rows and the plurality of columns. The plurality of logic circuits is configured to communicate with one or more of the memory circuits.
US08902623B2 Power inverter
In a power inverter, a coolant passage is fixed to a chassis to cool the chassis; the chassis is divided into a first region and a second region by providing the coolant passage in the chassis; a power module is provided in the first region as fixed to the coolant passage; a capacitor module is provided in the second region; and the DC terminal of the capacitor module is directly connected to the DC terminal of the power module.
US08902621B2 Power supply device for use with selectable AC power supply voltage
A power supply device that is able to switch between rectifier circuits in accordance with the voltage of a multi-phase AC power supply, and able to accommodate different power supply voltages. The power supply device has rectifier circuits that include a first circuit that rectifies a line voltage of the AC power supply, converting it into a direct current voltage of a first predetermined value, when the voltage of the AC power supply is a predetermined value or less, and a second circuit that rectifies a phase voltage of the AC power supply, converting it into a direct current voltage of a second predetermined value, when the voltage of the alternating current power supply exceeds the predetermined value. The first and second circuits operate in such a way that the AC input current is of the same phase as the voltage of the AC power supply.
US08902615B2 Load-segmentation-based 3-level inverter and method of controlling the same
The present disclosure relates to a load-segmentation-based 3-level inverter and method for controlling same. Three-level inverter includes: multiple capacitors charged with voltages divided from a DC input voltage; top switch having one end connected with positive terminal of one of multiple capacitors; bottom switch having one end connected with negative terminal of one of multiple capacitors; multiple legs each including a first switch connected to the other end of top switch and a second switch connected to the other end of bottom switch with the first and second switches connected; multiple diodes connected in series forwardly from the other end of bottom switch to the other end of top switch and having interconnect points connected to a contact between the multiple capacitors; and multiple loads having connected terminals at a contact between the first and second switches of each of the legs and a contact between the multiple diodes.
US08902614B2 Method and circuit for suppressing bias current and reducing power loss
A method and circuit for suppressing a bias current and decreasing power consumption. A current suppression circuit is coupled to a circuit element, which is capable of conducting the bias current. Coupling the current suppression circuit to the circuit element forms a node. In one operating mode, the current suppression circuit applies a voltage to the node in response to a heavy load. In another operating mode, the current suppression circuit lowers the voltage at the node in response to a light load or no load. Lowering the voltage at the node decreases the flow of bias current through the circuit element thereby lowering power loss.
US08902611B2 Integrated circuit retention mechanism with retractable cover
A computer processor retention device comprises a load frame, a load plate, and a pair of retractable cover members. The load frame may be secured to a circuit board around a processor mounting site. The load plate is pivotally coupled to the load frame and is pivotable between being open for receiving a processor at the processor mounting site and closed in engagement with a periphery of the received processor. The load plate has a window that is open to the processor mounting site when the load plate is closed. The retractable cover members span the window and are alternately movable along a track toward one another to cover the processor mounting site and away from one another to expose the processor mounting site.
US08902603B2 Solder and lead free electronic circuit and method of manufacturing same
An electronic circuit contains a circuit board with conducting tracks to which one or more electronic components with conducting contacts are positioned overlying portions of the conducting tracks and each such electronic component is held in place by a clamp that covers and is contact with the top surface of the electronic components so as to hold their conducting contacts in electrical contact with the conducting tracks of the circuit board. The clamp can include a resilient layer held between the top surface of electronic components and a rigid clamping sheet.
US08902601B2 Removable circuit card insert extractor
A removable tool includes a toe, a clevis, and a handle. The toe is configured to be insertable into and removable from an enclosure notch of a card guided computer enclosure. The clevis is configured to be insertable into and removable from a card hook of a circuit card assembly. The handle is for receiving force for inserting or extracting an array of circuit card assembly contacts into or out of an array of motherboard contacts, respectively.
US08902600B2 Electrically activatable integrated mechanical anti-rollback device with one or more positions
A thermally deformable assembly is formed in an integrated-circuit metallization level. The physical behavior of the metal forming the assembly brings the assembly into contact with a stop-forming body when subjected to a temperature change caused by a current flow. A natural rollback to the initial configuration in which the assembly is a certain distance away from the body is prevented. The state or configuration of the assembly is determined by a capacitive reader.
US08902598B2 Programmable controller component with assembly alignment features
A programmable logic controller (PLC) assembly includes a bottom housing with a base, a first plurality of elongate alignment features extending from the bottom housing transverse to the base, and a first connection feature. The PLC assembly includes a central processing unit with a circuit board and at least two receptacles therethrough configured to engage and slide along at least two of the first plurality of alignment features. The at least two of the first plurality of alignment features are positioned asymmetrically with respect to the base. The PLC assembly includes an upper housing with a second connection feature configured to slidably couple with the first connection feature and a second plurality of elongate alignment features configured to slidably engage at least two of the first plurality of alignment features, which are positioned asymmetrically with respect to the base.
US08902597B2 Thin-film transistor forming substrate, semiconductor device, and electric apparatus
A thin-film transistor forming substrate includes a substrate that has flexibility or elasticity and at least one electronic component that is disposed so as to be buried inside the substrate. The electronic component is configured so as to include one or more types of an IC, a capacitor, a resistor, and an inductor.
US08902596B2 Data storage device
A data storage device includes a printed circuit board (PCB), a connection tab, a dummy tab and a guiding member. A memory chip is mounted on the PCB. The connection tab is formed on a first surface of the PCB to electrically connect the PCB with a first cable. The dummy tab is formed on the first surface of the PCB. The guiding member is formed on the dummy tab to guide an insertion direction of the first cable. Thus, the data storage device without a separate connector may be manufactured by a relatively simple process at a lower cost.
US08902594B2 Electrochemical capacitor
Disclosed is an electrochemical capacitor that can be reflow soldered, and wherein film package is used on the capacitor body. The container (20) of the electrochemical capacitor (ECC) stores the film package (11) of the capacitor body (10) within a storage space (SR) such that sealing sections (11a-11c) do not contact the inner surface of the storage space (SR). Inner material (30), which cover the sealing sections (11a-11c) and rear edge of the film package 11 and are adhered to the inner surface of the storage space (SR), affixing the film package (11) within the storage space (SR), are provided in a rectangular framework to the regions in the storage space (SR) of the container (20) that correspond to said sealing sections (11a-11c) and rear edge.
US08902593B2 System and method for coupling information handling systems in a modular chassis
A system may include a chassis and a chassis backplane integral to the chassis. The chassis may be configured to receive a plurality of server backplanes, each server backplane integral to a respective modular sled configured to removably engage with the chassis. The server backplane may include a plurality of information handling systems, a switch communicatively coupled to each of the information handling systems, at least one external network port communicatively coupled to the switch for coupling the switch to an external network external to the chassis, and a plurality of internal network ports communicatively coupled to the switch. The chassis backplane may have a topology configured to couple the switch from each server backplane to switches from two or more other server backplanes such that an internal chassis network is formed comprising the information handling systems and switches of the plurality of server backplanes engaged with the chassis.
US08902592B2 Heat sink and method for fixing heat sink
A heat sink for cooling a device mounted on a mount board, the heat sink having a plurality of grooves at different heights in a surface opposite a surface in contact with the device.
US08902583B2 Holding structure and portable electronic apparatus therewith
A holding structure and a portable electronic apparatus therewith are disclosed. The holding structure includes a mount structure and a movable member. The mount structure includes a constraining portion having an accommodating space and an opening. The movable member includes a carrier having an engaging structure. When an end portion of a pencil object is inserted into the constraining portion from the opening to be accommodated together with the carrier in the accommodating space, the constraining portion constrains deformation of the engaging structure such that the engaging structure is engaged with the end portion. The end portion is therefore hardly extracted out. When the carrier departs from the accommodating space, the engaging structure and the end portion are disengaged. The end portion is therefore easily extracted out. The invention uses structure to constrain deformation, which can provide stable holding strength without any metal spring.
US08902576B2 Handheld computing device having drop-resistant LCD display
A display for a handheld computing device is provided. The device comprises: a display panel; a circuit board carrying display electronics for the display panel; a motherboard; and a resilient layer having a first surface and a second surface, the first surface being adhered to the circuit board, and the second surface adhered to the motherboard, the resilient layer being positioned such that the resilient layer is disposed between the circuit board and the motherboard.
US08902575B2 Support apparatus and electronic device employing support apparatus
An exemplary support assembly is provided for supporting an electronic device on a supporting surface. The support assembly includes a shell receiving the electronic device, and a back-support. The shell defines an elongated sliding rail. The back-support includes a prop stand, and a prop seat slidable in the sliding rail. One side of the prop stand is rotatably engaged in the prop seat and serves as a spindle. The other sides of the prop stand are thus movable between a folded position substantially coplanar with the prop seat and a supporting position angled relative to the prop seat. When the other sides of the prop stand are in the supporting position, a tilt angle of the electronic device on the supporting surface is adjustable by sliding the prop seat in the sliding rail.
US08902572B2 Electronic device
An electronic device includes a first body having a top surface, a second body slidably covering on the first body, and at least one connecting member for connecting the first body with the second body. The second body is capable of sliding from a first position covering the top surface to a second position uncovering the top surface. When the second body is in the first position, the first body hides the top surface to allow the electronic device being used in a first state, and when the second body is in the second position, the second body is operable to be coplanar with the first body to allow the electronic device being used in a second state.
US08902567B2 Conductive polymer dispersions for solid electrolytic capacitors
A capacitor with an anode and a dielectric over the anode. A first conductive polymer layer is over the dielectric wherein the first conductive polymer layer comprises a polyanion and a first binder. A second conductive polymer layer is over the first conductive polymer layer wherein the second conductive polymer layer comprises a polyanion and a second binder and wherein the first binder is more hydrophilic than the second binder.
US08902563B2 Multilayer ceramic electronic component
There is provided a multilayer ceramic electronic component, including: a ceramic body formed by laminating dielectric layers having an average thickness of 0.7 μm or less; external electrodes formed on external surfaces of the ceramic body; and internal electrodes respectively disposed on the dielectric layer so as to have a gap formed therebetween, wherein, when a narrowest gap between the internal electrode edges adjacent to one another is denoted by Gmin, 10 μm≦Gmin≦60 μm is satisfied.
US08902551B2 Inverter for an electric machine and method for operating an inverter for an electric machine
An inverter for an electric machine, and a method for operating the inverter, has at least one output stage unit for producing a connection between the electric machine and a power supply network, a control unit for controlling the output stage unit, a supply unit independent of the power supply network for power supply of the output stage unit, at least one emergency operation control assigned to the output stage unit for controlling the output stage unit such that switching elements are switched into a short circuit operation, at least one emergency operation supply assigned to the output stage unit for generating a power supply from the power supply network, and a coordination control, which activates or deactivates the emergency operation control as a function of a status signal of the independent supply unit and a standby signal of the control unit.
US08902548B2 Head with high readback resolution
An apparatus that includes a first read shield and a second read shield and a reader stack between the first and second read shields. The first and second read shields each include a thin high permeability layer closest to the reader stack and a low permeability layer and/or a geometric feature to control magnetic field flux lines in a free layer of the reader stack.
US08902547B1 Multiple layered head interconnect structure
A multiple layered interconnect structure to provide an electrical interface between one or more electrical elements on a head to read/write circuitry is disclosed. The interconnect structure includes first and second interconnecting layers. The first interconnecting layer is formed on a slider body of the head and includes a first or lower bond pad connectable to one or more electrical elements on the slider body through the first interconnecting layer. The second interconnecting layer includes a second or upper bond pad connectable to the one or more transducer elements through the second interconnecting layer. The second interconnecting layer is on top of the first interconnecting layer and the structure includes an insulating layer between the first and second interconnecting layers. In illustrated embodiments, the first and second interconnecting layers are formed on a back side or surface of the slider body to form top side upper and lower bond pads that interface with bond pads on a flex circuit to provide the interface to R/W circuitry.
US08902544B2 Spin torque oscillator (STO) reader with soft magnetic side shields
In one embodiment, a magnetic head includes a first shield; a spin torque oscillator (STO) sensor positioned above the first shield, the STO sensor comprising a reference layer and a free layer positioned above the reference layer; and at least one shield positioned in a plane that is parallel with a media-facing surface of the STO sensor, the plane also intersecting the STO sensor, wherein one or more of the at least one shield comprises a highly magnetically permeable material that is exchange decoupled and electrically decoupled from the STO sensor. Other magnetic heads, systems, and methods for producing the magnetic heads are described according to more embodiments.
US08902542B2 Disk drive device having a projecting portion and a mounted laminated core
In a disk drive device, a magnetic recording disk is to be mounted on a hub. A base plate rotatably supports the hub through a bearing unit. A laminated core is formed by laminating magnetic steel sheets, the laminated core having a ring portion and a plurality of teeth that extend radially from the ring portion, with coils wound around the plurality of teeth. A projecting portion is formed along the bearing unit, which axially extends toward the inner surface of the hub and by which the core is supported. The laminated core is fixed by sandwiching the ring portion between a seat formed on the base and an extending portion extending radially outward from the projecting portion.
US08902537B1 High density timing based servo format
A product having a magnetic recording tape with at least one servo track, the at least one servo track having a plurality of first magnetic bars and a plurality of second magnetic bars. The first magnetic bars each have a longitudinal axis oriented between 2 and 88 degrees from the longitudinal axis of the magnetic recording tape. A width of each of the at least one servo track is defined in a direction perpendicular to the longitudinal axis of the magnetic recording tape between sides of the servo track, the sides of each servo track extending along ends of the first magnetic bars. Lengths of the second magnetic bars along the longitudinal axes thereof are less than the width of the associated servo track.
US08902536B1 Skew-tolerant reader configurations using cross-track profiles for array-reader based magnetic recording
A method for enhancing read performance in an ARMR system includes: obtaining a first reader offset profile corresponding to a first reader of a multi-reader array head in the ARMR system; obtaining at least a second reader offset profile corresponding to at least a second reader of the multi-reader array head in the ARMR system; combining the first and second reader offset profiles to generate a combined reader offset profile; and controlling a location of the multi-reader array head in the ARMR system relative to at least one target track associated with a magnetic storage medium to be read as a function of a peak amplitude of the combined reader offset profile.
US08902532B2 Write avoidance areas around bad blocks on a hard disk drive platter
A method and computer program product identify the location of a bad block on a disk platter of a hard disk drive, determine an avoidance area extending from the bad block, and prevent data from being written to the avoidance area.
US08902528B1 Quasi-statically tilted head having dilated transducer pitch
A method according to one embodiment includes reading and/or writing data to a magnetic recording tape using a head having at least two modules, each of the modules having an array of transducers, wherein an axis of each array is defined between opposite ends thereof, each of the axes of the head being tilted at an angle greater than 0° from a line oriented perpendicular to an intended direction of tape travel thereacross during the reading and/or writing. The method includes at least one of: introducing a timing offset to at least one servo channel to compensate for offset in servo readback signals introduced by the tilt of the head, introducing a timing offset to at least some read channels to compensate for offset in readback signals introduced by a tilt of the head, and introducing a timing offset to at least some write channels to enable writing of transitions that are readable by a non-tilted head.
US08902526B2 Recording medium
In various embodiments, a recording medium having a servo layer configured to provide servo information and a data recording layer configured to record data, wherein the medium comprises a plurality of servo patterns and a plurality of data segment in one sector, each data segment corresponding to each of the plurality of servo patterns, wherein the plurality of servo patterns comprises a first servo pattern comprising an automatic gain control, a second servo pattern comprising a sector address mark, a third servo pattern comprising a GrayCode, and a fourth servo pattern comprising a plurality of servo bursts, wherein the data recording layer is configured to record the data on the data segments corresponding to the first, second, third and fourth servo patterns.
US08902522B2 Colored photosensitive resin composition for preparation of color filter of solid-state image sensing device using 300 nm or less ultrashort wave exposure equipment, color filter using same, and solid-state image sensing device containing same
Disclosed is a colored photosensitive resin composition for a color filter of a solid state imaging device using an ultra-short wavelength exposing device of 300 nm or less, a color filter and a solid state imaging device including the same. The colored photosensitive resin composition can fabricate a color filter having a micro-patterned colored pattern. The color filter can be advantageously applied to a solid state imaging device.
US08902519B2 Replacement apparatus for an optical element
A replacement apparatus for an optical element mounted between two adjacent optical elements in a lithography objective has a holder for the optical element to be replaced, which holder can be moved into the lithography objective through a lateral opening in a housing of the same.
US08902516B2 Imaging lens and imaging apparatus
An imaging lens substantially consists of six lenses of a negative first lens, a negative second lens, a positive third lens, a positive fourth lens, a negative fifth lens and a positive sixth lens in this order from an object side. An object-side surface of the second lens has a shape having negative refractive power at a center, and including a part having positive refractive power in an area between the center and an effective diameter edge, and having negative refractive power at the effective diameter edge (concave shape facing the object side), and the refractive power at the effective diameter edge being weaker than the refractive power at the center. Further, an object-side surface of the third lens is convex toward the object side. Further, a predetermined conditional formula about a combined focal length of the first lens, the second lens and the third lens is satisfied.
US08902513B2 Ultracompact image pickup lens
An image pickup lens includes, an aperture stop, a first meniscus lens having positive refractive power with a convex surface facing the object, a second lens having positive refractive power with a concave surface facing the object, a third lens having negative refractive power with a convex surface facing the object, the both surfaces of the third lens are aspheric and having at least one pole-change point, and following conditional expressions are satisfied: TTL<3.0  (1) 0.80
US08902511B2 Optical image capturing system
An optical image capturing system includes, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element and a seventh lens element. The first lens element with positive refractive power has a convex object-side surface. The second lens element has refractive power. The third lens element has refractive power. The fourth lens element has refractive power. The fifth lens element with refractive power has both surfaces being aspheric. The sixth lens element with refractive power has both surfaces being aspheric. The seventh lens element with refractive power has both surfaces being aspheric. The optical image capturing system has a total of seven lens elements with refractive power and a stop disposed closer to the object side than the third lens element.
US08902504B2 Diffractive optical element having a reflective member disposed between different grating wall surfaces thereof, and optical system and optical apparatus having the diffractive optical element
A diffractive optical element used as a lens of an optical system includes a first diffractive grating that includes a first grating surface and a first grating wall surface, a reflective member disposed on the first grating wall surface, and a second diffractive grating that includes a second grating surface and a second grating wall surface, and that is disposed so that the second grating surface contacts the first grating surface and the second grating wall surface contacts the reflective member. When off-screen light having an incident angle larger than that of off-axis light flux enters the diffractive optical element at a predetermined incident angle, an emission angle of light having the maximum intensity emitted from the first or second grating wall surface is appropriately set. The maximum width of the reflective member and a grating pitch of each of the first and second diffractive gratings are appropriately set.
US08902502B2 Stereoscopic image display apparatus and method of driving the same
An embodiment of the present invention provides a stereoscopic image displaying apparatus comprising a displaying panel that receives image data displaying an image and black data displaying no image for each frame section, and a polarization control panel that is located over the displaying panel and changes a polarization state.
US08902501B2 Stage system and microscope
Disclosed herein is a stage system, including: a stage on which to mount a slide glass; a projection block projected more than the thickness of the slide glass to the side of that surface of the stage on which to dispose the slide glass; and a pressing block which is provided on that surface of the stage on which to dispose the slide glass, is thicker than the slide glass, and presses toward the projection block the slide glass disposed between itself and the projection block.
US08902499B2 Display module and mobile terminal having the same
A display module including a first substrate and a second substrate facing each other; a liquid crystal layer located between the first and second substrates; a first polarizer laminated on the first substrate; and a conversion layer laminated on the first polarizer. Further, the conversion layer includes a plurality of first films and a plurality of second films in an alternating manner, each of the first films having a first refractive index, and each of the second films being laminated on a lower surface of a corresponding first film and having a second refractive index lower than the first refractive index.
US08902498B2 Broad spectral telescope
An optical assembly includes: a first lens comprising a crown material; a second lens comprises a primary flint material for wavelengths below about 1.0 μm; and a third lens comprising a secondary flint material for wavelengths below about 1.0 μm, wherein the first, second and third lenses together are configured to transmit light and function in the visible, mid-wavelength infrared (MWIR) and long-wavelength infrared (LWIR) regions of the electromagnetic spectrum. In some implementations, the optical assembly may be configured as an afocal Galilean telescope having an objective lens assembly and a eyepiece lens assembly.
US08902495B2 Laser or amplifier optical device pumped or seeded with nonlinearly generated light
An optical source configured for providing output light for providing input signal light or pump light can comprise pump source for pumping a four wave mixing (FWM) process with light pulses (“FWM pump light”); a FWM element in optical communication with the pump source, the FWM element configured for hosting the FWM process to generate, responsive to the FWM pump light, pulses of FWM signal light and FWM idler light having different wavelengths. The optical source can be configured such that the output light comprises pump light having a pumping wavelength or as input signal light having a gain wavelength for pumping or seeding an amplifying optical device comprising a gain material for providing optical gain. The gain material can have absorption and emission spectra defining gain and pumping wavelengths at which, respectively, the gain material is arranged in the device to provide optical gain via a process of stimulated emission responsive to being pumped.
US08902490B2 Device for fluidic display and corresponding method
The invention relates to a display, for using liquids to display information and a corresponding method. According to the invention, said display comprises a number of display elements with cavities, at least one display liquid for displaying information and at least one liquid reservoir for providing the at least one display liquid, characterized in that each display element further comprises a dosing device, by means of which display liquid from the liquid reservoir may be dosed into and out of the display element. The dosing device thus permits a precise dosing of defined display liquid volumes into or out of the display element. The method in which said dosing device finds use is used for precisely repeated dosing of defined volumes of display liquid.
US08902483B2 Accurate printing of a target colour
A method of accurately printing a target color is provided. The method comprises: in a first step measuring the light spectrum (106) of a first printed color sample (104), which has been printed with a first ink coverage; and from the measured light spectrum calculating a color discrepancy between the first printed color sample and the target color. The method further comprises in a second step calculating an improved ink coverage (112), and printing a second color sample with the improved ink coverage (104). The aforementioned steps are repeated until a predetermined condition for accuracy of the target color has been reached (110).
US08902482B2 Image forming apparatus performing overprint processing
A first color conversion unit converts non-subtractive image data into subtractive image data. An overprint detection unit detects whether overprinting is specified for the subtractive image data. A drawing processing unit performs overprint processing for the subtractive image data if a color value of a foreground object, for which overprinting is specified, indicates that a region where the foreground object overlaps a background object is colored, and an underlying region of the background object behind the foreground object is colored. The color value of an overlapping region is overwritten with the color value of the foreground object. The overlapping region is not overwritten if the region where the foreground object overlaps the background object is colorless. A second color conversion unit converts image data subsequent to the overprint processing into image data having output colors in accordance with characteristics of the image forming apparatus.
US08902480B1 Image forming apparatus, reading apparatus and reading method
An image forming apparatus comprises an image sensor configured to extend in a horizontal scanning direction, a carriage, a guide section and a reading control section. The carriage configured to move in a vertical scanning direction orthogonal to the horizontal scanning direction to change a reading position of a document. The guide section configured to have a guide surface for guiding the document to the document glass, and a white part, a first colorizing part and a second colorizing part which are formed on the guide surface in line in the vertical scanning direction. The reading control section configured to move the carriage to align the reading position in the vertical scanning direction with one of the white part, the first colorizing part and the second colorizing part and execute a reading processing.
US08902474B2 Image processing apparatus, control method of the same, and program
An image processing apparatus according to the present invention comprises an input unit sequentially scanning first image data having first resolution, in units of a predetermined number of pixels that are contiguous in a first direction, in a second direction crossing the first direction at right angles, thereby inputting a pixel group corresponding to each unit of pixels, a computation unit calculating pixel values of second image data having second resolution using pixels in a reference area having a predetermined range in the first image data, a storage unit storing pixel values of a range of the first image data that is larger than the reference area in the first direction, and a control unit controlling the computation unit so as to successively output pixels of the second resolution in the first direction in units of the predetermined number of pixels using the stored pixels.
US08902473B2 Recording apparatus
A recording apparatus includes a recording unit that performs a recording operation on a medium, a discharge unit that discharges the medium that has undergone the recording operation by the recording unit, a medium receiving tray that receives the medium discharged from the discharge unit, the medium receiving tray being shiftable between a first state in which the medium receiving tray is drawn out in a medium discharge direction and a second state in which the medium receiving tray is retracted in a direction opposite to the medium discharge direction, and a blocking mechanism configured to be engaged with the trailing edge of the medium while the medium receiving tray is shifted from the first state to the second state, and to restrict the medium from being drawn inside.
US08902469B2 Print setting apparatus, control method of print setting apparatus, computer readable storage medium storing control program of print setting apparatus, and printing apparatus
A print setting apparatus of the present invention displays a first preview image and a second preview image each showing output results of print data obtained by the first print setting and the second print setting, respectively (S8 and S10); receives operation instructions to the displayed first preview image (S11 and S13); and modifies the first preview image in accordance with the received operational instructions (S15) and then modifies the second preview image in accordance with the first preview image after being modified (S16).
US08902467B2 Color conversion device determining value of non-basic color and converting input signal to output signal having basic and non-basic colors as elements, color conversion method image forming apparatus, and non-transitory computer readable medium
A color conversion device includes a non-basic-color value determiner that determines a value of a non-basic color, to be used in an image forming unit, different from a basic color based on a maximum value for the non-basic color usable relative to an input basic-color value in an input image signal having the basic color as an element, a first non-basic-color limit rate and a second non-basic-color limit rate set relative to the input basic-color value and a total input basic-color value, respectively, and each indicating a rate that limits the use of the non-basic color relative to the maximum value; and a basic-color value determiner that determines a value of the basic color to be used in the image forming unit based on the determined non-basic-color value. The determiners convert the input image signal into an output image signal having the basic and non-basic colors as elements.
US08902466B2 Color measuring device, image forming apparatus, image forming method, and computer-readable storage medium
A color measuring device include an illuminating unit configured to illuminate an image-capturing range; an image capturing unit configured to capture an image of the image-capturing range containing a patch and an object; an extracting unit configured to extract image data of a surrounding region in a predetermined color from the image data output by the image capturing unit; an interpolating unit configured to interpolate at least one target region that is at least one of regions of the patch and the object based on the image data of the surrounding region; a storage unit configured to store therein, as correction data, interporting data that is interporated; a correcting unit configured to correct the image data output by the image capturing unit by using the correction data; and a calculating unit configured to calculate a colorimetric value of the object based on the corrected image data.
US08902461B2 Communication control apparatus and communication control system for transmitting a scanned image via a NGN
A communication control apparatus connected to an NGN includes an interface that is connected to an MFP and a portable terminal via a network, a control unit that generates a scanning designation screen for inputting a scanning condition in response to an original document scanning request from the portable terminal, provides a request for starting scanning in the scanning condition, acquires image data read by scanning an original document, converts the acquired image data into a thumbnail image so as to generate a preview screen, and generates a transmission destination information screen for designating a transmission destination from transmission destination address information, a transmission and reception unit that transmits the scanning designation screen, and an information selection screen including the preview screen and the transmission destination information screen to the portable terminal, and a call control unit that transmits the image data to the designated transmission destination via the NGN.
US08902459B2 Multiple pass pipe/filter date stream processing mechanism
A computer generated method disclosed. The method includes each filter within a chain of filters of a pipes and filters architectural pattern declaring a pass requirement to indicate a number of times the filter is to be processed to produce final form data and processing a stream of data at each filter within the chain of filters to produce the final form data.
US08902457B2 Image processing apparatus and image processing system
An image processing apparatus scans an original document, coverts the original document into image data, creates an electronic file based on the image data, records a scanned mark on the scanned original document, and confirms whether the scanned mark is recorded. The scanned mark includes ID information assigned to the image processing apparatus. The electronic file is created when the scanned mark is not recorded on the original document and when the scanned mark including the ID information is recorded on the original document. The electronic file is not created when a scanned mark other than the scanned mark including the ID information assigned to the image processing apparatus is recorded on the original document.
US08902456B2 System to enable use of PDL metadata to drive printing outcomes
The present disclosure is directed toward method for enabling use of PDL metadata to drive printing outcomes. The method includes receiving a selection for a file in a first format. The method further includes parsing the file for metadata and displaying attributes included in the metadata. The method next assigns each attribute to a print-rendering condition. The method then provides the file in a second format.
US08902446B2 Printing system and information processing apparatus
A printing system, in which a printing job based on a same printing target is registered in each of a plurality of printers and one of the plurality of printers performs printing in response to a print instruction of the printing job thereto, the printing system including; a determination unit that determines, when registering the printing job in each of the plurality of printers, a registration destination of the printing job for each of the plurality of printers such that both a printer having the printing job registered in a volatile memory and a printer having the printing job registered in a non-volatile memory exist.
US08902442B2 Image forming system and method in which client apparatuses are notified via print server of event generated in image forming apparatus
An image forming system includes a client apparatus, a print server, and an image forming apparatus, each of which are coupled via a network to one another. The client apparatus provides a job ID together with an IP address of the client apparatus to the print server, and transmits print job data to the image forming apparatus via the print server. The print server registers the job ID and the IP address in a job address table, receives content of an event transmitted from the image forming apparatus, reads an IP address associated with a job ID included in the content of the event from the job address table when the event is a change in job status, and transmits the content of the event to a client having the read IP address.
US08902441B2 Image forming apparatus, network printing system, power save control method, and power save control program, and storage medium
A plurality of image forming apparatuses is connectable to a plurality of host apparatuses via a network. The image forming apparatus includes an apparatus information collection unit to obtain print history and function information as apparatus information of each image forming apparatus; a priority order determination unit to determine a priority order for setting a master image forming apparatus; a master determination unit to determine an image forming apparatus among the currently operating image forming apparatuses; a host information collection unit to collect print history and current print settings as host information of a power-ON host apparatus; a required-printing-capacity computing unit to compute required network printing capacity based on the host information; and a power save control unit to control the power save mode of each image forming apparatus. The power save control unit of the master image forming apparatus controls the power save mode of each image forming apparatus.
US08902438B2 Digital combined apparatus, control method therefor, and digital combined apparatus system
This invention relates to a digital combined apparatus including an operation panel, a reader/writer which writes/reads data on/from a recording medium, and a controller which controls the operations of the operation panel and reader/writer. When the reader/writer reads out ID information of the user from the recording medium on which at least the ID information is recorded, the operation panel displays a user authentication window which prompts the user to input a password for identifying himself or herself.
US08902431B2 Low coherence interferometry with scan error correction
A system includes an interference microscope having one or more optical elements arranged to image a test object to an image plane by combining test light from the test object with reference light from a reference object to form an interference pattern at the image plane, wherein the test and reference light are derived from a common broadband light source. The system includes a scanning stage configured to scan an optical path difference (OPD) between the test and reference light, a multi-element detector positioned at the image plane and configured to record the interference pattern for each of a series of OPD increments and to generate multiple interferometry signals each having a fringe carrier frequency indicative of changes in the OPD as the OPD is scanned, where there is phase diversity among the interferometry signals, and an electronic processor coupled to the multi-element detector and scanning stage and configured to process the interference signals based on the phase diversity to determine information about the OPD increments having sensitivity to perturbations to the OPD increments at frequencies greater than the fringe carrier frequency.
US08902430B2 Measuring apparatus and exposure device
An apparatus includes a system configured to split a light emitted from a light source into reference light and subject light, cause the subject light to enter into an object, and combine the subject light reflected by the object with the reference light, a detection unit configured to detect coherent light between the combined subject and reference lights, an element, provided within a light path of the reference light or the subject light, configured to change a path length difference between the reference light and the subject light and a relative position between the reference light and the subject light in a light receiving surface of the detection unit, and a position-variable mechanism configured to cause a position of the optical element to be changeable, wherein, by changing a position of the element, the optical path length difference and the relative position are independently adjusted.
US08902427B2 System for measuring properties of test samples in fluid
A photometer for measuring photometric magnitudes in a liquid medium includes a housing adapted to be introduced into the medium for on-site measurements; and light-emitting measuring beam transmitter and receiver that are arranged behind opposing measuring windows in a measuring slot in the housing, in which the slot is open to the medium. A measuring beam is generated in a measuring conduit in the measuring slot. A reference conduit is included for a reference measurement which is separate from the measuring conduit. At least one carrier part for the measuring beam transmitter and the measuring beam receiver is provided to move on a given path in the housing. The carrier part is constructed to move on the given path from the measuring conduit to the reference conduit and back, for measuring intensity values of the measuring beam in the measuring conduit and in the reference conduit.
US08902426B2 Control of light-emitting diodes and sensors
A densitometer includes a plurality of light-emitting diodes (LEDs) and at least one sensor. The LEDs are activated one at a time in a sequential, repeatable order. Photonic energy from each LED is reflected off an entity and is incident upon the sensor(s). Circuitry samples or acquires signaling from the sensor(s) in accordance with the respective LED activations. Signaling from the densitometer can be used in controlling ink-jetting printers or other apparatus.
US08902424B2 Method and apparatus for determining concentration using polarized light
An apparatus and method for determining the concentration of chiral molecules in a fluid includes a first polarizer configure to polarize light in substantially a first plane to provide initially polarized light. A second polarizer is capable of polarizing the initially polarized light in a plurality of planes, at least one of the plurality of planes being different from the first plane, to provide subsequently polarized light. One or more receivers are included for measuring an intensity of the subsequently polarized light in one or more of the plurality of planes.
US08902420B2 Sensor chip for biomedical and micro-nano structured substances and method for manufacturing the same
The present invention relates to a sensor chip for biomedical and micro-nano structured substances and a method for manufacturing the same. The sensor chip includes plural metal nanoparticles and a porous anodized aluminum oxide film. The plural metal nanoparticles are completely contained in holes of the porous anodized aluminum oxide film and located at the bottom of the holes, and an aluminum oxide layer covering the second end of the holes has a thickness of 1 nm to 300 nm. When analytes such as biomedical molecules are provided in contact with the sensor chip, a Raman signal can be detected based on the Raman spectroscopy. The structure of the sensor chip of the present invention is uncomplicated and the manufacturing steps thereof are simple, and therefore the sensor chip of the present invention is of great commercial value. Also, a method of manufacturing the above sensor chip is disclosed.
US08902417B2 Inspection apparatus
This invention implements reduction in the amount of background-scattered light from a semiconductor wafer surface and highly sensitive inspection, without increasing the number of detectors. A surface inspection apparatus that detects defects on the surface of an object (semiconductor wafer surface) to be inspected, by irradiating the surface of the object with a beam of light such as laser light and detecting the light reflected or scattered from the surface; wherein a widely apertured lens with an optical Fourier transform function is disposed between the object to be inspected and a detector, a filter variable in position as well in aperture diameter is provided on a Fourier transform plane, and background-scattered light from the semiconductor wafer surface is effectively blocked, whereby only a signal from a defect such as a foreign substance is detected.
US08902415B2 Luminous intensity test device
A luminous intensity test device includes an optical frequency converter, a display, and a processor. The optical frequency converter selectively converts at least a portion of light emitted by a light source into a digital signal. The display displays a color selection interface. The processor processes the digital signal and obtains the luminous intensity. When a tester inputs a color parameter into the color selection interface via an input device, the optical frequency converter converts a kind of light to the digital signal and then the processor processes the digital signal to obtain a luminous intensity and display the luminous intensity on the display.
US08902408B2 Laser tracker used with six degree-of-freedom probe having separable spherical retroreflector
A method for measuring three-dimensional coordinates of a probe center includes: providing a spherically mounted retroreflector; providing a probe assembly; providing an orientation sensor; providing a coordinate measurement device; placing the spherically mounted retroreflector on the probe head; directing the first beam of light from the coordinate measurement device to the spherically mounted retroreflector; measuring the first distance; measuring the first angle of rotation; measuring the second angle of rotation; measuring the three orientational degrees of freedom based at least in part on information provided by the orientation sensor; calculating the three-dimensional coordinates of the probe center based at least in part on the first distance, the first angle of rotation, the second angle of rotation, and the three orientational degrees of freedom; and storing the three-dimensional coordinates of the probe center.
US08902396B2 Method of manufacturing a liquid crystal display panel
A method of manufacturing a liquid crystal display (LCD) panel is provided, and the LCD panel comprises: a first substrate and a second substrate, which are assembled together to form a cell, in which liquid crystal; and spacers formed between the first substrate and the second substrate. The spacers comprise, at least, first-type spacers and second-type spacers, which are formed of different kinds of materials, the material for the first-type spacers has a thermal expansion coefficient lower than that of liquid crystal, the material for the second-type spacers has a thermal expansion coefficient higher than that of liquid crystal, and the first-type spacers and the second-type spacers are disposed in alternation.
US08902391B2 Liquid crystal display device and method of manufacturing liquid crystal display device
According to one embodiment, a device includes a first substrate including a pixel electrode including a contact portion, main pixel electrodes extending from the contact portion in a second direction, and a connection portion which electrically connects the main pixel electrodes, and a switching element including a drain electrode disposed at a middle position in the first direction of the pixel electrode and formed integral with the pixel electrode, a second substrate including main common electrodes extending substantially in parallel to the main pixel electrodes, on both sides of the main pixel electrodes, and sub-common electrodes which extend between the main common electrodes and are located between the pixel electrodes arranged in the second direction, and a liquid crystal layer.
US08902390B2 Liquid crystal display device having a cross-shaped pixel electrode
According to one embodiment, a liquid crystal display device includes a first substrate including a cross-shaped pixel electrode which includes a main pixel electrode and a sub-pixel electrode, and a second substrate including a common electrode which includes main common electrodes and sub-common electrodes. A first horizontal inter-electrode distance between the main pixel electrode and the main common electrode is less than a second horizontal inter-electrode distance between the sub-pixel electrode and the sub-common electrode and is greater than a vertical inter-electrode distance between the main pixel electrode and the main common electrode.
US08902386B2 Liquid crystal display
A liquid crystal display according to an exemplary embodiment of the present invention includes a first substrate, a pixel electrode disposed on the first substrate, a first alignment layer disposed on the first substrate and the pixel electrode, a second substrate facing the first substrate, a common electrode disposed on the second substrate, a second alignment layer disposed on the second substrate and the common electrode, and a liquid crystal layer disposed between the first substrate and the second substrate, in which the common electrode has a first opening having a cross shape, an edge of the first opening protrudes beyond an edge of the pixel electrode, and the pixel electrode includes a second opening disposed adjacently to at least one of the edges of the pixel electrode.
US08902376B2 Backlight module and display device using the same
A backlight module includes a frame, at least one optical film and a flexible fixing-element. The frame includes a bottom plate and a sidewall connected to the bottom plate. The frame has an inner surface and an outer surface. The inner surface has an accommodation fillister. The frame further has a hole disposed between the accommodation fillister and the bottom plate and configured to connect the inner and outer surfaces to each other. The optical film(s) is disposed in the frame and includes a main body and a lug. The lug is inserted in the accommodation fillister and has a first opening. The flexible fixing-element has a first end and a second end. The flexible fixing-element is suitable to pass through the hole and the first opening. The first end of the flexible fixing-element is fixed on the outer surface. A display device adopting the backlight module is also provided.
US08902375B2 LCD device and fixing structure thereof
A liquid crystal display (LCD) device and a fixing structure thereof are disclosed. The LCD device comprises a backlight unit and an LCD panel. The backlight unit is fixed through a first frame disposed at a side edge thereof, and the LCD panel is fixed through a second frame disposed at side edges thereof. The first frame is provided with a snap-fitting groove mechanism, and the second frame is provided with a snap-fitting mechanism for mating with the snap-fitting groove mechanism to fix the LCD panel. Because the second frame is joined with the first frame through snap-fitting in the LCD device and the fixing structure thereof of the present disclosure, it is unnecessary to use screws for fixing purpose. This makes the assembling process simple, efficient and time-saving, so the production efficiency of the LCD device is increased and the production cost is reduced.
US08902374B2 Display device and electronic device including the same
It is an object to decrease the number of transistors connected to a capacitor. In a structure, a capacitor and one transistor are included, one electrode of the capacitor is connected to a wiring, and the other electrode of the capacitor is connected to a gate of the transistor. Since a clock signal is input to the wiring, the clock signal is input to the gate of the transistor through the capacitor. Then, on/off of the transistor is controlled by a signal which synchronizes with the clock signal, so that a period when the transistor is on and a period when the transistor is off are repeated. In this manner, deterioration of the transistor can be suppressed.
US08902368B2 Baseband video data transmission device and reception device, and transceiver system with reduced power consumption by intermittent transmission reception of a video signal
In a transmission device: a controller performs a control of reading, from information regarding video specification, first information indicating whether a reception device is capable of intermittent reception of receiving a video signal at a timing that causes certain number of frames to be intermittent, and, when the reception device can perform intermittent reception, multiplexing, to the video signal during a blanking period of the video signal to be updated, an enable signal indicating the present video signal is to be enabled and second information indicating that transmission of the video signal will not resume unless the video signal is updated; and a transmitter transmits the video signal that is to be updated and then does not resume transmission of the video signal unless the video signal is updated.
US08902367B2 Computer-readable storage medium storing image processing program, image processing device and image processing method
A computer-readable storage medium storing an image processing program that causes a computer to execute a process includes, synthesizing, for each of frames included in a video image and to be processed, a synthesis image with an image of a synthesis target region existing in the frame by repeatedly executing a calculation using a Poisson's equation on the basis of the image of synthesis target region existing in the frame to be processed and the synthesis image to be replaced with the image of the synthesis target region, and thereby calculating, from an initial value image, a synthesis result image corresponding to a result obtained by synthesizing the synthesis image with the synthesis target region so as to sequentially execute a synthesis process on the frames of the video image; and setting, for each of the frames to be processed, initial values by setting, as the initial value image.
US08902364B2 Image display apparatus, image display method, and non-transitory computer-readable storage medium for suppressing motion blur without changing gradation
An image display apparatus which divides the 1-frame period of input image data into a plurality of periods and displays image data in the respective divided periods separates high frequency component data by using the input image data, and distributes the amplitude of the high frequency component data for the image data in the respective divided periods to make the amplitude of the separated high frequency component data fall within a difference between the gradation of the input image data, and 0 gradation or the maximum gradation of an image.
US08902363B2 Clear rectangle processing
High definition media content processing techniques are described in which enhanced media content rendering techniques may be performed to output high definition media content. In an implementation, luma keying may be provided to define clear pixels in a composite output using an optimum set of graphics processing instructions. In another implementation, techniques are described which may provide clear rectangles in a composite output of one or more video streams. Clear rectangles to appear in the composite output are configured by a media playback application. A texture is arrived at to represent a union of each of the clear rectangles and is applied to form the clear rectangles in the composite output. In another implementation, capture techniques are described in which an image to capture is resolved as strips to an intermediate texture and then from the texture to a capture buffer in system memory.
US08902362B2 Broadcast receiving device and method
A prediction means for predicting a maximum delayed change time, which is the longest in a change time which allows a next program to be displayed, if a channel is selected to change the current program to the next program; and a display control means, by which, from a reception completion time when the reception of the current program has been completed, a relevant program is displayed on the basis of original program data remaining in a buffer at the relevant reception completion time, and at the same time, the reproduction speed of the display is based on a speed at which the current program is displayed during the period between the reception completion time and a maximum delayed change time.
US08902356B2 Image sensor module having image sensor package
An image sensor module includes a circuit board, an image sensor package and an optical system. The circuit board has an upper surface and a lower surface, the substrate having a window. The image sensor package includes a mounting substrate and an image sensor chip mounted on the mounting substrate, the image sensor package being adhered to the lower surface of the circuit board such that the image sensor chip is exposed through the window. The optical system is provided on the upper surface of the circuit board to guide light from an object to the image sensor chip.
US08902352B2 Lens barrel mechanical interference prevention measures for camera module voice coil motor design
A camera module has an image sensor and a lens assembly that includes a lens barrel having a first cylindrical portion that includes an externally threaded portion and a second cylindrical portion that has a larger diameter than the externally threaded portion. A lens moving mechanism includes a movable sleeve having internal threads that receive the externally threaded portion of the lens assembly. The lens moving mechanism is coupled to the image sensor such that the second cylindrical portion of the lens assembly is closest to the image sensor. The camera module is assembled by inserting the lens assembly into the lens moving mechanism from the side closest to the image sensor. An installation tool may engage the second cylindrical portion to rotate the lens assembly and engage the threaded portions. Features may be provided to retain the lens assembly in the lens moving mechanism before joining the threaded portions.
US08902351B2 Auto-focus method
An auto-focus method to determine an optimum position of a lens module includes defining search boundaries and an allowable difference, randomly sampling current values within the search boundaries d1, d2 and d3, and obtaining sharpness m1, m2 and m3. A parabola is determined where a vertex of the parabola is used as a next input current value where three larger values of the sharpness are used along with corresponding current values to re-determine a new parabola. Three current values are sampled and a corresponding current value is used to re-determine a new parabola and according to a comparison of the sharpness values, the lens module is driven to auto-focus.
US08902350B2 Interchangeable lens, control method thereof, image pickup apparatus and control method thereof
The interchangeable lens includes a lens controller to control drive speed of a focus actuator moving a focus lens by using speed control data. The image pickup apparatus includes a focus controller to acquire focus information by using an image pickup signal from an image sensor. The lens controller receives, from the focus controller, timing information showing a timing relating to acquisition of the focus information, performs a reachability determination for determining, by using the timing information and the speed control data, whether or not the focus lens is able to reach a target focus information acquisition position by a scheduled focus information acquisition timing and performs, when determining that the focus lens is not able to reach target focus information acquisition position by scheduled focus information acquisition timing, calculation of a predictive focus position at scheduled focus information acquisition timing by using speed control data.
US08902349B2 Image pickup apparatus
An image pickup apparatus, includes a computing section which computes a defocus amount which has been estimated, a calculating section which calculates an accuracy of defocus detection, a setting section which sets a correction value from a result of the calculating section, a correcting section which corrects the correction value obtained from the result of the setting section, to reduce an absolute value of the defocus amount which has been estimated, a lens-drive amount calculating section which calculates a lens-drive amount based on a result from the correcting section, and a control section which, at the time of video photography, carries out focusing successively by using the defocus amount and the lens drive amount obtained from the computing section, the calculating section, the setting section, and the correcting section.
US08902346B2 Systems and methods for controlling scanning mirrors for a display device
Certain embodiments described herein relate to a scanning controller configured produce a horizontal (H) and vertical (V) scanning control signal that is used to control a bi-axial scanning mirror of a scanning laser projector device, a system including such a scanning controller, and a method for generating such an H and V scanning control signal. In an embodiment, the H and V scanning control signal includes H scanning frequency content that is used to control a H scanning frequency of the bi-axial scanning mirror, and V scanning frequency content that is used to control a V scanning frequency of the bi-axial scanning mirror. To avoid cross talk, the scanning controller is configured to produce the H and V scanning control signal such that the H scanning frequency content has a null at DC, and the V scanning frequency content has a null at the H scanning frequency.
US08902344B2 Display control apparatus, image capture apparatus, display control method, and image capture apparatus control method
A display control apparatus displays, together with an image on a display unit, items related to a plurality of objects in the image. At this time, for the plurality of objects in the image, the display control apparatus displays items related to the respective objects at display positions having a predetermined relative positional relationship with the objects. The display control apparatus decides the order of priority of the plurality of objects. In case that the area of a main object having a highest decided priority level and the display position having the predetermined relative positional relationship for an item related to another object overlap each other, the display control apparatus adjusts the display position of the item related to the other object to eliminate the overlapping, and displays the item related to the other object.
US08902339B2 Solid-state imaging element and dispersing element array for improved color imaging
A solid-state image sensor includes a photosensitive cell array and a dispersing element array. Each unit block 40 of the photosensitive cell array includes four photosensitive cells 2a, 2b, 2c and 2d. The dispersing element array makes light, obtained by subtracting a light ray with a first color component (C1) from incoming light (W) and adding a light ray with a second color component (C2) thereto, incident on the first photosensitive cell 2a, also makes light, obtained by subtracting the light ray with the second color component (C2) from the incoming light (W) and adding the light ray with the first color component (C1) thereto, incident on the second photosensitive cell 2b, further makes light, obtained by subtracting a light ray with a third color component (C3) from the incoming light (W) and adding the light rays with the first and second color components (C4=C1+C2) thereto, incident on the third photosensitive cell 2c, and further makes light, obtained by subtracting the light rays with the first and second color components (C4) from the incoming light (W) and adding the light ray with the third color Component (c3)thereto, incident on the fourth photosensitive cell 2d.
US08902325B2 Camera preview via video tag
In one embodiment, a computing device incorporating a camera receives an instruction associated with the camera to display an image generated by the camera in an area within a graphical user interface of an application running on the computing device. The computing device determines a width and a height of the area. The computing device instructs the camera to configure the image, in connection with its generation, for display in the area. And the computing device displays in the area the image as generated and configured by the camera.
US08902324B2 Quad-core image processor for device with image display
A quad-core processor for a hand-held device with a color display, has an image sensor interface for receiving data from an image sensor, four interconnected processing units for color converting the data from the image sensor interface into a color space for the color display and, a color display interface for outputting color converted data to the color display. The four processing units, the image sensor interface and the color display interface are integrated onto a single chip.
US08902322B2 Systems and methods for generating spherical images
An imaging system comprises four image sensors each pointing outwardly from the vertices of a notional tetrahedron with the optical axes of the image sensors substantially collinear with respective medians of the notional tetrahedron, with the focal plane array of each image sensor positioned between the lens system of its respective image sensor and the centroid of the notional tetrahedron. The imaging system and can be used to obtain image data for generating a spherical image of the space surrounding the imaging system. A method for generating a spherical image from this image data assigns spherical coordinates to the pixels in the images according to a cylindrical projection that is individually aligned with the image plane of each image, and blends overlapping pixels and fills blank pixel spaces. The method can be applied to image data representing outward views from the vertices or centroids of faces of any Platonic solid.
US08902320B2 Shared image device synchronization or designation
In certain aspects, designating an attribute of at least one shared image at least partially with a designating shared image device that can be utilized to capture an image with at least one capturing shared image device. In other aspects, synchronizing a capturing shared image device to a sharing session in a manner that at least partially allows conveying between the capturing shared image device with at least another shared image device at least some shared images captured during the sharing session.
US08902318B1 Internal signal diversion with camera shuttering for mobile communication devices
A mobile communications device includes a display, one or more sources comprising at least one microphone and at least one camera, a wireless communications module, a main processor, and a secured processor inaccessible by the main processor. A housing supports components of the device and is configured for hand-held manipulation. A shutter is supported by the housing, and comprises a lens shutter situated within the housing and configured to obscure a lens of the at least one camera when activated. A user actuatable switch is coupled to at least the one or more sources, the main processor, the secured processor, and the shutter. The switch is configured to selectively activate and deactivate the lens shutter. The switch is also configured to divert signals produced by the sources away from the main processor when activated, and couple signals produced by the sources to the main processor when deactivated.
US08902314B2 Transcoding MPEG bittstreams for adding sub-picture content
A DVD transport stream including a video and a sub-picture stream shall be transcoded to a broadcasting transport stream. For this a decoding-encoding-chain merging video and sub-picture into a single video bitstream to conserve the information of the sub-pictures although not in the broadcasting format reserved is provided. By performing a sub-picture macroblock analysis the transcoding can be controlled such that the motion estimation unit of a standard MPEG-2 encoder and/or the entire decoding loop within the encoder can be saved.
US08902312B2 Total-sky lightning event observation system and method
A total-sky lightning event observation system and method may include a photographing device, a housing, a temperature control device, a light shielding device, a control module, a power supply module, a corona current sensor, a data acquisition device, a GPS antenna, a GPS timing module and a processing unit. The photographing device can capture total-sky digital images and transmit the images directly to the processing unit. The processing unit consecutively acquire corona current via the data acquisition device and judges whether there exists thunderstorm activity within the observed range; if there exists thunderstorm activity, the light shielding device is opened so as to enter a lightning observation mode, and the light shielding device is closed after the observation is finished so as to protect the photographing device in non-thunderstorm weather.
US08902308B2 Apparatus and method for generating an overview image of a plurality of images using a reference plane
An apparatus for generating an overview image of a plurality of images comprises a storage unit and an image processor. The storage unit stores a plurality of processed images of the overview image and is able to provide the overview image containing the plurality of processed images at their assigned positions for displaying. The image processor determines feature points of a new image and compares the determined feature points of the new image with feature points of a stored processed image to identify common feature points and to obtain 3-dimensional positions of the common feature points. Further, the image processor determines common feature points located within a predefined maximum distance of relevance to a reference plane based on the 3-dimensional positions of the common feature points to identify relevant common feature points. Further, the image processor processes the new image by assigning the new image to a position in the overview image based on a comparison of an image information of each relevant common feature point of the new image with an image information of each corresponding relevant common feature point of the stored processed image without considering common feature points located beyond the predefined maximum distance of relevance to the reference plane.
US08902304B2 Endoscope system
An endoscope system includes an endoscope including an imaging part and a controller separated from the endoscope and connected to the endoscope through a signal line. The imaging part includes a plurality of light receiving portions two-dimensionally arranged and a driving part that reads a charge signal stored in each of the light receiving portions. The driving part conducts read scan in which read of the charge signals from the light receiving portions in a main and sub scanning direction. The driving part changes an order of outputting the lines in the image data by conducting the read scan on all lines included in the captured image so as to scan some lines successively with a prescribed number of lines interlaced along the sub scanning direction and scan the other lines successively from an interlaced line with the prescribed number of lines interlaced.
US08902301B2 Organic electroluminescence display device, video display system, and video display method
An organic electroluminescence display includes pixels in a matrix that each emits visible light. A data line driver supplies a video signal to each pixel. The video signal includes first and second frames corresponding to first-eye and second-eye image information. A scanning line driver distributes a scanning signal to each pixel for controlling a supply of the video signal. The display includes an emitter in an arrangement position of the pixels in the matrix. The emitter emits infrared light in a same direction as the visible light. The scanning line driver supplies a control signal to the emitter that indicates a switching timing between the first frame and the second frame, and causes the emitter to emit the infrared light based on the control signal for reception by eye glasses for controlling opening and closing of electronic shutters.
US08902297B2 Stereoscopic image display and method for driving the same
A stereoscopic image display and a method for driving the same are disclosed. The stereoscopic image display includes a display panel displaying a two-dimensional (2D) image data in a 2D mode and displaying a three-dimensional (3D) image data in a 3D mode, a gamma reference voltage generating circuit that generates first gamma reference voltages and second gamma reference voltages different from the first gamma reference voltages, outputs the first gamma reference voltages in the 2D mode, and outputs the second gamma reference voltages in the 3D mode, and data driver that converts the 2D image data into the first gamma reference voltages in the 2D mode and converts left eye image data and right eye image data into the second gamma reference voltages in the 3D mode.
US08902296B2 Method of displaying an image in three dimensions and panel thus produced
The invention seeks to make it possible to display an image in three dimensions without additional display means, and to furnish a device that is easy to implement and applicable to drawings and paintings. To that end, a purpose of the invention is a direct display panel of images in three dimensions that comprises a bottom panel (1) and at least one structural panel (2, 3) provided with at least one cut-out defining at least two strips (2a to 2b, 3b, 3d). The strips are attached above the bottom panel (1) by attachment means (5) so that at least a portion of strip (2a to 2g, 3b, 3d) of the structure panel is at a defined distance (d, d1, d2) from the panel (1, 2, 3) on which said strip is attached.
US08902294B2 Image capturing device and image capturing method
Present invention provides an imaging element that includes a first pixel group and a second pixel group, a pickup execution control unit that performs pixel addition by exposing the first pixel group and the second pixel group of the imaging element during the same exposure in a case of pickup in an SN mode and performs pixel addition by exposing the first pixel group and the second pixel group of the imaging element during different exposure times in a case of pickup in a DR mode, a diaphragm that is arranged in a light path through which the light fluxes which are incident to the imaging element pass, and a diaphragm control unit that, in the case of pickup in the DR mode, sets the diaphragm value of the diaphragm to be a value which is greater than that of the case of pickup in the SN mode.
US08902293B2 Imaging device
This 3D image capture device includes a light-transmitting section 2 with m transmitting areas (where m is an integer and m≧2) and a solid-state image sensor 1. The sensor 1 has unit elements, each of which includes n photosensitive cells (where n is an integer and n≧m) and n transmitting filters that face those photosensitive cells. If the wavelength is identified by λ, the transmittances of transmitting areas C1 and C2 are identified by Tc1(λ) and Tc2(λ), the transmittances of two transmitting filters are identified by Td1(λ) and Td2(λ), and the interval of integration is the entire visible radiation wavelength range, ∫Tc1(λ)Td1(λ)dλ>0, ∫Tc1(λ)Td2(λ)dλ>0, ∫Tc2(λ)Td1(λ)dλ>0, ∫Tc2(λ)Td2(λ)dλ>0, and ∫Tc1(λ)Td1(λ)dλ∫Tc2(λ)Td2(λ)dλ≠∫Tc2(λ)Td1(λ)dλ∫Tc1(λ)Td2(λ)dλ are satisfied.
US08902290B2 Portable apparatus and microcomputer
The data processing unit generates image data such that the camera unit is caused to acquire a plurality of data captured with a focal length changed in response to instructions for imaging operation by an operation unit and three-dimensional display data are generated from the plurality of captured data based on the correlation of focused images which are different according to the focal lengths of the acquired plurality of captured data with the focal length thereof. Since each of the plurality of data captured with a focal length changed is different in a focused image according to the focal length, the plurality of captured data is subjected to the processing for generating three-dimensional display data based on the correlation of a focused image different according to the focal length with the focal length to allow the three-dimensional display data to be generated.
US08902279B2 Representative selection for customer service conference
Embodiments of the invention are directed to systems, methods and computer program products for assisting a user to select a customer service representative of a financial institution in preparation for a customer service conference. Embodiments determine that an operative connection is being established between a user device of the user and a system associated with the financial institution, such that the user and the representative of the financial institution may conduct the conference; determine at least one representative from a pool of potential representatives, the at least one representative determined for presentation to the user for user selection; and receive user input selecting one of the at least one representatives for conference connection. Some embodiments establish an operative connection between the user device and a representative system associated with the representative over which the user and the representative can conduct an audio-visual conference.
US08902269B2 Optical scanning apparatus
An optical scanning apparatus includes a light source configured to emit a light beam, a scanning unit configured to deflect the light beam from the light source so as to scan a photosensitive member, an optical lens configured to guide the light beam scanned by the scanning unit onto the photosensitive member, and a lens supporting unit having a fixing portion configured to fix the optical lens, wherein the lens supporting unit includes a movable supporting portion configured to restrict movement of the optical lens in a direction perpendicular to a scanning direction of the light beam and an optical axis direction of the optical lens, to restrict movement of the optical lens in the optical axis direction, and to support the optical lens movably in the scanning direction.
US08902266B2 Image forming apparatus having detector configured to detect information regarding cartridge attached thereto
An image forming apparatus is provided, which includes a displacement member disposed at a cartridge and configured to move from a position where the displacement member receives a driving force from an apparatus main body to a position where the displacement member does not receive the driving force. The apparatus also includes a movable member disposed at the apparatus main body, the movable member moving in response to movement of the displacement member, so as to move a first electrode between a position where the first electrode contacts a second electrode and a position where the first electrode is spaced apart from the second electrode. Also, the apparatus includes a detector detecting information about the cartridge attached to the apparatus main body based on a conduction state between the first electrode and the second electrode.
US08902265B2 Method for controlling display with alternating color pixels
A method of controlling a display includes providing a plurality of pixels, each pixel including only three light-emitting sub-pixels. The plurality of pixels includes a first sub-set of first pixels and a second sub-set of second pixels having locations alternating with the first pixels. Each of the first and second pixels includes a first sub-pixel emitting light of a common first color. The second pixels include a different sub-pixel emitting light of a different color that is not emitted by the first pixels. The light emitted by the sub-pixels of the first pixels defines a full-color gamut and the light emitted by the sub-pixels of the second pixels defines less than a full-color gamut. A controller converts a received image signal to a display signal for controlling the light emitted by the sub-pixels with the display signal.
US08902264B2 Display apparatus and method of driving the same
A display apparatus includes a display panel including n×m array of pixels and which sequentially drives the pixels from pixels in a first row to pixels in an n-th row, a panel driving circuit which sequentially applies first, second, third or fourth image data to the display panel, a backlight unit including a first light source disposed adjacent to the pixels in the first row and a second light source disposed adjacent to the pixels in the n-th row, and a backlight control circuit which divides each of first and second time periods into first, second, third and fourth blinking time periods, and applies a control signal to the backlight unit, where the first time period corresponds to two frames during which the first and second image data are applied, and the second time period corresponds to two frames during which the third and fourth image data are applied.
US08902262B2 Moving image display device and moving image display method
To provide a technology for performing brightness range expansion processing suitable for a scene change when a scene change occurs. If an expansion coefficient output mode determination module 250 detects a scene change, it changes an expansion coefficient output mode from a normal mode to a scene change mode. An expansion coefficient derivation module 200 outputs an first expansion coefficient Gid(n) if the scene change is detected, and outputs a second expansion coefficient G(n) if the scene change is not detected.
US08902260B2 Simplified creation of customized maps
Embodiments of the present invention relate to providing a method for creating customized labeled maps that include displaying a map using a presentation device based on a selectable elevation value, where the map contains geocoded information and the user selects at least one position on the displayed map. The method continues by automatically creating and displaying at least one label located in proximity to the selected position, where at least one label is based on reverse geocoded information associated with the selected position.
US08902258B2 Systems and methods for synchronous zooming
A system for displaying a plurality of plots is provided. The system includes a presentation interface configured to display the plurality of plots, a user input interface configured to create a zoom window on a selected plot of the plurality of plots, and a processing device configured to automatically determine, based on the created zoom window, a corresponding zoom window for each remaining plot of the plurality of plots, and display simultaneously, on the presentation interface, a zoomed-in area of the selected plot based on the created zoom window and a zoomed-in area of each of the remaining plots based on the corresponding zoom window for each of the remaining plots.
US08902257B2 Apparatus and method for producing a thumbnail image including a magnified characteristic region and another deformed region and non-transitory computer-readable medium thereof
An image processing apparatus comprising an input unit which inputs an image, a first region calculating unit which calculates a first region in the image, a second region calculating unit which calculates a second region, which is surrounding the first region in the image and an image deformation unit which magnifies the image included in the first region while deforming an image included in the second region.
US08902256B2 Reproducing apparatus with a function for enlarging image data
A reproducing apparatus includes: a reproducing portion for reproducing, from a recording medium, moving image data including plural frames whose information amount has been compressed by intraframe encoding; a memory for storing the moving image data reproduced by the reproducing portion; a decoding portion for reading out the frames of the moving image data stored in the memory and decoding the read-out data, the decoding portion reading out the moving image data in succession starting from an upper end of a screen for each frame to decode the read-out moving image data; an instruction portion for instructing enlargement of the moving image data; an enlarging area setting portion for setting, for each frame of the moving image data, a partial area on which enlarging processing is to be performed; a control portion for controlling the decoding portion in accordance with the enlarging instruction, the control portion stopping reading out the one frame of moving image data from the memory, which is performed by the decoding portion, in case that moving image data of the partial area in the one frame of the moving image data is decoded; and an output portion for modifying, in accordance with the number of pixels of the display device, the moving image data of the partial area decoded, and outputting the modified image data to the display device.
US08902254B1 Portable augmented reality
The different advantageous embodiments provide a system comprising a processor unit, a sensor system, and a user interface. The processor unit is configured to execute a data manipulation process. The sensor system is configured to retrieve physical data about a number of physical objects. The user interface has data manipulation controls for the data manipulation process.
US08902253B2 Constrained display navigation
Navigating on a display includes tracking motion of an input tool on a display, comparing a motion of the input tool to a threshold, and changing a position of the visible portion of a page of information on the display if the input tool motion exceeds the threshold. The position of the visible portion of the page of information on the display is constrained if the motion does not exceed the threshold.
US08902251B2 Methods, apparatus and systems for generating limited access files for searchable electronic records of underground facility locate and/or marking operations
Managing information relating to a locate and/or marking operation to detect and/or mark a presence or an absence of at least one underground facility. At least one electronic manifest corresponding to the locate and/or marking operation is generated based on first information relating to the locate and/or marking operation. The at least one electronic manifest includes image information documenting performance of the locate and/or the marking operation. At least one limited access file comprising second information relating to the at least one electronic manifest or the image information is generated, and the at least one limited access file and/or information relating to the at least one limited access file is electronically transmitted and/or stored to facilitate selective/limited access to or viewing of the electronic manifest(s).
US08902248B1 Method and system for measuring display performance of a remote application
This disclosure describes a performance-monitoring system that computes a display performance metric of a remote application. During operation, the system performs a sequence of input events, and receives information which updates a graphical user interface (GUI). The GUI displays a sequence of frames rendered by a remote application in response to the input events. The system then samples colors at a number of pivot points on the GUI, and matches the a respective frame to a previously performed input event based on the sampled colors. The system subsequently computes a display performance metric for the remote application based on the frames and the corresponding input events.
US08902246B2 Color correction for wide gamut systems
At least certain embodiments of the disclosures relate to methods for performing color correction on systems having at least application that is not color managed. In one embodiment, a method to perform color correction on a system includes determining a threshold gamut. Then, the system determines whether a real gamut exceeds the threshold gamut. The system color corrects input color if the real gamut exceeds the threshold gamut. Color correcting may include adjusting input color in the system. In another embodiment, a system includes memory to store color data for at least one non-color managed application and to store color data for at least one color managed application. The system includes a display device to display the color data. The system includes one or more graphics processing unit that are configured to execute instructions to color correct input color when a real gamut value exceeds a threshold gamut value.
US08902244B2 System and method for providing enhanced graphics in a video environment
A method is provided in one example and includes receiving a video input from a video source coupled to a display configured for rendering a user interface thereon; evaluating a plurality of pixels within the video input; and determining if a particular pixel within the pixels is associated with a color that matches a designated value associated with a chroma-key. If a match is found for the particular pixel, then the particular pixel is rendered as a clear image on the display, and if the match is not found, the particular pixel is darkened by a certain percentage.
US08902242B2 Method and system for identifying drawing primitives for selective transmission to a remote display
Remote desktop servers include a display encoder that maintains a secondary framebuffer that contains display data to be encoded and transmitted to a remote client display and a list of display primitives effectuating updated display data in the secondary framebuffer. The display encoder submits requests to receive the list of drawing primitives to a video adapter driver that receives and tracks drawing primitives that, when executed, update a primary framebuffer.
US08902239B2 Video-processing chip, audio-video system and related method capable of saving power
A video-processing chip capable of saving power is disclosed. The video-processing chip includes a microprocessor, a scalar, a first memory, and a second memory. The microprocessor is used for executing program codes. The scalar is used for adjusting a size of a received image. The first memory is coupled to the microprocessor and to the scalar for providing memory space to the scalar for image processing. The second memory is coupled to the microprocessor for storing the program codes of the microprocessor for controlling a power switch. Wherein a size of the first memory is greater than a size of the second memory.
US08902237B2 Image generating apparatus and image generating method
Disclosed are an image generating apparatus and an image generating method with which the size of a storage region required to display animated images can be suppressed. In the image generating apparatus (1), processing blocks (12, 16, 17) configuring an image generation unit obtain object data segment (130p) and a display operation pattern to be applied to the object data segment (130p) from data storage units (13, 14), in accordance with a specified picture-plane configuration information item (150i) , and generate animated images of the object data segment (130p) in accordance with the object data segment (130p) and the display operation pattern.
US08902233B1 Driving systems extension
Techniques that give animators the direct control they are accustomed to with key frame animation, while providing for path-based motion. A key frame animation-based interface is used to achieve path-based motion with rotation animation variable value correction using additional animation variables for smoothing. The value of the additional animation variables for smoothing can be directly controlled using a tangent handle in a user interface.
US08902227B2 Selective interactive mapping of real-world objects to create interactive virtual-world objects
A method for interactively defining a virtual-world space based on real-world objects in a real-world space is disclosed. In one operation, one or more real-world objects in the real-world space is captured to define the virtual-world space. In another operation, one of the real-world objects is identified, the identified object is to be characterized into a virtual-world object. In yet another operation, a user is prompted for user identification of one or more object locations to enable extraction of parameters for real-world object, and the object locations are identified relative to an identifiable reference plane in the real-world space. In another operation, the extracted parameters of the real-world object may be stored in memory. The virtual-world object can then be generated in the virtual world space from the stored extracted parameters of the real-world object.
US08902226B2 Method for using drive-by image data to generate a valuation report of a selected real estate property
Video drive-by data provides a street level view of a neighborhood surrounding a selected geographic location. A video and data server farm incorporates a video storage server that stores video image files containing video drive-by data corresponding to a geographic location, a database server that processes a data query received from a user over the Internet corresponding to a geographic location of interest, and an image processing server. In operation, the database server identifies video image files stored in the video storage server that correspond to the geographic location of interest contained in the data query and transfers the video image files over a pre-processing network to the image processing server. The image processing server converts the video drive-by data to post-processed video data corresponding to a desired image format and transfers the post-processed video data via a post-processing network to the Internet in response to the query.
US08902225B2 Method and apparatus for user interface communication with an image manipulator
A system, and method for use thereof, for image manipulation. The system may generate an original image in a three dimensional coordinate system. A sensing system may sense a user interaction with the image. The sensed user interaction may be correlated with the three dimensional coordinate system. The correlated user interaction may be used to project an updated image, where the updated image may be a distorted version of the original image. The image distortion may be in the form of a twisting, bending, cutting, displacement, or squeezing. The system may be used for interconnecting or communicating between two or more components connected to an interconnection medium (e.g., a bus) within a single computer or digital data processing system.
US08902223B2 Device and method for displaying a three-dimensional image
The invention relates to a device for displaying a three-dimensional image, comprising: a display unit for alternately displaying a left image and a right image on an entire screen; a polarizing unit disposed on a front surface of the display unit, for changing a polarizing direction of incident light by a horizontal line unit; and a polarizing control unit for controlling the polarizing direction of a horizontal line of the polarizing unit to be synchronized with a refresh time of the horizontal line of the display unit corresponding to the horizontal line and changed. Accordingly, by changing the polarizing direction between a left image and a right image in synchronization with screen-refreshing, crosstalk can be minimized when displaying a three-dimensional image and a user satisfaction with three-dimensional images can be increased.
US08902221B2 Prospect assessment and play chance mapping tools
Prospect assessment and play chance mapping tools are provided. For assessing potential resources, example systems provide dynamically linked chance maps, transformed in real time from geological properties. Input geological maps or other data are dynamically linked to resulting chance maps, so that changes in the input maps automatically update the chance map in real time. Users can generate a custom risk matrix dynamically linking geological maps with chance maps via interface tools, dropping maps directly into the matrix. A transform may programmatically convert the geologic domain to the chance domain. The user can navigate input maps, select areas of interest, and drag-and-drop geologic properties into an uncertainty engine and distribution builder for uncertainty assessment based on geologic reality. A merge tool can programmatically unify multiple geological interpretations of a prospect. The merge tool outputs a single chance of success value for multiple geologic property values at each grid node.
US08902220B2 System architecture for virtual rendering of a print production piece
A system and method for a pre-print, three-dimensional virtual rendering of a print piece is disclosed. A plurality of modular/pipelined architectural layers are managed, operated, and organized by a controller. A product definition is provided to a job ticket adaptation layer where it is transformed into a physical model. The physical model is then transformed into a display model via the product model layer. The display model is transformed into a scene that can be displayed on a graphical user interface as a three dimensional virtual rendering by a rendering layer, where the binding elements may further include 3D binding models as well as 2D textures on 3D surfaces to simulate 3D models.
US08902215B2 Method and mobile terminal for adjusting focus of a projected image
A method and mobile terminal are provided for focus adjustment. The mobile terminal includes a projector module for projecting an image onto an external screen. The mobile terminal also includes a motion detection sensor for detecting motion of the mobile terminal. The mobile terminal further includes a controller for determining whether the motion detected by the motion detection sensor corresponds to activation of a focus adjustment mode of the mobile terminal, displaying a focus adjustment image, and performing focus adjustment of the projector module according to focus adjustment input provided in the focus adjustment mode.
US08902209B2 Display device
A three-dimensional-image display device capable of displaying an image with high brightness while suppressing power consumption is provided. The display device is provided with an image display portion where a plurality of pixels is provided in a pixel portion, a light-shielding portion including a first shutter and a second shutter, and a control portion for controlling the transmittances of the first shutter and the second shutter in synchronization with display of an image for the right eye or an image for the left eye in the pixel portion. The pixel includes a switching transistor for controlling an input of an image signal to the pixel, a light emitting element, a driving transistor for controlling the value of a current supplied to the light emitting element in accordance with the image signal, and a current controlling transistor for controlling whether or not the current is supplied to the light emitting element.
US08902207B2 Organic light emitting display with brightness control and method of driving the same
An organic light emitting display includes a mode determining unit adapted to determine whether the display is in a low power or common driving mode based on an operation control signal and to generate a control signal corresponding to the determined mode, a scan driver adapted to sequentially supply scan signals to scan lines, a data driver adapted to supply data signals to data lines in synchronization with the scan signals, pixels arranged at intersections of the scan lines and the data lines, and a timing controller adapted to control the scan driver and the data driver so that a frame frequency changes based on whether the low power driving mode or the common driving mode control signal is supplied from the mode determining unit, wherein the scan driver is adapted to uniformly maintain a pulse width of the scan signals regardless of a change in the frame frequency.
US08902204B2 Bounding box based control method for electronic paper devices
A system for updating an electrophoretic display of an electronic paper device (EPD) has a display driving system comprising a display manager, a compositor, a bounding box list producer, a display controller and a memory storing a bounding box list, a transfer matrix buffer, waveforms and subframes. The display driving system receives one or more display requests from one or more input devices and applications. The display driving system transforms the display requests into bounding boxes and transition matrices of pixel values. The display driving system collapses overlapping bounding boxes into non-overlapping bounding boxes. The display driving system generates subframes using the bounding boxes, the transition matrices and waveforms containing voltage information. The subframes are used to drive the electrophoretic display to display an image.
US08902202B2 Method and apparatus for sensing an input object relative to a sensing region of an ultrasound sensor device
A subsystem, system and method for sensing an input object relative to a sensing region of an ultrasound sensor device are disclosed herein. In one embodiment, a subsystem for sensing an input object relative to a sensing region of an ultrasound sensor device includes a circuit, a switch coupled to an output of the circuit, and an integrating capacitor coupled to the output of the circuit. The circuit has an input for receiving a resulting signal comprising positive and negative polarities, the resulting signal having effects indicative of the input object relative to the sensing region. The integrating capacitor is also coupled to a substantially constant voltage source and to the switch. The circuit is operable to output a rectified signal to the first integrating capacitor indicative of the input object relative to a sensing region.
US08902201B2 Assembling infrared touch control module
An assembling infrared touch control module includes four L-shaped first frame members and a plurality of straight second frame members matched in pairs. Each first and second frame member has a space therein and two openings at two ends thereof, respectively, in communication with the space. Each space has a circuit board therein. Each circuit board has a plurality of infrared transmitter/receiver components thereon and two connectors thereon at the two openings, respectively. The four first frame members and the second frame members, whose number may be increased or decreased by demand, are assembled together to form a frame by the connectors, so that an active touch area of the frame may be resized by demand to be adapted to a display device of any size, and an additional touch control function adapted to an extended area for the display device may be set.
US08902200B2 Touch panel system and electronic device
A touch panel system includes a touch panel having sense lines, and drive lines which intersect the sense lines and form capacitance with the sense lines, a touch panel controller for processing signals of the sense lines, and a drive line driving circuit for driving the drive lines in parallel. The touch panel controller includes a subtracting section for finding differences in signals between the sense lines adjacent to each other, a decoding section for calculating a distribution of differences between the capacitances by calculating an inner product of code sequences for driving the drive lines in parallel and difference output sequences which correspond to the code sequences, a touch detecting section for obtaining touch information based on the distribution of differences between the capacitances calculated by the decoding section, and a region setting section for setting an effective region in the touch panel based on the touch information.
US08902199B2 Infrared touch screen device capable of multi-touch points sensing
An infrared touch screen device capable of smoothly sensing contact positions of a plurality of touch points and sensing multi-touch points, when a plurality of touch points are produced, are provided. The infrared touch screen comprises a screen provided with a display panel on which an image is projected and a reinforced glass plate formed on a front surface of the display panel, an reinforced glass plate formed on a front surface of the screen to protect the screen and on which a touch is made, an optical scanner formed on one side of the screen and scanning the screen with the infrared, a light guide bar formed on a border of the reinforced glass plate, a light receiving portion provided on a distal end of the light guide bar, and a position detector for detecting the touch position with a scanning angle of the optical scanner.
US08902194B2 Electronic apparatus, display control method, and program
An electronic apparatus includes: an input/output unit that displays operation markers, used for performing an operation input, on a display surface and detects an object in proximity to or brought into contact with the display surface; a selection mode determining unit that determines, based on a detection state of the object on the display surface, either a multiple selection mode in which selection targets are set to be plural operation markers or a single selection mode in which the selection target is set to be one operation marker, as a selection mode; a selection unit that selects one or plural operation markers among the operation markers based on the selection mode and the detection state; and a display control unit that changes display forms of the operation markers selected among the operation markers into a display form indicating a selected state and displays the selected operation markers on the display surface.
US08902190B2 Touch panel
In a touch panel, a rectangular resistive film is formed on a substrate and electrodes are provided along the four sides of the resistive film. Each electrode includes a plurality of gaps and a plurality of divided electrodes. The divided electrodes are linearly arranged along the corresponding side of the resistive film, and the electrode, in which the divided electrodes at both ends are connected to terminals, respectively, is formed by arranging the divided electrodes of the same shape and repeating this same shape.
US08902188B2 Digitizer
Disclosed herein is a digitizer, including: an input unit in which a magnet is embedded; a driving coil in which source supplies to induce a line of magnetic force; a sensing coil in which voltage or current is induced by the line of magnetic force; and a controlling unit supplying the source to the driving coil and measuring the voltage or the current induced in the sensing coil, wherein the controlling unit senses a change amount in the voltage or the current induced in the sensing coil to calculate a coordinate, when the voltage or the current induced in the sensing coil is changed by the magnet.
US08902187B2 Touch input method and apparatus of portable terminal
A touch input method of a portable terminal which enables touch input to an entire region of a touch screen using a partial region of the touch screen in a state where a hand gripping of the portable terminal cannot touch all regions of the touch screen, and an apparatus thereof, are provided. The touch input method includes detecting touch input on one of divided touch regions of a touch screen, detecting a tilted state of the portable terminal when the touch input is detected, determining one of divided touch regions as a touch reflection region in which a touch event generated from a region in which the touch input is detected is reflected according to the detected tilted state of the portable terminal, and processing the touch event generated from the region in which the touch input is detected as the touch event reflected in the touch reflection region.
US08902184B2 Electronic device and method of controlling a display
A method comprises detecting, by a portable electronic device having a display, a gesture, selecting a category of selectable items based on the gesture. The method further comprises identifying one or more selectable items within the selected category to be displayed, and displaying the one or more selectable items.
US08902183B2 Display devices and methods for detecting user-intended touch input
Display devices and methods for detecting user-intended touch input are provided. An example display device includes a touch-sensitive display. Further, the display device includes an impact sensor attached to the touch-sensitive display and configured to generate a signal representative of an impact of the touch-sensitive display. The display device also includes a computing device configured to receive the signal. The computing device is also configured to detect a peak of the signal. Further, the computing device is configured to determine whether a rising edge of a magnitude of the peak detected signal meet predetermined criteria. The computing device is also configured to indicate detection of user-intended touch in response to determining that the predetermined criteria are met.
US08902181B2 Multi-touch-movement gestures for tablet computing devices
Functionality is described herein for detecting and responding to gestures performed by a user using a computing device, such as, but not limited to, a tablet computing device. In one implementation, the functionality operates by receiving touch input information in response to the user touching the computing device, and movement input information in response to the user moving the computing device. The functionality then determines whether the input information indicates that a user has performed or is performing a multi-touch-movement (MTM) gesture. The functionality can then perform any behavior in response to determining that the user has performed an MTM gesture, such as by modifying a view or invoking a function, etc.
US08902178B2 Touch panel and mobile terminal including the same
A touch panel and mobile terminal including the same are disclosed. The present invention reduces a width of an inactive area of the touch panel, implements a large-scale touchscreen despite maintaining the same width of an inactive area, increments the number of touch channels despite maintaining the same width of an inactive area, and detects a touched position in a manner of subdividing the touched position despite maintaining the same width of an inactive area.
US08902176B2 Haptic feedback apparatus
A haptic feedback screen device include a case, a screen assembled in the case and having a baffling section extending perpendicular from a surface thereof, a piezoelectric vibrator located in the case with two ends thereof fixed to the case being capable of vibrating parallel to the screen. The piezoelectric vibrator defines a projecting element opposed to the baffling section of the screen for being capable of abutting against the baffling section.
US08902174B1 Resolving multiple presences over a touch sensor array
An apparatus for and method of resolving multiple presences over a touch sensor are described. The method includes logically grouping data from a touch sensor array in order to convert the data into X-Y coordinates.
US08902173B2 Pointing device using capacitance sensor
Apparatuses and methods for determining a deflection of a moveable conductive plate that is moved over a capacitive sensing device. The method may include moving the moveable conductive plate over sensor elements of the capacitive sensing device, and determining the deflection of the moveable conductive plate. In determining the deflection, a deflection magnitude and a deflection direction may be determined by calculating a vector of x- and y-directions or a vector of a radius and an angle.
US08902172B2 Preventing unintentional activation of a touch-sensor button caused by a presence of conductive liquid on the touch-sensor button
An apparatus and method for preventing unintentional activation of the one or more touch-sensor buttons caused by a presence of conductive liquid on the touch panel. The apparatus may include a processing device to prevent unintentional activations of one or more touch-sensor buttons caused by a presence of conductive liquid on the one or more touch-sensor buttons.
US08902171B2 Housing configuration for orientating a surface feature on a mobile device
A handheld computer has a housing with a front face and a back face. A length of the front face and a length of the back face each extend primarily in a first direction corresponding to a length of the housing. A width of the front face and a width of the back face each extend primarily in a second direction corresponding to a width of the housing. A first surface extends between the front face and the back face. The first surface is acutely angled with respect to at least one of the front face and the back face. A component is disposed at least partially on the front surface. The component is operationally affected by a direction in which the component is oriented.
US08902170B2 Method and system for rendering diacritic characters
A method and system for enabling input of diacritic characters on a handheld electronic device. The method includes detecting an input associated with a selected key and determining a likelihood that the input reflects selection of a diacritic character. The time after which the set of possible diacritic characters that are utilized is rendered in response to a selected key being engaged in a press-and-hold operation is based on the determined likelihood.
US08902168B2 Pocket data input board
The invention is a thin, light, touch sensitive, typically portable keyboard for an electronic device, which uses walls between most adjacent keys to prevent one finger activating more than intended key. This enables packing keys extremely close to each other, yet negligible chance of false activation. Round, hexagonal or wave shaped walls enable more keys for same working surface area, compared to square keys. Variations are detachable, externals, removable walls formed by a layer over the keyboard. Sizes can be from wrist worn watch like, credit card, cell phone, pocket and more. Foldable versions enable more keys for less stowage space.
US08902166B2 Information processing apparatus and cellular phone terminal
An information processing apparatus including a display unit displaying information on a display screen, an operation unit including a text input key, and a control unit. The control unit displays text in response to input from the operation unit in a state of displaying an initial screen on the display screen, shows an application using text to a user for selection, starts up the application in accordance with the user's selection, and executes the application, using the text inputted from the operation unit.
US08902164B2 Optical finger mouse, mouse control module and physiology detection method thereof
There is provided a mouse control module including two light sources, an image sensor, a processing unit and a communication unit. The two light sources emit light of different wavelengths to illuminate a finger surface. The image sensor receives reflected light from the finger surface to generate a plurality of image frames. The processing unit detects a displacement of the finger surface and a physiological characteristic of a user according to the plurality of image frames. The communication unit encodes and/or sequences the displacement and the physiological characteristic so as to generate finger and physiology information. There is further provided an optical finger mouse.
US08902158B2 Multi-user interaction with handheld projectors
A device-mounted infrared (IR) camera and a hybrid visible/IR light projector may be used to project visible animation sequences along with invisible (to the naked eye) tracking signals, (e.g. a near IR fiducial marker). A software (or firmware) platform (either on the handheld device or to which the device communicates) may track multiple, independent projected images in relation to one another using the tracking signals when projected in the near-IR spectrum. The resulting system allows a broad range of new interaction scenarios for multiple handheld projectors being used in any environment with adequate lighting conditions without requiring the environment to be instrumented in any way.
US08902152B2 Dual sided electrophoretic display
A dual-sided electrophoretic display (700) having a first region (701) and a second region (702) is provided. Each of the first region (701) and the second region (702) includes selectively operable members (703,704) that function as pixels for presenting images on the electrophoretic display (700). Each of the selectively operable members (703,704) is driven by a driver circuit (710) by way of corresponding thin film transistors and capacitors (742,742), which are opaque. As the selectively operable members (704) of the second region (702) are bigger than are the selectively operable members (703) of the first region (701), the aperture ratio of the selectively operable members (704) of the second region (702) is greater than in the first region (701) when viewed from the rear side (730). Thus, a contrast ratio of the second region (602), when viewed from the rear side (730) is sufficiently high that text, icons, and characters presented in the second region (602) are legibly visible on the rear side (730).
US08902149B2 Methods and systems for power control event responsive display devices
Aspects of the present invention relate to methods and systems for controlling power consumption with a power controlling display device. Some aspects relate to a power controlling display device that receives a notification of a power control event that may control internal display components as well as connected power consuming devices. Some aspects relate to methods and systems for automatically compensating a displayed image when display backlight levels are modified in response to a power control event.
US08902148B2 Backlight driver receiving serially provided optical data via a serial bus and liquid crystal display including the same
A backlight driver and a liquid crystal display (LCD) including the same, in which the backlight driver includes an interface unit enabled in response to a first carry signal, receiving serially provided optical data, and outputting a second carry signal; and a plurality of control units controlling one or more light-emitting devices in response to the serially provided optical data.
US08902147B2 Gate signal line driving circuit and display device
A gate signal line driving circuit and a display device which can suppress the degradation of an element attributed to the use of the element for a long time, and can realize the prolongation of lifetime of the element are provided. With respect to elements to which a HIGH voltage is applied for a long time, a plurality of elements are connected in parallel, and at least some of the plurality of elements are driven by switching elements.
US08902146B2 Array substrate and display panel having the same
An array substrate of an LCD having: a gate line formed along a first direction; a data line formed along a second direction crossing the first direction; first and second pixel electrodes spaced apart from each other; a thin-film transistor includes a gate electrode connected to the gate line; a source electrode connected to the data line and partially overlapping the second pixel electrode; and a drain electrode connected to the first pixel electrode spaced apart from the second pixel electrode along the second direction. The source electrode or the gate electrode overlaps the second pixel electrode but the drain electrode does not overlap the second pixel electrode. Electrical coupling between the first and second pixel electrodes are avoided with such configuration.
US08902144B2 Display device and electronic device including the same
It is an object to decrease the number of transistors connected to a capacitor. In a structure, a capacitor and one transistor are included, one electrode of the capacitor is connected to a wiring, and the other electrode of the capacitor is connected to a gate of the transistor. Since a clock signal is input to the wiring, the clock signal is input to the gate of the transistor through the capacitor. Then, on/off of the transistor is controlled by a signal which synchronizes with the clock signal, so that a period when the transistor is on and a period when the transistor is off are repeated. In this manner, deterioration of the transistor can be suppressed.
US08902143B2 Liquid crystal display for driving a pixel with a black state and a white state within one frame period, method of driving the same and electronic unit including the same
A liquid crystal display includes: a display section including a plurality of pixels and displaying an image through varying a gray scale of each of the pixels based on an image signal; a detection section detecting, based on the image signal, variations in gray scales of a first pixel and a second pixel which are adjacent to each other; and a control section performing control, based on a detection result of the detection section, to allow one of the first and second pixels to be maintained in black state of display for a predetermined period.
US08902139B2 LED display device with automatic brightness adjustment
A display device includes a housing, a screen mounted on the housing, an imagine capture unit, a distance measuring unit, and a display module assembly received in housing. The display module assembly includes a light emitting unit, a micro reflection unit, and a micro control unit; the micro control unit includes an identify module and a reflection control module. The identify module is electrically connected to the imagine capture unit and the distance measuring unit for receiving images of a viewer to identify position of eyes of viewer and sending instruction to measure distances between eyes of viewer and the display device to the distance measuring unit; the reflection control module is electrically connected to one of the light emitting unit and the micro control unit to control the micro reflection unit to rotate relative to the light emitting unit, to reflect light into eyes of the viewer.
US08902138B2 Organic light emitting diode display device and method of driving the same
An organic light emitting diode display device may include a first transistor connected between a data line and a first node; a second transistor connected between the first node and a second node; a third transistor connected between a reference voltage line and a third node; a fourth transistor connected between a initialization voltage terminal and the second node; a driving transistor having a source electrode connected to the second node, a gate electrode connected to the third node, and a drain electrode connected to a high electric potential voltage terminal; a first capacitor connected between the first node and the drain or source electrode of the driving transistor; a second capacitor connected between the first node and the third node; and a light emitting diode connected to a low electric potential voltage terminal and to the second node.
US08902135B2 Pixel structure of organic electroluminescence device
A pixel structure of an organic electroluminescence device includes a scan line, and a data line, a bias line and a readout line on a substrate, a first switch device, a capacitor, a driving device, an organic light emitting device, a second switch device and a photo sensor device. The first switch device is electrically connected to the scan line and the data line. The capacitor is electrically connected to the first switch device and the bias line. The driving device is electrically connected to the first switch device, the capacitor and the bias line. The organic light emitting device is electrically connected to the driving device. The second switch device is electrically connected to the scan line and the readout line. The photo sensor device is electrically connected to the second switch device and the bias line.
US08902134B2 Pixel circuit, display and driving method thereof
The invention provides a pixel circuit that can cancel the influence of the mobility of a drive transistor. A drive transistor supplies a light-emitting element with an output current dependent upon an input voltage. The light-emitting element emits light with a luminance dependent upon a video signal in response to the output current supplied from the drive transistor. The pixel circuit includes a correction unit that corrects the input voltage held by a capacitive part in order to cancel the dependence of the output current on the carrier mobility.
US08902133B2 Surface-emission display device having pixels with reduced wiring resistance
A flat panel display device includes a circuit board (110) that has formed thereon a plurality of power source lines (210) arranged in parallel, a power source bus (220) to which the plurality of power source lines (210) are connected, and a plurality of pixel circuits (240) each having an inner line path (66) connected to one of the power source lines (210). The display device also includes a plurality of light-emitting elements, each driven by a transistor provided in a corresponding one of pixel circuits (240). The inner line path (66) of each pixel circuit (240) provides a bypass path with respect to the power source line (210) connected thereto and part of the wiring for the transistor of the pixel circuit (240).
US08902131B2 Configurable liquid crystal display driver system
Embodiments of the invention relate to a configurable LCD driver system having a plurality of configurable LCD drivers. Each LCD driver may be configured as a common or segment driver by selecting a drive voltage from an appropriate set of drive voltages associated with a common or segment driver in accordance with certain parameters, such as whether a user may configure the LCD driver as a common driver or segment driver, a multiplex ratio, and/or bias ratio of an LCD panel. The drive time and drive strength associated with the LCD driver may also be configurable. The selected drive voltage may be provided to a drive buffer to output an LCD drive voltage waveform for driving one or more segments or pixels in an LCD panel. A memory may store appropriate display data for both the segment and common drivers to control the output drive capability of the LCD driver.
US08902128B2 Tiled display system and improvement therein
An imaging system and improvement therein for edge blending a composite image displayed by a plurality of configurable display devices in a tiled display system or between display devices and the surrounding environment, by at least one of modifying one or more light emission characteristics in a region of the composite image adjacent the gaps or generating a pattern within the composite image that coincides with the spacing of the gaps, such that the visual seam becomes camouflaged when viewed from a distance. The light emission characteristics can, for example, include brightness and/or color and the pattern can, for example, be a grid pattern that coincides with the spacing of the gaps.
US08902127B2 Method for power sharing and controlling the status of a display wall
Described is a method for power sharing of a display wall, in particular of a LED display wall having a plurality of display modules, and a plurality of N power supply units, each for driving a number of display modules, whereby during a failure of a first power supply unit of the plurality of N power supply units, the outputs of other power supply units are linked together such that the module or modules driven by the first and failed power supply continue(s) to operate, by redistribution of power from the other power supply units. Power sharing is also described in the context of a method for controlling the status of a display wall, in particular of a LED display wall, controlled by a central unit. The method includes collecting status and/or diagnostic information of the display wall inputted to the central unit; converting the status and/or diagnostic information to a picture; and displaying the picture on the display wall.
US08902122B2 Electronic device employing multifunction antenna assembly
An electronic device defines a receiving groove for an antenna, a first opening, and a second opening. The first opening and the second opening are at two opposite ends of the receiving groove, and allow an antenna assembly to be extended or retracted in the receiving groove to allow the electronic device to receive different types of wireless signals.
US08902120B2 Antenna system and method
A radiator coupled to an antenna patch disposed along a first end of the radiator, said patch disposed on an insulator. A ground plane is connected to the insulator and a radome is disposed opposite a second end of the radiator. The radome may have a region presenting a convex surface towards the radiator, and the radome has a second region presenting a concave surface towards the radiator. The first end of the conical radiator is the apex of the cone. A ground plane is included and a portion of the ground plane is a planar surface and another portion extends away from the planar portion towards the radome. Also disclosed is a method for forming a radiation pattern by shaping the radome to effectuate a predetermined radiation pattern using localized convex and concave surfaces positioned on the radome at different points in relation to the conical radiator.
US08902115B1 Resonant dielectric metamaterials
A resonant dielectric metamaterial comprises a first and a second set of dielectric scattering particles (e.g., spheres) having different permittivities arranged in a cubic array. The array can be an ordered or randomized array of particles. The resonant dielectric metamaterials are low-loss 3D isotropic materials with negative permittivity and permeability. Such isotropic double negative materials offer polarization and direction independent electromagnetic wave propagation.
US08902111B2 Calculating antenna performance
A system and method for detecting the performance of a bi-polarized antenna including two antennas in a wireless communication system is provided. The system may include at least one directional coupler connected to the bi-polarized antenna configured to couple a transmitting signal of the first antenna and another signal from the bi-polarized antenna; a power detector connected to the at least one directional coupler and configured to measure the power of the transmitting signal and the another signal as analog results, respectively; an analog-digital converter connected to the power detector and configured to convert the analog results into digital results; and a processing unit connected to the analog-digital converter and configured to calculate the difference of the digital results. The performance of the bi-polarized antenna can be accessed by the above-measured polarization isolation.
US08902110B2 All-metal casing structure and antenna structure
An all-metal casing structure includes a casing unit, a first substrate unit, a second substrate unit, an antenna unit and a conductive unit. The casing unit includes at least one metal casing having at least one through opening. The first substrate unit includes at least one first substrate body disposed in the metal casing and neighboring to the through opening. The second substrate unit includes at least one second substrate body disposed in the metal casing and neighboring to the first substrate body. The antenna unit includes at least one antenna module disposed on the first substrate body and corresponding to the through opening, and the antenna module is electrically connected to the second substrate body. The conductive unit includes at least two conductive elements separated from each other by a predetermined distance and electrically connected between the metal casing and the first substrate body.
US08902109B2 Communication device
A communication device includes a assembly and an antenna structure formed on the assembly. The antenna structure has a feeding antenna and a stub antenna spaced apart from the feeding antenna. The feeding antenna has a feeding portion. The stub antenna is suitable for being excited and coupled by the feeding antenna, resonating at a resonance frequency of the feeding antenna, and causing the antenna structure to form two hotspots in an operated frequency band. The shortest distance between the feeding antenna and the stub antenna is defined as a coupling distance. The coupling distance is larger than zero and smaller than or equal to the length of the stub antenna. Thus, electric field value generated from the feeding antenna can be reduced by the stub antenna being excited and coupled by the feeding antenna and resonating at the resonance frequency of the feeding antenna.
US08902108B2 Housing antenna system
A housing antenna system is proposed, by means of which automatic mass production of basic electrical or electronic devices having such a housing antenna system may be carried out in an economical and time-saving manner. This is achieved in that the housing antenna system is based on pressure contacting between the metallic antenna housing and the associated electronic circuit in order to operate the antenna housing as a housing antenna, using elastic elements.
US08902107B2 Mobile communication device
A mobile communication device including a first appearance and an antenna is provided. An upper surface of the first appearance is bent a first angle from a border between a display area and a non-display area toward a display direction, and a lower surface of the first appearance is bent a second angle from a bending point toward the display direction, wherein the bending point of the lower surface is corresponding to the display area of the upper surface. The antenna is disposed in the mobile communication device and corresponding to the non-display area of the first appearance. The antenna transmits and receives signals processed by the mobile communication device.
US08902105B2 Method and apparatus for determining an integrity indicating parameter indicating the integrity of positioning information determined in a gobal positioning system
The present invention relates to a method and an apparatus for determining an integrity indicating parameter (e.g. an integrity risk IR or a protection level PL) indicating the integrity of positioning information determined from positioning information signals disseminated from a plurality of space vehicles SAT1, SAT2, SAT3 of a global positioning system. An input parameter (e.g. an alert limit AL or an integrity risk IR) is provided, a plurality of integrity information parameters (σSISA, σSISMA or equivalent, σX, kX) are received, and the integrity indicating parameter (IR; PL) is determined on the basis of the input parameter (AL; IR) and on the basis of a first relation between the integrity indicating parameter (IR; PL) and the input parameter (AL; IR) and the plurality of integrity information parameters (σSISA, σSISMA or equivalent, σX, kX).
US08902100B1 System and method for turbulence detection
A aircraft hazard warning system or method can be utilized to determine a location of a turbulence hazard for an aircraft. The aircraft hazard warning system can utilize processing electronics coupled to an antenna. The processing electronics can determine an inferred presence of turbulence in response to lightning sensor data, radar reflectivity data, turbulence data, geographic location data, vertical structure analysis data, and/or temperature data. The system can include a display for showing the turbulence hazard and its location.
US08902097B2 Non-linear data acquisition
One or more techniques and/or systems described herein implement, among other things, a parabolic curve for a ramp signal in a data acquisition component, where the curve can be effectively calibrated and used to provide a settling period to mitigate noise. That is, a ramp generator can generate a ramp signal that has a parabolic voltage curve with two substantially mirroring halves. A comparator can compare a first portion of the parabolic voltage curve with a voltage signal indicative of a number of photons detected by a detection array. A second portion of the parabolic voltage curve is used as a temporal delay so that circuitry, such as the ramp generator, can settle.
US08902096B2 Systems and methods for converting wideband signals into the digital domain using electronics or guided-wave optics
Systems and methods for converting wideband signals into the digital domain are provided herein. The system may include an electronic or guided-wave optic based replicator configured to obtain at least M replicas of a signal applied thereto, and an electronic or guided-wave optic based segmenter configured to segment a signal applied thereto into at least N segments based on time or wavelength. Together, the replicator and the segmenter obtain M×N segment replicas of the received signal. An electronic or guided-wave optic based mixer is configured to multiply the M×N segment replicas by a mixing matrix having dimension M×N and then to form M integrations each of N segment replicas so as to obtain a measurement vector of length M. A signal recovery processor is configured to obtain a digital representation of the received signal based on the measurement vector and the mixing matrix.
US08902094B1 Clock generator for use in a time-interleaved ADC and methods for use therewith
A first clock generator receives an input clock, generates a first clock signal for use in a first level of a multilevel track and hold circuit of a time-interleaved analog to digital convertor, and generates a time-leading version of the first clock signal. A plurality of second clock generators receive the input clock and generate a corresponding plurality of second clock signals for use in a second level of the multi-level track and hold circuit. The plurality of second level clock generators include an adjustable delay that delays a corresponding one of the plurality of second clock signals by a delay amount that is determined based on a delay control signal. A feedback controller generates the delay control signal based on the time-leading version of the first clock signal and further based on the corresponding one of the plurality of second clock signals.
US08902092B2 Analog-digital conversion circuit and method
An analog-digital conversion circuit includes a comparator that receives an analog input signal. A controller generates an N1-bit first signal and an N2B-bit second signal in accordance with an output signal from the comparator. A first digital-analog converter generates a first reference signal from the first signal. A second digital-analog converter generates a second reference signal from the second signal. A correction circuit corrects the first and second signals to generate a digital output signal. The N2B-bit second signal is acquired by adding a Kbit correction signal to an N2A-bit signal. The controller sequentially sets bit values of the first signal and bit values of the second signal in accordance with the output signal of the comparator. The correction circuit generates the (N1+N2A)-bit digital output signal based on a sum of a value acquired by multiplying the N1-bit first signal by 2^N2A and a value of the N2B-bit second signal.
US08902089B2 Systems and methods for performing digital modulation
Circuitry for performing digital modulation is described. The circuitry includes a digital modulator. The digital modulator receives a first signal with a first duty cycle. The digital modulator also receives a second signal with a second duty cycle. The digital modulator further produces a monotonic multiplied modulated signal based on the first signal and the second signal.
US08902086B1 Data encoding for analysis acceleration
For encoding data for analysis acceleration, a method calculates a classification set for a data group of a data set including a plurality of entries. The classification set includes a finite plurality of classification values. Each classification value is associated with a bit position in a data binary string of a specified binary length. The method further encodes each data value of the data group for each entry with one of the plurality of classification values in a corresponding data binary string for the entry.
US08902085B1 Integrated 3D audiovisual threat cueing system
An integrated audiovisual threat warning system configured to detect a threat, estimate a relative location of origin of the threat with respect to a host platform with which the system is associated, and to warn an occupant of the host platform of the threat. The system includes an audio processor configured to receive a warning tone, geo-spatial coordinate data from the host platform, and the estimated relative location of origin of the threat, and to process the warning tone based on the geo-spatial coordinate data and the direction information to generate a directional audio warning signal. The system also includes a plurality of speakers configured to audibly project the directional audio warning signal to audibly identify the estimated relative location of origin of the threat, and a display control unit configured to display the estimated relative location of origin of the threat overlaid on a map.
US08902080B2 Vehicle-mounted narrow-band wireless communication apparatus and roadside-to-vehicle narrow-band wireless communication system
A vehicle-mounted narrow-band wireless communication apparatus includes: information storing/managing section 905 for storing and managing roadside information from a wireless communication unit and operating condition information from an operating condition detection unit 903; an information provision determination unit 904 for determining whether or not information can be provided on the basis of the roadside information and the operating condition information; an HMI output control unit 906 for controlling HMI output on the basis of a determination result from the information provision determination unit 904 and environment information relating to a junction neighborhood obtained from a parameter management unit 907 for managing parameters relating to an HMI; and an information provision output apparatus 901 for performing information provision on the basis of an HMI output request transmitted from the HMI output control unit 906.
US08902078B2 Systems and methods for well monitoring
Devices capable of being disposed in a wellbore for outputting acoustical signals for monitoring downhole parameters are described. Receiving devices positioned remote from the devices and can receive the acoustical signals and determine the downhole parameters. The devices can output acoustical signals in response to fluid flow or otherwise.
US08902077B2 Subsea communication system and technique
A subsea communication system is used to communicate between a position that is proximal to a surface of the sea and an apparatus of the seabed. The subsea communication system includes an umbilicalless communication system.
US08902067B2 Antenna core and method of manufacturing the same, and antenna and detection system using the same
An antenna core includes a laminate of a plurality of Co-based amorphous magnetic alloy thin strips in which a length ratio of a long axis to a short axis is greater than 1. 60% or more of the Co-based amorphous magnetic alloy thin strips in terms of the number of the thin strips as percentage have a line-shaped mark formed along the long axis on at least one surface thereof. An antenna includes the antenna core and a winding wound around the antenna core along the long axis.
US08902059B2 Tracking apparatus for baggage
Embodiments of the present invention provide an apparatus for tracking an item transported with the apparatus. The apparatus comprises a global positioning system (GPS) module for determining a location of the item based on GPS signals received from one or more GPS satellites. The apparatus further comprises a mobile communications controller for generating a message including the determined location of the item, wherein the mobile communications controller sends the generated message to at least one mobile device. The mobile communications controller may also send the generated message to a remote server maintaining location tracking information for one or more items.
US08902057B2 Belt buckle for a motor vehicle
A belt buckle for a motor vehicle is provided wherein, through the use of the belt buckle, a tongue of a seat belt is mechanically receivable and, through the use of a switch, an insertion status of the tongue is detectable. A device is assigned to the switch through the use of which the switch position of the switch is wirelessly communicable to a receiver circuit.
US08902055B2 Rollover warning system for a vehicle
A rollover warning system for a vehicle includes: a base control inertial measurement unit with a plurality of sensors and a computer. The plurality of sensors measures a plurality of vehicle measurements. The plurality of vehicle measurements include at least two of: a longitudinal acceleration measurement; a lateral acceleration measurement; a vertical acceleration measurement; a roll rate measurement; a yaw rate measurement; and combinations thereof. Optionally, a pitch rate gyro for pitch measurement can be added for additional functionality, such as a vertical slope warning, or it can also be input into the predictive algorithm for defining additional vehicle hazardous operation states and conditions. The computer calculates a Rollover Risk Estimate based on the plurality of vehicle measurements taken by the plurality of sensors in the inertial measurement unit.
US08902054B2 Methods, systems, and computer program products for managing operation of a portable electronic device
Methods and systems are described for managing operation of a portable electronic device. Vehicle information, about an automotive vehicle, is received. Device information, about a portable electronic device configured to perform an operation, is received. An operator of the automotive vehicle is detected to be a user of the portable electronic device, based on the vehicle information and the device information. Operation information is sent, in response to detecting the operator is the user, to prevent the portable electronic device from performing the operation.
US08902051B2 Realistic tactile haptic feedback device and realistic tactile haptic feedback method thereof
A realistic tactile haptic device comprising a first vibration sensor, a digital controller, an actuator, and a similar or identical second vibration sensor, and a realistic tactile haptic feedback method thereof, provides users with realistic tactile haptic feedback that is similar to or the same as real tactile haptic feedback which users would experience by touching real objects.
US08902050B2 Systems and methods for haptic augmentation of voice-to-text conversion
Systems and methods for providing voice-to-text haptic augmentation in a user interface are disclosed. For example, one disclosed system for converting audible speech information to a haptic effect includes a microphone and a processor in communication with the microphone, the processor configured to receive an audio signal associated with a voice from the microphone, determine a characteristic of the audio signal, and generate an actuator signal based at least in part on the characteristic, the actuator signal configured to cause an actuator to output a haptic effect.
US08902048B2 Radio frequency transmitter adaptors, methods and articles of manufacture
Radio Frequency (RF) transmitter adaptors, methods and articles of manufacture are disclosed. A method of adapting an RF transmitter for using in controlling a radio controlled (R/C) device having an RF receiver includes receiving a pulse-position modulation (PPM) signal from the RF transmitter, automatically selecting a channel assignment map based on the PPM signal, and generating, from the PPM signal, an RF communication signal compatible with the RF receiver for use in controlling the R/C device based on the selected channel assignment map.
US08902047B2 RFID system and method of transmitting large data of passive RFID
Provided are a radio frequency identification (RFID) system including an RFID reading apparatus and a passive RFID tag and a method of transferring and/or processing data using the same. An RFID reading apparatus includes a data input unit which receives data to be transferred to a passive RFID tag, a control unit which generates a transmission packet containing the data and a command directing data transfer, and a communication unit which converts the generated transmission packet into an RF signal and transfers the converted RF signal to the passive RFID tag.
US08902044B2 Biometric control system and method for machinery
The present invention is a system and method that allows only authorized users to turn on specific equipment they are approved to use and maintains a record of the name of the user, date, time and length of operating time. In one embodiment, the system comprises an AMS unit in communication with a BCS unit located at and connected to the machine. AMS comprises a computing device, a biometric reader connected with the computing device, a storage device connected with the computing device, a program module stored on the storage unit, and a communication module connected to the computing device. The program module has sets of code configured to instruct the biometric reader to scan the biometric feature of the operator and to create a digitized biometric signature. The program module is further configured to store the biometric signature on the storage device. The BCS unit comprises a computing device, a biometric reader connected with the computing device, a storage device connected to the computing device, a program module stored within the storage device, and a communication module connected with the computing device and in communication with the communication module of the AMS. The biometric reader of the AMS unit is adapted to detect the presence of the biometric feature of the operator and to scan and create a digitized biometric signature. The program module of the BCS unit is configured allow the user to turn-on the machine if the user's biometric signature matches the authorized biometric signature.
US08902038B2 Thermally responsive switch
A thermally responsive switch includes a container including a metal housing and a header plate, at least one conductive terminal pin inserted through a hole of the header plate, a fixed contact fixed to the terminal pin, a thermally responsive plate having one of two ends conductively connected via a support to an inner surface of the container and reversing a direction of curvature at a predetermined temperature, and at least one movable contact electrically conductively secured directly to the other end of the thermally responsive plate. Each contact is comprised of a silver-cadmium oxide system contact. The container is filled with a gas containing helium ranging from 50% to 95% so that an internal pressure of the container ranges from 0.38 atmosphere to 0.68 atmosphere at room temperature such that arc generated during opening of the contacts moves on surfaces of the contacts without spreading from the contacts.
US08902035B2 Medium / high voltage inductor apparatus and method of use thereof
The invention comprises an inductor configured for filtering medium and/or high voltage power. The inductor includes an inductor core formed of a plurality of coated magnetic particles, each of a majority of the coated magnetic particles including: a magnetic particle core and a non-magnetic coating about a corresponding magnetic particle core. The inductor optionally includes: (1) a main inductor spacer separating a first turn of a winding from a terminal turn of the winding and (2) a segmenting spacer separating two consecutive turns of the winding about said core. The inductor is configured to convert power into an output current, such as power of at least one thousand five hundred volts with an input current of at least fifty amperes.
US08902034B2 Phase change inductor cooling apparatus and method of use thereof
The invention comprises a phase change inductor cooling system. The cooling system uses a non-conductive refrigerant in proximate and/or in direct contact with an inductor. Heat from the inductor changes the refrigerant from a liquid to a gas phase, which removes heat from the inductor. The gas phase refrigerant is subsequently removed from the inductor to remove heat from the environment about the inductor. The refrigerant is optionally recirculated using the steps of condensing and/or compressing the refrigerant prior to reintroduction into the environment proximate and/or in direct contact with the inductor.
US08902030B2 Device for generating an orientable and locally uniform magnetic field
Device for generating an orientable and locally uniform magnetic field, including N≧3 identical assemblies of cylindrical coils, each assemblies having a first and a second coil, the coils being coaxial with an axis oriented along a direction z and arranged symmetrically on either side of the plane, with a gap in the axial direction, the assemblies arranged such that their outlines in a plane xy perpendicular to the z-axis are regularly spaced along a circle of center O and of radius a0>0, so to leave a central free space. A supply system supplies the coils with a current set to obtain, at the center of the device, a magnetic field having the desired orientation. The device may include two pairs of cylindrical coils having a common axis oriented in said z-direction and passing through the center of the circle, these coils being arranged symmetrically on either side of said xy-plane.
US08902029B2 Electromagnetic relay
An electromagnetic relay includes: an iron core that has an end face and a groove which goes across the end face; and a shading coil that is fitted in the groove; wherein the shading coil is fixed to the iron core by applying caulking processing to a plurality of areas in the end face which sandwich the groove.
US08902027B2 Electric protection apparatus comprising at least one breaking module controlled by a control device with electromagnetic coil
The present invention relates to an electric protection apparatus comprising at least one switching module fitted on a mounting support, and a control device with an electromagnetic coil juxtaposed with one of the above-mentioned modules, this device comprising a magnetic shield arranged in a plane substantially perpendicular to the plane of the mounting support, said shield being located between the control device and the switching module situated closer to said device, facing the coil of the control device, and comprising at least one ferromagnetic part shaped in such a way that said shield performs magnetic guiding of the arc as soon as separation of the contacts takes place so as to increase the propulsion component of the Laplacian force acting on the arc as soon as separation of the contacts takes place.
US08902025B2 Coplanar waveguide
An embodiment relates to a coplanar waveguide electronic device comprising a substrate whereon is mounted a signal ribbon and at least a ground plane. The signal ribbon comprises a plurality of signal lines of a same level of metallization electrically connected together, and the ground plane is made of an electrically conducting material and comprises a plurality of holes.
US08902023B2 Acoustic resonator structure having an electrode with a cantilevered portion
An acoustic resonator comprises a first electrode and second electrode comprising a plurality of sides. At least one of the sides of the second electrode comprises a cantilevered portion. A piezoelectric layer is disposed between the first and second electrodes. An electrical filter comprises an acoustic resonator.
US08902019B2 Electronic circuit
An electronic circuit includes: a first resistor having a first terminal and a second terminal; a first transmission line that is coupled to the first terminal of the first resistor, has a first terminal to which a first input signal is input, and has a second terminal outputting a first output signal having a phase difference with respect to the first input signal; and a second transmission line that is coupled to the second terminal of the first resistor, has a first terminal to which a second input signal having a phase difference with respect to the first input signal is input, and has a second terminal outputting a second output signal having a phase difference with respect to the second input signal and having, the phase difference being smaller than a phase difference between the first input signal and the second input signal with respect to the first output signal.
US08902013B2 Dynamic range compression circuit and class D amplifier
A dynamic range compression circuit includes an attenuator that attenuates a signal at a predetermined node in an amplifier to reduce a gain of the amplifier and a gain controller that reduces the gain of the amplifier by the attenuator so that an amplitude of an output signal of the amplifier becomes an arbitrary output limit voltage in a case where an input signal having the same amplitude as that of an input-stage maximum voltage of the amplifier is input into the amplifier, and increases the gain of the amplifier by reducing a degree of attenuation of the attenuator according to a decrease of the amplitude of the input signal of the amplifier from the input-stage maximum voltage in a case where the amplitude of the input signal of the amplifier is smaller than the input-stage maximum voltage.
US08902012B2 Waveguide circulator with tapered impedance matching component
Systems and methods for a waveguide circulator with tapered matching component are provided. In certain embodiments, a waveguide structure comprises a plurality of waveguide arms; an internal cavity; a plurality of tapered matching components, wherein each tapered matching component in the plurality of tapered matching components has a narrow taper end that is connected to the internal cavity and a wide taper end that is connected to a waveguide arm in the plurality of waveguide arms, wherein the narrow taper end is narrower than the wide taper end; and a ferrite element having ferrite element segments disposed in the internal cavity, wherein a segment extends through the narrow taper end and the narrow taper end of the tapered matching component is narrower than the wide taper end such that a magnitude of impedance difference between each waveguide arm and the internal cavity containing the ferrite element is reduced.
US08902011B2 Signal generating circuit for real time clock device and method thereof
A signal generating circuit for a real time clock device is disclosed, having an oscillating circuit, a voltage detecting circuit, and a control circuit. The oscillating circuit is used for generating oscillating signals. The voltage detecting circuit is used for detecting a voltage level coupled with the signal generating circuit. The control circuit is coupled with the oscillating circuit and the voltage detecting circuit. When the voltage level detected by the voltage detecting circuit locates in a predetermined range, the control circuit configures the oscillating circuit to generate the oscillating signals with a larger current at a first interval and to generate the oscillating signals with a smaller current at a second interval. The control circuit further generates a clock signal according to the oscillating signals at a third interval.
US08902008B1 Resistor capacitor (RC) oscillator
Aspects of the disclosure provide a circuit. The circuit includes a current generator, a capacitor, a comparator, a switch and a clock generator logic. The current generator is configured to generate a current proportional to a comparator threshold voltage by a ratio. The capacitor is configured to be charged by the current to have a capacitor voltage. The comparator is configured to compare the capacitor voltage with the comparator threshold voltage. The switch is configured to discharge the capacitor based on the comparison. The clock generator logic is configured to generate a clock signal based on the comparison, such that a frequency of the clock signal is a function of the ratio and is independent of the current and the comparator threshold voltage.
US08902004B2 Reducing the effect of parasitic mismatch at amplifier inputs
A circuit includes an amplifier including a differential input stage including a first input terminal and a second input terminal. The circuit further includes a differential input line coupled to the first input terminal and the second input terminal, and shielding at least partially encompassing the differential input line. The shielding is connected to a node of the differential input stage of the amplifier.
US08902000B2 Signal splitting apparatus suitable for use in a power amplifier
Disclosed is a signal splitting apparatus useable in a power amplifier having two or more power amplifiers. The apparatus includes a direct gain component; and a derived gain component connected to the direct gain component. The derived gain component derives the derived gain by imposing a constraint which is valid over the entire dynamic range of the input signal, e.g. the sum of the power of the direct split signal and the derived split signal are constrained to be substantially equal to the power of the input signal. The use of combining additional direct gain and derived gain components, as well as a delay element, are disclosed so as to enable n-component splitting that for adaptation to different applications by the use of suitable coefficients.
US08901999B2 Audio-output amplifier circuit for audio device, audio device, electronic device including audio device, and output control method for audio device
An audio-output amplifier circuit for an audio device includes an output amplifier and a switching element connected between an amplifier-output terminal of the output amplifier and ground, to short-circuit the amplifier-output terminal of the output amplifier after transition to ground-level voltage is finished.
US08901997B2 Low noise photo-parametric solid state amplifier
A solid state detection system includes a degenerate photo-parametric amplifier (PPA), wherein the PPA comprises a photo diode, and a periodically pulsed light source, wherein the photo-parametric amplifier (PPA) is synchronized to the pulsed light source with a phase locked loop that generates a pump waveform for the PPA at twice the frequency of the excitation pulse rate.
US08901995B2 Active low pass filter
Sallen-Key active low pass filters (LPFs) have been knows for many years; however, these LPFs generally include passive components (i.e., resistors and capacitors) and active components (i.e., amplifiers) that are within the direct signal path that can contribute to the noise at the output of the filter within the pass band. Here, an LPF (which has the same general behavior as a Sallen-Key LPF) has been provided that AC couples passive components and active components to the direct signal path so as to suppress the noise contribution in the pass band.
US08901992B1 Temperature sensors
Temperature sensors are provided. The temperature sensor includes a comparison voltage generator and a temperature voltage generator. The comparison voltage generator generates a first comparison voltage signal whose level varies according to temperature variation and a second comparison voltage signal whose level is constant regardless of temperature variation. The temperature voltage generator generates a first internal current signal whose level varies according to a level of the first comparison voltage signal and a second internal current signal whose level varies according to a level of the second comparison voltage signal. Further, the temperature voltage generator amplifies a current difference between the first and second internal current signals to generate a temperature voltage signal.
US08901987B1 Unidirectional output stage with isolated feedback
A circuit includes an input stage configured to receive a regulated input signal and generate an input stage output signal in response to the regulated input signal. An isolation stage can be configured to pass the input stage output signal to a buffered output node. The isolation stage receives feedback from the buffered output node to deactivate the buffer input stage if transient voltages are generated at the buffered output node. An output stage can be configured to provide current to the buffered output node in response to the regulated input signal.
US08901977B1 Feedback for delay lock loop
The present invention is directed to signal processing system and electrical circuits. More specifically, embodiments of the present invention provide a DLL system that provides phase correction by determining a system offset based on phase differences among the delay lines. The offset is used as a part of a feedback loop to provide phase corrections for the delay lines. There are other embodiments as well.
US08901975B2 Digital PLL with dynamic loop gain control
The disclosed embodiments relate to a digital phase-locked loop (PLL) with dynamic gain control. This digital PLL includes a phase detector which receives a reference signal and a feedback signal as inputs and produces an output signal comprising up/down values. It also includes a digital loop filter which receives the phase-detector output signal as an input and produces an M-bit output signal. This digital loop filter is associated with a loop-parameter control unit (LPCU) which dynamically generates loop-filter parameters for the digital loop filter based on an observed pattern of up/down values from the phase-detector output over a specified period of time. A digitally controlled oscillator (DCO) receives the loop-filter output signal and produces a PLL output signal. Finally, a feedback path returns the PLL output signal to the phase detector.
US08901972B2 Pin driver circuit with improved swing fidelity
A circuit may include a controller, at least one bridge circuit, and a plurality of switches. The plurality of switches may be connected parallel to each other, each may have a switch output connected to the bridge circuit. The bridge circuit, upon receiving a current from the plurality of switches, may generate an output based on a reference voltage. The controller may generate a plurality of control signals, based on a voltage transition range, to selectively turn on the plurality of the switches in more than one combination, to supply a current to the output.
US08901970B2 High voltage inverter utilizing low voltage oxide MOFSET devices
An inverter circuit includes an input stage and an output stage, each including pairs of complementary transistors having low-voltage oxides. The transistors within the input stage are configured to receive the input signal and to provide control voltages in response to input signal voltage variations. The voltage level of one control voltage is clamped between an intermediate voltage and a high voltage, and the voltage level of the other control voltage is clamped between the intermediate voltage and a low voltage. The switching states of each complementary transistor in the output stage are controlled by the control voltages, which results in an output signal voltage varying between the high and the low voltage. The voltage clamping advantageously allows the inverter circuit to switch between the high and the low voltage level without exceeding a maximum gate-source or a gate-drain voltage rating for any transistor, and without requiring additional passive components.
US08901968B2 Active pull-up/pull-down circuit
A circuit includes circuit portions operating from separate power supplies which are switched sequentially. An output of a first portion powered by a power supply (A) is provided as an input to a second portion powered by another power supply (B). Power supply (A) is switched-ON a delay interval later than power supply (B). In an embodiment, the first portion also receives a control input which enables or disables response of the first portion to changes in its inputs. An active circuit is connected between the control terminal and a constant reference potential node of the circuit, and has one transistor of a current-mirror pair connected across supplies (A) and (B). The active circuit connects the control terminal to the constant reference potential node in the delay interval, but is an open circuit otherwise. Power dissipation in the circuit is thereby reduced.
US08901967B2 Comparator
A comparator comprises a differential amplifier type including input MOSFETs receiving differential input of a reference voltage and an input voltage, load MOSFETs for the input MOSFETs, and a constant current source to supply the sources of the input MOSFETs. The comparator comprises a Zener diode that is connected between the gate and source of the input MOSFETs and exhibits a breakdown voltage lower than the withstand voltage of the gate oxide film of the input MOSFET. Another comparator further comprises a feedback MOSFET that performs negative feedback of an output voltage of a main body comparator to the gates of the load MOSFETs to restrict the amplitude of the output voltage. Still another comparator further comprises a semiconductor rectifying element that exhibits a reverse-blocking characteristic higher than the power supply voltage and is interposed between the constant current source and the source of each of the input MOSFETs.
US08901966B2 Sensor circuit
Provided is a sensor circuit which can amplify a sensor signal at high speed and with a high amplification factor without increasing the current consumption. The sensor circuit includes a primary amplifier for amplifying in advance a differential output signal which is a current signal of a sensor element, a secondary amplifier for amplifying the amplified differential output signal, a constant voltage generating circuit for maintaining a sensor element driving current to be constant, and a feedback circuit for feeding back a feedback signal to adjust an amplification factor. Most of the currents which pass through the primary amplifier are bias currents of the sensor element.
US08901961B1 Placement, rebuffering and routing structure for PLD interface
A PLD comprises a substrate, an array of programmable logic elements formed in the substrate, a first columnar interface coupling to the array of logic elements and extending in the substrate substantially parallel to a first side of the substrate, and at least a second columnar interface coupling to the array of logic elements and extending in the substrate substantially parallel to the first columnar interface. The interfaces illustratively provide a plurality of interconnects, control circuits and one or more of driver circuits, rebuffering circuits, signal conditioning circuits, deskewing circuits, clock synchronization circuits, power management circuits, testing/debugging circuits, partial reconfiguration circuits, multi-plexing circuits, pipelining circuits and storage circuits. The PLD is mounted on an interposer so that its interfaces electrically couple to electrically conducting paths on the interposer.
US08901959B2 Hybrid IO cell for wirebond and C4 applications
A hybrid IO cell for use with controlled collapse chip connection, wirebond core limited, wirebond IO limited, and wirebond inline chip designs is provided. A method of designing the hybrid IO cell includes designating a technology, determining a minimum pad width of the technology, and determining a minimum pad spacing of the technology. The method also includes determining a width of the hybrid IO cell based on the minimum pad width and the minimum pad spacing, setting a length of the hybrid IO cell equal to the determined width, and storing a definition of the IO cell in a library stored on a computer useable storage medium.
US08901957B2 Processor and control method for processor
A processor includes a programmable logic circuit provided with a plurality of processing units. The programmable logic circuit is capable of reconfiguring a first logic circuit corresponding to first circuit configuration information according to a first process and a second logic circuit corresponding to second circuit configuration information according to a second process. Each of the first and second logic circuits includes an information holding unit. A first control circuit stores the second circuit configuration information in the information holding unit of the first logic circuit and generates an execution control signal for executing the first process. A second control circuit obtains the second circuit configuration information from the information holding unit of the first logic circuit in response to completion of the first process and controls the programmable logic circuit so as to reconfigure the second logic circuit corresponding to the second circuit configuration information.
US08901953B2 Enforcing performance longevity on semiconductor devices
Technologies for enforcing an expiration policy on an electronic engineering sample component includes a one-time programmable fuse to store a manufacture date of the electronic engineering sample component, another one-time programmable fuse to store an expiration date of the electronic engineering sample component, and a component life management engine to compare a current date of the electronic engineering sample component with the expiration date of the electronic engineering sample component. The component life management engine to disable or lock the electronic engineering sample component in response to determining that the current date of the electronic engineering sample component exceeds the expiration date of the electronic engineering sample component. In some embodiments, a computing device may enforce the expiration policy for the electronic engineering sample component. The computing device may also be communicatively coupled to a remote unlock server and may receive authorization to unlock a disabled engineering sample component.
US08901949B2 Probe card for testing a semiconductor chip
There is provided a probe card comprising a plurality of probe tips, each being ball-shaped or pillar-shaped and having a top end in contact with each of target chip pads to be tested; a first space converting unit; a second space converting unit; a frame configured to support the second space converting unit; an interposer unit; and a circuit board.
US08901945B2 Test board for use with devices having wirelessly enabled functional blocks and method of using same
A test board is provided. The test board includes a test module configured to accommodate an integrated circuit (IC) device and first wirelessly enabled functional blocks located in the test module and configured to communicate with second wirelessly enabled functional blocks of the IC device.
US08901944B2 Lattice structure for capacitance sensing electrodes
One embodiment of a capacitive sensor array may comprise a first plurality of sensor elements and a second sensor element comprising a main trace, where the main trace intersects each of the first plurality of sensor elements to form a plurality of intersections. A unit cell may be associated with each of the intersections, and each unit cell may designate a set of locations nearest to the corresponding intersection. A contiguous section of the main trace may cross at least one of the plurality of unit cells. Within each unit cell, the second sensor element may comprise at least one primary subtrace branching away from the main trace.
US08901941B2 Instrument and method for detecting partial electrical discharges
An instrument (1) and a method for detecting partial electric discharges involve acquiring a discharge signal (10), for example picked up by a direct-measuring impedance device (7) through a broadband HF acquisition channel (18), and acquiring the discharge signal (10) in a narrowband LF acquisition channel (180) complying with regulations, using on the LF acquisition channel (180) a trigger controlled in slave mode by a trigger of the broadband HF acquisition channel (18); they also involve acquiring another discharge signal (32) picked up by an indirect-measuring impedance device (8) through a second narrowband LF acquisition channel (180A) and comparing digital signals (34, 34A) generated in the first and second LF acquisition channels (180, 180A), in order to generate a balanced digital signal (36) without components representative of common mode electrical signals present in the measuring circuit.
US08901939B2 Open sensor for testing a split sample of a composite medium
An open sensor is provided for testing a split sample of a composite medium. The open sensor generally includes a longitudinal section of a tube and a plurality of serpentine conductors which are successively layered on top of each other. The interior surface of the tube section forms a trough into which the split sample of the composite medium can be disposed. The number of serpentine conductors is two or greater.
US08901937B2 Foreground techniques for comparator calibration
A method and a device for canceling an offset voltage in an output of a comparator circuit include applying a signal to a first input of the comparator as a function of an initial tap point in a resistor ladder. While the signal is applied to the first input, a nominal voltage is applied to a second input of the comparator, and then an output of the comparator is analyzed. The signal to the first input is changed in response to the analyzing, by accessing a different tap point in the resistor ladder.
US08901931B2 Electromagnetic surface-to-borehole look around systems and methods of monitoring in horizontal wells
A method for water monitoring about a deviated well is disclosed. The method includes positioning a series of electromagnetic (EM) receivers in a completed deviated wellbore, said receivers being spaced along substantially the length of the well located in a region of a reservoir to be monitored. The method also includes positioning an electromagnetic (EM) source at a first Earth surface location. Then the EM source is activated for a first survey measurement of the reservoir, and an EM field detected at each EM receiver is recorded. The EM source is moved to a second Earth surface location, and activated for a second survey measurement of the reservoir, and an EM field detected at each EM receiver is recorded. From the first and second survey measurements at each of the receivers, an inversion is performed to determine position of water about (and specifically below) the horizontal well.
US08901929B2 D-shaped coil
The present embodiments relates to a magnetic resonance tomography system having a coil system. The coil system includes an upper part having at least one antenna and a lower part having at least one antenna. The upper part of the coil arrangement is disposed above a bore for receiving an examination subject. The lower part of the coil arrangement is disposed below a field of view of the magnetic resonance tomography system. The lower part of the coil arrangement is closer to the examination subject than the upper part of the coil arrangement.
US08901928B2 MRI safety system
In a MRI system housed within a room there is provided a movable magnet and additional components for other procedures on the patient, a control system is provided for the relative movement of the magnet and components. This includes a plurality of magnetic field sensors mounted on the components for measuring the magnetic field at the location of the component and an optional camera positioning system so that the control system can estimate relative positions of the components relative to the magnet from the sensed field strengths from the set of sensors to avoid collisions during the movements.
US08901927B2 Supplementation of acquired, undersampled MR data
In a computerized method and magnetic resonance (MR) system for the supplementation of acquired MR data, at least one supplemented MR data set is determined from multiple acquired, reduced MR data sets that can be acquired with an accelerated acquisition method (such as partially parallel acquisition method, ppa) in which k-space is undersampled. The acquisition can thereby take place in parallel with multiple acquisition coils. In the method and system, a reconstruction kernel is applied to the multiple acquired, reduced MR data sets in order to determine a reconstructed MR data set for an acquisition coil. The reduced MR data set acquired with the acquisition coil is reused in this reconstructed MR data set. The reuse takes place by a combination with weighting with the respective variances.
US08901926B2 Arrangement for multiple frequency, multiple portal NQR detection
Nuclear quadrupole resonance measurement using two or more wire loop(s) within a space to define a portal, and driving the wire loop(s) with a baseband digital transmitter generating a chirped or stepped signal, to create a corresponding varying electromagnetic field within the portal. Coherent emissions reflected thereby are detected through a directional coupler feeding the transceiver. The detected coherent emissions are processed with a matched filter to determine presence of a target object within the portal.
US08901925B2 Magnetoresistive sensor and manufacturing method thereof
A magnetoresistive element formed by a strip of magnetoresistive material which extends on a substrate of semiconductor material having an upper surface. The strip comprises at least one planar portion which extends parallel to the upper surface, and at least one transverse portion which extends in a direction transverse to the upper surface. The transverse portion is formed on a transverse wall of a dig. By providing a number of magnetoresistive elements perpendicular to one another it is possible to obtain an electronic compass that is insensitive to oscillations with respect to the horizontal plane parallel to the surface of the Earth.
US08901924B2 Apparatus and method for sequentially resetting elements of a magnetic sensor array
A semiconductor process and apparatus provide a high-performance magnetic field sensor with three differential sensor configurations which require only two distinct pinning axes, where each differential sensor is formed from a Wheatstone bridge structure with four unshielded magnetic tunnel junction sensor arrays, each of which includes a magnetic field pulse generator for selectively applying a field pulse to stabilize or restore the easy axis magnetization of the sense layers to orient the magnetization in the correct configuration prior to measurements of small magnetic fields. The field pulse is sequentially applied to groups of the sense layers of the Wheatstone bridge structures, thereby allowing for a higher current pulse or larger sensor array size for maximal signal to noise ratio.
US08901921B2 Angle measurement system for determining an angular position of a rotating shaft
Some aspects of the present disclosure relate to techniques for measuring an angular position of a rotating shaft. As will be described in greater detail below, some angle measurement systems of the present disclosure include at least two magnets that cooperatively rotate at different rates according to a predetermined relationship (e.g., a predetermined gear ratio). Two or more magnetic field sensing elements, which are often stationary, measure the directionality of the resultant magnetic field at different positions for a particular angular shaft position. Based on the directionality measured by the magnetic field sensing elements, the techniques can determine an absolute angular position of the rotating shaft, which can be greater than three-hundred and sixty degrees.
US08901915B2 Voltage or contact closure sensor
An external signal sensor uses a single sensing circuit to detect a DC voltage or an AC voltage or a contact closure. The circuit can sense different isolated signals with relatively low power consumption. According to various embodiments, an isolation transformer has a primary winding that is fed by an oscillator signal. A secondary winding of the isolation transformer is open when no contact closure or AC or DC voltage is present, but is closed when a contact closure is present or when an AC or DC voltage is present. When the secondary winding is open, a status signal at an output of the sensing circuit has a logical high value. When the secondary winding is closed, the status signal has a logical low value. In this way, the same sensing circuit can be used to detect either a contact closure or an AC or DC voltage.
US08901913B2 Microelectrode arrays
Among others things, techniques, systems, and apparatus are disclosed for recording electrophysiological signals. In one aspect, a microelectrode sensing device includes a printed circuit board (PCB), a chip unit electrically connected to the PCB, and a cell culture chamber positioned over the chip unit and sealed to the PCB with the chip unit between the PCB and the cell culture chamber. The chip unit includes a substrate; a conductive layer positioned over the substrate that includes one or more recording electrodes; an insulation layer positioned over the conductive layer; another conductive layer positioned over the insulation layer that includes positioning electrodes; and another insulation layer positioned over the other conductive layer. The recording and positioning electrodes are electrically independent so as to independently receive a stimulus signal at each recording electrode and positioning electrode and independently detect a sensed signal at each recording electrode.
US08901910B2 System and method of predictive current feedback for switched mode regulators
A predictive current feedback system for a switched mode regulator including a sample and hold network for sampling voltage across a lower switch of the regulator and for providing a hold signal indicative thereof, and a predictive current feedback network which adds an offset adjustment to the hold signal based on a duration of a pulse width of a pulse control signal developed by the regulator. Sampling may be done while the lower switch is on for providing a hold value indicative of inductor current while the pulse control signal is low. The offset adjustment may be added to the hold signal in response to a transient event when the pulse signal is high. The offset may be incremental values after each of incremental time periods after a nominal time period, or may be a time-varying value. Adjustment may be made while the pulse signal is low as well.
US08901909B2 Multi-phase power system with redundancy
An integrated circuit device for delivering power to a load includes a controller circuit, a cascade circuit, and a power delivery circuit. The controller circuit generates a plurality of control signals. The cascade circuit receives the control signals from the controller circuit and sequentially outputs the control signals onto a cascade bus. The power delivery circuit receives the control signals from the controller circuit and delivers an amount of current to the load, in response to one of the control signals.
US08901905B2 System and method for providing power via a spurious-noise-free switching device
A method of generating spurious-noise-free power from a switching device. The method includes generating an oscillating signal in the form of a series of pulse trains, and randomly changing the switching frequency, or the on-time, or both the switching frequency and the on-time of the switching device. The method further includes causing the switching device to change from a first frequency to a second frequency only at the end of a pulse train of the first frequency, and causing the second frequency to start at the beginning of its first pulse train such that no switching duty-cycle disturbance at the time of the change from first to second frequency. In a particular embodiment, the method further generates spurious-noise-free power from a switching device by implementing a relationship between the different switching frequencies involved such that spurious-noise-free operation is achieved.
US08901902B2 Switching regulator and electronic device incorporating same
A switching regulator switch between an input terminal and an output terminal; a second switch between the output terminal and ground; a switching-time control circuit to generate a first signal when a first period corresponding to a ratio of ON-period of the first switch to a sum of those of the switches has elapsed from a reset-release timing and a reset signal when a second period longer than the first period has elapsed from the rest-release timing; a comparator to generate a second signal when a feedback voltage is smaller than a reference voltage; and a switch control circuit to control the switches so that the first switch is turned off and the second switch is turned on in response to the first signal, and the second switch is turned off and the first switch is fumed on in response to the second signal.
US08901898B2 Methods and apparatus for regulating output voltage of a power supply system
A power supply system includes a first connector, a second connector, a first circuit for detecting a magnitude of a current drawn from an energy source by the power supply system and providing a related output related, and a second circuit for adjusting an output voltage supplied to the second connector based on output of the first circuit. The output voltage supplied to the second connector is at a first value when the output of the first circuit is below a first threshold. Further, the output voltage supplied to the second connector is at a second value, greater than said first value, when the output of the first circuit is above a second threshold. The output voltage supplied to the second connector is at a third value, between said first and second values, when the output of the first circuit is between the first and second thresholds.
US08901897B2 Operating a DC-DC converter
Operating a DC-DC converter that includes: a directly coupled inductor with a first and second coil element, the first and second coil element coupled to an output filter and a load; and power-switching phases, including: a first power-switching phase that includes a high-side and low-side switch, where the high-side switch is configured, when activated, to couple a voltage source to the first coil element and the low-side switch is configured, when activated, to couple the first coil element to a ground voltage; and a second power-switching phase that includes a high-side and low-side switch, where the high-side switch is configured, when activated, to couple the voltage source to the second coil element and the low-side switch is configured, when activated, to couple the second coil element to the ground voltage; and the switches are activated alternatively with no two switches are activated at the same time.
US08901893B2 Electricity storage device and hybrid distributed power supply system
It is an object to effectively output electrical energy of a storage battery to an electrical power system serving as a whole distributed power supply system by effectively utilizing the electrical energy within a charging ratio range that does not cause overcharging or overdischarging of the storage battery. In a hybrid distributed power supply system, the target supply electrical power is set based on the electrical power generation output of the electrical power generator and the charging state of the storage battery, and the target supply electrical power is restricted within a predetermined permissible supply electrical power range when the target supply electrical power deviates from the predetermined permissible supply electrical power range.
US08901886B2 Method and circuitry to recover energy from discharge signals of a charging operation of a battery/cell
The present inventions, in certain aspects, are directed to techniques and/or circuitry to charge a battery the method comprises (i) charging the battery via a charging sequence, wherein charging the battery includes: (a) applying a plurality of charge signals, and (b) applying one or more discharge signals wherein, in response thereto, the battery outputs electrical energy. In certain embodiments, the electrical energy output by the battery in response to the discharge signals is stored (for example, in a capacitor and/or second battery). The present inventions are also directed to, among other things, an apparatus to charge a battery comprising charging circuitry including: (i) a current source to generate a plurality of charge signals, and (ii) a current sink to generate one or more discharge signals, wherein, in response thereto, the battery outputs electrical energy. The apparatus may also include control circuitry, a storage device (for example, in a capacitor and/or second battery), to store the energy output by the battery in response to the one or more discharge signals, and/or an ambient environmental device to adjust the ambient environment or conditions of the battery using the energy output by the battery in response to the one or more discharge signals.
US08901883B2 Charger for electric vehicle
Disclosed herein is a charger for electric vehicles, which has a wide output voltage range. The charger is a slow charger having an improved configuration to respond to a wide output voltage range as well as output change. The charger may achieve limited switching loss and reduced noise via soft-switching operation, thereby enabling high-efficiency large-power Power Factor Correction (PFC) and increasing conversion efficiency of a DC/DC converter.
US08901881B2 Intelligent initiation of inductive charging process
A system for intelligent initiation of an inductive charging process. In accordance with an embodiment, the system comprises a receiver coil or receiver associated with a mobile device, and provided as a separable or after-market accessory for use with the mobile device. When the mobile device is placed in proximity to a base unit having one or more charger coils, the charger coil is used to inductively generate a current in the receiver coil or receiver associated with the mobile device, to charge or power the mobile device. The base unit and mobile device communicate with each other prior to and/or during charging or powering to determine a protocol to be used to charge or power the mobile device.
US08901879B2 Mobile electronic device storage and charging system
A mobile electronic device storage and charging system includes a housing for accommodating mobile electronic devices, which includes a wheeled hollow base frame shell equipped with a retractable handle and carrying handles, a cover shell for covering the wheeled hollow base frame shell, and two sliding rail assemblies hinged between the hollow base frame shell and the cover shell at different elevations for enabling the cover shell to be opened from the wheeled hollow base frame shell through 90° angle and then moved to one lateral side relative to the wheeled hollow base frame shell, a transmission control system, which includes a power management unit and a connector module controllable to charge mobile electronic devices and to link mobile electronic devices to the internet, and a power cable for electrically connecting the power management unit to an external power source for power input.
US08901875B2 Bi-directional wireless charger
A bi-directional charging device includes a rechargeable battery, a coil coupled to the rechargeable battery, a selection mechanism that selectively causes power to be delivered from the coil to the battery and selectively causes power to be delivered from the battery to the coil, and a control mechanism. Upon determining that the coil is to provide power to the battery, the control mechanism causes the selection mechanism to selectively cause power to be delivered from the coil to the battery, and upon determining that the coil is to receive power from the battery, the control mechanism causes the selection mechanism to selectively cause power to be delivered from the battery to the coil.The bi-directional charging device includes a housing enclosing the rechargeable battery, the coil, the selection mechanism, and the control mechanism.
US08901869B2 Hybrid closed loop speed control using open look position for electrical machines controls
A method of controlling speed of an electric machine having a rotor and a stator is provided. The method may comprise the steps of monitoring a desired speed and a measured speed of the rotor, generating a torque command based on the desired speed and the measured speed, and controlling phase current to the stator based on a hybrid closed loop analysis of the torque command, the measured speed and an estimated position of the rotor. The estimated rotor position may be derived at least partially from the desired speed.
US08901865B2 Current limiting device for vehicle
A current limiting device includes a switching portion, a reflux portion connected to a connection point of the switching portion and an output terminal, and supplying a current to a motor generator while the switching portion is cutting off the current, a current measurement portion that measures the current flowing from the output terminal to the motor generator, and a current control portion that controls the switching portion to switch ON/OFF according to a current value measured by the current measurement portion. When the motor generator is motor-driven using electric power of a condenser, the current control portion limits the current to the motor generator by controlling the switching portion to switch ON/OFF in a case where the measured current value is equal to or exceeds a predetermined current value.
US08901864B2 Driver having dead-time compensation function
Proposed is a driver having dead-time compensation function. The driver having dead-time compensation function generates an output voltage according to a voltage command and a frequency command. The driver includes an inverter, an output current detector and a control unit. The inverter receives a DC voltage and operates with a pulse width modulation mode so that the driver outputs the output voltage and an output current. The output current detector detects the current value of the output current to generate a output current detecting signal. The control unit outputs a switching control signal to inverter according to the voltage command and the frequency command. The control unit corrects a reference command according to dead-time and the output current detecting signal related to the output current so that amplitude and waveform smoothness of the output voltage and the output current are compensated.
US08901856B2 Detection circuit, power circuit, and luminaire
According to one embodiment, a detection circuit including first and second comparators and a determining unit is provided. The first comparator includes a first input terminal for inputting a first detection voltage, a second input terminal for inputting a first threshold voltage, and a first output terminal configured to output a first output signal. The second comparator includes a third input terminal for inputting a second detection voltage, a fourth input terminal for inputting a second threshold voltage higher than the first threshold voltage, and a second output terminal configured to output a second output signal. The determining unit is configured to determine the presence or absence of conduction angle control of an AC voltage and whether the conduction angle control is a phase control system or an opposite phase control system on the basis of a time difference between the first output signal and the second output signal.
US08901850B2 Adaptive anti-glare light system and associated methods
An adaptive anti-glare light system including a sensor, a color selection engine, a controller, and a plurality of light sources each configured to emit a source light. The sensor transmits a source color signal designating a reflected light characterized by a detected color and a discomfort glare rating. The color selection engine determines a dominant wavelength of the detected color, and a combination of the light sources that the controller may operate to emit a combined wavelength that matches the dominant wavelength of the detected color. A method of adapting light as a countermeasure to glare comprises receiving the detected color, determining a subset of the plurality of light sources that may be combined to form an adapted light that matches the detected color, and operating the light sources with a white light to emit the adapted light at or above a threshold discomfort glare level.
US08901847B2 Driving device, light-emitting device and projector
A driving device includes a switching power supply circuit to convert input power to output power; a first switching element which opens and closes a circuit of a load; an output capacitor connected in parallel to the load and the first switching element; a selection switch disposed between the inductor and the output capacitor, the selection switch switching between a first selection state where the load is electrically connected to the inductor and the second selection state where a reference potential portion is electrically connected to the inductor; a timing controller which operates the switching power supply circuit while the first switching element is closed; and a controller which puts the selection switch into the second selection state before the first switching element is closed.
US08901841B2 AC LED dimmer and dimming method thereby
The disclosure relates to an AC LED dimmer and dimming method thereof. The AC LED dimmer includes a rectifier receiving AC voltage from an AC voltage source and full-wave rectifying the AC voltage; a direct current (DC)/DC converter receiving the full-wave rectified voltage from the rectifier, generating a full-wave rectified stepped-up voltage, and generating a pulse enable signal; a pulse width modulation controller receiving the full-wave rectified stepped-up voltage and generating a pulse width modulation signal to dim an AC LED in response to the pulse enable signal; a switch driving the AC LED under control of the pulse width modulation signal, and an electromagnetic interference (EMI) filter to be connected between the AC voltage source and the switch to eliminate electromagnetic interference from the AC voltage source. Accordingly, the dimmer can perform an efficient and linear dimming function and suppress harmonics.
US08901840B2 Lamp ignition system and lamp ignition method
A lamp ignition system and a lamp ignition method are disclosed, where the lamp ignition system includes a converter, a transformer and a driving circuit. The converter converts an input voltage into an operating voltage for a gas discharge lamp. The transformer has a primary winding and a secondary winding, and the secondary winding is connected to the gas discharge lamp in series. The driving circuit is electrically connected to the primary winding for driving the transformer, so that the secondary winding of the transformer can output a high-frequency voltage to ignite the gas discharge lamp.
US08901839B2 Two-switch flyback power supply device
In various embodiments, a two-switch flyback power supply may include a transformer having a primary winding and a secondary winding to feed a load; a pair of electronic switches alternatively switchable on and off to connect the primary winding of said transformer to an input line to feed said primary winding of said transformer, wherein at least one of said electronic switches is an electronic switch having a control electrode floating with respect to ground; a capacitive voltage divider arranged between said input line and the ground of the device, with the dividing point of said capacitive voltage divider connected to an intermediate point of said primary winding of said transformer; and an auxiliary secondary winding in said transformer, said auxiliary secondary winding feeding the control electrode of said at least one of said electronic switches.
US08901835B2 LED lighting systems, LED controllers and LED control methods for a string of LEDS
LED controllers, LED lighting systems and control methods capable of providing an average luminance intensity independent from the variation of an AC voltage. LEDs are divided into LED groups electrically connected in series between a power source and a ground. A disclosed LED controller has path switches, a management center and a line waveform sensor. Each path switch is for coupling a corresponding LED group to the ground. The management center controls the path switches. When turning off an upstream path switch, the management center controls a downstream path switch for a downstream LED group to make the driving current passing the upstream LED group substantially approach a target value. The line waveform sensor is coupled to the power source, sensing the waveform of the input voltage of the power source. The line waveform sensor is configured to decrease the target value when the input voltage increases.
US08901833B2 LED driving circuit preventing light leakage issue
A light emitting diode (LED) driving circuit preventing light leakage issue. The LED driving circuit comprises an LED driver, a driving circuit module and a power supply. When an input voltage is much higher, a high frequency pulse width modulation signal is set to a low level to avoid a light leakage of the LED by turning off a metal oxide semiconductor field effect transistor (MOSFET), such that the input voltage is not limited by the light leakage of the LED. As a result, the input voltage can be increased sufficiently for further reducing a switching loss effectively.
US08901831B2 Constant current pulse-width modulation lighting system and associated methods
A lighting system comprising a constant current power source one or more sets of light emitting elements, and associated circuitry. The light emitting elements may be light emitting diodes (LEDs) that have been selected to emit light having specific wavelengths corresponding to specific colors. The lighting system may selectively control the intensity of each set of LED by utilizing pulse-width modulation. The sets of LEDs may be serially connected and selectively operated independently of each other set of LEDs.
US08901826B2 Light sensing module and calibration method for driving current of light source
A calibration method for a driving current of a light source adapted to sequentially calibrate at least an optical navigation device, each including a light sensing device, a memory unit and a driving unit. The driving unit is electrically connected to the memory unit and a light source configured to receive a reflection light. The calibration method includes steps of: driving the light source to provide a beam through configuring the driving unit to supply a first driving current to the light source; configuring the light sensing device to generate a sensed light value; obtaining a second driving current through modulating the value of the first driving current according to the sensed light value; and recording the value of the second driving current in the memory unit and driving the light source to provide the beam according to the second driving current. A light sensing module is also provided.
US08901825B2 Apparatus and method of energy efficient illumination using received signals
Illumination sources are turned ON and turned OFF in response to detected levels of illumination in an ambient environment reaching respective thresholds, which may be user set. The detection of these turn ON and turn OFF events is verified, for instance against expected events or conditions for the particular location, date and/or time. An alert or log entry may be generated if a detected event or condition appears to be invalid. For instance, if an amount of illumination in the environment is different than predicted by a threshold amount or if a time that the event occurs or is detected is different than expected or predicted by more than a threshold amount. A level of illumination may be decreased to some non-zero level after a specified time after turn ON, and increased at some specified time before turnOFF. Use of information from external sources (e.g., satellites, cell towers) may allow times to be using local time, including daylight savings if applicable.
US08901824B2 Dual-switch current converter
The invention relates to a current converter of the forward converter type for converting a three-phase primary voltage into a plurality of secondary voltages, with a magnetic intermediate circuit including at least three transformer secondary windings, wherein the current converter on its primary side includes at least three transformers with respectively two primary windings wound in opposition directions and respectively at least one secondary winding, and that two electronic switches are provided, wherein the first switch respectively controls a primary winding of the three transformers via a set of diodes and wherein the second switch respectively controls another primary winding of the three transformers via a second set of diodes.
US08901823B2 Light and light sensor
A system of LED-based lights comprises first and second LED-based light having respective first and second electrical connectors configured for engagement with first and second conventional fluorescent fixtures, first and second LEDs configured to produce light in an area when the first and second electrical connectors are engaged with the first and second fixtures and first and second controllers electrically coupled to the first and second LEDs; and one or more sensors operable to detect a brightness level in the area and output respectively one or more signals indicative of the brightness level, wherein: the first and second controllers are configured to control an amount of power provided to the respective first and second LEDs at least partially based on a signal to adjust the light produced in the area towards a desired brightness level.
US08901819B2 Multi-supply sequential logic unit
Described herein are apparatus, method, and system for reducing clock-to-output delay of a sequential logic unit in a processor. The apparatus comprises a sequential unit including: a data path, to receive an input signal, including logic gates to operate on a first power supply level, the data path to generate an output signal; and a clock path including logic gates to operate on a second power supply level, the logic gates of the clock path to sample the input signal using a sampling signal to generate the output signal, wherein the second power supply level is higher than the first power supply level. The apparatus improves (i.e. reduces) setup time of the sequential unit and allows the processor to operate at minimum operating voltage (Vmin) without degrading performance of the sequential unit.
US08901818B2 Spark gap switch for high power ultra-wideband electromagnetic wave radiation for stabilized discharge
A spark gap switch for high power ultra-wideband electromagnetic wave radiation is provided. The spark gap switch includes a casing, electrodes, brackets and an electrode protrusion. Openings are formed in respective opposite ends of the casing. The electrodes are installed in the casing at positions spaced apart from each other in such a way that the electrodes face each other and are disposed inside the openings. The brackets are installed in the respective openings of the casing. The brackets fasten rear ends of the corresponding electrodes to the casing. The electrode protrusion is provided on a central portion of at least either of the electrodes to induce stabilized discharge. The maximum diameter of the electrodes is smaller than the inner diameter of the casing so that the circumferential outer surfaces of the electrodes do not make contact with the circumferential inner surface of the casing.
US08901804B2 Organic EL illumination device and method for manufacturing the same
In an organic EL illumination device (1), a plurality of organic EL elements (4) are provided between an element substrate (30) and a covering substrate (20). A heat dissipation member (14) which covers surfaces of the organic EL elements (4) is provided in a space formed between the element substrate (30) and the covering substrate (20), between each organic EL element (4).
US08901801B2 Multiple electrode plane wave generator
The invention may be embodied as an ultrasonic plane wave generator having a first sheet of piezoelectric material and a second sheet of piezoelectric material. A shared electrode may be between the first sheet and the second sheet. A first electrode set may have a plurality of electrodes, and these electrodes may be positioned with respect to the first sheet to form a set of wave generators. A wave generator in this first wave generator set may include the shared electrode, the first sheet, and one of the electrodes in the first electrode set. A second electrode set may have a plurality of electrodes, and these electrodes may be positioned with respect to the second sheet to form another set of wave generators. A wave generator in this second wave generator set may include the shared electrode, the second sheet, and one of the electrodes in the second electrode set.
US08901794B2 Synchronous machine
A rotor for an electric machine includes a base body and a plurality of support bodies that are fixed on the base body and support permanent magnets. The rotor is characterized in that two first support bodies that are located at a distance from one another form a receiving region for a second support body, allowing the first support body to be positively connected to the second support body.
US08901790B2 Cooling of stator core flange
An approach for cooling a stator core flange is provided. In one aspect, a pair of stator flanges each disposed at opposing ends of a stator core assembly maintains a compressive load on the stator core assembly. Heat transport tubes may be located about at least one of the stator flanges at an end of the stator core assembly to redistribute heat therefrom.
US08901788B2 Electric motor with rotating body and electric device provided therewith
Provided is an electric motor driven by an inverter of PWM method, and devised to retard electrolytic corrosion in a bearing. A rotating body of a rotor comprises an outer iron core configuring an outer peripheral portion of the rotating body, an inner iron core configuring an inner peripheral portion connected to a shaft, a dielectric layer disposed between the outer iron core and the inner iron core, a plurality of insertion holes penetrating the outer iron core in the axial direction, and permanent magnets inserted individually in the plurality of insertion holes. It thus becomes possible to increase impedance of the rotor side (inner ring side of bearing) to approximate it to impedance of the stator side (outer ring side of the bearing) to thereby bring high frequency potentials balanced between the inner ring side and the outer ring side of the bearing, so as to provide the electric motor that retards electrolytic corrosion liable to occur in the bearing, and an electric device equipped with the same.
US08901786B2 Actuator
Actuator having a drive element (16) which can be driven in reaction to electrical operation of a coil device (14), said drive element consisting of a magnetic shape-memory material and being designed to transmit mechanical drive energy to an actuating partner (28), wherein the drive element, which is in the form of an expansion unit (16) and is aligned such that it extends in a drive direction (22), is associated with a pair of laterally adjacent magnetic flux guide elements (18, 20) for a magnetic flux produced by the coil device, such that the magnetic flux is guided between the flux guide elements through the expansion unit and transversely with respect to the drive direction, the coil device (14) being provided such that it is circumferential around the expansion unit (16) which extends axially in the drive direction.
US08901785B2 Electric motor comprising iron core having primary teeth and secondary teeth
An electric motor includes a rotor including an iron core and a plurality of windings, and a stator including a plurality of permanent magnets forming a plurality of poles. The iron core has a plurality of primary teeth around each of which a winding is wound and a plurality of secondary teeth around each of which no winding is wound. The primary teeth and the secondary teeth are formed alternately with each other. The electric motor is configured such that a ratio between the number of poles formed by the permanent magnets of the stator and the number of phases formed by the windings of the rotor is 4m:3n (m and n are any natural numbers, excluding the case where m:n=2:3 is satisfied).
US08901782B2 Display apparatus, power supply apparatus and power supply method thereof
A display apparatus, a power supply apparatus and a power supply method thereof are provided. The display apparatus includes: a signal processor which processes an image signal; a display unit which displays thereon an image corresponding to the processed image signal; and a power supply unit which receives an input of AC power and supplies operating power to the display unit. The power supply unit includes a discharging circuit unit which discharges a remaining voltage of the power supply unit if the input of the AC power is suspended, and does not discharge the voltage if the AC power is input. Accordingly, a remaining voltage from a power supply unit is effectively removed if an input of AC power is suspended, and power consumption does not occur if the AC power is input.
US08901777B2 Wireless power feeding system and wireless power feeding method
A power feeding device which wirelessly supplies power to a power receiver receives a position and resonant frequency detection signal from the power receiver, detects the position and the resonant frequency of the power receiver, and controls the frequency of a power signal to be transmitted to the power receiver on the basis of the information. As the power signal for power transmission, two signals having different frequencies, which are generated using a mixer by mixing a base carrier (a first signal) with a conversion carrier (a second signal) generated on the basis of the resonant frequency, are used.
US08901771B2 Universal irrigation controller power supply
Described herein are systems, methods and apparatuses for providing power to an irrigation controller. In one implementation, an apparatus comprises an alternating current (AC) to direct current (DC) voltage converter configured to convert an input AC voltage into a DC voltage. An AC voltage generator is coupled to the AC to DC voltage converter, wherein the AC voltage generator is configured to generate an output AC voltage using the DC voltage. The AC voltage generator is further coupled to the irrigation controller, and the AC voltage generator is configured to supply the output AC voltage to the irrigation controller.
US08901769B2 Load control system having an energy savings mode
A load control system for a building having a lighting load, a window, and a heating and cooling system comprises a lighting control device for controlling the amount of power delivered to the lighting load, a daylight control device, such as a motorized window treatment, for adjusting the amount of natural light to be admitted through a window, and a temperature control device for controlling a setpoint temperature of the heating and cooling system to thus control a present temperature in the building. The load control system may also comprise a controllable electrical receptacle for turning on and off a plug-in electrical load connected thereto. The lighting control device, the daylight control device, the temperature control device, and the controllable receptacle are controlled so as to decrease a total power consumption of the load control system in response to a received demand response command.
US08901757B2 System and method for converting a gas product derived from electrolysis to electricity
An efficient energy conversion system and method for converting a gas product produced by electrolysis into electricity. The system may include an electrolysis fuel cell, an engine and a generator. In an exemplary embodiment, the generator may be a superconducting generator and may be cooled using a refrigeration system.
US08901751B2 Semiconductor device, electronic device, and semiconductor device manufacturing method
A semiconductor device, includes: a connection member including a first pad formed on a principal surface thereof; a semiconductor chip including a circuit-formed surface on which a second pad is formed, the chip mounted on the connection member so that the circuit-formed surface faces the principal surface; and a solder bump that connects the first and second pads and is made of metal containing Bi and Sn, wherein the bump includes a first interface-layer formed adjacent to the second pad, a second interface-layer formed adjacent to the first pad, a first intermediate region formed adjacent to either one of the interface-layers, and a second intermediate region formed adjacent to the other one of the interface-layers and formed adjacent to the first intermediate region; Bi-concentration in the first intermediate region is higher than a Sn-concentration; and a Sn-concentration in the second intermediate region is higher than a Bi-concentration.
US08901750B2 Semiconductor package including multiple chips and separate groups of leads
Provided is a semiconductor package including multiple semiconductor chips, and separate groups of leads connected to the semiconductor chips. The leads are exposed to the outside of the semiconductor package. The plurality of leads may include a first lead group for a first chip group and a second lead group for a second chip group. The first and second chip groups are part of the package.
US08901748B2 Direct external interconnect for embedded interconnect bridge package
An external direct connection usable for an embedded interconnect bridge package is described. In one example, a package has a substrate, a first semiconductor die having a first bridge interconnect region, and a second semiconductor die having a second bridge interconnect region. The package has a bridge embedded in the substrate, the bridge having a first contact area to connect to the first bridge interconnect region and a second contact area to connect to the second bridge interconnect region, and an external connection rail extending between the interconnect bridge and the first and second semiconductor dies to supply external connection to the first and second bridge interconnect regions.
US08901745B2 Three-dimensional semiconductor devices
A three-dimensional semiconductor device may include a substrate including wiring and contact regions and a thin film structure on the wiring and contact regions of the substrate. The thin-film structure may include a plurality of alternating wiring layers and inter-layer insulating layers defining a terraced structure in the contact region so that each of the wiring layers includes a contact surface in the contact region that extends beyond others of the wiring layers more distant from the substrate. A plurality of contact structures may extend in a direction perpendicular to a surface of the substrate with each of the contact structures being electrically connected to a contact surface of a respective one of the wiring layers. Related methods are also discussed.
US08901744B2 Hybrid copper interconnect structure and method of fabricating same
A hybrid interconnect structure containing copper regions that have different impurities levels within a same opening is provided. In one embodiment, the interconnect structure includes a patterned dielectric material having at least one opening located therein. A dual material liner is located at least on sidewalls of the patterned dielectric material within the at least one opening. The structure further includes a first copper region having a first impurity level located within a bottom region of the at least one opening and a second copper region having a second impurity level located within a top region of the at least one opening and atop the first copper region. In accordance with the present disclosure, the first impurity level of the first copper region is different from the second impurity level of the second copper region.
US08901743B2 Fabrication of semiconductor device including chemical mechanical polishing
A method of fabricating a semiconductor device includes forming a first insulation film over a semiconductor substrate, the semiconductor substrate including an outer region and an inner region located at an inner side of the outer region, forming a first wiring over the first insulation film in the inner region, forming a second insulation film over the first wiring and over the first insulation film, decreasing a film thickness of the second insulation film in the inner region with regard to a film thickness of the second insulation film in the outer region, and polishing the second insulation film after the decreasing of the film thickness of the second insulation film.
US08901740B2 Method of fabricating metal-insulator-semiconductor tunneling contacts using conformal deposition and thermal growth processes
A contact may be fabricated by a method including depositing a dielectric layer on a substrate having a transistor, etching a first opening in the dielectric layer that extends to a source region, forming an insulator on the source region, forming a contact metal on the insulator, the insulator separating the contact metal from the source region, and filling substantially all of the first opening, wherein the contact metal remains separated from the source region after the first opening is filled.
US08901739B2 Embedded chip package, a chip package, and a method for manufacturing an embedded chip package
An embedded chip package is provided. The embedded chip package includes a plurality of chips; encapsulation material embedding the plurality of chips; at least one electrical redistribution layer electrically connected to the plurality of chips; and a common terminal connected to the at least one electrical redistribution layer, wherein the common terminal provides an interface to at least one of transmit and receive a common electrical signal between the plurality of chips and the common terminal.
US08901736B2 Strength of micro-bump joints
A device includes a work piece including a metal bump; and a dielectric layer having a portion directly over the metal bump. The metal bump and a surface of the portion of the dielectric layer form an interface. A metal finish is formed over and contacting the metal bump. The metal finish extends from over the dielectric layer to below the interface.
US08901729B2 Semiconductor package, packaging substrate and fabrication method thereof
A packaging substrate and a semiconductor package using the packaging substrate are provided. The packaging substrate includes: a substrate body having a die attach area, a circuit layer formed around the die attach area and having a plurality of conductive traces each having a wire bonding pad, and a surface treatment layer formed on the wire bonding pads. Therein, only one of the conductive traces is connected to an electroplating line so as to prevent cross-talk that otherwise occurs between conductive traces due to too many electroplating lines in the prior art.
US08901728B2 Method of mounting semiconductor chips, semiconductor device obtained using the method, method of connecting semiconductor chips, three-dimensional structure in which wiring is provided on its surface, and method of producing the same
A three-dimensional structure in which a wiring and a pad part are provided on a surface is provided. A recessed gutter for wiring and a hole for the pad part having a depth that is greater than a thickness of the recessed gutter for wiring are provided on the surface of the three-dimensional structure. The hole for the pad part is provided in succession with the recessed gutter for wiring. At least a part of a wiring conductor is embedded in the recessed gutter for wiring and in the hole for the pad part.
US08901727B2 Semiconductor packages, methods of manufacturing semiconductor packages, and systems including semiconductor packages
A semiconductor package comprises a first semiconductor chip, a second semiconductor chip on the first semiconductor chip, a third semiconductor chip on the second semiconductor chip and a fourth semiconductor chip on the third semiconductor chip. A first underfill layer is positioned between the second semiconductor chip and the first semiconductor chip; a second underfill layer is positioned between the third semiconductor chip and the second semiconductor chip, and a third underfill layer is positioned between the fourth semiconductor chip and the third semiconductor chip. In some embodiments, the second underfill layer comprises a material that is different than the first and third underfill layers.
US08901726B2 Package on package structure and method of manufacturing the same
A package on package structure includes a first substrate having a first region and a second region, a bump formed on the first region of the first substrate, a first semiconductor die bonded to the second region of the first substrate, and a semiconductor die package bonded to the first substrate. The bump includes a metallic structure and a plurality of minor elements dispersed in the metallic structure. The semiconductor die package includes a connector bonded to the bump, and the first semiconductor die is between the semiconductor die package and the first substrate.
US08901715B1 Method for manufacturing a marked single-crystalline substrate and semiconductor device with marking
A method for manufacturing a marked single-crystalline substrate comprises providing a single-crystalline substrate comprising a first material, the single-crystalline substrate having a surface area; forming a marking structure on the surface area of the single-crystalline substrate, wherein the marking structure comprises a first semiconductor material; and depositing a semiconductor layer on the marking structure and at least partially on the surface area of the single-crystalline substrate, wherein the semiconductor layer comprises the second semiconductor material, and wherein the marking structure is buried under the second semiconductor material.
US08901710B2 Interdigitated capacitors with a zero quadratic voltage coefficient of capacitance or zero linear temperature coefficient of capacitance
Disclosed are an interdigitated capacitor and an interdigitated vertical native capacitor, each having a relatively low (e.g., zero) net coefficient of capacitance with respect to a specific parameter. For example, the capacitors can have a zero net linear temperature coefficient of capacitance (Tcc) to limit capacitance variation as a function of temperature or a zero net quadratic voltage coefficient of capacitance (Vcc2) to limit capacitance variation as a function of voltage. In any case, each capacitor can incorporate at least two different plate dielectrics having opposite polarity coefficients of capacitance with respect to the specific parameter due to the types of dielectric materials used and their respective thicknesses. As a result, the different dielectric plates will have opposite effects on the capacitance of the capacitor that cancel each other out such that the capacitor has a zero net coefficient of capacitance with respect to specific parameter.
US08901709B2 Electrical device having movable electrode
A movable electric device includes: a first and second fixed electrodes formed on a support substrate, and having opposing electrode surfaces which are substantially perpendicular to the surface of the support substrate, and define a cavity therebetween; a movable member having a movable electrode having a first end disposed near the first fixed electrode and a second end disposed near the second fixed electrode, and bent spring member continuing from at least one of the first and second ends of the movable electrode, and including part which is bent in thickness direction of the movable electrode; and first and second anchors disposed on the support substrate and supporting the movable member at its opposite ends.
US08901708B2 Yttrium and titanium high-k dielectric films
This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on yttrium and titanium, to have a high dielectric constant and low leakage characteristic and (b) related devices and structures. An oxide layer having both yttrium and titanium may be fabricated either as an amorphous oxide or as an alternating series of monolayers. In several embodiments, the oxide is characterized by a yttrium contribution to total metal that is specifically controlled. The oxide layer can be produced as the result of a reactive process, if desired, via either a PVD process or, alternatively, via an atomic layer deposition process that employs specific precursor materials to allow for a common process temperature window for both titanium and yttrium reactions.
US08901707B2 Capacitor and register of semiconductor device, memory system including the semiconductor device, and method of manufacturing the semiconductor device
A capacitor of a semiconductor device includes a capacitor structure configured to include electrode layers and dielectric layers alternately stacked, edge regions each stepwise patterned, and a central region disposed between the edge regions, sacrificial layers disposed within the respective electrode layers in the edge regions of the capacitor structure, and support plugs formed in the central region of the capacitor structure and configured to penetrate the electrode layers and the dielectric layers.
US08901706B2 Thermally stable high-K tetragonal HFO2 layer within high aspect ratio deep trenches
A trench structure that in one embodiment includes a trench present in a substrate, and a dielectric layer that is continuously present on the sidewalls and base of the trench. The dielectric layer has a dielectric constant that is greater than 30. The dielectric layer is composed of tetragonal phase hafnium oxide with silicon present in the grain boundaries of the tetragonal phase hafnium oxide in an amount ranging from 3 wt. % to 20 wt. %.
US08901704B2 Integrated circuit and manufacturing method thereof
An integrated circuit and a manufacturing method thereof are provided. A chip size can be reduced by forming a memory device in which a ferroelectric capacitor region is laminated on a DRAM. The integrated circuit includes a cell array region having a capacitor, a peripheral circuit region, and a ferroelectric capacitor region being formed on an upper layer of the cell array region and the peripheral circuit region, and having a ferroelectric capacitor device.
US08901703B2 Electronic device
The electronic device comprises a network of at least one thin-film capacitor and at least one inductor on a first side of a substrate of a semiconductor material. The substrate has a resistivity sufficiently high to limit electrical losses of the inductor and being provided with an electrically insulating surface layer on its first side. A first and a second lateral pin diode are defined in the substrate, each of the pin diodes having a doped p-region, a doped n-region and an intermediate intrinsic region. The intrinsic region of the first pin diode is larger than that of the second pin diode.
US08901698B2 Schottky barrier diode and method for manufacturing schottky barrier diode
A method for manufacturing a Schottky barrier diode includes the following steps. First, a GaN substrate is prepared. A GaN layer is formed on the GaN substrate. A Schottky electrode including a first layer made of Ni or Ni alloy and in contact with the GaN layer is formed. The step of forming the Schottky electrode includes a step of forming a metal layer to serve as the Schottky electrode and a step of heat treating the metal layer. A region of the GaN layer in contact with the Schottky electrode has a dislocation density of 1×108 cm−2 or less.
US08901695B2 High efficiency solar cells fabricated by inexpensive PECVD
A photovoltaic device includes one or more layers of a photovoltaic stack formed on a substrate by employing a high deposition rate plasma enhanced chemical vapor deposition (HDR PECVD) process. Contacts are formed on the photovoltaic stack to provide a photovoltaic cell. Reduced defect zones are disposed adjacent to contact regions in portions of the photovoltaic cell and are formed by an anneal configured to improve overall performance.
US08901694B2 Optical input/output device and method of fabricating the same
An optical input/output (I/O) device is provided. The device includes a substrate including an upper trench; a waveguide disposed within the upper trench of the substrate; a photodetector disposed within the upper trench of the substrate and comprising a first end surface optically connected to an end surface of the waveguide; and a light-transmitting insulating layer interposed between the end surface of the waveguide and the first end surface of the photodetector.
US08901685B2 Magnetic materials having superparamagnetic particles
Magnetic materials and uses thereof are provided. In one aspect, a magnetic film is provided. The magnetic film comprises superparamagnetic particles on at least one surface thereof. The magnetic film may be patterned and may comprise a ferromagnetic material. The superparamagnetic particles may be coated with a non-magnetic polymer and/or embedded in a non-magnetic host material. The magnetic film may have increased damping and/or decreased coercivity.
US08901684B2 Manufacturing method for a micromechanical component, corresponding composite component, and corresponding micromechanical component
A micromechanical component including a first composite of a plurality of semiconductor chips, the first composite having a first front and back surfaces, a second composite of a corresponding plurality of carrier substrates, the second composite having a second front and back surfaces; wherein the first front surface and the second front surface are connected via a structured adhesion promoter layer in such a way that each semiconductor chip is connected, essentially free of cavities, to a corresponding carrier substrate corresponding to a respective micromechanical component.
US08901683B2 Micro electro mechanical system (MEMS) microphone and fabrication method thereof
Provided is a structure for improving performance of a micro electro mechanical system (MEMS) microphone by preventing deformation from occurring due to a residual stress and a package stress of a membrane and by decreasing membrane rigidity. A MEMS microphone according to the present disclosure includes a backplate formed on a substrate; an insulating layer formed on the substrate to surround the backplate; a membrane formed to be separate from above the backplate by a predetermined interval; a membrane supporting portion configured to connect the membrane to the substrate; and a buffering portion formed in a double spring structure between the membrane and the membrane supporting portion.
US08901682B2 Acoustic transducers with perforated membranes
A MEMS device, such as a microphone, uses a perforated plate. The plate comprises an array of holes across the plate area. The plate has an area formed as a grid of polygonal cells, wherein each cell comprises a line of material following a path around the polygon thereby defining an opening in the center. In one aspect, the line of material forms a path along each side of the polygon which forms a track which extends at least once inwardly from the polygon perimeter towards the center of the polygon and back outwardly to the polygon perimeter. This defines a meandering hexagon side wall, which functions as a local spring suspension.
US08901679B2 Micromechanical structure, in particular sensor arrangement, and corresponding operating method
A micromechanical structure, in particular a sensor arrangement, includes at least one micromechanical functional layer, a CMOS substrate region arranged below the at least one micromechanical functional layer, and an arrangement of one or more contact elements. The CMOS substrate region has at least one configurable circuit arrangement. The arrangement of one or more contact elements is arranged between the at least one micromechanical functional layer and the CMOS substrate region and is electrically connected to the micromechanical functional layer and the circuit arrangement. The configurable circuit arrangement is designed in such a way that the one or more contact elements are configured to be selectively connected to electrical connection lines in the CMOS substrate region.
US08901678B2 Light-assisted biochemical sensor
A light-assisted biochemical sensor based on a light addressable potentiometric sensor is disclosed. The light-assisted biochemical sensor comprises a semiconductor substrate and a sensing layer, which are used to detect the specific ion concentration or the biological substance concentration of a detected solution. Lighting elements fabricated directly on the back surface of the semiconductor substrate directly illuminate the light to the semiconductor substrate, so as to enhance the photoconduction property of the semiconductor substrate. And then, the hysteresis and the sensing sensitivity of the light-assisted biochemical sensor are respectively reduced and improved. In addition, due to its characteristics of integration, the light-assisted biochemical sensor not only reduces the fabrication cost but also has portable properties and real-time detectable properties. As a result, its detection range and the application range are wider.
US08901676B2 Lateral extended drain metal oxide semiconductor field effect transistor (LEDMOSFET) having a high drain-to-body breakdown voltage (Vb), a method of forming an LEDMOSFET, and a silicon-controlled rectifier (SCR) incorporating a complementary pair of LEDMOSFETs
Disclosed are embodiments of a lateral, extended drain, metal oxide semiconductor, field effect transistor (LEDMOSFET) having a high drain-to-body breakdown voltage. Discrete conductive field (CF) plates are adjacent to opposing sides of the drain drift region, each having an angled sidewall such that the area between the drain drift region and the CF plate has a continuously increasing width along the length of the drain drift region from the channel region to the drain region. The CF plates can comprise polysilicon or metal structures or dopant implant regions within the same semiconductor body as the drain drift region. The areas between the CF plates and the drain drift region can comprise tapered dielectric regions or, alternatively, tapered depletion regions within the same semiconductor body as the drain drift region. Also disclosed are embodiments of a method for forming an LEDMOSFET and embodiments of a silicon-controlled rectifier (SCR) incorporating such LEDMOSFETs.
US08901674B2 Scaling of metal gate with aluminum containing metal layer for threshold voltage shift
A method of forming a p-type semiconductor device is provided, which in one embodiment employs an aluminum containing threshold voltage shift layer to produce a threshold voltage shift towards the valence band of the p-type semiconductor device. The method of forming the p-type semiconductor device may include forming a gate structure on a substrate, in which the gate structure includes a gate dielectric layer in contact with the substrate, an aluminum containing threshold voltage shift layer present on the gate dielectric layer, and a metal containing layer in contact with at least one of the aluminum containing threshold voltage shift layer and the gate dielectric layer. P-type source and drain regions may be formed in the substrate adjacent to the portion of the substrate on which the gate structure is present. A p-type semiconductor device provided by the above-described method is also provided.
US08901671B2 Scalable construction for lateral semiconductor components having high current-carrying capacity
The invention relates to semiconductor components, in particular to a scalable construction for lateral semiconductor components having high current-carrying capacity. A transistor cell according to the invention comprises a control electrode (203), a plurality of source fields (201) and a plurality of drain fields (202). The control electrode completely encloses at least one of the source fields or drain fields. A transistor according to the invention comprises a plurality of transistor cells on a substrate, each of which comprises a source contact field (206) and/or a drain contact field (207). The source contact fields are conductively connected to each other on the other side of the substrate and the drain contact fields are likewise conductively connected to each other on the other side of the substrate. The method according to the invention for producing a transistor comprises the following steps: providing a substrate; forming a plurality of transistor cells on the substrate, each of which comprises a control electrode, a plurality of source fields and a plurality of drain fields; conductively connecting the control electrodes to each other; forming a source contact field and/or a drain contact field in each transistor cell; conductively connecting the source contact fields of each transistor cell to a source contact field; conductively connecting the drain fields of each transistor cell to a drain contact field; forming at least one bump (208) on each of the source contact fields and on each of the drain contact fields; providing a circuit board; conductively connecting the bumps of the source contact fields to each other by means of conductive tracks on the circuit board; and conductively connecting the bumps of the drain contact fields to each other by means of conductive tracks on the circuit board. The arrangement of the bumps and the conductive tracks on the circuit board makes a low semiconductor surface assignment by wiring possible. The arrangement according to the invention of the source fields, drain fields and control electrodes relative to the bumps makes a low heat resistance possible between the active transistor regions and the bumps.
US08901669B2 Method of manufacturing an IC comprising a plurality of bipolar transistors and IC comprising a plurality of bipolar transistors
A method of manufacturing an integrated circuit comprising bipolar transistors including first and second type bipolar transistors, the method comprising providing a substrate comprising first isolation regions each separated from a second isolation region by an active region comprising a collector impurity of one of the bipolar transistors; forming a base layer stack over the substrate; forming a first emitter cap layer of a first effective thickness over the base layer stack in the areas of the first type bipolar transistor; forming a second emitter cap layer of a second effective thickness different from the first effective thickness over the base layer stack in the areas of the second type bipolar transistor; and forming an emitter over the emitter cap layer of each of the bipolar transistors. An IC in accordance with this method.
US08901668B2 Semiconductor device having insulating film with different stress levels in adjacent regions and manufacturing method thereof
An n-channel MISFETQn is formed in an nMIS first formation region of a semiconductor substrate and a p-channel MISFETQp is formed in an adjacent pMIS second formation region of the semiconductor substrate. A silicon nitride film having a tensile stress is formed to cover the n-channel MISFETQn and the p-channel MISFETQp. In one embodiment, the silicon nitride film in the nMIS formation region and the pMIS formation region is irradiated with ultraviolet rays. Thereafter, a mask layer is formed to cover the silicon nitride film in the nMIS formation region and to expose the silicon nitride film in the pMIS formation region. The silicon nitride film in the pMIS formation region is then subjected to plasma processing, which relieves the tensile stress of the silicon nitride film in the pMIS formation region.
US08901666B1 Semiconducting graphene structures, methods of forming such structures and semiconductor devices including such structures
A semiconducting graphene structure may include a graphene material and a graphene-lattice matching material over at least a portion of the graphene material, wherein the graphene-lattice matching material has a lattice constant within about ±5% of a multiple of the lattice constant or bond length of the graphene material. The semiconducting graphene structure may have an energy band gap of at least about 0.5 eV. A method of modifying an energy band gap of a graphene material may include forming a graphene-lattice matching material over at least a portion of a graphene material, the graphene-lattice matching material having a lattice constant within about ±5% of a multiple of the lattice constant or bond length of the graphene material.
US08901662B2 CMOS structures and methods for improving yield
A simple, effective and economical method to improved the yield of CMOS devices using contact etching stopper liner, including, single neutral stressed liner, single stressed liner and dual stress liner (DSL), technology is provided. In order to improve the chip yield, the present invention provides a method in which a sputter etching process is employed to smooth/flatten (i.e., thin) the top surface of the contact etch stopper liners. When DSL technology is used, the inventive sputter etching process is used to reduce the complexity caused by DSL boundaries to smooth/flatten top surface of the DSL, which results in significant yield increase. The present invention also provides a semiconductor structure including at least one etched liner.
US08901660B2 Semiconductor structure and fault location detecting system
A semiconductor structure includes a grounding unit, a P-type substrate, a P-type well area, an NMOS structure, a P-type well contact area, a shallow trench isolation structure, and a charge guiding groove. The P-type substrate is formed above the grounding unit. The P-type well area is formed on the P-type substrate. The NMOS structure is formed on the P-type well area, and the NMOS structure includes at least one exposed N-type source area, at least one exposed N-type drain area, and at least one exposed N-type gate area. The P-type well contact area is formed on the P-type well area. The shallow trench isolation structure is disposed between the NMOS structure and the P-type well contact area. The charge guiding groove passes through the P-type well contact area and one part of the P-type well area and is electrically connected with the grounding unit.
US08901659B2 Tapered nanowire structure with reduced off current
Non-planar semiconductor devices including at least one semiconductor nanowire having a tapered profile which widens from the source side of the device towards the drain side of the device are provided which have reduced gate to drain coupling and therefore reduced gate induced drain tunneling currents.
US08901654B1 Semiconductor-on-insulator (SOI) field effect transistor with buried epitaxial active regions
A material stack including a semiconductor channel portion, a gate dielectric, a gate electrode, and a gate cap dielectric portion is formed on an insulator layer. The material stack is laterally enclosed by a dielectric spacer including a dielectric material that is different from the dielectric material of the insulator layer. The material stack and the dielectric spacer are undercut by an isotropic etch that removes the material of the insulator layer selective to the material of the dielectric spacer. A selective epitaxy process is employed to deposit a doped semiconductor material, which forms a source region and a drain region that are epitaxially in contact with the semiconductor channel portion. Metal semiconductor alloy portions can be formed on the source region and the drain region.
US08901652B2 Power MOSFET comprising a plurality of columnar structures defining the charge balancing region
An embodiment of a semiconductor structure for a power device integrated on a semiconductor substrate, of a first type of conductivity, and comprising:—an epitaxial layer, of said first type of conductivity, made on said semiconductor substrate, and having a plurality of column structures, of a second type of conductivity, to define a charge balancing region;—an active surface layer made on said epitaxial layer for housing a plurality of active regions; said epitaxial layer comprising a semiconductor separating layer arranged between the charge balancing region and the active surface layer, said semiconductor separating layer decoupling said column structures from said active regions.
US08901650B2 Semiconductor device, and manufacturing method for same
A semiconductor device of the present invention includes an n-channel first thin film transistor and a p-channel second thin film transistor on one and the same substrate. The first thin film transistor has a first semiconductor layer (27), and the second thin film transistor has a second semiconductor layer (22). The first semiconductor layer (27) and the second semiconductor layer (22) are formed from one and the same film. Each of the first semiconductor layer (27) and the second semiconductor layer (22) has a slope portion (27e, 22e) positioned in the periphery and a main portion (27m, 22m) which is a portion excluding the slope portion. A p-type impurity is introduced into only a part of the slope portion (27e) of the first semiconductor layer with higher density than the main portion (27m) of the first semiconductor layer, the main portion (22m) of the second semiconductor layer, and the slope portion (22e) of the second semiconductor layer. Accordingly, a driving voltage of the semiconductor device provided with the n-type TFT and the p-type TFT can be reduced.
US08901646B2 Semiconductor device
A semiconductor device may include a substrate including an active region defined by a device isolation layer, gate electrodes extending in a first direction on the substrate and spaced apart from each other, gate tabs extending in a second direction different from the first direction and connecting adjacent gate electrodes to each other, the gate tabs spaced apart from each other, and a first contact plug disposed on the active region under a space confined by the adjacent gate electrodes and adjacent gate tabs. The space may include a first region having a first width and a second region having a second width smaller than the first width, the first contact plug may be disposed on the active region under the second region.
US08901643B2 Semiconductor device and method of manufacturing the same
A semiconductor device includes a channel region extending in a vertical direction perpendicular to a substrate and having a nitrogen concentration distribution, a plurality of gate electrodes arranged on a side wall of the channel region and separated from each other in a vertical direction, and a gate dielectric layer disposed between the channel region and the gate electrodes. The nitrogen concentration distribution has a first concentration near an interface between the channel region and the gate dielectric layer.
US08901642B2 Charge compensation semiconductor device
A semiconductor device includes a semiconductor body having a first surface defining a vertical direction and a source metallization arranged on the first surface. In a vertical cross-section the semiconductor body further includes: a drift region of a first conductivity type; at least two compensation regions of a second conductivity type each of which forms a pn-junction with the drift region and is in low resistive electric connection with the source metallization; a drain region of the first conductivity type having a maximum doping concentration higher than a maximum doping concentration of the drift region, and a third semiconductor layer of the first conductivity type arranged between the drift region and the drain region and includes at least one of a floating field plate and a floating semiconductor region of the second conductivity type forming a pn-junction with the third semiconductor layer.
US08901639B2 Monolithic bidirectional silicon carbide switching devices
A monolithic bidirectional switching device includes a drift layer having a first conductivity type and having an upper surface, and first and second vertical metal-oxide semiconductor (MOS) structures at the upper surface of the drift layer. The drift layer provides a common drain for the first and second vertical MOS structures. The first and second vertical MOS structures are protected by respective first and second edge termination structures at the upper surface of the drift layer. A monolithic bidirectional switching device according to further embodiments includes a vertical MOS structure at the upper surface of the drift layer, and a diode at the upper surface of the drift layer. The drift layer provides a drain for the vertical MOS structure and a cathode for the diode, and the vertical MOS structure and the diode are protected by respective first and second edge termination structures.
US08901635B2 Semiconductor memory device and method for manufacturing the same
According to one embodiment, a semiconductor memory device includes a stacked body, a semiconductor pillar, an insulating film, and a charge storage film. The stacked body includes a plurality of electrode films stacked with an inter-layer insulating film provided between the electrode films. The semiconductor pillar pierces the stacked body. The insulating film is provided between the semiconductor pillar and the electrode films on an outer side of the semiconductor pillar with a gap interposed. The charge storage film is provided between the insulating film and the electrode films. The semiconductor pillar includes germanium. An upper end portion of the semiconductor pillar is supported by an interconnect provided above the stacked body.
US08901634B2 Nonvolatile memory cells with a vertical selection gate of variable depth
The disclosure relates to an integrated circuit comprising at least two memory cells formed in a semiconductor substrate, and a buried gate common to the selection transistors of the memory cells. The buried gate has a first section of a first depth extending in front of vertical channel regions of the selection transistors, and at least a second section of a second depth greater than the first depth penetrating into a buried source line. The lower side of the buried gate is bordered by a doped region forming a source region of the selection transistors and reaching the buried source line at the level where the second section of the buried gate penetrates into the buried source line, whereby the source region is coupled to the buried source line.
US08901627B2 Jog design in integrated circuits
A device includes an active region in a semiconductor substrate, a gate strip over and crossing the active region, and a jog over the active region and connected to the gate strip to form a continuous region. The jog is on a side of the gate strip. A first contact plug is at a same level as the gate strip, wherein the first contact plug is on the side of the gate strip. A second contact plug is over the jog and the first contact plug. The second contact plug electrically interconnects the first contact plug and the jog.
US08901622B2 Semiconductor device and method for fabricating the same
A semiconductor device according to an embodiment includes a semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type, a first semiconductor region of a second conductivity type, a second semiconductor region of the second conductivity type, a first electrode and a second electrode. The first semiconductor region is formed on at least a part of the first semiconductor layer formed on the semiconductor substrate. The second semiconductor region is formed on another part of the first semiconductor layer to reach an inside of the first semiconductor layer and having an impurity concentration higher than that of the first semiconductor region. The first electrode is formed on the second semiconductor region and a third semiconductor regions formed in a part of the first semiconductor region. The second electrode is formed to be in contact with a rear surface of the semiconductor substrate.
US08901615B2 N-channel and P-channel end-to-end finfet cell architecture
A finFET block architecture uses end-to-end finFET blocks. A first set of semiconductor fins having a first conductivity type and a second set of semiconductor fins having a second conductivity type can be aligned end-to-end. An inter-block isolation structure separates the semiconductor fins in the first and second sets. The ends of the fins in the first set are proximal to a first side of the inter-block isolation structure and ends of the fins in the second set are proximal to a second side of the inter-block isolation structure. A patterned gate conductor layer includes a first gate conductor extending across at least one fin in the first set of semiconductor fins, and a second gate conductor extending across at least one fin in the second set of semiconductor fins. The first and second gate conductors are connected by an inter-block conductor.
US08901614B2 Location-related adjustment of the operating temperature distribution or power distribution of a semiconductor power component, and component for carrying out said method
Described is a method for adjusting an operating temperature of MOS power components composed of a plurality of identical individual cells and a component for carrying out the method. As a characteristic feature, the gate electrode network (4) of the active chip region is subdivided into several gate electrode network sectors (B1, B2, B3) which are electrically isolated from one another by means of isolating points and to each of which a different gate voltage is fed via corresponding contacts.
US08901606B2 Pseudomorphic high electron mobility transistor (pHEMT) comprising low temperature buffer layer
A pseudomorphic high electron mobility transistor (pHEMT) comprises: a substrate comprising a Group III-V semiconductor material; buffer layer disposed over the substrate; and a channel layer disposed over the buffer layer. The buffer layer comprises microprecipitates of a Group V semiconductor element. A method of fabricating a pHEMT is also described.
US08901597B2 Light emitting device and light emitting device package having the same
Disclosed are a light emitting device and a light emitting device package having the same. The light emitting device includes a light emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer interposed between the first conductive semiconductor layer and the second conductive semiconductor layer, an electrode electrically connected to the first conductive semiconductor layer, a reflective layer under the second conductive semiconductor layer, a protective layer disposed around a lower surface of the second conductive semiconductor layer, and a buffer layer disposed on at least one of top and lower surfaces of the protective layer.
US08901594B2 Organic EL display panel and method for manufacturing same
The present invention provides an organic EL display panel, which has excellent display qualities with no luminance unevenness and emission color unevenness. The present invention provides the organic EL display panel, which has: a TFT panel having an effective light emitting region (L), which is positioned at a center portion, and a dummy region (D), which is positioned at an outer circumferential portion so as to surround the effective light emitting region (L); a plurality of light emitting elements, which are disposed in the effective light emitting region (L); and a plurality of non-light emitting elements, which are disposed in the dummy region (D). A non-light emitting element among the non-light emitting elements, said non-light emitting element being adjacent to the effective light emitting region (L), also has a dummy hole that is provided in the TFT panel.
US08901591B2 Light-emitting device
There is realized a light-emitting device that emits, with high efficiency, white light with excellent color rendering index. A light-emitting device (1) of the present invention is a light-emitting device (1) for emitting white light, including at least a light-emitting element (2) for emitting blue light, an orange fluorescent material (13) which absorbs the blue light so as to emit orange light, and a green fluorescent material (14) which absorbs the blue light so as to emit green light, the orange fluorescent material (13) being a Ce-activated CaAlSiN3 fluorescent material in a solid solution crystal form in which Ce and oxygen are dissolved in a crystal having a composition of cCaAlSiN3.(1−c)LiSi2N3 where 0.2≦c≦0.8, and the orange fluorescent material (13) containing 2 weight % or more of Ce.
US08901589B2 Semiconductor structure
A semiconductor structure includes a first semiconductor layer, an active layer, a second semiconductor layer, a first optical symmetric layer, a metallic layer, and a second optical symmetric layer stacked in that sequence. A first effective refractive index n1 of the second optical symmetric layer, a second effective refractive index n2 of an integrated structure satisfy |n1−n2|≦0.5, wherein the integrated structure includes the substrate, the first semiconductor layer, the active layer, the second semiconductor layer, and the first optical symmetric layer.
US08901586B2 Light emitting device and method of manufacturing the same
Disclosed are a light emitting device and a method of manufacturing the same. The light emitting device includes a substrate; a light emitting structure disposed on the substrate and having a stack structure in which a first conductivity type semiconductor layer, an active layer and a second conductivity type semiconductor layer are stacked; a lens disposed on the light emitting structure; and a first terminal portion and a second terminal portion electrically connected to the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, respectively. At least one of the first and second terminal portions extends from a top surface of the light emitting structure along respective side surfaces of the light emitting structure and the substrate.
US08901585B2 Multiple component solid state white light
A white light emitting lamp is disclosed comprising a solid state ultra violet (UV) emitter that emits light in the UV wavelength spectrum. A conversion material is arranged to absorb at least some of the light emitting from the UV emitter and re-emit light at one or more different wavelengths of light. One or more complimentary solid state emitters are included that emit at different wavelengths of light than the UV emitter and the conversion material. The lamp emits a white light combination of light emitted from the complimentary emitters and from the conversion material, with the white light having high efficacy and good color rendering. Other embodiments of white light emitting lamp according to the present invention comprises a solid state laser instead of a UV emitter. A high flux white emitting lamp embodiment according to the invention comprises a large area light emitting diode (LED) that emits light at a first wavelength spectrum and includes a conversion material. A plurality of complimentary solid state emitters surround the large area LED, with each emitter emitting light in a spectrum different from the large area LED and conversion material such that the lamp emits a balanced white light. Scattering particles can be included in each of the embodiments to scatter the light from the emitters, conversion material and complimentary emitters to provide a more uniform emission.
US08901581B2 Semiconductor light emitting device having multi-cell array and manufacturing method thereof, light emitting module, and illumination apparatus
A semiconductor light emitting device includes a substrate and a plurality of light emitting cells disposed on the substrate. Each light emitting cell includes first and second conductive semiconductor layers having an active layer formed therebetween, and first and second electrodes formed on the first and second layers. A first insulation layer is formed on portions of the light emitting cell, while a second insulation layer entirely covers at least one light emitting cell. A method of manufacturing the semiconductor light emitting device, and a light emitting module and an illumination apparatus including the semiconductor light emitting device are also provided.
US08901579B2 Organic light emitting diode and method of manufacturing
Aspects of the present disclosure provide for manufacturing an organic light emitting diode (OLED) by forming two terminals of the OLED on two substrates of the display, and then depositing a plurality of layers of the OLED on one or both of the two terminals to form a first portion and a second portion of the OLED on each substrate. The two portions are joined together to form an assembled OLED. The deposition of the two portions can be stopped with each portion having approximately half of a common layer exposed. The two portions can then be aligned to be joined together and an annealing process can be employed to join together the two parts of the common layer and thereby form the OLED.
US08901576B2 Silicon photonics wafer using standard silicon-on-insulator processes through substrate removal or transfer
Processing for a silicon photonics wafer is provided. A silicon photonics wafer that includes an active silicon photonics layer, a thin buried oxide layer, and a silicon substrate is received. The thin buried oxide layer is located between the active silicon photonics layer and the silicon substrate. An electrical CMOS wafer that includes an active electrical layer is also received. The active silicon photonics layer of the silicon photonics wafer is flip chip bonded to the active electrical layer of the electrical CMOS wafer. The silicon substrate is removed exposing a backside surface of the thin buried oxide layer. A low-optical refractive index backing wafer is added to the exposed backside surface of the thin buried oxide layer. The low-optical refractive index backing wafer is a glass substrate or silicon substrate wafer. The silicon substrate wafer includes a thick oxide layer that is attached to the thin buried oxide layer.
US08901574B2 Light emitting diodes
A LED includes a red light emitting unit, a green light emitting unit, a blue light emitting unit, and an optical grating located on a same plane. The red light emitting unit, the green light emitting unit and the blue light emitting unit are located around the optical grating. Each light emitting unit includes a first substrate, a first semiconductor layer, an first active layer, a second semiconductor layer and a first reflector layer stacked in that order. The optical grating includes a second substrate, a first semiconductor layer, an active layer, and a second semiconductor layer stacked in that order. The second substrate and the three first substrates are a continuous integrated substrate structure.
US08901570B2 Epitaxial silicon carbide single crystal substrate and process for producing the same
Provided is an epitaxial silicon carbide single-crystal substrate in which a silicon carbide epitaxial film having excellent in-plane uniformity of doping density is disposed on a silicon carbide single-crystal substrate having an off angle that is between 1° to 6°. The epitaxial film is grown by repeating a dope layer that is 0.5 μm or less and a non-dope layer that is 0.1 μm or less. The dope layer is formed with the ratio of the number of carbon atoms to the number of silicon atoms (C/Si ratio) in a material gas being 1.5 to 2.0, and the non-dope layer is formed with the C/Si ratio being 0.5 or more but less than 1.5. The resulting epitaxial silicon carbide single-crystal substrate comprises a high-quality silicon carbide epitaxial film, which has excellent in-plane uniformity of doping density, on a silicon carbide single-crystal substrate having a small off angle.
US08901567B2 Semiconductor device and manufacturing method thereof
An object of the invention is to reduce an area occupied by a capacitor in a circuit in a semiconductor device, and to downsize a semiconductor device on which the capacitor and an organic memory are mounted. The organic memory and the capacitor, included in a peripheral circuit, in which the same material as the layer containing the organic compound used for the organic memory is used as a dielectric, are used. The peripheral circuit here means a circuit having at least a capacitor such as a resonance circuit, a power supply circuit, a boosting circuit, a DA converter, or a protective circuit. Further, a capacitor in which a semiconductor is used as a dielectric may be provided over the same substrate as well as the capacitor in which the same material as the layer containing the organic compound is used as a dielectric. In this case, it is desirable that the capacitor in which the same material as the layer containing the organic compound is used as a dielectric and the capacitor in which the semiconductor is used as a dielectric are connected to each other in parallel.
US08901564B2 Array substrate and method of manufacturing the same
An array substrate includes a base substrate and a contact part. The contact part is disposed on the base substrate. The contact part includes a first metal pattern, a disconnection control pattern and a connecting pattern. The second metal pattern is disposed on a layer different from the first metal pattern, the disconnection control pattern overlaps a side surface of the second metal pattern and a connecting pattern is formed on the first and second metal patterns and the disconnection control pattern and connects the first metal pattern with the second metal pattern.
US08901555B2 Light sensing device
A light sensing device is disclosed. The light sensing device includes a first light sensor and a second light sensor. The first light sensor formed on a substrate includes a first metal oxide semiconductor layer for absorbing a first light having a first waveband. The second light sensor formed on the substrate includes a second metal oxide semiconductor layer and an organic light-sensitive layer on the second metal oxide semiconductor layer for absorbing a second light having a second waveband.
US08901554B2 Semiconductor device including channel formation region including oxide semiconductor
A first insulating film in contact with an oxide semiconductor film and a second insulating film are stacked in this order over an electrode film of a transistor including the oxide semiconductor film, an etching mask is formed over the second insulating film, an opening portion exposing the electrode film is formed by etching a portion of the first insulating film and a portion of the second insulating film, the opening portion exposing the electrode film is exposed to argon plasma, the etching mask is removed, and a conductive film is formed in the opening portion exposing the electrode film. The first insulating film is an insulating film whose oxygen is partly released by heating. The second insulating film is less easily etched than the first insulating film and has a lower gas-permeability than the first insulating film.
US08901550B2 Organic light-emitting display apparatus and method of manufacturing the same
An organic light-emitting display apparatus includes an active layer of a thin film transistor (TFT), a gate electrode including a transparent conductive material or a metal that on the active layer, a first insulating layer on the substrate, source and drain electrodes electrically connected to the active layer, a second insulating layer between the gate electrode and the source and drain electrodes, a first conductive layer of a transparent conductive material on the first insulating layer, a second conductive layer on the first conductive layer, the second conductive layer being a metal, a third conductive layer on the second conductive layer, the third conductive layer being made of a same material as the source and drain electrodes, and being connected to the first conductive layer; and a protection layer that includes a transparent conductive oxide, the protection layer being on the third conductive layer.
US08901549B2 Organic light emitting diode touch display panel
The present invention provides an organic light emitting diode touch display panel including a substrate, a plurality of first electrodes and a plurality of second electrodes disposed on the substrate, a plurality of light emitting layers, a plurality of dielectric layers, a plurality of first electrode stripes, and a plurality of second stripes. Each light emitting layer is disposed on each first electrode, and each dielectric layer is disposed on each second electrode. Each first electrode stripe is disposed on the light emitting layers in each row, and each second electrode stripe is disposed on the dielectric layers in each row. Each first electrode, each light emitting layer and each first electrode stripe form an organic light emitting diode, and each second electrode, each dielectric layer and each second electrode stripe form a touch sensing capacitor.
US08901546B2 Organic light-emitting panel, manufacturing method thereof, and organic display device
A pixel in the panel includes sub-pixels 100a, 100b, and 100c. The sub-pixel 100a is defined by banks 105a and 105b. The sub-pixel 100b is defined by banks 105b and 105c. The sub-pixel 100c is defined by banks 105c and 105d. Organic light-emitting layers are formed in sub-pixels by, for each pixel, applying ink to the sub-pixels 100a, 100b, and 100c in the stated order and drying the applied ink. With regard to a sidewall 105aa of the bank 105a, sidewalls 105ba and 105bb of the bank 105b, and a sidewall 105cb of the bank 105c, inclination angles of the sidewalls satisfy relationships: inclination angle θaa and inclination angle θba are equal, and inclination angle θcb is larger than inclination angle θbb.
US08901542B2 Stilbene derivatives, light-emitting element and light-emitting device
The present invention provides a novel substance having an excellent color purity of blue, a light-emitting element and a light-emitting device using the novel substance. A stilbene derivative has a structure shown by the general formula (1). In the general formula (1), R1 is hydrogen, an alkyl group having 1 to 4 carbon atoms, or an aryl group having 6 to 25 carbon atoms. R2 is an alkyl group having 1 to 4 carbon atoms or an aryl group having 6 to 25 carbon atoms. Each of R3 to R5 is hydrogen or an alkyl group having 1 to 4 carbon atoms. Ar1 is an aryl group having 6 to 25 carbon atoms.
US08901541B2 Photoelectric conversion device and image pick-up device
A photoelectric conversion device includes a semiconductor substrate, an insulating layer provided on the semiconductor substrate, an electrode provided on the insulating layer, a photoelectric conversion film provided on the electrode for converting received light to charges, a line connected between the electrode and the semiconductor substrate, a first planar electrode provided in the insulating layer and connected to the electrode, and a second planar electrode provided in the insulating layer between the first planar electrode and the semiconductor substrate.
US08901540B2 Fused ring compounds useful in organic thin-film transistors
A compound for an organic thin film transistor having a structure represented by the following formula (1): wherein R1 and R2, and R3 and R4 are respectively combined with each other to form an aromatic hydrocarbon ring having 6 to 60 carbon atoms or an aromatic heterocyclic ring having 3 to 60 carbon atoms; the ring being fused to the ring to which the groups are bonded, whereby the structure of the formula (1) has 5 or more aromatic rings that are fused; and the fused rings formed by R1 and R2, and R3 and R4 each may have a substituent.
US08901536B2 Transistor having graphene base
A transistor device having a graphene base for the transport of electrons into a collector is provided. The transistor consists of a heterostructure comprising an electron emitter, an electron collector, and a graphene material base layer consisting of one or more sheets of graphene situated between the emitter and the collector. The transistor also can further include an emitter transition layer at the emitter interface with the base and/or a collector transition layer at the base interface with the collector. The electrons injected into the graphene material base layer can be “hot electrons” having an energy E substantially greater than EF, the Fermi energy in the graphene material base layer or can be “non-hot electrons” having an energy E approximately equal to than EF. The electrons can have the properties of ballistic transit through the base layer.
US08901529B2 Memory array with self-aligned epitaxially grown memory elements and annular FET
A system and method for fabricating a memory array device. An example memory array device includes a plurality of memory cells, each including a FET over a substrate and a memory element over the FET. Each memory element includes a plurality of epitaxially grown memory element layers. The memory array device includes a plurality of gate conductors configured a first axis, in parallel. Each gate conductor laterally surrounds a plurality of FETs of the memory cells along the first axis. The memory array device includes a plurality of bit lines configured along a second axis, in parallel, and electrically coupled to a plurality of memory elements along the second axis. Embodiments of the memory array preserve alignment of crystal lattices beginning from the bottom layers in the FET up to the top active layers in memory element, thus preserving crystal lattice alignment between transistor and memory element.
US08901524B2 Extreme ultraviolet light source apparatus
An extreme ultraviolet light source apparatus generating an extreme ultraviolet light from plasma generated by irradiating a target material with a laser light within a chamber, and controlling a flow of ions generated together with the extreme ultraviolet light using a magnetic field or an electric field, the extreme ultraviolet light source apparatus comprises an ion collector device collecting the ion via an aperture arranged at a side of the chamber, and an interrupting mechanism interrupting movement of a sputtered particle in a direction toward the aperture, the sputtered particle generated at an ion collision surface collided with the ion in the ion collector device.
US08901523B1 Apparatus for protecting EUV optical elements
Apparatus having a chamber with an interior wall and a region within the chamber from which a contaminating material emanates when the apparatus is in operation. A plurality of vanes is positioned on a portion of the interior wall, each of the vanes having a first surface which is oriented along a direction between the vane and the region and a second surface adjacent the first surface which is oriented to deflect the contaminating material striking the second surface away from the region, the second surfaces being dimensioned and juxtaposed with respect to one another such that the second surfaces substantially prevent the contaminating material from striking the portion of the interior wall. At least part of each of the vanes may be covered with a mesh. The vanes may be heated, and may be heated at least to a melting point of the contaminating material. The apparatus is especially applicable to protecting multilayer mirrors serving as collectors in systems for generating EUV light for use in semiconductor photolithography.
US08901520B2 Particle beam irradiation apparatus
A particle beam irradiation apparatus including: a scanning unit configured to scan a particle beam; an electric current supply unit configured to supply an electric current to the scanning unit; and a scanning control unit configured to control the scanning unit by sending an electric current command value to the electric current supply unit, wherein a period of an operation clock of the scanning control unit and a period of an operation clock of the electric current supply unit are the same.
US08901515B2 Method for nondestructive testing of workpiece surfaces
A method for nondestructive testing of workpiece surfaces by a fluorescent penetration test is disclosed. An embodiment of the method includes a) cleaning the area of the workpiece surface that is to be inspected; b) applying a fluorescent liquid penetrant to the area of the workpiece surface that is to be inspected, where the penetrant penetrates into possible recesses in the workpiece surface; c) removing the excess penetrant from the workpiece surface; d) applying a developer to the area of the workpiece surface that is to be inspected; e) bleaching the fluorescent penetrant by a beam of light in the layer formed by applying the developer to the workpiece surface; and f) visual evaluation of the fluorescent penetrant remaining in the recesses present in the workpiece surface.
US08901513B2 System and method for fluorescence and absorbance analysis
A system or method for analyzing a sample include an input light source, a double subtractive monochromator positioned to receive light from the input light source and to sequentially illuminate the sample with each of a plurality of wavelengths, a multi-channel fluorescence detector positioned to receive and substantially simultaneously detect multiple wavelengths of light emitted by the sample for each of the plurality of excitation wavelengths, an absorption detector positioned to receive and detect light passing through the sample, and a computer in communication with the monochromator, the fluorescence detector, and the absorption detector, the computer controlling the monochromator to sequentially illuminate the sample with each of the plurality of wavelengths while measuring absorption and fluorescence of the sample based on signals received from the fluorescence and absorption detectors.