| Document | Document Title |
|---|---|
| US07924624B2 |
Memory device and memory programming method
Provided are memory devices and memory programming methods. A memory device may include: a multi-bit cell array that includes a plurality of memory cells; a controller that extracts state information of each of the memory cells, divides the plurality of memory cells into a first group and a second group, assigns a first verify voltage to memory cells of the first group and assigns a second verify voltage to memory cells of the second group; and a programming unit that changes a threshold voltage of each memory cell of the first group until the threshold voltage of each memory cell of the first group is greater than or equal to the first verify voltage, and changes a threshold voltage of each memory cell of the second group until the threshold voltage of each memory cell of the second group is greater than or equal to the second verify voltage. |
| US07924622B2 |
Flash memory device and operating method for concurrently applying different bias voltages to dummy memory cells and regular memory cells during erasure
Integrated circuit flash memory devices, such as NAND flash memory devices, include an array of regular flash memory cells, an array of dummy flash memory cells and an erase controller. The erase controller is configured to concurrently apply a different predetermined bias voltage to the dummy flash memory cells than to the regular flash memory cells during an erase operation of the integrated circuit flash memory device. Related methods are also described. |
| US07924621B2 |
NAND-type flash memory and NAND-type flash memory controlling method
A method of controlling a NAND-type flash memory provided with a latch circuit in which data is temporarily stored has measuring a first consumption current of the latch circuit in a first state in which the latch circuit is caused to retain first logic; measuring a second consumption current of the latch circuit in a second state in which the latch circuit is caused to retain second logic obtained by inverting the first logic; and comparing the first consumption current and the second consumption current to cause the latch circuit to retain logic corresponding to the state corresponding to a smaller one of the first consumption current and the second consumption current. |
| US07924617B2 |
Selective threshold voltage verification and compaction
Non-volatile memory devices for providing selective compaction verification and/or selective compaction to facilitate a tightening of the distribution of threshold voltages in memory devices utilizing a NAND architecture. By providing for compaction verification and/or compaction on less than all word lines of a NAND string, increased tightening of the distribution may be achieved over prior methods performed concurrently on all word lines of a NAND string. |
| US07924615B2 |
Nonvolatile semiconductor memory device
The present invention relates to a nonvolatile semiconductor memory, and more specifically relates to a nonvolatile semiconductor memory with increased program throughput. The present invention provides a nonvolatile semiconductor memory device with a plurality of block source lines corresponding to the memory blocks, arranged in parallel to the word lines, a plurality of global source lines arranged in perpendicular to the block source lines; and a plurality of switches for selectively connecting corresponding ones of the block source lines and the global source lines. |
| US07924611B2 |
Page buffer circuit with reduced size and methods for reading and programming data with the same
A page buffer circuit with reduced size and methods for reading and programming data is provided. In the reading operation, the page buffer circuit reads out a data bit by alternatively using a higher bit register or a lower bit register regardless of whether the data bit read from the multi-level cell is a higher bit or a lower bit, thereby reducing the circuit area and improves the performance of operation. |
| US07924609B2 |
Spin valve element driving method and spin valve element
A spin valve element driving method, and a spin valve element employing such a method, for causing microwave oscillation in a spin valve element. The spin valve element includes an intermediate layer and a pair of ferromagnetic layers including a fixed layer and a free layer sandwiching the intermediate layer, the fixed layer having a higher coercivity than the free layer, and being magnetized in a direction substantially perpendicular to a film plane thereof. The method includes a driving step of passing current from one of the pair of ferromagnetic layers to the other through the intermediate layer. |
| US07924608B2 |
Forced ion migration for chalcogenide phase change memory device
Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase change memories. The devices tested included GeTe/SnTe, Ge2Se3/SnTe, and Ge2Se3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus “activating” the device to act as a phase change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more that two data states. |
| US07924604B2 |
Stacked memory cell for use in high-density CMOS SRAM
A stacked memory cell for use in a high-density static random access memory is provided that includes first and second pull-down transistors formed in a first layer, a pass transistor connected between a gate of the second pull-down transistor and a bit line and formed in the first layer and a first and second pull-up transistors formed in a second layer located above the first layer and connected with the first and second pull-down transistors respectively to form an inverter latch. With the construction of a stacked memory cell having a lone pass transistor, cell size is reduced compared to a conventional six-transistor cell, and driving performance of the pass transistor can be improved. |
| US07924600B2 |
Methods of operating a bistable resistance random access memory with multiple memory layers and multilevel memory states
A method is described for operating a bistable resistance random access memory having two memory layer stacks that are aligned in series is disclosed. The bistable resistance random access memory comprises two memory layer stacks per memory cell, the bistable resistance random access memory operates in four logic states, a logic “00” state, a logic “01” state, a logic “10” state and a logic “11” state. The relationship between the four different logic states can be represented mathematically by the two variables n and f and a resistance R. The logic “0” state is represented by a mathematical expression (1+f)R. The logic “1” state is represented by a mathematical expression (n+f)R. The logic “2” state is represented by a mathematical expression (1+nf)R. The logic “3” state is represented by a mathematical expression n(1+f)R. |
| US07924599B1 |
Non-volatile memory circuit using ferroelectric capacitor storage element
A non-volatile memory cell and related system utilize ferroelectric capacitors as data storage elements. Circuitry is provided for writing to a single ferroelectric capacitor storage element, as well as to dual storage elements operating inversely. The storage elements are read by use of a sense amplifier in a configuration which automatically restores the original data states, thereby eliminating the need for a subsequent restore operation. Memory systems are described which include circuitry for driving bit lines, word lines and drive lines to accomplish both the write and read operations. |
| US07924598B2 |
Nonvolatile semiconductor memory
A nonvolatile semiconductor memory according to an aspect of the invention includes a memory cell array and a power supply circuit. The memory cell array includes memory cells each having an insulating film and being programmed to store information by inflicting an electric stress on the insulating film to break the insulating film. The power supply circuit supplies to the memory cell a program voltage for the electric stress depending on a negative temperature coefficient the electric stress. |
| US07924596B2 |
Area efficient programmable read only memory (PROM) array
A programmable ROM (PROM) architecture includes cascode NMOS transistors with a fuse bit cell that is arrayed, with sleep transistors located in each column of the array that in a standby mode shut down the entire fuse array. A fuse redundancy scheme may be used to repair a defective fuse row. |
| US07924595B2 |
High-density semiconductor device
A high-density semiconductor device includes a first input/output line connected among a plurality of banks on a core area storing data, so that it transmits data, a second input/output line connected to a data pad capable of performing data input/output operations at a Peri-area, so that it transmits data, a first repeater connected between the first input/output line and the second input/output line, for transmitting data of the first input/output line to the second input/output line in response to a read enable signal enabled by a read command, and a second repeater connected between the first input/output line and the second input/output line, for transmitting data of the second input/output line to the first input/output line in response to a write enable signal enabled by a write command. |
| US07924593B2 |
Information storage devices and methods of operating the same
Provided are an information storage device and a method of operating the same. The information storage device includes: a magnetic layer having a plurality of magnetic domain regions and a magnetic domain wall interposed between the magnetic domain regions; a first unit disposed on a first region which is one of the plurality of magnetic domain regions for recording information to the first region; a second unit connected to the first unit for inducing a magnetic field so as to record information to the first region. |
| US07924592B2 |
Semiconductor memory device having improved voltage transmission path and driving method thereof
Provided are a semiconductor memory device and a method of driving the device which can improve a noise characteristic of a voltage signal supplied to a memory cell of the device. The semiconductor memory device includes a first semiconductor chip and one or more second semiconductor chips stacked on the first chip. The first chip includes an input/output circuit for sending/receiving a voltage signal, a data signal, and a control signal to/from an outside system. The one or more second semiconductor chips each include a memory cell region for storing data. The second semiconductor chips receive at least one signal through one or more signal paths that are formed outside the input/output circuit of the first chip. |
| US07924591B2 |
Memory device with shielding plugs adjacent to a dummy word line thereof
A memory device is provided. The memory device comprises a substrate, a plurality of word lines, a plurality of conductive regions and at least a shielding plug. The substrate has a memory region and a peripheral region. The word lines are disposed on the substrate and at least a dummy word line disposed in the peripheral region and adjacent to the word lines. The conductive regions are disposed in the substrate and between the word lines respectively. The shielding plug is located on the substrate and adjacent to the dummy word line and between the dummy word line and the word lines and there is no self-aligned source region around the dummy word line. |
| US07924590B1 |
Compiling regular expressions for programmable content addressable memory devices
A content search system includes CAM device, a compiler, and an image loader. The CAM device, which includes a plurality of rows of CAM cells and a number of counter circuits selectively interconnected by a programmable interconnect structure (PRS), performs regular expression search operations. The compiler selectively converts the regular expression into a number of various bit groups, and the image loader loads corresponding bit groups into the CAM cells, into a number of memory elements that control configuration of the PRS, and into the counter circuits. |
| US07924580B2 |
Switching inverters and converters for power conversion
A switching inverter having two single-ended EF2 inverter sections coupled together with a shared ground and partially shared tunable resonant network that is coupled to at least one load, wherein each inverter section comprises a switching section, and wherein the shared tunable network section allows independent tuning of an impedance seen by the corresponding switching section thereby independently tuning even and odd harmonics of the switching frequency. |
| US07924574B2 |
High-frequency circuit components
High-frequency circuit components are disclosed in which parasitic capacitance between a high-frequency circuit element and a substrate is reduced and mechanical strength is improved. An exemplary component has a conductive substrate, a coil as the high-frequency circuit-element, a mounting board including a thin dielectric film on which the coil is mounted, and a support board that couples the mounting board to the substrate. The mounting board is coupled so that it floats relative to the substrate as a result of deliberate warping of the support board. |
| US07924569B2 |
Semiconductor device comprising an in-chip active heat transfer system
By providing thermoelectric elements, such as Peltier elements, in a semiconductor device, the overall heat management may be increased. In some illustrative embodiments, the corresponding active cooling/heating systems may be used in a stacked chip configuration to establish an efficient thermally conductive path between temperature critical circuit portions and a heat sink of the stacked chip configuration. |
| US07924567B2 |
Heat dissipation device
A clip includes a main body, a pair of locking members integrally formed at opposite ends of the main body, and a securing member secured onto one of the locking members. The one locking member includes an upper portion, a lower portion wider than the upper portion, and a step between the upper and lower portions. The securing member includes a handling portion and an engaging portion extending downwardly from the handling portion. A pair of flanges are formed on the engaging portion facing the main body and abutting the step. A clearance is defined between the flanges and the engaging portion receiving the upper portion. One of the engaging portion and the one locking member forms an engaging hole, and the other one forms a hook engaging into the engaging hole. |
| US07924563B2 |
Electronic device
An electronic apparatus including a housing having an air outlet and a heat generating component in the housing, a heat sink in the housing and having heat radiating fins arrayed. The apparatus includes heat radiating fins having air flow paths between adjacent pairs of the heat radiating fins, and a fan in the housing. The fan feeds air to an air inlet of the heat sink to exhaust heat of the heat radiating fins from the air outlet of the housing. The air outlet of the housing has openings arrayed which divide the air flow paths formed between the pairs of heat radiating fins. |
| US07924559B2 |
Docking station for portable computer
A docking station including a housing, a sliding block, a pulling element, a first elastic element, a raising cover, a plurality of first and second hooks, and a linkage is provided. The housing has a first, a second and a third constraining structures, and the sliding block is disposed in the first constraining structure. The pulling element is pivoted on the housing, wherein a pulling portion thereof is exposed out of the housing and a pushing portion thereof contacts the sliding block. The first elastic element is connected between the housing and the sliding block. The first hooks are disposed on the raising cover and driven by the sliding block. The linkage is disposed in the second constraining structure of the housing, wherein a first end thereof is connected to the sliding block. The second hooks are driven by a second end of the linkage. |
| US07924558B2 |
Insertion and rotation connector
One embodiment includes the provision of a novel insert-and-rotate connection for a daughter card, such as in a blade computer system. The daughter card has both a card edge with a plurality of card edge contacts and a mezzanine connector spaced from the card edge. An interposer mounted on the motherboard has a card edge connector and a midplane connector in communication with the card edge connector. The card edge connector includes a socket for receiving the card edge of the daughter card with the daughter card at an acute angle to the motherboard, to avoid interference between the mezzanine connector on the daughter card and a corresponding mezzanine connector on the motherboard. Once the card edge is inserted into the socket of the card edge connector, the socket allows for rotation of the daughter card about the received card edge. The mezzanine connectors are aligned for connection in response to rotation of the daughter card about the received card edge. The contacts on the card edge also contact the corresponding socket contacts in response to the rotation of the card. |
| US07924556B2 |
Mounting apparatus for data storage device
A mounting apparatus includes a receiving tray receiving a data storage device, a rack receiving the receiving tray, a rotatable shaft, two pivoting members fixed to the rotatable shaft, two resilient members, and a cover detachably mounted to the rack. The clamping protrusion protrudes out from the receiving tray. The rotatable shaft includes a latching portion. The resilient members are mounted to the corresponding pivoting members, and each resilient member resists against the rack and the corresponding pivoting member. When the cover is mounted to the rack, the pivoting members are rotated together with the rotatable shaft. Therefore, the latching portion rotates to engage with the clamping protrusion, and the resilient members are deformed. When the cover is removed from the rack, the resilient members are released to rotate the pivoting members together with the rotatable shaft. The latching portion rotates to disengage from the clamping protrusion. |
| US07924552B2 |
Portable electronic device with an impact-protection function
A portable electronic device includes a housing, a gasbag module installed on the housing in an expansible manner, and a pressure module connected to the gasbag module for conducting air outside the gasbag module into the gasbag module so as to expand the gasbag module. |
| US07924549B1 |
Carbon electrodes and electrochemical capacitors
Carbon electrodes for a capacitor having conditioned carbon elements in combination with a high concentration of an electrolyte tetrafluoroborate salt and a non-aqueous aprotic solvent to provide an operational voltage up to 4.5V and capacitors used with the carbon electrodes. |
| US07924546B2 |
Burner ignition controller and improved coil bobbin
A system is presented for an improved igniter and an igniter bobbin for a high voltage burner igniter that reduces parts count and simplifies assembly of the igniter used in fuel based burners for boilers, forced air furnaces and water heaters. In one aspect of the invention, the igniter bobbin of the present invention comprises two high voltage insulators and a coil bobbin of a high voltage transformer molded or otherwise integrated together into a single monolithic structure. In another aspect, the igniter bobbin may be molded from an insulative material to form the single monolithic structure that insulates the high voltage electrodes which are inserted within the high voltage insulators portion of the structure, and to insulate the primary and secondary coils that are wound onto the coil bobbin portion of the structure. |
| US07924543B2 |
Current-limiting circuit with additional current path
A current-limiting circuit (100), which limits an electrical current from a voltage source to a consumer to a predetermined maximum current. A measuring resistor (110) is coupled into a current lead (103) between a circuit input (102) and a circuit output (104). A transistor (106) of the circuit is coupled into the current lead (103) with its collector-emitter path in series with the measuring resistor (110), and its base is connected to the current lead (103) through a series resistor (108). A shunt regulator (116) of the circuit has an anode, a reference input and a cathode, wherein the cathode is connected to the base of the transistor (106), and the anode and the reference input form a voltage tap across the measuring resistor (110). An additional, high-ohmic current path extends in parallel to the transistor (106) and includes a component connected reverse-biased having a diode characteristic and an auxiliary measuring resistor (120b), wherein the auxiliary measuring resistor (120b) is integrated in the voltage tap. |
| US07924540B2 |
Over-voltage protection circuit
A main transistor and a reverse current prevention transistor are provided in series between an input terminal and an output terminal. An input diode is provided between a connection point of the reverse current prevention transistor and the main transistor and a reference voltage terminal in such a direction that the anode becomes the reference voltage terminal side. A control unit controls the gate voltage of the main transistor according to a DC voltage. The reverse current prevention transistor is arranged in such a direction that the anode of its body diode becomes the input terminal side. The reverse current prevention transistor is biased to be turned on in a normal state that the input terminal becomes high potential and the reference voltage terminal becomes low potential. |
| US07924535B2 |
Electronic arc extinguishing device
An electronic switch structure capable of extinguishing arcs is provided. A device capable of extinguishing arcs generated when an electric switch is turned on or off is in a following structure. Two silicon controlled rectifiers are connected in inverse parallel. Trigger ports of the silicon controlled rectifiers are connected to triggering current limiting circuits each formed by a diode and a resistor connected in series, respectively. Positive poles and negative poles of the silicon controlled rectifiers are connected to a voltage dependent resistor and a resistance-capacitance absorption circuit for over voltage protection in parallel. A triggering end of the device is connected to a contact bridge of the switch. Two ends connected in inverse parallel of the silicon controlled rectifiers are connected to two ends of fixed contacts of the switch respectively. Thus, an electronic arc extinguishing device having a simple structure, a small volume, and high reliability is formed. |
| US07924534B2 |
Magnetic sensor
A magnetic sensor having at least a first and at least a second structure of soft-magnetic material that are spatially separated and define a first gap therebetween. The first and second structure of soft-magnetic material are adapted to form a gap magnetic field pointing in a direction substantially perpendicular to the elongation of the first gap in the vicinity of the first gap in response to an external magnetic field. Additionally, the magnetic sensor comprises at least a first magnetoresistive layered structure that is positioned in the vicinity of the first gap including inside the first gap and that is sensitive to the gap magnetic field. |
| US07924532B2 |
Head gimbal assembly of hard disk drive having support element in a bonding region of a slider
A head gimbal assembly (HGA) of a hard disk drive (HDD) includes a flexure, a slider attached to the flexure and including a magnetic head, a plurality of pads at a side of the slider, a plurality of traces attached to and supported by the flexure and respectively bonded to the pads to form an electrically continuous circuit therebetween, and an insulating support element covering a bonding region between the pads and the traces. |
| US07924526B1 |
Method of ramp stop detection for VCM velocity-controlled retract
A method and apparatus for controlling the parking of a transducer head in a disk drive. A drive current is provided to a motor which controls movement of the head in a direction to move the head to a parking position. The arrival of the head at the parking position is detected. Upon this detection, a drive stop sequence is initiated to stop providing the drive current a short time after the head reaches the parking position. In one embodiment, it is determined whether the head has reached the parking position by monitoring the back emf (bemf) of the motor controlling the head, typically a voice coil motor (VCM). The detection of a sharp decline in the bemf indicates the head has stopped. |
| US07924524B2 |
System and method for generating an amplitude error signal in a magnetic tape recording channel
A method according to one embodiment includes generating a first gain error, comprising: receiving an output of an equalizer; and comparing a magnitude of the output to a saturation threshold level; if the output is higher than the saturation threshold level, generating a first gain error. The method further including generating at least one of a second and a third gain error, wherein generating the second gain error comprises: using either a slicer or a trellis for generating the second gain error, wherein the slicer generates a gain error based on an output of an interpolator, wherein the trellis generates a gain error based on an output of a maximum likelihood detector; wherein generating the third gain error comprises: receiving an output of an equalizer; generating a threshold qualified peak from the equalizer output and a tracking threshold level; comparing the threshold qualified peak to a second threshold; and generating a third gain error based on the comparison. |
| US07924523B2 |
Frequency domain approach for efficient computation of fixed-point equalization targets
Various embodiments of the present invention provide systems and methods for equalizing an input signal. For example, various embodiments of the present invention provide a method for performing equalization in a storage device. Such methods include providing an equalizer circuit that is governed by a target value, and a filter circuit that is governed by a filter coefficient. An initial value is provided to the equalizer circuit as the target value, and an overall target based at least in part on the initial value and the filter coefficient is calculated. An updated value is calculated based on the overall target, and the updated value is provided to the equalizer circuit as the target value. |
| US07924521B1 |
Data wedge format table synchronization
A control module for a rotating storage medium includes a data wedge format table (DWFT). The control module also includes a buffer control module that has a DWFT queue that includes X entries from the DWFT and one of X first servo information for each of the X entries. X is a positive integer. A disk formatter module that compares the one of X first servo information with second servo information that is based on a current position of a read/write device in relation to the rotating storage medium. |
| US07924517B2 |
Spatial filter, a system and method for collecting light from an object
A spatial filter that includes multiple opaque regions and multiple transparent regions; wherein at least a pair of opaque regions out of the multiple opaque regions are much longer than a cross sectional dimension of a light beam that impinges onto the spatial filter; and wherein an axial distance between the pair of opaque regions alters as a function of a rotational angle of the spatial filter. A spatial filter that includes multiple opaque regions and multiple transparent regions; wherein multiple groups of transparent regions are substantially shaped as portions of different spirals; wherein the different spirals are characterized by different separation distances between successive spiral turnings. |
| US07924516B2 |
Reflective fog filter and method
A reflective fog filter is comprised of a substantially flat white substrate upon which a translucent color filter is applied. A preferred embodiment comprises a blue translucent acetate filter applied to a bright white metallic substrate. The subject apparatus is placed on the dashboard and/or cowl of a motor vehicle with the filter side up. Ambient light striking the apparatus is filtered and reflected onto the windshield directly in the driver's field of view. The apparatus therefore uses ambient light to project a filter onto the windshield. Visibility of objects in fog and other conditions that scatter light is enhanced when light reflecting from the objects is viewed through that portion of the windshield onto which the filter is reflected. |
| US07924515B2 |
Adapter for connecting an optical recording device to an observation device
The invention relates to an adapter for connecting the optical path of an optical recording device, in particular a camera, to the optical path of an observation device, with an attachment portion for attaching to one of the two devices, and the adapter has two centering mechanisms for centering the optical axis of a lens of the recording device on the optical axis of an eyepiece of the observation device, and a first centering mechanism cooperates with the eyepiece of the observation device and a second centering mechanism cooperates with the lens of the recording device, and one of the two mechanisms is designed to be attached to the eyepiece of the observation device or to the lens of the recording device by means of the attachment portion to provide a centered fit and hold and the second centering mechanism is designed to provide a centrally oriented fit or hold on the lens of the recording device or on the eyepiece of the observation device when necessary. |
| US07924513B2 |
Lens barrel
There is provided a lens barrel including: a rear barrel to which an imaging device is attachable, an imaging optical system leading a subject image to the imaging device, and an image blur correcting unit moving a shift lens forming the imaging optical system in a plane perpendicular to an optical axis of the imaging optical system. The image blur correcting unit includes a base supporting the shift lens in a plane perpendicular to the optical axis of the imaging optical system. The lens barrel includes a support mechanism supporting the base to be movable relative to the rear barrel along a plane perpendicular to the optical axis; and a fixing device fixing the base to the rear barrel. |
| US07924511B2 |
Optical system, method for focusing, and imaging apparatus equipped therewith
Providing an optical system having excellent optical performance over entire focusing range from infinity to a close distance, a method for focusing the optical system, and an imaging apparatus equipped therewith. The optical system includes, in order from an object, a first lens group G1 having positive refractive power, and a second lens group G2 having positive refractive power. The second lens group G2 is movable along an optical axis for varying focusing. The first lens group G1 satisfies a given conditional expression. |
| US07924509B2 |
Variable focal length lens system and imaging apparatus
A variable focal length lens system includes first to fourth lens groups which have positive, negative, positive, and positive refractive powers, respectively, and are arranged in this order from an object side to an image side. An aperture diaphragm is arranged in the vicinity of the third lens group. The variable focal length lens system satisfies the following Conditional expressions 1 and 2: −0.04 |
| US07924507B2 |
Eyepiece lens and optical instrument comprising same
A diopter-adjustable eyepiece lens EL, comprising first through third lenses L1 through L3, satisfies the condition −0.9 |
| US07924506B2 |
Head-mounted display system
A head-mounted display system is provided. According to one example of an implementation, the head-mounted display system includes at least one sensor detecting surrounding information, a processing unit processing the surrounding information received from the at least one sensor, a display control unit generating display information to be displayed to a user of the system from the processed surrounding information received from the processing unit, and a head-mounted display capable of displaying information received from the display control unit to the user. |
| US07924505B1 |
Free-space hitlessly switchable optical interleaver
A reflective surface and a beamsplitting surface are optically coupled to a mirror and to phase optics arranged in interleaver configuration so as to either reflect all light to a single output in an all-pass mode of operation, or to split the incoming beam and produce odd and even channel outputs in an interleaver mode of operation. The direction of the incoming beam is switched hitlessly between the reflective and beamsplitting surfaces by passing the incoming beam through a transparent slab coupled to a rotating mechanism. |
| US07924503B2 |
Binocular display for displaying information
The invention relates to a binocular device for displaying information, the device comprising a support for placing on the nose and supporting a right display element and a left display element each designed to be placed in front of an eye and each comprising a light guide for receiving a beam of light rays emitted by a beam generator device towards an inlet face and for propagating the beam to an outlet face where the beam is directed towards the corresponding eye, the binocular device having an arrangement for adjusting the pupillary distance by moving at least one of the light guides relative to said support so as to adjust the distance between the light guides. According to the invention, said light guides are disposed over a said support and are held by a strip disposed over the light guides and secured to said support by means of at least one spacer, at least one slack takeup means being interposed between said strip and said light guides. |
| US07924501B2 |
Antireflection film and optical element having same
An antireflection film includes a first layer, a second layer, a third layer, a fourth layer, a fifth layer, a sixth layer, and a seventh layer. Each of the first, third, fifth, and seventh layer is formed using a low refractive index material. Each of the second, fourth, and sixth layer is formed using a high refractive index material. The thicknesses of the first, second, third, fourth, fifth, sixth, and seventh layers are in ranges of 0.122d1 to 3.052d1, 0.267d2 to 0.370d2, 0.427d3 to 0.610d3, 0.760d4 to 0.924d4, 0.305d5 to 0.378d5, 0.575d6 to 0.718d6, and 1.160d7 to 1.342d7, correspondingly, wherein di=λ/(4×ni), (i=1, 2, . . . 7), ni is a refractive index of the i-th layer, and λ is a reference wavelength of incident light entered into the antireflection film. |
| US07924498B2 |
System and method for optical communication using polarization filtering
An optical circuit is described which may include an SOA-MZI circuit providing an output signal; and a polarization filtering device (PFD) configured to receive the output signal of the SOA-MZI and to provide at least one signal at the output of the PFD. |
| US07924496B2 |
Apparatus and method for Raman gain control
Systems and methods for controlling a Raman amplifier by measuring power at one end of an optical fiber span. The Raman amplifier may include a laser that pumps an optical signal into the optical fiber span. The Raman amplifier may be connected to a controller that receives backscatter measurements. The controller may then adjust the Raman amplifier to maintain the backscatter substantially constant. |
| US07924490B2 |
Oscillator device, optical deflector and image forming apparatus using the optical deflector
An oscillator device includes an oscillation system having a first oscillator, a second oscillator, a first resilient supporting member and a second resilient supporting member, wherein the oscillation system has at least two frequencies of natural oscillation mode around the torsion axis which include a first resonance frequency f1 and a second resonance frequency f2, wherein there is a relationship that f2 is approximately two-fold of f1, wherein Δf which is expressed as Δf=f2−f×f1 has a relationship of Δf<0, and wherein the drive control means supplies, to the driving means, a driving signal which is comprised of a driving signal based on synthesizing a first driving signal having a first driving frequency and a second driving signal having a second driving frequency, and which is such driving signal that, when a lower-frequency side driving frequency among the first and second driving frequencies is denoted by Df1 and a higher-frequency side driving frequency is denoted by Df2, it satisfies relationships Df1 |
| US07924482B2 |
Image scanning apparatus
The invention provides an image scanning apparatus stabilizing a behavior of a document in scanning an image and enabling to promote image scanning accuracy. The image scanning apparatus according to the invention includes a resist roller 22 for feeding a document, a discharge roller 28 disposed in a feeding direction of the resist roller 22 for feeding the document and a first optical carriage A for scanning the image of the document in feeding the document by the resist roller 22 and the discharge roller 28. The resist roller 22 and the discharge roller 28 are respectively driven by a first motor 150 and a second motor 160. Further, when the document is charged to the discharge roller 28, document feed speed of the resist roller 22 in scanning document is made to be increased. |
| US07924481B2 |
Image reading device and image forming apparatus having the same
An image reading device and an image forming apparatus and methods thereof can achieve a duplex scanning operation and enable a user to easily arrange the scanned documents after being discharged. The image reading device may include a supply path coupled to a document supply port, a simplex document feeding path coupled to the supply path to first guide the document to the scan unit, a duplex document feeding path coupled to the supply path to second guide the document to the scan unit to scan a first surface of the document, and a duplex document circulating path to communicate with the duplex document feeding path and guide a second surface of the first surface scanned document to the scan unit. |
| US07924478B2 |
Scanner module and image scanning apparatus employing the same
Disclosed are a scanner module and an image scanning apparatus employing the same. The scanner module includes a light source generating light to be irradiated onto an object and a light guide member extending in correspondence with a width of the object to be scanned. The light guide member has a reflective surface for reflecting the light generated from the light source, an exit surface for radiating the light, which is reflected from the reflective surface, toward the object, and a plurality of guide surfaces each guiding the light toward the exit surface by reflecting the light reflected from the reflective surface deviates from the exit surface. The light is effectively guided to be output from the exit surface without substantial light loss. |
| US07924476B2 |
Document reading apparatus and image processing method
A document table is provided with a first chart portion and a second chart portion. In each of the first chart portion and the second chart portion, a reference chart is formed. The first chart portion is disposed at an upstream chart position, and the second chart portion is disposed at a downstream-side position located away in a sub-scanning direction from the upstream chart position. On the basis of respective chart images of the first chart portion and second chart portion obtained from respective reference charts of the first and second chart portions read by a document reading portion, the image processing portion obtains respective sharpening levels for respective image areas of a document image of a document read by the document reading portion and, based on the respective sharpening levels, processes the document image. |
| US07924472B2 |
Update control of image processing control data
This invention relates to the updating of image processing control data that is related to image data and controls image processing of the image data. An image related data generator generates an image file that includes image data and image processing data pre-stored therein. The image processing control data can be updated according to the following process. The image related data generator sends specification data that specifies image processing control data to be updated to an update data server. Then the image related data generator receives the update data from the update data server. And the image related generator updates the image processing control data stored therein with the update data. |
| US07924471B2 |
Image processing apparatus and image processing method
An image processing apparatus includes a receiving unit configured to receive a second image which forms a specified interference pattern when printed on a sheet on which a first image is printed, and a printing unit configured to print the second image received by the receiving unit on the sheet on which the first image is printed. |
| US07924470B2 |
Document processing method, document processing apparatus and program
A document processing apparatus processes an encoded document, which is a medium on which a machine readable code comprising a code of an encoded electronic document is formed. The document processing apparatus includes an acquiring unit, an editing-information managing unit and a decoding process unit. The acquiring unit acquires the machine readable code read from the encoded document. The editing-information managing unit manages editing information of the electronic document, which is an original document of the encoded document. The decoding process unit decodes the acquired machine readable code on a basis of the editing information. |
| US07924469B2 |
Image processing apparatus, image processing method, and program
In order to eliminate image deterioration based on the characteristics of an output device upon execution of edge emphasis processing, an image processing apparatus includes a setting unit which sets a print characteristic on the print medium, a region setting unit which sets a region, a brightness value derivation unit which derives brightness values, a first derivative derivation which derives first derivatives of the brightness values, an edge direction determination unit which determines an edge direction of brightness, an emphasis level determination unit which determines an emphasis level of a pixel value based on the first derivatives, and a replacement unit which calculates second derivatives of brightness values and replaces a pixel value of a pixel of interest based on the sign of the second derivative. |
| US07924467B2 |
Image forming apparatus
An image forming apparatus prints a first image data rendered at a first number of halftone levels based on a second image data rendered at a second number of halftone levels larger than the first number of halftone levels. A dot forming section forms lines of pixels on a print medium, the lines including a number of groups of sub lines of sub dots. The groups are aligned such that the sub lines of sub dots extend in traverse directions substantially perpendicular to an advance direction. A controller controls the dot forming section such that a selected number of sub dots in the advance direction are combined to form a pixel. Sub dots on the same sub line have the same exposure energy and sub dots on different sub lines in the same pixel have different exposure energies. |
| US07924465B2 |
Dither matrix, image processing method, storage medium, image processing apparatus, image forming apparatus, and image forming system
A disclosed dither matrix is used in halftone processing for converting input image data having M input halftone levels into output image data having N (M>N>2) output halftone levels. In the halftone processing, a concentration type dither matrix is used as the dither matrix when an input halftone level is within a range of input halftone levels corresponding to an output halftone level that is lower than a predetermined threshold level T (N>T>1), and a dispersion type dither matrix is used as the dither matrix when the input halftone level is within a range of input halftone levels corresponding to an output halftone level that is equal to or higher than the predetermined threshold level T. |
| US07924464B2 |
High-image-quality halftone process
An image processing method involves processing image data indicative of an image represented with a prescribed number of input tones by each of pixel groups composed of a plurality of print pixels, and generating dot data representing a status of dot formation on each of the print pixels to be formed on a print medium. The method includes preparing a first conversion table and a second conversion table, determining the pixel group tone value in response to the input tone value corresponding to the pixel group, converting the determined pixel group tone value into the code values for each of the pixel groups, by referring to the first conversion table, decoding the acquired code value into the output dot arrangement for each of the pixel groups, by referring to the second conversion table, and outputting the dot data in response to the output dot arrangement. |
| US07924463B2 |
Image processing apparatus and control method thereof
An image processing apparatus comprising an image processing unit configured to execute image processing by selectively using a plurality of image processing patterns, a selecting unit configured to select one of the plurality of image processing patterns according to a user's operation, a determination unit configured to determine whether or not tone correction control has been applied to the image processing pattern selected by the selecting unit, and a notification unit configured to notify, when the determination unit determines that the tone correction control has not been applied yet, a message that advises accordingly. |
| US07924459B2 |
Data processing apparatus and method of expanding dot arrangement patterns
A data processing apparatus uses a pattern table arranging binarizing patterns correspondingly to positions of a pixel, each of which is used for a binarization process in which an arrangement of a number of dots depending on a value of multi-valued image data corresponding to the pixel is determined, to select the binarizing pattern depending on the position of the pixel and on the value of multi-valued image data corresponding to the pixel for executing the binarization process. The pattern table corresponding to one of the values to be taken by the multi-valued image data includes a plurality of types of binarizing patterns which determine different arrangements of dots from each other. The arrangement of each of the plurality of types of binarizing patterns in the pattern table corresponding to the one value has a characteristic that the arrangement is aperiodic and that low frequency components are fewer than high frequency components. |
| US07924456B1 |
Data distribution and buffering
An on-demand server system herein includes a memory controller that coordinates access to one or more flash-based memory devices. The flash devices store large amounts of video content that can be selectively viewed on-demand by each of multiple destinations over a respective network. In addition to having access to an array of flash memory devices, the memory controller has access to a corresponding read buffer and write buffer. Use of the read buffer and the write buffer enable the memory controller to switch between transferring data stored in the write buffer to the array of memory devices and transferring the data in the array of memory devices to the read buffer. The write buffer stores on-demand video content that can be selected for viewing by different users. The read buffer stores segments of the on-demand video content currently streamed to the users. |
| US07924453B2 |
Portable memory printing device and method
A method comprises collecting printing information relating to an electronic document stored on a computer. The printing information comprises printing attributes according to which the electronic document should be printed. In response to input from a user of the computer, the method causes the electronic document and the printing information to be stored on a portable memory device temporarily connected to the computer. The method causes the electronic document and the printing attributes to be automatically supplied to a printing device after the portable memory device is disconnected from the computer and subsequently connected to the printing device. The method causes the printing device to print the electronic document with the printing attributes based solely on the electronic document and the printing information maintained within the portable memory device. |
| US07924452B2 |
Image forming apparatus, control method for image forming apparatus, image forming system, and storage medium
An image forming apparatus which communicates with an information processing apparatus includes a display unit which is used to input an instruction to cause the information processing apparatus to execute a dynamic layout function of dynamically determining a layout on the basis of template data so as to form an image by using template data including insertion data and layout information, a transmission unit which transmits, to the information processing apparatus, specifying information to be used when processing is performed by using the dynamic layout function, a reception unit which receives dynamically laid out data, and an output unit which outputs the received data. |
| US07924451B2 |
Client server system
A client server system S includes a plurality of client terminal devices 3 capable to connect with display device 4, whose screen resolution is HD or SD, and a server device which provides image information to the plurality of client terminal devices s through wireless network N. The server device 1 is structured to include a sendable resolution determining program 1134 to make CPU 111 determine whether to convert HD image information into SD image information or not, and an image information sending program 1135 to make the CPU 111 send SD image information attached with SD information to the plurality of client terminal devices 3. |
| US07924448B2 |
Data communication apparatus with test communication, central managing apparatus, testing method, remote managing system and computer-readable storage medium
A data communication apparatus is provided with a connecting section connectable to at least one managed apparatus, a sending section calling via a communication line a central management apparatus which remotely manages the managed apparatus and sending status information of the managed apparatus to the central managing apparatus, a set section set with parameters from the central managing apparatus, where the parameters include a called telephone number which called by the status information sending section and/or line type information which indicates a type of line, and a communication section responding to a request from the central managing apparatus and calling the called telephone number to make a test communication. |
| US07924447B2 |
Method and system for workload balancing
A method and system for workload balancing includes determining which one of a plurality of printer devices satisfies at least one criteria and routing the job to the printer device which satisfies the criteria. The determining is carried out at one or more of the plurality of printer devices. |
| US07924445B2 |
Printing apparatus and printing method
A printing method and apparatus, the method and apparatus including inputting a print job, printing the print job, selecting an output mode in which sheets of the print job are either reversed or not reversed before being output to a stacking unit. When printing is performed based on a second print job subsequent to printing performed based on a first print job, the second print job is output in the same output mode as that of the first print job. |
| US07924439B2 |
Method and system for parameter extraction of a cutting tool
A method for extracting parameters of a cutting tool is provided. The method comprises positioning the cutting tool on a moveable stage, performing one or more rotary scans of a first section of the cutting tool to generate a scanning point cloud, indexing a plurality of points of the scanning point cloud, detecting one or more feature points based on the indexed scanning point cloud, and extracting one or more parameters based on the detected feature points. A system for extracting the parameters is also presented. |
| US07924436B2 |
Method for approximating an influence of an optical system on the state of polarization of optical radiation
A method for approximating an influence of an optical system on the state of polarization of optical radiation comprises the steps of providing incoming optical radiation for the optical system in several incoming states of polarization, including at least one incoming state having circularly polarized radiation components; directing the incoming optical radiation onto the optical system; measuring at least one characteristic, including a phase distribution, of a resulting outgoing optical radiation emerging from the optical system with respect to each of the incoming states of polarization; and approximating the influence of the optical system on the state of polarization of optical radiation by evaluating the measured characteristics of the outgoing optical radiation. |
| US07924433B2 |
Displacement measurement system and method of use
A measurement displacement system and method are described. The measurement displacement system comprises a sensor head configured to transmit input optical beams and to receive measurement beams. The system comprises a transmission grating configured to diffract the input optical beams into sub-beams comprising more than one diffraction order. The transmission grating is adapted move in a direction. The measurement displacement system comprises a reflective element configured to diffract the sub-beams from the transmission grating and to return the sub-beams to the transmission grating. The reflective element is substantially stationary relative to the sensor head and the transmission grating selectively recombines the sub-beams to form the measurement beams and returns the measurement beams to the sensor head. |
| US07924429B2 |
Enhanced optical coherence tomography for anatomical mapping
A system, method and apparatus for anatomical mapping utilizing optical coherence tomography. In the present invention, 3-dimensional fundus intensity imagery can be acquired from a scanning of light back-reflected from an eye. The scanning can include spectral domain scanning, as an example. A fundus intensity image can be acquired in real-time. The 3-dimensional data set can be reduced to generate an anatomical mapping, such as an edema mapping and a thickness mapping. Optionally, a partial fundus intensity image can be produced from the scanning of the eye to generate an en face view of the retinal structure of the eye without first requiring a full segmentation of the 3-D data set. Advantageously, the system, method and apparatus of the present invention can provide quantitative three-dimensional information about the spatial location and extent of macular edema and other pathologies. This three-dimensional information can be used to determine the need for treatment, monitor the effectiveness of treatment and identify the return of fluid that may signal the need for re-treatment. |
| US07924428B2 |
Optical rotary adaptor and optical tomographic imaging apparatus using the same
An optical rotary adapter is featured by including: a fixed side optical fiber which is fixedly supported by a fixed sleeve and which has an end surface inclined with respect to a plane perpendicular to the optical axis of the optical fiber; a fixed side collimator lens which is arranged to be separated from the inclined end surface of the fixed side optical fiber by a predetermined interval; a rotation side optical fiber which is fixedly supported substantially at the center of a rotatably supported rotary cylinder, which is arranged to face the fixed side collimator lens, and which has an end surface inclined with respect to a plane perpendicular to the optical axis of the fixed side collimator lens; a rotation side collimator lens which is fixedly supported by the rotary cylinder, and which is arranged between the fixed side collimator lens and the rotation side optical fiber so as to be separated from the inclined end surface of the rotation side optical fiber by a predetermined interval; a second luminous flux optical fiber which guides a second luminous flux having a function different from that of a first luminous flux as a measuring light beam to the inside of the fixed sleeve; and a multiplexing device which is provided between the fixed side collimator lens and the rotation side collimator lens, and which multiplexes the first luminous flux with the second luminous flux. |
| US07924426B2 |
Information processing apparatus for interference signal processing
A shape measuring apparatus for measuring the shape of a measurement target surface includes an interferometer and computer. The interferometer senses interference light formed by measurement light from the measurement target surface and reference light by a photoelectric converter, while changing the light path length of the measurement light or the reference light. The computer Fourier-transforms a first interference signal sensed by the photoelectric converter to obtain a phase distribution and an amplitude distribution, shapes the amplitude distribution, inversely Fourier-transforms the phase distribution and the shaped amplitude distribution to obtain a second interference signal, and determines the shape of the measurement target surface based on the second interference signal. |
| US07924424B2 |
Optical product detection sensor
An optical detection sensor detects presence or absence of a product within a fluid delivery medium. An emitter directs radiation into the fluid delivery medium and detectors detect transmitted light at a plurality of wavelengths. The output of each detector and combinations of outputs of multiple detectors are associated with at least one out-of-product threshold. In addition, a color ratio is established. A controller compares the detector outputs and combination outputs with the associated out-of-product threshold(s). If any of the thresholds are satisfied, the controller compares the color ratio with an associated out-of-product threshold to verify an out-of-product event has occurred and reduce errors due to batch-to-batch variation of the product. The sensor is able to determine presence or absence of a variety of products having different color, transparency or turbidity. |
| US07924421B2 |
In-line inspection system for vertically profiling plastic containers using multiple wavelength discrete spectral light sources
Systems and methods for in-line inspection of plastic blow molded containers. The inspection system may comprise a plurality of emitter assemblies arranged in a vertical array. Each emitter assembly may cyclically emit light energy in at least two different narrow wavelength bands at a container as the container passes through an inspection area. The system may also comprise a plurality of broadband photodetectors arranged in a vertical array, each photodetector facing at least one of the emitter assemblies with the inspection area therebetween such that the photodetectors are capable of sensing light energy that passes through the container when it is in the inspection area. The system may also comprise a processor in communication with the photodetectors for determining a characteristic of the container based on signals from the photodetectors. |
| US07924419B2 |
Illumination system for optical inspection
Apparatus for generating optical radiation includes a laser, which is configured to operate in multiple transverse modes simultaneously so as to generate an input beam, which is characterized by a first speckle contrast. The transverse modes of the input beam are optically mixed so as to generate an output beam have a second speckle contrast, which is substantially less than the first speckle contrast. |
| US07924417B1 |
Luminance measuring apparatus
An exemplary measuring apparatus includes a base, a table, a light blocking piece, a sensor, a luminance meter, a drive assembly, and a controller. The table defines a first elongated slot. A light guide plate is arranged on the table with a central portion of a bottom surface thereof exposed to the first elongated slot. The light blocking piece is attached to the central portion of the bottom surface and exposed to the first elongated slot. The sensor is configured for sensing light and generating a sensing signal. The luminance meter is configured for measuring luminance of the back-light source module. The drive assembly is configured for moving the table to align the light blocking piece with the sensor. The controller is configured for switching off the drive assembly when the light is blocked by the light blocking piece from reaching the sensor. |
| US07924416B2 |
Measurement apparatus, exposure apparatus, and device manufacturing method
A substrate stage holds a substrate irradiated with exposure light via a liquid. A measurement apparatus measures information on the exposure light and has a light receiving device detachable from the substrate stage. The light receiving device receives the exposure light while being held in the substrate stage. |
| US07924413B2 |
Nanowire-based photonic devices
Embodiments of the present invention are related to nanowire-based devices that can be configured and operated as modulators, chemical sensors, and light-detection devices. In one aspect, a nanowire-based device includes a reflective member, a resonant cavity surrounded by at least a portion of the reflective member, and at least one nanowire disposed within the resonant cavity. The nanowire includes at least one active segment selectively disposed along the length of the nanowire to substantially coincide with at least one antinode of light resonating within the cavity. The active segment can be configured to interact with the light resonating within the cavity. |
| US07924410B2 |
Apparatus and method for scalable phased array radar data distribution and beamforming
A radar array antenna comprising: a plurality of analog to digital (A/D) converters for converting analog signals from the array to digital signals, the signals supplying input to one or more optical modulators having controllable wavelengths, each optical modulator connected to a corresponding multiplexer, the multiplexer providing outputs to a demultiplexer that distributes the signals to a beamformer. |
| US07924408B2 |
Temperature effects on overlay accuracy
A method for reducing overlay error in a photolithographic process, by providing a substrate having a permanent layer with a first pattern disposed therein, coating the substrate with photoresist, exposing the photoresist to a second pattern, while measuring temperatures at a plurality of different first positions across the substrate, developing the second pattern in the photoresist, measuring overlay errors between the first and second patterns at a plurality of different second positions across the substrate, correlating the overlay errors with temperatures by position on the substrate, determining any relationship indicated between the correlated overlay errors and temperatures, and adjusting at least one temperature controlling aspect of the photolithographic process in response to any relationship determined. |
| US07924406B2 |
Stage apparatus, lithographic apparatus and device manufacturing method having switch device for two illumination channels
An illuminator for a lithographic apparatus includes a first illuminator channel, a second illuminator channel, a first switch device, an additional illuminator part and a second switch device. Each of the first and the second illuminator channel includes elements which are adjustable to provide a radiation beam with at least one desired property. The first switch device is configured to receive the radiation beam and arranged to direct the radiation beam between the first and second illuminator channels. The second switch device is arranged to receive the radiation beam from the first and second illuminator channels and direct the radiation beam through the additional illuminator part. The additional illuminator part includes elements which apply at least one additional desired property to the radiation beam. |
| US07924403B2 |
Lithographic apparatus and device and device manufacturing method
A immersion lithographic apparatus is disclosed in which one or more liquid diverters are positioned in a space surrounded by a liquid confinement structure. A function of the liquid diverter(s) is to hinder the formation of one or more recirculation zones of immersion liquid which may lead to variations in refractive index of the immersion liquid in the space and thereby imaging errors. |
| US07924397B2 |
Anti-corrosion layer on objective lens for liquid immersion lithography applications
Disclosed is an objective lens adapted for use in liquid immersion photolithography and a method for making such a lens. In one example, the objective lens has multiple lens elements, one of which includes a transparent substrate and a layer of anti-corrosion coating (ACC). The ACC is formed proximate to the transparent substrate and is positioned between a liquid used during the liquid immersion photolithography and the transparent substrate to protect the transparent substrate from the liquid. |
| US07924396B2 |
Coating/developing apparatus and pattern forming method
A coating/developing apparatus includes a process section including processing units to perform a series of processes for resist coating and development; an interface section disposed between the process section and immersion light exposure apparatus; and a drying section disposed in the interface section to dry the substrate immediately after the immersion light exposure process. The drying section includes a process container configured to accommodate the substrate, a substrate support member configured to place the substrate thereon, a temperature-adjusted gas supply mechanism configured to supply a temperature-adjusted gas into the process container, and an exhaust mechanism configured to exhaust the process container. The drying section is arranged to dry the substrate by supplying the temperature-adjusted gas into the process container with the substrate placed on the substrate support member, while exhausting the process container. |
| US07924395B2 |
Method and system for delivering digital cinema content concurrently to both a retail exhibitor and remote theater
A method for delivering digital cinema concurrently to a retail exhibitor and a remote theater that includes forming a digital cinema right-to-distribute contract between a content owner and a retail exhibitor. In addition, a digital cinema movie rental contract is formed between the retail exhibitor and a remote theater user. Newly released digital cinema content is delivered both to the remote theater and to the retail exhibitor. Display of the newly released digital cinema content occurs at the remote theater as early as the display of the newly released digital cinema content at the retail exhibitor. |
| US07924391B2 |
Liquid crystal display module
A liquid crystal display module (LCDM) includes a liquid crystal panel; a backlight unit disposed under the liquid crystal panel and projecting light on the light crystal panel; a main frame surrounding a side of the backlight unit and a side of the liquid crystal panel; an integrated printed circuit board (PCB) connected to the liquid crystal panel and disposed at a side surface of the main frame, the integrated PCB including a data unit for providing a data driving signal to the liquid crystal panel, a signal generating unit for generating a data control signal, a gate control signal, and a power source signal and a timing control unit; a connector disposed on the integrated PCB and including a slot along the side surface of the main frame, the connector for receiving a signal from an external unit; a bottom frame under the backlight unit; a system board on a rear side of the bottom frame; a flexible cable connecting the connector and the system board; and a top frame covering edges of the liquid crystal panel and combined with the main frame and the bottom frame. |
| US07924389B2 |
Liquid crystal display with housing exposed flexible printed circuit
Provided are a liquid crystal display (LCD) that has a reduced cost due to an increase in the thickness of the FPC board included of the display. The liquid crystal display includes a liquid crystal panel, a first housing having a first side and a second side and a plurality of sides, the liquid crystal panel being accommodated on the first side, a flexible printed circuit board having a first side in contact with the liquid crystal panel, and a second side disposed adjacent to the second side of the first housing, a second housing having a bottom, an opening, and a plurality of sides extending from the bottom to define a cavity, wherein the plurality of sides are fastened to the first housing, further wherein the opening is formed through the bottom to expose at least a portion of the flexible printed circuit board, and a reflective sheet disposed on a interior surface of the bottom. |
| US07924388B2 |
Liquid crystal display device
An object of the invention is to reduce the size of a liquid crystal display device and to enhance the reliability of a connection portion with a flexible wiring substrate. According to the invention, liquid crystal is sandwiched between a TFT substrate and a color filter substrate. The TFT substrate is formed in a larger size than that of the color filter substrate. A connection portion with a flexible wiring substrate is formed on the TFT substrate. The TFT substrate is formed with a notch at its portion connected with the flexible wiring substrate. The flexible wiring substrate is bent over the notch toward a rear side of the liquid crystal display device as accommodated in a mold. This allows for the size reduction of the overall display device and ensures the enhanced reliability of the connection portion. |
| US07924387B2 |
Liquid crystal display including neighboring sub-pixel electrodes with opposite polarities in the same pixel
A liquid crystal display has a pixel array including first and second pixel electrodes. Each of the first pixel electrodes is divided into at least two first sub-pixel electrodes in two pixel areas sharing a corner or an edge. Similarly, each of the second pixel electrodes is divided into at least two second sub-pixel electrodes in two pixel areas sharing a corner or an edge. The polarities of the first and the second electrodes are opposite. The first and the second pixel electrodes are arranged alternatively to allow at least one first sub-pixel electrode and at least a second sub-pixel electrode to be located in each pixel area. |
| US07924384B2 |
Display device
The present invention provides a liquid crystal display device which exhibits the excellent wide viewing angle characteristic and the high-speed responsiveness. A pixel region includes a switching element which is operated in response to a scanning signal from a gate signal line, a pixel electrode to which a video signal from a drain signal line is supplied through a switching element, and a counter electrode which generates an electric field between the counter electrode and the pixel electrode. The pixel region is constituted of divided respective regions. In one region, the counter electrode made of a light-transmitting material which is formed on the center except for a slight periphery of the region below an insulation film and the pixel electrode which is constituted of a group of electrodes which extend in one direction and are arranged in parallel to each other in the direction which intersects one direction above the insulation film in a state that the group of electrodes are overlapped to the counter electrode are formed. In another region, the counter electrode which is constituted of a group of electrodes which extend in one direction and are arranged in parallel to each other in the direction which intersects one direction below the insulation layer and the pixel electrode which is constituted of a group of electrodes which extend in one direction and are arranged in parallel in the direction which intersects one direction above the insulation film and is arranged alternately with the counter electrode are formed. |
| US07924381B2 |
Method for producing liquid crystal display device
A method for producing a liquid crystal display device including a first irradiation step for realizing alignment of liquid crystals in a first azimuth direction on a first alignment layer by obliquely irradiating the first substrate, a second irradiation step for realizing alignment of liquid crystals in a second azimuth direction by obliquely irradiating a region of the first substrate where irradiation has not been conducted in the first irradiation step with rays in an azimuth direction that is 180 degrees different from an azimuth direction of irradiation in the first irradiation step, a third irradiation step for realizing alignment of liquid crystals in a third azimuth direction on a second alignment layer by obliquely irradiating the second substrate, and a sticking step of sticking together the first and second substrates such that the first azimuth direction and the third azimuth direction are perpendicular to each other. |
| US07924379B2 |
Liquid crystal display
A liquid crystal display comprising: a brightness enhancing film, polarizing plate (A), a liquid crystal cell, polarizing plate (B) laminated in that order, Wherein (i) polarizing plate (A) has a polarizing plate protective film facing the brightness enhancing film; (ii) the polarizing plate protective film is a cellulose ester film; (iii) an in-plane retardation value Ro(550) of the of the cellulose ester film represented by Formula (I) is 0 to 5 nm; and (iv) a retardation value in a thickness direction Rt(550) of the of the cellulose ester film represented by Formula (II) is −15 to 15 nm, Ro(550)=(Nx−Ny)×d Formula (I) Rt(550)={(Nx+Ny)/2−Nz}×d. Formula (II) |
| US07924377B2 |
Transflective liquid crystal display apparatus
To provide a transflective liquid crystal display apparatus that employs in-plane switching mode (in-plane switching system), which exhibits a reflection property of wide view angles. Provided is a transflective liquid crystal display apparatus which comprises: a reflective area and a transmissive area; an uneven reflective plate provided in the reflective area; a flattening film laminated on the uneven reflective plate; and common electrodes and pixel electrodes arranged on the flattening film, wherein, the uneven reflective plate comprises a diffusive reflecting function that is capable of diffusely reflecting light making incident at an incident angle of 30 degrees towards directions at exit angles of 0-10 degrees, and a surface of the flattening film is set to be substantially flat. |
| US07924375B2 |
In-plane switching mode liquid crystal display device with adjustable viewing angle and method of fabricating the same
An in-plane switching mode liquid crystal display device includes a first substrate and a second substrate, gate lines and data lines intersecting each other on the first substrate and defining red, green, blue sub-pixels, and viewing angle controlling sub-pixels, thin film transistors at the intersections of the gate lines and the data lines, first pixel electrodes and first common electrodes spaced apart from each other and alternately disposed at the red, green, and blue sub-pixels, second pixel electrodes at the viewing angle controlling sub-pixels, second common electrodes on the second substrate and at positions corresponding to the second pixel electrodes, and a liquid crystal layer between the first substrate and the second substrate. |
| US07924374B2 |
Color filters for display devices
A display device including a light source and a pixelized color filter element is provided. The pixelized color filter element includes a plurality of first pixelized filters, a plurality of second pixelized filters and a plurality of third pixelized filters. The pixelized color filter element has a total reflectance higher than 5% in a wavelength range of 400 to 700 nm. At least one of the first pixelized filters, second pixelized filters and third pixelized filters includes a first layer and a second layer. The first material layer has a transmittance higher than 50% in a wavelength range of 400 to 700 nm. The second material layer has a transmittance higher than 50% in a wavelength range of 400 to 700 nm. |
| US07924371B1 |
Multimode display for NVIS compatible operation
A multimode display for night vision imaging system (NVIS) compatible operation including a display assembly including a display subassembly having a display component; and, a backlight printed wiring board (PWB) assembly positioned behind the display subassembly. The backlight printed wiring board (PWB) assembly includes a printed wiring board (PWB). A top side mounted LED array is mounted on a first side of the printed wiring board (PWB) including a top side plurality of LEDs including a top side set of white LEDs. A reverse-mounted LED array is mounted on a second side of the printed wiring board (PWB) including a reverse-mounted plurality of LEDs including a reverse-mounted set of white LEDs. A dedicated primary IR filtering means is operatively associated with the reverse-mounted LED array for conditioning light emitted from the reverse-mounted LED array for NVIS compatible operation. In a day mode of operation the forward-side mounted LED array illuminates the display subassembly. In an NVIS mode of operation filtered light from the reverse-mounted LED array illuminates the display subassembly. |
| US07924367B2 |
Backlight module with detachable illuminator support apparatus and liquid crystal display utilizing same
An exemplary backlight module includes a frame and an illuminator support apparatus. The frame defines a through hole therein, and the through hole includes an assembly hole and a location hole communicating with each other. The illuminator support apparatus includes a base and a neck. The base remains fixed to the frame through the location hole. The neck is configured to be slidable from the assembly hole to the location hole and secured to the frame after the supporting body is snugly rotated. A liquid crystal display employing the backlight module is also provided. |
| US07924366B2 |
Image displaying apparatus
A display apparatus is provided which includes a display panel, a signal board for processing an image signal used in an image display, and a power source board for supplying power from a power source to the signal board and the display panel. The signal board and the power source board are disposed in a horizontal direction relative to the display panel, and a projection portion, being disposed higher above a surface of the power source board than a circuit element of the power source board and not being connected with a member opposing to a mounting side of the circuit element, is provided on the surface of the power source board where the circuit element is mounted. |
| US07924358B2 |
Spacer structure of a display panel
A spacer structure of a display panel includes a first substrate, a second substrate, a spacer, and a spacer pad. The spacer is disposed on a side of the first substrate facing the second substrate, and the spacer pad is disposed between the second substrate and the spacer. The spacer pad has a non-linear structure lodged in the spacer, and therefore restrains the spacer from moving with respect to the second substrate in the plane parallel to the surface of the second substrate. |
| US07924356B2 |
Electrooptical device, electronic apparatus, and projector
An electrooptical device includes a substrate having pixel regions arranged in a matrix, pixel electrodes disposed in the pixel regions of the substrate, switching elements disposed between the pixel regions of the substrate and electrically connected to the pixel electrodes, capacitors disposed between the pixel regions of the substrate to hold electrical charge on the pixel electrodes, wiring disposed between the pixel regions of the substrate, and grooves disposed in a surface of the substrate so as to extend between the pixel regions thereof. The capacitors each include a first capacitor electrode, an insulating film, and a second capacitor electrode. The wiring includes data lines and scanning lines corresponding to the switching elements. The capacitors are at least partially disposed in the grooves. |
| US07924354B2 |
Liquid crystal display panel and pixel structure thereof
A pixel structure includes a bright region and a pale region, and the pale region includes a first capacitance coupling region and a second capacitance coupling region. The first capacitance coupling region includes a first coupling capacitor, the second capacitance coupling region includes a second coupling capacitor, and the first coupling capacitor and the second coupling capacitor are connected in parallel. |
| US07924352B2 |
Liquid crystal display panel and pixel structure thereof
A pixel structure of a liquid crystal display panel includes a first transparent substrate, a first data line, a second data line, a transparent electrode, and a compensating conducting pattern layer. In a display region, the first side of the transparent electrode and the first data line partially overlap, forming a first parasitic capacitor, the second side of the transparent electrode and the second data line partially overlap, forming a second parasitic capacitor smaller than the first parasitic capacitor. In a non-display region, the first side of the transparent electrode and the first data line partially overlap, forming a third parasitic capacitor, and the second side of the transparent electrode and the compensating conducing pattern layer partially overlap, forming a fourth parasitic capacitor. The total parasitic capacitance of the first and the third parasitic capacitors and the total parasitic capacitance of the second and the fourth parasitic capacitors are substantially equal. |
| US07924351B2 |
Autostereoscopic display
An autostereoscopic display apparatus comprises a lenticular array (20) mounted to a display panel (10) which is mounted to a backlight unit (12). A lateral securing member is (30) disposed directly between the backlight unit (12) and the edge of the lenticular array (20) to prevent relative movement in a direction parallel to the plane of the panel (10). The stack comprising the panel (10) and lenticular plate (20) is prevented from sliding during regular use and from vibration during transportation. |
| US07924350B2 |
Capacitance type touch panel
The present invention relates to a liquid crystal display (LCD). The LCD includes a plurality of display units formed with a first substrate, a color matrix formed on the first substrate, and a common electrode formed on the color matrix, a second substrate spaced from the first substrate, a pixel electrode matrix formed on the second substrate, a liquid crystal material disposed between the common electrode and the pixel electrode matrix. The LCD includes a touch sensing member integrated onto the color matrix of the first substrate. |
| US07924345B2 |
Method and system for deinterlacing using polarity change count
A method for processing video information may include calculating a polarity change count (PCC) for a plurality of pixel pairs selected from a plurality of pixels from different fields utilizing a plurality of difference polarity values associated with the plurality of pixel pairs. At least a portion of the plurality of pixels from different fields may be deinterlaced based on at least the calculated PCC. The plurality of difference polarity values may be calculated for the plurality of pixel pairs selected from the plurality of pixels from different fields. At least one difference in amplitude of at least one of the selected pixel pairs may be calculated for the calculating the plurality of difference polarity values. The plurality of pixels from different fields may comprise a plurality of adjacent pixels from a plurality of woven fields. |
| US07924344B2 |
Objective holder for camera module with notches of wall receiving passing components
An exemplary objective holder for engaging with a PCB substrate having an image sensor and several passive components arranged thereon, includes a base and several continuously connected walls extending from the base. The walls enclose a chamber thereamong for receiving the image sensor and define notches therein for receiving the passive components. |
| US07924341B2 |
Optical subsystem with descriptors of its image quality
An optical subsystem (e.g., a lens assembly) provides descriptors of the image quality produced by the optics. The descriptors can be communicated to the electrical back-end (e.g., detector plus image processing), which can then automatically adjust the image processing accordingly. |
| US07924338B2 |
Image sensor for still or video photography
A method for reading out charge from an interlined CCD having a plurality of photo-sensing regions and a plurality of vertical shift registers, and each photosensitive region is mated respectively to a CCD of a vertical shift register and a color filter having a repeating pattern of two rows in which each row includes at least two colors spanning the photo-sensing regions, the method includes reading out one row from each of the two row pattern; summing the same color from each row in the vertical shift register to reduce the resolution by one half; without transferring charge out of the vertical shift register, repeating the reading and summing steps for the remaining row; and reading out the charge in the vertical shift registers in a manner in which different colors are not summed together. |
| US07924335B2 |
Solid state imaging device and method of driving the solid state imaging device
A row scanner selects an arbitrary row in an pixel array unit. Per-column AD converters separately convert voltage signals respectively outputted from a column of a plurality of unit pixels in the selected arbitrary row into digital signals. A column scanner sequentially outputs the digital signals by a column-scanning operation thereof. An AD conversion result adjuster judges whether or not the digital signals reach a predetermined judgment value or the status equivalent to the digital signals reaching the predetermined judgment value is generated, and fixes the digital signals to digital pixel values set in accordance with the predetermined judgment value when a result of the judgment is positive. |
| US07924333B2 |
Method and apparatus providing shared pixel straight gate architecture
Methods and apparatuses using four-way-shared readout circuits to increase pixel fill factor. Embodiments consolidate circuits from several pixels, reducing the number of components in each pixel and this increasing the fill factor of each pixel. Additionally, embodiments use “straight gate” transfer gates to increase the readout speed and symmetry of the smaller pixels. |
| US07924332B2 |
Current/voltage mode image sensor with switchless active pixels
A voltage and current mode active pixel sensor for high resolution imaging is presented. The photo pixel is composed of a photodiode and two transistors: reset and transconductance amplifier transistor. The switch transistor is moved outside the pixel, allowing for lower pixel pitch and increased linearity of the output photocurrent. The reset and amplifier (readout) transistors may also be shared among adjacent pixels by the introduction of transfer switches between the photodiodes and the source of the reset transistor and the gate of the readout transistor. The switch transistor outside the pixels provides biasing voltages or currents to the readout transistors to selectively turn them on when readout of the corresponding photodiode is desired and turns the readout transistor off when the corresponding photodiode is not to be read out. The increased linearity of the image sensor has greatly reduced spatial variations across the image after correlated double sampling and the column fix pattern noise is greatly improved. |
| US07924329B2 |
Noise eliminator
A noise eliminator is provided which can highly compress and store dark current noise components while maintaining characteristics, including many high frequency components. A noise distribution analysis section 10 determines the magnitude distribution of dark current noise components of at least some pixels, and then computes the threshold and typical values for quantization based on this distribution. A quantization section 12 quantizes the dark current noise components based on the computed threshold value, and a memory 14 stores the quantized dark current noise components. An inverse quantization section 16 inversely quantizes the quantized dark current noise components stored in the memory 14 with reference to the typical value computed by the noise distribution analysis section 10. The inversely quantized dark current noise components are supplied to a subtraction section 18, and the subtraction section 18 subtracts the inversely quantized dark current noise components from an image signal. |
| US07924326B2 |
Image quality adjustment processing device
An image processing device capable of executing adjustment of image quality of image data includes a feature amount obtainment unit which obtains an amount of feature indicative of a feature of image quality of the image data, a correction amount obtainment unit which obtains an amount of correction for adjusting the feature amount of the image data to a predetermined target value, and an image quality evaluation unit which evaluates an image quality based on the correction amount. |
| US07924325B2 |
Imaging device and imaging system
In recording materials of a video program or the like, the video materials are efficiently and optimally acquired so that processing steps in and after an editing step subsequent to a recording step can be reduced. A recording support information (metadata) on a schedule of and a performer for an imaging operation, and the like, which are determined in advance is recorded in a first recording medium 16 by a program constitution input device 100. The first recording medium 16 is inserted in to an imaging device 200, materials to be recorded are classified and confirmed based on the metadata, and the materials which can constitute a desirable program as potentially as possible are acquired in the recording operation. |
| US07924324B2 |
Sound-controlled electronic apparatus
An electronic apparatus (102) includes a microphone (40). Sound is captured by the microphone (40), and a key operation is detected by a sub microcomputer (46). The processes according to outputs from the microphone (40) and the sub microcomputer (46) are executed by a main microcomputer (42). The main microcomputer (42) outputs a sound effect from a speaker (58) in response to the key operation. Besides, output setting of the sound effect is changed between active state and inactive state. The main microcomputer (42) changes an extraction characteristic of sound according to the setting state of sound effect output. |
| US07924323B2 |
Method and apparatus for automatically capturing and managing images
According to one embodiment of the invention, a camera determines whether to acquire an image (e.g., automatically), determines whether to store the acquired image, and determines how to store the acquired image. |
| US07924319B2 |
Signal processing apparatus allowing an increase in pixels without an increase in driving frequency and circuit area
A signal processing apparatus for carrying out signal processing on an input image signal and to output the result includes first correction processing means for carrying out correction processing dependent on pixels on the input image signal, second correction processing means for carrying out correction processing independent from pixels on a supplied image signal, synchronization processing means for generating RGB signals that represent a captured image and has matching spatial phases based on a supplied image signal, conversion means for carrying out at least processing for generating a luminance signal and a color signal based on a supplied image signal, and first resolution conversion means for converting a captured image into an image having the same resolution as an output image. The first resolution conversion means is provided downstream of the first correction processing means and upstream of the conversion means. |
| US07924310B1 |
Image data processing methods, image data processing systems, and articles of manufacture
Image data processing methods, image data processing systems, and articles of manufacture are described. According to one aspect, an image data processing method includes accessing initial image data of a first image representation of a scene, selecting one of a plurality of imaging conditions, wherein the selected one of the imaging conditions is different than an initial one of the imaging conditions used to generate the initial image data, and processing the initial image data using the selected one of the imaging conditions to provide processed image data of a second image representation of the scene different from the first image representation of the scene, wherein the second image representation of the scene represents the scene as if it were captured according to the selected one of the imaging conditions. |
| US07924303B2 |
Line head controlling method and image forming method
There is provided a method for controlling a line head including a focusing optical system, first light emitters, light from which being focused by the focusing optical system, second light emitters disposed next to the first light emitters in a first direction, light from the second light emitters being focused by the focusing optical system, and third light emitters disposed next to the second light emitters in the first direction, light from the third light emitters being focused by the focusing optical system. The method includes turning on the first light emitters at time t0, turning on the second light emitters after a period t1 has passed since the time t0, and turning on the third light emitters after a period t2 has passed since the time t0. The periods t1 and t2 are controlled under the following condition: t2≠n×t1 (n is an integer two or greater). |
| US07924299B2 |
Developer cartridge for image-forming device
A developer cartridge provided in an image-forming device has a developer side casing that includes a toner-accommodating chamber and a developing chamber; and a plate wall disposed in the developing chamber for partitioning a thickness-regulating blade from the toner-accommodating chamber. When a thickness-regulating blade scrapes excess charged toner off the developing roller, the plate wall prevents this charged toner from returning to the toner-accommodating chamber. A flexible wiper for cleaning toner detection windows is attached to an agitator for stirring toner in the toner-accommodating chamber via a fixing member. The fixing member includes a support plate and a gripping plate disposed opposite each other with a slit formed therebetween. The wiper is inserted into the slit and is fixed to the fixing member when a boss protruding from a restricting plate becomes inserted into a through-hole formed in the wiper. |
| US07924296B2 |
System and method for DMA controlled image processing
A system for processing image data from a plurality of images is disclosed. The invention involves alpha blending of two images of different resolution and color space utilizing shared logic for multiple image streams and without display storage frame buffer. The invention utilizes Direct Memory Access (DMA) fetching module for fetching image data from source images or from source image memory areas and transferring the data to another memory area without having to go through a central processing unit or display storage frame buffer. The DMAs are configured with direct registers or memory mapped descriptors as to the location of the source data. The DMA channels of the DMA module will fetch a portion of the source images (tiling) utilizing a link list or series of descriptors in a certain fetching order. The DMA modules can perform the alpha blending on the fetched image data. |
| US07924294B2 |
Polygon trimming using a modified azimuthal map projection
In one embodiment, a system, method and computer readable media are disclosed for trimming geographic data that defines polygons to boundaries of a quadrangle. The geographic data is converted to map coordinates in a novel azimuthal map projection. Each map projected point in the azimuthal map projection has an azimuthal angle that is proportional to longitude of the point, and has a radius from the center of the azimuthal map projection that is proportional to both the longitude and latitude of the point. Polygons are trimmed along a lower limit of the quadrangle and along an upper longitude limit of the quadrangle using the azimuthal map projection. The map coordinates in the azimuthal map projection are then converted back to geographic data. |
| US07924293B2 |
Object image print service system
In a three-dimensional object image print service system capable of printing out a desired three-dimensional object image, a three-dimensional image display apparatus includes a three-dimensional object image generator for generating a three-dimensional object image, based on instructions from an input device operated by a user and a three-dimensional object image generation program previously provided. The three-dimensional image display device further includes a selector for selecting arbitrary part of the three-dimensional object image generated based on instructions from the user, and a transition information generator for generating transition information of a three-dimensional object image representing the selected arbitrary part of the three-dimensional object image. The three-dimensional object image arbitrarily selected by the user can be reproduced based on the transition information and the three-dimensional object image generation program. |
| US07924290B2 |
Method and system for processing texture samples with programmable offset positions
A method and system for performing a texture operation with user-specified offset positions are disclosed. Specifically, one embodiment of the present invention sets forth a method, which includes the steps of deriving a first destined texel position based on an original sample position associated with a pixel projected in a texture map and a first offset position specified by a user and fetching texel attributes at the first destined texel position for the texture operation. |
| US07924288B2 |
Image processing device emphasizing on texture, image processing program, electronic camera, and image processing method
An image processing device extracts a local variation component from color information in image data. Using the variation component of the color information, a pseudo-texture component of brightness information is produced. The thus produced pseudo-texture component is added to the brightness information. By this image processing, an image having improved texture is produced. |
| US07924285B2 |
Exposing various levels of text granularity for animation and other effects
Described is a system and method by which text elements to be rendered on a computer display (e.g., paragraph, line or any subset of text including a character or glyph) may be individually or collectively animated, at an author-selected level of granularity. Animation of text may be specified by setting animation properties via direct coding (e.g., in markup) or by specifying animation code to execute on text-related data, just prior to rendering. The text to animate may be static, or dynamically obtained at runtime from an external source. The text to animate is maintained as a whole with other text of the same element, in a text object, until a processing level that produces separate glyph runs, with an animation transform associated with each glyph run to be animated. Also described is an API that supports text animation. |
| US07924284B2 |
Rendering highlighting strokes
A process for rendering highlighter ink strokes and non-highlighter ink strokes in a non-rastering environment is described. Strokes may be grouped under a node having a predefined opacity. The strokes inherit the opacity from the node. Additionally, visuals containing highlighter strokes of the same color are grouped into collections of visuals (one collection per each highlighter color), and change the opacity of the collection (parent) visual to semi-transparent (or any other transparency value defined for the highlighter effect). |
| US07924283B1 |
Time relevance-based visualization of data
A method for displaying a time-series data set. The method may include determining a number of data intervals for the data set, determining a data resolution for each data interval, partitioning a display space into a number of substantially equally sized partitions equal to the number of data intervals, partitioning the dataset into a number of time-relevance-based subsets equal to the number of partitions based on the currentness of the data and the desired data resolution for each partition, determining a data layout for each partition, and associating the data values for each subset with the corresponding layout. Furthermore, the first subset may consist of more current data at a first resolution and the second subset may consist of data that is less current than the first subset at a lower resolution than the first resolution. |
| US07924277B2 |
Three-dimensional model deformation system, method and computer readable program, and computer readable storage medium storing that program
A three-dimensional model modification system for modifying a three-dimensional model, defined by a plurality of surfaces and representing an arbitrary object is disclosed. The system includes a base-curve generating unit fitting skeleton lines, representing a prerecorded approximate outline of the object, to a three-dimensional model to be modified and generating base curves, representing an approximate outline of the three-dimensional model; a first polygon forming unit generating a group of points from the three-dimensional model; a base-curve modifying unit arbitrarily modifying the base curves of the three-dimensional model, according to an instruction from an operator; a group-of-points displacing/determining unit displacing the group of points based on base curve displacements from the base curves before arbitral modification to the base curves after arbitrary modification; and a second polygon forming unit generating a three-dimensional model defined by a plurality of surfaces formed from the group of points. |
| US07924275B2 |
Electronic module, methods of manufacturing and driving the same, and electronic instrument
An electronic module includes an EL section; a first substrate on which the EL section is formed; a second substrate attached to the first substrate; an integrated circuit chip mounted on the second substrate; a plurality of first power supply interconnects formed on the first substrate, extending through a pair of regions located on both sides of the EL section; and a plurality of second power supply interconnects formed on the second substrate, extending through a pair of regions located on both sides of the integrated circuit chip. |
| US07924274B2 |
Masked write on an array of drive bits
The present invention provides a various methods, systems and devices for controlling light modulating elements and/or spatial light modulators. In some embodiments of the present invention, a recursive feedback method is used to control light modulating elements and/or spatial light modulators. |
| US07924271B2 |
Detecting gestures on multi-event sensitive devices
A user interface method is disclosed. The method can include detecting gestures on or above a multi-event sensor panel and performing an action associated with detected gestures. Such action can include activating or changing a state of one or more GUI objects and emulate functions performed by a mouse or trackball input device. |
| US07924268B2 |
Clearing potentially inadvertent entries in electronic device
Electronic devices, software and methods for a host electronic device such as a mobile phone, PDA, player, etc. In some embodiments, a criterion is used to determine whether a manual entry by the user was intended. If not, the entry is cleared. |
| US07924261B2 |
Methods and systems for determining a display light source adjustment
Embodiments of the present invention comprise systems, methods and devices for adjusting display light source levels for enhanced image display. |
| US07924253B2 |
Liquid crystal display
A liquid crystal display includes a plurality of pixels defined by adjacent scan lines and data lines. Each pixel includes a first sub-pixel defined by the scan line and a first common electrode line and a second sub-pixel defined by the scan line and a second common electrode line. The first common electrode line is connected to at least one of the voltage sources. The second common electrode is electrically connected to two of the voltage sources through a first and a second switch devices. The two switch devices are connected to different scan lines. |
| US07924252B2 |
Display driver
In consideration of the current leakage path of a liquid crystal panel and a signal line voltage fluctuation due to the current leakage path, a γ adjusting function (second driving method) is applied for each divided period in the first driving method. In a signal line driving unit, a gray scale voltage obtained by adding or subtracting a voltage fluctuation value different in each of the output periods of each gray scale is generated, and a gray scale voltage taking the voltage fluctuation value into consideration is applied to a signal line. |
| US07924250B2 |
Image display device and method of controlling same
The invention relates to an image display device with active matrix comprising a number of light emitters forming a network divided into rows and columns; a current modulator for each emitter; and at least one inverse bias voltage generator. This device is characterized in that it also comprises: an inverse bias switch for each emitter, said inverse bias switch being connected, on the one hand, to each modulator and, on the other hand, to the or each inverse bias voltage generator; and control electrodes able to drive all the inverse bias switches of a row of emitters. The invention also relates to a method of driving this device. |
| US07924249B2 |
Method and system for light emitting device displays
A method and system for light emitting device displays is provided. The system includes one or more pixels, each having a light emitting device, a drive transistor for driving the light emitting device, and a switch transistor for selecting the pixel; and a circuit for monitoring and extracting the change of the pixel to calibrate programming data for the pixel. Programming data is calibrated using the monitoring result. |
| US07924247B2 |
Display device and driving method thereof
A display device includes a plurality of data lines, a transmission gate element connected to the data lines, wherein the transmission gate supplies precharge voltages and data voltages to the data lines in response to transmission gate signals, and a plurality of pixels connected to the data lines. Each of the pixels includes: a light emitting element; a capacitor; a driving transistor having a control terminal connected to the capacitor, an input terminal, and an output terminal, wherein the driving transistor supplies a driving current to the light emitting element; a first switch, wherein the first switch diode-connects the driving transistor in response to a gate signal and connects one of the data lines to the capacitor; and a second switch, wherein the second switch supplies a reference voltage to the capacitor in response to the gate signal and connects the driving transistor to the light emitting element, wherein the precharge voltage, the data voltage, and the reference voltage are applied to the capacitor, and wherein the capacitor stores a charging voltage based on the applied data voltage and a threshold voltage of the driving transistor. |
| US07924244B2 |
Semiconductor device and method of driving the semiconductor device
Display irregularities in light emitting devices, which develop due to dispersions per pixel in the threshold value of TFTs for supplying electric current to light emitting elements, are obstacles to increasing the image quality of the light emitting devices. An electric potential in which the threshold voltage of a TFT (105) is either added to or subtracted from the electric potential of a reset signal line (110) is stored in capacitor means (108). A voltage, in which the corresponding threshold voltage is added to an image signal, is applied to a gate electrode of a TFT (106). TFTs within a pixel are disposed adjacently, and dispersion in the characteristics of the TFTs does not easily develop. The threshold value of the TFT (105) is thus cancelled, even if the threshold values of the TFTs (106) differ per pixel, and a predetermined drain current can be supplied to an EL element (109). |
| US07924240B2 |
Apparatus for driving plasma display panel
Disclosed therein is an apparatus for driving a plasma display panel, with a simple structure. The apparatus includes a signal processor for converting an external image signal into image data suitable for driving the plasma display panel; a data arranger for reconstructing the image data to a plurality of sub-fields in order to process the gray scale of the image data converted by the signal processor and serially transmitting control data corresponding to one or more scan lines; an X-electrode driver for receiving the control data corresponding to one or more scan lines from the data arranger and applying an address pulse corresponding to the control data to X electrodes; a Y-electrode driver for applying a scan pulse for addressing and a sustain pulse for maintaining a discharge to Y electrodes; a Z-electrode driver for applying the sustain pulse for maintaining a discharge to Z electrodes; and a main controller for performing a control operation to sequentially read out the image data reconstructed by the data arranger according to the external image signal and to transmit the control data corresponding to one or more scan lines to the X-electrode driver. |
| US07924239B2 |
Image display device
An image display device includes a pair of sustain pulse generators for applying either a first sustain pulse or a second sustain pulse to the display electrodes. The first and second sustain pulses generate a sustain discharge twice and once, respectively, in discharge cells when the voltage applied between the display electrodes changes. The application of the first sustain pulse is performed by generating a first discharge by applying a voltage to one of the display electrodes using the clamp corresponding to the one of the display electrodes, and then generating a second discharge by applying a voltage to the other of the display electrodes using the clamp corresponding to the other of the display electrodes. The application of the second sustain pulse is performed by generating a first discharge by applying a voltage to each of the display electrodes using the clamps corresponding to each of the display electrodes. |
| US07924234B2 |
Cladding for a microwave antenna
A cladding (2) for a microwave antenna comprises at least one plate (3a, 3b, 3c, 3d) which has, in a first section plane (x=0; y=0), a cross section in the shape of a logarithmic spiral, characterized in that the plate (3a, 3b, 3c, 3d) has a cross section in the shape of a logarithmic spiral also in at least one second section plane perpendicular to the first one. |
| US07924233B2 |
Three-dimensional antenna and related wireless communication device
A three-dimensional antenna includes a substrate, a radiator, a second radiator, a signal feeding element, and a grounding element. The radiator is installed on the substrate. The radiator includes a first child radiator and a second child radiator. The first child radiator has a first end and a second end. The second child radiator has a first end and a second end, wherein the second end of the second child radiator is coupled to the second end of the first child radiator. The second radiator is coupled to the radiator. The signal feeding element is coupled to the first end of the first child radiator. The grounding element is coupled between the substrate and the first end of the second child radiator. The first child radiator and the second child radiator form an inverted V-shape installed on the substrate. |
| US07924232B2 |
Electromagnetic wave measuring method and electromagnetic wave measuring apparatus
An electromagnetic wave measuring method is provided that is capable of performing high-precision measurement in a shorter time and in a greater variety of frequency bands than heretofore with a comparatively simple configuration. A plate-like antenna (13) of which the outline shape of an opposed surface opposite a measured object (5) is similar to the outline shape of an opposed surface of the measured object (5) is brought close to the measured object (5), and an electromagnetic wave from the measured object (5) is measured based on the frequency spectrum of a received signal received by the plate-like antenna (13). |
| US07924230B2 |
Multi-frequency antenna suitably working in different wireless networks
A multi-frequency antenna includes a first antenna (1) and a second antenna (2) both operating at wireless wide area network, a third antenna (3) and a fourth antenna (4) both operating at wireless local area network. The first antenna, the second antenna, the third antenna and the fourth antenna are integrally made from a metal sheet and have a common grounding portion (50). The first and the second antennas have a first connecting portion (12) on which a feeding point (120) is located, and the third and the fourth antenna have a second connecting portion (34) on which another feeding point (340) is located. |
| US07924229B2 |
Antenna apparatus and method for adjusting characteristics thereof
An antenna apparatus includes an antenna block and a substrate. The antenna block has a base that is made of a substantially cuboid dielectric body, an upper-surface conductor formed on an upper surface of the base, first and second pad electrodes that are formed on both ends of a bottom surface of the base in a longitudinal direction of the base, respectively, and a lateral-surface conductor connecting the upper-surface conductor and the second pad electrode. The substrate has a region mounting the antenna block, a ground pattern provided around the mounting region, first and second lands that are provided within the mounting region so as to correspond to the positions of the first and second pad electrodes, a feed line that is connected to the first land, an impedance-adjusting pattern connecting the first land and the ground pattern, and a frequency-adjusting pattern connecting the second land and the ground pattern. |
| US07924223B1 |
Satellite ground terminal incorporating a smart antenna that rejects interference
This device combines multiple elements that function like a single smart antenna that performs both connectivity and spatial discrimination functions. The antenna functions in both receive and transmit modes. The apparatus utilizes commonly used components to distinguish and separate desired satellite signals from those signals of satellites in close directional proximity. Disclosed are six methods for optimizing reception of desired satellite signals performed either mechanically or electronically and also included is an optimization technique when data stream reception is ≦1 Gbps. The transmission apparatus uses many of the same components as the receiver antenna and additionally uses in-beam nulling to fine tune transmission. |
| US07924221B2 |
Method and apparatus for monitoring the integrity of satellite navigation signals
A method for monitoring the integrity of satellite navigation system includes a first detection of integrity problems, in which the same entity of a navigation signal from a particular satellite is received at different sites, and evaluated to estimate the error of the entity and the error made during the error estimation process. In a second detection, navigation signals received from a specific satellite are measured and evaluated to estimate the error of the entity and the error in the error estimation process. Finally, in a third detection, several navigation signals from different satellites are measured, and evaluated to estimate the error of the entity and the error made in the error estimation process. Integrity problems which are detectable in the first and second detections are taken into account only if it is probable that they occur during the third detection, and have not been discovered during the first and second detection. |
| US07924220B1 |
Method and apparatus for weak data frame sync in a positioning system
The present invention is related to location positioning systems, and more particularly, to a method and apparatus of synchronizing to data frames in a positioning system signal. According to one aspect, the invention speeds up the frame synchronization process by computing a frame synchronization metric for each satellite and then combining together the metrics for all tracked satellites together, after compensating for respective signal transit times. Then the invention makes a frame sync decision on the combined satellite metric. In embodiments, an optimal combining algorithm is used based on CNO of each satellite. According to further aspects, the invention further speeds up the frame synchronization process by predicting many bits in the subframe so that more bits are known in addition to the 8-bit preamble. For example, the invention recognizes that many bits in a subframe rarely change or don't change very often. Moreover, the invention uses old ephemeris used to predict new ephemeris parameters. These parameters are translated into predicted bits in the signal. Still further, old ephemeris can be used to predict almanac parameters, and the almanac can be used to predict ephemeris parameters. |
| US07924217B2 |
High sensitivity frequency modulated radar level gauge system
A radar level gauge system for determining a filling level of a product contained in a tank, comprising: a transceiver for generating, transmitting and receiving frequency-modulated electromagnetic signals; a transmitting propagating device electrically connected to the transceiver and arranged to propagate transmitted electromagnetic signals towards a surface of the product contained in the tank; and a receiving propagating device electrically connected to the transceiver and arranged to return echo signals resulting from reflections at impedance transitions encountered by the transmitted electromagnetic signals, including a surface echo signal resulting from reflection at the surface, back to the transceiver. |
| US07924216B2 |
Method of determining a disturbance echo profile for a radar level gauge system
A method of determining a filling level of a product contained in a tank, the method comprising generating and transmitting electromagnetic signals; propagating the transmitted electromagnetic signals towards a surface of the product contained in the tank; receiving echo signals resulting from reflections at impedance transitions encountered by the transmitted electromagnetic signals, including a surface echo signal resulting from reflection at a surface of the product; determining a position of a reference impedance transition using a reference echo signal resulting from reflection of the transmitted electromagnetic signals at the reference impedance transition; determining an update level located above the surface, based on the determined position of the reference impedance transition and a known position of the reference impedance transition; determining a disturbance echo profile using at least one of the echo signals resulting from reflection of the transmitted signals at at least one impedance transition located above the update level; and determining the filling level based on the received echo signals and the disturbance echo profile. |
| US07924215B2 |
Radar apparatus and mobile object
A signal processing circuit detects, at a plurality of different timing points, a first and a second distance of an oncoming vehicle approaching a vehicle including the radar apparatus and detects a first and a second component of a relative velocity of the vehicle in the radar-apparatus direction. A distance of closest approach of the oncoming vehicle to the vehicle appears when the vehicle and the oncoming vehicle pass each other side by side. The signal processing circuit computes the distance of closest approach on the basis of a formula indicating that a relative velocity given by the first distance, the distance of closest approach, and the first component of a relative velocity in the radar-apparatus direction is equal to a relative velocity given by the second distance, the distance of closest approach, and the second component of a relative velocity in the radar-apparatus direction. |
| US07924212B2 |
Method for human only activity detection based on radar signals
A method of detecting human presence includes using a radar sensor to monitor a space, and receiving an output signal from the radar sensor. A Fourier transform is performed on the output signal to produce a signal spectrum. It is decided whether the output signal is indicative of human activity dependent upon at least one acoustic feature of the signal spectrum and at least one spectral feature of the signal spectrum. |
| US07924205B2 |
Successive approximation type analog/digital converter and operation method of successive approximation type analog/digital converter
In a successive approximation-type A/D converter, an S/H circuit samples and holds an analog input voltage. A D/A converter section receives current digital data corresponding to a current search voltage range, and outputs a plurality of comparison voltages based on the current digital data. A comparator section performs parallel comparison in which the held analog input voltage is compared with each of the plurality of comparison voltages. A successive approximation register section outputs digital data for a next search voltage range within the current search voltage range as the current digital data to the digital-to-analog converter section based on a result of the parallel comparison using the current search voltage range. A timing control circuit generates a switching signal from the parallel comparison to a redundant comparison such that the redundant comparison is performed. |
| US07924200B2 |
System and method of altering a PWM carrier power spectrum
In a particular embodiment, a circuit device includes an input to receive a pulse-width modulated (PWM) signal and an output to send a modulated PWM signal. The circuit device further includes a pulse edge control circuit coupled between the input and the output. The pulse edge control circuit receives the PWM signal via the input and includes a control input to receive a modulation control signal. The pulse edge control circuit is adapted to modify the PWM signal to provide the modulated PWM signal with suppressed carrier power and associated harmonics to the output based on the modulation control signal. The circuit device further includes a modulation sequence controller adapted to provide the modulation control signal via the control input. The modulation control signal selectively controls a sequence of the modification of the PWM signal to selectively alter an output power spectrum of the modulated PWM signal. |
| US07924199B2 |
Current steering DAC
In a multi-channel current steering DA converter, e.g., a two-channel current steering DA converter, reference current sources Irefa and Irefb that can serve as current mirror sources for current sources Ia and Ib are provided in current source matrices 2a and 2b of the channels, respectively. During an operation, the reference current source Irefa or Irefb that is provided in the current source matrix of a channel that is not powered down is selected and used in accordance with control signals 6a and 6b. Therefore, even when one channel is powered down, the full-scale current of the other channel can be maintained at a constant value, i.e., unchanged. |
| US07924196B2 |
Digital-analog converter
A parallel digital-analog converter for the conversion of a plurality of differential digital input signals into a differential analog output signal, including a group of 1-bit digital-analog converters (200) which respectively include an intermediate storage cell (202) and a current cell (201) and which are adapted to feed a respective output current to a first (204) or a second output contact (206) in dependence on a logic state of the intermediate storage cell, wherein a first of two outputs of an intermediate storage cell (202) is connected by way of an input resistor (220) to a first signal terminal (208.1) of a first transistor (208) and a second of the two outputs of the intermediate storage cell (202) is connected by way of an input resistor (218) to a first signal terminal (210.1) of a second transistor (210), the respective first signal terminals of the first and second transistors are additionally connected by way of a constant current source (212 and 214) to a ground terminal (216), and wherein a respective time-constant bias voltage is applied at a respective control terminal (208.2 and 210.2) of the first and second transistors. |
| US07924195B2 |
Hardware-efficient reconstruction for periodic non-uniformly sampled signals
Method and apparatus for signal reconstruction enabling the sharing of analog-to-digital converter resources among signals. Embodiments include a signal reconstruction method that allows reconstruction of multiple non-uniformly sampled signals while avoiding unwanted side effects such as aliasing. |
| US07924193B2 |
All-digital spread spectrum clock generator
An embodiment of the invention relates to an all-digital spread spectrum clock generator comprising a phase detector, a time-to-digital converting unit, a digital loop filter, a delta-sigma modulator and a digital controlled oscillator. The phase detector receives a reference signal and a clock feedback signal to output first and second difference signals. The time-to-digital converting unit comprises timing amplifier to receive and amply the first and second difference signals to generate digital data. The digital loop filter receives and accumulates digital data to output first and second digital data. The delta-sigma modulator receives the second digital data to generate a resolution tuning word. The digital controlled oscillator adjusts its frequency of output clock signal according to the first difference signal, the second difference signal and the first digital data, and adjusts a resolution of the digital controlled oscillator according to the resolution tuning word. |
| US07924192B2 |
ΔΣ analog-to-digital converter
A ΔΣ analog-to-digital converter includes a previous stage amplifier circuit which amplifies an input signal, a conversion circuit which converts an analog signal into a digital signal, where the analog signal is output from the previous stage amplifier circuit, an input node provided in the previous stage amplifier circuit, a plurality of capacitors provided in the conversion circuit, a first amplifier and a second amplifier, and a path switching circuit which connects the first amplifier to the input node in a first mode and connects the first amplifier to the plurality of capacitors in a second mode, where the first mode is for sampling the analog signal and the second mode is for performing an integration operation. The first amplifier forms the previous stage amplifier circuit in the first mode, and forms an integrator which carries out the integration operation performed in the conversion circuit in the second mode. |
| US07924191B2 |
Integrated poly-phase fir filter in double-sampled analog to digital converters
A sigma delta analog to digital converter includes a clock operating at a conversion clock rate and first and second conversion paths. The first path includes a first sigma delta modulator configured to produce from an input analog signal a first bit stream at the clock rate, and a first digital filter configured to decimate the first bit stream. The second conversion path has a second sigma delta modulator configured to produce from the input analog signal a second bit stream separate from the first bit stream at the clock rate, and a second digital filter configured to decimate the second bit stream. |
| US07924190B2 |
Adjustble gain signal processing device
A CLK generating section of a digital ALC generates a multiplication clock signal that is obtained by multiplying a triangular wave generated at a triangular wave generating circuit. On the basis of the multiplication clock signal, a signal converting section converts a one-bit digital audio signal outputted from an outputting stage into a multi-bit digital signal, and monitors a voltage value of an input signal. A level controlling section controls a voltage level on the basis of a target level inputted from an exterior of an LSI. On the basis of a control signal inputted from an exterior of the LSI, a volume controlling section outputs, to a PGA, a gain adjusting signal so as to vary a waveform of an input signal. |
| US07924188B2 |
Rapid recovery circuit
When a semiconductor circuit, in which a stabilizing capacitor 2 for stabilizing a reference voltage Vbias is connected to a reference voltage terminal RT, recovers from a power down state to an operational state, a current mirror circuit 40 provides current mirroring of a current Ia of a first current path Ph1, which generates an OFF threshold voltage ref1 of a hysteresis comparator 1, to generate a current Ib of a second current path Ph2, which generates the reference voltage Vbias. The reference voltage Vbias is input to the comparator 1 as an input voltage vin. When the reference voltage Vbias becomes equal to the OFF threshold voltage ref1, the comparator 1 immediately stops the charging of the stabilizing capacitor 2 by a current source I1. |
| US07924185B2 |
Semiconductor integrated circuit device, pattern detection method and serial-parallel conversion method
A shift register SR configured to successively take in and hold input serial data on the basis of a first clock signal, a pattern detection section configured to detect a predetermined pattern contained in the serial data taken in the shift resister and a second clock generation section configured to determine timing of output of the serial data held in the shift register on the basis of a result of this detection are provided to detect the desired pattern contained in the serial data in the course of transferring the serial data for conversion from the serial data to parallel data to the shift resister, and to determine timing of conversion to the parallel data on the basis of a result of this detection, thus reducing the latency and achieving an improvement in communication speed and a reduction in circuit area. |
| US07924184B1 |
High-speed serial interface circuitry for programmable integrated circuit devices
An integrated circuit (e.g., a programmable integrated circuit such as a programmable microcontroller, a programmable logic device, etc.) includes programmable circuitry and a channel of high-speed serial data signal interface (e.g., transceiver) circuitry. To facilitate enabling the integrated circuit to support any of many possible different high-speed serial communication protocols, the channel is hard-wired to include a parallel data bus of fixed width for exchanging parallel data with the programmable circuitry. Regardless of the protocol being implemented, the full width of this bus is always used. A portion of the programmable circuitry is programmed to convert data between the block width and a group width, which can be different from the block width and which is used for the data elsewhere in the integrated circuit. |
| US07924183B2 |
Method and system for reducing required storage during decompression of a compressed file
A method and system for decompressing a compressed file is disclosed in this invention, the method comprising: reading a compressed data block from the compressed file; decompressing the compressed data block; outputting the decompressed data for storage into a decompressed file; deleting the compressed data block that was decompressed from the compressed file. The proposed method and system in this invention can reduce the unnecessary repeated data between compressed data and decompressed data. The storage space requirement will be reduced during decompression, and the existing compression/decompression algorithms need not be changed by using this invention. Thus, this invention is easy to be integrated into existing compression/decompression tools. |
| US07924182B2 |
Typeless representation of alphanumeric symbols
Method and system for representing a strong of alpha characters, numeral characters and/or delimiters that allows uniform searching procedures, whether or not numerals and/or delimiters are present in the string. Numerical sub strings, containing only numerals and delimiters, are re characterized in binary format and are separated from, and later recombined with, sub strings containing only alpha characters and delimiters, to provide a modified searchable string in binary format Floating point numbers are easily handled in this approach. Delimiters may be any subset of ASCII characters, as distinguished from numerals and from alpha characters. A numeral character, to be transmitted as a sequence of bits, is optimized by expression in a base (power of 2) requiring the smallest bit count. |
| US07924181B1 |
System, method, and computer program product for digitally estimating a clock signal associated with an audio signal
A system, method, and computer program product are provided for estimating a clock signal. Specifically, during use, a clock signal associated with an audio signal is digitally estimated. |
| US07924178B2 |
System and method for lossless data compression
An embodiment of a method for compressing data includes variable length coding one or more values of control codes generated from dictionary coding the data, wherein the control codes comprise literals and indices, wherein each index comprises a length value and a pointer to previously read in data. An embodiment of a system for losslessly compressing input data includes a modeler operable to determine whether a set of input data matches prior input data, an encoder operable to generate control codes including one or more literal control codes and one or more index control codes, wherein each index control code includes a pointer to a location in the input data and a length value indicating a number of bytes to copy from the location, and wherein the length value is variable length coded. |
| US07924175B2 |
Optical keypad for electronic device
Disclosed in a wearable electronic device including an optical keypad supported by a keypad housing. The optical keypad may include a plurality of keys disposed along the keypad housing, and a plurality of illumination sources and optical receivers with a corresponding illumination source and optical receiver for each of the plurality of keys. The keypad signal interface may be limited to three connections, to provide a connection for power, a connection for ground, and a connection for data between the keypad housing and the main housing. The electronic device may also include at least one optical receiver configured to be optically coupled to at least one of the plurality of illumination sources, and configured to convert a received optical signal representing data into an electrical signal representing data. The illumination sources may provide optical signals during key presses, and may in addition provide key illumination for unpressed keys. |
| US07924159B2 |
Remote wafer presence detection with passive RFID
The present invention involves a system and method of remotely detecting the presence of a wafer comprising, a passive RFID circuit, wherein the RFID circuit is attached to an end of a transfer arm located inside a vacuum chamber of an ion implantation system, a reader located outside the vacuum chamber, and wherein the RFID tag provides an indication relating to whether or not a wafer is secured by the transfer arm. |
| US07924157B2 |
Integrated document holder and RFID tag
An integrated document holder and RFID tag device is disclosed herein. The document holder may take the form of a shipping envelope which is affixed to an item and carries documents related to the item such as a packing list or shipping manifest. The device includes an RFID tag integrated into the shipping envelope which allows both the RFID tag and the shipping envelope to be affixed to the item in a single labor effort. |
| US07924156B2 |
Electronically switchable RFID tags
Various switchable RFID devices are disclosed. These switchable RFID devices may include one or more RFID tags and one or more switches. Some of these one or more switches are optionally wireless. In various embodiments, the switchable RFID devices include identity devices, financial devices, remote controls, and the like. In some embodiments, switches are configured to enter data into a switchable RFID device, for example to select a financial account. |
| US07924154B2 |
Security storage container having an internal alarm
A security storage container for securely retaining an item of merchandise therein. The storage container is in the form of a box having a base and a lid, with the item of merchandise being received in the base. The lid is locked to the base by a locking mechanism. The storage container also includes an internally disposed alarm system which is activated when the lid is locked to the base and is deactivated when the lid is unlocked from the base. The lid can only be unlocked with a specially designed key. The alarm system includes a flashing LED which indicates to the consumer that the storage container has an activated alarm therein. The alarm system further includes an EAS tag for activating a security gate at an exit to the protected environment; and further includes a sound-emitting device that will emit a loud sound if an attempt is made to pry the lid from the base when the lid is in a locked position. The sound-emitting device will also emit the loud sound if the locked storage container is brought into the proximity of a security gate. The sound-emitting device will emit the loud sound for a predetermined length of time and will continue to emit that sound even if the security storage container is removed from the protected environment. |
| US07924152B1 |
Interactive video gaming footwear including means for transmitting location information to a remote party
An article of footwear contains an integrated video gaming apparatus, a cellular phone, and a GPS receiver, whereby the footwear is able to encode and transmit its own location to a central monitoring station, along with a cell phone number (or other unique identifier) of a remote person. Using the encoded location information of the wearer of the footwear, and the encoded cell phone number of the remote person, the central monitoring station is able to look up the nearest street address corresponding to the location of the wearer and send an SMS text message with that address to the remote person. If the remote person is wearing the inventive footwear, the central monitoring station can send the remote person the street address of the wearer, or route information, with or without map data, for display on their video gaming device, such that they can “intercept” to meet up with one another. |
| US07924149B2 |
System and method for providing alarming notification and real-time, critical emergency information to occupants in a building or emergency designed area and evacuation guidance system to and in the emergency exit route
The system method described herein could guide people around urban environments indoor and outdoor, provide accurate update and real time emergency notification and information to the building occupants or to the emergency designated area to his cellular phone, We have focused on the task of providing a real time emergency information and navigation along the emergency exit route, The information will be received directly and will display on the existing cellular phone as Bluetooth application. |
| US07924146B2 |
Daytime pedestrian detection on full-windscreen head-up display
A substantially transparent windscreen head up display includes a display having one of light emitting particles or microstructures over a predefined region of the windscreen permitting luminescent display while permitting vision through the windscreen. A method to represent graphical images upon the substantially transparent windscreen head up display of a vehicle alerting to pedestrian traffic includes monitoring informational inputs detecting a location of a pedestrian, monitoring data related to a location of the eyes of an occupant of the vehicle, determining a graphical image to register the location of the pedestrian upon the substantially transparent windscreen head up display based upon the informational inputs and the data related to the location of the eyes of an occupant, and displaying the graphical image upon the substantially transparent windscreen head up display. |
| US07924139B2 |
Wireless authentication method and wireless authentication system
A first communication device performs a first, a second, and a third authentication processing for a second communication device, a authentication station sends to the first communication device a confirmation signal indicating that a person's identity is confirmed, when the authentication station succeeds the authentication of the second communication device, so that the authentication station validates the cancellation of a usage restrictions of the controlled device imposed by the first communication device based on the cancellation permission signal. |
| US07924130B2 |
Isolation magnetic devices capable of handling high speed communications
An isolation magnetic device produced by inserting a first end of a wire through a first hole of a core, wrapping the first end of the wire around a first side of the core and inserting the first end of the wire through a second hole of the core. The second hole of the core is spaced from the first hole and has a longitudinal axis extending parallel to a longitudinal axis of the first hole. The device is further produced by inserting a second end of the wire through the second hole of the core, wrapping the second end of the wire around the first side of the core and inserting the second end of the wire through the first hole of the core. |
| US07924128B2 |
Magnet unit, elevator guiding apparatus and weighing apparatus
A magnet unit includes a first magnetic pole (7a), a second magnetic pole (7b) and a third magnetic pole (7c) at a center between the first magnetic pole (7a) and the second magnetic pole (7b), providing an E-shaped configuration. In the magnet unit, a first magnet is defined between the first magnetic pole (7a) and the third magnetic pole (7c) by connecting two electromagnets (71aa, 73aa) with each other through a permanent magnet (72a), while a second magnet is defined between the second magnetic pole (7b) and the third magnetic pole (7c) by connecting two electromagnets (71ba, 73ba) with each other through a permanent magnet (72b). With this configuration, it is possible to reduce a deviation in the length of respective magnetic paths from the permanent magnets (72a, 72b) up to their respective magnetic poles. By controlling exciting currents to the respective magnetic poles. By controlling exciting currents to the respective electromagnets (71aa, 73aa, 71ba, 73ba), it is also possible to adjust fluxes (or flux density) in respective directions x, y individually. |
| US07924127B2 |
Electro-magnetic force driving actuator and circuit breaker using the same
An electromagnetic force driving actuator and a circuit breaker using the same is disclosed. The actuator comprises a casing that forms two paths having a certain length in longitudinal direction, and forms a middle wall by the two paths; a main magnetic field generation element that is allocated on the both face wall of the two paths of the casing; and a moving element that, as the middle wall is located in the center, a coil, which is bound in the orthogonal direction to longitudinal direction of the paths, is in a body that its left and right sides passes through the paths and its front and back side are exposed to outside, when forward direction or reverse direction current is provided in the coil, moves forward and backward along the longitudinal direction of the paths. |
| US07924125B2 |
Stop lamp switch
A stop lamp switch including: an enclosure; a reed switch disposed in the enclosure; a magnet, disposed in the enclosure, a magnetic field of which opens and closes the contacts of the reed switch; an actuating shaft that is movable along an axial direction of the enclosure; a blocking member provided on the actuating shaft, that moves with the movement of the actuating shaft, between a first position, at which the magnetic field from the magnet directed toward the first reed switch is blocked, and a second position, at which the blocking of the magnetic field from the magnet directed toward the first reed switch is no longer blocked. |
| US07924124B2 |
Electrical switching device comprising magnetic displacement elements for a switching element
Electrical switching device, especially a high-frequency switching device, with at least one oblong electrical switching element, which is arranged with one contact end between two fixed-contact elements spaced a transverse distance from one another and can be moved by two adjustment elements forming a transverse movement drive transversely to a longitudinal direction optionally towards the one or the other fixed-contact element. The adjustment elements are disposed laterally alongside the switching element and can be moved transversely to and from the switching element. In order to improve the transverse movement drive for the switching element, the switching element-comprises magnetic material, wherein the adjustment elements are formed by magnets. |
| US07924122B2 |
Collapsible contact switch
Embodiments of the invention describe a contact switch, which may include a bottom electrode structure including a bottom actuation electrode and a top electrode structure including a top actuation electrode and one or more stoppers able to maintain a predetermined gap between the top electrode and the bottom electrode when the switch is in a collapsed state. |
| US07924119B1 |
Micromechanical bulk acoustic mode resonators having interdigitated electrodes and multiple pairs of anchor supports
A micromechanical resonator operable in a bulk acoustic mode includes a resonator apparatus suspended over a substrate by a plurality of pairs of anchors. The resonator apparatus includes a conductive metal layer, a piezoelectric layer on the conductive metal layer and a plurality of interdigitated electrodes on the piezoelectric layer. The interdigitated electrodes are configured so that a total number of electrode fingers in the plurality of interdigitated electrodes is greater than a total number of the plurality of pairs of anchors. |
| US07924113B2 |
Integrated front-end passive equalizer and method thereof
A passive equalizer circuit incorporated at a front-end of an integrated receiver circuit uses passive components that are distributed between inside and outside of an integrated circuit package. The passive equalizer circuit has off-chip components that are placed on a printed circuit board and on-chip components that are fabricated on a common integrated circuit die as a receiver chip. The on-chip components include one or more variable resistors for adjusting a degree of equalization. The off-chip components include one or more resistors for fine tuning input impedance matching of the integrated receiver circuit. |
| US07924107B2 |
Resonant tunneling structure
A resonant tunneling structure for generating oscillation with multiple fundamental oscillation frequencies is provided. A first quantum well layer has a second sub-band (E2). A second quantum well layer has a first sub-band (E1) and a third sub-band (E3). When no electric field is applied, the resonant tunneling structure satisfies “(Eb1, Eb2) |
| US07924101B1 |
Systems and methods for improved VCO gain tracking loop
Methods and apparatus for calibrating the VCO element of a phase-locked loop to correct for non-linearities are disclosed. The modulation port of the VCO may be characterized to generate a tuning model, which may then be used to generate a correction signal to be combined with an input signal and applied to the VCO modulation port. The tuning model may be based on a third or higher order polynomial generated from a plurality of open-loop frequency measurements of the VCO. |
| US07924098B2 |
High frequency amplifier circuit and mobile communication terminal using the same
A first FET is inserted in a series position between a signal input terminal and a signal output terminal, while second and third FETs are inserted in a shunt position respectively between the signal input terminal and a ground terminal and between the signal output terminal and a ground terminal. First and second reference voltage terminals and a control terminal are provided. A first reference voltage and a control voltage are applied to the first FET, while a second reference voltage and a control voltage are applied respectively to the second and third FETs, so that the first, second, and third FETs serve as variable resistors. As such, a gain control circuit is constructed. Further, a first resistor is provided in parallel to the first FET, while second and third resistors are provided respectively in series to the second and third FETs. |
| US07924091B2 |
Class-D transconductance amplifier
The invention relates to a class-D audio amplifier. The class-D audio amplifier is configured in a current feedback mode as a voltage-controlled current source and a passive inductor/capacitor (LC) reconstruction filter. A portion of the passive LC reconstruction filter is situated in a feedback loop to an error amplifier. |
| US07924087B2 |
Reference buffer circuit
A reference buffer circuit with high driving capability is disclosed. In which, a buffering stage has a first NMOS transistor and a first PMOS transistor to provide high and low tracking voltages respectively based on a high input voltage and a low input voltage. A first driving stage is driven by the high and low tracking voltages to output a first high output voltage and a first low output voltage. A body of the first PMOS transistor is tied to a first bias voltage lower than a supply voltage for the buffering and first driving stages. |
| US07924078B2 |
Bistable circuit with auto-time-adjusted switching, and flip-flop using such a bistable circuit
Bistable circuit switching at the edges of a clock signal, including means for pre-charging an intermediate node of the circuit, delay means including a chain of inverters defining a time window around an edge of said clock signal, means for discharging the intermediate node controlled by at least one input data item making it possible to discharge the intermediate node for the duration of said time window, characterized in that the delay means include means for temporally adjusting the duration of the time window to the time for discharging the intermediate node through said discharge means. |
| US07924077B2 |
Signal processing apparatus including latch circuit
A signal processing apparatus includes: a latch circuit; a set pulse generation circuit; a reset pulse generation circuit; and a correction set signal forming circuit. The correction set signal forming circuit forms a correction set signal for applying a set instruction continuously during a time period from a time point of a front edge of the set pulse generated from the set pulse generation circuit or a time point delayed from the time point of the front edge to a time point at which the reset pulse is generated. The correction set signal forming circuit supplies the correction set signal to the set input terminal of the latch circuit. |
| US07924073B2 |
Semiconductor memory device having back-bias voltage in stable range
A back-bias voltage generating circuit controls the back-bias voltage in a predetermined range by detecting the back-bias voltage in case the back-bias voltage level decreases below a predetermined target level. The circuit includes first and second detecting units outputting respective detection signals, which detect a voltage level of the terminal based on respective higher first and lower second target levels. An oscillator generates an oscillation signal that oscillates at a predetermined frequency, in response to a detection signal of the first voltage detecting unit. A charge pumping unit drives the terminal by performing charge pumping in response to the oscillation signal. A voltage level control unit controls the voltage level of the terminal in response to the detection signals, whereby the terminal's voltage level is lower than the first target level and higher than the second target level. |
| US07924071B2 |
Synchronization detection circuit, pulse width modulation circuit using the same, and synchronization detection method
Provided is a synchronization detection circuit including: a multiphase clock generation circuit which includes a phase locked loop circuit that generates multiphase clock signals having a plurality of different phases, based on a reference clock signal, and which generates high-speed multiphase clock signals having a frequency obtained by multiplying a frequency of the reference clock signal, and low-speed multiphase clock signals having a frequency obtained by dividing a frequency of the high-speed multiphase clock signal; and a synchronous clock specifying circuit that specifies a clock signal synchronized with a synchronous signal from among the multiphase clock signals, and generates a synchronous position signal indicating a synchronous position of the synchronous signal, based on a comparison result between the synchronous signal and the high-speed multiphase clock signals and a comparison result between the synchronous signal and representative clock signals selected from the low-speed multiphase clock signals. |
| US07924069B2 |
Multi-modulus divider retiming circuit
A multi-modulus divider (MMD) receives an MMD input signal and outputs an MMD output signal SOUT. The MMD includes a chain of modulus divider stages (MDSs). Each MDS receives an input signal, divides it by either two or three, and outputs the result as an output signal. Each MDS responds to its own modulus control signal that controls whether it divides by two or three. In one example, a sequential logic element outputs SOUT. The low jitter modulus control signal of one of the first MDS stages of the chain is used to place a sequential logic element into a first state. The output signal of one of the MDS stages in the middle of the chain is used to place the sequential logic element into a second state. Power consumption is low because the sequential logic element is not clocked at the high frequency of the MMD input signal. |
| US07924068B2 |
Automatic adjustment circuit, and filter circuit
An automatic adjustment circuit comprises a replica (1) constituted of either a circuit block of a portion of a filter body (3) or a combination of the circuit block, and fed with a reference signal (2) from the outside, for outputting signals having a phase delays of 90 degrees and 180 degrees with respect to the reference signal (2), and an integrating comparator (4) fed at its input terminal with an output signal, as having a phase delay of 180 degrees, of the replica (1) and the reference signal (2), and at its clock terminal with an output signal, as having a phase delay of 90 degrees, of the replica (1), and having an output terminal connected with a capacity (C1) and a frequency characteristic adjusting terminal of the replica (1). The automatic adjusting circuit is characterized in that the integrating action of the integrating comparator (4) is performed across the two high/low states of the input signal. |
| US07924067B2 |
Low current wide VREF range input buffer
A low-current input buffer is disclosed. The buffer uses self-biased N and P channel differential pairs with their outputs tied together. The self-biasing assists in reducing current consumption. The combination of N and P-channel differential pairs results in symmetry across a wide range of reference and supply voltages. |
| US07924066B2 |
Low speed, load independent, slew rate controlled output buffer with no DC power consumption
An output buffer utilizes capacitive feedback to control the output slew rate largely independent of load capacitance. The invention slows the rising and falling slew rates and via a capacitance feedback reduces the effect of load capacitance on slew rate, and uses no DC current. Transistor switches are employed to isolate and reduce noise and interaction among the circuit components and functions. |
| US07924063B2 |
Electronic control apparatus for controlling driving of load by MOS FETs
An ECU has a main IC and at least one auxiliary IC, with at least the auxiliary IC driving one or more MOS FETs to control supplying of power to respective electrical loads, e.g., in a vehicle. A stepped-up voltage, higher than the circuit power source voltage, is generated within the main IC and supplied to each auxiliary IC, for driving gate electrodes of the MOS FETs. Electrical noise produced by operation of a voltage step-up circuit in the main IC is effectively suppressed by elements that are coupled only to a power source terminal of the main IC alone. |
| US07924059B2 |
Reconfigurable and reliable logic circuit elements that exploit nonlinearity and noise
A logic gate is adapted to implement logical expressions. The logic gate includes at least one input that is adapted to receive an input signal and at least one control signal. At least one of the input signal and the control signal is a noise signal. At least one output is adapted to produce an output signal. A nonlinear updater operates as a dynamically configurable element and produces multiple different logic gates as selected by the control signal based at least in part on the noise signal. The nonlinear updater is electrically coupled to the input and is also electrically coupled to the output. The nonlinear updates is configured to apply a nonlinear function to the input signal in response to the control signal to produce the output signal representing a logical expression being implemented by one of the multiple different logic gates on the input signal. |
| US07924055B2 |
Data transmitting system
A data transmitting system is provided that includes a transmitter that suppresses coupling noise by being operated using a differential voltage driving scheme at the time of transmitting data and being operated using a common voltage driving scheme by equalizing potential of a pair of transmission lines during a transition interval; and a receiver that is connected to the transmitter through the pair of transmission lines and recovers the data by sensing the voltage difference in signals of the pair of transmission lines. |
| US07924052B1 |
Field programmable gate array architecture having Clos network-based input interconnect
A cluster internal routing network for use in a programmable logic device with a cluster-based architecture employs a Clos network-based routing architecture. The routing architecture is a multi-stage blocking architecture, where the number of inputs to the first stage exceeds the number of outputs from the first stage. |
| US07924050B2 |
Key based pin sharing selection
This invention is an integrated circuit having at least one data pin connecting to external circuits. The invention plural operational units each having a normal mode and a stall mode controlled by an enable input. Selection logic selectively enables an operation unit and connects the data input/output of the enabled operation unit to the data pin. The operational units are responsive to a preceding or following key to enter the normal mode. Each operational unit switches between stall mode and the normal mode upon receiving a corresponding predetermined selection number of pulses at while the clock input receives a non-cycling signal. Greater number of pulses deselect all operational units, switch operational units to the normal mode if the correct key is received and switch all operational units to the stall mode. |
| US07924042B2 |
Semiconductor device, and design method, inspection method, and design program therefor
A design method for automatically determining layout of a multilayer semiconductor device which has circuit blocks formed on a semiconductor substrate and measurement terminals for measuring voltage, logic state, or the like, on wiring lines for connecting the circuit blocks. The method includes the steps of registering measurement terminals as cells in design rules, together with the circuit blocks wherein each measurement terminal has an electrode formed in an uppermost layer of the semiconductor device, and the measurement terminal is connectable to a wiring line for connecting any two of the circuit blocks, which is formed in any layer of the semiconductor device; planar-arranging the measurement terminals and the circuit blocks; and establishing connection of each wiring line, which extends from one of the circuit blocks, via one of the measurement terminals. |
| US07924040B2 |
Electrical probe having a conductive whisker
Methods, devices, and systems for probing electrical circuits without loading the circuits are described herein. One embodiment of an electrical probe includes a coaxial cable having an inner conductor and an outer conductor, an extension portion of the inner conductor extending beyond the outer conductor at a probe end of the cable. The electrical probe includes a conductive whisker having a first portion separated from and extending a distance along the extension portion such that the first portion and the extension portion form a first capacitor and a second portion having a probe tip for receiving an input test signal from a circuit node under test. |
| US07924036B2 |
Contactor assembly for integrated circuit testing
The present invention provides a contactor assembly (100,200,300) for testing of semiconductor devices (DUT). The contactor assembly (100,200,300) includes a plurality of probes (20,22,24), a contactor holder (150,350) and a cover (180,280) shaped and dimensioned to fit on the contactor holder (150,350). The contactor holder (150,350) is a stack of laminates. A top laminate (156,256) of the contactor holder (150,350) has apertures (158,258). A contact probe (22) is seen through one aperture (158,258). On a rear face of the cover (180,280), there is at least one conductive pad (186) in register with an aperture (158,258). Each aperture (158,258) is operable to house a surface-mount electric component (160), such as a resistor, capacitor or inductor, and a conductive compressive element (162). In another embodiment, a front side of a cover (280) has a connector (285) in electrical communication with a conductive pad (186). In use, a signal in one probe (22) is operable to be: coupled to a signal in another probe; filtered from a separate probe; or compensated for impedance, capacitance or inductance; such coupling, filtering or compensating is made possible by series and/or parallel connection of the electric component (160). |
| US07924029B2 |
Half-bridge for capacitive sensing
Methods and apparatus are provided for measuring a ratio of capacitances. The apparatus include a comparator including a comparator input, a comparator output, and a reference voltage; a first capacitive element including a first capacitance, a first electrode coupled to the comparator input, and a second electrode; a first biasing element coupled to the first electrode; a digitally-controlled voltage waveform generator for generating a varying waveform, the voltage waveform generator including a voltage waveform generator output coupled to the second electrode; a second capacitive element including a second capacitance and a third electrode coupled to the comparator input; and a controller coupled to the comparator output, the controller configured to control the digitally-controlled voltage waveform generator, wherein an output signal of the comparator is dependent on a ratio comprising the first capacitance and the second capacitance, and the first capacitive element and/or the second capacitive element has a variable capacitance. |
| US07924027B2 |
Arrangement for determining the distance, capacitive distance sensor and method for automatically focussing a microscope
An arrangement and method are provided for determining the distance between an objective of a microscope and a sample examined with the microscope. Fitted on the objective or in the immediate vicinity of the objective is a capacitive sensor in whose measuring range the sample and/or a microscope slide supporting the sample is located or into which it can be brought. The sample and/or the slide causing a measurable change in the capacitance of the sensor. From the change in the capacitance of the sensor, the distance of the sample and/or of the microscope slide from the sensor is determined, and thus the distance of the sample from the objective. A capacitive distance sensor can be applied in such an arrangement by which a stray field can be generated between at least two electrodes. The capacitance experiences a measurable change owing to an object introduced into the stray field. The electrodes of the sensor are arranged as substantially coaxial lateral surfaces. The electrodes are designed such that the sensor can be plugged onto the objective of the microscope, the lateral surfaces at least partially enclosing and touching the objective. |
| US07924020B2 |
Free-state modal frequency response testing
An apparatus and associated method is provided for suspending a test object in a gravitational field from a support member, exciting the test object by noncontactingly engaging it with a predetermined waveform force, and characterizing the test object qualitatively in relation to an observed modal frequency response of the test object to the excitation. |
| US07924019B2 |
System and method for fault isolation and leakage current detection
An inverter system for a vehicle including a housing, a primary stage, a secondary stage and a fault detection circuit is provided. The primary stage is configured to receive a first voltage signal from an energy power source to generate a second voltage signal. The secondary stage is configured to generate a third voltage signal in response to the second voltage signal. At least one of the primary and the secondary stages define at least one resistance point for discharging leakage current responsive to generating the third voltage signal. The fault detection circuit is configured to electrically couple the primary stage and the secondary stage to provide the second voltage signal to the secondary stage and to measure a portion of the third voltage signal to determine whether the leakage current being discharged through the at least one resistance point is within a predetermined current range. |
| US07924018B2 |
MEMS electrometer that measures amount of repulsion of adjacent beams from each other for static field detection
An apparatus for detecting a static field includes a microelectromechanical systems (MEMS) device having two cantilevered beams of conductive material that are adjacent and substantially parallel to each other. The two beams repel each other in the presence of a static field. At least one sensor detects a respective amount of displacement of the two cantilevered beams from a rest position and determines an amount of repulsion of the two cantilevered beams from each other. |
| US07924017B2 |
Measuring device, measuring probe, and method of operating the measuring device
The measuring device has at least one measuring probe, e.g., a physical or electrochemical measuring probe, which is equipped with one or more memory units and which is connected through a cable, e.g., a coaxial cable, to a transmitter which includes a processor. The measuring probe has a ground wire and is connected to the memory unit through a first signal wire, wherein under the control of the processor in accordance with a transmission protocol, the first signal wire and a connecting cable serve for the unidirectional transmission of the analog or digital measuring signal of the measuring probe as well as the preferably bidirectional transmission between the measuring probe and the transmitter of digital operating data which are read from or to be written into the memory unit. |
| US07924015B2 |
Automotive vehicle battery test system
A cable for connecting to an electronic battery tester, includes a first end configured to couple to a databus of a vehicle and a second end configured to couple to the electronic battery tester. An electrical connection extends between the first end and the second end and is configured to couple the electronic battery tester to the databus of the vehicle. |
| US07924014B2 |
Electromagnetic surveying for hydrocarbon reservoirs
A method of electromagnetic surveying of an area of seafloor that is thought or known to contain a subterranean hydrocarbon reservoir is described. The method includes broadcasting an EM signal from a horizontal electric dipole (HED) transmitter and obtaining vertical electric dipole (VED) response data at a remote receiver in response thereto. Survey data are analyzed by comparing the VED response data with background data which are not sensitive to the postulated hydrocarbon reservoir. Accordingly, differences between the VED response data and the background data allow for the identification of buried hydrocarbon reservoirs. The background data may be provided by magneto-telluric surveying, controlled source electromagnetic surveying or from direct geophysical measurement. By employing VED response data in this way, surveys may be performed in shallower water than has previously been possible since the VED detector is not sensitive to air-wave components of the EM field induced by the HED transmitter at the VED detector. |
| US07924013B2 |
Apparatus and system for well placement and reservoir characterization
A resistivity array having a modular design includes a transmitter module with at least one antenna, wherein the transmitter module has connectors on both ends adapted to connect with other downhole tools; and a receiver module with at least one antenna, wherein the transmitter module has connectors on both ends adapted to connect with other downhole tools; and wherein the transmitter module and the receiver module are spaced apart on a drill string and separated by at least one downhole tool. Each transmitter and receiver module may comprise at least one antenna coil with a magnetic moment orientation not limited to the tool longitudinal direction. A spacing between the transmitter and receiver module may be selected based on expected reservoir thickness. |
| US07924011B2 |
Ferromagnetic shield for magnetic resonance imaging
A cryocooler assembly includes a ferromagnetic shield and a moveable rare-earth regenerator for recondensing of a cooling liquid for cooling of a superconductive magnet of a magnetic resonance imaging apparatus. The ferromagnetic shield effectively provides depletion of a magnet field in the vicinity of the rare-earth regenerator and therefore on the one hand reduces the noise impact of the moving regenerator on the homogeneous magnetic field in the imaging volume of the MRI apparatus and on the other hand reduces the mechanical force exerted by the magnetic field on the rare-earth regenerator. |
| US07924007B2 |
Method for automatic coil selection in a magnetic resonance apparatus
In a method for coil selection of a magnetic resonance apparatus, a determination of coil positions of the multiple coil devices of the magnetic resonance apparatus is made and a determination is also made of a number of coil groups, wherein a coil group is composed of at least one coil device. One or more coil groups is associated with positions of the support device, and the coil group that is associated with a position of the support device includes the coil devices that are suitable for use in that associated position of the support device. A control of one of the multiple coil groups dependent on the position of the support device. |
| US07924002B2 |
Magnetic resonance field map estimation for species separation
A method for mapping field inhomogeneity for forming a magnetic resonance image is provided. A magnetic resonance excitation is applied. A plurality of k-space echoes signals is acquired. A periodic cost function is calculated from the acquired plurality of k-space echo signals. A period of the calculated periodic cost function is divided into multiple regions. A search algorithm is used to locate a local minimum in each region. Located local minimums are chosen to provide global smoothness. |
| US07923997B2 |
Magneto-sensitive integrated circuit
A magneto-sensitive integrated circuit which amplifies a magneto-sensitive output voltage of a Hall element by an amplifier to generate an amplified voltage, converts an output voltage of the amplifier into a digital signal by an A/D converter; and generates a reference voltage of magnitude corresponding to an indicated value. The amplifier includes a voltage superposition element which superposes a DC voltage corresponding to the reference voltage on the amplified voltage to generate the output voltage of the amplifier. |
| US07923994B2 |
Spiral magnetic field apparatus and method for pipeline inspection
A system and method are disclosed for inspecting the wall of a pipeline while traveling therethrough. The system may comprise a portion of pipe comprising a pipe wall forming a cylindrical tube defining a circumferential direction and an axial direction. The system may further include an in-line inspection tool positioned within the portion of pipe. The in-line inspection tool may include a frame extending in the axial direction and at least one magnet connected to the frame and positioned to generate a magnetic field. The magnetic field may be orientated obliquely with respect to the circumferential and axial directions of the pipeline. The inspection tool may include a transmitter connected to the frame to generate an inspection signal within the magnetic field. |
| US07923993B2 |
Rotation detection device and rotation detector equipped bearing assembly
A rotation detection device includes a plurality of magnetic encoders of a ring shape arranged coaxially and having different numbers of magnetic poles, a plurality of magnetic sensors each operable to detect the magnetic field of the corresponding magnetic encoder and having a function of detecting positional information within a single magnetic pole of the corresponding magnetic encoder, a phase difference detector to determine the phase difference of magnetic field signals detected respectively by the magnetic sensors, and an angle calculator to calculate an absolute rotation angle of the magnetic encoders based on the detected phase difference. |
| US07923989B2 |
Test handler
A test handler includes a loading unit for loading semiconductor devices from customer trays onto a test tray; a test chamber for performing a test for the semiconductor devices loaded on the test tray; a pushing unit having at least one pushing member for pushing the test tray located in the test chamber to be tested, and a press unit for operating the pushing member; a position control unit for adjusting a position of the pushing member to compensate a deviation between the pushing member and the test tray due to a thermal expansion or contraction of any one of the pushing member and the test tray; and an unloading unit for unloading the semiconductor devices loaded on the test tray onto the customer trays after a test for the semiconductor devices is completed. |
| US07923985B2 |
Active autoranging current sensing circuit
A range-changing circuit for a measurement device having a desirable range includes an array of graduated impedances. And amplifier supplies an electrical voltage to at least one of the impedances of the array. A voltage sensing and limiting switch is provided in a feedback path of the amplifier. The switch limits said electrical voltage supplied to said at least one of the impedances in response to a sensed voltage that is sensed by the switch. An electrical voltage in the desirable range is developed across a different one of the impedances of the array based on an operation of the switch. |
| US07923983B2 |
Method and apparatus for measuring AC voltages
A method and apparatus for providing AC voltage measurements. The apparatus includes an AC voltage monitor for determining at least a first and a second voltage representing an AC voltage of an AC circuit, generating a serial data stream frame including data representing the at least a first and a second voltage, and transmitting the serial data stream frame. |
| US07923979B2 |
Control system for dynamically adjusting output voltage of voltage converter
A control system for dynamically adjusting an output voltage of a voltage converter includes a signal calculation circuit, a pulse width modulator, a voltage converter, a nonlinear calibration circuit and a signal converter. The signal calculation circuit, the pulse width modulator, the voltage converter and the signal converter form a long-tail loop. The signal calculation circuit simultaneously receives a target value and a detection value from the signal converter to generate an error value for adjusting the output of the pulse width modulator. The voltage converter and the nonlinear calibration circuit form a local pulse-squashing loop. Pulse widths of an input signal to the voltage converter can be timely and effectively calibrated and controlled, thereby decreasing power consumption of the voltage converter and providing an effective protective mechanism. |
| US07923978B2 |
Regulator circuit having over-current protection
A stabilized regulator circuit is provided A first Pch transistor (PTr) (P1) whose source is connected to a power supply line and whose drain is connected to an output terminal that outputs a load current, a PTr (P2) whose source and gate are respectively connected to the source and gate of the PTr (P1), resistor elements connected in series between the output terminal and ground, a resistor element (R3) connected between a drain of P2 and ground, and an amplifier which controls P1 and P2 based on a difference between potential of a connection point of the resistor elements and a reference. A comparator, with a differential amplifier input stage configured by an Nch transistor, compares potential difference between two ends of R3 and potential difference between the connection point of the resistor elements and ground, and when the former is larger, controls P1 so as to limit load current. |
| US07923977B2 |
DC-DC converters with transient response control
A DC-DC converter used to convert an input voltage to an output voltage is disclosed. The DC-DC converter comprises a pulse-width-modulation (PWM) generator, a transient boost circuit, a logic circuit, a switching device, and a buck circuit. The pulse-width-modulation (PWM) generator generates a PWM signal according to the output voltage. The transient boost circuit generates an adjusting signal according to the variation of the output voltage. The logic circuit generates a switch signal according to the PWM signal and the adjusting signal. The switching signal is at a high level when the PWM signal or the adjusting signal is at the high level, and the switching signal is at a low level when the PWM signal and the adjusting signal are at the low level. The switching device converts the input voltage to a driving signal according to the switching signal. The buck circuit receives the driving signal to generate the output voltage. |
| US07923976B2 |
Fault protection circuit, method of operating a fault protection circuit and a voltage regulator employing the same
Embodiments of the present disclosure provide a fault protection circuit, a method of operating a fault protection circuit and a voltage regulator. In one embodiment, the fault protection circuit is for use with the voltage regulator and includes an output power section having first and second MOS transistors configured to provide a regulated voltage on an output node of the voltage regulator. The fault protection circuit also includes a gate pull-down section connected to the first and second MOS transistors and configured to provide a gate pull-down MOS transistor to limit a current through the first and second MOS transistors during a current overload fault condition on the output node. |
| US07923974B2 |
Modification of switch activation order in a power supply
A power supply system includes multiple power converter phases. A controller (e.g., a processor device) monitors energy delivery for each of multiple power converter phases that supply energy to a load. The controller analyzes the energy delivery associated with each of the multiple power converter phases to identify an imbalance of energy delivered by the multiple power converter phases to the load. Based on the analyzing and detection of an imbalance condition, the controller modifies a future order of activating the multiple power converter phases for powering the load. Accordingly, a single phase of a multiphase switching power converter may be prevented from becoming overloaded while delivering energy to power the load. |
| US07923970B2 |
Charge controlling circuit
A charge controlling circuit controls charging of a lithium-ion rechargeable battery. An electric power supplied from an external charger to the lithium-ion rechargeable battery is taken by a charging terminal. When the charging terminal is connected to the external charger, whether or not a charge prohibition condition is satisfied is determined by a CPU. A charging operation is prohibited when the charge prohibition condition is satisfied, but is permitted when the charge prohibition condition is not satisfied. Here, the charge prohibition condition includes a shortest time condition that a time during which the charging terminal is detached from the external charger is above a defined time decided in view of an instantaneous power interruption. |
| US07923967B2 |
Method for controlling battery pack
A method controls a battery pack that includes a rechargeable battery, a control circuit that controls charge operation of the battery, and a charge control element that controls the charge current through the control circuit. In the method, even though the control circuit controls the charge control element so that the charge control element turns to OFF, in a case where the charge current is detected, the control circuit determines that abnormality occurs if detecting that the current flows at a rate not less than a first current value during a first detection period, and additionally determines that abnormality occurs if detecting a state the current flows at a rate less than the first current value for a second detection period longer than the first detection period. |
| US07923964B2 |
Charger including a rotatable module having an output connector, the module pivotally disposed in a cavity defined in an upper surface of a base of the charger
A charger adapted for charging a mobile phone includes a base defining a cavity and a rotatable module having a main body. The rotatable module is pivotally disposed in the cavity. The main body has a basic portion and an engaging portion which substantially perpendicularly extends from one end of the basic portion. An output connector is disposed in the engaging portion and extends out of the engaging portion towards the other end of the basic portion to define a mating direction substantially parallel with the basic portion. When the charger is in an opened state for charging, the basic portion is rotated to a predetermined place and the output connector is therefore located out of the cavity; when the mobile phone is taken away from the charger, the output connector returns into the cavity. |
| US07923957B2 |
Control system and method for motor drivers
A control method for motor driver includes: outputting a first signal from the controller to the first motor driver; making the first timer start to count for a first time; returning a first feedback signal from the first motor driver to the controller; dividing a value of a first count time of the first timer by two to get a value of a first delay time, wherein the first delay time is defined as the time of transmitting signals from the controller to the first motor driver; adding the value of the first delay time to the value of the first count time of the first timer to get a first sum; and transferring the first sum to the second timer to replace a value of a count time of the second timer. |
| US07923952B2 |
Device for controlling polyphase rotating machine
A device for controlling a polyphase rotating machine, the machine comprising a stator, a rotor, and sensors, the device being capable of receiving: at least one first sensing signal (U; V; W) representing a position of the rotor relative to the stator and output by a first sensor; and a second sensing signal (V; W; U) representing the position and phase-shifted relative to the first signal and output by a second sensor. The control device comprises: means (K, R) for combining the first and second sensing signals into a combined signal, the means including at least one controlled switching element capable adopting at least in two states, the combined signal being based on a state of the first element and enabling the machine to be controlled. |
| US07923950B2 |
Vehicle drive device and method of controlling vehicle drive device
A vehicle drive device includes an engine (200), a motor generator (MG1) driven by the engine (200) and generating power, a motor generator (MG2) driving the vehicle and generating electric power at the time of regenerative braking, a battery (B) capable of exchanging power to/from the motor generators (MG1, MG2), a temperature sensor (10) detecting temperature of the battery (B), and a controller (30) controlling the motor generators (MG1, MG2). If reduction in a required driving torque value of the motor generator (MG2) is detected, the controller changes start timing of regenerative braking by the motor generator (MG2) dependent on an output of the temperature sensor (10). |
| US07923946B2 |
Flywheel-based energy storage on a heave-compensating drawworks
A system for managing energy consumption in a heave-compensating drawworks includes a power supply, a winch drum connected to the power supply so as to receive power from the power supply, a flywheel connected to the winch drum and to the power supply, and a controller connected to the power supply and to the winch drum for passing energy to and from the flywheel during an operation of the winch drum. The flywheel includes a disk rotatably coupled to an AC motor. The power supply includes a first pair of AC motors operatively connected on one side of the winch drum and a second pair of AC motors operatively connected on an opposite side of the winch drum. |
| US07923943B2 |
Secondary side post regulation for LED backlighting
A secondary side post regulator arrangement for a plurality of LED strings. For each secondary winding, a first electronically controlled switch is provided arranged to control the power output, and a LED string is connected thereto. A second electronically controlled switch is further connected in series with the LED string, arranged to receive a PWM signal, thereby pulsing current through the LED string. A current sensing element is further provided outputting a voltage representation of the current through the LED string, and a synchronized sampling circuit is provided arranged to sample the voltage representation during the on period of the second electronically controlled switch. The sampled and held voltage representation is compared with a reference signal and fed back to control the first electronically controlled switch. The voltage output associated with each secondary winding is controlled, responsive to the reference voltage. |
| US07923941B2 |
Low cost compact size single stage high power factor circuit for discharge lamps
The present application claims a compact low cost topology solution of a ballast for a discharge lamp that can provide both high power factor and low total harmonic distortion with fewer components than prior art. The topology provides the feature of a low crest factor and quick start that increase both the lamp life and the number of starts for the product. By using Bipolar Junction Transistor instead of Field Effect Transistor as the main switches and also a lower value electrolytic, the cost and size are considerably reduced. |
| US07923940B2 |
Discharge lamp lighting device and projector
A method of generating a driving current supplied to a high pressure discharge lamp, including outputting a DC current, converting the DC current to an AC current having a predetermined frequency, generating a reference pulse which is asynchronous with the AC current, and superposing the first pulse and the second pulse to the AC current for producing the driving current. |
| US07923932B2 |
Short metal vapor ceramic lamp
A high intensity arc discharge lamp having a short metal seal plug running hotter than typical of capillary seals, enables a lamp with a metal fill to achieve a vapor pressure higher than the one set by the cold spot temperature typically of a capillary seal lamp. Corrosive fill materials, such as halogens are excluded. Zinc may be used to in starting the lamp. |
| US07923931B2 |
Plasma display panel and related technologies including method for manufacturing the same
A plasma display panel is disclosed. The plasma display panel includes a first panel including address electrodes, a first dielectric layer, and a phosphor layer formed on a first substrate, and a second panel bonded with the first panel by interposing barrier ribs therebetween, the second panel including a plurality of transparent electrodes and bus electrodes, a second dielectric layer, a first protective layer containing magnesium oxide doped with a crystalline oxide, and a second protective layer containing crystalline magnesium oxide. |
| US07923928B2 |
Illuminating device
An illuminating device comprises one or more luminescent devices (1). The luminescent device comprises a semiconductor light emitting element (10) emitting a excitation light having an peak within a wavelength range from 350 nm to 430 nm, and a luminescent part (20) comprising a sealing member (22) and a phosphor (21) absorbing the light from the semiconductor light emitting element (10) and emitting a light with different emission spectrum. For the luminescent device (1), an excitation light contribution degree ΔE, an index quantitatively representing what extent of a visible component of the excitation light is involved in color mixing of a combined light of the luminescent device (1), is 0.005 or less, and a mean color rendering index Ra is 70 or more. |
| US07923926B2 |
Organic electroluminescent panel and organic electroluminescent display device
An organic electroluminescent panel has excellent reliability of luminance of emitted light, and an organic electroluminescent display device includes such an organic electroluminescent panel. The organic electroluminescent panel includes a structure in which the first electrode, an organic layer including at least a light-emitting layer, the second electrode are stacked in this order on a substrate having a surface on which an organic insulating film is formed, wherein the organic electroluminescent panel further includes an inorganic insulating film, the inorganic insulating film covers the organic insulating film and the first electrode, the inorganic insulating film has an opening in a display region and an opening in a non-display region, and the opening in the display region is formed on the first electrode. |
| US07923925B2 |
Light emitting device with a stopper layer structure
Electroluminescent (EL) devices structures are provided comprising a hot electron stopper layer structure to capture hot electrons and dissipate their energy, thereby reducing damage to the transparent conducting oxide (TCO) layer and reducing other hot electron effects, such as charging effects, which impact reliability of EL device structures. The stopper layer structure may comprise a single layer or multiple layers provided between the TCO electrode layer and the emitter structure, and may also function to reduce diffusion or chemical interactions between the TCO and the emitter layer structure. Optionally, stopper layers may also be provided within the emitter structure. Suitable stopper layer materials are wideband gap semiconductors or dielectrics, preferably transparent at wavelengths emitted by the EL device characterized by high impact ionization rates, and/or high relative permittivity relative to adjacent layers of the emitter structure. |
| US07923922B2 |
Transparent conductive nano-composites
The present invention, in one embodiment, provides a method of forming an organic electric device that includes providing a plurality of carbon nanostructures; and dispersing the plurality of carbon nanostructures in a polymeric matrix to provide a polymeric composite, wherein when the plurality of carbon nanostructures are present at a first concentration an interface of the plurality of carbon nanostructures and the polymeric matrix is characterized by charge transport when an external energy is applied, and when the plurality of carbon nanostructures are present at a second concentration the interface of the plurality of carbon nanostructures and the polymeric matrix are characterized by exciton dissociation when an external energy is applied, wherein the first concentration is less than the second concentration. |
| US07923921B2 |
Organic electroluminescent device
An organic electroluminescent device. The organic electroluminescent device comprises a first barrier layer disposed on a substrate; organic electroluminescent elements disposed over the first barrier layer and encapsulated with a second barrier layer; and a getter layer disposed between the first and second barrier layers. Each of the first and second barrier layers includes an organic layer and an inorganic layer covering the top and sidewall surfaces of the organic layer, thus providing stacked inorganic sidewalls to hinder moisture and oxygen. |
| US07923920B2 |
Organic light-emitting elements of LED with light reflection layers in each spaced on opposite sides of transparent conductive layer
An organic light-emitting device has a substrate and a plurality of organic light-emitting elements formed on the substrate. The plurality of the organic light-emitting elements include a first light-emitting element emitting light of a first emission color, and a second light-emitting element emitting light of a different emission color. Each light-emitting element has, in sequence, a first electrode having a light reflection layer and a transparent conductive layer, an organic compound layer containing a light-emitting layer, and a second electrode on the substrate. The light reflection layer of the first element is between the substrate and the transparent conductive layer and the light reflection layer of the second element is between the transparent conductive layer and the organic compound layer. A thickness of the transparent conductive layer of the first and second organic light-emitting elements is the same. |
| US07923917B2 |
Color conversion layer and light-emitting device
A color conversion layer is provided which is capable of converting light from an emitting medium effectively to light containing a ray having a longer wavelength and exhibits less deterioration so as to have a long lifetime. The color conversion layer comprising a fluorescent medium for converting light emitted from an emitting medium to light having a longer wavelength, and having a haze value of 50% to 95%. The color conversion layer can be made thin, since the layer can efficiently convert the color of light from an emitting medium. The processibility such as patterning thereof is then improved. |
| US07923916B2 |
Dual panel type organic electroluminescent display device and method of fabricating the same
An organic electroluminescent device including a switching element and a driving element connected to the switching element on a substrate including a pixel region, a cathode connected to the driving element, in which the cathode includes molybdenum (Mo), an emitting layer on the cathode, and an anode on the emitting layer. |
| US07923915B2 |
Display pixel structure and display apparatus
A pixel structure of display apparatus includes a first substrate and a second substrate. Several cathode structure layers are disposed on the first substrate. The second substrate is a light-transmissive material. Several anode structure layers are disposed on the second substrate, and are light-transmissive conductive materials. The first substrate faces to the second substrate, so that the cathode structure layers are respectively aligned with the anode structure layers. A separation structure is disposed between the first substrate and the second substrate, for respective partitioning the anode structure layers and the cathode structure layers to form several spaces. Several fluorescent layers are respectively disposed between the anode structure layers and the cathode structure layers. A low-pressure gas is respectively filled into the spaces. The low-pressure gas has an electron mean free path, allowing at least sufficient amount of electrons to directly impinge the fluorescent layer under an operation voltage. |
| US07923911B2 |
Polycrystalline silicon as an electrode for a light emitting diode and method of making the same
Metal induced polycrystallized silicon is used as the anode in a light emitting device, such as an OLED or AMOLED. The polycrystallized silicon is sufficiently non-absorptive, transparent and made sufficiently conductive for this purpose. A thin film transistor can be formed onto the polycrystallized silicon anode, with the silicon anode acting as the drain of the thin film transistor, thereby simplifying production. |
| US07923905B2 |
Piezoelectric element and method for manufacturing the same
A coating film is formed on the whole surface area of a body part. Formation of the coating film may be done by immersing the body part in a solution of parfluoropolyether. Then, the parfluoropolyether constituting the coating film is joined with the side surfaces of the body part by irradiating Xenon excimer laser in a nitrogen atmosphere onto the side faces of the body part, or to the surface exposing an electrode layer. As a result, the protective film is formed only on the side surfaces of the body part. Thus, the protective film is formed as a monomolecular film. Total body part is then cleaned by 2,3-dihydrodecafluoropentane to remove non-reacted coating film, thereby completing a multi-layer piezoelectric element. |
| US07923903B2 |
Inorganic film base plate, process for producing the same, piezoelectric device, ink jet type recording head, and ink jet type recording apparatus
An inorganic film base plate is produced with a process comprising the steps of: preparing a surface recess-protrusion base plate, which is provided with a recess-protrusion pattern on a surface, and forming an inorganic film along a surface shape of the surface recess-protrusion base plate, the inorganic film containing a plurality of pillar-shaped structure bodies, each of which extends in a direction nonparallel with the base plate surface of the surface recess-protrusion base plate. Force of physical action may then be exerted upon the thus formed inorganic film in order to separate an on-protrusion film region of the inorganic film and an adjacent on-recess film region of the inorganic film from each other. |
| US07923900B2 |
Ultrasonic motor
An ultrasonic motor, which drives a driven member using an elliptical vibration produced by synthesizing a longitudinal vibrational mode and a flexural vibrational mode as a drive force, is configured as follows. Namely, the ultrasonic motor includes a piezoelectric device, and a feed member feeding the piezoelectric device. An extensional axis of the feed member is set to an axis different from main vibrational axes of the longitudinal vibrational mode and the flexural vibrational mode. |
| US07923899B2 |
Ultrasonic actuator
An ultrasonic actuator (3) includes an actuator body (4) performing a plurality of vibrations including a bending vibration, and a driver element (5) which is attached to a long side surface (40b) of the actuator body (4), and outputs a driving force by making an orbit motion in response to the vibrations of the actuator body (4). The driver element (5) is provided with an attachment surface (51), and is attached to the long side surface (40b) with the attachment surface (51) in surface contact with the long side surface (40b). A width of the attachment surface (51) in the longitudinal direction of the long side surface (40b) is smaller than a maximum width of the driver element (5) in the longitudinal direction of the long side surface (40b). |
| US07923897B2 |
Sonic fine-hole forming apparatus
Disclosed is a sonic fine-hole forming apparatus for forming a fine-hole in a surface of a membrane or solid body in a liquid by means of sonic energy. The sonic fine-hole forming apparatus is adapted to generate a sonic oscillation driving signal comprises a voltage waveform which has positive and negative voltage portions being asymmetrical, and a sharp peak portion. The sonic fine-hole forming apparatus includes a sonic oscillation section having a surface provided with a covering layer or a protective material having an electrically insulating property and a sonic transparency. The coated layer or a protective material is formed to have a thickness of 10 μm or more. The sonic fine-hole forming apparatus of the present invention can form a fine-hole in a surface of a solid body without using a large-scale apparatus, while suppressing a destructive action around the fine-hole. |
| US07923896B2 |
Surface acoustic wave device
A surface acoustic wave device including an SiO film has improved frequency temperature characteristics, prevents an increase in insertion loss, obtains a reflection coefficient of an electrode that is sufficiently high, and achieves more preferable resonant characteristics and filter characteristics. The surface acoustic wave device includes a LiNbO3 substrate having a plurality of grooves formed in an upper surface thereof, an IDT electrode primarily composed of Pt provided in the grooves, a SiO2 layer arranged so as to cover the upper surface of the LiNbO3 substrate and the IDT electrode, a surface of the SiO2 layer is planarized, a response of a Rayleigh wave is utilized, and Euler angles of the LiNbO3 substrate are in a range of (0°±5°, 208° to 228°, 0°±5°). |
| US07923895B2 |
Electrochemical methods, devices, and structures
The present invention provides devices and structures and methods of use thereof in electrochemical actuation. This invention provides electrochemical actuators, which are based, inter-alia, on an electric field-driven intercalation or alloying of high-modulus inorganic compounds, which can produce large and reversible volume changes, providing high actuation energy density, high actuation authority and large free strain. |
| US07923885B2 |
Stator for rotary electric machine, and rotary electric machine using the stator
A stator for a multiple-phase rotary electric machine provided a stator core with slots and a coil formed of a plurality of windings for individual phases. Each winding has slot-accommodated portions held in different slots, turn portions connecting the slot-accommodated portions outside of the slots in an axial direction, and a return portion that connects two of the turn portions and changes a winding direction of the winding at given slots. The turn portions include specific turn portions which are the same in a circumferential position as the turn portion connected to the one of the return portion. The specific turn portions are located, in a radial direction, to be drawn apart from the rotor than the slot-accommodated portions connected to the specific turn portions. |
| US07923883B2 |
Stator
The present invention provides a stator coiled in a spiral, capable of mechanically inserting a wound coil in the slot of a stator core. In a stator in which coils are overlapped in a spiral when viewed from the end surface of the stator core after each of one sides of a plurality of coils wound in advance is inserted in the slot of the stator core and each of the other sides of the plurality of coils is inserted in a different slot, by repeating the inserting operation twice or more, the loop of the coils overlapped in a spiral are piled in two layers or more in the radius direction of the stator core and the total coil sectional area inserted in the slots of the stator core is larger than a prescribed value based on the inside radius of the stator core. |
| US07923880B2 |
Stepping motor
A single phase stepping motor has a stator, and a rotor disposed to surround the stator. The stator includes first and second annular stator yokes, which are disposed opposite to each other and have a plurality of pole teeth formed along a circumference thereof, and an annular stator coil disposed between the first and second stator yokes. The rotor includes a ring magnet, which is disposed to surround the first and second stator yokes, and has a plurality of magnetic poles formed along a circumference of the rotor, and a shaft disposed at a center position of the magnet. At least a partial region of a gap formed between each of the pole teeth and the opposing magnetic pole of the magnet is non-uniform in a predetermined direction. |
| US07923877B2 |
Direct current motor with permanent magnet stator
Described is a direct current motor (1) with permanent magnet stator, having at least four stator poles (5, 6, 7, 8) which are spaced at equal angular intervals about the rotation axis (A) of the rotor (3) and which generate a magnetic field that is asymmetrical about the rotation axis (A) of the rotor (3) and where the rotor winding (4) can be powered partially and selectively at least at two fixed, explementary angular sectors. |
| US07923873B2 |
Electromagnetic actuator
In an electromagnetic actuator including a bearing member which slidably supports a variable core, a yoke for retaining a coil assembly by cooperation with a bottom wall of a housing is connected to the housing, and the bearing member is fitted into the yoke. A support for supporting an outward-facing flange formed at one end of the bearing member is mounted on the bottom wall, and a set spring for biasing the outward-facing flange toward the support is mounted under compression between the outward-facing flange and the first yoke. A low-friction material coating made of a fluorocarbon resin is formed on at least one of opposed sliding surfaces of the bearing member and a movable core. Thus, even if wear powder is generated between the set spring of the bearing member and a portion on which the set spring is pressed, the wear powder is prevented from entering inside the bearing member. |
| US07923871B2 |
Electrical machine
The invention relates to an electrical machine (1) having a stator (4) and a rotor (3), with the rotor (3) having a plurality of axially arranged cooling channels (8) and a first (5a) and a second (5b) end face, and a fan unit (6) being arranged adjacent to each end face and comprising at least two 10 fan segments (7), with one fan segment (7) in each case being associated with one cooling channel (8) and being arranged alternately adjacent to the first (5a) and the second (5b) end face, and with the fan segment (7) having at least one air guide channel (7a) and at least one air guide wall (7b). |
| US07923866B2 |
Power supply system and vehicle including the same, and method of controlling the same
When power storage units and are both in a normal condition, system relays are maintained in an ON state. A converter performs a voltage conversion operation in accordance with a voltage control mode, and a converter performs a boost operation in accordance with an electric power control mode. If some kind of fault condition occurs in the power storage unit and the system relay is driven to an OFF state, the converters stop the voltage conversion operation and maintain an electrically conducting state between the power storage units and a main positive bus, a main negative bus. |
| US07923865B2 |
Multi-mode switched capacitor dc-dc voltage converter
The disclosure describes techniques for converting an input voltage level to two or more output voltage levels using only two pump capacitors and three switching phases. The disclosure also describes techniques for selectively controlling a dc-dc converter to operate in different conversion modes. One mode may use only two pump capacitors and three switching phases to produce output voltage levels with a first set of conversion ratios. Another mode may use two pump capacitors and two switching phases to produce output voltage levels with a second set of conversion ratios. The first mode may use three different subcircuit arrangements of the pump capacitors. The second mode may use two different subcircuit arrangements of the pump capacitors. A converter may include switches and pump capacitors that can be selectively configured to transition between two or three different subcircuits, thereby producing output voltages according to different conversion ratios on a selective basis. |
| US07923864B2 |
Power feed system, terminal device, power feeding method and computer readable medium
A power feed system includes: an information device; a terminal device that is connected the information processing device, and that has a power source; and a selection unit that selects, as power utilized by the terminal device, at least one of first power from the power source of the terminal device and second power supplied from the information processing device according to an operating state of the terminal device. |
| US07923862B2 |
Reactive power regulation and voltage support for renewable energy plants
Systems and methods are provided for reactive power regulation and voltage support for renewable energy plants. In one embodiment, a system and method are provided for coordinating voltage and reactive power output of a plant with one or more requirements associated with a utility. The method can include generating a VAR regulator output signal based at least in part on a reactive power control signal received from a utility, controlling reactive power and voltage output of the one or more power sources based at least in part on the generated VAR regulator output signal, aggregating reactive power output or the one or more power sources, and providing the aggregated reactive power to the utility. |
| US07923861B2 |
Method of controlling hybrid DC power supply system
A fuel cell vehicle has a motor driven by an inverter and hybrid DC power supplies including a battery and a fuel cell for supplying electric power to the motor. For preventing a fuse connected to the battery from being blown out, when a motor current Im increases, a first source current flowing from the battery is limited to a range for not blowing out the fuse, and a generated current is increased as much as the first source current is limited. |
| US07923858B2 |
Electric power source system and method for the same
An electric power source system in which a momentary interruption of the electric power supply does not occur when the direction of voltage conversion is switched by a voltage conversion device that is capable of bidirectional voltage conversion. The electric power source system includes a bidirectional switching regulator that selectively switches between the voltage conversion in the step-up direction from a low-voltage system to a high-voltage system and the voltage conversion in the step-down direction from the high-voltage system to the low-voltage system, and a linear regulator, connected in parallel to the bidirectional switching regulator, that converts voltage in the step-down direction. The direction of current that flows via the bidirectional switching regulator switches from the step-up direction to the step-down direction after current flows in the step-down direction via the linear regulator. |
| US07923857B2 |
System and method for supplying power for actuators on board an aircraft
The invention relates to a system and a method for supplying power to an aircraft comprising several generators supplying alternating current to several different primary electrical master boxes (10, 11, 12 and 13), the various aircraft loads being connected to each of these master boxes. This system comprises conventional master boxes (10, 11, 12 and 13) which supply power loads and at least one master box (40, 41) devoted to actuator loads, this at least one devoted master box being connected to conventional master boxes. |
| US07923856B2 |
Low voltage control interface coupler for multipulse transmitter
A method for causing, in a power distribution network, an oscillation allowing data to be transmitted, includes connecting at least one capacitive load in series with a modulation circuit between two wires of the network. The amplitude modulation circuit includes at least one Zener diode and at least one switch. A short make pulse is applied to the switch such that it is conductive and short-circuits the Zener diode by modulating the amplitude of the network voltage. The duration of the make pulse is such that the amplitude modulation of the network voltage causes a response of the network in the form of a high-frequency oscillation of the network voltage. |
| US07923855B2 |
Communication between network interface device and subscriber devices via power supply lines
The disclosure describes communication of information between a network interface device and subscriber devices over a power line. A UPS unit receives operating power from subscriber premises via a first power line and delivers operating power to the network interface device via a second power line. The network interface device transmits and receives information, such as voice, video and data, to and from the UPS unit via the second power line. The UPS unit receives the information transmitted by the network interface device via the second power line, and transmits the received information to subscriber devices within the premises via the first power line. The UPS unit receives information transmitted by subscriber devices via the first power line, and transmits the received information to the network interface device via the second power line. The first and second power lines each serve as both a power line and a communication medium. |
| US07923849B2 |
Interconnections for flip-chip using lead-free solders and having reaction barrier layers
An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting composition including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components. |
| US07923846B2 |
Integrated circuit package-in-package system with wire-in-film encapsulant
A multiple encapsulation integrated circuit package-in-package system includes: dicing a top integrated circuit wafer having a bottom encapsulant thereon to form a top integrated circuit die with the bottom encapsulant; positioning internal leadfingers adjacent and connected to a bottom integrated circuit die; pressing the bottom encapsulant on to the bottom integrated circuit die; connecting the top integrated circuit die to external leadfingers adjacent the internal leadfingers; and forming a top encapsulant over the top integrated circuit die. |
| US07923844B2 |
Semiconductor devices including voltage switchable materials for over-voltage protection
Semiconductor devices are provided that employ voltage switchable materials for over-voltage protection. In various implementations, the voltage switchable materials are substituted for conventional die attach adhesives, underfill layers, and encapsulants. While the voltage switchable material normally functions as a dielectric cmaterial, during an over-voltage event the voltage switchable material becomes electrically conductive and can conduct electricity to ground. Accordingly, the voltage switchable material is in contact with a path to ground such as a grounded trace on a substrate, or a grounded solder ball in a flip-chip package. |
| US07923843B2 |
Semiconductor device with a contact plug connected to multiple interconnects formed within
Two interconnect layers are electrically connected while reducing the number of manufacturing steps. A contact plug 9c which is formed into a beaded shape in a layer underlying two interconnects 11C and 11D and which also electrically connects the two interconnects 11C and 11D is included. The two interconnects 11C and 11D are separated to each other and are formed in a same layer. The contact plug 9c is simultaneously formed with a contact plug 9b to be connected to an interconnect 4b and a contact plug 9a to be connected to a source/drain region 6. |
| US07923839B2 |
Semiconductor device and method for fabricating semiconductor device
A semiconductor device includes a contact plug electrically connected to a semiconductor substrate; a first barrier metal film with a columnar crystal structure arranged in contact with the semiconductor substrate at least on a bottom surface side of the contact plug; an amorphous film made of a material of the first barrier metal film arranged in contact with the first barrier metal film at least on the bottom surface side of the contact plug; a second barrier metal film made of a material identical to that of the first barrier metal film and having a columnar crystal structure, at least a portion of which is arranged in contact with the amorphous film on the bottom surface side and a side surface side of the contact plug; and a dielectric film arranged on the side surface side of the contact plug. |
| US07923835B2 |
Package, electronic device, substrate having a separation region and a wiring layers, and method for manufacturing
An electronic device has a substrate that has first and second peripheral portions. The first peripheral portion provides a shearing position for separation. The electronic device has a plurality of wiring layers one of which forms a functional surface wiring on the substrate, an electronic element mounted on the substrate, and an encapsulation member formed over the substrate and the electronic element. The surface wiring is selectively disposed under the encapsulation member and in an area adjacent to the second peripheral portion. |
| US07923830B2 |
Package-on-package secure module having anti-tamper mesh in the substrate of the upper package
A package-on-package (POP) secure module includes a first ball grid array (BGA) package and a second BGA package. The first BGA includes an array of bond balls that is disposed on a side of a substrate member, and an array of lands that is disposed on the opposite side of the substrate member. Bond balls of the second BGA are fixed to the lands of the first BGA such that the second BGA is piggy-back mounted to the first BGA. Embedded in the substrate member of the second BGA is an anti-tamper security mesh. An integrated circuit in the first BGA is coupled to, drives and monitors the security mesh. When the module is disposed on a printed circuit board within a point of sale (POS) terminal, the integrated circuit is coupled to, also drives and monitors a second security mesh embedded in the printed circuit board underneath the module. |
| US07923826B2 |
Semiconductor device mounted on heat sink having protruded periphery
A semiconductor chip is mounted on a heat sink disposed inside a through-hole of a wiring board, electrodes of the semiconductor chip and connecting terminals of the wiring board are connected by bonding wires, a sealing resin is formed to cover the semiconductor chip and the bonding wires, and solder balls are formed on the lower surface of the wiring board, thereby constituting the semiconductor device. The heat sink is thicker than the wiring board. The heat sink has a protruded portion protruding to outside from the side surface of the heat sink, the protruded portion is located on the upper surface of the wiring board outside the through-hole, and the lower surface of the protruded portion contacts to the upper surface of the wiring board. When the semiconductor device is manufactured, the heat sink is inserted from the upper surface side of the wiring board. |
| US07923824B2 |
Microelectronic component assemblies and microelectronic component lead frame structures
The present invention provides microelectronic component assemblies and lead frame structures that may be useful in such assemblies. For example, one such lead frame structure may include a set of leads extending in a first direction and a dam bar. Each of the leads may have an outer length and an outer edge. The dam bar may include a plurality of dam bar elements, with each dam bar element being joined to the outer lengths of two adjacent leads. In this example, each dam bar element has an outer edge that extends farther outwardly than the outer edges of the two adjacent leads. The outer edges of the leads and the outer edges of the dam bar elements together define an irregular outer edge of the dam bar. Other lead frame structures and various microelectronic component assemblies are also shown and described. |
| US07923819B2 |
Interlayer insulating film, wiring structure and electronic device and methods of manufacturing the same
A wiring structure of a semiconductor device or the like includes an interlayer insulating film having a fluorocarbon film formed on an underlayer, and a conductor buried in the interlayer insulating film. The fluorocarbon film contains nitrogen and is low in dielectric constant, excellent in reproducibility and stable. |
| US07923817B2 |
Capacitor pairs with improved mismatch performance
A semiconductor device includes a first capacitor comprising a plurality of first unit capacitors interconnected to each other, each having a first unit capacitance; and a second capacitor comprising a plurality of second unit capacitors interconnected to each other, each having a second unit capacitance, wherein the first unit capacitors and the second unit capacitors have equal numbers of unit capacitors. The first unit capacitors and the second unit capacitors are arranged in an array with rows and columns and placed in an alternating pattern in each row and each column. The first and the second unit capacitors each have a total number greater than two. |
| US07923816B2 |
Semiconductor device having capacitor element
Provided is a semiconductor device which includes a capacitor element having a flat-plate-type lower electrode provided over a semiconductor substrate, a flat-plate-type TiN film provided over the lower electrode in parallel therewith, and a capacitor film provided between the lower electrode and the TiN film; and a first Cu plug brought into contact with the bottom surface of the lower electrode, and is composed of a metal material, wherein the capacitor film has a film which contains an organic molecule as a constituent. |
| US07923814B2 |
Semiconductor device including an inductor having soft magnetic thin film patterns and a fabricating method of the same
A semiconductor device includes an interlayer insulating film and an inductor. The inductor includes a first soft magnetic thin film pattern formed on the interlayer insulating film, the first soft magnetic film comprising a) at least one material selected from Fe, Co, Ni, or alloys thereof b) at least one element selected from Ti, Hf, or B, and c) N, a metal film pattern formed on the first soft magnetic thin film pattern and a second soft magnetic thin film pattern formed on the metal film pattern, the second soft magnetic thin film pattern comprising a) at least one material selected from Fe, Co, Ni, or alloys thereof; b) at least one element selected from Ti, Hf, or B; and c) N. Edges of the first soft magnetic thin film pattern, edges of the metal film pattern and edges of the second soft magnetic thin film pattern are vertically aligned. |
| US07923813B2 |
Anti-fuse memory device
A One Time Programmable (OTP) memory cell (10) comprising a first, metallic layer (12) coated with a second, conductive stable transition compound (14) with an insulating layer (16) there-between. The first and second layers (12, 14) are selected according to the difference in Gibbs Free Energy between them, which dictates the chemical energy that will be generated as a result of an exothermic chemical reaction between the two materials. The materials of the first and second layers (12, 14) are highly thermally stable in themselves but, when a voltage is applied to the cell (10), a localized breakdown of the insulative layer (16) results which creates a hotspot (18) that sets off an exothermic chemical reaction between the first and second layers (12, 14). The exothermic reaction generates sufficient heat (20) to create a short circuit across the cell and therefore reduce the resistance thereof. |
| US07923812B2 |
Quad memory cell and method of making same
A non-volatile memory device includes a first electrode, a diode steering element, at least three resistivity switching storage elements, and a second electrode. The diode steering element electrically contacts the first electrode and the at least three resistivity switching storage elements. The second electrode electrically contacts only one of the at least three resistivity switching storage elements. |
| US07923808B2 |
Structure of very high insertion loss of the substrate noise decoupling
A structure includes a substrate comprising a region having a circuit or device which is sensitive to electrical noise. Additionally, the structure includes a first isolation structure extending through an entire thickness of the substrate and surrounding the region and a second isolation structure extending through the entire thickness of the substrate and surrounding the region. |
| US07923805B2 |
Semiconductor device including high voltage and low voltage MOS devices
Methods and devices for forming both high-voltage and low-voltage transistors on a common substrate using a reduced number of processing steps are disclosed. An exemplary method includes forming at least a first high-voltage transistor well and a first low-voltage transistor well on a common substrate separated by an isolation structure extending a first depth into the substrate, using a first mask and first implantation process to simultaneously implant a doping material of a first conductivity type into a channel region of the low-voltage transistor well and a drain region for the high-voltage transistor well. |
| US07923804B2 |
Edge termination with improved breakdown voltage
A MOSFET switch which has a low surface electric field at an edge termination area, and also has increased breakdown voltage. The MOSFET switch has a new edge termination structure employing an N-P-N sandwich structure. The MOSFET switch also has a polysilicon field plate configuration operative to enhance any spreading of any depletion layer located at an edge of a main PN junction of the N-P-N sandwich structure. |
| US07923801B2 |
Materials, systems and methods for optoelectronic devices
A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer. |
| US07923799B2 |
Image sensors with light guides
An image sensor may be formed from a planar semiconductor substrate. The image sensor may have an array of pixels. Each pixel may have a photosensitive element that is formed in the substrate and may have a light guide in a dielectric stack that guides light from a microlens and color filter to the photosensitive element. The light guides in pixels that are offset from the center of the image sensor may be tilted so that their longitudinal axes each form a non-zero angle with a vertical axis that lies perpendicular to the planar semiconductor substrate. These light guides may have laterally elongated openings that help collect light. A light guide may have a lower opening that matches the size of an associated photosensitive element. Photosensitive elements that are laterally offset from the center of the image sensor may be tilted. Pixels of different colors may have off-center photosensitive elements. |
| US07923797B2 |
Solid-state image sensing device driving method and solid-state image sensing apparatus
A method of driving a solid-state image sensing device comprises plural photoelectric conversion devices arranged in rows and columns perpendicular to the rows, VCCDs through which charges generated by the photoelectric conversion devices are transferred in the column direction, and an HCCD through which the charges transferred from the VCCDs are transferred in the row direction. The photoelectric conversion devices include plural photoelectric conversion device rows including the photoelectric conversion devices arranged in the rows include first photoelectric conversion device rows each of which different kinds of photoelectric conversion devices are mixed and second photoelectric conversion device rows each of which has one kind of photoelectric conversion devices. An operation of transferring charges read out of each first photoelectric conversion device row from the VCCDs to the HCCD and an operation of transferring the charges transferred to the HCCD in the row direction are performed with discrimination between the charges of different color components. |
| US07923795B2 |
Ultrasonic transducer device
A lower electrode is formed over a semiconductor substrate via an insulator film, first and second insulator films are formed to cover the lower electrode, an upper electrode is formed over the second insulator film, third to fifth insulator films are formed to cover the upper electrode and a void is formed between the first and second insulator films between the lower and upper electrodes. An ultrasonic transducer comprises the lower electrode, the first insulator film, the void, the second insulator film and the upper electrode. A portion of the first insulator film contacting with the lower electrode is made of silicon oxide, a portion of the second insulator film contacting with the upper electrode is made of silicon oxide and the first or second insulator film includes a silicon nitride film positioned between the upper and lower electrodes and not in contact with the upper and lower electrodes. |
| US07923793B2 |
Image sensor module and fabrication method thereof
An image sensor module having a sensor chip closely adhered on a concave surface and a fabrication method thereof are disclosed. The image sensor module includes at least one sensor chip, at least one sensor chip-mounting structure comprising a substrate and a polymer layer formed on the substrate, the polymer layer having an concave surface formed on an upper part thereof by a polymer molding method, so that the sensor chip is bent and bonded on the concave surface, and at least one lens fixed on the at least one sensor chip-mounting structure above the sensor chip. |
| US07923789B2 |
Method of fabricating reflective spatial light modulator having high contrast ratio
The contrast offered by a spatial light modulator device may be enhanced by positioning nonreflective elements such as supporting posts and moveable hinges, behind the reflecting surface of the pixel. In accordance with one embodiment, the reflecting surface is suspended over and underlying hinge-containing layer by integral ribs of the reflecting material defined by gaps in a sacrificial layer. In accordance with an alternative embodiment, the reflecting surface is separated from the underlying hinge by a gap formed in an intervening layer, such as oxide. In either embodiment, walls separating adjacent pixel regions may be recessed beneath the reflecting surface to further reduce unwanted scattering of incident light and thereby enhance contrast. |
| US07923783B2 |
Semiconductor memory device having resistance element with two conductors
A semiconductor memory device according to an embodiment of the present invention includes a resistance element which is constructed with a first conductor which extends in a first direction and is connected to a first contact; a second conductor which extends in said first direction and is connected to a second contact; and a first insulation film which exists between said first conductor and said second conductor, said first insulation film also having an opening in which a third conductor which connects said first conductor and said second conductor is arranged. |
| US07923780B2 |
Thin film transistor and manufacturing method thereof
The present invention provides a step in which a channel-length of a TFT can be controlled with higher reproducibility. In addition, the present invention provides a step in which a short channel-length of the TFT can be manufactured. Further, the present invention provides a structure of the TFT in which a current-voltage characteristic can be improved. The present invention refers to a thin film transistor comprising a lamination layer wherein a first conductive film, a first insulating film and a second conductive film are sequentially laminated, a semiconductor film formed so as to be in contact with the side surface of the lamination layer, and a third conductive film covering the semiconductor film through a second insulating film. The first conductive film and the second conductive film are a source electrode and a drain electrode, and a region which is in contact with the first insulating film and the third conductive film is a channel forming region in semiconductor film, and the third conductive film is a gate electrode. |
| US07923779B2 |
Semiconductor device and method of manufacturing the same
The present invention relates to a semiconductor device including a circuit composed of thin film transistors having a novel GOLD (Gate-Overlapped LDD (Lightly Doped Drain)) structure. The thin film transistor comprises a first gate electrode and a second electrode being in contact with the first gate electrode and a gate insulating film. Further, the LDD is formed by using the first gate electrode as a mask, and source and drain regions are formed by using the second gate electrode as the mask. Then, the LDD overlapping with the second gate electrode is formed. This structure provides the thin film transistor with high reliability. |
| US07923772B2 |
Semiconductor device with a semiconductor body and method for producing it
A semiconductor device with a semiconductor body and to a method for producing it. In one embodiment, the semiconductor body has first electrodes which contact first highly doped semiconductor zones and complementary-conduction body zones surrounding the first semiconductor zones. The semiconductor body has a second electrode which contacts a second highly doped semiconductor zone. Between the second semiconductor zone and the body zones, a drift zone is arranged. Control electrodes which are insulated from the semiconductor body by a gate oxide and act on the body zones for controlling the semiconductor device are arranged on the semiconductor body. The body zones have minority charge carrier injector zones with complementary conduction to the body zones, arranged between the first semiconductor zones and the drift zone. |
| US07923771B2 |
Semiconductor device and method for manufacturing the same
A semiconductor device (10) of the present invention includes: a drift layer (5) that includes a reference concentration layer (4) including an impurity of a first conductive type at a first reference concentration and a low concentration layer (3) provided under the reference concentration layer and including an impurity of the first conductive type at a concentration lower than the first reference concentration; a gate electrode (20) that is formed on an upper surface of the reference concentration layer; a pair of source regions (Sa and 8b) that are respectively provided on the reference concentration layer in the vicinity of ends of the gate electrode and include an impurity of the first conductive type at a concentration higher than the first reference concentration. |
| US07923769B2 |
Split gate non-volatile memory cell with improved endurance and method therefor
A non-volatile memory cell including a substrate in which is formed a source region and a drain region defining a channel region between the source region and the drain region is provided. The non-volatile memory cell further includes a select gate structure overlying a first portion of the channel region. The non-volatile memory cell further includes a control gate structure formed overlying a second portion of the channel region, wherein the control gate structure includes a nanocrystal stack having a height, wherein the control gate structure has a convex shape in a corner region formed at an intersection of a first plane substantially parallel to a top surface of the substrate and a second plane substantially parallel to a side surface of the control gate structure, wherein a ratio of radius of the control gate structure in the corner region to the height of the nanocrystal stack is at least 0.5. |
| US07923768B2 |
Semiconductor device with non-volatile memory function and method of manufacturing the same
Disclosed are a semiconductor device and a method of manufacturing the same. The semiconductor device includes a semiconductor substrate having source and drain areas; a floating gate between the source and drain areas having a programmed or erased state, thereby controlling a current flow between the source and drain areas; and a tunneling gate adapted to program or erase the floating gate depending on voltage(s) applied to the source, drain and/or tunneling gate. |
| US07923767B2 |
Non-volatile storage with substrate cut-out and process of fabricating
Shallow trench isolation regions are positioned between NAND strings (or other types of non-volatile storage). These isolation regions include sections that form concave cut-out shapes in the substrate for the NAND string (or other types of non-volatile storage). The floating gates (or other charge storage devices) of the NAND strings hang over the sections of the isolation region that form the concave cut-out shape in the substrate. To manufacture such a structure, a two step etching process is used to form the isolation regions. In the first step, isotropic etching is used to remove substrate material in multiple directions, including removing substrate material underneath the floating gates. In the second step, anisotropic etching is used to create the lower part of the isolation region. |
| US07923765B2 |
Non-volatile memory device
A non-volatile memory device includes a memory cell region which is formed on a semiconductor substrate to store predetermined information, and a peripheral circuit region which is formed on the semiconductor substrate. The memory cell region includes a gate electrode; and a charge storage layer, the charge storage layer being formed to be a notch or wedge shape having an edge extending into both sides of a bottom end of the gate electrode. The peripheral circuit region includes no charge storage layer therein. |
| US07923764B2 |
Semiconductor device and method for fabricating the same
A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode. |
| US07923760B2 |
Dielectric spacers for metal interconnects and method to form the same
A plurality of metal interconnects incorporating dielectric spacers and a method to form such dielectric spacers are described. In one embodiment, the dielectric spacers adjacent to neighboring metal interconnects are discontiguous from one another. In another embodiment, the dielectric spacers may provide a region upon which un-landed vias may effectively land. |
| US07923756B2 |
Metal oxide semiconductor (MOS) device comprising a buried region under drain
A semiconductor device with a metal oxide semiconductor (MOS) type transistor structure, which is used for, e.g. a static random access memory (SRAM) type memory cell, includes a part that is vulnerable to soft errors. In the semiconductor device with the MOS type transistor structure, an additional load capacitance is formed at the part that is vulnerable to soft errors. |
| US07923754B2 |
Bipolar transistor
A bipolar transistor (1) comprising a subcollector layer (3), a collector layer (4, 5), a base layer (6) and an emitter layer (7) which are successively built up and having: the subcollector layer (3) formed with a projection (3A) and recesses (3B), an upper part above the projection constituting an intrinsic transistor region (1A) of the bipolar transistor; insulator layer (10) buried between the recesses of the subcollector layer and the collector layer (4); a boundary interface between the subcollector layer and the collector layer held between the insulator layers; the base layer (6) made of a single crystal layer and provided with a base electrode (12) on a region becoming an extrinsic base layer (6B) of the base layer; and the subcollector layer provided with a collector electrode (11). The bipolar transistor has advantages of its emitter made finer in width, a reduced parasitic capacitance between its base and collector and improved high-frequency characteristics. |
| US07923753B2 |
Field effect transistor having Ohmic electrode in a recess
The contact resistance between an Ohmic electrode and an electron transit layer is reduced compared with a case in which the Ohmic electrode is provided to a depth less than the heterointerface. As a result, for an Ohmic electrode provided in a structure comprising an electron transit layer formed of a first semiconductor layer formed on a substrate, an electron supply layer comprising a second semiconductor layer forming a heterojunction with the electron transit layer and having a smaller electron affinity than the first semiconductor layer, and a two-dimensional electron layer induced in the electron transit layer in the vicinity of the heterointerface, the end portion of the Ohmic electrode is positioned in the electron transit layer in penetration into the electron supply layer at a depth equal to or greater than the heterointerface. |
| US07923751B2 |
Bipolar transistor with a low saturation voltage
A bipolar transistor with a specific area resistance less than about 500 mOhms·mm2 comprises a first semiconductor region of a first conductivity type defining a collector region (2). A second semiconductor region of a second conductivity type defines a base region (3). A third semiconductor region of the first conductivity type defines an emitter region (4). A metal layer provides contacts (6, 7) to said base (3) and emitter regions (4). The metal layer has thickness greater than about 3 μm. |
| US07923750B2 |
Pixel sensor cell, methods and design structure including optically transparent gate
A pixel sensor cell, a method for fabricating or operating the pixel sensor cell and a design structure for fabricating the pixel sensor cell each include a semiconductor substrate that includes a photoactive region separated from a floating diffusion region by a channel region. At least one gate dielectric is located upon the semiconductor substrate at least in-part interposed between the photoactive region and the floating diffusion region, and at least one optically transparent gate is located upon the gate dielectric and at least in-part over the channel region. Preferably, the at least one gate dielectric is also located over the photoactive region and the at least one optically transparent gate is also located at least in-part over the photoactive region, to provide enhanced charge transfer capabilities within the pixel sensor cell, which is typically a CMOS pixel sensor cell. |
| US07923746B2 |
Light emitting diode package structure and method for fabricating the same
The present invention discloses a light emitting diode (LED) package structure, which includes a carrier, a first protrusion, a LED chip, and an adhesion layer. The first protrusion is disposed on the carrier and has a first opening to expose the carrier, wherein the first protrusion is formed by a thermal conductive material. The LED chip is disposed in the first opening on the carrier, and a ratio between a width of the first opening and a width of the LED chip is 1˜1.5. The adhesion layer is disposed between the LED chip and the carrier to bond the LED chip to the carrier. |
| US07923734B2 |
Array substrate of liquid crystal display device and method of manufacturing the same
An array substrate comprising a base substrate, a common electrode, a gate line, a data line, a thin film transistor, a passivation layer and a pixel electrode of “” shape. The thin film transistor comprises a gate electrode, an active layer, a source electrode and a drain electrode; the gate electrode is connected with the gate line; the source electrode is connected with the data line; and the drain electrode is connected with the pixel electrode. A passivation layer is formed on the source electrode, the drain electrode and the data line, and a via hole is formed in the passivation layer over the drain electrode. The pixel electrode of “” shape is formed on the passivation layer and connected with the drain electrode through the via hole in the passivation layer. The data line is provided below the position corresponding to the boundary between the “/” portion and the “\” portion of the pixel electrode of “” shape. The array substrate increases the transmittivity of pixel and improves the display quality. |
| US07923733B2 |
Semiconductor device
A semiconductor device includes a semiconductor layer including a channel region, and a first region and a second region to which an impurity element is introduced to make the first region and the second region a source and a drain, a third region, and a gate electrode provided to partly overlap with the semiconductor layer with a gate insulating film interposed therebetween In the semiconductor layer, the first region is electrically connected to the gate electrode through a first electrode to which an AC signal is input, the second region is electrically connected to a capacitor element through a second electrode, the third region overlaps with the gate electrode and contains an impurity element at lower concentrations than each of the first region and the second region. |
| US07923731B2 |
Thin film transistor
A thin film transistor includes a source electrode, a drain electrode, a semiconducting layer, and a gate electrode. The drain electrode is spaced from the source electrode. The semiconducting layer is connected to the source electrode and the drain electrode. The gate electrode is insulated from the source electrode, the drain electrode, and the semiconducting layer by an insulating layer. The semiconducting layer includes a carbon nanotube layer, and the carbon nanotube layer comprises a plurality of semiconducting carbon nanotubes. |
| US07923724B2 |
Phase change memory that switches between crystalline phases
A phase change memory may transition between two crystalline states. In one embodiment, the phase change material is a chalcogenide which transitions between face centered cubic and hexagonal states. Because these states are more stable, they are less prone to drift than the amorphous state conventionally utilized in phase change memories. |
| US07923723B2 |
Thin-film transistor and display device using oxide semiconductor
The thin-film transistor of the present invention has at least a semiconductor layer including: on a substrate, a source electrode, a drain electrode, and a channel region; a gate insulating film; and a gate electrode, wherein the semiconductor layer is an oxide semiconductor layer, and wherein the gate insulating film is amorphous silicon including at least O and N, and the gate insulating film has a distribution of an oxygen concentration in a thickness direction so that the oxygen concentration is high in the side of an interface with an oxide semiconductor layer and the oxygen concentration decreases toward the side of the gate electrode. |
| US07923720B2 |
Organic luminescence transistor device and manufacturing method thereof
The invention is an organic luminescence transistor device including: a substrate; a first electrode layer provided on a side of an upper surface of the substrate; a layered structure provided locally on a side of an upper surface of the first electrode layer, the layered structure covering an area of a predetermined size in a plan view, the layered structure including an insulation layer, an assistance electrode layer and an electric-charge-injection inhibiting layer in this order; an organic EL layer provided on the side of an upper surface of the first electrode layer at least at an area not provided with the layered structure; and a second electrode layer provided on a side of an upper surface of the organic EL layer. |
| US07923715B2 |
Chalcogenide nanoionic-based radio frequency switch
A nonvolatile nanoionic switch is disclosed. A thin layer of chalcogenide glass engages a substrate and a metal selected from the group of silver and copper photo-dissolved in the chalcogenide glass. A first oxidizable electrode and a second inert electrode engage the chalcogenide glass and are spaced apart from each other forming a gap therebetween. A direct current voltage source is applied with positive polarity applied to the oxidizable electrode and negative polarity applied to the inert electrode which electrodeposits silver or copper across the gap closing the switch. Reversing the polarity of the switch dissolves the electrodeposited metal and returns it to the oxidizable electrode. A capacitor arrangement may be formed with the same structure and process. |
| US07923712B2 |
Phase change memory element with a peripheral connection to a thin film electrode
A PCM cell structure comprises a first electrode, a phase change element, and a second electrode, wherein the phase change element is inserted in between the first electrode and the second electrode and only the peripheral edge of the first electrode contacts the phase change element thereby reducing the contact area between the phase change element and the first electrode and thereby increasing the current density through the phase change element and effectively inducing the phase change at lower levels of current and reduced programming power. |
| US07923710B2 |
Digital isolator with communication across an isolation barrier
A signal isolator comprises an isolation barrier, a transmitter, a differentiator, and a recovery circuit. The transmitter is coupled to a first side of the isolation barrier and is configured to receive and convert an information signal to a differential signal that encodes information in the information signal in a single transition edge. The differentiator is coupled to a second side that is isolated from the first side of the isolation harrier and differentiates the differential signal. The recovery circuit is coupled to the differentiator and operates to recover an output information signal based on the information in the single transition edge. |
| US07923709B1 |
Radiation shielding systems using nanotechnology
A system for shielding personnel and/or equipment from radiation particles. In one embodiment, a first substrate is connected to a first array or perpendicularly oriented metal-like fingers, and a second, electrically conducting substrate has an array of carbon nanostructure (CNS) fingers, coated with an electro-active polymer extending toward, but spaced apart from, the first substrate fingers. An electric current and electric charge discharge and dissipation system, connected to the second substrate, receives a current and/or voltage pulse initially generated when the first substrate receives incident radiation. In another embodiment, an array of CNSs is immersed in a first layer of hydrogen-rich polymers and in a second layer of metal-like material. In another embodiment, a one- or two-dimensional assembly of fibers containing CNSs embedded in a metal-like matrix serves as a radiation-protective fabric or body covering. |
| US07923706B2 |
Ultraviolet curing apparatus for continuous material
An ultraviolet radiation curing system is disclosed for treating a substrate, such as fiber optic cable or silicone tubing. The system comprises a processing chamber allowing transport of a continuous piece of substrate to be treated. As the substrate moves through the processing chamber, ultraviolet radiation from a plasma lamp activated by a microwave generator treats the surface of the substrate. The system comprises two elliptical reflectors of different sizes so that larger diameter substrates may be efficiently treated with ultraviolet radiation. The system may also comprise an ultraviolet-transmissive conduit enclosing the substrate and split into a first portion and a second portion, where the second portion is movable from the first portion to open the conduit and allow insertion or alignment of the substrate within the conduit and processing chamber. |
| US07923703B2 |
Sample dimension inspecting/measuring method and sample dimension inspecting/measuring apparatus
One of principal objects of the present invention is to provide a sample dimension measuring method for detecting the position of an edge of a two-dimensional pattern constantly with the same accuracy irrespective of the direction of the edge and a sample dimension measuring apparatus. According to this invention, to accomplish the above object, it is proposed to correct the change of a signal waveform of secondary electrons which depends on the direction of scanning of an electron beam relative to the direction of a pattern edge of an inspection objective pattern. It is proposed that when changing the scanning direction of the electron beam in compliance with the direction of a pattern to be measured, errors in the scanning direction and the scanning position are corrected. In this configuration, a sufficient accuracy of edge detection can be obtained irrespective of the scanning direction of the electron beam. |
| US07923700B2 |
Sample inspection apparatus, sample inspection method and sample inspection system
Sample inspection apparatus, sample inspection method, and sample inspection system are offered which can give a stimulus to a sample held on a film when the sample is inspected by irradiating it with a primary beam (e.g., an electron beam or other charged-particle beam) via the film. The apparatus has the film, a vacuum chamber, primary beam irradiation column, signal detector, and a controller for controlling the operations of the beam irradiation column and signal detector. The sample is held on a first surface of the film opened to permit access to the film. The vacuum chamber reduces the pressure of the ambient in contact with a second surface of the film. The irradiation column irradiates the sample with the primary beam via the film from the second surface side. The detector detects a secondary signal produced from the sample in response to the irradiation. |
| US07923699B2 |
Tracking control method and electron beam writing system
Control data for a main deflector is calculated based on position data that specifies the position of a region to be irradiated with the electron beam on the subfield, data on the number of all beam shots on the subfield, data on a time required for all the beam shots, and stage data that specifies the position of the stage. When the number of beam shots on one of the divided subfield sections reaches the obtained number of the beam shots on each of the divided subfield sections, a writing process proceed to a writing operation to be performed on another one of the divided subfield sections based on the direction of the movement of the stage. |
| US07923697B2 |
Image sensor with enhanced spatial resolution and method of producing the sensor
An image sensor includes a scintillator comprising a substrate covered with a layer of luminescent material, the layer of luminescent material comprising a first side in contact with the substrate and a second side, the surface of which has asperities, separated by interstices, a detection radiation emerging from the second side of the layer of luminescent material when the luminescent material is illuminated by a probe radiation through the substrate, characterized in that the second side of the layer of luminescent material is covered with a film of a coating material partially absorbing the detection radiation, and moulding itself to the asperities of the surface of the second side of the layer of luminescent material. |
| US07923696B2 |
Photoelectric converting apparatus
A photoelectric converting apparatus of the present invention includes a photoelectric converting element, a resetting transistor in which a source is connected to the photoelectric converting element and a drain is connected to a resetting power source, a readout transistor in which a gate is connected to the photoelectric converting element and a drain is connected to a readout power source, a signal line connected to a source of the readout transistor, a selecting transistor connected between the readout power source or the signal line and the readout transistor, and a constant current source connected to the signal line. |
| US07923695B2 |
Radiation image pick-up device and method therefor, and radiation image pick-up system
Sensitivity is freely changeable to another one in correspondence to a photographing mode, and both still image photographing and moving image photographing for example which are largely different from each other in dosage of exposure to radiation and which are also different from each other in required sensitivity are carried out so as to meet that request. A source or drain electrode of a TFT 21 is connected to a signal output circuit 3 through a signal line 14a and an IC 5. A source/drain of a TFT 23 is connected to the signal output circuit 3 through a signal line 14b and the IC 5. Thus, in each pixel 6, any one of the signal lines 14a and 14b is freely selectable when a signal is read out. |
| US07923694B2 |
Single-use external dosimeters for use in radiation therapies
Methods, systems, devices, and computer program products include positioning single-use radiation sensor patches that have adhesive means onto the skin of a patient to evaluate the radiation dose delivered during a treatment session. The sensor patches are configured to be minimally obtrusive and operate without the use of externally extending power cords or lead wires. |
| US07923692B2 |
Radioisotope Detection Device and Methods of Radioisotope Collection
A device for collection of radionuclides includes a mixture of a polymer, a fluorescent organic scintillator and a chemical extractant. A radionuclide detector system includes a collection device comprising a mixture of a polymer, a fluorescent agent and a selective ligand. The system includes at least one photomultiplier tube (PMT). A method of detecting radionuclides includes providing a collector device comprising a mixture comprising a polymer, a fluorescent organic scintillator and a chemical extractant. An aqueous environment is exposed to the device and radionuclides are collected from the environment. Radionuclides can be concentrated within the device. |
| US07923687B2 |
Radiation image capturing system, controller, program, and radiation image capturing method
A radiation image capturing system includes an image capturing apparatus for acquiring radiation image information of a subject by controlling a radiation source according to predetermined image capturing conditions, an image capturing order supply apparatus for supplying an image capturing order including the image capturing conditions, and a controller for controlling the image capturing apparatus according to the image capturing order. The controller includes an image capturing order changer for changing the image capturing order, an image capturing detail editor for editing image capturing details of the radiation image information acquired when the image capturing apparatus is controlled according to the image capturing order, and an image capturing detail supply unit for supplying the edited image capturing details. |
| US07923685B2 |
Electron beam device
A multi-biprism electron interferometer is configured so as to arrange a plurality of biprisms in an imaging optical system of a specimen. An upper electron biprism is arranged upstream of the specimen in the traveling direction of the electron beam, and an image of the electron biprism is formed on the specimen (object plane) using an imaging action of a pre-field of the objective lens. A double-biprism interference optical system is constructed of a lower electron biprism disposed downstream of the objective lens up to the first image plane of the specimen. |
| US07923684B2 |
Methods, systems and computer program products for measuring critical dimensions of fine patterns using scanning electron microscope pictures and secondary electron signal profiles
A pattern is inspected by acquiring a scanning electron microscope picture of an inspection pattern, and acquiring a scanning electron microscope secondary electron signal profile of the inspection pattern. A determination is made as to whether the inspection pattern is defective by comparing the scanning electron microscope picture of the inspection pattern to a scanning electron microscope picture of a sample pattern, and by comparing the scanning electron microscope secondary electron signal profile of the inspection pattern to a scanning electron microscope secondary electron signal profile of a sample pattern. |
| US07923680B2 |
Analysis method and analysis apparatus
An analysis apparatus includes a first process part for removing a film formed on a substrate by irradiating the film with ultraviolet light, a second process part for providing a solution onto a surface of the substrate for dissolving an object being analyzed on the substrate, and a third process part for analyzing the object being analyzed in the solution that is used in the second step. |
| US07923678B2 |
Sensing method including interrogation of a holographic sensor
A sensing method, which comprises subjecting a holographic sensor to an external physical interaction to which the sensor is sensitive, and observing a change in the holographic image. |
| US07923673B2 |
Large-area pixel for use in an image sensor
A pixel for detecting incident radiation (In) over a large area with high sensitivity and low power consumption. The pixel comprises a semiconductor substrate (1), covered by a thin insulating layer (2), on top of which a dendritic or arborescent gate structure (3) is arranged. The dendritic gate (3) is electrically connected at two or more contacts (C1, C2) with voltage sources, leading to the flow of a current and a position-dependent potential distribution in the gate (3). Due to the use of arborescent structures and various materials (31, 32), the pixel can be optimized for a certain application, in particular in terms of the electric field distribution, the RC time constant, the power consumption and the spectral sensitivity. Due to its compact size, the photo sensor can be arranged in linear or two-dimensional manner for the realization of line and area sensors. |
| US07923670B2 |
Casing structure for electronic equipment
A fan motor is mounted on the upper wall of the casing. The lower surface of this upper wall is formed into an inclined surface in which inclination is formed from the front wall side of the casing toward a back wall across from the front wall. When the fan motor is driven, oil mist or moisture contained in the air are condensed into water droplets or oil droplets. These water droplets or oil droplets fall and flow to the inner wall surface of the upper wall of the casing along the inner peripheral wall of a vent hole. Then the water droplets or oil droplets flow along the profile line of a vent hole smoothly (without stopping) and roll down the side wall of the casing. |
| US07923664B2 |
Method for controlling a cooking process in a cooking appliance
A method for controlling a cooking process in a cooking appliance includes determining, from a gas concentration detected during the cooking process, a set of function values corresponding to a shape of a function that depends on the gas concentration from a starting time t0 to a current time tn during a cooking process. Respective sets of comparison values for a comparison at the time tn are determined from the sets of reference values. A plurality of the sets of comparison values coming closest to the set of function values is automatically selected, and a set of parameters including at least an ending time of the cooking process is generated. The selected set of parameters is used for an electrical controller of the cooking appliance until a next comparison is made at a time tn+1. The method is automatically stopped as soon as the ending time of the cooking process has been reached. |
| US07923660B2 |
Pulsed laser anneal system architecture
Disclosed is the method and apparatus for annealing semiconductor substrates. One embodiment provides a semiconductor processing chamber comprising a first substrate support configured to support a substrate, a second substrate support configured to support a substrate, a shuttle coupled to the first substrate support and configured to move the first substrate support between a processing zone and a first loading zone, wherein the processing zone having a processing volume configured to alternately accommodating the first substrate support and the second substrate support. |
| US07923658B2 |
Laser micromachining methods and systems
A method of laser machining a substrate is provided. The method comprises directing laser energy at a first surface of the substrate, while providing an assist medium at the first surface of the substrate at least at approximately the area at which the laser energy is being directed. The assist medium is no longer provided prior to completion of formation of a feature in the substrate created utilizing the laser energy. |
| US07923657B2 |
Method and apparatus for electrode dressing
An electric discharge machine template fixture (40) suitable for EDM redressing operations, the fixture (40) comprising a body (42) capable of holding a template (50) and capable of rotating the template (50) about its central axis (58) for consecutive redressing operations. |
| US07923653B2 |
Key switch sheet and key switch module
A key switch sheet has a pressure sensitive adhesive layer for holding a contact spring by adhering to an apex portion of a dome-shaped contact spring at a back surface of a base material sheet. A thickness of the pressure sensitive adhesive layer at a region to be made to adhere to the apex portion of the contact spring is thicker than a thickness of the pressure sensitive adhesive layer at a peripheral region and thicker than or equal to a thickness of the pressure sensitive adhesive layer at a region where the base material sheet is made to adhere to a substrate. |
| US07923647B2 |
Portable device
A portable device enabling a user to visually recognize tampering with internal components. The portable device is for performing wireless communication with a predetermined communication subject and includes a circuit board on which an electronic component is mounted and a case for accommodating the circuit board. The case includes a first case part including a board compartment for accommodating the circuit board and a second case part for covering the circuit board accommodated in the board compartment of the first case part. The first case part and the second case part are joined with each other and unitized in a superimposed state. |
| US07923641B2 |
Communication cable comprising electrically isolated patches of shielding material
A tape can comprise a two-sided strip of dielectric material, with patches of electrical conductive material adhering to each side. Patches on one side can be longitudinally offset from patches on the opposite side. The patches can be electrically isolated from one another. The tape can be wrapped around one or more conductors, such as wires that transmit data, to provide electrical or electromagnetic shielding. The patches can circumferentially encase the conductors, with patches on one side of the tape covering gaps on the other side of the tape. The tape can be wrapped around the conductors so that an edge of a patch spirals about the conductors in a rotational direction opposite to any twisting of the conductors. The resulting cable can have a shield that is electrically discontinuous between opposite ends of the cable. |
| US07923640B2 |
High current cable
The heavy current cable (1) for 50/60 Hz TN-S mains comprises preferably a central earth connector (2), around which three phase leads (3, 4, 5) and a neutral lead (6) are stranded. The earth lead (2) can have a smaller cross-section than the phase leads (3, 4, 5) and the neutral lead (6), and can be straight. This heavy current cable (1) is characterised by a defined cable reactance, by a constant current distribution over the phase cables and by the avoidance of any induction currents. In addition virtually no interference can be coupled into parallel lying I & C-leads. There is only a low level of NIS-radiation and no short-circuiting forces. Finally, there is a time saving during installation. |
| US07923638B2 |
Communications cable provided with a crosstalk barrier for use at high transmission frequencies
A communications cable having a plurality of electrical conductor pairs, each of the pairs including two metallic conductors and each separately surrounded by insulation. An intermediate polymeric sheath has an inner and an outer surface and surrounds the plurality of electrical conductor pairs along substantially its entire length. An outer polymeric sheath has an inner and an outer surface, the inner surface of the outer polymeric sheath being disposed about the outer surface of the intermediate sheath along substantially its entire length. The outer surface of the intermediate sheath is bonded to the inner surface of the outer sheath along substantially its entire length. A method for reducing crosstalk in the cable and a method for manufacturing the cable is also disclosed. |
| US07923636B2 |
Strain relief device for an electrical conductor
A strain relief device for connecting a cable to a housing of an electronic device comprises an elongated elastic sleeve including first and second opposite ends and an axially extending sleeve passage, and a rigid insert including a first portion surrounded by the sleeve, a second portion protruding from the second end of the sleeve, and an axially extending insert passage aligned with the sleeve passage. The second portion of the insert is shaped to be non-rotatably received by a wall opening of the housing through which the cable passes, and may be D-shaped to mate with a D-shaped wall opening of the housing to prevent relative rotation. The second portion may carry a removable retainer, such as a C-shaped clip, for engaging a wall of the housing to prevent withdrawal of the insert. The invention facilitates serviceability and eliminates overmolding of a strain relief device onto the cable. |
| US07923633B2 |
Holder and a placement tool therefor
A holder device (1,100) for an article such as a thermocouple (9) is disclosed. The holder (1, 100) facilitates the placement and retention of the thermocouple (9) in an apparatus such as a lyophilizer by clamping the thermocouple (9) stably in position between adjacent shelves (80, 90) of the apparatus. The holder (1,100) comprises two bearing surfaces (14a, 126b) and a housing (10) extending therebetween. The housing (10) includes a spring (11) for biasing the bearing surfaces (14a, 126b) apart to retain the holder (1,100) between the shelves (80, 90). Also provided is a means for retaining a conduit, such as a thermocouple (9) or other device. The thermocouple retaining means comprises a conductive block (230) for securely holding within it a sensor end of a thermocouple (9) and a means is provided for retaining the block (230) with the thermocouple (9) in good conductive contact with a surface (80, 90) of the apparatus. The invention further provides a placement tool (2) for positioning and removing the holder (1, 100). |
| US07923629B2 |
Method for fabricating flexible semiconductor electrode, semiconductor electrode fabricated thereby, and solar cell using the semiconductor electrode
Disclosed herein is a method for fabricating a flexible semiconductor electrode including preparing a first substrate having a semiconductor layer disposed on a release layer, forming a second substrate having an adhesive layer disposed on a conductive material-coated flexible substrate, and pressing the first substrate against the second substrate under heat effective to transfer the semiconductor layer from the first substrate to the second substrate. The method allows for a flexible semiconductor electrode to be fabricated at low temperatures in a stable manner, and the flexible semiconductor electrode allows for high photoelectric conversion efficiency in a solar cell. |
| US07923627B2 |
Photovoltaic element, photovoltaic module comprising photovoltaic element, and method of fabricating photovoltaic element
A photovoltaic element capable of improving weather resistance is obtained. This photovoltaic element includes a photoelectric conversion layer, a first transparent conductive film formed on a surface of the photoelectric conversion layer closer to an incidence side and including a first indium oxide layer having (222) orientation and two X-ray diffraction peaks, and a second transparent conductive film formed on a surface of the photoelectric conversion layer opposite to the incidence side and including a second indium oxide layer having (222) orientation and one X-ray diffraction peak. |
| US07923625B2 |
Stacked photovoltaic device and method of manufacturing the same
A back metal electrode, a bottom cell using microcrystalline silicon for a photoelectric conversion layer, a front cell using amorphous silicon for a photoelectric conversion layer, and a transparent front electrode are formed in this order on a supporting substrate. At least one of the concentration of impurities contained in the front photoelectric conversion layer and the concentration of impurities contained in the bottom photoelectric conversion layer is controlled such that the concentration of impurities in the bottom photoelectric conversion layer is higher than the concentration of impurities in the front photoelectric conversion layer. Impurities do not include a p-type dopant or an n-type dopant but are any one, two, or all of carbon, nitrogen, and oxygen. |
| US07923622B2 |
Adaptive triggers method for MIDI signal period measuring
An initial positive trigger value is above a minimum positive trigger value which is above an input signal DC component value. An initial negative trigger value is under a maximum negative trigger value which is under the input signal DC component value. Maximum and minimum signal values are measured and then they are used for the next positive and negative trigger value calculations. A positive signal half period is measured by measuring the time interval from the time point when a signal value becomes greater than the positive trigger value, to a time point where the input signal becomes less than the negative trigger value when the negative half period measuring starts. The negative half period measuring ends when the input signal value becomes greater than the positive trigger value. Positive and negative half period measurements are repeated several times and measured half periods are stored to memory. The difference of two different half period sums must be less than a given small value to accept one of two sums as N signal periods. |
| US07923621B2 |
Tempo analysis device and tempo analysis method
A tempo analyzer to analyze the tempo of sound such as a musical composition or the like is provided in which a controller (9) takes, based on level information on a sound signal from an analysis data extraction unit (62), a frame which is a predetermined unit-time interval as a unit of process, detects positions of peaks of the level of the sound signal (apex of the change in level) higher than a predetermined level to find a time interval (peak-to-peak interval) between the peak positions in the frame, and determines a peak-to-peak time interval having occurred frequently as a tempo. |
| US07923618B2 |
“Eclipse ligature” for single reed musical instruments
The subject invention pertains to a ligature for securing a single-beating reed to a mouthpiece of any single reed woodwind instrument. According to a specific embodiment, the subject ligature can be provided with two rounded ribs affixed to the interior of a three-fingered collar that is held together across a longitudinal split by tightening screws. One of the two rounded ribs is provided with a concavity opening into the interior of the collar in order to create a triangular negative space on a surface of a secured reed. This negative space allows for asymmetrical pressure to be exerted onto the reed, which can result in a freedom of vibration and may provide subtle improvements in tone, control, articulation, and richness in the core of sound. |
| US07923614B1 |
Inbred sunflower line CN1703
An inbred sunflower line, designated CN1703, the plants and seeds of the inbred sunflower line CN1703, methods for producing a sunflower plant, either inbred or hybrid, produced by crossing the inbred sunflower line CN1703 with itself or with another sunflower plant, and hybrid sunflower seeds and plants produced by crossing the inbred line CN1703 with another sunflower line or plant and to methods for producing a sunflower plant containing in its genetic material one or more transgenes and to the transgenic sunflower plants produced by that method. This invention also relates to inbred sunflower lines derived from inbred sunflower line CN1703, to methods for producing other inbred sunflower lines derived from inbred sunflower line CN1703 and to the inbred sunflower lines derived by the use of those methods. |
| US07923612B1 |
Maize variety hybrid X6F640
A novel maize variety designated X6F640 and seed, plants and plant parts thereof, produced by crossing Pioneer Hi-Bred International, Inc. proprietary inbred maize varieties. Methods for producing a maize plant that comprises crossing maize variety X6F640 with another maize plant. Methods for producing a maize plant containing in its genetic material one or more traits introgressed into X6F640 through backcross conversion and/or transformation, and to the maize seed, plant and plant part produced thereby. This invention relates to the maize variety X6F640, the seed, the plant produced from the seed, and variants, mutants, and minor modifications of maize variety X6F640. This invention further relates to methods for producing maize varieties derived from maize variety X6F640. |
| US07923611B1 |
Inbred corn line LIA03BM
An inbred corn line, designated LIA03BM, the plants and seeds of the inbred corn line LIA03BM, methods for producing a corn plant, either inbred or hybrid, produced by crossing the inbred corn line LIA03BM with itself or with another corn plant, and hybrid corn seeds and plants produced by crossing the inbred line LIA03BM with another corn line or plant and to methods for producing a corn plant containing in its genetic material one or more transgenes and to the transgenic corn plants produced by that method. This invention also relates to inbred corn lines derived from inbred corn line LIA03BM, to methods for producing other inbred corn lines derived from inbred corn line LIA03BM and to the inbred corn lines derived by the use of those methods. |
| US07923609B1 |
Maize variety PHPCC
A novel maize variety designated PHPCC and seed, plants and plant parts thereof. Methods for producing a maize plant that comprise crossing maize variety PHPCC with another maize plant. Methods for producing a maize plant containing in its genetic material one or more traits introgressed into PHPCC through backcross conversion and/or transformation, and to the maize seed, plant and plant part produced thereby. Hybrid maize seed, plant or plant part produced by crossing the variety PHPCC or a trait conversion of PHPCC with another maize variety. Inbred maize varieties derived from maize variety PHPCC, methods for producing other inbred maize varieties derived from maize variety PHPCC and the inbred maize varieties and their parts derived by the use of those methods. |
| US07923608B2 |
Tomato hybrid ‘vespolino’
The invention relates to a new and distinctive tomato hybrid, designated ‘Vespolino,’ to the plants of tomato hybrid ‘Vespolino,’ to the plant parts of tomato hybrid ‘Vespolino’ including the fruit, and for producing a hybrid tomato plant by crossing tomato hybrid ‘Vespolino’ with itself or another tomato line. The invention further relates to methods for producing a tomato plant containing in its genetic material one or more transgenes and to the transgenic plants produced by that method and to the methods for producing other tomato lines derived from tomato hybrid ‘Vespolino.’ |
| US07923606B2 |
Cotton variety DP 161 B2RF
The invention relates to the novel cotton variety designated DP 161 B2RF. Provided by the invention are the seeds, plants, plant parts and derivatives of the cotton variety DP 161 B2RF. Also provided by the invention are tissue cultures of the cotton variety DP 161 B2RF and the plants regenerated therefrom. Still further provided by the invention are methods for producing cotton plants by crossing the cotton variety DP 161 B2RF with itself or another cotton variety and plants produced by such methods. |
| US07923604B1 |
Soybean variety XB51E08
According to the invention, there is provided a novel soybean variety designated XB51E08. This invention thus relates to the seeds of soybean variety XB51E08, to the plants of soybean XB51E08 to plant parts of soybean variety XB51E08 and to methods for producing a soybean plant produced by crossing plants of the soybean variety XB51E08 with another soybean plant, using XB51E08 as either the male or the female parent. |
| US07923602B2 |
AXMI-031, AXMI-039, AXMI-040 and AXMI-049, a family of novel delta endotoxin genes and methods for their use
Compositions and methods for conferring pesticidal activity to bacteria, plants, plant cells, tissues and seeds are provided. Compositions comprising a coding sequence for a delta-endotoxin polypeptide are provided. The coding sequences can be used in DNA constructs or expression cassettes for transformation and expression in plants and bacteria. Compositions also comprise transformed bacteria, plants, plant cells, tissues, and seeds. In particular, isolated delta-endotoxin nucleic acid molecules are provided. Additionally, amino acid sequences corresponding to the polynucleotides are encompassed, and antibodies specifically binding to those amino acid sequences. In particular, the present invention provides for isolated nucleic acid molecules comprising nucleotide sequences encoding the amino acid sequence shown in SEQ ID NO:2, 4, 6, 8, 10, 12, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, or 38, or the nucleotide sequence set forth in SEQ ID NO: 1, 3, 5, 7, 9, 11, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, or 37, as well as variants and fragments thereof. |
| US07923601B2 |
Cultivation method of flowering plant, flowering plant obtained by the cultivation method, processing method of cut flower and cut flower obtained by the processing method
The present invention relates to making it possible to cultivate a new flowering plant that meets the needs of the flower market, namely, a flower having a unique color, a new type of flower and the like. The present invention also relates to making it possible to process a cut flower that meets the needs of the flower market, namely, a cut flower having a unique color or a new type of cut flower. By releasing the restraint on the floral bud imposed by the outermost layer of the floral bud, the present invention provides a cultivation method of a flowering plant having a unique appearance, a flowering plant obtained by the cultivation method, a processing method of a cut flower having a unique appearance and a cut flower obtained by the processing method. The present invention further provides a chlamydeous flowering plant and a cut chlamydeous flower in each of which the restraint on the floral bud imposed by the outermost layer of the floral bud is released. |
| US07923599B2 |
Antifungal polypeptides
Compositions and methods for protecting a plant from a pathogen, particularly a fungal pathogen, are provided. Compositions include novel amino acid sequences, and variants and fragments thereof, for antipathogenic polypeptides that were isolated from microbial fermentation broths. Nucleic acid molecules comprising nucleotide sequences that encode the antipathogenic polypeptides of the invention are also provided. A method for inducing pathogen resistance in a plant using the nucleotide sequences disclosed herein is further provided. The method comprises introducing into a plant an expression cassette comprising a promoter operably linked to a nucleotide sequence that encodes an antipathogenic polypeptide of the invention. Compositions comprising an antipathogenic polypeptide or a transformed microorganism comprising a nucleic acid of the invention in combination with a carrier and methods of using these compositions to protect a plant from a pathogen are further provided. Transformed plants, plant cells, seeds, and microorganisms comprising a nucleotide sequence that encodes an antipathogenic polypeptide of the invention, or variant or fragment thereof, are also disclosed. |
| US07923596B2 |
Method and system for producing dressing products of polymer fibres useful for covering moist wounds
A method and system for producing an improved dressing product, useful for covering/protecting a moist wound is disclosed. The dressing product comprising fibers of a spinnable polymer forming a twisted ribbon. By virtue of this twisting, the fibers, in particular at the periphery of the ribbon, are connected to one another so as to afford better mechanical cohesion and a smoother outer appearance, without affecting the action of absorption, dilation and gel formation for extracting the biological fluid, nor the action of retention of proteins and other cellular and bacterial waste matter which would impede the phenomenon of cicatrization. The ribbon twisting equipment comprises a conical bowl (1) for driving fibers in rotation with a twisting die (3) in its narrowed downstream part (2), and a gear mechanism (4) for driving in rotation. |
| US07923595B2 |
Process for the treatment of a product stream
Process for treating a product stream typically from an autothermal cracking process, the product stream comprising one or more olefins, hydrogen, carbon monoxide, carbon dioxide and one or more oxygenates, by contacting the product stream with at least one compound selected from (1) H2N—OR1, and (2) H2N—NR2R3, where R1, R2 and R3 may each be independently selected from H and carbon-containing substituents. |
| US07923592B2 |
Process for making unsaturated hydrocarbons using microchannel process technology
The disclosed invention relates to a process for converting a feed composition comprising one or more hydrocarbons to a product comprising one or more unsaturated hydrocarbons, the process comprising: flowing the feed composition and steam in contact with each other in a microchannel reactor at a temperature in the range from about 200° C. to about 1200° C. to convert the feed composition to the product, the process being characterized by the absence of catalyst for converting the one or more hydrocarbons to one or more unsaturated hydrocarbons. Hydrogen and/or oxygen may be combined with the feed composition and steam. |
| US07923587B2 |
Anti-oxidant macromonomers and polymers and methods of making and using the same
The present invention relates to macromonomer compounds possessing antioxidant properties, antioxidant polymers comprising the antioxidant macromonomers as a recurring unit, and methods of inhibiting oxidation in a substance comprising contacting the substance with the antioxidant polymers. In one embodiment, substantially all of the recurring macromonomeric units of the antioxidant polymers comprise an antioxidant moiety. In another embodiment, all of the recurring macromonomer units of the antioxidant polymers comprise an antioxidant moiety. The method of the present invention, yields antioxidant polymers with substantially all of the recurring units comprising an antioxidant moiety. These antioxidant polymers have greater bulk antioxidative properties than previously known. |
| US07923585B2 |
Menthol derivative and cooling agent composition comprising the same
The invention relates to innovative menthol derivatives which are represented by the general formula (I) below and are excellent in a cooling effect and cool retaining effect, cooling agent compositions comprising the menthol derivatives, and sensory stimulation agent compositions containing the cooling agent compositions, as well as fragrance compositions, beverage or food products, cosmetic products, toiletry products, bathing agents, and pharmaceutical products containing the cooling agent compositions or sensory stimulation agent compositions. (general formula (I)) wherein R<1> represents a hydrogen atom, an alkyl group having 1 to 4 carbon atoms, or an acyl group having 1 to 5 carbon atoms; R<2> and R<3> independently represent an alkylene group having 2 to 5 carbon atoms and optionally having a substituent; double dotted line represents a single bond or a double bond; and n is an integer of 1 to 3. |
| US07923584B2 |
Synthesis of difunctional oxyethylene-based compounds
A method of reacting a toluenesulfonyl-terminated polyoxyethylene compound having the formula CH3—C6H4—SO2—(O—CH2—CH2)n—O—R1 with an ammonium salt having the formula NR24X to form a compound having the formula X—CH2—CH2—(O—CH2—CH2)n-1—R3. The value n is a positive integer. X is a halogen, cyanide, cyanate, thiocyanate, or azide. R1 is a terminating group. Each R2 is hydrogen or an alkyl group. —R3 is —O—R1 or —X. |
| US07923583B2 |
Method for producing cycloalkanol and/or cycloalkanone
An object of the present invention is to provide a method capable of producing a cycloalkanol and/or a cycloalkanone with a favorable selectivity coefficient by oxidizing a cycloalkane with a favorable conversion ratio.Disclosed is a method for producing a cycloalkanol and/or a cycloalkanone, which comprises oxidizing a cycloalkane with oxygen in the presence of a mesoporous silica which contains at least one transition metal and has been also subjected to contact treatment with an amine and/or ammonia. Preferably, a crystal obtained by mixing a compound containing the metal, a silicon compound, a structure-directing agent and water is subjected to contact treatment with an amine and/or ammonia and then fired to obtain a mesoporous silica, and a cycloalkane is oxidized with oxygen in the presence of the mesoporous silica. |
| US07923582B2 |
Chemoselective ligation
The present invention features a chemoselective ligation reaction that can be carried out under physiological conditions. In general, the invention involves condensation of a specifically engineered phosphine, which can provide for formation of an amide bond between the two reactive partners resulting in a final product comprising a phosphine moiety, or which can be engineered to comprise a cleavable linker so that a substituent of the phosphine is transferred to the azide, releasing an oxidized phosphine byproduct and producing a native amide bond in the final product. The selectivity of the reaction and its compatibility with aqueous environments provides for its application in vivo (e.g., on the cell surface or intracellularly) and in vitro (e.g., synthesis of peptides and other polymers, production of modified (e.g., labeled) amino acids). |
| US07923581B2 |
Process for producing biarylphosphine compound
A process for producing a biarylphosphine compound is disclosed. The process has a step of subjecting a biarylsulfonate compound to coupling reaction with a hydrogen-phosphine compound in the presence of a catalyst and an organic strong base to obtain a biarylphosphine compound. As the catalyst, preferably used is a nickel compound or a palladium compound. As the organic strong base, preferably used is 1,8-diazabicyclo[5.4.0]undecene-7 (DBU). |
| US07923573B2 |
Benzene compound having 2 or more substituents
A superior LXR modulator is provided. A compound represented by the general formula (I): [wherein R1: —COR9 (wherein R9: alkyl, optionally substituted alkoxy or optionally substituted amino); R2: H, OH, alkoxy, optionally substituted amino, etc.; R3: H, optionally substituted alkyl, cycloalkyl, optionally substituted alkoxy, optionally substituted amino, halogeno, etc.; R4 and R5: H, optionally substituted alkyl, halogeno, etc.; R6 and R7: H, alkyl; R8: —X2R10 [wherein R10: —COR11 (wherein R11: OH, optionally substituted alkoxy, optionally substituted amino, etc.), —SO2R12 (wherein R12: optionally substituted alkyl, optionally substituted amino, etc.), tetrazol-5-yl, etc.; X2: single bond, optionally substituted alkylene, etc.]; X1: —NH—, —O—, —S—, etc.; Y1: optionally substituted phenyl, optionally substituted 5- to 6-membered aromatic heterocyclyl; Y2: optionally substituted aryl, optionally substituted heterocyclyl, etc.] and the like is provided. |
| US07923568B2 |
Estrogen receptor modulators
The present invention relates to compounds and derivatives thereof, their synthesis, and their use as estrogen receptor modulators. The compounds of the instant invention are ligands for estrogen receptors and as such may be useful for treatment or prevention of a variety of conditions related to estrogen functioning including: bone loss, bone fractures, osteoporosis, metastatic bone disease, Paget's disease, periodontal disease, cartilage degeneration, endometriosis, uterine fibroid disease, hot flashes, increased levels of LDL cholesterol, cardiovascular disease, impairment of cognitive functioning, cerebral degenerative disorders, restenosis, gynecomastia, vascular smooth muscle cell proliferation, obesity, incontinence, inflammation, inflammatory bowel disease, sexual dysfunction, hypertension, retinal degeneration and cancer, in particular of the breast, uterus and prostate. |
| US07923567B2 |
Process for preparing valsartan
The invention relates to novel compound of formula (IV), which is an organic acid salt of N-[(2′-cyanobiphenyl-4-yl)methyl]-(L)-valine ester. This compound is an useful intermediate for process of preparation of Valsartan of formula (I), chemically known as (S)-N-(1-Carboxy-2-methylprop-1-yl)-N-pentanoyl-N-[2′-(1H-terazol-5-yl)biphenyl-4-ylmethyl]amine. This invention also relates to a process for preparing Valsartan using novel intermediate of formula (IV). |
| US07923565B2 |
Derivatives of 1-phenyl-2-pyridinyl alkyl alcohols as phosphodiesterase inhibitors
Derivatives of 1-phenyl-2-pyridinyl alkyl alcohols are useful as inhibitors of the phosphodiesterase 4 (PDE4) enzyme. |
| US07923556B2 |
Phenyl-substituted pyrimidine compounds useful as kinase inhibitors
Compounds having the formula (I), and pharmaceutically acceptable salts, and solvates thereof, are useful as kinase inhibitors, wherein: two of X1, X2, and X3 are N, and the remaining one of X1, X2, and X3 is —CR1; R1 is hydrogen or —CN; and N, G, Z, R2, R3, R4, R5, and R6 are described in the specification. Also disclosed are pharmaceutical compositions containing compounds of formula (I), and methods of treating conditions associated with the activity of p38 kinase and/or conditions associated with the activity of LIM kinase. |
| US07923553B2 |
Processes for the production of polymorphic forms of rifaximin
Crystalline polymorphous forms of rifaximin (INN) antibiotic named rifaximin α and rifaximin β, and a poorly crystalline form named rifaximin γ, useful in the production of medicinal preparations containing rifaximin for oral and topical use and obtained by means of a crystallization carried out by hot-dissolving the raw rifaximin in ethyl alcohol and by causing the crystallization of the product by addition of water at a determinate temperature and for a determinate period of time, followed by a drying carried out under controlled conditions until reaching a settled water content in the end product, are the object of the invention. |
| US07923549B2 |
RNA interference mediated inhibition of interleukin and interleukin receptor gene expression using short interfering nucleic acid (siNA)
This invention relates to compounds, compositions, and methods useful for modulating interleukin and/or interleukin receptor gene expression using short interfering nucleic acid (siNA) molecules. This invention also relates to compounds, compositions, and methods useful for modulating the expression and activity of other genes involved in pathways of interleukin and/or interleukin receptor gene expression and/or activity by RNA interference (RNAi) using small nucleic acid molecules. In particular, the instant invention features small nucleic acid molecules, such as short interfering nucleic acid (siNA), short interfering RNA (siRNA), double-stranded RNA (dsRNA), micro-RNA (miRNA), and short hairpin RNA (shRNA) molecules and methods used to modulate the expression of interleukin and/or interleukin receptor genes. |
| US07923546B2 |
Base sequence for control probe and method of designing the same
There are provided a sequence for a control probe having a sequence rarely forming a secondary structure and rarely hybridizing with an undesired target and a method of designing thereof. There is further provided a probe carrier employing a control probe designed by the designing method. To provide these, a palindromic sequence is selected based on a sequence of which frequency is low in a database for a predetermined base sequence and used as the sequence of the control probe. |
| US07923545B2 |
Caterpiller gene family
The present invention relates to a new family of structurally and functionally related nucleic acids and proteins, designed the CATERPILLER family, which is characterized by landmark structural motifs including a nucleotide binding domain and leucine-rich repeat domains. |
| US07923537B2 |
Ion channel assay methods
A method of characterizing the biological activity of a candidate compound may include exposing cells to the candidate compound, and then exposing the cells to a repetitive application of electric fields so as to set the transmembrane potential to a level corresponding to a pre-selected voltage dependent state of a target ion channel. |
| US07923534B1 |
Isolated tumor rejection antigen precursor proteins MAGE-2 and MAGE-3
The invention relates to an isolated DNA sequence which codes for an antigen expressed by tumor cells which is recognized by cytotoxic T cells, leading to lysis of the tumor which expresses it. Also described are cells transfected by the DNA sequence, and various therapeutic and diagnostic uses arising out of the properties of the DNA and the antigen for which it codes. |
| US07923532B2 |
Methods for diagnosing celiac sprue and reagents useful therein
Administering an effective dose of glutenase to a Celiac or dermatitis herpetiformis patient reduces levels of toxic gluten oligopeptides, thereby attenuating or eliminating the damaging effects of gluten. |
| US07923528B2 |
Degradable 1,4-benzodioxepin-3-hexyl-2,5-dione monomer derived polymer with a high glass transition temperature
A homopolymer of 1,4-benzodioxepin-3-cyclohexyl-2,5-dione with a Tg of 120° C. Copolymers are also described. The polymers are useful for surgical and other applications where biodegradability is important. |
| US07923527B1 |
Carbon nanotube compound and method for producing the same
The invention provides a carbon nanotube compound and method for producing the same. The method of the invention comprises the following steps. Firstly, Aniline-trimer and DMAc(dimethyl acetamide) solution are mixed to form a first solution. Secondly, Dianhydride and DMAc solution are mixed to form a second solution. The first solution and the second are mixed to form a third solution. Additionally, carboxyl-multiwall carbon nanotubes (c-MWNT), Diaminodiphenylether and DMAc solution are mixed to form a fourth solution. The third solution and the fourth are mixed to form a polyamic acid/CNT solution. Some polyamic acid/CNT solution is spread on a substrate and processed by a thermal treatment, and a carbon nanotube compound is eventually produced. |
| US07923523B2 |
Synthesis of elastomeric poly(carborane-siloxane-acetelyene)S
A linear polymer comprising carborane, siloxane, and acetylene units, which may be cross-linked to a cured polymer and/or pyrolyzed to a ceramic. |
| US07923522B2 |
Process for preparing a dispersion liquid of zeolite fine particles
The invention provides a preparation process of organic-group-modified zeolite fine particles excellent in stability of particle size and to be used for electronic materials or the like. The preparation process comprises a first step of obtaining a liquid containing zeolite seed crystals having a particle size of 80 nm or less which are formed in the presence of a structure directing agent, a second step of adding an organic-group-containing hydrolyzable silane compound to the liquid obtained by the first step, and a third step of maturing the liquid of the second step at temperature higher than that of the first step. A dispersion liquid of zeolite fine particles obtained by the process. |
| US07923520B2 |
High refractive index monomers and (co)polymers prepared therefrom
The present invention relates to high refractive index monomers according to formula (I) and (co)polymers comprising such high refractive index monomers. The 5 (co)polymers are highly suitable for the manufacture of optical articles, in particular flexible optical articles, more in particular intraocular lenses. |
| US07923510B2 |
Adhesive sheet based on nitrile rubber blends for attaching metal parts to plastics
Heat-activable adhesive sheet of an adhesive comprising a blend of at least three synthetic nitrile rubber compositions S1, S2 and S3, each of which comprises at least one synthetic nitrile rubber, and at least one reactive resin which is capable of crosslinking with itself, with other reactive resins and/or with the nitrile rubbers of synthetic rubber compositions S1, S2 and S3, in which a) the blend of the heat-activable sheet being microphase-separated, characterized by at least three different glass transition temperatures in a DSC, b) at least one of said glass transition temperatures being greater than 10° C. and at least one of said glass transition temperature lower than −20° C., c) the nitrile rubber or rubbers S1 having an acrylonitrile fraction of greater than/equal to 35%, d) the nitrile rubber or rubbers S2 having an acrylonitrile fraction of greater than 25% and less than 35%, e) the nitrile rubber S3 having an acrylonitrile fraction of less than/equal to 25%. |
| US07923508B2 |
Flame retardant styrene-based resin composition with high impact property
The present invention relates to a flame retardant styrene-based resin composition with high impact property. The styrene-based resin composition of the present invention comprises 1-30 parts by weight of a flame retardant, 0.5-15 parts by weight of a flame retardant aid and 0.1-15 parts by weight of a styrene-containing graft copolymer per 100 parts by weight of a base resin comprising a rubber-modified styrene-based copolymer and offers high impact property and good rigidity and fluidity, without appearance problem under a variety of processing conditions. |
| US07923506B2 |
Molding compositions containing modified polybutylene terephthalate (PBT) random copolymers derived from polyethylene terephthalate (PET)
A molding composition comprising: (a) from 40 to 99.99 wt % of a modified polybutylene terephthalate random copolymer that (1) is derived from polyethylene terephthalate component selected from the group consisting of polyethylene terephthalate and polyethylene terephthalate copolymers and (2) has at least one residue derived from the polyethylene terephthalate component, and (b) from 0.01 to 20 wt. % of a carboxy reactive component; wherein the modified polybutylene terephthalate random copolymer, the carboxy reactive component, and optionally at least one additive, are present in a total amount of 100 wt %. |
| US07923503B2 |
Aqueous pressure-sensitive adhesive composition and use thereof
There provided a pressure-sensitive adhesive (PSA) composition constituting a PSA layer, which may exhibit a plurality of properties in a well-balanced manner, and a PSA sheet including the PSA layer. The composition is an aqueous PSA composition in which an acrylic polymer serves as a main component and the acrylic polymer is dispersed in water, and contains: A) acrylic polymer obtained by polymerizing a monomer raw material including alkyl(meth)acrylate as a main monomer, a first functional monomer having a first functional group to react with a hydrazino group, and a second functional monomer having a second functional group to react with a carbodiimide group; B) a hydrazine-based crosslinking agent; and C) a carbodiimide-based crosslinking agent. |
| US07923498B2 |
Elastomeric films and gloves
There is disclosed a composition for producing an elastomeric film comprising: a synthetic polymer, sulphur, and a metal-oxide cross-linking agent. The concentration of the total solids in the composition is between 5-20% by weight of the composition. Also disclosed is a multiple-coating method of manufacturing an elastomeric film comprising the steps of: (i) providing a composition comprising a synthetic polymer, a cross linking agent, wherein the concentration of the total solids in the composition is between 5-20% by weight of the composition, (ii) contacting the composition with a mould to form a layer of composition on the mould, (iii) contacting the layer of composition on the mould with a further amount of the composition to form a further layer, (iv) drying the composition, and (v) curing the composition. |
| US07923491B2 |
Graphite nanocomposites
Elastomeric compositions comprising graphite nanoparticles (preferably graphene nanoparticles) and methods for making same. Such compositions are useful for tire innertubes and tire innerliners. |
| US07923489B2 |
Amphiphilic polymer compounds, method for the production thereof and their use
The invention describes amphiphilic polymer compounds which are prepared by a) reacting a di-, tri- or tetraglycidyl compound (A) with an optionally unsaturated reactive component (B) consisting of C8-C28-fatty acid, a C8-C28-alcohol or a secondary C8-C28-amine, and allowing b1) the reaction product from stage a) to react further first with b1α) an aliphatic or aromatic polyisocyanate compound (C) b1β) and optionally then with a polyalkylene oxide compound (D), and b1γ) reacting the reaction product from stage b1α) or optionally b1β) with a component (E) which is reactive towards isocyanates and has at least one OH, NH2, NH or SH group, or b2) allowing the reaction product from stage a) to react to completion with the reaction product of component (C) with component (E) and optionally (D) and (C), or b3) allowing the reaction product from stage a) to react to completion with the reaction product from component (C) and component (D) and optionally (C) and optionally the reaction product of component (C) and component (E) and optionally (C). The polymer compounds proposed according to the invention are exceptionally useful as agents for preventing or suppressing efflorescences on surfaces of hardended, hydraulically settable building materials or/and for hydrophobization of the corresponding hydraulically settable systems. Moreover, owing to the admixtures proposed according to the invention, the corresponding products absorb substantially less water, with the result that frost damage and rapid rusting of the steel reinforcement can be substantially reduced. |
| US07923486B2 |
Bio-polymer and scaffold-sheet method for tissue engineering
A method of making a new type of biomaterials, biodegrable crosslinked urethane-containing polyester (CUPE) elastomers and a scaffold-sheet engineering method for tissue engineering applications is provided. CUPEs can be synthesized by forming a linear pre-polymer, which is a polyester, introducing the urethane bonds into polyester using a diisocyanate as a linker, and crosslinking the resulting urethane containing linear polymers to form CUPEs via post-polymerization. This family of polymers, CUPEs, exhibit excellent biocompatibility with desired degradation. Tissue engineering scaffolds made of CUPEs are soft and elastic, and have good mechanical strength. Complex tissue grafts can be constructed by a novel layer-by-layer (LBL) scaffold-sheet engineering design using CUPE sheets. CUPE scaffolds can provide openings for cell to cell communication across scaffold layers and angiogenesis into the depth of the construct. Biomolecules, such as anticoagulants, can be incorporated into the CUPE polymers, increasing their viability as vascular graft scaffolds. |
| US07923485B2 |
Preparations based on aziridino polyethers and the use thereof
The invention relates to preparations based on aziridino polymers and comprising monofunctional aziridines and to the use thereof in producing dental materials, especially impression materials. |
| US07923483B2 |
Optical fiber ribbon with improved stripability
An optical fiber ribbon includes a plurality of optical fibers encapsulated within a matrix material, where the optical fiber coating(s) and the matrix material(s), and optionally any ink layers thereon, are characterized by compatible chemical and/or physical properties, whereby the fiber coating and matrix and any ink layers therebetween can be reliably stripped from the optical fibers to afford a suitable strip cleanliness. Novel ink formulations that can be used in the making of such fiber optic ribbons, methods of making such ribbons, and their use are also described. |
| US07923478B2 |
Nanoporous polymeric material and preparation method
A nanoporous material is provided. The pores of the nanoporous material are formed between nanoparticles that have a polymeric surface layer. The nanoporous material is produced by (a) suspending the nanoparticles in a medium material, wherein the nanoparticles are phase separated from the medium material, (b) heating the suspension to a temperature above the melting point of the nanoparticle surface layer, and (c) cooling the suspension. Alternatively, the nanoporous material may be produced by dissolving nanoparticles having a polymeric surface layer in a solvent, and then adding a medium material that causes the nanoparticles to phase separate from the solution. |
| US07923476B2 |
Method and apparatus for reducing CO2 in a stream by conversion to a syngas for production of energy
A system and method for reducing the CO2 in a gaseous stream, such as an exhaust stream, from a power plant or industrial plant, like a cement kiln, is disclosed. A preferred embodiment includes providing the gaseous stream to pyrolysis reactor along with a carbon source such as coke. The CO2 and carbon are heated to about 1330° C. and at about one atmosphere with reactants such as steam such that a reaction takes place that produces syngas, carbon dioxide (CO2) and hydrogen (H2). The Syngas is then cleaned and provided to a Fischer-Tropsch synthesis reactor to produce Ethanol or Bio-catalytic synthesis reactor. |
| US07923475B2 |
Electroluminescent arrangements
3,4-Polyalkylenedioxythiophene dispersions comprising polyanions and cationic 3,4-polyalkylenedioxythiophenes, in particular those of the formula (I) in which n is an integer from 3 to 100, preferably from 4 to 15, and X is —(CH2)x—CR1R2—(CH2)y—, where R1 and R2, independently of one another, are H, an optionally substituted alkyl radical having from 1 to 20 carbon atoms, an aryl radical having from 6 to 14 carbon atoms or —CH2—OR3, where R3=H, alkyl or —CH2—CH2—CH2—SO3H, and x and y are each, independently of one another, an integer from 0 to 9, in which at least 90% of the particles are <50 nm, can be employed in electroluminescent arrangements having a long service life and high luminosity. |
| US07923469B2 |
Compositions including vitamin-based surfactants and methods for using same
Compositions for caring for contact lenses and eyes include a liquid aqueous medium and a vitamin derivative component present in an amount effective as a surfactant in the composition. The compositions can be used to clean, soak, re-wet and, with the inclusion of a disinfectant, disinfect contact lenses. In addition, the compositions are effective as artificial tears and eye wash solutions. Methods for contact lens care and eye care are also disclosed. |
| US07923467B2 |
Substituted pyrrole derivatives and their use as HMG-CO inhibitors
The present invention relates to substituted pyrrole derivatives, which can be used as 3-hydroxy-3-methylglutaryl-coenzyme A (HMG-CoA) reductase inhibitors. Compounds disclosed herein can function as cholesterol lowering agents and can be used for the treatment of cholesterol-related diseases and related symptoms. Processes for the preparation of disclosed compounds are provided, as well as pharmaceutical compositions containing the disclosed compounds, and methods of treating cholesterol-related diseases and related symptoms. |
| US07923465B2 |
Cannabinoid receptor ligands, pharmaceutical compositions containing them, and process for their preparation
The present invention relates to novel cannabinoid receptor modulators, in particular cannabinoid 1 (CB1) or cannabinoid 2 (CB2) receptor modulators, and uses thereof for treating diseases, conditions and/or disorders modulated by a cannabinoid receptor (such as pain, neurodegenerative disorders, eating disorders, weight loss or control, and obesity). |
| US07923463B2 |
Methods for stabilizing imiquimod for two months, four months, and six months
Pharmaceutical formulations and methods including an immune response modifier (IRM) compound and an oleic acid component are provided where stability is improved by using oleic acid have low polar impurities such as peroxides. |
| US07923460B2 |
BRAF mutation T1796A in thyroid cancers
The BRAF gene has been found to be activated by mutation in human cancers, predominantly in malignant melanoma. We tested 476 primary tumors, including 214 lung, 126 head and neck, 54 thyroid, 27 bladder, 38 cervical, and 17 prostate cancers, for the BRAF T1796A mutation by polymerase chain reaction (PCR)-restriction enzyme analysis of BRAF exon 15. In 24 (69%) of the 35 papillary thyroid carcinomas examined, we found a missense thymine (T)→adenine (A) transversion at nucleotide 1796 in the BRAF gene (T1796A). The T1796A mutation was detected in four lung cancers and in six head and neck cancers but not in bladder, cervical, or prostate cancers. Our data suggested that activating BGRAF mutations may be an important even in the development of papillary thyroid cancer. Moreover, BRAF mutation reliably predicts a poor prognosis for papillary thyroid carcinomas. |
| US07923452B2 |
Fungicidal mixtures comprising boscalid and pyrimethanil
Fungicidal mixtures comprising(1) boscalid of the formula (I) and (2) pyrimethanil of the formula (II) in a synergistically effective amount, methods for controlling harmful fungi using mixtures of boscalid (I) and pyrimethanil (II) and the use of boscalid (I) and pyrimethanil (II) for preparing such mixtures, compositions comprising these mixtures and also seed comprising these mixtures. |
| US07923451B2 |
2-aminopyrimidine modulators of the histamine H4 receptor
2-Aminopyrimidine compounds are described, which are useful as H4 receptor modulators. Such compounds may be used in pharmaceutical compositions and methods for the treatment of disease states, disorders, and conditions mediated by H4 receptor activity, such as allergy, asthma, autoimmune diseases, and pruritis. |
| US07923450B2 |
Modulators for amyloid beta
The invention relates to compounds of formula wherein R1, R2, R3, R4, X and Y are as defined herein and to pharmaceutically active acid addition salts thereof. The compounds can be used for the treatment of Alzheimer's disease, cerebral amyloid angiopathy, hereditary cerebral hemorrhage with amyloidosis, Dutch-type (HCHWA-D), multi-infarct dementia, dementia pugilistica or Down syndrome. |
| US07923446B2 |
Biaryl sulfonamides and methods for using same
The present invention relates to biaryl sulfonamides and their use as, for example, metalloproteinase inhibitors. |
| US07923445B2 |
Methods for treatment of diseases related to activated lymphocytes
The present invention relates to inhibiting proliferation and inducing apoptosis in activated lymphocytes, including T cells and B cells. The invention also provides compositions and methods for inhibiting proliferation and inducing apoptosis in activated lymphocytes, as well methods for treating diseases associated with activated lymphocytes by administering 5-HT receptor antagonists. |
| US07923443B2 |
Pharmaceutical composition for the treatment of bone fracture
Disclosed herein is a composition for the treatment bone fracture comprising N-hydroxy-4-{5-[4-( 5-isopropyl-2-methyl-1,3-thiazol-4-yl)phenoxy]pentoxyl-benzamidine, 4-{5-[4-(5-isopropyl-2-methyl-1,3-thiazol-4-yl) phenoxy]pentoxy}-benzamidine or pharmaceutically acceptable salts thereof as a medicinally effective ingredient. The composition of the present invention can significantly reduce the volume of bony callus, and increase bony density and strength of bony callus, and decrease the contents of connective tissue and cartilage tissue in bony callus, and thus promote loss and ossification of the bony callus formed during the fracture healing process. Therefore, the composition of the present invention is useful for the treatment of bone fracture. |
| US07923442B2 |
Glutathione peroxidase mimetics and uses thereof
This invention relates to novel organoselenium and tellurium compounds, processes of producing the same and methods of use thereof. The compounds function as mimetics for the catalyst selenoenzyme glutathione peroxidase, which protects cells from oxidative stress. |
| US07923441B2 |
Enhancement of activity and/or duration of action of soft anti-inflammatory steroids for topical or other local application
Methods and compositions for enhancing the activity and/or duration of action of loteprednol etabonate and other soft anti-inflammatory steroids of the haloalkyl 17α-alkoxycarbonyloxy-11β-hydroxyandrost-4-en-3-one-17β-carboxylate type and the corresponding Δ1,4-compounds are described. The enhancing agents have the formula: wherein R is H or C1-C4 alkyl; Z1 is carbonyl or β-hydroxymethylene; X1 is —O— or —S—; R5 is —OH, —OR6, —OCOOR6 or —OCOR7 wherein R6 is C1-C4 alkyl and R7 is C1-C4 alkyl, fluoromethyl or chloromethyl; and the dotted line in ring A indicates that the 1,2-linkage is saturated or unsaturated; with the proviso that when R is C1-C4 alkyl, then R5 is —OH. |
| US07923440B2 |
Method of treating or preventing immune mediated disorders and pharmaceutical formulation for use therein
A method of treating or preventing an immune mediated disorder in a mammal, said method comprising the administration of a therapeutically effective amount of an estrogenic component to said mammal, wherein the estrogenic component is selected from the group consisting of: substances represented by the following formula: in which formula R1, R2, R3, R4 independently are a hydrogen atom, a hydroxyl group or an alkoxy group with 1-5 carbon atoms; each of R5, R6, R7 is a hydroxyl group; no more than 3 of R1, R2, R3, R4 are hydrogen atoms; precursors capable of liberating a substance according to the aforementioned formula when used in the present method; and mixtures of one or more of the aforementioned substances and/or precursors. Another aspect of the invention relates to a pharmaceutical formulation comprising the aforementioned estrogenic component, an immunotherapeutic agent and a pharmaceutically acceptable excipient. |
| US07923437B2 |
Water soluble β-glucan, glucosamine, and N-acetylglucosamine compositions and methods for making the same
Glucosamine, N-acetylglucosamine and β-glucan compositions suitable for human or animal consumption or use are disclosed. The glucosamine, N-acetylglucosamine and β-glucan compositions are derived from fungal biomass containing chitin. Various methods of producing glucosamine, N-Acetylglucosamine and β-glucan compositions are also disclosed. |
| US07923435B2 |
Hoodia plant extract with improved flavor
Extracts of Hoodia plant containing steroidal glycosides which have improved flavor, by virtue of reduced levels of discovered negative flavor compounds. Food compositions containing steroidal glycosides with reduced amounts of discovered negative flavor components are also included. |
| US07923432B2 |
Implant depots to deliver growth factors to treat avascular necrosis
The present invention relates to the design and composition of a depot implant for optimal delivery of growth factors to treat bone avascular necrosis, in that such depot implant is constructed to be in a cylinder (rod) or sphere shape and have a natural or synthetic polymer scaffold with or without impregnated calcium phosphate particles. The density of the depot is higher than a typical BMP sponge carrier to facilitate its implantation and slower release of the growth factor. The scaffold is such that it has adequate porosity and pore size to facilitate growth factor seeding and diffusion throughout the whole of the bone structure resulting in increased new blood vessel growth and density in the avascular necrotic bone. In addition, the shape of the depot implant allows for delivery through a cannula or large bore needle. |
| US07923428B2 |
Composition for cleaning or rinsing hard surfaces
Composition for cleaning or rinsing hard surfaces in an aqueous or aqueous/alcoholic medium comprising at least one polybetaine for contributing to said surfaces antideposition and/or antiadhesion properties with regard to soiling substances capable of being deposited on said surface. |
| US07923427B2 |
Binding agent for solidification matrix
Material, composition, and manufacturing method alternatives for a solidification matrix that may be used, for example, in solid cleaning compositions, or other technologies. In at least some embodiments, the solidification matrix includes a binding agent that is formed by the use of MGDA, or a salt or derivative thereof, and water to produce a solid binding agent. In some embodiments, the MGDA and water combines and can solidify to act as a binder material or binding agent dispersed throughout a solid composition that may contain other functional ingredients that provide the desired properties and/or functionality to the solid composition. |
| US07923426B2 |
Detergent composition
A detergent composition comprising: a non-sulphated anionic surfactant, alkyl sulphate surfactant(s) of formula R2—O—SO3−M+, with R2 being a linear or branched, substituted or unsubstituted, optionally alkoxylated, C6-C18 alkyl and with M+ being a proton or a cation which provides charge neutrality, and wherein the alkyl sulphate surfactant(s) of formula R2—O—SO3−M+, comprises from 85% to 100% by weight of alkyl sulphate surfactant(s) of formula R1—O—SO3−M+, with R1 being a linear or branched, substituted or unsubstituted, optionally alkoxylated, C6-C14 alkyl and with M+ being a proton or a cation which provides charge neutrality, wherein the composition comprises from 0 to 20% of zeolite, and wherein the composition does not comprise from 40% to 43% by weight of sodium chloride. |
| US07923424B2 |
Semiconductor cleaning using superacids
A method of cleaning a substrate includes contacting a surface of a semiconductor substrate with a composition comprising a superacid. The semiconductor substrate may be a wafer. |
| US07923423B2 |
Compositions for processing of semiconductor substrates
Compositions useful in semiconductor manufacturing for surface preparation and/or cleaning of wafer substrates such as semiconductor device precursor structures. The compositions can be employed for processing of wafers that have, or are intended to be further processed to include, copper metallization, e.g., in operations such as surface preparation, pre-plating cleaning, post-etching cleaning, and post-chemical mechanical polishing cleaning of semiconductor wafers. The compositions contain (i) alkanolamine, (ii) quaternary ammonium hydroxide and (iii) a complexing agent, and are storage-stable, as well as non-darkening and degradation-resistant in exposure to oxygen. |
| US07923422B2 |
Cationic cassia derivatives and applications therefor
This invention relates to cationically derivatized polycalactomannans obtained from cassia tora and cassia obtusifolia and to their use in personal care, household care, and institutional care compositions. |
| US07923421B2 |
Process for preparing fine powder polyurea and greases therefrom
Polyurea compounds are prepared by reacting amines and polyisoyanates in the presence of a liquid diluent in a high-pressure impingement mixing device under conditions sufficient to produce polyurea compounds having the consistency of a powder and in which diluent is dispersed. |
| US07923418B2 |
Emulsion breaker
This invention provides acrylate polymers having at least two different ester groups. The ester groups are selected from the following: a) an aralkyl group; b) a linear alkylether group; c) a polyethoxylated alkylaryl group; and d) a polyethoxylated alkyl group, with the proviso that at least one of said ester groups is selected from b) or d). Processes for preparing such polymers and processes for breaking emulsions with these acrylate polymers are also provided. |
| US07923417B2 |
Compositions and methods for breaking a viscosity increasing polymer at very low temperature used in downhole well applications
A composition for treating a portion of a wellbore or a portion of a subterranean formation is provided, the composition comprising: (a) water; (b) a source of hydrogen peroxide, and (c) an activator for the source of hydrogen peroxide; wherein the pH of the composition is adjusted to be within an appropriate range for the type of activator. A method for treating a portion of a wellbore or a portion of a subterranean formation, the method comprising the steps of: forming or providing a composition comprising: (a) water; (b) a source of hydrogen peroxide, and (c) an activator for the source of hydrogen peroxide; wherein the pH of the composition is adjusted within an appropriate range for the type of activator; and introducing the composition through a wellbore to treat a portion of a wellbore or a portion of a subterranean formation. The activator can be a water-soluble alkanoyl-donor compound or a chelated transition metal. Preferably, the composition further comprises an iron chelating agent. The composition and method are adapted for breaking a viscosity increasing polymer, such as xanthan. The method has particular applications where the static temperature of the portion of the wellbore or the portion of the subterranean formation to be treated is less than 100° F. (38° C.). |
| US07923416B2 |
Method of reducing the viscosity of hydrocarbon fluids
This invention relates to methods for reducing the viscosity of hydrocarbon liquids encountered in petroleum operations. The method includes forming a low viscosity emulsion by contacting hydrocarbon liquids with an effective amount of a water-soluble polymer having pendant methyl ether groups. |
| US07923414B2 |
Rheology modifier comprising a tetrakis(hydroxyalkyl) phosphonium salt for polymer fluids
Embodiments of this invention relate to a composition and a method for tailoring the rheology of a fluid for use in the oil field services industry including forming a fluid comprising a tetrakis(hydroxyalkyl) phosphonium salt and a polymer, and exposing the fluid to a temperature of about 20° C. to about 200° C., wherein a viscosity is observed that is at least about 5 percent different than if no salt were present. Embodiments of this invention also relate to a composition and a method for tailoring the rheology of a fluid for use in the oil field services industry including forming a fluid comprising a tetrakis(hydroxyalkyl) phosphonium salt and diutan and/or guar and/or guar derivatives and/or a combination thereof, and exposing the fluid to a temperature of about 20° C. to about 163° C., wherein a viscosity is observed that is at least about 5 percent lower than if no salt were present. Embodiments of this invention also relate to a composition and a method for tailoring the rheology of a fluid for use in the oil field services industry including forming a fluid comprising a tetrakis(hydroxyalkyl) phosphonium salt and xanthan, and exposing the fluid to a temperature of about 20° C. to about 200° C., wherein a viscosity is observed that is at least about 5 percent higher than if no salt were present. |
| US07923410B2 |
Regenerable sorbents for removal of sulfur from hydrocarbons and processes for their preparation and use
A sorbent for use in removing sulfur contaminants from hydrocarbon feedstocks is provided, wherein the sorbent contains zinc aluminate in an amount of at least 40 wt % (calculated as ZnAl2O4); free alumina in an amount of from about 5 wt % to about 25 wt % (calculated as Al2O3); and iron oxide in an amount of from about 10 wt % to about 30 wt % (calculated as Fe2O3); wherein each of the free alumina and iron oxide are present in non-crystalline form as determined by X-ray diffraction analysis, and a method for producing the sorbent and method for using the sorbent to reduce sulfur contaminants in hydrocarbon feedstocks. |
| US07923407B2 |
Catalyst for exhaust gas purification, production method therefor, and method for purification of exhaust gas using the catalyst
It is an object of the present invention to provide a catalyst for the exhaust gas purification having excellent ignition performance and NOx purification performance. The present invention provides a catalyst for the exhaust gas purification which comprises a catalytically active component (I) having palladium and barium supported on a refractory inorganic oxide (A); and a catalytically active component (II) having at least either of rhodium and platinum on a refractory inorganic oxide (B), a method for the production thereof, and a method for purifying an exhaust gas using such a catalyst. |
| US07923404B2 |
Methods for preparing catalysts for methacrolein oxidation
Methods of making catalysts for oxidation of unsaturated and/or saturated aldehyde to unsaturated acids is disclosed where the catalyst including at least molybdenum (Mo) and phosphorus (P), where the catalyst has a pore size distribution including at least 50% medium pores and if bismuth is present, a nitric acid to molybdenum mole ratio of at least 0.5:1 or at least 6.0:1 moles of HNO3 per mole of Mo12. |
| US07923401B2 |
Single-site catalyst activators, processes for making same, and use thereof in catalysts and polymerization of olefins
Single-site catalyst activator compositions are provided, said activator compositions comprising anion/cation ion pair wherein; (a) the anion comprises a metal atom bonded via hetero atoms to a chelating organic ligand, and (b) the cation comprises a Bronsted acid. |
| US07923399B2 |
Zeolite-containing hydrocarbon-converting catalyst, the preparation process thereof, and a process for converting hydrocarbon oils with the catalyst
A catalyst for converting hydrocarbons includes, based on the weight of the catalyst, 1-60% by weight of a zeolite, 0.1-10% by weight of an assistant catalytic component, 5-98% by weight of a thermotolerant inorganic oxide, and 0-70% by weight of a clay in terms of the oxide. The zeolite is a MFI-structured zeolite-containing phosphor and transition metal(s) or a mixture of the zeolite and a macroporous zeolite, which comprises, based on the weight of the mixture, 75-100% by weight of said MFI-structured zeolite containing phosphor and transition metal(s) and 0-25% by weight of the macroporous zeolite. In terms of the mass of the oxide, the MFI-structured zeolite containing phosphor and transition metal(s) has the following anhydrous chemical formula: (0-0.3)Na2O.(0.3-5.5)Al2O3.(1.0-10)P2O5.(0.7-15)M1xOy.(0.01-5)M2mOn(0-10)RE2O3.(70-97)SiO2 I or (0-0.3)Na2O.(0.3-5)Al2O3.(1.0-10)P2O5.(0.7-15)MpOq.(0-10)RE2O3.(70-98)SiO2 II The assistant catalytic component is one or more selected from the group consisting of the alkali earth metals, Group IVB metals, non-noble metals of Group VIII, and rare earth metals of the Periodic Table of the Elements. This catalyst has a higher ability to convert petroleum hydrocarbons and higher yields for propylene, ethylene, and light aromatics. |
| US07923397B2 |
Sorbent for the dry cleaning of waste gases charged with mercury and process for the production thereof
Sorbent for the dry cleaning of waste gases charged with mercury and process for the production thereof. The sorbent includes as an adsorptively acting constituent for example activated carbons or activated cokes which are mixed with sulfur in powder form at ambient temperature, under the action of atmospheric oxygen. The sorbent is distinguished by a given ratio in respect of the median values of the grain size of the adsorptively operative constituent to the sulfur. |
| US07923393B2 |
Low melting point frit paste composition and sealing method for electric element using the same
The present invention relates to a low melting point frit paste composition and a sealing method for an electric element using the same, and more particularly, to a low melting point frit paste composition which is sealable and appropriate for a flat panel, protects an element weak to heat and improves a process yield with good print properties, and a sealing method for an electric element using the same. |
| US07923391B2 |
Nonwoven web material containing crosslinked elastic component formed from a pentablock copolymer
A nonwoven web material that includes an elastic component or material (e.g., nonwoven web, nonwoven web laminated to an elastic material, etc.) is provided. The elastic component contains a crosslinked network formed from a pentablock copolymer containing at least two monoalkenyl aromatic midblocks positioned between conjugated diene endblocks, such as butadiene-styrene-butadiene-styrene-butadiene (“BSBSB”) or isoprene-styrene-isoprene-styrene-isoprene (“ISISI”). Prior to crosslinking, the pentablock copolymers have a relatively low viscosity and thus may be readily formed into a precursor elastic material (e.g., film, strands, web, etc.) that is subsequently crosslinked to achieve the desired elastic and mechanical properties. |
| US07923389B2 |
Intumescent body
The invention relates to an intumescent body, made from a non-intumescent polymer material providing the form of the body and a coating material applied to the polymer material. According to the invention, the polymer material together with the coating material provides an intumescent system in which the polymer material forms a carbon-donor material. |
| US07923388B2 |
Oleophobic polyolefin fiber materials
Polyolefin fiber fabrics can be endowed with oil-repellent properties by treating them first in a plasma atmosphere to raise their surface tension, then with a polyorganosiloxane containing polyoxyalkylene groups and finally with a polyacrylate or polyurethane containing perfluoroalkyl radicals.The fabrics thus obtained are useful for medical as well as other applications. |
| US07923385B2 |
Methods for producing low stress porous and CDO low-K dielectric materials using precursors with organic functional groups
Methods of preparing a carbon doped oxide (CDO) layers having a low dielectric constant are provided. The methods involve, for instance, providing a substrate to a deposition chamber and exposing it to one or multiple carbon-doped oxide precursors having molecules with at least one carbon-carbon triple bond, or carbon-carbon double bond, or a combination of these groups and depositing the carbon doped oxide dielectric layer under conditions in which the resulting dielectric layer has a dielectric constant of not greater than about 2.7. Methods of preparing a low stress porous low-k dielectric material on a substrate are provided. The methods involve the use of a structure former precursor and/or porogen precursor with one or more organic functional groups. In some cases, the structure former precursor has carbon-carbon double or triple bonds. In other cases, one or both of the structure former precursor and porogen precursor has one or more bulky organic groups. In other cases, the structure former precursor has carbon-carbon double or triple bonds and one or both of the structure former precursor and porogen precursor has one or more bulky organic groups. Once the precursor film is formed, the porogen is removed, leaving a porous low-k dielectric matrix with high mechanical strength. Different types of structure former precursors and porogen precursors are described. The resulting low stress low-k porous film may be used as a low-k dielectric film in integrated circuit manufacturing applications. |
| US07923383B2 |
Method and apparatus for treating a semi-conductor substrate
This invention relates to a method of treating a semiconductor wafer and in particular, but not exclusively, to planarisation. The method consists of depositing a liquid short-chain polymer formed from a silicon containing bas or vapour. Subsequently water and OH are removed and the layer is stabilised. |
| US07923379B2 |
Multi-step process for forming high-aspect-ratio holes for MEMS devices
A method of forming an integrated circuit structure includes forming an opening in a substrate, with the opening extending from a top surface of the substrate into the substrate. The opening is filled with a filling material until a top surface of the filling material is substantially level with the top surface of the substrate. A device is formed over the top surface of the substrate, wherein the device includes a storage opening adjoining the filling material. A backside of the substrate is grinded until the filling material is exposed. The filling material is removed from the channel until the storage opening of the device is exposed. |
| US07923378B2 |
Film formation method and apparatus for forming silicon-containing insulating film
A silicon-containing insulating film is formed on a target substrate by CVD, in a process field to be selectively supplied with a first process gas including di-iso-propylaminosilane gas and a second process gas including an oxidizing gas or nitriding gas. The film is formed by performing a plurality of times a cycle alternately including first and second steps. The first step performs supply of the first process gas, thereby forming an adsorption layer containing silicon on a surface of the target substrate. The second performs supply of the second process gas, thereby oxidizing or nitriding the adsorption layer on the surface of the target substrate. The second step includes an excitation period of supplying the second process gas to the process field while exciting the second process gas by an exciting mechanism. |
| US07923373B2 |
Pitch multiplication using self-assembling materials
Self-assembling materials, such as block copolymers, are used as mandrels for pitch multiplication. The copolymers are deposited over a substrate and directed to self-assemble into a desired pattern. One of the blocks forming the block copolymers is selectively removed. The remaining blocks are used as mandrels for pitch multiplication. Spacer material is blanket deposited over the blocks. The spacer material is subjected to a spacer etch to form spacers on sidewalls of the mandrels. The mandrels are selectively removed to leave free-standing spacers. The spacers may be used as pitch-multiplied mask features to define a pattern in an underlying substrate. |
| US07923372B2 |
Method for fabricating semiconductor device
A method for fabricating a semiconductor device includes forming a plurality of etch mask patterns over an etch target layer, each of the etch mask patterns including a first hard mask, a first pad layer, and a second pad layer, forming spacers on both sidewalls of the etch mask patterns, the spacers including a material substantially the same as that of the first pad layer, forming a second hard mask over the resulting substrate structure until gaps between the etch mask patterns are filled, the second hard mask including a material different from that of the first hard mask but substantially the same as that of the second pad layer, planarizing the second hard mask until the first pad layer is exposed, removing the first pad layer and the spacers, and etching the etch target layer using the remaining first and second hard masks as an etch barrier layer. |
| US07923369B2 |
Through-via and method of forming
In one embodiment, a method of forming a via includes forming an first opening in the semiconductor substrate, wherein the first opening has a bottom and sidewalls, forming a sacrificial fill in the first opening, forming a dielectric layer over the sacrificial fill, forming a second opening in the dielectric layer, wherein the second opening is over the sacrificial fill, removing the sacrificial fill from the first opening after forming the second opening, and forming a conductive material in the first opening and second opening. |
| US07923361B2 |
Method for manufacturing a semiconductor integrated circuit device
The resist film after high-concentration ion implantation has a hard modified layer on the surface thereof, and is difficult to remove in the temperature region as low as about 150 degrees centigrade. This is because the etching rate of the modified layer sharply decreases with a decrease in temperature. The temperature is increased up to about 250 degrees centigrade to perform an ashing treatment in vacuum in order to increase the etching rate of the modified layer. Then, there occurs a popping phenomenon that the inside resist solvent swells and breaks. The residues scattered thereby of the modified layer and the like seize the wafer surface, and also become difficult to remove even in the subsequent cleaning. According to the present application, in order to remove the resist hardened by ion implantation and the like, the to-be-treated wafer is baked under atmospheric pressure, and then, is subjected to a plasma ashing treatment within the temperature region as high as around 300 degrees centigrade under an oxygen gas atmosphere substantially including an oxygen gas. |
| US07923360B2 |
Method of forming dielectric films
A method of forming dielectric films including a metal silicate on a silicon substrate comprises a first step of oxidizing a surface layer portion of the silicon substrate and forming a silicon dioxide film; a second step of irradiating ion on the surface of the silicon dioxide film and making the surface layer portion of the silicon dioxide film into a reaction-accelerating layer with Si—O cohesion cut; a third step of laminating a metal film on the reaction-accelerating layer in a non-oxidizing atmosphere; and a fourth step of oxidizing the metal film and forming a metal silicate film that diffuses a metal from the metal film to the silicon dioxide film. |
| US07923359B1 |
Reduction of sheet resistance of phosphorus implanted poly-silicon
There is a process for reducing the sheet resistance of phosphorus-implanted poly-silicon. In an example embodiment, there is an MOS transistor structure. The structure has a gate region, drain region and a source region. A method for reducing the sheet resistance of the gate region comprises depositing intrinsic amorphous silicon at a predetermined temperature onto the gate region. An amorphizing species is implanted into the intrinsic amorphous silicon. Phosphorus species are then implanted into the gate region of the MOS transistor structure. A feature of this embodiment includes using Ar+ as the amorphizing species. |
| US07923356B2 |
Semiconductor film, semiconductor device and method for manufacturing same
Concerning an art related to a manufacturing method for a semiconductor device having an integrated circuit using thin film transistors on a substrate, a problem is to provide a condition for forming an amorphous silicon film having distortion. In the deposition of an amorphous silicon film using a sputter method, a condition is provided with a frequency of 15 to 25 kHz and a deposition power of 0.5 to 3 kW. This can sufficiently contain Ar at 10×1020/cm3 or more in an amorphous silicon film, thus making possible to form an amorphous silicon film having distortion. |
| US07923355B2 |
Manufacturing method for semiconductor device and manufacturing apparatus for semiconductor device
A manufacturing method for a semiconductor device includes retaining a wafer in a reaction chamber, supplying first process gas including source gas and second process gas containing H2 or inert gas onto the wafer in a rectified state alternately in a predetermined cycle, rotating the wafer, and heating the wafer to form a film on the wafer. |
| US07923347B2 |
Controlling warping in integrated circuit devices
Techniques for integrated circuit device fabrication are provided. In one aspect, an integrated circuit device comprises a base, at least one die attached to the base, and a counterbalancing layer on at least a portion of at least one side of the base adapted to compensate for at least a portion of a thermal expansion difference existing between the base and the die. In another aspect, warping of an integrated circuit device comprising at least one die attached to a base is controlled by applying a counterbalancing layer to at least a portion of at least one side of the base adapted to compensate for at least a portion of a thermal expansion difference existing between the base and the die. |
| US07923344B2 |
Method of fabricating backside illuminated image sensor
A method for fabricating a backside illuminated image sensor is provided. An exemplary method can include providing a substrate with a front surface and a back surface; forming a first alignment mark for global alignment on the front surface of the substrate; forming a second alignment mark for fine alignment in a clear-out region on the front surface of the substrate; aligning the substrate from the back surface using the first alignment mark; and removing a portion of the back surface of the substrate at the clear-out region for locating the second alignment mark. |
| US07923343B2 |
Capacitor of semiconductor device and method for forming the same
A method for forming a capacitor of a semiconductor device includes forming a cylindrical storage node over a semiconductor substrate; depositing a first dielectric layer over the cylindrical storage node; and etching the first dielectric layer to reduce a thickness of a portion of the first dielectric layer on a protruded end of the cylindrical storage node. The method further includes depositing a second dielectric layer over the etched first dielectric layer, wherein the second dielectric layer supplements a thickness of a portion of the first dielectric layer on a bottom corner of the cylindrical storage node. Finally, a cell plate is formed over the second dielectric layer. |
| US07923342B2 |
Nonvolatile memory element and production method thereof and storage memory arrangement
A nonvolatile memory element and associated production methods and memory element arrangements are presented. The nonvolatile memory element has a changeover material and a first and second electrically conductive electrode present at the changeover material. To reduce a forming voltage, a first electrode has a field amplifier structure for amplifying a field strength of an electric field generated by a second electrode in a changeover material. The field amplifier structure is a projection of the electrodes which projects into the changeover material. The memory element arrangement has multiple nonvolatile memory elements which are arranged in matrix form and can be addressed via bit lines arranged in column form and word lines arranged in row form. |
| US07923340B2 |
Method to reduce collector resistance of a bipolar transistor and integration into a standard CMOS flow
The invention, in one aspect, provides a method for fabricating a semiconductor device. In one aspect, the method provides for a dual implantation of a tub of a bipolar transistor. The tub in bipolar region is implanted by implanting the tub through separate implant masks that are also used to implant tubs associated with MOS fabricate different voltage devices in a non-bipolar region during the fabrication of MOS transistors. |
| US07923338B2 |
Increasing stress transfer efficiency in a transistor by reducing spacer width during the drain/source implantation sequence
By forming a single spacer element and reducing the size thereof by a well-controllable etch process, a complex lateral dopant profile may be obtained at reduced process complexity compared to conventional triple spacer approaches in forming drain and source regions of advanced MOS transistors. |
| US07923335B2 |
Non-volatile memory device and manufacturing method thereof
A non-volatile memory device having a Polysilicon Oxide Nitride Oxide Semiconductor (SONOS) structure in which a charge trap layer is separated physically in a horizontal direction, and a method of manufacturing the same. The charge trap layer that traps electric charges toward the source and the drain is physically divided. It can fundamentally prevent the charges at both sides from being moved mutually. It is therefore possible to prevent interference between charges at both sides although the cell size is reduced. |
| US07923327B2 |
Method of fabricating non-volatile memory device with concavely depressed electron injection region
Provided are a non-volatile memory device and a method of fabricating the same. The non-volatile memory device comprises: a control gate region formed by doping a semiconductor substrate with second impurities; an electron injection region formed by doping the semiconductor substrate with first impurities, where a top surface of the electron injection region includes a tip portion at an edge; a floating gate electrode covering at least a portion of the control gate region and the tip portion of the electron injection region; a first tunnel oxide layer interposed between the floating gate electrode and the control gate region; a second tunnel oxide layer interposed between the floating gate electrode and the electron injection region; a trench surrounding the electron injection region in the semiconductor substrate; and a device isolation layer pattern filled in the trench. |
| US07923324B2 |
Method for manufacturing capacitor of semiconductor device
A method for manufacturing a capacitor of a semiconductor device includes forming a lower metal layer over a substrate, forming a dielectric layer over the lower metal layer, forming an upper metal layer over the dielectric layer, forming an upper electrode and a dielectric layer pattern by performing a reactive ion etching process with respect to the upper metal layer using the dielectric layer as an etch stop layer, and exposing a top surface of the lower metal layer, and performing a chemical down-stream etch (CDE) process to remove a by-product of a sidewall of the upper electrode. |
| US07923320B2 |
Methods of fabricating vertical JFET limited silicon carbide metal-oxide semiconductor field effect transistors
Silicon carbide metal-oxide semiconductor field effect transistors (MOSFETs) may include an n-type silicon carbide drift layer, a first p-type silicon carbide region adjacent the drift layer and having a first n-type silicon carbide region therein, an oxide layer on the drift layer, and an n-type silicon carbide limiting region disposed between the drift layer and a portion of the first p-type region. The limiting region may have a carrier concentration that is greater than the carrier concentration of the drift layer. Methods of fabricating silicon carbide MOSFET devices are also provided. |
| US07923319B2 |
Method for manufacturing a semiconductor integrated circuit device circuit device
When a natural oxide film is left at the interface between a metal silicide layer and a silicon nitride film, in various heating steps (steps involving heating of a semiconductor substrate, such as various insulation film and conductive film deposition steps) after deposition of the silicon nitride film, the metal silicide layer partially abnormally grows due to oxygen of the natural oxide film occurring on the metal silicide layer surface. A substantially non-bias (including low bias) plasma treatment is performed in a gas atmosphere containing an inert gas as a main component on the top surface of a metal silicide film of nickel silicide or the like over source/drain of a field-effect transistor forming an integrated circuit. Then, a silicon nitride film serving as an etching stop film of a contact process is deposited. As a result, without causing undesirable cutting of the metal silicide film, the natural oxide film over the top surface of the metal silicide film can be removed. |
| US07923310B2 |
Core-shell-shell nanowire transistor and fabrication method
A fabrication method is provided for a core-shell-shell (CSS) nanowire transistor (NWT). The method provides a cylindrical CSS nanostructure with a semiconductor core, an insulator shell, and a conductive shell. The CSS nanostructure has a lower hemicylinder overlying a substrate surface. A first insulating film is conformally deposited overlying the CSS nanostructure and anisotropically plasma etched. Insulating reentrant stringers are formed adjacent the nanostructure lower hemicylinder. A conductive film is conformally deposited and selected regions are anisotropically plasma etched, forming conductive film gate straps overlying a gate electrode in a center section of the CSS nanostructure. An isotropically etching removes the insulating reentrant stringers adjacent the center section of the CSS nanostructure, and an isotropically etching of the conductive shell overlying the S/D regions is performed. A screen oxide layer is deposited over the CSS nanostructure. The source/drain (S/D) regions in end sections of the CS nanostructure flanking are doped. |
| US07923306B2 |
Semiconductor structure processing using multiple laser beam spots
Methods and systems selectively irradiate structures on or within a semiconductor substrate using a plurality of pulsed laser beams. The structures are arranged in a row extending in a generally lengthwise direction. The method generates a first pulsed laser beam that propagates along a first laser beam axis that intersects the semiconductor substrate and a second pulsed laser beam that propagates along a second laser beam axis that intersects the semiconductor substrate. The method directs respective first and second pulses from the first and second pulsed laser beams onto distinct first and second structures in the row. The method moves the first and second laser beam axes relative to the semiconductor substrate substantially in unison in a direction substantially parallel to the lengthwise direction of the row. |
| US07923304B2 |
Integrated circuit packaging system with conductive pillars and method of manufacture thereof
A method of manufacture of an integrated circuit packaging system includes: providing a substrate; forming a conductive pillar, having substantially parallel vertical sides, in direct contact with the substrate; mounting an integrated circuit to the substrate beside the conductive pillar; and encapsulating the integrated circuit with an encapsulation having a top surface formed for the conductive pillar to extend beyond. |
| US07923299B2 |
Manufacturing process for embedded semiconductor device
A manufacturing process for an embedded semiconductor device is provided. In the manufacturing process, at least one insulation layer and a substrate are stacked to each other, and a third metal layer is laminated on the insulation layer to embed a semiconductor device in the insulation layer. The substrate has a base, a first circuit layer, a second circuit layer, and at least a first conductive structure passing through the base and electrically connected to the first circuit layer and the second circuit layer. In addition, the third metal layer is patterned to form a third circuit layer having a plurality of third pads. |
| US07923297B2 |
Manufacturing method of semiconductor device
Size of a chipping is made small, suppressing blinding of a blade, when performing dicing of a wafer.When cutting a wafer, cutting is performed so that the portion of a V character-shaped shoulder may enter below the front surface of a wafer (depth Z2 from a substrate front surface) using the metal-bond blade which includes the abrasive particle whose fineness number is more than #3000, and whose point is V character form. By processing it in this way, cutting resistance goes up and blinding of a blade can be prevented. Hereby, the size of a chipping can be suppressed small, preventing blinding of a blade. |
| US07923296B2 |
Board on chip package and method of manufacturing the same
A ball grid array type board on chip package may include an integrated circuit chip having an active surface that supports a plurality of contact pads. An interposer may be adhered to the active surface of the integrated circuit chip. At least one hole may be provided through the interposer to expose the contact pads. A board, which may have a first surface supporting a plurality of metal lines, may have a second surface adhered to the interposer. The board may have an opening through which the contact pads may be exposed. A plurality of bonding wires may connect the contact pads to the metal lines through the opening. |
| US07923294B2 |
Semiconductor package and method for manufacturing the same for decreasing number of processes
A semiconductor package and a method for manufacturing the same. The semiconductor package includes a semiconductor chip having bonding pads; a first insulation layer pattern; redistribution line patterns; a second insulation layer pattern; and conductive balls. The first insulation layer pattern having first openings exposing the bonding pads. The redistribution line patterns are located on the first insulation layer pattern and are electrically connected with the bonding pads. The second insulation layer pattern covering the redistribution line patterns and having second openings having first open areas which expose portions of the redistribution line patterns and having second open areas which extend from the first open areas along the semiconductor chip. The conductive balls are electrically connected with the portions of the redistribution line patterns which are exposed through the first open areas of the second insulation layer pattern. |
| US07923291B2 |
Method of fabricating electronic device having stacked chips
A method of fabricating an electronic device having stacked chips is provided. The method includes forming a plurality of chips arranged in a row direction and at least one chip arranged in a column direction. A molding layer is formed between the chips. Grooves are formed in the molding layer between the chips arranged in the row direction. Conductive interconnections are formed on the substrate having the grooves. The substrate is sawn along an odd- or even-numbered one of the grooves to be separated into a plurality of unit substrates. At least one of the separated unit substrates is folded along an unsawn groove of the grooves. |
| US07923290B2 |
Integrated circuit packaging system having dual sided connection and method of manufacture thereof
A method of manufacture of an integrated circuit packaging system includes: mounting an integrated circuit, having a device through via and a device interconnect, over a substrate with the device through via traversing the integrated circuit and the device interconnect attached to the device through via; attaching a conductive support over the substrate with the conductive support adjacent to the integrated circuit; providing a pre-formed interposer, having an interposer through via and a pre-attached interconnect, with the pre-attached interconnect attached to the interposer through via; mounting the pre-formed interposer over the integrated circuit and the conductive support with the pre-attached interconnect over the device through via; and forming an encapsulation over the substrate covering the integrated circuit, the conductive support, and partially covering the pre-formed interposer. |
| US07923287B2 |
Thin film transistor substrate having transparent conductive metal and method of manufacturing the same
A thin film transistor substrate and a method of manufacturing the same are disclosed. The method of manufacturing a thin film transistor substrate includes forming a first conductive pattern group including a gate line, a gate electrode, and a lower gate pad electrode on a substrate, forming a gate insulating layer on the substrate on which the first conductive pattern group is formed, forming an oxide semiconductor pattern overlapping the gate electrode on the gate insulating layer, and forming first and second conductive layers on the substrate on which the oxide semiconductor pattern is formed and patterning the first and second conductive layers to form a second conductive pattern group including a data line, a source electrode, a drain electrode, and a data pad. |
| US07923286B2 |
Method of fabricating a phase-change memory
A phase-change memory comprises a bottom electrode formed on a substrate. A first isolation layer is formed on the bottom electrode. A top electrode is formed on the isolation layer. A first phase-change material is formed in the first isolation layer, wherein the top electrode and the bottom electrode are electrically connected via the first phase-change material. Since the phase-change material can have a diameter less than the resolution limit of the photolithography process, an operating current for a state conversion of the phase-change material pattern may be reduced so as to decrease a power dissipation of the phase-change memory device. |
| US07923281B2 |
Roll-to-roll processing method and tools for electroless deposition of thin layers
A deposition method and a system are provided to deposit a CdS buffer layer on a surface of a solar cell absorber layer of a flexible workpiece from a process solution including all chemical components of the CdS buffer layer material. CdS is deposited from the deposition solution while the flexible workpiece is heated and elastically shaped by a heated shaping plate to retain the process solution on the solar cell absorber layer. The flexible workpiece is elastically shaped by pulling a back surface of the flexible workpiece into a cavity area in the heated shaping plate using an attractive force. |
| US07923280B2 |
Millisecond annealing (DSA) edge protection
A method and apparatus for thermally processing a substrate is provided. A substrate is disposed within a processing chamber configured for thermal processing by directing electromagnetic energy toward a surface of the substrate. An energy blocker is provided to block at least a portion of the energy directed toward the substrate. The blocker prevents damage to the substrate from thermal stresses as the incident energy approaches an edge of the substrate. |
| US07923277B1 |
Production process for surface-mounting ceramic LED package, surface-mounting ceramic LED package produced by said production process, and mold for producing said package
The present invention is related to a surface-mounting ceramic LED package and a method for its production comprising: layering a ceramic green sheet which has a hole and a second ceramic green sheet, inserting a mold with a groove to form a partition in the bottom of the ceramic green sheet substrate, and firing the ceramic green sheet substrate. |
| US07923275B2 |
Surface emitting laser and manufacturing method thereof
A surface emitting laser includes a lower Bragg reflector, a resonator and an upper Bragg reflector. The resonator is provided on top of the lower Bragg reflector and includes an active layer, a lower semiconductor layer and an upper semiconductor layer. The upper Bragg reflector is provided on top of the resonator, and includes a plurality of semiconductor layers. In this surface emitting laser, the uppermost layer among the plurality of semiconductor layers in the lower Bragg reflector forms an air gap, which is larger than the aperture of the first insulating layer, while the lowermost layer among the plurality of semiconductor layers in the upper Bragg reflector forms an air gap, which is larger than the aperture of the second insulating layer. |
| US07923270B2 |
Light-emitting device and its manufacturing method
In a light-emitting device and its manufacturing method, mounting by batch process with surface-mount technology, high light extraction efficiency, and low manufacturing cost are realized. The light-emitting device comprises semiconductor layers of p-type and n-type nitride semiconductor, semiconductor-surface-electrodes to apply currents into each of the semiconductor layers, an insulating layer which holds the semiconductor layers, and mount-surface-electrodes. The semiconductor layers has a non-deposited area where the other semiconductor layer is not deposited. The insulating layer has VIA which electrically connect the mount-surface-electrodes and the semiconductor-surface-electrodes. In the manufacturing process, firstly, semiconductor layers and semiconductor-surface-electrodes are deposited on the transparent crystal substrate, and by using build-up process, insulating layer and the mount-surface-electrodes are formed, and secondly, VIA are formed, and finally, the transparent crystal substrate is separated to get light-emitting device. Light can be extracted directly and efficiently from the semiconductor layers. With the mount-surface-electrodes, light-emitting device can be mounted by using surface mount technology. |
| US07923269B2 |
Light emitting device and manufacturing method thereof
The concentration of oxygen, which causes problems such as decreases in brightness and dark spots through degradation of electrode materials, is lowered in an organic light emitting element having a layer made from an organic compound between a cathode and an anode, and in a light emitting device structured using the organic light emitting element. The average concentration of impurities contained in a layer made from an organic compound used in older to form an organic light emitting element having layers such as a hole injecting layer, a hole transporting layer, a light emitting layer, an electron transporting layer, and an electron injecting layer, is reduced to 5×1019/cm2 or less, preferably equal to or less than 1×1019/cm2, by removing the impurities with the present invention. Formation apparatuses are structured as stated in the specification in order to reduce the impurities in the organic compounds forming the organic light emitting elements. |
| US07923267B2 |
Method of measuring length of measurement object article in micro-structure
A substrate comprises a substrate main body having a surface on which a measurement object article is to be formed. A reference scale is disposed on the surface of the substrate main body in the vicinity of a region of the surface where the measurement object article is to be formed. The reference scale has adjacent graduations spaced-apart a preselected distance from one another. |
| US07923264B2 |
Ferroelectric passive memory cell, device and method of manufacture thereof
A first passive ferroelectric memory element comprising a first electrode system and a second electrode system, wherein said first electrode system is at least partly insulated from said second electrode system by an element system comprising at least one ferroelectric element, wherein said first electrode system is a conductive surface, or a conductive layer; wherein said second electrode system is an electrode pattern or a plurality of isolated conductive areas in contact with, for read-out or data-input purposes only, a plurality of conducting pins isolated from one another. |
| US07923260B2 |
Method of reading encoded particles
Microparticles 8 includes an optical substrate 10 having at least one diffraction grating 12 disposed therein. The grating 12 having a plurality of colocated pitches Λ which represent a unique identification digital code that is detected when illuminated by incident light 24. The incident light 24 may be directed transversely from the side of the substrate 10 with a narrow band (single wavelength) or multiple wavelength source, in which case the code is represented by a spatial distribution of light or a wavelength spectrum, respectively. The code may be digital binary or may be other numerical bases. The micro-particles 8 can provide a large number of unique codes, e.g., greater than 67 million codes, and can withstand harsh environments. The micro-particles 8 are functionalized by coating them with a material/substance of interest, which are then used to perform multiplexed experiments involving chemical processes, e.g., DNA testing and combinatorial chemistry. |
| US07923258B2 |
Instrument
A method and apparatus for performing a first measurement on a biological fluid or control, which first measurement varies with both the concentration of a first component and at least one of the presence and concentration of a second component. The method and apparatus perform a second measurement on the biological fluid or control, which second measurement varies primarily only with the at least one of the presence and concentration of the second component to develop an indication of the at least one of the presence and concentration of the second component. The first and second measurements may be made sequentially or simultaneously. The method and apparatus then remove an amount representative of the indicated presence or concentration of the second component from the concentration of the first component indicated by the first measurement. |
| US07923257B2 |
Detecting isomers using differential derivatization mass spectrometry
Methods of evaluating molecular isomers of branched-chain amino acids are featured. The methods can include: derivatizing one or more molecular isomers of branched-chain amino acids in a sample comprising a branched-chain amino acid labeled with one or more heavy atoms as a first standard; adding, to the sample, after derivatization, a nonderivatized or derivatized branched chain amino acid that is labeled with one or more heavy atoms, as a second standard; evaluating the sample using tandem mass spectrometry; and detecting peaks indicative of derivatized and nonderivatized forms of one or more branched-chain amino acids in the sample. |
| US07923248B2 |
Methods for producing microspore derived doubled haploid apiaceae
The present invention relates to culturing isolated microspores and the subsequent generation of doubled-haploid plant lines that are suitable for the rapid selection of plants with improved composition and agronomic performance. Processes developed for the recovery of microspore-derived embryos from fennel and caraway may be adapted to related species in the Apiaceae family including, but not limited to, fennel, carrot, dill, anise, lovage, parsnip, and laceflower. |
| US07923243B2 |
Stress-responsive induction of a therapeutic agent and methods of use
This invention relates to compositions and methods for selective expression of a heterologous nucleic acid sequence in a targeted tissue, and more particularly to the glucose regulated protein 78 (grp78) stress-responsive promoter and its use in gene therapy and the production of transgenic animals. |
| US07923234B2 |
Thermal and acid tolerant beta-xylosidases, genes encoding, related organisms, and methods
Isolated and/or purified polypeptides and nucleic acid sequences encoding polypeptides from Alicyclobacillus acidocaldarius and variations thereof are provided. Further provided are methods of at least partially degrading xylotriose and/or xylobiose using isolated and/or purified polypeptides and nucleic acid sequences encoding polypeptides from Alicyclobacillus acidocaldarius and variations thereof. |