Document Document Title
US07894436B1 Flow inspection
A communication system detects particular application protocols in response to their message traffic patterns, which might be responsive to packet size, average packet rate, burstiness of packet transmissions, or other message pattern features. Selected message pattern features include average packet rate, maximum packet burst, maximum future accumulation, minimum packet size, and maximum packet size. The system maintains a counter of packet tokens, each arriving at a constant rate, and maintains a queue of real packets. Each real packet is released from the queue when there is a corresponding packet token also available for release. Packet tokens overfilling the counter, and real packets overfilling the queue, are discarded. Users might add or alter application protocol descriptions to account for profiles thereof.
US07894434B2 Method, apparatus, and system for capturing traffic statistics between two sites of MPLS based VPN
A technique for effectively capturing site-to-site traffic statistic without significantly affecting the performance of a router in an MPLS-VPN service network is disclosed. In one example embodiment, this is accomplished by computing source PE IP and source PE interface from each flow record received at a destination PE router to identify an associated source VPN site.
US07894432B2 Apparatus and method creating virtual routing domains in an internet protocol network
A method and apparatus is described that allow the creation of virtual routing domains in an IP network. These virtual routing domains allow individual networks to be configures so that it appears that its routing domain covers the entire IP address space. A network processing system is used to implement the virtual routing domains and to allow network traffic to cross the individual routing domains. The network processing system is able to use application layer information to allow the crossing of virtual routing domain boundaries. By examining application layer information the network processing system is able to look up customer/user information and use that information to determine destination virtual routing domains and route otherwise unroutable addresses between domains.
US07894431B2 System and method for communicating asynchronously with web services using message set definitions
Described herein are a system, method, and computer readable medium for correlating asynchronous communication messages between a mobile communication device and a data source over a network. The mobile communication device executes an application to provide interaction with the data source based on the content of the communication messages. The system includes a message set and a message manager. The message set is configured to correlate an asynchronous request message of the communication messages with a corresponding asynchronous response message of the communication messages. The asynchronous request message has a first correlation identifier when transmitted and the asynchronous response message has a second correlation identifier when received; the first and second correlation identifiers form part of the message set and specify a mapping that correlates a data element of the asynchronous request message and a data element of the asynchronous response message, respectively, with a data instance. The first correlation identifier is different from the second correlation identifier. The message manager is configured to map the data element of the asynchronous response message to the element of the data instance by resolving the data instance using the second correlation identifier, and by updating the element of the data instance with the data element of the asynchronous response message according to the mapping specified in the message set.
US07894429B2 Wireless network system and communication method in a wireless network
Disclosed is a wireless network system and a method for sending and receiving various information and data related to broadcast or multicast services in a wireless network.
US07894427B2 Stateful network address translation protocol implemented over a data network
A technique is disclosed for synchronizing NAT information stored on different network devices that have been configured to implement a network address translation protocol. Each of the network devices includes a respective NAT data structure configured to store NAT information. The NAT information includes at least one NAT entry relating to a network node engaged in a communication session with at least one other network node. At least one NAT entry in a first NAT data structure is modified. The first NAT data structure is associated with a first NAT network device. A first NAT transaction message is generated which includes information relating to the modifications performed on the first NAT data structure. The first NAT transaction message is transmitted to at least one other NAT network device to thereby cause that device to modify its respective NAT data structure using information from the first NAT transaction message. In this way, synchronization of NAT information stored on each of the network devices may be achieved.
US07894424B2 Content using method, content using apparatus, content recording method, content recording apparatus, content providing system, content receiving method, content receiving apparatus, and content data format
A method of using contents includes the steps of setting public time information and private time information, the public time information being associated with each content and defined universally for use by a large number of unspecified users, the private time being associated with the content and defined for use by a small number of particular persons, and searching for a content according to the public time information and/or the private time information and using the content detected in the searching.
US07894423B2 Hierarchical data collection network supporting packetized voice communications among wireless terminals and telephones
A packet-based, hierarchical communication system, arranged in a spanning tree configuration, is described in which wired and wireless communication networks exhibiting substantially different characteristics are employed in an overall scheme to link portable or mobile computing devices. The network accommodates real time voice transmission both through dedicated, scheduled bandwidth and through a packet-based routing within the confines and constraints of a data network. Conversion and call processing circuitry is also disclosed which enables access devices and personal computers to adapt voice information between analog voice stream and digital voice packet formats as proves necessary. Routing pathways include wireless spanning tree networks, wide area networks, telephone switching networks, internet, etc., in a manner virtually transparent to the user. A voice session and associate call setup simulates that of conventional telephone switching network, providing well-understood functionality common to any mobile, remote or stationary terminal, phone, computer, etc.
US07894419B2 Activity display for multiple data channels over period of time
An activity display for multiple data channels over a period of time for a communication link provides a quasi-three-dimensional presentation having time periods and data channels as orthogonal axes and shading within each time period/data channel rectangle representing ones density for the channel during that time period. One or more frames of the communication link corresponding to one time period are captured, and then each frame is processed in sequence one data channel at a time to build up a line of the display for the time period. Over multiple time periods the display is built up line by line, with the oldest line being dropped as a new line is added when the maximum number of lines for the display is achieved. In this way an operator has a high level all-in-one glance at the operation of the communication link.
US07894411B2 Base station apparatus and termnal apparatus
A base station apparatus corresponding to a first base station apparatus of base station apparatuses and connected to terminal apparatuses, first base station apparatus transmitting and receiving first packets with respect to a second base station apparatus corresponding to another of base station apparatuses and transmitting and receiving second packets with respect to terminal apparatuses, first base station apparatus transmits a third packet to second base station apparatus, third packet corresponding to one of first packets to be transmitted from first base station apparatus and including a first data item, second base station apparatus recognizing by first data item that first base station apparatus is one of base station apparatuses, third packet being used through an authentication process or an association process for connecting in wireless first base station apparatus to second base station apparatus.
US07894409B2 Apparatus and method for estimating available throughput in a wireless local area network
A method and apparatus for estimating available throughput of a fixed node in a mobile node of a communication network. The communication network includes fixed nodes connected to a router connected to at least one foreign network and mobile nodes connected to the fixed nodes. A second mobile node is selected from among mobile nodes connected to a fixed node whose available throughput is estimated in a first mobile node. An idle slot interval of the second mobile node connected to the fixed node is set. A transmission probability is measured in one slot interval of the second mobile node through an average of set idle slot intervals. Transmission information of the second mobile node is acquired using the measured transmission probability. The available throughput of the fixed node is estimated using the acquired transmission information.
US07894408B2 System and method for distributing proxying error information in wireless networks
A system and method for distributing proxying error information in wireless networks is provided. The includes associating a proxy node with a non-routable node; sending a data packet from an initiator node to the proxy node for delivery to the non-routable node; determining by the proxy node that the non-routable device has disassociated from the proxy node; sending a proxy error message from the proxy node to the initiator node to inform the initiator node that the non-routable node is no longer proxied by the proxy node; and starting a route discovery process for the non-routable device by the initiator node.
US07894406B2 System for routing remote VoIP emergency calls
A method is provided for routing an emergency call from Customer Premises Equipment (CPE) to a Public Safety Answering Point (PSAP). The method includes: establishing a session over a packet-switched network (200) between a CPE (110) and a network node (302), such that the CPE (110) accesses a Public Switched Telephone Network (PSTN) (400) from the network node (302) via a telecommunications switch (500) associated with a first PSAP (320) serving a geographic region (300) different than where the CPE (110) is currently located; identifying a telephone number for a second PSAP (120) serving the geographic region (100) in which the CPE (110) is located; and, substituting the identified telephone number for a dialed telephone number when the dialed telephone number is indicative of an emergency call.
US07894403B2 Method and apparatus for call setup latency reduction
Techniques for minimizing call setup latency are disclosed. In one aspect, a channel assignment message is sent with a flag to direct the use of previously negotiated service parameters. This aspect eliminates the need for service negotiation messages. In another aspect, a channel assignment message is sent with an active set identifier instead of an active set and its parameters. This aspect reduces the transmission time of the channel assignment message. In yet another aspect, call setup without paging is facilitated by a mobile station (106) sending a pilot strength measurement message between active communication sessions, such that a channel assignment message can be used for mobile station terminated call setup without the need for mobile station paging and related messages.
US07894402B2 High rate packet data spatial division multiple access (SDMA)
Spatial Division Multiple Access (SDMA) may be implemented in both the forward and reverse link directions through the use of, for example, a sector-wide primary pilot channel and one or more beamformed secondary pilot channels (secondary pilot channel).
US07894400B2 Handover between an IEEE 802.16 WiBro network and a UMTS network using media independent handover function
A wireless transmit/receive unit (WTRU) may include an IEEE 802.16 modem, a universal mobile telecommunication system (UMTS) modem and a media independent handover (MIH) entity. Software application programming interfaces provide the MIH entity with mechanisms to receive information about IEEE 802.16 and UMTS links, control IEEE 802.16 and UMTS modems for handover, discover an MIH server and IP multimedia system nodes, trigger mobile IP handover, etc. If an IEEE 802.16 link has been successfully established, the MIH entity starts an MIH session. When the IEEE 802.16 modem indicates that a connection is going to be terminated, the MIH entity activates the UMTS modem for handover. If the IEEE 802.16 modem indicates that a link parameter has crossed a threshold, the MIH entity sends IEEE 802.16 and WCDMA signal measurements to an MIH server. After receiving an MIH switch request, the MIH entity initiates handover to the UMTS network.
US07894398B2 Method for transmitting control channel in a mobile communication system
In a mobile communication system using both a discontinuous transmission scheme and a compressed mode transmission scheme, if a preamble and/or a postamble of a channel including control information for transmitting a specific channel overlaps a compressed mode (CM) gap, an overall transmission unit is not transmitted or remaining signals of the transmission unit excluding the preamble and/or the postamble overlapping the CM gap are transmitted.
US07894397B2 Interrupting use of frequency layer convergence scheme
The present invention is directed to interrupting use of a frequency layer convergence scheme that favors selection of a cell on a preferred frequency of a joined point-to-multipoint service. Specifically, a mobile terminal that has joined a point-to-multipoint service having a preferred frequency uses a frequency layer convergence scheme for selecting a cell. The frequency layer convergence scheme favors the selection of a cell on the preferred frequency layer. However, use of the frequency layer convergence scheme is interrupted upon an occurrence of a trigger.
US07894392B2 Method, system, access terminal and access network for transmitting forward traffic channel at fixed rate
The present invention provides a method, a system, an access terminal and an access network for transmitting a forward traffic channel at a fixed rate. In the present invention, an access terminal transmits identification information of one or more specific forward carrier links to an access network when the access terminal determines that it needs to receive one or more forward traffic channels at a fixed rate from the one or more specific forward carrier links as designated. The access network transmits one or more forward traffic channels at the fixed rate according to the received identification information. The inventive access terminal may choose to receive a forward traffic channel(s) at a fixed rate from a forward carrier link(s) of a sector(s) as designated, thereby enhancing flexibility in transmitting a forward traffic channel and improving the multiple carrier EV-DO technology.
US07894391B2 Method and apparatus for transmitting/receiving resource allocation information through bitmap in a mobile communication system using shared control channel
A method for transmitting/receiving resource allocation information in a mobile communication system using a shared control channel. The transmission method includes performing scheduling for resource allocation to a plurality of terminals; generating, in a bitmap, information indicating allocation/non-allocation of resources which are not sequentially allocated beginning from a particular terminal using the scheduling result; and transmitting, over the shared control channel, resource allocation information including a terminal identifier and a resource allocation bitmap of each terminal. The reception method includes receiving from a wireless network a shared control channel including resource allocation information; determining whether a terminal identifier included in the resource allocation information is equal to a terminal identifier of the terminal; and updating a size of an available resource set according to a resource allocation bitmap for reception of next resource allocation information, if the included terminal identifier is not equal to the terminal identifier of the terminal.
US07894385B1 Mobility extensions for wireless multiple radio mesh
The functionality of multiple radio backhaul is extended to mobility applications. The multiple radio backhaul uses at least one radio for the uplink and at least one radio for the downlink, both operating in different, non-interfering channels. A mobile mesh node scans and/or samples multiple radio channels to determine the best parent mesh node to connect to. Techniques devised to scan/sample the external Radio Frequency (RF) environment without sacrificing the overall up time performance of the network are described.
US07894384B2 Packet data load generator system for 1×-EVDO wireless network
A packet data load generator (PDLG) system, and method for testing the PDLG system, includes a Linux-based computer terminal having multiple 1x-EVDO wireless interface cards, e.g., Sierra Wireless AirCards®, directly interfaced therewith. PCI-to-PCMCIA adapter cards are used for connecting the wireless cards to the terminal. The terminal also includes a Linux control program for controlling the multiple wireless cards on a single terminal. In operation, the wireless interface cards are controlled to establish multiple simultaneous 1x-EVDO calls between the terminal and a 1x-EVDO wireless network, e.g., each wireless interface card supports one call with the network. Packet data is transferred between the terminal and the network, in effect simulating a multiple 1x-EVDO call load on the network. PDLG software in place on the network is monitored and/or tested. Multiple similarly configured terminals may be provided for a large number of 1x-EVDO calls, e.g., 40-50, in a laboratory setting.
US07894383B2 Multi-interface communication device, terminal, and path switching method
A router, if judging that a routing function is impossible to execute, sends out a connection instruction message including the address of a terminal on a local network terminating the relaying flow, to another router to solicit switching. The router having received the connection instruction message starts a process for connecting with an external network while executing a process for link connection with a terminal, and then sends out a connection completion notice message when the connection with both the external network and the terminal is established. This process enables the router to switch a path rapidly.
US07894382B2 Wireless communications mode switching apparatus and methods
Methods and apparatus are described herein to provide for wireless communications mode switching in a MIMO communications system. Other embodiments may include a method for communicating through a MIMO channel that includes choosing a communications level for each of at least two communications mode, and calculating the spectral efficiency for the chosen communications level. The method may further include comparing the spectral efficiencies and choosing a communications mode and communications level based on the comparison. Further embodiments may include a communications apparatus that includes a transceiver, a capacity calculator and a selecting module. Other embodiments are described and claimed.
US07894381B2 System and method of reliably broadcasting data packet under ad-hoc network environment
A system for reliably broadcasting a data packet under an ad-hoc network environment including a determining unit for determining whether or not at least one node receiving the broadcast data packet is a relay node, a comparing unit for comparing a first relay node sequence number contained in a management packet which the node transmits with a second relay node sequence number stored in a neighbor table of the node, and a control unit for determining whether or not the data packet is retransmitted to the node according to a result of the comparison of the comparing unit. By comparing the second relay node sequence number stored in the neighbor table of the node which has broadcast the data packet with the first relay node sequence numbers transmitted through a Hello packet, it is possible to check whether or not the data packet is lost during broadcasting, and thus it is possible to reduce a loss factor of the data packet which is generated during broadcasting. Thereby, the data packet can be reliably broadcast.
US07894375B2 Method, and associated apparatus, for transitioning communications of hybrid access terminal between communication systems
A method and apparatus of optimizing transitioning between EVDO and CDMA 1X systems in a hybrid access terminal, the method having the steps of: detecting an EVDO received signal at the hybrid access terminal; and delaying a connection timer at the hybrid access terminal for connecting to the EVDO system. The apparatus being a hybrid access terminal adapted for optimizing transitioning between EVDO and CDMA 1X systems, the hybrid access terminal having a radio subsystem adapted to communicate with a network; a radio processor having a digital signal processor and adapted to interact with the radio subsystem; memory; a user interface; a processor adapted to run user applications and interact with the memory, the radio and the user interface and adapted to run applications, the hybrid access terminal characterized by having means for: detecting an EVDO received signal at the hybrid access terminal; and delaying a connection timer at the hybrid access terminal for connecting to the EVDO system.
US07894373B2 Networked computer telephony system driven by web-based applications
A networked telephony system and method allow users to deploy on the Internet computer telephony applications associated with designated telephone numbers. The telephony application is easily created by a user in XML (Extended Markup Language) with predefined telephony XML tags and easily deployed on a website. The telephony XML tags include those for call control and media manipulation. A call to anyone of these designated telephone numbers may originate from anyone of the networked telephone system such as the PSTN (Public Switched Telephone System), a wireless network, or the Internet. The call is received by an application gateway center (AGC) installed on the Internet. Analogous to a web browser, the AGC provides facility for retrieving the associated XML application from its website and processing the call accordingly. The architecture and design of the system allow for reliability, high quality-of-service, easy scalability and the ability to incorporate additional telephony hardware and software and protocols.
US07894365B2 Method for tracking transmission status of data to entities such as peers in a network
A method for tracking a transmission status of one or more data elements to one or more devices. In one example, the method includes providing a list including one or more devices and one or more data elements; processing the list to determine a data element of the one or more data elements to transmit to a device of one of the one or more devices; and upon successfully transmitting the data element to the device, adjusting the list so that the list indicates that the device has received the transmitted data element. In this manner, the status of whether a particular data element has been sent to a particular device can be easily derived from the list.
US07894360B2 Trouble-factor detecting device, trouble-factor detecting method, and computer product
A trouble-factor detecting device retrieves data packets on a transaction, determines whether the retrieved data is abnormal, and counts an access count and an abnormality count of the data in associated with each of resources that is accessed in the transaction. Moreover, the trouble-factor detecting device calculates an abnormality ratio of each of the resources based on the access count and the abnormality count, and selects a trouble factor that could cause a trouble in the system to be managed based on the abnormality ratio.
US07894357B2 Capability-based testing and evaluation of network performance
A method for real-time monitoring of the performance of a network. From a set of predefined network capabilities, one or more of the network capabilities is attributed to an application of the network. Activity of the application running in the network is sampled to individually monitor each capability attributed to the application. This method allows the collection and evaluation of usage information for each application by network capability. A user can also manipulate a NCO environment by adding phantom nodes and/or resources to observe effects on capability loads.
US07894353B2 Method, apparatus, and system for diagnosing route in network based on diameter protocol
A method, system, and apparatus for diagnosing a route in a network based on a Diameter protocol are provided. The method includes the following steps. A source Diameter node generates a diagnosis message and sends it. An intermediate Diameter node adds diagnosis information thereof to the diagnosis message after receiving it and forwards it until the diagnosis message is forwarded to a Diameter server capable of processing the diagnosis message or a Diameter node incapable of forwarding the diagnosis message. The Diameter server or the Diameter node generates a response message and sends it carrying diagnosis information thereof, information in the diagnosis message, and a response type. The intermediate Diameter node adds the diagnosis information thereof to the response message after receiving it, and forwards it until the response message is forwarded to the source Diameter node. The source Diameter node parses the response message to obtain route related information.
US07894352B2 Detecting data plane liveliness of a label-switched path
Detecting if a label-switched path (LSP) is functioning properly. To test that packets that belong to a particular Forwarding Equivalence Class (FEC) actually end their MPLS LSP on an label switching router (LSR) that is an egress for that FEC, a request message carrying information about the FEC whose LSP is being verified may be used. The request message may be forwarded like any other packet belonging to that FEC. A basic connectivity test as well as a fault isolation test are supported. In a basic connectivity test mode, the packet should reach the end of the LSP, at which point it is sent to the control plane of the egress LSR. The LSR then verifies that it is indeed an egress for the FEC. In a fault isolation test mode, the packet is sent to the control plane of each transit LSR, which performs various checks that it is indeed a transit LSR for the LSP. The transit LSR may also return further information that helps check the control plane against the data plane, i.e., that forwarding matches what the routing protocols determined as the path. A reliable return path is used for the reply.
US07894350B2 Global network monitoring
Systems, methods and apparatus monitor networks to identify when the networks are not operating normally, for instance, because of malware. During a sample interval sample data is collected that corresponds to a plurality of system activities, the sample data collected from a plurality of monitored networks and representing normal operations of the plurality of monitored networks. Subsequent to the sample interval, observed data is collected from the plurality of monitored networks, the observed data corresponding to at least some of the system activities. A determination is made whether the observed data represents the normal operation of the monitored networks, and an alert is generated if the observed data does not represent the normal operation of the monitored networks.
US07894348B2 Method and system for congestion control in a fibre channel switch
A method and system for routing fiber channel frames using a fiber channel switch element is provided. The switch element includes logic for comparing a credit counter value with a first threshold value to enable a credit limiting feature; and a first counter that receives a signal after a frame has departed from a transmit segment and maintains a maximum value for a certain duration that is based on the first threshold value. The method includes enabling a credit limiting feature, wherein frame transmission from a certain source is delayed when the credit limiting feature is enabled. The first counter is incremented every time a frame departs and holds its maximum value based on the threshold value. When the first counter is at the maximum value, a credit-limiting signal is used to enable the credit limiting feature by setting a control bit in a control register.
US07894345B2 Network resource management system and method, and radio control apparatus
RNC includes an RNSAP protocol unit that receives a protocol message containing TFS (maximum number of blocks, TB size, TTI), a data definition unit that defines a first factor which is an average value of transport blocks and a second factor which is an average value of data size of a particular portion of an IP transport, and a resource management/CAC unit that calculates the amount of data on a user plane and the amount of data in the particular portion of the IP transport by using TFS that is included in the received protocol message and the first and second factors. The resource management/CAC unit employs the sum of the calculated amount of data on the user plane and amount of data in the particular portion as a band accumulated value for connection admission control.
US07894337B2 Method and system for unified overload and overflow control to support VoIP and multiple QOS flow traffic in communication network
In a method and system for controlling base station processing unit overload and buffer overflow in a unified manner, one or more processing units of the base station are monitored to determine if the processing unit(s) has entered an overload condition. If so, on a per flow basis, the system generates an advertise window for controlling the amount of data in the data flow, as transmitted to the processing unit from an upstream entity. The advertise window is generated taking into consideration both processor overload and buffer overflow factors. By incorporating these factors, the advertise windows collectively serve to limit both processor overload and buffer overflow, on a system wide basis.
US07894336B2 Breakdown and decoupling tolerant communications network, a data path switching device and a corresponding method
The invention relates to a method for tolerating the breakdown and/or decoupling of at least one network node in a communication network used for controlling and/or adjusting the movement of a plurality of machine parts, for example the rotation bodies in a printing machines, machine tools and other production machines, wherein the network is operated according to a closed single or multiple ring structure, in which each node communicates with the transmitter or the port of a first adjacent node by means of a receiver or a first port and with the receiver or the port of a second adjacent network node by means of a transmitter or a second port, the closed ring structure is preserved in the case of the breakdown or decoupling of at least one node, at least one network node is coupled to the network by means of a data path switching device which is actuated, in the case of the breakdown or decoupling of said node, in such a way that the communicating nodes, which exist in the network and are arranged next to each other in the ring structure, interact in communication by means of the port or respective transmitter thereof after the breakdown or decoupling.
US07894334B2 Hierarchical redundancy for a distributed control plane
A method and apparatus for hierarchical redundancy for a distributed control plane. In one embodiment of the invention, control plane processes are distributed among a plurality of processing entities including an active primary control processing entity and multiple secondary processing entities. Each of the secondary processing entities performs a dual role; an active role and a standby role. An application redundancy manager (ARM) instantiated on the active primary control processing entity manages the redundancy services for the secondary processing entities. For each secondary processing entity, the ARM selects one of the secondary processing entities to act as a backup for another one of the secondary processing entities. Upon a failure of one of the secondary processing entities, the ARM causes the secondary processing entity backing up the failed secondary processing entity to transition its standby role to an active role regarding the services provided by the failed secondary processing entity.
US07894327B2 Buffer-based generation of OVSF code sequences
A method of generating a code sequence comprises populating at least one buffer with initial values based on a received spreading factor and desired code index; receiving a timing strobe; changing the values in the at least one buffer upon receipt of the timing strobe based on an algorithm that is independent of any count value associated with the timing strobe; and outputting at least one code sequence value based on the values in the at least one buffer. An apparatus for generating a code sequence comprises means for populating at least one buffer with initial values based on a received spreading factor and desired code index; means for receiving a timing strobe; means for changing the values in the at least one buffer upon receipt of the timing strobe based on an algorithm that is independent of any count value associated with the timing strobe; and means for outputting at least one code sequence value based on the values in the at least one buffer.
US07894322B2 Optical pickup and information equipment
An optical pickup (100) includes: an irradiating device (101) for irradiating a laser beam (LB); a first light focusing device (104) for focusing the laser beam on the recording medium (10); a collimator device (102) which is disposed on the optical path between the irradiating device and the first light focusing device and which can be displaced along the optical path of the laser beam; a splitting device (103) which reflects one portion of the laser beam and transmits therethrough another portion of the laser beam; a light receiving device (111) for receiving the reflected one portion of the laser beam; and a second light focusing device (112) for focusing, on the light receiving device, the reflected one portion of the laser beam, the light receiving device and the first light focusing device is disposed at a position at which rate of change in light density of the laser beam on the first light focusing device before and after displacement of the collimator device is substantially the same as that on the light receiving device before and after the displacement of the collimator device.
US07894321B2 Laminated wave plate and optical pickup using the same
A laminated plate having a wider bandwidth at a desired retardation is provided. A laminated wave plate 1 includes a first wave plate 2 and a second wave plate 3 that are laminated to each other so that respective optical axes of the first wave plate and the second wave plate intersect each other at an angle of 51.5 degrees when the first wave plate has a retardation Γ1 of 360 degrees and an in-plane azimuth of −8 degrees, while the second wave plate has a retardation Γ2 and an in-plane azimuth of 43.5 degrees. Thus, the laminated wave plate 1 functions as a desired retardation Γ2 in a wavelength from 600 nm to 800 nm as a whole.
US07894319B2 Optical recording medium, method of producing the same, and, optical recording method and optical reproducing method
The present invention is intended to provide optical recording media of hologram type capable of high-density recording and capable of preventing noise even when the informing light and the reference light leak from filter layers formed of wavelength-selective reflection films. Accordingly, the present invention relates to optical recording media has a first substrate, a recording layer, a filter layer, an optical absorption layer and a second substrate in this order, wherein the recording layer records information by use of holography; methods of producing the same, as well as optical recording methods for the recording media and optical reproducing methods. Preferably, the optical absorption layer absorbs a light having a wavelength within 350 nm to 600 nm and transmits a light having a wavelength within 600 nm to 900 nm.
US07894315B2 Optical disk, recording method, recording medium, and optical disk unit, for recording information on multilayer optical disk
A method of recording information using a laser on a multilayer optical disk having a plurality of recording layers is provided. The plurality of recording layers include a first recording layer and a second recording layer adjacent the first recording layer. The first recording layer is provided with a first test writing area to be used for calibration of write power, and the second recording layer is provided with a second test writing area to be used for calibration of write power. The disk is arranged so that a first region of the first test writing area is superposed with a second region of the second test writing area when considered in the direction in which the laser is arranged to irradiate. The method comprises, if the second region of the second test writing area is unrecorded, recording data in the second region of the second test writing area, thereby converting the second region of the second test writing area into a recorded state; and once the second region of the second test writing area has been converted into a recorded state, performing test writing in the first region of the first test writing area.
US07894311B2 Focus servo apparatus
A focus servo apparatus for an optical disc apparatus including an objective lens to converge laser beam on an information recording surface of an optical disc, and an actuator to move the objective lens in a focusing direction crossing the information recording surface, the focus servo apparatus comprising: a retaining unit configured to retain control data for driving the actuator; and a setting unit configured to set the control data retained by the retaining unit as initial data for driving the actuator, in the case of driving the actuator, to detect a position of the objective lens where the laser beam is focused on the information recording surface, as a target position when performing focus servo.
US07894310B2 Content reproduction system, content reproduction apparatus, and content reproduction method
The present invention provides a content reproduction system that can continue reproduction of a plurality of content even if a part of content is unreproducible. The content reproduction system includes a content storage apparatus including a content storage section that stores a plurality of content whose reproduction order has previously been specified based on reproduction order information, and a content reproduction apparatus including a communication section that communicates with the content storage apparatus, a request section that requests the content storage apparatus to transmit content stored in the content storage section in the order according to the reproduction order information, and a reproduction section that reproduces the content, wherein when content that the request section has requested from the content storage apparatus is unreproducible, the request section requests the content storage apparatus to transmit content which is listed as content to be reproduced subsequent to the unreproducible content in the reproduction order information.
US07894307B2 Acoustic projector having minimized mechanical stresses
An acoustic projector which includes an outer shell formed of a reinforced epoxy resin having a longitudinal slot has an inner reinforcing liner formed of metal to reduce mechanical stress. The liner extends throughout the length of the outer shell and has a longitudinal slot aligned with the slot formed in the shell. An arcuate shaped driver is mounted along a portion of the I.D. of the metal liner and separated therefrom by insulation. In an alternate embodiment, the outer shell is formed of a plurality of overlapping layers of epoxy/graphite strips extending at various angles to increase the Z-axis stiffness.
US07894305B2 Methods for detecting humans
A method of detecting a human, that includes (a) measuring the ultrasonic signal emitted from human footsteps; (b) measuring the human body motion Doppler signature; reviewing the measurements of steps (a) and (b); and (d) determining the presence of a human.
US07894297B2 Methods and apparatus for borehole sensing including downhole tension sensing
The present disclosure provides, among other things, apparatuses and methods for sensing subsurface data. One embodiment comprises borehole conveyance system tool, the borehole conveyance system tool comprising a conveyance, a sensor array disposed on the conveyance, and an acquisition electronics section disposed on the conveyance distal of the sensor array. One embodiment includes at least one downhole tension sensor to help indicate when a tool is stuck and what part of the tool is stuck.
US07894293B2 Memory bank arrangement for stacked memory
In a three-dimensional stacked memory having through electrodes, no optimal layer arrangement, bank arrangement, control methods have been established, and thus optimal methods are desired to be established. A stacked memory includes memory core layers, an interposer, and an IF chip. By stacking memory core layers having the same arrangement, it is possible to cope with both of no-parity operation and parity operation. Further, bank designation irrespective of the number of stacks of the memory core layers can be achieved by assignment of a row address and a bank address. Further, the IF chip has refresh counters for performing a refresh control of the stacked memory. This arrangement provides a stacked memory including stacked memory core layers having through electrodes.
US07894288B2 Parallel data storage system
A parallel data storage system for storing data received from, or retrieving data to, a host system using multiple data storage devices. The system includes an interface for communicating with the host system and a buffer configured to store data sectors received from the host system via the interface. A switch is used to selectively connect the interface and the data storage devices to the buffer to facilitate the transfer of data into and out of the buffer. The data sectors are transferred by segmenting each sector into multiple smaller data cells and distributing these data cells among the data storage devices using an arbitrated distribution method.
US07894287B2 Semiconductor memory device controlling a voltage supplied to a dummy bit line
The present invention relates to a semiconductor memory device, and more precisely to a semiconductor memory device which controls the voltage supplied to a dummy bit line and a biasing method. The semiconductor memory device includes a dummy bit line disposed in a cell array and a switching unit which switches the supply of a bias voltage to the dummy bit line by a control signal related to an operation of the cell array.
US07894275B2 Methods of communicating data using inversion and related systems
A method may be provided to communicate a plurality of groups of output data bits representing a respective plurality of groups of input data bits over a data bus with each group of output data bits and each group of input data bits have an equal data width. Each of the plurality of groups of input data bits at may be received at a data register. For each group of input data bits received at the data register, if a number of data bits of the group of input data bits having a first logic level is greater than half of the data width, the group of input data bits are inverted, the inverted group of input data bits are transmitted as a respective group of output data bits in parallel over the data bus, and an inversion flag associated with the respective group of output data bits is transmitted. For each group of input data bits received at the data register, if a number of data bits of the group of input data bits having a second logic level different than the first logic level is greater than half of the data width, the group of input data bits is transmitted without inversion as a respective group of output data bits in parallel over the data bus, and a non-inversion flag associated with the respective group of output data bits is transmitted. Related systems are also discussed.
US07894270B2 Data restoration method for a non-volatile memory
A method and apparatus for selectively restoring data in a non-volatile memory array based on failure type. Weakened data and erroneous data are identified by performing two readings of a specific memory section. Alternatively, an error correction code is used after a first reading of data to identify erroneous data. The manner in which data is restored will depend on whether the data changed because of an erase failure or a program failure. If only a program failure occurred then the data will be reprogrammed without an intervening erase step. If the data experienced an erase failure, then the data will be erased prior to being programmed with correct data.
US07894267B2 Deterministic programming algorithm that provides tighter cell distributions with a reduced number of programming pulses
Systems and methods for improving the programming of memory devices. A pulse component applies different programming pulses to a memory cell. An analysis component measures values of one or more characteristics of the memory cell as a function of the applied different programming pulses. A computation component computes the applied different programming pulses as a function of the measured values of the one or more characteristics of the memory cell. The analysis component measures one or more values of the one or more characteristics of the memory cell, the computation component computes one or more programming pulses as a function of the one or more measured values of the one or more characteristics of the memory cell, and the pulse component applies the one or more programming pulses to the memory cell.
US07894266B2 Method of programming a flash memory device
A non-volatile memory device includes an array of flash memory cells therein and a voltage generator. The voltage generator is configured to generate a program voltage (Vpgm), a pass voltage (Vpass), a blocking voltage (Vblock) and a decoupling voltage (Vdcp) during a flash memory programming operation. The blocking voltage is generated at a level that inhibits inadvertent programming of an unselected memory cell(s). This voltage level of the blocking voltage is set so that Vdcp
US07894265B2 Non-volatile memory device and operation method of the same
The non-volatile memory device may include one or more main strings each of which may include first and second substrings which may separately include a plurality of memory cell transistors; and a charge supply line which may be configured to provide charges to or block charges from the first and second substrings of each of the main strings, wherein each of the main strings may include a first ground selection transistor which may be connected to the first substring; a first substring selection transistor which may be connected to the first ground selection transistor; a second ground selection transistor which may be connected to the second substring; and a second substring selection transistor which may be connected to the second ground selection transistor. A method of programming a target cell of the memory device includes activating selection transistors connected to a main string and substring of the target cell.
US07894264B2 Controlling a memory device responsive to degradation
Embodiments of the present invention disclosed herein include devices, systems and methods, such as those directed to non-volatile memory devices and systems capable of determining a degradation parameter associated with one or more memory cells. Disclosed devices and systems according to embodiments of the present invention include those that utilize the degradation parameter to adjust control signals coupled to the memory cells.
US07894259B2 Nonvolatile semiconductor memory device with first and second write sequences controlled by a command or an address
A memory cell array has a first and a second storage area. The first storage area has a memory elements selected by an address signal. The second storage area has a memory elements selected by a control signal. A control circuit has a fuse element. When the fuse element has been blown, the control circuit inhibits at least one of writing and erasing from being done on the second storage area.
US07894256B1 Thyristor based memory cell
A new memory cell contains only a single thyristor without the need to include an access transistor. A memory array containing these memory cells can be fabricated on bulk silicon wafer. The memory cell contains a thyristor body and a gate. The thyristor body has two end region and two base regions, and it is disposed on top of a well. The memory cell is positioned between two isolation regions, and the isolation regions are extended below the well. A first end region is connected to one of a word line, a bit line and a third line. A second end region is connected to another of the word line, bit line, and third line. The gate is connected to the remaining of the word line, bit line and third line.
US07894255B1 Thyristor based memory cell
A new memory cell contains only a single thyristor without the need to include an access transistor. A memory array containing these memory cells can be fabricated on bulk silicon wafer. Each memory cell is separated from other memory cells by shallow trench isolation regions. The memory cell comprises a thyristor body and a gate. The thyristor body has two end region and two base regions. The gate is positioned over and insulated from at least a portion of one base region and offset from another base region. A first end region is connected to one of a word line, a bit line and a third line. A second end region is connected to another of the word line, bit line, and third line. The gate is connected to the remaining of the word line, bit line and third line.
US07894253B2 Carbon filament memory and fabrication method
An integrated circuit is described, including a memory element including a first carbon layer rich in a first carbon material and a second carbon layer rich in a second carbon material. The memory element stores information by reversibly forming a conductive channel in the second carbon layer, wherein the conductive channel includes the first carbon material.
US07894251B2 Semiconductor memory device
The present invention provides a semiconductor memory device capable of preventing erroneous writing of a data signal. In DL drivers of an MRAM, transistors corresponding to a selected digit line group are made conductive to charge 16 digit lines to power supply voltage and charge a node to a predetermined voltage VP1=VDD−VTH1. After that, a transistor corresponding to the selected digit line is made conductive to make magnetization current flow. Therefore, occurrence of overshooting of magnetization current when the transistor is made conductive can be prevented.
US07894250B2 Stuck-at defect condition repair for a non-volatile memory cell
A method and apparatus for repairing a stuck-at defect condition in a non-volatile memory cell, such as a spin-torque transfer random access memory (STRAM). In some embodiments, a resistive sense element has a magnetic tunneling junction (MTJ) and a repair plane located adjacent to the resistive sense element. The repair plane injects a magnetic field in the MTJ to repair a stuck-at defect condition.
US07894248B2 Programmable and redundant circuitry based on magnetic tunnel junction (MTJ)
Techniques, apparatus and circuits based on magnetic or magnetoresistive tunnel junctions (MTJs). In one aspect, a programmable circuit device can include a magnetic tunnel junction (MTJ); a MTJ control circuit coupled to the MTJ to control the MTJ to cause a breakdown in the MTJ in programming the MTJ; and a sensing circuit coupled to the MTJ to sense a voltage under a breakdown condition of the MTJ.
US07894241B2 Memory cell array and semiconductor memory device including the same
A memory cell array with open bit line structure includes a first sub memory cell array, a second sub memory cell array, a sense-amplifier/precharge circuit, first capacitors and second capacitors. The first sub memory cell array is activated in response to a first word line enable signal, and the second sub memory cell array is activated in response to a second word line enable signal. The sense-amplifier/precharge circuit is connected to the first sub memory cell array through first bit lines and to the second sub memory cell array through second bit lines, and the sense-amplifier/precharge circuit precharges the first bit lines and the second bit lines and amplifies data provided from the first sub memory cell array and the second sub memory cell array.
US07894238B2 Semiconductor memory device with stacked memory cell structure
A semiconductor device including: a first memory cell including a non-volatile first variable resistance element that stores data by varying a resistance value and a selection transistor that selects the first variable resistance element; a first memory layer provided with more than one such first memory cell arranged in a plane; a second memory cell including a non-volatile second variable resistance element that stores data by varying a resistance value and a selection diode that selects the second variable resistance element; and a second memory layer provided with more than one such second memory cell arranged in a plane; wherein more than one such second memory layer is stacked over the first memory layer.
US07894229B2 3D chip arrangement including memory manager
Systems, apparatuses and methods involving centralized memory management capable of allocating and de-allocating memory for all subsystems dynamically. One embodiment involves a base substrate, a logic die(s) on the base substrate and having a subsystem(s), a memory die(s) having a memory module(s), a memory management unit, a first data interface connecting the memory management unit with the at least one logic die, a second data interface connecting the memory management unit with the at least one memory die, a configuration interface connecting the memory management unit with the at least one memory die, where the configuration interface includes face-to-face connections, a control interface connecting the memory management unit with the at least one logic die, where the memory die(s) and the logic die(s) are arranged in a stacked configuration on the base substrate, and the memory management unit is adapted for managing memory accesses from the subsystem(s) by negotiating an allowed memory access with the subsystem(s) via the control interface and configuring the at least one memory module according to the allowed memory access via the configuration interface.
US07894228B2 System and method for providing content-addressable magnetoresistive random access memory cells
A content-addressable random access memory having magnetic tunnel junction-based memory cells and methods for making and using same. The magnetic tunnel junction has first and second magnetic layers and can act as a data store and a data sense. Within each cell, registered data is written by setting a magnetic orientation of the first magnetic layer in the magnetic tunnel junction via current pulses in one or more current lines. Input data for comparison with the registered data can be similarly set through the magnetic orientation of the second magnetic layer via the current lines. The data sense is performed by measuring cell resistance, which depends upon the relative magnetic orientation of the magnetic layers. Since data storage, data input, and data sense are integrated into one cell, the memory combines higher densities with non-volatility. The memory can support high speed, reduced power consumption, and data masking.
US07894226B2 Content addressable memory based on a ripple search scheme
A scheme for ultra-low power content addressable memory based on a ripple search is disclosed. In one embodiment, a system for content addressable memory (CAM), includes a storage unit for storing a portion of content data, and a match module for comparing the portion of the content data with a respective portion of search data received by the match module. The match module includes a first static logic gate associated with a first half of the storage unit storing a sub-portion of the portion of the content data, and a second static logic gate associated with a second half of the storage unit. The first static logic gate forwards a signal for disabling the second static logic gate if the sub-portion of the portion of the content data does not match with a respective sub-portion of the portion of the search data.
US07894223B2 Switching power supply circuit
A switching power supply circuit uses a magnetic material that is harder to be magnetically saturated than ferrite as a core of a transformer or a choke coil and suitably protects a switching element. The circuit includes a transformer having a core made of a magnetic material of amorphous metal, a primary-side winding and a secondary-side winding. The circuit further includes a switching element for flowing current through the primary-side winding of the transformer according to a pulsive drive signal, and a primary-side current detection circuit for detecting the current flowing through the primary-side winding. The circuit further includes plural circuit elements for rectifying and smoothing a voltage generated in the secondary-side winding of the transformer to generate an output voltage, and a control circuit for generating the drive signal based on at least a detection result of the primary-side current detection circuit, and limiting a period for flowing the current in the primary-side winding.
US07894213B2 DC to DC converter
An exemplary DC to DC converter includes a first transistor, a second transistor, a transformer, and a pulse generating circuit having a first capacitor, a sampling resistor, a zener diode, and a first diode. A DC voltage input terminal is configured for receiving a first DC voltage and is grounded via the primary winding of the transformer, a collector electrode and an emitter electrode of the first transistor in series. A terminal of the auxiliary winding of the transformer is grounded via the inverted first diode, the non-inverted zener diode, the sampling resistor, and the first capacitor. The other terminal of the auxiliary winding is grounded. A first transistor having a base electrode connected to the DC voltage input terminal. A second transistor includes an emitter electrode a cathode of the zener diode, a collector electrode connected to a base electrode of the first transistor, and a grounded base electrode.
US07894204B1 Matrix board assembly
An assembly of connected circuit boards includes at least one each of a matrix board, an input board and an output board. There are two types of input board, one for hydrophone cable input and one for single-ended (SE) cable input. The matrix board provides for switching any pair of input differential signals to any channel on the output board.
US07894203B2 Multilayer printed wiring board
A multi-layer printed wiring board including a first substrate having an opening and having external terminals positioned to be connected to a package substrate, a second substrate laminated to the first substrate and having external terminals positioned to be connected to a mother board, the second substrate having a metallic layer portion in the opening of the first substrate and non-through holes filled with conductive material and connected to the metallic layer portion, and an IC component having terminals and loaded in the opening of the first substrate such that the terminals of the IC component face an opposite side of the metallic layer portion of the second substrate. The IC chip is accommodated in the opening such that the metallic layer portion and non-through holes of the second substrate irradiate heat generated by the IC chip.
US07894202B2 Multilayer capacitor
A multilayer capacitor includes a laminate of ceramic layers, and a capacitor unit provided in the laminate. In the multilayer capacitor, the relationships P≧Ra and P≧W are established, wherein P represents the average projection height of first and second via conductors from the upper surface, Ra represents the surface roughness of the upper surface, and W represents an amount of curvature of the laminate. Further, the projecting portions of the first and second via conductors projecting from the upper surface are buried in first and second external electrodes, respectively.
US07894200B2 Printed wiring board with built-in semiconductor element, and process for producing the same
The present invention provides a printed wiring board with a built-in semiconductor element in which an insufficient or excessive amount of filled sealing material does not affect excellent adhesion of the printed wiring board to an overlying wiring board. The printed wiring board with a built-in semiconductor element comprises a built-in semiconductor element, in which at least the lower surface, the upper surface, or the side surface of the semiconductor element is covered with an insulating film, and an insulating layer is provided in the side and upper portions of the semiconductor element. There is also provided a process for producing a printed wiring board with a built-in semiconductor element, comprising the steps of mounting a semiconductor element on a base substrate and covering at least the lower surface, the upper surface, or the side surface of the semiconductor element with an insulating film, disposing and stacking a semicured insulating sheet in the side portion of the semiconductor element, and disposing and stacking a semicured insulating sheet in the upper portion of the semiconductor element.
US07894198B2 Flash memory device with a retractable plug
A flash memory device, includes a case (1) having a chamber and an opening (1120) at one end thereof. A memory module (2) is received in the chamber and has a plug (22) formed at one end thereof. A pole (3) has a first portion (30) received in the chamber to drive the plug of the memory module moving in or out of the opening, and a second portion (31) opposite to the first portion. A revolver mechanism (5) has a main body (51) which is rotatable, and a spindle (52) assembled to the main body and rotatablely coupled to the second portion to drive the pole moving along a linear direction.
US07894195B2 Disposing structure for hot swappable motherboard in industrial computer chassis
A disposing structure of industrial computer chassis includes a chassis shell, two motherboard trays and a back plate. The interior of the chassis shell is divided into a storage unit section and a motherboard section. The interior of the storage unit section is arranged at least one storage unit, while two motherboard trays are disposed in the motherboard section. The interior of each motherboard tray is arranged a motherboard. In the motherboard trays, at least one motherboard tray is extended a wedge frame toward the storage unit section. A transfer card having a hot swapping function is arranged on the wedge frame and is arranged by inserting into the corresponding motherboard. In addition, a back plate is arranged between the storage unit section and the motherboard section. Corresponding to the wedge frame, a slot capable of a hot swapping function is arranged on the back plate. In so doing, the transfer card may be inserted into the slot, thereby, providing a hot swapping function.
US07894194B2 Rack-mounted foldable computer console for KVM switch
A rack-mounted, combined KVM switch with console is described. The combined KVM switch with console is attached to the rack by affixing the switch to two front posts of the rack. The monitor and input module of the console are hinged to the switch so that they can be independently swiveled. The user may easily position the monitor and the input module in various different positions for various purposes. A first locking mechanism releasably locks the input module to a horizontal position, and a second locking mechanism releasably locks the monitor to a vertical position.
US07894190B2 Electronic equipment enclosure with side-to-side airflow control system
An electronic equipment enclosure system with a side-to-side airflow control system includes an enclosure, having a front, a rear, a top, a bottom and two sides, and a side-to-side airflow control system. The airflow control system includes a side wall disposed adjacent one side of the enclosure, and a manifold disposed adjacent the other side of the enclosure. Electronic equipment having a front, a rear, a top, a bottom and two sides is disposed between the side wall and the manifold. Cooling air is routed into a first of the two sides of the electronic equipment, and heated exhaust air is routed out of a second side of the two sides of the electronic equipment and into the manifold. The side wall prevents the heated exhaust air from mixing with the cooling air at the first side of the electronic equipment.
US07894185B2 Cold-drawn housing for electronic device
A primary outer housing component for an electronic device formed via a cold-drawing process is disclosed. The electronic device can include internal operational components located within an outer housing, as well as a processor and one or more user interfaces in communication therewith. A primary outer housing component substantially surrounds and protects the internal operational components and processor, and comprises a single, continuous and seamless structural wall having a cross-sectional profile that includes an outer circumference and an inner circumference, as well as openings at a top end and bottom end thereof. Top and bottom end closures fit within and close off the top and bottom end openings in the primary outer housing component, which is formed using a cold-drawing material process that includes the use of a die to form the shape of the outer circumference and a mandrel to form the shape of said inner circumference.
US07894181B2 Portable information processor, housing of portable information processor, and method for manufacturing the housing
The rear housing composing the display portion includes a raised portion and a non-raised portion with a level difference therebetween. The rear housing of the display portion is formed in such a manner that the non-raised portion has a cylindrically curved surface and that the level difference has an edge line at right angles with the lateral line of the cylindrically curved surface. The rear housing has such an automobile hood structure with a partially raised surface, thereby being prevented from being deformed due to external pressure not only in its width direction but also in its longitudinal direction.
US07894177B2 Light activated hold switch
An automatic hold switch is disclosed. The automatic hold switch provides a means for automatically switching a hold feature on and off. When the hold feature is on, one or more input devices of a portable electronic device are disabled or prevented from providing input signals. When the hold feature is off, one or more input devices of a portable electronic device are enabled or allowed to provide input signals. Because the user no longer has to manually control the hold feature, the number of actions that need to be taken by the user is reduced. In one example, the automatic hold switch is embodied with light sensors that detect when the device is in a dark environment and when the device is in a light environment. A dark environment indicates to the portable electronic device that the user wishes not to input and therefore the hold feature is turned on. A lighted environment indicates to the portable electronic device that the user wishes to input and therefore the hold feature is turned off.
US07894174B2 Method and apparatus for fault detection scheme for cold cathode fluorescent lamp (CCFL) integrated circuits
A fault detection circuit and a short-circuit detection circuit for a Cold Cathode Fluorescent Lamp (CCFL) driver integrated circuit having a power bridge and a CCFL load are disclosed that includes a reference circuit operable to generate a reference current in response to an external component, a replica component having a dimension substantially less than the components of the power bridge, a multiplexer circuit, and a comparator circuit. The replica component and the multiplexer circuit pass the reference current and the replica current to the comparator circuit respectively.
US07894173B2 Enhancing bandwidth of ESD network using transformers
An integrated circuit device includes a first pad and a second pad; electrostatic discharging (ESD) devices coupling the first pad and the second pad to a discharging path; a transformer including a first end, a second end, a third end and a fourth end, wherein the first end and the second end are coupled to the first pad and the second pad, respectively; and a transceiver circuit coupled to the first end and the second end of the transformer.
US07894170B2 ESD protection device
For maintaining the regular operating current in an inner circuit under electrostatic discharge (ESD) event, an ESD protection device is provided to control an ESD path switch in the turned-on condition by employing a MOS device and a latch-detected turned-on circuit. The MOS device has a self-aligned silicidation (Salicide) therein. The ESD protection device is used to stabilize operation efficiency and reduce the area of an ESD protection device without a silicide block disposed therein for enhancing the ESD protection capability.
US07894168B2 Thin-film magnetic head comprising a magneto-resistive effect device of a CPP structure and having a shunting layer
The invention provides a thin-film magnetic head having a magneto-resistive effect device of the CPP (current perpendicular to plane) structure comprising a multilayer film in which a fixed magnetization layer, a nonmagnetic layer and a free layer are stacked together in order. The fixed magnetization layer, nonmagnetic layer and free layer extend away from an air bearing surface that is a plane in opposition to a medium, the length of the fixed magnetization layer in a depth direction normal to said air bearing surface is greater than the length of the free layer in the depth direction. A shunt layer for shunting the sense current is located at a farther distance in the depth direction than the free layer, and the shunt layer is separated from the free layer by a constant gap in the depth direction.
US07894165B2 CCP magnetoresistive effect device with Fe barrier layers inhibiting diffusion of Co atoms to Heusler alloy layers in fixed layer and free layer, and head, head-gimbal assembly and hard disk system including said device
The invention provides a magneto-resistive effect device having a CPP (current perpendicular to plane) structure comprising a nonmagnetic spacer layer, and a fixed magnetized layer and a free layer stacked one upon another with said nonmagnetic spacer layer sandwiched between them, with a sense current applied in a stacking direction, wherein said free layer functions such that its magnetization direction changes depending on an external magnetic field, and is made up of a multilayer structure including a Heusler alloy layer, wherein an Fe layer is formed on one of both planes of said Heusler alloy layer in the stacking direction, wherein said one plane is near to at least a nonmagnetic spacer layer side, and said fixed magnetization layer is made up of a multilayer structure including a Heusler alloy layer, wherein Fe layers are formed on both plane sides of said Heusler alloy layer in the stacking direction with said Heusler alloy layer sandwiched between them. It is thus possible to prevent diffusion of Co atoms contained in the CoFe layer into the Heusler alloy layer, enabling the decrease in the spin polarizability of the Heusler alloy layer to be hold back and achieving a high MR ratio.
US07894164B2 Head stack assembly having a head gimbal including a recessed flexure and hard disk drive including the same
A head stack assembly of a hard disk drive includes a swing arm having a prong at its leading end, an actuator for rotating the swing arm, and a head gimbal having a head slider including a read/write head for reading/writing data from/onto a disk. The head gimbal is supported by the swing arm such that the head slider protrudes from the prong of the swing arm. The swing arm is configured to prevent the head gimbal from being vibrated due to windage. In particular, the swing arm defines a slot in one side of the prong, and a flexure of the head gimbal is received in the slot.
US07894158B2 Magnetic disk apparatus
An embodiment of a magnetic disk apparatus in accordance with the present invention includes a magnetic recording medium, a magnetic head assembly having a magnetic head which reads and writes data on the magnetic recording medium, and a motor coil assembly rotationally driving a spindle motor rotation body, in which plural motor coils are arranged on a circumference around the rotation center of the spindle motor rotation body so that intervals in the circumferential direction are equal, in a stator base surrounding a periphery of the spindle motor rotation body and having a shape in which a prescribed moving locus portion of at least the magnetic head assembly is cut out.
US07894156B2 Determination of wedge offset correction values for a disk drive
In a disk drive, a wedge-based scheme is used to determine wedge offset correction values for a track of the disk drive. Correction values for the offset of each servo wedge are calculated wedge-by-wedge, based on the position error signal (PES) of the most recently measured servo wedge in combination with the measured PES of other servo wedges. To minimize transport delay of the servo, the majority of servo-control calculations may be pre-calculated prior to measuring the PES at the current wedge. Wedge offset correction values for a given servo wedge are corrected iteratively with each revolution of the storage disk.
US07894155B2 Magnetic recording medium, method of fabricating the same, and magnetic recording apparatus
According to one embodiment, there is provided a magnetic recording medium having a data region in which a plurality of recording tracks, each including magnetic dots arrayed in a down-track direction with a pitch p, are formed in a cross-track direction, and a servo region including a preamble in which a plurality of lines of magnetic dots, which are arrayed in a cross-track direction with a pitch p, are formed at equal intervals in the down-track direction.
US07894149B2 Disc drive device
Embodiments of the present invention precisely measure clearance variation by temperature change using a value in a RW channel. In an embodiment of the present invention, an HDD measures resolution by signals in a RW channel. The measured resolution shows variations depending on temperature according to two factors. One factor is the clearance variation depending on the temperature and the other is the variation in operational property of the RW channel depending on the temperature. The HDD compensates for the temperature variation of the resolution according to the two factors. The HDD uses two kinds of sensed temperature. One corresponds to the temperature inside an enclosure in which head sliders are provided and the other corresponds to the temperature of the chip in which the RW channel is implemented. Sensing the drive temperature and the channel temperature independently achieves precise compensation for the variation in the measured resolution caused by clearance variation and channel property.
US07894146B2 Method and structure for mounting an optical lens
A liquid lens is mounted in a lens opening provided in a photographic instrument by making use of a mounting member made of a material which transmits light of predetermined wavelength and includes an inner wall shaped and dimensioned to receive the periphery of the lens in spaced, opposed relationship. The mounting member includes a portion mounted or to be mounted to the optical instrument. A bonding material is provided between the lens periphery and the mounting member wall, and the bonding material is activated by exposure to light of the predetermined wavelength, which is injected from outside, through the mounting member. Preferably, the light is injected with a guide member having an opening with an interior wall shaped and dimensioned to conform to an exterior wall of the guide member. The light may be injected from an edge of the guide member remote from the opening, through the guide member, and into the mounting member.
US07894143B2 Image capture lens
An image capture lens is disclosed. The image capture lens includes a glass substrate having a first side and an opposing second side, a first lens material with a first refractive index, and a second lens material with a second refractive index higher than the first refractive index. The first lens material is formed on the first side of the first glass substrate and has a curved top surface. The second lens material covers the first lens material and the first glass substrate and has a curved top surface.
US07894141B2 Imaging lens
An imaging lens of which various aberrations are corrected well, optical length is short, and back focus is sufficiently secured, is provided. The imaging lens is formed of a first lens L1, an aperture stop S, a second lens L2 and a third lens L3, arranged in this sequence from the object side to the image side. The first lens L1 is a meniscus lens having a positive refractive power, of which convex surface faces the object side, the second lens L2 is a meniscus lens having a positive or negative refractive power, of which convex surface faces the image side, and the third lens L3 is a meniscus lens having a negative refractive power, of which convex surface faces the object side. The Abbe number ν of the second lens L2 is a value in a 50.0 to 60.0 range.
US07894139B2 Imaging apparatus and method for manufacturing microlens array
An imaging device (3) including a plurality of pixels (3a) having a photoelectric conversion function, and a microlens array (1) including a plurality of microlenses (1a) that form subject images on these plurality of pixels (3a) and are arranged in a matrix are disposed so as to face each other. The microlens array (1) includes grooves (20) in a lattice form between the microlenses (1a) that are adjacent to each other. The depth of the grooves (20) is larger than a half of the thickness of the microlens array (1). Accordingly, it is possible to achieve an imaging apparatus that is easy to manufacture, has a simplified configuration and can capture a clear image and in which an influence of stray light and cross talk are reduced sufficiently.
US07894138B2 Display optical system and image display apparatus including the same
At least one exemplary embodiment is directed to a display optical system which includes a first optical system configured to form a magnified image of an image displayed on an image display element, the first optical system including an optical member, a second optical system configured to magnify and guide light of the magnified image from the first optical system to one of an observer or a projection surface, the second optical system including a decentered reflecting surface, and an adjusting mechanism configured to displace the optical member of the first optical system in such a way as to have a component in a direction perpendicular to an optical axis of the first optical system.
US07894136B2 Optical lattice microscopy using pediodic interference patterns of coherent waves
A method for creating a periodic interference pattern of coherent waves in two or three dimensions, D, includes generating at least D+2 waves, where each wave has substantially the same wavelength, λ, and travels substantially in a unique direction, kn. The waves are directed such that at least a portion of each wave intersects in a common excitation region to create the interface pattern. The directions, kn, of the waves are selected such that the interference pattern within the excitation region forms a Bravais lattice, and at least one wave travels substantially in a direction, ki, such that one or more symmetry operations characteristic of the Bravais lattice map the direction of the wave, ki, onto a direction of a different wave, kj. The directions of the waves, kn, do not all lie on a D-dimensional set of mutually orthogonal axes.
US07894135B2 Zoom lens and image pickup apparatus including the lens
A zoom lens easily performs image stabilization with a compact and light image-stabilizing lens unit, properly corrects an aberration change during image stabilization, and achieves high optical performance. The zoom lens includes a first positive lens unit, a second negative lens unit, a third positive lens unit, a fourth negative lens unit, and a fifth positive lens. These lens units are arranged in order from an object side toward an image side, and are moved during zooming. The fourth lens unit is formed by one lens component, and is moved in a direction having a component that is perpendicular to the optical axis for image shifting. The Abbe number of a negative lens that forms the fourth lens unit, the thickness of the fourth lens unit on the optical axis, and the focal length of the entire zoom lens at the wide angle end are set appropriately.
US07894134B1 Sinusoidal polarization
A linearly polarized transparent or translucent material is stretched to follow a sinusoidal shape so all parts of the resulting panes or lenses are themselves sinusoidal. By providing a structure of two panes or lenses of such material, moving one relative to the other in a linear direction varies an amount of light passing through. Thus, such a linear movement adjusts light translucence, luminosity intensity, brightness and dimness. Applications include windows (home, office, car), motor vehicle windshields, sunglasses, optical lenses, computer monitors, televisions, and fluorescent light fixtures.
US07894132B2 Screen
A screen onto which an image light may be projected includes a flexible screen body, a first and a second storage member, and a retention member. The first storage member includes a screen wind-up section that winds up the screen body and supports either one of opposing end portions of the screen body and a base body that supports the screen wind-up section. The retention member includes a substantially orthogonal column that extends along the screen body and a pair of arm members that couple the column and the first and second storage members together. One end of each of the arm members is respectively rotatably coupled to the first and second storage members and another end of each of the arm members is rotatably coupled to the column.
US07894125B2 Acousto-optic devices
An acousto-optic module is provided, including a number of partially coupled optical resonators distributed within a dielectric medium and at least one acoustic transducer mounted on a surface of the dielectric medium for injecting an acoustic wave into the optical resonators so as to diffract light passing therethrough by means of Bragg diffraction. This acousto-optic module has been applied in particular to an improved tuneable optical filter in which an acoustic shear wave is generated and which travels through the acousto-optic module in a direction substantially parallel with a polarized light signal passing therethrough. The acousto-optic module is also applied to an improved optical frequency shifter.
US07894121B2 Light valve assembly with a holographic optical element and a method of making the same
A light valve assembly comprises a holographic optical element and a light valve that comprises an array of individually addressable pixels. The light valve assemblies can be fabricated on the die level or on a wafer-level.
US07894116B2 Electro-optical device and electronic apparatus
An electro-optical device comprising a first substrate, a second substrate facing the first substrate, a light-emitting layer arranged between the first substrate and the second substrate which is capable of emitting light from a plurality of pixels including at least a first subpixel and a second subpixel, the first subpixel forming a first image and the second subpixel forming a second image, and a light-shielding layer arranged between the second substrate and the light-emitting layer having an opening which is capable of transmitting light emitted from a first subpixel in the light-emitting layer through the second substrate to a first range and transmitting light emitted from the second subpixel of the light-emitting layer through the second substrate to a second range.
US07894112B2 Security element with a diffraction structure having subareas representing recognizable information
A security element, preferably for documents of value, which at least has one area with a diffraction structure, which under specific viewing conditions reconstructs a diffractive image. This area has subareas, which do not take part in the reconstruction of the diffractive image, and which represent a recognizable information. Essential is that the information represented by the subareas is recognizable mainly only under the viewing conditions, under which the diffractive image can be perceived.
US07894107B2 Optical scanner with non-redundant overwriting
An optical scanning device is provided which comprises a laser array which emits laser beams including a number of beams (1, 2, . . . , n) writing a swath of rasters having a laser scanning section which, when an interlaced scanning period i, is set to a natural number between beams which are adjacent in a sub-scanning direction, scans the laser beams emitted from the laser array with the interlaced scanning period i. The laser scanning section can scan the laser beams such that the beam number n and the interlaced scanning period i are relatively prime natural numbers, and n>i. In a first scan, data for raster lines (1, 2, . . . , n) can be selectively associated with a respective first exposure. At a second scan, data for raster lines (i+1, i+2, . . . , n) can be selectively associated with a respective second exposure and data for raster lines (n+1, n+2, . . . , n+i) can be selectively associated with a respective first exposure. The first respective exposure for raster lines (i+1, i+2, . . . , n) is not equal to the respective second exposure for raster lines (i+1, i+2, . . . , n).
US07894105B2 Image reading unit and image reader
An image reader includes two rows of image reading element arrays, that is, a first image reading element array and a second image reading element array, and a first rod lens array and a second rod lens array, disposed in correspondence with the first and second image reading element arrays and having different focal positions, in order to read an image on a transmission original in optimal focus with a CIS scanner using the rod lens arrays as when an image on a reflection original is read. The second image reading element array provides higher resolution, and has a shorter reading length. The focal length of the second rod lens array is greater than that of the first rod lens array.
US07894104B2 Apparatus for embedding information and performing processing based on embedded information, and method of controlling same
An apparatus and method that allow a user to copy a copy-protected document where copy-protection information is embedded in the document and copy-protection-cancellation information is embedded in a form different from the document, where the copy-protection-cancellation information is used to cancel the copy protection.
US07894103B2 Variable data digital pantographs
A variable data pantograph is formed by receiving a variable data string and retrieving at least one character representation from a vocabulary of character representations stored in memory. The retrieved at least one character representation corresponds to the variable data string. Each of the character representations in the vocabulary include a foreground region including a character shape and a background region suitably sized and arranged for encompassing the foreground region. The background region incorporates a first pattern of elements and the foreground region incorporates a second pattern of elements. The retrieved at least one character representation is assembled to form a variable data pantograph, whereby when the variable data pantograph is rendered in an original document, the foreground and background regions are similar in tone, the foreground and background regions being substantially less similar in tone in a copy of the original document to render the character visible.
US07894102B2 Image processing apparatus for extracting code data from scanned image and control method thereof
An image processing apparatus scans an image of a document to thereby create image data, and extracts specific code data from the created image data. If the specific code data is successfully extracted, pattern data corresponding to the specific code data is deleted from the created image data. Further, pattern data corresponding to the specific code data is embedded into the image data.
US07894099B2 Method of expression, recording, reproduction, and communication of computer object using color, apparatus for recording and/or reproduction, recording medium, and method of preparation of code
A computer object such as text, graphics, mathematical formulas, images, audio, and other data and information handled inside a computer or through a computer in industry or daily life etc. is expressed, recorded, reproduced, and transmitted using color or a color numerical value. Color is used as a medium for expressing data or information taking note of the characteristics of color. This helps counter the ballooning amount of recording. Color can also be used to prepare codes.
US07894088B2 Image inputting apparatus, image outputting apparatus, and composite system that includes image inputting apparatus and image outputting apparatus
An image-inputting apparatus into which an image is inputted is disclosed. The apparatus includes an information receiving section that receives a first item of information; a decision section that makes a determination as to whether the first item of information should be permitted to use the image-inputting apparatus, the determination being made based on the first item of information inputted into the image-inputting apparatus and a second item of information that has been registered previously in the image-inputting apparatus; and a transmitter that transmits the first item of information to an image-outputting apparatus. The image-inputting apparatus outputs the image to the image-outputting apparatus in accordance with the determination made by said decision section and a reply received from the image-outputting apparatus in response to transmission of the first item of information.
US07894087B2 Job processing error and schedule recovery
Disclosed is a process control system for connecting a plurality of devices and a process control server, which manages the plurality of devices, via a network. The system accepts input of a job, creates a schedule of each device necessitated by the job that has been input and causes the job to be executed by each device based upon the schedule. If an error has occurred in a certain device during execution of the job, the system extracts executable operation contents based upon the schedule from operation contents stored previously with respect to the error, presents the operation contents and allows the operation contents to be selected, and updates the schedule in accordance with operation contents selected by an operator in charge in accordance with the displayed presentation.
US07894086B2 Image forming system and communication control method in the image forming system
An image forming system includes an image reading apparatus, a printer that is connected to the image reading apparatus and performs printing processing by directly receiving image data read by the image reading apparatus, and a notification unit that notifies failure information to the other apparatus if a failure occurs either in the image reading apparatus or in the printer, wherein the image reading apparatus includes a failure information acquisition unit that acquires failure information notified by the notification unit when a failure has occurred in the printer, a determination unit that determines whether or not the image reading apparatus is in the process of reading image data.
US07894083B2 Print control with interfaces provided in correspondence with printing methods
Display control is made so as to obtain an optimum setting picture plane in accordance with a change in designation of an outputting method of a distribution printing, a multiple-address printing, an automatic substitute printing, or the like without allowing the user to be conscious thereof.
US07894082B2 Integrated printing and display device
A printing and display device comprises a housing having an ejection slot in a base wall thereof; a flat panel display disposed within the housing; a printer disposed within the housing, the printer including a printhead and a print engine assembly; and a chute provided behind the flat panel display for guiding print media behind the flat panel display to the printhead. The print engine assembly includes feed means for supporting and feeding paper along a feed path passing between the flat panel display and the printhead to the ejection slot.
US07894081B2 Configuration recognizing system, configuration recognizing method, and computer readable medium storing configuration recognizing program of device
The present invention relates to a component mounted to a device and provides a configuration recognizing system, etc. of a device to enable configuration information of the component to be comprehended regardless of electric connection between the component and the device. A configuration recognizing system of a device (electronic device 6, server apparatus 60) with one or a plurality of components (units 41, 42, 43 . . . 4N) mounted includes a displaying unit (tag 101, 102, 103 . . . 10N) that displays configuration information on the component and a recognizing unit (non-contact recognizing unit 12) that recognize the configuration information from the displaying unit of the component mounted to the inside of the case without contact.
US07894078B2 Single-lens 3-D imaging device using a polarization-coded aperture masks combined with a polarization-sensitive sensor
A device and method for three-dimensional (3-D) imaging using a defocusing technique is disclosed. The device comprises a lens, at least one polarization-coded aperture obstructing the lens, a polarization-sensitive sensor operable for capturing electromagnetic radiation transmitted from an object through the lens and the at least one polarization-coded aperture, and a processor communicatively connected with the sensor for processing the sensor information and producing a 3-D image of the object.
US07894074B2 Laser doppler vibrometer employing active frequency feedback
A laser Doppler vibrometer for vibration measurement that employs active feedback to cancel the effect of large vibration excursions at low frequencies, obviating the need to unwrap phase data. The Doppler shift of a reflective vibrating test object is sensed interferometrically and compensated by means of a voltage-controlled oscillator driving an acousto-optic modulator. For frequencies within the servo bandwidth, the feedback signal provides a direct measurement of vibration velocity. For frequencies outside the servo bandwidth, feedback biases the interferometer at a point of maximal sensitivity, thus enabling phase-sensitive measurement of the high-frequency excursions. Using two measurements, one with a low bandwidth and one with a high bandwidth, more than five decades of frequency may be spanned. This approach is of particular interest for the frequently occurring situation where vibration amplitudes at low frequency exceed an optical wavelength, but knowledge of the vibration spectrum at high frequency is also important.
US07894070B2 Optical method and system for the characterization of laterally-patterned samples in integrated circuits
Disclosed is a method for characterizing a sample having a structure disposed on or within the sample, comprising the steps of applying a first pulse of light to a surface of the sample for creating a propagating strain pulse in the sample, applying a second pulse of light to the surface so that the second pulse of light interacts with the propagating strain pulse in the sample, sensing from a reflection of the second pulse a change in optical response of the sample, and relating a time of occurrence of the change in optical response to at least one dimension of the structure.
US07894069B2 Respirator end-of-service life probe
An end-of-service life indicator for a sorbent filter includes a tube containing a noble metal nanoparticle film on an optically transparent substrate, the substrate being perpendicular to the axis of the tube. An opening in the tube adjacent to the film allows chemical vapor to accumulate in the tube and be absorbed by the film. A light source located at one end of the tube and a light detector at the other end determines the amount of light absorbed by the nanoparticle film due to exposure to chemical vapor. A signal from the light detector is applied to an electronic processor that determines attenuation of light by the film, and the processor is connected to an indicator to provide an indication of the exposure of the film to the vapor.
US07894066B2 Method and apparatus for carrying out a burning test on a test piece
The image data capture of a test piece is performed with at least one first camera. A reference point of the test piece is determined by processing the image data recorded with the at least one first camera. A burner is positioned at a prescribed first distance from the reference point for the flame exposure of the test piece. At least one second camera may also detect whether the test piece exposed to a flame is burning or incandescing. At least one third camera may be used for monitoring the burner flame and at least one fourth camera may be used for determining whether the test piece drips while burning. Furthermore, at least one detector may used for detecting whether the drips ignite a pad of wadding positioned under the test piece.
US07894062B2 Overlay measuring method and overlay measuring apparatus using the same
An overlay measuring apparatus includes a light source which generates visible light with a plurality of wavelengths, an optical module which selects visible light with a single wavelength from the visible light generated by the light source, makes the visible light with a single wavelength incident on a plurality of overlay patterns, and uses visible light reflected from the plurality of overlay patterns to project the overlay patterns with a predetermined color, an imaging unit which acquires images of the plurality of overlay patterns according to individual wavelengths of the visible light and acquires corresponding image signals, and a control unit which outputs a control signal to the optical module so that the optical module can project the overlay pattern with a specific color using information associated with the individual wavelengths of the visible light that is used to project the overlay pattern image selected by a selection unit.
US07894061B2 Polarization based fiber optic downhole flowmeter
A flow monitoring system includes a pipe for transporting a fluid therethrough. An optical fiber generally spirals about the pipe along a longitudinal portion having a predetermined length to serve as a single transducer for detecting flow information from the longitudinal portion. A linear polarizer/analyzer circuit communicates with the optical fiber. A light source communicates with the linear polarizer/analyzer circuit and generates a light signal along the optical fiber at a frequency greater than a period of a disturbance to flow past the predetermined length of the transducer. A reflector is disposed along the optical fiber for reflecting the light signal along the optical fiber. An optical detector communicates with the linear polarizer/analyzer circuit. The optical detector determines from the light signal dynamic events along the optical fiber indicative of flow disturbances passing by the transducer.
US07894058B2 Single-lens computed tomography imaging spectrometer and method of capturing spatial and spectral information
Computed tomography imaging spectrometers (“CTISs”) employing a single lens are provided. The CTISs may be either transmissive or reflective, and the single lens is either configured to transmit and receive uncollimated light (in transmissive systems), or is configured to reflect and receive uncollimated light (in reflective systems). An exemplary transmissive CTIS includes a focal plane array detector, a single lens configured to transmit and receive uncollimated light, a two-dimensional grating, and a field stop aperture. An exemplary reflective CTIS includes a focal plane array detector, a single mirror configured to reflect and receive uncollimated light, a two-dimensional grating, and a field stop aperture.
US07894056B2 Method, structure, and apparatus for Raman spectroscopy
Disclosed herein are a Raman spectroscopy structure comprising a porous material substrate, and a method of performing Raman spectroscopy of a sample disposed adjacent to the structure comprising the porous material substrate. Generally, the substrate includes one or more layers of a porous material such as porous silicon, porous polysilicon, porous ceramics, porous silica, porous alumina, porous silicon-germanium, porous germanium, porous gallium arsenide, porous gallium phosphide, porous zinc oxide, and porous silicon carbide. It has been discovered that such a substrate material, when excited with near-infrared light, does not exhibit undesired background fluorescence characteristic of other known Raman spectroscopy substrates.
US07894054B2 Optical sensor device for detecting ambient light
An optical sensor device for detecting ambient light is adapted to be coupled to a pane (10), in particular to a windshield of a motor vehicle. The optical sensor device has a sensor unit which includes at least one light receiver (26) and a lens plate (12). By means of the sensor unit, an ambient light beam having entered the pane (10) is coupled out of the pane (10) and directed onto the light receiver (26). On a surface (12b) which faces the pane (10), the lens plate (12) includes a first Fresnel prism structure (22) having a plurality of individual structures (24). The individual structures (24) of the first Fresnel prism structure (22) are designed such that they deflect the light beam at different angles.
US07894052B2 Optical defect inspection apparatus
A laser beam oscillated from a laser source is folded in its path by first and second plane mirrors and enters a beam expander. The surface of each plane mirror is deteriorated with illumination by the laser beam and the reflectance is reduced. To avoid a light quantity of the laser beam entering the beam expander from being reduced below a reference value, when the laser beam is illuminated over a certain time, a position on each of the first and second plane mirrors at which the laser beam is illuminated is changed by a structure for rotating and/or translating a reflecting surface of each plane mirror on a plane, which includes the plane mirror, while an optical axis is kept same. Thus, the useful life of each plane mirror can be prolonged without displacing the optical axis.
US07894051B2 Reticle defect inspection apparatus and reticle defect inspection method
A reticle defect inspection apparatus that controls damage of a reticle by irradiation with an inspection light when the reticle is caused to be at rest is provided. The reticle defect inspection apparatus is a reticle defect inspection apparatus for inspecting for defects on a reticle using a pattern image obtained by irradiating the reticle on which a pattern is formed with light. The reticle defect inspection apparatus has a dose monitoring part for measuring a dose of the light to the reticle, a comparing part for comparing, after calculating accumulated irradiation from the dose measured by the dose monitoring part, the accumulated irradiation with a preset threshold, and a stop mechanism for stopping irradiation of the reticle with the light when, as a result of the comparison, the accumulated irradiation exceeds the threshold.
US07894050B2 Method and apparatus for determining intensities and peak wavelengths of light
The present invention provides a method and apparatus for determining intensities and peak wavelengths of light. The apparatus comprises one or more pairs of sensing units for sensing the light, a first sensing unit of a pair configured to sense a first intensity of the light in a first predetermined wavelength range with a first predetermined spectral responsivity and a second sensing unit of a pair configured to sense a second intensity of the light in the first predetermined wavelength range with a second predetermined spectral responsivity. The apparatus further comprises a processing system operatively connected to the one or more pairs of sensing units; the processing system configured to determine the intensity and peak wavelength for each of the one or more predetermined wavelength ranges of the light according to one or more predetermined functional relationships between each of the first intensity and second intensity.
US07894048B2 Optical sheet and method for manufacturing the same
The present invention provides an optical sheet that excels in a light convergence function or a light diffusion function, has excellent brightness increase ratio in the desired angular direction, in particular the front surface direction, and greatly inhibits the side lobe, and a method for manufacturing such an optical sheet with good efficiency and high accuracy. The optical sheet has a substrate that has a first surface having formed thereon a peak-valley portion that converges and scatters light and an optical adjustment portion that differs in an optical property from the substrate. A plurality of the optical adjustment portions are formed at least in part of a non-passage portion for the light in the substrate in the case where a parallel beam falls from the first surface in a direction normal to a surface located opposite the first surface.
US07894041B2 Limiting a portion of a patterning device used to pattern a beam
A system and method are used to limit a proportion of a programmable patterning means used to pattern a substrate. This is done such that a size of a repeated pattern to be exposed on the substrate is an integer multiple of a size of a pattern exposed on the substrate by the patterned beam.
US07894040B2 Lithographic apparatus and device manufacturing method
A lithographic apparatus is provided in which exposure is carried out by projecting through an aqueous solution of alkali metal halide(s), the solution being in contact with the substrate to be exposed.
US07894039B2 Exposure apparatus and method, and device manufacturing method
An exposure apparatus for exposing a substrate to light. A substrate stage holds the substrate and is to be moved. A measuring device measures a positional deviation amount of a mark on the substrate held by the substrate stage. A computing device determines a coefficient of a linear expression that approximates the measured positional deviation amount of each mark and is linear with respect to a term including at least one of an X coordinate to the Nth power and a Y coordinate to the Nth power, where N is an integer not less than zero, and a control device controls a position of the substrate stage in accordance with a target position determined based on the linear expression to expose a shot to the light. The computing device determines the coefficient in accordance with an integer programming method so as to minimize a number of marks, each of which satisfies a condition that a difference between the measured positional deviation amount and the approximated positional deviation amount is out of a predetermined allowable range.
US07894037B2 Lithographic apparatus and device manufacturing method
A lithographic apparatus includes an illumination system configured to condition a beam of radiation; a pattern support configured to hold a patterning device, the patterning device configured to pattern the beam of radiation to form a patterned beam of radiation; a substrate holder configured to hold a substrate, the substrate holder including a support surface in contact with the substrate; a projection system configured to project the patterned beam of radiation onto the substrate; and a cleaning system including a cleaning unit, the cleaning unit constructed and arranged to generate radicals on the support surface of the substrate holder to remove contamination therefrom.
US07894034B2 Thin film transistor array panel with improved connection to test lines having auxiliary test line with plural extending conductive layers in contact with at least one test line
A thin film transistor (TFT) array panel with improved contact between the display signal lines and test lines is presented. The TFT array panel includes: gate lines and data lines intersecting each other, switching elements connected to the gate lines and the data lines, and at least one test line disposed near end portions of the gate lines or the data lines. An insulating layer covers the gate lines, the data lines and the switching elements and has first contact holes exposing the end portions of the gate lines or the data lines and second contact holes exposing the test lines. Auxiliary test lines are formed on the insulating layer and commonly connected to conductive layers, wherein the conductive layers connect at least one test line to the gate lines or the data lines via the first and the second contact holes.
US07894032B2 Liquid crystal display device having particular structure for data line, source electrode, drain electrode and pixel electrode
A liquid crystal display device and a fabricating method having a simplified process are disclosed. The liquid crystal display device comprises, among other features, first and second substrates, a gate line crossing a data line with a gate insulating film therebetween to define a pixel area. A common line is provided on the substrate substantially parallel to the gate line, and a common electrode is extended from the common line into the pixel area. A pixel electrode is extended from a drain electrode into the pixel area to form a horizontal electric field with the common electrode. The data line, a source electrode, a drain electrode and the pixel electrode are formed of a first conductive layer group having at least double conductive layers, and are formed in an area to be sealed by a sealant upon joining the first and second substrates.
US07894029B2 Apparatus for optically arranging surface of alignment film and method for manufacturing liquid crystal display device using the same
Work is irradiated with polarized light generated by configuring in such a manner as to have a polarizer using a grating that separates polarized light from non-polarized light, a lamp and a condenser mirror that allow light to fall on the polarizer, a collimator lens that converts the incoming light into parallel beams, an integrator lens that uniformizes intensity distribution of light radiated from the polarizer, and a diffusion lens with functions to enlarge or contract the irradiated range to the work size, and by forming protrusions and recesses of the shape, material, and size that fit to the desired wavelength on a substrate such as quartz, etc. that transmit ultraviolet light, and by providing the light-polarizing performance by appropriately providing an incident angle. By carrying out this processing, the alignment film in the liquid crystal display element can be photo-aligned at high accuracy and uniformly.
US07894019B2 Wire grid polarizer and liquid crystal display device using the same
A wire grid polarizer has mainly a resin substrate 1 having grid-shaped convex portions 1a, a dielectric layer 2 provided to cover the grid-shaped convex portions 1a of the resin substrate 1 and at least part of side faces 1b of the portions, and metal wires 3 provided on the dielectric layer. The wire grid polarizer has a microstructural concavo-convex grid structure having grid-shaped convex portions, is not limited in structure, and has both the excellent degree of polarization and excellent transmittance over a wide range in the visible region.
US07894017B2 Plane light source and LCD backlight unit having the same
There are provided a plane light source and an LCD backlight unit having the same. A plane light source including light emitting device matrixes each having a plurality of light emitting devices arranged in rows and columns on a substrate according to an aspect of the invention includes: a first matrix having a plurality of light emitting devices arranged in rows and columns; and a second matrix having a plurality of light emitting devices arranged in rows and columns, the light emitting devices each located within a rectangle formed by four adjacent light emitting devices included in the first matrix, and forming angles θ satisfying the condition of 45°≦θ≦55° therebetween on the basis of a horizontal direction, wherein among pitches between one light emitting devices included in the light emitting device matrixes and another lighting light emitting device adjacent to the light emitting device, a pitch P1 between the light emitting device and the light emitting device diagonally across from the light emitting device satisfies the condition of 25 mm≦P1≦29 mm, and a pitch P2 between the light emitting device and another light emitting device located in a horizontal direction satisfies the condition of 34 mm≦P2≦38 mm.
US07894015B2 Backlight device and liquid crystal display apparatus
A backlight device that illuminates a transmissive liquid crystal panel is disclosed. The device includes: a plurality of light source substrates on which a plurality of light emitting devices irradiating illumination light are mounted; a bottom chassis having one surface to which the plurality of light source substrates are attached; a reflector having openings corresponding to the light emitting devices and through which the light emitting devices are exposed to one surface side, and reflecting the illumination light irradiated from the light emitting devices; a diffuser facing the one surface side of the reflector through a predetermined facing interval and internally diffusing the illumination light incident from the reflector; and an optical function sheet laminate combined with the diffuser on one surface side thereof, containing a stack of a plurality of optical function sheets and guiding the illumination light to the transmissive liquid crystal panel.
US07894014B2 Backlight device and liquid crystal display apparatus
A backlight device that illuminates a transmissive liquid crystal panel is disclosed. The device includes: a plurality of light source substrates on which a plurality of light emitting devices irradiating illumination light are mounted; drive substrates having drive circuits for the light emitting devices and electrically connected to the light source substrates; a bottom chassis having one surface to which the plurality of light source substrates are attached; a reflector having openings corresponding to the light emitting devices and through which the light emitting devices are exposed, and reflecting the illumination light; a diffuser facing the one surface side of the reflector through a predetermined facing interval and internally diffusing the illumination light; and an optical function sheet laminate combined with the diffuser on one surface side thereof, containing a stack of a plurality of optical function sheets and guiding the illumination light to the liquid crystal panel.
US07894010B2 Liquid crystal display panel and method for fabricating the same
The present invention relates to a liquid crystal display panel and a method for fabricating the same which can improve aperture and prevent a brightness deviation between lots. The liquid crystal display panel includes a thin film transistor formed on a lower substrate and connected to a gate line and a data line, a pixel electrode connected to a drain electrode of the thin film transistor, a common electrode forming a horizontal electric field with the pixel electrode, a connection electrode overlapped with and connected to the data line, and a black matrix on an upper substrate opposite to the lower substrate for forming a vertical electric field with the connection electrode.
US07894009B2 Liquid crystal display device and a manufacturing method of the same
In the conventional manufacture method that has reduced the number of manufacture processes by forming semiconductor layers and source-drain wires for a channel-etch type insulating gate transistor in a single photo etching process using halftone exposure technology, the channel length increases when the photosensitive resin pattern used at above formation process of source-drain patterning is reduced. Hence the manufacture tolerance (margin) is small, and the yield decreases when the distance between the source wire and drain wire is shortened. This invention suggests the 4-mask process and, 3-mask process of the TN type liquid crystal display devices and IPS-type liquid crystal display devices by combining the following: streamline technology to form the already known pixel electrodes and scanning lines simultaneously; new technology to streamline the opening formation process in gate insulating layers and island formation process of semiconductor layer, using halftone exposure technology; and new technology to streamline the protective layer formation process for electrode terminals by adding halftone exposure technology to the already known anode oxidization technology for source-drain wires.
US07894000B2 Dominant color extraction using perceptual rules to produce ambient light derived from video content
Extracting and processing video content encoded in a rendered color space to be emulated by an ambient light source, using perceptual rules for intelligent dominant color selection. Steps include quantizing the video color space; performing dominant color extraction by using a mode, median, mean, or weighted average of pixel chromaticities; applying perceptual rules to further derive dominant chromaticities via [1] chromaticity transforms; [2] a weighted average using a pixel weighting function influenced by scene content; and [3] extended dominant color extraction where pixel weighting is reduced for majority pixels; and [4] transforming the dominant color chosen to the ambient light color space using tristimulus matrices. A color of interest can be further analyzed to produce a true dominant color, and past video frames can guide selection of dominant colors in future frames.
US07893989B2 Camera unit for driving lenses and method of manufacturing the same
A camera unit includes a soft substrate on which electrode regions and an image pickup device region are disposed, a driving electrode group disposed on one of the electrode regions, an image pickup device disposed on the image pickup device region, stationary unit frame attaching portions disposed at positions surrounding the image pickup device region, a stationary unit frame attached to the stationary unit frame attaching portions, and movable units disposed in the stationary unit frame. The soft substrate is bent along bending positions between the electrode regions and the image pickup device region, the electrode regions are fixed on sides of the stationary unit frame inwardly thereof, and the image pickup device region is fixed on an end surface of the stationary unit frame toward the movable units.
US07893987B2 Focused state display device and focused state display method
A focus state display apparatus comprising focus area extraction means for extracting the image signals of a predetermined area from photographed image signals, edge enhancement processing means for enhancing the edge of the extracted image signals, time integration value calculation means for calculating an integration value of the edge-enhanced image signals in a certain period of time, focus state determination means for determining the focus state of the photographed image signals on the basis of the calculated integration value, and focus state display means for displaying the determined focus state. A user is capable of readily determining the focus state of a camera and confirming and adjusting the focus thereof with accuracy even in a display apparatus of a camera-equipped portable terminal device, where the size and resolution thereof are limited.
US07893982B2 Solid-state image sensing device
When a signal output by a solid-state image sensing device is clamped to a predetermined reference potential, a high voltage generated in a transfer suspension period after the clamping as generally supplied to an A/D converter is generated. A sample/hold output Va is clamped to a clamp level Vref over a period of time between a halfway point of time of a signal of a picture element preceding ahead by one line and the end of an inhibit period of transfer clocks of a signal output by an empty transmission unit via a first clamp pulse and a sample/hold output for the second picture element, or a subsequent one of an OPB unit is clamped to the clamp level via a second clamp pulse to prevent a signal output from exceeding a reference voltage from being supplied to an A/D converter at a later stage.
US07893978B2 Image capture device having amplification circuit for amplifying signal from photoelectric conversion portion
An image capture device includes a plurality of image capture elements for capturing an object image, a plurality of vertical output lines for reading signals out of the plurality of image capture elements, and a plurality of processing circuits. Each processing circuit includes a first capacitor element having a first electrode connected to one of the plurality of vertical output lines, a differential amplifier having a first input terminal connected to a second electrode of the first capacitor element, a second capacitor element connected between the first input terminal and an output terminal of the differential amplifier, and a first switch configured to control conduction between the first input terminal and the output terminal of the differential amplifier. The image capture device further includes a plurality of third capacitor elements configured to hold signals from the differential amplifiers of the plurality of processing circuits and to limit an output frequency band of each differential amplifier, and a horizontal output line for sequentially outputting signals from the plurality of third capacitor elements.
US07893977B2 Multiplexing and offset correction system for an image sensor array
An imaging apparatus includes two subsets of photosensors, the two subsets being interleaved along a linear array. Each photosensor is connectable, by the operation of a shift register, to a reference line and a signal line, to permit double-sampling of signals therefrom. Each subset of photosensors is associated with its own reference line and signal line, and signals from the two subsets of photosensors can be read out largely simultaneously.
US07893975B2 System and method for processing images using predetermined tone reproduction curves
An automated RAW image processing method and system are disclosed. A RAW image and metadata related to the RAW image are obtained from a digital camera or other source. The RAW image and the related metadata are automatically processed using an Operating System service of a processing device to produce a resulting image in an absolute color space. When automatically processing, a predetermined tone reproduction curve is applied to the interpolate RAW image to produce the resulting image. The predetermined tone reproduction curve is derived from a plurality of reference images and is selected based on the metadata associated with the RAW image. The resulting image is then made available to an application program executing on the processing device through an application program interface with the Operating System service.
US07893972B2 Method and apparatus for real time identification and correction of pixel defects for image sensor arrays
An image processing system and method compares each pixel of an image obtained from an image sensor array with at least eight surrounding pixels of the same color in the filter array. If the signal of a given pixel is larger than the respective signals of all eight surrounding pixels of the same color, then the value of that central pixel signal is substituted with the maximum signal value among the surrounding eight pixels of the same color. Similarly, if the signal of a given pixel is smaller than the respective signals of all eight surrounding pixels of the same color, then the value of that central pixel signal is substituted with the minimum signal value among the surrounding eight pixels of the same color.
US07893969B2 System for and method of controlling a parameter used for detecting an objective body in an image and computer program
When detecting an objective body from a taken image, a scene of the image is determined, and a parameter to be used in detecting the objective body is controlled according to result of determination.
US07893967B1 Digital video camera with binning or skipping correction
A method of generating video and a video camera are disclosed. The method generally includes the steps of (A) generating an input signal by sensing an optical signal using a plurality of first pixels, wherein (i) the sensing is capable of a pixel reduction by at least one of binning the first pixels and skipping some of the first pixels and (ii) a plurality of first spatial separations among the first pixels in the input signal are (a) uniform both horizontally and vertically while the pixel reduction is inactive and (b) non-uniform while the pixel reduction is active, (B) generating a plurality of second pixels in response to the first pixels such that a plurality of second spatial separations among the second pixels are uniform both horizontally and vertically while the pixel reduction is active and (C) generating an output signal carrying the second pixels.
US07893964B2 Image correction apparatus, method thereof and electronics device
In an imaging device that generates a correction image by performing, on the basis of shake information on a target image, shake correction processing on the target image when a correction instruction is issued by a user while the target image is displayed on a display unit, and that displays the corrected image on the display unit, preceding correction performs the shake correction processing before the issuing of the correction instruction. To suppress an increase in power consumption, due to the preceding correction, however, the preceding correction is not performed when the amount of camera shake of a target image is determined to be too small by referring to the amount of shake of a target image. Moreover, the frequency of the issuing of correction instructions for a target image in the past is referenced, and in a case where the frequency is low, the preceding correction is not performed.
US07893962B2 Image output system having multiple devices communication-connected in master-slave relation
A printer periodically sends a request inquiry command “Interrupt In” to a digital camera at a high rate. The digital camera returns a printer status request, a print request, a print cancel request, etc., to the printer as a reply to “Interrupt In.” The camera operates as a usual storage class USB device for the printer except that the camera performs the described operation. Therefore, the printer makes a search for a directory in the camera and reads an image file, a print page layout file, etc., required for print on its own initiative.
US07893958B1 Vehicle video recorder
A video recorder which can be mounted on a surface, such as a windshield, on a vehicle, such as an automobile, for creating and recording images in response to a triggering event, such as a sudden deceleration, includes a housing which can be fixedly mounted onto the surface of the vehicle and a printed circuit board mounted inside the housing for rotational movement freely about its longitudinal axis. A camera is fixedly mounted onto the printed circuit board at right angles thereto. An inertia switch also mounted on the printed circuit board activates the camera for a predetermined time period when deceleration of a predetermined value is sensed. A pair of batteries, one on each side of the printed circuit board serve as counter weights to maintain the printed circuit board approximately vertical and the camera horizontal when the vehicle is on a horizontal surface and printed circuit board is in its “at rest” position regardless of the angular orientation of the surface of the vehicle on which the video recorder is mounted. A clutch couples a disk fixedly mounted on one end of the printed circuit board to the housing to lock the printed circuit board at its “at rest” portion. The pair of batteries on the printed circuit board also provide electrical power to the video recorder.
US07893955B2 Apparatus and method for displaying image data direction of terminal
An apparatus and method for displaying image data direction of a terminal displays direction information in case of displaying an object photographed through a camera installed in a terminal thus to maximize efficiency value of image information and utilize a multiplexing format including direction in an image as a basis data format. To achieve the purpose of the present invention, there is provided an apparatus for displaying image data direction of a terminal in accordance with the present invention comprising a direction sensor for detecting direction of a photographing object in a conventional terminal and a direction displaying apparatus for encoding and packetizing the converted digital direction signal. There is also provided a method for displaying image data direction of a terminal in accordance with the present invention comprising the steps of receiving an image frame from a base station, demultiplexing the received image frame in a multiplexing processing unit and separating the frame into voice, image and direction data and displaying the separated direction and image data on an LCD according to control of the direction displaying processing unit.
US07893949B2 Image display apparatus
An image display apparatus having a screen on which a plurality of images are one by one displayed and sequentially switched to another at a time interval. The apparatus includes an image storing portion and a display control portion. The image storing portion stores data of an actual image and data of a thumbnail image of the actual image such that the data of the actual image and the data of the thumbnail image are associated with each other. The display control portion selectively operates in one of a first mode and a second mode depending on information on the data of the actual image stored in the image storing portion. The display controlling portion controls to display, on the screen, an image based on the data of the actual image in the first mode, and an image based on the data of the thumbnail image in the second mode.
US07893946B2 Color temperature calibration methods and related devices
A color temperature calibration method for calibrating the color temperature of a display device according to a set of target chromaticity coordinate values, includes: measuring colors displayed by a plurality of display cells of the display device to generate at least a set of measurement chromaticity coordinate values; and adjusting at least a first gain value of the display device according to the set of target chromaticity coordinate values and the set of measurement chromaticity coordinate values; where the first gain value corresponds to the color of a first color channel of the display device; and the first color channel is one of the red color channel, green color channel and blue color channel.
US07893942B2 Three-dimensional graphic processing system and method capable of utilizing camera preview images
Provided is a three-dimensional (3D) graphic processing system and method capable of utilizing camera preview images in which the camera preview images are stored in a texture memory and then the stored camera preview images are used as a texture in a 3D graphic processor. The camera preview images are stored in a texture memory and then the stored camera preview images are used as a texture in a 3D graphic processor, in a manner that an extended function can be supported through a mutual operation of a preview processor and a graphic processor. The camera preview is displayed on the moving polygonal plane to which a near-and-far sense is applied, or the camera image is used as a background texture to then enable 3D objects to be drawn on the background texture. As a result, games with real feeling can be developed in a manner that 3D contents can be realized using real images as a background.
US07893940B2 Super resolution contextual close-up visualization of volumetric data
The present invention relates to a method and system for processing a volumetric dataset for providing close-up visualization of a subset therefrom. A volumetric dataset is processed based on a dual access gradient quantization data structure. The data structure is generated in a fast pre-processing stage and provides substantially immediate access to a quantized gradient using either an index or an arbitrary normalized vector. The method provides a clear, enlarged high-resolution image of a user selected region of interest at interactive rates and allows the user to freely move and visualize the region of interest within the volumetric dataset and with any orientation.
US07893937B2 Method for creating a parametric surface symmetric with respect to a given symmetry operation
The invention is directed to a method for creating a parametric surface symmetric with respect to a given symmetry operation (20). The invention method: (i) identifies a mesh pattern (15a); (ii) creates a base mesh (15s) from the mesh pattern, according to a symmetry operation; (iii) subdivides the base mesh, at a given order, into a subdivided mesh defining elementary faces; and (iv) forms the parametric surface (16s) according to said faces. The base mesh is symmetric with respect to the symmetry operation such as a reflection symmetry. The invention further concerns computer program product and systems implementing the method according to the invention.
US07893936B2 Generating efficient spatial indexes for predictably dynamic objects
Embodiments of the invention provide methods and apparatus for modifying a spatial index in response to movements of a predictably dynamic object within a three-dimensional scene. According to one embodiment of the invention, in contrast to generating a new spatial index in response to movement of a predictably dynamic object, a portion of an existing spatial index may be modified in response to the movement of a predictably dynamic object. According to one embodiment of the invention, modification may include changing information defining the position of splitting planes along a splitting axis to correspond to the new position of the object within the three-dimensional scene. In contrast to generating a new spatial index, by modifying only a portion of an existing spatial index the amount of time required to perform ray tracing image processing may be reduced.
US07893930B2 System for software interaction using handwritten strokes
A system for enabling user interaction with computer software which includes a printer for receiving print data, printing a form, using the print data, by printing information related to at least one text field coincident with coded data indicative of the text field, receiving indicating data from a sensing device and transferring the indicating data to a computer system to allow the interaction to be interpreted. The sensing device when moved relative to the text field senses the coded data and generates the indicating data using the sensed coded data to be indicative of the relative movement of the sensing device. The indicating data is indicative of a stroke defining a sequence of sensing device positions determined from the sensed coded data.
US07893926B2 Control arrangement for dental device and method of controlling dental device
A dental apparatus which comprises a dental device, a graphic display and a user interface connected functionally to one another, the user interface being arranged to be used in controlling functions of the dental device. The user interface is a touch pad and the graphic display comprises means for showing symbols describing control functions of the dental device and a cursor. The dental apparatus further comprises means for moving and controlling the cursor in response to a touch of a pointer means and its movement on the surface of the touch pad. A detachable and disinfectable film, which can be replaced by a new one after it has worn out, may be attached to the contact surface.
US07893925B1 Circuit for reading buttons and controlling light emitting diodes
A circuit including a first pin connection, a second pin connection, a first diode-switch arrangement and a second diode-switch arrangement. The first diode-switch arrangement is connected in series and configured to allow a current to pass from the second pin connection to the first pin connection. The second diode-switch arrangement is connected in series and configured to allow a current to pass from the first pin connection to the second pin connection. An energized state of the first and second diode-switch arrangements is determined according to a voltage detected on the first or second pin connection.
US07893921B2 Input device
An input device contains a plurality of push switch elements that are connected to a single switch signal line. When a switch signal is detected from the switch signal line, it is determined which push switch element is enabled based on coordinate data obtained from a primary input sensor. By using the coordinate data, only a single switch signal line is used to determine which push switch element is enabled.
US07893916B2 Luminance compensation device and method thereof for backlight module
A luminance compensation device for a backlight module and a method thereof are provided herein. In the present invention, a light sensor unit is utilized to sense a light intensity of the backlight module. A difference parameter based on the sensed light intensity and a preset luminance is calculated. Then, a gamma curve, a video data, or light intensity of the backlight module is adjusted according to the difference parameter. As a result, the level of display quality affected by the temperature or the aging of the backlight module can be reduced.
US07893913B2 Display device including a drive circuit, including a level shifter and a constant current source
Power consumption is reduced in a driving circuit of a display device capable of handling a low voltage amplitude input signal by employing level shifters that utilize a differential amplifier. The driving circuit is divided into a plurality of units and each unit is provided with a constant current source. In addition to a usual scanning circuit, there is provided a sub-scanning circuit for controlling ON/OFF of the constant current source arranged in each unit. The sub-scanning circuit turns ON only the constant current sources in the unit that is being scanned. A current thus can be supplied efficiently.
US07893912B2 Timing controller for liquid crystal display
A timing controller for a liquid crystal display device includes an error detection module that detects an error in signals input from an external source and generates a data signal based on the error in the signals, so as to display the data signal on a liquid crystal panel for a predetermined time period. Thus, the liquid crystal display device stably displays the data signal while compensating for the error in the input signals, thereby improving the image quality of the liquid crystal display device.
US07893906B2 Display device having improved substrate and method of manufacture
A display device having improved aperture ratio includes a switching element, a liquid crystal capacitor and a storage capacitor. The switching element is electrically connected to a gate line and a source line crossing each other. The liquid crystal capacitor has a pixel electrode electrically connected to the switching element through a first contact to define a pixel area. The storage capacitor has a storage line partially overlapping the source line. The storage line is electrically connected to the pixel electrode through a second contact hole.
US07893903B2 Liquid crystal display apparatus capable of maintaining high color purity
A liquid crystal display apparatus having first white color light sources and blue and/or red second coloring light sources disposed on a back side of a liquid crystal panel, and an image quality processing calculation circuit for detecting a brightness of input image signals, in accordance with a detection result, controlling intensities of the first white color light sources and/or second coloring light sources and correcting pixel signals to be supplied to the liquid crystal panel.
US07893899B2 Organic light emitting diode display and fabricating method thereof
An organic light emitting diode display and a fabricating method thereof are disclosed. Embodiments provide an organic light emitting diode display and a fabricating method thereof which prevents a pixel and a driver included in the organic light emitting diode display from being damaged due to an electrostatic discharge by forming a protective layer along at least one edge region of a substrate having a pixel region and a non-pixel region.
US07893894B2 Organic light emitting display and driving circuit thereof
An organic light emitting display and a driving circuit therefor to prevent a variation in scanning signals supplied to scan lines due to coupling capacitance caused by scan lines and data lines that intersect each other and to prevent a variation in the scanning signals due to a leakage current from an output terminal. The display and driving circuit include first, second, and third scan drivers each electrically coupled to each of first, second and third clock lines to control output signals to scan lines. The display and driving circuit may include multiple scan drivers and multiple clock lines, which correspond to a total number of scan lines.
US07893893B2 Driving arrangement for an OLED panel
In a driving arrangement for an OLED panel, by using different voltage levels for a gate driver and a source driver, a driving voltage higher than a wafer process voltage is produced for the OLED panel and therefore improves the picture quality.
US07893892B2 Image display device and the color balance adjustment method
A circuit for generating drive signals (SHR, SHG and SHB) from an input image signal (SIN), a cell array (1) including a light emitting element (EL) for emitting light of a predetermined color of red (R), green (G) or blue (B) by being applied with a drive signal (SHR, SHG and SHB) supplied for each color from the circuit (2), an adjustment information retrieve means (4) for obtaining information relating light emission adjustment of the light emitting element (EL), and a level adjustment circuit (2B) provided in the circuit (2) for changing a level of an RGB signal (S22) before divided to drive signals (SHR, SHG and SHB) for the respective RGB colors based on the information obtained by the adjustment information retrieve means (4) are provided. In the present invention, color balance adjustment can be performed by the above small scale circuit.
US07893889B2 Multiple-antenna device having an isolation element
A multiple-antenna device is provided, comprising: a printed circuit board having a ground plane configured to provide electromagnetic isolation between a first side of the printed circuit board and a second side of the printed circuit board; a first non-conductive support member formed over the first side of the printed circuit board; a second non-conductive support member formed over the second side of the printed circuit board; a first antenna formed over the first non-conductive support member; and a second antenna formed over the second non-conductive support member, wherein the first antenna is electrically connected to a first feed point on a first portion of the printed circuit board that is not connected to the ground plane, and wherein the second antenna is electrically connected to a second feed point on a second portion of the printed circuit board that is not connected to the ground plane.
US07893882B2 Pattern shaping of RF emission patterns
A metallic shaping plate located in the interior housing of a wireless device is disclosed. The metallic shaping plate may influence a radiation pattern being generated by a horizontal antenna array. The result may be an increase in the gain of the array.
US07893878B2 Integrated circuit antenna structure
An integrated circuit (IC) antenna structure includes a die, a package substrate, an antenna element, a ground plane, and a transmission line. The antenna element is on the die and/or package substrate and has a length in the range of approximately 1¼ millimeters to 2½ millimeters. The ground plane has a surface area larger than a surface area of the antenna element. The transmission line is on the die and/or the package substrate and includes a first line and a second line, wherein at least the first line is electrically coupled to the antenna element.
US07893876B2 System and method for determining locations of medical devices
The location of a medical device is determined by receiving one or more signals at the medical device transmitted by one or more beacons, respectively, at known locations. The one or more signals received at the medical device are sent from the medical device to a processor, which determines the location of the medical device based on the received one or more signals. One of the beacons may be a portable patient beacon, the location of which is determined when its signal is received by a medical device, the location of which was previously determined.
US07893869B2 Global navigation satellite system
Each of a first and a second navigation satellite system (NSS) are adapted to operate according to a first and a second specification, respectively, and each includes a first and a second plurality of satellite vehicles (SV), respectively. Each of the first and the second plurality of SVs are adapted to be identified by a first and a second plurality of unique corresponding identifications (IDs), respectively. A processor is adapted to receive and identify a first plurality of corresponding signals transmitted from the first plurality of SVs in response to the first plurality of unique corresponding IDs. The processor is adapted to receive and identify a second plurality of corresponding signals transmitted from the second plurality of SVs in response to the second plurality of unique corresponding IDs. The processor is adapted to determine position location information in response to receiving and identifying the first plurality of corresponding signals and the second plurality of corresponding signals.
US07893864B2 Radar apparatus and control method of the same
A radar apparatus is provided. An antenna is configured to transmit a frequency-modulated transmission wave toward an object and receive a reception wave from the object. A mixer is configured to mix the transmission wave with the reception wave to generate a beat signal having a first beat interval and a second beat interval. A detecting section is configured to detect a plurality of first peak signals contained in the first beat interval of the beat signal and a plurality of second peak signals contained in the second beat interval. A grouping section is configured to group the second peak signals. A searching section is configured to search a part of the first peak signals corresponding to the grouped second peak signals. A separating section is configured to separate the part of the first peak signals from the other part of the first peak signals.
US07893861B2 Time-to-digital based analog-to-digital converter architecture
Apparatus and methods are provided relating to time-to-digital based analog-to-digital converter. An apparatus includes a time-to-digital converter based analog-to-digital converter for generating a first signal and a second signal having a timing relationship between a rising edge of the first signal and a rising edge of the second signal based on a sampled input analog voltage level, and converting the timing relationship into a corresponding time-to-digital representation. The time-to-digital representation is obtained without any voltage comparison and current comparison.
US07893859B2 Converter circuit, analog/digital converter, and method for generating digital signals corresponding to analog signals
A charge corresponding to an analog signal Vi is accumulated in first and second capacitors 25, 27, respectively. A digital signal VDIGN having a digital value (D1, D0, for example) corresponding to the analog signal Vi is generated. By connecting the second capacitor 27 between an output 21c and an inversion input 21a of an operational amplifier circuit 21 and supplying a first capacitor end 25a with an analog signal VD/A corresponding to the digital signal VDIGN, a first conversion value VOUT1 is generated in the output 21c of the operational amplifier circuit 21. By connecting the first and third capacitors 25, 33 between the output 21c and inversion input 21a of the operational amplifier circuit 21 and supplying a second capacitor end 27a with the analog signal VD/A, a second conversion value VOUT2 is generated in the output 21c of the operational amplifier circuit 21.
US07893844B2 Fall detection system having a floor height threshold and a resident height detection device
A system for tracking a location of a resident includes a resident height detection device (e.g., a small pendant, bracelet or other wearable device) and a receiver/dialer. When the system detects that the resident height detection device has remained within a threshold distance of the floor (e.g., 8 to 16 inches) for more than a given period of time (e.g., 15 seconds), an alarm condition signal would then be sent to a receiver/dialer elsewhere in the residence which would then forward an emergency signal to a caretaker or to an emergency operator by way of the receiver/dialer. The resident height detection device may further include an override switch to turn off tracking when the resident intends to be on the floor for an extended period of time.
US07893843B2 Activity windowing
Methods, devices, and systems for monitoring a number of recurrent activities of an individual are disclosed. One method for monitoring a recurrent activity of an individual using activity windowing includes recording a number of sensor activations of at least one sensor, determining a number of peaks in the number of sensor activations, defining one or more time frames based upon the location of at least one of the number of peaks in the time period, and applying a rule associated with a threshold number of activations, where the rule is applied to at least one particular time frame in order to determine whether to initiate an action.
US07893841B2 Determining cartridge conflicts with deep slot technology
A library includes a frame, a plurality of cartridge slots disposed within the frame and at least one counter configured to determine the presence of cartridges stored within the plurality of cartridge slots without removing the cartridges. The library also includes at least one controller in communication with the counter and configured to count a number of cartridges within the cartridge slots and compare the counted number to a capacity on demand value.
US07893837B2 Packing material, tag, certificate, paper money, and securities
A packing material, a tag, a certificate, paper money, and securities, each of which can be surely prevented from counterfeit or deception, are disclosed. According to the present invention, a plurality of wireless tags is used for an object such as a packing material, a tag, a certificate, paper money, or securities. The location of the plurality of wireless tags attached to each of the object is varied on the object basis such that the object can be identified. Then, the object using the wireless tag is identified by detecting the location of the plurality of wireless tags attached to each of the object. The more random the locations of the wireless tags, the more certain it becomes to identify the object and to prevent or detect the counterfeit and the deception of the object.
US07893836B2 Method and apparatus for avoiding collision between each of radio frequency identification readers
Provided are a method and an apparatus for avoiding a collision between each of radio frequency identification (RFID) readers. The method and the apparatus divide the RFID readers into first RFID readers and second RFID readers according to a maximum output level, and set first frequency channels for the first RFID readers and second frequency channels for the second RFID readers, set frequency channel disposition information for each of the first RFID readers, generate a channel holding signal in each of the first frequency channels, and if a frequency channel usage request or a frequency channel return request is received from one of the first RFID readers, stop generating or generate the channel holding signal in a frequency channel related to the frequency channel usage or return request. In this manner, the collision between each of the RFID readers is avoided by preventing the second RFID readers from using the first frequency channels for the first RFID readers. Also, the method and the apparatus can efficiently manage frequency channels by controlling a ratio of the number of the first frequency channels to be used by the first RFID readers and the number of the second frequency channels to be used by the second RFID readers, according to usage frequency.
US07893833B2 Inline system for collecting stage-by-stage manufacturing metrics
A radio frequency identification (RFID) tag is coupled to a circuit board to track the specific operating and environmental conditions of each manufacturing stage as the circuit board passes through the manufacturing stages. An RFID reader and data collector are used at each stage to read the RFID tag and store its identifying information along with processing information, operating conditions, and results for each stage. This permits to quickly and accurately collect manufacturing information for each circuit board at various manufacturing stages as well as the operating conditions for each stage at a particular time. Such manufacturing metrics can then be retrieved on a stage-by-stage basis for a particular circuit board by an identifier printed on the circuit board.
US07893831B2 Entrapment prevention sensor for opening and closing door of vehicle
An entrapment prevention sensor detecting an entrapment of an obstacle between an opening and closing door of a vehicle constituting a first member and including a corner portion and a periphery of a body opening portion constituting a second member, includes a protector including an assembly portion and a hollow portion, the assembly portion assembled onto a fitting flange provided at one of the first and second members, the assembly portion prevented from being provided at the corner portion, a sensor main body accommodated within the hollow portion, and a corner member provided at the corner portion and including a receiving portion and a fixed plate portion, the receiving portion having a hollow and curved shape corresponding to a shape of the corner portion and accommodating the sensor main body, the fixed plate portion including a clip bore and fixed to the fitting flange by means of a clip.
US07893827B2 Method of measuring signal strength in a wireless sensor system
A low cost, robust, wireless sensor that provides an extended period of operability without maintenance is described. The wireless sensors are configured to communicate with a base unit or repeater. When the sensor unit detects an anomalous ambient condition (e.g., smoke, fire, water, etc.) the sensor communicates with the base unit and provides data regarding the anomalous condition. The sensor unit receives instructions to change operating parameters and/or control external devices.
US07893825B2 Alarm origination latching system and method
An embodiment of the invention provides a method including detecting a select hazardous condition by at least one triggering alarm unit of a plurality of interconnected hazardous condition alarm units. An actuatable latch in the triggering alarm unit is switched from an unlatched state to a latched state. An audible alert is generated in all of the interconnected alarm units. A test switch is actuated to identify the triggering alarm unit. Actuating the test switch disables the audible alert in each alarm unit having an actuatable latch in the unlatched state. A reset switch is actuated in only one of the alarm units to reset the actuatable latch in each of the alarm units to the unlatched state.
US07893824B2 Alarm control apparatus
An alarm control apparatus which collects alarms from an equipment of a plant and handles the alarms includes a support information collecting section which adds support information for managing the equipment to the alarms.
US07893823B2 Sequential brake light system
A sequential brake light system for road vehicles has a brake light array of plural lights in a linear, concentric or radial series. A master and slave controllers are connected to the array for lighting the lights in sequence and repeatedly at a rate that is proportional to a deceleration of the vehicle upon braking. A speed sensor senses the instantaneous vehicle speed and deactivates the master controller if the speed is below a threshold value so that the array is not powered in stop-and-go traffic. A brake position sensor senses a position of the vehicle brake pedal and an accelerometer measures deceleration of the vehicle, so that the master controller receives signals corresponding to the instantaneous speed of the vehicle, a signal corresponding to the position of the brake pedal and a signal corresponding to the deceleration of the road vehicle for properly warning a trailing drive of the braking condition of the road vehicle.
US07893818B2 System and method for communicating vehicular information with a remote location
A system and method for communicating vehicular information with remote locations may include communicating data from a wireless interface of a vehicle with a locally positioned wireless device. The wireless device may be configured to enable a user to communicate with other users of wireless devices. Receipt of the internal signal may cause the wireless device to communicate the data to a remote location. The remote location may be a service provider or public safety organization located on a network, such as the public switched telephone network or wireless communications network (e.g., mobile telephone network).
US07893817B2 Apparatus and method for initializing telematics terminal
A method and apparatus for initializing a telematics terminal includes generating a door open signal corresponding to an open state of a door of a vehicle. The telematics terminal is initialized based on the door open signal. An accessory signal corresponding to a position or change in operating state of an ignition switch may be generated. At least one telematics module within the vehicle can be initialized based on the door open signal or the accessory signal.
US07893815B2 Method for selecting one or several transponders
A method for selecting at least one transponder or a sensor in RFID or remote-sensor systems provided with a plurality of transponders or sensors (tags), in particular in systems provided with a plurality of reading devices, is disclosed. The inventive method includes the feature that in pre-selecting individual transponders or sensors by at least one reading device and, after the successful selection of at least one transponder or sensor, data, in particular for conforming the preselection, is asynchronously transmitted during at least one protocol section from the transponder or sensor to the reading device. The invention makes it possible to efficiently reduce the potentially disturbing control signals of the reading device(s), thereby improving the transmission characteristics of said systems.
US07893811B2 Method for automatically ascertaining the number of people and/or objects present in a gate
Method for automatically ascertaining the number of people and/or objects present in a gate (10; 50; 70) which has the following steps: detection of weight data for people and/or objects moving in the gate (10; 50; 70) by means of a plurality of weight sensors (18, 20, 22, 24) integrated in the floor of the gate (10; 50; 70) and evaluation of the detected weight data in order to ascertain the number of people/objects from their maximum values and from their dynamics and/or the number of detected centers of gravity and/or the position of the weight sensors (18, 20, 22, 24) which have detected the weight data, and/or the order in which the weight sensors (18, 20, 22, 24) have detected the weight data.
US07893809B2 Service disconnect assembly for a high voltage electronic module
A service disconnect assembly for an electronic module includes a fuse carrier having a holder configured to hold a fuse for the electronic module, where the fuse carrier has an attachment finger extending from the holder. The attachment finger has a peg. The service disconnect assembly also includes a service disconnect cover having a hood forming a channel, with the hood having a window exposing a portion of the channel. The attachment finger is received in the channel to couple the fuse carrier to the service disconnect cover. The service disconnect cover is slidable with respect to the fuse carrier between an initial position and a final position, wherein the hood moves with respect to the attachment finger as the service disconnect cover is moved between the initial and final positions. The peg is aligned with the window in the final position. A handle is rotatably coupled to the service disconnect cover and the handle has a catch aligned with the window. The handle is movable to a locked position wherein the catch blocks the peg to prevent relative movement between the service disconnect cover and the fuse carrier.
US07893804B2 Electric coil and core cooling method and apparatus
Provided is an electrical apparatus comprising a magnetic core, a conductive coil wound around at least a part of the core, a cooling element configured to receive a cooling fluid to cool the core and the coil during operation, and at least one biasing element operatively associated with the core to urge the core and the coil into engagement with the cooling element despite differential expansion or contraction of the core and the coil and manufacturing tolerances. Further provided is a method for making an electrical apparatus comprising disposing a conductive coil wound around at least a part of a magnetic core, disposing a cooling element between the core and the coil, the cooling element configured to receive a cooling fluid to cool the core and the coil during operation, and urging the core and the coil into engagement with the cooling element despite differential expansion or contraction of the core and the coil and manufacturing tolerances.
US07893800B2 Vehicle switch
A vehicle switch includes a magnet mounted to an operating unit accommodated in an external packaging such that the operating unit can move linearly. A magnetic detector is placed so as to receive different strength of the magnetism from the magnet in the two cases that the operating unit is at the upper limit position and at the lower limit position. A control circuit coupled to the magnetic detector opens and closes a switching device in response to strength of the detected magnetism.
US07893799B1 MEMS latching high power switch
A microelectromechanical (MEMS) switch includes a substrate, a force-activated latching mechanism, and a spring-loaded shuttle. The latching mechanism has a proximal end and a distal end. In an embodiment, the latching mechanism includes two flexible latch arms each fixed at or about a proximal end and having a free distal end, and a connector connecting the latch arms. The spring-loaded shuttle includes a shuttle portion including a portion configured for engaging portions of the latch arms. The shuttle portion further being configured to translate about the substrate. The latching mechanism and the shuttle may be configured to include an electrical contact layer such that when the latch arms are engaged with the shuttle portion, a closed electrical circuit can be formed.
US07893797B2 Line circuit breaker and magnet yoke for a line circuit breaker
In line circuit breakers with a combined overcurrent/short-circuit current tripping device, tripping should take place in a well defined manner in the case of an overcurrent and in the case of a short-circuit current. For this purpose, gaps (A, B) need to be set precisely. If the housing is made from a cost-effective housing material such as thermosetting plastic it is subject to shrinkage. As a result, the mentioned gaps may change. An armature (24) is mounted in such a way that it changes its rest rotary position in the event of shrinkage of the housing. A magnet yoke (28) as part of the overcurrent/short-circuit current tripping device is mounted and shaped in such a way that the rotation is compensated for precisely, so that the mentioned gaps do not change despite the shrinkage.
US07893793B2 Film bulk acoustic wave resonator and method for manufacturing the same
A film bulk acoustic wave resonator including a piezoelectric body 1, and a first electrode 2 and a second electrode 3 that are provided respectively on the main surfaces of the piezoelectric body, the piezoelectric body being applied an electric field through the first and the second electrodes so as to generate a resonant vibration. A first mass load material portion 4 having an annular shape is provided outside the planar region of the first electrode on the main surface of the piezoelectric body, a mass load effect thereof being larger than that of the first electrode. The outer periphery of the first electrode and the inner periphery of the first mass load material portion are spaced apart from each other, whereby the first electrode and the first mass load material portion are electrically insulated from each other. The first mass load material portion has a laminated structure including a first auxiliary electrode layer 2a and a load material layer 4a formed on the auxiliary electrode layer. The first auxiliary electrode is formed with the same material to have the same thickness as the first electrode. Energy loss can be reduced, while the first mass load material portion can be formed easily with high precision.
US07893789B2 Waveguide transitions and method of forming components
A waveguide transition for transitioning from an overmoded waveguide to another waveguide is provided, where one end of the waveguide is configured to connect to a rectangular waveguide and the other end is configured to connect to an elliptical waveguide. The transition has an internal shape having top and bottom walls and two side walls. The top and bottom walls are shaped to join smoothly with waveguides at each end of the transition, while the side walls diminish in height along the length of the transition. The waveguide transition may employ mode filtering to suppress unwanted higher modes. A method of forming waveguide components is also disclosed, involving thixoforming of components in single pieces, the components having internal shapes configured for mold core removal.
US07893788B2 Charge pump-based frequency modulator
A charge pump-based frequency modulator is provided. The charge pump-based frequency modulator comprises an analog phase correction path comprising a varactor and a charge pump. The varactor is coupled to an output of the charge pump-based frequency modulator. The charge pump is coupled to a node between the varactor and the output and receives a signal containing the modulated data.
US07893783B2 Resonator, oscillator, and communication apparatus
Disclosed is a resonator including a plurality of resonator elements each including at least oscillation parts and lower electrodes with an intervening space therebetween, in which the plurality of resonator elements are disposed in a closed system and the oscillation parts of the plurality of resonator elements are continuously formed in an integrated manner.
US07893773B2 Phase locked loop modulator calibration techniques
A method for calibrating a phase locked loop begins by determining a gain offset of a voltage controlled oscillator of the phase locked loop. The processing then continues by adjusting current of a charge pump of the phase locked loop based on the gain offset.
US07893772B1 System and method of loading a programmable counter
A system and method of loading a programmable counter includes storing a first digital divide value in a register. The first digital divide value is then loaded from the register to a programmable counter. The method further includes writing a second digital divide value to the register at a time responsive to a time remaining to complete a counting cycle of the programmable counter.
US07893768B2 Automatic gain control
A method and system for providing automatic gain control for a differential amplifier are provided. An impedance network is set to have a first impedance that corresponds to a first gain for a differential amplifier, which amplifies an input signal by the first gain. Once the amplified input signal is greater than a first threshold voltage, the impedance network is set to have a second impedance that corresponds to a second gain for the differential amplifier, which amplifies the input signal. Once amplified input signal is greater than a second threshold voltage and a predetermined period has lapsed, the impedance network is reset to have the first impedance that corresponds to a first gain for the differential amplifier.
US07893756B2 Precision current source
A device for providing a precision current includes a first operational amplifier and multiple path transistors. The first operational amplifier outputs a gate voltage based on reference voltage and input voltages. The path transistors have corresponding gates for receiving the gate voltage from the first operational amplifier. Each path transistor is connected to a first enable transistor configured to selectively connect the path transistor to a reference path and a second enable transistor configured to selectively connect the path transistor to an output path. The first and second enable transistors are separately enabled by first and second enable signals, respectively. At least one path transistor is connected to the reference path through a corresponding first enable transistor to provide the reference current, and least one other path transistor is connected to the output path through a corresponding second enable transistor to provide the precision current based on the reference current.
US07893753B2 Booster circuit, semiconductor device, and electronic apparatus
A conventional circuit requires a booster circuit for generating a voltage higher than an external power supply voltage, thus low power consumption is difficult to be achieved. In addition, a display device incorporating the aforementioned conventional switching element for booster circuit has problems in that the current load is increased and the power supply becomes unstable with a higher output current. The invention provides a booster circuit including a first transistor, a second transistor, a first capacitor element, a second capacitor element, a diode, and an inverter, wherein one electrode of the first transistor is maintained at a predetermined potential, the output of the inverter is connected to the gate electrode of the first transistor and one electrode of the second transistor through the second capacitor element, the input of the inverter is connected to the other electrode of the first transistor through the first capacitor element and connected to the gate electrode of the second transistor, and the diode is connected between the other electrode of the first transistor and the other electrode of the second transistor so as to be forwardly biased.
US07893752B2 Charge pump circuit with control circuitry
A reversal charge pump circuit generates a negative voltage from an input voltage received from an input terminal, and provides an output terminal with the negative voltage. The charge pump circuit achieves increased voltage stability and avoids breakdown voltage problems, with an uncomplicated structure. The circuit may have first and second capacitors, first through fourth switches, and a voltage control circuit. The voltage control circuit controls the voltage provided to the first capacitor. The switches are on/off controlled by signals from a control circuit.
US07893751B2 Method and circuit for protecting a MOSFET
An integrated circuit includes a transistor. During operation a current slew-rate is determined based on a duration the transistor has been conducting and a current flowing through the transistor. The transistor can then be controlled to switch to its non-conducting state using the slew-rate.
US07893749B2 High frequency switch circuit having reduced input power distortion
There has been a problem that the distortion characteristic of a switch circuit for a high frequency is deteriorated. A switch circuit in accordance with one aspect of the present invention includes a transistor connected in series between input and output terminals, a control terminal that receives a signal to control the conductive state of the transistor, a first resistor connected between the control electrode of the transistor and the control terminal, and a series circuit of a diode and a second resistor, the series circuit being connected in parallel with the first resistor between the control terminal and the control electrode of the transistor.
US07893745B2 Wideband programmable phase shifting circuit
The wideband programmable phase shifting circuitry includes a charge pump, a comparator, and a voltage reference generator block. An input signal controls the charge pump which charges and discharges a capacitor connected to an output of the charge pump. The comparator continuously compares the voltage across the capacitor with a reference voltage, ratio of VREF, which is generated by the voltage reference generator block. The voltage VREF is generated to compensate for power supply and integration process variations. The voltage reference generator is comprised of a charge pump unit, a frequency divider unit, switches, and two capacitors. The adjusted VREF ratio controls the comparator threshold level and hence a programmable phase difference between the input signal of the charge pump and the output signal of the comparator.
US07893744B2 Semiconductor device
A semiconductor device includes: a voltage-control-type clock generation circuit having a plurality of stages of first delay elements and whose oscillation frequency is controlled according to a control voltage applied to the first delay elements; a delay circuit having a plurality of stages of second delay elements connected serially; and a selection circuit selecting one from pulse signals output by the plurality of stages of respective second delay elements. The first delay elements and the second delay elements have a same structure formed on a same semiconductor substrate, and a delay amount of the second delay elements is adjusted according to the control voltage.
US07893741B2 Multiple-stage, signal edge alignment apparatus and methods
Signal edge alignment embodiments include multiple delay stages connected in series. Each delay stage includes a delay line, an interface circuit, and a tap selection circuit. The delay line applies fixed-width delays to an input signal to produce delayed versions of the input signal at a plurality of taps. The interface circuit, which is characterized by an inherent interface circuit delay, passes one of the delayed versions to an interface circuit output in response to a control signal. The tap selection circuit determines a finally-identified tap of the plurality of taps by determining an initially-identified tap at which a delayed version of the input signal most closely has a desired alignment with the input signal, and by identifying the finally-identified tap in the control signal as a tap that occurs earlier in the delay line than the initially-identified tap. This compensates for the inherent delay of the delay stage.
US07893735B2 Reset circuit and system having reset circuit
In a power-on detection circuit, a first connection node at which a first divided voltage is generated is connected to a second power supply line during activation of a power-down detection signal. Inactivation timing of the power-down detection signal is set earlier than an activation timing of a power-on detection signal. Therefore, the first transistor whose gate is connected to the first connection node is certainly turned off in the first half of a power-on period, which prevents the power-on detection signal from being activated during the power-on period. Further, a leak current flowing through the first transistor is reduced. In the second half of the power-on period, the power-on detection signal is certainly generated using the first divided voltage generated by the first dividing circuit. Thus, operating a reset circuit without malfunction and normally outputting a reset signal is possible disregarding behavior of a power supply voltage at power-on.
US07893731B2 AC/DC input buffer
A non-inverting AC/DC input buffer combines the desirable characteristics of an alternating current (AC) input buffer including low delay, high speed, and high input voltage swing range with the desirable characteristics of a direct current (DC) input buffer including stability, reliability, and ‘automatic’ high and low data setup. The AC/DC buffer includes logic to help prevent the DC input buffer from interfering with the AC input buffer until the DC input buffer has completed its operations on a transitioning input. The DC buffer is configured to enable the AC buffer to process low input voltage swings such as, for example, voltage swings less than the difference in power supply voltages.
US07893730B2 Level shifter and driving circuit including the same
The present invention related to a driving circuit including a level shifter. The driving circuit according to exemplary embodiment of the present invention includes a first level shifter, a second level shifter, and a gate driver. The first level shifter includes a path along which a pulse-on current flows in response to an on-control signal and a path along which a pulse-off control flows in response to an off-control signal. The second level shifter includes a path along which an on-current flows in response to the on-control signal and a path along which an off-control flows in response to the off-control signal. The gate driver turns on the switch in response to the pulse-on current, maintains the turned-on switch in the turn-on state in response to the on-control current, turns off the switch in response to the pulse-off current, and maintains the turned-off switch in the turn-off state in response to the off-control current.
US07893725B2 Delay locked loop circuit
The disclosure relates to phase detectors. Charge up and charge down signals that are generated by a phase detector cause i) following detection of a first edge of a reference clock signal, switching on of a switching transistor of sink current; ii) following detection of an edge of a feedback clock signal falling within less than 180 degrees from the first edge, switching on of a switching transistor of source current and switching off of the switching transistor of sink current; and iii) following detection of an edge of another reference signal at a point in time about midway between the first edge and a next similar edge of the reference clock signal has past, switching off of the switching transistor of source current while maintaining the switching transistor of sink current switched off.
US07893724B2 Method and circuit for rapid alignment of signals
Circuits and methods for aligning two or more signals including a first and second signal. In one embodiment, a shift register generates two or more shifted copies of the second signal, and each of a plurality of phase detectors receives the first signal and one of the shifted copies of the second signal, each phase detector providing an output indicating whether the first signal is substantially aligned with the shifted copy of the second signal. A multiplexer may also be provided for receiving each of the shifted copies of the second signal, the multiplexer having a plurality of select lines coupled with the output signals of the phase detectors. Some embodiments may include a power saving mode.
US07893721B2 Dual rail domino circuit and logic circuit
In a dual rail domino circuit 3 using a combination of a domino circuit 1 for outputting positive logic and a domino circuit 2 for outputting negative logic, an AND 4 and a NAND 5 as members for simultaneously fixing an output of the domino circuit 1and an output of the domino circuit 2 at a low level in an evaluation phase are provided, and a logical AND of a gating control signal and an input signal is inputted to the domino circuit 1 and a logical NOT of the logical AND of the gating control signal and the input signal is inputted to the domino circuit 2.
US07893719B2 Apparatus and methods for self-biasing differential signaling circuitry having multimode output configurations for low voltage applications
A digital data transmitting device is disclosed having differential signaling circuitry, a current source controller and a pair of transistor-implemented current sources is disclosed. The current source controller generates a current source control signal based on a detected mode of operation of the differential signaling circuitry. The pair of transistor-implemented current sources selectively generate source currents to adjust the output voltage levels as the differential output terminals in response to the current source control signal. The digital data transmitting device may also include a current bulk biasing circuit that generates a current source bulk biasing signal such that when the differential signaling circuitry is in one mode of operation, the current source bulk biasing signal retards currents leakage across the pair of transistor-implemented current sources.
US07893718B2 High-speed multiplexer and semiconductor device including the same
High speed multiplexers include a first N-to-1 selection circuit, where N is an integer greater than one, a second N-to-1 selection circuit and an output driver. The first N-to-1 selection circuit is configured to route a true or complementary version of a selected first input signal (from amongst N input signals) to an output thereof in response to a first multi-bit selection signal, where N is an integer greater than one. The second N-to-1 selection circuit is configured to route a true or complementary version of the selected first input signal to an output thereof in response to a second multi-bit selection signal. The output driver includes a pull-up circuit, which is responsive to a signal generated at the output of the first N-to-1 selection circuit, and a pull-down circuit, which is responsive to a signal generated at the output of the second N-to-1 selection circuit.
US07893716B1 Hotsocket detection circuitry
Hotsocket detection circuitry is provided for detecting hotsocket conditions in integrated circuits such as programmable logic device integrated circuits. Power-on-reset circuitry may provide a power-on-reset signal that is indicative of when power supply voltages are ready to power circuitry on the integrated circuit for normal operation. A delay circuit that is powered by a power supply voltage may receive the power-on-reset signal and may generate a corresponding delayed version of the power-on-reset signal. The delayed version of the power-on-reset signal may be provided to the hotsocket detection circuitry to ensure that the hotsocket detection circuitry produces a hotsocket signal that transitions after a transition in the power-on-reset signal. The delay circuit may include one or more inverter stages.
US07893714B2 High voltage analog multiplex switch integrated circuit architecture
An integrated circuit high voltage analog switch has digital logic-level control interface circuit. A level translator is coupled to the digital logic-level control interface circuit. A plurality of output multi-channel high voltage switches is coupled to the level translator.
US07893712B1 Integrated circuit with a selectable interconnect circuit for low power or high performance operation
An integrated circuit, such as a field programmable gate array or other configurable logic device, has an interconnect circuit selectively configurable to operate in a high-speed mode or in a low-power mode. The interconnect circuit is operable from a higher voltage supply or a lower voltage supply to change operating modes without reconfiguring data paths.
US07893709B2 Termination circuit
In order to prevent malfunction due to fluctuations in signal level, a terminating resistor circuit includes terminating resistors the connections whereof to an input/output terminal are capable of being turned on and off, whereby a Thevenin termination is formed. A control circuit exercises control so as to temporally stagger on/off timings of respective ones of the terminating resistors.
US07893708B2 Quantum gate operations with a common coupled resonator
Systems and methods are provided for performing a quantum gate operation. A first classical control parameter is associated with a first qubit and coupled to a resonator. The first classical control parameter is transitioned from a first control value to a second control value. The first classical control parameter is returned from the second control value to the first control value via an adiabatic sweep operation, as to permit a transfer of energy between the first qubit and the resonator that causes a change in the quantum state of the qubit and resonator.
US07893706B2 Test apparatus for liquid crystal display device and test method using the same
A test apparatus for a liquid crystal display device includes: a stage having a substrate thereon; a plurality of light emitting diodes (LEDs) on the stage and supplying a light to the substrate; a heating nozzle supplying a hot air to the substrate; a needle applying a test signal to the substrate; and a microscope inspecting the needle and the substrate.
US07893702B2 Apparatus for testing semiconductor device package and multilevel pusher thereof
A semiconductor package testing apparatus comprises a test substrate that electrically tests a semiconductor package chip; a socket having an electrical contact between the test substrate and the semiconductor package; an insert block inserted into the socket, wherein the semiconductor package is mounted to the insert block; and a pusher that brings the socket into contact with the semiconductor package by compressing an upper part of the semiconductor package, wherein the pusher is multilevel-controlled to compress the semiconductor package by a predefined pressure according to a thickness of the semiconductor package.
US07893700B2 Configuration of shared tester channels to avoid electrical connections across die area boundary on a wafer
A process or apparatus for testing a plurality of semiconductor dies on a semiconductor wafer utilizing a tester configured to test the dies in groups can include controlling as a logical whole provision of first test signals through a plurality of first communications channels to first probes organized into a plurality of N first probe die groups each configured to contact a different one of the dies of the wafer. One of the first communications channels can be a first common communications channel connected to probes in X of the N first probe die groups but not to probes in Y of the N first probe die groups. X can be at least two and Y can be at least one. The process can also include controlling as a logical whole provision of second test signals through a plurality of second communications channels to second probes organized into a plurality of second probe die groups each configured to contact a different one of the dies of the wafer. One of the second communications channels can be a second common communications channel connected to probes in all of the second probe die groups and probes in each of the Y of the first probe die groups.
US07893696B2 Pulse circuit using a transmission line
A circuit is provided wherein a test pulse is provided to a device under test. A module allows the test pulse to pass through to the device under test. The module blocks a reflected pulse from passing through to the device under test when the reflected pulse has an opposite polarity from the polarity of the test pulse. In some cases, the reflected pulse may be detrimental to the device under test if it is not prevented from reaching the device under test. In one embodiment, when a second reflected test pulse is traveling away from the device under test, the module allows the second reflected test pulse to pass through.
US07893694B2 System, method, and article of manufacture for determining an estimated combined battery state-parameter vector
A system, a method, and an article of manufacture for determining an estimated combined battery state-parameter vector are provided. The method determines the estimated combined battery state-parameter vector based on a plurality of predicted combined battery state-parameter vectors, a plurality of predicted battery output vectors, and a battery output vector.
US07893688B2 Permanent magnet type position sensor
A position sensor includes a longitudinally extending permanent magnet member at least two longitudinally extending arc-shaped projecting elements respectively projecting from the opposite ends toward the inside space to confront each other at a distance and a pair of compatible main magnetic sensors disposed in the inside space along the longitudinal axis at an interval so as to generate a pair of output signals when the permanent magnet member shifts along the longitudinal axis. The opposite ends of the permanent magnet member are configured to surround a common inside space and polarized to have opposite magnetic poles so as to provide in the inside space a magnetic field whose magnetic flux density becomes a maximum at a longitudinal center of the inside space and gradually becomes smaller as a position of the inside space shifts from the longitudinal center along a longitudinal axis of the permanent magnet members. The arc-shaped projecting elements are arranged so that the magnetic flux density and each of the output signals can be expressed by a cosine of a shift value from the longitudinal center, and the interval is ¼ of the cycle of the cosine.
US07893687B2 LVDT acquisition device with dual demodulation subsystem
The invention relates to position sensors of the linearly variable induction difference type. When cost constraints prevent the use of transformers with guaranteed phase-shift tolerance to achieve an accuracy objective, it is advantageous to provide an independent demodulation of the signals of the two windings. The error signal thus has a lower dependence on the phase shift and the accuracy is typically enhanced by a factor greater than an order of magnitude.
US07893686B1 Power cord voltage indicator
A voltage indicator for mounting on a power cord (FIG. 3) for indicating the presence or absence of a single-phase AC voltage potential on a monitored power cord for a grounded AC power distribution system. The indicator comprises; a housing (16,18), an electronic display (10), a static suppression resistor (12), a first conductive element (14) in physical proximity to the monitored power cord, and a second conductive element (22) meant to be touched by a human being to provide a visual indication of the presence or absence of a voltage potential on the monitored power cord. A capacitive coupling (FIG. 1) takes place between the “hot” conductor of the power cord and the first conductive element (14) of the indicator. This causes a voltage drop across the display (10) and the resistor (12) in parallel with the display (10). The current flow from the display (10) and the resistor (12) merge together to return to ground through a human being touching a second conductive element (22). The path of current flow is completed by the power source ground connection. The indicator is electrically insulated from the power cord it monitors due to the insulation on the power cord at the location of the indicator. The monitored power cord can be a two conductor power cord (“hot” and neutral) or a three conductor power cord (“hot”, neutral, and ground).
US07893681B2 Electronic circuit
An electronic circuit is disclosed. The electronic circuit includes a bandgap circuit provided with first and second bipolar transistors that are coupled at a first node and a current mirror circuit provided with third and fourth transistors with respective control terminals coupled at a second node. The electronic circuit further includes a fifth transistor that is bipolar which is coupled to an output terminal of the third transistor where a base of the fifth transistor is coupled to a collector of the second transistor and a sixth transistor that is bipolar that is coupled to an output terminal of the fourth transistor with a base of the sixth transistor coupled to the first node. A control circuit controls a current provided to the bandgap circuit based on an output of the current mirror circuit. A reference voltage output terminal is provided between the control circuit and the bandgap circuit and outputs a reference voltage.
US07893679B2 Pulse width modulation controller, circuit and method thereof with short circuit protection
A PWM comprises a voltage transformation module, a voltage-sensing module and a timer. The voltage transformation module is configured to transform an input voltage into an output voltage. The voltage-sensing module is coupled to the voltage transformation module and configured to detect a voltage of a first terminal, wherein the voltage of the first terminal is proportional to the output voltage. The timer is configured to measure the time duration for which the voltage of the first terminal is lower than a reference voltage, wherein the timer initiates a short circuit signal when the time duration is greater than a predetermined value.
US07893675B2 Current mode controlled DC-to-DC converter
An apparatus having an input voltage and an output voltage is provided. The apparatus comprises a switch that receives the input voltage and that is adapted to be coupled to a load, a modulator having a timing signal, a compensator that is coupled to the modulator and that includes an amplifier, an overcurrent circuit, and a sampler. The modulator is coupled to the switch and the modulator actuates the switch at a first frequency. The amplifier amplifies the difference between at least a portion of the output voltage with a predetermined reference voltage and outputs an amplified voltage. The overcurrent circuit receives the amplified voltage and outputs an overcurrent signal to the modulator. The sampler is interposed between the amplifier and the overcurrent circuit and is coupled to the modulator, where the sampler samples the amplified voltage prior to each actuation of the switch based on the timing signal and where the sampler outputs the compared voltage that was sampled to the overcurrent circuit through the duration of each actuation of the switch.
US07893674B2 Switch mode power supply (SMPS) and methods thereof
Embodiments of the present invention are directed to switched-mode power supply (SMPS) circuits and methods thereof. The SMPS circuit receives information related to a future load change. For example, the information may be received at a decoder (e.g., a serial bus interface (SBI) decoder) from a microprocessor or microcontroller, such as a mobile station modem (MSM). The SMPS circuit may include an analog-to-digital converter configured to sample an output voltage of the SMPS circuit to determine a time when the future load change occurs. The SMPS circuit may further include a transient recovery circuit (TRC) for stabilizing the output voltage based on the received information when the future load change occurs. For example, the TRC calculates a duty cycle used to transition states of switches of the SMPS circuit to compensate for the future load change.
US07893672B2 Technique to improve dropout in low-dropout regulators by drive adjustment
An electronic device includes a low drop-out regulator for providing a regulated output voltage. The low drop-out regulator generally comprises a power MOSFET transistor having a gate coupled to a driver. The driver has a first path including an NMOS transistor and being coupled to the gate of the power MOSFET, a second path having a PMOS transistor and being coupled to the gate of the power MOSFET, and a switch for alternately switching between the first and second paths so as to provide a voltage to the gate of the power MOSFET ranging from ground to a power supply level.
US07893668B2 Voltage regulator with high voltage protection
A method for regulating a voltage in an integrated circuit device includes providing a first regulated output based upon a first voltage input range and subsequently receiving the first regulated output and providing a second regulated output based upon a second voltage input range of the first regulated output. A circuit is further provided that operates accordingly. Additionally, a clipper circuit is provided at the input to protect for over voltage conditions that may results, for example, from a charging battery to cause an output voltage of the battery to substantially exceed ordinary output voltage levels.
US07893663B2 Method and apparatus for active power factor correction without sensing the line voltage
A power factor correction apparatus which uses Pulse Frequency Modulation (PFM) to control an AC/DC converter is disclosed. Only a current signal from the converter is used to determine the switching frequency. Sensing of the input line voltage is not needed. The switching frequency varies with the line voltage such that the converter emulates a resistive load. By using PFM control, EMI is spread over a range rather than concentrated at a few frequencies. Thus a smaller EMI filter can be used. Since the switching frequency decreases with the loading of the converter, the switching loss decreases with the loading as well. Thus, the need of meeting efficiency standards, e.g. the 80 PLUS and Energy Star, can be fulfill without extra circuitry.
US07893661B2 Driver circuit arrangement
The invention relates to a driver circuit arrangement (1′) for driving a plurality of individually switchable electrical subsystems (A′, B′, C′), such as (arrangements of) LEDs (9-A, 9-B, 9-C). Each subsystem has at least one energy storage device (10-A, 10-B, 10-C), such that when the subsystem is disconnected from the main source (7) of electrical energy, the energy storage device can supply energy to the device(s) of the subsystem. By furthermore providing at least one subswitch (13-A, 13-B, 13-C) in the subsystem, between the energy storage device and an electrical device of the subsystem, control over the device is still possible when the subsystem is disconnected form the main source of electrical energy.
US07893653B2 Multiple function current-sharing charging system and method
Multiple function current-sharing charging systems and methods are provided. Where first and second rechargeable power supplies are connected to a charging system, a first charging current is provided to the first rechargeable power supply and a second charging current is provided to the second rechargeable power supply. Upon detection of a predetermined charge level of one of the rechargeable power supplies, a third charging current is provided to the first rechargeable power supply and a fourth charging current is provided to the second rechargeable power supply.
US07893649B2 Method and circuit arrangement for determining the rotor position of an EC motor in the standstill state
A method and circuit arrangement for determining position of the rotor of an electronically commutated motor, wherein the rotor has magnetic axes having different permeances. Voltage is applied to stator phases, and resultant phase currents are monitored for purpose of determining rotor position in the standstill state of the motor. First and second rise times of phase currents are determined until predetermined limit values are reached in unsaturated state. The assignment of a magnetic axis to a stator phase is determined from first rise times of the currents in unsaturated state of the rotor core, and the polarization of the rotor is determined from second rise times of currents upon energization with saturation effects. After run-up of the motor, initial energization of the stator can be determined comparing levels of the magnet wheel voltages and corrected by changing the commutation of stator energization.
US07893647B2 Arrangement for driving a load element
In a method or system for driving a load element, a drive motor is provided on a drive shaft of the load element that establishes a drive rotation speed of the load element. A rotation torque sensor on the drive shaft emits a load torque signal proportional to a rotation torque. A rotation torque influencing device generates a supplementary torque when the load torque signal deviates from a desired load angle value present when a change has not occurred to a load created by the load element and acting on the drive motor, the supplementary torque being added to a drive torque generated by the drive motor such that a load angle of the drive motor remains substantially constant and uninfluenced by a change of the load.
US07893646B2 Game system with robotic game pieces
A game system comprises a game board having a playing area and game pieces for playing a game on the game board. Each game piece comprises a mobile robot for sensing and decoding a position-coding pattern printed on the game board. Each game piece is in communication with a computer system. The computer system is configured to send instructions for moving each game piece relative to the playing area in response to position information corresponding to the game pieces.
US07893639B2 Motor control device
A motor control device that includes a first speed estimator estimating the rotation speed of the rotor of a permanent-magnet synchronous motor and that controls the motor so that a first estimated rotation speed estimated by the first speed estimator follows the specified speed value further includes a second speed estimator that estimates the rotation speed of the rotor by an estimation method different from that used by the first speed estimator. The motor control device detects synchronization failure based on a comparison between a second estimated rotation speed estimated by the second speed estimator and the first estimated rotation speed or the specified speed value.
US07893638B2 Apparatus and method for driving rotary machine
A motor driving apparatus has a loss-of-synchronism monitoring circuit that monitors the rotation of a rotary machine such as a brushless DC motor to detect a sign of transition to a state of loss of synchronism. When the sign is detected, an energization control circuit temporarily stops driving of the rotary machine to bring it into a free running state, and thereafter carries out control so as to resume driving of the rotary machine. Further, the motor driving apparatus has an inverter and a drive control circuit that controls switching operation of the inverter based on rotation of the rotary machine.
US07893635B2 Liquid cooling system with automatic pump speed control
A system comprising a fan tachometer module, a conversion module, and a pump tachometer module. The fan tachometer module is adapted to measure a speed of a cooling fan. The conversion module is in communication with the fan tachometer module, and is adapted to convert the speed of the cooling fan to a control voltage based on a predetermined ratio between the speed of the cooling fan and a speed of a cooling pump. The pump tachometer module is in communication with the conversion module, and is adapted to control the speed of the cooling pump based on the control voltage.
US07893626B2 Multi-color backlight control circuit and multi-color backlight control method
The present invention discloses a multi-color backlight control circuit, comprising: a plurality of pins for electrically connecting with a plurality of LED strings of different LED colors; and a voltage supply circuit for receiving an input voltage and supplying a single output voltage to the plurality of LED strings of different LED colors. The present invention also discloses a multi-color backlight control method, comprising: supplying a single output voltage to a plurality of LED strings of different LED colors.
US07893623B2 High-intensity discharge lamp
A high-intensity discharge (HID) lamp comprising an inner bulb (1) with a discharge vessel (11) and an outer bulb (2), especially for application in an automotive headlight unit is disclosed. A lamp design is proposed by which high thermal stresses and increased quartz temperatures during run-up and steady state operation of the lamp are avoided so that the light output and the lifetime of the lamp is improved. This is substantially achieved by a positioning of the inner and the outer bulb (1, 2) such that a longitudinal axis of the inner bulb (1) is displaced in the operating position of the lamp above a longitudinal axis of the outer bulb (2) so that the distance between the discharge vessel (11) and the outer bulb (2) at the top side of the lamp is decreased and the distance between both at the bottom side is correspondingly increased.
US07893622B2 Circuit apparatus of LED vehicle lamp
A circuit apparatus of an LED vehicle lamp is disclosed. The circuit apparatus includes an input unit, an LED unit and a current limiting unit. The LED unit includes at least one light-emitting device. Each light-emitting device includes at least one LED and a protection device. The protection device and each one LED are connected in parallel. The circuit apparatus of an LED vehicle lamp protects the element of the LEDs from being damaged, increases traveling safety and simplifies maintenance.
US07893621B2 Eggbeater transparent cathode for magnetrons and ubitrons and related methods of generating high power microwaves
An “eggbeater” cathode comprising a transparent cathode including a plurality of longitudinally oriented cathode strips anchored at both ends between support discs and forming an open-walled hollow cylindrical structure. A cathode base is disposed substantially coaxially with a longitudinal axis of the transparent cathode and surrounded by the plurality of cathode strips, wherein the support discs secure the cathode strips to the cathode base and result in a cathode that is more robust in harsh operating environments compared with a simple transparent cathode.
US07893618B2 Gas discharge lamp
The gas discharge lamp contains a lamp body and an UV unit. The UV unit contains a separate airtight chamber wrapping around at least a neck member of the lamp body and covering at least a part of a Mo tinsel inside the neck member. The airtight chamber is filled with one or more gases capable of being ionized, and is wound by a conductor whose one end is connected to a conduction wire extended out of one of the neck members. When the gas discharge lamp is turned on, the gases in the airtight chamber are ionized to produce an UV light to penetrate the discharge chamber. The gas discharge lamp therefore could have a lower starting voltage and an improved starting efficiency. Additionally, as the airtight chamber provides a heat insulation effect, the temperature-induced stress is thereby reduced.
US07893617B2 Metal electrodes for electric plasma discharge devices
An all-metal electron emissive structure for low-pressure lamps is disclosed. The all-metal electron emissive structure consisting of one or more metal is operable to emit electrons in response to a thermal excitation, wherein an active region of the electron emissive structure under steady state operating conditions has a temperature greater than about 1500 degree K, and wherein the cathode fall voltage in the discharge medium under steady state operating conditions is less than about 100 volts. A lamp including an envelope, an electrode including the all-metal electron emissive structure, and a medium, is also disclosed.
US07893613B2 Organic light-emitting display device having a frit seal and method for fabricating the same
Disclosed is an organic light-emitting display device capable of blocking the infiltration of oxygen and moisture, etc. by encapsulating a first and a second substrate with a frit, simplifying the process and effectively preventing light leakage. In one embodiment, the organic light-emitting display device is a bottom emission type organic light-emitting display device including a first substrate with a pixel region including a plurality of organic light-emitting diodes and a non-pixel region around the pixel-region, a second substrate disposed on the upper part of the first substrate to be overlapped with the pixel region and at least part of the non-pixel region, and a frit formed in the entire inner side of the second substrate, wherein the frit corresponding to at least the non-pixel region is formed to be thicker than the frit overlapped with the pixel region, and the first and the second substrates are bonded to each other by the frit in the non-pixel region.
US07893612B2 LED device having improved light output
A light-emitting diode device that includes a first group of sub-pixels each subpixel comprising a reflective electrode and a second electrode formed over a substrate with an unpatterned light-emitting layer formed between the reflective electrode and the second electrode, thus forming a first optical cavity having a first cavity length. Either the reflective or second electrode is patterned to form two or more independently-controllable, light-emitting sub-pixels. A second group of sub-pixels, each comprising a reflective electrode and a second electrode formed over the substrate. An unpatterned light-emitting layer is formed between the reflective electrode and the second electrode to comprise a second optical cavity having a second cavity length different from the first cavity length of the first optical cavity. Either the reflective or second electrode is patterned to form one or more independently-controllable, light-emitting sub-pixels.
US07893608B2 Organic electroluminescent element and display device
An organic electroluminescent element includes a light emitting unit provided between an anode and a cathode. The light emitting unit has a light emitting layer containing a phosphorescent material as a luminescent material and a photosensitizing layer formed adjacent to the light emitting layer. The photosensitizing layer contains a fluorescent light emitting material as a guest material.
US07893607B2 Organic electroluminescence display device
On a main face of a substrate, organic EL light emitting layers are formed by stacking first electrodes for respective pixels, an organic EL layer having a white light emitting function formed above the first electrodes to cover the first electrodes in common, and a second electrode formed such that the second electrode covers the organic EL layer in common in this order, and light emitted from the organic EL layer is irradiated to the second electrode side. Above the second electrode, a color converting filter, which converts the white light emitted from the organic EL light emitting layer to a given color and is applied by coating using a wet process, is formed for every pixel, and a protective layer, which prevents the deterioration of the light emitting layer attributed to a coating material of the color filter, is provided between the second electrode and the color converting filter.
US07893605B2 Back-gated field emission electron source
A field emitter device consistent with certain embodiments has a substantially planar conductor forming a gate electrode. A conductive stripe forms a cathode on the insulating layer. An insulating layer covers at least a portion of the surface between the cathode and the gate. An anode is positioned above the cathode. An emitter structure, for example of carbon nanotubes is disposed on a surface of the cathodes closest to the anode. When an electric field is generated across the insulating layer, the cathode/emitter structure has a combination of work function and aspect ratio that causes electron emission from the emitter structure toward the anode at a field strength that is lower than that which causes emissions from other regions of the cathode. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.
US07893604B2 Spark plug with stream shaper to shape tumble vortex into desired stream in combustion chamber
A spark plug for an internal combustion engine is provided which includes a hollow cylindrical metal shell with an open end portion to be exposed to a combustion chamber of the engine, a ground electrode joined to the metal shell, a center electrode disposed in the metal housing to define a spark gap between itself and the ground electrode. The spark plug also includes a stream shaper geometrically formed on an inner periphery of the open end portion of the metal shell to shape tumble vortexes of air-fuel mixture into vortex streams oriented toward a central portion of the combustion chamber. This ensures the stability of orientation of the tumble vortexes to control a flow of sparks, thereby enhancing the ignitability of the air-fuel mixture in the combustion chamber.
US07893603B2 Apparatus for determining and/or monitoring a process variable
An apparatus for determining and/or monitoring a process variable of a medium. The apparatus includes: An oscillatable unit secured on a membrane; a sending/receiving unit, which excites the membrane and the oscillatable unit to oscillate and which receives oscillations of the oscillatable unit. The sending/receiving unit is a disk-shaped, piezoelectric element. The apparatus further includes a control/evaluation unit, which, on the basis of oscillations of the oscillatable unit, monitors and/or determines the process variable. The disk-shaped, piezoelectric element has segments, which are essentially polarized oppositely to one another, and at least two electrodes of opposite polarity are applied to the side of the disk-shaped, piezoelectric element facing away from the membrane.
US07893602B1 Dual-use transducer for use with a boundary-stiffened panel and method of using the same
A transducer for use with a boundary-stiffened panel has an inter-digitated electrode (IDE) and a piezoelectric wafer portion positioned therebetween. The IDE and/or the wafer portion are triangular, with one edge or side aligned with a boundary edge of the panel. The transducer generates and transmits an output force to the panel in response to an input voltage signal from a sensor, which can be another transducer as described above or an accelerometer. A controller can generate an output force signal in response to the input voltage signal to help cancel the input voltage signal. A method of using the transducer minimizes vibration in the panel by connecting multiple transducers around a perimeter thereof. Motion is measured at different portions of the panel, and a voltage signal determined from the motion is transmitted to the transducers to generate an output force at least partially cancelling or damping the motion.
US07893601B2 (Li, Na, K)(Nb, Ta) O3 based piezoelectric material
Manufacturing sintered bodies having microstructures including microscopic grains having a grain diameter of less than 5 μm, intermediate grains having a grain diameter of 5 μm or more and less than 15 μm, and coarse grains having a grain diameter of 15 μm or more and 100 μm or less enables to obtain high electric characteristics. Chemical compounds including metal elements are mixed so that the ratio of the elements is a composition expressed by (Li, Na, K)(Nb, Ta)O3, the mixture is calcined and crushed to obtain calcined/crushed powder. The powder is sintered in a constant temperature keeping process wherein temperature is kept constantly at a predetermined temperature within a range from 800 to 900° C. for a predetermined period of time in a heating process, and then the powder is further sintered by raising temperature to firing temperature, thereby the piezoelectric materials having superior electric characteristics are manufactured.
US07893598B2 Driving apparatus and image pickup apparatus
A driving apparatus including a transducer, a fixing member, and a mobile body is provided. The transducer generates elliptical vibration in a driving part when voltage of a predetermined frequency is applied. The fixing member includes a retaining part which retains the transducer. The mobile body, which is driven by the elliptical vibration of the transducer to move with respect to the fixing member, includes a first mobile body part formed in a desired size; and a second mobile body part which has a sliding part to which the driving part is pressed and contacted, and a guide-receiving part which is provided opposite the sliding part and whose moving direction is guided in engagement with a guiding part of the fixing member, the second mobile body part being of higher rigidity, formed in a smaller size than the first mobile body part, and fixed to the first mobile body part.
US07893594B2 Alternating-current dynamo-electric machine
An alternating-current dynamoelectric machine according to the present invention includes: a stator including: a stator core in which slots that extend in an axial direction are formed on an inner side; and a stator winding that is mounted to the stator core by winding conducting wires into the slots; and a rotatable rotor including: a field winding that is disposed inside the stator; a rotor core constituted by a first pole core and a second pole core that each have claw-shaped magnetic poles that are disposed so as to cover the field winding and that alternately intermesh with each other; and first and second permanent magnets that are respectively disposed on two facing side surfaces of adjacent claw-shaped magnetic poles and that have magnetic fields that are oriented so as to reduce leakage of magnetic flux between the claw-shaped magnetic poles, and a magnetic body is disposed between a pair of the first and second permanent magnets.
US07893591B2 Laminated rotor core and method for manufacturing the same
A stamping step of forming a plurality of band-shaped core sheets (11), (12) having arc-shaped segment core sheets (15), (15a), the adjacent segment core sheets (15), (15a) connected together by narrow-width connecting portions (16), (16a) provided therebetween, the segment core sheets (15), (15a) having a plurality of pole sections (13), (14), (13a), (14a) protruding radially outward; and an annular shape forming step of winding the plurality of band-shaped core sheets (11), (12) in a spiral form while bending the band-shaped core sheets (11), (12) at the connecting portions (16), (16a) and superimposing the pole sections (13), (14), (13a), (14a) vertically one on another, thereby laminating the band-shaped core sheets (11), (12); wherein in the stamping step, notches (23a), (23) to be positioned in correspondence with the connecting portions (16), (16a) bent in the annular shape forming step are formed at radially outward sides of joining portions (22a), (22), the joining portions joining the adjacent pole sections (13a), (14a), (13), (14) in the segment core sheets (15a), (15) and positioned above and below the bent connecting portions (16), (16a).
US07893590B2 Stator having high assembly
In a stator, when a number of a plurality of core segments circumferentially arranged is represented as n, a length of a maximum projecting portion of a circumferential projection of each of the plurality of core segments from one of the first and second radial sides thereof is represented as p, a radial length of a maximum projecting portion of the circumferential projection of each of the plurality of core segments from a circumferentially extended line from the bottom of the slot is represented as q, and a length of the slot with respect to the bottom thereof in a radial direction of the stator core assembly is represented as t, the number n, the length p, the length q, and the length t meet the following equation: 0 < np π - q < t .
US07893588B1 Magnetic electron exciter and methods
A magnetic electron exciter includes a rotor adapted to be rotated within a preselected range of rotational speeds, and having a plurality of magnets mounted therein preselected distances from the rotational axis of the rotor. A plurality of coils are positioned adjacent to the rotor, whereby rotation of the rotor creates an electrical current in the coils. First and second electrodes are spaced apart a predetermined distance, and are electrically connected with the coils to create an arc between the electrodes when the rotor is rotated relative to the coils.
US07893586B2 DC motor with dual commutator bar set and selectable series and parallel connected coils
A permanent magnet, DC motor especially well adapted for use in power tools, and particularly hand-held, battery powered power tools. The motor includes two sets of armature coils, with each set of coils being coupled to separate sets of commutator bars on an armature. Separate pairs of brushes are used to interface with the two sets of commutator bars. A switching subsystem is controlled either manually by a user engageable switch or automatically by a controller, to connect the two sets of coils in either series or parallel configurations. The series configuration provides a greater efficiency, but with a lower power output than the parallel connection. The parallel connection provides a greater maximum power output from the motor. Thus, the operating characteristics of the tool can be tailored to better meet the needs of a work task, and in a manner than makes most efficient use of available battery power.
US07893585B2 Motor assembly with multifunctional components
Multifunctional components enable the construction of economical motor assemblies. A first embodiment of the present invention provides a hub, cup, spindle, and base assembly for a motor assembly having at least one journal bearing, at least one thrust bearing, and at least one fluid seal. A second embodiment of the present invention provides a hub, spindle, and base with integrated cup assembly for a disc drive bearing having at least one journal bearing, at least one thrust bearing, and at least one fluid seal. In a third embodiment, a hub is rotatably assembled with a spindle coupled to a thrust bearing, prior to assembly with a base. In further embodiments, motor assemblies comprise the above embodiments combined with stator and rotor assemblies.
US07893584B2 Spindle motor
Disclosed herein is a spindle motor which is capable of more easily controlling an axial gap and levelness between the thrust plate of a rotating shaft and a sealing cap. The spindle motor includes a rotating shaft having a thrust plate which is perpendicularly inserted into the upper portion of the rotating shaft. A sleeve accommodates the rotating shaft and rotatably supports the rotating shaft. The sleeve is secured to a plate. A sealing cap is secured to the sleeve through laser welding in such a way as to face the upper surface of the thrust plate. At least part of the sealing cap is stepped towards the thrust plate to correspond to a degree of deformation occurring during the laser welding.
US07893578B2 Electric motor with discrete circuit board and sensor case
An electric motor includes a rotor having a field permanent magnet, a board housing member fixed to a stator, and a magnetism detecting circuit that detects the magnetism of the field permanent magnet. The magnetism detecting circuit includes a circuit board that is discrete from the board housing member, a sensor case that is discrete from the circuit board and is supported on the circuit board, and a rotation sensor held by the sensor case. The board housing member has an engagement hole and a positioning surface. The sensor case has an engagement convexity corresponding to the engagement hole and an abutting surface corresponding to the positioning surface. When the circuit board has been located in the board housing member, the engagement convexity engages the engagement hole and the abutting surface abuts the positioning surface, resulting in that the rotation sensor is positioned relative to the board housing member.
US07893576B2 Generator coil cooling baffles
Systems are disclosed that assist in cooling generator rotor coils. In one embodiment, the system includes a stator; a rotor positioned within the stator, the rotor having: a spindle; groups of coils disposed about the spindle, each of the groups of coils including a plurality of ducts; a plurality of subslots disposed about the spindle, each of the plurality of subslots extending between the spindle and one of the groups of coils, wherein each of the plurality of subslots is in fluid communication with the one of the groups of coils; and a first baffle disposed in one of the plurality of subslots for directing a coolant into at least one of the plurality of ducts.
US07893573B2 Drive system
The invention relates to a drive system having at least one electrical direct drive and at least one bearing module, wherein the bearing module has a radial bearing and/or an axial bearing, and wherein the electrical direct drive and the bearing module have a cooling device.
US07893571B2 Stepping motor being conveniently assembled
A stepping motor includes a bracket, a housing having a first end coupled to the bracket and a second end having a reduced width compared with the first end, a stator disposed in the housing to form electric field, a first supporting unit formed on a first end of the bracket, a magnet fixed corresponding to the stator to provide the electric field, a second supporting unit supported on the second end of the housing, a rotor supported by the first and second supporting units, and a stopper fitted on an opened end of the second end of the housing to support the second supporting unit.
US07893570B2 Clean engine
A clean engine for transportation, generators, and other applications. It comprises a series of alternating support wheel assemblies and magnet wheel assemblies that are propelled in a consistent pattern by battery powered electromagnets. The engine comprises at least one support wheel assembly and at least one magnet wheel assembly. The support wheel assemblies and magnet wheel assemblies are aligned in a specific pattern along a main shaft that is supported on each end by sealed bearings mounted in a nonmagnetic housing.
US07893568B2 Voice coil motor type focusing actuator
A voice coil motor type focusing actuator, which includes a fixed unit, the fixed unit comprises a bracket which is formed by plastic injection molding to wrap a metal part, and a plurality of magnets mounted in the bracket at a plurality of sides. A movable unit, the movable unit comprises a lens holder movably mounted inside the bracket and a coil mounted on a plurality of sides of the lens holder corresponding to the magnets. And a resilient holding unit connected between the fixed unit and the movable unit to hold down the movable unit on the fixed unit.
US07893560B2 Low power isolation design for a multiple sourced power bus
A redundant power supply connected to a common load is provided. Each power supply is connected to the common load through a series of MOSFET pairs. Each MOSFET in a MOSFET pair is individually controlled to reduce power consumption as well as the need for heat sinks on discrete diodes. Moreover, by providing individually controllable MOSFETs the present invention is capable of switching between power supplies without shorting the power supplies or having a significant drop in bus voltage.
US07893549B2 Microelectronic lithographic alignment using high contrast alignment mark
A microelectronic structure, and in particular a semiconductor structure, includes a substrate that includes an alignment mark comprising a substantially present element that has an atomic number at least 5 greater than a highest atomic number substantially present element within the substrate. Alignment to the alignment mark may be effected using an electron beam as an alignment beam with respect to both a direct write exposure and a reticle filtered optical exposure of a mask layer (i.e., photoresist mask layer) located over the alignment mark and the substrate. The electron beam alignment beam may effectively penetrate through other layers, including conductor layers comprising elements having appropriately low atomic number, located interposed between the alignment mark and the mask layer.
US07893533B2 Semiconductor device, mounting structure, electro-optical apparatus, electronic system, and method for manufacturing electronic component
A semiconductor device includes a bump electrode including a bump made of resin, a base layer disposed on the bump, and a conductive surface layer disposed on the base layer. The base layer has ductility lower than that of the conductive surface layer and includes base regions which are spaced from each other and which are arranged at least in a top zone of the bump electrode.
US07893532B2 External contact material for external contacts of a semiconductor device and method of making the same
An external contact material for external contacts of a semiconductor device and a method for producing the same are described. The external contact material includes a lead-free solder material. Provided in the solder material is a filler which forms a plurality of gas pores and/or has plastic particles which are arranged in the volume of the solder material.
US07893529B2 Thermoelectric 3D cooling
The invention comprises a 3D chip stack with an intervening thermoelectric coupling (TEC) plate. Through silicon vias in the 3D chip stack transfer electronic signals among the chips in the 3D stack, power the TEC plate, as well as distribute heat in the stack from hotter chips to cooler chips.
US07893528B2 Package structure of compound semiconductor device and fabricating method thereof
A package structure of a compound semiconductor device comprises a thin film substrate, a die, at least one metal wire and a transparent encapsulation material. The thin film substrate comprises a first conductive film, a second conductive film, and an insulating dielectric material. The die is mounted on the surface of the first conductive film, and is electrically connected to the first conductive film and the second conductive film through the metal wire. The transparent encapsulation material overlays the first conductive film, second conductive film, and die. The surfaces of the first conductive film and second conductive film which is opposite the transparent encapsulation material act as electrodes. The insulating dielectric material is between the first conductive film and second conductive film.
US07893527B2 Semiconductor plastic package and fabricating method thereof
A semiconductor plastic package and a method of fabricating the semiconductor plastic package are disclosed. A method of fabricating a semiconductor plastic package can include: providing a core board, which includes at least one pad, and which has a coefficient of thermal expansion of 9 ppm/° C. or lower; stacking a build-up insulation layer over the core board; forming an opening by removing a portion of the build-up insulation layer such that the pad is exposed to the exterior; and placing a semiconductor chip in the opening and electrically connecting the semiconductor chip with the pad. This method can be utilized to provide higher reliability in the connection between the semiconductor chip and the circuit board.
US07893525B2 Semiconductor device having an adhesive portion with a stacked structure and method for manufacturing the same
It is made possible to restrict warpage at the time of resin cure and achieve a smaller thickness. A semiconductor device includes: a first chip including a MEMS device and a first pad formed on an upper face of the MEMS device, the first pad being electrically connected to the MEMS device; a second chip including a semiconductor device and a second pad formed on an upper face of the semiconductor device, the second pad being electrically connected to the semiconductor device; and an adhesive portion having a stacked structure, and bonding a side face of the first chip and a side face of the second chip, the stacked structure including a first adhesive film formed by adding a first material constant modifier to a first resin, and a second adhesive film formed by adding a second material constant modifier to a second resin.
US07893521B2 Electric fence energiser
An energiser for an electric fence. The energiser includes, at least, one energy storage capacitor (14), a charging circuit (13) to enable the or each storage capacitor (14) to be charged from an energy source (10), semiconductor switching means (16), and control circuit means (15) to facilitate controlled turning -on and -off of the semiconductor switching means (16) to control the duration of the discharge from the energy storage means (14). In one form of the energiser a first semi-conductor switching means is arranged to connect in parallel the energy storage capacitors (14) to be charged and second semi-conductor switching means to connect two or more of the charged energy storage capacitors (14) in series to create an output pulse.
US07893520B2 Efficient interconnect structure for electrical fuse applications
A semiconductor structure is provided that includes an interconnect structure and a fuse structure located in different areas, yet within the same interconnect level. The interconnect structure has high electromigration resistance, while the fuse structure has a lower electromigration resistance as compared with the interconnect structure. The fuse structure includes a conductive material embedded within an interconnect dielectric in which the upper surface of the conductive material has a high concentration of oxygen present therein. A dielectric capping layer is located atop the dielectric material and the conductive material. The presence of the surface oxide layer at the interface between the conductive material and the dielectric capping layer degrades the adhesion between the conductive material and the dielectric capping layer. As such, when current is provided to the fuse structure electromigration of the conductive material occurs and over time an opening is formed in the conductive material blowing the fuse element.
US07893519B2 Integrated circuit with conductive structures
An integrated circuit includes an array of transistors and a number of wordlines, where individual ones of the wordlines are coupled to a number of the transistors in the array. Conductive structures that are insulated from the wordlines are disposed in a layer beneath the wordlines and are arranged between the transistors.
US07893518B2 Method for generating a layout, use of a transistor layout, and semiconductor circuit
A method for generating a layout, use of a transistor layout, and semiconductor circuit is provided that includes a matching structure, which has a number of transistors, whose structure is similar to one another, metallization levels with geometrically formed traces, which are formed directly above the transistors, and vias (in via levels), which are formed between two of the metallization levels. Whereby, within one and the same metallization level, the geometry of the traces above each transistor is formed the same.
US07893517B2 Semiconductor device with block layer and method of manufacturing the same
A semiconductor memory device includes a well layer having a first conductivity type and formed in a semiconductor substrate, a block layer formed in a trench and formed of an insulating layer, a gate electrode formed on the semiconductor substrate apart from the block layer, a first diffusion layer having a second conductivity type, formed on a surface of the semiconductor substrate, and having a high impurity concentration region to a first depth from the surface of the semiconductor substrate, a second diffusion layer having the second conductivity type, formed on the surface of the semiconductor substrate on a side of the block layer away from the gate electrode, having a high impurity concentration region to a second depth greater than the first depth from the surface of the semiconductor substrate, and electrically connected to the first diffusion layer, and a contact connected to the second diffusion layer.
US07893515B2 Photodetector integrated chip
There are provided a semiconductor device including a photo receiving region having high photosensitivity by forming an antireflection film capable of both decreasing a reflectance and lowering a surface level density, and a manufacturing method of the semiconductor device. The semiconductor device includes an antireflection film 8 comprised of a laminated film including a first insulating film 6 formed on the surface of a silicon substrate 1 and a second insulating film 7 having a refractive index different from that of the first insulating film 6 formed above the first insulating film in a light-receiving area 10 of a semiconductor photo receiving region PD, and in which the first insulating film 6 is comprised of a silicon oxide film formed by oxidizing silicon on the surface of the semiconductor photo receiving region PD. Further, the semiconductor photo receiving region PD has a configuration such that it may receive light having a wavelength 500 nm or less. Furthermore, when this semiconductor device is manufactured, in the state in which the silicon surface which serves as a light-receiving portion of the photodiode PD is exposed, the silicon oxide film 6 is formed by thermally oxidizing silicon in the atmosphere of oxygen gas or in the atmosphere of mixed gas of oxygen and hydrogen at a temperature of 800° C. or more.
US07893514B2 Image sensor package, method of manufacturing the same, and image sensor module including the image sensor package
An image sensor package, a method of manufacturing the same, and an image sensor module including the image sensor package are provided. In the image sensor package, an image sensor chip is installed onto a depression of a transmissive substrate. An adhesive bonds the image sensor chip to the transmissive substrate and seals an Active Pixel Sensor (APS) on the image sensor chip, protecting it from fine particle contamination. An IR cutting film is disposed on the transmissive substrate to minimize the height of the image sensor package. The image sensor package is electrically connected to external connection pads in the depression. Consequently, the image sensor package has a minimum height, is not susceptible to particle contamination, and does not require expensive alignment processes during manufacturing.
US07893508B2 Semiconductor device and manufacturing method thereof
A semiconductor device capable of suppressing a threshold shift and a manufacturing method of the semiconductor device. On a high dielectric constant insulating film, a diffusion barrier film for preventing the diffusion of metal elements from the high dielectric constant insulating film to an upper layer is formed. Therefore, the diffusion of the metal elements from the high dielectric constant insulating film to the upper layer can be prevented. As a result, a reaction and bonding between the metal elements and a Si element in a gate electrode can be suppressed near a boundary between an insulating film and the gate electrode.
US07893507B2 Metal oxide semiconductor (MOS) transistors with increased break down voltages and methods of making the same
A transistor comprises a substrate of a first conductivity type, a drain region and a source region of a second conductivity type, a gate, a gate oxide layer, an adjustment implant region of the first conductivity type and a planar junction. The drain region and the source region are disposed in the substrate. The gate is placed over the substrate between the source region and the drain region. The gate is separated from the substrate by the gate oxide layer. The adjustment implant region is disposed under the gate oxide layer and in the substrate. A second doping concentration of the adjustment implant region is higher than a first doping concentration of the substrate. The adjustment implant region and the drain region in a predetermined shape form the planar junction with a surface curvature pointing towards the drain region to relax electrical field intensity at a location of the planar junction.
US07893503B2 Semiconductor device comprising NMOS and PMOS transistors with embedded Si/Ge material for creating tensile and compressive strain
By forming a substantially continuous and uniform semiconductor alloy in one active region while patterning the semiconductor alloy in a second active region so as to provide a base semiconductor material in a central portion thereof, different types of strain may be induced, while, after providing a corresponding cover layer of the base semiconductor material, well-established process techniques for forming the gate dielectric may be used. In some illustrative embodiments, a substantially self-aligned process is provided in which the gate electrode may be formed on the basis of layer, which has also been used for defining the central portion of the base semiconductor material of one of the active regions. Hence, by using a single semiconductor alloy, the performance of transistors of different conductivity types may be individually enhanced.
US07893500B2 High voltage GaN transistors
A multiple field plate transistor includes an active region, with a source, a drain, and a gate. A first spacer layer is over the active region between the source and the gate and a second spacer layer over the active region between the drain and the gate. A first field plate on the first spacer layer is connected to the gate. A second field plate on the second spacer layer is connected to the gate. A third spacer layer is on the first spacer layer, the second spacer layer, the first field plate, the gate, and the second field plate, with a third field plate on the third spacer layer and connected to the source. The transistor exhibits a blocking voltage of at least 600 Volts while supporting a current of at least 2 Amps with an on resistance of no more than 5.0 mΩ-cm2, of at least 600 Volts while supporting a current of at least 3 Amps with an on resistance of no more than 5.3 mΩ-cm2, of at least 900 Volts while supporting a current of at least 2 Amps with an on resistance of no more than 6.6 mΩ-cm2, or a blocking voltage of at least 900 Volts while supporting a current of at least 3 Amps with an on resistance of no more than 7.0 mΩ-cm2.
US07893499B2 MOS transistor with gate trench adjacent to drain extension field insulation
An integrated circuit containing an MOS transistor with a trenched gate abutting an isolation dielectric layer over a drift region. The body well and source diffused region overlap the bottom surface of the gate trench. An integrated circuit containing an MOS transistor with a first trenched gate abutting an isolation dielectric layer over a drift region, and a second trenched gate located over a heavily doped buried layer. The buried layer is the same conductivity type as the drift region. A process of forming an integrated circuit containing an MOS transistor, which includes an isolation dielectric layer over a drift region of a drain of the transistor, and a gate formed in a gate trench which abuts the isolation dielectric layer. The gate trench is formed by removing substrate material adjacent to the isolation dielectric layer.
US07893497B2 Semiconductor device
Provided is a semiconductor device including an electrostatic discharge (ESD) protection element provided between an external connection terminal and an internal circuit region. In the semiconductor device, interconnect extending from the external connection terminal to the ESD protection element includes a plurality of metal interconnect layers so that a resistance of the interconnect extending from the external connection terminal to the ESD protection element is made smaller than a resistance of interconnect extending from the ESD protection element to an internal element. The interconnect extending from the ESD protection element to the internal element includes metal interconnect layers equal to or smaller in number than the plurality of interconnect layers used in the interconnect extending from the external connection terminal to the ESD protection element.
US07893485B2 Vertical SOI trench SONOS cell
A semiconductor memory device and a design structure including the semiconductor memory device embodied in a machine readable medium is provided. In particular the present invention includes a semiconductor memory device in which a vertical trench semiconductor-oxide-nitride-oxide-semiconductor (SONOS) memory cell is created in a semiconductor-on-insulator (SOI) substrate is provided that allows for the integration of dense non-volatile random access memory (NVRAM) cells in SOI-based complementary metal oxide semiconductor (CMOS) technology. The trench is processed using conventional trench processing and it is processed near the beginning of the inventive method that allows for the fabrication of the memory cell to be fully separated from SOI logic processing.
US07893484B2 Semiconductor device with charge storage pattern and method for fabricating the same
A semiconductor device (e.g., a non-volatile memory device) with improved data retention characteristics includes active regions that protrude above a top surface of a device isolation region. A tunneling insulating layer is formed on the active regions. Charge storage patterns (e.g., charge trap patterns) are formed so as to be spaced apart from each other. A blocking insulating layer and a gate are formed on the charge storage patterns.
US07893483B2 Neuron device
A neuron device includes: a semiconductor layer; source and drain regions formed in the semiconductor layer at a distance from each other; a protection film formed on an upper face of the semiconductor layer; a channel region formed in the semiconductor layer between the source region and the drain region; a pair of gate insulating films formed on two side faces of the channel region; a floating gate electrode including: a first portion covered on the gate insulating films and the protection film; a second portion connected to the first portion; and a third portion provided on the substrate so as to connect to the end portion of the second portion on the opposite side from the first portion; an interelectrode insulating film provided on the first to third portions; and a plurality of control gate electrodes provided on the third portion.
US07893479B2 Deep trench in a semiconductor structure
A semiconductor structure. A hard mask layer is on a top substrate surface of a semiconductor substrate. The hard mask layer includes a hard mask layer opening through which a portion of the top substrate surface is exposed to a surrounding ambient. The hard mask layer includes a pad oxide layer on the top substrate surface, a nitride layer on the pad oxide layer, a BSG (borosilicate glass) layer on top of the nitride layer, and an ARC (anti-reflective coating) layer on top of the BSG layer. A BSG side wall surface of the BSG layer is exposed to the surrounding ambient through the hard mask layer opening.
US07893478B2 Semiconductor storage device and driving method thereof
This disclosure concerns a semiconductor storage device comprising a semiconductor layer provided on the insulation layer provided on the semiconductor substrate; a source layer and a drain layer provided in the semiconductor layer; a body provided between the source layer and the drain layer, the body being in an electrically floating state; an emitter layer contacting with the source layer, the emitter layer having an opposite conductive type to the source layer; a word line including the source layer, the drain layer, and the body, the word line being provided to memory cells arrayed in a first direction in a plurality of tow-dimensionally arranged memory cells; a source line connected to the source layers of the memory cells arrayed in the first direction; and a bit line connected to the drain layers of the memory cells arrayed in a second direction intersecting the first direction.
US07893477B2 Nonvolatile semiconductor memory
A select gate transistor has a select gate electrode composed of a first-level conductive layer and a second-level conductive layer. The first-level conductive layer has contact areas. The second-level conductive layer has its portions removed that are located above the contact areas. Two adjacent select gate electrodes that are adjacent to each other in the column direction are arranged such that the contact areas of one select gate electrode are not opposed to the contact areas of the other select gate electrode. One select gate electrode has its first- and second-level conductive layers removed in their portions that are opposed to the contact areas of the other select gate electrode.
US07893476B2 Tunnel effect transistors based on silicon nanowires
Tunnel field-effect transistors (TFETs) are regarded as successors of metal-oxide semiconductor field-effect transistors (MOSFETs), but silicon-based TFETs typically suffer from low on-currents, a drawback related to the large resistance of the tunnel barrier. To achieve higher on-currents a nanowire-based TFET with a germanium (Ge) tunnel barrier in an otherwise silicon (Si) channel is used. A nanowire is introduced such that the lattice mismatch between silicon and germanium does not result in a highly defective interface. A dynamic power reduction as well as a static power reduction can result, compared to conventional MOSFET configurations. Multiple layers of logic can therefore be envisioned with these nanowire Si/Ge TFETs resulting in ultra-high on-chip transistor densities.
US07893475B2 Dynamic random access memory cell and manufacturing method thereof
A dynamic random access memory cell including a bottom oxide layer, a first semiconductor layer, a second semiconductor layer, an insulation layer, a gate and a doping layer is provided. The bottom oxide layer is disposed on a substrate. The first semiconductor layer disposed on the bottom oxide layer has a first doping concentration. The second semiconductor layer disposed on the first semiconductor layer has a second doping concentration lower than the first doping concentration. The insulation layer disposed on the bottom oxide layer at least situates at the two sides of the first semiconductor layer. The height of the insulation layer is greater than that of the first semiconductor layer. The gate is disposed on the second semiconductor layer. The doping layer disposed correspondingly to the two sides of the gate substantially contacts the second semiconductor layer and the insulation layer.
US07893473B2 Semiconductor memory device and method of fabricating the same
The present invention is to provide a semiconductor memory device capable of providing excellent storage properties, scaling and high integration and a method of fabricating the same. A semiconductor memory device has a multiferroic film exhibiting ferroelectricity and ferromagnetism, a channel region on an interface of a semiconductor substrate below the multiferroic film, source and drain regions formed on both sides of the channel region, a gate electrode (data write electrode) applying gate voltage to the multiferroic film to write data in such a way that the orientation of magnetization is changed as corresponding to the orientation of dielectric polarization, and source and drain electrodes (data read electrodes) that read data based on a deviation in a flow of the carrier, the deviation caused by applying the Lorentz force to the carrier flowing in the channel region from a magnetic field occurring in the channel region because of magnetization.
US07893471B2 Semiconductor apparatus with a crystalline dielectric film and method of manufacturing said semiconductor apparatus
A semiconductor apparatus is proposed which is provided with a crystalline dielectric film having a perovskite structure, between electrodes. The semiconductor apparatus includes at least a discontinuous interface through which crystallinity becomes discontinuous, in a columnar crystal portion of the crystalline dielectric film.
US07893470B2 Techniques for coupling in semiconductor devices
Techniques for exchange coupling of magnetic layers in semiconductor devices are provided. In one aspect, a semiconductor device is provided. The device comprises at least two magnetic layers, and a spacer layer formed between the magnetic layers, the spacer layer being configured to provide ferromagnetic exchange coupling between the layers, the magnetic layers experiencing anti-ferromagnetic dipole coupling, such that a net coupling of the magnetic layers is anti-ferromagnetic in a zero applied magnetic field. The semiconductor device may comprise magnetic random access memory (MRAM). In another aspect, a method for coupling magnetic layers in a semiconductor device comprising at least two magnetic layers and a spacer layer therebetween, the method comprises the following step. Ferromagnetic exchange coupling is provided of the magnetic layers, the magnetic layers experiencing anti-ferromagnetic dipole coupling, such that a net coupling of the magnetic layers is anti-ferromagnetic in a zero applied magnetic field.
US07893466B2 Semiconductor FET sensor and method of fabricating the same
Provided are a semiconductor Field-Effect Transistor (FET) sensor and a method of fabricating the same. The method includes providing a semiconductor substrate, forming a sensor structure having a fin-shaped structure on the semiconductor substrate, injecting ions for electrical ohmic contact into the sensor structure, and depositing a metal electrode on the sensor structure, immobilizing a sensing material to be specifically combined with a target material onto both sidewall surfaces of the fin-shaped structure, and forming a passage on the sensor structure such that the target material passes through the fin-shaped structure.
US07893464B2 Semiconductor photodiode and method of manufacture thereof
A method of manufacture of an avalanche photodiode involving a step of making a recess in a top window layer of an avalanche photodiode layer stack, such that a wall surrounding the recess runs smoothly and gradually from the level of the recess to the level of the window layer. Further, diffusing a dopant over the entire window layer area so as to form a p-n junction at the bottom of the recess, and providing a first electrical isolation region around the recess by buried ion implantation or wet oxidation in order to limit the flow of electrical current to the p-n junction. Forming an isolation trench around the photodiode and a second electrical isolation region by ion implantation into the trench such that the second electrical isolation region runs through the absorption layer of the photodiode.
US07893459B2 Seal ring structures with reduced moisture-induced reliability degradation
A semiconductor chip includes a seal ring adjacent to edges of the semiconductor chip; an opening extending from a top surface to a bottom surface of the seal ring, wherein the opening has a first end on an outer side of the seal ring and a second end on an inner side of the seal ring; and a moisture barrier having a sidewall parallel to a nearest side of the seal ring, wherein the moisture barrier is adjacent the seal ring and has a portion facing the opening.
US07893456B1 Thyristor-based memory and its method of operation
A thyristor-based memory may comprise a thyristor accessible via an access transistor. A temperature dependent bias may be applied to at least one of a supporting substrate and an electrode capacitively-coupled to a base region of the thyristor. The voltage level of the adaptive bias may change with respect to temperature and may influence and/or compensate an inherent bipolar gain of the thyristor in accordance with the change in bias and may enhance its performance and/or reliability over a range of operating temperature. In a particular embodiment, the thyristor may be formed in a layer of silicon of an SOI substrate and the adaptive bias coupled to a supporting substrate of the SOI structure.
US07893453B2 LED device and method for manufacturing the same
A semiconductor light-emitting device and a method for manufacturing the same can include a soft silicon resin encapsulating an LED chip with a thin overcoat of microparticles located on the silicon resin to prevent dirt and dust from attaching to the silicon resin. The semiconductor light-emitting device can include a base board having at least one LED chip, a reflector fixed on the base board so as to enclose the LED chip, a soft silicon resin having a tacky surface disposed in the reflector, and an overcoat of microparticles on the silicon resin. Thus, manufacturing lead time can be reduced because the microparticles can attach to the silicon resin in a thin and single layer and a solidifying process for an extra layer on top of the silicon resin is not necessary. The overcoat of microparticles can prevent dirt and dust from attaching to the silicon resin, and can decrease optical variability in an inclined direction from an optical axis of the device.
US07893441B2 Flat panel display including electrostatic protection circuit
A flat panel display is disclosed. The flat panel display includes a display panel having a display area on which a plurality of pixels are formed, an inspection pad formed in a non-display area outside the display area of the display panel, an inspection switch formed in the non-display area, and an electrostatic protection circuit including a plurality of dummy thin film transistors (TFTs) whose gate electrodes are commonly connected to a signal line connecting the inspection pad to the inspection switch. The inspection pad contacts an external inspection device. The inspection switch applies an inspection signal received from the inspection pad to the pixels.
US07893439B2 Silicon nitride film and semiconductor device
An object of the present invention is to apply an insulating film of cure and high quality that is suitably applicable as gate insulating film and protective film to a technique that the insulating film is formed on the glass substrate under a temperature of strain point or lower, and to a semiconductor device realizing high efficiency and high reliability by using it. In a semiconductor device of the present invention, a gate insulating film of a field effect type transistor with channel length of from 0.35 to 2.5 μm in which a silicon nitride film is formed over a crystalline semiconductor film through a silicon oxide film, wherein the silicon nitride film contains hydrogen with the concentration of 1×1021/cm3 or less and has characteristic of an etching rate of 10 nm/min or less with respect to mixed solution containing an ammonium hydrogen fluoride (NH4HF2) of 7.13% and an ammonium fluoride (NH4F) of 15.4%.
US07893437B2 Semiconductor device and manufacturing method thereof
A semiconductor device and method of manufacturing the same are disclosed. An example semiconductor device includes a semiconductor substrate having a first well, a first source electrode, a drain electrode, and a first gate insulation layer formed on the semiconductor substrate, and a gate electrode formed on the first gate insulation layer. The example device also includes a second gate insulation layer formed on the gate electrode, a first source region formed on the semiconductor substrate between the first source electrode and the first gate insulation layer, a first drain region formed on the semiconductor substrate between the drain electrode and the first gate insulation layer, an insulating layer formed on the first source electrode, on the first source region, and on the first drain region, and a second source electrode formed on the insulating layer over the first source electrode. Additionally, a second source region is formed between the second source electrode and the second gate insulation layer, a second drain region formed between the drain electrode and the second gate insulation layer, and a second well formed on the second source region, on the second drain region, on the second source electrode, on the second gate insulation layer, and on the drain electrode.
US07893435B2 Flexible electronic circuits and displays including a backplane comprising a patterned metal foil having a plurality of apertures extending therethrough
A backplane for use in an electro-optic display comprises a patterned metal foil having a plurality of apertures extending therethrough, coated on at least side with an insulating polymeric material and having a plurality of thin film electronic devices provided on the insulating polymeric material.
US07893432B2 Thermal interface
Various embodiments include apparatus and method having a heat source, a thermal management device, and an interface disposed between the thermal management device and the heat source. The interface includes nanostructures to facilitate heat transfer and adhesion between the heat source and the thermal management device.
US07893429B2 Multifunction organic diode and matrix panel thereof
Disclosed is organic diode which is capable of light emitting display by an organic EL display, image sensing by a organic photodiode and power generation by an organic solar cell. Also disclosed is a matrix panel of such a multifunction organic diode. Specifically disclosed is a multifunction organic diode comprising a first electrode (12) formed on a substrate (11), an organic thin film (13) formed on the first electrode (12) and having both light emitting and photoconductive properties, and a second electrode (14) formed on the organic thin film (13).
US07893426B2 Single-charge tunnelling device
A single-electron transistor (1) has an elongate conductive channel (2) and a side gate (3) formed in a 5 nm-thick layer (4) of Ga0.98Mn0.02As. The single-electron transistor (1) is operable, in a first mode, as a transistor and, in a second mode, as non-volatile memory.
US07893422B2 Transistor on the basis of new quantum interference effect
A quantum interference transistor comprising a thin metal film having a protrusion and a thin insulating layer between the metal film and protrusion. A potential barrier is formed in the region beneath the protrusion as a result of quantum interference caused by the geometry of the film and protrusion. A voltage applied between the electrically isolated protrusion (“island”) and the thin film leads to a change in the electron wave function of the island which in turn leads to a change in the Fermi level of the metal film in the entire region beneath the protrusion. Consequently, a potential barrier may or may not exist depending on the applied voltage, thus providing the present invention with the transistor-like property of switching between open and closed states.
US07893420B2 Phase change memory with various grain sizes
A memory device includes a phase change element, which further includes a first phase change layer having a first grain size; and a second phase change layer over the first phase change layer. The first and the second phase change layers are depth-wise regions of the phase change element. The second phase change layer has a second average grain size different from the first average grain size.
US07893417B2 Phase changeable memory devices
A phase changeable memory cell is disclosed. According to embodiments of the invention, a phase changeable memory cell is formed that has a reduced contact area with one of the electrodes, compared to previously known phase changeable memory cells. This contact area can be a sidewall of one of the electrodes, or a perimeter edge of a contact opening through the electrode. Thus, when the thickness of the electrode is relatively thin, the contact area between the electrode and the phase changeable material pattern is relatively very small. As a result, it is possible to reduce power consumption of the phase changeable memory device and to form reliable and compact phase changeable memory cells.
US07893408B2 Methods and apparatus for ionization and desorption using a glow discharge
A method for ionizing and desorbing a sample for analysis includes energizing a first and second electrode to produce a glow discharge at atmospheric pressure. The method further includes supplying a carrier gas to at least a portion of the glow discharge to create effluents thereof. The method further includes conducting the effluents of the glow discharge to the sample to ionize and desorb the sample for analysis. An associated apparatus is also disclosed.
US07893403B2 Radiation image capturing apparatus
The invention relates to a radiation image capturing apparatus that includes a signal reading circuit for reading an image signal from a sensor substrate. The signal reading circuit includes a charge detecting circuit and a temperature sensor for detecting the temperature of the charge detecting circuit, and controls the gain of a variable gain amplifier of the charge detecting circuit based on the detected temperature.
US07893397B2 Apparatus and method for surface modification using charged particle beams
An apparatus and method for using high beam currents in FIB circuit edit operations, without the generation of electrostatic discharge events. An internal partial chamber is disposed over the circuit to be worked on by the FIB. The partial chamber has top and bottom apertures for allowing the ion beam to pass through, and receives a gas through a gas delivery nozzle. A non-reactive gas, or a combination of a non-reactive gas and a reactive gas, is added to the FIB chamber via the partial chamber, until the chamber reaches a predetermined pressure. At the predetermined pressure, the gas pressure in the partial chamber will be much greater than that of the chamber, and will be sufficiently high such that the gas molecules will neutralize charging induced by the beam passing through the partial chamber.
US07893396B2 Biometric device and information terminal
A compact biometric device includes a first light source for emitting light irradiated onto a subject; a first light guide whose surface is inputted with light radiated from the subject and outputs the light from the subject; a second light guide for guiding and irradiating the light emitted from the first light source onto the subject; a photo sensor to detect light output from the end of the first light guide means as a signal; a liquid crystal display installed between the subject and the surface of the first light guide; and a control unit for controlling the display on the liquid crystal display; and a signal processor unit for processing the signals detected by the photo sensor unit. The control unit controlling the liquid crystal display to change the position where light emitted from the subject is input onto the surface of the first light guide.
US07893394B2 Optical device, image reading device, and filter manufacturing method
A light emitting element has spectral characteristics in a predetermined optical wavelength range. A photodetecting unit includes a photodetecting element capable of detecting a light in the optical wavelength range and performs an OE conversion of either one of a reflected light and transmitted light from a scanning target. A filter unit is arranged in an optical path from the light emitting element to the photodetecting element via the scanning target and having an optical transmission range within the optical wavelength range and covering a range of variation in the optical wavelength range.
US07893393B2 System and method for calibrating an image projection system
A method and system for calibrating and operating projection systems where one or more projectors are utilized to project an image. One or more projectors are oriented to project an image on a projection screen and one or more image sensors are oriented to acquire the projected image. Three-dimensional position coordinates of the respective image fiducials as projected on the screen are identified by applying three-dimensional mapping functions to represent the manner in which two-dimensional points in a projector frame map to three-dimensional points on the projection screen. Parametric functions are fit to a neighborhood of points representing the three-dimensional image fiducial position coordinates and corresponding parametric models are generated. The projectors are then operated in accordance with geometric calibration data generated from validation and correction of the fiducial coordinates.
US07893389B2 Microwave food heating package with removable portion
Various blanks are provided for forming sleeves, containers and other constructs for heating, browning, and/or crisping of a food item in a microwave oven, and for holding and/or transporting the food item after heating. The various blanks, sleeves, containers and other constructs include a removable portion defined by one or more lines of disruption that enable the removable portion to be separated from the remainder of the blank, sleeve, container, or other construct.
US07893383B2 Bonding apparatus and method for cleaning tip of a bonding tool
A wire bonding apparatus for manufacturing, for instance, semiconductor devices, including a cleaning case in which a microplasma generating section comprised of a plasma torch, which has a plasma nozzle 38 at the end, and capacitive coupling electrodes composed of an outer electrode and an inner electrode is fixed to the bottom of the cleaning case. The plasma nozzle is provided such that its center line is in alignment with the longitudinal center line of the capillary. Microplasma is ejected from below the capillary to clean its tip within the cleaning case. A shutter is provided on the top of the cleaning case and the wasted gas produced as a result of cleaning is exhausted out of the cleaning case through an exhaustion port of the cleaning case.
US07893378B2 Materials recovery facility process optimization via unit operation feedback
Methods and systems are provided for controlling an automatic separator apparatus of a Materials Recovery Facility. An input waste material stream includes a mixture of first and second materials. The method includes a step of passing the input waste material stream through an adjustable separator having at least one adjustable parameter, and separating the input waste material stream into a first output stream containing the majority of the first material and some contaminant second material, and a second output stream containing the majority of the second material and some contaminant first material. The adjustable parameter is adjusted. The method includes monitoring the amount of contaminant second material in the first output stream, and the amount of contaminant first material in the second output stream, both before and after the adjustment of the adjustable parameter, and generating a signal indicative of whether the combined amount of contaminant material has decreased. The adjustable parameter is further adjusted responsive to the signal, in a direction indicated by the signal as being favorable to decreasing the combined amount of contaminant material in the first and second output streams.
US07893377B2 Method for concentrating oxygen isotope
A method of concentrating the stable oxygen isotopes of 17O and 18O by irradiating ozone with light, selectively dissociating an isotopologue of ozone containing an oxygen isotope in its molecule into oxygen, followed by dissociating the ozone and separating the formed oxygen from the non-dissociated ozone.In the ozone photodissociation step, light is radiated onto a rare gas-ozone mixed gas containing ozone and at least one rare gas selected from krypton, xenon and radon is used to selectively dissociate ozone containing a specific oxygen isotope in its molecule into oxygen then the oxygen isotope is separated from non-dissociated ozone and rare gas to concentrate the oxygen isotope present in the separated oxygen.
US07893375B2 Non-backlighted illuminating keypad
A non-backlighted illuminating keypad includes a keypad panel, a light gathering layer, an electronic ink layer, a first elastic layer and a switch board. The keypad panel includes a carrier and a plurality of keycaps arranged on the carrier. The light gathering layer is arranged on a bottom surface of the keypad panel and located corresponding to the keycaps. The electronic ink layer is arranged on a bottom surface of the light gathering layer. The first elastic layer is arranged on a bottom surface of the electronic ink layer and comprises a plurality of protrusion portions respectively corresponding to the keycaps. The switch board is arranged below the elastic layer.
US07893373B2 Multi-segment backlight system and method for keyboards
An electroluminescent apparatus includes a protection layer characterized by two or more non-overlapping regions and a back electrode layer which includes two or more back electrode regions. Each of the back electrode regions overlies a corresponding one of the non-overlapping regions in the protection layer. A bottom insulation layer includes two or more bottom insulation regions, each of which overlying a corresponding one of the back electrode regions. The apparatus includes two or more electroluminescent segments, each of which overlying a corresponding one of the back electrode layers. A transparent electrode layer includes two or more transparent electrode regions, each overlying a corresponding one of electroluminescent segments. The apparatus includes two or more power supply devices, each of which coupled to a corresponding one of the back electrode regions and to a corresponding one of the transparent electrode regions for providing luminescence over a corresponding one of the non-overlapping regions.
US07893372B2 Remote control for a mobile machine, in particular a heavy construction machine, agricultural or handling machine
Remote control for a mobile machine, in particular a heavy construction machine, agricultural or handling machine comprising a remote control body, a lever fixedly attached to a handle designed to be held by a user, means for connecting the lever to the body allowing a movement of the lever relative to the body on at least one axis, and means for detecting the relative movement of the lever relative to the body of the remote control, the signals originating from the detection means being designed for the control of a member of the mobile machine. The detection means are of the contactless type, and the remote control body comprises a sealed wall separating on the one hand the detection means that are situated on a first side of the sealed wall, and on the other hand, the lever and the means for connecting the lever to the body that are situated on a second side of the sealed wall.
US07893368B2 Weight measurement device, droplet discharge device, and weight measurement method
A weight measurement device is configured and arranged to measure the weight of a measurement object. The weight measurement device includes a container and a wind-guard cover. The container is configured and arranged to receive the measurement object therein. The wind-guard cover is configured and arranged to selectively cover an upper space of the container. The wind-guard cover has a transverse air-blocking part configured and arranged to block an air flow flowing in a transverse direction with respect to the container. The container also is equipped with an air control device that injects temperature-adjusted air into a chamber that accommodates the container and the wind-guard cover.
US07893357B2 Roebel winding with conductive felt
A conductive filler comprising a conductive felt and a non-conductive resin for use in a Roebel bar or winding and the manufacture of the conductive filler and Roebel bar or winding.
US07893352B2 Organic photosensitive optoelectronic device having a phenanthroline exciton blocking layer
An organic photosensitive optoelectronic device, having an anode, a cathode, and an organic blocking layer between the anode and the cathode is described, wherein the blocking layer comprises a phenanthroline derivative, and at least partially blocks at least one of excitons, electrons, and holes.
US07893351B2 Photovoltaic device and manufacturing method thereof
A photovoltaic device capable of improving an output characteristic is provided. The photovoltaic device includes an n-type single-crystal silicon substrate, a p-type amorphous silicon substrate, and a substantially intrinsic i-type amorphous silicon layer disposed between the n-type single-crystal silicon substrate and the p-type amorphous silicon layer. The i-type amorphous silicon layer includes: a first section which is located on the n-type single-crystal silicon substrate side, and which has an oxygen concentration equal to or below 1020 cm−3; and a second section which is located on the p-type amorphous silicon layer side, and which has an oxygen concentration equal to or above 1020 cm−3.
US07893349B2 Photovoltaic multi-junction wavelength compensation system and method
Systems and methods are disclosed for current loss compensation in multi-junction photovoltaic cells. The use of direct electrical contact with the interconnect layers in a multi-junction PV cell can improve cell efficiency over variable lighting conditions. Electrical contact with some or all of the interconnect layers can advantageously permit disconnection of subcells operating at low current or voltage. The result is multi-junction PV cells that can adapt to variable lighting conditions and compensate for a decrease in current in certain subcells, thereby advantageously improving a multi-junction PV cell's total output current.
US07893348B2 Nanowires in thin-film silicon solar cells
In some embodiments, the present invention is directed to photovoltaic (PV) devices comprising silicon (Si) nanowires as active PV elements, wherein such devices are typically thin film Si solar cells. Generally, such solar cells are of the p-i-n type and can be fabricated for front and/or backside (i.e., top and/or bottom) illumination. Additionally, the present invention is also directed at methods of making and using such devices, and to systems and modules (e.g., solar panels) employing such devices.
US07893347B2 Photovoltaic solar cell
A photovoltaic solar cell (SZ) of improved light-to-current conversion properties is provided with nano emitters (NE) of acicular or rib-like form and are separated from each other at a uniform distance D≦√{square root over (2)}L and penetrating to a penetration depth T ≥ d HL - L 2 + w into the semiconductor layer (HL).
US07893334B2 Pedal apparatus of electronic musical instrument
A lever 40 is supported by a lever supporting portion 41. The lever 40 is urged by a spring 45. A friction producing member 47 is in contact with a pivot restricting member 46 which is interlocked with the lever 40 to produce a frictional force in a direction opposite to the direction in which the lever 40 pivots. Such a configuration allows a pedal apparatus to exhibit hysteresis in characteristics of the amount of depression of the lever 40 and reaction force.
US07893333B2 Brass-wind mouthpiece
The present invention is directed to brass-wind mouthpieces (20), and in particular brass-wind mouthpieces (20) configured for improved performance and endurance. One aspect of the invention provides that the lateral shoulders (38) of the mouthpiece (20) rim (24), which respectively would face the corners of the musician's lips when the mouthpiece (20) is in use, slope outwardly away from the proximate end of the mouthpiece (20) cup (22).
US07893332B1 Music instrument stand
A support for a wind instrument is formed of a structural-supporting stand having a soft fabric support slung between the structural members of the stand for temporary support of a wind instrument. The structural members of the stand are preferably held together during use by elastic bands extending along certain of the structural members.
US07893329B2 Chin-rest for a violin
A chin-rest of a violin is attached to an edge of the resonating box of a violin. An opening is provided in the chin-rest through which an elastic knot for stretching the strings can pass through. This is attached at one place to the string holder and is drawn in a stretched state through the opening of the chin-rest. The opposite end is attached to a fixed end pin so that it comprises a portion of the chin-rest attachment. The chin-rest does not rest on the upper panel of the resonating box of the violin, instead, it is above it by a specified distance “d” and above the string holder.
US07893328B1 Neck and body joint for a musical instrument
A framework for a stringed musical instrument includes a body having a first interlocking interface in an outside face, a neck having a distal end and a proximal end with a second interlocking interface in the proximal end, and a key configured with first and second portions. One of the key portions is configured to interlock in the first interface on the outside face and the other of the portions is configured to interlock in the second interface of the proximal end such that the body and neck are held together, at least in part, by their common interlocking with the key.
US07893327B2 Plants and seeds of hybrid corn variety CH030594
According to the invention, there is provided seed and plants of the hybrid corn variety designated CH030594. The invention thus relates to the plants, seeds and tissue cultures of the variety CH030594, and to methods for producing a corn plant produced by crossing a corn plant of variety CH030594 with itself or with another corn plant, such as a plant of another variety. The invention further relates to genetic complements of plants of variety CH030594.
US07893323B2 Transformation of Allium sp. with agrobacterium using embryogenic callus cultures
The present invention relates to a method for transforming Allium species with a heterologous gene using Agrobacterium.
US07893321B2 Safflower with elevated gamma-linolenic acid
The present invention relates to compositions and methods for preparing gamma-linoleic acid (GLA) in safflower plants, particularly from seeds of safflower. Nucleic acid sequences and constructs encoding one or more fatty acid desaturase sequences are used to generate transgenic safflower plants that contain and express one or more of these sequences and produce high levels of GLA in safflower seeds. Provided are transgenic safflower plants and seeds that produce high levels of GLA.
US07893307B2 Apparatus and process for converting feed material into reusable hydrocarbons
Apparatus and process for producing hydrocarbon materials from a feed composition, the apparatus including a feed port; a viscous shear apparatus; a thermal decomposition assembly including a ribbonchannel reactor which includes an inner heated hollow cylinder; an outer heated hollow cylinder, one of which is rotatable with respect to the other, both heated hollow cylinders providing heat to the feed composition to convert it to a vapor fraction and a solid residue fraction; low height flighting mounted with respect to the inner and outer heated hollow cylinders to move the feed composition through the thermal decomposition assembly; at least one vapor port for removing the vapor fraction; and at least one solids port for removing the solid fraction.
US07893303B2 Polyarylene, process for producing the same, solid polyelectrolyte, and proton-conductive film
A polyarylene having a structural unit shown by the following formula (1) is disclosed. wherein X and Y indicate a divalent organic group or a single bond, Z shows an oxygen atom or a sulfur atom, R represents at least one atom or group selected from the group consisting of a hydrogen atom, a fluorine atom, an alkyl group, and a fluorine-substituted alkyl group, a is an integer of 1 to 20, n is an integer of 1 to 5, and p is an integer of 0 to 10.
US07893299B2 Interleukin-1 and tumor necrosis factor-αmodulators; syntheses of such modulators and methods of using such modulators
Described herein are chemical compounds and pharmaceutical compositions, including novel chemical compounds and pharmaceutical compositions thereof, useful in the treatment of various diseases and disease states. Also described are methods of synthesizing natural products and novel, structurally-related chemical compounds. More particularly, disclosed are new analogs of and processes for the preparation of compounds and pharmaceutical compositions thereof useful in the treatment of, for example, inflammation, cancer, multiple myeloma, cachexia, cardiovascular disease, anti-infectious, diabetes, otitis media, sinusitis and transplant rejection.
US07893298B2 Method for concentrating an aqueous ammonium carbamate stream
The invention relates to a method for concentrating an aqueous ammonium carbamate stream, which has been formed in a process for the preparation of urea, has a pressure between 0.20 MPa and 0.9 MPa, a temperature between 35° C. and 95° C., and contains at least 25 wt. % H2O, comprising: a pressure increase step, in which the aqueous ammonium carbamate stream is increased in pressure to a pressure between 1.0 MPa and 7 MPa; a condensation step, in which the aqueous ammonium carbamate stream is contacted with a gas stream, which has been formed in a process for the preparation of melamine and which consists essentially of NH3, CO2 and optionally H2O and has a lower H2O content than the aqueous ammonium carbamate stream, the gas stream being absorbed in the aqueous ammonium carbamate stream in such a way that a concentrated ammonium carbamate stream is formed that contains between 15 and 35 wt. % H2O; a discharge step, in which the concentrated ammonium carbamate stream is separated and discharged.
US07893297B2 Amorphous sodium 4-[4-chloro-2-hydroxybenzoyl)amino]butanoate
The present invention relates to amorphous and polymorphic forms of sodium 4-[(4-chloro-2-hydroxybenzoyl)amino]butanoate and their use for facilitating the delivery of active agents, such as insulin, to a target.
US07893293B2 Chemically amplified positive resist composition
A chemically amplified positive resist composition comprising (A) a resin which comprises (i) a polymerization unit represented by the formula (I): wherein R7 represents a hydrogen atom etc., R8 represents a C1-C4 alkyl group, p represents an integer of 1 to 3, and q represents an integer of 0 to 2, (ii) at least one polymerization unit selected from a group consisting of a polymerization unit represented by the formula (II): wherein R1 represents a hydrogen atom etc., R2 represents a C1-C8 alkyl group and ring X represents an alicyclic hydrocarbon group, and a polymerization unit represented by the formula (IV): wherein R3 represents a hydrogen atom etc., R4 and R5 independently represents a hydrogen atom etc., R10 represents a C1-C6 alkyl group etc., and (iii) a polymerization unit represented by the formula (III): wherein R3, R4 and R5 are the same as defined above, E represents a divalent hydrocarbon group, G represents a single bond etc., Z represents a carbonyl group etc. and L represents an anthryl group etc., and (B) at least one acid generator.
US07893292B2 Merocyanine derivatives for cosmetic use
Described are merocyanine derivatives of formula wherein R2 is hydrogen; C1-C22alkyl; cyclo-C3-C8alkyl; unsubstituted or C1-C6alkyl- or C1-C6alkoxy-substituted C6-C20aryl; a cyano group; or R1 and R2 together with the nitrogen atom linking them form a —(CH2)m— ring which is optionally interrupted by —O— or by —NR7—; R4 is a cyano group; or -Q1-R5; Q1 is —COO—; —CONH—; —CO—; —SO2—; or —CONR6—; R5 is C1-C22alkyl; cyclo-C3-C8alkyl; or unsubstituted or C1-C6alkyl-substituted C6-C20aryl; R6 is hydrogen; C1-C22alkyl; cyclo-C3-C8alkyl; unsubstituted or C1-C6alkyl- or C1-C6alkoxy-substituted C6-C20aryl; R7 is hydrogen; C1-C22alkyl; cyclo-C3-C8alkyl; unsubstituted or C1-C6alkyl- or C1-C6alkoxy-substituted C6-C20aryl; the cyclohexene radical C is not substituted or substituted by one or more C1-C5alkyl; m is from 3 to 7; n is from 2 to 4; and o is from 2 to 4. Said merocyanine derivatives are useful in protecting human and animal hair and skin from UV radiation and to cosmetic compositions comprising said derivatives.
US07893290B1 Process for the preparation of bis(pentadienyl)-complexes of iron group metals
A method for preparing organometallic complexes of the general formula (I): M(RPD)2  (I) in which M may be iron, ruthenium, or osmium, R is hydrogen or an alkyl group having about 1 to 4 carbon atoms, and PD is a cyclic or open chain dienyl system that is known to form a sandwich type complex is provided. The complexes having formula (I) have a metal purity of at least about 99.99%. The method involves reacting a M(III) trichloride hydrate with an HRPD compound and at least one reducing metal, such as aluminum, in an alcohol solvent.
US07893289B2 Adamantanamines and neramexane salts of thiomolybdic and thiotungstic acids
This invention concerns adamantanamines (e.g. memantine, amantadine, and rimantadine) and neramexane salts of thiomolybdic and thiotungstic acids, including their preparation and pharmaceutical compositions, as dual acting drugs. These salts are used to treat or potentially arrest the neurodegenerative pathophysiology, clinical signs and symptoms of dementia of the Alzheimer's type, Parkinson's, Huntington's, AIDS-related dementia and Schizophrenia and its cognitive deficits. Additional uses of these derivatives include antiviral activity. The novel compositions of the present invention appear particularly useful in enhancing the therapeutic benefits of copper-sequestering tetrathiomolybdates in treating elevated copper-induced toxicities in neurologically presenting Wilson's disease, and in treating diseases of the inflammatory etiology and abnormal copper biochemistry, such as tumor angiogenesis, liver cirrhosis, hepatitis, pulmonary fibrosis and other fibrotic diseases, cardiovascular disease, cerebral ischemia, renal anemia, rheumatoid arthritis, diabetes, obesity, gastrointestinal disorders, and eye diseases such as glaucoma, proliferative diabetic retinopathy, and age related macular degeneration. These compounds have excellent stability and aqueous solubility for good oral bioavailability.
US07893281B2 Process for preparing arylaminopropanols
The invention relates to a process for preparing enantiomerically enriched aryl-aminopropanols and to their use and also to intermediates.
US07893271B2 Benzimidazole carbamates and (thio) carbamates, and the synthesis and use thereof
This invention relates to benzimidazole carbamates and (thio)carbamates corresponding to Formula I: Here, X1 and X2 are independently O or S, wherein at least one of X1 and X2 is O; Y1 and Y2 are independently O or S, wherein at least one of Y1 and Y2 is O; R1 is alkyl having from 1-4 carbon atoms; R2, R3, and R4 are independently hydrogen or a cation; R5 and R6 are independently hydrogen, halogen, alkyl (having from 1-8 carbon atoms), —OR7, —SR8, —CO—R9, —OSO2—Ar, or —S(O)R10; R7 is alkyl having from 1-8 carbon atoms; R8 is alkyl (having from 1-8 carbon atoms) or aryl; R9 is alkyl (having from 1-8 carbon atoms), cycloalkyl (having from 3-6 carbon atoms), or aryl; Ar is aryl; and R10 is alkyl (having from 1-8 carbon atoms) or aryl. The compounds generally are soluble and stable in water, and have antiparasitic (particularly anthelmintic) activity in vivo that is comparable to known water-insoluble benzimidazole carbamates (e.g., albendazole and fenbendazole).
US07893268B2 Epithiolone analogues
Epothilone analogues include a molecular scaffold which holds at least one segment of epothilone in a predetermined orientation and which rigidities a region between the macrolactone ring and the aromatic side-chain.
US07893265B2 Methods for preparing arene-BIS (dicarboximide)-based semiconducting materials and related intermediates for preparing same
The present teachings provide compounds of formulae I and II: where Q, Ra, R1, W, and n are as defined herein. The present teachings also provide methods of preparing compounds of formulae I and II, including methods of preparing compounds of formula II from compounds of formula I. The compounds disclosed herein can be used to prepare semiconductor materials and related composites and electronic devices.
US07893263B2 Structural analogs of corosolic acid having anti-diabetic and anti-inflammatory properties
This invention relates to novel corosolic acid analogs of the formula I, wherein R1, R2, R3, R4 and R5 are described herein. These compounds exhibit good hypoglycemic and 5-lipoxygenase inhibitory activities. They also inhibit tumour growth. Pharmaceutical compositions containing known adjutants and the title compounds are also within the scope of this invention.
US07893261B2 Serotonin reuptake inhibitors
A serotonin reuptake inhibitor which can be used in the treatment of depression and which has a decreased occurrence of unwanted side effects. The serotonin reuptake inhibitors are bi-functional organic molecules which combine serotonin transporter reuptake inhibition with serotonin (5-HT, such as 5-HT2A) receptor antagonism in one molecular entity. The serotonin-selective reuptake inhibitor (SSRI) homologue portion of the molecule shows an affinity to the serotonin reuptake transporter (SERT) and has antidepressant properties. The piperazine or piperidine portion of the molecule demonstrates an affinity to 5-HT receptors and restores the undesired side effects of SSRIs.
US07893260B2 Substituted quinazolin-4-one compounds for antagonizing TRPV3 function
The present application relates to compounds and methods for treating pain and other conditions related to TRPV3. Suitable compounds include but are not limited to, for example, substituted quinazolin-4-ones of formula I.
US07893258B2 Preparation of delmopinol
It comprises a preparation process of delmopinol or a pharmaceutically acceptable salt and/or a solvate thereof, by submitting the compound of formula (II) where R1 and R2 are the same or different, independently selected from the group consisting of H, (C1-C6)-alkyl or, alternatively, R1 and R2 form, together with the carbon atom to which they are attached, a (C5-C6)-cycloalkyl radical; and R3 is a radical selected from the group consisting of CF3, (C1-C4)-alkyl, phenyl, and phenyl mono- or disubstituted by a radical selected from the group consisting of (C1-C4)-alkyl, halogen and nitro to a deprotection and cyclisation reaction. The process is useful to prepare delmopinol or its salts on an industrial scale. The compound of formula (II) is new and also forms part of the present invention, as well as its preparation process and other new intermediates of said preparation process.
US07893252B2 Selectively depolymerized galactomannan polysaccharide
Disclosed herein are compositions and methods for treating diseases such as cancer. The compositions comprise one or more polysaccharides in an admixture with one or more therapeutic agents. This admixture can be administered to a subject in need thereof using any known method of administration. The therapeutic agent, if administered alone, can cause undesirable side-effects in the subject. The polysaccharide component minimizes or eliminates these side effects. The compositions described herein effectuate an enhanced therapeutic effect along with reduced toxicity.
US07893251B2 Methods for selective isolation of nucleic acids from microbial cells present in samples containing higher eukaryotic cells and/or tissues
The invention relates to the use of nucleases, especially DNA-degrading nucleases, for degrading nucleic acids in the presence of one or several chaotropic agents and/or one or several surfactants. The invention further relates to a method for purifying RNA from mixtures of DNA and RNA as well as kits for carrying out such a method. Also disclosed is a method for specifically isolating nucleic acids from microbial cells provided in a mixed sample which additionally comprises higher eukaryotic cells as well as kits for carrying out such a method.
US07893250B2 Demethylated and/or oxidized membrane DNA
A process for the preparation of oxidized and/or demethylated antigens comprising the steps of treating a cell with a stress factor selected from the group consisting of UV-radiation, oxidizing reagents, heavy metal salts, drugs, nucleoside and nucleotide analogs, and enzyme inhibitors lyses of the cell to give a cell lysate purification of oxidized and/or demethylated antigens from the cell lysate.
US07893249B2 Deprotection and purification of oligonucleotides and their derivatives
Method for synthesis, deprotection, and/or purification of nucleic acid molecules, such as oligonucleotides comprising one or more ribonucleotides. Such nucleic acid molecules include siRNA, dsRNA, ribozymes, antisense, and aptamers.
US07893245B2 Interfering RNA molecules
The present invention is related to a ribonucleic acid comprising a double stranded structure whereby the double-stranded structure comprises a first strand and a second strand, whereby the first strand comprises a first stretch of contiguous nucleotides and whereby said first stretch is at least partially complementary to a target nucleic acid, and the second strand comprises a second stretch of contiguous nucleotides whereby said second stretch is at least partially identical to a target nucleic acid, and whereby the double stranded structure is blunt ended.
US07893241B2 Articles of manufacture for detection of herpes simplex virus
The invention provides methods to detect herpes simplex virus (HSV) in biological samples and further to distinguish between HSV-1 and HSV-2. Primers and probes for the differential detection of HSV-1 and HSV-2 are provided by the invention. Articles of manufacture containing such primers and probes for detecting HSV are further provided by the invention.
US07893239B2 Recombinant expression cassettes with a fungal 3' termination sequence that function in plants
The present invention provides recombinant expression cassettes comprising a fungal 3′ termination sequence which is functional in a plant. The recombinant expression cassettes comprise a plant promoter operably linked to a coding sequence having a stop codon, and the fungal termination sequence. The fungal 3′ termination sequence is heterologous to the coding sequence. The fungal 3′ termination sequence comprises structural features including a cleavage site, a positioning element, and an upstream element. The present invention also comprises methods for construction of the plant expression cassettes and introducing the cassettes into plant cells.
US07893238B2 Nucleic acid and amino acid sequences relating to Streptococcus pneumoniae for diagnostics and therapeutics
The invention provides isolated polypeptide and nucleic acid sequences derived from Streptococcus pneumoniae that are useful in diagnosis and therapy of pathological conditions; antibodies against the polypeptides; and methods for the production of the polypeptides. The invention also provides methods for the detection, prevention and treatment of pathological conditions resulting from bacterial infection.
US07893235B2 Nucleic acids encoding the GPCR, RUP3, and methods of use thereof
The invention disclosed in this patent document relates to transmembrane receptors, more particularly to endogenous, human orphan G protein-coupled receptors.
US07893233B2 Detection of nucleic acid sequence differences using the ligase detection reaction with addressable arrays
The present invention describes a method for identifying one or more of a plurality of sequences differing by one or more single base changes, insertions, deletions, or translocations in a plurality of target nucleotide sequences. The method includes a ligation phase, a capture phase, and a detection phase. The ligation phase utilizes a ligation detection reaction between one oligonucleotide probe, which has a target sequence-specific portion and an addressable array-specific portion, and a second oligonucleotide probe, having a target sequence-specific portion and a detectable label. After the ligation phase, the capture phase is carried out by hybridizing the ligated oligonucleotide probes to a solid support with an array of immobilized capture oligonucleotides at least some of which are complementary to the addressable array-specific portion. Following completion of the capture phase, a detection phase is carried out to detect the labels of ligated oligonucleotide probes hybridized to the solid support.
US07893230B2 Nucleic acid and amino acid sequences relating to Streptococcus pneumoniae for diagnostics and therapeutics
The invention provides isolated polypeptide and nucleic acid sequences derived from Streptococcus pneumoniae that are useful in diagnosis and therapy of pathological conditions; antibodies against the polypeptides; and methods for the production of the polypeptides. The invention also provides methods for the detection, prevention and treatment of pathological conditions resulting from bacterial infection.
US07893228B2 Compositions and methods for using a solid support to purify RNA
Reagents, methods and kits for the purification of RNA from biological materials are provided.
US07893225B2 Crosslinked polysaccharide sponge
A process for producing a polysaccharide sponge comprises the steps of (A) freezing a photoreactive polysaccharide solution, and (B) irradiating the frozen photoreactive polysaccharide solution with light to crosslink the photoreactive polysaccharide, thereby obtaining the polysaccharide sponge. The process includes simplified steps requiring no removal of solvent, and has such an advantage that impurities are easily removed therefrom.
US07893220B2 Busulfan immunoassay
Novel conjugates of busulfan and novel busulfan immunogens derived from α-substituted derivatives of busulfan and antibodies generated by these busulfan linked immunogens are useful in immunoassays for the quantification and monitoring of busulfan in biological fluids.
US07893215B2 Agonist antibodies to IL-23 receptor
Provided are methods of treatment for skin disorders. In particular, treatment, the skin disorders are generally inflammatory skin disorders, including improper wound healing. Provided are methods of using of a cytokine molecule.
US07893213B2 Antibodies to activin receptor
In accordance with the present invention, there are provided novel receptor proteins characterized by having the following domains, reading from the N-terminal end of said protein: an extracellular, ligand-binding domain, a hydrophobic, trans-membrane domain, and an intracellular, receptor domain having serine kinase-like activity. The invention receptors optionally further comprise a second hydrophobic domain at the amino terminus thereof. The invention receptor proteins are further characterized by having sufficient binding affinity for at least one member of the activin/TGF-β superfamily of polypeptide growth factors such that concentrations of ≦10 nM of said polypeptide growth factor occupy ≧50% of the binding sites of said receptor protein. A presently preferred member of the invention superfamily of receptors binds specifically to activins, in preference to inhibins, transforming growth factor-β, and other non-activin-like proteins. DNA sequences encoding such receptors, assays employing same, as well as antibodies derived therefrom, are also disclosed.
US07893212B2 S-nitroso group-containing albumin, method for production, and anticancer agent
The present invention provides an S-nitroso group-containing albumin, comprising an S-nitroso group introduced to at least one lysine in the amino acid sequence for albumin. The S-nitro group has been introduced into a lysine in the S-nitroso group-containing albumin of the invention to allow more S-nitroso groups to be included in the albumin, thus ensuring more potent inhibition of cancer cells in NO groups.
US07893210B2 Process for renaturation of recombinant, disulfide containing proteins at high protein concentrations in the presence of amines
A method for renaturation of proteins comprising adding to a solution of denatured, chemically modified or reduced proteins a refolding buffer containing a primary, secondary or tertiary amine. Said method has been applied, for example, to interleukin-4 and bovine pancreatic trypsin inhibitor (BPTI), which were previously (i) solubilized in the presence of guanidinium hydrochloride as chaotronic agent, and (ii) subjected to sulfitolysis.
US07893208B2 Muteins of human tear lipocalin
The present invention relates to novel muteins derived from tear lipocalin or a homologue thereof. In particular, the invention relates to a mutein of human tear lipocalin. The invention also refers to a corresponding nucleic acid molecule encoding such a mutein and to a method for its generation. The invention further refers to a method for producing such a mutein. Finally, the invention is directed to a pharmaceutical composition comprising such a lipocalin mutein as well as to various use of the mutein.
US07893207B2 Fluorescent and colored proteins, and polynucleotides that encode these proteins
The subject invention provides new fluorescent and/or colored proteins, and polynucleotide sequences that encode these proteins. The subject invention further provides materials and methods useful for expressing these detectable proteins in biological systems.
US07893205B2 Hemopoietin receptor protein, NR12
A novel hemopoietin receptor gene (NR12) was successfully isolated by extracting motifs conserved among the amino acid sequences of known hemopoietin receptors and by using the predicted sequence. The NR12 gene encodes two forms of proteins, a transmembrane type and a soluble type. The expression of the NR12 gene was detected in tissues containing hematopoietic cells. NR12 is a novel hemopoietin receptor molecule involved in the regulation of immune system and hematopoiesis in vivo. Thus, NR12 is useful in the search for novel hematopoietic factors that functionally bind to the NR12 receptor, and in the development of therapeutic drugs for diseases associated with immunity or hematopoiesis.
US07893204B2 Attractin/mahogany-like polypeptides
The present disclosure provides attractin/mahogany-like polypeptides and fragments thereof, polynucleotides encoding such polypeptides and fragments, processes for production of recombinant forms of such polypeptides, antibodies generated against these polypeptides or fragments, and assays and methods employing these polypeptides, antibodies, and polynucleotides.
US07893195B2 Method for recovering a polymer from a liquid medium
Method for recovering a polymer from a liquid medium (1) substantially containing the polymer and a solvent for the latter, wherein: (a) this liquid medium (1) is injected into a reactor (2) containing a stirred substantially monophase liquid mixture comprising a major fraction by weight of a non-solvent and a minor fraction by weight of a solvent, the mixture having a composition and temperature such that the polymer precipitates therefrom progressively; (b) the polymer is recovered in the form of particles in suspension (5) in a liquid rich in non-solvent; (c) the polymer particles (9) are separated from the liquid.
US07893194B2 Single solvent polymer extraction methods
This invention relates to single solvent polymer extraction methods.
US07893193B2 Method for making a chlorohydrin
Process for preparing a chlorohydrin, comprising the following steps: (a) a polyhydroxylated aliphatic hydrocarbon, an ester of a polyhydroxylated aliphatic hydrocarbon or a mixture thereof is reacted with a chlorinating agent and an organic acid so as to give a mixture containing the chlorohydrin and esters of the chlorohydrin (b) at least part of the mixture obtained in step (a) is subjected to one or more treatments in steps subsequent to step (a) (c) polyhydroxylated aliphatic hydrocarbon is added to at least one of the steps subsequent to step (a), so as to react, at a temperature greater than or equal to 20° C., with the esters of the chlorohydrin, so as to form, at least partly, esters of the polyhydroxylated aliphatic hydrocarbon.
US07893187B2 Glass laminates comprising polyester compositions formed from 2,2,4,4-tetramethyl-1,3-cyclobutanediol and 1,4-cyclohexanedimethanol
Described are glass laminates comprising polyester compositions comprising polyesters which comprise (a) a dicarboxylic acid component having terephthalic acid residues; optionally, aromatic dicarboxylic acid residues or aliphatic dicarboxylic acid residues or ester residues thereof; 2,2,4,4-tetramethyl-1,3-cyclobutanediol residues; and 1,4-cyclohexanedimethanol residues.
US07893182B2 Manufacture of resins
A method of forming a powder and/or discrete gel particles of a compound selected from the group of a metallic oxide, a metalloid oxide, a mixed oxide, an organometallic oxide, an organometalloid oxide, an organomixed oxide resin, and/or an organic resin from one or more respective organometallic precursor(s), organometalloid precursor(s) and/or organic precursors and mixtures thereof, comprising the steps of passing a gas into a means for forming excited and/or unstable gas species (1a), typically an atmospheric plasma generating means; treating said gas such that upon leaving said means the gas comprises excited and/or unstable gas species which are substantially free of electrical charges at a temperature of between 10° C. and 500° C. A gaseous and/or liquid precursor is then introduced (50a,50b) into said excited and unstable gas species in a downstream region external (20) to the means for forming excited and/or unstable gas. The interaction between the precursor and the excited and unstable gas species results in the formation of a powder and/or discrete gelled particles which are subsequently collected. The particles prepared by the method may be subsequently functionalised.
US07893180B2 Process for the polymerization of olefins; novel polyethylenes, and films and articles produced therefrom
A novel process for the polymerization of olefins is provided. The process involves contacting at least one olefin with a Ziegler-Natta type catalyst in the presence of a specified compound that results in the production of polymeric products having a narrower molecular weight distribution. Also provide is a process for narrowing the molecular weight distribution of a polyolefin comprising contacting an olefin, a Ziegler-Natta catalyst and a compound specified herein. Further provided are novel polyethylenes, and films and articles produced therefrom.
US07893179B2 2-octyl (meth)acrylate adhesive composition
A pressure sensitive adhesive composition comprising a 2-octyl (meth)acrylate/(meth)acrylic acid copolymer is described. The adhesive composition may be derived from renewable resources and provides good peel, shear and high temperature stability.
US07893178B2 Process for storing a monomer phase which is liquid under the conditions of storage
A process for storing a monomer phase which is liquid under the conditions of storage and comprises methacrylic monomers to an extent of ≧95% by weight and has been obtained by condensation out of a gaseous phase or by melting a crystalline phase, in a storage vessel, in which polymer of the monomer present in dissolved form in the liquid monomer phase is removed therefrom on the route from its generation into the storage vessel, and also a process for withdrawing liquid monomer phase from the storage vessel in which polymer of the monomer present in dissolved form in the monomer phase is likewise removed.
US07893177B1 Redox polymer nanoparticles
The invention provides nanoparticles and nanoparticle conjugates comprising one or more redox-active species, methods of making nanoparticles and nanoparticle conjugates, and methods for using nanoparticles and nanoparticle conjugates, for example, as diagnostic agents for the detection of various analytes.
US07893172B2 Oligomer and polymer comprising triphenyl phosphine units
An oligomer or polymer comprising a first repeat unit and a second repeat unit that may be the same or different, the first repeat unit having formula (I): wherein each E independently represents optionally substituted nitrogen or optionally substituted phosphorus, with the proviso that at least one E is optionally substituted phosphorus; each Ar1, Ar2 and Ar3 is the same or different and independently represents an optionally substituted aryl or heteroaryl; n is 0-3; and in the case of unsubstituted nitrogen and phosphorus, the second repeat unit is directly conjugated to the first repeat unit.
US07893170B2 Curable composition having improved curability and adhesion
There is provided a curable composition having good curability and adhesion by using a non-organotin catalyst.The curable composition comprising (A) an organic polymer having a reactive silicon group as a silicon-containing group being capable of crosslinking by forming siloxane bonds, (B) one or more kinds selected from a titanium catalyst, an aluminum catalyst and a zirconium catalyst, and (C) a low molecular weight compound containing a hydrolyzable silicon group and having a molecular weight of 100 to 1,000, characterized in that a ratio (a/b) of the total mole (a) of titanium atoms, aluminum atoms and zirconium atoms of the component (B) to the total mole (b) of silicon atoms of the component (c) is larger than 0.08.
US07893161B2 Propylene-based elastomeric composition
The present invention includes a polyolefin elastomeric composition comprising a propylene-based elastomer having at least seventy five weight percent units derived from propylene, the propylene-based elastomer exhibiting a heat of fusion of from 1 to 35 Joules/gram, a weight average molecular weight of from 5400 to 875000 g/mol, and a permanent set of less than 40%; and a homogeneous ethylene-alpha olefin interpolymer having a molecular weight distribution of less than 3.5, a density from 0.885 to 0.915 g/ml, and a heat of fusion of from 65 to 125 Joules/gram, wherein the ratio of the propylene-based elastomer to the homogeneous ethylene-alpha olefin interpolymer is from 97:3 to 80:20, and wherein the composition exhibits a heat of fusion from 2 to 55 Joules/gram, and a 2% secant flexural modulus of less than 69 MPa.
US07893160B2 Crosslinkable substituted fluorene compounds and conjugated oligomers or polymers based thereon
Crosslinkable substituted fluorene compounds; oligomers and polymers prepared from such crosslinkable compounds; films and coatings; and multilayer electronic devices comprising such films are disclosed.
US07893156B2 Block copolymer and composition thereof
The present invention provides a block copolymer or a hydrogenated product thereof excellent in low-temperature shrinkability, natural shrinkability, rigidity and the like, excellent in a balance of physical properties such as blocking resistance, resistance to fusion bonding in hot water, impact resistance and the like, and having a few fish eyes (FE's) caused by gels. Further, the invention provides a heat shrinkable film and a heat shrinkable multilayer film suitable for drink container packaging, cap seals and the like, using such a block copolymer or the hydrogenated product thereof. The invention provides a block copolymer having a weight ratio of a vinyl aromatic hydrocarbon and a conjugated diene of 60/40 to 90/10 and a number average molecular weight measured by gel permeation chromatography (GPC) of 30,000 to 500,000, wherein the vinyl aromatic hydrocarbon constituting the block copolymer has a block rate of from 10 to 90% by weight, the vinyl aromatic hydrocarbon polymer blocks constituting the block copolymer have a peak molecular weight within the molecular weight range of 5,000 to 30,000, and 40 to 80% by weight of the vinyl aromatic hydrocarbon polymer blocks have a molecular weight of 35,000 or less.
US07893155B2 Material or curable solvent-based topcoating material, and coating material and coating film comprising or formed from the same
To provide a coating material for a curable solvent-based topcoating material, having excellent marring resistance, chipping resistance, producing no crack and excellent in performances such as weatherability, stain resistance, adhesion and the like, and a curable solvent-type topcoating material using such a material.A coating material is blended preferably in an amount of 60 to 90% by mass relative to paint film forming components thereby to form a curable solvent-based topcoating material. The coating material includes an oleophilic polyrotaxane which includes a cyclic molecule, a linear molecule including the cyclic molecule with piercing through the cyclic molecule, and blocking groups which are placed at both end terminals of the linear molecule to prevent the cyclic molecule from leaving from the linear molecule, at least one of the above-mentioned liner molecule and the cyclic molecule having hydrophobic modification group.
US07893153B2 Process for producing modified conjugated diene polymer, modified conjugated diene polymer obtained by the process, and rubber composition containing the same
A process for producing a modified conjugated diene polymer includes subjecting an active terminal of a conjugated diene polymer having a vinyl content of less than 10% and a cis-1,4 bond content of 75% or more to a modification reaction with an alkoxysilane compound, and subjecting the alkoxysilane compound (residue) to a condensation reaction in an aqueous solution at a pH of 9 to 14 and a temperature of 85 to 180° C. in the presence of a condensation accelerator including a compound containing titanium. The modified conjugated diene polymer exhibits low heat build-up and increased reinforcing properties when used for a rubber composition, and exhibits excellent wear resistance, mechanical characteristics, and processability.
US07893146B2 Tire having a tire tread
A rubber composition, wherein a reaction efficiency of a silane coupling agent at kneading is improved, generation of air bubbles is suppressed, abrasion resistance is improved, and rolling resistance is lowered, is provided. A rubber composition containing silica, which comprises 3 to 15 parts by weight of a silane coupling agent based on 100 parts by weight of silica, and boric acid.
US07893145B2 Oxygen-absorbing resin composition
The present invention provides an oxygen-absorbing resin composition containing a thermoplastic resin (A) having carbon-carbon double bonds substantially only in the main chain and a transition metal salt (B), and the oxygen absorption amount of 1 mol of carbon-carbon double bond of the thermoplastic resin (A) being 1.6 mols or more.
US07893144B2 Polyoxyalkylene ammonium salts and their use as antistatic agents
The present invention provides polyoxyalkylene ammonium imide or methide salts and their use as antistatic agents. Another embodiment provides articles comprising these salts, and processes for making and using these salts.
US07893143B2 Process for the preparation of self-extinguishing thermoplastic polyurethanes
The present invention relates to a process for the preparation of self-extinguishing thermoplastic polyurethanes which optionally contain conventional additives and/or auxiliary substance.
US07893142B2 Process for the preparation of polyphosphates of organic bases
A simple and economical process for the preparation of polyphosphates of organic bases consists of reacting a mixture of phosphorus pentoxide and at least one organic nitrogen base with at least one compound which releases water accompanied by decomposition under the prevailing conditions in such a molar ratio that upon decomposition of the water-releasing compound at most essentially 2 mol. water are produced per mol. phosphorus pentoxide. Thus-prepared polyphosphates are particularly suitable as flame-protection agents for plastics.
US07893138B2 Low molecular weight carboxyalkylcellulose esters and their use as low viscosity binders and modifiers in coating compositions
Carboxyalkylcellulose esters are disclosed having relatively low degrees of polymerization. These new carboxyalkylcellulose esters include carboxymethylcellulose acetate, carboxymethylcellulose acetate propionate, and carboxymethylcellulose acetate butyrate. The inventive esters exhibit solubility in a range of organic solvents, and are useful in coatings and ink compositions as binder resins and rheology modifiers.
US07893135B2 Impact-modified polyalkylene terephthalate/polycarbonate compositions
The present invention relates to compositions comprising A) aromatic polycarbonate, B) polyalkylene terephthalate and C) a concentrate comprising polyalkylene terephthalate and at least one compound selected from the group consisting of ortho-phosphoric acid, phosphorous acid, carboxylic acid esters of ortho-phosphoric acid and carboxylic acid esters of phosphorous acid, Compositions of the present invention are distinguished by high melt stability. The present invention also relates to a process for the preparation of impact-modified polyalkylene terephthalate/polycarbonate compositions, wherein a concentrate of polyalkylene terephthalate with a phosphorus-containing additive is used.
US07893131B2 Fast dry, shelf stable aqueous coating composition comprising a phosphorus acid polymer
The present invention provides fast drying aqueous compositions, suitable for use in making roadway markings, as well as the road markings made therefrom, the compositions comprising one or more anionically stabilized binder having a phosphorus acid functional polymer component having a glass transition temperature (Tg) range of from −30° C. to 60° C. and a polyfunctional amine component in combination with one or more volatile base in an amount sufficient to stabilize the composition by at least partially deprotonating the polyfunctional amine, and one or more phosphorus acid surfactant, such as an alkyl ethoxylated phosphate. Further, the present invention provides two component compositions comprising the above composition as one component and a second component comprising an absorber and/or the polyfunctional amine component. The fast-drying compositions are viscosity stable and provide wear resistant fast dry coatings even in humid application conditions.
US07893129B2 Stable, cationically polymerizable/crosslinkable dental compositions
Stable, highly filled cationic dental compositions useful for the production of dental prostheses and dental restoration materials contain: (1) at least one compound which is reactive cationically when activated, advantageously at least one UV- and cationically reactive oxirane-functionalized silicone; (2) at least one dental filler, advantageously SiO2; (3) at least one organic polymer or copolymer dispersant having an amine index less than or equal to 100 mg of potassium hydroxide per gram of dispersant, advantageously a polyurethane/acrylate copolymer or alkylammonium salt thereof; (4) at least one cationic photoinitiator, advantageously iodonium borate; and (5) optionally, at least one photosensitizer.
US07893128B2 Cationic radiation-curing controlled release coating materials
The invention provides radiation-curing coating materials composed of at least one silicone resin modified with vinylalkoxysilane and vinylcyclohexene oxide and of at least one epoxy-functionalized polysiloxane and of a cationic photoinitiator. Furthermore, coinitiators may also be a constituent of the mixture, in order to obtain increased reactivity of the formulation.
US07893127B2 Radiation curable and jettable ink compositions
Radiation curable and jettable ink compositions comprise ethylenically unsaturated oligomer and an ethylenically unsaturated monofunctional monomer. The compositions may optionally include additional ethylenically unsaturated polyfunctional component and/or chain transfer agent. The compositions have a viscosity at 25° C. of not greater than about 70 cPs and are radiation curable to form a cured ink having an elongation of at least 150%.
US07893124B2 Method for producing rigid polyurethane foams
The invention relates to a process for producing rigid polyurethane foams by reacting a) polyisocyanates with b) compounds having at least two hydrogen atoms which are reactive toward isocyanate groups in the presence of c) blowing agents wherein a mixture of b1) a polyether alcohol which has a functionality of 4 and a hydroxyl number of from 380 to 450 mg KOH/g and a viscosity of greater than 12 000 mPa·s and can be prepared by addition of ethylene oxide and/or propylene oxide onto TDA, b2) a polyether alcohol which has a functionality of from 5 to 7.5 and a hydroxyl number of from 380 to 480 mg KOH/g and can be prepared by addition of propylene oxide onto sucrose and/or sorbitol, b3) a polyether alcohol which has a functionality of from 2 to 4 and a hydroxyl number of from 140 to 250 mg KOH/g and can be prepared by addition of ethylene oxide and propylene oxide onto TDA or of propylene oxide onto 2-, 3- or 4-functional alcohols, amines other than TDA or castor oil derivatives, is used as compounds b) having at least two hydrogen atoms which are reactive toward isocyanate groups.
US07893118B2 Compositions containing particles of highly fluorinated ion exchange polymer
Solid and liquid compositions containing particles of highly fluorinated ion-exchange polymer having sulfonate functional groups with an ion exchange ratio of less than about 33. The compositions contain at least about 25% by weight of polymer particles having a particle size of about 2 nm to about 30 nm.
US07893116B2 Defoaming compositions for water-dilutable paint systems
A defoamer composition for water-dilutable paint systems includes one or more glycerides; one or more aliphatic hydrocarbons; and one or more addition products of ethylene oxide (EO) and/or propylene oxide (PO) onto C8-24 fatty alcohols.
US07893110B2 Carboxylic acid amides provoking a cooling sensation
The present invention refers to cooling compounds of formula I wherein R1, R2, R3, X, Y, Z, and m have the same meaning as given in the specification. The present invention refers furthermore to a process for their production and to product compositions comprising them.
US07893106B2 Oxylipins from stearidonic acid and γ-linolenic acid and methods of making and using the same
Disclosed are novel oxylipins that are derived from γ-linolenic acid (GLA; 18:3n-6) and stearidonic acid (STA or SDA; 18:4n-3), and methods of making and using such oxylipins. Also disclosed is the use of such oxylipins in therapeutic and nutritional or cosmetic applications, and particularly as anti-inflammatory or anti-neurodegenerative compounds. Also disclosed are The invention novel ways of producing long chain polyunsaturated acid (LCPUFA)-rich oils and compositions that contain enhanced and effective amounts of SDA- and/or GLA-derived oxylipins.
US07893105B2 Levodopa prodrug mesylate, compositions thereof, and uses thereof
(2R)-2-Phenylcarbonyloxypropyl (2S)-2-amino-3-(3,4-dihydroxyphenyl)propanoate mesylate and crystalline form thereof, methods of making the same, pharmaceutical compositions thereof, and methods of using the same to treat diseases or disorders such as Parkinson's disease are provided.
US07893097B2 Methods and compositions for increasing solubility of azole drug compounds that are poorly soluble in water
The combination of any two of a polyol, a polyol ether, and a low carbon organic alcohol provides a synergistic effect on the solubility of azole compounds, such as metronidazole, in aqueous fluid.
US07893096B2 Use of small molecule compounds for immunopotentiation
The invention provides immunostimulatory compositions comprising a small molecule immuno-poteniator (SMIP) compound and methods of administration thereof. Also provided are methods of administering a SMIP compound in an effective amount to enhance the immune response of a subject to an antigen. Further provided are novel compositions and methods of administering SMIP compounds alone or in combination with another agent for the treatment of cancer, infectious diseases and/or allergies/asthma.
US07893093B2 Sulfonyl containing compounds as cysteine protease inhibitors
The present invention is directed to compounds that are inhibitors of cysteine proteases, in particular, cathepsins B, K, L, F, and S and are therefore useful in treating diseases mediated by these proteases. The present invention is directed to pharmaceutical compositions comprising these compounds and processes for preparing them.
US07893086B2 Sirtuin modulating compounds
Provided herein are novel sirtuin-modulating compounds and methods of use thereof. The sirtuin-modulating compounds may be used for increasing the lifespan of a cell, and treating and/or preventing a wide variety of diseases and disorders including, for example, diseases or disorders related to aging or stress, diabetes, obesity, neurodegenerative diseases, cardiovascular disease, blood clotting disorders, inflammation, cancer, and/or flushing as well as diseases or disorders that would benefit from increased mitochondrial activity. Also provided are compositions comprising a sirtuin-modulating compound in combination with another therapeutic agent.
US07893085B2 Aza-benzothiophenyl compounds and methods of use
The invention relates to azabenzothiophenyl compounds of Formula I with anti-cancer and/or anti-inflammatory activity and more specifically to azabenzothiophenyl compounds which inhibit MEK kinase activity. The invention provides compositions and methods useful for inhibiting abnormal cell growth or treating a hyperproliferative disorder, or treating an inflammatory disease in a mammal. The invention also relates to methods of using the compounds for in vitro, in situ, and in vivo diagnosis or treatment of mammalian cells, or associated pathological conditions.
US07893083B2 Method of treating genital herpes
The present invention is directed to a method of increasing the time period between outbreaks of genital herpes comprising providing an imidazoquinolinamine formulation, disposing an amount of the imidazoquinolinamine formulation into a first nare of an individual infected with Herpes Simplex Virus type 2, covering at least a portion of the internal surface of the individual's first nare with a portion of the amount of the imidazoquinolinamine in the nare, massaging the portion of the amount of the imidazoquinolinamine into the internal surface of the first nare, disposing the amount of the imidazoquinolinamine formulation into a second nare of the individual, covering at least a portion of the internal surface of the second nare with a portion of the amount of the imidazoquinolinamine in said nare and massaging the portion of the amount of the imidazoquinolinamine into the internal surface of said nare.
US07893082B2 Substituted tetrahydroquinolines
Disclosed are compounds of formula (I), wherein W, R, R1, R2, R3, R4, R5, R6, and R7 have the meanings indicated in claim 1. Said compounds can be used for the treatment of tumors, among other things.
US07893077B2 Bisaryl-sulfonamides
Compounds, compositions and methods are provided that are useful in the treatment or prevention of a condition or disorder mediated by PPARγ or PPARδ. In particular, the compounds of the invention modulate the function of PPARγ or PPARδ. The subject methods are particularly useful in the treatment and/or prevention of diabetes, obesity, hypercholesterolemia, rheumatoid arthritis and atherosclerosis.
US07893067B2 Cysteine protease inhibitors
Compounds of the formula II: wherein R2 is the side chain of leucine, isoleucine, cyclohexylglycine, O-methyl threonine, 4-fluoroleucine or 3-methoxyvaline; R3 is H, methyl or F; Rq is trifluoromethyl and Rq′ is H or Rq and Rq′ define keto; Q is a p-(C1-C6alkylsulphonyl)phenyl- or an optionally substituted 4-(C1-C6alkyl)piperazin-1-yl-thiazol-4-yl- moiety have utility in the treatment of disorders characterized by inappropriate expression or activation of cathepsin K, such as osteoporosis, osteoarthritis, rheumatoid arthritis or bone metastases.
US07893063B2 2,4,6-trisubstituted pyrimidines as phosphotidylinositol (PI) 3-kinase inhibitors and their use in the treatment of cancer
The invention concerns pyrimidine derivatives of Formula (I) wherein each of Qa, G1, G2, q, R3, r, R4, X1 and Qb have any of the meanings defined in the description; processes for their preparation, pharmaceutical compositions containing them and their use in the manufacture of a medicament for use in the production of an anti-proliferative effect in a warm-blooded animal such as man.
US07893051B2 Thiophenyl and pyrrolyl azepines as serotonin 5-HT2c receptor ligands and uses thereof
The present invention generally relates to a series of compounds, to pharmaceutical compositions containing the compounds, and to use of the compounds and compositions as therapeutic agents. More specifically, compounds of the present invention are thiophenyl and pyrrolyl azepine compounds. These compounds are serotonin receptor (5-HT2c) ligands and are useful for treating diseases, disorders, and conditions wherein modulation of the activity of serotonin receptors (5-HT2c) is desired (e.g. addiction, anxiety, depression, obesity, and others).
US07893046B2 Therapeutic or prophylactic agent for leukemia
A therapeutic or prophylactic agent for leukemia is disclosed. The therapeutic or prophylactic agent comprises as an effective ingredient a glycine derivative having a specific structure or a pharmaceutically acceptable salt thereof, for example, the below-described compound [(E)-2-(2,6-dichlorobenzamido)-5-[4-(isopropyl-pyrimidin-2-ylamino)phenyl]pent-4-enoic acid]. The therapeutic or prophylactic agent for leukemia according to the present invention shows the excellent absorbability and in vivo stability when orally administered, and exhibits prominent therapeutic or prophylactic effects.
US07893045B2 Methods for treating lymphomas in certain patient populations and screening patients for said therapy
Methods for predicting a response of a patient having a lymphoma to a therapy regimen of 3-(4-amino-1-oxo-1,3-dihydro-isoindol-2-yl)-piperidine-2,6-dione using prognostic factors of a patient's disease burden, absolute lymphocyte count or time since last rituximab therapy are disclosed. Specific methods of treating a lymphoma encompass the administration of 3-(4-amino-1-oxo-1,3-dihydro-isoindol-2-yl)-piperidine-2,6-dione to a patient who has one or more of the favorable profiles, alone or in combination with immunosuppressive agents such as rituximab.
US07893044B2 Composition and method for altering levels of or sensitivity to adenosine with analogs of dehydroepiandrosterone
A method of treating adenosine depletion in a subject in need of such treatment is disclosed. The method comprises administering to the subject folinic acid or a pharmaceutically acceptable salt thereof in an amount effective to treat adenosine depletion. A method of treating asthma in a subject in need of such treatment is also disclosed. The method comprises administering to the subject dehydroepiandrosterone, analogs thereof, or pharmaceutically acceptable salts thereof in an amount effective to treat asthma.
US07893043B2 2-methylene-(17Z)-17(20)-dehydro-19,21-dinor-vitamin D analogs
This invention discloses 2-methylene-(17Z)-17(20)-dehydro-19,21-dinor-vitamin D analogs, and specifically 2-methylene-(17Z)-17(20)-dehydro-19,21-dinor-1α, 25-dihydroxyvitamin D3, and pharmaceutical uses therefor. This compound exhibits relatively high transcription activity as well as pronounced activity in arresting the proliferation of undifferentiated cells and inducing their differentiation to the monocyte thus evidencing use as an anti-cancer agent and for the treatment of skin diseases such as psoriasis as well as skin conditions such as wrinkles, slack skin, dry skin and insufficient sebum secretion. This compound also has significant calcemic activity in vivo having about the same bone calcium mobilization activity and intestinal calcium transport activity as the native hormone 1α,25-dihydroxyvitamin D3, and therefore may be used to treat autoimmune disorders or inflammatory diseases in humans as well as renal osteodystrophy. This compound may also be used for the treatment or prevention of obesity.
US07893042B2 Phenazopyridine compounds
The present invention is directed to substituted phenazopyridines represented by Formula I. The present invention also relates to the discovery that compounds of Formula I have increased bioavailability as compared to unconjugated phenazopyridine.
US07893039B2 Antibacterial 4,5-substituted aminoglycoside analogs having multiple substituents
The present invention is directed to analogs of aminoglycoside compounds as well as their preparation and use as prophylactic or therapeutics against microbial infection.
US07893038B2 Oral immunostimulation of mammals birds and reptiles from (1-4) linked β-D-mannuronic acid
An oral, immunostimulating material for mammals, birds, and reptiles comprising an immunostimulating amount of an alginate having a M content of at least 40% and an acceptable carriers.
US07893034B2 Regulation of oncogenes by microRNAs
Naturally occurring miRNAs that regulate human oncogenes and methods of use therof are described. Suitable nucleic acids for use in the methods and compositions described herein include, but are not limited to, pri-miRNA, pre-miRNA, mature miRNA or fragments of variants thereof that retain the biological activity of the mature miRNA and DNA encoding a pri-miRNA, pre-miRNA, mature miRNA, fragments or variants thereof, or regulatory elements of the miRNA. The compositions containing nucleic acids are administered to a patient in need of treatment or prophylaxis of at least one symptom or manifestation of cancer. In one embodiment, the compositions are administered in an effective amount to inhibit gene expression of one or more oncogenes. Methods for treatment or prevention of at least one symptom or manifestation of cancer are also described.
US07893032B2 NgR variants and compositions thereof for suppressing axonal growth inhibition
The invention provides compositions and methods for interfering with Nogo-receptor mediated signaling and mediating axonal growth. The invention also provides methods for treating central nervous system diseases, disorders or injuries.
US07893030B2 Stable chromogenic test reagent and its use in coagulation-diagnostic tests
The present invention relates to a chromogenic test reagent which comprises a chromogenic peptide substrate and an inhibitor of fibrin polymerization, which is particularly suitable for being used in coagulation-diagnostic tests and which is distinguished by the fact that it exhibits a nigh degree of stability and/or a long shelf life in the liquid state.
US07893029B2 Recombinant lubricin molecules and uses thereof
Recombinant lubricin molecules and uses thereof. Novel recombinant lubricin molecules and their uses as lubricants, anti-adhesive agents and/or intra-articular supplements for, e.g., synovial joints, meniscus, tendon, peritoneum, pericardium and pleura, are provided.
US07893026B2 Treatment of EGFR-dependent tumors by ABIN (a20 -binding inhibitor of NF kappab)
The present invention relates to the treatment of epidermal growth factor-family receptor- (ErbB-) dependent tumors. More specifically, the present invention relates to the use of ABIN for the preparation of a medicament to inhibit epidermal growth factor- (EGF-) induced proliferation, and to treat ErbB-dependent tumors.
US07893023B2 Prodrugs activated by plasmin and their use in cancer chemotherapy
The product of the invention is a modified form of a therapeutic agent and comprises a therapeutic agent, an oligopeptide having a plasmin peptide substrate of 2-4 amino acids and mono- or di-peptide linkage, a stabilizing group and, optionally, a linker group. The prodrug is cleavable by plasmin. Also disclosed are methods of making and using the prodrug compounds.
US07893020B2 Bacterial efflux pump inhibitors and methods of treating bacterial infections
This invention relates to the field of antimicrobial agents and more specifically it relates to Efflux Pump Inhibitor (EPI) compounds to be co-administered with antimicrobial agents for the treatment of infections caused by drug resistant pathogens. The EPI compounds are soft drugs which exhibit a reduced propensity for tissue accumulation. The invention includes novel compounds useful as efflux pump inhibitors, compositions and devices comprising such efflux pump inhibitors, and therapeutic use of such compounds.
US07893017B2 Protracted GLP-1 compounds
Novel protracted GLP-1 compounds and therapeutic uses thereof.
US07893016B2 Stabilisation of double-stranded nucleic acids using proteins
A composition for treating a nucleic acid duplex, wherein the composition is capable of inhibiting denaturation of the duplex, characterised in that the composition comprises a ubiquitin-like protein and/or a macroglobulin. It has been found that ubiquitin-like proteins (e.g. ubiquitin, NEDD8, RAD23, etc.) and macroglobulins (eg. α2-macroglobulin) are able to stabilise nucleic acid duplexes. A nucleic acid duplex which has been contacted with the composition of the invention can be subjected to more stringent processing conditions, with denaturation of the duplex being inhibited, than would otherwise be possible. Corresponding methods and uses are also provided.
US07893012B2 Solidification matrix
A solid cleaning composition includes methacrylate, water, defoamer, carboxylate, sodium carbonate, metasilicate, and surfactant. The solid cleaning composition includes between about 1% and about 10% methacrylate by weight, less than about 5% water by weight, between about 1% and about 5% defoamer by weight, between about 10% and about 30% carboxylate by weight, between about 15% and about 80% sodium carbonate by weight, between about 1% and about 5% metasilicate by weight, and between about 1% and about 5% surfactant by weight. The solidification system may be used, for example, in a solid detergent composition.
US07893011B2 Compositions comprising Sorel cements and oil based fluids
A wellbore servicing composition comprising a metal oxide, a soluble salt, a surfactant and an oleaginous fluid. A wellbore servicing composition comprising magnesium oxide, a chloride or phosphate salt, an organophilic surfactant and an oleaginous fluid. A wellbore servicing composition comprising magnesium oxide, magnesium chloride, an organophilic surfactant, water and an oleaginous fluid wherein the organophilic surfactant is present in an amount of from about 0.25% to about 5% base on the combined weight of the magnesium oxide and magnesium chloride, and the oleaginous fluid is present ratio of from about 95:5 cement:oleaginous fluid to about 50:50 cement:oleaginous fluid.
US07893010B2 Composition and method for fluid recovery from well
A well treatment microemulsion for use in a subterranean formation is disclosed, the microemulsion comprises a solvent blend comprising a solvent and a co-solvent; a surfactant blend comprising a surfactant, wherein the surfactant blend is able to give formation intermediate wettability properties; an alcohol; and a carrier fluid; wherein the alcohol, the solvent and surfactant blends are combined with the carrier fluid to produce the well treatment microemulsion. By intermediate wettability it is meant that the water has an advancing contact angle on the surface between 62 and 133 degrees. The associate method of treating a subterranean formation of a well with the microemulsion and the associate method of modifying the wettability of the formation with the microemulsion are also disclosed.
US07893009B2 Polymers and their production and use as gas hydrate inhibitors
The invention relates to polymers with a mean molecular weight of between 500 and 500,000 g/mol that can be produced as follows: A) reaction of a compound of formula 1, in which n stands for 0, 1 or 2 and A for an arbitrarily substituted C1-C40 group with a compound of the formula 2 B(OH)m in which m is from 2 to 10 and B is a represents an arbitrarily substituted C2-C40 group, B) subsequently reaction of the product thus obtained with a nitrogen-containing carboxylic acid which comprises from 1 to 20 carbon atoms, where the molar ratio between the number of free OH groups of the polyester obtained in step A and the nitrogen-containing carboxylic acid is between 1:0.1 and 1:1. The polymers are used to inhibit gas hydrate formation.
US07893008B2 Oligonucleotides, arrays thereof for detecting microorganisms, and an apparatus, a method and a kit for detecting microorganisms
The present invention relates to an instrument, a method and a kit for detecting a microorganism contaminating a subject test sample, which enables one to quickly and accurately identify the microorganism with an easy operation. The instrument for detecting a microorganism according to the present invention relates to a microarray type instrument in which oligonucleotides prepared based on nucleotide sequences specific to the species and genus to which the subject microorganism belongs have been immobilized onto a surface of a substrate. Based on the presence or absence of hybridization of the probes prepared from the test sample with the oligonucleotides immobilized onto the surface of the substrate, the present invention makes it possible to detect and/or identify the microorganism in the test sample easily, quickly and accurately.
US07893003B2 Catalyst composition with mixed selectivity control agent and method
The present disclosure provides a Ziegler-Natta catalyst composition comprising a procatalyst, a cocatalyst and a mixed external electron donor comprising a first selectivity control agent, a second selectivity control agent, and an activity limiting agent. A polymerization process incorporating the present catalyst composition produces a high-stiffness propylene-based polymer with a melt flow rate greater than about 50 g/10 min. The polymerization process occurs in a single reactor, utilizing standard hydrogen concentration with no visbreaking.
US07892999B2 Float glass for display substrate and method for producing it
A float glass for a display substrate, characterized in that its composition consists essentially of, as represented by mass % based on oxide, from 52 to 62% of SiO2, from 5 to 15% of Al2O3, from more than 0% to 9% of MgO, from 3 to 12% of CaO, from 9 to 18% of SrO, from 0 to 13% of BaO, from 25 to 30% of MgO+CaO+SrO+BaO, from 6 to 14% of Na2O+K2O+Li2O, from 0 to 6% of ZrO2 and from 0 to 1% of SO3, the temperature of glass melt corresponding to the viscosity of 102 dPa·s is at most 1,520° C., the temperature of glass melt corresponding to the viscosity of 104 dPa·s is at most 1,120° C., the glass transition temperature is at least 610° C., and the specific gravity is at most 2.9.
US07892995B2 Lithium silicate glass ceramic and method for fabrication of dental appliances
The present invention relates to preparing an improved lithium silicate glass ceramic for the manufacture of blocks for dental appliance fabrication using a CAD/CAM process. The lithium silicate material has a chemical composition that is different from those reported in the prior art including 8 to 10% of germanium dioxide in the final composition. The softening points are close to the crystallization final temperature of 830° C. indicating that the samples will support the temperature process without shape deformation. The resulting material has improved castability and higher density.
US07892991B2 Elastic network structure
Provided is an elastic network structure having durability and cushioning properties suitable for furniture, bedding such as a bed, seats for vehicles, seats for shipping, etc., the network structure being lightweight and having excellent chemical resistance, excellent light resistance, soft repellency, and excellent cushioning characteristics in a low temperature environment. The elastic network structure comprises a three-dimensional random loop bonded structure obtained by forming random loops with curling treatment of a continuous linear structure having not less than 300 decitex, and by making each loop mutually contact in a molten state to weld the majority of contacted part, the continuous linear structure mainly including a low density polyethylene resin with a specific gravity of not more than 0.94 g/cm3.
US07892990B2 Press pads
A press pad is provided for use in a laminate press. The pad includes a woven fabric of heat resistant strands wherein at least either the warp or the weft has a core made up of a plurality of strands within a sheath of an elastomeric material, and the other is made up of metal strands. Within the scale of the press pad, the strands making up the core lie substantially parallel to one another and to the longitudinal axis of the core. In use, therefore, when pressurized in the laminate press, the core structure collapses as the strands making up the core move relative to one another and the core tends to flatten out. This increases the springiness and compensation ability of the press pad without any loss of heat transfer ability.
US07892989B2 Woven articles from synthetic self twisted yarns
A woven panel is formed from a plurality of elongated yarns, with and without a center core. The core yarns provide mechanical strength for the woven material in supporting the coreless yarns when used in load bearing articles such as the seat or back portions of an article of furniture.
US07892987B2 Absorbent mixture and product
An absorbent mixture consisting of an absorbent such as sodium or potassium polyacrylate, a fluent wax and a channeling agent. A product consisting of a porous member containing a mixture including an absorbent such as sodium or potassium polyacrylate, a fluent wax and a channeling agent.
US07892986B2 Ashing method and apparatus therefor
An ashing method of a target substrate is applied after plasma-etching a part of a low-k film by using a patterned resist film as a mask in a vacuum processing chamber. The method includes a process of removing the resist film in the vacuum processing chamber, and a pre-ashing process, performed prior to the main ashing process, for ashing the target substrate for a time period while maintaining the target substrate at a temperature in a range of from about 80 to 150° C.
US07892977B2 Hard mask patterns of a semiconductor device and a method for forming the same
In a method for forming hard mask patterns of a semiconductor device first hard mask patterns are formed on a semiconductor substrate. Second hard mask patterns are formed and include first patterns which are substantially perpendicular to the first hard mask patterns and second patterns which are positioned between the first hard mask patterns. Third hard mask patterns are formed between the first patterns.
US07892975B2 Method for selectively forming electric conductor and method for manufacturing semiconductor device
A method for selectively forming an electric conductor, the method including disposing a processing target and a metal compound in an atmosphere including a supercritical fluid, the processing target having formed thereon at least one recess for providing an electric conductor, the metal compound including a metal serving as a main component of the electric conductor, and dissolving at least part of the metal compound in the supercritical fluid, selectively introducing the metal compound dissolved in the supercritical fluid into the recess in contact with a surface of the processing target, and coagulating in the recess the metal compound introduced into the recess to precipitate the metal from the metal compound, and coagulating the metal precipitated in the recess, thereby providing the electric conductor in the recess.
US07892974B2 Method of forming vias in silicon carbide and resulting devices and circuits
A method of fabricating an integrated circuit on a silicon carbide substrate is disclosed that eliminates wire bonding that can otherwise cause undesired inductance. The method includes fabricating a semiconductor device in epitaxial layers on a surface of a silicon carbide substrate and with at least one metal contact for the device on the uppermost surface of the epitaxial layer. The opposite surface of the substrate is then ground and polished until it is substantially transparent. The method then includes masking the polished surface of the silicon carbide substrate to define a predetermined location for at least one via that is opposite the device metal contact on the uppermost surface of the epitaxial layer and etching the desired via in steps. The first etching step etches through the silicon carbide substrate at the desired masked location until the etch reaches the epitaxial layer. The second etching step etches through the epitaxial layer to the device contacts. Finally, metallizing the via provides an electrical path from the first surface of the substrate to the metal contact and to the device on the second surface of the substrate.
US07892969B2 Method of manufacturing semiconductor device
A method of manufacturing a semiconductor device has forming a first nitride layer over a substrate, forming a first oxide layer on the first nitride layer, forming a second nitride layer on the first oxide layer, forming a photoresist layer over the second nitride layer, forming a opening in the photoresist layer, etching the second nitride layer using the photoresist layer as a mask such that the opening is reached to the first oxide layer, etching the first oxide layer using the second nitride layer as a mask such that the opening is reached to the first nitride layer, etching the first oxide layer such that bottom zone of the opening is increased in diameter, and etching the first nitride layer using the first oxide layer as a mask such that the opening is reached to the substrate thereby to form contact hole reaching to the substrate.
US07892968B2 Via gouging methods and related semiconductor structure
Methods for via gouging and a related semiconductor structure are disclosed. In one embodiment, the method includes forming a via opening in a dielectric material, the via opening aligned with a conductor; forming a protective coating over the dielectric material and in the via opening; performing via gouging; and removing the protective coating over horizontal surfaces of the dielectric material. A semiconductor structure may include a via having an interface with a conductor, the interface including a three-dimensionally shaped region extending into and past a surface of the conductor, wherein an outer edge of the three-dimensionally shaped region is distanced from an outermost surface of the via.
US07892966B2 Semiconductor device having thermally formed air gap in wiring layer and method of fabricating same
A semiconductor device is provided. A unit wiring level of the semiconductor device includes; first and second wiring layers spaced apart from each other on a support layer, a large space formed adjacent to the first wiring layer and including a first air gap of predetermined width as measured from a sidewall of the first wiring layer, and a portion of a thermally degradable material layer formed on the support layer, small space formed between the first and second wiring layers, wherein the small space is smaller than the large space, and a second air gap at least partially fills the small space, and a porous insulating layer formed on the first and second air gaps.
US07892963B2 Integrated circuit packaging system and method of manufacture thereof
A method of manufacture of an integrated circuit packaging system includes: providing an integrated circuit substrate having a non-active side and an active side; forming a recess in the integrated circuit substrate from the non-active side exposing a first contact and a second contact with the first contact and the second contact along the active side; forming a first via, having a first via extension extended beyond the non-active side and an opening at the non-active side, within the recess; forming a barrier liner within the opening with the barrier liner exposed beyond the non-active side; and forming a second via over the barrier liner and within the opening of the first via with the second via exposed beyond the non-active side.
US07892959B2 Method of manufacturing flash memory device with reduced void generation
A method of manufacturing a flash memory device that may include forming a first oxide film pattern and a first polysilicon pattern on a semiconductor substrate; sequentially forming a dielectric film pattern and a second polysilicon pattern on the semiconductor substrate including the first oxide film pattern and the first polysilicon pattern; forming a second oxide film pattern on the second polysilicon pattern; forming a gate by etching to the semiconductor substrate using the second oxide film pattern as a mask, the gate including the first oxide film pattern, the first polysilicon pattern, the dielectric film pattern and the second polysilicon pattern; removing the second oxide film pattern; forming a spacer on sidewalls of the gate; and forming an interlayer dielectric film on the semiconductor substrate including the gate and the spacer.
US07892958B2 Methods of fabricating semiconductor devices having transistors with different gate structures
A semiconductor device has two transistors of different structure from each other. One of transistors is P-type and the other is N-type. One of the transistors includes a gate structure in which a polysilicon layer contacts a gate insulation film while the other transistor includes a gate structure in which a metal layer contacts a gate insulation film.
US07892954B2 Interconnection of electronic devices with raised leads
An embodiment of a process of manufacturing an interconnection element for contacting electronic devices is proposed. The process starts with the step of forming a plurality of leads on a main surface of a first substrate; each lead has a first end and a second end. The second end of each lead is coupled with a second substrate. The second substrate and the first substrate are then spaced apart, so as to extend the leads between the first substrate and the second substrate. The process also includes the step of treating the main surface before forming the leads to control an adhesion of the leads on the main surface.
US07892953B2 Method for making multi-crystalline film of solar cell
A method is disclosed to make a multi-crystalline silicon film of a solar cell. The method includes the step of providing a ceramic substrate, the step of providing a titanium-based film on the ceramic substrate, the step of providing a p+-type back surface field layer on the titanium-based film, the step of providing a p−-type light-soaking layer on the p+-type back surface field layer and the step of conducting n+-type diffusive deposition of phosphine on the p−-type light-soaking layer based on atmospheric pressure chemical vapor deposition, thus forming an n+-type emitter on the p−-type light-soaking layer.
US07892950B2 Methodology for processing a panel during semiconductor device fabrication
A method (20, 104) for processing a panel (26, 128) during semiconductor device (52) fabrication entails forming grooves (72, 142) in a surface (34, 132) of the panel (26, 128) coincident with a dicing pattern (54) for the panel (26, 128). The grooves (72, 142) extend partially through the panel (26, 128) so that the panel (26, 128) remains intact. The grooves (72, 142) relieve stress in the panel (26, 128) to reduce panel (26, 128) warpage, thus enabling the panel (26, 128) to be reliably held on a support structure (88, 98, 138) via vacuum when undergoing further processing, such as solder printing (86). The method (20, 104) further entails, dicing (96, 152) through the panel (26, 128) from the surface (34, 132) in accordance with the dicing pattern (54) while the panel (26, 128) is mounted on the support structure (98, 138) to singularize the semiconductor devices (52).
US07892943B2 Isolation trenches for memory devices
A first dielectric plug is formed in a portion of a trench that extends into a substrate of a memory device so that an upper surface of the first dielectric plug is recessed below an upper surface of the substrate. The first dielectric plug has a layer of a first dielectric material and a layer of a second dielectric material formed on the layer of the first dielectric material. A second dielectric plug of a third dielectric material is formed on the upper surface of the first dielectric plug.
US07892942B2 Methods of forming semiconductor constructions, and methods of forming isolation regions
Some embodiments include methods of forming isolation regions in which spin-on material (for example, polysilazane) is converted to a silicon dioxide-containing composition. The conversion may utilize one or more oxygen-containing species (such as ozone) and a temperature of less than or equal to 300° C. In some embodiments, the spin-on material is formed within an opening in a semiconductor material to form a trenched isolation region. Other dielectric materials may be formed within the opening in addition to the silicon dioxide-containing composition formed from the spin-on material. Such other dielectric materials may include silicon dioxide formed by chemical vapor deposition and/or silicon dioxide formed by high-density plasma chemical vapor deposition.
US07892940B2 Device and methodology for reducing effective dielectric constant in semiconductor devices
Method of manufacturing a structure which includes the steps of providing a structure having an insulator layer with at least one interconnect, forming a sub lithographic template mask over the insulator layer, and selectively etching the insulator layer through the sub lithographic template mask to form sub lithographic features spanning to a sidewall of the at least one interconnect.
US07892939B2 Threshold voltage consistency and effective width in same-substrate device groups
The prevention of active area loss in the STI model is disclosed which results in an improved device performance in devices manufactured according to the process flow. The process generally shared among the multiple various embodiments inverts the current conventional STI structure towards a process flow where an insulator is patterned with tapered trenches. A segregation layer is formed beneath the surface of the insulator in the tapered trenches. The tapered trenches are then filled with a semiconductor material which is further processed to create a number of active devices. Therefore, the active devices are created in patterned dielectric instead of the STI being created in the semiconductor substrate of the active devices.
US07892934B2 SOI substrate and method for manufacturing SOI substrate
On the side of a surface (the bonding surface side) of a single crystal Si substrate, a uniform ion implantation layer is formed at a prescribed depth (L) in the vicinity of the surface. The surface of the single crystal Si substrate and a surface of a transparent insulating substrate as bonding surfaces are brought into close contact with each other, and bonding is performed by heating the substrates in this state at a temperature of 350° C. or below. After this bonding process, an Si—Si bond in the ion implantation layer is broken by applying impact from the outside, and a single crystal silicon thin film is mechanically peeled along a crystal surface at a position equivalent to the prescribed depth (L) in the vicinity of the surface of the single crystal Si substrate.
US07892933B2 Semiconductor device and method of manufacturing semiconductor device
According to an aspect of an embodiment, a semiconductor device has a semiconductor substrate, a gate insulating film on the semiconductor substrate, a gate electrode formed on the gate insulating film, an impurity diffusion region formed in an area of the semiconductor substrate adjacent to the gate electrode to a first depth to the semiconductor substrate, the impurity diffusion region containing impurity, an inert substance containing region formed in the area of the semiconductor substrate to a second depth deeper than the first depth, the inert substance containing region containing an inert substance, and a diffusion suppressing region formed in the area of the semiconductor substrate to a third depth deeper than the second depth, the diffusion suppressing region containing a diffusion suppressing substance suppressing diffusion of the impurity.
US07892930B2 Method to improve transistor tox using SI recessing with no additional masking steps
A method of forming a transistor device is provided wherein a gate structure is formed over a semiconductor body of a first conductivity type. The gate structure is formed comprising a protective cap thereover and defining source/drain regions laterally adjacent thereto. A first implant is performed of a second conductivity type into both the gate structure and the source/drain regions. The semiconductor body is etched to form recesses substantially aligned to the gate structure wherein the first implant is removed from the source/drain regions. Source/drain regions are implanted or grown by a selective epitaxial growth.
US07892928B2 Method of forming asymmetric spacers and methods of fabricating semiconductor device using asymmetric spacers
A method of fabricating asymmetrical spacers, structures fabricated using asymmetrical spacers and an apparatus for fabricating asymmetrical spacers. The method includes: forming on a substrate, a structure having a top surface and opposite first and second sidewalls and having a longitudinal axis parallel to the sidewalls; forming a conformal layer on the top surface of the substrate, the top surface of the structure and the sidewalls of the structure; tilting the substrate about a longitudinal axis relative to a flux of reactive ions, the flux of reactive ions striking the conformal layer at acute angle; and exposing the conformal layer to the flux of reactive ions until the conformal layer is removed from the top surface of the structure and the top surface of the substrate leaving a first spacer on the first sidewall and a second spacer on the second sidewall, the first spacer thinner than the second spacer.
US07892925B2 Method of forming semiconductor device having three-dimensional channel structure
A method of forming a semiconductor device is provided. A hollowed portion is formed over an active region of a semiconductor substrate. The bottom of the hollowed portion is lowered in level than the surface of an isolation region of the substrate. A first mask is formed in the hollowed portion, except on a side region that is adjacent to the boundary between the active region and the isolation region. A trench is formed in the side region of the active region by using the first mask and the isolation region as a mask.
US07892923B2 Power field effect transistor and manufacturing method thereof
A method of manufacturing a vertical power MOS transistor on a wide band gap semiconductor substrate having a wide band gap superficial semiconductor layer, including the steps of forming a screening structure on the superficial semiconductor layer that leaves a plurality of areas of the superficial semiconductor layer exposed, carrying out at least a first ion implantation of a first type of dopant in the superficial semiconductor layer for forming at least one deep implanted region, carrying out at least a second ion implantation of the first type of dopant in the superficial semiconductor layer for forming at least one implanted body region of the MOS transistor aligned with the deep implanted region, carrying out at least one ion implantation of a second type of dopant in the superficial semiconductor layer for forming at least an implanted source region of the MOS transistor inside the at least one implanted body region, and a low budget activation thermal process of the first and second dopant types suitable to complete the formation of the body region, of the source region, and of the deep implanted region with diffusing the dopants in the substrate.
US07892920B2 Method for manufacturing semiconductor device including implanting through a hole patterned from a first photoresist an oxide and a second photoresist
A method for manufacturing a semiconductor device which minimizes the line width of a pattern and allows a low temperature oxide film and a thinly formed photoresist film to serve as ion blockers when performing an ion implantation process on the semiconductor substrate.
US07892919B2 Method of forming isolation layer in semiconductor device
The invention discloses a method of forming an isolation layer in a semiconductor device. The method includes providing a semiconductor substrate having a trench formed therein; forming a first insulating layer in the trench; and forming a densified second insulating layer on the first insulating layer. In the above method, a void is not generated in the isolation layer so a bending phenomenon of an active region can be reduced or prevented to improve an electrical characteristic of the semiconductor.
US07892905B2 Formation of strained Si channel and Si1-xGex source/drain structures using laser annealing
A process for forming a strained channel region for a MOSFET device via formation of adjacent silicon-germanium source/drain regions, has been developed. The process features either blanket deposition of a silicon-germanium layer, or selective growth of a silicon-germanium layer on exposed portions of a source/drain extension region. A laser anneal procedure results in formation of a silicon-germanium source/drain region via consumption of a bottom portion of the silicon-germanium layer and a top portion of the underlying source/drain region. Optimization of the formation of the silicon-germanium source/drain region via laser annealing can be achieved via a pre-amorphization implantation (PAI) procedure applied to exposed portions of the source/drain region prior to deposition of the silicon-germanium layer. Un-reacted top portions of the silicon-germanium layer are selectively removed after the laser anneal procedure.
US07892904B2 Amorphous silicon MONOS or MAS memory cell structure with OTP function
A semiconductor device with an amorphous silicon (a-Si) metal-oxide-nitride-oxide-silicon (MONOS) or metal-aluminum oxide-silicon (MAS) memory cell structure with one-time programmable (OTP) function. The device includes a substrate, a first dielectric layer overlying the substrate, and one or more source or drain regions embedded in the first dielectric layer with a co-planar surface of n-type a-Si and the first dielectric layer. Additionally, the device includes a p-i-n a-Si diode junction. The device further includes a second dielectric layer on the a-Si p-i-n diode junction and a metal control gate overlying the second dielectric layer. Optionally the device with OTP function includes a conductive path formed between n-type a-Si layer and the metal control gate. A method of making the same memory cell structure is provided and can be repeated to integrate the structure three-dimensionally.
US07892901B2 Strained silicon-on-insulator transistors with mesa isolation
A silicon-on-insulator semiconductor device which includes a substrate; an insulator layer overlying the substrate; a plurality of strained silicon islands overlying the insulator layer, the strained silicon islands are isolated from each other by mesa isolation; and a plurality of transistors formed on the strained silicon islands. A method for fabricating the silicon-on-insulator semiconductor device is further disclosed.
US07892900B2 Integrated circuit system employing sacrificial spacers
An integrated circuit system that includes: providing a substrate including a first device and a second device; configuring the first device and the second device to include a first spacer, a first liner made from a first dielectric layer, and a second spacer made from a sacrificial spacer material; forming a second dielectric layer over the integrated circuit system; forming a first device source/drain and a second device source/drain adjacent the second spacer and through the second dielectric layer; removing the second spacer without damaging the substrate; forming a third dielectric layer over the integrated circuit system before annealing; and forming a fourth dielectric layer over the integrated circuit system that promotes stress within the channel of the first device, the second device, or a combination thereof.