Document Document Title
US07782691B2 Apparatus for guaranteed write through in domino read SRAM's
In a digital device for facilitating recovery of a precharged dot line, periodically precharged by a precharge signal, that has been prematurely discharged as a result of an early read condition, a data input signal can have a selected one of a first value and a second value. The first value is a value that would be reflected by the dot line being in a charged state. A logic device that is responsive to the data input signal causes charge to be applied to the dot line when the data signal has the first value.
US07782686B2 Method and apparatus for timing adjustment
A strobe signal from a memory is delayed through delay circuits of a strobe delay selection section, thus obtaining a plurality of delayed strobe signals. A strobe latch section produces check data in synchronism with each of the delayed strobe signals, and a system latch section latches, with a system clock, check data latched by the strobe latch section. Based on a comparison by an expected value comparison section and a determination by a delay determination section, the optimal strobe signal with the optimal delay is selected from among the delayed strobe signals produced in the strobe delay selection section. Then, data from the memory is delayed through delay circuits in a data delay selection section, thus obtaining a plurality of delayed data, and the optimal data with the optimal delay is selected from among the plurality of delayed data based on the comparison by the expected value comparison section and the determination by the delay determination section.
US07782685B2 Semiconductor device and operating method thereof
A semiconductor device includes a pad configured to receive a data strobe signal, and a path selector configured to output the data strobe signal through a corresponding input path during a normal operation, and to output the data strobe signal through a plurality of input paths in response to a path selection signal during a test operation.
US07782683B2 Multi-port memory device for buffering between hosts and non-volatile memory devices
A multi-port volatile memory device can include a first port that is configured for data transfer to/from an external host system and the device. A volatile main memory core is configured to store data received thereat and read requested stored data thereform. A volatile sub memory core can be configured to store data received thereat and read requested stored data therefrom. A main interface circuit can be coupled to the first port and can be configured to provide data to/from the volatile main memory core and the first port in a master mode and can be configured to provide data to/from the volatile sub memory core and the first port in a slave mode. A second port can be configured for data transfer to/from an external non-volatile memory device and the device and a sub interface circuit can be coupled to the second port and configured to provide data to/from the volatile sub memory core and the second port in the slave mode.
US07782682B2 Semiconductor device with circuitry for efficient information exchange
A semiconductor device having a register and an information generation circuit can reduce data to be transferred, and consequently save electric power. The register stores first information. The information generation circuit generates, in response to a signal acquired from the an exterior of the device, second information indicating which bits of the first information is to be inverted.
US07782678B2 Self-timed integrating differential current sense amplifier
A reference current integrator and a sensed current integrator are coupled to form a differential sense amplifier. The differential sense amplifier is coupled to receive a bitline current signal from a flash memory, and the reference current integrator is coupled to receive a current signal from a reference memory cell. Integration continues until a desired voltage or time is reached, resulting in a sufficiently reliable output. The differential current integrating sense amplifier is also used for instrumentation, communication, data storage, sensing, biomedical device, and analog to digital conversion.
US07782676B2 Method of operating a nonvolatile memory device
A method of operating a nonvolatile memory device includes floating a drain select line, a source select line, a well, and a common source line of the nonvolatile memory device; precharging a program-inhibited bit line; and performing a program operation by applying a program voltage to a selected word line. The select lines and the well are floated to prevent the influence of a voltage applied to a bit line. Accordingly, degradation of the nonvolatile memory device can be prevented.
US07782672B2 Semiconductor memory device having memory block configuration
A memory array including memory mats is arranged in a U shape when seen in two dimensions, and a logic circuit and an analog circuit are arranged in a region unoccupied by the memory array. This facilitates transmission of power supply voltage and signals between the peripheral circuit including the analog and logic circuits and the pad band including power supply and data pads. The analog circuit is positioned close to the power supply pad, so that voltage drop due to the resistance of power supply interconnection is restricted. It is also possible to separate a charge pumping power supply interconnection and a peripheral circuit power supply interconnection in the vicinity of the power supply pad.
US07782671B2 Semiconductor device and method of manufacturing the same
A semiconductor device includes a plurality of a word lines. The word lines have a set of odd word lines and a set of even word lines. The odd and the even word lines are located from a first end region to a second end region through the cell region located between the first and the second end regions. The odd word lines are divided in the first end region and the even word lines are divided in the second end region to form dummy word line portions.
US07782670B2 Semiconductor memory device for storing multivalued data
Data storage circuits are connected to the bit lines in a one-to-one correspondence. A write circuit writes the data on a first page into a plurality of first memory cells selected simultaneously by a word line. Thereafter, the write circuit writes the data on a second page into the plurality of first memory cell. Then, the write circuit writes the data on the first and second pages into second memory cells adjoining the first memory cells in the bit line direction.
US07782664B2 Method for electrically trimming an NVM reference cell
An integrated circuit memory has a plurality of non-volatile memory cells and a reference cell. The reference cell provides a reference current for reading a selected memory cell of the plurality of non-volatile memory cells. A method comprises trimming the reference cell to a predetermined threshold voltage, wherein trimming the reference cell comprises biasing a control gate, a source terminal, a drain terminal, and a substrate terminal of the reference cell with a predetermined set of bias conditions, wherein in response to the predetermined set of bias conditions, the reference cell will gain or lose charge toward an asymptotic state of charge that no longer changes significantly after a predetermined operating time under the predetermined set of bias conditions. In addition, the integrated circuit memory is also configured to adjust the reference cell gate voltage to output a desired target current reference.
US07782662B2 Storage device
A storage device includes: a wiring including a first conductor with a first conductivity; and first, second and third contacts, each including a second conductor with a second conductivity and contacting the wiring. The storage device also includes: a write switching circuit controlling current for writing information that flows through the first contact, the wiring, and the second contact, and changing resistance values of the first contact to write information; and a read switching circuit controlling current for reading information that flows through the first contact, the wiring, and the third contact.
US07782659B2 Magnetic memory and memory cell thereof and method of manufacturing the memory cell
A magnetic memory, a memory cell thereof, and a method of manufacturing the memory cell are provided. The memory cell of the magnetic memory includes a bottom contact layer, a bit line, a magnetic stack structure and a dielectric material. The bit line is disposed over the bottom contact layer. The magnetic stack structure is disposed between the bottom contact layer and the bit line. The dielectric material at least fills between the bottom contact layer and the bit line and surrounds the magnetic stack structure. A gap is formed between the dielectric material and the magnetic stack structure. During programming of the memory cell, the magnetic stack structure generates heat, and the gap delays heat loss.
US07782657B2 Semiconductor device
A cache memory having valid bits, where a circuit configuration in a memory cell of a valid bit is improved so as to perform invalidation at high speed. The invention provides a cache memory including a memory cell that has a function to perform invalidation at high speed. One mode of the invention is a semiconductor device including a memory cell of a valid bit, where two inverters are connected in series to form a loop, a drain of an N-channel transistor is connected to an output signal line of one of the inverters, a gate thereof is connected to a reset signal line of a CPU, and a source thereof is connected to a ground line. The initial value of the memory cell is determined by inputting a reset signal of the CPU to the gate.
US07782654B2 Static random access memory device
Additional transistors P1 and P2 which are PMOS transistors are connected to load transistors PL1 and PL2 which are PMOS transistors such that drain electrodes of the additional transistors P1 and P2 and drain electrodes of the load transistors PL1 and PL2 are connected at a node 1 and a node 2 while gate electrodes of the additional transistors P1 and P2 and gate electrodes of the load transistors PL1 and PL2 are connected at the node 1 and the node 2. A source electrode of the additional transistor P1 is connected to an additional transistor control circuit, which is provided for each column. The additional transistor control circuit sets control signals S1 and S2 to the H level in other times than data write so that the additional transistor P1 or P2 compensates the load transistor PL1 or PL2, thereby increasing the static margin. In data write, the additional transistor control circuit sets the control signals S1 and S2 to the low level, thereby preventing the additional transistors from hindering the data write, and thus increasing the write margin.
US07782653B2 Semiconductor memory device and method of operating the semiconductor memory device
A pair of memory nodes, a capacitor of which one end is connected to the memory nodes, and a switch part which is connected to the other end of the capacitor, and changes a connection state of the other end of the capacitor when a semiconductor memory device operates at a speed not lower than a predetermined speed are included. By changing the connection state of the other end of the capacitor in accordance with the operation state of the semiconductor memory device like this, the influence which the capacitor connected to the memory node exerts on the operation speed of the semiconductor memory device can be suppressed.
US07782651B2 Semiconductor device including storage device and method for driving the same
A structure of a storage device which can operate memory elements utilizing silicide reaction using the same voltage value for writing and for reading, and a method for driving the same are proposed. The present invention relates to a storage device including a memory element and a circuit which changes a polarity of applying voltage to the memory element for writing (or reading) into a different polarity of that for reading (or writing). The memory element includes at least a first conductive layer, a film including silicon formed over the first conductive layer, and a second conductive layer formed over the silicon film. The first conductive layer and the second conductive layer of the memory element are formed using different materials.
US07782650B2 Nonvolatile nanotube diodes and nonvolatile nanotube blocks and systems using same and methods of making same
Under one aspect, a memory array includes word lines; bit lines; memory cells; and a memory operation circuit. Each memory cell responds to electrical stimulus on a word line and on a bit line and includes: a two-terminal non-volatile nanotube switching device having first and second terminals, a semiconductor diode element, and a nanotube fabric article capable of multiple resistance states. The semiconductor diode and nanotube article are between and in electrical communication with the first and second terminals, which are coupled to the word line bit line respectively. The operation circuit selects cells by activating bit and/or word lines, detects a resistance state of the nanotube fabric article of a selected memory cell, and adjusts electrical stimulus applied to the cell to controllably induce a selected resistance state in the nanotube fabric article. The selected resistance state corresponds to an informational state of the memory cell.
US07782647B2 Semiconductor memory device
A semiconductor memory device has a simple layout pattern of a sub hole region. The semiconductor memory device includes a segment input/output line, a first local input/output line and a second local input/output line corresponding to the segment input/output line, an input/output switch configured to selectively connect the segment input/output line and the first local input/output line in response to a first switch control signal, and a dummy input/output switch which is connected to a second local input/output line but is not connected to the segment input/output line.
US07782646B2 High density content addressable memory using phase change devices
A content addressable memory array storing stored words in memory elements. Each memory element stores one of at least two complementary binary bits as one of at least two complementary resistances. Each memory element is electrically coupled to an access device. An aspect of the content addressable memory array is the use of a biasing circuit to bias the access devices during a search operation. During the search operation, a search word containing a bit string is received. Each access device is biased to a complementary resistance value of a corresponding search bit in the search word. A match between the search word and stored word is indicated if the bits stored in the memory elements are complementary to the bits represented by the resistances in the access devices.
US07782643B2 Matrix converter apparatus
There is provided a matrix converter apparatus including both functions of outputting a step up voltage and outputting a step down voltage. In a matrix converter apparatus for directly connecting respective phases of a three phase alternating current power source (1) and respective phases of an output side by a bidirectional switch constituted by IGBT transistors or the like connected reversely in parallel therewith, controlling to output an alternating current power source voltage by a PWM control based on an output voltage instruction, and outputting an arbitrary direct current or alternating current voltage, respective reactors (61), (62), (63) inserted to be connected between the respective phases of the polyphase alternating current power source 1 and the bidirectional switches are included, and by controlling to ON/OFF the bidirectional switches, terminals of two or more of the reactors on a side of the bidirectional switch are shortcircuited, and thereafter opened to thereby step up an output voltage of the matrix converter apparatus. Further, when the terminals are switched from being shortcircuited to being opened, conduction paths of currents flowing in the respective reactors which have been shortcircuited are ensured by controlling to ON/OFF the bidirectional switch group (5) and a capacitor group (7).
US07782638B2 Switching power supply device, semiconductor device, and control method
A plurality of arrangements for detecting an overload of energy supplied to an output part enables selecting latch-off or auto-recovery overload protection by the operation of a switching device. When the drain current peak of the switching device exceeds a predetermined level denoting an overload, the FB pin voltage also rises to latch off, and when the drain current peak then reaches a maximum level, the CC pin voltage drops to a predetermined level and limits the oscillation period of the switching device because output power cannot be increased even if the load increases further. Latch-off overload protection can be applied when the drain current peak exceeding a predetermined level is detected, and auto-recovery overload protection can be applied when the CC pin voltage is detected to drop to a predetermined level.
US07782635B2 DC converter with independently controlled outputs
A DC converter comprises a single primary circuit which is coupled to each of a plurality of output circuits in respective time periods, the coupling being provided by switching in the output circuits. Each output circuit produces a respective output voltage and a respective feedback signal which is coupled as a control signal to the primary circuit during the respective time periods, so that each output voltage is regulated substantially independently of each other output voltage. The time periods for the different output circuits can be equal or different, and can be dynamically changed depending on error voltages of the output circuits.
US07782634B2 Switched-mode power supply and power supplying method thereof
A switched-mode power supply includes a converter to convert input power into output power having a predetermined voltage level by performing a switching operation; a switching controller to control the switching operation of the converter based on an indication of a voltage of the output power; and an output power voltage indicating unit to provide the indication of the voltage of the output power to the switching controller according to a characteristic of the output power voltage indicating unit that varies according to the size of a load receiving the output power converted by the converter.
US07782633B2 Non-contact power transmission device
A non-contact power transmission device, which is capable of efficiently reducing the device size and reducing unnecessary radiation of a harmonic component from a primary side coil, is provided. The non-contact power transmission device which includes a primary side unit and a secondary side unit which house a primary side and a secondary side of a coupling transformer individually and can be separated from each other, a capacitor C1 which resonates with a primary side coil L1 is connected to the primary side coil L1 in series so that a primary side series resonance circuit is formed, an L-shaped resonance circuit which has a coil L3 and a capacitor C7 resonating with the coil L3 is inserted between the primary side series resonance circuit and a driving circuit, and the L-shaped resonance circuit is connected to the primary side series resonance circuit in series.
US07782625B2 Server rack blanking panel and system
The present invention provides a system that allows for a single panel of the invention to be easily modified, preferably without the use of tools, to fit on a server rack, where the single panel is so modified as to cover the desired amount of open space on a server rack as a single piece, where the panel is preferably fire-rated, and where the modified panel may be easily installed onto the server rack to as to cover any open space thereon, and prevents the circular flow of warm air output from entering the cooler air input of the servers housed on the server rack.
US07782623B2 Heat dissipation device
A heat dissipation device for dissipating heat generated by an electronic device on a printed circuit board includes a heat sink and a plurality of mounting devices. A plurality of retaining pillars are secured on the printed circuit board at positions around the electronic device. Each of the mounting devices includes a fixing portion connecting with the heat sink, a mounting portion extending from the fixing portion and a locating portion extending from the mounting portion to a position below the mounting portion. The retaining pillars on the printed circuit board extend through the locating portions and abut against bottoms of the mounting portions to accurately position the heat dissipation device on the electronic device on the circuit board before fasteners are brought to extend through the mounting portions to screw in the retaining pillars.
US07782621B2 Circuit module and manufacturing method thereof
A circuit module includes: a thermally conductive board forming a part of a housing; a circuit board disposed above the thermally conductive board; a semiconductor chip connected to a plurality of electrode pads on a upper surface of the circuit board through solder; a heat sink connected to a upper surface of the semiconductor chip; a thermally conductive member thermally connecting the thermally conductive board to the semiconductor chip; and a plurality of fasteners passing through the thickness of the circuit board in an area surrounding the semiconductor chip to attach the heat sink to the thermally conductive board.
US07782617B2 Heat dissipation device
A heat dissipation device for dissipating heat generated from an add-on card. The heat dissipating device includes two heat sinks and two heat pipes connecting with the two heat sinks. Each of the heat sinks includes a base and a fin group mounted on a top surface of the base. Each of the heat pipes includes a connecting section and two heat-conductive sections extending from opposite ends of the connecting section. One of the two heat-conductive sections of each of the heat pipes is sandwiched between the base and the fin group of one heat sink, and another of the two heat-conductive sections is sandwiched between the base and the fin group of another heat sink.
US07782615B1 Electronic device and cooling system thereof
An electronic device with a cooling system includes an enclosure. A first electronic component and a second electronic component in parallel are received in the enclosure. Air inlets are defined in a front board of the enclosure to receive cool air. A first flow of the cool air passes through a main airflow path to cool the first electronic component and the second electronic component. A second flow of the cool air passes through an auxiliary airflow path to cool the second electronic component. The main airflow path and the auxiliary airflow path are separated by a clapboard. The cool air heated by the first and second electronic components is then exhausted through the air outlets defined in a back board of the enclosure.
US07782614B2 Heat dissipation module
An electronic device includes a first electronic component, a second electronic component adjacent to the first electronic component, a heat sink arranged on the first electronic component to absorb heat therefrom, an axial fan mounted on the heat sink for generating an airflow to the heat sink, and a guiding member. The axial fan includes a frame and an impeller received in the frame. A cutout is defined in the frame facing the second electronic component. The guiding member is arranged between the axial fan and the second electronic component for guiding a part of the airflow escaping from the frame via the cutout to the second electronic component.
US07782605B2 Drive bracket assembly
A drive bracket assembly includes a drive bracket and a back panel. The drive bracket includes a first side plate and a second side plate with a securing post. The securing post includes a thin shank portion and a thick head portion. The back panel has a first edge and a second edge, and defines a locking hole corresponding to the securing post. The locking hole has an inserting hole and a restricting hole. In assembly, the securing post inserts into the inserting hole of the back panel with the head portion passing through the inserting hole and the shank portion received in the inserting hole. The back panel moves to have the first edge resisting against the first side plate. The shank portion of the securing post moves into the restricting hole to sandwich the back panel between the head portion of the securing post and the second side plate.
US07782600B2 Access self-service terminal
A self service terminal having a casing with a selectively releasable display. The display is secured to the casing using a fastener (75) that can only be unfastened from inside the casing.
US07782598B2 Electronic device enclosure
An electronic device enclosure includes a metallic body and a metallic speaker-receiving member. The metallic body includes a first side, a second side, and a crossbeam connecting the first side and the second side. A first connecting portion extends from the second side and parallel to the crossbeam. A distal portion of the first side define a first connecting plane. The first connecting portion defines a first connecting surface. The metallic speaker-receiving member includes a first sidewall and a second sidewall. The first sidewall defines a second connecting portion. A second connecting plane is defined by a bent distal end of the second sidewall. The second connecting plane is welded to the first connecting plane, and the second connecting portion is welded to the first connecting portion to securely attach the metallic speaker-receiving member to the metallic body. Such a configuration allows miniaturization of the electronic device enclosure.
US07782596B2 Power distribution system with individually isolatable functional zones
A power distribution system having a plurality of individually isolatable functional nodes each connected via an isolating device to a power distribution bus that is connected via an isolating device to a power input node which is connectable to a power source, wherein the power distribution bus and the isolating devices are housed in a power distribution compartment, and wherein the power input node and the functional nodes are housed separately from one another and the power distribution compartment in functional compartments adjacent thereto.
US07782587B2 Internally overlapped conditioners
The application discloses novel internal structures of energy conditioners, assemblies of external structures of energy conditioners and mounting structure, and novel circuits including energy conditioners having A, B, and G master electrodes.
US07782580B2 Stacked power clamp having a BigFET gate pull-up circuit
An electronic discharge (ESD) protection circuit for protecting an integrated circuit chip from an ESD event. The ESD protection circuit includes a stack of BigFETs, a BigFET gate driver for driving the gates of the BigFETs and a triggering the BigFET gate driver to drive the gates of the BigFETs in response to an ESD event. The BigFET gate driver includes gate pull-up circuitry for pulling up the gate of a lower one of the BigFETs. The gate pull-up circuitry is configured so as to obviate the need for a diffusion contact between the stacked BigFETs, resulting in a significant savings in terms of the chip area needed to implement the ESD protection circuit.
US07782579B2 Semiconductor integrated circuit
A semiconductor integrated circuit has a bipolar transistor whose collector is connected to a substrate of an NMOS transistor serving as a protecting transistor. When an ESD event occurs, the bipolar transistor causes the NMOS transistor to be changed into bipolar operation at a low voltage, by supplying current to the substrate of the NMOS transistor. In accordance with this structure, good levels of ESD protecting performance and off leak current of the protecting transistor can both be achieved in the semiconductor integrated circuit.
US07782577B2 MRAM structure using sacrificial layer for anti-ferromagnet and method of manufacture
A magnetic random access memory structure comprising an anti-ferromagnetic layer structure, a crystalline ferromagnetic structure physically coupled to the anti-ferromagnetic layer structure and a ferromagnetic free layer structure physically coupled to the crystalline ferromagnetic structure.
US07782573B2 Trellis-based feedback reduction for multiple input multiple output orthogonal frequency division multiplexing (MIMO-OFDM) with rate-limited feedback
Trellis-based methods for reducing feedback while maintaining performance in a Multiple Input, Multiple Output Orthogonal Frequency Division Multiplexing (MIMO-OFDM) system. The methods involve: receiving a plurality of symbols from a plurality of sub-carriers at a receiver; selecting a plurality of indices of codewords corresponding to a codebook of pre-coding weighting matrices for the sub-carriers based on vector quantization compression of the codewords, including selecting a plurality of indices based on trellis-based feedback encoding; and transmitting the selected indices over a wireless channel to a transmitter. Optimal precoding matrices are selected at the same time for all subcarriers by searching for the optimum choice of matrices along a trellis. Selecting a plurality of indices based on trellis-based feedback encoding includes constructing a trellis by specifying a state transition table.
US07782567B2 Cleaning system for tape head and tape drive system implementing same
A tape drive system according to one embodiment includes a tape head; a guide mechanism for passing a magnetic recording tape over the head; and a cleaning device for cleaning the head, wherein, while the tape is adjacent the head, a relative spacing between the tape and the head is created before the cleaning device cleans the head, wherein the cleaning device does not contact the tape during cleaning of the head. Other systems and methods are also presented.
US07782563B2 Hard disk drive adapted to detect free-fall and perform emergency parking of read/write head prior to impact
A hard disk drive (HDD) includes a spindle motor, an actuator, a static eccentricity sensor, a monitor and a central controller. The spindle motor includes a rotary body and a static body adapted to support the rotary body, where the spindle motor is adapted to rotate a disk. The actuator is adapted to move a read/write head over the disk. The static eccentricity sensor is adapted to measure static eccentricity associated with the rotary body. The monitor is adapted to monitor the measured static eccentricity and generate a free-fall signal when the monitor determines that the HDD is in a free-fall state. The central controller is adapted to initiate an unloading/parking operation for the read/write head in response to the free-fall signal.
US07782559B2 Camera module
A camera module includes a lens unit, a magnet, a stator and an elastic element. The stator includes an upper coil seat with an upper coil wound therearound and a lower coil seat with a lower coil wound therearound. The upper and the lower coils establish an induced magnetic field when electric currents are applied thereto. The induced magnetic field interacts with the magnet to generate a magnetic force driving the lens unit into a telescopic movement. The elastic element includes a plurality of ribs. Each rib includes a fixed end connected with the stator and an opposite movable end. The moveable end moves together with the lens unit with respect to the fixed end to cause the ribs to deform and generate an elastic force. The lens unit stops at a focal position when the magnetic force and the elastic force come to a balance.
US07782556B2 Lens actuator
A lens actuator includes a lens barrel for accommodating the lens, a coil wrapped around the lens barrel, a plurality of magnets, a bracket for mounting the magnets thereon and accommodating the lens barrel therein, and a resilient plate connected between the bracket and the lens barrel to hold the lens barrel on the bracket. A cutout is defined in the edge of the through hole of the plate shaped body corresponding to the respective fixing portions. The lens barrel includes a plurality of fasteners. Each of the fastener includes a shaft extending through the cutouts and protruded out from the lens barrel and a head extending radially outwardly of the shaft at the distal end thereof. The resilient plate and the lens barrel are gripped together by engagement of the cutouts with the respective fasteners.
US07782553B2 Imaging lens
It is to provide an imaging lens that has excellent optical performance while being compact and light. The imaging lens includes, in order from an object side to an image surface side, a diaphragm, a first lens that is a meniscus lens having a positive power whose convex surface faces the object side, and a second lens that is a meniscus lens having a positive power whose convex surface faces the image surface side, wherein a condition expressed by −30.5≦r3/d3≦−19 (where, r3: center radius curvature of the object side face of the second lens, and d3: center thickness of the second lens is to be satisfied.
US07782547B2 Mechanism for controlling position of optical element
An optical element position control mechanism includes an optical element holding member, a lead screw rotatable on a rotational axis parallel to movement direction of the optical element holding member, a linearly moving nut screw-engaged with the lead screw and engaged with the optical element holding member, and a rotation prevention device preventing the linearly moving nut from rotating about the lead screw. Rotations of the lead screw cause the linearly moving nut to move along the lead screw, a position of the optical element holding member being determined by the linearly moving nut. A biasing device is positioned between the linearly moving nut and the optical element holding member and is resiliently deformable in a plane substantially parallel to a plane which includes the rotational axis of the lead screw, and applies a biasing force against the linearly moving nut so as to be prevented from rotating.
US07782538B2 Projection objective having a high aperture and a planar end surface
A projection objective for imaging a pattern provided in an object plane of the projection objective onto an image plane of the projection objective suitable for microlithography projection exposure machines has a plurality of optical elements transparent for radiation at an operating wavelength of the projection objective. At least one optical element is a high-index optical element made from a high-index material with a refractive index n≧1.6 at the operating wavelength.
US07782536B2 Use of metallized films to create half-mirrored parts
The present invention provides half-mirrored parts and methods for creating half-mirrored parts. A half-mirrored part according to one particular embodiment of the present includes: a formable reflective layer and a formable transparent or translucent layer, wherein the formable reflective layer is on one side of the transparent or translucent layer.
US07782534B1 Micro-lens enhanced element
A micro-lens enhanced element comprises a substrate bearing sequences of printed image elements, each sequence containing image elements from more than one image. A transparent spacer layer is coated over the interlaced image strips. Lenticular lenses are fashioned over each sequence of image elements by deposition of a transparent layer of low surface energy polydimethyl siloxane based material and imagewise conversion of the same to create strips of material abhesive to a polymeric lens forming material between consecutive sequences of printed image elements. During deposition of a liquid lens forming material, the liquid withdraws from the liquid abhesive low surface energy strips to form a meniscus, thereby providing lenticular lenses. The transparent low surface energy material comprises a near infrared dye with low absorption in the visible range of the spectrum to render the material both transparent and convertible by infrared laser.
US07782532B2 Optical isolator device
An optical isolator includes a birefringent material and a Faraday rotator. The birefringent material receives a forward light propagating in a forward direction and a backward light propagating opposite to the forward direction. The birefringent material has an optical axis, wherein the forward light has a first polarization aligned perpendicular to the optical axis and is configured to pass the first birefringent material substantially along the forward direction. At least a portion of the backward light has a second polarization not perpendicular to the optical axis. The first birefringent material can displace the backward light to form a first displaced backward light. A Faraday rotator can rotate the forward light, and the backward light or the first displaced backward light by a same predetermined angle along the rotation direction.
US07782530B1 Deployable telescope having a thin-film mirror and metering structure
A deployable thin-film mirror telescope comprises a base structure and a metering structure. The base structure houses a thin-film mirror, which can be rolled for stowage and unrolled for deployment. The metering structure is coupled to the base structure and can be folded for stowage and unfolded for deployment. In the deployed state, the unrolled thin-film mirror forms a primary minor for the telescope and the unfolded metering structure positions a secondary minor for the telescope.
US07782515B2 Digital beam engine for a soft video projector
The invention concerns a system enabling projection of a digital video image sequence, on a screen with different size and shape, by the mean of a light beam which can be generated by a source (1), of low/medium power laser type or of white light type, oriented by a 3D's ball-joint (2). The system contains a rotary disc micro-shutter (4) with slots (3), two optical rotary discs (5) and (7) digitally controlled on an axis (12) with 3D's ball-joints (6), generating the vertical and horizontal beam sweeping onto the screen, ended by a rectangular shutter (8). The display is realized by successive reflections of the light beam on reflective microscopic facets, covered with a thin metallic coat, and distributed on the discs surface (5) and (7). The surface of each facet is oriented with a reflective angle incremented according to an angular increment which depends on the aimed application. The reflective angle applied to the light beam by each facets, depends on: 1) the type of optical rotary disc: vertical (5) or horizontal (7), 2) the rotation speed, and 3) the position of each facet on the disc, which is function of: 1) the zone: red (9), green (10) or blue (11), the sector and the determined increment, at a given <> time. The system will be applied to high end Digital Cinema supporting Ultra High Definition.
US07782512B2 Light irradiation device, fine particle analyzing apparatus, and light irradiation method
A light irradiation device irradiates a specimen in a flow channel with directional light. The light irradiation device includes a light source that emits the directional light, and an irradiation control unit that irradiates the specimen in the flow channel with light, obtains positional information of the specimen, and controls the irradiation of the directional light based on the positional information.
US07782511B2 Optical scanning apparatus and image forming apparatus comprising the same
An optical scanning apparatus includes a laser diode, electro-optical crystal member, BD sensor, two light detection sensors and voltage control unit. The electro-optical crystal member is arranged in the optical path between the laser diode and a polygon mirror, and deflects the light beam in the sub-scanning direction by applied voltage. The BD sensor and two light detection sensors detect the light beam deflected in the sub-scanning direction. A scanning control unit controls, based on the detection results obtained by the BD sensor and two light detection sensors, the irradiation position of the light beam on a photosensitive drum. The BD sensor and two light detection sensors are arranged at positions distant in the sub-scanning direction from an optical path to the photosensitive drum and at the central portion and two end portions of an image forming region in the main scanning direction.
US07782509B2 Security device
A security device comprises first zero order diffractive microstructure (1) on a substrate, a second zero order diffractive microstructure (2), and an intermediate light transmissive layer (4) separating the two diffractive microstructures. The spacing (sn,n+1) between the first (1) and second (2) diffractive microstructures is small enough so that optical interferences are produced between the diffractive microstructures. A further light transmissive layer (3) covers the second diffractive microstructure (2).
US07782503B2 Image reading apparatus and method for controlling the same
An image reading apparatus reads an image from a document being simultaneously fed by the apparatus. A document feeder unit feeds the document on a original plate. A first image reading unit reads an image from the fed document at a first document-read position on the original plate. A second image reading unit reads an image from the fed document at a second document-read position located at a predetermined distance from the first document-read position in a document feeding direction. An abnormal pixel detection unit detects abnormal pixels resulting from rubbish moved between the first document-read position and second document-read position on the original plate together with the document.
US07782501B2 Light-orientation adjusting unit, optical writing unit having light-orientation adjusting unit, and image forming apparatus having optical writing unit
A light-orientation adjusting unit for use with a light-receiving member includes an optical unit, a posture control unit, a first unit supporter, and a second unit supporter. The optical unit passes through a light beam toward the light-receiving member. The posture control unit controls the posture of the optical unit to adjust an inclination of scanning line to be formed on the light-receiving member by the light beam. The first unit supporter regulates a movement of the optical unit within a given range by contacting the first unit supporter to the optical unit. The second unit supporter regulates a movement of the optical unit within a given range by contacting the second unit supporter to the optical unit. The first unit supporter including a first biasing member and second unit supporter including a second biasing member are disposed on a first and second ends of the optical unit, respectively.
US07782497B2 Image forming apparatus that displays icons in a selectable state according to draft setting direction
A draft size detecting function detects a size and a setting direction of a draft set in a scanner which reads an image of the draft, a display unit displays, in a selectable state, an icon corresponding to the draft setting direction detected by the draft size detecting function, and displays, in a non-selectable state, an icon which does not correspond to the draft setting direction detected by the detecting function among a plurality of icons to designate a direction of the image in the draft, and the image direction corresponding to the selected icon is set as the direction of the image in the draft, in a case where the specific icon is selected from the selectable icons displayed in the display unit.
US07782494B2 Communication device
When a facsimile device detects an audio signal via a CNG signal detection unit while detecting an OFF signal in a CNG signal during a telephone conversation, the facsimile device does not detect the audio signal as an OFF signal if the level of the detected audio signal is greater than a threshold and the frequency of the audio signal is within a predetermined audio frequency range. Accordingly, the facsimile device can reliably prevent a false detection of a noise that has a similar signal component to a CNG signal as a CNG signal. It is possible to prevent the facsimile machine from being automatically shifted to a facsimile receiving made by the false detection of the noise.
US07782493B2 Method of generating threshold matrix for creating halftone dot image and method and apparatus for creating halftone dot image and recording medium
To generate a threshold matrix which is compared with an original image in creating a halftone dot image for each color component, in a matrix area for one color component, dot centers are arranged almost uniformly in a random fashion at a predetermined density and in a matrix area for another color component, dot centers are arranged almost uniformly in a random fashion at a density about 0.7 times the predetermined density. Then, threshold values are set so that dots should grow around the dot centers in accordance with an increase in gray level of the original image, to generate the threshold matrix for each color component. In creating the halftone dot images by using these threshold matrixes, characteristics of spatial frequency of the halftone dot images of these color components can be represented in a frequency space as areas (75K, 75C) in a shape of concentric rings. As a result, it is possible to create a multicolor halftone dot image with less graininess, with no portions approximate to each other in the characteristics of spatial frequency of these halftone dot images.
US07782487B2 Image processing apparatus, image forming apparatus, image processing method, computer data signal, and recording medium
An image processing apparatus includes: an accepting unit that accepts image information about each of a plurality of image elements to be synthesized; a comparing unit that compares a threshold value with a mixing ratio used in an operation to synthesize the image information according to a given mixing ratio; and a setting unit that sets an attribute of an image element in an area where the plurality of image elements are overlapped with each other synthesized according to a comparison result obtained by the comparing unit.
US07782477B2 Information processing apparatus connected to a printing apparatus via a network and computer-readable storage medium having stored thereon a program for causing a computer to execute generating print data in the information processing apparatus connected to the printing apparatus via the network
An information processing apparatus connected to a printing apparatus via a network encrypts print data if identification information is input, and does not encrypt print data if identification information is not input. If identification information is input and the print data has been encrypted, the information processing apparatus sends a print job including the encrypted print data to the printing apparatus via the network; otherwise, the information processing apparatus sends unencrypted print data to the printing apparatus via the network.
US07782476B2 Image forming apparatus and facsimile data transfer method of image forming apparatus
An image forming apparatus determines whether or not a number for executing F-code relay is designated to facsimile data having at least transmitting terminal identification data added thereto, the facsimile data being received from the outside. When it is determined that a number is not designated, the apparatus searches from memory means a transfer box to which a name corresponding to the transmitting terminal identification data has been assigned when a transfer function based on a transfer setting set in a transfer box corresponding to a number denoted by the transmitting terminal identification data is made available. When it is determined that F-code information denoting F-code relay is stored so as to be associated with the searched transfer box, the apparatus performs predetermined processing without performing transfer according to the transfer setting set in the transfer box corresponding to the number denoted by the transmitting terminal identification data.
US07782475B2 Device management apparatus and device management method
A device management apparatus is adapted to be connected to devices which constitute at least one device group. An application is running in the device management apparatus. Each of the device managers is associated with one of the devices and is operable to create usage information of the associated one of the devices. A device group manager is associated with the at least one device group and coupled to the device managers to receive the usage information from each of the device managers. The device group manager is operable to notify the usage information in response to an inquiry from the application.
US07782473B2 Apparatus for transforming image data for another and method
A method of transforming an image format of image data stored in an apparatus connected via a network is disclosed. The method includes the steps of providing the apparatus with format information containing image formats of image data that can be transformed, receiving a request for transforming the image format of the image data from the apparatus, acquiring the image data from the apparatus, transforming the image format of the image data acquired from the apparatus thereby to form format-transformed image data, and providing the format-transformed image data to the apparatus. According to the above arrangements, an image transforming apparatus using the method can transform the image format of the image data on behalf of the apparatus.
US07782471B2 Optical method for the characterization of laterally-patterned samples in integrated circuits
Disclosed is a method for characterizing a sample having a structure disposed on or within the sample, comprising the steps of applying a first pulse of light to a surface of the sample for creating a propagating strain pulse in the sample, applying a second pulse of light to the surface so that the second pulse of light interacts with the propagating strain pulse in the sample, sensing from a reflection of the second pulse a change in optical response of the sample, and relating a time of occurrence of the change in optical response to at least one dimension of the structure.
US07782460B2 Laser diode array downhole spectrometer
Apparatus and method for downhole formation testing using a spectrometer includes a carrier conveyable into a well borehole that traverses a subterranean formation of interest, a plurality of semiconductor light sources disposed on the carrier, a fluid sample cell that receives light emitted from the plurality of semiconductor light sources, and at least one photodetector that detects light emitted from the plurality of semiconductor light sources and after the light interacts with a fluid in the fluid sample cell.
US07782456B2 Direct ICP emission spectral analysis method of solid sample
An ICP analysis method for solid samples which can secure reliability of the analytical results. The present invention provides an analytical method in which a finely powdered solid sample is directly injected into an inductively coupled plasma-aided emission spectrometer, wherein standard liquid samples of known concentration of objective element are analyzed by the spectrometer to establish a calibration curve for the element; at least one standard sample of finely powdered solid of known concentration is analyzed by the spectrometer to determine a conversion factor by a given procedure; and the result of the finely powdered solid sample is corrected using the conversion factor.
US07782450B2 Testing system and testing method for keyboard light of mobile phone
A testing system includes a computer (10), a motherboard (31) of a mobile phone, a photosensitive component (33) and a measuring device. The motherboard of the mobile phone is connected to the computer. The motherboard of the mobile phone includes a keyboard light (313) disposed thereon. The photosensitive component is capable of sensing the brightness of the keyboard light. The measuring device is connected to the photosensitive component. The measuring device is capable of measuring the resistance of the photosensitive component and transmitting the resistance to the computer. The computer is capable of comparing the resistance with a pre-determined range of values to determine whether the keyboard light of the motherboard meets a standard.
US07782449B2 Method and apparatus for analyzing an optical device
Described are a method and apparatus for analysing an optical device, including: a) arranging an illuminating device which generates a test beam, the optical device that the test beam passes and a position-resolving sensor device which detects the test beam, relative to each other in a reference position that establishes a reference beam path; b) transmitting the test beam in a plurality of relative positions off set with respect to the reference position, relative to the reference position, the test beam being incident upon a measuring point assigned to the respective relative position on the optical device; c) detecting, for a respective relative position, a position of incidence of the test beam, after it passes the optical device, on one or a plurality of planes of detection offset relative to each other; d) determining the beam path of the test beam from the positions of incidence detected in step c) for each relative position and calculating optical characteristics of the optical device.
US07782448B2 Analysis of the effects of a first substance on the behavior of a second substance using surface enhanced Raman spectroscopy
A method of analyzing an effect of a first substance on the behavior of a second substance comprises exposing a test material to the first substance, performing a first surface enhanced Raman spectroscopy analysis of the test material while it is exposed to the first substance, exposing the test material to the first substance and to the second substance, and performing a second surface enhanced Raman spectroscopy analysis of the test material while it is exposed to the first substance and to the second substance. Results of the first and second analyses are compared to identify a change in the behavior of the first substance.
US07782446B2 Stage system and lithographic apparatus comprising such stage system
A stage system for a lithographic apparatus includes a stage, an over-determined number of actuators to act on the stage, at least two sensors to measure a position dependent parameter of the stage and to provide a respective sensor signal. The at least two sensors are arranged to measure the respective position dependent parameters in a same degree of freedom. A controller is provided to provide a controller output signal to at least one of the actuators in response to a setpoint and the position dependent parameter as measured by at least one of the sensors. A further controller is provided with the position dependent parameters measured by the sensors. The further controller is configured to determine a difference between the position dependent parameters from the sensors and to provide a further controller output signal to at least one of the actuators in response to the determined difference.
US07782445B2 Reducing contamination in immersion lithography
A wafer chuck assembly includes a first chuck section configured to hold a semiconductor wafer on a support surface thereof, and a second chuck section removably attached to the first chuck section. The first chuck section has a gap therein, the gap located adjacent an outer edge of the wafer, and the gap containing a volume of immersion lithography fluid therein. A fluid circulation path is configured within the first chuck section so as to facilitate the radial outward movement of the immersion lithography fluid in the gap, thereby maintaining a meniscus of the immersion lithography fluid at a selected height with respect to a top surface of the semiconductor wafer.
US07782444B2 Top plate, positioning apparatus, exposure apparatus, and device manufacturing method
A top plate is configured to surround a space with a first plate member and a second plate member which oppose each other and a side wall member. The top plate includes a rib arranged in the space. The rib includes a plurality of connecting portions. Each connecting portion respectively connects to either the side wall member or a member in the space. The rib has a thickness at a portion between adjacent connecting portions which is larger than the thickness at each connecting portion.
US07782441B2 Alignment method and apparatus of mask pattern
An alignment method of mask patterns includes forming a first layer by transferring a first mask pattern onto a wafer, forming a second layer by transferring a second mask pattern onto the first layer, and particularly a first alignment step, forming the first layer, which performs alignment for minimizing offset between a center position of the wafer and a center position of the first mask pattern and a residual rotation error between the wafer and the first mask pattern and additional alignment for compensating an amount of possible deviation of superposition of the second layer pattern on the first layer pattern, and a second alignment step, forming the second layer, which performs only alignment for minimizing offset between a center position of the first layer pattern and a center position of the second mask pattern and a residual rotation error between the first layer pattern and the second mask pattern.
US07782440B2 Projection lens system of a microlithographic projection exposure installation
A microlithographic projection exposure apparatus comprises a projection objective which images an object onto an image plane and has a lens with a curved surface. In the projection objective there is a liquid or solid medium which directly adjoins the curved surface over a region which is usable for imaging the object. The projection exposure apparatus also has an adjustable manipulator for reducing an image field curvature which is caused by heating of the medium during the projection operation.
US07782437B2 LCD panel having a broad-gap region including a dent within sealed substrates at a non-display region which includes an electrical transfer section and light transmitting portion spaced from a corner of the two substrates within the dent
The method of the present invention includes the steps of: (A) providing a first substrate, and a second substrate, wherein the first substrate includes a first light shielding layer provided within a non-display region, the first light shielding layer including a light-transmitting portion provided near an outer boundary of the first light shielding layer, the light-transmitting portion comprising a recess or an opening; (B) drawing a seal pattern with a sealant, the seal pattern being drawn outside the first light shielding layer so as to surround the display region, comprising the substeps of: (B1) beginning application of the sealant near the light-transmitting portion, (B2) applying the sealant along an outer periphery of the first light shielding layer, and (B3) forming a junction with the sealant having been applied near the light-transmitting portion; (C) applying a liquid crystal material within the display region surrounded by the sealant; (D) attaching the first substrate and the second substrate; and (E) performing light irradiation from the first substrate side to cure the sealant.
US07782436B2 Liquid crystal display device
A thin film transistor substrate of fringe field switching type and a fabricating method thereof for simplifying a process are disclosed. In the thin film transistor substrate of fringe field switching type, a gate line has a multiple-layer structure and includes a transparent conductive layer. A data line crosses the gate line to define a pixel area. A thin film transistor is connected to the gate line and the data line. A common line is provided in a multiple-layer structure and in parallel to the gate line. A common electrode is formed by an extension of a transparent conductive layer of the common line at said pixel area. A pixel electrode is connected to the thin film transistor to form a fringe field with the common electrode in the pixel area.
US07782434B2 In-plane switching mode liquid crystal display device
An in-plane switching mode liquid crystal display device includes a substrate; at least two gate lines disposed on the substrate; at least two data lines disposed on the substrate crossing the gate lines to define a pixel region; a driving device disposed in the pixel region; a plurality of first electrodes disposed in the pixel region; and a plurality of second electrodes disposed in the pixel region parallel with the first electrodes. At least one first electrode is overlapped with at least one second electrode. Further, each one of the first electrodes and a corresponding one of second electrodes defining an electric field in a direction parallel to a surface of the substrate.
US07782433B2 Copper alloy and liquid-crystal display device
A method of forming an oxide film on a surface of a copper alloy, including the steps of providing a copper alloy including copper and an element selected from the group consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, Ba, Pr and Nd, and diffusing atoms of the element to a surface of the copper alloy so as to form an oxide film on the surface of the copper alloy,wherein a concentration of the element in the copper alloy is more than 0.1 and not more than 20 atomic percentage and within a solubility limit of the element in the copper.
US07782432B2 Liquid crystal display device having a pixel electrode structure and an alignment layer causing pixel regions to operate in both twisted nematic and vertical alignment modes
A liquid crystal display device is provided that has a plurality of pixel regions where some of the pixel regions have liquid crystal molecules that operate according to both twisted nematic mode and vertical alignment mode.
US07782429B2 Liquid crystal panel and liquid crystal display apparatus
Provided are a liquid crystal panel capable of constituting a liquid crystal display apparatus in which a contrast and a display color are unlikely to change depending upon a viewing angle and an azimuth, and a liquid crystal display apparatus using the liquid crystal panel. The liquid crystal panel of the present invention at least includes a liquid crystal cell, a first polarizer placed on one side of the liquid crystal cell, a second polarizer placed on another side of the liquid crystal cell, a first optical element placed between the liquid crystal cell and the first polarizer, a second optical element placed between the liquid crystal cell and the first optical element, and a third optical element placed between the liquid crystal cell and the second polarizer, in which an absorption axis of the first polarizer is perpendicular to an absorption axis of the second polarizer, the first optical element has a relationship of nz>nx=ny, the second optical element has a relationship of nx>ny=nz and a slow axis thereof parallel to an absorption axis of the first polarizer, and the third optical element has an optical isotropy.
US07782426B2 Liquid crystal display device
The present invention realizes an IPS liquid crystal display device which exhibits small directivity of viewing angle and high brightness. Below a pixel electrode having a comb-teeth-shaped electrode and having a laterally-extending trapezoidal profile, a planar common electrode not shown in the drawing is formed by way of an insulation film. When a video signal is applied to the pixel electrode, an electric field is generated between the pixel electrode and the common electrode via slit portions formed in the pixel electrode thus controlling liquid crystal molecules. The pixel electrodes are arranged in a packed state by alternately reversing the direction of the trapezoidal shape in the longitudinal direction. Since a light blocking film is not present between two pixel electrodes arranged adjacent to each other in the longitudinal direction, the liquid crystal display device can acquire high transmissivity. As a result, a liquid crystal display device having high brightness can be realized.
US07782422B2 Liquid crystal display device utilizing fluorescent members illuminated by blue light to produce red, green, blue and white pixel regions
In a display panel and a display device having the display panel, the display device has a first pixel area, a second pixel area, a third pixel area and a fourth pixel area. A red fluorescent member, a green fluorescent member and a yellow fluorescent member are formed in the first pixel area, the second pixel area and the third pixel area. The red fluorescent member emits a red light by using a blue light incident thereon. The green fluorescent member emits a green light by using a blue light incident thereon. The yellow fluorescent member emits a white light by using a blue light incident thereon. A blue light incident on the fourth pixel area passes through the fourth pixel area so that the blue light is irradiated from the fourth pixel area.
US07782418B2 Backlight module
A backlight module includes a frame, an optical element, a bottom plate, a holder, and a light source. The optical elements are located on the frame and a space between the sidewall of the frame and the optical elements. The bottom plate located under the optical elements. The light source is on the holder inserted into the space, The holder is inserted into the space along the direction toward the bottom surface of the bottom plate, and is removed from the space along the opposing direction.
US07782416B2 Array substrate for liquid crystal display device using organic semiconductor material and method of fabricating the same
An array substrate for a liquid crystal display device comprises a data line, source and drain electrodes disposed on a substrate; a pixel electrode disposed in a pixel region and contacting the drain electrode; an organic semiconductor layer disposed on the substrate; a gate insulating layer disposed on the substrate; a gate electrode disposed on the substrate; a first passivation layer of a photosensitive having a gate contact hole on the gate electrode, the gate contact hole exposing the gate electrode; and a gate line disposed on the first passivation layer, the gate line crossing the data line to define the pixel region and contacting the gate electrode through the gate contact hole, wherein the organic semiconductor layer, the gate insulating layer, and the gate electrode have a substantially same shape.
US07782411B2 Liquid crystal display having protection line
An exemplary liquid crystal display (200) includes a liquid crystal panel (210), a driver (280), and a flexible printed circuit board (220). The liquid crystal panel includes an active area (230) and a peripheral non-active area. The driver is configured to drive the liquid crystal panel. The flexible printed circuit board includes at least one the ground line (222) electrically coupled to the ground. The non-active area includes an electrostatic guiding line (240) and a protection line (270). The electrostatic guiding line surrounds the active area, and is electrically coupled to the at least one the ground line via the driver. The protection line surrounds the electrostatic guiding line, and electrically coupled to the at least one the ground line directly.
US07782407B2 Smart remote control
A remote control unit for an entertainment system comprising a television or other display device, and a plurality of peripheral devices connected to the televisions. The remote control unit is adapted to send and receive information signals to and from the television and to the peripheral devices to control the devices. The television and remote control unit both preferably includes a receiver and transmitter and appropriate memory and logic coupled to the transmitter and receiver. Alternatively, the remote control unit preferably includes a receiver and transmitter and a repeater coupled to the receiver and the transmitter. In operation, the remote control unit sends commands to the television, which responds by sending information or a specific command back to the remote control unit. The remote control unit then retrieves and sends a specific command or repeats and sends the command received from the television to the appropriate peripheral device.
US07782406B2 Receiving apparatus and receiving method for channel switching in both digital and analog TV reception
In a digital broadcasting receiving apparatus, channel selection that switches a physical channel requires a longer period of time than analog. To solve the above problem, for example, there are provided two systems each including a digital tuner and a decoder, wherein channel selection and decoding are carried out by a second tuner and decoder respectively, when the user carries out the channel selection operation. During this time, the first system continues decoding. At the moment when the user carries out the channel selection operation, the luminance is decreased to some extent to allow the user to intuitively know that the channel selection operation is started, and then the luminance is further decreased gradually. When the luminance reaches zero, the decoding is started in the second system, and then the system to display is switched.
US07782403B2 Noise detection apparatus and method, and noise reduction apparatus and method
Four high-frequency components are extracted from video signals: the first from a blanking interval; the second from an image-carrying period between blanking intervals; and the third and fourth from the video and one-line and -frame delayed signals, respectively. Statistical processing is performed to obtain absolute values of the second to fourth component levels per pixel and the number of pixels of the components per image per absolute level. A noise detecting signal is generated based on the first component level irrespective of the processing when the level is higher than a predetermined level, if not, first to third levels are obtained for the first to third components, respectively, each having the smallest number of pixels among levels other than zero each having a larger number of pixels than zero for the components. The detecting signal is generated based upon the lowest or second lowest level among the first to third levels.
US07782400B2 Image display controller and image display system
An image display unit operational interface for easily selecting a lot of functions while checking the content of an underlying image is provided.In an image display control device (3) for displaying on a display unit (5) a large menu having a plurality of menu items, and an underlying image, to allow performing menu item selection and operation according to instructions by a user, a controller (14) for, according to the instructions, selecting and controlling one of either of the large menu and a small menu that has as menu items a lone portion of the menu items in the large menu, and a menu image compositor (20) for, according to control by the controller, simultaneously displaying on the display unit the small menu together with the underlying image are included.
US07782398B2 Display processor integrated circuit with on-chip programmable logic for implementing custom enhancement functions
A display processor integrated circuit (for example, for a television or for a digital camera) includes a display processor portion and an on-chip programmable logic portion. The on-chip programmable logic portion can be configured or programmed to implement custom video and/or image enhancement functions. Accordingly, an individual television or camera manufacturer can have his/her own custom enhancement function incorporated into the display processor integrated circuit by having the programmable logic portion configured or programmed appropriately. In one embodiment, the programming of the programmable logic portion involves changing just one mask, thereby reducing the cost, complexity and time associated with implementing the custom video/image enhancement function.
US07782396B2 Frame rate converting apparatus and imaging apparatus
A frame rate converting apparatus for converting a frame rate of an input first image signal and outputting the image signal having the converted frame rate as a second image signal. The apparatus includes an input section into which the first image signal is input; a detecting section for detecting a time difference between synchronization timing of each frame of the first image signal and synchronization timing of each frame of the second image signal; a section for determining an output method of outputting the first image signal in conformity with a frame rate of the second image signal, based on a time period of each frame of the first image signal, a time period of each frame of the second image signal, and the above time difference; and an output section for outputting the first image signal as the second image signal in accordance with the determined output method.
US07782395B2 Apparatus and method for mounting a photographing device
Provided are an apparatus and a method of mounting a photographing device capable of aligning the photographing device accurately when the photographing device is mounted. The apparatus for mounting the photographing device includes a base member including at least a lens unit; a photographing device converting light transmitted through the lens unit into an electric signal; an elastic pad disposed between the base member and the photographing device; and a fixing member supported by the base member to fix the photographing device.
US07782391B2 Camera module having a structure for preventing external electronic waves and noise from being introduced into the camera module
A camera module includes a lens holder, a lens module, an image sensor chip, and a PCB defining a step-shaped recess on the upper thereof. The step-shaped recess comprises a first recess formed on an upper portion thereof and a second recess, for receiving a plurality of electrical elements therein, coaxially formed on a lower portion thereof, and a intermediate step surface formed between the first recess and the second recess. A cover plate received in the first recess and attached on the intermediate step surface defines at least one electronic layer therein and an external point formed on the bottom thereof. At least one zero voltage point is formed on the intermediate step surface thereof. The electronic layer is electrically connected to the zero voltage points by the external points, thereby electromagnetic waves generated by the electronic elements are prevented from affecting the image sensor chip.
US07782389B2 System and method for varying exposure time for different parts of a field of view while acquiring an image
A system and method for exposing different parts of a single field of view for various and differing lengths of time while capturing an image is provided. For astrophotography, unwanted light pollution or over-saturation bleeding from nearby or obtrusive stars may be greatly reduced or eliminated while still capturing the image of the nearby brighter star in the same field of view. Also, a system and method for real-time contrast control while capturing an image to optimize signal-to-noise ratio for various parts of the captured image, is provided. An embodiment of the present invention provides such techniques by using spatial light modulator devices, such as a digital micro-mirror device, to controllably mask different portions of light from an image that expose film or a charge-coupled device. A system and method for a way to use a spatial light modulator device as an active and controllable mask for photolithography, is provided.
US07782378B2 Scene-based non-uniformity correction method using local constant statistics
A scene-based non-uniformity correction method employing local constant statistics for eliminating fixed pattern noise in a video comprising a plurality of images is disclosed, comprising the steps of providing an initial gain image, an initial offset image, a predetermined pyramid level, and a filter of a predetermined level; setting one of the plurality of input images to the current image; calculating a temporary true scene image for the current image based on the initial gain image and the initial offset image; accumulating a temporal mean image and a temporal standard deviation image based on the calculated temporary true scene image; setting another of the plurality of images to the current image and repeating the setting, calculating, and accumulating steps until substantially all of the images of the plurality of images have been processed, otherwise further perform the steps of calculating a Gaussian mean image based on the accumulated temporal mean and calculating a Gaussian gain image based on the accumulated temporal standard deviation image; spectrum shaping the Gaussian mean image and the Gaussian gain image based on the predetermined pyramid level and the filter of a predetermined level; multiplying the spectrum shaped Gaussian gain image by the initial gain image to obtain a final gain image; and multiplying the spectrum shaped Gaussian mean image by the initial gain image and add the initial offset image to obtain a final offset image.
US07782377B2 Image sensing apparatus, control method therefor, storage medium, and program to create correction data
It is an object to provide an image sensing apparatus which can shorten the time required for the creation of correction data by reducing the amount of data used for the creation of correction data. In order to achieve the above object, an image sensing apparatus according to this invention includes a plurality of pixels, a first calculating unit which creates correction data by performing computation using signals which are acquired by image sensing in an unexposed state and smaller in number than said plurality of pixels, and a second calculating unit which corrects image data of the plurality of pixels, acquired by image sensing in an exposed state, by using the correction data.
US07782373B2 Apparatus and method for displaying pictures in a mobile terminal
A method for generating a combined signal in a mobile terminal equipped with a camera that captures image signals. A captured image signal is coded into a still picture signal based upon a frame size. A received audio signal is coded. An image header containing image pattern information and frame size information is inserted into the still picture signal based upon the frame size. The still picture signal based upon the frame size into which the image header is inserted is combined with the coded audio signal. While the above-described operations are repeated, consecutive still picture signals based upon the frame size are combined with corresponding audio signals. When a recording operation is completed, a combined signal representative of a result of the combining is stored in a moving picture file.
US07782372B2 Image file for storing digital images and ancillary data values using multiple encoding methods
An image format for storing digital images within a baseline DCT compatible bitstream comprises entropy coded image data, a first application marker storing a first data value using a first encoding method to convey a first information value related to the image, and a second application marker storing a second data value using a second encoding method to convey the same said first information value related to the image. More specifically, the first application marker uses TIFF tags within an Exif application marker and the second application marker uses a FlashPix compatible structured storage stream, while the entropy coded data includes restart markers to define tile boundaries within the entropy coded image data.
US07782368B2 Image signal processing unit for amplifying signal level of effective pixel region and method
The first amplifier sets a first amplification factor for the pixel signals for each color pixel to adjust the sensitivities of the color pixels. The second amplifier amplifies the pixel signals, whose sensitivities have been adjusted, with a second amplification factor. The second amplification factor allows the color level signal having the maximum signal intensity in the pixel signals which have been adjusted in sensitivity and output from the first amplifier to have a signal intensity equivalent to the dynamic range of image processing performed in a latter stage. The computing unit subtracts a black level signal component from each of the pixel signals amplified by the second amplifier. After adjusting the sensitivities which differ between colors, the color level signals can be amplified up to the dynamic range of the image processing.
US07782367B2 Direct calibration of color imaging devices
A system for and method of determining calibration parameters while only capturing a single image is described herein. Furthermore, traditional calibration algorithms are avoided by the direct determination of the calibration parameters. The determination of the calibration parameters is possible by first determining a training data set from images acquired of a variety of objects with a multitude of colors. Then, using the training data set, regression coefficients are generated. A camera to be calibrated then acquires only one set of image information such as a single picture. Then, using the regression coefficients and the acquired information, the calibration parameters are directly estimated for that camera.
US07782365B2 Enhanced video/still image correlation
A technique processes captured data on a device, wherein selected captured data of a given quality resolution is transferred via a communication link to a separate storage location for future availability. A storage protocol may include various storage organization categories. A possible aspect may provide an identifier record to enable future accessibility to selected captured data by one or more authorized parties or approved devices or authorized recipients. In some embodiments the captured data may include both a video data stream and one or more still image frames having different quality characteristics and/or formats. Initial and ongoing coordination as well as correlation may be facilitated between video and still image data derived from related fields of view.
US07782363B2 Providing multiple video perspectives of activities through a data network to a remote multimedia server for selective display by remote viewing audiences
Multiple visual perspectives in video of private and public activities including those in public areas such as entertainment venues captured by cameras located near the activities can be transmitted over data networks to a server where video-related data is processed and recorded for selective display by authorized, remote video display devices (e.g., HDTV, set-top boxes, computers, handheld devices) in wired/wireless communication with the server. Users can be registered and authorized to access the server to provide/access video captured by cameras at activities. Wireless handheld devices can selectively retrieve video-related data captured at activities for server storage and subsequent display by video display devices. Captured video/pictures can be organized in a server based on at least one of: activity title, activity time, activity date, activity place, wireless handheld device location at time of video recording, distance from location of interest. Simultaneous display of multiple videos on a display can be synchronized.
US07782356B2 Video communication system and method using telematics system
A video communication system and method for allowing a video communication using a telematics system is provided. The video communication system includes a telematics terminal for transmitting a video communication request signal, capturing image and voice, and receiving video communication data; a service providing center for receiving the video communication request signal, detecting the telematics terminal inherent number from the received video communication request signal, and detecting the corresponding other party's mobile communication terminal inherent number and forming a video communication path with a mobile communication terminal; and the mobile communication terminal having a display unit displaying an image, and performing a video communication with the telematics terminal.
US07782352B2 Optical scanning device and image forming apparatus
An optical scanning device that uses a light spot to scan an image surface with a light source, a deflector, and an imaging element includes a housing in which the light source, the deflector, and the imaging element are set. The housing includes at least two sidewalls opposed to each other, a bottom surface that extends substantially perpendicular to the sidewalls, and ribs that are substantially perpendicular to the bottom surface and formed to extend from the two sidewalls, respectively. Discontinuous sections (sections between ribs or notched sections of the ribs) for passing light beams are provided in the ribs. A reinforcing member separate from the ribs are bridged to the discontinuous sections.
US07782351B2 Exposure head
Provided is an exposure head, including: an array substrate having a plurality of organic EL elements arranged in an array on one face; and a plurality of circuit chips having a circuit for driving the organic EL element, and in which the forming face of the circuit is serially arranged along the extending direction of the array substrate so as to face one face of the array substrate; wherein the plurality of circuit chips are mutually serially connected by providing a pair of wiring groups for each mutual boundary location of the circuit chips on one face of the array substrate and outside the arrangement area of the organic EL element, bump-bonding one of the adjacent circuit chips to one end of the pair of wiring groups, and bump-bonding the other adjacent circuit chip to the other end of the pair of wiring groups.
US07782348B2 Exposing device and image forming apparatus incorporating the same
An exposing device includes a light source that emits scanning light, a polygonal rotating mirror that scans and deflects the scanning light in a specific scanning direction, a reflection mirror that reflects the scanning light that has been scanned and deflected at plural reflection points aligned in a specific direction for the scanning light to go incident on the image carrier, and a unit main body in which the polygonal rotating mirror and the reflection mirror are disposed at a specific interval. The unit main body has two attachment fixing portions on almost a same line linking the reflection points and fixed to the apparatus main body. An attachment support is supported on the apparatus main body and allows free expansion of the unit main body in a plane direction including the scanning direction of the polygonal rotating mirror on a side where the polygonal rotating mirror is installed.
US07782347B2 Light source using large area LEDs
A printing apparatus (100) for printing digital images onto a photosensitive medium (140) employing, for exposure energy, a light source (20) that uses various arrays of LEDs (32). The printing apparatus (100) may form the print image using sequential modulation, one color at a time, or by applying all colors simultaneously. Arrangements of discrete LEDs (32) may include high-intensity devices configured with collector cones (41) arranged as a multicone structure (141), with parabolic reflectors (65), or collimating lenses (36). Large area LEDs (46) may alternately be used, arranged on an angled mounting surface (64), for example.
US07782343B2 Scaling device of image process
A scaling device for an image processor includes an image enlarging device and an integer divider. The image enlarging device receives an input image data, and enlarges the input image data, outputting an enlarging image data and a sample signal. The integer divider receives the enlarging image data, and samples the enlarging image data, outputting an object image data. By only adding an external integer divider at the output of the image enlarging device for obtain the scaling function of the image processor, a simpler circuit for image scaling is presented.
US07782342B2 Apparatus, method and medium for controlling image orientation
An apparatus, method, and medium for controlling image orientation are disclosed. An orientation mode detector measures multi-directional rotational angles of a display panel and determines an orientation mode for original image data based on the measured rotational angles. A system memory stores orientation parameters corresponding to a plurality of image orientation modes. A system controller initially acquires information indicating the orientation mode from the orientation mode detector, and it extracts orientation parameters corresponding to the acquired information from the system memory. Finally, a driver changes an orientation of the original image data according to the extracted orientation parameters.
US07782341B2 In place rotation of images for low memory systems
Rotation in the storage domain is a one-one function with the domain equal to the range. This permits an image to be rotated in place. Each image size implies at least one garland of closed chains of pixels. Each image includes a spanning set of these garlands. Rotation in place moves each pixel to the next location on its garland. On completion of a garland by return to the initial pixel, pixels on the next garland are moved. Image rotation is complete after all the garlands have been traversed.
US07782339B1 Method and apparatus for generating masks for a multi-layer image decomposition
Decomposing a computer display image into different layer types and associated masks based on the unique nature of the image is disclosed. These types include text, objects, background and pictures. A set of image masks is used to uniquely identify different layer types within an image, where each layer type includes none, some or all of the pixels of the original image. Each layer of the image is processed prior to transmission (i.e. compressed) using a method appropriate for the characteristics of that layer.
US07782337B1 Multi-conic gradient generation
Disclosed herein is a technique for computing a complex gradient using multiple conics. In connection with a computer system having a graphics processing unit (GPU) in addition to the normal central processing unit (CPU), gradients can be computed in real time. The conics may be rendered and adjusted in a number of ways, providing a rich palette for creation of gradient graphics. The computational efficiency of the algorithms disclosed herein, when executed on typical GPU hardware, allows rendering frame rates high enough to provide animated gradient images.
US07782329B2 Method and apparatus for protected graphics generation
Presently disclosed are a method and apparatus for generating graphics in a protected manner by establishing a user graphics partition while in an executive context. Once the user context is established, an operating mode is switched to the user context and then executing a user graphics program while in the user context. The operating mode then reverts to the executive context when the user context expires.
US07782327B2 Multiple parallel processor computer graphics system
An accelerated graphics processing subsystem that significantly increases the processing speed of computer graphics commands. The preferred embodiment of this invention presents a first-of-its-kind graphics processing subsystem that combines the processing power of multiple, off-the-shelf, video cards, each one having one or more graphic processor units. The video cards can be used without substantial modification. Under the preferred embodiment, each video card processes instructions for drawing a predetermined portion of the screen which is displayed to the user through a monitor or other visual output device. The invention harnesses the power of multiple video cards without suffering from the high bandwidth constraints affecting prior attempts at parallel graphics processing subsystems.
US07782325B2 Motherboard for supporting multiple graphics cards
The invention provides a motherboard that uses a high-speed, scalable system bus such as PCI Express® to support two or more high bandwidth graphics slots. The lanes from the motherboard chipset may be directly routed to two or more graphics slots. For instance, the chipset may route (1) thirty-two lanes into two ×16 graphics slots; (2) twenty-four lanes into one ×16 graphics slot and one ×8 graphics slot (the ×8 slot using the same physical connector as a ×16 graphics slot but with only eight active lanes); or (3) sixteen lanes into two ×8 graphics slots (again, physically similar to a ×16 graphics slot but with only eight active lanes). Alternatively, a switch can convert sixteen lanes coming from the chipset root complex into two ×16 links that connect to two ×16 graphics slots. The system according to the invention is agnostic to a specific chipset.
US07782324B2 Non-hierarchical unchained kinematic rigging technique and system for animation
In computer enabled key frame animation, a method and associated system for rigging a character so as to provide a large range of motion with great fluidity of motion. The rigging uses a character body that moves along a path or freely as needed. The nodes in the body and path are not physically connected but are linked for performing a particular task. This task driven behavior of the nodes which may allow them to re-organize themselves in different re-configurations in order to perform a common duty, implies a variable geometry to the entire dynamic structure. To some regard the nodes can be said to be intelligent.
US07782322B2 Plane shape creation system, plane shape creation method and program recording medium
When a fixed polygonal plane patch is called a polygonal plane patch of level 0 and when each vertex of such polygonal plane patch is called a shape composition point of level 0, a normal line of level 0 is set on each shape composition point of level 0, and each normal line of level 0 is decomposed on an equivalent tangent plane to the normal line of level 0. Moreover, a tangent line of level 0 is set by a decomposition in a direction equal to or in the vicinity of the edge of the polygonal plane patch of level 0; and based upon two tangent lines of level 0, a normal line is set on a shape composition point and on a shape composition point of level 1. A plane shape is formed by repeated controls of the above one after another.
US07782320B2 Information processing method and information processing apparatus
A virtual space image including a feature point is generated by executing software which generates a virtual space image on the basis of a viewpoint and receives a variation upon changing the position and orientation of the viewpoint. The position and orientation of the viewpoint are obtained by using the generated virtual space image. The position and orientation of the viewpoint are acquired. A variation is obtained on the basis of the position and orientation acquired in step S204 and those obtained in step S203. The variation is input to the software. The software updates the position and orientation of the viewpoint on the basis of the variation and outputs a virtual space image generated on the basis of a viewpoint having the updated position and orientation.
US07782314B2 Device and system for synchronizing image signals transmitted with superimposed signals
A remote unit includes: a receiving part that receives image signals superimposed on other signals via a first network; an outputting part that outputs the image signals to a second network; a separating part that separates the image signals from the other signals; and an adjusting part that adjusts delays of the image signals.
US07782312B2 Liquid crystal display device and method of driving the same
A LCD device includes a liquid crystal panel having a plurality of perpendicularly crossing gate and data lines, first and second display sections divided by a specific one of the data lines, a plurality of first data drive ICs driving the data lines in the first display section, a plurality of second data drive ICs driving the data lines in the second display section, and a timing controller rearranging image data input from a system into first image data corresponding to the first display section and second image data corresponding to the second display section, and simultaneously supplying the first image data and second image data, respectively, in a sequence starting from one of the first and second data drive ICs, respectively, closest to the specific data line towards one of the respective first and second data drive ICs farthest from the specific data line.
US07782309B2 Controlling device with dual-mode, touch-sensitive display
A universal controlling device having a touch-sensitive display. The display provides one or more graphical user interfaces comprised of graphical user interface icons that are selectable via the touch-sensitive display and the display accepts motions made by a stylus or finger in contact with the touch-sensitive display. The different interactions with the touch-sensitive display are used to cause the transmission of respective data to one or more appliances.
US07782308B2 Touch screen device and method of method of displaying images thereon
A touch screen device and method of displaying images using display windows and selecting execution menus displayed on the display windows in a touch screen device are provided. The touch screen device includes a screen, a display configured to display images thereon and a detector configured to detect a touch on the screen, and a controller configured to control operation of the touch screen device in accordance with the screen touch detected by the detector. The controller causes two or more display windows to be displayed in an overlapped manner. Further, if the touch is detected on an underlying display window covered by an overlying display window, the controller causes a display form to be changed in response to the touch. That is, if a touch is detected on the display window covered by the overlying display window, the touched display window is displayed as an overlying display window.
US07782297B2 Method and apparatus for use in determining an activity level of a user in relation to a system
Methods and techniques for use in the operation of a game apparatus or other system for determining an activity level of a user in relation to the game apparatus or other system. A machine-readable medium having embodied thereon instructions for performing such methods and techniques is also included, as well as an example system for implementation.
US07782292B2 Electrophoretic display device and method for driving the same
In an electrophoretic display device sandwiching an electrophoretic material between a first substrate and a second substrate, a plurality of pixels are formed on the first substrate; each pixel is composed of n subpixels (n being an integer of 2 or more); and the n subpixels contain at least one pair of adjoining subpixels that cannot be divided by a straight line.
US07782286B2 Rescue circuit line, display device having the same and method for manufacturing the same
A display device includes a rescue circuit line structure having a first conductive pattern for interconnecting electrically two circuit elements. The first conductive pattern is formed with an open for electrically disconnecting the circuit elements. A dielectric layer is disposed above the first conductive pattern in such a manner to cover the open. A second conductive pattern is disposed on the dielectric layer. A melting process is conducted onto the dielectric layer to interconnect electrically the second conductive pattern and the first conductive pattern so that signals can be passed between the circuit elements.
US07782284B2 Video signal line drive circuit, and display device having the circuit
The present invention relates to a video signal line drive circuit of a display device.An object of the present invention is to, when gradation conversion is performed in the display device using an error diffusion method, provide a display with a smooth gradation change even at boundaries of display blocks.In an error diffusion operation circuit (36) of a source driver unit (302), an error diffusion process is performed for each pixel based on, in addition to image data (Da) for a display block of the source driver unit (302), image data (Da) for areas near boundaries between the display block of the source driver unit (302) and display blocks of source driver units (301, 303) in previous and subsequent stages. A video signal is generated based on error-diffused image data (Db) generated by the error diffusion process.
US07782283B2 Apparatus and method for driving liquid crystal display device
An apparatus and method for driving an LCD device is provided. The apparatus includes an LCD panel that is comprised of red, green, blue and white sub-pixels. A data converter converts input data of three colors into input data of four colors. A data driver converts the input data of four colors into a video signal, and supplies the video signal to each sub-pixel. A gate driver supplies a scan pulse to each sub-pixel. A timing controller arranges the input data of four colors supplied from the data converter and then supplies the arranged data to the data driver. A backlight unit is comprised of LEDs of at least five colors to emit the light to the LCD panel. A backlight controller controls the backlight unit in accordance with the input data of three colors and the sub-frame control signal.
US07782282B2 Display device and driving method thereof
A display device includes first and second substrates facing each other, the first substrate having a display region and a non-display region, at least one data line on the first substrate, at least one gate line crossing the data line, the gate line supplied with a gate voltage, at least one pixel in the display region connected to a corresponding gate line and data line, and a first driving circuit including at least a first driving unit connected to a first gate line to output a first gate voltage, and a second driving unit connected to a second gate line to output a second gate voltage, wherein the first driving unit is supplied with at least a start gate voltage and the second gate voltage from the second driving unit to output the first gate voltage to the pixel.
US07782278B2 Intra-pixel convolution for AMOLED
A pixel array comprising a plurality of pixel groups, wherein each pixel group comprises: A plurality of light emitting elements, a plurality of driving units, and a plurality of switching units. A plurality of driving units, each of which outputs drives currents for the light emitting elements in a convolution sequence. Each of switching units couples the output of one of the driving units to the light emitting elements in the convolution sequence.
US07782276B2 Scan driving circuit and organic light emitting display using the same
A scan driving circuit and an organic light emitting display using the same is disclosed. A first scan driver having a plurality of first stages sequentially outputs a selection signal, and a second scan driver having a plurality of second stages sequentially outputs an emission signal. Each of the first and second stages are configured so as to have substantially zero static current, and operation speed can be optimized without significant increase in power consumption.
US07782266B2 Circularly-polarized dielectric resonator antenna
The present invention relates to a circularly-polarized dielectric resonator antenna (DRA). The antenna comprises a substrate, a Wilkinson power divider, a phase shifter, a ground plane and a dielectric resonator, wherein the phase shifter is connected to the Wilkinson power divider. Besides, the dielectric resonator is disposed on the ground plane, and includes a dielectric main body and a well disposed above the substrate. Additionally, the antenna is adopted to increase the linear radiation bandwidth by utilizing the well, and transceives a circularly-polarized electromagnetic wave by utilizing the Wilkinson power divider. Consequently, the circularly-polarized dielectric resonator antenna can be applied in the fields of satellite communication, Worldwide Interoperability for Microwave Access (WiMAX), and wireless communication.
US07782265B1 Variable aspect ratio tapered slot antenna for extended low frequency response
A Variable Aspect Ratio Tapered Slot Antenna For Extended Low Frequency Response (NC #98541). The apparatus includes a tapered slot antenna having a length and a height, and having an aspect ratio less than or equal to 1 to 2.16. The tapered slot antenna includes a first antenna element comprising conductive material and configured to receive and transmit RF signals; and a second antenna element comprising conductive material, operatively coupled to said first antenna element, configured to receive and transmit RF signals.
US07782263B2 Antenna structure for TPMS transmitter
An antenna structure for a TPMS (Tire pressure Monitoring System) transmitter is disclosed herein. A TPMS transmitter couples with a valve so that a spiral coil within the TPMS transmitter can be electrically connected to a conduct body of the valve to get a specific resonance frequency. Hence, the length of the antenna structure can be increased effectively and the efficacy can be raised.
US07782261B2 Antenna arrangement
An antenna arrangement including a first antenna element having a first feed for connection to radio frequency circuitry; and a second antenna element, separate to the first antenna element, having a second feed connected to the first feed.
US07782260B2 Planar antenna
An antenna includes a dielectric substrate, a grounding plane, first and second grounding elements, and first and second radiating elements. The grounding plane is formed on the dielectric substrate. The first and second grounding elements are formed on the dielectric substrate, have a curved shape and a size that are identical, and are connected to the grounding plane. The first and second radiating elements are formed on the dielectric substrate, have a curved shape and a size that are identical, are operable in the same frequency range, and are connected to the first and second grounding elements, respectively.
US07782254B2 Culled satellite ephemeris information based on limiting a span of an inverted cone for locating satellite in-range determinations
Locating satellites (e.g., GPS) are culled into a sub-plurality based largely on dwell time within an inverted cone above a relevant site in communication with a wireless device. A first inverted cone having a first base angle is defined above a first site, a second inverted cone having a second base angle is defined above a second site. If the second site is farther from an equator of Earth than the first site, then the second inverted cone is made to have a base angle larger than a base angle of the first inverted cone. If the first site is farther from the equator of Earth than the second site, then the first inverted cone is made to have a base angle larger than a base angle of the second inverted cone. The span of the inverted cone over the site closest to the equator may be limited.
US07782250B2 Millimeter wave radar target simulation systems and methods
A millimeter wave radar target simulation system and method. The system includes a down-converter that converts a millimeter wave radar signal to an intermediate frequency, an electrical-to-optical modulator that modulates an optical signal based on the down-converted signal, an optical-to-electrical demodulator that demodulates an optical signal to an electrical signal, an optical delay line serving to delay a signal passing from the electrical-to-optical modulator to the optical-to-electrical demodulator, and an up-converter that converts the electrical signal from the optical-to-electrical demodulator to a frequency that simulates a millimeter wave target return. The method includes receiving a millimeter wave radar signal, down-converting the radar signal to an intermediate frequency, modulating the down-converted signal to an optical signal, delaying the optical signal, demodulating the delayed optical signal, and up-converting the demodulated signal to a signal having a frequency that simulates a millimeter wave radar target return.
US07782243B1 Direct capacitance-to-digital converter
A direct capacitance-to-digital converter is provided, including a plurality of switches, an ADC, a reference voltage circuit and a trigger unit. By using trigger unit to control a plurality of switches, and combining the reference voltages outputted by the reference voltage circuit, the converter can directly sense the external to-be-measured capacitor and related stray capacitor, and directly convert the capacitance of the to-be-measured capacitor into accurate digital signal. The present invention can be integrated with other sensors into a single chip to form an integrated direct capacitance-to-digital converter.
US07782242B2 Time-to-digital conversion with delay contribution determination of delay elements
A time-to-digital converter includes at least one chain of delay elements, a status of which represents a digital signal relating to a time interval to be converted. The converter includes a provider for providing trigger signals having statistically equally distributed variable positions relative to a pulse forwarded in the chain of delay elements, a capturer for capturing the status of the chain of delay elements in response to the calibration trigger signals, the status depending on delay times of the delay elements, a determiner for determining an actual contribution of at least some of the delay elements to an overall delay of the chain of delay elements on the basis of occurrences of pulse positions in response to the calibration trigger signals. The converter is configured to take into account the actual contribution of at least some of the delay elements when converting the time interval into said digital signal.
US07782237B2 Semiconductor sensor circuit arrangement
An error-corrected representation of an input signal, such as a bioluminescence signal, is generated. An analog representation of the input signal is oversampled and quantized to provide a first-stage digital output and a residual error. The residual error is provided as a second-stage digital output using successive approximation. The first-stage and second-stage digital outputs are used to generate an error-corrected representation of the bioluminescence signal.
US07782235B1 Adaptive mismatch compensators and methods for mismatch compensation
In a compensator for compensating mismatches, and in methods for such compensation, the compensator compensates for mismatches in output signals of a system with mismatches during normal operation of the system with mismatches. The compensator comprises: a mismatch estimator that monitors at least two mismatched signals output by the system with mismatches during normal operation and that generates matching parameters indicating an amount of mismatch between the at least two mismatched signals, the mismatch estimator updating the matching parameters during normal operation of the system with mismatches, and a mismatch equalizer that compensates mismatches in the mismatched signals output by the system with mismatches during normal operation of the system with mismatches in response to the matching parameters.
US07782233B2 Method and apparatus for encoding/decoding point sequences on laser binary representation
Provided are a method and an apparatus for selectively encoding/decoding point sequences to maximize bit efficiency of a lightweight application scene representation (LASeR) binary stream. The point sequence encoding method includes the steps of: for each point sequence, (a) selecting one of exponential-Golomb (EG) encoding and fixed length (FL) encoding schemes; (b) when the FL encoding scheme is selected, encoding the point sequence using the FL encoding scheme to generate a binary stream; and (c) when the EG encoding scheme is selected, encoding the point sequence using the EG encoding scheme to generate a binary stream. The binary stream includes a flag indicating which encoding scheme is selected and a parameter k, with which the EG encoding can be most effectively performed, when the EG encoding scheme is selected. According to the encoding method, LASeR point sequences can be efficiently encoded and, during a decoding process, a large overhead is not incurred to a decoder (terminal).
US07782227B2 Dynamic vehicle grid infrastructure to allow vehicles to sense and respond to traffic conditions
A dynamic ‘vehicle grid’ system provides the ability for drivers to be automatically warned to the conditions of other vehicles in the vicinity. In this grid system, a motor vehicle would be equipped with a transmitter, receiver, computer and a selection of sensors. Other adjacent vehicles are also contain the same of equipment for transmitting and receiving signals. When the sensors in a vehicle detect a change such as hard braking (rapid deceleration) or very slow speed (blockages), it automatically sends this information via the transmitter over a wireless communication channel to any other receivers in the vicinity.
US07782224B2 Customizable indicator light
A customizable indicator light system for a printing device includes at least one printing device configured to detect at least one machine state corresponding to the operation of the at least one printing device. An indicator light is operably coupled to the at least one printing device. The indicator light is adapted to operate in at least one of an off state, a blink state, and a steady state to indicate the detected machine state. A computing device is in operative communication with the at least one printing device and is adapted to provide at least one user setting to the at least one printing device. The at least one user setting includes at least one behavior setting configured to selectively set the indicator light to one of the off state, the blink state, and the steady state based on the detected machine state. The at least one user setting further includes a skip setting configured to cause the indicator light to remain set in at least one of the off state, the blink state, and the steady state based on the detected machine state.
US07782221B2 Emergency shutdown detection device for a gas turbine
An emergency shutdown detection device for a gas turbine includes a longish, mechanically severable sensor element (5), in which at least one electric line (1 to 4) is provided, with at least one resistor (R1 to R3) being electrically connected to the electric line such that upon severance of the sensor element (5), the electrically connected resistor is electrically disconnected from the electrical line to alter a resistance value for the electrical line.
US07782219B2 Device and method for protecting an electronic appliance in critical motion conditions, in particular in case of fall
A device for protecting an electronic apparatus includes: a motion-detection device, for supplying at least one alert signal in response to conditions of motion of the protection device; a counter; a first logic circuit, for incrementing the counter in the presence of a first value of the alert signal, in a first operating condition; and a second logic circuit, for generating a protection signal on the basis of a count value of the counter. In addition, the first logic circuit is configured for decrementing the counter in the presence of a second value of the alert signal, in the first operating condition.
US07782217B2 System and method for monitoring motor
A system (100) for monitoring a motor (202) includes a potential-detecting module (102), a potential-comparing module (104) and a motor-monitoring module (106). The potential-detecting module is configured for measuring output potential of the motor before operation of the motor, and measuring output potential during operation of the motor so as to determine a first output potential and a second output potential. The potential-comparing module is configured for comparing the first output potential with the second output potential to determine whether the motor is operating normally. The motor-monitoring module is configured for selecting a monitoring type if the motor is operating normally. A method for monitoring a motor is also provided.
US07782211B2 RFID label with increased readability of printed images
A RFID label has a multilayer structure including a sheet-like antenna base material, a RFID circuit element embedded in the antenna base material, a cover film having a printing region in which prescribed printing is performed, an adhesive layer for that bonds the antenna base material to the cover film, an adhesive layer for fixing the antenna base materials to a desired object, and a release layer for covering the adhesive layer. The length of the antenna base material in the longitudinal direction of the RFID label is no less than the length of the printing region.
US07782210B2 Resonance tag
A resonance tag includes a dielectric layer, a first circuit layer, a second circuit layer and a hard pad. The first circuit layer is formed on one surface of the dielectric layer, and the first circuit layer has a first electrode pattern and a coil. A second circuit layer is formed on the other surface of the dielectric layer, and the second circuit layer has a second electrode pattern and a wiring. A hard pad is formed on the second circuit layer and corresponding to the wiring of the second circuit layer, and then an edge of the hard pad is beyond the edge of the wiring.
US07782208B2 Dynamic inventory management of deployed assets
A dynamic inventory management method can include the step of attaching a location tag to a deployable asset. A mobile entity can be associated with the location tag. A tag scanner can scan for location tags within a range of the tag scanner. Data can be conveyed from the tag scanner to a communicatively linked inventory control system. The scanning and conveying steps can be repeated to dynamically update the inventory control system.
US07782207B2 Comprehensive theft security system
An antitheft security system and method using networked pedestals for monitoring, and reporting data relating to, merchandise, having security tags coupled to or embedded therein, leaving or entering a business establishment and alerting business establishment personnel when a theft may be occurring. The system and method collect and communicate security tag data and associated peripheral device data to a remote server for analysis.
US07782205B1 Electronic device with an antitheft function and method for preventing theft of electronic devices
The present invention relates to an electronic device with an antitheft function consisting of a wireless tag containing information enabling the electronic device to operate, and a control portion accessible to the wireless tag, where the control portion releases a lock of the electronic device when the electronic device is determined to be operable according to the information stored in the wireless tag. Also, the present invention includes a method for preventing theft of an electronic device that includes the steps of writing information enabling the electronic device to operate on a memory of a wireless tag by a wireless tag writer at the time of purchase of the electronic device, and determining if the electronic device is operable according to the information written on the wireless tag.
US07782204B2 Wireless IC tag with counter, and information management system
The wireless IC tag has a counter for counting on the basis of a signal received via the antenna or for counting in cases where a signal transmits via the antenna. The wireless IC tag may have a counter for each required data field and incrementing/decrementing a count value when data is read from the data field. The wireless IC tag may have a counter for each byte field in a memory and incrementing/decrementing a count value when data is read from the byte field.
US07782201B2 Techniques for preventing damage to a portable device
A technique for preventing damage to a portable device includes detecting movement of a portable device and determining whether a port of the portable device is attached to an external device. When the external device is attached to the port, a notification is provided to a user of the portable device that the external device requires detachment from the portable device (e.g., assuming that the notification is not masked).
US07782199B2 Portable self-contained alarm system
A secure sealed container and mounting pole house any of a variety of security equipment. Sensing equipment, a high decibel siren, and strobes simulating police lights are removably attachable to a universal mount and control circuit. A control panel connected to the circuit enables and disables the alarm, and monitors system activity.
US07782198B2 Apparatus and method for detecting tampering of a printer compartment
The illustrative embodiments described herein provide an apparatus and method for detecting tampering. The apparatus includes a printer and a printer compartment located within the printer. The apparatus also includes a switch capable of being coupled to the printer compartment. The switch is adapted to close when tampering with the printer compartment occurs. The apparatus includes a tamper detection device capable of being in a tamper state and a non-tamper state. The tamper detection device discharges and places the tamper detection device in the tamper state when the switch is closed to indicate that tampering has occurred. The apparatus includes a set of power sources. The set of power sources provides charge to the tamper detection device and places the tamper detection device in the non-tamper state.
US07782194B2 Cart coordinator/deployment manager
A media enhanced shopping cart system comprises a shopping cart comprising a frame, a basket, a handle, a base tray, a plurality of wheels, a read component for performing a proximity scan of the shopping cart, a locationing component for determining a location of the shopping cart within a store based on the scan, and a display component for displaying at least one advertisement for a product based on the location of the shopping cart within the store, wherein the locationing component is further operable to determine a location of the product within the store relative to the shopping cart based on the scan, and wherein the display component is further operable to display an indication of the location of the advertised product relative to the location of the shopping cart.
US07782191B2 Portable alarm apparatus for warning persons
Portable alarm apparatus for warning a person is provided which includes a manually portable housing or base unit; a constant power supply supported by the base unit, the constant power supply including an external power supply having an interface connectible to a power source external of the base unit, the constant power supply including an onboard power supply independent of the external power supply whose makeup includes at least one of: photovoltaic, piezoelectric and thermoelectric; a detection circuit supported by the base unit, the detection circuit being connected to the constant power supply, the detection circuit being operable to detect a monitored condition, the detection circuit including at least one of: a smoke detector, a carbon monoxide detector and a fire detector; and an alarm circuit supported by the base unit, the alarm circuit being connected to the constant power supply, the alarm circuit being operable in response to detection of the monitored condition by the detection circuit to produce an alarm signal for warning a person.
US07782189B2 System to monitor the ingestion of medicines
A system for monitoring ingestion of medicine (21) comprises forming a digestible radio frequency identification (RFID) tag (10). The RFID tag is attached to the medicine. The RFID tag and medicine are ingested. A signal from the RFID tag is monitored.
US07782187B2 Monitoring apparatus
A position detection sensor using electromagnetic wave (1) estimates the position of a monitor object (100) in a first detection region (101), and outputs it as a first possibility distribution. A second sensor (4) estimates the position of the monitor object (100) in a second detection region (102), and outputs it as a second possibility distribution. A distribution computing means (5) outputs an integrated possibility distribution which it obtains by integrating the possibility distributions of the position of the monitor object 100 which are acquired by these sensors. An information presenting means (6) outputs the integrated possibility distribution as information about the most possible position of the monitor object (100).
US07782184B2 Method and system for improving traffic safety
A method and system for improving traffic safety when driving a vehicle on a roadway including detecting at least one object in the immediate surroundings of the vehicle, analyzing the at least one detected object, deciding whether the at least one analyzed object is relevant in terms of traffic safety to the driving of the vehicle, and illuminating, via a light source, the roadway with a light pattern indicating the at least one object which is considered to be relevant in terms of traffic safety to the driving of the vehicle, thereby improving traffic safety.
US07782183B2 System, data carriers, reader and method for determining the peripheral wheel speed and distance
A system comprises at least one contactless readable data carrier (1) which can be attached to a wheel (100) of a vehicle and a reader (10) which can be arranged on the vehicle to receive electromagnetic signals (ES) emitted by the data carrier (1). The reader (10) is designed to determine the revolutions of the wheel (100) from the field strength fluctuation of the received electromagnetic signals (ES), the reader (10) having calculation means (19) designed to calculate from the revolutions and a wheel periphery reference value (RU) determined by the reader and allocated to the wheel (100), such as circumference, diameter or radius, a distance covered by a point on the wheel periphery and/or values derivable therefrom such as the peripheral speed (UV) of the wheel (100).
US07782181B2 Telematic parametric speed metering system
Embodiments of the present invention provide systems, articles of manufacture and methods for a telematic parametric speed metering system. In one embodiment, a system may determine a vehicle's location and speed. Once the location has been determined, corresponding geographical zone based speed limits and/or other information may be acquired via internal memory or data transmission. The speed of the vehicle may then be compared against the speed limits for the zone. If the vehicle's speed exceeds those speed limits, one or more of a plurality of actions may be performed including (but not limited to) warning the driver via a visual or audio signal, informing an authority agency via data transmission, logging the excessive speeding condition (e.g., time, date, speed, location, driver name, etc).
US07782180B2 Collision-detecting device for automotive vehicle
A collision-detecting device according to the present invention is installed in a bumper of an automotive vehicle. The collision-detecting device includes a deformable member disposed behind a bumper cover, a pressure sensor disposed in an inside space of the deformable member and an electronic control unit for determining a collision with a pedestrian based on signals from the pressure sensor. A width of the deformable member is made 300 mm or wider so that the width sufficiently covers a portion that is usually deformed by a collision with a pedestrian. A height of the deformable member is so set that a reaction force of the deformable member generated by a collision with a pedestrian does not exceed a predetermined level such as 1 kN. According to the present invention, a collision with a pedestrian is surely detected and the colliding pedestrian is protected from a severe damage.
US07782178B2 Vehicle anti-theft system and method
In a vehicle anti-theft system, a vehicle-mounted mainframe downloads a sole identification code, serving as a control identification code, and transfers the sole identification code into a part as a part identification code. The vehicle-mounted mainframe determines if the control identification code is obtained when the vehicle is activated. If yes, the vehicle-mounted mainframe sends a request command to the part to obtain the part identification code. The vehicle-mounted mainframe determines if the part identification code meets with the control identification code. If yes, the vehicle-mounted mainframe produces a normal operation signal to enter a normal operational mode and feedbacks the identification code to the customer service center. The customer service center checks with a database for stolen events. If an event of vehicle stolen is found, subsequent procedures are taken; otherwise, the vehicle-mounted mainframe transfers an abnormal signal to the customer service center for proceeding with subsequent procedures.
US07782176B2 Method for information display, mobile information apparatus, and contactless communication device
A mobile information apparatus 10 acquires the display information which is stored in the display area 72, which is secured for using at the time of displaying on the display section by the mobile information apparatus 10, in the storage section 34 of the contactless communication device 30. In this case, in the display area 72, display information which can improve convenience for a user is stored. The display information which is stored includes information such as a result of editing a content of communication performed by the contactless communication, a function performed by the contactless communication by the contactless communication device 30, and an issuer of such function. Then, based on the display information which is acquired, the information of the contactless communication device 30 is displayed on the display section. Therefore, it is possible to display on the display section of the mobile information apparatus 10 in which the contactless communication device 30 is installed, the information of the contactless communication device 30 which can improve the convenience for the user.
US07782173B2 Chip resistor
The chip resistor 10 includes a ceramic substrate 11 that is shaped like a rectangular parallelepiped. Mounted on the lower surface of the ceramic substrate 11 are a resistive element 12 that is made mainly of a low-resistance, low-TCR copper-nickel alloy, first and second electrode layers 13, 14 that form a two-layer structure and cover both longitudinal ends of the resistive element 12, and an insulating protective layer 15 for covering the remaining area of the resistive element 12. The resistive element 12 is positioned within a region inside the peripheral border of the lower surface of the ceramic substrate 11. The chip resistor 10 also includes end-face electrodes 17 that are positioned on both longitudinal end faces of the ceramic substrate 11. The second electrode layers 14 and end-face electrodes 17 are covered by plating layers 18-21. This chip resistor 10 is to be face-down mounted with both electrode layers 13, 14 positioned on a wiring pattern 31 of a circuit board 30.
US07782172B2 Variable chip resistor
A variable chip resistor (1) of the present invention includes a resistor element (2) made of a metal plate which is in the form of a chip and has a predetermined specific resistance. Terminal electrodes (3, 4) for soldering are provided at both ends of the resistor element (2), and at least one adjustment hole (9) is formed in the resistor element (2) at a portion between the terminal electrodes (3, 4). An adjustment rod (10) is inserted into the adjustment hole (9) in close contact with the inner surface of the adjustment hole. The adjustment rod (10) is made of an electroconductive material, and its insertion depth is adjustable in the axial direction of the adjustment hole (9).
US07782170B2 Low consumption and low actuation voltage microswitch
A microswitch comprises a deformable membrane including two substantially parallel flexure arms, attached to a substrate via at least one end thereof and comprising thermal actuating means. An elongated contact arm, substantially parallel with the flexure arms, is arranged therebetween and attached thereto at the high deformation areas thereof. The contact arm moves in a direction substantially parallel to the substrate upon actuation of the microswitch, and comprises electrostatic holding electrodes and a conducting pad.
US07782166B2 Cross-coupled inductor pair formed in an integrated circuit
Cross-coupled first and second helical inductors formed in an IC. The cross-coupled first and second helical inductors comprise a first helical conductor having a first portion and a second portion, and a second helical conductor having a first portion and a second portion. The second helical conductor is in close proximity to the first helical conductor. The first helical inductor is formed by the first portion of the first helical conductor and the second portion of the second helical conductor. The second helical inductor is formed by the second portion of the first helical conductor and the first portion of the second helical conductor.
US07782165B2 Wire-stacked transformer
A wire-stacked transformer has a first loop supplied with electric power and built with one or more metal plates forming a magnetic field, a second loop disposed in a concentric circle with the first loop and generating induction current, and loop wires disposed between the respective metal plates of the first loop and supplying electric power to each metal plate. Accordingly, efficiency of a power amplifier can be enhanced by reducing the loss of the DAT.
US07782164B2 Magnetic clamping device, an injection moulding machine comprising such a device and a method for manufacturing such a device
A magnetic clamping device includes a clamping support and at least two magnetic pads housed in the support, each pad having a magnet that can be switched between an activated state and a deactivated state. Each pad has at least one solenoid coil each end of which is connected to a terminal with the terminals of at least two pads being connected to each other by removable connectors.
US07782162B2 Switching device
A plurality of pairs of a movable contact point and a fixed contact point, which are opposite so that they can be contacted with and separated from each other, are provided in parallel and connected in series so that an electrical current flows in the same direction between the movable contact point and the fixed contact point, which are simultaneously closed. Permanent magnets are disposed on lateral sides of the movable contact point and the fixed contact point a so that a magnetic field, which extends an arc generated between the contact points in either an upward or downward direction, is formed.
US07782151B2 VCO digital range selection
An extended range voltage controller oscillator (VCO) circuit for use in a phase-locked loop (PLL) circuit is provided. The VCO circuit includes two additional pairs of varactors which are used to extend the range of the VCO circuit around its center frequency.
US07782137B2 Differential circuit providing a function to cancel input offset voltage
A new offset canceling circuit for a differential circuit is disclosed whose input offset voltage may be cancelled independent of the variation of the input level, accordingly, enables the cut-off frequency of the canceling circuit unchanged. The offset canceller of the invention provides a buffer amplifier and a filter. The filter includes a capacitance multiplier including an operational amplifier (Op-Amp) operating in the inverting mode and a capacitor connected between the input and output of the Op-Amp. The Op-Amp operating in the inverting mode whose closed loop gain is solely determined by resistors, and the capacitance of the capacitor is multiplied by the closed loop gain of the Op-Amp by the Miller effect.
US07782136B2 Digitally adjusted variable gain amplifier (VGA) using switchable differential pairs
A variable gain amplifier including a stage. The stage having a set of switchable differential pairs. The stage providing a gain range to a signal and adjusting a gain of the signal. At least one differential pair in each stage is permanently enabled. The variable gain amplifier may include a plurality of cascaded stages including the stage. In addition, the variable gain amplifier may be adjusted through an interleaved thermometer coding method.
US07782134B2 RF power amplifier system with impedance modulation
A power amplifier controller circuit controls an adjustable impedance matching network at the output of a power amplifier to vary its load line to improve the efficiency of the RF PA. The PA controller circuit comprises an amplitude control loop that determines an amplitude correction signal. The amplitude loop is configured to control or correct for distortion from the adjustable matching network based upon the amplitude correction signal.
US07782130B2 Bowtie deflector cavity for a linear beam device
A resonant cavity with a bowtie shape supports an electromagnetic field used to deflect the trajectory of an electron beam passing through the cavity. The short transit time of the beam across the gap maintains the cavity fields at near-optimal phase, improving interaction efficiency even for relatively low-energy beams. High interaction impedance ensures good drive-power-to-deflection conversion efficiency. The uniform field achieved across the gap enforces uniform deflection across the beam profile to maintain beam quality. Multiple bowtie cavities can be arranged to allow arbitrary two-dimensional deflections.
US07782124B2 Voltage supply circuit of semiconductor device
The purpose of the present invention is to decrease a leak current of a voltage supply circuit using a MOS transistor. This voltage supply circuit comprises an n-channel MOS transistor having a low threshold voltage, the drain of which is connected to the power supply voltage, and a p-channel MOS transistor, the source of which is connected to the source of the n-channel MOS transistor and which supplies a voltage vii from the drain to a load circuit. Since a voltage V gs=1 V is applied to the gate-sources of the p-channel MOS transistor when said circuit is on standby, the p-channel MOS transistor operates in a larger cut-off region than an ordinary cut-off region.
US07782122B2 Electronic device and related power control device for enhancing power stability for power on and power off processes
A power control device for an electronic device for enhancing power stability when the electronic device is powered on including a high-pass filtering unit for performing a filtering process on an input signal for generating an output signal, and a control unit coupled to the high-pass filtering unit and a first voltage generator of the electronic device for outputting the output signal to the first voltage generator according to the voltage level of the output signal.
US07782120B2 Internal voltage generating circuit
Disclosed is an internal voltage generating circuit that pumps charge to generate an internal driving voltage. The internal voltage generating circuit includes: a first oscillation signal generating unit that provides a first oscillation signal in response to a detected internal voltage and a predetermined test mode signal; a second oscillation signal generating unit that divides an external clock to provide a second oscillation signal having a variable oscillation period; and a switching unit that selects the first oscillation signal or the second oscillation signal in response to the predetermined test mode signal and provides the selected signal as a pumping period signal.
US07782115B2 Voltage level shifter
Methods, systems, and devices are described for providing voltage level shifting that may operate reliably and at low power, even at high voltages and/or high switching frequencies. Embodiments receive an input signal representing input information, and effectively generate two voltage responses as a function of the input signal. Each voltage response includes exponential terms as a function of resistive and capacitive loading effects of components of the embodiments. A combined response signal is generated substantially as a superposition of the first response signal and the second response signal. A high-side driver signal is then generated as a function of the combined response signal, such that the high-side driver signal substantially preserves the input information represented by the input signal, and such that the first exponential response and the second exponential response are substantially absent from the high-side driver signal.
US07782114B2 Design structure for a high-speed level shifter
Disclosed are embodiments of a design structure for a voltage level shifter circuit that operates without forward biasing junction diodes, regardless of the sequence in which different power supplies are powered up. The circuit embodiments incorporate a pair of series connected switches (e.g., transistors) between an input terminal and a voltage adjusting circuit. Each switch is controlled by a different supply voltage from a different power supply. Only when both power supplies are powered-up and the different supply voltages are received at both switches will a first signal generated using one of the supply voltages be passed to a voltage adjusting circuit and thereafter converted into a second signal representative of the first signal, but generated using the second supply voltage. Incorporation of the pair of series connected switches into the voltage level shifter circuit prevents forward biasing of junction diodes in the circuit and thereby prevents current leakage from the power supplies.
US07782108B2 Flip-flop device and method for storing and outputting a data value
A flip-flop device for storing and outputting a data value includes a controllable memory element configured to be open as a function of a control pulse, a feedback means for comparing a data value present at the memory element and the data value output by the memory element, and for outputting a comparison signal, and a control pulse generator for generating the control pulse as a function of the comparison signal, so that the control pulse generator is put in an activated state when the comparison signal is high, so as to then, in the activated state, open the memory element in response to a clock event. The memory element will then be closed again when the comparison signal indicates that the same values are present at the output and at the input of the memory element.
US07782101B2 Injection-locked frequency divider
An injection-locked frequency divider for dividing a frequency of an injection signal and obtaining a frequency divided signal is provided. The injection-locked frequency divider includes a signal injection unit and an oscillator. The signal injection unit includes a first input terminal and a second input terminal for receiving the injection signal. The received injection signal exhibits a phase difference of 180° between the first input terminal and the second input terminal. The oscillator includes an inductor unit and a variable capacitance unit. The injection-locked frequency divider is featured with a wide injection locking range, and can be realized with a low operation voltage, and therefore can be conveniently used in different kinds of hybrid ICs.
US07782098B2 Drive circuit and inverter for voltage driving type semiconductor device
A drive circuit for driving a semiconductor element is equipped with: a first switch connected to a positive side of a DC power supply; a second switch connected to the other terminal of the first switch and to a negative side of the DC power supply; a third switch connected to the positive side of the DC power supply; a fourth switch connected to the other terminal of the third switch; a fifth switch connected to the other terminal of the fourth switch and to the negative side of the DC power supply; and a capacitor connected to the other terminal of the first switch and to the other terminal of the fourth switch. A gate of the semiconductor element is connected to the other terminal of said third switch; and a source of the semiconductor element is connected to the negative side of the DC power supply.
US07782097B2 Source driver and power down detector thereof
The present invention discloses a source driver powered by a power supply comprising at least one channel, at least one output pad coupled to the channel, at least one switch connected between the output pad and a predetermined voltage, and a power down detector for detecting whether a first supply voltage from the power supply is insufficient and generating a reset signal to turn on the switch when the first supply voltage from the power supply is insufficient.
US07782095B2 Signal comparison circuit
A signal comparison circuit is provided. The signal comparison circuit includes a first amplifier, a second amplifier, a peak detector, and a comparator. The first amplifier is a zero-peaking amplifier. The first amplifier receives and amplifies a data signal. The second amplifier receives and amplifies a reference voltage. The peak detector is coupled to the first and the second amplifiers for detecting and maintaining maximum values of the amplified data signal and the amplified reference voltage, and then outputting the maintained data signal and the maintained reference voltage. The comparator is coupled to the peak detector for comparing the maintained data signal with the maintained reference voltage and outputting a result of the comparison.
US07782094B2 Apparatus for sensing an output current in a communications device
Power over Ethernet (PoE) communication systems provide power and data communications over the same communications link, where a power source device (PSE) provides DC power (for example, 48 volts DC) to a powered device (PD). The DC power is transmitted simultaneously over the same communications medium with the high speed data from one node to the other node. The PSE typically includes a controller that controls the DC power provided to the PD at the second node of the communications link. The PSE controller measures the voltage, current, and temperature of the outgoing and incoming DC supply lines to characterize the power requirements of the PD. The PSE controller includes a resistorless switch to measure the current. The resistorless switch includes a sense transistor and a current mirror to allowing the PSE controller to calculate the current based upon a replica current.
US07782088B1 Sharing adaptive dispersion compensation engine among programmable logic device serial interface channels
In a programmable logic device (PLD) having a plurality of serial interface channels, the number of adaptive dispersion compensation engines (ADCEs), which adjust the equalization of each channel that requires it, is reduced. In one embodiment, one ADCE is provided for every group of channels (e.g., every group of two channels), and multiplexers are provided to connect the ADCE to one channel (or more) according to the user logic design. In another embodiment, one ADCE is provided for every group of channels, and time-division multiplexing (TDM) is used to connect the ADCE sequentially to every channel in the group that requires it. Because the time required to adjust each channel is small, theoretically all ADCEs on the PLD could be considered one group, sharing one ADCE by TDM. The TDM circuitry could be programmable to allow priority to be given to certain channels, so that they are adjusted first.
US07782087B2 Reconfigurable sequencer structure
A cell element field for data processing, having function cell means for execution of algebraic and/or logic functions and memory cell means for receiving, storing and/or outputting information is described. Function cell-memory cell combinations are formed in which a control connection leads from the function cell means to the memory cell means.
US07782086B2 Semiconductor integrated circuit device
The present invention provides a semiconductor integrated circuit device that reduces the influence of crosstalk noise and is operable properly even when relatively long signal wirings that pass over a macrocell are formed. In the semiconductor integrated circuit according to the present invention, buffering cells formed between the macrocell and an input/output circuit close thereto are connected to their corresponding signal wirings extended so as to pass over an area formed with the macrocell.
US07782085B2 Nonvolatile programmable logic circuit
A nonvolatile programmable logic circuit using a ferroelectric memory performs a nonvolatile memory function and an operation function without additional memory devices, thereby reducing power consumption. Also, a nonvolatile ferroelectric memory is applied to a FPGA (Field Programmable Gate Array), thereby preventing leakage of internal data and reducing the area of a chip.
US07782083B2 Trimming circuits and methods
Techniques for programming trimming circuitry of a power integrated circuit without the need for separate programming pins are disclosed. According to a first aspect of the invention, there is provided a power supply controller IC with internal circuitry, a plurality of external connections, the IC further comprising trimming circuitry with no external connections to the IC other than via shared ones of the external connections. The shared external connections can comprise a first connection comprising a data input for receiving data for programming the trimming circuitry, and a second, different connection comprising a select input to select between a data receiving mode for receiving data from the data input and a programming mode for programming the trimming circuitry using the received data.
US07782079B2 Apparatus and method of calibrating on-die termination for semiconductor integrated circuit
An apparatus for calibrating on-die termination for a semiconductor integrated circuit includes a comparing unit that compares a code conversion voltage, which is obtained by converting an internal code into an analog voltage, with a reference voltage, and outputs a comparison result signal, a code control unit that compares a current comparison result signal and a previous comparison result signal, among comparison result signals obtained by sequential comparison operations by the comparing unit, to determine whether or not the levels thereof are the same, and outputs an external code update signal according to the comparison result, and a counter that increases or decreases the internal code according to the comparison result signal and outputs the internal code as an external code according to the external code update signal.
US07782078B2 On die termination circuit and method for calibrating the same
On die termination circuit and method for calibrating the same includes a external resistor connected to a first node, a plurality of calibration resistors connected to a second node, the plurality of calibration resistors being turned on/off in response to a calibration code set, a current mirror configured to mirror currents of the first node and the second node and a code generator configured to generate a calibration code set according to the mirrored currents. In accordance with a method for calibrating an on die termination circuit of the present invention, the method includes a step of mirroring a current of a first node connected to an external resistor and a current of a second node connected to a plurality of calibration resistors and a step of generating a calibration code set according to the mirrored currents.
US07782073B2 High accuracy and universal on-chip switch matrix testline
A testline structure made for integrated circuit tests is presented. The structure includes an array of testline pads formed in the scribe line area or integrated circuit die area on a semiconductor substrate, a plurality of test devices formed under the pads area, and a select circuit selectively connecting one of the test devices. The testline structure of this invention enables access to a large number of test devices through the same number of pads as on a conventional testline and can be employed to conduct parametric, reliability, and functional tests on the same. A source measurement unit (SMU) in a conventional integrated circuit tester is employed to sense and force predetermined test conditions on the test device terminals and conduct accurate Kelvin tests on the selected device. A method of using this testline structure is also presented.
US07782072B2 Single support structure probe group with staggered mounting pattern
A probe group can include multiple probes for testing devices having contact pads. The probes can comprise beams, contact tip structures, and mounting portions. The beams can provide for controlled deflection of the probes. The contact tip structures can be connected to the beams and can include contact portions for contacting with the devices. The mounting portions of the beams can be attached to support structures, which can be arranged in a staggered pattern. The beams located in a first row of the staggered pattern can include narrowing regions that lie substantially in line with the mounting portions of a second row of the beams.
US07782071B2 Probe card analysis system and method
A system and method for evaluating wafer test probe cards under real-world wafer test cell condition integrates wafer test cell components into the probe card inspection and analysis process. Disclosed embodiments may utilize existing and/or modified wafer test cell components such as, a head plate, a test head, a signal delivery system, and a manipulator to emulate wafer test cell dynamics during the probe card inspection and analysis process.
US07782068B2 Circuit for capacitance measurement and method therefor
A measurement method for capacitance includes the following steps. First, a voltage on at least one end of a to-be-measured capacitor is switched in response to a first set of clock signals such that a level of an integrated voltage is adjusted from a start voltage level to an end voltage level in a first integration period, wherein a capacitance of the to-be-measured capacitor is relevant to a difference between the end voltage level and the start voltage level. Next, the level of the integrated voltage is adjusted from the end voltage level to the start voltage level in a second integration period in response to a second set of clock signals. Then, the capacitance of the to-be-measured capacitor is obtained according to the first and second integration periods and a known characteristic parameter.
US07782064B2 Test apparatus and test module
Provided is a test apparatus that tests a device under test, comprising a control apparatus that controls the test apparatus; a pattern generator that generates a plurality of test patterns to be provided to a plurality of input terminals of the device under test; a plurality of variable delay circuits that designate a timing for supplying each of the plurality of test patterns to a corresponding input terminal of the plurality of input terminals; and a plurality of micro-controllers that operate in parallel, according to instructions from the control apparatus, to each measure a delay amount of a variable delay circuit when the variable delay circuit is set with a prescribed delay setting value and store the delay setting value in association with the measured delay amount.
US07782063B2 Partial discharge charge quantity measuring method and device
The present invention includes an antenna for measuring an electromagnetic wave radiated from a device to be measured stemming from partial discharge and having sensitivity at least in the UHF band; a filter for extracting a TEM mode component from a measured time waveform; and a measurement device body including a processing section adapted to obtain a second order integral value of the time waveform having undergone the filter processing and obtain a discharge charge quantity from the value. The present invention also comprises an electromagnetic wave radiation simulating apparatus for inputting a pseudo discharge signal to the device to be measured and previously obtaining the relation between the second order integral value and the discharge charge quantity, the processing section obtains the discharge charge quantity from the second order integral value with reference to the previously obtained relation between the second order integral value and the discharge charge quantity.
US07782062B2 Method for locating leaks in pipes
Method for establishing and possibly locating leaks in pipelines (1) for transporting liquid or gaseous media using at least one electrical conductor (2) running along the longitudinal extension of the pipeline (1) from a starting point to an end point. Accordingly, a defined test voltage (Um, UL) is applied between two electrical conductors (2) or between one electrical conductor 92) and the pipeline (1), and the resistance and/or impedance behavior between starting point and end point of the two conductors (2) or the conductor (2) and the pipeline (1) is ascertained with intact pipeline (1), and at later times, the resistance and/or impedance behavior is ascertained at the same test voltages (Um, UL) and compared to the resistance and/or impedance behavior known for the intact pipeline (1), the presence of a leak being thusly ascertained.
US07782057B2 Array coil and magnetic resonance imaging apparatus
An array coil including at least three conductive elements arranged at predetermined intervals, each of the conductive elements being in the form of a loop, and a plurality of switches that enable the conductive elements to be connected together according to a plurality of connecting patterns.
US07782051B2 Geometry based field prediction method for susceptibility mapping and phase artifact removal
The present invention provides a method of handling rapid phase aliasing in magnetic resonance images arising from local magnetic susceptibility differences. The methods of the present invention can be used to estimate the field effects within an object arising from the interfaces of regions having differences in magnetic susceptibilities, and to subtract out the resulting phase from the original or source phase data prior to any further phase processing. The methods of the present invention also include a process of accurately determining the susceptibility values of multiple voxel regions based on the geometry of such regions.
US07782044B2 Cover
The invention relates to a cover for a chamber of a housing of an appliance, said cover comprising an approximately plate-type carrier carrying a network of conductors which is embodied as a pressed screen and provided with a sensor. A plug receiving element for an appliance plug for contacting the network of conductors is provided on the carrier. The pressed screen is supported on the plate-type carrier, held by fixing elements, and covered by a cover connected to the carrier on the peripheral edge thereof.
US07782043B1 Variable bandwidth DC bias for AC measurement system
A method for controlling a measurement system includes providing a variable bandwidth DC bias loop for biasing a DUT; providing an AC measurement loop for measuring AC parameters of the DUT; disabling the AC measurement loop and selecting a high bandwidth for the DC bias loop when rapid changes to the DC bias are to be made; and selecting a low bandwidth for said DC bias loop and enabling the AC measurement loop when AC measurements of the DUT are to be made.
US07782041B1 Linear regulator for use with electronic circuits
A linear regulator is described that includes a mode selection circuit. In one implementation, the mode selection circuit is operable to receive an input voltage and to set an operation mode to one of a first mode or a second mode (e.g., based on a voltage level of the input voltage) so as to generate an output voltage. For example, when the voltage level of the input voltage is within a voltage range, the mode selection circuit can set the first mode as the operation mode to supply the input voltage as the output voltage to a load without voltage regulation. Similarly, when the voltage level of the input voltage is outside the voltage range, the mode selection circuit can set the second mode as the operation mode to regulate the output voltage to the load.
US07782039B1 Mixed mode digital control for switching regulator
A regulated power supply includes an inverter comprising an upper switch and a lower switch that are connected in series. A control module selectively controls the upper switch and the lower switch in one of a pulse width modulation (PWM) mode and a discrete control mode (DCM), receives a feedback signal from an output of the regulated power supply, and switches between the PWM mode and the DCM based on the feedback signal.
US07782038B2 Soft start circuit with slew rate controller for voltage regulators
In one embodiment, a soft start circuit includes a slew rate controller to limit inrush current to a voltage regulator during start up. The output voltage of the regulator may be compared to a previous sampled value to determine the slew rate of the output voltage. The slew rate of the output voltage may be controlled by adjusting the current limit of the regulator. The current limit of the regulator may be adjusted using digital circuits, such as a counter and a digital to analog converter, or analog circuits using a pulsed current source, for example. The slew rate may be controlled to exceed a target slew rate or to stay within a range of slew rate limits.
US07782036B1 Adaptive on-time control for switching regulators
The invention relates to a method and an apparatus for maintaining a substantially constant switching frequency in a relatively fast transient response switching regulator. The apparatus includes a comparison circuit, a one-shot circuit, and a pulse duration controller. The comparison circuit provides a comparison signal to the one-shot circuit based on a comparison of a feedback signal and a reference signal. The one-shot circuit provides a configured duration switch control pulse when the comparison signal is asserted. The pulse duration controller controls the configured duration of the switch control pulse (e.g., duration of a pulse on-time or off-time) to affect the switching frequency of the regulator. In addition, frequency jittering and frequency scaling circuitry may be included.
US07782035B2 Controller and driver communication for switching regulators
Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.
US07782031B2 Power supply control
A method includes simultaneously driving a load via first and second magnetically coupled regulator phases for a first duration, uncoupling one of the phases from the load after the first duration, and, after uncoupling the one phase from the load, allowing a current through the one phase to decay. For example, such a method allows energy stored in the uncoupled phase to be recaptured to the output transient response of a power supply.
US07782025B2 Semiconductor device and power supply device using the same
A semiconductor device capable of reducing an inductance is provided. In the semiconductor device in which a rectification MOSFET, a commutation MOSFET, and a driving IC that drives these MOSFETs are mounted on one package, the rectification MOSFET, a metal plate, and the commutation MOSFET are laminated. A current of a main circuit flows from a back surface of the package to a front surface thereof. The metal plate is connected to an output terminal via a wiring in the package. Wire bondings are used for wirings for connecting the driving IC, the rectification MOSFET, and the commutation MOSFET, all terminals being placed on the same plane. For this reason, the inductance becomes small and also a power source loss and a spike voltage are reduced.
US07782023B2 Multipower voltage regulator
Certain embodiments of the present technology provide voltage regulator-alternator configurations that can distribute loads among a plurality of alternators, and fail-safe mechanisms used in connection with such voltage regulator-alternator configurations. For example, certain embodiments of the present technology provide electrical systems that include voltage regulators with connections over which control signals, which indicate whether a detected voltage is higher or lower than a target voltage, can be transmitted to other voltage regulators and received from other voltage regulators. For example, certain embodiments of the present technology provide voltage regulators that include connections over which control signals can be transmitted to other voltage regulators and received from other voltage regulators. For example, certain embodiments of the present technology provide methods of modifying a basic voltage regulator such that the modified voltage regulator can transmit a control signal to another voltage regulator and receive a control signal from another voltage regulator.
US07782022B2 Input source detection for a battery charger
A system and method for determining if a USB port can source sufficient current to charge a rechargeable battery at a predetermined peak current level. Detection circuitry is disposed between the USB port and the battery. The detection circuitry includes a current source that is controlled to provide to the battery an increasing current that is sourced by the USB port. As the source current is increased from an initial value to a predetermined peak current source value, the output voltage of the USB port is monitored. If the USB port output voltage drops below a specified threshold voltage before the current source has ramped to the peak current source value, the load current is removed from the battery and an indication is provided that the USB port cannot provide the specified current. The detection process is then repeated after a specified delay interval. If the current source ramps up to the peak source current value and the USB port voltage has not decreased below the specified threshold voltage, charging of the rechargeable battery from the USB port continues at the peak source current.
US07782020B1 Operating a non-volatile memory charger
Provided is a method and system for operating a non-volatile memory charger. Specifically, during the operation of a storage system, the non-volatile memory of the storage system can temporarily store data. The temporarily stored data is flushed to disks of the storage system during the normal operation of the storage system. However, if the storage system is inoperable, then the temporarily stored data is maintained for a time period by a rechargeable battery of the non-volatile memory. The rechargeable battery prevents data loss when the temporarily stored data cannot be flushed to the disks of the storage system. The rechargeable battery maintains sufficient voltage levels to continue to temporarily store data by the operation of a charger connected to the rechargeable battery. A charger policy operated by an operating system of the storage system enables and disables the charging of the rechargeable battery.
US07782019B2 Method and apparatus for battery-backed power supply and battery charging
Apparatuses, systems, and methods for providing battery-backed power to movable partitions are disclosed. A power converter generates a DC output from an AC input. The DC output may be selectively decoupled from an enabled DC output such that the DC output can be monitored for acceptable operation in-situ. The enabled DC output may be selectively coupled to a battery output terminal. A charge current may be sensed between the enabled DC output and the battery output to control charging of the battery with a pulse-width modulation operation by controlling the selective coupling of the enabled DC output to the battery output. The enabled DC output and the battery output are coupled in a logical-OR configuration to generate a supply output providing current from the enabled DC output and the battery. The supply output may drive a movable partition controller and a motor configured for opening and closing a movable partition.
US07782018B2 Adaptive current limiting for any power source with output equivalent series resistance
Adaptive current limiting for any power source to limit power drain of one load on the power source to maintain a minimum power source voltage for proper operation of other loads on the power source. For battery applications, such as for flash systems, the invention allows the maximum output current of a boost converter to be utilized without having to calculate the system equivalent series resistance first. The invention also adjusts the current load up or down during a high load event to compensate for changes in other loads. The changes in current load are made in increments, with a hysteresis region avoiding constant up and down incrementing. Various embodiments are disclosed.
US07782012B2 MP3 playing and charging system comprising a docking station having an adapter for installing MP3 and a dynamic speaker
In this present invention, MP3 playing and charging system having an adapter for installing MP3 and dynamic speakers which includes a docking station and two speakers that can be used in attached or separated manner; two speakers that allow variation of speaker direction generating dynamic sound when attached; and a docking station that can be attached and connected to MP3 player with the use of MP3 installing adapter when connecting MP3 to the docking station is provided.
US07782010B2 SMD battery contact module
The production of hearing apparatuses and in particular of hearing devices is to be simplified. To this end, a battery contact module with an electrical contact facility and a plastic frame is proposed, to/in which the contact facility is fastened. In this way, the battery contact module is designed as a SMD component and the contact facility has corresponding connections for a surface mounting on a printed circuit board. An amplifier printed circuit board can herewith be advantageously automatically equipped with the battery contact module and soldered.
US07782003B2 Positional indicia misplacement compensation
Apparatus and method for compensating for positional indicia misplacements in the positioning of a control object, such as with servo seam misplacements on a data storage device storage medium. An actual position for the control object is determined in relation to a corrected commanded position of the control object and a corrected position error of the control object. The corrected commanded position is determined in relation to a gain error and an actual commanded position, and the corrected position error determined in relation to the gain error and an actual position error. Preferably, an actual position error of the control object is next determined in relation to the actual position, and the control object is moved to reduce the actual position error. The positional indicia preferably comprise AB and CD seams of ABCD servo dibit patterns on a recording surface.
US07781999B2 Power source apparatus for vehicle, vehicle and method of controlling power source apparatus
A vehicle (100) includes a motor generator (MG) and an inverter (14) driving the motor generator (MG). A power source apparatus for the vehicle includes a battery (B) as an electric storage device, a step-up converter (12) stepping up a voltage of the electric storage device and supplying it to the inverter, and a controller (30) indicating a target step-up voltage in accordance with a target state of operation of the motor generator (MG) to the step-up converter (12). If it is determined that a current operation state signal of the motor generator (MG) is abnormal, the controller (30) increases the target step-up voltage to a maximum value. Preferably, the vehicle (100) further includes a resolver (20) detecting rotation speed of a rotor of motor generator (MG). The controller (30) determines that the operation state signal is abnormal if an output of the resolver (20) does not satisfy a prescribed condition.
US07781994B2 Method and circuit for regulating the speed of a commutator series-wound motor
The invention relates to a method and a circuit for regulating the speed of a commutator series-wound motor, especially a universal motor (10), which is supplied with a current from an a.c. voltage source (22) by means of a semiconductor switching element (18) mounted in series with an armature winding (12) and a field winding (14, 16) and controlled by a control unit (28) according to a nominal speed value. The control unit (28) receives, as input signals, signals corresponding to the total voltage drop (Umot) when the motor (10) is supplied with a current, and a substitute signal for the intensity of the motor current (I), corresponding to the voltage drop (Ua, Ufa) on the armature (12) alone or on the armature (12) and on a part (14) of the field winding (14, 16). The input signals of the control unit (28) are compared with motor-typical characteristic lines of the voltages on the excitation field (14) and/or on the armature, stored in the control unit, and control signals for the semiconductor switching element are formed from the deviations.
US07781986B2 Inverter with adjustable resonance gain
The present invention includes a PWM unit, a switch unit, a resonance unit, a transformer, a feedback unit and a frequency control unit, wherein the switch unit obtains a DC power from a power source, the PWM unit produces a working cycle signal to drive the switch unit to convert the DC power into a pulse power and the resonance unit converts the pulse power into a driving power for providing to the transformer to convert thereof into an output power, characterized in that when the resonance unit is under a starting frequency and a working frequency higher than the starting voltage, a starting voltage gain and a working voltage gain respectively corresponding thereto are produced, wherein the starting voltage gain is larger than the working voltage gain, so that the larger starting voltage gain can produce the output power with higher voltage to smoothly initiate the lamp tube set.
US07781985B2 Constant current driver circuit with voltage compensated current sense mirror
A current sensing circuit for sensing the current provided to LEDs by a constant current power source includes a resistive shunt in series with the load and a current mirror having a first leg connected to a first terminal of the resistive shunt and a second leg connected to a second terminal of the resistive shunt. Both legs of the current mirror are also connected to ground. The first leg provides a reference signal to the second leg, and the second log uses the reference signal and a voltage at the second terminal of the resistive shunt to provide a ground referenced output signal indicative of the current provided to the LEDs.
US07781979B2 Methods and apparatus for controlling series-connected LEDs
Methods and apparatus for controlling series-connected LEDs. Two or more LEDs are connected in series between a first node and a second node, wherein a series current flows between the nodes when an operating voltage is applied across the nodes. One or more controllable current paths are connected in parallel with at least a first LED for at least partially diverting the series current around at least the first LED. A controller monitors at least one parameter representative of the operating voltage, determines a maximum number of the series-connected LEDs that can be energized by the operating voltage, and controls the controllable current path(s) so as to increase an amount of the series current that is diverted around at least the first LED when the maximum number is less than a total number of all of the LEDs connected in series. In one example, the foregoing may be implemented as an integrated circuit package to provide a lighting apparatus suitable for automotive applications.
US07781973B2 Plasma display panel having laminated members and visible light reflection layer
A plasma display panel has plural discharge cells between two opposing first and second substrates. Each of the discharge cells includes at least one pair of electrodes for generating a discharge for display, a discharge gas and a phosphor film for emitting visible light by being excited by ultraviolet rays produced by the discharge of the discharge gas. Laminated members are dispersed in a plane within each of the discharge cells inside the first substrate from which visible light for display is emitted, and each of the laminated members includes a light absorption layer disposed on a side of the first substrate on which ambient light is incident and a light reflection layer disposed on a phosphor-film side of the laminated members. A visible-light-reflection layer is disposed on a surface of the phosphor film on a side thereof opposite from a space in which the discharge is generated.
US07781971B2 Conductive composition for black bus electrode, and front panel of plasma display panel
The black bus electrode of plasma display panel is formed from a conductive composition comprising a conductive powder, glass powder, organic binder, organic solvent, and black pigment, wherein the conductive powder comprises an alloy of at least two metals selected from the group of Ru, Rh, Pd, Ag, Os, Ir, Pt and Au.
US07781966B2 Electroluminescent display
An EL display, including a substrate having a pixel region and a non-pixel region, at least one light emitting diode disposed on the pixel region of the substrate, a sealant disposed on the non-pixel region of the substrate, an oxygen generating layer, an absorbent layer laminated onto the oxygen generating layer, and a cap adhered to the sealant, such that the at least one light emitting diode, the oxygen generating layer, and the absorbent layer are enclosed between the cap and the substrate.
US07781962B2 Organic light-emitting devices and displays including a polarization separator, a phase plate, and a polarizer
Light-emitting devices (24) and light-emitting displays (1) for realizing bright display by allowing light emitted from an emissive layer (100) to efficiently contribute to a display. Polarization separators (500) are arranged between the emissive layer (100) and a phase plate (700). In the light of a wavelength range which includes a part or all of a light-emission wavelength range of the emissive layer and is narrower than a visible wavelength range and is directed from the emissive layer side to the polarization separators side, the polarization separators (500) reflect circularly polarized light components which are converted into linearly polarized light that is absorbed by the polarizer (600) due to the operation of the phase plate and transmit the other light.
US07781960B2 Metal complex compound and organic electroluminescent element using the same
The present invention provides a novel metal complex compound represented by the following general formula (1), and an organic electroluminescence element which has a high efficiency of light emission and a long lifetime, wherein one of organic thin film layers including at least a light emitting layer between an anode and a cathode, at least one of the organic thin film layers contains the metal complex compounds. (L1)mM(L2)n  (1) wherein M represents Ir, Pt and Rh; L1 and L2 represents mutually different bidentate ligands; (L1)mM as a partial structure is represented by general formula (2) and M(L2)n as a partial structure is represented by general formula (3): and m and n are each an integer of 1 or 2, provided that m+n is a integer of 2 or 3. wherein ring A1 represents an aromatic hetrocyclic ring group; and ring B1 represents an aryl group, provided that the ring A1 and the ring B1 are covalently linked to each other via Z which represents a single bond or the like. wherein R1, R2, R2′ and R3 each independently represent an alkyl group or the like; R1 and R2, R1 and R2′, R2 and R2′, R2 and R3, and R2′ and R3 may combine with each other to form a cyclic structure; and Y represents a group represented by O or S.
US07781959B2 Organic electroluminescent device and production method thereof
A smooth intermediate film layer having a thickness of 0.2 to 30 nm, little protrusions and a surface layer having high adhesiveness with the light-emitting layer is provided with accuracy on an anode constituting an organic electroluminescent device comprising a light-emitting compound layer present between an anode and a cathode. After the intermediate film layer is formed on the anode surface using a dry processing method by radio frequency plasma treatment or a wet processing method by a spin coating method and the like, preferably it is subjected to optimization treatment (washing) to adjust the smoothness, adhesiveness and thickness of the film. When the wet processing method is used, a surface treatment of the anode is preferably to be performed furthermore before forming the film to control the smoothness and surface conditions. Performing the treatment before and after forming the intermediate layer enables to control the thickness, smoothness and adhesiveness of the film and to obtain an organic electroluminescent device having high emission efficiency and long device life.
US07781957B2 Electro-luminescent device with improved efficiency
An electro-luminescent device has an array of light-emitting elements, including a near white light-emitting element. The near white light-emitting element includes an inorganic light-emitting layer of quantum dots, spaced between a pair of electrodes. The light-emitting layer produces a spectrum of light having at least a bimodal distribution of wavelengths.
US07781955B2 Image display device
There is provided an image display device which can prevent a charge-up occurring on the surface of an insulation substrate with a simple constitution even if any antistatic film is not provided. In the image display device which includes an electron-emitting device on an insulation layer on the substrate, there is provided a conductive layer which is an orthogonal projection region of an anode electrode and includes a predetermined metal kind directly below an exposed surface of the insulation layer.
US07781950B2 Field emission element having carbon nanotube and manufacturing method thereof
A field emission element includes one supporting wire and at least one field emission layer coated or otherwise formed on an outer surface of the supporting wire. Each field emission layer includes a plurality of carbon nanotubes (CNTs) and is selected from a group consisting of CNT-polymer composites, CNT-glass composites and single-layer/multi-layer CNT films. A method for manufacturing the described field emission element is also provided. The method includes the steps of: (a) providing one supporting wire; (b) forming at least one field emission layer on an outer surface of the supporting wire; and (c) cutting the supporting wire, after forming the at least one field emission layer thereon, according to a predetermined length and then treating the at least one field emission layer on the supporting wire to form the field emission element.
US07781948B2 Light source device including a gas discharge tube, a housing, and an insulating socket member
The present invention relates to a light source apparatus with a structure that improves the positioning precision of a gas discharge tube and facilitates gas discharge tube maintenance work. The light source apparatus has a lamp container housing the gas discharge tube, and an insulating socket member that is fixed in a state of being positioned with respect to the lamp container and that is housed in the lamp container together with the gas discharge tube. The insulating socket member has a plane contacting portion put in plane contact with a stem portion of the gas discharge tube, and a pin socket member into which at least one of stem pins, held in the stem portion is inserted in an electrically contacting state. By the corresponding stem pin being inserted in the pin socket member, the gas discharge tube is fixed in a manner enabling attachment and detachment with respect to the insulating socket member, and the precision of positioning of the gas discharge tube with respect to the lamp container is thereby improved dramatically. Also, because the insulating socket member fixes the gas discharge tube in a detachable state, detachment of the gas discharge tube is facilitated and consequently, exchange of the gas discharge tube and other maintenance work are facilitated.
US07781946B2 Piezoelectric element, ink jet recording head and ink jet printer
A piezoelectric element includes: a base substrate; a lower electrode formed above the base substrate; a ferroelectric layer formed above the lower electrode; and an upper electrode formed above the ferroelectric layer, wherein an angle of a corner defined by a side surface of the ferroelectric layer and a top surface of the base substrate is between 45° and 75°.
US07781944B2 Electrical generator
An electrical generator includes a passageway having an input port and at least one output port and at least one resonator for converting acoustic vibrations established in the passageway into mechanical vibrations of the resonator. The resonator is oriented adjacent at least one output port. A mechanical-to-electrical transducer is coupled to the resonator for generating electricity in response to the mechanical vibrations.
US07781943B1 Capacitive discharge energy harvesting converter
An energy harvesting circuit includes a device for converting mechanical energy into electrical energy, a solid state voltage dependent switch, and an inductor. The piezoelectric device, the solid state voltage dependent switch, and the inductor are all connected in series. The solid state voltage dependent switch has a first threshold The solid state voltage dependent switch remains open until voltage applied across the solid state voltage dependent switch by the device reaches the first threshold. When the voltage applied across the solid state voltage dependent switch reaches the first threshold the solid state voltage dependent switch closes so charge from the device flows through the switch and through the inductor.
US07781937B2 Piezoelectric generator system that includes an energy storage
A device for producing electric energy including a first element converting mechanical energy into electric energy. The level of the electric energy is variable according to the variations of the mechanical energy. A controller block is connected to the first element for providing measurement data on the basis of the electric energy produced by the first element. The controller block includes a detector block to examine the electric energy produced by the first element to form the measurement data. A first energy storage unit stores electric energy produced by the first element and provides the electric energy for the operation of the controller block. Also, a system, a tire and a method.
US07781936B2 Surface acoustic wave device having gap between surface acoustic wave filters covered by sealer
A surface acoustic wave device includes a base substrate, first and second surface acoustic wave filters mounted on a surface of the base substrate, and a sealer provided on the surface of the base substrate and covering the first and second surface acoustic wave filters. The first and second surface acoustic wave filters include first and second piezoelectric substrates. The second piezoelectric substrate is located away from the first piezoelectric substrate via a gap. This surface acoustic wave device reduces inter-modulation.
US07781929B1 Shaped fluid dynamic bearing for a hard disk drive
A system is provided that increases the spindle stiffness of a disk drive while optimizing power consumption. A multipurpose bearing provides axial stiffness and enhanced stiffness against radial and pitch loads applied to the spindle. When used in combination with a journal bearing, conventional thrust bearings may be eliminated without sacrificing overall stiffness. As a result, the height of the disk drive may be reduced, thereby making the system desirable to be used in smaller electronic devices.
US07781927B2 Vibration motor
A vibration motor is provided, comprising a case having an upper case and a lower case which are coupled to each other; a shaft installed in the case while being supported by the case; a rotor rotatably coupled with the shaft; a stator arranged around the shaft; a first substrate installed on an upper surface of the lower case; and a second substrate coupled to a lower surface of the lower case and electrically connected to the first substrate. The lower case has a first opening and the first substrate is electrically connected to the second substrate through the first opening.
US07781924B2 Electromagnetic driving apparatus
A drive apparatus which is small in size, short in axial length, low in cost, and high in output. A stepping motor as the driving apparatus includes a first coil, a second coil, a magnet, and a rotor comprised of a core and a rotary shaft. First through fourth outer magnetic pole portions are opposed to the outer peripheral surface of the magnet with a predetermined gap between them. The first and the second coils are disposed adjacent to the magnet in an axial direction of the rotary shaft and disposed at respective ends of the rotary shaft. The first and second outer magnetic pole portions are inserted inside the first and second coils, respectively. As viewed in the circumferential direction of the magnet, the third and fourth outer magnetic pole portions are disposed close to the first and second outer magnetic pole portions, respectively.
US07781920B2 Push-on/push-off power-switching circuit
An electrical power-switching circuit controls power to an electronic device. In some embodiments, the circuit consists of only transistors, resistors, and capacitors, making it small, low cost, and functional over a wide range of supply voltages. The circuit may be switched on and off by a momentary-contact switch. The circuit can be constructed so that, except for transistor leakage current, no power is consumed in the off state, and the controlled device can shut off its own power.
US07781919B2 Method of controlling a load control module as part of a startup sequence
Power distribution systems that have a limited peak power capability or a high source impedance, such as site supply generators, are often susceptible to abnormal operation in response to the current drawn at power up from the loads connected to the power distribution system. The present invention provides a load control module for a lighting control system operable to start up a plurality of the lighting loads in sequence to reduce stress on the power distribution system. The lighting loads are each turned on as part of a startup sequence at predetermined times after an output voltage of the power distribution system has stabilized. The lighting control module is operable to wait for a predetermined amount of time for the startup sequence to begin before turning on the lighting loads.
US07781918B2 Electrical switching circuit
Electrical switch circuitry including a relay with contacts and a transistor. A control circuit switches the transistor ON in response to a voltage difference across the relay contacts reaching a predetermined value, such that in use, electrical current is caused to flow through the transistor while the electrical contacts of the relay are closing or opening. This reduces electrical arcing across the contacts of the relay.
US07781915B2 Apparatus and method for remotely powering a data acquisition or utilization device
Apparatus for delivering operating power from a data terminus to a utilization device includes a first data connection connecting the data terminus to a data repeater station and a second data connection connecting the data repeater station to the utilization device. A first power sourcing equipment delivers DC operating power to the data repeater station over a physical layer of the first data connection. A second power sourcing equipment at the repeater station receives operating power over the physical layer of the first data connection and delivers operating power over a physical layer of the second data connection to the utilization device.
US07781912B2 Uninterruptible power supply with opto-electric couplers for detecting the status of each source
A system, method and device for power switching and power control, particularly for switching the source of power between two or more power sources are provided. Power control elements testing the availability and stability of alternate power sources and switch loads between these power sources in short periods of time and with advantageous switching characteristics. In a fuel-cell system, the embodiments of the invention may be advantageously deployed to power up balance of plant loads using opto-electronic couplers and electronic relays.
US07781909B2 Control circuit of power supply, power supply and control method thereof
It is intended to provide a control circuit of power supply, a power supply and a control method thereof capable of achieving power saving in an integrated circuit and reducing a delay time of the integrated circuit. The control circuit 50 of a power supply 10 which outputs plural DC voltages VCC, VBGP, VBGN each having a different voltage value includes a voltage changing portion SW1 which detects an output current I1 relating to a first DC voltage VCC which is one of the plural DC voltages and sets at least one DC voltage except the first DC voltage VCC based on the detected output current I1, and the like.
US07781905B2 Turbulence reduction around magnus rotors
A fluid energy conversion system using a Magnus Rotor to generate force and electrical power from passing fluid such as wind. A Magnus Rotor is mounted atop support structure which is far enough away from the surface of the Rotor to minimize fluid turbulence around the peripheral surfaces of the Rotor. The Rotor is mounted on a long horizontal shaft supported by a divided pole on either end. This divided pole is mounted on a pivot so the Magnus Rotor will be faced to the oncoming fluid by a weathervane. Minimizing fluid turbulence can result in greater power production.
US07781904B2 Method and system for managing an electrical output of a turbogenerator
The system and method manages an electrical output of a turbogenerator in accordance with multiple modes. In a first mode, a direct current (DC) bus receives power from a turbogenerator output via a rectifier where turbogenerator revolutions per unit time (e.g., revolutions per minute (RPM)) or an electrical output level of a turbogenerator output meet or exceed a minimum threshold. In a second mode, if the turbogenerator revolutions per unit time or electrical output level of a turbogenerator output are less than the minimum threshold, the electric drive motor or a generator mechanically powered by the engine provides electrical energy to the direct current bus.
US07781903B2 Wave energy converter with air compression (WECWAC)
A wave energy converter with air compression (WECWAC) includes a cylinder and a piston located within the cylinder dividing the cylinder into an upper chamber and a lower chamber. The cylinder is fixedly attached to a spar whose up/down (heave) motion is restrained. The piston is fixedly attached to, and driven by, a float which moves generally in phase with the waves. Under typical wave conditions the piston functions to compress air within the upper chamber on its up stroke and within the lower chamber on its down stroke, i. e., the system is thus double-acting. In still water, the spar and cylinder combination is designed to drift down into the body of water relative to the piston whereby the size/volume of the upper chamber is decreased (while that of the lower chamber is increased). For small amplitude waves the piston continues to compress air in the upper chamber and this asymmetrical compression continues until the waves reach a predetermine level when “double-action” is resumed. Controlling the position of the cylinder relative to the piston enables the WECWAC to automatically regulate its compression ‘stroke’ to suit varying wave conditions. The pressurized air from a WECWAC may be stored and/or processed to drive a turbo-generator or it may be combined with the outputs of other WECWACs to drive a single large and highly efficient turbo-generator.
US07781902B2 Generator systems and methods
A generator set. In one embodiment, the generator set includes an internal combustion engine, a DC generator, one or more battery cells, and an inverter. The DC generator is coupled to the engine and produces direct current (“DC”) electricity. The battery cells discharge stored DC electricity and can be recharged using DC electricity from the DC generator. The inverter is electrically connected to the DC generator and to the battery cells. The inverter converts DC electricity produced by the DC generator and DC electricity discharged from the one or more battery cells to alternating current (“AC”) electricity. The AC electricity is available for use by a load.
US07781899B2 Leadframe having mold lock vent
A leadframe for supporting a semiconductor chip, the leadframe including a die pad having a first major surface and an opposing second major surface defining a thickness and having at least one perimeter edge, and an opening spaced from the at least one perimeter edge and extending through the thickness of the die pad between the first and second major surfaces. A vent extends from the at least one perimeter edge to the opening so that the opening is in communication with the at least one perimeter edge.
US07781895B2 Via electromigration improvement by changing the via bottom geometric profile
An integration approach to improve electromigration resistance in a semiconductor device is described. A via hole is formed in a stack that includes an upper dielectric layer, a middle TiN ARC, and a lower first metal layer and is filled with a conformal diffusion barrier layer and a second metal layer. A key feature is that the etch process can be selected to vary the shape and location of the via bottom. A round or partially rounded bottom is formed in the first metal layer to reduce mechanical stress near the diffusion barrier layer. On the other hand, a flat bottom which stops on or in the TiN ARC is selected when exposure of the first metal layer to subsequent processing steps is a primary concern. Electromigration resistance is found to be lower than for a via structure with a flat bottom formed in a first metal layer.
US07781894B2 Semiconductor device and manufacturing method of same
The characteristic of the semiconductor device of this invention is that the device has a piercing hole 10 formed in the semiconductor layer to touch a first metal film 18, a insulating film 12 formed on the side wall of the piercing hole 10, a second metal film 13 disposed on the first metal film 18 at the bottom of the piercing hole 10 where the insulating film 12 has not been formed and on the semiconductor layer, a barrier metal film 14 formed on the insulating film 12 in the piercing hole 10 and on the first metal film 18, and a wiring layer 15 formed inside the piercing hole 10 through the barrier metal film 14.
US07781892B2 Interconnect structure and method of fabricating same
An improved interconnect structure and method of making such a device. The improved interconnect electrically connects two otherwise separate areas on a semiconductor wafer. The interconnect preferably uses a copper conductor disposed within a trench and via structure formed in a low-k hybrid dielectric layer using a dual damascene process. Each contact region is served by a plurality of vias, each in communication with the trench conductor portion. The entry from the trench to the via is rounded for at least one and preferably all of the via structures.
US07781891B2 Switching element and reconfigurable logic integrated circuit
A switching element is of a configuration that includes: an ion conduction layer (40) for conducting metal ions, a first electrode (21) and a second electrode (31) provided in contact with the ion conduction layer, a third electrode (35) that can supply metal ions to the ion conduction layer, and a diffusion prevention layer (90) provided between the ion conduction layer (40) and the third electrode (35) for preventing the diffusion of metal ions from the third electrode (35) to the ion conduction layer (40). By adopting this configuration, the set state of a switch can be maintained with greater stability.
US07781888B2 Surface mounting electronic component and manufacturing method thereof
The electric component includes at least a set of electrode terminals 2, 3, a semiconductor element 4 electrically connected with the set of electrode terminals, and a package 6 made of synthetic resin and sealing the electrode terminals and the semiconductor element with part of a lower surface of each of the electrode terminals exposed at a lower surface of the package. A cover layer 11 made of synthetic resin is formed to cover a cut surface of a tip of a connector lead remainder extending integrally outward from the each of the electrode terminals. Thus, disadvantages resulting from exposure of the cut surface of the tip of the connector lead remainder are eliminated.
US07781886B2 Electronic chip contact structure
A chip contact functionally having an IC pad, a barrier layer over the IC pad, and a malleable material over the barrier layer. An alternative chip contact functionally having an IC pad, a barrier layer over the IC pad, and a rigid material over the barrier layer.
US07781884B2 Method of fabrication of on-chip heat pipes and ancillary heat transfer components
The density of components in integrated circuits (ICs) is increasing with time. The density of heat generated by the components is similarly increasing. Maintaining the temperature of the components at reliable operating levels requires increased thermal transfer rates from the components to the IC package exterior. Dielectric materials used in interconnect regions have lower thermal conductivity than silicon dioxide. This invention comprises a heat pipe located in the interconnect region of an IC to transfer heat generated by components in the IC substrate to metal plugs located on the top surface of the IC, where the heat is easily conducted to the exterior of the IC package. Refinements such as a wicking liner or reticulated inner surface will increase the thermal transfer efficiency of the heat pipe. Strengthening elements in the interior of the heat pipe will provide robustness to mechanical stress during IC manufacture.
US07781883B2 Electronic package with a thermal interposer and method of manufacturing the same
An electronic package includes a die including a thermal interface material through which a primary heat flux path is enabled for conducting heat from the die, an organic substrate, and a thermal interposer provided between the organic substrate and the die, the thermal interposer having an area extending beyond a footprint of the die, the area including the thermal interface material, the thermal interposer conducting heat generated by the die through the thermal interface material such that an auxiliary heat flux path for conducting heat generated in the die is enabled.
US07781876B2 Curing layers of a semiconductor product using electromagnetic fields
A semiconductor product including a substrate, a semiconductor chip fitted to the substrate, and a layer, which contains coated particles, located adjacent to the semiconductor chip, wherein the coated particles have a ferromagnetic, ferrimagnetic or paramagnetic core and a coating.
US07781875B2 Techniques for packaging multiple device components
Techniques for fabricating multiple device components. Specifically, techniques for fabricating a stacked package comprising at least one I/C module and a multi-chip package. The multi-chip package includes a plurality of integrated circuit dices coupled to a carrier. The dice are encapsulated such that conductive elements are exposed through the encapsulant. The conductive elements are electrically coupled to the chips. The I/C module comprises an interposer having a plurality of integrated circuit dice disposed thereon. The dice of the I/C module are electrically coupled to the interposer via bondwires. The interposer is configured such that vias are aligned with the conductive elements on the multi-chip package. The multi-chip package and I/C module may be fabricated separately and subsequently coupled together to form a stacked package.
US07781869B2 Semiconductor device having rectifying action
A semiconductor device including a base layer of a first conductivity type having a first main surface and a second main surface opposite the first main surface, a first main electrode layer connected to the first main surface, control regions arranged inside grooves penetrating the first main electrode layer and reach inside the base layer, and a second main electrode layer of the first conductivity type and connected to the second main surface.
US07781868B2 Semiconductor components having through interconnects and backside redistribution conductors
A semiconductor component includes a semiconductor substrate having a circuit side with integrated circuits and substrate contacts and a back side, a plurality of through interconnects in the substrate, and redistribution conductors on the back side of the substrate. Each through interconnect includes a via aligned with a substrate contact, and a conductive layer at least partially lining the via in physical and electrical contact with the substrate contact. Each redistribution conductor is formed by a portion of the conductive layer. A system includes a supporting substrate and at least one semiconductor substrate having the through interconnects and the redistribution conductors.
US07781866B2 Gallium nitride-based semiconductor stacked structure, method for fabrication thereof, gallium nitride-based semiconductor device and lamp using the device
A gallium nitride-based semiconductor stacked structure includes a single crystal substrate, a low-temperature buffer layer grown at a low temperature in a region contiguous to the single crystal substrate and a gallium nitride-based semiconductor layer overlying the low-temperature buffer layer. The low-temperature buffer layer possesses therein a single crystal layer formed of a hexagonal AlXGaγN-based Group III nitride material containing gallium predominantly over aluminum, wherein 0.5<γ≦1 and X+γ=1. The single crystal layer has crystal defects at a smaller density on a (10-10) crystal face than on a (11-20) crystal face. A method for production of the gallium nitride-based semiconductor stacked structure is also disclosed.
US07781865B2 MIM capacitor and metal interconnection
Disclosed are an MIM (Metal-Insulator-Metal) capacitor and a method of manufacturing the same. The MIM capacitor includes: a lower metal layer and a lower metal interconnection on a substrate; a barrier metal layer on the lower metal layer; an insulating layer on the barrier metal layer; an upper metal layer on the insulating layer; an interlayer dielectric layer having a via hole on the lower metal interconnection; and a plug in the via hole.
US07781864B2 Capacitor of semiconductor device and method for manufacturing the same
A capacitor includes a first lower metal layer and an insulating layer on a lower interlayer dielectric layer of a semiconductor substrate; a first upper metal layer aligned on the insulating layer to partially expose it; a first capping layer and an upper interlayer dielectric layer on the insulating layer including the first upper metal layer; a second lower metal layer connected to the first upper metal layer through the upper interlayer dielectric layer and the first capping layer; a second capping layer aligned on the upper interlayer dielectric layer including the second lower metal layer and formed with a hole for partially exposing the second lower metal layer; a pad aligned on the second capping layer and connected to the second lower metal layer; a protective layer on the second capping layer; and a second upper metal layer aligned on the second capping layer.
US07781861B2 Semiconductor device
By stably separating a melting location of a fuse (3) from conductive layers (5A, 5B), reliable melting of the fuse (3) is enabled. A fuse (3) including a fuse body (3A) and two pads (3Ba, 3Bb) connected by this and two conductive layers (5A, 5B) individually connected to the two pads (3Ba, 3Bb) are formed in a multilayer structure on a semiconductor substrate (1). A length of the fuse body (3A) is defined so that the melting location of the fuse (3) becomes positioned in the fuse body (3A) away from the region overlapped on the conductive layer (5A or 5B) when an electrical stress is applied between two conductive layers (5A, 5B) and the fuse (3) is melted.
US07781859B2 Schottky diode structures having deep wells for improving breakdown voltages
An integrated circuit structure includes a semiconductor substrate; a well region of a first conductivity type over the semiconductor substrate; a metal-containing layer on the well region, wherein the metal-containing layer and the well region form a Schottky barrier; an isolation region encircling the metal-containing layer; and a deep-well region of a second conductivity type opposite the first conductivity type under the metal-containing layer. The deep-well region has at least a portion vertically overlapping a portion of the metal-containing layer. The deep-well region is vertically spaced apart from the isolation region and the metal-containing layer by the well region.
US07781855B2 Optical device
An optical device includes a metal film that has a first plane and a second plane electrically connected to the first plane. For example, the second plane is integrally formed with the first plane. The second plane is arranged at an obtuse angle θ (90°<θ<180°) with respect to the first plane. An optical semiconductor chip is mounted on the second plane of the metal film, and a light-transmitting sealing material seals the optical semiconductor chip. The light-transmitting sealing material has the metal film provided on a surface thereof.
US07781852B1 Membrane die attach circuit element package and method therefor
A circuit element package has a substrate having a plurality of electrically conductive patterns, a die pad, and an access hole formed through the die pad and substrate. A plurality of leads is coupled to the substrate. A circuit element die is attached to the die pad wherein a first sensor port is positioned over the access hole. A die attach membrane is provided for attaching the circuit element die to the die pad. The die attach membrane allows the circuit element die to sense ambient while protecting the circuit element die from environmental damage. An encapsulant is used for covering portions of the circuit element die.
US07781847B2 Device patterned with sub-lithographic features with variable widths
A method of processing a substrate of a device comprises the as following steps. Form a cap layer over the substrate. Form a dummy layer over the cap layer, the cap layer having a top surface. Etch the dummy layer forming patterned dummy elements of variable widths and exposing sidewalls of the dummy elements and portions of the top surface of the cap layer aside from the dummy elements. Deposit a spacer layer over the device covering the patterned dummy elements and exposed surfaces of the cap layer. Etch back the spacer layer forming sidewall spacers aside from the sidewalls of the patterned dummy elements spaced above a minimum spacing and forming super-wide spacers between sidewalls of the patterned dummy elements spaced less than the minimum spacing. Strip the patterned dummy elements. Expose portions of the substrate aside from the sidewall spacers. Pattern exposed portions of the substrate by etching into the substrate.
US07781843B1 Integrating high-voltage CMOS devices with low-voltage CMOS
High-voltage CMOS devices and low-voltage CMOS devices are integrated on a common substrate by forming a sacrificial film over at least active device areas, lithographically defining device active regions of the high-voltage CMOS devices, implanting dopants selectively through the sacrificial film into the lithographically defined device active regions of the high-voltage CMOS devices, diffusing the implanted dopants, removing the sacrificial film, and subsequently forming low-voltage CMOS devices.
US07781842B2 Semiconductor device and method for producing it
A semiconductor device which has a semiconductor body and a method for producing it. At the semiconductor body, a first electrode which is electrically connected to a first near-surface zone of the semiconductor body and a second electrode which is electrically connected to a second zone of the semiconductor body are arranged. A drift section is arranged between the first and the second electrode. In the drift section, a coupling structure is provided for at least one field plate arranged in the drift section. The coupling structure has a floating first area doped complementarily to the drift section and a second area arranged in the first area. The second area forms a locally limited punch-through effect or an ohmic contact to the drift section, and the field plate is electrically connected at least to the second area.
US07781839B2 Structure and method for strained transistor directly on insulator
A semiconductor device (10) comprising a substrate (12) and an oxide layer (14) formed over the substrate is provided. The semiconductor device further includes a first semiconductor layer (16) having a first lattice constant formed directly over the oxide layer. The semiconductor device further includes a second semiconductor layer (26) having a second lattice constant formed directly over the first semiconductor layer, wherein the second lattice constant is different from the first lattice constant.
US07781831B2 Semiconductor device having nitridated oxide layer and method therefor
A semiconductor device includes a substrate (12), a first insulating layer (14) over a surface of the substrate (12), a layer of nanocrystals (13) over a surface of the first insulating layer (14), a second insulating layer (15) over the layer of nanocrystals (13). A nitriding ambient is applied to the second insulating layer (15) to form a barrier to further oxidation when a third insulating layer (22) is formed over the substrate (12). The nitridation of the second insulating layer (15) prevents oxidation or shrinkage of the nanocrystals and an increase in the thickness of the first insulating layer 14 without adding complexity to the process flow for manufacturing the semiconductor device (10).
US07781830B2 Recessed channel transistor and method for preparing the same
A recessed channel transistor comprises a semiconductor substrate having a trench isolation structure, a gate structure having a lower block in the semiconductor substrate and an upper block on the semiconductor substrate, two doped regions positioned at two sides of the upper block and above the lower block, and an insulation spacer positioned at a sidewall of the upper block and having a bottom end sandwiched between the upper block and the doped regions. In particular, the two doped regions serves as the source and drain regions, respectively, and the lower block of the gate structure serves as the recessed gate of the recessed channel transistor.
US07781824B2 Memory cell of nonvolatile semiconductor memory
A memory cell of a nonvolatile semiconductor memory includes a first insulating film whose principal constituent elements are Si, O and N, a charge storage layer whose principal constituent elements are Hf, O and N, formed on the first insulating film, a second insulating film having dielectric constant higher than that of the first insulating film and formed on the charge storage layer, and a control gate electrode formed on the second insulating film. Relation between a composition of the first insulating film and a composition of the charge storage layer is determined under the conditions that (A) a valence band offset of the first insulating film is larger than a valence band offset of the charge storage layer, and (B) a trap energy level of electrons due to oxygen vacancies in the charge storage layer exists within a band gap of the charge storage layer.
US07781820B2 Semiconductor memory device and method of manufacturing the same
The semiconductor memory device includes: an interlayer insulating film that is formed on a semiconductor substrate; an insulating film that is formed on the interlayer insulating film and has a cylinder hole; and a capacitor that has an impurity-containing silicon film, a lower metal electrode, a capacitive insulating film and an upper electrode, which are formed so as to cover a bottom and a side of the cylinder hole, wherein the cylinder hole extends through the insulating film so as to expose an end side of the contact plug, the end side facing opposite from the source electrode; and the impurity-containing silicon film has a silicide layer near an interface between the impurity-containing silicon film and the lower metal electrode, the silicide layer being produced by a reaction of impurity-containing silicon included in the impurity-containing silicon film with metal included in the lower metal electrode.
US07781818B2 Semiconductor constructions containing tubular capacitor storage nodes, and retaining structures along portions of the tubular capacitor storage nodes
The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage node material within openings in an insulative material to form conductive containers. A retaining structure lattice is formed in physical contact with at least some of the containers, and subsequently the insulative material is removed to expose outer surfaces of the containers. The retaining structure can alleviate toppling or other loss of structural integrity of the container structures. The electrically conductive containers correspond to first capacitor electrodes. After the outer sidewalls of the containers are exposed, dielectric material is formed within the containers and along the exposed outer sidewalls. Subsequently, a second capacitor electrode is formed over the dielectric material. The first and second capacitor electrodes, together with the dielectric material, form a plurality of capacitor devices.
US07781815B2 Thin-film element, display device and memory cell using the thin-film element, and their fabrication methods
Pixel auxiliary capacitors (10) and pixel TFTs, which are thin-film elements, are formed on a substrate a lower electrode (Si) (3), insulating film, and an upper electrode (GE) (5) in this order. Each upper electrode (GE) (5) opposing to the corresponding lower electrode (Si) (3) is entirely enclosed within the outline of the lower electrode (Si) (3) in a plane view. Thus, it is possible to provide thin-film elements, which are not affected by edges of the lower electrode (Si) (3), a display device and a memory cell using the thin-film elements, and their fabrication methods.
US07781810B1 Germanium MOSFET devices and methods for making same
A device includes a fin, a first gate and a second gate. The first gate is formed adjacent a first side of the fin and includes a first layer of material having a first thickness and having an upper surface that is substantially co-planar with an upper surface of the fin. The second gate is formed adjacent a second side of the fin opposite the first side and includes a second layer of material having a second thickness and having an upper surface that is substantially co-planar with the upper surface of the fin, where the first thickness and the second thickness are substantially equal to a height of the fin.
US07781804B2 Non-volatile memory
A non-volatile memory disposed on a substrate includes active regions, a memory array, and contacts. The active regions defined by isolation structures disposed in the substrate are extended in a first direction. The memory array is disposed on the substrate and includes memory cell columns, control gate lines and select gate lines. Each of the memory cell columns includes memory cells connected to one another in series and a source/drain region disposed in the substrate outside the memory cells. The contacts are disposed on the substrate at a side of the memory array and arranged along a second direction. The second direction crosses over the first direction. Each of the contacts extends across the isolation structures and connects the source/drain regions in the substrate at every two of the adjacent active regions.
US07781794B2 Resin sheet for encapsulating optical semiconductor element and optical semiconductor device
The present invention provides a resin sheet for encapsulating an optical semiconductor element, the resin sheet containing an encapsulation resin layer, an adhesive resin layer, a metal layer and a protective resin layer, in which the encapsulation resin layer and the metal layer adhered onto the adhesive resin layer are disposed adjacently to each other, the protective resin layer is laminated on the encapsulation resin layer and the metal layer so as to cover both the encapsulation resin layer and the metal layer, and the encapsulation resin layer has a taper shape expanding toward the protective resin layer; and an optical semiconductor device containing an optical semiconductor element encapsulated by using the resin sheet. The optical semiconductor element encapsulation resin sheet of the invention can be suitably used for back lights of liquid crystal screens, traffic signals, large-sized outdoor displays, billboards and the like.
US07781793B2 White light emitting element and white light source
A white light source has an excitation light source and a white light emitting element provided at a position which allows the transmission of light from the excitation light source to generate white light through irradiation with the light from the excitation light source. The white light emitting element has a sapphire substrate made of sapphire or the like which transmits visible light, an InGaAlN semiconductor layer formed on a surface of the sapphire substrate to emit red light through irradiation with visible light, and a fluorescent layer formed on the surface opposite to the surface provided with the semiconductor layer to emit yellow light or green light through irradiation with visible light.
US07781790B2 Method for manufacturing substrate for semiconductor light emitting element and semiconductor light emitting element using the same
A semiconductor light emitting element having a semiconductor light emitting structure on a first main surface of a substrate, wherein the first main surface of the substrate has a substrate protrusion portion thereon, wherein a bottom surface of a protrusion is wider than a top surface thereof in a cross section of the substrate and the top surface is included in the bottom surface in a top view of the substrate, the bottom surface has an approximately polygonal shape which has a convex portion on each constituent side of the bottom surface, and the top surface has an approximately circular shape.
US07781789B2 Transparent mirrorless light emitting diode
An (Al, Ga, In)N light emitting diode (LED) in which multi-directional light can be extracted from one or more surfaces of the LED before entering a shaped optical element and subsequently being extracted to air. In particular, the (Al, Ga, In)N and transparent contact layers (such as ITO or ZnO) are embedded in or combined with a shaped optical element, which may be an epoxy, glass, silicon or other material molded into a sphere or inverted cone shape, wherein most of the light entering the inverted cone shape lies within a critical angle and is extracted. The present invention also minimizes internal reflections within the LED by eliminating mirrors and/or mirrored surfaces, in order to minimize re-absorption of the LED's light by the emitting layer (or the active layer) of the LED. To assist in minimizing internal reflections, transparent electrodes, such as ITO or ZnO, may be used. Surface roughening by patterning or anisotropically etching (i.e., creating microcones) may also assist in light extraction, as well as minimizing internal reflections.
US07781779B2 Light emitting devices including wavelength converting material
Light-emitting devices and associated methods are provided. The light emitting devices can have a wavelength converting material-coated emission surface.
US07781778B2 Semiconductor light emitting device and method of manufacturing the same employing nanowires and a phosphor film
There are provided a semiconductor light emitting device using a phosphor film formed on a nanowire structure and a method of manufacturing the device, the device including: a substrate; a light emitting structure including a first conductivity type semiconductor layer, an active layer and a second conductivity type semiconductor layer sequentially formed on the substrate; a plurality of nanowire structures formed on the light emitting structure and formed of a transparent material; and a phosphor film formed on at least an upper surface and a side surface of each of the plurality of nanowire structures.
US07781777B2 Pn junction type group III nitride semiconductor light-emitting device
A pn junction type Group III nitride semiconductor light-emitting device 10 (11) of the present invention has a light-emitting layer 2 of multiple quantum well structure in which well layers 22 and barrier layers 21 including Group III nitride semiconductors are alternately stacked periodically between an n-type clad layer 105 and a p-type clad layer 107 which are formed on a crystal substrate and which include Group III nitride semiconductors, in which one end layer 21m of the light-emitting layer 2 is closest to and opposed to the n-type clad layer, and the other end layer 21n of the light-emitting layer 2 is closest to and opposed to the p-type clad layer, both the one and the other end layers are barrier layers, and the other end layer 21n is thicker than the barrier layer of the one end layer.
US07781776B2 Active device array substrate and method for fabricating the same
An active device array substrate and its fabricating method are provided. According to the subject invention, the elements of an array substrate such as the thin film transistors, gate lines, gate pads, data lines, data pads and storage electrodes, are provided by forming a patterned first metal layer, an insulating layer, a patterned semiconductor layer and a patterned metal multilayer. Furthermore, the subject invention uses the means of selectively etching certain layers. Using the aforesaid means, the array substrate of the subject invention has some layers with under-cut structures, and thus, the number of the time-consuming and complicated mask etching process involved in the production of an array substrate can be reduced. The subject invention provides a relatively simple and time-saving method for producing an array substrate.
US07781775B2 Production method of semiconductor device and semiconductor device
To provide a method for producing a high-performance semiconductor device by a simple and low-temperature process. The method for producing a semiconductor device, in accordance with the present invention, is a production method of a semiconductor device including a first insulating film, a semiconductor layer, and a second insulating film in this order on a substrate, the method including the steps of: forming a first insulating film including a hydrogen barrier layer; forming a semiconductor layer on a region where the hydrogen barrier layer of the first insulating film is formed; injecting hydrogen into the semiconductor layer; forming a second insulating film, the second insulating film including a hydrogen barrier layer on at least a region where the semiconductor layer is formed; and subjecting the semiconductor layer to hydrogenation annealing.
US07781772B2 Display device and manufacturing method thereof
It is an object of the present invention to prevent an influence of voltage drop due to wiring resistance, trouble in writing of a signal into a pixel and trouble in gray scales, and provide a display device with higher definition, represented by an EL display device and a liquid crystal display device.In the present invention, a wiring including Cu is provided as an electrode or a wiring used for the display device represented by the EL display device and the liquid crystal display device. Besides, sputtering is performed with a mask to form the wiring including Cu. With such structure, it is possible to reduce the voltage drop and a deadened signal.
US07781766B2 Array substrate
The invention provides a method for manufacturing an array substrate utilizing a laser ablation process. A conductive layer can be selectively patterned by the laser ablation process without a photo mask due to different adhesions between the conductive layer and other materials. The patterned conductive layer thus formed adjoins an inorganic passivation layer to provide a substantially continuous surface.
US07781763B2 Composition for forming passivation layer and organic thin film transistor comprising the passivation layer
Disclosed herein is a composition including a perfluoropolyether derivative, a photosensitive polymer or a copolymer thereof, and a photocuring agent, a passivation layer, organic thin film transistor, and electronic device including the same, a method of forming the passivation layer and methods of fabricating the organic thin film transistor and electronic device. The organic thin film transistor may prevent or reduce oxygen and moisture from infiltrating thereinto, and thus may prevent or reduce the degradation of the performance thereof caused by ambient air, prevent or reduce the deterioration thereof, and may more easily be formed into a pattern, thereby exhibiting characteristics suitable for use in electronics.
US07781756B2 Nanotube-porphyrin molecular structure and applications of same
A molecular structure. In one embodiment, the molecular structure includes a nanotube formed with a plurality of carbon atoms having a first end, an opposite, second end, and a body portion defined therebetween, wherein the body portion has an interior surface defining a cavity, an opposite, exterior surface and a longitudinal axis therethrough the cavity, and a porphyrin molecule having a plurality of carbon atoms and a first plurality of hydrogen atoms, wherein at its original state the porphyrin molecule has a plurality of pyrrole units and each pyrrole unit is coupled to another pyrrole unit through a methine bridge so as to form a ring structure with a second plurality of hydrogen atoms positioned peripherally along the ring structure. The porphyrin molecule is chemically coupled to the interior surface of the nanotube such that at least one of the second plurality of hydrogen atoms positioned peripherally along the ring structure is replaced by a carbon atom of the nanotube.
US07781753B2 Multi-value recording phase-change memory device, multi-value recording phase-change channel transistor, and memory cell array
A multi-value recording phase-change memory device that can stably record multi-value information, and that can reproduce information with high reliability, comprises a first electrode layer 26, a second electrode layer 28, and a memory layer 30 provided between the first and second electrode layers 26 and 28 and containing a phase-change material layer formed from a phase-change material which is stable in either an amorphous phase or a crystalline phase at room temperature, wherein the memory layer 30 includes a plurality of mutually isolated sub-memory layers 32, 34, 36, and 38 between the first and second electrode layers 26 and 28.
US07781752B2 Device and method for conditioning nuclear fuel assemblies with double confinement barrier
Transport and storage of nuclear fuel assemblies may require double confinement depending on the circumstances. A device and a method are described to perform this double conditioning without the need of a hot containment, and in which the loading and pre-positioning steps can take place in a pool.The device (10) includes a metallic inner leak tight conditioning receptacle (20) and a metallic outer leak tight receptacle (30). When the inner receptacle (20) is located in the outer receptacle (30), a passage (15, 25) remains free between the two receptacles, from the open end to the bottom of the outer receptacle. The outer receptacle (30) can be drained through this passage, particularly by a dip tube (33).
US07781751B2 Portable wavelength transforming converter for UV LEDs
This invention provides a small form factor apparatus for selectively producing one or more of a plurality of wavelength distributions of radiation, comprising a UV Light Emitting Diode (LED) as the primary UV LED radiation source and one or more wavelength transforming (WT) materials separated from the primary UV LED radiation source, that in response to irradiation by the primary UV LED radiation source, produce transformed radiation having a wavelength distribution that is different from the wavelength distribution of the primary UV LED radiation source. None, one, or more than one of the various WT materials may be selected by the user, to allow either the primary UV radiation, or the transformed radiation, or both simultaneously, to be to be emitted from the apparatus in a preferred direction.
US07781750B2 Oblique mirror-type normal-incidence collector system for light sources, particularly EUV plasma discharge sources
There is provided a collector system. The collector system includes a first collector mirror and a second collector mirror. The first collector mirror receives EUV light from a light source at a first aperture angle via a first beam path, and reflects the EUV light at a second aperture angle along a second beam path. The first aperture angle is larger than or substantially equal to the second aperture angle. The second mirror receives the EUV light from the first mirror at the second aperture angle. The collector is an oblique mirror type normal incidence mirror collector system.
US07781748B2 Particle-beam exposure apparatus with overall-modulation of a patterned beam
In a charged-particle exposure apparatus for exposure of a target with a beam of electrically charged particles, the illumination system includes a deflector device adapted to vary the direction of incidence of the illuminating beam upon the pattern definition device, the pattern definition device forms the shape of the illuminating beam into a desired pattern, and the projection optics system projects an image of the beam shape defined in the pattern definition device onto the target; the projection optics system includes a blocking aperture device having an opening and being adapted to block passage of beams traversing outside the opening, namely when the deflector device is activated to tilt the beamlet by a sufficient angle from its non-deflected path, e.g., for blanking out during the process of loading a pattern into the pattern definition device.
US07781747B1 Very thin dosimeter filters and low profile dosimeter encorporating the same
The present invention relates to a novel dosimeter filter and a dosimeter incorporating the same. More specifically, one embodiment of the invention relates to a very thin dosimetry device generally comprising: an optically stimulated luminescent material OSLM (i.e. aluminum oxide) sandwiched between at least two novel CEEC filters, wherein each CEEC filter comprises two layers of filtering material: an electronic equilibrium filter layer and an energy compensation filter layer wherein the electronic equilibrium filters comprise steel and wherein the energy compensation filters comprise Tantalum.
US07781744B2 Procedure for the preparation of radioisotopes
A procedure for the preparation of radioisotopes consisting of a first step of electrodepositing a metallic isotope target to be irradiated on a target-holder element, a second step of irradiating the target, a third step of dissolving the target and a fourth set of purifying the radioisotope from the initial metallic isotope and from other possible radioactive and metallic impurities; the electrodeposition step in turn consisting of a dissolution operation in which the isotope to be irradiated is dissolved in a solution of HNO3 with concentration from 0.5 to 2.5 M, a pH buffering operation, and a recirculation operation, in which the solution obtained above is circulated at a rate from 0.5 to 3 within an electrolytic cell during the current output within the cell itself; the electrodeposition of the target to be irradiated occurs within the electrolytic cell during the recirculation operation.
US07781737B2 Apparatus and methods for oil-water-gas analysis using terahertz radiation
Methods and apparatus for analyzing gas-oil-water compounds in oilfield and other applications are disclosed using terahertz radiation. A sample analyzer includes a sample chamber having a fluid communication port configured to receive the sample. The analyzer also includes a filter to filter samples and selectively remove oil, water or gas from reservoir mixture received by the sample chamber. A terahertz (THz) radiation detector is provided in electromagnetic communication with the sample. The terahertz detector provides a detected output signal indicative of the terahertz electromagnetic radiation detected from the sample. In some embodiments, the device also includes a terahertz source illuminating the sample, the terahertz detector detecting a portion of the terahertz source illumination as modified by the sample. The detected portion of the spectrum of terahertz radiation can be processed to analyze the composition of the sample.
US07781736B2 Terahertz frequency domain spectrometer with controllable phase shift
An apparatus for analyzing, identifying or imaging an target including an integrated dual laser module coupled to a pair of photoconductive switches to produce cw signals in the range of frequencies from 100 GHz to over 2 THz focused on and transmitted through or reflected from the target; and a detector for acquiring spectral information from signals received from the target and using a multi-spectral homodyne process to generate an electrical signal representative of some characteristics of the target with resolution less than 250 MHz. The photoconductive switches are activated by laser beams from the dual laser module. The lasers in the module are tuned to different frequencies and a phase shifter in the path of one beam allows the beams to have an adjustable phase difference.
US07781734B2 Electronic sensor with integrated thermal regulation
A thermal image sensor comprising at least: one pixel matrix, wherein each pixel comprises at least one bolometer and means of applying a voltage to the terminals of the bolometer, and a comparator connecting an output of the pixel matrix to an input of the means of applying the voltage to the terminals of the bolometer of each pixel, wherein said comparator is capable of making a comparison between the output signal of the pixel matrix and a reference value, wherein the value of the voltage at the terminals of the bolometer of each pixel is determined at least partially depending on the result of the comparison.
US07781729B2 Analyzing mass spectral data
A method for analyzing data from a mass spectrometer comprising obtaining calibrated continuum spectral data by processing raw spectral data; obtaining library spectral data which has been processed to form calibrated library data; and performing a least squares fit, preferably using matrix operations (equation 1), between the calibrated continuum spectral data and the calibrated library data to determine concentrations of components in a sample which generated the raw spectral data. A mass spectrometer system (FIG. 1) that operates in accordance with the method, a data library of transformed mass spectra, and a method for producing the data library.
US07781725B2 Optical fiber based sensor system suitable for monitoring remote aqueous infiltration
Methods and apparatus for predicting service life of remote equipment for infiltration of liquid are disclosed. Such methods and apparatus preferably include at least one fiber optic sensor assembly adapted to react after being exposed to a predetermined quantity of liquid.
US07781722B2 Optical touch screen assembly
An optical touch panel including a support defining a detection region, an optical illumination assembly including at least two edge emitting optical light guides extending along adjacent portions of the detection region and having ends adjacent to one another and at least one mechanical coupling and optical coupling assembly, at least one sensor assembly, operative to detect changes in the light received from the optical illumination assembly produced by the presence of an object in the detection region and detection circuitry receiving at least one output from the at least one sensor assembly and providing an output indication of the two dimensional location of object impingement in the detection region.
US07781717B2 System and method for manipulating real-time video playback time-synchronized with millimeter wave imagery
A system and method for manipulating real-time video playback time-synchronized with millimeter wave imagery is disclosed. In a particular embodiment, millimeter wave imagery and visible spectrum video images are combined to form composite images in real-time to detect concealed objects on a person. A graphical user interface (GUI) manipulates the displayed millimeter wave imagery, video images and composite images and controls displaying user selected portions of the synchronized recorded images. The composite images are automatically encoded with event data when a concealed object is detected and an alert is generated, or that information is accessed from a datafile or database structure. The GUI controls the playback and viewing of those composite images having encoded event data.
US07781716B2 Stacked image sensor with shared diffusion regions in respective dropped pixel positions of a pixel array
A CMOS image sensor or other type of image sensor comprises a sensor wafer and an underlying circuit wafer. The sensor wafer comprises a plurality of photosensitive elements arranged in respective positions of a two-dimensional array of positions in which a subset of the array positions do not include photosensitive elements but instead include diffusion regions each of which is shared by two or more of the photosensitive elements. The sensor wafer is interconnected with the circuit wafer utilizing a plurality of inter-wafer interconnects coupled to respective ones of the shared diffusion regions in respective ones of the array positions that do not include photosensitive elements. The image sensor may be implemented in a digital camera or other type of image capture device.
US07781713B2 Method for calibrating a lighting control system that facilitates daylight harvesting
One embodiment of the present invention provides a system for calibrating a lighting control system. The lighting control system is a daylight-harvesting system that controls the output of the lighting system based on available daylight and/or other light sources to reduce energy usage while providing lighting for an area. The lighting system includes multi-level lighting capabilities for one or more light sources. First, the system measures the light levels for the area when the lighting system: is turned on at a high energy-level; is turned on at an intermediate energy-level; and is turned off. The system determines from these measured light levels the light output of the lighting system in the different states. Then, during operation, the system measures a present light level for the area. The system then adjusts the light output of the lighting system for the area based on a lighting control parameter (e.g an on set-point and an off set-point pair), the present light output of the lighting system, and the present light level for the area.
US07781711B2 Fluorescence microscope for which a sample is observed based on the saturation components of fluorescence and fluorescence microscopy method
To increase spatial resolution by observing a sample based on saturated fluorescence components. A fluorescence microscope according to the present invention includes: a laser light source 10 emitting laser light as excitation light; an objective lens 13 focusing the laser light and applying the focused laser light to a sample 14; a detector 22 detecting fluorescence generated in the sample 14 with the laser light; and a stage 15 scanning the sample 14 while moving the sample 14 relative to the laser light, wherein the laser light is applied to the sample with varying intensities such that saturation of fluorescence occurs at the maximum intensity of the laser light, and fluorescence is detected with the detector in accordance with intensity of the laser light, and the sample is observed based on the saturation components of fluorescence.
US07781709B1 Small caliber guided projectile
A non-spinning projectile that is self-guided to a laser designated target and is configured to be fired from a small caliber smooth bore gun barrel has an optical sensor mounted in the nose of the projectile, a counterbalancing mass portion near the fore end of the projectile and a hollow tapered body mounted aft of the counterbalancing mass. Stabilizing strakes are mounted to and extend outward from the tapered body with control fins located at the aft end of the strakes. Guidance and control electronics and electromagnetic actuators for operating the control fins are located within the tapered body section. Output from the optical sensor is processed by the guidance and control electronics to produce command signals for the electromagnetic actuators. A guidance control algorithm incorporating non-proportional, “bang-bang” control is used to steer the projectile to the target.
US07781703B2 Thermal analyzer
The thermal analyzer comprises temperature deviation approximation formula holder which holds an approximate formula of a temperature deviation between sample and furnace and an elevating or lowering rate of the temperature of furnace during measuring the temperature deviation, programmed temperature corrector which corrects a programmed temperature in proportion to the elevating or lowering rate of the temperature. So that, since the temperature deviation is corrected in proportion to the elevating or lowering rate of the temperature program, the temperature deviation between sample and furnace is controlled to diminish when heating or cooling the sample using the temperature program which elevates or lowers the temperature of the sample or the furnace.
US07781701B2 Electrode tip
A welding electrode comprising a metal core and a coating material that includes flux compounds is at least partially coated on an outer surface of said metal core. The tip of the welding electrode is beveled and a portion of the beveled tip has an end coating material which includes an electrically-conductive material.
US07781697B2 Micro-display and methods
A method of forming one or more micro-displays includes forming a first portion of a seal ring overlying a device substrate and surrounding one or more device chips formed on the device substrate, forming a second portion of the seal ring overlying a transparent cover, forming a first layer overlying the transparent cover, plasma bonding the first layer to a second layer formed overlying the device substrate and the one or more device chips, and fusing the first and second portions of the seal ring together using a beam of electromagnetic radiation.
US07781696B2 Method for joining components in titanium aluminide by brazing
A method for joining components in TiAl with a braze includes heating the braze with a laser.
US07781695B2 Inductively coupled plasma/partial oxidation reformation of carbonaceous compounds to produce fuel for energy production
Inductively coupled plasma (ICP) reforming converts carbonaceous compounds into a fuel for use in generating electrical power. Energy rich hydrocarbon fuels, such as coal, marine diesel, oils, and hydrocarbon wastes are employed as a feedstock for the ICP, which transforms the feedstock into a fuel that can be used by fuel cells and gas turbines for the production of electricity. The overall efficiency of an ICP-based electrical power system can be increased by providing partial oxidation within the reaction vessel. The partial oxidation conditions consume a small amount of the reformed fuel gas, thereby liberating sufficient thermal energy to reduce the electrical power requirements of the ICP to maintain desired reactor temperatures, and providing an increase in the overall net electrical power production. The integrated power production system can also adjust to meet an increased requirement for process heat and steam by balancing the effect of partial oxidation.
US07781687B2 Control unit with a monitoring apparatus
A control unit including a monitoring apparatus is disclosed, with the monitoring apparatus having an operating element and an attachment element. In at least one embodiment, the control unit is in two parts and includes an operating unit and switching elements. The required spatial association between the operating unit and the switching element is intended to be monitored in a cost-effective and reliable manner. For this purpose, when the monitoring apparatus is installed correctly, at least one second switching element can be operated by way of an operating member, and a first switching element is operated at the same time by way of the operating element of the monitoring apparatus.
US07781680B2 Flexible printed circuit board
An exemplary FPCB includes a differential pair consisting of a first transmission line and a second transmission line, a signal layer with the first transmission line arranged therein, a ground layer having a void which includes the area beneath the first transmission line, and a dielectric layer lying between the signal layer and the ground layer. The second transmission line is arranged in the ground layer offset from the first transmission line in the horizontal direction. The FPCB can transmit high speed signals.
US07781679B1 Disk drive suspension via formation using a tie layer and product
A disk drive suspension interconnect, and method therefor. The interconnect has a metal grounding layer, a metal conductive layer and an insulative layer between the metal grounding layer and the conductive metal layer. A circuit component such as a slider is electrically connected to the conductive layer along a grounding path from the circuit component and the conductive layer to the metal grounding layer through an aperture in the insulative layer. For improved electrical connection a tie layer is provided through the insulative layer onto the grounding layer in bonding relation with the ground layer. A conductor is deposited onto both the conductive metal layer and the tie layer in conductive metal layer and tie layer bonding relation, and the circuit component is thus bonded to the grounding layer by the conductor.
US07781678B2 Grommet configured for supporting seal strip
A grommet is inserted into a notch in a channel and partially supports a seal strip attached to the channel. The grommet includes a main segment and first and second end segments. The main segment extends from a first end to a second end along a longitudinal axis and has a first side surface and a second side surface. The first end segment is attached to the main segment adjacent to the first end of the main segment. The second end segment is attached to the main segment adjacent to the second end of the main segment. The main segment, the first end segment, and the second end segment together define a passageway extending through the grommet parallel to the longitudinal axis. A cable harness including a grommet and a vehicle including a grommet are also provided.
US07781671B2 Micro-combustor system for the production of electrical energy
A system for the production of electrical energy, comprising: a combustion chamber (14) made of material that is able to withstand high temperatures, an injection device (16) connected to said combustion chamber (14) by means of an injection conduit (15), means (17) for supplying combustion support substance into the combustion chamber (14) and means (18) for the removal of gaseous combustion products, means (26) for the selective emission of radiation onto the outer surface of the combustion chamber (14). The combustion chamber (14) is enclosed in a conversion chamber (20) within which are maintained sub-atmospheric pressure conditions, so that a substantial part of the heat developed by the combustion reaction is converted into electromagnetic radiation.
US07781670B2 Organic photovoltaic component with encapsulation
The invention concerns an organic photovoltaic component with a novel encapsulation, wherein the invention for the first time discloses packaging for organic solar cells that includes a low-cost film composite comprising a metal portion. The packaging meets high requirements, particularly with respect to high barrier properties against oxygen and water vapor encapsulation without or with only minimal adhesive joints, since the encapsulation can be welded/soldered to the substrate or the bottom electrode, integrated lead-through of electrical connections, including adhesive-bonded, soldered and/or welded connections.
US07781667B2 Electronic wind instrument
Electronic wind instrument includes a body section, and a blowing unit pivotably supported on the body section. The blowing unit includes a lip plate section that abuts with a lower lip part of a human player, and a blowing detection section that detects a flow rate of a breath blown by the human player. The blowing unit, which is pivotable about a longitudinal shaft of the body section, includes retaining elements that retain the blowing unit at a predetermined pivoting position, and scale marks for indicating a pivoting position of the blowing unit retained by the retaining elements.
US07781665B2 Sound synthesis
A device (1) is arranged for synthesizing sound represented by sets of parameters, each set comprising noise parameters (NP) representing noise components of the sound and optionally also other parameters representing other components, such as transients and sinusoids. Each set of parameters may correspond with a sound channel, such as a MIDI voice. In order to reduce the computational load, the device comprises a selection unit (2) for selecting a limited number of sets from the total number of sets on the basis of a perceptual relevance value, such as the amplitude or energy. The device further comprises a synthesizing unit (3) for synthesizing the noise components using the noise parameters of the selected sets only.
US07781651B2 Plants and seeds of corn variety CV715590
According to the invention, there is provided seed and plants of the corn variety designated CV715590. The invention thus relates to the plants, seeds and tissue cultures of the variety CV715590, and to methods for producing a corn plant produced by crossing a corn plant of variety CV715590 with itself or with another corn plant, such as a plant of another variety. The invention further relates to corn seeds and plants produced by crossing plants of variety CV715590 with plants of another variety, such as another inbred line. The invention further relates to the inbred and hybrid genetic complements of plants of variety CV715590.
US07781648B2 Resistance to soybean aphid in early maturing soybean germplasm
The present invention relates to compositions and methods for providing aphid resistance in plants. More particularly, the invention relates to compositions and methods for using aphid resistant germplasm for breeding soybean aphid resistant soybean plants, including but not limited to cultivars, varieties, lines and methods of breeding the same for commercial use, the breeding methods further involving identifying and using genetic markers for aphid resistant traits.
US07781643B2 Transgenic non-human animals for pharmacological and toxicological studies
The present invention is directed to the production, breeding and use of transgenic non-human animals such as mice in which specific genes or portions of genes have been replaced by homologues from another animal to make the physiology of the animals so modified more like that of the other animal with respect to drug pharmacokinetics and metabolism. The invention also extends to the use of the genetically modified non-human animals of the invention for pharmacological and/or toxicological studies.
US07781642B2 Animal model having a chimeric human liver and susceptible to human hepatitis C virus infection
The present invention features a non-human animal model that is susceptible to infection by human hepatotrophic pathogens, particularly human hepatitis C virus (HCV). The model is based on a non-human, immunocompromised transgenic animal having a human-mouse chimeric liver, where the transgene provides for expression of a urokinase-type plasminogen activator in the liver. The invention also features methods for identifying candidate therapeutic agents, e.g., agents having antiviral activity against HCV infection. The animals of the invention are also useful in assessing toxicity of various agents, as well as the activity of agents in decreasing blood lipids.
US07781641B2 Absorbent article
The present invention provides an absorbent article capable of suppressing rash of skin in regions which come into contact with a gather portion of the absorbent article, by applying a water-soluble skin care agent and oily skin care agent on the gather portion to be contacted with the skin of a wearer in wearing the absorbent article, and allowing at least a part of the above mentioned oily skin care agent to be transferred to the skin of a wearer when wearing before the above mentioned water-soluble skin care agent is transferred to the skin of a wearer.
US07781637B2 Segmented waste rods for handling nuclear waste and methods of using and fabricating the same
Example embodiments and methods may provide segmented waste rods capable of containing and disposing of waste generated from spent nuclear fuel, including elements left over from fuel that has been harvested for desired isotopes produced in the fuel. Example methods may provide methods for forming and using example embodiment segmented waste rods.
US07781634B2 Treatment of olefin feed to paraffin alkylation
A process for the removal of aromatic compounds from an olefin feed to a paraffin alkylation is disclosed. The process may include feeding a olefin and aromatic containing hydrocarbon stream and a dilute alkylate product stream comprising alkylate product and unreacted material from the paraffin alkylation to a distillation zone and removing the unreacted material as overheads and removing a more concentrated alkylate product stream and a portion of the aromatic compounds as bottoms resulting in an improved alkylation process.
US07781632B2 Integrated processes for making detergent range alkylbenzenes from C5-C6-containing feeds
Integrated processes for making detergent range alkylbenzenes from C5-C6-containing feeds involve feed pretreatment and/or selective hydrogenation to enable acceptable quality alkylbenzene production at attractive capital and operating costs.
US07781630B2 Integrated processes for making detergent range alkylbenzenes from C5-C6-containing feeds
Integrated processes for making detergent range alkylbenzenes from C5-C6-containing feeds involve feed pretreatment and/or selective hydrogenation to enable acceptable quality alkylbenzene production at attractive capital and operating costs.
US07781629B2 Methods of hydrotreating a mixture made up of oils of animal or vegetable origin and of petroleum cuts with quench injection of the oils on the last catalyst bed
A hydrotreating method uses two catalyst beds with the introduction, on the last catalyst bed, of oils of animal or vegetable origin for co-treating a mixture made up of oils of vegetable or animal origin and of petroleum cuts (gas oil cuts (GO) and middle distillates) in order to produce gas oil effluents meeting specifications with an improved cetane number. The first catalyst bed is dedicated to only the deep desulfurization reactions (HDS1) of a petroleum type feed. The effluents of the first catalyst bed having an effluent sulfur content below or equal to 50 mg/kg are separated into two streams. The first stream, which is predominant, is sent to the gas oil pool. The second stream is mixed with oils of vegetable or animal origin. The resultant oil-petroleum cut mixture is then subjected to a milder hydrotreatment (HDT2). The effluents obtained at the outlet of the second catalyst bed can optionally be mixed with the predominant stream from the first bed. The process economy, the tolerance to the specifications relative to oils of animal or vegetable origin and the quality of the products obtained are thus greatly improved.
US07781628B2 Fluorene-based derivative and organic electroluminescence device employing the same
A fluorene-based derivative having a specific structure and an organic electroluminescence device in which an organic thin film layer comprising a single layer or plural layers including at least a light emitting layer is sandwiched between a cathode and an anode, wherein at least one layer of the organic thin film layers described above comprises the above fluorene-based derivative having a specific structure in the form of a single component or a mixed component. The organic electroluminescence device has a high luminous efficiency, and the fluorene-based derivative materializes the same.
US07781626B2 Azeotrope-like compositions of 1,1,1,3,3-pentafluorobutane and hydrogen fluoride
The invention relates to azeotropic and azeotrope-like mixtures of 1,1,1,3,3-pentafluorobutane (HFC-365) and hydrogen fluoride and a process for separating the azeotrope-like mixtures. The compositions of the invention are useful as an intermediate in the production of HFC-365. The latter is useful as a nontoxic, zero ozone depleting fluorocarbon useful as a solvent, blowing agent, refrigerant, cleaning agent and aerosol to propellant.
US07781624B2 Process for the preparation of nitrobenzene by adiabatic nitration
This invention relates to a process for the continuous preparation of nitrobenzene. This process comprises the adiabatic nitration of benzene with a mixture of sulfuric acid and nitric acid, in which the sum of the concentrations in the reaction zone of the metal ions which form sparingly soluble metal sulfates is less than 900 mg/l, based on the volume of the aqueous phase which contains sulfuric acid.
US07781623B2 Method for producing cardanol (II)
A process for the production of a color-stable composition containing cardanol, including (a) subjecting crude, cashew nutshell liquid to distillation to obtain a distillate; (b) reacting the distillate with acetic anhydride to obtain a reaction mixture; and (c) subjecting the reaction mixture to fractional distillation is provided. A method for the production of color-stable phenalkamines, including (a) subjecting crude, cashew nutshell liquid to distillation to obtain a distillate; (b) reacting the distillate with acetic anhydride to obtain a reaction mixture; (c) subjecting the reaction mixture to fractional distillation to obtain a cardanol-containing fractional distillate; and (d) reacting the fractional distillate with an aliphatic amine and formaldehyde to form a color-stable phenalkamine is also provided.
US07781621B2 Hydroformylation method involving a cobalt-based catalyst in a non-aqueous ionic liquid
In a method for hydroformylating olefinically unsaturated compounds by means of a cobalt-based catalyst, used in a non-aqueous ionic liquid, liquid at a temperature below 100° C. and comprising at least one cation Q+ and at least one anion A−, said method comprising at least a stage of reaction under pressure and at least a stage of separation of the phases by decantation, recycling of the catalyst is improved: through the use of a ligand selected from among the Lewis bases, more particularly pyridine derivatives, and simultaneously through the addition of this ligand in a post-reaction stage. At the end of this process, the organic phase containing the reaction products can be recovered and the ionic liquid phase containing the catalyst can be recycled to the hydroformylation reactor.
US07781619B2 Process for the decarboxylation of fatty acids
A process for the production of a ketone having a carbon number between about 20 and about 40 comprising contacting fatty acids containing from about 10 to about 21 carbons atoms with a hydrotalcite catalyst under conditions effective to decarboxylate said acids. More particularly said decarboxylation conditions comprise: a temperature in the range between about 300° C. and about 400° C.; a pressure in the range between about 0.01 and about 5 bar; and a weight hourly space velocity (WHSV) of from about 0.1 to about 10 hr−1.
US07781618B2 Unsaturated aliphatic primary amine and production method thereof
The present invention relates to a method for producing an unsaturated aliphatic primary amine including subjecting an unsaturated aliphatic nitrile having 16 to 22 carbon atoms to hydrogen reduction in the presence of ammonia using a hydrogenation catalyst to produce an unsaturated aliphatic primary amine, wherein 0.01 parts by weight to 1.0 part by weight of aromatic carboxylic acid amide is added based on 100 parts by weight of the unsaturated aliphatic nitrile, and a partial pressure ratio of ammonia to hydrogen is adjusted to 8/2 to 6/4. The present invention also relates to an unsaturated aliphatic primary amine, which is produced by the production method.
US07781616B2 Method for obtaining an aminoindan mesylate derivative
The invention relates to processes for preparing rasagiline mesylate that avoid the use of alcohol solvents, thereby producing rasagiline mesylate free of any alkyl mesylates, including isopropyl mesylate. The invention further relates to processes for purifying rasagiline mesylate to obtain a product free of alkyl mesylates, and to the thus obtained rasagiline mesylate.
US07781615B2 Process for the preparation of amines
The present invention relates to a novel a process for the preparation of the compound of the general formula (I), wherein R1 and R2 are independently H or C1-6 alkyl, which comprises treating with a reducing agent either a compound of the general formula (II), wherein R1 and R2 have the meanings given for the compound of the formula (I), R3 is H or C1-4alkyl and Ph is phenyl, or a compound of the general formula (III), wherein R1, R2, R3 and Ph have the meanings given for the compound of the formula (II), the reducing agent being effective to cleave the benzyl moiety Ph-CH(R3)— from the benzylamino moiety PhCH(R3)NH— in the compound of the formula (II) or in the compound of the formula (III) to leave an amino group and, in addition, in the case of the compound of the formula (III), to reduce both the 2,3-double bond and the double bond joining the R1R2C— moiety to the 9-position of the benzonorbornene ring to single bonds. It also relates to processes for the preparation of the compounds (II) and (III) and their precursors and to the compounds (II) and (III) themselves and certain of their precursors, which are novel compounds. The compounds (I) are useful for the preparation of various fungicidal heterocyclyl-carboxylic acid benzonorbornen-5-yl-amides.
US07781614B2 Method for treating an imide organic solution bearing a sulphonyl group
The invention relates to a method of treating an impure organic composition of ammonium imide, one of the substituents of which imide ion is a sulfonyl carried by a perhalogenated, advantageously perfluorinated carbon, characterized in that said composition is subjected to a step of liquid-liquid extraction by means of an aqueous phase and containing, as impurity, at least one of the chemical species chosen from halides, sulfonates and sulfinates, in particular those whose sulfur is carried by a perhalogenated carbon.
US07781613B2 Substituted N-aminomethylene sulfonamides, production and use thereof as medicaments
Disclosed are compounds of the general formula (I), with the definitions of the substituents R1 to R5, A and X being detailed in the text, and to their physiologically tolerated salts, to processes for preparing these compounds and to the use thereof as inhibitors of hormone-sensitive lipase (HSL).
US07781612B2 Process for producing fluorinated sulfonyl fluoride
The present invention provides a process for producing a fluorinated sulfonyl fluoride useful as e.g. a material for an ion exchange resin, and a novel chemical substance useful as an intermediate in the production process.That is, to provide a process comprising oxidizing Y—S—RA-E-RB by means of an oxidizing agent essentially containing a halogen atom to obtain XSO2—RA-E-RB, and in a case that X is a fluorine atom, reacting the compound with fluorine in a liquid phase as it is, and in a case that X is a halogen atom other than a fluorine atom, converting X into a fluorine atom, and then reacting the obtained compound with fluorine in a liquid phase to obtain FSO2—RAF-EF-RBF, and then decomposing it to obtain FSO2—RAF—COF (wherein RA is a bivalent organic group such as an alkylene group, RB is a monovalent organic group such as a perfluoroalkyl group, E is —CH2OCO—, Y is a monovalent organic group such as a cyano group or the like, X is a halogen atom, RAF is a bivalent organic group having RA fluorinated or the like, RBF is the same group as RB or the like, and EF is —CF2OCO—).
US07781608B2 Production of 3-pentenenitrile from 1,3-butadiene
A process is described for preparing 3-pentenenitrile by hydrocyanating 1,3-butadiene, wherein 1,3-butadiene is reacted with hydrogen cyanide in the presence of at least one catalyst and the stream resulting therefrom is purified distillatively, the bottom temperature during the distillation not exceeding 140° C.
US07781607B2 Method for producing polymerized coordination compounds of platinum complex
There is provided a production method in which bis(nitrato)platinum complex, optionally in the concurrent presence of dihalo-platinum complex, and poly(ethylene glycol)-block-poly(glutamic acid) are used at specific ratios and reacted. Coordination compound of an anti-tumor platinum complex with a block copolymer having carboxyl groups on its side chains is efficiently produced.
US07781604B2 Fluorine-containing acrylate
The present invention is a fluorine-containing acrylate or alpha-substituted, fluorine-containing acrylate, represented by the following formula (1): wherein a is an integer of from 1 to 4 and b is an integer of from 1 to 4, provided that a total of a and b is 3, 4, or 5; R1 is a group represented by the following formula (2): —(C4H8O)d(C3H6O)e(C2H4O)f(CH2O)g—  (2) wherein d, e, f, and g are, independently of each other, an integer of from 0 to 4, provided that a molecular weight of R1 is in a range of 30 to 300, and these repeating units may be sequenced at random; R2 is an acryl group- or alpha-substituted acryl group-containing group having 4 to 20 carbon atoms and represented by the following formula (3): wherein R3 is, independently of each other, a hydrogen atom, a fluorine atom, a methyl group, or a trifluoromethyl group, R4 is a divalent or trivalent linking moiety having 1 to 18 carbon atoms, optionally having an ether bond and/or an ester bond, and n is 1 or 2; Rf is a perfluoropolyether residue represented by the following formula (4): wherein j, k, l, and m are, independently of each other, an integer of from 0 to 50, provided that a molecular weight of Rf is in a range of 200 to 6000, X is a fluorine atom or a trifluoromethyl group, and these repeating units may be sequenced at random; Z is a divalent organic group; and c is 0 or 1.
US07781602B2 Fluorinated cyclic compound, polymerizable fluoromonomer, fluoropolymer, resist material comprising the same, and method of forming pattern with the same
The present invention relates to a novel fluorine-containing cyclic compound that is derived from a norbornadiene and hexafluoroacetone and has an oxacyclopentane structure. This compound may be represented by the following formula (1) or (2). Furthermore, the present invention relates to a fluorine-containing polymer compound prepared by a polymerization or copolymerization using this fluorine-containing cyclic compound or its derivative. By using such fluorine-containing polymer compound, it is possible to provide a superior resist material and a fine pattern forming process using the same.
US07781599B2 Process for production of aromatic compounds
A problem of the present invention is to provide an economical process with minimized toxicity for producing an aromatic compound having a variety of substituents such as various alkyl groups, and the problem is solved by a process for production of an aromatic compound represented by formula (1) below, which comprises reacting a compound represented by formula (2) below with an aromatic magnesium reagent represented by formula (3a) below in the presence of an iron catalyst and a diamine compound: wherein R is an optionally substituted hydrocarbon group or a C3-C10 saturated or unsaturated ring group; A is an optionally substituted C4-C20 aromatic group or an optionally substituted heteroaromatic group; X is a halogen atom or a sulfonic acid ester; and Y1 is bromine, iodine, chlorine or a carbanion ligand.
US07781598B2 Process for the preparation of substituted indoles
The invention relates to a novel process for the preparation of substituted indoles which are useful as therapeutic agents.
US07781588B1 Acridan monomers and polymers
Acridian monomers and polymers are described, as well as their use in organic electronic devices, and materials and methods for fabrication of the same.
US07781586B2 Metathesis catalysts
Disclosed are novel metathesis catalysts of the formula wherein R1, R2, R3, R4, R5, R6, X1, X2, L and Y are as described herein, a process for making the same and their use in metathesis reactions such as ring closing or cross metathesis.
US07781582B2 Process for the preparation of 2-amino-[1,2,4]triazolo[1,5-a]pyrimidines
Process for the preparation of unsubstituted or substituted 2-amino-[1,2,4]triazolopyrimidines which comprises combining A) 2-amino-pyrimidine or its derivatives with alkyloxycarbonyl isothiocyanate or aryloxycarbonyl isothiocyanate with B) hydroxyl ammonium salt and a base wherein the reaction is carried out in a polar aprotic organic solvent in the temperature range of from 40 to 150° C.
US07781578B2 Powdered or granular composition based on leguminous starch and use thereof in non-food and non-pharmaceutical applications
The invention concerns a powdered or granular composition, useful for preparing non-food and non-pharmaceutical products, characterized in that it contains at least one legume starch, and at least one additive selected from a flow agent, a filler, a polymer, an active principle or a mixture thereof. The invention also concerns the use of such a composition in the non-food and non-pharmaceutical fields.
US07781576B2 Process for preparing a synthetic intermediate for preparation of branched nucleosides
A process is provided for the preparation of a key intermediate in the preparation of 2′-branched nucleoside compounds. The process includes contacting a protected precursor 3,4-O-isopropylidene-2-C-substituted-D-arabinono-1,5-lactone with a fluorinating agent under anhydrous conditions and converting the precursor into a protected 2-deoxy-2-halo-2-C-disubstituted ribono-1,5-lactone and optionally into a 2-deoxy-2-halo-2-C-disubstituted ribono-1,4-lactone.
US07781573B2 Multi layer chromatography of nucleic acids
Methods using two to (n) purification columns to separate full length 5′-DMT-on oligonucleotides with size ranging from 40 to 180-mers from short length 5′-DMT-on oligonucleotides. Two of the said methods require using some columns sequentially with the collection and reprocessing of an intermediate fraction and are used for oligonucleotides with length ranging from 70 to 180-mers. A third method is carried out with columns stacked and used in series and is best used to purify oligonucleotides with length ranging from 40 to 80-mers. In the presence of a high ionic strength buffer, the short length DMT-on oligonucleotides bind to the top stacked columns while the less hydrophobic contaminant or DMT-off failures do not bind and/or are being washed off. In a stacked configuration, the full length DMT-on oligonucleotides are retained by the bottom column while in a 15 sequential configuration, full length DMT-on oligonucleotides are collected and reprocessed.
US07781568B2 Anti-mullerian inhibiting substance type II receptor (MISIIR) immunoconjugates to detect and treat cancer
Compositions and methods for detecting and treating cancers expressing Mullerian inhibiting substance Type II receptor (MISIIR) are provided.
US07781564B2 Polythiophenes and devices thereof
A polythiophene wherein the monomer segments thereof contain wherein A is a side chain; B is hydrogen or a side chain; and D is a divalent linkage, and wherein the number of A-substituted thienylene units (I) in the monomer segments is from about 1 to about 10, the number of B-substituted thienylene units (II) is from 0 to about 5, and the number of divalent linkages D is 0 or 1.
US07781563B2 Preparing method of methoxypolyethyleneglycol and its derivatives
The present invention relates to a preparing method of methoxypolyethyleneglycol (mPEG) with high purity and derivatives thereof. More precisely, the method of the present invention to prepare high purity mPEG with at least 99% of purity, up to 1.05 of molecular weight distribution and 350˜100,000 of molecular weight includes the process of reacting commercial mPEG having low purity to give highly purified intermediates, mPEG-acetic acid of formula 1 and mPEG-phthalate of formula 2.
US07781558B2 Hydrophilic siloxanyl monomers with pendant polymerizable groups
The present invention relates to polymeric compositions useful in the manufacture of biocompatible medical devices. More particularly, the present invention relates to certain hydrophilic monomers capable of polymerization to form polymeric compositions having desirable physical characteristics useful in the manufacture of ophthalmic devices. The polymeric compositions comprise polymerized hydrophilic siloxanyl monomers.
US07781557B2 Stabilization of cross-linked silane group containing polymers
The present invention relates to a composition for cross-linking and stabilization of a polymer containing hydrolysable silane groups comprising a sulfonic acid as a silanol condensation catalyst characterized in that it comprises a stabilizer which is neutral or acidic, does not contain ester groups and is a compound according to formula (I): wherein R is an unsubstituted or substituted aliphatic or aromatic hydrocarbyl radical which may comprise heteroatoms, R′ is a hydrocarbyl radical, R″ is a hydrocarbyl radical and R′ and/or R″ being a bulky radical, X1, X2 or X3 is the same or different H or OH, whereby at least X1, X2 or X3 is OH, and n is 1 to 4; or a compound according to formula (II): R′″—(S)p—R′″  (II) wherein R′″ is an aliphatic hydrocarbyl radical and p is 1 to 6; or a mixture of any of such compounds, to a stabilized polymer comprising the above stabilizers and to a process for cross-linking and stabilization of silane group containing polymers in the presence of the above mentioned stabilizers.
US07781556B2 Lyotropic liquid crystals and vesicles
Silicone based liquid crystal and vesicles are prepared by first reacting (A) an ≡Si—H containing polysiloxane, (B) a mono-alkenyl polyether, in the presence of a platinum catalyst until an ≡Si—H containing polysiloxane with polyether groups (C) is formed. The ≡Si—H containing polysiloxane with polyether groups (C) is then reacted with (D) an unsaturated hydrocarbon such as an α,ω-dienes, and (E) water, in the presence of a platinum catalyst until the silicone based liquid crystal or vesicle is formed. The silicone based liquid crystal or vesicle can also be heated until a hard liquid crystal gel or vesicle paste are formed.
US07781552B2 Styrene copolymer and process for producing the same
A styrene resin excellent in heat resistance, weatherability, melt stability, and suitability for recycling. It is a styrene copolymer obtained by living polymerization (Mw/Mn=1.6-4.0) which comprises isopropenylaromatic units (A) contained in an amount of 5 to 95 wt. % and vinylaromatic units, and has a glass transition temperature (Tg) which satisfies a specific relationship defined by the content of isopropenylaromatic units (A) in the copolymer.
US07781546B2 Slurry phase polymerisation process
A process comprising polymerising in a loop reactor of continuous tubular construction an olefin monomer optionally together with an olefin comonomer in the presence of a polymerisation catalyst in a diluent to produce a slurry comprising solid particulate olefin polymer and the diluent wherein the internal diameter of at least 50% of the total length of the reactor is at least 700 millimeters and the solids concentration in the reactor is at least 20 volume % is disclosed.
US07781538B2 Tin-free, high-melting reaction products of carbonyl-hydrogenated ketone aldehyde resins, hydrogenated ketone resins, and carbonyl-hydrogenated and core-hydrogenated ketone aldehyde resins based on aromatic ketones and polyisocynates
The invention relates to tin-free reaction products of hydroxyl-containing hydrogenated ketone resins, carbonyl-hydrogenated ketone-aldehyde resins, and carbonyl-hydrogenated and ring-hydrogenated ketone-aldehyde resins based on aromatic ketones and polyisocyanates, to a process for their preparation and to the use thereof, in particular as a main component, base component or additive component in coating materials, adhesives, inks, polishes, glazes, stains, pigment pastes, filling compounds, cosmetics articles, sealants and/or insulants.
US07781537B2 Functionalized poly(arylene ether) composition and method
A curable composition includes an olefinically unsaturated monomer and a poly(arylene ether) having two polymerizable groups and an intrinsic viscosity of about 0.05 to about 0.30 deciliters per gram. The composition exhibits an improved combination of high flow during molding and high post-cure stiffness and impact strength. The composition is particularly useful for fabricating plastic-packaged electronic devices.
US07781536B2 Highly oxygen-permeable hydrated ocular lens
It is an object of the present invention to provide an ocular lens superior in the wettability of the surface thereof, hydrating properties, oxygen permeability, flexibility, elasticity, transparency and shape recoverability though it has a composition using a silicone-containing monomer. The present invention relates to a highly oxygen-permeable hydrated ocular lens obtained by saponifying a copolymer prepared from a specific both-terminal (meth)acryl polydimethylsiloxane, a vinyl carboxylate, a (meth)acrylamide type monomer, a vinyl type crosslinking agent, one or both of a (meth)acrylate having a tertiary structure and a (meth)acrylate having a cyclic structure as (meth)acrylates each having a bulky structure at its side chain and a monomer copolymerizable with these compounds.
US07781532B2 Fluorine-containing polymer powder, method for producing the same and coated article
A stabilized fluorine-containing polymer powder having an average particle size of 5 to 100 μm is prepared by contacting a fluorine-containing polymer powder, which is prepared by milling the fluorine-containing polymer and removing fine particles, fibrous particles and coarse particles by classification, with a fluorinating agent so that the total number of unstable terminal groups is decreased to 7 to 50 per 106 carbon atoms. This is a fluorine-containing polymer powder achieved a high coating efficiency in an electrostatic coating method and provides a film having good properties such as heat resistance, non-tackiness, low frictional property, chemical resistance, etc.
US07781529B2 Blend of ionic (co)polymer resins and matrix (co)polymers
The invention relates to polymeric resin blends containing polyelectrolyte resins blended into a polymer or copolymer matrix. Specifically, the polyelectrolyte resins are (co)polymers without hydrolyzable groups. The matrix polymer is a tough, and highly chemical-resistant (co)polymer, preferably a fluoropolymer. The polymeric resin blend is useful for forming films, and especially films useful for MEAs for use in fuel cells.
US07781528B2 Power transmission belt
A power transmission belt having a body with a length, an inside, an outside, and laterally spaced side surfaces. The body has a first rubber composition that includes an organic peroxide used as a cross-linking agent and N,N′-m-phenylenedimaleimide and/or quinone dioxime in an amount of 0.5 to 13 parts by weight per 100 parts by weight of rubber components. The rubber components include (a) ethylene-vinyl ester copolymer and/or an ethylene-α,β-unsaturated carboxylate copolymer, and (b) an ethylene α-olefin rubber in a ratio of from 5:95 to 100:0 by weight.
US07781527B2 Fibers and nonwovens comprising polypropylene blends and mixtures
Fibers and nonwoven materials comprising polymeric blends and polymeric mixtures that incorporate a blend of a first metallocene polypropylene and a second polypropylene are described. The first and second polypropylenes have a predetermined relationship for the melt temperature and the melt flow rate of the individual polypropylenes. Also described are fibers (including bicomponent fibers) and nonwoven materials made from the fibers where the fibers are extruded using the polymeric blends, and/or the polymeric mixtures.
US07781524B2 Releasing composition
A releasing composition capable of improving abrasion resistance includes a releasing composition containing releasing particles in a film forming material, and the releasing particle has a first releasing resin as a core material and a second releasing resin as a coating material. The first releasing resin has a relatively higher releasing property than the second releasing resin. The first releasing resin can include a surface tension of from about 0.01 N/m to about 0.025 N/m, and the second releasing resin may have a surface tension of from about 0.026 N/m to about 0.05 N/m.
US07781521B2 Furfural-urea resins and adhesives and their methods of production
This invention provides methods for producing furfural-urea resins and adhesives. The includes dissolving urea in hot water to produce a hot aqueous solution, mixing furfural with the aqueous solution, adding an acid catalyst such as maleic anhydride to the furfural containing aqueous solution upon which a resinification reaction begins immediately. The resinification reaction is quenched by cooling to a pre-selected temperature to produce a resin or adhesive.
US07781519B2 Solubilizer and composition containing same
The present invention provides a solubilizing agent that can give solubility or dispersibility in resins to copper-containing phosphorus compounds, and a composition containing the solubilizing agent. The solubilizing agent of the invention comprises a compound represented by the following general formula (100) having a main chain with an oxyalkylene unit. [wherein R111 represents hydrogen or a b-valent organic group, R112 represents C2-4 alkylene, R113 represents hydrogen, alkyl, aryl or acyl, a represents an integer of 1-50 and b represents an integer of 1-4.]
US07781518B2 Aromatic diamine polyurethane curatives with improved stability
Disclosed herein is a composition comprising an aromatic diamine that is a solid at room temperature and a stabilizing quantity of a hindered amine light stabilizer and its use as a polyurethane curing agent.
US07781508B2 Rubber composition
A rubber composition, which comprises 100 parts by weight of an ethylene-alkyl acrylate copolymer rubber, 5-40 parts by weight of EPDM, 1-40 parts by weight of an α-olefin oligomer, 0.5-4 parts by weight of an organic peroxide cross-linking agent, 0.5-4 parts by weight of an amine-based vulcanizing agent, and 300-1,000 parts by weight of magnetic powder. The rubber composition is a rubber composition filled a magnetic powder at a high packing density, where an ethylene-alkyl acrylate copolymer rubber having amine vulcanizable groups as a binder, and effectively usable in rubber-bonded sensor magnets, etc., without any foaming at the time of vulcanization molding and with distinguished processabilities such as mold releasability, etc.
US07781506B2 Poly(vinyl alcohol) composition comprising a polyol
Disclosed are a composition, a process that can be used to produce the composition, and an article comprising or produced from the composition wherein the composition comprises or is produced from PVOH and a polyol ester plasticizer; the PVOH includes a PVOH homopolymer or copolymer; the polyol ester plasticizer includes an esterified polyol having one or more ester groups and at least one free hydroxyl group; and the process comprises combining PVOH with a polyol ester plasticizer under a condition sufficient to transesterify the poly(vinyl alcohol).
US07781504B2 Alkyltin sulfanyl diester thiols
Disclosed herein are compounds of the formula: (R)x—Sn—(R′)4-x wherein: R is alkyl; R′ is a moiety selected from the group consisting of: w is 0 or 1; x is 1 or 2; y is 1, 2, 3, or 4; and Z is a linear, branched, cyclic, or aromatic hydrocarbon. These compounds are excellent stabilizers for halogen-containing resins, such as PVC.
US07781503B2 Modified asphalt binders and asphalt paving compositions
A process for preparing a modified asphalt binder composition, the process comprising mixing asphalt, an unsaturated polymer, and phosphorus pentasulfide to form a modified asphalt composition.
US07781501B2 Thermosetting adhesives comprising a resin having azetidinium functional groups
Thermosetting adhesives for use in e.g., particleboard or fiberboard, wherein the adhesives comprise a resin having azetidinium functional groups, can provide fast tack-building and curing, as well as ultimately excellent bonding characteristics. Preferably, the azetidinium-functional resin is formed from the reaction product of a polyamidoamine and epichlorohydrin.
US07781497B2 Antibiotic method for parts of refrigerator using antibiotic substance
A conventional part of a refrigerator containing an antibiotic substance has problems in that discoloration occurs with time, a surface of the part of the refrigerator is corroded during a manufacturing process, or the whitening effect is degraded, and production costs increase.The present invention relates to an antibiotic method for processing a part of a refrigerator using a silver-based antibiotic substance. The antibiotic method comprises the steps of forming a preform of the part to have a thickness relatively smaller than that of a finished product of the part through an extrusion process; mixing 0.05 to 0.1% by weight of the silver-based antibiotic substance in the form of pellets with a resin based on the total weight of the resin; and forming an antibiotic layer on a surface of the preform of the part using the resin with the antibiotic substance mixed therewith. The antibiotic layer may be formed by laminating a film made of the resin with the antibiotic substance mixed therewith, or formed on the surface of the part of the refrigerator through multi-extrusion. Further, the silver-based antibiotic substance may comprise 60 to 80% by weight of an oxide of Ag ions having diameters of several dozen to hundred nanometers, 10 to 20% by weight of zirconium phosphate, and 10 to 20% by weight of a zinc oxide. According to the present invention, there are advantages in that the production costs of the refrigerator are reduced, and the antibiotic and whitening effects are improved.
US07781491B2 Cationic exchange resin with zero-valance double metal cationic exchange resin and process thereof
A process of doping zero-valance double metals into a cationic exchange resin to increase reactive activity of zero-valance metals includes providing a cationic exchange resin to contact a first metal in the form of ions to reduce the first metal which then attaches to the cationic exchange resin; providing a second metal in the form of ions to contact and attach to the first metal; and reducing the second metal to zero valance and forming a carrier containing double metals. The cationic exchange resin is selected from a strong acidic ion exchange resin of which the ion exchange functional group is SO3Na and SO3H. The first metal is selected from the noble metal group: palladium, platinum and copper. The second metal is selected from the normal metals group, such as tin. The first metal and the second metal respectively have particle diameters ranging from 20 to 100 nm.
US07781486B2 Punctual stimulation therapy
The invention relates to the use of a sterile aqueous solution of a substance inhibiting the enzymatic decomposition of endogenous opioide neuropeptides, especially enkephalins, for producing a preparation provided for intravenous infusion, in order to intensify the action of punctual stimulation therapy carried out with an electrical current. One such substance is e.g. D-phenylalanine. In cases that are difficult to treat, pain can be effectively reduced or stopped by infusion of the preparation.
US07781485B2 Hsp90 family protein inhibitors
The present invention provides Hsp90 family protein inhibitors comprising, as an active ingredient, a benzoic acid derivative represented by General Formula (I): [wherein n represents an integer of 0 to 10; R1 represents substituted or unsubstituted lower alkoxycarbonyl, substituted or unsubstituted aroyl, or the like; R2 represents —NR14R15 (wherein R14 and R15 may be the same or different and each represents a hydrogen atom, substituted or unsubstituted lower alkyl, substituted or unsubstituted aralkyl or the like); R3 and R5 may be the same or different and each represents a hydrogen atom, substituted or unsubstituted lower alkyl or the like; and R4 and R6 may be the same or different and each represents a hydrogen atom, halogen, substituted or unsubstituted lower alkyl or the like] or a prodrug thereof, or a pharmaceutically acceptable salt of said benzoic acid derivative or said prodrug.
US07781483B2 Benzopyran compound
This invention relates to benzopyran compounds of formula (I) wherein X is NR6, Y is a bond, SO or SO2, Z is C1-4alkyl group or phenyl group, W is hydrogen atom, hydroxy group, C1-6 alkoxy group, a halogen atom, C1-4alkyl group or C1-6alkylsulfonylamino group, R1 and R2 are independently of each other C1-3alkyl group, R3 is hydrogen atom, hydroxy group or methoxy group, m is an integer of 0 to 4, n is an integer of 0 to 4, V is a single bond, CR7R8, NR9, O, S, SO or SO2, R4 is hydrogen atom or C1-6alkyl group, R5 is hydrogen atom, C1-6alkyl group, C3-8cycloalkyl group, C3-8cycloalkenyl group, C6-14aryl group or C2-9heteroaryl group. These compounds are useful as an anti-arrhythmic agent.
US07781476B2 Tetracyclic 3-substituted indoles having serotonin receptor affinity
Tetracyclic 3-substituted indoles having serotonin receptor affinity and pharmaceutically acceptable salts thereof.
US07781475B2 Oxindoles as kinase inhibitors
The present invention relates to oxindoles of the formula I, their use as protein kinase activators or inhibitors, a method for their manufacture, their use for the preparation of a medicament for the treatment of diseases and their use for the manufacture of a pharmaceutical composition.
US07781472B2 Therapy for the treatment of disease
Disclosed herein are pharmaceutical compositions comprising oxybutynin, or a free base thereof or a pharmaceutically acceptable salt thereof, and pilocarpine, or a free base thereof or a pharmaceutically acceptable salt thereof. Also disclosed are methods of treating a patient suffering from overactive bladder comprising administering to the patient the above pharmaceutical composition.
US07781468B2 Tyrosine derivatives substituted by N-arylacryloyl as agonists of hPPAR alpha and/or hPPAR gamma
The present invention relates to a compound of formula I, racemates, optically active isomers, or pharmaceutically acceptable salts or solvates thereof, and a pharmaceutical composition comprising the compound, the various radicals in the formula I are the same as defined in the claims. The present invention also relates to a process for preparing the compound of formula I and use of said compound in the preparation of a medicament for the treatment of hyperglycemia, dyslipidemia, type II diabetes mellitus including associated diabetic dyslipidemia
US07781466B2 Preparation for the fungicidal and algicidal finish of alkaline coating compositions
The invention relates to a preservative comprising at least one isothiazolone, at least one quaternary ammonium compound, and at least one stabilizer selected from the group of sulphite salts, hydrogen sulphite salts, sulphite-releasing compounds and hydrogen-sulphite-releasing compounds, the presence of algicidal triazine being ruled out. The preservative inhibits the growth of fungi, algae and bacteria on or in alkaline coating compositions. The invention furthermore relates to a process for the preparation of the preservative, to its use in a coating composition, and to the preserved composition.
US07781461B2 NPY Y5 antagonist
The present invention provides a pharmaceutical composition for use as an NPY Y5 receptor antagonist comprising a compound of the formula (I): wherein R1 is lower alkyl, cycloalkyl or the like, R2 is hydrogen, lower alkyl or the like, n is 1 or 2, X is lower alkylene, lower alkenylene, arylene, cycloalkylene or the like, Y is CONR7, CSNR7, NR7CO, NR7CS or the like, Z is lower alkyl, optionally substituted carbocyclyl, optionally substituted heterocyclyl or the like and R7 is hydrogen or lower alkyl, prodrug, pharmaceutically acceptable salt or solvate thereof.
US07781456B2 Enantiomers of 3-heteroaryl-8H-8-azabicyclo(3.2.1)oct-2-ene and their use as monoamine neurotransmitter re-uptake inhibitors
This invention relates to novel enantiomers useful as monoamine neurotransmitter re-uptake inhibitors.In other aspects the invention relates to the use of these compounds in a method for therapy and to pharmaceutical compositions comprising the compounds of the invention.
US07781449B2 Trospium chloride treatment method
A pharmaceutical composition of a pharmaceutically acceptable trospium salt, with upon administration to a human patient generates an average steady state blood levels of trospium with a minimum (Cmin) and maximum (Cmax) blood levels of about 0.5-2.5 ng/ml and about 2.0-6.0 ng/ml, respectively.
US07781446B2 Use of CCI-779 as an antineoplastic agent
This invention provides the use of CCI-779 in the treatment of neoplasms.
US07781444B2 Pharmaceutical composition for treating fecal incontinence and anal itch
Fecal incontinence and anal itch can be treated by administration, more particularly by local application to the anus, of an α adrenergic blocker, nitric oxide synthase inhibitor, prostaglandin F2α, dopamine, morphine, β-blockers, and 5-Hydroxytryptamine. The patients who benefit most from the invention are those who have a normal or low maximum anal resting pressure and a structurally intact internal anal sphincter muscle, and patients who have had major bowel resection and reanastomosis.
US07781443B2 Tetrahydronaphthyridine derivatives and a process for preparing the same
A novel compound of the formula (I): wherein R1 is alkoxycarbonyl or the like, R2 is alkyl or the like; R3 is hydrogen or the like; R4 is alkylene or the like; R5 is optionally substituted heterocyclic group; R6, R7, and R8 are independently hydrogen; alkyl, alkoxy, or the like; R10 is optionally substituted aromatic ring, or the like; or a pharmaceutically acceptable salt thereof, which has an inhibitory activity against cholesteryl ester transfer protein (CETP).
US07781442B2 Compounds and uses thereof in modulating amyloid beta
Novel compounds, compositions, and kits are provided. Methods of modulating Aβ levels, and methods of treating a disease associated with aberrant Aβ levels are also provided.
US07781439B2 Pyrazolopyrimidines
Pyrazolopyrimidines of the formula in which R1, R2, R3, R4, R5 and X are as defined in the description, processes for preparing these compounds and their use for controlling unwanted microorganisms.
US07781437B2 Substituted heterocyclic compounds with CXCR3 antagonist activity
The present application discloses a compound, or enantiomers, stereoisomers, rotamers, tautomers, racemates or prodrug of said compound, or pharmaceutically acceptable salts, solvates or esters of said compound, or of said prodrug, said compound having the general structure shown in Formula 1: or a pharmaceutically acceptable salt, solvate or ester thereof, wherein the various moieties are defined herein. Also disclosed is a method of treating chemokine mediated diseases, such as, palliative therapy, curative therapy, prophylactic therapy of certain diseases and conditions such as inflammatory diseases (non-limiting example(s) include, psoriasis), autoimmune diseases (non-limiting example(s) include, rheumatoid arthritis, multiple sclerosis), graft rejection (non-limiting example(s) include, allograft rejection, xenograft rejection), infectious diseases (e.g, tuberculoid leprosy), fixed drug eruptions, cutaneous delayed-type hypersensitivity responses, type I diabetes, viral meningitis and tumors using a compound of Formula 1.
US07781436B2 Indol-3-y-carbonyl-piperidin and piperazin-derivatives
The present invention relates to indol-3-yl-carbonyl-piperidin and piperazin derivatives which act as V1a receptor antagonists and which are represented by Formula I: wherein the residues R1 to R3 are as defined herein. The invention also relates to pharmaceutical compositions containing such compounds, and methods for preparation of the compounds and compositions. The invention further relates to methods for treating dysmenorrhea, hypertension, chronic heart failure, inappropriate secretion of vasopressin, liver cirrhosis, nephrotic syndrome, obsessive compulsive disorder, anxiety and depressive disorders.
US07781435B2 Imidazole compounds for the treatment of neurological disorders
The present invention relates to compounds of Formula I wherein R1, R2, R3, R4, R6, R7 and A are as defined. Compounds of Formula I have activity inhibiting production of Aβ-peptide. The invention also relates to pharmaceutical compositions and methods for treating diseases and disorders, for example, neurodegenerative and/or neurological disorders, e.g., Alzheimer's disease, in a mammal comprising compounds of Formula I.
US07781433B2 Pharmaceutical compounds
A thienopyrimidine of formula (I): and the pharmaceutically acceptable salts thereof have activity as inhibitors of PI3K with selectivity for the P110α subtype, and may be used to treat diseases and disorders arising from abnormal cell growth, function or behaviour, particularly those associated with PI3 kinase such as cancer, immune disorders, cardiovascular disease, viral infection, inflammation, metabolism/endocrine disorders and neurological disorders. Processes for synthesizing the compounds are also described.
US07781430B2 Benzoxazole carboxamides for treating CINV and IBS-D
Compounds of formulae I and II: are disclosed as 5-HT3 inhibitors. Those compounds that exhibit central activity are useful in treating CINV; those that inhibit peripheral receptors are useful to treat IBS-D.
US07781427B2 Process for preparing quinoline compounds and products obtained therefrom
Methods for synthesizing tetrahydroquinoline-containing compounds are provided, along with synthetic intermediates and products associated with such methods.
US07781426B2 CETP inhibitors
Compounds having the structure of Formula (I), including pharmaceutically acceptable salts of the compounds, are CETP inhibitors, and are useful for raising HDL-cholesterol, reducing LDL-cholesterol, and for treating or preventing atherosclerosis. In the compounds of Formula (I), B or R2 is a phenyl group which has an ortho amine or aminomethyl substituent which is further substituted, and the other of B or R2 is also a cyclic group.
US07781423B2 Compounds to promote regeneration of bone marrow
Embodiments of the present invention include the use of heterocyclic trialkyl ammonium-containing compounds to promote regeneration of bone marrow from endogenous or exogenous stem/progenitor cells and to normalize blood cell and platelet counts.
US07781422B2 Antiviral indoles
Compounds of the formula (I): wherein A, B, D, M, Ar, W, X, Y, Z and R1 are as defined herein, are useful in the prevention and treatment of hepatitis C infections. The compounds, their preparation, pharmaceutical compositions containing them and their use in medicine are disclosed.
US07781418B2 Composition for treating bone disorders
Disclosed is a new composition of matter, substantially enantiomerically pure (1R,6S)-2-Azabicyclo-[4.3.0]nonane-8,8-diphosphonic acid, methods of preparing this new composition of matter, a pharmaceutical composition comprising the new composition, and administration of the composition in methods of treating bone disorders such as osteoporosis, osteolytic bone metastasis, rheumatoid arthritis and osteoarthritis.
US07781416B2 Derivatives of partially desulphated glycosaminoglycans as heparanase inhibitors, endowed with antiangiogenic activity and devoid of anticoagulating effect
Partially desulphated glycosaminoglycan derivatives are described, particularly heparin, and more particularly a compound of formula (I) where the U, R and R1 groups have the meanings indicated in the description. These glycosaminoglycan derivatives have antiangiogenic and heparanase-inhibiting activity and are devoid of anticoagulant activity.
US07781414B2 Targets for tumor growth inhibition
The present invention relates to methods for treating cancers by manipulating a target gene expression by up-regulation, silencing and/or down-regulation of the gene, such as EGFR-RP, TRA1, MFGE8, TNFSF13 and ZFP236, respectively. The methods are useful in treating cancers and/or inhibiting tumor growth by enhancing expression of a gene that is validated as a target such as ICT1030, for protein, peptide drug and gene therapy modalities; or by RNA interference to silence and/or down-regulate targets such as ICT1024, ICT1025 and ICT1031 and ICB1003 that are validated for antibody, small molecule and other inhibitor drug modalities.
US07781412B2 Biphenyl inhibitors of carbonyl reductase
Compositions of matter and methods of treating cancer patients may prevent or limit cardiotoxicity during or after chemotherapy, and/or may prevent or lower resistance to anthracycline drugs, both of which are believed to be caused by the human enzyme carbonyl reductase. Thus, the compositions and methods may be used to reduce the dosages of anthracycline anti-cancer drugs necessary to produce a desired cancer-cell-killing performance. Preferred embodiments comprise treating cancer patients with a pharmaceutical composition comprising biphenyl compounds having two halogenated (or pseudo-halogenated) and/or hydroxylated, aryl groups that are linked by a bridging atom. The preferred composition of biphenyl compound(s) may be administered in a pharmaceutical composition also comprising at least one anthracycline compound, or may be administered separately than the at least one anthracycline compound. Especially-preferred biphenyl compounds include triclosan, hexachlorophene, and dichlorophene.
US07781409B2 Composition for external use
A composition for external use, comprising 2-O-(β-D-glucopyranosyl)ascorbic acid represented by the formula (I): or a salt or ester thereof which is safe to the human body, and a koji mold or a processed koji. The composition for external use is excellent in skin permeability, containing an ascorbic acid derivative which is excellent in stability, utilized persistently in the living body, and strong in antioxidant activity, and has little skin irritation.
US07781400B2 Pharmaceutical compositions comprising dextran with a molecular weight of 1.0-100 KDA and processes for their preparation
A solid or semisolid implant obtainable by providing a liquid composition comprising an aqueous solution of dextran with molecular weight of 1.0-100 kDa and introducing the liquid composition into the body of a mammal, whereby the implant is formed in situ in the body of the mammal. A process for preparing a composition useful for biomedical application, comprising the steps of providing a liquid composition comprising an aqueous solution of dextran having a molecular weight of 1-100 kDa; and bringing the liquid composition to solidify; whereby water is gradually eliminated from the liquid composition during the solidification. A biomedical article prepared from the composition.
US07781397B2 Human plasma hyaluronidase
The invention is based on the discovery of methods for purification of an acid active hyaluronidase found in human plasma (hpHAse), including both biochemical and immunoaffinity purification methods. The method of immunoaffinity purification of the invention is based on the discovery of a method for identifying antibodies that specifically bind native hpHAse (anti-native hpHAse antibodies), and anti-native hpHAse antibodies identified by this screening method. The invention also features an assay for sensitive detection of HAse activity using biotinylated hyaluronic acid (bHA). Purification and characterization of hpHAse lead to the inventors' additional discovery that hpHAse is encoded by the LuCa-1 gene, which gene is present in the human chromosome at 3p21.3, a region associated with tumor suppression. The invention additionally features methods of treating tumor-bearing patients by administration of hpHAse and/or transformation of cells with hpHAse-encoding DNA.
US07781394B2 Methods for identifying anti-tumor and/or anti-angiogenesis drugs with deoxynucleoside 5′-monophosphate N-glycosidase as the target
The present invention relates to a novel target for identifying and/or screening antitumor and/or antiangiogenesis agents using the rcl encoded deoxynucleoside 5′monophosphate N-glycosidase.
US07781393B2 Methods for inhibiting tumor cell growth
The invention methods using a insulin-like growth factor receptor inhibitor to inhibit tumor cell growth in a subject in need thereof.
US07781388B2 Cleaning compositions for hard to remove organic material
An oxidizing cleaning composition comprises a low concentration of aqueous hydrogen peroxide that is environmentally friendly and has good stability in strong alkaline solutions. The aqueous hydrogen peroxide composition contains a synergistic combination of one or more hydrophilic surfactants having an HLB of 10 or greater, one or more hydrotropes, one or more UV-analyzable surfactants having an aromatic detectable functional group, and optionally a surfactant having an HLB of less than 10. The cleaning composition when mixed with an alkaline compound is very effective in removing dried or baked residues of polymers, modified or natural celluloses starches, natural gels, and the like at low concentrations and temperatures.
US07781386B2 Shampoo compositions containing a combination of cationic polymers
The invention provides an aqueous shampoo composition comprising: (i) one or more anionic cleansing surfactants; (ii) preferably, discrete, dispersed droplets of a water-insoluble conditioning agent with a mean droplet diameter (D3,2) of 4 micrometers or less; (iii) one or more cationic polymers (A) selected from cationically modified acrylamide polymers having a cationic charge density at pH7 of less than 1.0 meq per gram, cationically modified celluloses and mixtures thereof, and (iv) one or more cationic polymers (B) selected from cationically modified acrylamide polymers having a cationic charge density at pH7 of greater than 1.0 meq per gram, cationically modified polygalactomannans, and mixtures thereof, wherein the composition comprises a cationic polymer other than a cationically modified acrylamide polymer.
US07781384B2 Lubricant base from palm oil and its by-products
The invention relates to a biodegradable functional fluid composition based on vegetable oil. This functional fluid suitable for lubricant, hydraulic and like fluid comprises palm olein and its by-product generated from fractionation of palm oil. The by-product is esterified by a hindered alcohol prior to blend together with palm olein and additive packages. The hydraulic fluid particularly suited for tropical climate with temperature ranging from 15-40° C.
US07781383B2 Lubricant for fluid dynamic bearing, spindle motor equipped therewith and magnetic disk unit
A lubricant, comprising: a base oil as primary lubricant component, and a naphthenate salt as additive (A), and an alkylimidazole compound as additive (B), added to the base oil, preferably further comprising an aliphatic amine compound as additive (C), a fluid dynamic bearing with the lubricant filled therein, a spindle motor with the fluid dynamic bearing installed therein, and a magnetic disk device with the spindle motor installed therein.
US07781373B2 Stabilized dyes for thermal dye transfer materials
The present invention relates to a cyan dye donor element for thermal transfer imaging comprising a support having thereon a dye layer comprising a mixture of at least two cyan dyes dispersed in a polymeric binder, wherein at least one of the at least two cyan dyes is a light stabilizing dye represented by Formula I and a thermal image recording method utilizing the same cyan dye donor element. The present invention also relates to a cyan inkjet dye comprising a light stabilizing cyan dye represented by Formula I.
US07781371B2 Filter catalyst
A filter catalyst of the present invention is comprised of a catalyst-supporting substrate 1, and catalytic portions 5, 6 for purifying an exhaust gas. The catalytic portions includes the first catalytic portion 5 for purifying HC, CO and NOx, and the second catalytic portion 6 for purifying the particulates. The first catalytic portion 5 is formed on a surface of at least a portion of the cellular wall 40, and the second catalytic portion 6 is formed on an inside surface of the pores. In the filter catalyst of the present invention purifying ability of the exhaust gas is increased, and the filter catalyst of the present invention can suppress rise of the pressure loss of the exhaust gas.
US07781369B2 Mesoporous silica thick-film, process for producing the same, adsorption apparatus and adsorbing film
A mesoporous silica thick-film comprising a layer of mesoporous silica formed in a thickness of 10 μm to 1 mm, and a process for producing a mesoporous silica thick-film, which comprises disposing a substrate in a solution containing mesoporous silica suspended therein and subsequently applying a voltage thereby to form a film having a thickness of 10 μm to 1 mm by the electrophoretic deposition of the mesoporous silica on a surface of the substrate is provided.
US07781368B2 Adsorption composition and method of removing CO from streams
Carbon monoxide is removed from streams by adsorption on an adsorption composition which comprises copper, zinc and zirconium oxides and whose copper-comprising component has a degree of reduction, expressed as weight ratio of metallic copper to the sum of metallic copper and copper oxides, calculated as CuO, of at least 45% and not more than 75%.
US07781360B2 Dielectric porcelain composition and electronic component
The present invention provides a dielectric porcelain composition comprising 100 parts by weight of a barium titanate-based dielectric material and 4 to 10 parts by weight in total of Bi2O3 and at least one compound selected from the group of consisting of CuO, ZnO and MgO.
US07781359B2 High-frequency dielectric material
There is provided a high-frequency dielectric material that has a high relative permittivity, a high Q value, and a TCF property value close to zero (0) and can realize co-firing of the dielectric material with silver (Ag) and copper (Cu). The high-frequency dielectric material is characterized by comprising a composition of main constituent materials having a formulation of CaO: 1 mole, Nb2O5: (1−α×β)/3 mole, ZnO: (1−α)/3 mole, TiO2: γ mole, and Li2O: α×(1−β)/6 mole, wherein 0.65≦α≦0.75, 0.09≦β≦0.15, 0.066≦α×β≦0.100, and 0.15≦γ≦0.35; and 1 to 5 parts by weight, based on 100 parts by weight of the composition of main constituent materials, of a sintering aid selected from the group consisting of oxides of copper (Cu), boron (B), lithium (Li), bismuth (Bi), and vanadium (V) and a mixture of two or more of the oxides.
US07781357B2 Dielectric ceramic composition
A dielectric ceramic composition comprising forsterite in an amount of 93.0 to 99.0 mol % when calculating in terms of 2MgO.SiO2 and calcium titanate in an amount of 1.0 to 7.0 mol % when calculating in terms of CaTiO3 as main components, and as a subcomponent, aluminum oxide in an amount of 0.2 to 5 mass % when calculating in terms of Al2O3 per 100 mass % of said main components. According to the present invention, a dielectric ceramic composition, capable of having both low permittivity and good frequency-temperature characteristic as well as ensuring high Qf value and further having sufficient mechanical strength, and suitable to use in an antenna, a filter and the like used in the high-frequency region, can be provided. Also, the present invention allows providing a dielectric ceramic composition further having resistance to reduction in addition to all of the above properties.
US07781349B2 Method and system for optimizing a BARC stack
In the present invention, a BARC stack comprising at least a first BARC layer and at least a second BARC layer is optimized for reducing substrate reflectivity in lithographic processing applications. The first BARC layer is positioned adjacent the resist layer, while the second BARC layer is positioned adjacent the first BARC layer. The optical parameters of the first BARC layer are determined to be slightly different from the optical parameters of the resist, thus resulting in a small optical step at the interface resist/first BARC. Furthermore, the second BARC may be selected to have optical parameters such that the optical step at the interface first BARC/second BARC is slightly larger but still relatively small compared to the optical step between resist and substrate. The thicknesses for the BARC layers can be determined from substrate reflectivity calculations. The latter allows obtaining a low substrate reflectivity for various pitches in a pattern to be printed.
US07781348B2 Method of forming an organic light-emitting display with black matrix
A method of forming an organic light-emitting display (OLED) includes the steps of providing a substrate, forming a black matrix on the substrate, forming a buffer layer on the black matrix, forming an active layer on the buffer layer, simultaneously patterning the black matrix and the buffer layer, and forming a display electrode and a thin film transistor over the buffer layer.
US07781346B2 Methods of forming patterns and capacitors for semiconductor devices using the same
A semiconductor structure may be formed by a wet etching process using an etchant containing water. The semiconductor structure may include a plurality of patterns having an increased or higher aspect ratio and may be arranged closer to one another. A dry cleaning process may be performed using hydrogen fluoride gas on the semiconductor structure.
US07781342B2 Substrate treatment method for etching a base film using a resist pattern
A substrate treatment method which includes a developing step of developing a resist film on a substrate to form a resist pattern on the substrate, and thereafter includes an etching step of etching a base film using the resist pattern as a mask. The substrate treatment method, between the developing step and the etching step, supplies a fluorine-based liquid to the resist pattern to form a protection film with a high fluorine density on a surface of the resist pattern.
US07781340B2 Method and system for etching high-k dielectric materials
A system and a method to remove a layer of high-k dielectric material during the manufacturing of an integrated circuit. In one embodiment of the invention, an etch reactant is employed to form volatile etch products when reacted with high-k layers. Alternately, high-k layers can be anisotropically etched of in accordance with a patterned photoresist or hard mask, where a hyperthermal beam of neutral atoms is used to aid in the reaction of an etch reactant with a high-k layer. Alternately, a hyperthermal beam of neutral atoms or a plasma treatment can used to modify a high-k layer, and subsequently etch the modified high-k layer utilizing an etch reactant that reacts with the modified high-k layer. In still another embodiment of the invention, the hyperthermal beam of neutral atoms is used to etch a high-k layer through physical bombardment of the high-k layer.
US07781335B2 Method for fabricating semiconductor device
A method for fabricating a semiconductor device includes the steps of: (a) forming a first insulating film having moisture absorbency on a substrate; (b) forming a dummy contact hole and a contact hole in the first insulating film; (c) heat-treating the substrate, thereby removing water contained in the first insulating film; and (d) forming a contact and a dummy contact. The heat treatment in the step (c) removes water contained in the first insulating film through the contact hole and the dummy contact hole.
US07781324B2 Method of producing wire-connection structure, and wire-connection structure
For electrically connecting a wiring formed on one surface of an insulating substrate such as an FPC to an individual electrode arranged facing the other surface of the substrate, firstly, a through hole and a notch are formed by irradiating a laser beam from above onto the FPC. Next, the FPC is arranged to be positioned such that the individual electrode, the through hole and the notch are overlapped in a plan view. Next, an electroconductive liquid droplet having a diameter greater than a width of the notch is jetted, toward an area formed with the notch, from the one surface side of the FPC. The landed electroconductive liquid droplet flows along the notch in a thickness direction of the substrate due to an action of a capillary force and reaches assuredly to the individual electrode, thereby electrically connecting the wiring and electrode arranged sandwiching the insulating substrate assuredly.
US07781321B2 Electroless metal deposition for dual work function
The present invention, in one embodiment provides a method of forming a semiconducting device including providing a substrate including a semiconducting surface, the substrate comprising a first device region and a second device region; forming a high-k dielectric layer atop the semiconducting surface of the substrate; forming a block mask atop the second device region of the substrate, wherein the first device region of the substrate is exposed; forming a first metal layer atop the high-k dielectric layer present in the first device region of the substrate; removing the block mask to expose a portion of the high-k dielectric layer in the first device region of the substrate; forming a second metal layer atop the portion of the high-k dielectric layer in the second device region and atop the first metal in the first device region of the substrate; and forming gate structures in the first and second device regions of the substrate.
US07781318B2 Semiconductor device and method of manufacturing the same
Disclosed are a semiconductor device and a method for manufacturing the same, capable of improving the performance of a barrier and inhibiting a discontinuous step coverage and an overhang. The semiconductor device includes an interlayer dielectric layer having a via hole disposed on a semiconductor substrate, a first layer disposed in the via hole and including ruthenium (Ru), a second layer disposed on the first layer and including ruthenium oxide (RuO2), and a metal line disposed on the second layer and including a copper material.
US07781316B2 Methods of manufacturing metal-silicide features
A method of manufacturing a microelectronic device including forming a dielectric layer surrounding a dummy feature located over a substrate, removing the dummy feature to form an opening in the dielectric layer, and forming a metal-silicide layer conforming to the opening by a metal deposition process employing a target which includes metal and silicon. The metal-silicide layer may then be annealed.
US07781315B2 Finfet field effect transistor insulated from the substrate
A finFET field effect transistor is produced by the formation of an electrical junction between the thin fin portion of semiconductor material which forms the channel of the transistor and the circuit substrate. Doping particles are implanted in the substrate through a mask which is then subsequently used to form the thin fin portion of the channel. The channel of the finFET transistor is thus electrically insulated from the circuit substrate in the same manner as in MOS integrated circuits realized from bulk silicon substrates.
US07781314B2 Nitride semiconductor device manufacturing method
Affords a manufacturing method enabling nitride-based semiconductor devices containing epitaxial films excelling in flatness and crystallinity to be easily produced. Method of manufacturing nitride semiconductor devices that are formed onto a semiconductor substrate being a compound containing nitrogen, and a Group IIIA element for forming compounds with nitrogen, including steps of: heating the semiconductor substrate (1) to a film-deposition temperature; supplying to the substrate a film-deposition gas containing a source gas for the Group IIIA element and a nitrogen source gas; and epitaxially growing onto the semiconductor substrate a thin film (2) of a compound containing nitrogen and the Group IIIA element; and being furnished with a step, in advance of the epitaxial growth step, of heating the semiconductor substrate to a pretreating temperature less than the film-deposition temperature, to clean the surface of the semiconductor substrate.
US07781310B2 Semiconductor die singulation method
In one embodiment, semiconductor die are singulated from a semiconductor wafer by etching openings completely through the semiconductor wafer.
US07781309B2 Method for manufacturing direct bonded SOI wafer and direct bonded SOI wafer manufactured by the method
A direct bonded SOI wafer having an entire buried oxide film layer covered and not exposed is manufactured by: (A) forming a laminated body by laminating a semiconductor wafer and a support wafer via an oxide film; and (B) forming a thin-film single crystal silicon layer on the support wafer using a buried oxide film layer by film-thinning the semiconductor wafer to a predetermined thickness. In a process (C) the entire buried oxide film layer is covered by a main surface on the laminating side of the support wafer and the single crystal silicon layer. The covering of the entire buried film layer is carried out by, between process (A) and (B), removing the oxide film formed on the circumferential end edge of the main surface on the laminating side and the chamfered portion to leave the oxide film only on the laminated surface except the circumferential end edge.
US07781308B2 Method for manufacturing SOI substrate
A second single crystal semiconductor film is formed over a first single crystal semiconductor film; a separation layer is formed by addition of ions into the second single crystal semiconductor film; a second insulating film functioning as a bonding layer is formed over the second single crystal semiconductor film; a surface of a first SOI substrate and a surface of a second substrate are made to face each other, so that a surface of the second insulating film and the surface of the second substrate are bonded to each other; and then heat treatment is performed to cause cleavage at the separation layer, so that a second SOI substrate in which a part of the second single crystal semiconductor film is provided over the second substrate with the second insulating film interposed therebetween is formed.
US07781302B2 Methods of fabricating semiconductor devices having isolation regions formed from annealed oxygen ion implanted regions
Methods of fabricating a semiconductor device include forming a mask pattern on a semiconductor substrate and which exposes defined regions of the semiconductor substrate. Oxygen ions are implanted into the defined regions of the semiconductor substrate using the mask pattern as an ion implantation mask. The oxygen ion implanted regions of the semiconductor substrate are annealed at one or more temperatures in a range that is sufficiently high to form silicon oxide substantially throughout the oxygen ion implanted regions by reacting the implanted oxygen ions with silicon in the oxygen ion implanted regions, and that is sufficiently low to substantially prevent oxidation of the semiconductor substrate adjacent to the oxygen ion implanted regions.
US07781300B2 Method for producing mixed stacked structures, different insulating areas and/or localised vertical electrical conducting areas
The invention relates to a method for producing a semiconducting structure including: controlled formation, through a mask (31), in a first substrate (30) in a semiconducting material, of at least one first area in an insulating material (36), up to the level of the lower surface (35) of the mask, before or during the removal of the mask.
US07781296B2 Integrated circuit comprising a capacitor with metal electrodes and process for fabricating such a capacitor
An integrated circuit (IC) includes at least one capacitor with metal electrodes. At least one of the electrodes (10 or 30) is formed from at least surface-silicided hemispherical grain silicon or silicon alloy. A fabrication process for obtaining such a capacitor with silicided metal electrodes is also provided.
US07781295B1 System and method for providing a single deposition emitter/base in a bipolar junction transistor
A system and method is disclosed for manufacturing a bipolar junction transistor that comprises an emitter/base layer that is formed by a single deposition process. In one advantageous embodiment of the invention the emitter/base layer comprises an emitter layer that comprises an epitaxially grown mono-silicon emitter. The epitaxially grown mono-silicon emitter significantly reduces the electrical resistivity of the emitter. A non-dopant impurity such as germanium is added to the base layer to endpoint a dry plasma etch process that is applied to etch the emitter/base layer.
US07781289B1 Method for fabricating higher quality thicker gate oxide in a non-volatile memory cell and associated circuits
A non-volatile memory cell includes a program transistor and a control capacitor. A portion of a substrate associated with the program transistor is exposed to multiple implantations (such as DNW, HiNWell, HiPWell, and P-well implantations). Similarly, a portion of the substrate associated with the control capacitor is exposed to multiple implantations (such as DNW, HiNWell, HiPWell, P-well, and N-well implantations). These portions of the substrate may have faster oxidation rates than other portions of the substrate, allowing a thicker front-end gate oxide to be formed over these portions of the substrate. In addition, a rapid thermal process anneal can be performed, which may reduce defects in the front-end gate oxide and increase its quality without having much impact on the oxide over the other portions of the substrate.
US07781288B2 Semiconductor structure including gate electrode having laterally variable work function
A semiconductor structure, such as a CMOS structure, includes a gate electrode that has a laterally variable work function. The gate electrode that has the laterally variable work function may be formed using an angled ion implantation method or a sequential layering method. The gate electrode that has the laterally variable work function provides enhanced electrical performance within an undoped channel field effect transistor device.
US07781285B2 Semiconductor device having vertical transistor and method of fabricating the same
There are provided a semiconductor device having a vertical transistor and a method of fabricating the same. The method includes preparing a semiconductor substrate having a cell region and a peripheral circuit region. Island-shaped vertical gate structures two-dimensionally aligned along a row direction and a column direction are formed on the substrate of the cell region. Each of the vertical gate structures includes a semiconductor pillar and a gate electrode surrounding a center portion of the semiconductor pillar. A bit line separation trench is formed inside the semiconductor substrate below a gap region between the vertical gate structures, and a peripheral circuit trench confining a peripheral circuit active region is formed inside the semiconductor substrate of the peripheral circuit region. The bit line separation trench is formed in parallel with the column direction of the vertical gate structures. A bit line separation insulating layer and a peripheral circuit isolation layer are formed inside the bit line separation trench and the peripheral circuit trench, respectively.
US07781284B2 Semiconductor device and method of manufacturing the same
There is provided a semiconductor device which comprises a first interlayer insulating film (first insulating film) formed over a silicon (semiconductor) substrate, a capacitor formed on the first interlayer insulating film and having a lower electrode, a dielectric film, and an upper electrode, a fourth interlayer insulating film (second insulating film) formed over the capacitor and the first interlayer insulating film, and a metal pattern formed on the fourth interlayer insulating film over the capacitor and its periphery to have a stress in an opposite direction to the fourth interlayer insulating film. As a result, characteristics of the capacitor covered with the interlayer insulating film can be improved.
US07781283B2 Split-gate DRAM with MuGFET, design structure, and method of manufacture
A method of manufacturing a dynamic random access memory cell includes: forming a substrate having an insulating region over a conductive region; forming a fin of a fin-type field effect transistor (FinFET) device over the insulating region; forming a storage capacitor at a first end of the fin; and forming a back-gate at a lateral side of the fin. The back-gate is in electrical contact with the conductive region and is structured and arranged to influence a threshold voltage of the fin.
US07781281B2 Method of fabricating self-aligned contact pad using chemical mechanical polishing process
A method of fabricating a self-aligned contact pad (SAC) includes forming stacks of a conductive line and a capping layer on a semiconductor substrate, spacers covering sidewalls of the stacks, and an insulation layer filling gaps between the stacks and exposing the top of the capping layer, etching the capping layer to form damascene grooves, forming a plurality of first etching masks with a material different from that of the capping layer to fill the damascene grooves without covering the top of the insulation layer, and forming a second etching mask having an opening region that exposes some of the first etching masks and a portion of the insulation layer located between the first etching masks. The method further includes etching the portion of the insulation layer exposed by the opening region using the first and second etching masks to form a plurality of opening holes, removing the second etching mask, forming a conductive layer filling the opening holes to cover the remaining first etching masks and performing a chemical mechanical polishing (CMP) process on the conductive layer using the capping layer as a polishing end point to remove the first etching masks such that a plurality of SAC pads separated from each other are formed that fill the opening holes.
US07781278B2 CMOS devices having channel regions with a V-shaped trench and hybrid channel orientations, and method for forming the same
The present invention relates to a field effect transistor (FET) containing a channel extending perpendicularly across at least one V-shaped trench and along the interior surfaces thereof. In one aspect, a semiconductor device is provided that includes a semiconductor substrate having first and second device regions that are isolated from each other by an isolation region. The first device region has a planar surface with a first crystalline orientation, and the second device region has at least one V-shaped trench which has interior surfaces with a second, different crystalline orientation. A first FET is located at the first device region and contains a channel extending along the planar surface of the first device region. A second, complementary FET is located at the second device region and contains a channel extending perpendicularly across the at least one V-shaped trench and along the interior surfaces thereof.
US07781266B2 Methods and apparatus for improved thermal performance and electromagnetic interference (EMI) shielding in leadframe integrated circuit (IC) packages
A method of assembling an IC device package is provided. A leadframe is formed. At least one IC die is attached to a die attach pad portion of the leadframe. Wire bonds are coupled between the IC die and the leadframe. A cap is attached to the leadframe. A second surface of the cap includes a cavity formed therein. The cap and leadframe form an enclosure structure that substantially encloses the at least one IC die. An encapsulating material is applied to encapsulate at least the IC die. A perimeter support ring portion of the leadframe is trimmed.
US07781265B2 DFN semiconductor package having reduced electrical resistance
A dual flat non-leaded semiconductor package is disclosed. A method of making a dual flat non-leaded semiconductor package includes forming a leadframe having a die bonding area with an integral drain lead, a gate lead bonding area and a source lead bonding area, the gate lead bonding area and a source lead bonding area being of increased area; bonding a die to the die bonding area; coupling a die source bonding area to the source lead bonding area; coupling a die gate bonding area to the gate lead bonding area; and partially encapsulating the die, the drain lead, the gate lead and the source lead to form the dual flat non-leaded semiconductor package.
US07781263B2 Systems, devices, and methods for semiconductor device temperature management
Devices, systems, and methods for semiconductor die temperature management are described and discussed herein. An IC device is described that includes at least one intra-die cooling structure. In an embodiment, the IC device includes a semiconductor die formed of integral device layers and further includes at least one coolant reservoir and at least one coolant channel. In an embodiment, the at least one coolant reservoir and at least one coolant channel are disposed wholly within the semiconductor die. In various embodiments, at least one coolant reservoir and at least one coolant channel are constructed and arranged to circulate coolant fluid in proximity to at least one IC device structure in order to decrease and or normalize an operating temperature of the IC device. In other embodiments, systems and methods for designing and/or fabricating IC die that include at least one intra-die cooling structure are provided herein.
US07781262B2 Method for producing semiconductor device and semiconductor device
The method of producing a semiconductor device in which chips are resin-molded, including steps of: preparing frames having front and back surfaces and die pads; preparing an insulation resin sheet having a first and a second surfaces; preparing a resin-sealing metal mold having cap pins; mounting the resin sheet inside the resin-sealing metal mold in such a manner that the second surface of the resin sheet contacts an inner bottom surface of the resin-sealing metal mold; mounting power chips on the surfaces of the die pads; positioning the frames on the first surface of the resin sheet in such a manner that the back surfaces of the die pads contact the first surface of the resin sheet; pressing the die pads toward the resin sheet using the cap pins and fixing the die pads; injecting a sealing resin in the resin-sealing metal mold and hardening the sealing resin; and removing the semiconductor device in which the power chips are molded with the sealing resin out from the resin-sealing metal mold. The resin sheet may include a metal foil which is disposed to the second surface.
US07781261B2 Integrated circuit package system with offset stacking and anti-flash structure
An integrated circuit package system includes: mounting a device structure in an offset location over a carrier with the device structure having a bond pad and a contact pad; connecting an electrical interconnect between the bond pad and the carrier; forming an anti-flash structure over the device structure with the anti-flash structure exposing the contact pad; and forming a package encapsulation adjacent to the anti-flash structure and over the carrier.
US07781260B2 Methods of forming nano-coatings for improved adhesion between first level interconnects and epoxy under-fills in microelectronic packages and structures formed thereby
Methods and associated structures of forming microelectronic devices are described. Those methods may include coating an interconnect structure disposed on a die with a layer of functionalized nanoparticles, wherein the functionalized nanoparticles are dispersed in a solvent, heating the layer of functionalized nanoparticles to drive off a portion of the solvent, and applying an underfill on the coated interconnect structure.
US07781257B2 Electrical switching device and method of embedding catalytic material in a diamond substrate
An electrical switching device (30) is disclosed. The device comprises a diamond substrate (24), a cathode (34) in contact with the substrate and having electrically conductive emitters (32) extending into the substrate, and an upper electrode (36) in contact with the substrate and spaced from the cathode.
US07781256B2 Semiconductor-on-diamond devices and associated methods
Semiconductor devices and methods for making such devices are provided. One such method may include forming an epitaxial layer of single crystal SiC on a single crystal Si growth substrate, forming an epitaxial diamond layer on the layer of SiC, forming a Si layer on the diamond layer, bonding a SiO2 surface of a Si carrier substrate to the Si layer, and removing the Si growth substrate to expose the SiC layer. In yet another aspect, a semiconductor layer may be deposited onto the SiC layer. The semiconductor layer may further be deposited epitaxially.
US07781254B2 Nanoporous fullerene layers and their use in organic photovoltaics
The present invention provides a process for forming a substrate for an organic semiconductor component. The process includes the steps of providing a fullerene network (10), providing a semiconductor solution (12), and applying the semiconductor solution (12) to the fullerene network (10), the viscosity of the semiconductor solution (12) being so adjusted that the semiconductor solution (12) infiltrates the pores of the fullerene network (10) and fills it so that the filled network forms a substrate (2). Further provided is a substrate comprising a fullerene network, composed of pure, unsubstituted fullerenes (10), and a semiconductor solution (12). Additionally provided is an organic semiconductor component, particularly an organic solar cell or an organic photodetector, that contains the inventive substrate.
US07781253B2 Image sensor and method of manufacturing the same
An image sensor including a first epitaxial layer formed over a semiconductor substrate; first photodiodes formed spaced apart in the first epitaxial layer; a first isolation region electrically isolating the first photodiodes from each other; a second epitaxial layer formed over the first epitaxial layer; second photodiodes formed spaced apart in the second epitaxial layer; and a second isolation region electrically isolating the second photodiodes from each other.
US07781244B2 Method of manufacturing nitride-composite semiconductor laser element, with disclocation control
A nitride semiconductor laser device with a reduction in internal crystal defects and an alleviation in stress, and a semiconductor optical apparatus comprising this nitride semiconductor laser device. First, a growth suppressing film against GaN crystal growth is formed on the surface of an n-type GaN substrate equipped with alternate stripes of dislocation concentrated regions showing a high density of crystal defects and low-dislocation regions so as to coat the dislocation concentrate regions. Next, the n-type GaN substrate coated with the growth suppressing film is overlaid with a nitride semiconductor layer by the epitaxial growth of GaN crystals. Further, the growth suppressing film is removed to adjust the lateral distance between a laser waveguide region and the closest dislocation concentrated region to 40 μm or more.
US07781243B2 Method of manufacturing display substrate, method of patterning inorganic layer and method of manufacturing display device using the same
A method of manufacturing a display substrate includes forming a plurality of thin film transistors (TFTs) on a first substrate in a matrix, forming a plurality of pixel electrodes connected to the TFTs, forming a connecting pad to receive a common voltage, forming an organic pattern on the connecting pad, depositing an inorganic alignment layer covering the organic pattern on the first substrate, and removing the organic pattern and the inorganic alignment layer remaining on the organic pattern.
US07781239B2 Semiconductor device defect type determination method and structure
A semiconductor defect type determination method and structure. The method includes providing a semiconductor wafer comprising a first field effect transistor (FET) comprising a first type of structure and a second FET comprising a second different type of structure. A first procedure is performed to determine if a first current flow exists between a first conductive layer formed on the first FET and a second conductive layer formed on the first FET. A second procedure is performed to determine if a second current flow exists between a third conductive layer formed the second FET and a fourth conductive layer formed on the second FET. A determination is made from combining results of the first procedure and results of the second procedure that the first FET and the second FET each comprise a specified type of defect.
US07781237B2 Alignment marker and lithographic apparatus and device manufacturing method using the same
An apparatus includes a first support structure configured to support an element that has an alignment marker provided with at least one height difference. The apparatus also includes an alignment sensor comprising a light source that is configured to provide a light beam that illuminates the alignment marker; and at least one detector configured to detect the at least one height difference of the alignment marker by analyzing the light beam reflected by the alignment marker. Such an apparatus may be used to align of the element with respect to the first support structure.
US07781236B2 Optical element mounting method and optical element mounting device
An optical element mounting method includes: illuminating ultraviolet light onto a polymer optical waveguide device; under the ultraviolet light illumination, capturing, by an image pickup device, the polymer optical waveguide device including a light incident/exiting position of a waveguide core; and judging, from a difference between bright and dark in a captured image, that a portion brighter than other portions or a portion darker than other portions is the light incident/exiting position of the waveguide core.
US07781230B2 Electro-resistance element, electro-resistance memory using the same and method of manufacturing the same
An electro-resistance element that has a different configuration from conventional elements and is excellent in both affinity with semiconductor manufacturing processes and resistance change characteristics is provided. An electro-resistance element has two or more states in which electric resistance values between a pair of electrodes and is switchable from one of the two or more states into another by applying a predetermined voltage or current between the electrodes. The electro-resistance element includes a substrate and a multilayer structure disposed on the substrate, the multilayer structure includes an upper electrode, a lower electrode and an electro-resistance layer disposed between the electrodes, wherein the electro-resistance layer includes Fe2O3, and Fe3O4 contained in an amount of 0% to 20% of Fe2O3 in percent by weight, the lower electrode is made of an iron oxide having a different composition from the electro-resistance layer and containing Fe3O4, and the electro-resistance layer and the lower electrode make contact with each other.
US07781227B2 Multiplex microparticle system
Arrays of microparticle populations, each population labeled with a single fluorescent dye, are provided for use in multiplex assays. The populations form a virtual multidimensional array wherein each microparticle is identified by fluorescence intensity in two different fluorescence detection channels. The arrays are useful in a variety of assays, including multiplex, multi-analyte assays for the simultaneous detection of two or more analytes by, for example, flow cytometry, and a labeling reagents in, for example, microscopy. The use of singly-dyed microparticles to form multidimensional arrays greatly simplifies the creation of multiplex assays.
US07781225B2 Surface layer affinity-chromatography
There is described an affinity-chromatography assay system comprising with an immobilized component containing a bio-reagent and a flowable component containing a complimentary bio-reagent characterized in that the immobilized component is supported on a dip strip or planar surface and the flowable component is adapted to flow down the dip strip of high density. There is also described a method of conducting an affinity-chromatography assay which comprises the use of such an assay system.
US07781222B2 Temperature-adjusted analyte determination for biosensor system
A biosensor system determines analyte concentration from an output signal generated by an oxidation/reduction reaction of the analyte. The biosensor system adjusts a correlation for determining analyte concentrations from output signals at one temperature to determining analyte concentrations from output signals at other temperatures. The temperature-adjusted correlation between analyte concentrations and output signals at a reference temperature may be used to determine analyte concentrations from output signals at a sample temperature.
US07781215B2 Vertebrate embryonic pattern-inducing proteins, and uses related thereto
The present invention concerns the discovery that proteins encoded by a family of vertebrate genes, termed here hedgehog-related genes, comprise morphogenic signals produced by embryonic patterning centers, and are involved in the formation of ordered spatial arrangements of differentiated tissues in vertebrates. The present invention makes available compositions and methods that can be utilized, for example to generate and/or maintain an array of different vertebrate tissue both in vitro and in vivo.
US07781206B2 Systems and methods for effecting a physical change in a biological sample
The present invention relates generally to systems and methods for processing a biological sample that result in a physical change, such as reacting two molecules together to form a reaction product or for use in lysing viruses or biological cells for analysis using biological assay systems. As such, the present invention relates both to breaking apart biological species such as viruses and cells, as well as the formation of reactants from one or more reactive species. The sample has a volume in the range from about 1 microliter to 10 milliliters. The sample is processed by applying pressure, and either sonic energy or thermal energy to the sample, wherein the pressure achieved is usually at least 24 atmospheres, and the temperature of the sample is usually raised to at least 50° C.
US07781201B2 Polypeptides having amylase activity and methods of making and using them
This invention relates generally to polypeptides and peptides having an amylase activity, e.g., enzymes, polynucleotides encoding the enzymes, the use of such polypeptides and peptides. In one aspect, the polypeptides having amylase activity have increased activity and stability at acidic, neutral and alkaline pH and increased temperature. In one aspect, the invention provides methods for producing an alcohol, for producing a high-maltose or a high-glucose syrup or a mixed syrup, for liquifying a starch-comprising composition, comprising use of polypeptides having amylase activity of the invention.
US07781200B2 Polypeptides having lipase activity and polynucleotides encoding same
The present invention relates to a new wild-type lipase, its nucleic acid sequences and the amino acid sequences thereof. This new lipase shows washing performance in the form of wild-type. The present invention also relates to the method for producing the lipase and the uses of the lipase in baking.
US07781198B2 Polymerase-encoding nucleic acids and method of making and using them
The invention relates to thermostable polymerases that have polymerase activity temperatures in the range from 90° C. up to 113° C., such as those derived from Pyrolobus fumaria, and to polynucleotides encoding the polymerases In addition, methods of designing new thermostable DNA polymerases and methods of use thereof are also provided. The polymerases have increased activity and stability at increased pH and temperature.
US07781194B2 Method for using biomass in biogas process
The invention relates to a method for using biomass in a biogas process. The aim of the invention is to use substrates having a high nitrogen and solid content, and which using a small amount of water, has very good energy balance and is particularly environmentally friendly. Said aim is achieved by the virtue of the fact that the substrate is treated with a recirculated product in order to form a pumpable medium, and additionally treated with bacteria in cyclones and fermenters, which simultaneously removes the nitrogen in a stripping process, separates the solid fermentation radicals and further uses the recirculated product as a heat-exchanger and reaction medium. Said process is environmentally friendly and has a very good energy balance.
US07781191B2 Treatment of biomass to obtain a target chemical
Target chemicals were produced using biocatalysts that are able to ferment sugars derived from treated biomass. Sugars were obtained by pretreating biomass under conditions of high solids and low ammonia concentration, followed by saccharification.
US07781189B2 Catalyzing transglycosylation using a recombinant host cell overexpressing uridine phosphorylase and purine nucleoside phosphorylase
Novel strains of genetically modified prokaryotic micro-organisms capable of expressing polypeptides having the enzyme activity of the enzymes uridine phosphorylase (UdP) and purine nucleoside phosphorylase (PNP) are described; the strains in question can be used, both in the form of whole cells and in the form of crude or purified extracts, to catalyse transglycosylation reactions between a donor nucleoside and an acceptor base with particularly high yields. The associated plasmid vectors are also described.
US07781185B2 Apparatus and method for testing liquid samples
An article for holding a liquefied sample for the quantification of biological material in the sample includes a device having a reaction chamber enclosing a volume therein, the reaction chamber having an upper opening through which a liquefied sample can be poured and a plurality of discrete non-permeable compartments, each of the compartments having an upper rim and being configured and dimensioned to hold separate aliquots of a liquefied sample therein; and a gasket lid removably secured to the top of the device, the gasket lid being configured and dimensioned for sealing the upper rim of each compartment to prevent liquid communication between the compartments.
US07781183B2 Inhibition of anthrax lethal factor protease
Disclosed herein is a pharmacophore model for inhibiting anthrax lethal factor protease activity which comprises a first aromatic center A, a second aromatic center B, a first polar center C, a second polar center D, a third polar center E, and a neutral linker F. Also disclosed are small molecules fitting the pharmacophore model and compositions and methods of using thereof.
US07781181B2 Human T1R2 polypeptide functional assays
Newly identified mammalian taste-cell-specific G protein-coupled receptors, and the genes and cDNA encoding said receptors are described. Specifically, T1R G protein-coupled receptors active in taste signaling, and the genes and cDNA encoding the same, are described, along with methods for isolating such genes and for isolating and expressing such receptors. Methods for representing taste perception of a particular taste stimulus in a mammal are also described, as are methods for generating novel molecules or combinations of molecules that elicit a predetermined taste perception in a mammal, and methods for simulating one or more tastes. Further, methods for stimulating or blocking taste perception in a mammal are also disclosed.
US07781180B2 Marker proteins for diagnosing liver disease and method of diagnosing liver disease using the same
Using the protein chip technology, biological samples such as sera are subjected to proteome analysis. Thus, a protein which is a human fibrinogen α-E chain decomposition product and has a molecular weight of 5,900, a protein which is an apolipoprotein AII decomposition product and has a molecular weight of 7,800, and a protein which is an apolipoprotein AI decomposition product and has a molecular weight of 28,000, each showing an increase or a decrease with the habit of drinking, are newly found out. By detecting or quantifying these proteins, a liver disease in a subject such as one having a problem of drinking can be diagnosed at the early stage.
US07781177B2 Measurement of GGA proteins for diagnosing BACE associated disease
The invention relates to methods and products for diagnosing, preventing, and treating Alzheimer's disease and abnormal production of amyloid β.
US07781173B2 Homogeneous populations of molecules
The invention provides populations of molecules that are prepared as, or treated to become, homogeneous for one or more molecular characteristics. In an aspect, the invention relates to molecular weight standards that may be used to determine the molecular weight or apparent molecular weight of uncharacterized molecules, such as proteins and nucleic acids, as well as in other applications. In one aspect, the molecular weight standards are pre-stained.
US07781171B2 Mehod of pretreating sample and immunological assay method using the same
The invention provides a method of pretreating a sample for conveniently, quickly and accurately measuring the total amount of adiponectin present in a biological sample contaminated with various adiponectin multimers.The method of measuring an sample for immunologically assaying the total amount of adiponectin present in the sample comprises reacting, with an adiponectin-containing sample, at least one of a reducing agent, an acid or a salt thereof, a surfactant, and a protease.
US07781168B2 Genetic polymorphisms associated with myocardial infarction, methods of detection and uses thereof
The present invention is based on the discovery of genetic polymorphisms that are associated with myocardial infarction. In particular, the present invention relates to nucleic acid molecules containing the polymorphisms, variant proteins encoded by such nucleic acid molecules, reagents for detecting the polymorphic nucleic acid molecules and proteins, and methods of using the nucleic acid and proteins as well as methods of using reagents for their detection.
US07781165B2 Benzimidazolium compounds and salts of benzimidazolium compounds for nucleic acid amplification
The present invention is directed to the use of a benzimidazolium compound comprising a side chain at at least one of its N-residues, said chain being either a Cn-alkyl or a substituted Cn-alkyl, characterized in that preferably n is ≧3, as an additive for a nucleic acid amplification reaction.