最新美国发明专利第2010-06-08期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

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US07733708B2	Semiconductor memory device, memory system having the same, and swing width control method thereof A semiconductor memory device that may include output drivers, each of which varies a data swing width in response to a correction code, and one or more data swing width control portions. Each of the data swing width control portions may correspond to an output driver, may vary the correction code according to a data swing width of the corresponding output driver to change the data swing width to a correction swing width, and then varies the correction code again to the extent that data of the corresponding output driver are normally transmitted, which may reduce the data swing width.
US07733704B2	Non-volatile memory with power-saving multi-pass sensing Power-saving techniques are employed in sensing a group of non-volatile memory cells in parallel. One technique is that the coupling of the memory cells to their bit lines is delayed during a precharge operation in order to reduce the cells' currents working against the precharge. Another technique is that a power-consuming precharge period is minimized by preemptively starting the sensing in a multi-pass sensing operation. High current cells not detected as a result of the premature sensing will still be able to be detected in a subsequent pass.
US07733703B2	Method for non-volatile memory with background data latch caching during read operations Part of the latency from memory read or write operations is for data to be input to or output from the data latches of the memory via an I/O bus. Methods and circuitry are present for improving performance in non-volatile memory devices by allowing the memory to perform some of these data caching and transfer operations in the background while the memory core is busy with a read operation. A read caching scheme is implemented for memory cells where more than one bit is sensed together, such as sensing all of the n bits of each memory cell of a physical page together. The n-bit physical page of memory cells sensed correspond to n logical binary pages, one for each of the n-bits. Each of the binary logical pages is being output in each cycle, while the multi-bit sensing of the physical page is performed every nth cycles.
US07733700B2	Method and structures for highly efficient hot carrier injection programming for non-volatile memories A method programs a memory cell by controlling a reverse bias voltage across the PN junction between a source electrode of a MOSFET in the memory cell and the substrate, and pulling back the pinch-off point of the inversion region toward the source electrode, thereby increasing the programming efficiency of the memory cell. The method applies the main positive supply voltage Vcc to, the drain electrode of the memory cell from the chip main voltage supply, rather than the conventional method of using a higher voltage than Vcc. To optimize the programming condition, the source voltage and the substrate voltage are adjusted to achieve the maximum threshold voltage shifts under the same applied gate voltage pulse condition (i.e. using the gate pulse with the same voltage amplitude and duration regardless of the source voltage and the substrate voltage). The substrate voltage to the drain voltage can not exceed the avalanche multiplication junction breakdown for a small programming current during the bias voltage adjustment.
US07733699B2	Mimicking program verify drain resistance in a memory device A selected word line is biased with a program verify voltage. A predetermined quantity of unselected word lines that are between the selected word line and the bit line are biased with a modified Vpass voltage that is determined in response to a predetermined drain resistance. In one embodiment, the predetermined quantity is all of the word lines. Other embodiments can use smaller quantities. The remaining unselected word lines are biased with a normal Vpass voltage. The modified Vpass changes the resistance of the memory cells, acting as pass-gates during the program verification operation, to mimic a resistance of already programmed memory cells.
US07733698B2	Memory device, a non-volatile semiconductor memory device and a method of forming a memory device A memory device having an array portion including memory cells, and a peripheral portion including conductive lines is disclosed. In one embodiment, portions of the conductive lines adjoin a surface of a semiconductor carrier.
US07733696B2	Non-volatile memory devices including local control gates on multiple isolated well regions and related methods and systems A non-volatile integrated circuit memory device may include a semiconductor substrate having first and second electrically isolated wells of a same conductivity type. A first plurality of non-volatile memory cell transistors may be provided on the first well, and a second plurality of non-volatile memory cell transistors may be provided on the second well. A local control gate line may be electrically coupled with the first and second pluralities of non-volatile memory cell transistors, and a group selection transistor may be electrically coupled between the local control gate line and a global control gate line. More particularly, the group selection transistor may be configured to electrically couple and decouple the local control gate line and the global control gate line responsive to a group selection gate signal applied to a gate of the group selection transistor. Related methods and systems are also discussed.
US07733695B2	Non-volatile memory device and method of operation therefor In one embodiment, the non-volatile memory device includes a well of a first conductivity type formed in a substrate, and a first plurality of memory cell transistors connected in series to a bit line formed in the well. A buffer is formed in the substrate outside the well and is connected to the bit line. At least one de-coupling transistor is configured to de-couple the buffer from the bit line, and the de-coupling transistor is formed in the well.
US07733692B2	Thin film magnetic memory device capable of conducting stable data read and write operations A tunnel magnetic resistive element forming a magnetic memory cell includes a fixed magnetic layer having a fixed magnetic field of a fixed direction, a free magnetic layer magnetized by an applied magnetic field, and a tunnel barrier that is an insulator film provided between the fixed and free magnetic layers in a tunnel junction region. In the free magnetic layer, a region corresponding to an easy axis region having characteristics desirable as a memory cell is used as the tunnel junction region. A hard axis region having characteristics undesirable as a memory cell is not used as a portion of the tunnel magnetic resistive element.
US07733690B2	Semiconductor integrated circuit having a latch circuit A semiconductor integrated circuit comprising a data holding circuit sets the data holding circuit to a desired data state by first setting the power-supply voltage of the data holding circuit to be less than a specified voltage, and then setting the power-supply voltage of the data holding circuit to the specified voltage or greater, regardless of the data state that is stored beforehand in the data holding circuit.
US07733682B2	Plateline driver for a ferroelectric memory One embodiment relates to a ferroelectric memory device. The ferroelectric memory device includes a memory array comprising one or more ferroelectric memory cells that are arranged in a number of plateline groups. The memory device also includes a plateline driver configured to boost a plateline voltage above a supply voltage within the plateline driver, and provide the boosted plateline voltage along platelines associated with the plateline driver. Other methods and systems are also disclosed.
US07733677B2	Output power switching vector scaling system and method A power converter control system and method is provided to maximize the power output of the converter where an overload condition is present. A controller calculates a command voltage and command power factor. The command voltage and command power factor are used to generate a switching vector. Where the voltage associated with a switching vector exceeds an output voltage limit of the converter, a power factor adjustment is generated.
US07733676B2	Non-contact power supply system utilizing synchronized command signals to control and correct phase differences amongst power supply units A non-contact power supply system is provided in which current phases of induction lines are matched. According to the output current of a power supply unit (21) and the power consumption of induction lines (19), a lead time corresponding to a phase difference between the output currents of the induction lines is determined. A signal for driving transistors (52) is advanced ahead of a drive synchronization signal (β) according to the lead time.
US07733674B2	Power conversion apparatus for converting direct current to polyphase alternating current A power conversion apparatus for converting direct current from a power source to polyphase alternating current includes a plurality of carrier signal generators, a plurality of gate signal generators, and a plurality of legs. The carrier signal generators are configured and arranged to independently generate and transmit a plurality of carrier signals, respectively. The gate signal generators are operatively coupled to the carrier signal generators, respectively, to receive the carrier signals, each of the gate signal generators being configured and arranged to generate an on/off signal by comparing a command value of each phase of the polyphase alternating current and corresponding one of the carrier signals. The legs are connected to the gate signal generators. Each of the legs is operated based on the on/off signal transmitted from corresponding one of the gate signal generators to convert the direct current to each phase of the polyphase alternating current.
US07733662B2	Circuit board with embedded passive component and fabricating process thereof A process for fabricating a circuit board with an embedded passive component is provided. First, an electrode-patterned layer having electrodes is formed on a surface of a conductive layer. Then, a passive component material is filled in the intervals between the electrodes. Then, the conductive layer and the electrode-patterned layer are laminated to a dielectric layer, wherein the electrode-patterned layer is embedded in the dielectric layer. Next, the conductive layer is patterned to form a circuit layer.
US07733661B2	Chip carrier and fabrication method A substrate having a ground plane, a first side, and a second side is provided. A via that electrically connects the first side to the second side is formed. A printed wire is formed on the first side, and a printed wire is formed on the second side. A passive component is formed on the first side. The passive component is formed free of the ground plane. An active component is attached to the first side.
US07733660B2	Housing structure of acoustic controller A housing structure of an acoustic controller having a lower case which is lightweight, high in the degree of freedom in shape design, and capable of suppressing a deformation of side walls thereof after being molded. The lower case is integrally formed from resin into a rectangular dish shape having front, rear, left, right, and bottom plates. An upper unit is attached to an open upper part of the lower case. The left and right plates of the lower case have upper parts thereof formed into brim portions protruding outward in the left-to-right direction. Front and rear parts of each brim portion are further protruded outward and formed into flanges that function as mounting portions used for mounting the acoustic controller to a rack.
US07733655B2	Lid edge capping load A method attaches a semiconductor chip to a substrate, applies a thermal interface material to a top of the semiconductor chip, and positions a lid over the semiconductor chip typically attached to the substrate with an adhesive. The method applies a force near the distal ends of the lid or substrate to cause a center portion of the lid or substrate to bow away from the semiconductor chip and increases the central thickness of the thermal interface material prior to curing. While the center portion of the lid or substrate is bowed away from the semiconductor chip, the thermal interface material method increases the temperature of the assembly, thus curing the thermal interface material and lid adhesive. After the thermal interface material has and adhesive have cured, the method removes the force from near the distal ends of the lid or substrate to cause the center portion of the lid to return to a position closer to the semiconductor chip, creating a residual compressive stress in the thermal interface material thus improving thermal performance and thermal reliability.
US07733650B2	Motor controller A motor controller which eliminates a positioning operation between a power semiconductor element and a base plate to improve the assembly process is provided. The motor controller has a power semiconductor element closely contacted with a heatsink and mounted in a first base plate, wherein a spacer having an engaging section formed therein as a hole for the power semiconductor element is interposed between the heatsink and the base plate, and the power semiconductor element is positioned in the spacer. Further, the peripheral wall of the hole is arranged so as to shut off a space between a terminal projecting from the side of the power semiconductor element and the heatsink.
US07733642B2	Waterproof casing for a flat panel display A waterproof casing includes a first casing having a first base wall and a first surrounding wall, and a second casing having a second base wall and a second surrounding wall. The first surrounding wall surrounds a periphery of the first base wall to cooperatively define a first receiving recess therewith, and has a first wall surface confronting the first receiving recess, and a first groove provided in the first wall surface. The second surrounding wall is connected to the second base wall proximate to the first surrounding wall to cooperatively define a second receiving recess therewith, and has a second wall surface outwardly of the second receiving recess, and a second groove provided in the second wall surface and corresponding to the first groove. A resilient member is fitted between and closes the first and second grooves. The first and second receiving recesses cooperatively receive a flat panel display.
US07733641B2	Hard disk drive lever with button-induced ejection, and over-travel button-induced ejection, and over-travel indicator A hard disk drive bracket including a bezel, a lever arm attached to the bezel rotatably between a closed position against the bezel and an open position apart from the bezel, and a unitarily formed body attached to the bezel. The lever arm includes an extension on the rotating end. The unitarily formed body includes a locking member adapted to secure the lever arm in the closed position and a release button arranged to release the locking member when the release button is depressed. The unitarily formed body may be adapted to serve as a horn attached to the bezel rotatably between a natural position in which the locking member impedes the path of the lever arm, and a forced position in which the locking member is clear of the path of the lever arm.
US07733637B1	Keyboard sled with rotating screen A keyboard sled adapted to communicatively interact with a portable computer system. In one embodiment, the keyboard sled is comprised of an integral receiving portion adapted to mechanically and electronically receive a portable computer system. An interface connector is disposed within the receiving portion and adapted to provide a communicative link between the keyboard sled and a portable computer system, when a portable computer system has been inserted in the receiving portion. The keyboard sled further has at least one mounting hook disposed within the receiving portion for providing positive retention of a portable computer system when coupled with the keyboard sled. A keyboard portion also present on the keyboard sled and also coupled with the interface connector provides input keys. The keyboard sled is also comprised of an integral data storage access slot which is adapted to provide access to a data storage device receptacle of the portable computer system. The keyboard sled also adds input functionality to the portable computer system.
US07733636B2	Keyboard connection configuration and electronic device An electronic device includes a device main frame portion, a display portion supported by the device main frame portion, a keyboard, and a casing on which the keyboard is disposed. The keyboard includes a plurality of operating keys, a placement base in which the plurality of operating keys are disposed, and a plurality of retaining portions disposed on at least portions of the placement base of the keyboard other than an outer circumferential portion. The keyboard is disposed on a casing. A plurality of connection retaining portions are provided on the casing, on which connection retaining portions the plurality of retaining portions of the placement base are retained, respectively.
US07733635B2	Systems and methods for providing a robust computer processing unit The present invention features a robust customizable computing system comprising: a processing control unit; an external object; and means for operably connecting the processing control unit to the external object, the processing control unit introducing intelligence into the external object, thus causing the external object to perform smart functions. The processing control unit preferably comprises: (a) an encasement module comprising a main support chassis having a plurality of wall supports and a plurality of junction centers containing means for supporting a computer component therein, a dynamic back plane that provides support for connecting peripheral and other computing components directly to a system bus without requiring an interface, means for enclosing the main support chassis and providing access to an interior portion of the encasement module; (b) one or more computer processing components disposed within the junction centers of the encasement module; and (c) means for cooling the interior portion of the encasement module.
US07733634B2	Monitor system A monitor system includes a display panel, a storage case receiving the display panel, a support member movable in the storage case, arm members, first guides in the storage case, and second guides in the support member. The support member rotatably supports the lower end of the display panel. Each arm member has a first supporting point, a second supporting point, and an intermediate supporting point. Each arm member is connected to the display panel through the first supporting point. The second supporting points of the arm members are engaged with the first guides. The intermediate supporting points thereof are engaged with the second guides. In the monitor system with this structure, when the support member is moved forward, the display panel can be rotated upward with a relatively small force such that the display panel is brought from a horizontal posture to a raised posture.
US07733632B2	Vehicle-mounted electrical junction box A casing includes a first casing member and a second casing member. The first casing member is provided on a side with a fuse module mounting section having a side opening. The second casing member is provided on the same side as the first casing member with a relay module mounting section having a side opening and extending downward. An ECU mounting frame extends from a bottom wall of the second casing member. An ECU is disposed on a second side of a bottom wall of the second casing member and in parallel with the relay module mounting section. A fuse module is attached to the fuse module mounting section to receive fuses. A relay module is attached to the relay module mounting section to receive relays. The fuse module and relay module that generate heat are disposed on a side of the casing in a vertical direction.
US07733628B2	Multilayer chip capacitor A multilayer chip capacitor including: a capacitor body having a plurality of dielectric layers deposited therein and having a parallelepiped shape; at least three pairs of first and second external electrodes formed on two longer sides, the first and second external electrodes in each of the pairs having different polarities and opposing each other, and the first and second external electrodes on each of the longer sides arranged alternately with each other; and a plurality of first and second internal electrodes arranged alternately to interpose each of the dielectric layers, the first and second internal electrodes connected to the first and second external electrodes by leads, respectively, wherein the capacitor body has a length that is 2.5 times greater than a width thereof.
US07733625B2	Substrate holding system and exposure apparatus using the same A substrate holding system including a substrate attracting device, an exhausting device, and a control device to operate the exhausting device so that a pressure around the substrate and a pressure at an interval between the substrate and the substrate attracting device are lowered to a first pressure and that only the pressure at the interval is subsequently lowered to a second pressure, which is lower than the first pressure.
US07733622B2	Surge absorber and production method therefor This surge absorber includes an insulating part upon which is formed a conductive layer which is divided into two separate portions by a discharge gap (micro gap) around its circumferential surface; a pair of terminal electrodes which are arranged to oppose the insulating part, and contacts the conductive layer; an insulating tube at the ends of which the terminal electrodes are arranged, and which seals the insulating part in its interior along with seal gases; and a conductive portion provided at least between the terminal electrodes and the conductive layer. As a result, it becomes possible to provide a surge absorber of lower cost, and which is endowed with stabilized performance and high quality, while moreover it exhibits excellent durability.
US07733621B2	Energy conditioning circuit arrangement for integrated circuit The present invention relates to an interposer substrate for interconnecting between active electronic componentry such as but not limited to a single or multiple integrated circuit chips in either a single or a combination and elements that could comprise of a mounting substrate, substrate module, a printed circuit board, integrated circuit chips or other substrates containing conductive energy pathways that service an energy utilizing load and leading to and from an energy source. The interposer will also possess a multi-layer, universal multi-functional, common conductive shield structure with conductive pathways for energy and EMI conditioning and protection that also comprise a commonly shared and centrally positioned conductive pathway or electrode of the structure that can simultaneously shield and allow smooth energy interaction between grouped and energized conductive pathway electrodes containing a circuit architecture for energy conditioning as it relates to integrated circuit device packaging. The invention can be employed between an active electronic component and a multilayer circuit card. A method for making the interposer is not presented and can be varied to the individual or proprietary construction methodologies that exist or will be developed.
US07733620B2	Chip scale gas discharge protective device and fabrication method of the same Disclosed is a chip scale gas discharge protective device whose metal coupled electrodes are fabricated through processes of yellow light, image formation, and electro casting of metal electrode, and the two electrodes are facing each other in arch lines with the distance of a gap controlled within the range of 0.5˜10 μm, wherein the entire structure is performed by a bridge process without an extra gas filling procedure in the gap. Due to the fact that the gap is as small as only several μm, a relevant potential difference existing across there is sufficient to ionize the air thereby suppressing the electro-static discharge (ESD) through the protected electronic device, whereas the fabrication method is disclosed.
US07733618B2	Electrostatic discharge device An electrostatic discharge device includes a first protection element including a MOS transistor type first diode, which provides a first capacitor including a first insulation layer, and provides a first path between an input/output pad and a power supply voltage line using the first diode, for discharging static electricity, a second protection element providing a second path between the input/output pad and a ground voltage line for discharging the static electricity, a trigger circuit including a resistor that is connected in series to the first capacitor, and a power clamp element providing a third path for discharging the static electricity between the power supply voltage line and the ground voltage line by a voltage applied to the resistor.
US07733617B2	Self testing digital fault interrupter A self testing fault detector having a line side and a load side and a conductive path there between. The apparatus includes a solenoid, which is adapted to move a plurality of contacts disposed in the conductive path from a first position to a second position when the self testing device is powered from the line side; and a processor, which is adapted to energize the solenoid using a first switch and maintain said solenoid in the energized state using a second switch.
US07733616B2	Abnormality detecting device of electric power converting device and abnormality detecting method Each of three-phase arm of an inverter has first and second switching elements connected in series together at a connection point to the corresponding phase coil of the three-phase motor. Control device turns on the first switching element of the i-th (i is a natural number smaller than four) for a predetermined time period, and determines that the second switching element of the i-th arm has a short fault, when an overcurrent exceeding a predetermined threshold is detected within the predetermined time period. The predetermined time period is shorter than a time period from a time point of turning on the first switching element of the i-th arm to a time point of attaining the predetermined threshold by a current flowing through a path extending from a power supply line through the second switching element of the remaining arm other than the i-th arm to a ground line.
US07733615B2	Dynamic braking load analyzer A dynamic braking load analyzer that determines the proper resistance value for a dynamic braking load resistor to be used in combination with a variable frequency drive or servo-drive to accommodate the power dissipated from an induction motor when it is being reduced in speed. The analyzer includes a resistor bank having a plurality of resistors electrically coupled in parallel. Switches are provided between the resistors, and a resistor selector switch determines which resistors are switched into the resistor bank circuit. A heat sensing resistor in the resistor bank measures the heat generated by the resistors and provides a signal that is read by a heat meter. The combination of the temperature measurement and the resistance of the resistors in the circuit gives the proper braking resistance value for the deceleration of the induction motor.
US07733610B2	Load/unload ramp for an actuator assembly in a data storage device An actuator assembly is provided having a ramp for unloading a transducing head from a storage medium. The actuator assembly includes an actuator arm rotatable about a pivot point and configured to access data on a storage medium. The actuator arm has a base end coupled to a lift tab and a distal end coupled to a transducing head. The actuator assembly also includes an inclined surface located adjacent the base end. The inclined surface is configured to engage with the lift tab to guide the transducing head away from the storage medium.
US07733609B2	Method for manufacturing a magnetic head arm assembly (HAA) A system and method for an improved magnetic head arm assembly (HAA) is disclosed. The HAA includes three principal components, a head gimbal assembly (HGA), a flexible printed circuit (FPC) assembly, and an actuator coil assembly. The design allows for HAA rigidity, yet each of the components is designable and manufacturable independent of one another, in addition to other advantages over current methods.
US07733608B2	Head holding member, disk device with the head holding member, and head holding method in the disk, device The present invention provides a head holding member and a head holding method of a head actuator having a very high impact resisting property, and having a simple construction, and a disk device using the head holding member and the head holding method. The head holding member resists an impact applied at a stopping time, and a stable operation can be performed at a power turning-on time.
US07733603B2	Reduced tape stick tape drive systems A read and/or write head for a tape drive system has a tape bearing surface that includes relatively smooth areas surrounded by relatively rough areas. Read and/or write elements are located in the smooth areas.
US07733596B2	System and method for identifying the signal integrity of a signal from a tape drive A system and method for identifying signal degradation in a tape drive is disclosed in which a data signal read from the tape drive and the signal characteristics of the undecoded portion of the data stream are compared with a set of known values. The undecoded portion of the data may comprise the preamble portion of the signal and the comparison set of known values may be saved to local storage on the tape drive. If the comparison of the signal characteristics of the undecoded portion of the data stream and the known set of signal values indicates that data signal is degraded, a notification is generated that indicates that the signal at the tape drive is degraded.
US07733590B2	Optimal synchronization mark/address mark construction Optimal synchronization mark/address mark construction. These marks can generally be referred to as sync marks. A novel means is presented by which sync marks can be generated for use within a variety of communication systems including HDD systems. The sync marks generated hereby have a largest possible minimum distance measurement that ensures highly accurate detection of the transition between the data portion and the preamble portion of information that is processed. Various types of distance measurement criteria can be employed, including a Euclidean distance measurement or a Hamming distance measurement, when selecting the sync mark from among a plurality of possible sync marks.
US07733586B2	Lens positioning assembly A microscope objective lens positioning assembly comprises a lens mounting member to which a microscope objective lens defining an optical axis is mounted; a support member; and a pair of leaf springs. Each leaf spring has first and second ends, the first ends of the leaf springs being secured to upper and lower aligned locations respectively on the support member, and the second ends of the leaf springs being secured to corresponding upper and lower locations respectively on the lens mounting member whereby the two leaf springs, the optical axis of the objective lens, and a line between the upper and lower aligned locations on the support member define a parallelogram, the leaf springs flexing in use in response to movement of the lens mounting member.
US07733585B2	Lens device for image magnification A lens device includes a control unit, an objective lens, an image sensor, a light source, a detecting unit, and a tube assembly. The tube assembly includes a guide barrel, an outer tube, and a lens holder. The guide barrel is disposed on the control unit. The outer tube includes a tube body that is rotatably sleeve don the guide barrel, and a guiding portion. The lens holder includes a holder body having a set of projections driven by the guiding portion. The image sensor is electrically coupled to the control unit. The objective lens is optically aligned with the image sensor. The light source is coupled electrically to the control unit. The detecting unit generates a detector output indicating angular orientation of the outer tube. The control unit is responsive to the detector output to control intensity of light outputted by the light source.
US07733584B2	Color-corrected optical system An optical device includes an elongated tube configured for insertion into a body and optical members located in the tube. The optical members are configured to have an optical invariant-to-clear aperture semidiameter ratio greater than about 0.05 and an optical path difference less than about a value of the optical invariant divided by at least 250 times a midrange wavelength in a spectral range from about 435.8 nm to about 656.3 nm, and are preferably formed of an extraordinary dispersion optical material. A method includes conducting polychromatic light through at least one optical member located in an elongated tube configured for insertion into a body, where the optical members have an optical invariant-to-clear aperture semidiameter ratio greater than about 0.05 and an optical path difference less than about a value of an optical invariant divided by at least 250 times the midrange wavelength from about 435.8 to about 656.3 nm.
US07733582B2	Imaging lens An imaging lens enables a large focal depth and low error sensitivity. The imaging lens satisfies “0.016<Δ/f<0.018,” where Δ is the absolute value of longitudinal chromatic aberrations at F curve and C curve wavelengths, and f is the combined focal distance of the entire compound imaging lens. A first, a second, and a third lens are disposed sequentially, the first lens disposed toward an object, and the third lens disposed toward an image surface. The first lens has a positive refraction, a meniscus shape, and a convex surface facing the object. The second lens has a meniscus shape with a concave surface facing the object. The third lens has a convex-type shape facing the object; and a concave-type aspherical shape facing the image surface, providing a negative refraction in a radially central portion and a positive refraction in a radially peripheral portion.
US07733580B2	Light emitting module and light receiving module A plurality of first refraction surfaces 121 and a plurality of second refraction surfaces 122 are alternately provided on an emission surface of a lens element 120 so as to form concentric circles each having an optical axis 113 at the center thereof, and having diameters different from each other, and a light reflected by a plurality of reflection surfaces 123 provided on an incident surface of the lens element so as to form concentric circuits each having the optical axis 113 at the center thereof and having diameters different from each other, is refracted and emitted by the plurality of second refraction surfaces 122 at desired angles. Therefore, it is possible to enhance efficiency and an emission intensity, and reduce variations in brightness of an emitted light without increasing the diameter of the lens element 120, thereby realizing a light emitting module 100 enabling advantageous performance.
US07733578B2	Objective lens design method, lens, and optical system, optical head, and optical disc apparatus using the same When the DVD provided with the DVD substrate 2 having thickness t2 of 0.6 mm is installed in the optical disc apparatus, the light beam 4 having wavelength λ1=655 nm is used as luminous flux of numerical aperture NA=0.63 to be condensed on the information surface 2a on the DVD substrate 2. When the CD provided with the CD substrate 3 having thickness t2 of 1.2 mm is installed in the optical disc apparatus, the light beam 5 having wavelength λ2=790 nm is effectively used as luminous flux of approximate numerical aperture NA=0.45 to be condensed on the information surface 3a on the DVD substrate 3. The wavefront aberration caused by a thickness difference between the DVD substrate 2 and CD substrate 3 is canceled out by the chromatic aberration caused by a wavelength difference between the light beams 4 and 5. Therefore, in spite of the difference in the transparent substrates, the light beams are suitably condensed respectively on the information surface 2a and 3a.
US07733577B2	Lens barrel A lens barrel having a configuration lending itself to effectively reducing the size thereof and ensuring appropriate and safe operation thereof. The lens barrel includes a guiding portion provided for a lens holding member for guiding a cam follower in a radial direction of a cam barrel; a tabular elastic member provided for the lens holding member for urging the cam follower in a guiding direction of the guiding portion; and a regulating member limiting the transfer of the cam follower that is to be moved in a direction opposite to the urging direction by the elastic member. The regulating member is configured to be brought into contact with a predetermined portion of the lens holding member.
US07733575B2	Optical systems employing compliant electroactive materials The present invention provides optical systems, devices and methods which utilize one or more electroactive films to adjust an optical parameter of the optical device/system.
US07733570B2	Condenser An optical condenser device has light sources (10, 20) and an optical combiner (30). Each light source (10, 20) includes a semiconductor laser array stack (12, 22), collimator lenses (16, 26), and beam converters (18, 28). Since the optical combiner (30) combines the beams from one (12) of the stacks and the beams from the other (22), a laser beam with high optical density is generated. The optical combiner (30) has transmitting portions (32) and reflecting portions (34), each of which preferably has a strip-like shape elongated in the layering directions of the stacks (12, 22). In this case, the beams emitted from the active layers (14, 24) will be received and combined appropriately by the optical combiner (30) even if positional deviation of the active layers (14, 24) occurs.
US07733565B2	Laser microscope It is possible to change a focal position or spot diameter of an optical stimulation laser beam without causing any misalignment of the optical axis, thus precisely applying optical stimulation to a desired position or region on a specimen. The invention provides a laser microscope comprising an observation light path for guiding an observation laser beam; an optical stimulation light path for guiding an optical stimulation laser beam; and a light-path combining unit for combining these light paths; and the laser microscope also comprises, in at least the optical stimulation light path, a focal-position adjusting unit for adjusting a focal position of the laser beam; an optical-axis misalignment detector for detecting an amount of misalignment of an optical axis between the focal-position adjusting unit and the light-path combining unit; and an alignment unit for adjusting an optical axis position on the basis of the amount of misalignment of the optical axis detected by the optical-axis misalignment detector.
US07733564B2	Applications of adaptive optics in microscopy The use of one or more wavefront modulators in the observation beam path and/or illumination beam path of a microscope provide various advantageous results. Such modulators may be adapted to change the phase and/or the amplitude of light in such a way to carry out displacement and shaping of the focus in the object space and correction of possible aberrations. The possible areas of use include confocal microscopy, laser-assisted microscopy, conventional light microscopy and analytic microscopy.
US07733559B2	Electrophoretic display sheet, electrophoretic display device, and electronic apparatus In at least one embodiment of the disclosure, an electrophoretic display sheet includes an electrophoretic display layer and a substrate provided with the electrophoretic display layer. An end portion of the substrate includes a chamfered edge. The electrophoretic sheet may be attached to a driving substrate.
US07733554B2	Electro-optic displays, and materials and methods for production thereof A front plane laminate (see U.S. Pat. No. 6,982,178) is produced by forming a sub-assembly comprising a lamination adhesive layer and an electro-optic layer, forming an aperture through the sub-assembly, and securing a light-transmissive electrode layer to the sub-assembly so that the electrode layer extends across the aperture. Alternatively, formation of the aperture is omitted, and the electrode layer has a tab portion extending beyond the edges of the lamination adhesive and electro-optic layers. When a front plane laminate is secured to a backplane to form an electro-optic display, a stiffening layer may be attached to either part to increase its stiffness, then removed after the lamination. An electro-optic display or front plane laminate may use an adhesive layer comprising separate layers of cross-linked and non-cross-linked adhesive.
US07733552B2	MEMS cavity-coating layers and methods Devices, methods, and systems comprising a MEMS device, for example, an interferometric modulator, that comprises a cavity in which a layer coats multiple surfaces. The layer is conformal or non-conformal. In some embodiments, the layer is formed by atomic layer deposition (ALD). Preferably, the layer comprises a dielectric material. In some embodiments, the MEMS device also exhibits improved characteristics, such as improved electrical insulation between moving electrodes, reduced stiction, and/or improved mechanical properties.
US07733550B2	Deformable mirror An optoelectric device including a deformable membrane with an outer reflecting surface and an inner surface whereon a plurality of permanent magnets are fixed, and having a bottom surface entirely coated with a continuous layer of a flexible material; and a support including a plurality of electromagnets placed opposite the permanent magnets to exert an electromagnetic force thereon, locally displacing a zone corresponding to the deformable membrane.
US07733547B2	Image forming apparatus, image quality control method A technique that can perform appropriate image quality control processing corresponding to fluctuation in a printing environment is provided.An image forming apparatus that forms, on a sheet, a test pattern formed by a color obtained by mixing toners of plural colors, scans a test pattern image formed on the sheet with a color sensor, and performs predetermined image quality control processing on the basis of information scanned, the image forming apparatus including a media sensor that acquires information for discriminating a type of a sheet to be an object of image formation processing, a control-information acquiring unit that acquires, on the basis of the information acquired by the media sensor, information for control used in the image quality control processing, and a color sensor that is arranged further on a downstream side than a fixing device in a sheet conveying direction and scans the test pattern formed on the sheet.
US07733545B2	Image processing method, program, image processing apparatus, and image forming system A disclosed image processing method is for generating and processing image data to be sent to an image forming apparatus including a recording head for ejecting droplets of a recording liquid, the image forming apparatus forming an image on paper based on input data. The image processing method includes: color space conversion processing upon converting input data to color space values for the image forming apparatus in accordance with a specified density or color space conversion processing upon converting input data to color space values for the image forming apparatus in accordance with characteristics regarding permeability of the paper to a coloring agent.
US07733542B2	Image reading apparatus and optical module thereof An image reading apparatus includes a casing, an upper plate and a transparent plate. The casing has a first opening, and a reading means is disposed in the casing. The upper casing plate is disposed over the casing and has a second opening that is positioned opposite the first opening. The transparent plate is mounted on the first opening. The transparent plate is wedged in the second opening through assembly of the casing and the upper plate.
US07733540B2	Multifunction apparatus A multifunction apparatus is provided with a printer unit having a discharge tray disposed on a top face thereof and a scanner unit disposed on the image recording unit with a space being defined between the image reading unit and the discharge tray. The scanner unit has a casing. The casing is provided in the printer unit rotatably about a rear side of the apparatus in such a fashion as to open a front side of the apparatus. The casing has a recessed part formed at a position of a bottom plate thereof and corresponding to the discharge tray. Thus, a recording sheet removal opening opened on a front side of the apparatus is formed. A reinforcing portion recessed in such a fashion as to be swollen toward an internal space of the casing is formed on the bottom plate having the recessed part.
US07733538B2	Image reading apparatus There are provided a platen on which an original is mounted, a line sensor that performs photoelectric conversion on light from the original on the platen, a first carriage that moves along the platen and guides the light from the original to the line sensor, a first housing that stores and supports the first carriage to be movable along the platen, first driving means for moving the first carriage, a second carriage provided with a plurality of rod-shaped light-source lamps that applies light to the original, a second housing that stores and supports the second carriage to be movable along the platen and covers the platen, second driving means for moving the second carriage, and control means for controlling the first driving means, the second driving means and lighting of the plurality of light-source lamps.
US07733536B2	Method and apparatus for adjusting contrast of image An apparatus for processing an input image including M image units is provided. Each of the M image units respectively includes N pixels. Each of the pixels respectively has an original gray scale. The apparatus includes a converting module, a gain generating module, and a contrast enhancing module. The converting module is used for generating M luminances. Based on the original gray scales of the N pixels in the ith image unit among the M image units, the converting module generates the ith luminance among the M luminances. A maximum luminance and a minimum luminance are generated based on the M luminances. The gain generating module generates a contrast gain and a minimum gray scale based on the maximum luminance and the minimum luminance. Based on the contrast gain and the minimum gray scale, the contrast enhancing module adjusts the original gray scales of the pixels in the input image.
US07733533B2	Generating threshold values in a dither matrix Provided are a method, system, and program for generating threshold values in a dither matrix. A dither matrix of threshold values is generated. The threshold values in the dither matrix are filtered to generate a filtered dither matrix of filtered dither values by performing for dither values in the dither matrix: determining a region of dither values in the dither matrix that surrounds the value being considered, wherein the dither values in the determined region comprise one of dither values in a first portion of the region within the dither matrix or a wrap around dither value in a second portion of the region that extends beyond the dither matrix; and using an offset value to determine one wrap around dither value, wherein repeated instances of the dither matrix are designed to be applied to an image by forming a tile pattern of the repeated instances of the matrix over the image pattern, and wherein the repeated instances of the matrix in the tile pattern are offset in one direction by the offset value; and performing an operation on the determined dither values in the region to determine a filtered value for the dither value being considered.
US07733523B2	Image processing method, image processing apparatus, and image forming apparatus An image processing apparatus for measuring concentration of concentration patterns by optical sensors and correcting image information on the basis of a correction value obtained on the basis of measured concentration values has: a measured concentration value obtaining unit which measures the concentration in different concentration patterns by the optical sensors and obtains the measured concentration values; an estimation value obtaining unit which estimates original concentration by an independent component analysis on the basis of the obtained measured concentration values and obtains an estimation value; and a correction value obtaining unit which obtains the correction value for allowing the measured concentration value to approach the obtained estimation value. An influence of color noises is reduced, thereby correcting an image.
US07733521B1	Printer apparatus with selectable photo enhancement project and settings storage dynamically definable user interface and functions and template definition A stand-alone printing apparatus for transferring one or more digital photographs captured by a digital device to a printable medium. The printing apparatus includes an input member for receiving digital photographs from a source and image processing for generating an image corresponding to each of the digital photographs. The photoprinter apparatus includes dynamically definable image processing software and an integrated user interface with template and settings storage capabilities.
US07733520B2	Digital camera and method of controlling the same and apparatus for and method of outputting image Even when a part of a subject image is cut down after imaging, an image of good image quality is obtained. When a subject is imaged, divisional photometry (divided brightness measuring) is performed. Image data representing an image of the subject and a divisional photometry values are recorded on a memory card in correspondence with photometry sections obtained by division. At the time of reproduction (playback), image data is read out of the memory card, to display the subject image. A desired part of the displayed subject image is cut out (trimmed). Correction is made such that the brightness of the trimmed image is proper using the divisional photometry values corresponding to the trimmed image.
US07733519B2	Compensation method of digital image data The present invention relates to a compensation method for compensating digital image data generated from a scanning module of a scanner when the luminance of a lamp tube is unstable. Several compensating gains are computed according to the luminance values of a reference white plate so as to compensate the digital image data. The method of the present invention is implemented by software in a computer.
US07733517B2	Information processing apparatus and control method thereof, and program Bleed widths are set for finishing pages. An imposition method that requires to execute binding processing of sheets is set. Bleed regions including the finishing pages are determined based on the set bleed widths for the finishing pages, and the size of the finishing page. The allocation of manuscript data is so determined as to align the center of the manuscript data to be allocated to that of a bleed region on the side to undergo the binding processing of the determined bleed regions, based on the setting contents.
US07733514B2	Image formation instruction apparatus, image formation instruction program, image formation instruction method, image formation server, image formation server program, processing method for image formation server, image formation control apparatus, program for image formation control apparatus, and image-forming method User identification information which is acquired from an originating portable terminal and identifies the originating portable terminal and a destination portable terminal after a wireless communication session is carried out between these portable terminals is registered in a print job database in correlation with print image data to be subjected to image formation. Further, print image data correlated to user identification information corresponding to user confirmation information which is acquired from the destination portable terminal and identifies the originating and destination portable terminals of the wireless communication session carried out between these portable terminals is extracted while referring to the print job database.
US07733512B2	Data processing device, information processing device, and data processing system A data processing device transmits specific information through a network, receives a public key transmitted based on the specific information through the network, and stores the received public key. Further, the data processing device receives print data and encrypted data corresponding to the print data, decrypts the received encrypted data by using the stored public key, and prints the received print data if the data after it was decrypted is specific data. Meanwhile, the data processing device does not print the received print data if the data after it was decrypted is not the specific data.
US07733510B2	Image-attached mail transiting apparatus, image-attached mail transiting method, and image-attached mail transiting program An image-attached mail transiting apparatus has a mail receiving portion for receiving an image-attached mail transmitted from a transmitting terminal that transmits the image-attached mail to which an image picked up by an installed miniature camera is attached, a mail control portion for extracting an attached image from the image-attached mail, then instructing an image processing portion how to process the attached image, and then substituting a processed image for the original attached image of the image-attached mail, an image processing portion for performing the process indicated by the mail control portion to the image, and a mail transmitting portion for transmitting the image-attached mail to the receiving terminal, whereby the mail control portion discriminates a type of the transmitting terminal, and the image processing portion performs image processing according to the type. It become possible to perform predetermined processing to a picked-up image every camera provided to communication devices.
US07733509B2	Method and apparatus for printing XML directly using a formatting template A printing system and method for printing XML files directly using a formatting template is disclosed. The formatting template includes an XML Descriptor (XMD) associated with each XML data element in a tree structure of the XML document. XML Descriptors (XMDs) are identified by an associated qualified tag. The qualified tag includes a concatenation of a plurality of XML start tags representing start tags hierarchically traversed in the tree structure of the XML document to reach the XML data element associated therewith. The XMDs provide formatting to content associated with the XML data element. A printer prints the rendered XML document according to the template using the XMDs.
US07733507B2	Printer driver with automatic template generation A method of printing documents from a user workstation includes activating a printer driver for submitting a digital document file to a printer, specifying print process settings in the printer driver, and commanding the driver to submit the document file and the settings to the printer. Values of settings are either individually or collectively specified, and a collective specification is a selection of a user-selectable prestored set of settings, called a “template”. Each time a value of at least one of a predetermined set of settings is individually specified and confirmed by a user, a new template is automatically defined and made selectable in the printer driver. A new template can be renamed by the user for easy recognition. Also, a template can easily be deleted, such that the number of templates can be kept practical. The same template management method can be used for other document-related processes, such as faxing and scanning.
US07733505B2	Attitude detection system and method Systems and methods for real-time determination of an angle and range to a surface are provided. In one embodiment, such a system may include a transmitter for producing an output beam, a scanner for redirecting the output beam into a scan pattern towards a surface, a receiver for receiving a beam scattered from the surface, and a processor adapted to receive continuous tangential angle data from the scanner, and range data from the receiver, in order to determine a real-time angle and range to the surface.
US07733504B2	Shape evaluation method, shape evaluation device, and device having the shape evaluation device A shape evaluation device performs simulation by using an annular light source or concentric light source instead of a rectilinear light source and calculates a characteristic line for performing shape evaluation. The shape evaluation device includes a calculation device (2) having: a distance vector calculation unit (2a) for acquiring a distance vector representing a distance between the circle and the vector, a distance function unit (2b) for acquiring a distance function from the distance vector, and a distance function calculation unit (2c) for acquiring a point on a curved surface where the value of the distance function is a predetermined value. By performing simulation using the annular or concentric light source, it is possible to obtain a characteristic line capable of observing distortion in all the directions by one calculation. The present invention reduces the number of calculations required for calculating the characteristic line for performing shape evaluation and reduce the time required for calculation, thereby enabling evaluation by a dynamic shape.
US07733502B2	Roughness evaluation method and system A roughness evaluation method for evaluating a roughness of lines formed on a substrate includes a measuring step of irradiating light onto a plurality of locations of the substrate and measuring a state of reflected light by a scatterometry; and an analyzing step of evaluating the roughness of the lines based on a variation in value measured in the measuring step. A roughness evaluation system includes an optical device for irradiating light onto the substrate and measuring a state of reflected light by a scatterometry; a moving device for moving the substrate in at least one of an x-direction and a y-directions on a horizontal plane; a controller for controlling the moving device such that the optical device measures a plurality of locations on the substrate; and an analysis unit for evaluating the roughness based on a variation in measured values at the plurality of locations on the substrate.
US07733500B2	Wavefront sensor with optical path difference compensation In a wavefront sensor, an optical wavefront to be measured is split into a first optical path and a second optical path. A wavefront W1 in the first optical path is transmitted through a first compensation member 7, and a wavefront W2 in the second optical path is transmitted through a second compensation member 8. Wavefronts W1 and W2 are mixed together by a semi-transparent mirror 6 with the wavefronts being displaced from each other by a shearing quantity S to form an interference fringe. An optical path difference that occurs between two wavefronts W1′ and W2′ which reach the interference measurement plane M in a state where the wavefronts are inclined due to the arrival direction of the optical wavefront to be measured is compensated when the wavefronts W1′ and W2′ are transmitted through the first and second optical path difference compensation members 7 and 8, respectively.
US07733499B2	Method for optically testing semiconductor devices A method for optically testing semiconductor devices or wafers using a holographic optical interference system with an infrared or thermal light source providing a light beam of coherent wavelength with a wavelength to which the semiconductor material is transparent, splitting the light beam into a reference beam and an object beam, imposing the object beam on the semiconductor material to generate a reflected object beam reflected from interior structures of the semiconductor material, adjusting the angle of the reference beam relative to the object beam between a plurality of angles with the semiconductor material being a different state for each angle of the reference beam, imposing the reflected object beam and the reference beam onto a detection device to create a plurality of interference patterns, one for each of the reference beam angles, and comparing the interference patterns to one another to determine and display characteristics within the semiconductor material.
US07733498B2	Exposure apparatus, method of controlling the same, and manufacturing method An exposure apparatus comprises an optical system support supporting a projection optical system, a stage surface plate, first stage and second stages, a first interferometer configured to measure stage position in a first area, a second interferometer configured to measure stage position in a second area, a third interferometer which is interposed between the first interferometer and the second interferometer, a gap sensor configured to measure a gap between the optical system support and the stage surface plate, and a control unit configured to pass, in the swapping, the measurement result obtained by one of the first interferometer and the second interferometer to the other one of the first interferometer and the second interferometer using the measurement result obtained by the third interferometer, and to correct the passed measurement result based on the measurement result obtained by the gap sensor.
US07733495B2	Optical multilayer mirror and fabry-perot interferometer having the same An optical multilayer mirror of a Fabry-Perot interferometer includes a reinforcing section provided as a side wall of each of second and fourth high refractive-index layers. The reinforcing section is configured to support a portion of each of the second and fourth high refractive-index layers covering a top surface of each of first and second low refractive-index layers and reach first and third high refractive-index layers via each of the first and second low refractive-index layers, respectively. Even when the first and second low refractive-index layers lack a mechanical strength with a high n ratio achieved by selecting materials for the first through fourth high refractive-index layers and the first and second low refractive-index layers, the reinforcing section helps prevent the second and fourth high refractive-index layers from being bent. The optical multilayer mirror thus features a wide high-reflectance band.
US07733494B2	Bandwidth measuring device for high pulse repetition rate pulsed laser A method and apparatus for estimating bandwidth of laser output light is described which may include a dispersive element producing a dispersed output having a plurality of spectrum images from at least a portion of the laser output light. An array of light detecting elements is oriented to receive the dispersed output together with a shifting mechanism that moves the array, the dispersed output, or both, relative to each other. Electronics may be provided for determining the widths of at least two spectrum images at different phases of registration between the spectrum images and light detector elements and for averaging the widths to estimate a laser output bandwidth. The-spectrum images formed by the laser output light may be under-sampled, e.g., in the spatial or time domains.
US07733491B2	Sensor device and testing method utilizing localized plasmon resonance A sensor device is formed from a metal film having a plurality of openings, a sensor material positioned within each of the openings, a light source that emits light having a first wavelength, and a light detector that detects light emitted from the light source and transmitted through or reflected from the openings. The plurality of openings are arranged periodically in a first direction in the metal film, and both a size of each of the plurality of openings and an interval thereof in the first direction are equal to or less than the wavelength of the light.
US07733489B2	Optical method of multi-band mixing The color difference and/or chromaticness difference between target objects and background objects can be enhanced. Different colors with different color attributes mean different objects. In some cases, different chromaticness, such as saturation and hue, mean different two- or three-band ratio. The light from the surface of objects is filtered by optical system integrated with two- and three-band mixing method so that only the light in the wavelength range of the pass bands can reach optical sensors for opto-electronic sensing devices. With this kind of opto-electronic sensing devices, two- and/or three-band ratio criteria widely used in remote sensing and machine vision applications can be calculated in terms of color attributes. Multi-spectral imaging system can be replaced by this kind of sensing devices. This kind of two- or three-band mixing illumination can be used to identify, classify, and detect objects for human visual application, remote sensing, and machine vision application.
US07733486B2	Environmental sensor including a baffle A baffle for use with an environmental sensor such as a particle counter. The environmental sensor includes a housing and an inlet. The inlet has an axis and defines a first cross-sectional area with respect to the axis. The baffle includes a bullet configured to be positioned adjacent to the inlet along the axis. The bullet has a second cross-sectional area with respect to the axis that is between about seventy-five percent smaller than the first cross-sectional area and about three-hundred percent larger than the first cross-sectional area. In some constructions, the baffle substantially reduces interference from external light sources without substantially inhibiting the transport of particles entrained in the fluid to be analyzed by the environmental sensor.
US07733485B2	Measuring method and system for measuring particle size and shape of powdery or grain like particles The invention relates to a measuring method for measuring the properties of a powder or granular sample (1) from the surface information of the sample. According to the method the sample is leveled for the measurement, at least one image of the surface of the sample (1) is taken and the properties, such as the grain-size distribution, of the sample (1) are determined by processing the information material by calculation. According to the invention, the sample (1) is made to be supported on a transparent sample plate (2, 13, 14, 15) and an image is taken through this sample plate (2, 13, 14, 15).
US07733483B2	Method for ascertaining the orientation of molecules in biological specimens A method of ascertaining the orientation of molecules in a biological specimen by total internal reflection includes focusing illuminating light through an objective in different positions in a plane of a pupil of the objective so as to generate a plurality of respective differently oriented evanescent fields in the specimen. Respective different fluorescence intensities resulting from the differently oriented evanescent fields are correlated with respective different orientations of molecules in the specimen.
US07733482B2	System and method for determining at least one constituent in an ambient gas using a microsystem gas sensor A system and method for measuring air quality using a micro-optical mechanical gas sensor is disclosed. According to one embodiment of the present invention, the system includes an emission source that includes a conduit gap for receiving a gas; a plurality of electrodes for applying an electric field to at least a portion of the conduit gap, the application of the electric field creating a plasma in the conduit gap; and a detector that detects an emission from the plasma. The emission source and the detector may be micro-optical mechanical devices. A method for measuring air quality is discloses. According to one embodiment, the method includes the steps of (1) placing a chip containing an emission source and a detector in a gas flow; (2) applying an electric field to at least a portion of a conduit gap within the emission source, the electric field creating a plasma; (3) detecting an emission from the plasma; and (4) processing data related to the detected emission to determine at least one constituent of the gas flow.
US07733481B1	Facilitating surface enhanced Raman spectroscopy An apparatus and related methods for facilitating surface-enhanced Raman spectroscopy (SERS) are described along with methods for fabricating the apparatus. For one embodiment, the apparatus comprises a metallic fishnet defining a plurality of voids therein. The metallic fishnet exhibits at least one acute V-shaped cross-sectional feature between at least one adjacent pair of the voids.
US07733480B2	Device to aid the positioning of a pilot in an aircraft A visual aid is used by a pilot in an aircraft to position himself in the cockpit by an axial movement, called movement along the X axis, in an aircraft reference coordinate system, and by a vertical movement, called movement along the Z axis, in the aircraft reference system. The visual aid comprises two geometric shapes (3, 4), separated in space and designed to be visually aligned by the pilot; these shapes have the characteristic that each has a visual reference (31, 41) on its surface, approximately in the same horizontal plane perpendicular to the vertical XZ plane.
US07733478B2	Gray balance calibration of an imaging system One aspect of the disclosure is directed to a calibration system. The calibration system includes an imaging device including a predetermined print engine capable of being calibrated and a calibration sheet. The calibration sheet includes at least one visible calibration reference region including a given mix of pre-selected reference colorants printed in the calibration reference region on the calibration sheet. The pre-selected reference colorants have been previously printed on the printable calibration sheet using a different imaging device that is different than the given imaging device and that has the same print engine as the given imaging device. The calibration sheet includes freshly printable target regions on the calibration sheet. The given imaging device is configured to enter into the calibration mode, wherein the given imaging device is configured to freshly print a mix of colorants corresponding to the pre-selected reference colorants onto at least one of the target regions.
US07733473B2	Inspection apparatus and inspection method An inspection apparatus includes a wafer stage for carrying a wafer, an illumination module which irradiates an inspection beam on the wafer carried on the wafer stage, a detection module which detects scattering rays or reflection rays from the wafer on the wafer stage and outputs an image signal, a coordinates control module which stores information about the arrangement of individual inspection areas on the wafer, and an imperfect area recognition module which recognizes, on the basis of the inspection area arrangement information stored in the coordinates control module, an imperfect inspection area interfering with a wafer edge.
US07733472B2	Method and system for determining condition of process performed for coating film before immersion light exposure A method is used for determining a condition of a predetermined process for preparing a process target, which includes a coating film formed on a substrate and including a resist film. This is to prevent film peeling from occurring in the coating film when performing immersion light exposure after the predetermined process. The method includes preparing test targets, each of which includes a sample film corresponding to the coating film and formed on a sample substrate corresponding to the substrate; performing a test process on each of the test targets in a testing unit, which imitates an immersion light exposure apparatus, under a condition corresponding to a designated immersion light exposure condition; and determining a condition of the predetermined process to be used for the coating film, based on a result of the test process.
US07733471B2	Foreign substance inspection apparatus A foreign substance inspection apparatus includes an irradiating unit and first and second detecting units. The irradiating unit is configured to emit irradiating light to be obliquely incident on a surface to be inspected to form a linear irradiation region on the surface to be inspected. The first and second detecting units are arranged on the same side as that provided with the irradiating unit with respect to the surface to be inspected, and they are configured to detect scattered light caused by a foreign substance on the surface to be inspected. The first and second detecting units are arranged at opposite positions with respect to a plane containing the linear irradiation region.
US07733470B2	Method and apparatus for real-time measurement and calculation of a fluorescent lifetime The invention comprises a real-time stroboscopic acquisition protocol for a measurement of the fluorescence decay and a method and apparatus for real-time calculation of the fluorescence lifetime from that measurement.
US07733469B2	Image null-balance system with multisector-cell direction sensing A light beam is detected/localized by multisector detector—quad-cell, or 5+ sectors handling plural beams. Preferences: Beams focus to diffraction limit on the detector, which reveals origin direction by null-balance—shifting spots to a central sector junction, and measuring shifts to reach there. One or more MEMS reflectors, and control system with programmed processor(s), sequence the spot toward center: following a normal to an intersector boundary; then along the boundary. One afocal optic amplifies MEMS deflections; another sends beams to imaging optics. After it's known which sector received a spot, and the beam shifts, source direction is reported. The system can respond toward that (or a related) direction. It can illuminate objects, generating beams reflectively. Optics define an FOR in which to search; other optics define an FOV (narrower), for imaging spots onto the detector. The FOR:FOV angular ratio is on order of ten—roughly 180:20°, or 120:10°.
US07733465B2	System and method for transitioning from a missile warning system to a fine tracking system in a directional infrared countermeasures system A method for transitioning a target from a missile warning system to a fine tracking system in a directional countermeasures system includes capturing at least one image within a field of view of the missile warning system. The method further includes identifying a threat from the captured image or images and identifying features surrounding the threat. These features are registered with the threat and image within a field of view of the fine tracking system is captured. The registered features are used to identify a location of a threat within this captured image.
US07733463B2	Lithographic apparatus and device manufacturing method A support constructed to support a patterning object, the patterning object being capable of imparting the radiation beam with a pattern in its cross-section to form a patterned radiation beam, is disclosed, wherein the support comprises a plurality of structures having a plurality of local contact areas, respectively, on which the patterning object is disposed, in use, and a clamp configured to clamp the patterning object to the plurality of contact areas, wherein each structure is configured so that a local shear stiffness of each local contact area is substantially balanced with a local friction limit at each local contact area, respectively.
US07733462B2	Exposure apparatus and exposure method An exposure apparatus includes a beam providing unit having a first component and second component to provide an exposure beam having pattern information to a substrate W, a measurement unit which measures a relative variation between the first component and the second component, a driving mechanism which drives at least one of the first component and second component, and a compensator which controls the driving mechanism on the basis of the measurement result obtained by the measurement unit so as to reduce the relative variation between the first component and the second component in at least the period during which the pattern is transferred onto the substrate.
US07733461B2	Exposure apparatus An exposure apparatus includes an illumination optical system for illuminating a reticle with exposure light, a projection optical system for projecting a pattern of the reticle onto a plate via a liquid supplied to a space between the projection optical system and the plate, a supply pipe for supplying the liquid to the space, a recovery pipe for recovering the liquid from the space, and a measuring unit for measuring a refractive index of the liquid. The measuring unit includes (i) a light source for generating a measurement light having the same wavelength as that of the exposure light, (ii) a liquid reservoir for storing the liquid, the liquid reservoir being disposed apart from the space via the supply pipe or the recovery pipe, and having a transmitting surface for transmitting the measurement light and a reflecting surface for reflecting the measurement light transmitted by the transmitting surface and the liquid in the reservoir, and (iii) a detector for detecting the measurement light reflected on the reflecting surface and transmitted by the liquid in the liquid reservoir and the transmitting surface.
US07733457B2	Liquid crystal display and method of fabricating the same An object of the present invention is to provide a liquid crystal display, which can surely perform an instillation process used when liquid crystal is sealed between substrates in a cell process, and a fabrication method thereof. A liquid crystal display comprises a sealing material made of a photo-curing type material which seals liquid crystal sandwiched between substrates, and a shading film having a shading area which overlays a red-colored layer transmitting red light, a green-colored layer transmitting green light and a blue-colored layer transmitting blue light, wherein only the blue-colored layer is formed in an area of the shading film contacting with the sealing material and the photo-curing type material of the sealing material is structured to have a light reactive area for a wavelength of blue color band.
US07733454B2	Liquid crystal display having a modified electrode array A liquid crystal display having electrodes on a single substrate. A transparent planar electrode elongated in the transverse direction is formed on the inner surface of a substrate, and an insulating film is deposited thereon. A plurality of linear electrodes, which are elongated in the longitudinal direction and either transparent or opaque, are formed on the insulating film. Potential difference between the planar and the linear electrodes generated by applying voltages to the electrodes yields an electric field. The electric field is symmetrical with respect to the longitudinal central line of the linear electrodes, and has parabolic or semi-elliptical lines of force having a center on a boundary line between the planar and the linear electrodes. The line of force on the planar and the linear electrodes and on the boundary line between the planar and the linear electrodes has the vertical and the horizontal components, and the liquid crystal molecules are re-arranged to have a twist angle and a tilt angle. The polarization of the incident light varies due to the rearrangement of the liquid crystal molecules.
US07733453B2	Method of fabricating a liquid crystal display device using a three mask process and double layer electrodes A fringe field switching thin film transistor substrate includes a gate electrode connected to the gate line, a source electrode connected to the data line, a drain electrode opposed to the pixel electrode and a semiconductor layer defining a channel between the source electrode and the drain electrode. A common electrode extends from the common line into the pixel area. A pixel electrode extends from the drain electrode into the pixel area overlapping the common electrode with the gate insulating film. The gate line and the common line are formed from a first conductive layer group having double conductive layers, and the common electrode is formed by an extension of the lowermost layer of the common line. The data line, the source electrode and the drain electrode are formed of a second conductive layer group having double conductive layers.
US07733451B2	Liquid crystal display, method of manufacturing the same, and apparatus manufacturing the same A liquid crystal display, a method for manufacturing the same, and an apparatus for manufacturing the same are provided. A method includes forming a field-generating electrode on a panel, and forming an inorganic alignment layer on the substrate by using atmospheric pressure plasma. The process using the atmospheric pressure plasma to form the inorganic alignment layer is more simplified by omitting the etch steps of the short point area and the pad areas. Also, alignment layers may be formed on the mother glass with various shapes by using one apparatus.
US07733449B2	Liquid crystal display A liquid crystal display of a vertical alignment (VA) mode using a circular polarization plate is provided which can reduce light leak as observed along an oblique direction and achieve a high contrast ratio. The VA mode uses a liquid crystal layer of vertical alignment in an initial alignment state. A film having generally isotropic optical characteristics in an omnidirection is used as a protective film, on a liquid crystal cell side, of first and second polarization plates disposed outside the liquid crystal cell, and first and fourth retardation films have an Nz coefficient smaller than 1.
US07733448B2	Liquid crystal display device It is an object of the present invention to provide a method for manufacturing a thin phase difference film of a liquid crystal display easily so as not to prevent a liquid crystal from being driven so that cost for manufacturing a liquid crystal display is more reduced than conventionally. A liquid crystal display device according to the present invention has a structure in which phase difference films that have the same function as a conventional phase difference film are formed by using a liquid crystal stabilized with a polymer over a first substrate and a second substrate that have electrodes formed thereover, and a liquid crystal material is interposed between these substrates. In addition to the structure as described above, it is also a feature that the phase difference film formed over the substrate is formed by using a liquid crystal that is stabilized with a polymer including a conductive material.
US07733441B2	Organic electroluminescent lighting system provided with an insulating layer containing fluorescent material It is an object of the present invention to provide a lighting system having favorable luminance uniformity in a light-emitting region when the lighting system has large area. According to one feature of the invention, a lighting system comprises a first electrode, a second electrode, a layer containing a light-emitting substance formed between the first electrode and the second electrode, an insulating layer which is formed over a substrate in a grid form and contains a fluorescence substance, and a wiring formed over the insulating layer. The insulating layer and the wiring are covered with the first electrode so that the first electrode and the wiring are in contact with each other.
US07733439B2	Dual film light guide for illuminating displays A front light guide panel including a plurality of embedded surface features is provided. The front light panel is configured to deliver uniform illumination from an artificial light source disposed at one side of the font light panel to an array of display elements located behind the front light guide while allowing for the option of illumination from ambient lighting transmitted through the light guide panel. The surface embedded surface relief features create air pockets within the light guide panel. Light incident on the side surface of the light guide propagates though the light guide until it strikes an air/light material guide interface at one on the air pockets. The light is then turned by total internal reflection through a large angle such that it exits an output face disposed in front of the array of display elements.
US07733438B2	Liquid crystal display device An area light source device, which is disposed between a liquid crystal display panel and a display medium and illuminates the liquid crystal display panel from a back side thereof, includes a light source, a light guide, and a first optical sheet and a second optical sheet which are stacked between the liquid crystal display panel and the light guide and impart predetermined optical characteristics to emission light emerging from the light guide. The first optical sheet is disposed on the liquid crystal display panel side, and the second optical sheet is disposed on the light guide side. The first optical sheet and the second optical sheet have opening parts opposed to the display medium, and the first optical sheet is disposed to cover edges that define the opening part of the second optical sheet.
US07733434B2	Liquid crystal display including buffer electrodes with higher voltage than pixel electrodes, on same layer with pixel electrodes, and overlapping a gate line A liquid crystal display, including a thin film transistor array panel, a common electrode panel including a common electrode and facing the thin film transistor array panel, and a liquid crystal layer disposed between the thin film transistor array panel and the common electrode panel, wherein the thin film transistor array panel, includes a substrate, gate lines formed on the substrate, data lines intersecting, and insulated from, the gate lines, pixel electrodes formed in intersection areas of the gate and data lines, first thin film transistors electrically connected to the gate lines, the data lines, and the pixel electrodes, and buffer electrodes being supplied with a first voltage higher than a second voltage of the pixel electrodes when a corresponding pixel electrode is supplied with a data voltage and located at a boundary of the intersection areas in which they are formed and overlapping a portion of the gate line adjacent to the boundary.
US07733433B2	Liquid crystal display having a reduced number of data driving circuit chips A liquid crystal display includes a substrate, a plurality of gate lines formed on the substrate, a plurality of data lines intersecting the plurality of gate lines, a plurality of thin film transistors connected to the plurality of gate lines and the plurality of data lines, and a plurality of pixel electrodes connected to the plurality of thin film transistors and arranged in a matrix, wherein each of the pixel electrodes includes a first side parallel to each gate line and a second side being shorter than the first side, the second side being formed next to the first side, wherein the plurality of pixel electrodes that are adjacent to each other in a column direction are connected to different data lines from each other.
US07733430B2	LCD panel having two pixel electrodes, coupling capacitance Cx, and satisfying Cst1/Clc1 = Cst2/Clc2 An LCD panel includes a pixel unit having a first and a second pixel electrodes. The method includes: providing a first and a second curing voltages Vcuring1, Vcuring2 based on V1=[Cst1/(Cst1+Clc1)]×Vcuring1 and V2=[Cst2/(Cst2+Clc2)]×Vcuring2, in which, V1=a voltage of the first pixel electrode and V2=a voltage of the second pixel electrode, Clc1=a first liquid crystal capacitor formed by the first pixel electrode, a liquid crystal layer and a first common electrode, Cst1=a first storage capacitor formed by a first capacitor electrode, a dielectric layer and a second common electrode, Clc2=a second liquid crystal capacitor formed by the second pixel electrode, the liquid crystal layer and the first common electrode, Cst2=a second storage capacitor formed by a second capacitor electrode, the dielectric layer and a third common electrode, and applying the first and the second curing voltages simultaneously onto the second and the third common electrodes of the pixel unit to result in a ratio of the voltage of the first pixel electrode to the voltage of the second pixel electrode ranging from 0.9 to 1.1.
US07733426B2	DTV receiving system and method of processing DTV signal A digital television (DTV) receiving system includes a tuner, a demodulator, a known data detector, an equalizer, a transmission detector, and a block decoder. The tuner receives a DTV signal having a data frame in which main and mobile service data are multiplexed. The demodulator demodulates the DTV signal, and the known data detector detects known data included in the mobile service data. The equalizer equalizes the demodulated DTV signal using the detected known data, and the transmission parameter detector detects an error correction mode from the equalized DTV signal. Finally, the block decoder decodes the equalized DTV signal for error correction using the detected error correction mode.
US07733423B2	Method for avoiding switch-over delays when changing channels in digital television transmission systems A method for avoiding switch-over delays when changing channels in digital television transmission systems is based on a television transmission system in which a plurality of channels (K1, . . . , Kn) are transmitted in time-division-multiplexed fashion in a data stream (5). An overview channel comprising television picture information items from a plurality of the transmitted channels is provided at the transmitting end. The overview channel is decoded in the television receiver, and the picture information items of the selected channel that are provided in the overview channel are represented while changing channels.
US07733422B2	Rapid channel signal identification An apparatus, for use in a receiver configured to receive electronic signals, for identifying digital signals that are available for reception, includes a timing recovery device configured to receive an incoming signal, related to a transmitted signal, the incoming signal having a first symbol rate, and to re-sample the incoming signal to provide a second symbol rate, and an analyzer that is in communication with the timing recovery device and that is configured to make a determination as to whether a difference between the second symbol rate and a third symbol rate of a transmitter providing the transmitted signal is within an acceptable tolerance and to use the determination in an analysis of whether the transmitted signal is available for reception.
US07733418B2	Encapsulated self-balancing remote video camera system An encapsulated self-balancing remote video camera system is provided, which is capable of righting itself into an upright, balanced position. The encapsulated self-balancing remote video camera system has a video camera, wireless communication means and balancing mass disposed within an internal, self-righting, inner structure. The inner structure is disposed within a transparent outer container, such that the inner structure may rotate within the outer container when resting upon a surface, such that the video camera rotates into an upright position by gravitational forces acting upon the balancing mass disposed with the inner structure. In addition, a remote operation means is provided, which enables a user of the present system to view video images transmitted from the video camera, and to remotely control movement of the lens and/or video camera.
US07733415B2	Illumination apparatus for image-taking A small illumination apparatus including an optical member less affected by heat from a light source is disclosed. The illumination apparatus has a light source and an optical member closer to a light irradiation side than the light source and having an entrance surface formed as a refractive surface. The entrance surface has a first area receiving a first light component emitting from the light source at an angle smaller than a first angle with respect to an irradiation optical axis and a second area receiving a second light component emitting at an angle larger than the first angle with respect to the irradiation optical axis. The second area is positioned closer to the light source than the first area in the irradiation optical axis direction. Each of the first and second areas is formed a flat surface or a curved surface having a concave shape facing the light source.
US07733412B2	Image pickup apparatus and image pickup method An image pickup apparatus which can reduce the time required for automatic focus scanning. The size of the face is determined based on information on a subject's face, which is detected from image data acquired by shooting by an image pickup device. The subject distance is estimated based on the determined size of the face. The depth of field is calculated. A range over which the focus lens is driven varies according to the estimated subject distance and the calculated depth of field.
US07733408B2	Optical device module, optical path fixing device, and method for manufacturing optical device module A solid-state image sensor, a transparent cover, a DSP, a wiring board and the like are sealed in a sealing portion by molding of a synthetic resin, and fixed to an imaging unit. At this time, a portion of the transparent cover is exposed from the sealing portion. The optical path fixing device and the imaging unit sealed by the sealing portion are fixedly combined by engagement of hook engaging portions and hook portions, in a state where the lower end surface of a lens barrel comes into contact with the exposed portion. As the result, positioning accuracy of a lens with respect to a pixel area of the solid-state image sensor dose not deteriorate even if a substrate on which the solid-state image sensor is arranged is deflected or distorted.
US07733407B2	Image processing apparatus and method for preferably correcting distortion aberration An image processing apparatus includes a distortion correcting part for correcting pixels of image data having distortion due to distortion aberration characteristics of an optical system, and outputting corrected image data; a filtering part for applying a predetermined filtering process based on filter coefficients to the image data to be input into the distortion correcting part; and a filter coefficient setting part for setting, based on input distance data or relative coordinate data measured from a position corresponding to an optical center of the optical system to a target pixel for the filtering process on the image data, the filter coefficient which is used in the filtering part and is assigned to a position of the target pixel in accordance with the distortion aberration characteristics.
US07733405B2	Apparatus and method for resizing an image A hardware implemented method for resizing an image is provided. In this method, the image is captured and a size of the image is calculated as the image is being received by a display controller. Thereafter, a scaling ratio is calculated based on the calculated size of the image and an output image size. The display controller then scales the image according to the calculated scaling ratio. A display controller and a resizer for resizing the image are also described.
US07733404B2	Fast imaging system calibration Systems and methods are disclosed for calibrating an imaging system comprising a processing unit communicatively coupled to one or more imaging devices. The imaging system may also include a display. In an embodiment, a sequence of display features are displayed on a display, and imaged by the imaging device or devices. Spatial data is compiled related to the display features and the corresponding image features. In an embodiment, the display, imaging device or device, or both may be repositioned and another sequence of display features may be presented and the spatial data compiled. Using optimization and calibration techniques, the compiled spatial data may be used to obtain one or more internal imaging device parameters, one or more external parameters, or both.
US07733400B2	Optical image receiving device having wide dynamic range Provided is an optical image receiving device having a high and rapid sensitivity and a wide dynamic range manufacture in a CMOS process. The image receiving device includes a capacitor transistor for a special purpose in addition to a general structure of three transistors and a light receiving portion. The capacitor transistor has first and second source/drain ports connected to the capacitance node and the floating diffusion node, respectively, and is gated in response to activation of a predetermined capacitor control signal. In the CMOS optical image receiving device, the floating diffusion node is pumped over an external power voltage. Thus, the electronic potential of the floating diffusion node in the initialization state is much higher than the maximum voltage of the light receiving portion. Thus, the CMOS active pixel has a very high sensitivity in a region where the intensity of light is weak. Furthermore, since the sensitivity decreases in a region where the intensity of light is strong, the dynamic range thereof can be increased very large.
US07733398B2	Photoelectric converting film stack type solid-state image pickup device A solid-state image pickup device comprises: a semiconductor substrate; at least one photoelectric converting film that generates signal charges corresponding to an amount of incident light; at least one set of pixel electrode films arranged in row and column directions and attached to said at least one photoelectric converting film; vertical transfer paths in the semiconductor substrate, extended in the column direction; and charge accumulating portions in the surface portion of the semiconductor substrate that accumulate signal charges from the pixel electrode films, wherein the charge accumulating portions comprise a plurality of sets, each comprising a subset of the charge accumulating portions arranged in the column direction, and wherein the subset reads out the accumulated signal charges to the corresponding one of the vertical transfer paths, and wherein the two adjacent subsets of the charge accumulating portions are shifted to each other in a direction along the vertical transfer paths.
US07733395B2	Variable-gain amplifier circuit and method of changing gain amplifier path A variable-gain amplifier circuit and a method of changing gain amplifier paths are provided for receiving and amplifying an image sensing signal. The variable-gain amplifier circuit includes variable path and gain amplifier circuits. According to the amplification factor for the image sensing signal, the gain amplifier paths in the variable path and gain amplifier circuits are changed based on a control signal, so as to achieve the appropriate construction of the variable-gain amplifier circuit. The image sensing signal generates the required image result through appropriate numbers of variable gain amplifiers, thereby decreasing the power consumption of the circuit and reducing the design requirement of the circuit.
US07733392B2	Method and apparatus for reducing effects of dark current and defective pixels in an imaging device A method and apparatus for identifying and compensating for the effects of defective pixels in high resolution digital cameras having image processing apparatus. The apparatus includes a storage system for storing data corresponding to either a dark current reference image and a white reference image and at least one actual image captured by a pixel array, and at least one processor coupled to the storage system for compensating the data corresponding to the actual image based upon the stored data. The method includes capturing and storing both dark and white reference images as well as capturing and storing actual images, identifying pixels that are affected by dark current or are defective pixels, reading data corresponding to pixels of an actual image affected by dark current or that are defective from the storage system and compensating the affected pixels.
US07733388B2	Digital camera capable of image processing for display on a monitor In a digital camera, when a motion image reducing mode is set, a pointer is displayed on a monitor. When the operator operates on cursor key, the pointer moves, and when the operator operates a determination key at two different pointer positions, a rectangular frame is formed. Namely, the two pointer positions represent upper left and lower right coordinates of the frame. The picked up real time motion image is displayed in the rectangular frame. The displayed motion image is reduced to a magnification corresponding to the ratio of the rectangular frame with respect to the monitor frame. When the operator operates a shutter button at this time, the image in the motion image frame is recorded on a memory card. As the motion image is displayed in the motion image frame in accordance with the instruction by the operator and the image in the motion image frame is recorded in accordance with the operation of the shutter button, a processed image can be obtained without the necessity of preparing a separate image processing apparatus.
US07733385B2	Image file generating apparatus and method, and image file reproducing apparatus and method First and second data areas are defined in an image file, and each area is defined to have an image data recording area and a header data recording area. When the image file is reproduced, header data in a first header data recording area at the leading end is read and first image data that has been recorded in the first image data recording area is reproduced. If an image file reproducing apparatus is one that can reproduce second image data that has been recorded in the second data area, then the second image data is read from the second area and reproduced. The first image data is data that has undergone JPEG compression, and the second image data is data that has not been compressed. Since the compressed first image data and uncompressed second image data can be stored in one file, an increase in number of files can be reduced even if there is an increase in types of image format.
US07733384B2	Imaging device An imaging device of the present invention includes a solid-state image sensing device; a vertical transfer drive circuit for feeding a subpulse to the solid-state image sensing device; and a control circuit, and repeats a series of photographing operations in a cycle same as or longer than a period during which the series of photographing operations are performed, the series of photographing operations including an exposure operation for exposing an imaging area after the subpulse is fed to the solid-state image sensing device to sweep out electric charges accumulated in pixels. The control circuit stops the subpulse from being fed from the vertical transfer drive circuit to the solid-state image sensing device during a period during which the exposure operation included in the series of photographing operations is not performed.
US07733383B2	Image capture apparatus with a color property control function and image capture program Color temperature is calculated on the basis of image data captured by a CCD. An appropriate exposure value is calculated on the basis of a brightness component of the image data. It is determined whether or not LEDs should emit auxiliary lights to obtain the appropriate exposure value. When it is determined that the LEDs are required to emit, light quantity of the combined light to be emitted by the LEDs is calculated. The light quantities of the respective LEDs are set such that the emission ratio of the LEDs corresponds to the calculated color temperature. The LEDs emit the lights at the set light quantities. The captured image is adjusted based on the calculated color temperature.
US07733382B2	Wide dynamic range linear-and-log active pixel A pixel circuit having an improved dynamic range is disclosed. When incoming light detected by the photodiode is strong, the accumulated (integrated) charge on a signal capacitor becomes large. To compensate, the excess signal component becomes compressed and the pixel circuit begins operating in logarithmic rather than linear mode. In this way, the circuit can achieve a higher dynamic range more closely resembling the image sensing properties of the human eye.
US07733380B1	Method and/or architecture for controlling encoding parameters using integrated information from camera ISP A camera including a first circuit and a second circuit. The first circuit may be configured to perform image signal processing and control one or more functions of the camera using image signal processing related information and encoding related information. The second circuit may be configured to encode image data using the image signal processing related information and camera settings information. The first circuit may be further configured to pass the image signal processing related information and the camera settings information to the second circuit. The second circuit may be further configured to pass the encoding related information to the first circuit.
US07733379B2	Composite still-image creating device capable of creating a still image from moving images Each of the frames forming moving images is decoded in sequence and while a candidate frame is decoded, a decision is made as to whether or not the motion vector variable-length decoded for each macroblock is greater than a threshold, so that if the motion vector is greater than the threshold, the decoded image of the corresponding block is decided as a partial image forming a subject portion that had motion in the candidate frame and then combined with a base image stored in a still memory in a combining unit, whereby, by repeating this process, a composite still image which allows the motion of the subject to be grasped visually is created in the still memory.
US07733375B2	Setting imager parameters based on configuration patterns An imager comprises an image sensor and a controller coupled to the image sensor. The image sensor is configured to obtain an image of a field of view of the image sensor with a configuration pattern placed in the field of view. The controller is configured to determine a location of the configuration pattern within the image, interpret the configuration pattern, and set a parameter of the imager based on the interpretation of the configuration pattern.
US07733373B2	System and method of network-linked digital terrestrial television broadcasting In a cellular phone terminal, a bit error rate measurement section measures a bit error rate of broadcast data received by a broadcast reception section for receiving a digital broadcast to output broadcast data while a transmission operation of a communication transmission section for wirelessly communicating with a broadcasting communication network is performed. When the measured bit error rate is equal to or higher than a predetermined threshold, stopping of the transmission operation of the communication transmission section is instructed. Thus, a failure such as interruption of television broadcasting reproduction can preliminarily be prevented by avoiding error occurrence in reception of the 1 segment broadcasting service due to an influence of a transmission electric wave in data communication. As a result, stable reception of the 1 segment broadcasting service can be executed.
US07733370B2	Night vision camera mount quick disconnect The night vision camera system includes a light, a night vision camera, and a linkage. The night vision camera is attached to the light such that the light and camera maintain a fixed orientation with respect to each other. The light is attached to the linkage and is configured to manipulate the light and night vision camera concurrently. The linkage is attached to the vehicle and extends into the vehicle interior where a handle is provided allowing the user to aim the light and night vision camera from the interior of the vehicle.
US07733368B2	Virtual reality camera A camera including a camera lens, acquisition circuitry receiving images via the camera lens, for acquiring a first field of view when the camera lens is in a first orientation and for acquiring a second field of view when the camera lens is in a second orientation, and a viewfinder displaying the second field of view when the camera lens is in the second orientation and displaying at least a portion of the first field of view at least partially composited with the second field of view.
US07733359B1	Pixel structure for electrical flat panel displays The present invention is a system and method for providing trapezoidal pixel segments with peripheral interconnections to rows and columns of pixel segments for electrical flat panel display devices. Interconnections made to pixel segments are located substantially in the non-emitting space between pixels. Pixel segment area may be configured to correspond to a desired luminous intensity for individual pixels. Luminous intensity may be determined from user, machine or process identified criteria.
US07733355B2	Apparatus and method of transforming three color signals into multi-color signal A method of and apparatus for transforming a three color signal into a multi-color signal. A method of transforming a color signal having three color components into a color signal having first through n-th color components, includes: producing a lookup table having signal values of (n-3) of n color components of a color within a three-dimensional color space and reference variables corresponding to the signal values of the (n-3) color components; extracting the reference variables from an input color signal; determining the signal values of the (n-3) color components corresponding to the extracted reference variables from the lookup table; and producing a color signal having n color components using the determined signal values of the (n-3) color components.
US07733351B1	Method for forming an interactive image of indoor and outdoor spaces A method for forming an interactive image of a property comprising determining at least a first measurement of a space within the property forming at least one measurement line, inputting the at least first measurement to a processor, and inputting textual information and at least one graphic image concerning the space to the processor. A property overview image is then formed using computer instructions, the at least first measurement, the at least one measurement line, the textual information, and the at least one graphic image. The property overview image is then output for viewing by a user.
US07733350B2	Anisometric texture synthesis An anisometric texture synthesis system and method for generating anisometric textures having a similar visual appearance as a given exemplar, but with varying orientation and scale. This variation is achieved by modifying the upsampling and correaction processes of the texture synthesis technique using a Jacobian field. The modified correaction process includes accessing only immediate neighbors of a pixel instead of non-local pixels. This constraint that only immediate neighbors be used also allows the generation of seamless anisometric surface textures. This is achieved by using indireaction maps containing indirection pointers that are used to jump from a set of pixels outside the boundary of a texture atlas chart to another chart. The system and method also includes an anisometric synthesis magnification technique that uses a Jacobian field to modify the magnification step of a synthesis magnification scheme and account for anisometry.
US07733346B2	FACS solving in motion capture A method, comprising: generating facial muscle activations from facial marker data; animating a computer graphics facial model using the facial muscle activations; generating a skin layer overlaying the computer graphics facial model; and animating the skin layer using the facial marker data.
US07733341B2	Three dimensional image processing A method and apparatus for storing object files containing triangle strips and displaying the triangle strips in the order in which they were created and stored in the object files.
US07733339B2	System and method for partitioning CAD models of parts into simpler sub-parts for analysis of physical characteristics of the parts A slicing tool works with a solid modeling system to partition the geometric representation of a three-dimensional part into a series of simpler sub-parts the union of which replicates the original part in a manner that introduces a minimal number of new surfaces in each sub-part and in total. This approach uses the existing analytic surfaces that define the part geometry to partition the part and selects a partition from a quality metric based on the number of trimmed surfaces of the part being partitioned and the candidate sub-parts. This approach greatly reduces the complexity of any downstream solid modeling applications that perform combinatorial surface operations on the geometric representation of the series of sub-parts to analyze physical characteristics such as radiation, mechanical, optical, thermal, structural or biological of the original part.
US07733330B2	Mobile device keyboard having three-direction keys A keyboard for a mobile device is provided that includes a plurality of three-direction keys. The three-direction keys may include three protruding portions that each correspond to at least one character of the keyboard. At least one of the three-direction keys may be inverted with respect to other ones of the three-direction keys. The three-direction keys may be positioned on the mobile device to provide characters in at least three rows the keyboard.
US07733328B2	Multi-function roller apparatus and method for a control device A roller for a control device includes a roller wheel having an outer portion formed of metal and a corrugated surface; a pivot arm configured to pivot in a first direction to contact the corrugated surface and to pivot in a second direction to move away from the corrugated surface; and energy driven means configured to pivot the pivot arm.
US07733324B2	Display device and image erasing method A display device including a display layer displaying a black or white color according to an applied voltage, a transparent and non-transparent electrode that are disposed to sandwich the display layer, and a TFT driving circuit capable of applying any given voltage between the pair of electrodes. Also provided is a connection destination switching switch capable of switching the connection destination of the entire transparent electrode to an earth terminal or a connector power source terminal of an external power source connector. With this configuration, a voltage can be applied between the pair of electrodes without using the TFT driving circuit. Accordingly, if the TFT driving circuit fails to operate due to trouble caused by the displaying of information which is not permitted to be shown to others, a voltage can be applied to the display layer so that the displayed information can be erased.
US07733323B2	Display apparatus A reflective display apparatus that creates a display by moving particles includes a front substrate and a back substrate, a plurality of colored charged particles and an insulated liquid sandwiched between the front substrate and back substrate. A reflective first electrode and a second electrode are placed on the back substrate, and a support member is provided to keep a distance between the front substrate and the back substrate. A first portion of an area of the first electrode which borders on the second electrode is covered by a colored layer, which color is the same as the color of the charged particles.
US07733322B2	Liquid crystal display device and driving method of the same A liquid crystal display device includes a liquid crystal display panel having pixels, a light source which illuminates the display panel, and a control unit which controls the display panel and the light source. The control unit includes an insertion unit which causes the pixel to store a first voltage corresponding to a video signal in a first period within one frame period and to store a second voltage corresponding to a non-video signal in a second period that follows the first period, and a driving unit which enables the light source at least in a period corresponding to the first period in which the first voltage is held in the pixel, and disables the light source in a period corresponding to the second period in which the second voltage is held in the pixel, and is configured to set the first and second voltages at different independent values.
US07733310B2	Display screens having optical fluorescent materials Fluorescent screens and display systems and devices based on such screens using at least one excitation optical beam to excite one or more fluorescent materials on a screen which emit light to form images. The fluorescent materials may include phosphor materials and non-phosphor materials such as quantum dots. A screen may include a multi-layer dichroic layer.
US07733309B2	Image display apparatus In a light emitting display apparatus requiring power supply lines, excellent uniformity in display luminance is provided over a relatively large screen by disposing at least one of input terminals for the power supply lines between input terminals for signal lines.
US07733307B2	Emission driver for organic light emitting display device An emission driver for an organic light emitting display device is disclosed. The emission driver includes a plurality of flip-flops, and each flip-flop selectively receives two input signals and inverts a level of a received input signal. Also, each flip-flop transmits the level-inverted signal to an adjacent flip-flop, inverts the level-inverted signal, and transmits the inverted level-inverted signal to the adjacent flip-flop and as an emission control signal. To invert the level of the received input signal, the emission driver includes a level shifter, which includes transistors of the same conductivity type arranged to reduce power consumption.
US07733303B2	Plasma display apparatus and method of driving the same A plasma display apparatus and a method of driving the same are disclosed. In the method, a first pulse of a positive polarity direction and a second pulse of a negative polarity direction are alternately supplied to the first electrode during a sustain period. In this case, an absolute value of a voltage of the first pulse is different from an absolute value of a voltage of the second pulse. A third pulse of a positive polarity direction to the third electrode is supplied during the supply of the first pulse, and a fourth pulse having a sum of a voltage magnitude of the third pulse and a voltage magnitude of the second pulse is supplied to the third electrode during the supply of the second pulse.
US07733302B2	Plasma display device and driving method thereof In conventional plasma display devices, reset by obtuse waves has been performed since discharge intensity becomes higher and background light emission is increased when reset by rectangular waves is performed. However, further improvement of the contrast to improve the image quality has been demanded. The present invention provides a driving method of a plasma display device using obtuse-wave reset in which sustain time of an achieved potential of the obtuse-wave reset is controlled in accordance with a display ratio of a video signal.
US07733301B2	Plasma display apparatus and driving method thereof The present invention relates to a plasma display apparatus and driving method thereof, wherein rising and/or falling times of data pulses applied to address electrodes in an address period are controlled to reduce noise generation. Thus, address discharge is stabilized, discharge efficiency of plasma display panel is enhanced, and electrical damage to data drive ICs is prevented. The plasma display apparatus includes a plasma display panel including a plurality of address electrodes, a data driving unit including a plurality of data drive ICs that has a plurality of channels, wherein the data drive ICs are electrically connected to the address electrodes through the channels and drive the address electrodes, and a data pulse controller that controls the voltage-rising time and/or the voltage-falling time of the data pulses applied to the plurality of the address electrodes in an address period to be a sufficient duration, e.g. 100 ns or longer, by controlling the data driving unit.
US07733300B2	Plasma display The inventive plasma display is capable of enhancing the luminous efficiency and the brightness by minimizing ineffective ultraviolet rays.The plasma display according to the present invention comprises: a first transparent electrode having two or more protrusion parts; and a second transparent electrode having two or more protrusion parts corresponding respectively to the protrusion parts of the first transparent electrode. When discharges between the first and second transparent electrodes take place, there are two or more peaks in the discharge intensity of each transparent electrode.
US07733292B2	FM chip antenna A frequency modulation (FM) chip antenna having a microwave base board printed thereon with a helical radiation metallic member of a single layer or multiple layers, the microwave base board is provided with a feeding point and a grounding point to receive energy in the mode of electromagnetic wave coupling.
US07733290B2	Merchandise surveillance system antenna and method Embodiments of the invention provide a method, system and apparatus for detecting a merchandise marker in which a first antenna has a circuit having a first loop defining a first area and a second loop defining a second area substantially coplanar with the first area. A second antenna is substantially coplanar and orthogonally positioned with respect to the first antenna. The second antenna has a circuit having a third loop defining a third area and a fourth loop defining a fourth area substantially coplanar with the third area.
US07733288B2	Passive anti-jamming antenna system and method A tunable passive anti-jamming antenna array system and method for minimizing the effects of electromagnetic interference in radio frequency antenna systems. The system and method utilize an external array of passive open circuited antennas strategically arranged between an intended receiving antenna unit and interfering signals to disrupt the interference signals and reduce the electromagnetic energy, interference, and noise reaching the intended receiving antenna unit.
US07733286B2	Wideband printed dipole antenna for wireless applications In a broadband printed dipole antenna for wireless applications, metal plates of a radiation portion, a feed-in portion and a bandwidth modulation portion are formed on a substrate. Two radiation portions come with a specific shape and have an interval between the two radiation portions. The feed-in portion is composed of two separated long bars and coupled to one of the specific shaped radiation portions. The bandwidth modulation portion is disposed symmetrically adjacent to the feed-in portion, such that the impedance matching can be adjusted to form a broadband dipole antenna for WiMAX applications.
US07733285B2	Integrated, closely spaced, high isolation, printed dipoles An antenna configuration includes two closely spaced antennas each positioned so as to be orthogonally polarized with respect to the other. The antenna configuration increases antenna isolation and reduces electromagnetic coupling between donor side antenna and repeat side antenna. The antennas include printed dipoles connected to respective transceivers through respective baluns to balance the non-symmetrical portions of the antenna feed paths to reduce unwanted radiation therein. Printed features such as chokes and non-symmetrical and non-parallel structures are preferably included in the ground plane of a multi-layer circuit board to reduce or eliminate circulating ground currents.
US07733284B2	Broadband land mobile antenna There is provided a monopole antenna including a helical radiating element including a first longitudinal portion having a first winding pitch and a second longitudinal portion having a second winding pitch and a cylindrical radiating element generally coaxial with the helical radiating element and extending along at least most of the first longitudinal portion.
US07733283B2	Antenna Device An antenna device includes: a winding component having an approximately cylindrical shaped winding shaft portion and a flange portion disposed to project outside the winding shaft portion in at least one end portion of both end portions in an axial direction of the winding shaft portion; a pair of binding terminals disposed to project outside the flange portion in at least one of the flange portions; and a winding both ends of which are bound to the pair of binding terminals. The flange portion on which the binding terminals are disposed has an approximate disk shape. At least one binding terminal is disposed to be oriented along a direction approximately perpendicular to an outer periphery of the flange portion on which the binding terminal is disposed.
US07733278B2	Portable wireless device A portable wireless device is provided that eliminates the need for an antenna protruding from an housing by including a first housing and a second housing operating as a dipole antenna thus ensuring portability and delivering a high antenna performance despite its compact, low-profile and lightweight design.The portable wireless device according to the invention includes a first housing 1; a second housing 2; and a sliding unit 21 for slidably coupling the first housing 1 and the second housing 2 to each other; wherein the first housing 1 is arranged a predetermined spacing apart from the second housing 2 and includes a power feeding unit 7 for feeding power: between the first housing 1 and the second housing 2 and wherein the first housing 1 and the second housing 2 operate as a dipole antenna. The portable wireless device does not include an antenna protruding from an housing. This ensures portability and delivers a high antenna performance despite its compact, low-profile and lightweight design.
US07733277B2	Wide band antenna A wide band antenna mounted to a dielectric element has a first patch, a second patch spaced from the first patch and a ground patch. The first patch has a first portion with a feeding point thereat and a second portion connecting the first portion. The second patch has a third portion and a fourth portion connecting the third portion. The first portion and the second portion of the first patch space from and parallel the third portion and the fourth portion of the second patch respectively. The ground patch is close to the first portion of the first patch and the third portion of the second patch. The first patch obtains a first frequency range. The second patch responses electromagnetic energy from the first patch to obtain a second frequency range. Scope of the first and the second frequency ranges covers portion of ultra wide band communication frequency.
US07733276B2	Antenna system for notebook computer and method for communicating in multiple wireless systems Embodiments of an antenna system for notebook, laptop and portable computers and methods for communicating in multiple wireless systems are generally described herein. Other embodiments may be described and claimed. In some embodiments, a notebook computer comprises a plurality of transceivers, a plurality of antennas coupled to the transceivers with coaxial cables, and signal separation circuitry coupled to at least one of the coaxial cables to allow the at least one coaxial cable to be shared by two or more of the transceivers.
US07733270B1	Position location using global positioning signals augmented by broadcast television signals Apparatus having corresponding methods and computer-readable media comprises: a first receiver adapted to receive, at a user terminal, a broadcast television signal from a television signal transmitter; and a second receiver adapted to receive, at the user terminal, a satellite positioning signal from a positioning satellite; wherein a position of the user terminal is determined based on the broadcast television signal, the satellite positioning signal, a location of the television signal transmitter, and a location of the positioning satellite.
US07733268B2	Method and apparatus for determining the geographic location of a device A method and apparatus for determining the location of a device from signals provided by a plurality of satellites. A device receives a first plurality of signals comprising one signal from each of a first plurality of satellites and determines a first location of the device as a function of the first plurality of signals. The device then determines a second location thereof as a function of a second plurality of signals if the first location is not within a predetermined threshold. The second plurality of signals is a first subset of the first plurality of signals.
US07733267B2	Method for analysing a substance in a container Method and apparatus for analyzing a substance in a container, the method comprising the steps of: disposing antenna means (3) at a predetermined geometrical distance (L) from a container portion (13); transmitting a signal from said antenna means through a surface portion (12) of the substance towards said container portion; receiving a first reflected signal in said antenna means from said container portion; determining a geometrical distance (L1) from the surface portion to the container portion; varying the frequency of the transmitted signal to determine a first phase displacement between the transmitted signal and the first reflected signal; determining an optical distance from the surface portion to the container portion based on the first phase displacement; and determining the index of refraction (nt) of said substance based on the optical and geometrical from the surface portion to the container portion.
US07733262B2	Quantizing circuits with variable reference signals Systems, methods, and devices are disclosed, such as an integrated semiconductor device that may include a data location coupled to an electrical conductor, a delta-sigma modulator coupled to the electrical conductor, a counter coupled to an output of the delta-sigma modulator, and an interfuser coupled to an output of the counter. In some embodiments, the interfuser is configured to receive two or more counts from the counter and read data conveyed by the data location based on the two or more counts.
US07733260B2	Multistage amplifier and a method of settling the multistage amplifier A method of settling an amplifier and a multistage amplifier are provided. To settle an amplifier, a plurality of clock signals are, respectively, applied to preset switches, each of which is placed between amplifiers connected in cascade, to open the preset switches sequentially, thereby settling the amplifiers in order.
US07733259B2	System having a signal converter device and method of operating A system having a signal converter device, and a method for operating a system having a signal converter device is disclosed. One embodiment provides loading a capacitive device to a preparation voltage in a first operating phase, and loading the capacitive device to a measuring voltage in a second operating phase after the first operating phase.
US07733258B2	Data conversion circuitry for converting analog signals to digital signals and vice-versa and method therefor A data converter for converting analog signals to digital signals, or for converting digital signals to analog signals is provided. In one embodiment, a production self-test is provided. In one embodiment, a high-speed lower-resolution method or mode for a data converter is provided. In one embodiment, a differential data converter with a more stable comparator common mode voltage is provided. In one embodiment, the input range of a digitally calibrated data converter is provided and maintained so that there is no loss in input range due to the calibration. In one embodiment, digital post-processing of an uncalibrated result using a previously stored calibration value is provided.
US07733257B1	Digital-to-analog converter having efficient switch configuration A DAC includes a gamma voltage generator for generating a plurality of gamma voltages, and a decoder for receiving an M-bit digital value for selecting one of the gamma voltages, wherein the decoder comprises a first thermometer encoder, a first selector and a second selector. The first thermometer encoder is utilized to receive N bits of the digital value to generate a first thermometer code with 2N bits, wherein N is smaller than M, and M and N are positive integers. The first selector has a plurality of selecting groups, each selecting group having 2N switches controlled by the first thermometer code to output one gamma voltage, where the second selector receives the gamma voltages outputted by the selecting groups of the first selector and outputs one gamma voltage selected from the received gamma voltages based on the (M−N) bit of the digital value.
US07733252B2	Method and apparatus for delay and combining circuitry A system for signal processing is provided. A sampling delay system generates a plurality of sampling delay values. A plurality of programmable delays each receives one of the sample delay values. A plurality of sample and hold units, each coupled to one of the programmable delays, generates a sample of a received signal in response to an input from the programmable delay.
US07733248B2	Measuring and regenerating a variable pulse width A system and process for receiving a variable pulse width signal and measuring and serially sending the measurements to a receiver that deserializes and regenerates the variable pulse width signal. Data bits may be embedded with the variable pulse width clock measurements and serially sent out. The measurements are illustratively accomplished using a reference clock and a phase locked loop.
US07733245B2	Compression scheme for interval data A method of data compression for use in a data communication's system for an electrical utility or the like to affect the most efficient transfer of data. The data is first formed into a forming a block (B). A parameter (M) is selected from among a group of parameters. Each data value in the block is divided by the selected parameter to produce, for each data value, a quotient (q=└n/M┘) and a remainder (r=n−qM). The quotient of each data value is encoded using unary coding in which the value for the quotient is encoded by transmitting an appropriate number of zeroes followed by a one. The remainder of each data value is encoded using binary encoding, and the resultant encoded block of data is then transmitted. The data values comprising the block of data are positive integer values and the encoding employs a Golomb-Rice code defined by a positive integer parameter.
US07733241B2	Telemetry unit A telemetry unit (100) is provided for mounting to the inside of a pneumatic tire, which includes sensors for measuring the pressure and temperature within the tire and an RF transmitter for transmitting measured data to an on-board display remote location. The unit (100) includes a piezoelectric element (114) supported in a housing (112) with an actuator (136) arranged for contact with the element (114), to deflect the element (114) in response to external forces acting on the actuator (136) during rotation of the tire. For every rotation of the tire, cyclic pulses of electrical charge are generated by the deflection of the element (114). The unit (100) includes control means which controls the consumption of stored charge when measuring and transmitting data and is arranged to vary the rate of transmission of data from the unit (100) in dependence on the rotary speed of the tire.
US07733238B2	Handheld data capture system with power and safety monitor and method therefore The present invention provide a motion detection circuit for a handheld item detection system, where the motion detection circuit includes an accelerometer outputting at least one signal corresponding to a measured acceleration. A differentiator differentiates the measured acceleration. A motion detection device evaluates a discriminated version of the acceleration and a discriminated version of the acceleration to determine whether the handheld item detection system is in motion. The present invention extends battery life and allows a handheld system to quickly enter an active operational mode without any user intervention other than handling (moving) the system.
US07733235B2	Wireless smoke and fire detection system and method A smoke detector system employs smoke detectors that enter a “lockout period” following receipt of an alarm signal, during which time a detector will not receive a RF alarm signal and will not transmit a RF alarm signal after a certain period of time if that detector does not detect, or no longer detects, a dangerous condition. The lockout period is of sufficient duration to prevent re-transmission of a RF alarm signal by a detector even though it may have received a RF alarm signal from another detector(s). Hence, after a short period of time, no RF alarm signals will be received or transmitted and each detector resets, unless a dangerous condition is detected.
US07733233B2	Methods and systems for monitoring position and movement of human beings Methods and systems for detecting a predetermined position of a user wearing a disposable absorbent article are given. The methods and systems may include detecting that the user of the disposable absorbent article is in the predetermined position, wherein the predetermined position is determined to be a potentially life-threatening position. In response to determining that the user is in the predetermined position, an operation of a transmitter located on the disposable absorbent article is controlled. Movement, location and/or various biometrics of the user may also be monitored.
US07733232B2	System and method for social networking in a virtual space Social networking in a virtual space over a network is facilitated. Subscriber computing devices each operated by a subscriber are associated with a subscriber identifier. Each computing device is connected to the network. A subscriber profile is created in a profile datastore, wherein the subscriber profile comprises information about the subscriber and wherein the subscriber profile is associated with the subscriber's subscriber identifier. Subscriber identifiers associated with subscribers who are logged in to a website are monitored. The website defines a virtual space and the logged-in subscribers are characterized as present in the virtual space. A web page is served to the computing devices of the present subscribers via the network. The web page of a first subscriber comprises a first subscriber icon associated with the first subscriber and subscriber icons of other present subscribers. A determination is made whether the first subscriber profile matches the subscriber profile of one or more of the other present subscribers according to matching criteria. An attribute is assigned to the icons of the other present subscribers that match the profile of the first subscriber according to matching criteria. Selected profile information is provided to the first subscriber of a selected one of any of the other present matching subscribers.
US07733231B2	Security device with display A security card may include a printed portion that includes printed data fixed to a first portion of an outer surface of the card, an interface configured to receive digitally signed information from an external device, and a display located on a second portion of the outer surface of the card and configured to display a digital image based on the received digitally signed information.
US07733227B1	RFID tags circuits and methods for sensing own power to predetermine feasibility of requested action Feasibility of a requested action by a reader is predetermined in an RFID tag based on an available tag power level. A pretest that is designed to consume artificially high levels of power is performed and the power level monitored to determine if a preset condition is met. The pretest may include activation of selected components such as a memory and associated support circuitry. If the preset condition is not met, the requested action is aborted and an error message transmitted to the reader.
US07733220B2	System and methods for detecting change in a monitored environment Systems and methods are provided for detecting changes in a monitored environment. One aspect of the invention relates to a system that comprises a plurality of radio frequency (RF) sensors distributed about the monitored environment, such that each RF sensor configured to respond to an interrogation signal with a unique identifier and a radio frequency (RF) interrogator that transmits interrogation sequences of interrogations signals over a plurality of different frequency bands at one or more power levels. The system also includes a response pattern analyzer that determines response patterns for each of the plurality of RF sensors to the interrogation sequences and transmits a change detection indicator if at least one of the determined response patterns vary outside a predetermined background baseline.
US07733219B2	Sensor assembly A sensor assembly includes a elongate article and a plurality of elongate piezoelectric elements provided to the elongate article. Each of the piezoelectric elements is configured so that when a load is applied in a direction perpendicular to a surface of the piezoelectric element, a short axis direction of the piezoelectric element becomes a sensitivity direction in which a voltage is generated, and a major axis direction becomes a non-sensitivity direction in which a voltage is not generated.
US07733218B2	RFID tag receive signal strength indicator Methods, systems, and apparatuses for detecting a reader signal strength in a radio frequency identification (RFID) tag is described. A tag is configured to monitor an attribute of a reader transmitted signal, such as the signal strength. The tag generates an indication of the signal attribute, and transmits the indication of the signal attribute to the reader.
US07733215B2	System, apparatus and method for supplying electric power, apparatus and method for receiving electric power, storage medium and program An electric power supply system includes an electric power reception apparatus and an electric power supply apparatus adapted to supply electric power to the electric power reception apparatus when the electric power reception apparatus is placed on the electric power supply apparatus. The electric power supply apparatus includes a plurality of electric power supply units adapted to supply electric power by electromagnetic induction to the electric power reception apparatus. A selection unit of the electric power supply apparatus selects, from the total plurality of electric power supply units, a plurality of electric power supply units whose location corresponds to a position where the electric power reception apparatus is placed, and a control unit controls the supply of electric power such that electric power is supplied to the electric power reception apparatus from the selected plurality of electric power supply units.
US07733213B2	Methods, systems, and computer program products for providing time-limited calendar based passcode access to areas, buildings and/or rooms Methods, systems and computer program products provide time-restricted passcode access to a restricted access area by: (a) electronically generating a time-limited visitor access passcode that is operational for a security system for a limited time duration; then (b) electronically accepting the visitor access passcode in a security entry control access device in communication with the security system to allow a user with the visitor access passcode a time-limited entry to a restricted area; then (c) automatically electronically preventing user access to the restricted area using the visitor access passcode with the security entry control access device after a certain time or expiration of a certain time period. Embodiments of the invention may be particularly useful for allowing visiting meeting participants physical access to a restricted area in a building to attend a scheduled meeting.
US07733211B2	Chip resistor and its manufacturing process A chip resistor (1) includes a chip substrate (2) a mutually separated terminal electrodes (3, 4) formed on the upper surface of the substrate (2), and a meandering resistor film (5) formed between the two terminal electrodes (3, 4). Each of the terminal electrodes (3, 4) includes an inner edge (3a, 4a) extending diagonally from one side surface (2a) toward the other side surface (2b) of the chip substrate (2). Each of the inner edges (3a, 4a) has a portion closer to the resistor film (5) that is electrically connected to a narrow portion (7, 8) formed integral with the resistor film (5). The narrow portion extends outward from an end (5a, 5b) of the resistor film (5).
US07733206B2	Spiral inductor having variable inductance Disclosed is a spiral inductor formed on a semiconductor substrate. The spiral inductor comprises: a metal line forming a spiral pattern on a substrate using conductors having different widths and having open or short-type stubs at one side of each of the conductors; and switching means connection-controlled in accordance with a selection signal for adjusting an inductance and selectively connecting the conductors of the different widths of the metal line. According to the invention, the open or short-type stubs may be formed at one sides of each of the conductors, thereby inducing a parasitic capacitance or parasitic inductance. Based on the inducement of the parasitic capacitance or inductance and selectively connection of the conductors to one another through switching means, it is possible to accurately control a whole inductance value of the spiral inductor, depending on use purposes.
US07733204B2	Configurable multiphase coupled magnetic structure In some embodiments, a configurable multiphase coupled magnetic structure may include a four-sided pot core defining an interior space, one or more cylindrical cores disposed within the interior space of the four-sided pot core, and at least two windings respectively wound around the one or more cylindrical cores, wherein the at least two windings are connected in a multiphase power delivery configuration. The windings may be multi-turn windings. The four-sided pot core may be a rectangular-shaped pot core. The cylindrical cores may be I-cores. Other embodiments are disclosed and claimed.
US07733202B2	Electromagnetic switching device An electromagnetic switching device is disclosed with an electromagnet and a movable magnet armature, which is mounted in the switching device with a resetting force, which counteracts the closing force, is different than zero in an OPEN position and is formed at least partially by a magnet arrangement with at least one permanent magnet. The magnet arrangement is arranged fixed in position in the switching device outside the magnetic circuit formed from the electromagnet and the magnet armature, and whose resetting force, which acts on the magnet armature, is at a maximum in the OPEN position.
US07733200B2	MEMS actuator Apparatus including substrate, pusher assembly, and flexor assembly adjacent to pusher assembly. Pusher assembly includes hot and cold pusher arms. First ends of hot and cold pusher arms are anchored over substrate. Second ends of hot and cold pusher arms are coupled together and suspended for lateral displacement over substrate. Flexor assembly includes flexor arm, and conductor having actuator contact. First end of flexor arm is anchored over substrate. Pusher assembly is configured for causing lateral displacement of second end of flexor arm and of actuator contact over the substrate. Method includes providing apparatus and causing pusher assembly to laterally displace second end of flexor arm and actuator contact over substrate.
US07733199B2	Electrical circuit breaker having a protective function An actuating unit or actuating mechanism and release for a circuit breaker. The magnetic mechanism of the release includes a magnet armature, which can move linearly in a magnet coil, is in the form of a tripping plunger and can be moved towards a permanent magnet counter to the force of a storage compression spring and is held fixedly by said permanent magnet in the case of a magnet coil through which no current is flowing. The tripping unit is in the form of a mechanical force store. After a tripping action, the mechanical force store needs to be reset manually again. For this purpose, a rotary movement of the drive shaft with an angular displacement of from 20 to 30 degrees takes place in the opposite direction to the ON switching rotary movement.
US07733195B2	Waveguide attenuator having coaxial probes Various methods and devices are provided for attenuating RF signals propagating within a waveguide. In particular, a plurality of coaxial probes are incorporated into the waveguide for the purpose of attenuating X-band RF signals. In one embodiment, a 7-bit, 3 dB linear digital attenuator is provided having a waveguide in a racetrack configuration. Coaxial probes in communication with the waveguide are adapted to couple energy to and from a signal traveling within the waveguide. The attenuator can also include switches adapted to reflect coupled energy back into the waveguide or pass the coupled energy to a resistive termination.
US07733194B2	Nonlinear transmission line modulator A modulator is provided that comprises a nonlinear transmission line (NLTL) that is bias modulated by a baseband signal. A given logic state of the baseband signal determines a delay amount of a first carrier signal through the NLTL. The modulator further comprises an impulse forming network (IFN) that includes a first NLTL that receives the first carrier signal delayed by the determined delay amount and a second NLTL that receives a second carrier signal having a fixed delay amount. The first NLTL and second NLTL within the IFN have opposite diode polarity configurations. The modulator further comprises a power combiner that converts a delta delay of the first carrier signal relative to the second carrier signal to a sharp impulse that represents the given logic state of the baseband signal.
US07733193B2	Systems and methods for DQPSK modulator control using selectively inserted dither tone DQPSK modulator control is provided using a single monitor photodiode with a selectively injected dither tone. The dither tone signal is sequentially injected into arm modulators and/or to a modulator driver port in time slots. A tapped signal at the output of the modulator is monitored synchronously with injected dither (I arm, Q arm, or phase modulator in third slot). The recovered dither output from a single photodiode is processed in the same sequence as the dither injection to adjust the bias to the optimal point: I-arm at the null point, Q-arm at the null point, and phase modulator at the quadrature point. This technique can be used for any control where the rate of change of the monitored condition due to systemic or environmental conditions (e.g., temperature, aging, etc.) is slow enough to allow time slot dither injection, monitor, and control.
US07733191B2	Oscillator devices and methods thereof Oscillator devices and methods of operating such oscillator devices are disclosed. The oscillator devices include a current source, and an oscillation module to provide a clock signal. The frequency of the clock signal depends on the relationship between a threshold voltage of a transistor at the oscillation module and the current level provided by the current source. The transistor at the oscillation module is matched to a transistor at the current source so that the frequency of the clock signal is relatively insensitive to changes in device temperature.
US07733188B2	Phase locked loop A phase locked loop is disclosed. One embodiment includes a phase comparator having two phase comparator inputs and a phase comparator output. A filter having a filter input and a filter output is provided, wherein the filter input is connected to the phase comparator output. A voltage controlled oscillator has a first oscillator input and an oscillator output. The first oscillator input is connected to the filter output and the oscillator output is connected to a first of the two phase comparator inputs. The oscillator has a second oscillator input. A coupling element is connected in parallel to the filter and arranged between the phase comparator output and the second oscillator input in such a way, that an output signal of the phase comparator is amplified and input to the second oscillator input.
US07733183B2	Reconfigurable distributed active transformers Reconfigurable distributed active transformers are provided. The exemplary embodiments provided allow changing of the effective number and configuration of the primary and secondary windings, where the distributed active transformer structures can be reconfigured dynamically to control the output power levels, allow operation at multiple frequency bands, maintain a high performance across multiple channels, and sustain desired characteristics across process, temperature and other environmental variations. Integration of the distributed active transformer power amplifiers and a low noise amplifier on a semiconductor substrate can also be provided.
US07733180B1	Amplifier for driving external capacitive loads An apparatus having a zero-pole that is dependant on an equivalent series resistance (ESR) and a load is provided. The apparatus comprises an amplifier stage that receives a first input voltage and a bias voltage, an intermediate stage that is coupled to the output node of the amplifier stage (where the intermediate stage outputs an intermediate voltage to an intermediate node), a first capacitor coupled between at least one of the internal transistors at an internal node and the intermediate node, a power transistor coupled between a second input voltage and the intermediate node, a second capacitor coupled between the internal node and the power transistor, and a feedback stage coupled to the intermediate node and to the amplifier stage. The amplifier stage also has an output node and includes a plurality of internal transistors. The second capacitor provides a third input voltage to the power transistor, and the ratio of the capacitance of the first capacitor to the capacitance of the second capacitor controls the position of the zero-pole. Additionally, the feedback stage is adapted to output an output voltage to a load, and wherein the feedback stage provides a feedback voltage to the amplifier stage.
US07733179B2	Combination trim and CMFB circuit and method for differential amplifiers A differential amplifier (10-1,2) includes an input stage (7) including first (M1) and second (M2) input transistors and first (4A) and second (4B) load devices. Sources of the first and second input transistors are connected together. Drains of the first and second input transistors are coupled by first (12) and second (13) conductors to the first and second load devices, respectively. Common mode feedback circuitry (6A) including first (M3), second (M4), and third (M5) transistors is combined with offset correction circuitry (8) including the second transistor and the third transistor. Sources of the first, second, and third transistors are coupled to a tail current source (11). Drains of the second and third transistors are coupled to the first and second conductors, respectively. A common mode voltage (VOCM) is applied to a gate of the first transistor. Offset trim voltages are applied to gates of the second and third transistors.
US07733177B1	Method and system for calculating the pre-inverse of a nonlinear system An apparatus is provided to determine pre-distortion for a nonlinear system. The apparatus comprises a datapath and a power amplifier. The datapath employs predistortion data to generally linearized the power amplifier. To generate this predistortion data, an indirect learning circuit and a direct learning circuit can be employed. The indirect learning circuit is generally coupled to the amplifier circuit so that it can iteratively adjust predistortion data during an indirect learning mode until convergence is reached. The direct learning circuit is generally coupled to the amplifier circuit and the indirect learning circuit and that receives the input signal so that the predistortion data can be copied to the direct learning circuit from the indirect learning after convergence is reached and so that the direct learning circuit can adjust the predistortion data during a direct learning mode.
US07733175B2	Feed-forward automatic-gain control amplifier (FFAGCA) for biomedical applications and an associated method The present invention is a feed-forward automatic-gain control amplifier (FFAGCA) for biomedical applications and associated method, the FFAGCA comprises a detector, a controller, a variable gain amplifier (VGA), an input and an output. The associated method to process various kinds of biomedical signals with the FFAGCA comprises acts of adjusting gain setting with control path and simultaneously a signal amplification with signal path.
US07733172B2	DC self-biased vacuum tube differential amplifier with grid-to-cathode over-voltage protection A single stage differential amplifier is disclosed as comprising a pair of vacuum tube triodes for amplifying two input signals and generating two output signals. The differential amplifier has DC self-biasing ability and grid-to-cathode over-voltage protection for directly coupling from the outputs of another differential amplifier. By possessing these unique features, this differential amplifier becomes an important building block in forming a balanced amplifier by cascading multi differential amplifiers in a directly coupled fashion.
US07733165B2	Circuit arrangement with interference protection A circuit arrangement with an interference protection is disclosed, including a supply line and a ground line, a first circuit and a second circuit. Each of the first and second circuit is connected to the supply line and to the ground line. The circuit arrangement also includes a blocking device coupled to at least the supply line to suppress any interfering signals from being applied to the supply line.
US07733161B2	Voltage boost system, IC and design structure A voltage boost system, IC and design structure are disclosed for boosting a supply voltage while preventing forward biasing of n-well structures. The voltage boost system may include a first voltage boost circuit producing a first boosted voltage using at least one voltage boost sub-circuit, each of the at least one voltage boost sub-circuit having an output passgate in an n-well; a second voltage boost circuit producing a second boosted voltage, the n-well of each output passgate being biased using the second boosted voltage, wherein the second boosted voltage is greater than the first boosted voltage. Voltage boost sub-circuits may use gate control circuitry to reduce gate oxide stress, thus allowing lower voltage level FETs to be used.
US07733160B2	Power supply circuit, display driver, electro-optical device, and electronic instrument A power supply circuit includes a voltage booster circuit that generates a boosted voltage by boosting a second voltage with respect to a first voltage, and a limiter circuit that limits a potential of the boosted voltage. The limiter circuit discharges a charge to or charges a charge from a power supply line so that the boosted voltage becomes a given target voltage, the second voltage being supplied to the power supply line. The voltage booster circuit changes a boost capability corresponding to an output load of the power supply circuit.
US07733159B1	High voltage tolerance emulation using voltage clamp for oxide stress protection Circuits, methods, and apparatus for limiting voltages received by devices in input/output cells to less than the device's breakdown voltage. An exemplary embodiment of the present invention provides an input/output cell having one or more clamp diodes and resistors configured to limit voltages seen by the gates of the devices in the input/output cell. In one embodiment, the clamp diodes are on-chip, while the resistors are off-chip. In a specific embodiment, the clamp diode is connected between an input pad for the input output cell and a supply voltage VCC, while a resistor is off-chip and in series with the input pad. In another specific embodiment, a series of clamp diodes are coupled between ground and an input pad, while a resistor is off-chip and in series with the input pad. In another embodiment, the clamp diode or diodes may be programmably or selectively disconnected. These clamp diodes may be disabled to protect against latch-up. Integrated circuits that are consistent with the present invention may include one or more of these and the other features described.
US07733156B2	Transistor arrangement, integrated circuit and method for operating field effect transistors The transistor arrangement contains a first and a second field effect transistor comprising a first and a second source drain connection and a control connection for applying a first or a second signal. The two field effect transistors are of the same conductive type. The transistor arrangement is configured in such a manner that the first signal can be applied in an alternating manner to the control connection of the first field effect transistor and the second signal can be applied in a simultaneous manner to the control connection of the second field effect transistor, and/or the second signal can be applied to the control connection of the first field effect transistor and the first signal can be applied simultaneously to the control connection of the second field effect transistor.
US07733154B2	Semiconductor device A semiconductor device includes a level shift circuit to convert an input signal having an amplitude from a first power supply potential to a second power supply potential to a signal having an amplitude from the first power supply potential to a third power supply potential, a first output portion to output voltage generated from the third power supply potential to an output terminal based on the output of the level shift circuit, the first output portion including a NMOS transistor, and a second output portion to output voltage generated from the third power supply potential to an output terminal based on the output of the level shift circuit, the second output portion including a PMOS transistor.
US07733153B2	High speed level shifter The invention relates to a level shifter comprising an input stage having a parasitic capacitance and a first input terminal for applying an input signal, a limiter stage having a second input terminal for applying a switching signal, wherein said input stage is coupled between a first supply terminal and said limiter stage, an output stage being coupled between a second supply terminal and said limiter stage and providing an output signal which is a level shifted version of said input signal, and a current source being adapted for injecting a current pulse into said parasitic capacitance dependent on variations of said switching signal over time.
US07733146B2	SET and SEGR resistant delay cell and delay line for Power-On Reset circuit applications A delay line appropriate for use in a POR circuit or other integrated circuit in a space environment combines three separate circuit techniques to improve performance without unnecessarily increasing circuit area or adding to manufacturing costs when compared to a simple inverter delay line. The delay line of the present invention uses the selective placement of capacitors throughout the delay line, one-sided current starving, and the incorporation of one-sided Schmitt trigger circuits. Performance of the delay line is substantially immune to SEGR events (“Single Event Gate Rupture”) and SET events (“Single Event Transients”). Spurious signals produced by SEGR and SET events are quickly and substantially attenuated.
US07733144B2	Radiation hardened CMOS master latch with redundant clock input circuits and design structure therefor A radiation hardened master latch for use in a programmable phase frequency divider operating at GHz frequencies is implemented in deep submicron CMOS technology, and consists of two identical half circuits interconnected in a DICE-type configuration that makes the master latch immune to a single event upset (SEU) affecting at most one of its four data inputs. Each half circuit includes a clock input circuit with four sub-clock nodes each coupled by an inverter to a common clock input. The clock input circuit is configured to be redundant, such that the operation of the master latch half circuit is also immune to an SEU affecting at most one the inverters associated with the plurality of sub-clock nodes. The radiation hardened master latch resides in a design structure embodied in a machine readable medium storing information for designing, manufacturing and/or testing the master latch.
US07733143B2	Duty cycle correction circuit for high-speed clock signals The present invention implements an apparatus for correcting duty cycle distortion in high speed clock signals. The apparatus includes delay cells that delay each of first and second differential initial clock signals. The apparatus further includes a latch that generates an output clock signal based on the delayed first and second differential initial clock signals. The apparatus further includes a differential feedback buffer that converts the output clock signal into first and second differential feedback signals. The apparatus further includes a feedback circuit that adjusts the delay cells based on the first and second differential feedback signals.
US07733142B2	Edge rate control for 12C bus applications Consistent with an example embodiment, an edge-rate control circuit arrangement (300) for an I2C bus application comprises a first circuit stage (10, M1, M3), responsive to a state transition of a received signal. A second circuit stage (310, 25, 20, 35, 45, M4, ESD) is responsive to the state transition of the received signal and includes drive circuitry (M4) that is activated in response to the state transition of the received signal in order to provide an edge-transition signal for an I2C bus, and regulation circuitry (310, R1, R2, M0, M2) adapted to control the drive circuit and regulate a transition rate for the edge-transition signal, the transition rate being greater than a transition rate of the received signal at the first circuit stage and greater than a minimum and less than a maximum transition rate designated for communication on the I2C bus.
US07733140B2	Delay locked loop in semiconductor memory device A delayed lock loop for preventing a stuck fail in a dead-zone includes a clock buffering block for generating a first and a second internal clock signals; a phase comparison block for delaying a feedback signal by a first predetermined value and for respectively comparing a phase of a delayed feedback signal and a phase of the feedback signal with a phase of the external clock signal; a clock selecting block for selecting one of the first and second internal clock signals based on one comparison result to thereby generate a selected internal clock signal; a stuck checking block for determining a delay value based on the other comparison result; a delay line block for delaying the selected internal clock signal by the delay value; and an output buffer for buffering an outputted signal from the delay line block to thereby generating a DLL clock signal.
US07733135B2	High side boosted gate drive circuit A high-side boosted gate drive circuit is disclosed. In a particular example, an output driver is described, comprising a switching device configured to selectively conduct current in response to a charge being present at a control terminal for a duty cycle, a charging device configured to deliver charge to the control terminal based on the first duty cycle, a charge control device configured to selectively couple the charging device to deliver charge to the control terminal and to selectively decouple the charging device from the control terminal to charge the charging device, and a discharge control device configured to remove charge from the control terminal.
US07733134B1	High speed low noise switch The present application discloses systems and methods to for a high speed electronic switch with the internal capability to reduce noise. This noise reduction is accomplished through a noise suppression circuit. A noise source is connected a signal source; a noise suppression circuit is electrically connected to the switching source; and a switch driver is electrically connected to a noise suppression circuit. The noise reduction unit prevents noise from being propagated from the noise source to an output switch, thereby preventing the noise from reaching the downstream signal line.
US07733133B2	Power switch circuit having variable resistor coupled between input terminal and output transistor and changing its resistance based on state of output transistor A power switch circuit includes an output transistor which is connected between a first power supply terminal and an output terminal, and drives a load, an abnormality detecting circuit which detects an abnormal state of the output transistor, a resistance element which generates a resistance component by a diffusion layer formed on a well region, and is provided between an input terminal and a control terminal of the output transistor, and a well potential switching circuit which switches a voltage to be supplied to the well region between a voltage of the output terminal and a voltage of a second power supply terminal based on a detection result by the abnormality detecting circuit.
US07733129B2	Method and circuit for generating memory clock signal A memory clock signal is generated in response to a reference clock signal and a clock enable signal. The memory clock signal with a frequency identical to that of the reference clock signal is generated during the clock enable signal is in an enabled state; and the memory clock signal with a reduced frequency is generated when the clock enable signal is changed from the enabled state to a disabled state. The generation of a memory clock signal is adaptive so as to save power.
US07733128B2	Transmitting apparatus To provide a transmitting apparatus capable of suppressing the fluctuation of a common mode potential and performing high-speed, long-distance signal transmission. The transmitting apparatus has a main buffer circuit and a pre-emphasis buffer circuit 20. The pre-emphasis buffer circuit 20, which has a switch circuit 21, a first current source 22, and a second current source 23, uses the switch circuit 21 to output a current signal having the same direction as an output current of the main buffer circuit 10 during a certain time interval starting from a time point when the level of data to be transmitted changes, and brings the output terminals 201, 202 to a High-Z state during a time interval when the level is constant after a lapse of the abovementioned certain time interval. The output of the pre-emphasis buffer circuit 20 has no influence on the common mode potential of the output of the main buffer circuit but has influence only the amplitude of the current signal output to a differential transmission line. In this manner, the transmitting apparatus can suppress the fluctuation of the common mode potential and can perform high-speed, long-distance signal transmission.
US07733127B2	Circuits and methods for communicating data between domains during voltage and frequency shifting When communicating data between different voltage and frequency domains, for example chiplets, in an integrated circuit, the data signals can be formatted to compensate for propagation delays and different operating frequencies between the domains, and the signaling voltage level of the formatted data signals can then be changed from the operating voltage of the transmitting domain to the operating voltage of the receiving domain so that the formatted and changed data signals can be transmitted. As such, voltage crossings are combined with frequency crossings, which can have the effect of hiding the voltage shifting within the propagation delays.
US07733123B1	Implementing conditional statements in self-timed logic circuits An exemplary circuit for implementing conditional statements in self-timed logic circuits includes first and second logic circuits, an input circuit, an output circuit, and a pipelined routing path. The first and second logic circuits each have a self-timed input and a self-timed output. The input circuit is coupled to provide a self-timed input signal to the self-timed input of a selected one of the first or second logic circuits based on the value of a control signal, and is further coupled to output a self-timed select signal. The output circuit is coupled to receive the self-timed output from the first logic circuit and the self-timed output from the second logic circuit, and to output a selected one of the self-timed outputs based on a value of the self-timed select signal. The pipelined routing path routes the self-timed select signal from the input circuit to the output circuit.
US07733121B2	Methods and apparatus for programmably powering down structured application-specific integrated circuits Methods and apparatus for programmably powering down a structured application-specific integrated circuit are provided. At least one of the programmable layers of the structured ASIC that frequently provides some programmability as between or among a small number of alternative functions is used to provide this programmability.
US07733118B2	Devices and methods for driving a signal off an integrated circuit Embodiments of the present invention provide electronic devices, memory devices and methods of driving an on-chip signal off a chip. In one such embodiment, an on-chip signal and a second signal complementary to the on-chip signal are generated and provided to the two inputs of a differential driver. One output of the differential driver circuitry is coupled to an externally-accessible output terminal of the package. The other output may be terminated off the chip, but within the package. By routing the output signal and a second complementary output through the package, crosstalk potentially caused by the output signal can be reduced. Simultaneous switching output noise may also be reduced through use of a current-steering differential driver topology. Signal symmetry may also improve, reducing inter-symbol interference.
US07733117B1	Method for protecting a security real time clock generator and a device having protection capabilities A device having protection capabilities, the device includes a voltage supply unit that is connected to an integrated circuit and provides a supply voltage to the integrated circuit; wherein the integrated circuit includes: a security real time clock generator that includes an input; a masking unit that is connected to the input, wherein the masking unit isolates the input when a voltage supply monitor is disabled; and wherein the voltage supply monitor monitors the voltage supply unit and wherein a change in a level of supply voltage affects a level of a signal provided to the input.
US07733116B2	Method of testing a power supply controller and structure therefor A power supply controller (20) is configured to operate in a test mode that facilitates measuring the value of an output signal of an error amplifier (36) of the power supply controller (20).
US07733115B2	Substrate testing circuit The present invention relates to a substrate testing circuit comprising a testing bus and a testing signal terminal connected to the testing bus, a signal line to be tested in the substrate being connected to the testing bus via a signal connecting terminal, wherein a plurality of signal access terminals are provided on the testing bus; one testing branch is connected between each the signal access terminal and the testing signal terminal; and resistance values of the testing branches are the same. By means of the present invention, since a plurality of signal access terminals are introduced and the testing branches with the same resistance are added so that input resistances and impedances of testing signals across the display screen are substantially identical without making changes to process flow and device hardware structure, input resistances and impedances of respective signal lines are well averaged, thereby no obvious regional attenuation occurs in the testing signals within the pixel area to be tested irrespective of limitation in size of panel, so as to realize tests for panels with greater sizes.
US07733111B1	Segmented optical and electrical testing for photovoltaic devices An apparatus for inducing a current in a solar cell substrate. A substrate receiving surface receives the substrate, and an array of a plurality of individually addressable light sources illuminates the substrate in a sequenced manner. A sequencer controls the sequenced manner of illumination of the substrate by the array. A front side electrical contact makes electrical contact to a front side of the substrate, and a back side electrical contact makes electrical contact to a back side of the substrate. A meter is electrically connected to the front side electrical contact and the back side electrical contact, and senses the current induced in the substrate during the sequenced illumination of the substrate.
US07733108B2	Method and arrangement for positioning a probe card A method for perpendicular positioning of a probe card relative to a test substrate, includes storing a separation position approached in a first positioning step as a distance between the needle tips of the probe card and the substrate, storing a contact position approached in a second positioning step until the probe card contacts the substrate, and displaying an image of the needle tips. For avoiding erroneous operation after a probe card has been changed, when imaging the needle tips, the stored contact position is imaged and is changed until presentation of this contact position corresponds to actual height of the tips appropriate for the respective probe card and this setting is then stored as a new contact position. A display device presents the needle tips and the stored contact position and is connected to a memory, a recording device and an input device which changes the contact position.
US07733107B1	Charged device model contact plate A tester for applying very fast transmission line pulses (“VFTLP”) to select pins of a device under test (“DUT”), for example, an integrated circuit. The tester also provides for leakage measurement testing of the DUT after VFTLP testing. An end of a coaxial cable is received within an aperture formed in a metal ground plane. The outer conductor of the coaxial cable is attached to the metal ground plane and the inner conductor of the coaxial cable projects above an upper surface of the metal ground plane. A grip attached to the metal ground plane selectively retains the DUT upon the upper surface of the metal ground plane in a position placing a select pin in physical contact with the projecting inner conductor of the coaxial cable, completing the VFTLP circuit.
US07733105B2	Voltage clamp circuit and semiconductor device, overcurrent protection circuit, voltage measurement probe, voltage measurement device and semiconductor evaluation device respectively using the same In a voltage clamp circuit, a normally-on type field-effect transistor having a negative threshold voltage has a drain connected to an input node, a source connected to an output node and grounded via a resistance element, and a gate supplied with an output voltage of a variable direct-current power supply. When a voltage at the output node becomes higher than a clamping voltage because of voltage drop of the resistance element, the field-effect transistor is tuned off. Accordingly, the output voltage is limited to be at most the clamping voltage. Thus, a response speed is higher than those of conventional voltage clamp circuits using diodes or the like.
US07733104B2	Low force interconnects for probe cards A probe test card assembly for testing of a device under test includes a printed circuit board, a substrate and a substrate support structure. The substrate support structure holds the substrate in position with respect to the printed circuit board. The substrate support structure may include one or more alignment members, one or more hard stop members and/or a support plate attached to the printed circuit board for positioning the substrate with respect to the printed circuit board. The one or more alignment members may extend through the printed circuit board and be connected to the one or more printed circuit board stiffener members. The probe test card assembly may also employ a proximity detection feature to indicate when the substrate is in a particular position with respect to the printed circuit board.
US07733102B2	Ultra-fine area array pitch probe card A system and a method of testing a semiconductor die is provided. An embodiment includes a printed circuit board connected to a space transformation layer, which is connected to a substrate. The substrate uses through silicon vias and a redistribution layer to reduce the pitch of the connections beyond the historical limitations. A probe head using Cobra-style probe pins is connected to the redistribution layer through C4 bumps.
US07733100B2	System and method for modulation mapping An apparatus for providing modulation mapping is disclosed. The apparatus includes a laser source, a motion mechanism providing relative motion between the laser beam and the DUT, signal collection mechanism, which include a photodetector and appropriate electronics for collecting modulated laser light reflected from the DUT, and a display mechanism for displaying a spatial modulation map which consists of the collected modulated laser light over a selected time period and a selected area of the IC.
US07733089B2	Transportable magnetic resonance imaging (MRI) system A portable MRI or NMR imaging system comprising a cryogen vessel housing cooled equipment, said system being housed within a transportable container, said container being divided into at least three sections. A first section provides accommodation for an operator and access to equipment as required to operate the cooled equipment. A second section houses the cryogen vessel. A third section houses auxiliary equipment required for operation of the cooled equipment but which is not required to be accessed by the operator to operate the equipment.Also provided is a cryostat comprising an outer vacuum container, itself housing a cryogen vessel for containing cooled equipment, wherein space between the cryogen vessel and the outer vacuum container is evacuated. The outer vacuum container is in the form of at least a section of a standard shipping container.
US07733086B2	Systems and methods for deep-looking NMR logging An NMR logging tool for conducting NMR measurements in a plurality of sensitive volumes ranging up to a meter from the tool. The tool comprises a magnetic assembly using one or more permanent magnets and at least one pole piece for extending a magnet pole and shaping the magnetic field to simulate a magnetic monopole in a sensitive volume within the formation. Different embodiments of a segmented antenna enable directional NMR logging. The tool embodiments and methods of their use are suitable for wireline or LWD logging, and can be used for directional drilling.
US07733084B1	Eddy current acquisition system An eddy current acquisition system integrates traditional elements of a nuclear steam generator tubing inspection into a single modular system comprising three subsystems: the take-up reel subsystem, the acquisition instrument, which is located in the hub of the take-up reel, and the pusher head subsystem. All of the control electronics are respectively enclosed in bases of the pusher head and the take-up reel subsystems in water-resistant and dust proof enclosures. Simplified setup is achieved by employing a single communication bus linking an identification (“ID”) chip in each component to a host computer. The ID chip stores and reports product part numbers, descriptions and serial numbers and revision or upgrade status and may also store statistical information such as device duty cycles, performance statistics, repair history, and the like. It also enables auto-fill of product information into firmware of the acquisition instrument, including probe pusher ID, take-up reel module ID, eddy current instrument ID, probe product ID and their serial numbers. It also provides automated inventory management by updating the probe inventory database based when probes are attached and detached from the system. Also implemented in the acquisition instrument module is a real-time landmark detection firmware system.
US07733080B1	Revolvable clamp meter The clamp meter contains a revolving member configured between the meter's body member and jaw member. The revolving member is composed of a first base and a second base located on the interfacing sides of the body member and the jaw member, respectively. The first base and the second base are revolvably joined together by an axle extended axially from the body member into the jaw member via the first and second bases' aligned axle holes. The first base has at least a roller ball elastically embedded in a concave and exposed towards the second base. The roller ball would roll into one of a number of notches of the second base as the base and jaw members are rotated relative to each other, thereby creating a number of preset configurations of the included angle between the body and jaw members.
US07733077B1	Multi-sensor mapping omnidirectional sonde and line locators and transmitter used therewith Portable locators are disclosed for finding and mapping buried objects such as utilities. A articulatable antenna node configuration and the use of Doppler radar and GPS navigation are also disclosed.
US07733076B1	Dual reference current generation using a single external reference resistor Circuits and methods are provided for generating reference currents. In one implementation, a circuit is provided that includes a first source and a current control circuit in communication with the first source. The first source generates a first reference current that is a ratio of a first reference voltage and an external resistance. The current control circuit produces a second reference current that is a ratio of a second reference voltage and the external resistance. The current control circuit produces the second reference current without being directly coupled to the external resistance.
US07733073B2	Current regulator with current threshold dependent duty cycle A regulator and a method for regulating a current through a load. The regulator may include, for example, a first circuit portion configured to alternately apply and remove a voltage across the load in accordance with a first signal, the voltage causing a current to flow, and a second circuit portion configured to generate the first signal so as to have a duty cycle that depends upon an amount of the current and a second signal when the amount of current is below a threshold amount, and to generate the first signal so as to have a duty cycle that depends upon the amount of the current but not the second signal when the amount of current exceeds the threshold amount.
US07733072B2	Step-down/step-up DC/DC converter apparatus and method with inductor current threshold value adjusting The invention provides a switching power supply device that can restrain the variation in the ripple of the output voltage corresponding to the variation in the input voltage and a control device thereof. When output voltage Vout is higher than a target value, switching converter circuit 10 is set to a second state (a state of discharging the power stored in inductor L1 to terminal To). When output voltage Vout is lower than the target value, switching converter circuit 10 is set to a first state (a state of storing the power input from terminal Ti in inductor L1) for a prescribed period of time and is then returned to the second state. Also, when the current flowing through inductor L1 exceeds a threshold value, switching converter circuit 10 is set to the second state. In addition, the threshold value of the inductor current is adjusted corresponding to the ratio between input voltage Vin and output voltage Vout, so that the variation in the ripple of output voltage Vout occurring together with the variation in that ratio can be restrained.
US07733068B2	DC-DC converter A DC-DC converter includes a switching transistor connected to an inductor and a power input terminal, with the inductor connected to an output terminal, a synchronous rectification transistor connected to a junction node therebetween, a first electric current detector to detect whether or not an electric current flowing through the synchronous rectification transistor is larger than a first electric current, a second electric current detector to detect whether or not the electric current flowing through the synchronous rectification transistor is larger than a second electric current that is larger than the first electric current, and a selection mechanism to select one of the first and second electric current detectors in accordance with a control signal. The synchronous rectification transistor is turned off by outputting an output signal the selected current detector.
US07733062B2	Intelligent battery module for multimedia device An intelligent battery module for a multimedia device includes a device housing, a battery unit and an intelligent circuit arrangement. The intelligent circuit arrangement is provided within the device housing for electrically communicating a multimedia battery and the battery unit with a battery terminal of the multimedia device, in such a manner that when the multimedia battery is mounted onto a battery slot, the intelligent circuit arrangement is adapted to electrically connect the multimedia battery with the battery terminal so as to allow the multimedia battery to initially activate the multimedia device, and when the multimedia device is initially activated by the multimedia battery, the intelligent circuit arrangement is arranged to electrically connect the battery unit with the battery terminal so as to allow the multimedia device to be continuously operated by the battery unit without electrically further recourse to electricity supply of the multimedia battery.
US07733058B2	Engaging structure of electric shaver and electric charger thereof An engaging structure of an electric shaver and an electric charger is provided wherein the electric charger at least serving to charge the electric shaver is mounted thereat. The engaging structure includes a magnet provided at one of the electric shaver or the electric charger; and an attracting member provided at the other thereof, the attracting member being made of a material magnetically attracted to the magnet. Further, a contact portions for electrically connecting the electric shaver and the electric charger are provided between a weight center of the electric shaver and the magnet disposed above the contact point at an opposite side of a mounting direction of the electric shaver.
US07733054B2	Thermal management systems for battery pack In a cordless power tool system, high temperature gases created in a battery pack by the battery cells during a charging or discharging operation can be routed into a housing of one of an attached power tool or charger to reduce the temperature of the gases, prior to venting the gases externally. In an example, a battery pack has at least one vent hole for relieving pressure and a movable device covering the vent hole and configured to expose the vent hole upon a pressure set-point within the pack housing being exceeded. In another example, the pack housing includes a thin-walled section designed to break if pressure within the pack housing exceeds a given pressure setpoint. In a further example, the pack housing includes a baffle having an S-shaped cross-section for providing a vent path for gases and for preventing external fluids from entering the pack housing.
US07733053B2	Charging circuit for a vehicle charger A charging circuit for a vehicle charger includes a front high-voltage protective circuit, a rear high-voltage protective circuit, a first filtering circuit, an over-voltage protective circuit, a high frequency step-down switching regulator, a second filtering circuit, a frequency modulation circuit, a reference voltage input circuit, a sampling circuit, a short-circuit protective circuit and two charging interfaces. The front high-voltage protective circuit connects to a vehicle DC power, the first filtering circuit connects the front high-voltage protective circuit to the switching regulator, the second filtering circuit connects to an output point of the switching regulator to the rear high-voltage protection circuit, the frequency modulation circuit connects to a second input point of the switching regulator, the third input point of the switching regulator connects to the reference voltage input circuit, the short-circuit protective circuit connects the second filtering circuit to the fourth input point of the switching regulator, the sampling circuit connects the second filtering circuit to the fifth input point of the switching regulator, the rear high-voltage protection circuit connects to the two charging interfaces. For the unique design, the charging circuit for a vehicle charger has a short-circuit protective function and provides two charging interfaces.
US07733052B2	Method for controlling a heat engine vehicle driving assembly A control method for a vehicle drive assembly includes applying a conduction angle set point value to a variable reluctance machine. The method also includes regulating the conduction angle set point value by comparing a table set point torque from an angle table and a torque estimation value to determine a control measurement of torque delivered by the drive assembly. The control measurement of torque is corrected to an additional conduction angle which is added to a set point angle from the angle table to determine the regulated conduction angle set point value.
US07733050B2	Motion control using electromagnetic forces Motion control using electromagnetic forces. The control of motion in unpowered apparatus and an apparatus driven by electric motors and/or other prime movers utilizes electromagnetic force/torque for control of motion. One objective is to extend the domain of electric motor speed control, traditionally characterized by electronic techniques, to small apparatus such as bubble vibration toys, paper dispensers, toothbrushes and other appliances.
US07733049B2	Raindrop quantity sensing apparatus and wiper control system having the same A change computing arrangement computing an amount of change in a measured value of a measurement signal of a raindrop sensor in a raindrop quantity sensing execution time period that is a time period, during which a wiper blade moves outside of a sensing range of the raindrop sensor. A difference computing arrangement computes a difference between a predetermined reference value and an initial measured value of the measurement signal of the raindrop sensor. A determining arrangement determines the quantity of raindrops on the windshield based on the amount of change, which is computed by the change computing arrangement, and the difference, which is computed by the difference computing arrangement.
US07733045B2	Motor driving circuit According to some preferred embodiments of the present invention, a motor driving circuit includes a phase detection circuit configured to detect a rotation phase of a motor and output a phase detection signal, a first amplifier configured to amplify the phase detection signal and output an amplified detection signal, and a second amplifier configured to amplify the amplified detection signal in accordance with a power supply voltage and output a driving signal to the motor. The motor driving circuit is further provided with a controlling circuit configured to detect the power supply voltage and increase/decrease amplitude of the amplified detection signal outputted from the first amplifier in response to an increase/decrease of the detected power supply voltage, whereby heat generation and noise generation can be restrained, irrespective of the increase/decrease of the power supply voltage.
US07733039B2	Electric vehicle system for charging and supplying electrical power A power system that provides power between an energy storage device, an external charging-source/load, an onboard electrical power generator, and a vehicle drive shaft. The power system has at least one energy storage device electrically connected across a dc bus, at least one filter capacitor leg having at least one filter capacitor electrically connected across the dc bus, at least one power inverter/converter electrically connected across the dc bus, and at least one multiphase motor/generator having stator windings electrically connected at one end to form a neutral point and electrically connected on the other end to one of the power inverter/converters. A charging-sourcing selection socket is electrically connected to the neutral points and the external charging-source/load. At least one electronics controller is electrically connected to the charging-sourcing selection socket and at least one power inverter/converter. The switch legs in each of the inverter/converters selected by the charging-source/load socket collectively function as a single switch leg. The motor/generators function as an inductor.
US07733038B2	Switching device for linking various electrical voltage levels in a motor vehicle Switching device for linking various electrical voltage levels in a motor vehicle, in which a drive voltage level has an electric drive machine which may be actuated by a power converter, and a drive energy accumulator which is associated with an intermediate circuit, and in which the drive voltage level is connected to a vehicle electrical system voltage level by an electrical converter. The electrical converter is designed as a coupling circuit which is connected at the drive side to at least one node point of a winding circuit of the electric drive machine and to a voltage potential relative to the intermediate circuit. The coupling circuit is connected at the vehicle electrical system side to the vehicle electrical system via a switching unit which has at least one non-diminishing, finite impedance.
US07733031B2	Starting fluorescent lamps with a voltage fed inverter A lamp ballast includes an inverter circuit, a resonant circuit, a control circuit, and a startup circuit. When the DC bus reaches its final value, a capacitor in the startup circuit charges to a predetermined voltage, at which point a pulse is sent to start a gate drive circuit in the inverter. Additionally, a gate in the control circuit is initially OFF, allowing full power to the lamp, and a capacitor in the control circuit charges to a predetermined voltage, at which point a gate is turned ON. When the gate is ON, power to the lamp is reduced. The control circuit capacitor is selected so that it charges for a sufficient period to allow the lamp to complete a glow phase of startup before turning on the gate and reducing power as the lamp transitions into an arc phase.
US07733026B2	Lamp with an improved lamp behaviour The invention relates to a Hg free high pressure discharge lamp having a quartz envelope and a halide filling, wherein the lamp comprises at least one electrode which comprises tungsten and ≧0 wt. % and ≦0.5 wt. % thorium and whereby the lamp comprises at least one Mo-containing lead-in wire and/or foil whereby the Mo containing wire and/or foil comprises TiO2 and having a characteristic life time of ≧2500 h and ≦7500 h according to the EU Carmaker cycle test.
US07733024B2	Flexible plasma display panel and sealing thereof A flexible plasma display panel including a display area defined by a first substrate and a second substrate, which are disposed to face each other to form discharge spaces therebetween, wherein the first substrate and the second substrate are flexible and include a plurality of electrodes; and a sealing area for sealing the first substrate and the second substrate by compressing the first and second substrates on edges of the display area.
US07733022B2	Plasma display panel Disclosed herein is a plasma display panel in which afterimage is improved. The plasma display panel according to the present invention includes a panel unit having an upper plate and a lower plate, a frame that supports circuitry, and a conductive material formed between the panel unit and the frame. As such, a conductive material is formed on a bottom surface of a lower plate of a panel. Thus, charges introduced into the lower plate are properly controlled to improve the waveform stability of the panel. Also, a charge characteristic is improved to implement a stable operation. Accordingly, an afterimage time can be reduced. Further, a sheet of a low hardness and light weight is used. It is thus possible to absorb shock and noise of a PDP, accomplish light weight of the PDP and reduce the materials of the sheet.
US07733021B2	Light emitting device having an optical modification element with uniform thickness A light emitting device is disclosed herein. An embodiment of the light emitting device includes a cavity and at least one light emitter located within the cavity. A first transparent material fills at least a portion of the cavity and encapsulates the light emitter. A substantially rigid optical modifying element is located adjacent the first transparent material, the modifying element comprises particles that emit at least one first wavelength of light upon being illuminated by a second wavelength of light. The modifying element has a first side located adjacent the first transparent material and a second side located opposite the first side, wherein the first side is substantially flat. In addition, the modifying element is substantially uniform in thickness.
US07733018B2	EL and display device having sealant layer Disclosed is an EL element in which the rigidity and thermal expansion of the whole EL element is homogeneous, the spacing between film substrates provided respectively on both sides of the EL element can be kept constant, and the whole EL element is flexible. The EL element comprises a first film substrate, an EL part, and a sealant layer, the EL part comprising a first electrode, an EL layer, and a second electrode and being provided on a part of a surface of the first film substrate, the sealant layer being provided to cover the EL part and to cover the EL part-free part of the surface of the first film substrate in such a manner that the sealant layer covering the EL part is contiguous with the sealant layer covering the EL part-free part of the surface of the first film substrate.
US07733015B2	Organic electroluminescent display device having a planarizing layer and manufacturing method thereof The present invention provides an organic EL display device having a planarizing layer, which is prevented from being distorted. The above organic EL display device has a planarizing layer, which retains 5% or less the oligomer used to form this layer.
US07733009B2	Electroluminescent device including an anthracene derivative An electroluminescent device comprises a cathode, an anode, and has therebetween a light emitting layer (LEL), the device further containing an electron transport layer (ETL) on the cathode side of the LEL and an organic electron injection layer (EIL) contiguous to the ETL on the cathode side, wherein the ETL contains a monoanthracene compound bearing aromatic groups in the 2-, 9-, and 10-positions.
US07733003B2	Image forming apparatus with reduced loss of electron source caused by the inert gas An image forming apparatus in which a first substrate provided with an electron-emitting device and an image displaying member which electrons emitted from the electron-emitting device irradiate are arranged to be opposed is provided with a deflecting means deflecting the electrons emitted from the electron-emitting device and a trapping unit trapping an inert gas ionized by the electrons. Thereby, the damages of the electron-emitting device by the inert gas are prevented, and the life of an image display apparatus is aimed to be elongated.
US07732998B2	Telescoping cylindrical piezoelectric fiber composite actuator assemblies A telescoping actuator assembly includes a plurality of cylindrical actuators in a concentric arrangement. Each cylindrical actuator is at least one piezoelectric fiber composite actuator having a plurality of piezoelectric fibers extending parallel to one another and to the concentric arrangement's longitudinal axis. Each cylindrical actuator is coupled to concentrically-adjacent ones of the cylindrical actuators such that the plurality of cylindrical actuators can experience telescopic movement. An electrical energy source coupled to the cylindrical actuators applies actuation energy thereto to generate the telescopic movement.
US07732991B2	Self-poling piezoelectric MEMs device A self-poling piezoelectric based MEMS device is configured for piezoelectric actuation in response to application of a device operating voltage. The MEMS device comprises a beam, a first electrode disposed on the beam, a layer of piezoelectric material having a self-poling thickness disposed overlying a portion of the first electrode, and a second electrode overlying the layer of piezoelectric material. The layer of piezoelectric material is self-poled in response to application of the device operating voltage across the first and second electrodes. In addition, the self-poled piezoelectric material has a poling direction established according to a polarity orientation of the device operating voltage as applied across the first and second electrodes.
US07732989B2	Piezoelectric actuator with terminals on common plane, ink-jet head provided with the same, ink-jet printer, and method for manufacturing piezoelectric actuator A piezoelectric actuator includes a metallic vibration plate, an insulating layer, a plurality of individual electrodes, a piezoelectric layer and a common electrode. The insulating layer is formed on the top surface of the vibration plate. The individual electrodes are formed on the top surface of the insulating layer. The piezoelectric layer is formed on the top surfaces of the individual electrodes. The common electrode is formed on the top surface of the piezoelectric layer over the individual electrodes. A plurality of terminals and a plurality of wirings are formed on the top surface of the insulating layer. Each of the terminals is associated with one of the individual electrodes. Each of the wirings connects one of the individual electrodes and the associated terminal.
US07732987B2	Ultrasonic transducer array and a method for making a transducer array A transducer array comprises a conductive back plate 32, a conductive front plate 33 having openings 62, and a plurality of piezoelectric vibrator elements 31 located in an array between the plates. The vibrator elements 31 are two-layer elements which each include a metal portion 311 and a PZT element 312. These elements 311, 312 are in electrical contact with the respective plates. The vibrator elements 31 are attached to support elements 51 upstanding as part of the back plate 32. The transducer array can be formed as a batch process in which the vibrator elements 31 are formed simultaneously, and then simultaneously attached to the support elements 51.
US07732983B2	Ultrasonic motor A ultrasonic motor includes a piezoelectric device, and friction contact members moves a driven body by a elliptical vibration. And the ultrasonic motor includes a holder member which is disposed corresponding to a node of a longitudinal vibration or in the vicinity thereof on the face of the piezoelectric device and a node of a flexural vibration or in the vicinity thereof, the holder member having an engagement convex portion and being provided with a pair of sliding contact projection portions, a position limiting member which has accommodation holes each constituted of a sliding contact concave portion for accommodating the sliding contact projection portion such that it makes a sliding contact therewith freely and an engagement concave portion for accommodating the engagement convex portion, and a pressure member which presses the holder member so as to bring the friction contact members into pressure contact with the driven body.
US07732977B2	Transceiver circuit for film bulk acoustic resonator (FBAR) transducers A piezoelectric transducer device includes a receive signal path, a transistor and a piezoelectric transducer connected to a first terminal of the transistor. The device also includes a switch connected to a second terminal of the transistor, wherein the switch is adapted to selectively connect the second terminal of the transistor to a transmit signal or to a bias voltage; an output connected to a third terminal of the transistor, and adapted to receive a signal from the transducer when the switch is connected to the bias voltage, wherein the switch is not in the receive signal.
US07732968B2	Winding body for a coil of an electrical machine A winding body for holding a winding of an electrical conductor to produce a coil for an electrical machine includes a winding area formed by a winding support and two sidepieces connected to the winding support. The sidepieces form the boundaries of the winding area and are connected to the winding support. Various measures are proposed for mounting a compact winding on the winding body, for arranging the winding body without play and in an operationally reliable manner on a tooth of an electrical machine, and for wiring several coils together in a space-saving manner by using the winding body.
US07732965B2	Embedded magnet type motor An embedded magnet type motor is disclosed. The rotor core of the motor has radially extending first accommodation holes and V-shaped accommodation holes. Each V-shaped accommodation hole includes a second accommodation hole and a third accommodation hole. A first gap is formed in each first accommodation hole. The first gap is not occupied by the corresponding first magnet. A second gap is formed in each second accommodation hole. The second gap is not occupied by the corresponding second magnet. A third gap is formed in each third accommodation hole at a radially outer portion. The third gap is not occupied by the corresponding third magnet. Each second gap and the adjacent third gap form one V-shaped gap. The angular width θa of each first gap and the angular width θb of each V-shaped gap are determined to satisfy the expression: 0.60<θa/θb<1.60.
US07732962B2	Small DC motor A small DC motor includes: a motor frame including a cylindrical portion, the cylindrical portion having a constant thickness and having a cross section in a shape that includes four sides and connecting portions, each of the connecting portions connecting adjacent two of the four sides and being located inward from a corresponding corner in a quadrangle including the four sides; field magnets; and an armature assembly, wherein the field magnets are provided so as to be spaced apart from each other, and the small DC motor includes an air gap between each of the four sides and a radially outermost surface of the armature assembly, the air gap being a minimum size needed to rotate the armature assembly.
US07732961B2	Combined generator with built-in eddy-current magnetic resistance A combined generator with built-in eddy-current magnetic resistance including a rotor and a stator iron core with generating coils winding therearound. The rotor consists of an outward turning type inertia flywheel and permanent magnets. A self-generated supply is achieved when the flywheel is driven by a fitness apparatus or a rehabilitation apparatus. An internal ring (A magnet-conductive ring) between the wheel hub and the external ring of the flywheel is extended from the internal wall toward the opening end. The internal diameter of the stator iron core is greater than the external diameter of the magnet-conductive ring such that a magnetic field gap is created. At least one receiving portion is formed in at least one portion of the internal circumference of the stator iron core for receiving at least one solenoid. The power required by the solenoid is supplied by the self-generated system such that the solenoid produces a magnetic field (by input of the power), thereby providing the magnet-conductive ring coupled to and rotated on the inertia flywheel with an eddy-current magnetic resistance. In this way, a reverse resistance acts from the inside on the inertia flywheel such that a braking effect is achieved.
US07732956B2	Motor A motor includes a shaft that serves as a rotation center when a rotor is rotated with respect to a stator, a bearing that supports the shaft in a circumferential direction of the shaft, a thrust bearing that supports one end of the shaft in a thrust direction of the shaft, a magnet that is fixed to the rotor and alternately magnetized to different poles in a rotational direction of the shaft, a core that is fixed to the stator and disposed to face the magnet in a radial direction of the shaft, a coil that are wound around the core, and a magnetic shield that shields leakage flux leaking from the magnet to the coil. A magnetic center of the core is offset from a magnetic center of the magnet in the thrust direction, so that the shaft is attracted to the thrust bearing.
US07732955B2	Power tool with motor air flow path control In accordance with an aspect of the present disclosure, a power tool has an electric motor having a stator disposed in a field case. The stator has field coils having opposed axial ends that extend axially outwardly from opposed axial ends of a lamination stack of the stator. An armature is disposed in the stator and has a shaft on which a fan is disposed. There are gaps between the opposed axial ends of the respective field coils. The fan baffle includes an air direction member that extends into one of the gaps to direct air flow between the armature and the stator. In an aspect, the fan baffle includes a plurality of such members, one for each gap.
US07732953B2	Electric motor cooling An electric motor cooling system is provided that includes a housing and first and second cooling sources that are different from one another respectively to provide first and second cooling flows. A stator is mounted in the housing and receives the first cooling flow. A rotor is rotatable relative to the stator and receives the second cooling flow. In the examples, the housing supports a journal bearing upon which the rotor is supported, and the second cooling flows through the journal bearing. The first cooling flow is provided by a low pressure source such as ram air, and the second cooling flow is provided by high pressure source such as bleed air, for example. A circumferential gap is provided between the rotor and stator. In one example, a seal is arranged between the housing and a stator for providing a cavity in fluid communication with the journal bearing and the gap. The cooling flow from the journal bearing passes through the cavity and into the gap for cooling the rotor. In another example, the rotor includes circumferentially spaced magnets providing spaces. The spaces are arranged interiorly of an exterior surface of the rotor. A passage is in communication with the spaces and journal bearing. The second cooling flow from the journal bearing passes through the passage and into the spaces for cooling the rotor.
US07732952B1	Oscillatory motors and devices incorporating them An oscillatory device incorporating a limited angle torque motor capable of oscillating one or more end effector(s) is provided. The device may additionally incorporate an ultrasound transducer and/or a waveguide structure.
US07732948B2	Portable energy device A portable energy device having a housing and an energy storage device is disclosed. The housing includes electrical input terminals and electrical output terminals, the input terminals being configured to receive electrical power from a vehicle having an electrical chassis operating at DC voltage, the output terminals being configured to provide electrical power to an electrical distribution system connected to a utility power grid operating at AC voltage. The energy storage device is in electrical communication with the input and output terminals, and is configured to store electrical power received from the vehicle via the input terminals and to provide the stored electrical power to the electrical distribution system via the output terminals. The housing is so dimensioned as to be insertable through a space defined by a trunk opening of the vehicle with the trunk open, or so dimensioned as to be insertable between a doorframe of the vehicle and a seat of the vehicle.
US07732947B2	Power unit and image forming system Present invention uses the main power source and auxiliary power source to supply power to a load, makes them take partial charge of power supply, and when the load current reaches its peak, detects a current and a voltage generated by the auxiliary power source, and when the detected values are larger than set values or lower than the set values, controls the output current of the main power source.
US07732940B2	Apparatus and method for reducing neutral line current using load switching method An apparatus for reducing a neutral current using a load switching method in accordance with the present invention includes a phase current detection unit for detecting a phase current in each of a top stage power line and a bottom stage power line, a load switching unit for changing an arrangement of a load connected each phase of at least one among the top stage power line and the bottom stage power line and a control unit for controlling the load switching unit so as to compare a strength of the detected phase current of the top stage power line with a strength of the detected phase current of the bottom stage power line and to change the arrangement of the load connected to each phase of at least one among the top stage power line and the bottom stage power line according to the comparison result.
US07732938B2	Adapter for use with vehicle-mounted electronics An adapter for use with vehicle-mounted electronics includes an adapter body further including an input section having at least one main input terminal to which a video signal or audio signal is supplied and at least one secondary input terminal to which a video signal or audio signal is supplied, an output section having an output terminal from which a video signal or audio signal is delivered, a switching element switching an output signal from the input section between the main input terminal side and the secondary input terminal side, and a control section controlling the switching element. The control section includes a detector detecting a signal supplied to the secondary input terminal side. The control section controls the switching element based on signal detection by the detector so that the output signal from the input section is switched from the main input terminal side to the secondary input terminal side.
US07732933B2	Semiconductor chip and TAB package having the same A semiconductor chip, having an active surface including a peripheral area and a central area, presents a connection area formed on a portion of the peripheral area. The semiconductor chip includes output pads formed in the peripheral area of the active surface and input pads formed in the central area of the active surface. The input pads may be connected to wiring patterns of a TAB tape passing over the connection area.
US07732932B2	Semiconductor chips with crack stop regions for reducing crack propagation from chip edges/corners Structures and a method for forming the same. The structure includes a semiconductor substrate, a transistor on the semiconductor substrate, and N interconnect layers on top of the semiconductor substrate, N being a positive integer. The transistor is electrically coupled to the N interconnect layers. The structure further includes a first dielectric layer on top of the N interconnect layers and P crack stop regions on top of the first dielectric layer, P being a positive integer. The structure further includes a second dielectric layer on top of the first dielectric layer. Each crack stop region of the P crack stop regions is completely surrounded by the first dielectric layer and the second dielectric layer. The structure further includes an underfill layer on top of the second dielectric layer. The second dielectric layer is sandwiched between the first dielectric layer and the underfill layer.
US07732926B2	Semiconductor device having a through electrode with a low resistance and method of manufacturing the same A method of manufacturing a through electrode. While using at least a first conductive film for a gate electrode as a mask, an inner trench and a peripheral trench is formed. The Inner trench is provided for an inner through electrode having a columnar semiconductor. The peripheral trench is provided for a peripheral through electrode around an annular semiconductor surrounding the inner trench. The inner trench and the peripheral trench are filled with a through electrode insulation film and a through electrode conductive film, respectively, to form an inner through electrode and a peripheral through electrode.
US07732925B2	Semiconductor device and manufacturing method thereof A semiconductor device with improved reliability and its manufacturing method is offered. The semiconductor device of this invention includes a semiconductor substrate, a pad electrode formed on the semiconductor substrate through an insulation layer made of silicon oxide, silicon nitride or the like, a supporting plate bonded to a top surface of the semiconductor substrate to cover the pad electrode and a via hole formed in the semiconductor substrate and extending from a back surface of the semiconductor substrate to the pad electrode, wherein an aperture of the via hole at a portion close to the pad electrode is larger than an aperture of the via hole at a portion close to the back surface of the semiconductor substrate.
US07732924B2	Semiconductor wiring structures including dielectric cap within metal cap layer Semiconductor wiring structures including a dielectric layer having a metal wiring line therein, a via extending downwardly from the metal wiring line, a metal cap layer over the metal wiring line, and a local dielectric cap positioned within a portion of the metal cap layer and in contact with the metal wiring line and a related method are disclosed. The local dielectric cap represents an intentionally created weak point in the metal wiring line of a dual-damascene interconnect, which induces electromigration (EM) voiding in the line, rather than at the bottom of a via extending downwardly from the metal wiring line. Since the critical void size in line fails, especially with metal cap layer (liner) redundancy, is much larger than that in via fails, the EM lifetime can be significantly increased.
US07732922B2	Simultaneous grain modulation for BEOL applications The invention is directed to an improved semiconductor structure, such that within the same insulating layer, Cu interconnects embedded within the same insulating level layer have a different Cu grain size than other Cu interconnects embedded within the same insulating level layer.
US07732920B2	Flip chip mounting body, flip chip mounting method and flip chip mounting apparatus The flip chip mounted body of the present invention includes: a circuit board (213) having a plurality of connection terminals (211); a semiconductor chip (206) having a plurality of electrode terminals (207) that are disposed opposing the connection terminals (211); and a porous sheet (205) having a box shape that is provided on an opposite side of a formation surface of the electrode terminal (207) of the semiconductor chip (206), is folded on an outer periphery of the semiconductor chip (206) on the formation surface side of the electrode terminal (207) and is in contact with the circuit board (213), wherein the connection terminal (211) of the circuit board (213) and the electrode terminal (207) of the semiconductor chip (206) are connected electrically via a solder layer (215), and the circuit board (213) and the semiconductor chip (206) are fixed by a resin (217). Thereby, the flip chip mounted body with excellent productivity and reliability that can mount the semiconductor chip on the circuit board, and a method and an apparatus for mounting the flip chip mounted body are provided.
US07732919B2	Semiconductor device Coupling reliability of a passive component is improved to increase the reliability of a semiconductor device. A first through hole is formed in a first electrode part of a first plate-like lead, and a second through hole is formed in a second electrode part of a second plate-like lead. As a result, at the first electrode part of the first plate-like lead, one external terminal of the passive component can be coupled to the first electrode parts on both sides of the first through hole while being laid across the first through hole. Also, at the second electrode part of the second plate-like lead, the other external terminal of the passive component can be coupled to the second electrode parts on both sides of the second through hole while being laid across the second through hole. Accordingly, at central portions both in the longitudinal and width directions of the passive component, the passive component is surrounded by sealing members. As a result, thermal stress applied to jointing materials such as solder can be reduced, improving the reliability of the semiconductor device (semiconductor package).
US07732917B2	Power module A power module includes a substrate having first and second main substrate surfaces; a semiconductor device disposed on the first main substrate surface, and having a first main surface on which a first main electrode is formed, and a second main surface on which a second main electrode in contact with the first main substrate surface is formed; a heat conduction portion disposed on the first main substrate surface in a residual region of a region on which the semiconductor device is disposed; and an upper cooling portion disposed on the heat conduction portion.
US07732911B2	Semiconductor packaging substrate improving capability of electrostatic dissipation A semiconductor packaging substrate with improved capability of electrostatic dissipation comprises a dielectric layer, a plurality of leads, a plurality of first electrostatic guiding traces, a plurality of second electrostatic guiding traces and a solder mask. The first electrostatic guiding traces and the second electrostatic guiding traces are formed in pairs in a plurality of electrostatic dissipation regions on the dielectric layer, where each pair of the first and second electrostatic guiding traces are disposed in equal line spacing and are electrically isolated from each other. The solder mask partially covers the leads but exposes the first electrostatic guiding traces and the second electrostatic guiding traces. The first electrostatic guiding traces are connected to some of the leads to enhance protection against electrostatic discharge.
US07732906B2	Semiconductor device There is provided a small and high-performance System in Package (SiP) suitable for high-density mounting. A System in Package (SiP) has a stack structure such that two memory chips are stacked and mounted over the main surface of a wiring substrate, a microcomputer chip is stacked and mounted over the upper part thereof, and the chips are sealed by a mold resin. Each of the memory chips is constructed so as to transmit and receive data to/from the outside of the system via the microcomputer chip. The microcomputer chip is constructed of a multiport structure having various interfaces between it and the outside of the system in addition to an interface between it and the inside of the system. The number of terminals (pins) of the microcomputer chip is much larger than that of the memory chips.
US07732900B2	Wired circuit board A wired circuit board having terminals that can provide reliable placement of molten metals on the terminals, to connect between the terminals and the external terminals with a high degree of precision. An insulating base layer 3 is formed on a supporting board 2, and a conductive pattern 4 is formed on the insulating base layer 3 so that a number of lines of wire 4a, 4b, 4c, 4d, magnetic head connecting terminals 7, and external connecting terminals 8 are integrally formed and also first through holes 9 are formed in the external connecting terminals 8. Thereafter, after an insulating cover layer 10 is formed, third through holes 20 and second through holes 19 are formed in the supporting board 2 and in the insulating base layer 3, respectively, to communicate with the first through holes 9. This can provide the result that when the external connecting terminals 8 are connected to the external terminals 23, the connection can be performed while confirming the placement of the solder balls 21 from the respective through holes.
US07732898B2	Electrical fuse and associated methods A fuse link of undoped material is connected between first and second doped material contact regions and a layer of conductive material is located above the first and second contact regions and the fuse link. According to other embodiments, a fuse link is connected between first and second contact regions. A layer of conductive material is above the first and second contact regions and the fuse link, and a heat sink is in proximity to the fuse link. In a method, a programming pulse is applied to a fuse link of undoped material connected between first and second doped material contact regions to generate electromigration drift of a conductive material above the first and second contact regions and the fuse link.
US07732885B2	Semiconductor structures with dual isolation structures, methods for forming same and systems including same A semiconductor structure with dual isolation structures is disclosed. The semiconductor structure may include a protruding isolation structure in a pixel array region of a substrate and an embedded isolation structure in a peripheral device region of the same substrate. A region of the protruding isolation structure extends from an upper surface of the substrate, while another region of the protruding isolation structure may, optionally, be embedded within the substrate. The embedded isolation structure is formed within the substrate and includes an upper surface that is substantially coplanar with the upper surface of the substrate. A method of forming the semiconductor structure with dual isolation structure is also disclosed.
US07732881B2	Current-confined effect of magnetic nano-current-channel (NCC) for magnetic random access memory (MRAM) One embodiment of the present invention includes a memory element having a composite free layer including a first free sub-layer formed on top of the bottom electrode, a nano-current-channel (NCC) layer formed on top of the first free sub-layer, and a second free sub-layer formed on top of the NCC layer, wherein when switching current is applied to the memory element, in a direction that is substantially perpendicular to the layers of the memory element, local magnetic moments of the NCC layer switch the state of the memory element.
US07732872B2	Integration scheme for multiple metal gate work function structures A metal gate stack containing a metal layer having a mid-band-gap work function is formed on a high-k gate dielectric layer. A threshold voltage adjustment oxide layer is formed over a portion of the high-k gate dielectric layer to provide devices having a work function near a first band gap edge, while another portion of the high-k dielectric layer remains free of the threshold voltage adjustment oxide layer. A gate stack containing a semiconductor oxide based gate dielectric and a doped polycrystalline semiconductor material may also be formed to provide a gate stack having a yet another work function located near a second band gap edge which is the opposite of the first band gap edge. A dense circuit containing transistors of p-type and n-type with the mid-band-gap work function are formed in the region containing the threshold voltage adjustment oxide layer.
US07732869B2	Insulated-gate semiconductor device Channel regions continuous with transistor cells are disposed also below a gate pad electrode. The channel region below the gate pad electrode is fixed to a source potential. Thus, a predetermined reverse breakdown voltage between a drain and a source is secured without forming a p+ type impurity region below the entire lower surface of the gate pad electrode. Furthermore, a protection diode is formed in polysilicon with a stripe shape below the gate pad electrode.
US07732866B2	Grounding front-end-of-line structures on a SOI substrate Structures and a method are disclosed for grounding gate-stack and/or silicon active region front-end-of-line structures on a silicon-on-insulator (SOI) substrate, which may be used as test structures for VC inspection. In one embodiment, a structure includes a grounded bulk silicon substrate having the SOI substrate thereover, the SOI substrate including a silicon-on-insulator (SOI) layer and a buried oxide (BOX) layer; the silicon active region having at least one finger element within the SOI layer, the at least one finger element isolated by a shallow trench isolation (STI) layer; and a polysilicon ground intersecting the at least one finger element and extending through the STI layer and the BOX layer to the grounded bulk silicon substrate, the polysilicon ground contacting the silicon active region and the grounded bulk silicon substrate.
US07732864B2	Semiconductor device and semiconductor integrated circuit using the same The present invention provides a high speed and low power consumption LSI operable in a wide temperature range in which a MOS transistor having back gates is used specifically according to operating characteristics of a circuit.In the LSI, an FD-SOI structure having an embedded oxide film layer is used and a lower semiconductor region of the embedded oxide film layer is used as a back gate. A voltage for back gates in the logic circuits having a small load in the logic circuit block is controlled in response to activation of the block from outside of the block. Transistors, in which the gate and the back gate are connected to each other, are used for the circuit generating the back gate driving signal, and logic circuits having a heavy load such as circuit block output section, and the back gates are directly controlled according to the gate input signal.
US07732863B2	Laterally diffused MOSFET A LDMOS transistor having a channel region located between an outer boundary of an n-type region and an inner boundary of a p-body region. A width of the LDMOS channel region is less than 80% of a distance between an outer boundary of an n+-type region and the inner boundary of a p-body region. Also, a method for making a LDMOS transistor where the n-type dopants are implanted at an angle that is greater than an angle used to implant the p-type dopants. Furthermore, a VDMOS having first and second channel regions located between an inner boundary of a first and second p-body region and an outer boundary of an n-type region of the first and second p-body regions. The width of the first and second channel regions of the VDMOS is less than 80% of a distance between the inner boundary of the first and second p-body regions and an outer boundary of an n+-type region of the first and second p-body regions. Moreover, a method for making a VDMOS transistor where the n-type dopants are implanted at an angle that is greater than an angle used to implant the p-type dopants.
US07732861B2	Trench MOS type silicon carbide semiconductor device A trench MOS type SiC semiconductor device includes a first conductivity semiconductor substrate, a first conductivity drift layer on the substrate, a second conductivity base layer on the drift layer, a first conductivity source layer on the base layer, a stripe shaped trench reaching from the surface of the source layer to the drift layer and having a gate electrode via a gate oxide film, a second conductivity layer on the bottom of the trench, and a second conductivity type region thereon on across-the-width side walls of at least one end of the trench, electrically coupling the second conductivity layer with the base layer. The device allows a low on-resistance without newly forming an electrode connected to the second conductivity layer even in the case of a device in which the second conductivity layer has to be grounded.
US07732858B2	High voltage integration circuit with freewheeling diode embedded in transistor A high voltage integrated circuit contains a freewheeling diode embedded in a transistor. It further includes a control block controlling a high voltage transistor and a power block—including the high voltage transistor—isolated from the control block by a device isolation region. The high voltage transistor includes a semiconductor substrate of a first conductivity type, a epitaxial layer of a second conductivity type on the semiconductor substrate, a buried layer of the second conductivity type between the semiconductor substrate and the epitaxial layer, a collector region of the second conductivity type on the buried layer, a base region of the first conductivity type on the epitaxial layer, and an emitter region of the second conductivity type formed in the base region. The power block further includes a deep impurity region of the first conductivity type near the collector region to form a PN junction.
US07732855B2	Semiconductor memory device including recessed control gate electrode A semiconductor memory device may include a semiconductor substrate, at least one control gate electrode, at least one storage node layer, at least one tunneling insulating layer, at least one blocking insulating layer, and/or first and second channel regions. The at least one control gate electrode may be recessed into the semiconductor substrate. The at least one storage node layer may be between a sidewall of the at least one control gate electrode and the semiconductor substrate. The at least one tunneling insulating layer may be between the at least one storage node layer and the at least one control gate electrode. The at least one blocking insulating layer may be between the storage node layer and the control gate electrode. The first and second channel regions may be between the at least one tunneling insulating layer and the semiconductor substrate to surround at least a portion of the sidewall of the control gate electrode and/or may be separated from each other.
US07732853B2	Multi-bit nonvolatile memory devices including nano-crystals and trench Nonvolatile integrated circuit memory devices having a 2-bit memory cell include a substrate, a source region and a drain region in the substrate, a step recess channel between the source region and the drain region, a trapping structure including a plurality of charge trapping nano-crystals on the step recess channel, and a gate on the trapping structure. Related fabrication methods are also described.
US07732842B2	Structure and method for forming a planar schottky contact A monolithically integrated trench FET and Schottky diode includes a plurality of trenches extending into a FET region and a Schottky region of a semiconductor layer. A trench in the Schottky region includes a dielectric layer lining the trench sidewalls, and a conductive electrode having a top surface that is substantially coplanar with a top surface of the semiconductor layer adjacent the trench. An interconnect layer electrically contacts the semiconductor layer in the Schottky region so as to form a Schottky contact with the semiconductor layer.
US07732837B2	Nitride semiconductor device In a nitride semiconductor device according to one embodiment of the invention, a p-type gallium nitride (GaN) layer electrically connected to a source electrode and extending and projecting to a drain electrode side with respect to a gate electrode is formed on an undoped or n-type aluminum gallium nitride (AlGaN) layer serving as a barrier layer.
US07732835B2	Vertical P-N junction device and method of forming same A P-N junction device and method of forming the same are disclosed. The P-N junction device may include a P-N diode, a PiN diode or a thyristor. The P-N junction device may have a monocrystalline or polycrystalline raised anode. In one embodiment, the P-N junction device results in a raised polycrystalline silicon germanium (SiGe) anode. In another embodiment, the P-N junction device includes a first terminal (anode) including a conductor layer positioned above an upper surface of a substrate and a remaining structure positioned in the substrate, the first terminal positioned over an opening in an isolation region; and a second terminal (cathode contact) positioned over the opening in the isolation region adjacent the first terminal. This latter embodiment reduces parasitic resistance and capacitance, and decreases the required size of a cathode implant area since the cathode contact is within the same STI opening as the anode.
US07732834B2	Semiconductor ESD device and method of making same A semiconductor device includes an ESD device region disposed within a semiconductor body of a first semiconductor type, an isolation region surrounding the ESD device region, a first doped region of a second conductivity type disposed at a surface of the semiconductor body within the ESD region, and a second doped region of the first conductivity type disposed between the semiconductor body within the ESD region and at least a portion of the first doped region, where the doping concentration of the second doped region is higher than the semiconductor body. A third doped region of the second semiconductor type is disposed on the semiconductor body and a fourth region of the first conductivity type is disposed over the third doped region. A fifth doped region of the second conductivity type is disposed on the semiconductor body. A trigger device and an SCR is formed therefrom.
US07732833B2	High-voltage semiconductor switching element In a base region of a first conductivity type, at least one emitter region of a second conductivity type and at least one sense region of the second conductivity type, spaced away from the emitter region, are selectively formed. The emitter region and the sense region are located so as to be aligned in a second direction perpendicular to a first direction going from a collector region of the first conductivity type, which is formed so as to be spaced away from the base region, toward the base region. The width of the sense region, the width of the emitter region, the width of a part of the base region that is adjacent to the sense region, and the width of a part of the base region that is adjacent to the emitter region in the second direction are set in such a manner that a sense ratio varies in a desired manner in accordance with variation in collector current.
US07732832B2	Compound semiconductor light-emitting device including p-type undoped boron-phosphide-based semiconductor layer joined to thin-film layer composed of an undoped hexagonal group III nitride semiconductor This pn-junction compound semiconductor light-emitting device includes a crystal substrate; an n-type light-emitting layer formed of a hexagonal n-type Group III nitride semiconductor and provided on the crystal substrate; a p-type Group III nitride semiconductor layer formed of a hexagonal p-type Group III nitride semiconductor and provided on the n-type light-emitting layer; a p-type boron-phosphide-based semiconductor layer having a sphalerite crystal type and provided on the p-type Group III nitride semiconductor layer; and a thin-film layer composed of an undoped hexagonal Group III nitride semiconductor formed on the p-type Group III nitride semiconductor layer, wherein the p-type boron-phosphide-based semiconductor layer is joined to the thin-film layer composed of an undoped hexagonal Group III nitride semiconductor.
US07732823B2	Light emitting device and semiconductor device In order to make it possible to grow up a light emitting device easily on a substrate made of a Si material system while production of an anti-phase domain can be prevented and a sufficiently high luminous efficiency can be obtained, the light emitting device is configured as a device which includes a substrate (1) formed from a Si material system, a Si1-x-yGexCy (0
US07732822B2	Light emitting device and method of manufacturing the same A light emitting device having improved light extraction efficiency is disclosed. The light emitting device includes a nitride semiconductor layer including a first semiconductor layer, an active layer, and a second semiconductor layer, which are sequentially stacked, a portion of the first semiconductor layer being exposed to the outside by performing mesa etching from the second semiconductor layer to the portion of the first semiconductor layer, and at least one groove formed through a portion of the first semiconductor layer, the active layer, and the second semiconductor layer.
US07732820B2	Substrate for display device having a protective layer provided between the pixel electrodes and wirings of the active matrix substrate, manufacturing method for same and display device A substrate for a display device includes a scan line, a signal line, a switching element provided on an insulating substrate, an interlayer insulation film, and a pixel electrode. The switching element is provided at an intersection of the scan line and the signal line. The switching element includes a gate electrode connected to the scan line, a source electrode connected to the signal line, and a drain electrode connected to the pixel electrode. The interlayer insulation film includes a contact hole for connecting the drain electrode of the switching element to the pixel electrode. A protective layer formed of an insulating material is provided above the scan line and/or the signal line. A portion of an underlying film under the protective layer contacts a portion of an overlying film over the protective layer.
US07732817B2	Pattern formed structure, method of forming pattern, device, electrooptical device and electronic equipment A partition-wall structure having a concave portion corresponding to a pattern formed by a functional liquid, including: a first concave portion provided corresponding to a first pattern; a second concave portion provided corresponding to a second pattern that is coupled to the first pattern and whose width is smaller than a width of the first pattern; and a convex portion provided in the first pattern.
US07732816B2	Semiconductor device A semiconductor integrated circuit device, such as a memory device or radiation detector, is disclosed, in which data storage cells are formed on a substrate. Each of the data storage cells includes a field effect transistor having a source, drain, and gate, and a body arranged between the source and drain for storing electrical charge generated in the body. The magnitude of the net electrical charge in the body can be adjusted by input signals applied to the transistor, and the adjustment of the net electrical charge by the input signals can be at least partially cancelled by applying electrical voltage signals between the gate and the drain and between the source and the drain.
US07732814B2	Liquid crystal display device and method of fabricating the same A liquid crystal display (LCD) device includes a gate line and a data line crossing each other to define a pixel region on a first substrate, a thin film transistor connected to the gate line and the data line, a first protrusion and a second protrusion formed on the first substrate, a pixel electrode connected to the thin film transistor in the pixel region, a first patterned spacer and a second patterned spacer formed on a second substrate facing the first substrate, wherein the first patterned spacer corresponds to the first protrusion, and the second patterned spacer corresponds to the second protrusion.
US07732812B2	Active semiconductor devices Apparatus including a support body; an organic semiconductor composition body on the support body, —and a first body including a hydrogenated vinylaromatic-diene block copolymer on the organic semiconductor composition body. Apparatus including a support body, —a first body including a hydrogenated vinylaromatic-diene block copolymer on the support body; and an organic semiconductor composition body on the first body. Techniques for making an apparatus.
US07732810B2	Methods for forming an undercut region and electronic devices incorporating the same An electronic device having a substrate structure having an undercut region is provided and further included is a method for forming an undercut region of a substrate structure. The method includes forming a patterned protective layer over a first electrode. The method also includes forming the substrate structure over the patterned protective layer. An opening within the substrate structure overlies an exposed portion of the substrate structure. The method further includes removing the exposed portion of the patterned protective layer, thereby exposing a portion of the first electrode and forming an undercut region of the substrate structure. The method still further includes depositing a liquid over the first electrode after removing the exposed portion of the patterned protective layer, and solidifying the liquid to form a solid layer.
US07732806B2	Refractive index variable element A refractive index variable element has a structure including a solid matrix, and one or more types of quantum dots dispersed in the solid matrix and having discrete occupied and unoccupied electron energy levels. The quantum dots perform a function of generating a pair of positive and negative charges upon irradiation with light, a function of trapping a positive charge, and a function of trapping a negative charge. The quantum dots performing the function of trapping a negative charge are selected from the group consisting of a combination of a negatively charged accepter and a positively charged atom, where the outermost electron shell of the positively charged atom is fully filled with electrons so that an additional electron occupies an upper different shell orbital when receives an electron, a metal chelate complex, and metallocene and derivatives thereof.
US07732805B2	Image sensor and method for manufacturing the same An image sensor and a method for manufacturing the same are provided. The image sensor can include transistor circuitry on a substrate, and a photodiode arranged above the transistor circuitry. The photodiode can include carbon nanotubes and a conductive polymer layer on the carbon nanotubes. A transparent conducting electrode can be provided on the carbon nanotubes.
US07732804B2	Solid state charge qubit device Ionisation of one of a pair of dopant atoms in a substrate creates a double well potential, and a charge qubit is realised by the location of one or more electrons or holes within this potential. The dopant atoms may comprise phosphorous atoms, located in a silicon substrate. A solid state quantum computer may be formed using a plurality of pairs of dopant atoms, corresponding gate electrodes, and read-out devices comprising single electron transistors.
US07732797B2	Detection device and method for detecting objects subject to cyclic or repetitive motion A device and method for detecting the presence or absence of an object which has repetitive motion are disclosed comprising, a receiver for receiving a signal from the object, and circuitry for determining the presence or absence of the object to be detected, wherein the circuitry records the signal from the receiver as a pattern of data during at least part of the repetitive motion of the object, compares the data with a previously recorded data pattern and, produces an output signal based on the comparison. The signal may be received during discrete time intervals, and may be light which can be transmitted with varying intensity. The circuitry may determine the value of signal received at a receiver and produce a binary value. The signal received at the receiver can be reflected from the object to be detected.
US07732795B2	Circuit arrangement for the electrical isolation of signal lines The invention relates to a circuit arrangement for the electrical isolation of signal lines, with an input (IN) for applying an input signal, an output (OUT) for releasing an output signal, and an initial branch (1) with an opto-coupler (OK) for optically coupling the input (TN) to the output (OUT), such that the input (IN) and the output (OUT) are connected in electrically isolated fashion by a second branch (2) with a capacitor (C1).
US07732793B2	Systems and methods for reducing the influence of plasma-generated debris on the internal components of an EUV light source Systems and methods are disclosed for reducing the influence of plasma generated debris on internal components of an EUV light source. In one aspect, an EUV metrology monitor is provided which may have a heater to heat an internal multi-layer filtering mirror to a temperature sufficient to remove deposited debris from the mirror. In another aspect, a device is disclosed for removing plasma generated debris from an EUV light source collector mirror having a different debris deposition rate at different zones on the collector mirror. In a particular aspect, an EUV collector mirror system may comprise a source of hydrogen to combine with Li debris to create LiH on a collector surface; and a sputtering system to sputter LiH from the collector surface. In another aspect, an apparatus for etching debris from a surface of a EUV light source collector mirror with a controlled plasma etch rate is disclosed.
US07732792B2	Pattern measurement apparatus Mutual compatibility is established between the measurement with a high magnification and the measurement in a wide region. A pattern measurement apparatus is proposed which adds identification information to each of fragments that constitute a pattern within an image obtained by the SEM, and which stores the identification information in a predetermined storage format. Here, the identification information is added to each fragment for distinguishing between one fragment and another fragment. According to the above-described configuration, it turns out that the identification information is added to each fragment on the SEM image which has possessed no specific identification information originally. As a result, it becomes possible to implement the SEM-image management based on the identification information.
US07732789B2	Optical system having a cleaning arrangement A cleaning arrangement for an optical system and in particular for an optical system designed for EUV radiation. The cleaning arrangement has a gas inlet (28) for a reactive gas (29). Contaminants (23) that have deposited on the surface of optical elements (110) are detached by the reactive gas. Also provided are getter surfaces (32) that are preferably arranged opposite the surfaces to be clean and by which the contaminants detached from these surfaces are absorbed. This absorption may take place as a result of condensation on the getter surface and also by chemical reaction.
US07732788B2	Radiation image converting panel, scintillator panel and radiation image sensor For a radiation image converting panel according to the present invention, a converting portion that converts a radiation image to an optical image is formed on a support for which a dielectric multilayer film is formed on a metal reflector, and the dielectric multilayer film includes at least a first dielectric layer that is in contact with the metal reflector and a second dielectric layer that is formed on the first dielectric layer and has a higher refractive index than that of the first dielectric film layer to light emitted by the converting portion.
US07732784B2	Wavelength-tunable light generator and optical coherence tomography device An OCT technique that permits tomographic observation of biological body parts that are difficult to restrain, and also provides a tomographic observation technique for the observation of a constrainable part that does not require constraint and thus removes a burden on the biological body. A wavelength-tunable light generator (wavelength-tunable light source) is employed as the light source of the optical coherence tomography device. The wavelength-tunable light generator has a wave number tunable range width of at least 4.7×10−2 μm−1 and an emitted-light frequency width of no more than 13 GHz, for example, and is capable of changing the wave number stepwise at wave number intervals of no more than 3.1×10−4 μm−1 and time intervals of no more than 530 μs.
US07732779B2	Radiation imaging apparatus A radiation imaging system is equipped with a radiation imaging apparatus and a control apparatus. The radiation imaging apparatus reads out image signals from a radiation detecting section that detects radiation which has passed through a subject, and outputs the read out image signals as wireless signals. The control apparatus outputs predetermined control signals to the radiation imaging apparatus as wireless signals. A second wireless communicating section of the control apparatus decreases the signal strength of communications to be lower during readout of the image signals than at times other than during readout of image signals.
US07732778B2	Radiation imaging apparatus and radiation imaging system The invention intends to be able to perform a gain correction fully adequately. Hence, at the time of radiographing an object, a gain correction of the object image is performed based on a gain correction image (XRc1) derived by performing a light reset. On the other hand, at the time of radiographing an object, when a light reset is not performed, a gain correction of the object image is performed based on a gain correction image (XRc2) derived without performing the light reset.
US07732777B2	Plasmon energy converter An energy converter employing plasmons. In a specific embodiment, a receiver receives a first type of energy or signal and provides one or more plasmons in response thereto. A detector is coupled to the receiver. The detector converts the one or more plasmons into a second type of energy or signal. In a more specific embodiment, the first type of energy or signal includes incident electromagnetic energy, such as visible, infrared, or ultraviolet radiation. The second type of energy or signal includes an electrical signal. The receiver includes a conductor grating that is coupled to a dielectric material. Examples of the detector includes a pn-junction and an interfacial bandgap junction. The receiver and the detector are coupled so that the one or more plasmons form a plasma wave as they travel from the receiver to the detector.
US07732776B2	Radiation imaging apparatus, drive method and program of the radiation imaging apparatus Provided is a radiation imaging apparatus including: a conversion unit including a plurality of pixels arranged two-dimensionally, wherein each of the pixels includes a conversion element for converting incident radiation into an electric charge and a switching element for transferring an electric signal based on the electric charge; a drive circuit unit for outputting, to the switching element, a drive signal having a voltage for turning on the switching element; a read-out circuit unit for reading out the electric signal from the pixel; a calculating unit for calculating the S/N ratio of the electric signal read out by the read-out circuit unit; and a determination unit capable of changing the voltage of the drive signal output from the drive circuit unit according to the S/N ratio calculated. As a result, the radiation imaging apparatus capable of improving the S/N ratio of the derived image is provided.
US07732774B2	High resolution PET breast imager with improved detection efficiency A highly efficient PET breast imager for detecting lesions in the entire breast including those located close to the patient's chest wall. The breast imager includes a ring of imaging modules surrounding the imaged breast. Each imaging module includes a slant imaging light guide inserted between a gamma radiation sensor and a photodetector. The slant light guide permits the gamma radiation sensors to be placed in close proximity to the skin of the chest wall thereby extending the sensitive region of the imager to the base of the breast. Several types of photodetectors are proposed for use in the detector modules, with compact silicon photomultipliers as the preferred choice, due to its high compactness. The geometry of the detector heads and the arrangement of the detector ring significantly reduce dead regions thereby improving detection efficiency for lesions located close to the chest wall.
US07732773B2	Gamma-ray tracking method for pet systems Gamma-ray tracking methods for use with granular, position sensitive detectors identify the sequence of the interactions taking place in the detector and, hence, the position of the first interaction. The improved position resolution in finding the first interaction in the detection system determines a better definition of the direction of the gamma-ray photon, and hence, a superior source image resolution. A PET system using such a method will have increased efficiency and position resolution.
US07732772B1	System and method for detecting explosive materials A system for detecting explosive materials includes at least one deuterium/tritium neutron generator module, at least one germanium detector module, and an analysis module. The deuterium/tritium neutron generator module bombards an object with neutrons. The germanium detector module detects gamma rays emitted by the object in response to the neutrons. The analysis module analyzes the gamma rays detected by the germanium detector module for the presence of explosive materials on or within the object.
US07732769B2	Apparatus and methods for use in flash detection The present embodiments provide methods, systems and apparatuses that detect, classify and locate flash events. In some implementations, some of the methods detect a flash event, trigger an imaging system in response to detecting the flash event to capture an image of an area that includes the flash event, and determines a location of the flash event.
US07732766B2	Method for measuring information transfer limit in transmission electron microscope, and transmission electron microscope using the same A crystal thin film is adopted as a specimen for measurement. A change in the contrast of crystal lattice fringes is measured under a condition that a diffracted wave and other wave are caused to interfere with each other. Thus, an information transfer limit of a transmission electron microscope can be measured quantitatively. Since the measurement is performed with a condition for interference restricted, the information transfer limit of the transmission electron microscope can be quantitatively assessed.
US07732764B2	Field emission electron gun and electron beam applied device using the same The object of the present invention is to enable the optical axis of an electron beam of a field emission electron gun mounting thereon an electron gun composed of a fibrous carbon material to be adjusted easily. Moreover, it is also to obtain an electron beam whose energy spread is narrower than that of the electron gun. Further, it is also to provide a high resolution electron beam applied device mounting thereon the field emission electron gun. The means for achieving the objects of the present invention is in that the fibrous carbon material is coated with a material having a band gap, in the field emission electron gun including an electron source composed of a fibrous carbon material and an electrically conductive base material for supporting the fibrous carbon material, an extractor for field-emitting electrons, and an accelerator for accelerating the electrons. Moreover, it is also to apply the field emission electron gun to various kinds of electron beam applied devices.
US07732762B2	Method of inspecting a specimen surface, apparatus and use of fluorescent material The invention relates to a method of inspecting a specimen surface. The method comprises the steps of generating a plurality of primary beams directed towards the specimen surface, focussing the plurality of primary beams onto respective loci on the specimen surface, collecting a plurality of secondary beams of charged particles originating from the specimen surface upon incidence of the primary beams, converting at least one of the collected secondary beams into an optical beam, and detecting the optical beam.
US07732757B2	Origin detection method for optical encoder An optical encoder equipped with an origin detection apparatus has a scale provided with an optical grating, a plurality of light receiving elements that is provided in association with the pitch of the optical grating and movable relative to the scale and a light source that illuminates the light receiving elements with light through the scale. An optically discontinuous portion is provided in the optical grating of the scale, a change of a light beam that occurs over a certain length of section at the time when a light beam corresponding to the discontinuous portion is incident on the light receiving elements, a change occurring in that section is detected, calculation is performed, and an origin position is detected from the result of the calculation.
US07732749B2	System and method for measuring the output of a photodetector and for reducing sensitivity to temperature variations A system for measuring the output of a photodetector is disclosed. An integrating amplifier circuit receives a signal output from the photodetector and is adapted to output an integrating amplifier voltage proportional to the signal output from the photodetector. A reference source is adapted to serve as a voltage source and is adapted to output a reference voltage proportional to background light incident upon the photodetector. A difference amplifier electronically coupled to the integrating amplifier circuit and to the adjustable reference, receiving the integrating amplifier voltage and the reference voltage, respectively. The difference amplifier is adapted to generate an amplified output using the reference voltage subtracted from the integrating amplifier voltage.
US07732748B2	Active pixel image sensor with reduced readout delay Methods, devices, and systems for improving (i.e., reducing) the settling time of an output signal read from a photo sensor and improving the PSRR of the supply voltage are disclosed, wherein a detected charge in a pixel is converted to a voltage and drives a source follower transistor. A bias transistor is coupled in series with the source follower transistor and includes an output therebetween. The bias transistor is driven to source a reduced current when the voltage results from a readout of a reset value of the pixel and the bias transistor is driven to source an enhanced current when the voltage results from a readout of a sensed signal value.
US07732747B2	Tool with contactless switch An electric tool has a handle, and an element for varying tool functions located in the handle and including a photoelectric cell incorporated onto the handle in such a way that if the photoelectric cell is completely or partly covered, a tool function is achieved on a specification in accordance with a predetermined sequence.
US07732737B2	Micro powered warming container A warming dispenser includes a housing having a compartment. The compartment holds a plurality of sheets. A heating device is located adjacent the plurality of sheets. A micro power source is connected to the heating device to generate energy from a fuel source, wherein the heating device uses the energy to warm at least one of the sheets. The micropower source may be, for example, a micro fuel cell adapted to deliver electricity for resistive heating.
US07732726B2	System and method for sorting dissimilar materials using a dynamic sensor Processing metallic materials, such as copper, from waste materials. The systems and methods employ a dynamic sensor, which measures the rate of change of current generated by metallic objects that pass by the sensor to identify metallic objects in a waste stream. The dynamic sensor may be coupled to a computer system that controls a material diverter unit, which diverts the detected metallic objects for collection and possible further processing. The systems or methods may employ stages of sensors for sequential recovery of materials.
US07732723B2	Auxiliary contact configuration for switching device An auxiliary contact configuration for a switching device, the switching device comprising a frame part (2) and the auxiliary contact configuration comprising a first auxiliary contact position (5) provided in the frame part (2) and arranged to receive an auxiliary contact (8), and a movable auxiliary contact control device (10) comprising a first control element (11) arranged to control the auxiliary contact (8) installed in the first position (5). The auxiliary contact configuration comprises a second auxiliary contact position (6) provided near the first auxiliary contact position (5), and the auxiliary contact control device (10) comprises a second control element (12) arranged to control the auxiliary contact (8) installed in the second position (6) in a manner different from the manner in which the first control element (11) is arranged to control the auxiliary contact (8) installed in the first position (5).
US07732722B1	Hermetically sealed pressure switch with composite actuation mechanism A hermetically sealed pressure switch apparatus and method includes a metal bellows directly installed at an inlet port for providing hermetic sealing thereof. A spring (e.g. a wave spring) can be connected in parallel or series combination with the metal bellows. The metal bellows is capable of being extended when an input pressure is applied which in turn compress the wave spring. The compression of the spring transfers a required motion to a plunger associated with an electrical switch in order to actuate the electrical switch when a certain pressure relative to a perfect vacuum is attained. The metal bellows and the spring can be pre-compressed utilizing the plunger in order to maintain switch set point accuracy and spring stiffness.
US07732720B2	Draft protection device for a balance and having a friction reduction device A draft protection device for a balance and a balance equipped with the draft protection device, wherein the draft protection device includes front and rear panels, two side panels and a top panel, and four posts which are fixedly mounted on a top cover of the balance, and wherein the posts extend vertically. The front and rear panels rest against the posts and are held in place by grooves provided in front and rear top frames which are connected to the top ends of the posts. The side panels are slidable while the front and rear panels are stationary. A friction reduction device mounted in the scale top cover so that the side panels slide along the friction reduction device.
US07732719B1	Hand held luggage scale case construction A hand held luggage scale case is comprised of a generally pentagonal pair of shells which fit compatibly together and include a storage chamber section for weight sensing elements as well as a tape measure. The case includes a recess channel molded into the shell to retain a weight measurement hook.
US07732714B2	Electrically conductive gasket with paint masking An electrically conductive gasket for paint masking. In one embodiment of the present invention, the gasket includes a core, an electrically conductive cover that is applied to the core with adhesive. A film of material is attached to the outer surface of the electrically conductive cover which functions as a removable mask. The various embodiments of the gasket may be fabricated from materials capable of withstanding relatively high temperatures and may be provided in a variety of different shapes.
US07732711B2	Semiconductive polymer composition A semiconductive polymer composition for use in power cables, wherein the composition has a multimodal ethylene homo- or copolymer produced in a polymerization process having a single site catalyst whereby the polymer composition has a density of 870-930 kg/m3, a MFR2 of 1 to 30 g/10 min and a Mw/Mn of less than or equal to 10.
US07732707B2	Ground rod and connection sleeve filled with compound of electric conduction An installation structure of a ground rod for driving the rod deep into the ground comprising an overhead earth wire installed to protect transformers, power-transmission lines, etc. from lightning; a ground wire that is extended from a lightning arrester to a ground; a multi-stage ground rod elongated by a thread type connection and connected with the end of the ground wire that it is buried into the ground; and a connecting sleeve for connecting the ground rod to the ground wire, the electric conductive compound preventing corrosion in the thread connection including a lead terminal side junction of the and a ground wire side junction of the connecting sleeve. Corrosion of the gap between junctions is inhibited by inserting electric conductive compound into the junctions of the lead terminal side and of the ground wire side of the ground wire connecting sleeve, increasing ground rod lifetimes and decreasing maintenance costs.
US07732704B2	Conductive paste for connecting thermoelectric conversion material The present invention provides an electrically conductive paste for connecting thermoelectric materials, the paste comprising a specific powdery oxide and at least one powdery electrically conductive metal selected from the group consisting of gold, silver, platinum, and alloys containing at least one of these metals. By connecting a thermoelectric material to an electrically conductive substrate with the electrically conductive paste of the invention, a suitable electroconductivity is imparted to the connecting portion of the thermoelectric element. Further, the thermal expansion coefficient of the connecting portion can be made close to that of the thermoelectric material. Therefore, even when high-temperature power generation is repeated, separation at the connecting portion is prevented and a favorable thermoelectric performance can be maintained.
US07732703B2	Music processing system including device for converting guitar sounds to MIDI commands A device is disclosed for converting guitar sounds to MIDI commands. The device has 7 microcontrollers. Each guitar string's oscillations are filtered and amplified with input filters and input amplifiers. The conditioned string signal is directed to an input of an associated microcontroller and converted to a MIDI command. Each string has an input filter and amplifier, and a microcontroller that converts the string oscillations into a MIDI command. MIDI commands from all six microcontrollers are received and processed by a main microcontroller that transmits the commands to the MIDI interface of a musical instrument with additional modification, if needed.
US07732700B2	Playback device, contents selecting method, contents distribution system, information processing device, contents transfer method, and storing medium A playback device includes a storing unit storing a contents database in which contents including at least music and tempo information indicating the tempo of the music are correlated with each other; a playback unit for performing playback of the contents; a tempo measuring unit for measuring an exercise tempo obtained along with the body movements of a user; a searching unit for searching contents from the contents database based on the information of the measured exercise tempo by the tempo measuring unit; and a contents selecting unit for selecting the contents searched by the searching unit as contents to be played by the playback unit.
US07732695B1	Playing cards for teaching music fundamentals A set of playing cards for teaching music fundamentals through the playing of traditional card games with the set of playing cards is provided. The set of playing cards is divided into a plurality of different card groups, each card group corresponding to a different octave group and including cards depicting the letter names and modifiers of musical pitches in the chromatic scale, each card is associated with only a single musical pitch of the chromatic scale and depicts the one or more letter names and modifiers corresponding to that musical pitch. Each card depicts one or more music scales in the key of the musical pitch associated with the respective card. Each card can depict one or more chords of a music scale in the key of the musical pitch associated with the respective card.
US07732691B2	Methods and apparatus for vibrato effects in keyboard percussion musical instruments Improved methods and apparatus of producing vibrato on keyboard percussion/tone bar instruments such as the vibraphone and marimba are provided. Means are disclosed for real time control of the expressive qualities of both the speed and strength of the vibrato of such instruments, while eliminating the need for an electrical motor. According to certain embodiments, methods and apparatus are disclosed to easily produce a change of dynamic level (crescendo and diminuendo) after a single strike of a tone bar or chord.
US07732690B2	Woodwind instrument and manufacturing method of pipe thereof A pipe of a woodwind instrument (e.g., an upper joint of an oboe) having a through-hole running therethrough in its longitudinal direction is produced in such a way that a plastic lining layer composed of a thermoplastic material is formed on the interior wall of the pipe and the circumferential surfaces of tone holes of the pipe. The thermoplastic material is selected from generally-known plastic materials such as polyethylene, polypropylene, polystyrene, ABS resin, and POM resin. This prevents the inside of the pipe from being excessively expanded due to a player's moist breath in playing the woodwind instrument; hence, it is possible to prevent cracks or flaws from occurring on the pipe. In addition, this structure is superior in manufacturability and suited to mass production.
US07732686B2	Stopper for keyboard-based musical instruments A stopper for a keyboard-based musical instrument is provided for accomplishing a good stopping feeling of a pivotable member, thereby making it possible to improve a touch feeling and restrain collision noise and other noise. A stopper 7 for a keyboard-based musical instrument with which a pivotable member 6 comes into contact while said pivotal member pivotally moves in association with a key touch, thereby restraining the pivotal movement of said pivotable member 6, comprises a mass 26, a first cushion 25 laminated on a front side of said mass 26, and a second cushion 27 laminated on a back side of said mass 26. Preferably, the mass 26 is made of a metal, and the first cushion 25 is harder than the second cushion 27.
US07732683B1	Maize variety PHNTV A novel maize variety designated PHNTV and seed, plants and plant parts thereof. Methods for producing a maize plant that comprise crossing maize variety PHNTV with another maize plant. Methods for producing a maize plant containing in its genetic material one or more traits introgressed into PHNTV through backcross conversion and/or transformation, and to the maize seed, plant and plant part produced thereby. Hybrid maize seed, plant or plant part produced by crossing the variety PHNTV or a trait conversion of PHNTV with another maize variety. Inbred maize varieties derived from maize variety PHNTV, methods for producing other inbred maize varieties derived from maize variety PHNTV and the inbred maize varieties and their parts derived by the use of those methods.
US07732682B1	Inbred corn line G07-NPID4586 Basically, this invention provides for an inbred corn line designated G07-NPID4586, methods for producing a corn plant by crossing plants of the inbred line G07-NPID4586 with plants of another corn plant. The invention relates to the various parts of inbred G07-NPID4586 including culturable cells. This invention also relates to methods for introducing transgenic transgenes into inbred corn line G07-NPID4586 and plants produced by said methods.
US07732680B2	Chemically inducible expression of biosynthetic pathways Methods and constructs for the introduction of multiple genes encoding enzymes in a multi-enzyme biosynthetic pathway are provided. In one embodiment, the constructs contain two or more enzyme-encoding genes, each under the control of an inducible promoter and each with a polyadenylation signal. The constructs are used to produce transgenic plants, in which the expression of the enzymes are increased when a chemical inducing agent is applied, and a biosynthetic product of the series of enzymes encoded by the transgenes is produced. Constructs may be used which contain two or more enzyme-encoding genes under the control of one or more promoters activated by activator molecules or complexes expressed from a transgene or transgenes, which are themselves under the control of one or more inducible promoters and switched on following the external application of a chemical. The transgene or transgenes expressing the activator molecules or complexes may be included in the same construct containing multiple genes encoding enzymes in a multi-enzyme biosynthetic pathway. Alternatively, the transgene or transgenes expressing the activator molecules or complexes may be on a different construct from the construct containing multiple genes encoding enzymes in a multi-enzyme biosynthetic pathway. The activator molecule can be expressed using a constitutive promoter in an inactive form which is converted to the active form following application of the chemical inducing agent.
US07732678B1	Cotton fiber transcriptional factors Novel DNA constructs are provided which may be used as molecular probes or inserted into a plant host to provide for modification of transcription of a DNA sequence of interest in cotton fiber, particularly in very early fiber development. The DNA constructs comprise a cotton fiber transcriptional initiation regulatory region associated with a gene which is expressed in cotton fiber.
US07732674B2	Soybean variety D5362795 The invention relates to the soybean variety designated D5362795. Provided by the invention are the seeds, plants and derivatives of the soybean variety D5362795. Also provided by the invention are tissue cultures of the soybean variety D5362795 and the plants regenerated therefrom. Still further provided by the invention are methods for producing soybean plants by crossing the soybean variety D5362795 with itself or another soybean variety and plants produced by such methods.
US07732673B2	Soybean variety D5232589 The invention relates to the soybean variety designated D5232589. Provided by the invention are the seeds, plants and derivatives of the soybean variety D5232589. Also provided by the invention are tissue cultures of the soybean variety D5232589 and the plants regenerated therefrom. Still further provided by the invention are methods for producing soybean plants by crossing the soybean variety D5232589 with itself or another soybean variety and plants produced by such methods.
US07732668B2	Floral development genes This invention relates to an isolated nucleic acid fragment encoding floral development proteins, more specifically FT, TFL or Ap3 homologs. The invention also relates to the construction of a recombinant DNA construct encoding all or a portion of the floral development proteins, in sense or antisense orientation, wherein expression of the recombinant DNA construct results in production of altered levels of the FT, TFL or Ap3 homologs in a transformed host cell.
US07732664B2	Genes associated to sucrose content Modern sugarcane cultivars are complex hybrids resulting from crosses among several species of the Saccharum genus. Traditional breeding methods have been extensively employed in different countries along the past decades to develop varieties with increased sucrose yield, and resistant to plagues and diseases. Conventional varietal improvement is, however, limited by the narrow pool of suitable markers. In this sense, molecular genetics is seen as a promising tool to assist in the process of molecular marker identification. The present invention concerns the identification of 348 genes associated with sucrose content in sugarcane plants. The genes were found to be differentially expressed when high sucrose and low sucrose plants and populations of plants were compared and/or when high and low sucrose internodes were compared. The expression data was obtained using cDNA microarray and quantitative PCR technologies. The genes identified can be used to identify, distinguish, characterize and/or develop plants with increased sucrose content. More preferably SEQ ID Nos: 1 to 203 should be useful as molecular markers. SEQ ID Nos: 204 to 228 are given as controls or examples of genes never associated with sucrose content. SEQ ID Nos. 1-203 and SEQ ID Nos. 229 to 373 can be targeted in the development of transgenic or non-transgenic varieties with increased sucrose content.
US07732661B2	Compositions isolated from forage grasses and methods for their use Isolated polynucleotides encoding polypeptides active in lignin, fructan and tannin biosynthetic pathways are provided, together with expression vectors and host cells comprising such isolated polynucleotides. Methods for the use of such polynucleotides and polypeptides are also provided.
US07732653B2	Method for producing graphite nanocatalysts having improved catalytic properties High temperature treatment of graphite nanofibers to increase their catalytic activity. The heat treated graphite nanofiber catalysts are suitable for catalyzing chemical reactions such as oxidation, hydrogenation, oxidative-dehydrogenation, and dehydrogenation.
US07732652B2	Perylene derivative synthesis process, perylene derivative and organic EL device The invention aims to provide a perylene derivative preparation process featuring satisfactory yields and improved preparation efficiency, a perylene derivative obtained by the process, and an organic EL device using the same. The object is achieved by a perylene derivative preparation process comprising subjecting to coupling reaction a 1,8-dihalogenated naphthalene derivative of the formula (1): wherein X is Cl, Br or I, R1 to R4, R11 and R12 each are hydrogen, alkyl, alkoxy, alkylthio, alkenyl, alkenyloxy, alkenylthio, aralkyl, aralkyloxy, aralkylthio, aryl, aryloxy, and arylthio radicals which may be substituted, amino radical, cyano radical, hydroxyl radical, —COOM1 radical (wherein M1 is hydrogen, alkyl, alkenyl, aralkyl or aryl), —COM2 radical (wherein M2 is hydrogen, alkyl, alkenyl, aralkyl, aryl or amino), or —OCOM3 radical (wherein M3 is alkyl, alkenyl, aralkyl or aryl), and at least two adjoining radicals selected from among R1 to R4, R11 and R12 may bond or fuse together to form a substituted or unsubstituted carbocyclic aliphatic ring, aromatic ring or fused aromatic ring with the carbon atoms on which they substitute, with the proviso that when the carbocyclic aliphatic ring, aromatic ring or fused aromatic ring has substituent radicals, the substituent radicals are the same as R1 to R4, R11 and R12, to thereby synthesize a perylene derivative of the formula (2): wherein R1′ to R4′, R11′ and R12′ are as defined for R1 to R4, R11 and R12 in formula (1), and R1 to R4, R11 and R12 and R1′ to R4′, R11′ and R12′ may be the same or different.
US07732650B2	Oxygenate conversion to olefins with metathesis A processing scheme and system for enhanced light olefin production, particularly for increased relative yield of propylene, involves oxygenate conversion to olefins and subsequent oxygenate conversion effluent stream treatment including cross-metathesis of 1-butene with 2-butene, metathesis of 2-butene with ethylene, conversion or removal of at least a portion of the isobutene, and/or isomerization of at least a portion of 1-butene to 2-butene to produce additional propylene. The processing scheme and system may further involve a reaction with distillation column for the metathesis of butenes with ethylene to produce propylene and/or a reaction with distillation column for the conversion of isobutenes with an oxygenate-containing material to produce a tertiary ether or alcohol.
US07732648B2	Multistage catalytic process for olefin etherification A process for producing ethers by reacting alcohols and olefins in successive catalytic stages is disclosed. The process includes alternating catalytic reaction stages and separation stages.
US07732645B2	Aromatic vinyl ether compounds Aromatic vinyl ether compounds represented by Formula (1) or by Formula (2) wherein each R and R′ is a hydrogen atom or a group represented by Formula (3) and wherein the remaining variables are as defined in the specification, provided that at least one pR in Formula (1) and at least one uR in Formula (2) is a Formula (3) group. These aromatic vinyl ether compounds are useful as, e.g., curing agents for cationic polymerization.
US07732642B1	Arylcarbonylated detonation nanodiamonds Functionalized detonation nanodiamond particulates of the formula: wherein Ar is selected from the group consisting of: wherein R is selected from the group consisting of H, H3C—(CH2)n— and wherein n has a value of 0-10. Also provided is a process for functionalizing detonation nanodiamonds particulates.
US07732641B2	Formoterol tartrate process and polymorph A method of preparation of a highly pure salt of R,R-formoterol L-tartrate is disclosed. The process provides the most thermodynamically stable polymorph by recrystallization of a novel polymorph.
US07732635B2	Method for producing organic acid The utilization amount of steam generated by heat recovery tends to decrease in a production process of an organic acid when the concentration of an organic acid solution obtained in a step of collecting an organic acid with a solvent such as water becomes high. The purpose of the invention is to find an advantageous method for effectively utilizing reaction heat and contribute to global environmental preservation and saving product costs. The present invention provides a production method of an organic acid comprising carrying out a gas-phase catalytic oxidation reaction of raw material gas at the temperature from 250° C. to 450° C., recovering at least a part of reaction heat and/or heat generated in combustion of a waste as high pressure steam at a pressure of 1 MPaG or higher, supplying at least a part of the high pressure steam to a back pressure steam turbine connected with a blower to drive the blower, and supplying at least a part of discharged gas from the back pressure steam turbine, low pressure steam A at a pressure lower than 1 MPaG, to an absorption type refrigerator to utilize the low pressure steam A as a heat source of the absorption type refrigerator.
US07732633B2	Arylsulfinate salts in photoinitiator systems for polymerization reactions Compositions are provided that include an electron donor and a sensitizing compound. More specifically, the electron donor is an arylsulfinate salt. Methods of polymerization are also provided that can be used to prepare polymeric material from a photopolymerizable composition that includes ethylenically unsaturated monomers and a photoinitiator system. The photoinitiator system includes an electron donor and a sensitizing compound.
US07732632B2	Process for obtaining pure oseltamivir The present invention provides a process for obtaining highly pure crystalline form of oseltamivir free base, thus, for example, suspending or dissolving impure or non-crystalline oseltamivir free base in a hydrocarbon solvent and then isolating crystals to obtain oseltamivir free base in well defined crystalline form. The present invention also provides a process for preparation of oseltamivir phosphate in high purity.
US07732627B2	High-purity cycloaliphatic diepoxy compound and preparation process thereof A high-purity cycloaliphatic diepoxy compound of General Formula (II) is an epoxidized product of a cycloaliphatic diolefinic compound of General Formula (I) having an isomer content as detected in gas chromatography (GC) of 15% or less: wherein X represents a bivalent group selected from the group consisting of, for example, O, S, —SO—, —SO2—, —CH2—, and —C(CH3)2—; and R1 to R18 may be the same as or different from each other and each represent hydrogen atom, a halogen atom, a hydrocarbon group which may contain oxygen atom or a halogen atom, or an alkoxy group which may be substituted. Such a high-purity cycloaliphatic diepoxy compound is prepared by producing the cycloaliphatic diolefinic compound through distillation, epoxidizing the compound with an aliphatic percarboxylic acid containing substantially no water, carrying out desolvation, and further purifying the epoxidized compound through distillation.
US07732622B2	Naphthalene derivatives A compound of formula (I) wherein R1 and R3 are the same or different and represent ═O, hydrogen, C1-6alkyl, C1-6dialkyl, ═CHC1-C5alkyl, ═S, or a 5- or 6-membered aryl; R4 to R9 are the same or different and represent hydrogen, C1-6alkoxy, OCF3, OCH2CF3, O-cyclopropyl, OCH2-cyclopropyl, C1-C6alkyl, S-alkyl, NR210 where R10 is hydrogen or C1-6alkyl, halogen, NO2, OH, CH2OC1-C6alkyl, CH2OH, or CF3; Q1 is hydrogen, C1-6alkyl, C1-6dialkyl, C1-6alkoxy, NHAc, NR210 where R10 is hydrogen or C1-6alkyl, difluoro, fluoro, ═O, or OH; Q2, Q3, Q4 and Q5 are the same or different and represent hydrogen, C1-6alkoxy, OCF3, OCH2CF3, O-cyclopropyl, OCH2-cyclopropyl, C1-C6alkyl, S-alkyl, NR210 where R10 is hydrogen or C1-6alkyl, halogen, NO2, OH, CH2OC1-C6alkyl, CH2OH, or a 5- or 6-membered aryl; with the proviso that the compounds [4-(1-oxo-1,3-dihydro-2H-benzo[f]isoindol-2-yl)phenyl]-2-propionic acid, sodium salt and [4-(4,9-diethoxy-1-oxo-1,3-dihydro-2H-benzo[f]isoindol-2-yl)phenyl]acetic acid are excluded; and pharmaceutically acceptable derivatives thereof.
US07732621B2	Process for the preparation of enantiomerically enriched indoline-2-carboxylic acid The present invention relates to a process for the preparation of an enantiomerically enriched optionally substituted indoline-2-carboxylic acid or a salt thereof, wherein an enantiomerically enriched chiral ortho-X-substituted phenylalanine compound, wherein X is a leaving group, is subjected to cyclisation, preferably at a temperature of below about 140° C., upon formation of the enantiomerically enriched indoline-2-carboxylic acid compound.
US07732619B2	Stilbene derivatives, light-emitting element, display device, and electronic device A novel stilbene derivative is provided with motivation of providing a blue emissive material showing excellent color purity. The use of the stilbene derivative of the present invention allows the fabrication of a blue-emissive light-emitting element with excellent color purity. The invention also includes an electronic device equipped with a display portion in which the stilbene derivative is employed. The stilbene derivative of the present invention is represented by formula (1), in which Ar1 and Ar2 may form a 5-membered ring by being directly bonded to each other. In formula (1), A11 represents any one of substituents represented by general formulas (1-1) to (1-3). The variables shown in formula (1) and (1-1) to (1-3) are as defined in the specification.
US07732611B2	Amine salt of carbostyril derivative The invention provides an amine salt of a carbostyril derivative formed from a carbostyril derivative represented by the formula (1) [wherein R is a halogen atom; the substituted position of the side chain is 3- or 4-position in the carbostyril skeleton; and the bonding between 3- and 4-positions of the carbostyril skeleton is a single bond or a double H bond] and an amine; and the invention is useful as drugs for treating various diseases, especially as aqueous formulations due to the superior water solubility and the superior pharmacologic effects.
US07732610B2	Heterocyclic compounds, their preparation and their use as medicaments, in particular as anti-bacterial agents The invention relates to new heterocyclic compounds of general formula (I), and their salts with a base or an acid: The invention also relates to a process for the preparation of these compounds as well as their use as medicaments, in particular as anti-bacterial agents.
US07732607B2	Heteroaryl-substituted diazatricycloalkanes and methods of use thereof The present invention relates to amide and urea derivatives of heteroaryl-substituted diazatricycloalkanes, pharmaceutical compositions including the compounds, methods of preparing the compounds, and methods of treatment using the compounds. More specifically, the methods of treatment involve modulating the activity of the α7 nAChR subtype by administering one or more of the compounds to treat or prevent disorders mediated by the α7 nAChR subtype. The diazatricycloalkanes typically consist of a 1-azabicyclooctane fused to pyrrolidine ring. The substitutent heteroaryl groups are 5- or 6-membered ring heteroaromatics, such as 3-pyridinyl and 5-pyrimidinyl moieties, which are attached directly to the diazatricycloalkane. The secondary nitrogen of the pyrrolidine moiety is substituted with an arylcarbonyl (amide type derivative) or an arylaminocarbonyl (N-arylcarbamoyl) (urea type derivative) group. The compounds are beneficial in therapeutic applications requiring a selective interaction at certain nAChR subtypes. That is, the compounds modulate the activity of certain nAChR subtypes, particularly the α7 nAChR subtype, and do not have appreciable activity toward muscarinic receptors. Radiolabeled versions of the compounds can be used in diagnostic methods.
US07732605B2	Synthesis of diketopiperazines Disclosed herein are methods for synthesizing diketopiperazines with enantiomeric excess by inducing cyclization of an α-keto acid with an acid catalyst.
US07732597B2	Crystalline form of linezolid The present invention relates to a novel crystalline form of linezolid, to processes for its preparation and to a pharmaceutical composition containing it.
US07732595B2	Process for preparing an A2A-adenosine receptor agonist and its polymorphs Disclosed is a synthesis suitable for large scale manufacture of an A2A-adenosine receptor agonist, and also relates to polymorphs of that compound, and to methods of isolating a specific polymorph. The A2A-adenosine receptor agonist has the following formula: This compound is prepared by reacting the ethyl ester with methylamine in a sealed pressure reactor.
US07732592B2	ALK protein tyrosine kinase, cells and methods embodying and using same The present invention provides for a transgenic animal model that constitutively expresses a protein encoded by the NPM-ALK gene in lymphoid tissue, and exhibits enhanced and accelerated development of a T cell lymphoproliferative disorder or B cell plasma cell tumor, together with the identification of cells transduced with the ALK tyrosine kinase gene or fusion proteins thereof, and methods for using this animal model and cells for screening compounds or treatments for antitumor activity. In preferred embodiments, the animal is a transgenic mouse that expresses a human NPM-ALK gene operably linked to human regulatory sequences, and the cells of the mouse have at least one copy of the NPM-ALK transgene, whereby the mouse constitutively expresses a protein encoded by the NPM-ALK transgene. The animals and cells of the invention are useful in the study of NPM-ALK-dependent lymphomagenesis and plasma cell tumors and in the development of treatments for these conditions.
US07732591B2	Compositions, devices and methods for treatment of huntington's disease through intracranial delivery of sirna The present invention provides devices, small interfering RNAs, and methods for treating a neurodegenerative disorder comprising the steps of surgically implanting a catheter so that a discharge portion of the catheter lies adjacent to a predetermined infusion site in a brain, and discharging through the discharge portion of the catheter a predetermined dosage of at least one substance capable of inhibiting production of at least one neurodegenerative protein. The present invention also provides valuable small interfering RNA vectors, systems, and methods for treating Huntington's disease in vivo without impairment of cell endoplasmic reticulum, spontaneous motor activity, or locomotor activity of a patient.
US07732590B2	Modulation of diacylglycerol acyltransferase 2 expression Compounds, compositions and methods are provided for modulating the expression of diacylglycerol acyltransferase 2. The compositions comprise oligonucleotides, targeted to nucleic acid encoding diacylglycerol acyltransferase 2. Methods of using these compounds for modulation of diacylglycerol acyltransferase 2 expression and for diagnosis and treatment of diseases and conditions associated with expression of diacylglycerol acyltransferase 2 are provided.
US07732583B2	Glycolipids and synthetic method thereof as well as their synthetic intermediates, and synthetic intermediates, and synthetic method thereof Novel glycolipid derivatives, where the substituent of the sphingosine base part is a short carbon chain alkyl group, substituted or unsubstituted cycloalkyl group, substituted or unsubstituted aryl group or substituted or unsubstituted aralkyl group and efficient synthetic methods for practical mass production of the same and intermediates useful for the synthesis of these compounds.Glycolipids having the formula (I): where R3 indicates a substituted or unsubstituted C1 to C7 linear alkyl group, substituted or unsubstituted cycloalkyl group, substituted or unsubstituted aryl group, or substituted or unsubstituted aralkyl group and R8 indicates a substituted or unsubstituted C1 to C35 alkyl group, substituted or unsubstituted aryl group or substituted or unsubstituted aralkyl group are chemically synthesized.
US07732582B2	Benzonaphthacene glycoside derivative and use thereof A dicarboxylic acid compound obtainable by oxidative degradation of pradimicin antibiotics, which are antibiotics consisting of the benzonaphthacene skeleton, a D-amino acid side chain and a sugar chain, for the second saccharide residue of the sugar chain, and use thereof utilizing a specific microorganism binding property thereof are provided. The dicarboxylic acid compound has significantly improved water-solubility compared with the raw material antibiotics, whist maintaining the specific microorganism binding property.
US07732574B2	Wound care products containing keratin The invention relates to a would care product that provides a biochemical environment around a wound to promote wound healing. The wound care product includes a keratin protein fraction material in which the protein fraction is intact, is from the intermediate filament protein family or the high sulfur protein family and in which the protein fraction is S-sulfonated. The invention also described a method of making a wound care product.
US07732573B2	Method for producing porous body comprising apatite/collagen composite fibers A method for producing a porous body comprising apatite/collagen composite fibers comprising the steps of gelling a dispersion comprising long apatite/collagen composite fibers having an average length of 10-75 mm, short apatite/collagen composite fibers having an average length of 0.05-1 mm, and a liquid; freezing and drying the resultant gel to form a porous body; and cross-linking collagen in the porous body.
US07732571B2	Chicken growth differentiation factor-8 Chicken growth differentiation factor-8 (GDF-8) is disclosed along with fragments and pharmaceutical compositions thereof.
US07732570B2	Alteration of Fc-fusion protein serum half-lives by mutagenesis The present invention provides for a modified Fc-fusion protein in which at least one amino acid from the heavy chain constant region selected from the group consisting of amino acid residues 250, 314, and 428 is substituted with another amino acid which is different from that present in the unmodified Fc-fusion protein, thereby altering the binding affinity for FcRn and/or the serum half-life in comparison to the unmodified Fc-fusion protein.
US07732566B2	Allergenic latex protein The present invention relates to a protein found in natural rubber that can induce an allergic reaction in persons who have been sensitised to it. The invention provides for the process of isolating and purifying the protein and describes the characteristics of the protein, including its molecular weight, isoelectric point, amino acid sequence and allergenicity. The invention also describes the isolation and cloning a the DNA that encodes the protein. The production of the recombinant version of the protein using a protein expression vector is described.
US07732565B2	Compositions and methods relating to elutable carbohydrate-binding proteins Compositions and methods are provided for creating and identifying mutant carbohydrate-binding proteins that reversibly bind to carbohydrate substrates under conditions where the native protein remains bound. Examples of modified chitin-binding domains are provided which can be eluted from chitin in the presence of a reducing agent or at a pH within the range of 5-10.
US07732563B2	Cloning, sequencing and expression of a gene encoding an eukaryotic amino acid racemase, and diagnostic, therapeutic, and vaccination applications of parasite and viral mitogens A method of preventing or inhibiting infection by a parasite or virus in vivo comprising administering to a human in need thereof a parasite or virus mitogen, such as a eukaryotic amino acid racemase, in a sub-mitogenic amount sufficient to induce a protective immune response against the parasite or virus in the human.
US07732562B2	Trisoxetane compound, production process and optical waveguide therewith The present invention relates to a trisoxetane compound represented by the following formula (1): wherein R1 and R3 to R8 are the same or different and each represents a hydrogen atom or an alkyl group having 1 to 6 carbon atom(s) with the proviso that at least one of R3 to R8 is an alkyl group having 1 to 6 carbon atom(s); R2 represents a divalent aliphatic chained organic group having 0 to 16 carbon atom(s); and R9's each represents a hydrogen atom or an alkyl group having 1 to 6 carbon atom(s), a process for producing the same, and an optical waveguide including the same.
US07732560B2	Terphenyl dihydroxy monomers containing fluorine and fluorinated poly(arylene ether sulfide)s The present invention relates to terphenyl dihydroxy monomers containing fluorine and fluorinated poly(arylene ether sulfide)s prepared by using the monomers, more particularly, terphenyl dihydroxy monomers containing both two hydroxy functional groups and fluorine and fluorinated poly(arylene ether sulfide)s prepared by an aromatic nucleophilic substitution polymerization (SNAr) using the monomers, which are thus useful as optical materials in the field of information telecommunications.
US07732553B2	Method of producing encapsulation resins A process is provided for producing curable polyorganosiloxanes where noble metal oxides are used as hydrosilylation catalysts. The noble metals can be used in solid granular form or as part of a fixed bed, and do not form part of the final curable composition or cured product. The cured polyorganosiloxanes have increased stability and can be used as encapsulation resins at a temperature far lower than 300° C., have excellent light transmission properties (colorless transparency) in a wavelength region of from ultraviolet light to visible light, light resistance, heat resistance, resistance to moist heat and UV resistance, and do not generate cracks and peeling even in use over a long period of time.
US07732550B2	Stimuli-responsive polymer utilizing keto-enol tautomerization and stimuli-responsive separating material and chemical-releasing capsule comprising the same A stimuli-responsive polymer derivative utilizing keto-enol tautomerization. Also disclosed are a simple process for producing an N-acyl(meth)acrylamide derivative which can be used as a monomer for the stimuli-responsive polymer, a process for the production of an intermediate thereof, and an intermediate thus produced.
US07732546B2	Use of silylated sulfonate monomers to improve contact lens wettability The present invention relates to polymeric compositions useful in the manufacture of biocompatible medical devices. More particularly, the present invention relates to certain hydrophilic monomers capable of polymerization to form polymeric compositions having desirable physical characteristics useful in the manufacture of ophthalmic devices. The polymeric compositions comprise polymerizable hydrophilic siloxanyl monomers.
US07732540B2	Process for producing olefin copolymerization catalyst and process for producing olefin copolymer A process for producing an olefin copolymerization catalyst, comprising the step of contacting, with one another, (A) a solid catalyst component containing a titanium atom, a magnesium atom and a halogen atom, (B) an organoaluminum compound and/or organoaluminumoxy compound, and (C) a nitrogen-containing aromatic heterocyclic compound, whose one or more carbon atoms adjacent to its nitrogen atom are linked to an electron-withdrawing group, or a group containing an electron-withdrawing group; and a process for producing an olefin copolymer using the an olefin copolymerization catalyst.
US07732539B2	Modified acrylic block copolymers for hydrogels and pressure sensitive wet adhesives A method of producing an acrylic block copolymer comprising hydrophobic poly (lower alkyl methacrylate), hydrophilic poly (lower alkyl methacrylic acid), and hydrophobic poly (lower alkyl methacrylate) is disclosed.
US07732536B2	Combination of aminofunctional and acrylatofunctional polyorganosiloxanes Compositions which comprise aminofunctional polyorganosiloxanes and additionally polyorganosiloxanes are described which can be prepared by reacting polysiloxanes with Si—H bonds (H-siloxanes) and specific compounds with carbon—carbon multiple bonds. The last-mentioned compounds comprise acrylate units. The compositions are suitable for the treatment of fabrics, to which advantageous properties are hereby imparted.
US07732533B2	Zwitterionic block copolymers and methods Zwitterionic block copolymers having oppositely charged or chargeable terminal groups, and methods of making and using the same, are disclosed. The zwitterionic block copolymers can undergo microphase separation.
US07732509B2	Polymeric colorant-based ink compositions An ink composition suitable for ink jet printing comprises a polymeric colorant in a carrier, the colorant containing at least one hydrophilic portion and at least one hydrophobic portion, wherein the composite log Kow of the polymeric colorant is more positive than −0.7.
US07732508B2	Automixable putty impression material The present invention relates to a multicomponent automixable putty impression material, its components, mixtures of the components and a method for obtaining impressions with the multicomponent automixable putty impression material.
US07732506B2	Radiation-curable compositions for improved weather resistance Disclosed are radiation-curable compositions comprising at least one ortho-phthalate (meth)acrylate, and optionally a (meth)acrylate monomer, a stabilizing package, an adhesion promoter, and/or a photoinitiator. The compositions maintain physical integrity when cured and then aged for seven days under the conditions of 70% relative humidity, 77° C. black panel temperature, 55° C. chamber air temperature and a light intensity of 0.51 W/m2/nm at 340 nanometer wavelength passed through a daylight filter. The preparation and use of these compositions are also disclosed.
US07732500B2	High cobalt content, high cobalt surface area catalysts, preparation and use thereof A particulate catalyst comprises an intimate mixture of cobalt and aluminum compounds at an atomic ratio in the range 10:1 to 2:1 (Co:Al), which when reduced at 425° C., has a cobalt surface area as measured by hydrogen chemisorption at 150° C. of at least 30 m2/g of catalyst. The catalyst is prepared by sequential precipitation of cobalt with aluminum ions in the presence of an alkaline precipitation agent. The catalyst may be used for the hydrogenation of unsaturated compounds or the Fischer-Tropsch synthesis of hydrocarbons.
US07732499B2	Preparation of syngas for acetic acid synthesis by partial oxidation of methanol feedstock A method for the production of syngas from methanol feedstock is disclosed. The methanol feed (110) is supplied to a partial oxidation reactor (112) with oxygen (114) and optionally steam (116) to yield a mixed stream (118) of hydrogen, carbon monoxide, and carbon dioxide. The carbon dioxide (122) is separated out and the hydrogen and carbon monoxide mixture (124) is fed to a cold box (126) where it is separated into hydrogen-rich and carbon monoxide-rich streams (130, 128). The separated carbon dioxide (122) can be recycled back to the partial oxidation reactor (112) as a temperature moderator if desired. The carbon monoxide-rich stream (128) can be reacted with methanol (134) in an acetic acid synthesis unit (132) by a conventional process to produce acetic acid (136) or an acetic acid precursor. Optionally, an ammonia synthesis unit (144) and/or vinyl acetate monomer synthesis unit (156) can be integrated into the plant.
US07732498B2	Process for preparing dispersible nanoparticles The present invention relates to innovative nanoparticles, to a process for preparing nanoparticles by recrystallization, and to the use thereof.
US07732496B1	Highly porous and mechanically strong ceramic oxide aerogels Structurally stable and mechanically strong ceramic oxide aerogels are provided. The aerogels are cross-linked via organic polymer chains that are attached to and extend from surface-bound functional groups provided or present over the internal surfaces of a mesoporous ceramic oxide particle network via appropriate chemical reactions. The functional groups can be hydroxyl groups, which are native to ceramic oxides, or they can be non-hydroxyl functional groups that can be decorated over the internal surfaces of the ceramic oxide network. Methods of preparing such mechanically strong ceramic oxide aerogels also are provided.
US07732494B2	Method of concentrating fine particle dispersion and method of recovering fine particle A method for concentration of fine particles dispersed in a dispersion into an ionic liquid comprising, adding an ionic liquid, especially an organic ionic liquid at ordinary temperature, e.g., a salt of 1-butyl-3-methylimidazolium with PF6− to a dilute dispersion of fine particles so as to concentrate the fine particles into the ionic liquid.
US07732490B2	Methods of treating cancer The present invention provides methods of selectively inducing terminal differentiation, cell growth arrest and/or apoptosis of neoplastic cells, and/or inhibiting histone deacetylase (HDAC) by administration of pharmaceutical compositions comprising potent HDAC inhibitors. The oral bioavailability of the active compounds in the pharmaceutical compositions of the present invention is surprisingly high. Moreover, the pharmaceutical compositions unexpectedly give rise to high, therapeutically effective blood levels of the active compounds over an extended period of time. The present invention further provides a safe, daily dosing regimen of these pharmaceutical compositions, which is easy to follow, and which results in a therapeutically effective amount of the HDAC inhibitors in vivo.
US07732488B2	Pharmaceutical composition comprising low concentrations of environmental pollutants The invention relates to a process for decreasing the amount of environmental pollutants in a mixture comprising a fat or an oil, being edible or for use in cosmetics, the fat or oil containing the environmental pollutants, which process comprises the steps of adding a volatile working fluid to the mixture, where the volatile working fluid comprises at least one of a fatty acid ester, a fatty acid amide, a free fatty acid and a hydro-carbon, and subjecting the mixture with the added volatile working fluid to at least one stripping processing step, in which an amount of environmental pollutant present in the fat or oil, being edible or for use in cosmetics, is separated from the mixture together with the volatile working fluid. The present invention also relates to a volatile environmental pollutants decreasing working fluid, for use in decreasing an amount of environmental pollutants present in a fat or oil, being edible or for use in cosmetics. In addition, the present invention relates to a health supplement, a pharmaceutical and an animal feed product prepared according to the process mentioned above.
US07732485B2	Treatment of cancer The invention relates to the treatment of cancers, in particular, cancers that are resistant to platinum based chemotherapeutic agents. A pharmaceutical composition for the treatment of cancer comprising an effective amount of a compound having two gold(I) atoms each covalently bonded to a carbon atom in a covalent link connecting the two gold(I) atoms and a pharmaceutically acceptable excipient.
US07732475B2	Histone deacetylase inhibitors Compounds, pharmaceutical compositions, kits and methods are provided for use with HDAC that comprise a compound selected from the group consisting of: wherein the substituents are as defined herein.
US07732473B2	Compounds with nootropic action, their preparation, pharmaceutical compositions containing them, and use thereof Described herein are new bicyclic arylimidazolones having nootropic action (i.e., protecting and stimulating cerebral functions), analgesic action and anti hyperalgesic action; also described is the process for their preparation and pharmaceutical compositions comprising them, useful for the treatment of cognitive deficits, and of various types of pain.
US07732468B2	3-aryl-6-aryl-[ 1,2,4]triazolo[3,4-b][1,3,4]thiadiazoles and related compounds as activators of caspases and inducers of apoptosis and the use thereof Disclosed are 3-aryl-6-aryl-7H-[1,2,4]triazolo[3,4-b][1,3,4]thiadiazoles and related compounds thereof, represented by the Formula I: wherein Ar1, Ar2, and X are defined herein. The present invention relates to the discovery that compounds having Formula I are activators of caspases and inducers of apoptosis. Therefore, the activators of caspases and inducers of apoptosis of this invention may be used to induce cell death in a variety of clinical conditions in which uncontrolled growth and spread of abnormal cells occurs.
US07732464B2	Heterocyclic substituted 4-(aminomethyl)-piperidine benzamides as 5HT4-antagonists The present invention is concerned with novel compounds of formula (I) having 5HT4-antagonistic properties. The invention further relates to methods for preparing such novel compounds, pharmaceutical compositions comprising said novel compounds as well as the use as a medicine of said compounds.
US07732461B2	Tryclic nitrogen containing compounds and their use as antibacterials Tricyclic nitrogen containing compounds of formula (I) and their use as antibacterials.
US07732460B2	Heterocyclic compounds, their preparation and their use as antibacterials Tricyclic nitrogen containing compounds of formula (I) and their use as antibacterials.
US07732449B2	Inhibitors of cathepsin S The present invention provides compounds, compositions and methods for the selective inhibition of cathepsin S. In a preferred aspect, cathepsin S is selectively inhibited in the presence of at least one other cathepsin isozyme. The present invention also provides methods for treating a disease state in a subject by selectively inhibiting cathepsin S. More particularly, the present invention provides compounds having Formula 1: wherein Q is an optionally substituted piperazinyl; and A, R5, R6, R7, R8, R9 and Ar are substituents.
US07732439B2	Biologically active methylene blue derivatives The present invention relates to a pharmaceutical composition which contains a compound of formula in which R1, R2, R3 and R4 are each n-butyl, where XP− is a counteranion and P is 1, 2 or 3, together with a pharmaceutically acceptable carrier, excipient or adjuvant.
US07732438B2	CGRP receptor antagonists Compounds of Formula (I) and Formula (II) (where variables R1, R2, R4, A, B, W, X, Y and Z are as defined herein) useful as antagonists of CGRP receptors and useful in the treatment or prevention of diseases in which the CGRP is involved, such as headache, migraine and cluster headache. The invention is also directed to pharmaceutical compositions comprising these compounds and the use of these compounds and compositions in the prevention or treatment of such diseases in which CGRP is involved.
US07732436B2	Preparation of hymenialdisine derivatives and use thereof The synthesis and biological activity of indoloazepines and acid amine salts thereof which are structurally related to naturally-occurring hymenialdisine is disclosed. Naturally-occurring hymenialdisine obtained from the sponge is a potent inhibitor of production of cytokines interleukin-2 (IL-2) and tumor necrosis factor-α (TNF-α). The chemically-synthesized indoloazepines of the invention also inhibit production of IL-2 and TNF-α. The indoloazepines are useful for treating inflammatory diseases, particularly diseases associated with kinases NF-κB or GSK-3β activation or NF-κB activated gene expression products. The indoloazepines are useful for the treatment of cancer by the inhibition of kinases CHK1 and CHK2.
US07732433B2	Biologically active complex The invention relates to an aqueous solution containing at least one species selected from the group consisting of a 1:1 molar complex of TeO2 with a moiety of formula (A) and ammonium salts thereof: HO—X—OH (A); where X is an optionally substituted divalent saturated hydrocarbon group containing 2-8 carbon atoms in the chain connecting the two OH groups; and its use for stimulating cells to produce cytokines and for treating mammalian diseases and conditions responsive to increased production of cytokines. The complex may be used also for treating mammalian cancer which is not responsive to increased production of cytokines.
US07732432B2	17-carbamoyloxy cortisol derivatives as selective glucocorticoid receptor modulators The present invention encompasses compounds of Formula (I) or pharmaceutically acceptable salts or hydrates thereof, which are useful as selective glucocorticoid receptor ligands for treating a variety of autoimmune and inflammatory diseases or conditions. Pharmaceutical compositions and methods of use are also included.
US07732429B2	Reducing tetracycline resistance in living cells The present invention provides an improved methodology by which therapeutically to overcome resistance to tetracycline in living cells including bacteria, parasites, fungi, and rickettsiae. The methodology employs a blocking agent such as C5 ester derivatives, or 6-deoxy 13-(substituted mercapto) derivatives of tetracycline, in combination with other tetracycline-type antibiotics as a synergistic combination of compositions to be administered simultaneously, sequentially or concurrently. In another embodiment, certain novel compositions are provided which may be administered alone against, for example, a sensitive or resistant strain of gram positive bacteria such as S. aureus and E. faecalis. The concomitantly administered compositions effectively overcome the tetracycline resistant mechanisms present such that the cell is effectively converted from a tetracycline-resistant state to a tetracycline-sensitive state.
US07732424B2	Purine derivatives and methods of use thereof The present invention relates to Purine Derivatives; compositions comprising an effective amount of a Purine Derivative; and methods for reducing an animal's core body temperature, protecting an animal's heart against myocardial damage during cardioplegia; or for treating or preventing a cardiovascular disease, a neurological disorder, an ophthalmic condition, an ischemic condition, a reperfusion injury, obesity, a wasting disease, or diabetes, comprising administering an effective amount of a Purine Derivative to an animal in need thereof. The Purine Derivatives include compounds of the following formula: or a pharmaceutically acceptable salt thereof wherein A is —CH2OH B and C are —OH: D is A and B are trans with respect to each other: B and C are cis with respect to each other: C and D are cis or trans with respect to each other: R1 is —H, -halo, —CN, —N(R2)2, —OR2, —SR2, —NHC(O)R2, —NHC(O)N(R2)2, —NHC(O)OR2, —C(O)OR2, —C(O)R2, —C(O)N(R2)2, —OC(O)N(R2)2, —C(halo)3, or —NO2; each R2 is independently —H, —C1-C10 alkyl, —C2-C6 alkenyl, —C2-C6 alkynyl, —(CH2)n-aryl, —(CH2)n-(3- to 7-membered monocyclic heterocycle, —(CH2)n-(8- to 12-membered bicyclic heterocycle), —(CH2)n—(C3-C8 monocyclic cycloalkyl), —(CH2)n—(C3-C8 monocyclic cycloalkenyl), —(CH2)n—(C8-C12 bicyclic cycloalkyl), or —(CH2)n—(C8-C12 bicyclic cycloalkenyl); each n is an integer ranging from 0 to 6; each p is an integer ranging from 1 to 6; and each q is an integer ranging from 1 to 6.
US07732415B2	Topical treatment or prevention of ocular infections The topical application of an azalide antibiotic such as azithromycin to the eye is useful in treating or preventing ocular infections. In one embodiment, the azalide antibiotic is supplied to the eye in a depot for sustained release. A more convenient dosing regimen can also be provided by the use of an appropriate depot. Furthermore, a composition containing a combination of medicaments is also provided.
US07732412B2	Methods of treatment using novel LHRH antagonists having improved solubility properties The invention relates to peptides which contain N-methylated amino acid units and have improved water solubility. The invention also relates methods for treating a hormone-dependent tumor or a non-malignant indication that is treatable by LH-RH suppression, the method comprising administering to a patient in need of the treatment a therapeutically effective amount of a compound of the invention. Hormone-dependent cancers that can be treated with the methods of the invention include prostate cancer, breast cancer, ovarian cancer, endometrial cancer, and pancreatic cancer. Non-malignant indications which can be treated by the methods of the invention include benign prostate hyperplasia (BPH), endometriosis, acne, polycystic ovarian disease, dysmenorrhea, precocious puberty, and uterine fibroids and other leiomyomas.
US07732410B2	Compositions for inhibiting atherosclerosis The present invention relates to compositions and methods for the reduction of atherosclerotic plaques and the decrease in the level of total serum cholesterol, triglycerides, serum LDL cholesterol, and serum HDL cholesterol.
US07732408B2	Reproductive management A method for breeding, especially a method for breeding dairy cattle without use of heat detection prior to insemination.
US07732407B2	Method for treatment of demyelinating central nervous system disease A method for treating demyelinating central nervous system diseases in a subject that comprises administering to the subject a composition comprising a therapeutically active amount of colony stimulating factor or CSF-like ligand. In a preferred embodiment of the present invention, the CSF is a GM-CSF. In a most preferred embodiment of the present invention, CSF is sargramostim.
US07732406B2	Use of natriuretic peptide for treating heart failure The present invention relates to the use of a natriurectic peptide, such as urodilatin, for treating a patient suffering from heart failure, such as acute decompensated heart failure. Preferably, a composition comprising an effective amount of urodilatin is intravenously administered to the patient continuously through a time period of at least 24 hours and up to 120 hours, preferably at least 48 hours.
US07732405B2	Liquid, aqueous pharmaceutical compositions of factor VII polypeptides The present invention is directed to liquid, aqueous pharmaceutical compositions stabilized against chemical and/or physical degradation containing Factor VII polypeptides, and methods for preparing and using such compositions, as well as vials containing such compositions, and the use of such compositions in the treatment of a Factor VII-responsive syndrome. The main embodiment is represented by a liquid, aqueous pharmaceutical composition comprising at least 0.01 mg/mL of a Factor VII polypeptide (i); a buffering agent (ii) suitable for keeping pH in the range of from about 4.0 to about 9.0; and at least one stabilizing agent (iii) comprising a —C(═N-Z1-R1)—NH-Z2-R2 motif, e.g. benzamidine compounds and guanidine compounds such as arginine.
US07732402B2	Mammalian telomerase Nucleic acids comprising the RNA component of a mammalian telomerase are useful as pharmaceutical, therapeutic, and diagnostic reagents.
US07732394B2	Solid laundry detergent composition comprising light density silicate salt The present invention relates to a solid laundry detergent composition comprising: (a) from 1 wt % to 40 wt % light density silicate salt having a bulk density of less than 400 g/l and a weight average particle size of less than 300 micrometers; (b) from 5 wt % to 60 wt % detersive surfactant; (c) from 0 wt % to 50 wt % carbonate salt; (d) from 0 wt % to 40 wt % sulphate salt; (e) from 0 wt % to 10 wt % phosphate builder; (f) from 0 wt % to 5 wt % zeolite builder; and (g) from 0 wt % to 15 wt % water; wherein the composition has a bulk density of 600 g/l or less.
US07732380B2	Drilling fluids containing biodegradable organophilic clay Drilling fluids are provided that comprise an organophilic clay treated with a quaternary ammonium surfactant having an amide linkage. The quaternary ammonium surfactant may comprise a compound generally represented by the following formula: where M− is an anion such as a chloride, methyl sulfate, bromide, acetate, or iodide ion; R1 is an alkyl group such as a saturated hydrocarbon with 10 or more carbons; R2, R3, and R4 are the same or different alkyl groups such as a methyl, ethyl, or benzyl group, and x is greater than or equal to 1. The organophilic clay treated in this manner is substantially biodegradable. In embodiments, the drilling fluids comprise the foregoing organophilic clay, an oil-based fluid and a weighting agent. In still more embodiments, the drilling fluids comprise the foregoing organophilic clay, an invert emulsion, an emulsifier, and a weighting agent.
US07732377B2	Methods for producing members of specific binding pairs A member of a specific binding pair (sbp) is identified by expressing DNA encoding a genetically diverse population of such sbp members in recombinant host cells in which the sbp members are displayed in functional form at the surface of a filamentous bacteriophage particle containing DNA encoding the sbp member, wherein the sbp member has a binding domain that consists of a dAb fragment. The displayed sbps may be selected by affinity with a complementary sbp member, and the DNA recovered from selected filamentous bacteriophage particles for expression of the selected sbp members.
US07732375B2	Hexyl carboxanilides and their use for controlling fungi The invention relates to novel hexylcarboxanilides of the formula (I) in which L, R1, R3 and A are as defined in the disclosure, to a plurality of processes for preparing these compounds and their use for controlling unwanted microorganisms, and to novel intermediates and their preparation.
US07732374B2	Fungicidal mixtures based on prothioconazole and an insecticide A fungicidal mixture comprising prothioconazole or its salts or adducts and at least one insecticide selected from the group consisting of fipronil, chlorpyrifos or thiamethoxam.
US07732372B2	Particulate absorbent materials Solid absorbent materials that are useful for absorption of chemical species from a fluid, such as a gas stream or a liquid stream. The absorbent materials are formed by spray processing and posses a well-defined chemical composition and microstructure. The absorbent materials can have a high absorption capacity for a chemical species such as H2S, CO2, NOx, and H2 and have a high recylability, such that the chemical species can be absorbed and desorbed over a large number of cycles.
US07732371B2	Liquid-absorbing base The object of the present invention is to provide a more practical liquid-absorbing substrate capable of absorbing not only water but also alcohols, wherein liquid absorbency and gel properties of the substrate can be easily controlled.Namely, the present invention relates to a liquid-absorbing substrate containing:(A) a product obtained by hydrolysis and polycondensation of a compound represented by the formula (I) (R1)nM(X)m-n (I) (wherein, R1 represents a hydrogen atom, C1-C6 alkyl, or C2-C6 alkenyl; M represents a metal atom; X represents a hydrolyzable group; m represents the atomic valence of M; and n represents an integer of 0 or 1) in a solvent in the presence of a catalyst; and (B) a cellulose derivative having a mass-average molecular weight of 1×105 to 5×106.
US07732366B2	Honeycomb structure and exhaust gas purifying device A honeycomb structure comprises a porous ceramic which is composed of several cells aligned across a cell wall longitudinally. The cell has either one end sealed. The gas permeability coefficient k of the cell wall is between about 0.5 μm2 and about 1.5 μm2.
US07732365B2	Enantioselective amination and etherification The present invention is directed to a catalyst composition, comprising: (1) a catalyst precursor having the general structure MSXn wherein M is a transition metal selected from the group consisting of iridium, molybdenum, and tungsten; S is a coordinating ligand; X is a counterion; and n is an integer from 0 to 5; and (2) a phosphoramidite ligand having the structure wherein O—Cn—O is an aliphatic or aromatic diolate and wherein R1, R2, R3 and R4 are selected from the group consisting of substituted or unsubstituted aryl groups, substituted or unsubstituted heteroaryl groups, substituted or unsubstituted aliphatic groups, and combinations thereof, with the proviso that at least one of R1, R2, R3, or R4 must be a substituted or unsubstituted aryl or heteroaryl group. The present invention is also directed to activated catalysts made from the above catalyst composition, as well as methods of allylic amination and etherification using the above catalysts.
US07732361B2	Dielectric porcelain composition for use in electronic devices The invention intends to provide a dielectric porcelain composition for use in electronic devices which can be controlled in the temperature coefficient τf in particular in a negative direction and can shorten a sintering period while maintaining a high Qf value and a high dielectric constant. According to the invention, in conventional composition having a composition formula represented by XBa(Mg1/3Ta2/3)O3—Y(BazSr1-z)(Ga1/2Ta1/2)O3, when Mg is substituted by Ni to form a specific structure, the temperature coefficient τf can be controlled in a negative direction and the τf can be controlled in the range of 0.80 to −4.45 ppm/° C. while maintaining a high Qf value and a high dielectric constant, and even when a sintering period, which has been so far necessary substantially 50 hr, is reduced to 25 hr substantially one half the above, similar Qf value can be obtained.
US07732357B2	Disposable nonwoven wiping fabric and method of production Disclosed is a fibrous nonwoven web material and a method of manufacture thereof. The fibrous nonwoven web material includes natural cellulose fibers, manmade cellulose fibers and synthetic fibers. The manmade cellulose fibers are preferably high crystallinity cellulose fibers. The fibrous nonwoven web material has appreciable wet strength yet is capable of dispersing in most aqueous environments with only mild agitation. The fibrous nonwoven web material can be wet laid from an aqueous dispersion of fibers.
US07732356B2	Fabric having balanced elongation A fabric having balanced stress-strain characteristics in the warp and weft directions. A method of processing the fabric includes overfeeding a woven fabric web along a first direction at one or more steps of a treatment process to facilitate crimping of the woven fabric web in the first direction. The overfeeding is indicative of a predetermined differential between a feed rate and a process rate at the one or more steps. The differential is adapted to cause the crimping in the first direction to substantially match a the level of crimping in a second direction.
US07732354B2	Flat implant of textile thread material, in particular hernia mesh implant The invention relates to a flat implant of textile thread material, in particular a hernia mesh implant, in the form of single-layered mesh fabric (1) of a basis weight of 5 to 40 g/m2.
US07732349B2	Manufacturing method of insulating film and semiconductor device The invention provides a manufacturing method of an insulating film having a plurality of pores, as well as a manufacturing method of a highly integrated semiconductor device with high yield. According to the invention, a porous insulating film is formed by forming a plurality of pores in an interlayer insulating film using a laser beam, which results in lower dielectric constant of the interlayer insulating film. In addition, a composition containing conductive particles is discharged onto the porous insulating film by a droplet discharge method typified by an ink jet printing method, and then baked to form a wire. As the laser beam, an ultrashort pulse laser beam is preferably used.
US07732348B2	Method of producing a porous dielectric element and corresponding dielectric element A porous dielectric element is produced by forming a first dielectric and a second dielectric. The second dielectric is dispersed in the first dielectric. The second dielectric is then removed from the second dielectric by using a chemical dissolution. The removal of the second dielectric from the first dielectric leaves pores in the first dielectric. The pores, which are filled with air, improves the overall dielectric constant of the resulting dielectric element.
US07732347B2	Semiconductor device and fabrication process of semiconductor device A method of fabricating a semiconductor device on a Si substrate includes a first step of forming an insulation film containing an oxide of Zr or Hf on a Si substrate, a second step of forming a gate electrode film on the insulation film, a third step of patterning the gate electrode film by an etching process, a fourth step of annealing, after the third step, the insulation film in a processing gas ambient containing halogen, and a fifth step of removing the insulation film applied with the annealing process.
US07732345B2	Method for using a modified post-etch clean rinsing agent The present invention provides a method for manufacturing an integrated circuit. In one embodiment, the method includes etching one or more openings within a substrate using an etch tool, and subjecting the one or more openings to a post-etch clean, wherein a delay time exists between removing the substrate from the etch tool and the subjecting the one or more opening to the post-etch clean. This method may further include exposing the substrate having been subjected to the post-etch clean to a rinsing agent, wherein a resistivity of the rinsing agent is selected based upon the delay time.
US07732339B2	Etching method, semiconductor and fabricating method for the same An organic/inorganic hybrid film represented by SiCx- HyOz (x>0, y≧0, z>0) is plasma-etched with an etching gas containing fluorine, carbon and nitrogen. During the etching, a carbon component is eliminated from the surface portion of the organic/inorganic hybrid film due to the existence of the nitrogen in the etching gas, to thereby reform the surface portion. The reformed surface portion is nicely plasma-etched with the etching gas containing fluorine and carbon.
US07732336B2	Shallow trench isolation process and structure with minimized strained silicon consumption A method of manufacturing an integrated circuit (IC) utilizes a shallow trench isolation (STI) technique. The shallow trench isolation technique is used in strained silicon (SMOS) process. The strained material is formed after the trench is formed. The process can be utilized on a compound semiconductor layer above a box layer.
US07732333B2	Process for producing and apparatus for improving the bonding between a plastic and a metal A semiconductor having a leadframe is disclosed. In one embodiment, a leadframe is disclosed to be fitted with a semiconductor chip and is to be encapsulated with a plastic compound has a metallic single-piece base body, to which an interlayer is applied. The interlayer has a surface including a matrix of islands of remaining material of substantially uniform height, with voids extending between said islands.
US07732323B2	Methods of manufacturing semiconductor devices having contact plugs in insulation layers Methods of manufacturing semiconductor devices are provided in which a first contact plug is formed on a first active region in a substrate and a second contact plug is formed on a second active region in the substrate. A height of an upper surface of the second contact plug from the substrate is greater than a height of an upper surface of the first contact plug from the substrate. A third contact plug is formed on the second contact plug. A first spacer is formed on a side surface of the third contact plug. A third interlayer insulation layer is formed that covers the third contact plug. The third interlayer insulation layer is patterned to form a third opening that exposes the first contact plug. A fourth contact plug is formed in the third opening that is electrically connected to the first contact plug.
US07732321B2	Method for shielding integrated circuits A method for adding an additional layer to an integrated circuit, the method including providing an integrated circuit having an interconnect layer, depositing, over substantially all of an exposed surface of the integrated circuit, an additional layer of material whose conductivity can be altered, and selectively altering the conductivity of a first portion of the additional layer by selective annealing, to produce a sub-circuit in the additional layer, the sub-circuit being in operative electrical communication with the integrated circuit. Related apparatus and methods are also described.
US07732320B2	Apparatus and method for semiconductor wafer bumping via injection molded solder An improved apparatus for semiconductor wafer bumping utilizes the injection molded solder process and is designed for high volume manufacturing. The apparatus includes equipment for filling patterned mold cavities on a mold structure with solder, equipment for positioning and aligning a patterned surface of a semiconductor structure directly opposite to the solder filled patterned mold cavities of the mold structure, a fixture tool for holding and transferring the aligned mold and semiconductor structures together, and equipment for receiving the fixture tool and transferring the solder from the aligned patterned mold cavities to the aligned patterned semiconductor first surface. The solder transfer equipment include a wafer heater stack configured to heat the semiconductor structure and a mold heater stack configured to heat the mold structure to a process temperature slightly above the solder's melting point. The fixture tool with the aligned mold and semiconductor structures is inserted between the wafer heater stack and the mold heater stack. A deposition chamber is formed between the wafer heater stack and the mold heater stack by sealing the wafer heater stack and the mold heater stack against the frame.
US07732314B1	Method for depositing a diffusion barrier for copper interconnect applications Methods for forming a metal diffusion barrier on an integrated circuit include at least four operations. The first operation deposits barrier material via PVD, ALD or CVD to provide some minimal coverage. The second operation deposits an additional barrier material and simultaneously etches a portion of the barrier material deposited in the first operation. The third operation deposits barrier material via PVD, ALD or CVD to provide some minimal coverage especially over the bottoms of unlanded vias. The forth operation deposits a metal conductive layer. Controlled etching is used to selectively remove barrier material from the bottom of vias, either completely or partially, thus reducing the resistance of subsequently formed metal interconnects. In addition, techniques to protect the bottoms of the unlanded vias are described.
US07732313B2	FUSI integration method using SOG as a sacrificial planarization layer A method for making a transistor 20 that includes using a transition metal nitride layer 200 and/or a SOG layer 220 to protect the source/drain regions 60 from silicidation during the silicidation of the gate electrode 90. The SOG layer 210 is planarized to expose the transition metal nitride layer 200 or the gate electrode 93 before the gate silicidation process. If a transition metal nitride layer 200 is used, then it is removed from the top of the gate electrode 93 before the full silicidation of the gate electrode 90.
US07732312B2	FUSI integration method using SOG as a sacrificial planarization layer A method for making a transistor 20 that includes using a transition metal nitride layer 200 and/or a SOG layer 220 to protect the source/drain regions 60 from silicidation during the silicidation of the gate electrode 90. The SOG layer 210 is planarized to expose the transition metal nitride layer 200 or the gate electrode 93 before the gate silicidation process. If a transition metal nitride layer 200 is used, then it is removed from the top of the gate electrode 93 before the full silicidation of the gate electrode 90.
US07732311B2	Methods of manufacturing semiconductor devices In a method of manufacturing a semiconductor device, a conductive layer pattern may be formed on a substrate. An oxide layer may be formed on the substrate to cover the conductive layer pattern. A diffusion barrier layer may be formed by treating the oxide layer to increase an energy required for a diffusion of impurities. An impurity region may be formed on the substrate by implanting impurities into the conductive layer pattern and a portion of the substrate adjacent to the conductive layer pattern, through the diffusion barrier. The impurities in the conductive layer pattern and the impurity region may be prevented or reduced from diffusing, and therefore, the semiconductor device may have improved performance.
US07732310B2	Sidewall memory with self-aligned asymmetrical source and drain configuration A method of forming a semiconductor structure includes providing a semiconductor substrate and forming a memory cell at a surface of the semiconductor substrate. The step of forming the memory cell includes forming a gate dielectric on the semiconductor substrate and a control gate on the gate dielectric; forming a first and a second tunneling layer on a source side and a drain side of the memory cell, respectively; tilt implanting a lightly doped source region underlying the first tunneling layer, wherein the tilt implanting tilts only from the source side to the drain side, and wherein a portion of the semiconductor substrate under the second tunneling layer is free from the tilt implanting; forming a storage on a horizontal portion of the second tunneling layer; and forming a source region and a drain region in the semiconductor substrate.
US07732303B2	Method for recycling of ion implantation monitor wafers A method of recycling monitor wafers. The method includes: (a) providing a semiconductor wafer which includes a dopant layer extending from a top surface of the wafer into the wafer a distance less than a thickness of the wafer, the dopant layer containing dopant species; after (a), (b) attaching an adhesive tape to a bottom surface of the wafer; after (b), (c) removing the dopant layer; and after (c), (d) removing the adhesive tape.
US07732302B2	Integrated sensor and circuitry and process therefor A micromachined sensor and a process for fabrication and vertical integration of a sensor and circuitry at wafer-level. The process entails processing a first wafer to incompletely define a sensing structure in a first surface thereof, processing a second wafer to define circuitry on a surface thereof, bonding the first and second wafers together, and then etching the first wafer to complete the sensing structure, including the release of a member relative to the second wafer. The first wafer is preferably a silicon-on-insulator (SOI) wafer, and the sensing structure preferably includes a member containing conductive and insulator layers of the SOI wafer. Sets of capacitively coupled elements are preferably formed from a first of the conductive layers to define a symmetric capacitive full-bridge structure.
US07732301B1	Bonded intermediate substrate and method of making same A method of making a bonded intermediate substrate includes forming a weak interface in a GaN source substrate by implanting ions into an N-terminated surface of the GaN source substrate, bonding the N-terminated surface of the GaN source substrate to a handle substrate, and exfoliating a thin GaN single crystal layer from the source substrate such that the thin GaN exfoliated single crystal layer remains bonded to the handle substrate and a Ga-terminated surface of the thin GaN single crystal layer is exposed. The method further includes depositing a capping layer directly onto the exposed surface of the thin GaN single crystal layer, and annealing the thin GaN single crystal layer in a nitrogen containing atmosphere after depositing the capping layer. The in-plane strain present in the thin GaN single crystal layer after the annealing is reduced relative to an in-plane strain present in said layer prior to the annealing.
US07732300B2	Method of bonding aluminum electrodes of two semiconductor substrates A method of bonding aluminum (Al) electrodes formed on two semiconductor substrates at a low temperature that does not affect circuits formed on the two semiconductor substrates is provided. The method includes: (a) forming aluminum (Al) electrodes on the two semiconductor substrates, respectively, and depositing a metal alloy that comprises aluminum (Al) and copper (Cu) onto the aluminum (Al) electrodes; (b) arranging the aluminum (Al) electrodes of the two semiconductor substrates to face with each other; and (c) heating the aluminum (Al) electrodes at a temperature lower than the melting point of the deposited metal alloy, and applying a specific pressure onto the two semiconductor substrates. Accordingly, bonding can be carried out at a temperature lower than the melting point of an Al0.83Cu0.17 alloy without having an effect on circuits formed on two semiconductor substrates, and can be selectively carried out at regions where pressure is applied.
US07732293B2	Tunable semiconductor diodes A diode structure fabrication method. In a P− substrate, an N+ layer is implanted. The N+ layer has an opening whose size affects the breakdown voltage of the diode structure. Upon the N+ layer, an N− layer is formed. Then, a P+ region is formed to serve as an anode of the diode structure. An N+ region can be formed on the surface of the substrate to serve as a cathode of the diode structure. By changing the size of the opening in the N+ layer during fabrication, the breakdown voltage of the diode structure can be changed (tuned) to a desired value.
US07732292B2	Bipolar transistor with self-aligned retrograde extrinsic base implant profile and self-aligned silicide Disclosed is a method of forming a transistor in an integrated circuit structure that begins by forming a collector in a substrate and an intrinsic base above the collector. Then, the invention patterns an emitter pedestal for the lower portion of the emitter on the substrate above the intrinsic base. Before actually forming the emitter or associates spacer, the invention forms an extrinsic base in regions of the substrate not protected by the emitter pedestal. After this, the invention removes the emitter pedestal and eventually forms the emitter where the emitter pedestal was positioned.
US07732289B2	Method of forming a MOS device with an additional layer A method of forming MOS devices is provided. The method includes providing a semiconductor substrate, forming a gate dielectric over the semiconductor substrate, forming a gate electrode over the gate dielectric, forming a source/drain region in the semiconductor substrate, forming an additional layer, preferably by epitaxial growth, on the source/drain region, and siliciding at least a top portion of the additional layer. The additional layer compensates for at least a portion of the semiconductor material lost during manufacturing processes and increases the distance between the source/drain silicide and the substrate. As a result, the leakage current is reduced. A transistor formed using the preferred embodiment preferably includes a silicide over the gate electrode wherein the silicide extends beyond a sidewall boundary of the gate electrode.
US07732288B2	Method for fabricating a semiconductor structure A method for fabricating a semiconductor structure. The novel transistor structure comprises first and second source/drain (S/D) regions whose top surfaces are lower than a top surface of the channel region of the transistor structure. A semiconductor layer and a gate stack on the semiconductor layer are provided. The semiconductor layer includes (i) a channel region directly beneath the gate stack, and (ii) first and second semiconductor regions essentially not covered by the gate stack, and wherein the channel region is disposed between the first and second semiconductor regions. The first and second semiconductor regions are removed. Regions directly beneath the removed first and second semiconductor regions are removed so as to form first and second source/drain regions, respectively, such that top surfaces of the first and second source/drain regions are below a top surface of the channel region.
US07732287B2	Method of forming a body-tie A method of forming a body-tie. The method includes forming the body-tie during an STI scheme of an SOI process. During the STI scheme, a first trench is formed. The first trench stops before a buried oxide layer of the SOI substrate. The first trench may determine a height of body tie that is shared between at least two FETs. A second trench may also be formed within the first trench. The second trench stops in the SOI substrate. The second trench defines the location and shape of a body-tie. Once the location and shape of the body-tie are defined, an oxide is deposited above the body-tie. The deposited oxide prevents certain implants from entering the body tie. By preventing these implants, a source and a drain implant may be self-aligned to the source and drain areas without requiring the use of the photoresist mask to shield the body tie regions from the source and drain implant.
US07732286B2	Buried biasing wells in FETs (Field Effect Transistors) A method for fabricating a semiconductor structure. The semiconductor structure comprises first and second source/drain regions; a channel region disposed between the first and second source/drain regions; a buried well region in physical contact with the channel region; and a buried barrier region being disposed between the buried well region and the first source/drain region and being disposed between the buried well region and the second source/drain region, wherein the buried barrier region is adapted for preventing current leakage and dopant diffusion between the buried well region and the first source/drain region and between the buried well region and the second source/drain region.
US07732280B2	Semiconductor device having offset spacer and method of forming the same A method of forming a semiconductor device having an offset spacer may include forming a gate electrode on a semiconductor substrate. An etch stop layer including a nitride may be formed on the entire surface of the semiconductor substrate having the gate electrode. First spacers may be formed on the sidewalls of the gate electrode. The first spacers may be formed of a material layer having an etch selectivity with respect to the etch stop layer. The etch stop layer may be exposed on the semiconductor substrate on both sides of the gate electrode. Lightly-doped drain (LDD) regions may be formed in the semiconductor substrate using the gate electrode and the first spacers as an ion implantation mask. Second spacers may be formed on the first spacers. Accordingly, a semiconductor device having an offset spacer may be provided.
US07732279B2	Semiconductor device with improved overlay margin and method of manufacturing the same Semiconductor devices with an improved overlay margin and methods of manufacturing the same are provided. In one aspect, a method includes forming a buried bit line in a substrate; forming an isolation layer in the substrate to define an active region, the isolation layer being parallel to the bit line without overlapping the bit line; and forming a gate line including a gate pattern and a conductive line by forming the gate pattern in the active region and forming a conductive line that extends at a right angle to the bit line across the active region and is electrically connected to the gate pattern disposed thereunder. The gate pattern and the conductive line can be integrally formed.
US07732278B2	Split gate memory cell and method therefor A split gate memory cell has a select gate, a control gate, and a charge storage structure. The select gate includes a first portion located over the control gate and a second portion not located over the control gate. In one example, the first portion of the select gate has a sidewall aligned with a sidewall of the control gate and aligned with a sidewall of the charge storage structure. In one example, the control gate has a p-type conductivity. In one example, the gate can be programmed by a hot carrier injection operation and can be erased by a tunneling operation.
US07732276B2	Self-aligned patterning method by using non-conformal film and etch back for flash memory and other semiconductor applications A method for fabricating a memory device with a self-aligned trap layer which is optimized for scaling is disclosed. In the present invention, a non-conformal film is deposited over the charge trapping layer to form a thick film on top of the core source/drain region and a pinch off and a void or a narrow channel at the top of the STI trench. An etch is performed on the non-conformal film to open pinch-off or widen the narrow channel in the non-conformal. The trapping layer is then completely or partially etched between the core cells. The non-conformal film is removed. And a top oxide is formed. The top oxide converts the remaining trap layer to oxide if the trapping layer is partially etched and thus isolate the trap layer.
US07732271B2	Method for manufacturing NAND-type semiconductor storage device According to this invention, there is provided a NAND-type semiconductor storage device including a semiconductor substrate, a semiconductor layer formed on the semiconductor substrate, a buried insulating film selectively formed between the semiconductor substrate and the semiconductor layer in a memory transistor formation region, diffusion layers formed on the semiconductor layer in the memory transistor formation region, floating body regions between the diffusion layers, a first insulating film formed on each of the floating body regions, a floating gate electrode formed on the first insulating film, a control electrode on a second insulating film formed on the floating gate electrode, and contact plugs connected to ones of the pairs of diffusion layers which are respectively located at ends of the memory transistor formation region, wherein the ones of the pairs of diffusion layers, which are located at the ends of the memory transistor formation region, are connected to the semiconductor substrate below the contact plugs.
US07732268B2	Manufacturing method of display device A method of manufacturing a display device to improve the quality of a polycrystal silicon upon dehydrogenating and polycrystallizing an amorphous silicon at the outside of a display region of a substrate, by forming a plurality of pixels having TFT devices using an amorphous silicon in the display region of the substrate, and forming a plurality of driving circuits having semiconductor devices using a polycrystal silicon at the outside of the display region, the method including irradiation of a first continuous oscillation laser only to the amorphous silicon in the region for forming the driving circuit and the peripheral region thereof to conduct dehydrogenation and then irradiation of a second continuous oscillation region only to the dehydrogenated region to polycrystallize the amorphous silicon, wherein the region to which the first continuous oscillation laser is irradiated is wider than the region to which the second continuous oscillation laser is irradiated.
US07732264B2	Fabrication methods of thin film transistor substrates Methods for manufacturing thin film transistor arrays utilizing three steps of lithography and one step of laser ablation while the lithography procedure is used four to five times in conventional processes are disclosed. The use of the disclosed methods assists in improving throughput and saving of manufacturing cost.
US07732260B2	Semiconductor device power interconnect striping A method and an apparatus for improving the delivery and filtering of power to a semiconductor device is disclosed by organizing out interconnects (pins, balls, pads or other interconnects) used to carry power in a striped configuration that shortens the conductive path required between a power source and a semiconductor device and that reduces the resistance of that conductive path.
US07732258B2	Lead frame and method for fabricating semiconductor package employing the same A lead frame and a method of fabricating a semiconductor package including the lead frame, where the lead frame includes a die pad, a tie bar supporting the die pad, and a plurality of leads. The leads may include inner and outer leads arranged along an outer periphery of the die pad, with each of the inner and outer leads having tip terminals. The lead frame may include a connecting bar connected to tip terminals of each of the inner leads. In the method, a bonding pad of a semiconductor chip is mounted on the die pad and connected via a conductive wire to the inner leads of the lead frame. The semiconductor chip, wire and inner leads may be subjected to a molding process, and the connecting bar which connects the tip terminals of the inner leads may be cut so as to independently separate each of the inner leads from the die pad.
US07732257B2	Semiconductor device and method of fabricating the same A semiconductor device and a fabricating method thereof are provided. The semiconductor device can include a first chip having transistors of only the NMOS type, a second chip having transistors of only the PMOS type, and an interconnection electrically connecting the first and second chips to each other. By forming NMOS and PMOS transistors on separate chips, the total number of implant photo processes can be decreased, thereby reducing the fabrication cost.
US07732251B2	Method of making a semiconductor device having a multicomponent oxide One exemplary embodiment includes a semiconductor device. The semiconductor device can include a channel including one or more of a metal oxide including zinc-gallium, cadmium-gallium, cadmium-indium.
US07732249B2	Organic EL light emitting display device and method of manufacturing the same Disclosed is a method for manufacturing an organic EL light emitting display device, comprising forming an anode electrode above a substrate, forming an organic light emitting layer above the anode electrode, performing a fluorinating treatment on a surface of the organic light emitting layer, and forming a cathode electrode directly on the fluorinated surface of the organic light emitting layer.
US07732241B2	Microstructure and manufacturing method thereof and microelectromechanical system An object is to provide a microstructure in which shear stress of a structural layer is increased, a manufacturing method thereof, and a microelectromechanical system. A sacrificial layer is formed over a substrate. A metal film is formed over the sacrificial layer. The metal film is irradiated with a laser beam. Needle-like crystals of the metal film are reduced or eliminated. The metal film is etched and processed into a predetermined shape to form a metal layer. Then, the sacrificial layer is removed. Accordingly, a microelectromechanical system which is excellent in reliability and in which a resistance property to breakage of a movable portion of the microstructure is improved can be provided.
US07732240B2	Formation of through-wafer electrical interconnections and other structures using a thin dielectric membrane Providing through-wafer interconnections in a semiconductor wafer includes forming a sacrificial membrane in a preexisting semiconductor wafer, depositing metallization over one side of the wafer so as to cover exposed portions of the sacrificial membrane facing the one side of the wafer, removing exposed portions of the sacrificial membrane facing the other side of the wafer, and depositing metallization over the other side of the wafer so as to contact the previously deposited metallization. Techniques also are disclosed for providing capacitive and other structures using thin metal membranes.
US07732234B2	Fabrication process for package with light emitting device on a sub-mount A method of fabricating a package with a light emitting device includes depositing a first metallization to form a conductive pad on which the light emitting device is to be mounted and to form one or more feed-through interconnections extending through a semiconductor material that supports the conductive pad. Subsequently, a second metallization is deposited to form a reflective surface for reflecting light, emitted by the light emitting device, through a lid of the package. Deposition of the second metallization is de-coupled from deposition of the first metallization.
US07732232B2	Series interconnected optoelectronic device module assembly Series interconnection of optoelectronic device modules is disclosed. Each device module includes an active layer disposed between a bottom electrode and a transparent conducting layer. An insulating layer is disposed between the bottom electrode of a first device module and a backside top electrode of the first device module. One or more vias are formed through the active layer, transparent conducting layer and insulating layer of the first device module. Sidewalls of the vias are coated with an insulating material such that a channel is formed through the insulating material to the backside top electrode of the first device module. The channel is at least partially filled with an electrically conductive material to form a plug that makes electrical contact between the transparent conducting layer and the backside top electrode of the first device module. Portions of the backside top electrode and insulating layer of a second device module are cut back to expose a portion of the bottom electrode of the second device module. The first and second device modules are attached to an insulating carrier substrate. Electrical contact is made between the backside top electrode of the first device module and the exposed portion of the bottom electrode of the second device module.
US07732231B1	Method of forming a dielectric layer on a semiconductor light emitting device A semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region is formed. A portion of the light emitting layer and the p-type region are removed to expose a portion of the n-type region. A first metal contact is formed on an exposed portion of the n-type region and a second metal contact is formed on a remaining portion of the p-type region. The first and second metal contacts are formed on a same side of the semiconductor structure. A dielectric material is disposed between the first and second metal contacts. The dielectric material is in direct contact with a portion of the semiconductor structure, a portion of the first metal contact, and a portion of the second metal contact. A surface of the device is then planarized by removing a portion of at least one of the first metal contact, the second metal contact, and the dielectric material.
US07732230B2	Backlight including dot light emitting devices having at least two different brightness ranks and method for manufacturing same The present invention provides a method for manufacturing a backlight including a plurality of LEDs arranged in a plane manner. The method includes: preparing LEDs which are classified into a plurality of ranks in accordance with brightness; mounting, in respective blocks each having a same number of points for mounting LEDs, LEDs which are at least two different-ranked; and causing combinations of ranks of the LEDs in the respective blocks to conform to each other. Alternatively, the LEDs, classified into ranks each having a known center value of brightness, are mounted in the blocks such that a total of the center values of the respective ranks in each of the blocks becomes substantially uniform. This realizes a backlight having a uniform in-plane brightness distribution with a merit of cost.

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